Attachment 98258 Details for Bug 60879 – Tahiti Fix

[patch] Tahiti Fix

0001-radeon-Program-TCC_DISABLE-on-SI.patch (text/plain), 1.22 KB, created by Tom Stellard on 2014-04-30 18:04:44 UTC

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Creator: Tom Stellard

Created: 2014-04-30 18:04:44 UTC

Size: 1.22 KB

patch

obsolete

>From d3c6c07ebd04df2222238e8aea4a7dae5d80e2a8 Mon Sep 17 00:00:00 2001
>From: Tom Stellard <thomas.stellard@amd.com>
>Date: Wed, 30 Apr 2014 22:59:39 -0400
>Subject: [PATCH] radeon: Program TCC_DISABLE on SI.
>
>---
> drivers/gpu/drm/radeon/si.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
>diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
>index ac708e0..5fe5a45 100644
>--- a/drivers/gpu/drm/radeon/si.c
>+++ b/drivers/gpu/drm/radeon/si.c
>@@ -2900,6 +2900,7 @@ static void si_gpu_init(struct radeon_device *rdev)
> 	u32 sx_debug_1;
> 	u32 hdp_host_path_cntl;
> 	u32 tmp;
>+        u32 cgts_tcc_disable;
> 	int i, j;
> 
> 	switch (rdev->family) {
>@@ -3094,6 +3095,12 @@ static void si_gpu_init(struct radeon_device *rdev)
> 		    rdev->config.si.max_sh_per_se,
> 		    rdev->config.si.max_backends_per_se);
> 
>+        cgts_tcc_disable = 0xffff0000;
>+        for (i = 0; i < rdev->config.si.max_texture_channel_caches; i++)
>+                cgts_tcc_disable &= ~(1 << (16 + i));
>+        WREG32(CGTS_TCC_DISABLE, cgts_tcc_disable);
>+        WREG32(CGTS_USER_TCC_DISABLE, cgts_tcc_disable);
>+
> 	si_setup_spi(rdev, rdev->config.si.max_shader_engines,
> 		     rdev->config.si.max_sh_per_se,
> 		     rdev->config.si.max_cu_per_sh);
>-- 
>1.8.1.5
>

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