Attachment 98526 Details for Bug 55746 – Dmesg output [sudo dmesg -l debug -H -T > dmesg.txt]

Dmesg output [sudo dmesg -l debug -H -T > dmesg.txt]

dmesg.txt (text/plain), 63.75 KB, created by Jorge Araya Navarro on 2014-05-05 23:14:43 UTC

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Creator: Jorge Araya Navarro

Created: 2014-05-05 23:14:43 UTC

Size: 63.75 KB

patch

obsolete

>[lun may  5 16:58:39 2014] DMI: TOSHIBA Satellite U505/JPTR, BIOS 1.90 06/11/2010
>[lun may  5 16:58:39 2014] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved
>[lun may  5 16:58:39 2014] e820: remove [mem 0x000a0000-0x000fffff] usable
>[lun may  5 16:58:39 2014] MTRR default type: uncachable
>[lun may  5 16:58:39 2014] MTRR fixed ranges enabled:
>[lun may  5 16:58:39 2014]   00000-9FFFF write-back
>[lun may  5 16:58:39 2014]   A0000-BFFFF uncachable
>[lun may  5 16:58:39 2014]   C0000-D3FFF write-protect
>[lun may  5 16:58:39 2014]   D4000-E7FFF uncachable
>[lun may  5 16:58:39 2014]   E8000-FFFFF write-protect
>[lun may  5 16:58:39 2014] MTRR variable ranges enabled:
>[lun may  5 16:58:39 2014]   0 base 000000000 mask F80000000 write-back
>[lun may  5 16:58:39 2014]   1 base 080000000 mask FC0000000 write-back
>[lun may  5 16:58:39 2014]   2 base 0BC000000 mask FFC000000 uncachable
>[lun may  5 16:58:39 2014]   3 base 100000000 mask FC0000000 write-back
>[lun may  5 16:58:39 2014]   4 base 138000000 mask FF8000000 uncachable
>[lun may  5 16:58:39 2014]   5 base 0FFE00000 mask FFFE00000 write-protect
>[lun may  5 16:58:39 2014]   6 disabled
>[lun may  5 16:58:39 2014]   7 disabled
>[lun may  5 16:58:39 2014] Base memory trampoline at [ffff880000098000] 98000 size 24576
>[lun may  5 16:58:39 2014]  [mem 0x00000000-0x000fffff] page 4k
>[lun may  5 16:58:39 2014] BRK [0x01da8000, 0x01da8fff] PGTABLE
>[lun may  5 16:58:39 2014] BRK [0x01da9000, 0x01da9fff] PGTABLE
>[lun may  5 16:58:39 2014] BRK [0x01daa000, 0x01daafff] PGTABLE
>[lun may  5 16:58:39 2014]  [mem 0x137e00000-0x137ffffff] page 2M
>[lun may  5 16:58:39 2014] BRK [0x01dab000, 0x01dabfff] PGTABLE
>[lun may  5 16:58:39 2014]  [mem 0x134000000-0x137dfffff] page 2M
>[lun may  5 16:58:39 2014]  [mem 0x100000000-0x133ffffff] page 2M
>[lun may  5 16:58:39 2014]  [mem 0x00100000-0x001fffff] page 4k
>[lun may  5 16:58:39 2014]  [mem 0x00200000-0xbb1fffff] page 2M
>[lun may  5 16:58:39 2014]  [mem 0xbb200000-0xbb3f6fff] page 4k
>[lun may  5 16:58:39 2014] ACPI: Local APIC address 0xfee00000
>[lun may  5 16:58:39 2014]  [ffffea0000000000-ffffea0004dfffff] PMD -> [ffff880133800000-ffff8801375fffff] on node 0
>[lun may  5 16:58:39 2014] On node 0 totalpages: 996244
>[lun may  5 16:58:39 2014]   DMA zone: 64 pages used for memmap
>[lun may  5 16:58:39 2014]   DMA zone: 21 pages reserved
>[lun may  5 16:58:39 2014]   DMA zone: 3997 pages, LIFO batch:0
>[lun may  5 16:58:39 2014]   DMA32 zone: 11920 pages used for memmap
>[lun may  5 16:58:39 2014]   DMA32 zone: 762871 pages, LIFO batch:31
>[lun may  5 16:58:39 2014]   Normal zone: 3584 pages used for memmap
>[lun may  5 16:58:39 2014]   Normal zone: 229376 pages, LIFO batch:31
>[lun may  5 16:58:39 2014] ACPI: Local APIC address 0xfee00000
>[lun may  5 16:58:39 2014] ACPI: IRQ0 used by override.
>[lun may  5 16:58:39 2014] ACPI: IRQ2 used by override.
>[lun may  5 16:58:39 2014] ACPI: IRQ9 used by override.
>[lun may  5 16:58:39 2014] nr_irqs_gsi: 40
>[lun may  5 16:58:39 2014] pcpu-alloc: s417984 r8192 d24384 u524288 alloc=1*2097152
>[lun may  5 16:58:39 2014] pcpu-alloc: [0] 0 1 2 3 [0] 4 5 6 7 
>[lun may  5 16:58:39 2014] Calgary: detecting Calgary via BIOS EBDA area
>[lun may  5 16:58:39 2014] Calgary: Unable to locate Rio Grande table in EBDA - bailing!
>[lun may  5 16:58:39 2014] hpet clockevent registered
>[lun may  5 16:58:39 2014] ACPI: EC: Look up EC in DSDT
>[lun may  5 16:58:39 2014] pci 0000:00:00.0: [8086:0044] type 00 class 0x060000
>[lun may  5 16:58:39 2014] pci 0000:00:02.0: [8086:0046] type 00 class 0x030000
>[lun may  5 16:58:39 2014] pci 0000:00:02.0: reg 0x10: [mem 0xf0000000-0xf03fffff 64bit]
>[lun may  5 16:58:39 2014] pci 0000:00:02.0: reg 0x18: [mem 0xe0000000-0xefffffff 64bit pref]
>[lun may  5 16:58:39 2014] pci 0000:00:02.0: reg 0x20: [io  0xe060-0xe067]
>[lun may  5 16:58:39 2014] pci 0000:00:16.0: [8086:3b64] type 00 class 0x078000
>[lun may  5 16:58:39 2014] pci 0000:00:16.0: reg 0x10: [mem 0xf1b09000-0xf1b0900f 64bit]
>[lun may  5 16:58:39 2014] pci 0000:00:16.0: PME# supported from D0 D3hot D3cold
>[lun may  5 16:58:39 2014] pci 0000:00:1a.0: [8086:3b3c] type 00 class 0x0c0320
>[lun may  5 16:58:39 2014] pci 0000:00:1a.0: reg 0x10: [mem 0xf1b07000-0xf1b073ff]
>[lun may  5 16:58:39 2014] pci 0000:00:1a.0: PME# supported from D0 D3hot D3cold
>[lun may  5 16:58:39 2014] pci 0000:00:1b.0: [8086:3b56] type 00 class 0x040300
>[lun may  5 16:58:39 2014] pci 0000:00:1b.0: reg 0x10: [mem 0xf1b00000-0xf1b03fff 64bit]
>[lun may  5 16:58:39 2014] pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold
>[lun may  5 16:58:39 2014] pci 0000:00:1c.0: [8086:3b42] type 01 class 0x060400
>[lun may  5 16:58:39 2014] pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold
>[lun may  5 16:58:39 2014] pci 0000:00:1c.1: [8086:3b44] type 01 class 0x060400
>[lun may  5 16:58:39 2014] pci 0000:00:1c.1: PME# supported from D0 D3hot D3cold
>[lun may  5 16:58:39 2014] pci 0000:00:1c.3: [8086:3b48] type 01 class 0x060400
>[lun may  5 16:58:39 2014] pci 0000:00:1c.3: PME# supported from D0 D3hot D3cold
>[lun may  5 16:58:39 2014] pci 0000:00:1c.5: [8086:3b4c] type 01 class 0x060400
>[lun may  5 16:58:39 2014] pci 0000:00:1c.5: PME# supported from D0 D3hot D3cold
>[lun may  5 16:58:39 2014] pci 0000:00:1d.0: [8086:3b34] type 00 class 0x0c0320
>[lun may  5 16:58:39 2014] pci 0000:00:1d.0: reg 0x10: [mem 0xf1b06000-0xf1b063ff]
>[lun may  5 16:58:39 2014] pci 0000:00:1d.0: PME# supported from D0 D3hot D3cold
>[lun may  5 16:58:39 2014] pci 0000:00:1e.0: [8086:2448] type 01 class 0x060401
>[lun may  5 16:58:39 2014] pci 0000:00:1f.0: [8086:3b09] type 00 class 0x060100
>[lun may  5 16:58:39 2014] pci 0000:00:1f.2: [8086:3b29] type 00 class 0x010601
>[lun may  5 16:58:39 2014] pci 0000:00:1f.2: reg 0x10: [io  0xe050-0xe057]
>[lun may  5 16:58:39 2014] pci 0000:00:1f.2: reg 0x14: [io  0xe040-0xe043]
>[lun may  5 16:58:39 2014] pci 0000:00:1f.2: reg 0x18: [io  0xe030-0xe037]
>[lun may  5 16:58:39 2014] pci 0000:00:1f.2: reg 0x1c: [io  0xe020-0xe023]
>[lun may  5 16:58:39 2014] pci 0000:00:1f.2: reg 0x20: [io  0xe000-0xe01f]
>[lun may  5 16:58:39 2014] pci 0000:00:1f.2: reg 0x24: [mem 0xf1b05000-0xf1b057ff]
>[lun may  5 16:58:39 2014] pci 0000:00:1f.2: PME# supported from D3hot
>[lun may  5 16:58:39 2014] pci 0000:00:1f.6: [8086:3b32] type 00 class 0x118000
>[lun may  5 16:58:39 2014] pci 0000:00:1f.6: reg 0x10: [mem 0xf1b04000-0xf1b04fff 64bit]
>[lun may  5 16:58:39 2014] pci 0000:01:00.0: [1180:e822] type 00 class 0x080500
>[lun may  5 16:58:39 2014] pci 0000:01:00.0: reg 0x10: [mem 0xf1a02000-0xf1a020ff]
>[lun may  5 16:58:39 2014] pci 0000:01:00.0: supports D1 D2
>[lun may  5 16:58:39 2014] pci 0000:01:00.0: PME# supported from D0 D1 D2 D3hot D3cold
>[lun may  5 16:58:39 2014] pci 0000:01:00.1: [1180:e230] type 00 class 0x088000
>[lun may  5 16:58:39 2014] pci 0000:01:00.1: reg 0x10: [mem 0xf1a01000-0xf1a010ff]
>[lun may  5 16:58:39 2014] pci 0000:01:00.1: supports D1 D2
>[lun may  5 16:58:39 2014] pci 0000:01:00.1: PME# supported from D0 D1 D2 D3hot D3cold
>[lun may  5 16:58:39 2014] pci 0000:00:1c.0:   bridge window [mem 0xf1a00000-0xf1afffff]
>[lun may  5 16:58:39 2014] pci 0000:02:00.0: [168c:001c] type 00 class 0x020000
>[lun may  5 16:58:39 2014] pci 0000:02:00.0: reg 0x10: [mem 0xf1900000-0xf190ffff 64bit]
>[lun may  5 16:58:39 2014] pci 0000:02:00.0: supports D1 D2
>[lun may  5 16:58:39 2014] pci 0000:02:00.0: PME# supported from D0 D1 D2 D3hot D3cold
>[lun may  5 16:58:39 2014] pci 0000:00:1c.1:   bridge window [mem 0xf1900000-0xf19fffff]
>[lun may  5 16:58:39 2014] pci 0000:00:1c.3:   bridge window [io  0xd000-0xdfff]
>[lun may  5 16:58:39 2014] pci 0000:00:1c.3:   bridge window [mem 0xf0400000-0xf17fffff]
>[lun may  5 16:58:39 2014] pci 0000:07:00.0: [10ec:8136] type 00 class 0x020000
>[lun may  5 16:58:39 2014] pci 0000:07:00.0: reg 0x10: [io  0xc000-0xc0ff]
>[lun may  5 16:58:39 2014] pci 0000:07:00.0: reg 0x18: [mem 0xf1830000-0xf1830fff 64bit pref]
>[lun may  5 16:58:39 2014] pci 0000:07:00.0: reg 0x20: [mem 0xf1820000-0xf182ffff 64bit pref]
>[lun may  5 16:58:39 2014] pci 0000:07:00.0: reg 0x30: [mem 0xf1800000-0xf181ffff pref]
>[lun may  5 16:58:39 2014] pci 0000:07:00.0: supports D1 D2
>[lun may  5 16:58:39 2014] pci 0000:07:00.0: PME# supported from D0 D1 D2 D3hot D3cold
>[lun may  5 16:58:39 2014] pci 0000:00:1c.5:   bridge window [io  0xc000-0xcfff]
>[lun may  5 16:58:39 2014] pci 0000:00:1c.5:   bridge window [mem 0xf1800000-0xf18fffff]
>[lun may  5 16:58:39 2014] pci 0000:00:1e.0:   bridge window [io  0x0000-0x0cf7] (subtractive decode)
>[lun may  5 16:58:39 2014] pci 0000:00:1e.0:   bridge window [io  0x0d00-0xffff] (subtractive decode)
>[lun may  5 16:58:39 2014] pci 0000:00:1e.0:   bridge window [mem 0x000a0000-0x000bffff] (subtractive decode)
>[lun may  5 16:58:39 2014] pci 0000:00:1e.0:   bridge window [mem 0x000d4000-0x000d7fff] (subtractive decode)
>[lun may  5 16:58:39 2014] pci 0000:00:1e.0:   bridge window [mem 0x000d8000-0x000dbfff] (subtractive decode)
>[lun may  5 16:58:39 2014] pci 0000:00:1e.0:   bridge window [mem 0x000dc000-0x000dffff] (subtractive decode)
>[lun may  5 16:58:39 2014] pci 0000:00:1e.0:   bridge window [mem 0x000e0000-0x000e3fff] (subtractive decode)
>[lun may  5 16:58:39 2014] pci 0000:00:1e.0:   bridge window [mem 0x000e4000-0x000e7fff] (subtractive decode)
>[lun may  5 16:58:39 2014] pci 0000:00:1e.0:   bridge window [mem 0xc0000000-0xfebfffff] (subtractive decode)
>[lun may  5 16:58:39 2014] pci 0000:3f:00.0: [8086:2c62] type 00 class 0x060000
>[lun may  5 16:58:39 2014] pci 0000:3f:00.1: [8086:2d01] type 00 class 0x060000
>[lun may  5 16:58:39 2014] pci 0000:3f:02.0: [8086:2d10] type 00 class 0x060000
>[lun may  5 16:58:39 2014] pci 0000:3f:02.1: [8086:2d11] type 00 class 0x060000
>[lun may  5 16:58:39 2014] pci 0000:3f:02.2: [8086:2d12] type 00 class 0x060000
>[lun may  5 16:58:39 2014] pci 0000:3f:02.3: [8086:2d13] type 00 class 0x060000
>[lun may  5 16:58:39 2014] ACPI: \_SB_.PCI0: notify handler is installed
>[lun may  5 16:58:39 2014] ACPI: \_SB_.CPBG: notify handler is installed
>[lun may  5 16:58:39 2014] Found 2 acpi root devices
>[lun may  5 16:58:39 2014] PCI: pci_cache_line_size set to 64 bytes
>[lun may  5 16:58:39 2014] e820: reserve RAM buffer [mem 0x0009e800-0x0009ffff]
>[lun may  5 16:58:39 2014] e820: reserve RAM buffer [mem 0xbb3f7000-0xbbffffff]
>[lun may  5 16:58:39 2014] pnp 00:00: [dma 4]
>[lun may  5 16:58:39 2014] pnp 00:00: Plug and Play ACPI device, IDs PNP0200 (active)
>[lun may  5 16:58:39 2014] pnp 00:01: Plug and Play ACPI device, IDs INT0800 (active)
>[lun may  5 16:58:39 2014] pnp 00:02: Plug and Play ACPI device, IDs PNP0103 (active)
>[lun may  5 16:58:39 2014] pnp 00:03: Plug and Play ACPI device, IDs PNP0c04 (active)
>[lun may  5 16:58:39 2014] system 00:04: Plug and Play ACPI device, IDs PNP0c02 (active)
>[lun may  5 16:58:39 2014] pnp 00:05: Plug and Play ACPI device, IDs PNP0b00 (active)
>[lun may  5 16:58:39 2014] system 00:06: Plug and Play ACPI device, IDs PNP0c02 (active)
>[lun may  5 16:58:39 2014] system 00:07: Plug and Play ACPI device, IDs PNP0c02 (active)
>[lun may  5 16:58:39 2014] pnp 00:08: Plug and Play ACPI device, IDs SYN1d0b SYN1d00 SYN0002 PNP0f13 (active)
>[lun may  5 16:58:39 2014] pnp 00:09: Plug and Play ACPI device, IDs PNP0303 PNP030b (active)
>[lun may  5 16:58:39 2014] system 00:0a: Plug and Play ACPI device, IDs PNP0c02 (active)
>[lun may  5 16:58:39 2014] system 00:0b: Plug and Play ACPI device, IDs PNP0c02 (active)
>[lun may  5 16:58:39 2014] system 00:0c: Plug and Play ACPI device, IDs PNP0c02 (active)
>[lun may  5 16:58:39 2014] system 00:0d: Plug and Play ACPI device, IDs PNP0c01 (active)
>[lun may  5 16:58:39 2014] pci 0000:00:1c.3: bridge window [mem 0x00100000-0x000fffff 64bit pref] to [bus 03-06] add_size 200000
>[lun may  5 16:58:39 2014] pci 0000:00:1c.3: res[15]=[mem 0x00100000-0x000fffff 64bit pref] get_res_add_size add_size 200000
>[lun may  5 16:58:39 2014] pci_bus 0000:00: resource 4 [io  0x0000-0x0cf7]
>[lun may  5 16:58:39 2014] pci_bus 0000:00: resource 5 [io  0x0d00-0xffff]
>[lun may  5 16:58:39 2014] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff]
>[lun may  5 16:58:39 2014] pci_bus 0000:00: resource 7 [mem 0x000d4000-0x000d7fff]
>[lun may  5 16:58:39 2014] pci_bus 0000:00: resource 8 [mem 0x000d8000-0x000dbfff]
>[lun may  5 16:58:39 2014] pci_bus 0000:00: resource 9 [mem 0x000dc000-0x000dffff]
>[lun may  5 16:58:39 2014] pci_bus 0000:00: resource 10 [mem 0x000e0000-0x000e3fff]
>[lun may  5 16:58:39 2014] pci_bus 0000:00: resource 11 [mem 0x000e4000-0x000e7fff]
>[lun may  5 16:58:39 2014] pci_bus 0000:00: resource 12 [mem 0xc0000000-0xfebfffff]
>[lun may  5 16:58:39 2014] pci_bus 0000:01: resource 1 [mem 0xf1a00000-0xf1afffff]
>[lun may  5 16:58:39 2014] pci_bus 0000:02: resource 1 [mem 0xf1900000-0xf19fffff]
>[lun may  5 16:58:39 2014] pci_bus 0000:03: resource 0 [io  0xd000-0xdfff]
>[lun may  5 16:58:39 2014] pci_bus 0000:03: resource 1 [mem 0xf0400000-0xf17fffff]
>[lun may  5 16:58:39 2014] pci_bus 0000:03: resource 2 [mem 0xc0000000-0xc01fffff 64bit pref]
>[lun may  5 16:58:39 2014] pci_bus 0000:07: resource 0 [io  0xc000-0xcfff]
>[lun may  5 16:58:39 2014] pci_bus 0000:07: resource 1 [mem 0xf1800000-0xf18fffff]
>[lun may  5 16:58:39 2014] pci_bus 0000:08: resource 4 [io  0x0000-0x0cf7]
>[lun may  5 16:58:39 2014] pci_bus 0000:08: resource 5 [io  0x0d00-0xffff]
>[lun may  5 16:58:39 2014] pci_bus 0000:08: resource 6 [mem 0x000a0000-0x000bffff]
>[lun may  5 16:58:39 2014] pci_bus 0000:08: resource 7 [mem 0x000d4000-0x000d7fff]
>[lun may  5 16:58:39 2014] pci_bus 0000:08: resource 8 [mem 0x000d8000-0x000dbfff]
>[lun may  5 16:58:39 2014] pci_bus 0000:08: resource 9 [mem 0x000dc000-0x000dffff]
>[lun may  5 16:58:39 2014] pci_bus 0000:08: resource 10 [mem 0x000e0000-0x000e3fff]
>[lun may  5 16:58:39 2014] pci_bus 0000:08: resource 11 [mem 0x000e4000-0x000e7fff]
>[lun may  5 16:58:39 2014] pci_bus 0000:08: resource 12 [mem 0xc0000000-0xfebfffff]
>[lun may  5 16:58:39 2014] pci 0000:00:02.0: Boot video device
>[lun may  5 16:58:39 2014] PCI: CLS 64 bytes, default 64
>[lun may  5 16:58:39 2014] pcieport 0000:00:1c.0: irq 40 for MSI/MSI-X
>[lun may  5 16:58:39 2014] pcieport 0000:00:1c.1: irq 41 for MSI/MSI-X
>[lun may  5 16:58:39 2014] pcieport 0000:00:1c.3: irq 42 for MSI/MSI-X
>[lun may  5 16:58:39 2014] pcieport 0000:00:1c.5: irq 43 for MSI/MSI-X
>[lun may  5 16:58:39 2014] pcie_pme 0000:00:1c.0:pcie01: service driver pcie_pme loaded
>[lun may  5 16:58:39 2014] pcie_pme 0000:00:1c.1:pcie01: service driver pcie_pme loaded
>[lun may  5 16:58:39 2014] pcie_pme 0000:00:1c.3:pcie01: service driver pcie_pme loaded
>[lun may  5 16:58:39 2014] pcie_pme 0000:00:1c.5:pcie01: service driver pcie_pme loaded
>[lun may  5 16:58:39 2014] pciehp 0000:00:1c.3:pcie04: service driver pciehp loaded
>[lun may  5 16:58:39 2014] intel_idle: MWAIT substates: 0x1120
>[lun may  5 16:58:39 2014] intel_idle: v0.4 model 0x25
>[lun may  5 16:58:39 2014] intel_idle: lapic_timer_reliable_states 0xffffffff
>[lun may  5 16:58:39 2014] PM: Hibernation image not present or could not be loaded.
>[lun may  5 16:58:40 2014] libata version 3.00 loaded.
>[lun may  5 16:58:40 2014] ahci 0000:00:1f.2: version 3.0
>[lun may  5 16:58:40 2014] ahci 0000:00:1f.2: irq 44 for MSI/MSI-X
>[lun may  5 16:58:40 2014] ahci 0000:00:1f.2: setting latency timer to 64
>[lun may  5 16:58:40 2014] ata2.00: ACPI cmd ef/10:06:00:00:00:a0 (SET FEATURES) succeeded
>[lun may  5 16:58:40 2014] ata5.00: ACPI cmd ef/10:06:00:00:00:a0 (SET FEATURES) succeeded
>[lun may  5 16:58:40 2014] ata5.00: ACPI cmd ef/90:05:00:00:00:a0 (SET FEATURES) succeeded
>[lun may  5 16:58:40 2014] ata2.00: ACPI cmd ef/10:06:00:00:00:a0 (SET FEATURES) succeeded
>[lun may  5 16:58:40 2014] ata5.00: ACPI cmd ef/10:06:00:00:00:a0 (SET FEATURES) succeeded
>[lun may  5 16:58:40 2014] sd 1:0:0:0: [sda] Mode Sense: 00 3a 00 00
>[lun may  5 16:58:40 2014] ata5.00: ACPI cmd ef/90:05:00:00:00:a0 (SET FEATURES) succeeded
>[lun may  5 16:58:40 2014] sr 4:0:0:0: Attached scsi CD-ROM sr0
>[lun may  5 16:58:40 2014] [drm:i915_dump_device_info], i915 device info: gen=5, pciid=0x0046 flags=is_mobile,need_gfx_hws,has_fbc,has_hotplug,has_bsd_ring,
>[lun may  5 16:58:40 2014] [drm:i915_gem_gtt_init], GMADR size = 256M
>[lun may  5 16:58:40 2014] [drm:i915_gem_gtt_init], GTT stolen size = 32M
>[lun may  5 16:58:40 2014] checking generic (e0000000 300000) vs hw (e0000000 10000000)
>[lun may  5 16:58:40 2014] i915 0000:00:02.0: setting latency timer to 64
>[lun may  5 16:58:40 2014] [drm:intel_detect_pch], Found Ibex Peak PCH
>[lun may  5 16:58:40 2014] [drm:intel_opregion_setup], graphic opregion physical addr: 0xbb4a4018
>[lun may  5 16:58:40 2014] [drm:intel_opregion_setup], Public ACPI methods supported
>[lun may  5 16:58:40 2014] [drm:intel_opregion_setup], SWSCI supported
>[lun may  5 16:58:40 2014] [drm:intel_opregion_setup], ASLE supported
>[lun may  5 16:58:40 2014] i915 0000:00:02.0: irq 45 for MSI/MSI-X
>[lun may  5 16:58:40 2014] [drm:init_vbt_defaults], Set default to SSC at 100MHz
>[lun may  5 16:58:40 2014] [drm:intel_parse_bios], Using VBT from OpRegion: $VBT IRONLAKE-MOBILEd
>[lun may  5 16:58:40 2014] [drm:parse_general_features], BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 1 lvds_use_ssc 1 lvds_ssc_freq 120 display_clock_mode 0 fdi_rx_polarity_inverted 0
>[lun may  5 16:58:40 2014] [drm:parse_general_definitions], crt_ddc_bus_pin: 2
>[lun may  5 16:58:40 2014] [drm:parse_lfp_panel_data], Found panel mode in BIOS VBT tables:
>[lun may  5 16:58:40 2014] [drm:drm_mode_debug_printmodeline], Modeline 0:"1280x800" 0 71000 1280 1328 1360 1440 800 803 809 823 0x8 0xa
>[lun may  5 16:58:40 2014] [drm:parse_lfp_panel_data], VBT initial LVDS value 300300
>[lun may  5 16:58:40 2014] [drm:parse_sdvo_panel_data], Found SDVO panel mode in BIOS VBT tables:
>[lun may  5 16:58:40 2014] [drm:drm_mode_debug_printmodeline], Modeline 0:"1600x1200" 0 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x8 0xa
>[lun may  5 16:58:40 2014] [drm:parse_sdvo_device_mapping], No SDVO device info is found in VBT
>[lun may  5 16:58:40 2014] [drm:intel_dsm_pci_probe], no _DSM method for intel device
>[lun may  5 16:58:40 2014] [drm:i915_gem_init_stolen], found 33554432 bytes of stolen memory at be000000
>[lun may  5 16:58:40 2014] [drm:intel_print_wm_latency], Primary WM0 latency 7 (0.7 usec)
>[lun may  5 16:58:40 2014] [drm:intel_print_wm_latency], Primary WM1 latency 10 (5.0 usec)
>[lun may  5 16:58:40 2014] [drm:intel_print_wm_latency], Primary WM2 latency 34 (17.0 usec)
>[lun may  5 16:58:40 2014] [drm:intel_print_wm_latency], Sprite WM0 latency 13 (1.3 usec)
>[lun may  5 16:58:40 2014] [drm:intel_print_wm_latency], Sprite WM1 latency 10 (5.0 usec)
>[lun may  5 16:58:40 2014] [drm:intel_print_wm_latency], Sprite WM2 latency 34 (17.0 usec)
>[lun may  5 16:58:40 2014] [drm:intel_print_wm_latency], Cursor WM0 latency 13 (1.3 usec)
>[lun may  5 16:58:40 2014] [drm:intel_print_wm_latency], Cursor WM1 latency 10 (5.0 usec)
>[lun may  5 16:58:40 2014] [drm:intel_print_wm_latency], Cursor WM2 latency 34 (17.0 usec)
>[lun may  5 16:58:40 2014] [drm:intel_modeset_init], 2 display pipes available.
>[lun may  5 16:58:40 2014] [drm:intel_shared_dpll_init], 2 shared PLLs initialized
>[lun may  5 16:58:40 2014] [drm:intel_lvds_init], using preferred mode from EDID: 
>[lun may  5 16:58:40 2014] [drm:drm_mode_debug_printmodeline], 
>[lun may  5 16:58:40 2014] [drm:intel_lvds_init], detected single-link lvds configuration
>[lun may  5 16:58:40 2014] [drm:intel_panel_get_backlight], get backlight PWM = 4882
>[lun may  5 16:58:40 2014] [drm:intel_panel_get_max_backlight], max backlight PWM = 4882
>[lun may  5 16:58:40 2014] [drm:intel_dp_init_connector], Adding DP connector on port D
>[lun may  5 16:58:40 2014] [drm:intel_dp_i2c_init], i2c_init DPDDC-D
>[lun may  5 16:58:40 2014] [drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x7145003f
>[lun may  5 16:58:40 2014] [drm:intel_dp_i2c_aux_ch], aux_ch failed -110
>[lun may  5 16:58:40 2014] [drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x7145003f
>[lun may  5 16:58:40 2014] [drm:intel_dp_i2c_aux_ch], aux_ch failed -110
>[lun may  5 16:58:40 2014] [drm:ironlake_init_pch_refclk], has_panel 1 has_lvds 1 has_ck505 0
>[lun may  5 16:58:40 2014] [drm:i915_gem_setup_global_gtt], clearing unused GTT space: [0, 7ffff000]
>[lun may  5 16:58:40 2014] [drm:init_status_page], render ring hws offset: 0x00001000
>[lun may  5 16:58:40 2014] [drm:i915_gem_object_create_stolen], creating stolen object: size=20000
>[lun may  5 16:58:40 2014] [drm:i915_pages_create_for_stolen], offset=0x0, size=131072
>[lun may  5 16:58:40 2014] [drm:init_pipe_control], render ring pipe control offset: 0x00024000
>[lun may  5 16:58:40 2014] [drm:init_status_page], bsd ring hws offset: 0x00025000
>[lun may  5 16:58:40 2014] [drm:i915_gem_object_create_stolen], creating stolen object: size=20000
>[lun may  5 16:58:40 2014] [drm:i915_pages_create_for_stolen], offset=0x20000, size=131072
>[lun may  5 16:58:40 2014] [drm:i915_gem_context_init], Disabling HW Contexts; old hardware
>[lun may  5 16:58:40 2014] [drm:ironlake_enable_drps], fmax: 0, fmin: 7, fstart: 5
>[lun may  5 16:58:40 2014] [drm:intel_modeset_readout_hw_state], [CRTC:3] hw state readout: enabled
>[lun may  5 16:58:40 2014] [drm:intel_modeset_readout_hw_state], [CRTC:5] hw state readout: disabled
>[lun may  5 16:58:40 2014] [drm:intel_modeset_readout_hw_state], PCH DPLL A hw state readout: refcount 1, on 1
>[lun may  5 16:58:40 2014] [drm:intel_modeset_readout_hw_state], PCH DPLL B hw state readout: refcount 0, on 0
>[lun may  5 16:58:40 2014] [drm:intel_modeset_readout_hw_state], [ENCODER:8:LVDS-8] hw state readout: disabled, pipe=0
>[lun may  5 16:58:40 2014] [drm:intel_modeset_readout_hw_state], [ENCODER:14:DAC-14] hw state readout: enabled, pipe=0
>[lun may  5 16:58:40 2014] [drm:intel_modeset_readout_hw_state], [ENCODER:15:TMDS-15] hw state readout: disabled, pipe=0
>[lun may  5 16:58:40 2014] [drm:intel_modeset_readout_hw_state], [ENCODER:19:TMDS-19] hw state readout: disabled, pipe=0
>[lun may  5 16:58:40 2014] [drm:intel_modeset_readout_hw_state], [CONNECTOR:7:LVDS-1] hw state readout: disabled
>[lun may  5 16:58:40 2014] [drm:intel_modeset_readout_hw_state], [CONNECTOR:13:VGA-1] hw state readout: enabled
>[lun may  5 16:58:40 2014] [drm:intel_modeset_readout_hw_state], [CONNECTOR:16:HDMI-A-1] hw state readout: disabled
>[lun may  5 16:58:40 2014] [drm:intel_modeset_readout_hw_state], [CONNECTOR:20:DP-1] hw state readout: disabled
>[lun may  5 16:58:40 2014] [drm:intel_dump_pipe_config], [CRTC:3][setup_hw_state] config for pipe A
>[lun may  5 16:58:40 2014] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[lun may  5 16:58:40 2014] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[lun may  5 16:58:40 2014] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 4, gmch_m: 1514609, gmch_n: 8388608, link_m: 126217, link_n: 524288, tu: 64
>[lun may  5 16:58:40 2014] [drm:intel_dump_pipe_config], requested mode:
>[lun may  5 16:58:40 2014] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 1024 0 0 0 768 0 0 0 0x0 0x0
>[lun may  5 16:58:40 2014] [drm:intel_dump_pipe_config], adjusted mode:
>[lun may  5 16:58:40 2014] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 64999 0 0 0 0 0 0 0 0 0x0 0xa
>[lun may  5 16:58:40 2014] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[lun may  5 16:58:40 2014] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x04000300, enabled
>[lun may  5 16:58:40 2014] [drm:intel_dump_pipe_config], ips: 0
>[lun may  5 16:58:40 2014] [drm:intel_dump_pipe_config], [CRTC:5][setup_hw_state] config for pipe B
>[lun may  5 16:58:40 2014] [drm:intel_dump_pipe_config], cpu_transcoder: B
>[lun may  5 16:58:40 2014] [drm:intel_dump_pipe_config], pipe bpp: 0, dithering: 0
>[lun may  5 16:58:40 2014] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[lun may  5 16:58:40 2014] [drm:intel_dump_pipe_config], requested mode:
>[lun may  5 16:58:40 2014] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[lun may  5 16:58:40 2014] [drm:intel_dump_pipe_config], adjusted mode:
>[lun may  5 16:58:40 2014] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[lun may  5 16:58:40 2014] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[lun may  5 16:58:40 2014] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[lun may  5 16:58:40 2014] [drm:intel_dump_pipe_config], ips: 0
>[lun may  5 16:58:40 2014] [drm:intel_connector_check_state], [CONNECTOR:13:VGA-1]
>[lun may  5 16:58:40 2014] [drm:check_encoder_state], [ENCODER:8:LVDS-8]
>[lun may  5 16:58:40 2014] [drm:check_encoder_state], [ENCODER:14:DAC-14]
>[lun may  5 16:58:40 2014] [drm:check_encoder_state], [ENCODER:15:TMDS-15]
>[lun may  5 16:58:40 2014] [drm:check_encoder_state], [ENCODER:19:TMDS-19]
>[lun may  5 16:58:40 2014] [drm:check_crtc_state], [CRTC:3]
>[lun may  5 16:58:40 2014] [drm:check_crtc_state], [CRTC:5]
>[lun may  5 16:58:40 2014] [drm:check_shared_dpll_state], PCH DPLL A
>[lun may  5 16:58:40 2014] [drm:check_shared_dpll_state], PCH DPLL B
>[lun may  5 16:58:40 2014] [drm:intel_crt_reset], pch crt adpa set to 0x80f40000
>[lun may  5 16:58:40 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1]
>[lun may  5 16:58:40 2014] [drm:intel_lvds_detect], [CONNECTOR:7:LVDS-1]
>[lun may  5 16:58:40 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1] probed modes :
>[lun may  5 16:58:40 2014] [drm:drm_mode_debug_printmodeline], Modeline 10:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x48 0xa
>[lun may  5 16:58:40 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:VGA-1]
>[lun may  5 16:58:40 2014] [drm:intel_crt_detect], [CONNECTOR:13:VGA-1] force=1
>[lun may  5 16:58:40 2014] [drm:intel_ironlake_crt_detect_hotplug], trigger hotplug detect cycle: adpa=0x83f40000
>[lun may  5 16:58:41 2014] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0x83f40000, result 1
>[lun may  5 16:58:41 2014] [drm:intel_crt_detect], CRT detected via hotplug
>[lun may  5 16:58:41 2014] [drm:drm_edid_to_eld], ELD: no CEA Extension found
>[lun may  5 16:58:41 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:VGA-1] probed modes :
>[lun may  5 16:58:41 2014] [drm:drm_mode_debug_printmodeline], Modeline 22:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x48 0x5
>[lun may  5 16:58:41 2014] [drm:drm_mode_debug_printmodeline], Modeline 23:"1280x720" 60 74440 1280 1336 1472 1664 720 721 724 746 0x0 0x6
>[lun may  5 16:58:41 2014] [drm:drm_mode_debug_printmodeline], Modeline 24:"1152x720" 60 67282 1152 1208 1328 1504 720 721 724 746 0x0 0x6
>[lun may  5 16:58:41 2014] [drm:drm_mode_debug_printmodeline], Modeline 27:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[lun may  5 16:58:41 2014] [drm:drm_mode_debug_printmodeline], Modeline 25:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[lun may  5 16:58:41 2014] [drm:drm_mode_debug_printmodeline], Modeline 26:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[lun may  5 16:58:41 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:16:HDMI-A-1]
>[lun may  5 16:58:41 2014] [drm:intel_hdmi_detect], [CONNECTOR:16:HDMI-A-1]
>[lun may  5 16:58:41 2014] [drm:gmbus_xfer], GMBUS [i915 gmbus dpd] NAK for addr: 0050 r(1)
>[lun may  5 16:58:41 2014] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpd
>[lun may  5 16:58:41 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:16:HDMI-A-1] disconnected
>[lun may  5 16:58:41 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:20:DP-1]
>[lun may  5 16:58:41 2014] [drm:intel_dp_detect], [CONNECTOR:20:DP-1]
>[lun may  5 16:58:41 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:20:DP-1] disconnected
>[lun may  5 16:58:41 2014] [drm:drm_setup_crtcs], 
>[lun may  5 16:58:41 2014] [drm:drm_enable_connectors], connector 7 enabled? yes
>[lun may  5 16:58:41 2014] [drm:drm_enable_connectors], connector 13 enabled? yes
>[lun may  5 16:58:41 2014] [drm:drm_enable_connectors], connector 16 enabled? no
>[lun may  5 16:58:41 2014] [drm:drm_enable_connectors], connector 20 enabled? no
>[lun may  5 16:58:41 2014] [drm:drm_target_preferred], looking for cmdline mode on connector 7
>[lun may  5 16:58:41 2014] [drm:drm_target_preferred], looking for preferred mode on connector 7
>[lun may  5 16:58:41 2014] [drm:drm_target_preferred], found mode 1280x800
>[lun may  5 16:58:41 2014] [drm:drm_target_preferred], looking for cmdline mode on connector 13
>[lun may  5 16:58:41 2014] [drm:drm_target_preferred], looking for preferred mode on connector 13
>[lun may  5 16:58:41 2014] [drm:drm_target_preferred], found mode 1366x768
>[lun may  5 16:58:41 2014] [drm:drm_setup_crtcs], picking CRTCs for 8192x8192 config
>[lun may  5 16:58:41 2014] [drm:drm_setup_crtcs], desired mode 1280x800 set on crtc 3
>[lun may  5 16:58:41 2014] [drm:drm_setup_crtcs], desired mode 1366x768 set on crtc 5
>[lun may  5 16:58:41 2014] [drm:i915_gem_object_create_stolen], creating stolen object: size=433000
>[lun may  5 16:58:41 2014] [drm:i915_pages_create_for_stolen], offset=0x40000, size=4403200
>[lun may  5 16:58:41 2014] [drm:intelfb_create], allocated 1366x800 fb: 0x00047000, bo ffff880037495600
>[lun may  5 16:58:41 2014] [drm:intel_crtc_set_config], [CRTC:3] [FB:30] #connectors=1 (x y) (0 0)
>[lun may  5 16:58:41 2014] [drm:intel_set_config_compute_mode_changes], inactive crtc, full mode set
>[lun may  5 16:58:41 2014] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[lun may  5 16:58:41 2014] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[lun may  5 16:58:41 2014] [drm:drm_mode_debug_printmodeline], Modeline 28:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x48 0xa
>[lun may  5 16:58:41 2014] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=0
>[lun may  5 16:58:41 2014] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[lun may  5 16:58:41 2014] [drm:intel_modeset_stage_output_state], [CONNECTOR:13:VGA-1] to [NOCRTC]
>[lun may  5 16:58:41 2014] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[lun may  5 16:58:41 2014] [drm:intel_modeset_stage_output_state], [CONNECTOR:7:LVDS-1] to [CRTC:3]
>[lun may  5 16:58:41 2014] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[lun may  5 16:58:41 2014] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[lun may  5 16:58:41 2014] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[lun may  5 16:58:41 2014] [drm:connected_sink_compute_bpp], [CONNECTOR:7:LVDS-1] checking for sink bpp constrains
>[lun may  5 16:58:41 2014] [drm:intel_lvds_compute_config], forcing display bpp (was 24) to LVDS (18)
>[lun may  5 16:58:41 2014] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe A, lanes 1
>[lun may  5 16:58:41 2014] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 18, dithering: 1
>[lun may  5 16:58:41 2014] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[lun may  5 16:58:41 2014] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[lun may  5 16:58:41 2014] [drm:intel_dump_pipe_config], pipe bpp: 18, dithering: 1
>[lun may  5 16:58:41 2014] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[lun may  5 16:58:41 2014] [drm:intel_dump_pipe_config], requested mode:
>[lun may  5 16:58:41 2014] [drm:drm_mode_debug_printmodeline], Modeline 0:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x48 0xa
>[lun may  5 16:58:41 2014] [drm:intel_dump_pipe_config], adjusted mode:
>[lun may  5 16:58:41 2014] [drm:drm_mode_debug_printmodeline], Modeline 0:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x48 0xa
>[lun may  5 16:58:41 2014] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[lun may  5 16:58:41 2014] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[lun may  5 16:58:41 2014] [drm:intel_dump_pipe_config], ips: 0
>[lun may  5 16:58:41 2014] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[lun may  5 16:58:41 2014] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[lun may  5 16:58:41 2014] [drm:intel_update_fbc], no output, disabling
>[lun may  5 16:58:41 2014] [drm:ironlake_get_refclk], using SSC reference clock of 120 MHz
>[lun may  5 16:58:41 2014] [drm:intel_get_shared_dpll], CRTC:3 dropping existing PCH DPLL A
>[lun may  5 16:58:41 2014] [drm:intel_get_shared_dpll], CRTC:3 using pre-allocated PCH DPLL A
>[lun may  5 16:58:41 2014] [drm:intel_get_shared_dpll], using PCH DPLL A for pipe A
>[lun may  5 16:58:41 2014] [drm:intel_get_shared_dpll], setting up PCH DPLL A
>[lun may  5 16:58:41 2014] [drm:ironlake_update_plane], Writing base 00047000 00000000 0 0 5504
>[lun may  5 16:58:41 2014] [drm:intel_crtc_mode_set], [ENCODER:8:LVDS-8] set [MODE:0:1280x800]
>[lun may  5 16:58:41 2014] [drm:ironlake_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
>[lun may  5 16:58:41 2014] [drm:ironlake_check_srwm], watermark 1: display plane 25, fbc lines 3, cursor 6
>[lun may  5 16:58:41 2014] [drm:ironlake_check_srwm], watermark 2: display plane 78, fbc lines 3, cursor 6
>[lun may  5 16:58:41 2014] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[lun may  5 16:58:41 2014] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[lun may  5 16:58:41 2014] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x700
>[lun may  5 16:58:41 2014] [drm:ironlake_fdi_link_train], FDI train 1 done.
>[lun may  5 16:58:41 2014] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x600
>[lun may  5 16:58:41 2014] [drm:ironlake_fdi_link_train], FDI train 2 done.
>[lun may  5 16:58:41 2014] [drm:ironlake_fdi_link_train], FDI train done
>[lun may  5 16:58:41 2014] [drm:ironlake_enable_shared_dpll], enable PCH DPLL A (active 0, on? 0)for crtc 3
>[lun may  5 16:58:41 2014] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL A
>[lun may  5 16:58:41 2014] [drm:intel_update_fbc], disabled per chip default
>[lun may  5 16:58:41 2014] [drm:intel_panel_actually_set_backlight], set backlight PWM = 4882
>[lun may  5 16:58:41 2014] [drm:intel_connector_check_state], [CONNECTOR:7:LVDS-1]
>[lun may  5 16:58:41 2014] [drm:check_encoder_state], [ENCODER:8:LVDS-8]
>[lun may  5 16:58:41 2014] [drm:check_encoder_state], [ENCODER:14:DAC-14]
>[lun may  5 16:58:41 2014] [drm:check_encoder_state], [ENCODER:15:TMDS-15]
>[lun may  5 16:58:41 2014] [drm:check_encoder_state], [ENCODER:19:TMDS-19]
>[lun may  5 16:58:41 2014] [drm:check_crtc_state], [CRTC:3]
>[lun may  5 16:58:41 2014] [drm:check_crtc_state], [CRTC:5]
>[lun may  5 16:58:41 2014] [drm:check_shared_dpll_state], PCH DPLL A
>[lun may  5 16:58:41 2014] [drm:check_shared_dpll_state], PCH DPLL B
>[lun may  5 16:58:41 2014] [drm:intel_crtc_set_config], [CRTC:5] [FB:30] #connectors=1 (x y) (0 0)
>[lun may  5 16:58:41 2014] [drm:intel_set_config_compute_mode_changes], inactive crtc, full mode set
>[lun may  5 16:58:41 2014] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[lun may  5 16:58:41 2014] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[lun may  5 16:58:41 2014] [drm:drm_mode_debug_printmodeline], Modeline 29:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x48 0x5
>[lun may  5 16:58:41 2014] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=1, fb_changed=0
>[lun may  5 16:58:41 2014] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[lun may  5 16:58:41 2014] [drm:intel_modeset_stage_output_state], [CONNECTOR:7:LVDS-1] to [CRTC:3]
>[lun may  5 16:58:41 2014] [drm:intel_modeset_stage_output_state], [CONNECTOR:13:VGA-1] to [CRTC:5]
>[lun may  5 16:58:41 2014] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[lun may  5 16:58:41 2014] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[lun may  5 16:58:41 2014] [drm:connected_sink_compute_bpp], [CONNECTOR:13:VGA-1] checking for sink bpp constrains
>[lun may  5 16:58:41 2014] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe B, lanes 1
>[lun may  5 16:58:41 2014] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[lun may  5 16:58:41 2014] [drm:intel_dump_pipe_config], [CRTC:5][modeset] config for pipe B
>[lun may  5 16:58:41 2014] [drm:intel_dump_pipe_config], cpu_transcoder: B
>[lun may  5 16:58:41 2014] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[lun may  5 16:58:41 2014] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 1, gmch_m: 3984588, gmch_n: 4194304, link_m: 166024, link_n: 524288, tu: 64
>[lun may  5 16:58:41 2014] [drm:intel_dump_pipe_config], requested mode:
>[lun may  5 16:58:41 2014] [drm:drm_mode_debug_printmodeline], Modeline 0:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x48 0x5
>[lun may  5 16:58:41 2014] [drm:intel_dump_pipe_config], adjusted mode:
>[lun may  5 16:58:41 2014] [drm:drm_mode_debug_printmodeline], Modeline 0:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x48 0x5
>[lun may  5 16:58:41 2014] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[lun may  5 16:58:41 2014] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[lun may  5 16:58:41 2014] [drm:intel_dump_pipe_config], ips: 0
>[lun may  5 16:58:41 2014] [drm:intel_get_shared_dpll], CRTC:5 using pre-allocated PCH DPLL B
>[lun may  5 16:58:41 2014] [drm:intel_get_shared_dpll], using PCH DPLL B for pipe B
>[lun may  5 16:58:41 2014] [drm:intel_get_shared_dpll], setting up PCH DPLL B
>[lun may  5 16:58:41 2014] [drm:ironlake_update_plane], Writing base 00047000 00000000 0 0 5504
>[lun may  5 16:58:41 2014] [drm:ironlake_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
>[lun may  5 16:58:41 2014] [drm:ironlake_check_srwm], watermark 1: display plane 25, fbc lines 3, cursor 6
>[lun may  5 16:58:41 2014] [drm:ironlake_check_srwm], watermark 2: display plane 78, fbc lines 3, cursor 6
>[lun may  5 16:58:41 2014] [drm:intel_crtc_mode_set], [ENCODER:14:DAC-14] set [MODE:0:1366x768]
>[lun may  5 16:58:41 2014] [drm:ironlake_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
>[lun may  5 16:58:41 2014] [drm:ironlake_update_wm], FIFO watermarks For pipe B - plane 6, cursor: 6
>[lun may  5 16:58:41 2014] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[lun may  5 16:58:41 2014] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[lun may  5 16:58:41 2014] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x100
>[lun may  5 16:58:41 2014] [drm:ironlake_fdi_link_train], FDI train 1 done.
>[lun may  5 16:58:41 2014] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x600
>[lun may  5 16:58:41 2014] [drm:ironlake_fdi_link_train], FDI train 2 done.
>[lun may  5 16:58:41 2014] [drm:ironlake_fdi_link_train], FDI train done
>[lun may  5 16:58:41 2014] [drm:ironlake_enable_shared_dpll], enable PCH DPLL B (active 0, on? 0)for crtc 5
>[lun may  5 16:58:41 2014] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL B
>[lun may  5 16:58:41 2014] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[lun may  5 16:58:41 2014] [drm:intel_connector_check_state], [CONNECTOR:7:LVDS-1]
>[lun may  5 16:58:41 2014] [drm:intel_connector_check_state], [CONNECTOR:13:VGA-1]
>[lun may  5 16:58:41 2014] [drm:check_encoder_state], [ENCODER:8:LVDS-8]
>[lun may  5 16:58:41 2014] [drm:check_encoder_state], [ENCODER:14:DAC-14]
>[lun may  5 16:58:41 2014] [drm:check_encoder_state], [ENCODER:15:TMDS-15]
>[lun may  5 16:58:41 2014] [drm:check_encoder_state], [ENCODER:19:TMDS-19]
>[lun may  5 16:58:41 2014] [drm:check_crtc_state], [CRTC:3]
>[lun may  5 16:58:41 2014] [drm:check_crtc_state], [CRTC:5]
>[lun may  5 16:58:41 2014] [drm:check_shared_dpll_state], PCH DPLL A
>[lun may  5 16:58:41 2014] [drm:check_shared_dpll_state], PCH DPLL B
>[lun may  5 16:58:41 2014] [drm:intel_crtc_set_config], [CRTC:3] [FB:30] #connectors=1 (x y) (0 0)
>[lun may  5 16:58:41 2014] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[lun may  5 16:58:41 2014] [drm:intel_modeset_stage_output_state], [CONNECTOR:7:LVDS-1] to [CRTC:3]
>[lun may  5 16:58:41 2014] [drm:intel_modeset_stage_output_state], [CONNECTOR:13:VGA-1] to [CRTC:5]
>[lun may  5 16:58:41 2014] [drm:intel_crtc_set_config], [CRTC:5] [FB:30] #connectors=1 (x y) (0 0)
>[lun may  5 16:58:41 2014] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[lun may  5 16:58:41 2014] [drm:intel_modeset_stage_output_state], [CONNECTOR:7:LVDS-1] to [CRTC:3]
>[lun may  5 16:58:41 2014] [drm:intel_modeset_stage_output_state], [CONNECTOR:13:VGA-1] to [CRTC:5]
>[lun may  5 16:58:41 2014] [drm:asle_set_backlight], bclp = 0x80000059
>[lun may  5 16:58:41 2014] [drm:intel_panel_get_max_backlight], max backlight PWM = 4882
>[lun may  5 16:58:41 2014] [drm:intel_panel_actually_set_backlight], set backlight PWM = 1691
>[lun may  5 16:58:41 2014] [drm:asle_set_backlight], bclp = 0x800000ff
>[lun may  5 16:58:41 2014] [drm:intel_panel_get_max_backlight], max backlight PWM = 4882
>[lun may  5 16:58:41 2014] [drm:intel_panel_actually_set_backlight], set backlight PWM = 4845
>[lun may  5 16:58:41 2014] mei_me 0000:00:16.0: setting latency timer to 64
>[lun may  5 16:58:41 2014] mei_me 0000:00:16.0: irq 46 for MSI/MSI-X
>[lun may  5 16:58:41 2014] r8169 0000:07:00.0: irq 47 for MSI/MSI-X
>[lun may  5 16:58:41 2014] ath: EEPROM regdomain: 0x65
>[lun may  5 16:58:41 2014] ath: EEPROM indicates we should expect a direct regpair map
>[lun may  5 16:58:41 2014] ath: Country alpha2 being used: 00
>[lun may  5 16:58:41 2014] ath: Regpair used: 0x65
>[lun may  5 16:58:41 2014] ieee80211 phy0: Failed to initialize wep: -2
>[lun may  5 16:58:41 2014] ieee80211 phy0: Selected rate control algorithm 'minstrel_ht'
>[lun may  5 16:58:41 2014] ehci-pci 0000:00:1a.0: setting latency timer to 64
>[lun may  5 16:58:41 2014] ehci-pci 0000:00:1a.0: cache line size of 64 is not supported
>[lun may  5 16:58:41 2014] ehci-pci 0000:00:1d.0: setting latency timer to 64
>[lun may  5 16:58:41 2014] ehci-pci 0000:00:1d.0: cache line size of 64 is not supported
>[lun may  5 16:58:41 2014] snd_hda_intel 0000:00:1b.0: irq 48 for MSI/MSI-X
>[lun may  5 16:58:50 2014] [drm:asle_set_backlight], bclp = 0x800000ff
>[lun may  5 16:58:50 2014] [drm:intel_panel_get_max_backlight], max backlight PWM = 4882
>[lun may  5 16:58:50 2014] [drm:intel_panel_actually_set_backlight], set backlight PWM = 4845
>[lun may  5 16:59:06 2014] [drm:i915_driver_open], 
>[lun may  5 16:59:06 2014] [drm:intel_crtc_cursor_set], cursor off
>[lun may  5 16:59:06 2014] [drm:intel_crtc_set_config], [CRTC:3] [FB:30] #connectors=1 (x y) (0 0)
>[lun may  5 16:59:06 2014] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[lun may  5 16:59:06 2014] [drm:intel_modeset_stage_output_state], [CONNECTOR:7:LVDS-1] to [CRTC:3]
>[lun may  5 16:59:06 2014] [drm:intel_modeset_stage_output_state], [CONNECTOR:13:VGA-1] to [CRTC:5]
>[lun may  5 16:59:06 2014] [drm:intel_crtc_cursor_set], cursor off
>[lun may  5 16:59:06 2014] [drm:intel_crtc_set_config], [CRTC:5] [FB:30] #connectors=1 (x y) (0 0)
>[lun may  5 16:59:06 2014] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[lun may  5 16:59:06 2014] [drm:intel_modeset_stage_output_state], [CONNECTOR:7:LVDS-1] to [CRTC:3]
>[lun may  5 16:59:06 2014] [drm:intel_modeset_stage_output_state], [CONNECTOR:13:VGA-1] to [CRTC:5]
>[lun may  5 16:59:09 2014] [drm:i915_driver_open], 
>[lun may  5 16:59:09 2014] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[4] ENCODERS[4]
>[lun may  5 16:59:09 2014] [drm:drm_mode_addfb], [FB:31]
>[lun may  5 16:59:09 2014] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[4] ENCODERS[4]
>[lun may  5 16:59:09 2014] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[4] ENCODERS[4]
>[lun may  5 16:59:09 2014] [drm:drm_mode_getconnector], [CONNECTOR:7:?]
>[lun may  5 16:59:09 2014] [drm:drm_mode_getconnector], [CONNECTOR:7:?]
>[lun may  5 16:59:09 2014] [drm:drm_mode_getconnector], [CONNECTOR:13:?]
>[lun may  5 16:59:09 2014] [drm:drm_mode_getconnector], [CONNECTOR:13:?]
>[lun may  5 16:59:09 2014] [drm:drm_mode_getconnector], [CONNECTOR:16:?]
>[lun may  5 16:59:09 2014] [drm:drm_mode_getconnector], [CONNECTOR:16:?]
>[lun may  5 16:59:09 2014] [drm:drm_mode_getconnector], [CONNECTOR:20:?]
>[lun may  5 16:59:09 2014] [drm:drm_mode_getconnector], [CONNECTOR:20:?]
>[lun may  5 16:59:09 2014] [drm:drm_mode_getconnector], [CONNECTOR:7:?]
>[lun may  5 16:59:09 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1]
>[lun may  5 16:59:09 2014] [drm:intel_lvds_detect], [CONNECTOR:7:LVDS-1]
>[lun may  5 16:59:09 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1] probed modes :
>[lun may  5 16:59:09 2014] [drm:drm_mode_debug_printmodeline], Modeline 10:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x48 0xa
>[lun may  5 16:59:09 2014] [drm:drm_mode_getconnector], [CONNECTOR:7:?]
>[lun may  5 16:59:09 2014] [drm:drm_mode_getconnector], [CONNECTOR:13:?]
>[lun may  5 16:59:09 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:VGA-1]
>[lun may  5 16:59:09 2014] [drm:intel_crt_detect], [CONNECTOR:13:VGA-1] force=1
>[lun may  5 16:59:09 2014] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0xc3f40018, result 1
>[lun may  5 16:59:09 2014] [drm:intel_crt_detect], CRT detected via hotplug
>[lun may  5 16:59:09 2014] [drm:drm_edid_to_eld], ELD: no CEA Extension found
>[lun may  5 16:59:09 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:VGA-1] probed modes :
>[lun may  5 16:59:09 2014] [drm:drm_mode_debug_printmodeline], Modeline 22:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x48 0x5
>[lun may  5 16:59:09 2014] [drm:drm_mode_debug_printmodeline], Modeline 23:"1280x720" 60 74440 1280 1336 1472 1664 720 721 724 746 0x0 0x6
>[lun may  5 16:59:09 2014] [drm:drm_mode_debug_printmodeline], Modeline 24:"1152x720" 60 67282 1152 1208 1328 1504 720 721 724 746 0x0 0x6
>[lun may  5 16:59:09 2014] [drm:drm_mode_debug_printmodeline], Modeline 27:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[lun may  5 16:59:09 2014] [drm:drm_mode_debug_printmodeline], Modeline 25:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[lun may  5 16:59:09 2014] [drm:drm_mode_debug_printmodeline], Modeline 26:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[lun may  5 16:59:09 2014] [drm:drm_mode_getconnector], [CONNECTOR:13:?]
>[lun may  5 16:59:09 2014] [drm:drm_mode_getconnector], [CONNECTOR:16:?]
>[lun may  5 16:59:09 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:16:HDMI-A-1]
>[lun may  5 16:59:09 2014] [drm:intel_hdmi_detect], [CONNECTOR:16:HDMI-A-1]
>[lun may  5 16:59:09 2014] [drm:gmbus_xfer], GMBUS [i915 gmbus dpd] NAK for addr: 0050 r(1)
>[lun may  5 16:59:09 2014] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpd
>[lun may  5 16:59:09 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:16:HDMI-A-1] disconnected
>[lun may  5 16:59:09 2014] [drm:drm_mode_getconnector], [CONNECTOR:20:?]
>[lun may  5 16:59:09 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:20:DP-1]
>[lun may  5 16:59:09 2014] [drm:intel_dp_detect], [CONNECTOR:20:DP-1]
>[lun may  5 16:59:09 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:20:DP-1] disconnected
>[lun may  5 16:59:09 2014] [drm:drm_mode_addfb], [FB:31]
>[lun may  5 16:59:09 2014] [drm:drm_mode_setcrtc], [CRTC:3]
>[lun may  5 16:59:09 2014] [drm:drm_mode_setcrtc], [CONNECTOR:7:LVDS-1]
>[lun may  5 16:59:09 2014] [drm:intel_crtc_set_config], [CRTC:3] [FB:31] #connectors=1 (x y) (0 0)
>[lun may  5 16:59:09 2014] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=1
>[lun may  5 16:59:09 2014] [drm:intel_modeset_stage_output_state], [CONNECTOR:7:LVDS-1] to [CRTC:3]
>[lun may  5 16:59:09 2014] [drm:intel_modeset_stage_output_state], [CONNECTOR:13:VGA-1] to [CRTC:5]
>[lun may  5 16:59:09 2014] [drm:ironlake_update_plane], Writing base 0049A000 00000000 0 0 10240
>[lun may  5 16:59:09 2014] [drm:asle_set_backlight], bclp = 0x800000ff
>[lun may  5 16:59:09 2014] [drm:intel_panel_get_max_backlight], max backlight PWM = 4882
>[lun may  5 16:59:09 2014] [drm:intel_panel_actually_set_backlight], set backlight PWM = 4845
>[lun may  5 16:59:09 2014] [drm:drm_mode_setcrtc], [CRTC:5]
>[lun may  5 16:59:09 2014] [drm:drm_mode_setcrtc], [CONNECTOR:13:VGA-1]
>[lun may  5 16:59:09 2014] [drm:intel_crtc_set_config], [CRTC:5] [FB:31] #connectors=1 (x y) (1280 0)
>[lun may  5 16:59:09 2014] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[lun may  5 16:59:09 2014] [drm:drm_mode_debug_printmodeline], Modeline 29:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x48 0x5
>[lun may  5 16:59:09 2014] [drm:drm_mode_debug_printmodeline], Modeline 32:"" 0 74440 1280 1336 1472 1664 720 721 724 746 0x0 0x6
>[lun may  5 16:59:09 2014] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=1, fb_changed=1
>[lun may  5 16:59:09 2014] [drm:intel_modeset_stage_output_state], [CONNECTOR:7:LVDS-1] to [CRTC:3]
>[lun may  5 16:59:09 2014] [drm:intel_modeset_stage_output_state], [CONNECTOR:13:VGA-1] to [CRTC:5]
>[lun may  5 16:59:09 2014] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[lun may  5 16:59:09 2014] [drm:connected_sink_compute_bpp], [CONNECTOR:13:VGA-1] checking for sink bpp constrains
>[lun may  5 16:59:09 2014] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe B, lanes 1
>[lun may  5 16:59:09 2014] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[lun may  5 16:59:09 2014] [drm:intel_dump_pipe_config], [CRTC:5][modeset] config for pipe B
>[lun may  5 16:59:09 2014] [drm:intel_dump_pipe_config], cpu_transcoder: B
>[lun may  5 16:59:09 2014] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[lun may  5 16:59:09 2014] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 1, gmch_m: 3469155, gmch_n: 4194304, link_m: 144548, link_n: 524288, tu: 64
>[lun may  5 16:59:09 2014] [drm:intel_dump_pipe_config], requested mode:
>[lun may  5 16:59:09 2014] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 74440 1280 1336 1472 1664 720 721 724 746 0x0 0x6
>[lun may  5 16:59:09 2014] [drm:intel_dump_pipe_config], adjusted mode:
>[lun may  5 16:59:09 2014] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 74440 1280 1336 1472 1664 720 721 724 746 0x0 0x6
>[lun may  5 16:59:09 2014] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[lun may  5 16:59:09 2014] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[lun may  5 16:59:09 2014] [drm:intel_dump_pipe_config], ips: 0
>[lun may  5 16:59:09 2014] [drm:intel_disable_shared_dpll], disable PCH DPLL B (active 1, on? 1) for crtc 5
>[lun may  5 16:59:09 2014] [drm:intel_disable_shared_dpll], disabling PCH DPLL B
>[lun may  5 16:59:09 2014] [drm:ironlake_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
>[lun may  5 16:59:09 2014] [drm:ironlake_check_srwm], watermark 1: display plane 25, fbc lines 3, cursor 6
>[lun may  5 16:59:09 2014] [drm:ironlake_check_srwm], watermark 2: display plane 78, fbc lines 3, cursor 6
>[lun may  5 16:59:09 2014] [drm:intel_update_fbc], disabled per chip default
>[lun may  5 16:59:09 2014] [drm:intel_get_shared_dpll], CRTC:5 dropping existing PCH DPLL B
>[lun may  5 16:59:09 2014] [drm:intel_get_shared_dpll], CRTC:5 using pre-allocated PCH DPLL B
>[lun may  5 16:59:09 2014] [drm:intel_get_shared_dpll], using PCH DPLL B for pipe B
>[lun may  5 16:59:09 2014] [drm:intel_get_shared_dpll], setting up PCH DPLL B
>[lun may  5 16:59:09 2014] [drm:ironlake_update_plane], Writing base 0049A000 FFFFFFFFFFFF7400 0 0 10240
>[lun may  5 16:59:09 2014] [drm:ironlake_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
>[lun may  5 16:59:09 2014] [drm:ironlake_check_srwm], watermark 1: display plane 25, fbc lines 3, cursor 6
>[lun may  5 16:59:09 2014] [drm:ironlake_check_srwm], watermark 2: display plane 78, fbc lines 3, cursor 6
>[lun may  5 16:59:09 2014] [drm:intel_crtc_mode_set], [ENCODER:14:DAC-14] set [MODE:0:]
>[lun may  5 16:59:09 2014] [drm:ironlake_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
>[lun may  5 16:59:09 2014] [drm:ironlake_update_wm], FIFO watermarks For pipe B - plane 6, cursor: 6
>[lun may  5 16:59:09 2014] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[lun may  5 16:59:09 2014] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[lun may  5 16:59:09 2014] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x100
>[lun may  5 16:59:09 2014] [drm:ironlake_fdi_link_train], FDI train 1 done.
>[lun may  5 16:59:09 2014] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x600
>[lun may  5 16:59:09 2014] [drm:ironlake_fdi_link_train], FDI train 2 done.
>[lun may  5 16:59:09 2014] [drm:ironlake_fdi_link_train], FDI train done
>[lun may  5 16:59:09 2014] [drm:ironlake_enable_shared_dpll], enable PCH DPLL B (active 0, on? 0)for crtc 5
>[lun may  5 16:59:09 2014] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL B
>[lun may  5 16:59:09 2014] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[lun may  5 16:59:09 2014] [drm:intel_connector_check_state], [CONNECTOR:7:LVDS-1]
>[lun may  5 16:59:09 2014] [drm:intel_connector_check_state], [CONNECTOR:13:VGA-1]
>[lun may  5 16:59:09 2014] [drm:check_encoder_state], [ENCODER:8:LVDS-8]
>[lun may  5 16:59:09 2014] [drm:check_encoder_state], [ENCODER:14:DAC-14]
>[lun may  5 16:59:09 2014] [drm:check_encoder_state], [ENCODER:15:TMDS-15]
>[lun may  5 16:59:09 2014] [drm:check_encoder_state], [ENCODER:19:TMDS-19]
>[lun may  5 16:59:09 2014] [drm:check_crtc_state], [CRTC:3]
>[lun may  5 16:59:09 2014] [drm:check_crtc_state], [CRTC:5]
>[lun may  5 16:59:09 2014] [drm:check_shared_dpll_state], PCH DPLL A
>[lun may  5 16:59:09 2014] [drm:check_shared_dpll_state], PCH DPLL B
>[lun may  5 16:59:52 2014] [drm:intel_crtc_cursor_set], cursor off
>[lun may  5 16:59:53 2014] [drm:intel_crtc_cursor_set], cursor off
>[lun may  5 17:00:04 2014] [drm:intel_crtc_cursor_set], cursor off
>[lun may  5 17:00:23 2014] [drm:drm_mode_getconnector], [CONNECTOR:7:?]
>[lun may  5 17:00:23 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1]
>[lun may  5 17:00:23 2014] [drm:intel_lvds_detect], [CONNECTOR:7:LVDS-1]
>[lun may  5 17:00:23 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1] probed modes :
>[lun may  5 17:00:23 2014] [drm:drm_mode_debug_printmodeline], Modeline 10:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x48 0xa
>[lun may  5 17:00:23 2014] [drm:drm_mode_getconnector], [CONNECTOR:7:?]
>[lun may  5 17:00:23 2014] [drm:drm_mode_getconnector], [CONNECTOR:13:?]
>[lun may  5 17:00:23 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:VGA-1]
>[lun may  5 17:00:23 2014] [drm:intel_crt_detect], [CONNECTOR:13:VGA-1] force=1
>[lun may  5 17:00:23 2014] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0xc3f40010, result 1
>[lun may  5 17:00:23 2014] [drm:intel_crt_detect], CRT detected via hotplug
>[lun may  5 17:00:23 2014] [drm:drm_edid_to_eld], ELD: no CEA Extension found
>[lun may  5 17:00:23 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:VGA-1] probed modes :
>[lun may  5 17:00:23 2014] [drm:drm_mode_debug_printmodeline], Modeline 22:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x48 0x5
>[lun may  5 17:00:23 2014] [drm:drm_mode_debug_printmodeline], Modeline 23:"1280x720" 60 74440 1280 1336 1472 1664 720 721 724 746 0x0 0x6
>[lun may  5 17:00:23 2014] [drm:drm_mode_debug_printmodeline], Modeline 24:"1152x720" 60 67282 1152 1208 1328 1504 720 721 724 746 0x0 0x6
>[lun may  5 17:00:23 2014] [drm:drm_mode_debug_printmodeline], Modeline 27:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[lun may  5 17:00:23 2014] [drm:drm_mode_debug_printmodeline], Modeline 25:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[lun may  5 17:00:23 2014] [drm:drm_mode_debug_printmodeline], Modeline 26:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[lun may  5 17:00:23 2014] [drm:drm_mode_getconnector], [CONNECTOR:13:?]
>[lun may  5 17:00:23 2014] [drm:drm_mode_getconnector], [CONNECTOR:16:?]
>[lun may  5 17:00:23 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:16:HDMI-A-1]
>[lun may  5 17:00:23 2014] [drm:intel_hdmi_detect], [CONNECTOR:16:HDMI-A-1]
>[lun may  5 17:00:23 2014] [drm:gmbus_xfer], GMBUS [i915 gmbus dpd] NAK for addr: 0050 r(1)
>[lun may  5 17:00:23 2014] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpd
>[lun may  5 17:00:23 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:16:HDMI-A-1] disconnected
>[lun may  5 17:00:23 2014] [drm:drm_mode_getconnector], [CONNECTOR:20:?]
>[lun may  5 17:00:23 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:20:DP-1]
>[lun may  5 17:00:23 2014] [drm:intel_dp_detect], [CONNECTOR:20:DP-1]
>[lun may  5 17:00:23 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:20:DP-1] disconnected
>[lun may  5 17:00:23 2014] [drm:drm_mode_getconnector], [CONNECTOR:7:?]
>[lun may  5 17:00:23 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1]
>[lun may  5 17:00:23 2014] [drm:intel_lvds_detect], [CONNECTOR:7:LVDS-1]
>[lun may  5 17:00:23 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1] probed modes :
>[lun may  5 17:00:23 2014] [drm:drm_mode_debug_printmodeline], Modeline 10:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x48 0xa
>[lun may  5 17:00:23 2014] [drm:drm_mode_getconnector], [CONNECTOR:7:?]
>[lun may  5 17:00:23 2014] [drm:drm_mode_getconnector], [CONNECTOR:13:?]
>[lun may  5 17:00:23 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:VGA-1]
>[lun may  5 17:00:23 2014] [drm:intel_crt_detect], [CONNECTOR:13:VGA-1] force=1
>[lun may  5 17:00:23 2014] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0xc3f40010, result 1
>[lun may  5 17:00:23 2014] [drm:intel_crt_detect], CRT detected via hotplug
>[lun may  5 17:00:23 2014] [drm:drm_edid_to_eld], ELD: no CEA Extension found
>[lun may  5 17:00:23 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:VGA-1] probed modes :
>[lun may  5 17:00:23 2014] [drm:drm_mode_debug_printmodeline], Modeline 22:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x48 0x5
>[lun may  5 17:00:23 2014] [drm:drm_mode_debug_printmodeline], Modeline 23:"1280x720" 60 74440 1280 1336 1472 1664 720 721 724 746 0x0 0x6
>[lun may  5 17:00:23 2014] [drm:drm_mode_debug_printmodeline], Modeline 24:"1152x720" 60 67282 1152 1208 1328 1504 720 721 724 746 0x0 0x6
>[lun may  5 17:00:23 2014] [drm:drm_mode_debug_printmodeline], Modeline 27:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[lun may  5 17:00:23 2014] [drm:drm_mode_debug_printmodeline], Modeline 25:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[lun may  5 17:00:23 2014] [drm:drm_mode_debug_printmodeline], Modeline 26:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[lun may  5 17:00:23 2014] [drm:drm_mode_getconnector], [CONNECTOR:13:?]
>[lun may  5 17:00:23 2014] [drm:drm_mode_getconnector], [CONNECTOR:16:?]
>[lun may  5 17:00:23 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:16:HDMI-A-1]
>[lun may  5 17:00:23 2014] [drm:intel_hdmi_detect], [CONNECTOR:16:HDMI-A-1]
>[lun may  5 17:00:23 2014] [drm:gmbus_xfer], GMBUS [i915 gmbus dpd] NAK for addr: 0050 r(1)
>[lun may  5 17:00:23 2014] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpd
>[lun may  5 17:00:23 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:16:HDMI-A-1] disconnected
>[lun may  5 17:00:23 2014] [drm:drm_mode_getconnector], [CONNECTOR:20:?]
>[lun may  5 17:00:23 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:20:DP-1]
>[lun may  5 17:00:23 2014] [drm:intel_dp_detect], [CONNECTOR:20:DP-1]
>[lun may  5 17:00:23 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:20:DP-1] disconnected
>[lun may  5 17:00:30 2014] [drm:drm_mode_getconnector], [CONNECTOR:7:?]
>[lun may  5 17:00:30 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1]
>[lun may  5 17:00:30 2014] [drm:intel_lvds_detect], [CONNECTOR:7:LVDS-1]
>[lun may  5 17:00:30 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1] probed modes :
>[lun may  5 17:00:30 2014] [drm:drm_mode_debug_printmodeline], Modeline 10:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x48 0xa
>[lun may  5 17:00:30 2014] [drm:drm_mode_getconnector], [CONNECTOR:7:?]
>[lun may  5 17:00:30 2014] [drm:drm_mode_getconnector], [CONNECTOR:13:?]
>[lun may  5 17:00:30 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:VGA-1]
>[lun may  5 17:00:30 2014] [drm:intel_crt_detect], [CONNECTOR:13:VGA-1] force=1
>[lun may  5 17:00:30 2014] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0xc3f40010, result 1
>[lun may  5 17:00:30 2014] [drm:intel_crt_detect], CRT detected via hotplug
>[lun may  5 17:00:30 2014] [drm:drm_edid_to_eld], ELD: no CEA Extension found
>[lun may  5 17:00:30 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:13:VGA-1] probed modes :
>[lun may  5 17:00:30 2014] [drm:drm_mode_debug_printmodeline], Modeline 22:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x48 0x5
>[lun may  5 17:00:30 2014] [drm:drm_mode_debug_printmodeline], Modeline 23:"1280x720" 60 74440 1280 1336 1472 1664 720 721 724 746 0x0 0x6
>[lun may  5 17:00:30 2014] [drm:drm_mode_debug_printmodeline], Modeline 24:"1152x720" 60 67282 1152 1208 1328 1504 720 721 724 746 0x0 0x6
>[lun may  5 17:00:30 2014] [drm:drm_mode_debug_printmodeline], Modeline 27:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[lun may  5 17:00:30 2014] [drm:drm_mode_debug_printmodeline], Modeline 25:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[lun may  5 17:00:30 2014] [drm:drm_mode_debug_printmodeline], Modeline 26:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[lun may  5 17:00:30 2014] [drm:drm_mode_getconnector], [CONNECTOR:13:?]
>[lun may  5 17:00:30 2014] [drm:drm_mode_getconnector], [CONNECTOR:16:?]
>[lun may  5 17:00:30 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:16:HDMI-A-1]
>[lun may  5 17:00:30 2014] [drm:intel_hdmi_detect], [CONNECTOR:16:HDMI-A-1]
>[lun may  5 17:00:30 2014] [drm:gmbus_xfer], GMBUS [i915 gmbus dpd] NAK for addr: 0050 r(1)
>[lun may  5 17:00:30 2014] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpd
>[lun may  5 17:00:30 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:16:HDMI-A-1] disconnected
>[lun may  5 17:00:30 2014] [drm:drm_mode_getconnector], [CONNECTOR:20:?]
>[lun may  5 17:00:30 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:20:DP-1]
>[lun may  5 17:00:30 2014] [drm:intel_dp_detect], [CONNECTOR:20:DP-1]
>[lun may  5 17:00:30 2014] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:20:DP-1] disconnected
>[lun may  5 17:04:28 2014] [drm:intel_crtc_cursor_set], cursor off
>[lun may  5 17:06:08 2014] [drm:i915_driver_open], 
>[lun may  5 17:06:08 2014] [drm:intel_crtc_cursor_set], cursor off
>[lun may  5 17:06:18 2014] [drm:intel_crtc_cursor_set], cursor off
>[lun may  5 17:06:19 2014] [drm:intel_crtc_cursor_set], cursor off
>[lun may  5 17:06:21 2014] [drm:intel_crtc_cursor_set], cursor off
>[lun may  5 17:06:38 2014] [drm:intel_crtc_cursor_set], cursor off
>[lun may  5 17:06:41 2014] [drm:drm_mode_setcrtc], [CRTC:3]
>[lun may  5 17:06:41 2014] [drm:drm_mode_setcrtc], [CONNECTOR:7:LVDS-1]
>[lun may  5 17:06:41 2014] [drm:intel_crtc_set_config], [CRTC:3] [FB:31] #connectors=1 (x y) (0 0)
>[lun may  5 17:06:41 2014] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[lun may  5 17:06:41 2014] [drm:intel_modeset_stage_output_state], [CONNECTOR:7:LVDS-1] to [CRTC:3]
>[lun may  5 17:06:41 2014] [drm:intel_modeset_stage_output_state], [CONNECTOR:13:VGA-1] to [CRTC:5]
>[lun may  5 17:09:58 2014] [drm:drm_mode_setcrtc], [CRTC:3]
>[lun may  5 17:09:58 2014] [drm:drm_mode_setcrtc], [CONNECTOR:7:LVDS-1]
>[lun may  5 17:09:58 2014] [drm:intel_crtc_set_config], [CRTC:3] [FB:31] #connectors=1 (x y) (0 0)
>[lun may  5 17:09:58 2014] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[lun may  5 17:09:58 2014] [drm:intel_modeset_stage_output_state], [CONNECTOR:7:LVDS-1] to [CRTC:3]
>[lun may  5 17:09:58 2014] [drm:intel_modeset_stage_output_state], [CONNECTOR:13:VGA-1] to [CRTC:5]

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Attachments on bug 55746: 68235 | 68236 | 98522 | 98523 | 98524 | 98525 | 98526

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