Attachment 99053 Details for Bug 77297 – dmesg

dmesg

intel_display.dmesg (text/plain), 125.63 KB, created by Guo Jinxian on 2014-05-15 03:24:00 UTC

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Creator: Guo Jinxian

Created: 2014-05-15 03:24:00 UTC

Size: 125.63 KB

patch

obsolete

>[  852.798854] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=1, fb_changed=1
>[  852.798860] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:DP-1] to [CRTC:5]
>[  852.798868] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  852.798876] [drm:connected_sink_compute_bpp] [CONNECTOR:24:DP-1] checking for sink bpp constrains
>[  852.798884] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 74176KHz
>[  852.798891] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 24
>[  852.798895] [drm:intel_dp_compute_config] DP link bw required 178023 available 216000
>[  852.798903] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 1
>[  852.798908] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  852.798914] [drm:intel_dump_pipe_config] [CRTC:5][modeset] config for pipe A
>[  852.798917] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  852.798922] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  852.798929] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 1, gmch_m: 3456852, gmch_n: 4194304, link_m: 144035, link_n: 524288, tu: 64
>[  852.798937] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3456852, gmch_n: 4194304, link_m: 144035, link_n: 524288, tu: 64
>[  852.798941] [drm:intel_dump_pipe_config] requested mode:
>[  852.798949] [drm:drm_mode_debug_printmodeline] Modeline 0:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  852.798994] [drm:intel_dump_pipe_config] adjusted mode:
>[  852.799001] [drm:drm_mode_debug_printmodeline] Modeline 0:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  852.799007] [drm:intel_dump_crtc_timings] crtc timings: 74176 1280 1390 1430 1650 720 725 730 750, type: 0x40 flags: 0x5
>[  852.799010] [drm:intel_dump_pipe_config] port clock: 270000
>[  852.799013] [drm:intel_dump_pipe_config] pipe src size: 1280x720
>[  852.799017] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  852.799021] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  852.799024] [drm:intel_dump_pipe_config] ips: 0
>[  852.799027] [drm:intel_dump_pipe_config] double wide: 0
>[  852.810311] [drm:intel_dp_link_down] 
>[  852.913222] ------------[ cut here ]------------
>[  852.913269] WARNING: CPU: 2 PID: 4013 at drivers/gpu/drm/i915/intel_display.c:944 intel_wait_for_pipe_off+0x12e/0x135 [i915]()
>[  852.913273] pipe_off wait timed out
>[  852.913275] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt snd_hda_codec_generic iTCO_wdt iTCO_vendor_support ppdev dcdbas snd_hda_intel snd_hda_controller pcspkr snd_hda_codec i2c_i801 snd_hwdep snd_pcm lpc_ich mfd_core snd_timer firewire_ohci snd firewire_core crc_itu_t soundcore wmi battery tpm_tis tpm parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  852.913318] CPU: 2 PID: 4013 Comm: testdisplay Tainted: G        W     3.15.0-rc3_drm-intel-nightly_2be456_20140514+ #2598
>[  852.913321] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  852.913324]  00000000 c16a5021 f4993ccc c102cf1b f8569f80 c2858000 00070008 00086d59
>[  852.913332]  f6175db4 c102cf96 00000009 f4993ccc f85acdb9 f4993ce4 f8569f80 f85ab5ab
>[  852.913340]  000003b0 f85acdb9 c2858000 f6175db8 f5bfc000 f856f6da f4993d00 f804c166
>[  852.913348] Call Trace:
>[  852.913357]  [<c16a5021>] ? dump_stack+0x3e/0x4e
>[  852.913366]  [<c102cf1b>] ? warn_slowpath_common+0x61/0x74
>[  852.913397]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  852.913404]  [<c102cf96>] ? warn_slowpath_fmt+0x29/0x2d
>[  852.913435]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  852.913467]  [<f856f6da>] ? ironlake_crtc_disable+0x85/0x713 [i915]
>[  852.913484]  [<f804c166>] ? drm_ut_debug_printk+0x2c/0x30 [drm]
>[  852.913516]  [<f85658f5>] ? intel_dump_pipe_config+0x29a/0x29f [i915]
>[  852.913547]  [<f85714fa>] ? __intel_set_mode+0xbe7/0xffd [i915]
>[  852.913553]  [<c105c80d>] ? console_unlock+0x309/0x33d
>[  852.913558]  [<c105c503>] ? wake_up_klogd+0x25/0x26
>[  852.913589]  [<f85731e2>] ? intel_set_mode+0x11/0x25 [i915]
>[  852.913620]  [<f8573c39>] ? intel_crtc_set_config+0x646/0x8f1 [i915]
>[  852.913627]  [<c16a2531>] ? printk+0x16/0x1a
>[  852.913644]  [<f80500e0>] ? drm_mode_set_config_internal+0x39/0x8a [drm]
>[  852.913660]  [<f8052685>] ? drm_mode_setcrtc+0x37e/0x408 [drm]
>[  852.913676]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  852.913689]  [<f80488b3>] ? drm_ioctl+0x22e/0x35f [drm]
>[  852.913705]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  852.913719]  [<f8048685>] ? drm_copy_field+0x47/0x47 [drm]
>[  852.913727]  [<c10c92f9>] ? do_vfs_ioctl+0x3fa/0x444
>[  852.913732]  [<c16a7ae6>] ? __schedule+0x597/0x6bb
>[  852.913738]  [<c10bcd7a>] ? vfs_write+0xf8/0x157
>[  852.913744]  [<c10c9385>] ? SyS_ioctl+0x42/0x6d
>[  852.913750]  [<c16adeac>] ? sysenter_do_call+0x12/0x22
>[  852.913754] ---[ end trace 705caa71d149a4f0 ]---
>[  852.917231] [drm:intel_disable_shared_dpll] disable PCH DPLL A (active 1, on? 1) for crtc 5
>[  852.917240] [drm:intel_disable_shared_dpll] disabling PCH DPLL A
>[  852.917661] [drm:intel_update_fbc] no output, disabling
>[  852.917727] [drm:intel_get_shared_dpll] CRTC:5 dropping existing PCH DPLL A
>[  852.917731] [drm:intel_get_shared_dpll] CRTC:5 using pre-allocated PCH DPLL A
>[  852.917734] [drm:intel_get_shared_dpll] using PCH DPLL A for pipe A
>[  852.917737] [drm:intel_get_shared_dpll] setting up PCH DPLL A
>[  852.917759] [drm:ironlake_update_primary_plane] Writing base 097F9000 00000000 0 0 5120
>[  852.917768] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:1280x720]
>[  852.917773] [drm:intel_dp_mode_set] Enabling DP audio on pipe A
>[  852.917778] [drm:intel_write_eld] ELD on [CONNECTOR:24:DP-1], [ENCODER:23:TMDS-23]
>[  852.917782] [drm:ironlake_write_eld] ELD on pipe A
>[  852.917786] [drm:ironlake_write_eld] Audio directed to unknown port
>[  852.917789] [drm:ironlake_write_eld] ELD: DisplayPort detected
>[  852.918672] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x100
>[  852.918676] [drm:ironlake_fdi_link_train] FDI train 1 done.
>[  852.918834] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x200
>[  852.918837] [drm:ironlake_fdi_link_train] FDI train 2 done.
>[  852.918840] [drm:ironlake_fdi_link_train] FDI train done
>[  852.918844] [drm:ironlake_enable_shared_dpll] enable PCH DPLL A (active 0, on? 0)for crtc 5
>[  852.918848] [drm:ironlake_enable_shared_dpll] enabling PCH DPLL A
>[  852.920425] [drm:ibx_irq_handler] *ERROR* PCH transcoder A FIFO underrun
>[  852.920738] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  852.921205] [drm:intel_dp_start_link_train] clock recovery OK
>[  852.921960] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  852.939237] [drm:intel_update_fbc] disabled per chip default
>[  852.957256] [drm:intel_connector_check_state] [CONNECTOR:24:DP-1]
>[  852.957270] [drm:check_encoder_state] [ENCODER:11:DAC-11]
>[  852.957276] [drm:check_encoder_state] [ENCODER:12:TMDS-12]
>[  852.957281] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  852.957286] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[  852.957291] [drm:check_encoder_state] [ENCODER:25:TMDS-25]
>[  852.957296] [drm:check_encoder_state] [ENCODER:27:TMDS-27]
>[  852.957301] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  852.957306] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[  852.957311] [drm:check_crtc_state] [CRTC:5]
>[  852.957340] [drm:check_crtc_state] [CRTC:8]
>[  852.957344] [drm:check_shared_dpll_state] PCH DPLL A
>[  852.957351] [drm:check_shared_dpll_state] PCH DPLL B
>[  857.960603] [drm:drm_mode_addfb2] [FB:57]
>[  858.083000] [drm:drm_mode_setcrtc] [CRTC:5]
>[  858.083013] [drm:drm_mode_setcrtc] [CONNECTOR:24:DP-1]
>[  858.083018] [drm:intel_crtc_set_config] [CRTC:5] [FB:57] #connectors=1 (x y) (0 0)
>[  858.083025] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[  858.083032] [drm:drm_mode_debug_printmodeline] Modeline 59:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  858.083038] [drm:drm_mode_debug_printmodeline] Modeline 59:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  858.083043] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=1, fb_changed=1
>[  858.083048] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:DP-1] to [CRTC:5]
>[  858.083054] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  858.083059] [drm:connected_sink_compute_bpp] [CONNECTOR:24:DP-1] checking for sink bpp constrains
>[  858.083065] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 74250KHz
>[  858.083073] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 24
>[  858.083076] [drm:intel_dp_compute_config] DP link bw required 178200 available 216000
>[  858.083082] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 1
>[  858.083086] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  858.083090] [drm:intel_dump_pipe_config] [CRTC:5][modeset] config for pipe A
>[  858.083093] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  858.083096] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  858.083101] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 1, gmch_m: 3460300, gmch_n: 4194304, link_m: 144179, link_n: 524288, tu: 64
>[  858.083106] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3460300, gmch_n: 4194304, link_m: 144179, link_n: 524288, tu: 64
>[  858.083109] [drm:intel_dump_pipe_config] requested mode:
>[  858.083115] [drm:drm_mode_debug_printmodeline] Modeline 0:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  858.083118] [drm:intel_dump_pipe_config] adjusted mode:
>[  858.083124] [drm:drm_mode_debug_printmodeline] Modeline 0:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  858.083129] [drm:intel_dump_crtc_timings] crtc timings: 74250 1280 1720 1760 1980 720 725 730 750, type: 0x40 flags: 0x5
>[  858.083132] [drm:intel_dump_pipe_config] port clock: 270000
>[  858.083136] [drm:intel_dump_pipe_config] pipe src size: 1280x720
>[  858.083139] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  858.083143] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  858.083146] [drm:intel_dump_pipe_config] ips: 0
>[  858.083149] [drm:intel_dump_pipe_config] double wide: 0
>[  858.098621] [drm:intel_dp_link_down] 
>[  858.201477] ------------[ cut here ]------------
>[  858.201518] WARNING: CPU: 2 PID: 4013 at drivers/gpu/drm/i915/intel_display.c:944 intel_wait_for_pipe_off+0x12e/0x135 [i915]()
>[  858.201521] pipe_off wait timed out
>[  858.201523] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt snd_hda_codec_generic iTCO_wdt iTCO_vendor_support ppdev dcdbas snd_hda_intel snd_hda_controller pcspkr snd_hda_codec i2c_i801 snd_hwdep snd_pcm lpc_ich mfd_core snd_timer firewire_ohci snd firewire_core crc_itu_t soundcore wmi battery tpm_tis tpm parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  858.201558] CPU: 2 PID: 4013 Comm: testdisplay Tainted: G        W     3.15.0-rc3_drm-intel-nightly_2be456_20140514+ #2598
>[  858.201561] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  858.201564]  00000000 c16a5021 f4993ccc c102cf1b f8569f80 c2858000 00070008 000881fe
>[  858.201570]  f6175db4 c102cf96 00000009 f4993ccc f85acdb9 f4993ce4 f8569f80 f85ab5ab
>[  858.201577]  000003b0 f85acdb9 c2858000 f6175db8 f5bfc000 f856f6da f4993d00 f804c166
>[  858.201583] Call Trace:
>[  858.201591]  [<c16a5021>] ? dump_stack+0x3e/0x4e
>[  858.201599]  [<c102cf1b>] ? warn_slowpath_common+0x61/0x74
>[  858.201625]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  858.201631]  [<c102cf96>] ? warn_slowpath_fmt+0x29/0x2d
>[  858.201657]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  858.201683]  [<f856f6da>] ? ironlake_crtc_disable+0x85/0x713 [i915]
>[  858.201697]  [<f804c166>] ? drm_ut_debug_printk+0x2c/0x30 [drm]
>[  858.201723]  [<f85658f5>] ? intel_dump_pipe_config+0x29a/0x29f [i915]
>[  858.201748]  [<f85714fa>] ? __intel_set_mode+0xbe7/0xffd [i915]
>[  858.201753]  [<c105c80d>] ? console_unlock+0x309/0x33d
>[  858.201757]  [<c105c503>] ? wake_up_klogd+0x25/0x26
>[  858.201783]  [<f85731e2>] ? intel_set_mode+0x11/0x25 [i915]
>[  858.201808]  [<f8573c39>] ? intel_crtc_set_config+0x646/0x8f1 [i915]
>[  858.201813]  [<c16a2531>] ? printk+0x16/0x1a
>[  858.201827]  [<f80500e0>] ? drm_mode_set_config_internal+0x39/0x8a [drm]
>[  858.201841]  [<f8052685>] ? drm_mode_setcrtc+0x37e/0x408 [drm]
>[  858.201854]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  858.201864]  [<f80488b3>] ? drm_ioctl+0x22e/0x35f [drm]
>[  858.201877]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  858.201888]  [<f8048685>] ? drm_copy_field+0x47/0x47 [drm]
>[  858.201894]  [<c10c92f9>] ? do_vfs_ioctl+0x3fa/0x444
>[  858.201898]  [<c16a7ae6>] ? __schedule+0x597/0x6bb
>[  858.201903]  [<c10bcd7a>] ? vfs_write+0xf8/0x157
>[  858.201908]  [<c10c9385>] ? SyS_ioctl+0x42/0x6d
>[  858.201912]  [<c16adeac>] ? sysenter_do_call+0x12/0x22
>[  858.201916] ---[ end trace 705caa71d149a4f1 ]---
>[  858.205491] [drm:intel_disable_shared_dpll] disable PCH DPLL A (active 1, on? 1) for crtc 5
>[  858.205501] [drm:intel_disable_shared_dpll] disabling PCH DPLL A
>[  858.205922] [drm:intel_update_fbc] no output, disabling
>[  858.205987] [drm:intel_get_shared_dpll] CRTC:5 dropping existing PCH DPLL A
>[  858.205991] [drm:intel_get_shared_dpll] CRTC:5 using pre-allocated PCH DPLL A
>[  858.205994] [drm:intel_get_shared_dpll] using PCH DPLL A for pipe A
>[  858.205997] [drm:intel_get_shared_dpll] setting up PCH DPLL A
>[  858.206020] [drm:ironlake_update_primary_plane] Writing base 09B7D000 00000000 0 0 5120
>[  858.206028] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:1280x720]
>[  858.206033] [drm:intel_dp_mode_set] Enabling DP audio on pipe A
>[  858.206039] [drm:intel_write_eld] ELD on [CONNECTOR:24:DP-1], [ENCODER:23:TMDS-23]
>[  858.206043] [drm:ironlake_write_eld] ELD on pipe A
>[  858.206047] [drm:ironlake_write_eld] Audio directed to unknown port
>[  858.206050] [drm:ironlake_write_eld] ELD: DisplayPort detected
>[  858.206922] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x100
>[  858.206926] [drm:ironlake_fdi_link_train] FDI train 1 done.
>[  858.207084] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x200
>[  858.207087] [drm:ironlake_fdi_link_train] FDI train 2 done.
>[  858.207089] [drm:ironlake_fdi_link_train] FDI train done
>[  858.207093] [drm:ironlake_enable_shared_dpll] enable PCH DPLL A (active 0, on? 0)for crtc 5
>[  858.207096] [drm:ironlake_enable_shared_dpll] enabling PCH DPLL A
>[  858.208707] [drm:ibx_irq_handler] *ERROR* PCH transcoder A FIFO underrun
>[  858.208979] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  858.209448] [drm:intel_dp_start_link_train] clock recovery OK
>[  858.210211] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  858.231503] [drm:intel_update_fbc] disabled per chip default
>[  858.251527] [drm:intel_connector_check_state] [CONNECTOR:24:DP-1]
>[  858.251542] [drm:check_encoder_state] [ENCODER:11:DAC-11]
>[  858.251548] [drm:check_encoder_state] [ENCODER:12:TMDS-12]
>[  858.251552] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  858.251557] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[  858.251563] [drm:check_encoder_state] [ENCODER:25:TMDS-25]
>[  858.251568] [drm:check_encoder_state] [ENCODER:27:TMDS-27]
>[  858.251573] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  858.251578] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[  858.251583] [drm:check_crtc_state] [CRTC:5]
>[  858.251613] [drm:check_crtc_state] [CRTC:8]
>[  858.251617] [drm:check_shared_dpll_state] PCH DPLL A
>[  858.251624] [drm:check_shared_dpll_state] PCH DPLL B
>[  863.254870] [drm:drm_mode_addfb2] [FB:58]
>[  863.373545] [drm:drm_mode_setcrtc] [CRTC:5]
>[  863.373558] [drm:drm_mode_setcrtc] [CONNECTOR:24:DP-1]
>[  863.373565] [drm:intel_crtc_set_config] [CRTC:5] [FB:58] #connectors=1 (x y) (0 0)
>[  863.373573] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[  863.373581] [drm:drm_mode_debug_printmodeline] Modeline 59:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  863.373608] [drm:drm_mode_debug_printmodeline] Modeline 59:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  863.373614] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=1, fb_changed=1
>[  863.373621] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:DP-1] to [CRTC:5]
>[  863.373629] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  863.373636] [drm:connected_sink_compute_bpp] [CONNECTOR:24:DP-1] checking for sink bpp constrains
>[  863.373644] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 78800KHz
>[  863.373656] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 24
>[  863.373660] [drm:intel_dp_compute_config] DP link bw required 189120 available 216000
>[  863.373671] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 1
>[  863.373686] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  863.373700] [drm:intel_dump_pipe_config] [CRTC:5][modeset] config for pipe A
>[  863.373710] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  863.373719] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  863.373726] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 1, gmch_m: 3672346, gmch_n: 4194304, link_m: 153014, link_n: 524288, tu: 64
>[  863.373736] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3672346, gmch_n: 4194304, link_m: 153014, link_n: 524288, tu: 64
>[  863.373740] [drm:intel_dump_pipe_config] requested mode:
>[  863.373748] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  863.373752] [drm:intel_dump_pipe_config] adjusted mode:
>[  863.373761] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  863.373769] [drm:intel_dump_crtc_timings] crtc timings: 78800 1024 1040 1136 1312 768 769 772 800, type: 0x40 flags: 0x5
>[  863.373773] [drm:intel_dump_pipe_config] port clock: 270000
>[  863.373778] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[  863.373784] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  863.373789] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  863.373794] [drm:intel_dump_pipe_config] ips: 0
>[  863.373798] [drm:intel_dump_pipe_config] double wide: 0
>[  863.393886] [drm:intel_dp_link_down] 
>[  863.496741] ------------[ cut here ]------------
>[  863.496782] WARNING: CPU: 0 PID: 4013 at drivers/gpu/drm/i915/intel_display.c:944 intel_wait_for_pipe_off+0x12e/0x135 [i915]()
>[  863.496785] pipe_off wait timed out
>[  863.496787] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt snd_hda_codec_generic iTCO_wdt iTCO_vendor_support ppdev dcdbas snd_hda_intel snd_hda_controller pcspkr snd_hda_codec i2c_i801 snd_hwdep snd_pcm lpc_ich mfd_core snd_timer firewire_ohci snd firewire_core crc_itu_t soundcore wmi battery tpm_tis tpm parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  863.496823] CPU: 0 PID: 4013 Comm: testdisplay Tainted: G        W     3.15.0-rc3_drm-intel-nightly_2be456_20140514+ #2598
>[  863.496825] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  863.496828]  00000000 c16a5021 f4993ccc c102cf1b f8569f80 c2858000 00070008 000896aa
>[  863.496835]  f6175db4 c102cf96 00000009 f4993ccc f85acdb9 f4993ce4 f8569f80 f85ab5ab
>[  863.496841]  000003b0 f85acdb9 c2858000 f6175db8 f5bfc000 f856f6da f4993d00 f804c166
>[  863.496848] Call Trace:
>[  863.496856]  [<c16a5021>] ? dump_stack+0x3e/0x4e
>[  863.496864]  [<c102cf1b>] ? warn_slowpath_common+0x61/0x74
>[  863.496886]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  863.496889]  [<c102cf96>] ? warn_slowpath_fmt+0x29/0x2d
>[  863.496902]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  863.496915]  [<f856f6da>] ? ironlake_crtc_disable+0x85/0x713 [i915]
>[  863.496923]  [<f804c166>] ? drm_ut_debug_printk+0x2c/0x30 [drm]
>[  863.496936]  [<f85658f5>] ? intel_dump_pipe_config+0x29a/0x29f [i915]
>[  863.496949]  [<f85714fa>] ? __intel_set_mode+0xbe7/0xffd [i915]
>[  863.496952]  [<c105c80d>] ? console_unlock+0x309/0x33d
>[  863.496954]  [<c105c503>] ? wake_up_klogd+0x25/0x26
>[  863.496967]  [<f85731e2>] ? intel_set_mode+0x11/0x25 [i915]
>[  863.496980]  [<f8573c39>] ? intel_crtc_set_config+0x646/0x8f1 [i915]
>[  863.496983]  [<c16a2531>] ? printk+0x16/0x1a
>[  863.496990]  [<f80500e0>] ? drm_mode_set_config_internal+0x39/0x8a [drm]
>[  863.496996]  [<f8052685>] ? drm_mode_setcrtc+0x37e/0x408 [drm]
>[  863.497003]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  863.497008]  [<f80488b3>] ? drm_ioctl+0x22e/0x35f [drm]
>[  863.497015]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  863.497020]  [<f8048685>] ? drm_copy_field+0x47/0x47 [drm]
>[  863.497025]  [<c10c92f9>] ? do_vfs_ioctl+0x3fa/0x444
>[  863.497028]  [<c16a7ae6>] ? __schedule+0x597/0x6bb
>[  863.497031]  [<c10bcd7a>] ? vfs_write+0xf8/0x157
>[  863.497033]  [<c10c9385>] ? SyS_ioctl+0x42/0x6d
>[  863.497037]  [<c16adeac>] ? sysenter_do_call+0x12/0x22
>[  863.497038] ---[ end trace 705caa71d149a4f2 ]---
>[  863.498746] [drm:intel_disable_shared_dpll] disable PCH DPLL A (active 1, on? 1) for crtc 5
>[  863.498756] [drm:intel_disable_shared_dpll] disabling PCH DPLL A
>[  863.499173] [drm:intel_update_fbc] no output, disabling
>[  863.499204] [drm:intel_get_shared_dpll] CRTC:5 dropping existing PCH DPLL A
>[  863.499206] [drm:intel_get_shared_dpll] CRTC:5 using pre-allocated PCH DPLL A
>[  863.499207] [drm:intel_get_shared_dpll] using PCH DPLL A for pipe A
>[  863.499209] [drm:intel_get_shared_dpll] setting up PCH DPLL A
>[  863.499226] [drm:ironlake_update_primary_plane] Writing base 09F01000 00000000 0 0 4096
>[  863.499232] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:1024x768]
>[  863.499236] [drm:intel_dp_mode_set] Enabling DP audio on pipe A
>[  863.499238] [drm:intel_write_eld] ELD on [CONNECTOR:24:DP-1], [ENCODER:23:TMDS-23]
>[  863.499240] [drm:ironlake_write_eld] ELD on pipe A
>[  863.499243] [drm:ironlake_write_eld] Audio directed to unknown port
>[  863.499244] [drm:ironlake_write_eld] ELD: DisplayPort detected
>[  863.500103] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x100
>[  863.500105] [drm:ironlake_fdi_link_train] FDI train 1 done.
>[  863.500261] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x200
>[  863.500263] [drm:ironlake_fdi_link_train] FDI train 2 done.
>[  863.500264] [drm:ironlake_fdi_link_train] FDI train done
>[  863.500266] [drm:ironlake_enable_shared_dpll] enable PCH DPLL A (active 0, on? 0)for crtc 5
>[  863.500267] [drm:ironlake_enable_shared_dpll] enabling PCH DPLL A
>[  863.501810] [drm:ibx_irq_handler] *ERROR* PCH transcoder A FIFO underrun
>[  863.502209] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  863.502676] [drm:intel_dp_start_link_train] clock recovery OK
>[  863.503442] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  863.518720] [drm:intel_update_fbc] disabled per chip default
>[  863.530772] [drm:intel_connector_check_state] [CONNECTOR:24:DP-1]
>[  863.530785] [drm:check_encoder_state] [ENCODER:11:DAC-11]
>[  863.530792] [drm:check_encoder_state] [ENCODER:12:TMDS-12]
>[  863.530796] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  863.530801] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[  863.530807] [drm:check_encoder_state] [ENCODER:25:TMDS-25]
>[  863.530812] [drm:check_encoder_state] [ENCODER:27:TMDS-27]
>[  863.530817] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  863.530822] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[  863.530827] [drm:check_crtc_state] [CRTC:5]
>[  863.530856] [drm:check_crtc_state] [CRTC:8]
>[  863.530860] [drm:check_shared_dpll_state] PCH DPLL A
>[  863.530866] [drm:check_shared_dpll_state] PCH DPLL B
>[  868.534111] [drm:drm_mode_addfb2] [FB:57]
>[  868.652949] [drm:drm_mode_setcrtc] [CRTC:5]
>[  868.652961] [drm:drm_mode_setcrtc] [CONNECTOR:24:DP-1]
>[  868.652967] [drm:intel_crtc_set_config] [CRTC:5] [FB:57] #connectors=1 (x y) (0 0)
>[  868.652974] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[  868.652982] [drm:drm_mode_debug_printmodeline] Modeline 59:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  868.652988] [drm:drm_mode_debug_printmodeline] Modeline 59:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  868.652992] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=1, fb_changed=1
>[  868.652997] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:DP-1] to [CRTC:5]
>[  868.653004] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  868.653009] [drm:connected_sink_compute_bpp] [CONNECTOR:24:DP-1] checking for sink bpp constrains
>[  868.653016] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 65000KHz
>[  868.653026] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 24
>[  868.653029] [drm:intel_dp_compute_config] DP link bw required 156000 available 216000
>[  868.653036] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 1
>[  868.653040] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  868.653045] [drm:intel_dump_pipe_config] [CRTC:5][modeset] config for pipe A
>[  868.653047] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  868.653051] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  868.653056] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 1, gmch_m: 3029219, gmch_n: 4194304, link_m: 126217, link_n: 524288, tu: 64
>[  868.653061] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3029219, gmch_n: 4194304, link_m: 126217, link_n: 524288, tu: 64
>[  868.653064] [drm:intel_dump_pipe_config] requested mode:
>[  868.653070] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  868.653073] [drm:intel_dump_pipe_config] adjusted mode:
>[  868.653079] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  868.653085] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[  868.653088] [drm:intel_dump_pipe_config] port clock: 270000
>[  868.653091] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[  868.653095] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  868.653099] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  868.653102] [drm:intel_dump_pipe_config] ips: 0
>[  868.653105] [drm:intel_dump_pipe_config] double wide: 0
>[  868.663143] [drm:intel_dp_link_down] 
>[  868.765989] ------------[ cut here ]------------
>[  868.766030] WARNING: CPU: 2 PID: 4013 at drivers/gpu/drm/i915/intel_display.c:944 intel_wait_for_pipe_off+0x12e/0x135 [i915]()
>[  868.766033] pipe_off wait timed out
>[  868.766035] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt snd_hda_codec_generic iTCO_wdt iTCO_vendor_support ppdev dcdbas snd_hda_intel snd_hda_controller pcspkr snd_hda_codec i2c_i801 snd_hwdep snd_pcm lpc_ich mfd_core snd_timer firewire_ohci snd firewire_core crc_itu_t soundcore wmi battery tpm_tis tpm parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  868.766070] CPU: 2 PID: 4013 Comm: testdisplay Tainted: G        W     3.15.0-rc3_drm-intel-nightly_2be456_20140514+ #2598
>[  868.766073] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  868.766076]  00000000 c16a5021 f4993ccc c102cf1b f8569f80 c2858000 00070008 0008ab3c
>[  868.766082]  f6175db4 c102cf96 00000009 f4993ccc f85acdb9 f4993ce4 f8569f80 f85ab5ab
>[  868.766089]  000003b0 f85acdb9 c2858000 f6175db8 f5bfc000 f856f6da f4993d00 f804c166
>[  868.766096] Call Trace:
>[  868.766103]  [<c16a5021>] ? dump_stack+0x3e/0x4e
>[  868.766111]  [<c102cf1b>] ? warn_slowpath_common+0x61/0x74
>[  868.766137]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  868.766143]  [<c102cf96>] ? warn_slowpath_fmt+0x29/0x2d
>[  868.766169]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  868.766195]  [<f856f6da>] ? ironlake_crtc_disable+0x85/0x713 [i915]
>[  868.766209]  [<f804c166>] ? drm_ut_debug_printk+0x2c/0x30 [drm]
>[  868.766235]  [<f85658f5>] ? intel_dump_pipe_config+0x29a/0x29f [i915]
>[  868.766260]  [<f85714fa>] ? __intel_set_mode+0xbe7/0xffd [i915]
>[  868.766265]  [<c105c80d>] ? console_unlock+0x309/0x33d
>[  868.766269]  [<c105c503>] ? wake_up_klogd+0x25/0x26
>[  868.766295]  [<f85731e2>] ? intel_set_mode+0x11/0x25 [i915]
>[  868.766320]  [<f8573c39>] ? intel_crtc_set_config+0x646/0x8f1 [i915]
>[  868.766325]  [<c16a2531>] ? printk+0x16/0x1a
>[  868.766339]  [<f80500e0>] ? drm_mode_set_config_internal+0x39/0x8a [drm]
>[  868.766352]  [<f8052685>] ? drm_mode_setcrtc+0x37e/0x408 [drm]
>[  868.766365]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  868.766376]  [<f80488b3>] ? drm_ioctl+0x22e/0x35f [drm]
>[  868.766389]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  868.766400]  [<f8048685>] ? drm_copy_field+0x47/0x47 [drm]
>[  868.766407]  [<c10c92f9>] ? do_vfs_ioctl+0x3fa/0x444
>[  868.766412]  [<c16a7ae6>] ? __schedule+0x597/0x6bb
>[  868.766417]  [<c10bcd7a>] ? vfs_write+0xf8/0x157
>[  868.766421]  [<c10c9385>] ? SyS_ioctl+0x42/0x6d
>[  868.766427]  [<c16adeac>] ? sysenter_do_call+0x12/0x22
>[  868.766430] ---[ end trace 705caa71d149a4f3 ]---
>[  868.770024] [drm:intel_disable_shared_dpll] disable PCH DPLL A (active 1, on? 1) for crtc 5
>[  868.770034] [drm:intel_disable_shared_dpll] disabling PCH DPLL A
>[  868.770454] [drm:intel_update_fbc] no output, disabling
>[  868.770519] [drm:intel_get_shared_dpll] CRTC:5 dropping existing PCH DPLL A
>[  868.770523] [drm:intel_get_shared_dpll] CRTC:5 using pre-allocated PCH DPLL A
>[  868.770527] [drm:intel_get_shared_dpll] using PCH DPLL A for pipe A
>[  868.770529] [drm:intel_get_shared_dpll] setting up PCH DPLL A
>[  868.770551] [drm:ironlake_update_primary_plane] Writing base 0A201000 00000000 0 0 4096
>[  868.770560] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:1024x768]
>[  868.770565] [drm:intel_dp_mode_set] Enabling DP audio on pipe A
>[  868.770571] [drm:intel_write_eld] ELD on [CONNECTOR:24:DP-1], [ENCODER:23:TMDS-23]
>[  868.770574] [drm:ironlake_write_eld] ELD on pipe A
>[  868.770578] [drm:ironlake_write_eld] Audio directed to unknown port
>[  868.770580] [drm:ironlake_write_eld] ELD: DisplayPort detected
>[  868.771458] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x100
>[  868.771462] [drm:ironlake_fdi_link_train] FDI train 1 done.
>[  868.771620] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x200
>[  868.771625] [drm:ironlake_fdi_link_train] FDI train 2 done.
>[  868.771628] [drm:ironlake_fdi_link_train] FDI train done
>[  868.771632] [drm:ironlake_enable_shared_dpll] enable PCH DPLL A (active 0, on? 0)for crtc 5
>[  868.771636] [drm:ironlake_enable_shared_dpll] enabling PCH DPLL A
>[  868.773217] [drm:ibx_irq_handler] *ERROR* PCH transcoder A FIFO underrun
>[  868.773516] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  868.773984] [drm:intel_dp_start_link_train] clock recovery OK
>[  868.774747] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  868.791970] [drm:intel_update_fbc] disabled per chip default
>[  868.809991] [drm:intel_connector_check_state] [CONNECTOR:24:DP-1]
>[  868.810005] [drm:check_encoder_state] [ENCODER:11:DAC-11]
>[  868.810010] [drm:check_encoder_state] [ENCODER:12:TMDS-12]
>[  868.810014] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  868.810020] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[  868.810024] [drm:check_encoder_state] [ENCODER:25:TMDS-25]
>[  868.810030] [drm:check_encoder_state] [ENCODER:27:TMDS-27]
>[  868.810035] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  868.810040] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[  868.810044] [drm:check_crtc_state] [CRTC:5]
>[  868.810072] [drm:check_crtc_state] [CRTC:8]
>[  868.810076] [drm:check_shared_dpll_state] PCH DPLL A
>[  868.810085] [drm:check_shared_dpll_state] PCH DPLL B
>[  873.813332] [drm:drm_mode_addfb2] [FB:58]
>[  873.923131] [drm:drm_mode_setcrtc] [CRTC:5]
>[  873.923142] [drm:drm_mode_setcrtc] [CONNECTOR:24:DP-1]
>[  873.923148] [drm:intel_crtc_set_config] [CRTC:5] [FB:58] #connectors=1 (x y) (0 0)
>[  873.923154] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[  873.923161] [drm:drm_mode_debug_printmodeline] Modeline 59:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  873.923168] [drm:drm_mode_debug_printmodeline] Modeline 59:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  873.923172] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=1, fb_changed=1
>[  873.923177] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:DP-1] to [CRTC:5]
>[  873.923183] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  873.923188] [drm:connected_sink_compute_bpp] [CONNECTOR:24:DP-1] checking for sink bpp constrains
>[  873.923194] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 49500KHz
>[  873.923204] [drm:intel_dp_compute_config] DP link bw 06 lane count 1 clock 162000 bpp 24
>[  873.923207] [drm:intel_dp_compute_config] DP link bw required 118800 available 129600
>[  873.923213] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 1
>[  873.923217] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  873.923221] [drm:intel_dump_pipe_config] [CRTC:5][modeset] config for pipe A
>[  873.923224] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  873.923227] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  873.923233] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 1, gmch_m: 2306867, gmch_n: 4194304, link_m: 96119, link_n: 524288, tu: 64
>[  873.923238] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 1922389, gmch_n: 2097152, link_m: 80099, link_n: 262144, tu: 64
>[  873.923241] [drm:intel_dump_pipe_config] requested mode:
>[  873.923247] [drm:drm_mode_debug_printmodeline] Modeline 0:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  873.923249] [drm:intel_dump_pipe_config] adjusted mode:
>[  873.923255] [drm:drm_mode_debug_printmodeline] Modeline 0:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  873.923260] [drm:intel_dump_crtc_timings] crtc timings: 49500 800 816 896 1056 600 601 604 625, type: 0x40 flags: 0x5
>[  873.923264] [drm:intel_dump_pipe_config] port clock: 162000
>[  873.923267] [drm:intel_dump_pipe_config] pipe src size: 800x600
>[  873.923271] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  873.923274] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  873.923277] [drm:intel_dump_pipe_config] ips: 0
>[  873.923280] [drm:intel_dump_pipe_config] double wide: 0
>[  873.929380] [drm:intel_dp_link_down] 
>[  874.032233] ------------[ cut here ]------------
>[  874.032272] WARNING: CPU: 0 PID: 4013 at drivers/gpu/drm/i915/intel_display.c:944 intel_wait_for_pipe_off+0x12e/0x135 [i915]()
>[  874.032276] pipe_off wait timed out
>[  874.032277] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt snd_hda_codec_generic iTCO_wdt iTCO_vendor_support ppdev dcdbas snd_hda_intel snd_hda_controller pcspkr snd_hda_codec i2c_i801 snd_hwdep snd_pcm lpc_ich mfd_core snd_timer firewire_ohci snd firewire_core crc_itu_t soundcore wmi battery tpm_tis tpm parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  874.032312] CPU: 0 PID: 4013 Comm: testdisplay Tainted: G        W     3.15.0-rc3_drm-intel-nightly_2be456_20140514+ #2598
>[  874.032315] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  874.032318]  00000000 c16a5021 f4993ccc c102cf1b f8569f80 c2858000 00070008 0008bfcb
>[  874.032324]  f6175db4 c102cf96 00000009 f4993ccc f85acdb9 f4993ce4 f8569f80 f85ab5ab
>[  874.032331]  000003b0 f85acdb9 c2858000 f6175db8 f5bfc000 f856f6da f4993d00 f804c166
>[  874.032337] Call Trace:
>[  874.032345]  [<c16a5021>] ? dump_stack+0x3e/0x4e
>[  874.032352]  [<c102cf1b>] ? warn_slowpath_common+0x61/0x74
>[  874.032377]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  874.032379]  [<c102cf96>] ? warn_slowpath_fmt+0x29/0x2d
>[  874.032393]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  874.032406]  [<f856f6da>] ? ironlake_crtc_disable+0x85/0x713 [i915]
>[  874.032414]  [<f804c166>] ? drm_ut_debug_printk+0x2c/0x30 [drm]
>[  874.032427]  [<f85658f5>] ? intel_dump_pipe_config+0x29a/0x29f [i915]
>[  874.032440]  [<f85714fa>] ? __intel_set_mode+0xbe7/0xffd [i915]
>[  874.032442]  [<c105c80d>] ? console_unlock+0x309/0x33d
>[  874.032444]  [<c105c503>] ? wake_up_klogd+0x25/0x26
>[  874.032457]  [<f85731e2>] ? intel_set_mode+0x11/0x25 [i915]
>[  874.032470]  [<f8573c39>] ? intel_crtc_set_config+0x646/0x8f1 [i915]
>[  874.032474]  [<c16a2531>] ? printk+0x16/0x1a
>[  874.032482]  [<f80500e0>] ? drm_mode_set_config_internal+0x39/0x8a [drm]
>[  874.032488]  [<f8052685>] ? drm_mode_setcrtc+0x37e/0x408 [drm]
>[  874.032495]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  874.032500]  [<f80488b3>] ? drm_ioctl+0x22e/0x35f [drm]
>[  874.032507]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  874.032512]  [<f8048685>] ? drm_copy_field+0x47/0x47 [drm]
>[  874.032517]  [<c10c92f9>] ? do_vfs_ioctl+0x3fa/0x444
>[  874.032520]  [<c16a7ae6>] ? __schedule+0x597/0x6bb
>[  874.032523]  [<c10bcd7a>] ? vfs_write+0xf8/0x157
>[  874.032525]  [<c10c9385>] ? SyS_ioctl+0x42/0x6d
>[  874.032528]  [<c16adeac>] ? sysenter_do_call+0x12/0x22
>[  874.032529] ---[ end trace 705caa71d149a4f4 ]---
>[  874.034168] [drm:intel_disable_shared_dpll] disable PCH DPLL A (active 1, on? 1) for crtc 5
>[  874.034174] [drm:intel_disable_shared_dpll] disabling PCH DPLL A
>[  874.034590] [drm:intel_update_fbc] no output, disabling
>[  874.034607] [drm:intel_get_shared_dpll] CRTC:5 dropping existing PCH DPLL A
>[  874.034608] [drm:intel_get_shared_dpll] CRTC:5 using pre-allocated PCH DPLL A
>[  874.034610] [drm:intel_get_shared_dpll] using PCH DPLL A for pipe A
>[  874.034611] [drm:intel_get_shared_dpll] setting up PCH DPLL A
>[  874.034628] [drm:ironlake_update_primary_plane] Writing base 0A501000 00000000 0 0 3200
>[  874.034634] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:800x600]
>[  874.034637] [drm:intel_dp_mode_set] Enabling DP audio on pipe A
>[  874.034639] [drm:intel_write_eld] ELD on [CONNECTOR:24:DP-1], [ENCODER:23:TMDS-23]
>[  874.034641] [drm:ironlake_write_eld] ELD on pipe A
>[  874.034644] [drm:ironlake_write_eld] Audio directed to unknown port
>[  874.034645] [drm:ironlake_write_eld] ELD: DisplayPort detected
>[  874.035504] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x100
>[  874.035506] [drm:ironlake_fdi_link_train] FDI train 1 done.
>[  874.035663] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x200
>[  874.035664] [drm:ironlake_fdi_link_train] FDI train 2 done.
>[  874.035665] [drm:ironlake_fdi_link_train] FDI train done
>[  874.035667] [drm:ironlake_enable_shared_dpll] enable PCH DPLL A (active 0, on? 0)for crtc 5
>[  874.035668] [drm:ironlake_enable_shared_dpll] enabling PCH DPLL A
>[  874.037219] [drm:ibx_irq_handler] *ERROR* PCH transcoder A FIFO underrun
>[  874.037624] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  874.038081] [drm:intel_dp_start_link_train] clock recovery OK
>[  874.038853] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  874.054214] [drm:intel_update_fbc] disabled per chip default
>[  874.066282] [drm:intel_connector_check_state] [CONNECTOR:24:DP-1]
>[  874.066298] [drm:check_encoder_state] [ENCODER:11:DAC-11]
>[  874.066304] [drm:check_encoder_state] [ENCODER:12:TMDS-12]
>[  874.066308] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  874.066313] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[  874.066319] [drm:check_encoder_state] [ENCODER:25:TMDS-25]
>[  874.066324] [drm:check_encoder_state] [ENCODER:27:TMDS-27]
>[  874.066329] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  874.066334] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[  874.066339] [drm:check_crtc_state] [CRTC:5]
>[  874.066369] [drm:check_crtc_state] [CRTC:8]
>[  874.066373] [drm:check_shared_dpll_state] PCH DPLL A
>[  874.066380] [drm:check_shared_dpll_state] PCH DPLL B
>[  879.069628] [drm:drm_mode_addfb2] [FB:57]
>[  879.179962] [drm:drm_mode_setcrtc] [CRTC:5]
>[  879.179973] [drm:drm_mode_setcrtc] [CONNECTOR:24:DP-1]
>[  879.179979] [drm:intel_crtc_set_config] [CRTC:5] [FB:57] #connectors=1 (x y) (0 0)
>[  879.179986] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[  879.179993] [drm:drm_mode_debug_printmodeline] Modeline 59:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  879.179999] [drm:drm_mode_debug_printmodeline] Modeline 59:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  879.180003] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=1, fb_changed=1
>[  879.180008] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:DP-1] to [CRTC:5]
>[  879.180014] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  879.180020] [drm:connected_sink_compute_bpp] [CONNECTOR:24:DP-1] checking for sink bpp constrains
>[  879.180026] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 40000KHz
>[  879.180036] [drm:intel_dp_compute_config] DP link bw 06 lane count 1 clock 162000 bpp 24
>[  879.180039] [drm:intel_dp_compute_config] DP link bw required 96000 available 129600
>[  879.180045] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 1
>[  879.180049] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  879.180053] [drm:intel_dump_pipe_config] [CRTC:5][modeset] config for pipe A
>[  879.180056] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  879.180059] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  879.180065] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 1, gmch_m: 1864135, gmch_n: 4194304, link_m: 77672, link_n: 524288, tu: 64
>[  879.180069] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 1553445, gmch_n: 2097152, link_m: 64726, link_n: 262144, tu: 64
>[  879.180072] [drm:intel_dump_pipe_config] requested mode:
>[  879.180078] [drm:drm_mode_debug_printmodeline] Modeline 0:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  879.180081] [drm:intel_dump_pipe_config] adjusted mode:
>[  879.180087] [drm:drm_mode_debug_printmodeline] Modeline 0:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  879.180092] [drm:intel_dump_crtc_timings] crtc timings: 40000 800 840 968 1056 600 601 605 628, type: 0x40 flags: 0x5
>[  879.180095] [drm:intel_dump_pipe_config] port clock: 162000
>[  879.180098] [drm:intel_dump_pipe_config] pipe src size: 800x600
>[  879.180102] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  879.180106] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  879.180109] [drm:intel_dump_pipe_config] ips: 0
>[  879.180112] [drm:intel_dump_pipe_config] double wide: 0
>[  879.189620] [drm:intel_dp_link_down] 
>[  879.292480] ------------[ cut here ]------------
>[  879.292527] WARNING: CPU: 2 PID: 4013 at drivers/gpu/drm/i915/intel_display.c:944 intel_wait_for_pipe_off+0x12e/0x135 [i915]()
>[  879.292530] pipe_off wait timed out
>[  879.292533] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt snd_hda_codec_generic iTCO_wdt iTCO_vendor_support ppdev dcdbas snd_hda_intel snd_hda_controller pcspkr snd_hda_codec i2c_i801 snd_hwdep snd_pcm lpc_ich mfd_core snd_timer firewire_ohci snd firewire_core crc_itu_t soundcore wmi battery tpm_tis tpm parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  879.292575] CPU: 2 PID: 4013 Comm: testdisplay Tainted: G        W     3.15.0-rc3_drm-intel-nightly_2be456_20140514+ #2598
>[  879.292578] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  879.292581]  00000000 c16a5021 f4993ccc c102cf1b f8569f80 c2858000 00070008 0008d454
>[  879.292589]  f6175db4 c102cf96 00000009 f4993ccc f85acdb9 f4993ce4 f8569f80 f85ab5ab
>[  879.292597]  000003b0 f85acdb9 c2858000 f6175db8 f5bfc000 f856f6da f4993d00 f804c166
>[  879.292605] Call Trace:
>[  879.292613]  [<c16a5021>] ? dump_stack+0x3e/0x4e
>[  879.292622]  [<c102cf1b>] ? warn_slowpath_common+0x61/0x74
>[  879.292653]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  879.292659]  [<c102cf96>] ? warn_slowpath_fmt+0x29/0x2d
>[  879.292691]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  879.292723]  [<f856f6da>] ? ironlake_crtc_disable+0x85/0x713 [i915]
>[  879.292739]  [<f804c166>] ? drm_ut_debug_printk+0x2c/0x30 [drm]
>[  879.292771]  [<f85658f5>] ? intel_dump_pipe_config+0x29a/0x29f [i915]
>[  879.292802]  [<f85714fa>] ? __intel_set_mode+0xbe7/0xffd [i915]
>[  879.292808]  [<c105c80d>] ? console_unlock+0x309/0x33d
>[  879.292813]  [<c105c503>] ? wake_up_klogd+0x25/0x26
>[  879.292844]  [<f85731e2>] ? intel_set_mode+0x11/0x25 [i915]
>[  879.292875]  [<f8573c39>] ? intel_crtc_set_config+0x646/0x8f1 [i915]
>[  879.292882]  [<c16a2531>] ? printk+0x16/0x1a
>[  879.292899]  [<f80500e0>] ? drm_mode_set_config_internal+0x39/0x8a [drm]
>[  879.292915]  [<f8052685>] ? drm_mode_setcrtc+0x37e/0x408 [drm]
>[  879.292931]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  879.292944]  [<f80488b3>] ? drm_ioctl+0x22e/0x35f [drm]
>[  879.292960]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  879.292974]  [<f8048685>] ? drm_copy_field+0x47/0x47 [drm]
>[  879.292982]  [<c10c92f9>] ? do_vfs_ioctl+0x3fa/0x444
>[  879.292987]  [<c16a7ae6>] ? __schedule+0x597/0x6bb
>[  879.292993]  [<c10bcd7a>] ? vfs_write+0xf8/0x157
>[  879.292998]  [<c10c9385>] ? SyS_ioctl+0x42/0x6d
>[  879.293004]  [<c16adeac>] ? sysenter_do_call+0x12/0x22
>[  879.293008] ---[ end trace 705caa71d149a4f5 ]---
>[  879.296492] [drm:intel_disable_shared_dpll] disable PCH DPLL A (active 1, on? 1) for crtc 5
>[  879.296502] [drm:intel_disable_shared_dpll] disabling PCH DPLL A
>[  879.296922] [drm:intel_update_fbc] no output, disabling
>[  879.296958] [drm:intel_get_shared_dpll] CRTC:5 dropping existing PCH DPLL A
>[  879.296962] [drm:intel_get_shared_dpll] CRTC:5 using pre-allocated PCH DPLL A
>[  879.296965] [drm:intel_get_shared_dpll] using PCH DPLL A for pipe A
>[  879.296968] [drm:intel_get_shared_dpll] setting up PCH DPLL A
>[  879.296990] [drm:ironlake_update_primary_plane] Writing base 0A6D6000 00000000 0 0 3200
>[  879.296999] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:800x600]
>[  879.297004] [drm:intel_dp_mode_set] Enabling DP audio on pipe A
>[  879.297009] [drm:intel_write_eld] ELD on [CONNECTOR:24:DP-1], [ENCODER:23:TMDS-23]
>[  879.297013] [drm:ironlake_write_eld] ELD on pipe A
>[  879.297017] [drm:ironlake_write_eld] Audio directed to unknown port
>[  879.297020] [drm:ironlake_write_eld] ELD: DisplayPort detected
>[  879.297901] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x100
>[  879.297904] [drm:ironlake_fdi_link_train] FDI train 1 done.
>[  879.298063] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x200
>[  879.298066] [drm:ironlake_fdi_link_train] FDI train 2 done.
>[  879.298069] [drm:ironlake_fdi_link_train] FDI train done
>[  879.298073] [drm:ironlake_enable_shared_dpll] enable PCH DPLL A (active 0, on? 0)for crtc 5
>[  879.298076] [drm:ironlake_enable_shared_dpll] enabling PCH DPLL A
>[  879.299652] [drm:ibx_irq_handler] *ERROR* PCH transcoder A FIFO underrun
>[  879.299955] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  879.300425] [drm:intel_dp_start_link_train] clock recovery OK
>[  879.301188] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  879.318451] [drm:intel_update_fbc] disabled per chip default
>[  879.334445] [drm:intel_connector_check_state] [CONNECTOR:24:DP-1]
>[  879.334459] [drm:check_encoder_state] [ENCODER:11:DAC-11]
>[  879.334464] [drm:check_encoder_state] [ENCODER:12:TMDS-12]
>[  879.334469] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  879.334474] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[  879.334480] [drm:check_encoder_state] [ENCODER:25:TMDS-25]
>[  879.334485] [drm:check_encoder_state] [ENCODER:27:TMDS-27]
>[  879.334490] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  879.334495] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[  879.334500] [drm:check_crtc_state] [CRTC:5]
>[  879.334528] [drm:check_crtc_state] [CRTC:8]
>[  879.334532] [drm:check_shared_dpll_state] PCH DPLL A
>[  879.334539] [drm:check_shared_dpll_state] PCH DPLL B
>[  884.337790] [drm:drm_mode_addfb2] [FB:58]
>[  884.444264] [drm:drm_mode_setcrtc] [CRTC:5]
>[  884.444275] [drm:drm_mode_setcrtc] [CONNECTOR:24:DP-1]
>[  884.444280] [drm:intel_crtc_set_config] [CRTC:5] [FB:58] #connectors=1 (x y) (0 0)
>[  884.444287] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[  884.444294] [drm:drm_mode_debug_printmodeline] Modeline 59:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  884.444300] [drm:drm_mode_debug_printmodeline] Modeline 59:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  884.444304] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=1, fb_changed=1
>[  884.444309] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:DP-1] to [CRTC:5]
>[  884.444316] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  884.444321] [drm:connected_sink_compute_bpp] [CONNECTOR:24:DP-1] checking for sink bpp constrains
>[  884.444327] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 27000KHz
>[  884.444335] [drm:intel_dp_compute_config] DP link bw 06 lane count 1 clock 162000 bpp 24
>[  884.444338] [drm:intel_dp_compute_config] DP link bw required 64800 available 129600
>[  884.444344] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 1
>[  884.444348] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  884.444352] [drm:intel_dump_pipe_config] [CRTC:5][modeset] config for pipe A
>[  884.444355] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  884.444358] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  884.444364] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 1, gmch_m: 1258291, gmch_n: 4194304, link_m: 52428, link_n: 524288, tu: 64
>[  884.444369] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 1048576, gmch_n: 2097152, link_m: 43690, link_n: 262144, tu: 64
>[  884.444371] [drm:intel_dump_pipe_config] requested mode:
>[  884.444377] [drm:drm_mode_debug_printmodeline] Modeline 0:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  884.444380] [drm:intel_dump_pipe_config] adjusted mode:
>[  884.444386] [drm:drm_mode_debug_printmodeline] Modeline 0:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  884.444391] [drm:intel_dump_crtc_timings] crtc timings: 27000 720 732 796 864 576 581 586 625, type: 0x40 flags: 0xa
>[  884.444394] [drm:intel_dump_pipe_config] port clock: 162000
>[  884.444397] [drm:intel_dump_pipe_config] pipe src size: 720x576
>[  884.444401] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  884.444405] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  884.444408] [drm:intel_dump_pipe_config] ips: 0
>[  884.444411] [drm:intel_dump_pipe_config] double wide: 0
>[  884.461856] [drm:intel_dp_link_down] 
>[  884.564731] ------------[ cut here ]------------
>[  884.564776] WARNING: CPU: 2 PID: 4013 at drivers/gpu/drm/i915/intel_display.c:944 intel_wait_for_pipe_off+0x12e/0x135 [i915]()
>[  884.564780] pipe_off wait timed out
>[  884.564782] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt snd_hda_codec_generic iTCO_wdt iTCO_vendor_support ppdev dcdbas snd_hda_intel snd_hda_controller pcspkr snd_hda_codec i2c_i801 snd_hwdep snd_pcm lpc_ich mfd_core snd_timer firewire_ohci snd firewire_core crc_itu_t soundcore wmi battery tpm_tis tpm parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  884.564824] CPU: 2 PID: 4013 Comm: testdisplay Tainted: G        W     3.15.0-rc3_drm-intel-nightly_2be456_20140514+ #2598
>[  884.564827] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  884.564830]  00000000 c16a5021 f4993ccc c102cf1b f8569f80 c2858000 00070008 0008e8e9
>[  884.564838]  f6175db4 c102cf96 00000009 f4993ccc f85acdb9 f4993ce4 f8569f80 f85ab5ab
>[  884.564846]  000003b0 f85acdb9 c2858000 f6175db8 f5bfc000 f856f6da f4993d00 f804c166
>[  884.564854] Call Trace:
>[  884.564863]  [<c16a5021>] ? dump_stack+0x3e/0x4e
>[  884.564871]  [<c102cf1b>] ? warn_slowpath_common+0x61/0x74
>[  884.564903]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  884.564909]  [<c102cf96>] ? warn_slowpath_fmt+0x29/0x2d
>[  884.564941]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  884.564973]  [<f856f6da>] ? ironlake_crtc_disable+0x85/0x713 [i915]
>[  884.564989]  [<f804c166>] ? drm_ut_debug_printk+0x2c/0x30 [drm]
>[  884.565021]  [<f85658f5>] ? intel_dump_pipe_config+0x29a/0x29f [i915]
>[  884.565051]  [<f85714fa>] ? __intel_set_mode+0xbe7/0xffd [i915]
>[  884.565057]  [<c105c80d>] ? console_unlock+0x309/0x33d
>[  884.565062]  [<c105c503>] ? wake_up_klogd+0x25/0x26
>[  884.565093]  [<f85731e2>] ? intel_set_mode+0x11/0x25 [i915]
>[  884.565124]  [<f8573c39>] ? intel_crtc_set_config+0x646/0x8f1 [i915]
>[  884.565131]  [<c16a2531>] ? printk+0x16/0x1a
>[  884.565148]  [<f80500e0>] ? drm_mode_set_config_internal+0x39/0x8a [drm]
>[  884.565164]  [<f8052685>] ? drm_mode_setcrtc+0x37e/0x408 [drm]
>[  884.565180]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  884.565192]  [<f80488b3>] ? drm_ioctl+0x22e/0x35f [drm]
>[  884.565208]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  884.565222]  [<f8048685>] ? drm_copy_field+0x47/0x47 [drm]
>[  884.565229]  [<c10c92f9>] ? do_vfs_ioctl+0x3fa/0x444
>[  884.565234]  [<c16a7ae6>] ? __schedule+0x597/0x6bb
>[  884.565240]  [<c10bcd7a>] ? vfs_write+0xf8/0x157
>[  884.565245]  [<c10c9385>] ? SyS_ioctl+0x42/0x6d
>[  884.565251]  [<c16adeac>] ? sysenter_do_call+0x12/0x22
>[  884.565255] ---[ end trace 705caa71d149a4f6 ]---
>[  884.568727] [drm:intel_disable_shared_dpll] disable PCH DPLL A (active 1, on? 1) for crtc 5
>[  884.568736] [drm:intel_disable_shared_dpll] disabling PCH DPLL A
>[  884.569156] [drm:intel_update_fbc] no output, disabling
>[  884.569192] [drm:intel_get_shared_dpll] CRTC:5 dropping existing PCH DPLL A
>[  884.569195] [drm:intel_get_shared_dpll] CRTC:5 using pre-allocated PCH DPLL A
>[  884.569199] [drm:intel_get_shared_dpll] using PCH DPLL A for pipe A
>[  884.569202] [drm:intel_get_shared_dpll] setting up PCH DPLL A
>[  884.569223] [drm:ironlake_update_primary_plane] Writing base 0A8AB000 00000000 0 0 2880
>[  884.569232] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:720x576]
>[  884.569236] [drm:intel_dp_mode_set] Enabling DP audio on pipe A
>[  884.569242] [drm:intel_write_eld] ELD on [CONNECTOR:24:DP-1], [ENCODER:23:TMDS-23]
>[  884.569245] [drm:ironlake_write_eld] ELD on pipe A
>[  884.569249] [drm:ironlake_write_eld] Audio directed to unknown port
>[  884.569252] [drm:ironlake_write_eld] ELD: DisplayPort detected
>[  884.570135] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x100
>[  884.570139] [drm:ironlake_fdi_link_train] FDI train 1 done.
>[  884.570297] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x200
>[  884.570300] [drm:ironlake_fdi_link_train] FDI train 2 done.
>[  884.570303] [drm:ironlake_fdi_link_train] FDI train done
>[  884.570307] [drm:ironlake_enable_shared_dpll] enable PCH DPLL A (active 0, on? 0)for crtc 5
>[  884.570310] [drm:ironlake_enable_shared_dpll] enabling PCH DPLL A
>[  884.571964] [drm:ibx_irq_handler] *ERROR* PCH transcoder A FIFO underrun
>[  884.572184] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  884.572650] [drm:intel_dp_start_link_train] clock recovery OK
>[  884.573425] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  884.594763] [drm:intel_update_fbc] disabled per chip default
>[  884.614767] [drm:intel_connector_check_state] [CONNECTOR:24:DP-1]
>[  884.614780] [drm:check_encoder_state] [ENCODER:11:DAC-11]
>[  884.614785] [drm:check_encoder_state] [ENCODER:12:TMDS-12]
>[  884.614789] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  884.614793] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[  884.614798] [drm:check_encoder_state] [ENCODER:25:TMDS-25]
>[  884.614803] [drm:check_encoder_state] [ENCODER:27:TMDS-27]
>[  884.614807] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  884.614812] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[  884.614816] [drm:check_crtc_state] [CRTC:5]
>[  884.614843] [drm:check_crtc_state] [CRTC:8]
>[  884.614846] [drm:check_shared_dpll_state] PCH DPLL A
>[  884.614852] [drm:check_shared_dpll_state] PCH DPLL B
>[  889.618093] [drm:drm_mode_addfb2] [FB:57]
>[  889.712556] [drm:drm_mode_setcrtc] [CRTC:5]
>[  889.712566] [drm:drm_mode_setcrtc] [CONNECTOR:24:DP-1]
>[  889.712571] [drm:intel_crtc_set_config] [CRTC:5] [FB:57] #connectors=1 (x y) (0 0)
>[  889.712578] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[  889.712585] [drm:drm_mode_debug_printmodeline] Modeline 59:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  889.712591] [drm:drm_mode_debug_printmodeline] Modeline 59:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  889.712595] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=1, fb_changed=1
>[  889.712600] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:DP-1] to [CRTC:5]
>[  889.712606] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  889.712611] [drm:connected_sink_compute_bpp] [CONNECTOR:24:DP-1] checking for sink bpp constrains
>[  889.712616] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 27027KHz
>[  889.712622] [drm:intel_dp_compute_config] DP link bw 06 lane count 1 clock 162000 bpp 24
>[  889.712626] [drm:intel_dp_compute_config] DP link bw required 64865 available 129600
>[  889.712631] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 1
>[  889.712635] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  889.712640] [drm:intel_dump_pipe_config] [CRTC:5][modeset] config for pipe A
>[  889.712642] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  889.712645] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  889.712651] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 1, gmch_m: 1259549, gmch_n: 4194304, link_m: 52481, link_n: 524288, tu: 64
>[  889.712656] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 1049624, gmch_n: 2097152, link_m: 43734, link_n: 262144, tu: 64
>[  889.712659] [drm:intel_dump_pipe_config] requested mode:
>[  889.712665] [drm:drm_mode_debug_printmodeline] Modeline 0:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  889.712667] [drm:intel_dump_pipe_config] adjusted mode:
>[  889.712673] [drm:drm_mode_debug_printmodeline] Modeline 0:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  889.712678] [drm:intel_dump_crtc_timings] crtc timings: 27027 720 736 798 858 480 489 495 525, type: 0x40 flags: 0xa
>[  889.712681] [drm:intel_dump_pipe_config] port clock: 162000
>[  889.712685] [drm:intel_dump_pipe_config] pipe src size: 720x480
>[  889.712688] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  889.712692] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  889.712695] [drm:intel_dump_pipe_config] ips: 0
>[  889.712698] [drm:intel_dump_pipe_config] double wide: 0
>[  889.718062] [drm:intel_dp_link_down] 
>[  889.820965] ------------[ cut here ]------------
>[  889.821002] WARNING: CPU: 0 PID: 4013 at drivers/gpu/drm/i915/intel_display.c:944 intel_wait_for_pipe_off+0x12e/0x135 [i915]()
>[  889.821005] pipe_off wait timed out
>[  889.821007] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt snd_hda_codec_generic iTCO_wdt iTCO_vendor_support ppdev dcdbas snd_hda_intel snd_hda_controller pcspkr snd_hda_codec i2c_i801 snd_hwdep snd_pcm lpc_ich mfd_core snd_timer firewire_ohci snd firewire_core crc_itu_t soundcore wmi battery tpm_tis tpm parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  889.821042] CPU: 0 PID: 4013 Comm: testdisplay Tainted: G        W     3.15.0-rc3_drm-intel-nightly_2be456_20140514+ #2598
>[  889.821044] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  889.821047]  00000000 c16a5021 f4993ccc c102cf1b f8569f80 c2858000 00070008 0008fd6e
>[  889.821054]  f6175db4 c102cf96 00000009 f4993ccc f85acdb9 f4993ce4 f8569f80 f85ab5ab
>[  889.821060]  000003b0 f85acdb9 c2858000 f6175db8 f5bfc000 f856f6da f4993d00 f804c166
>[  889.821066] Call Trace:
>[  889.821073]  [<c16a5021>] ? dump_stack+0x3e/0x4e
>[  889.821080]  [<c102cf1b>] ? warn_slowpath_common+0x61/0x74
>[  889.821107]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  889.821110]  [<c102cf96>] ? warn_slowpath_fmt+0x29/0x2d
>[  889.821123]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  889.821136]  [<f856f6da>] ? ironlake_crtc_disable+0x85/0x713 [i915]
>[  889.821143]  [<f804c166>] ? drm_ut_debug_printk+0x2c/0x30 [drm]
>[  889.821156]  [<f85658f5>] ? intel_dump_pipe_config+0x29a/0x29f [i915]
>[  889.821169]  [<f85714fa>] ? __intel_set_mode+0xbe7/0xffd [i915]
>[  889.821171]  [<c105c80d>] ? console_unlock+0x309/0x33d
>[  889.821173]  [<c105c503>] ? wake_up_klogd+0x25/0x26
>[  889.821186]  [<f85731e2>] ? intel_set_mode+0x11/0x25 [i915]
>[  889.821199]  [<f8573c39>] ? intel_crtc_set_config+0x646/0x8f1 [i915]
>[  889.821202]  [<c16a2531>] ? printk+0x16/0x1a
>[  889.821209]  [<f80500e0>] ? drm_mode_set_config_internal+0x39/0x8a [drm]
>[  889.821215]  [<f8052685>] ? drm_mode_setcrtc+0x37e/0x408 [drm]
>[  889.821222]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  889.821227]  [<f80488b3>] ? drm_ioctl+0x22e/0x35f [drm]
>[  889.821233]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  889.821239]  [<f8048685>] ? drm_copy_field+0x47/0x47 [drm]
>[  889.821242]  [<c10c92f9>] ? do_vfs_ioctl+0x3fa/0x444
>[  889.821245]  [<c16a7ae6>] ? __schedule+0x597/0x6bb
>[  889.821248]  [<c10bcd7a>] ? vfs_write+0xf8/0x157
>[  889.821250]  [<c10c9385>] ? SyS_ioctl+0x42/0x6d
>[  889.821253]  [<c16adeac>] ? sysenter_do_call+0x12/0x22
>[  889.821255] ---[ end trace 705caa71d149a4f7 ]---
>[  889.824978] [drm:intel_disable_shared_dpll] disable PCH DPLL A (active 1, on? 1) for crtc 5
>[  889.824987] [drm:intel_disable_shared_dpll] disabling PCH DPLL A
>[  889.825404] [drm:intel_update_fbc] no output, disabling
>[  889.825420] [drm:intel_get_shared_dpll] CRTC:5 dropping existing PCH DPLL A
>[  889.825421] [drm:intel_get_shared_dpll] CRTC:5 using pre-allocated PCH DPLL A
>[  889.825423] [drm:intel_get_shared_dpll] using PCH DPLL A for pipe A
>[  889.825424] [drm:intel_get_shared_dpll] setting up PCH DPLL A
>[  889.825441] [drm:ironlake_update_primary_plane] Writing base 0AA40000 00000000 0 0 2880
>[  889.825445] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:720x480]
>[  889.825448] [drm:intel_dp_mode_set] Enabling DP audio on pipe A
>[  889.825451] [drm:intel_write_eld] ELD on [CONNECTOR:24:DP-1], [ENCODER:23:TMDS-23]
>[  889.825452] [drm:ironlake_write_eld] ELD on pipe A
>[  889.825455] [drm:ironlake_write_eld] Audio directed to unknown port
>[  889.825456] [drm:ironlake_write_eld] ELD: DisplayPort detected
>[  889.826320] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x100
>[  889.826321] [drm:ironlake_fdi_link_train] FDI train 1 done.
>[  889.826478] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x200
>[  889.826480] [drm:ironlake_fdi_link_train] FDI train 2 done.
>[  889.826481] [drm:ironlake_fdi_link_train] FDI train done
>[  889.826483] [drm:ironlake_enable_shared_dpll] enable PCH DPLL A (active 0, on? 0)for crtc 5
>[  889.826484] [drm:ironlake_enable_shared_dpll] enabling PCH DPLL A
>[  889.828109] [drm:ibx_irq_handler] *ERROR* PCH transcoder A FIFO underrun
>[  889.828461] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  889.828938] [drm:intel_dp_start_link_train] clock recovery OK
>[  889.829704] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  889.846914] [drm:intel_update_fbc] disabled per chip default
>[  889.864932] [drm:intel_connector_check_state] [CONNECTOR:24:DP-1]
>[  889.864945] [drm:check_encoder_state] [ENCODER:11:DAC-11]
>[  889.864950] [drm:check_encoder_state] [ENCODER:12:TMDS-12]
>[  889.864954] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  889.864959] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[  889.864965] [drm:check_encoder_state] [ENCODER:25:TMDS-25]
>[  889.864970] [drm:check_encoder_state] [ENCODER:27:TMDS-27]
>[  889.864975] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  889.864980] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[  889.864984] [drm:check_crtc_state] [CRTC:5]
>[  889.865011] [drm:check_crtc_state] [CRTC:8]
>[  889.865015] [drm:check_shared_dpll_state] PCH DPLL A
>[  889.865022] [drm:check_shared_dpll_state] PCH DPLL B
>[  894.868255] [drm:drm_mode_addfb2] [FB:58]
>[  894.962657] [drm:drm_mode_setcrtc] [CRTC:5]
>[  894.962667] [drm:drm_mode_setcrtc] [CONNECTOR:24:DP-1]
>[  894.962673] [drm:intel_crtc_set_config] [CRTC:5] [FB:58] #connectors=1 (x y) (0 0)
>[  894.962679] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[  894.962686] [drm:drm_mode_debug_printmodeline] Modeline 59:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  894.962692] [drm:drm_mode_debug_printmodeline] Modeline 59:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  894.962697] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=1, fb_changed=1
>[  894.962702] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:DP-1] to [CRTC:5]
>[  894.962707] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  894.962713] [drm:connected_sink_compute_bpp] [CONNECTOR:24:DP-1] checking for sink bpp constrains
>[  894.962718] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 27000KHz
>[  894.962724] [drm:intel_dp_compute_config] DP link bw 06 lane count 1 clock 162000 bpp 24
>[  894.962728] [drm:intel_dp_compute_config] DP link bw required 64800 available 129600
>[  894.962734] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 1
>[  894.962738] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  894.962742] [drm:intel_dump_pipe_config] [CRTC:5][modeset] config for pipe A
>[  894.962745] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  894.962748] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  894.962753] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 1, gmch_m: 1258291, gmch_n: 4194304, link_m: 52428, link_n: 524288, tu: 64
>[  894.962758] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 1048576, gmch_n: 2097152, link_m: 43690, link_n: 262144, tu: 64
>[  894.962761] [drm:intel_dump_pipe_config] requested mode:
>[  894.962767] [drm:drm_mode_debug_printmodeline] Modeline 0:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  894.962769] [drm:intel_dump_pipe_config] adjusted mode:
>[  894.962775] [drm:drm_mode_debug_printmodeline] Modeline 0:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  894.962780] [drm:intel_dump_crtc_timings] crtc timings: 27000 720 736 798 858 480 489 495 525, type: 0x40 flags: 0xa
>[  894.962784] [drm:intel_dump_pipe_config] port clock: 162000
>[  894.962787] [drm:intel_dump_pipe_config] pipe src size: 720x480
>[  894.962791] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  894.962794] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  894.962798] [drm:intel_dump_pipe_config] ips: 0
>[  894.962801] [drm:intel_dump_pipe_config] double wide: 0
>[  894.968385] [drm:intel_dp_link_down] 
>[  895.071201] ------------[ cut here ]------------
>[  895.071241] WARNING: CPU: 1 PID: 4013 at drivers/gpu/drm/i915/intel_display.c:944 intel_wait_for_pipe_off+0x12e/0x135 [i915]()
>[  895.071244] pipe_off wait timed out
>[  895.071246] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt snd_hda_codec_generic iTCO_wdt iTCO_vendor_support ppdev dcdbas snd_hda_intel snd_hda_controller pcspkr snd_hda_codec i2c_i801 snd_hwdep snd_pcm lpc_ich mfd_core snd_timer firewire_ohci snd firewire_core crc_itu_t soundcore wmi battery tpm_tis tpm parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  895.071281] CPU: 1 PID: 4013 Comm: testdisplay Tainted: G        W     3.15.0-rc3_drm-intel-nightly_2be456_20140514+ #2598
>[  895.071283] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  895.071286]  00000000 c16a5021 f4993ccc c102cf1b f8569f80 c2858000 00070008 000911ed
>[  895.071293]  f6175db4 c102cf96 00000009 f4993ccc f85acdb9 f4993ce4 f8569f80 f85ab5ab
>[  895.071299]  000003b0 f85acdb9 c2858000 f6175db8 f5bfc000 f856f6da f4993d00 f804c166
>[  895.071306] Call Trace:
>[  895.071313]  [<c16a5021>] ? dump_stack+0x3e/0x4e
>[  895.071321]  [<c102cf1b>] ? warn_slowpath_common+0x61/0x74
>[  895.071347]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  895.071352]  [<c102cf96>] ? warn_slowpath_fmt+0x29/0x2d
>[  895.071378]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  895.071404]  [<f856f6da>] ? ironlake_crtc_disable+0x85/0x713 [i915]
>[  895.071418]  [<f804c166>] ? drm_ut_debug_printk+0x2c/0x30 [drm]
>[  895.071444]  [<f85658f5>] ? intel_dump_pipe_config+0x29a/0x29f [i915]
>[  895.071469]  [<f85714fa>] ? __intel_set_mode+0xbe7/0xffd [i915]
>[  895.071474]  [<c105c80d>] ? console_unlock+0x309/0x33d
>[  895.071478]  [<c105c503>] ? wake_up_klogd+0x25/0x26
>[  895.071504]  [<f85731e2>] ? intel_set_mode+0x11/0x25 [i915]
>[  895.071529]  [<f8573c39>] ? intel_crtc_set_config+0x646/0x8f1 [i915]
>[  895.071536]  [<c16a2531>] ? printk+0x16/0x1a
>[  895.071550]  [<f80500e0>] ? drm_mode_set_config_internal+0x39/0x8a [drm]
>[  895.071563]  [<f8052685>] ? drm_mode_setcrtc+0x37e/0x408 [drm]
>[  895.071576]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  895.071586]  [<f80488b3>] ? drm_ioctl+0x22e/0x35f [drm]
>[  895.071599]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  895.071611]  [<f8048685>] ? drm_copy_field+0x47/0x47 [drm]
>[  895.071618]  [<c10c92f9>] ? do_vfs_ioctl+0x3fa/0x444
>[  895.071623]  [<c16a7ae6>] ? __schedule+0x597/0x6bb
>[  895.071628]  [<c10bcd7a>] ? vfs_write+0xf8/0x157
>[  895.071632]  [<c10c9385>] ? SyS_ioctl+0x42/0x6d
>[  895.071637]  [<c16adeac>] ? sysenter_do_call+0x12/0x22
>[  895.071640] ---[ end trace 705caa71d149a4f8 ]---
>[  895.075241] [drm:intel_disable_shared_dpll] disable PCH DPLL A (active 1, on? 1) for crtc 5
>[  895.075250] [drm:intel_disable_shared_dpll] disabling PCH DPLL A
>[  895.075672] [drm:intel_update_fbc] no output, disabling
>[  895.075702] [drm:intel_get_shared_dpll] CRTC:5 dropping existing PCH DPLL A
>[  895.075705] [drm:intel_get_shared_dpll] CRTC:5 using pre-allocated PCH DPLL A
>[  895.075708] [drm:intel_get_shared_dpll] using PCH DPLL A for pipe A
>[  895.075710] [drm:intel_get_shared_dpll] setting up PCH DPLL A
>[  895.075730] [drm:ironlake_update_primary_plane] Writing base 0AB92000 00000000 0 0 2880
>[  895.075737] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:720x480]
>[  895.075742] [drm:intel_dp_mode_set] Enabling DP audio on pipe A
>[  895.075746] [drm:intel_write_eld] ELD on [CONNECTOR:24:DP-1], [ENCODER:23:TMDS-23]
>[  895.075749] [drm:ironlake_write_eld] ELD on pipe A
>[  895.075752] [drm:ironlake_write_eld] Audio directed to unknown port
>[  895.075755] [drm:ironlake_write_eld] ELD: DisplayPort detected
>[  895.076624] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x100
>[  895.076627] [drm:ironlake_fdi_link_train] FDI train 1 done.
>[  895.076785] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x200
>[  895.076787] [drm:ironlake_fdi_link_train] FDI train 2 done.
>[  895.076789] [drm:ironlake_fdi_link_train] FDI train done
>[  895.076793] [drm:ironlake_enable_shared_dpll] enable PCH DPLL A (active 0, on? 0)for crtc 5
>[  895.076795] [drm:ironlake_enable_shared_dpll] enabling PCH DPLL A
>[  895.078424] [drm:ibx_irq_handler] *ERROR* PCH transcoder A FIFO underrun
>[  895.078727] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  895.079189] [drm:intel_dp_start_link_train] clock recovery OK
>[  895.079950] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  895.097182] [drm:intel_update_fbc] disabled per chip default
>[  895.115241] [drm:intel_connector_check_state] [CONNECTOR:24:DP-1]
>[  895.115256] [drm:check_encoder_state] [ENCODER:11:DAC-11]
>[  895.115262] [drm:check_encoder_state] [ENCODER:12:TMDS-12]
>[  895.115266] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  895.115272] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[  895.115277] [drm:check_encoder_state] [ENCODER:25:TMDS-25]
>[  895.115282] [drm:check_encoder_state] [ENCODER:27:TMDS-27]
>[  895.115287] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  895.115291] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[  895.115296] [drm:check_crtc_state] [CRTC:5]
>[  895.115326] [drm:check_crtc_state] [CRTC:8]
>[  895.115330] [drm:check_shared_dpll_state] PCH DPLL A
>[  895.115337] [drm:check_shared_dpll_state] PCH DPLL B
>[  900.118569] [drm:drm_mode_addfb2] [FB:57]
>[  900.209371] [drm:drm_mode_setcrtc] [CRTC:5]
>[  900.209381] [drm:drm_mode_setcrtc] [CONNECTOR:24:DP-1]
>[  900.209386] [drm:intel_crtc_set_config] [CRTC:5] [FB:57] #connectors=1 (x y) (0 0)
>[  900.209393] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[  900.209399] [drm:drm_mode_debug_printmodeline] Modeline 59:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  900.209406] [drm:drm_mode_debug_printmodeline] Modeline 59:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  900.209410] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=1, fb_changed=1
>[  900.209415] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:DP-1] to [CRTC:5]
>[  900.209420] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  900.209425] [drm:connected_sink_compute_bpp] [CONNECTOR:24:DP-1] checking for sink bpp constrains
>[  900.209431] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 31500KHz
>[  900.209441] [drm:intel_dp_compute_config] DP link bw 06 lane count 1 clock 162000 bpp 24
>[  900.209445] [drm:intel_dp_compute_config] DP link bw required 75600 available 129600
>[  900.209451] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 1
>[  900.209455] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  900.209458] [drm:intel_dump_pipe_config] [CRTC:5][modeset] config for pipe A
>[  900.209461] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  900.209465] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  900.209470] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 1, gmch_m: 1468006, gmch_n: 4194304, link_m: 61166, link_n: 524288, tu: 64
>[  900.209475] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 1223338, gmch_n: 2097152, link_m: 50972, link_n: 262144, tu: 64
>[  900.209478] [drm:intel_dump_pipe_config] requested mode:
>[  900.209484] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  900.209486] [drm:intel_dump_pipe_config] adjusted mode:
>[  900.209492] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  900.209497] [drm:intel_dump_crtc_timings] crtc timings: 31500 640 656 720 840 480 481 484 500, type: 0x40 flags: 0xa
>[  900.209501] [drm:intel_dump_pipe_config] port clock: 162000
>[  900.209504] [drm:intel_dump_pipe_config] pipe src size: 640x480
>[  900.209510] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  900.209511] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  900.209513] [drm:intel_dump_pipe_config] ips: 0
>[  900.209514] [drm:intel_dump_pipe_config] double wide: 0
>[  900.223585] [drm:intel_dp_link_down] 
>[  900.326440] ------------[ cut here ]------------
>[  900.326479] WARNING: CPU: 1 PID: 4013 at drivers/gpu/drm/i915/intel_display.c:944 intel_wait_for_pipe_off+0x12e/0x135 [i915]()
>[  900.326482] pipe_off wait timed out
>[  900.326483] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt snd_hda_codec_generic iTCO_wdt iTCO_vendor_support ppdev dcdbas snd_hda_intel snd_hda_controller pcspkr snd_hda_codec i2c_i801 snd_hwdep snd_pcm lpc_ich mfd_core snd_timer firewire_ohci snd firewire_core crc_itu_t soundcore wmi battery tpm_tis tpm parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  900.326518] CPU: 1 PID: 4013 Comm: testdisplay Tainted: G        W     3.15.0-rc3_drm-intel-nightly_2be456_20140514+ #2598
>[  900.326521] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  900.326523]  00000000 c16a5021 f4993ccc c102cf1b f8569f80 c2858000 00070008 00092671
>[  900.326530]  f6175db4 c102cf96 00000009 f4993ccc f85acdb9 f4993ce4 f8569f80 f85ab5ab
>[  900.326536]  000003b0 f85acdb9 c2858000 f6175db8 f5bfc000 f856f6da f4993d00 f804c166
>[  900.326543] Call Trace:
>[  900.326550]  [<c16a5021>] ? dump_stack+0x3e/0x4e
>[  900.326557]  [<c102cf1b>] ? warn_slowpath_common+0x61/0x74
>[  900.326582]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  900.326588]  [<c102cf96>] ? warn_slowpath_fmt+0x29/0x2d
>[  900.326614]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  900.326641]  [<f856f6da>] ? ironlake_crtc_disable+0x85/0x713 [i915]
>[  900.326654]  [<f804c166>] ? drm_ut_debug_printk+0x2c/0x30 [drm]
>[  900.326680]  [<f85658f5>] ? intel_dump_pipe_config+0x29a/0x29f [i915]
>[  900.326705]  [<f85714fa>] ? __intel_set_mode+0xbe7/0xffd [i915]
>[  900.326710]  [<c105c80d>] ? console_unlock+0x309/0x33d
>[  900.326714]  [<c105c503>] ? wake_up_klogd+0x25/0x26
>[  900.326740]  [<f85731e2>] ? intel_set_mode+0x11/0x25 [i915]
>[  900.326765]  [<f8573c39>] ? intel_crtc_set_config+0x646/0x8f1 [i915]
>[  900.326771]  [<c16a2531>] ? printk+0x16/0x1a
>[  900.326785]  [<f80500e0>] ? drm_mode_set_config_internal+0x39/0x8a [drm]
>[  900.326798]  [<f8052685>] ? drm_mode_setcrtc+0x37e/0x408 [drm]
>[  900.326811]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  900.326821]  [<f80488b3>] ? drm_ioctl+0x22e/0x35f [drm]
>[  900.326834]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  900.326846]  [<f8048685>] ? drm_copy_field+0x47/0x47 [drm]
>[  900.326851]  [<c10c92f9>] ? do_vfs_ioctl+0x3fa/0x444
>[  900.326856]  [<c16a7ae6>] ? __schedule+0x597/0x6bb
>[  900.326860]  [<c10bcd7a>] ? vfs_write+0xf8/0x157
>[  900.326865]  [<c10c9385>] ? SyS_ioctl+0x42/0x6d
>[  900.326869]  [<c16adeac>] ? sysenter_do_call+0x12/0x22
>[  900.326872] ---[ end trace 705caa71d149a4f9 ]---
>[  900.330480] [drm:intel_disable_shared_dpll] disable PCH DPLL A (active 1, on? 1) for crtc 5
>[  900.330489] [drm:intel_disable_shared_dpll] disabling PCH DPLL A
>[  900.330908] [drm:intel_update_fbc] no output, disabling
>[  900.330938] [drm:intel_get_shared_dpll] CRTC:5 dropping existing PCH DPLL A
>[  900.330941] [drm:intel_get_shared_dpll] CRTC:5 using pre-allocated PCH DPLL A
>[  900.330944] [drm:intel_get_shared_dpll] using PCH DPLL A for pipe A
>[  900.330946] [drm:intel_get_shared_dpll] setting up PCH DPLL A
>[  900.330966] [drm:ironlake_update_primary_plane] Writing base 0ACE4000 00000000 0 0 2560
>[  900.330973] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:640x480]
>[  900.330978] [drm:intel_dp_mode_set] Enabling DP audio on pipe A
>[  900.330982] [drm:intel_write_eld] ELD on [CONNECTOR:24:DP-1], [ENCODER:23:TMDS-23]
>[  900.330985] [drm:ironlake_write_eld] ELD on pipe A
>[  900.330988] [drm:ironlake_write_eld] Audio directed to unknown port
>[  900.330990] [drm:ironlake_write_eld] ELD: DisplayPort detected
>[  900.331860] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x100
>[  900.331863] [drm:ironlake_fdi_link_train] FDI train 1 done.
>[  900.332021] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x200
>[  900.332024] [drm:ironlake_fdi_link_train] FDI train 2 done.
>[  900.332026] [drm:ironlake_fdi_link_train] FDI train done
>[  900.332030] [drm:ironlake_enable_shared_dpll] enable PCH DPLL A (active 0, on? 0)for crtc 5
>[  900.332032] [drm:ironlake_enable_shared_dpll] enabling PCH DPLL A
>[  900.333530] [drm:ibx_irq_handler] *ERROR* PCH transcoder A FIFO underrun
>[  900.333968] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  900.334426] [drm:intel_dp_start_link_train] clock recovery OK
>[  900.335194] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  900.350388] [drm:intel_update_fbc] disabled per chip default
>[  900.362403] [drm:intel_connector_check_state] [CONNECTOR:24:DP-1]
>[  900.362416] [drm:check_encoder_state] [ENCODER:11:DAC-11]
>[  900.362422] [drm:check_encoder_state] [ENCODER:12:TMDS-12]
>[  900.362426] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  900.362431] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[  900.362436] [drm:check_encoder_state] [ENCODER:25:TMDS-25]
>[  900.362441] [drm:check_encoder_state] [ENCODER:27:TMDS-27]
>[  900.362446] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  900.362451] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[  900.362456] [drm:check_crtc_state] [CRTC:5]
>[  900.362487] [drm:check_crtc_state] [CRTC:8]
>[  900.362489] [drm:check_shared_dpll_state] PCH DPLL A
>[  900.362495] [drm:check_shared_dpll_state] PCH DPLL B
>[  905.365763] [drm:drm_mode_addfb2] [FB:58]
>[  905.458361] [drm:drm_mode_setcrtc] [CRTC:5]
>[  905.458371] [drm:drm_mode_setcrtc] [CONNECTOR:24:DP-1]
>[  905.458376] [drm:intel_crtc_set_config] [CRTC:5] [FB:58] #connectors=1 (x y) (0 0)
>[  905.458383] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[  905.458390] [drm:drm_mode_debug_printmodeline] Modeline 59:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  905.458396] [drm:drm_mode_debug_printmodeline] Modeline 59:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  905.458400] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=1, fb_changed=1
>[  905.458405] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:DP-1] to [CRTC:5]
>[  905.458411] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  905.458416] [drm:connected_sink_compute_bpp] [CONNECTOR:24:DP-1] checking for sink bpp constrains
>[  905.458422] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 25200KHz
>[  905.458428] [drm:intel_dp_compute_config] DP link bw 06 lane count 1 clock 162000 bpp 24
>[  905.458433] [drm:intel_dp_compute_config] DP link bw required 60480 available 129600
>[  905.458439] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 1
>[  905.458443] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  905.458447] [drm:intel_dump_pipe_config] [CRTC:5][modeset] config for pipe A
>[  905.458449] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  905.458453] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  905.458458] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 1, gmch_m: 1174405, gmch_n: 4194304, link_m: 48933, link_n: 524288, tu: 64
>[  905.458463] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 978670, gmch_n: 2097152, link_m: 40777, link_n: 262144, tu: 64
>[  905.458465] [drm:intel_dump_pipe_config] requested mode:
>[  905.458471] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  905.458474] [drm:intel_dump_pipe_config] adjusted mode:
>[  905.458480] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  905.458485] [drm:intel_dump_crtc_timings] crtc timings: 25200 640 656 752 800 480 490 492 525, type: 0x40 flags: 0xa
>[  905.458488] [drm:intel_dump_pipe_config] port clock: 162000
>[  905.458491] [drm:intel_dump_pipe_config] pipe src size: 640x480
>[  905.458495] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  905.458499] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  905.458502] [drm:intel_dump_pipe_config] ips: 0
>[  905.458505] [drm:intel_dump_pipe_config] double wide: 0
>[  905.473822] [drm:intel_dp_link_down] 
>[  905.576673] ------------[ cut here ]------------
>[  905.576713] WARNING: CPU: 1 PID: 4013 at drivers/gpu/drm/i915/intel_display.c:944 intel_wait_for_pipe_off+0x12e/0x135 [i915]()
>[  905.576716] pipe_off wait timed out
>[  905.576718] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt snd_hda_codec_generic iTCO_wdt iTCO_vendor_support ppdev dcdbas snd_hda_intel snd_hda_controller pcspkr snd_hda_codec i2c_i801 snd_hwdep snd_pcm lpc_ich mfd_core snd_timer firewire_ohci snd firewire_core crc_itu_t soundcore wmi battery tpm_tis tpm parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  905.576754] CPU: 1 PID: 4013 Comm: testdisplay Tainted: G        W     3.15.0-rc3_drm-intel-nightly_2be456_20140514+ #2598
>[  905.576756] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  905.576759]  00000000 c16a5021 f4993ccc c102cf1b f8569f80 c2858000 00070008 00093af0
>[  905.576766]  f6175db4 c102cf96 00000009 f4993ccc f85acdb9 f4993ce4 f8569f80 f85ab5ab
>[  905.576772]  000003b0 f85acdb9 c2858000 f6175db8 f5bfc000 f856f6da f4993d00 f804c166
>[  905.576779] Call Trace:
>[  905.576787]  [<c16a5021>] ? dump_stack+0x3e/0x4e
>[  905.576795]  [<c102cf1b>] ? warn_slowpath_common+0x61/0x74
>[  905.576821]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  905.576826]  [<c102cf96>] ? warn_slowpath_fmt+0x29/0x2d
>[  905.576852]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  905.576917]  [<f856f6da>] ? ironlake_crtc_disable+0x85/0x713 [i915]
>[  905.576931]  [<f804c166>] ? drm_ut_debug_printk+0x2c/0x30 [drm]
>[  905.576957]  [<f85658f5>] ? intel_dump_pipe_config+0x29a/0x29f [i915]
>[  905.576982]  [<f85714fa>] ? __intel_set_mode+0xbe7/0xffd [i915]
>[  905.576987]  [<c105c80d>] ? console_unlock+0x309/0x33d
>[  905.576991]  [<c105c503>] ? wake_up_klogd+0x25/0x26
>[  905.577017]  [<f85731e2>] ? intel_set_mode+0x11/0x25 [i915]
>[  905.577042]  [<f8573c39>] ? intel_crtc_set_config+0x646/0x8f1 [i915]
>[  905.577048]  [<c16a2531>] ? printk+0x16/0x1a
>[  905.577063]  [<f80500e0>] ? drm_mode_set_config_internal+0x39/0x8a [drm]
>[  905.577076]  [<f8052685>] ? drm_mode_setcrtc+0x37e/0x408 [drm]
>[  905.577089]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  905.577099]  [<f80488b3>] ? drm_ioctl+0x22e/0x35f [drm]
>[  905.577112]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  905.577124]  [<f8048685>] ? drm_copy_field+0x47/0x47 [drm]
>[  905.577131]  [<c10c92f9>] ? do_vfs_ioctl+0x3fa/0x444
>[  905.577135]  [<c16a7ae6>] ? __schedule+0x597/0x6bb
>[  905.577140]  [<c10bcd7a>] ? vfs_write+0xf8/0x157
>[  905.577145]  [<c10c9385>] ? SyS_ioctl+0x42/0x6d
>[  905.577150]  [<c16adeac>] ? sysenter_do_call+0x12/0x22
>[  905.577153] ---[ end trace 705caa71d149a4fa ]---
>[  905.578675] [drm:intel_disable_shared_dpll] disable PCH DPLL A (active 1, on? 1) for crtc 5
>[  905.578681] [drm:intel_disable_shared_dpll] disabling PCH DPLL A
>[  905.579099] [drm:intel_update_fbc] no output, disabling
>[  905.579117] [drm:intel_get_shared_dpll] CRTC:5 dropping existing PCH DPLL A
>[  905.579118] [drm:intel_get_shared_dpll] CRTC:5 using pre-allocated PCH DPLL A
>[  905.579120] [drm:intel_get_shared_dpll] using PCH DPLL A for pipe A
>[  905.579121] [drm:intel_get_shared_dpll] setting up PCH DPLL A
>[  905.579138] [drm:ironlake_update_primary_plane] Writing base 0AE10000 00000000 0 0 2560
>[  905.579143] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:640x480]
>[  905.579146] [drm:intel_dp_mode_set] Enabling DP audio on pipe A
>[  905.579150] [drm:intel_write_eld] ELD on [CONNECTOR:24:DP-1], [ENCODER:23:TMDS-23]
>[  905.579151] [drm:ironlake_write_eld] ELD on pipe A
>[  905.579154] [drm:ironlake_write_eld] Audio directed to unknown port
>[  905.579155] [drm:ironlake_write_eld] ELD: DisplayPort detected
>[  905.580023] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x100
>[  905.580027] [drm:ironlake_fdi_link_train] FDI train 1 done.
>[  905.580185] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x200
>[  905.580188] [drm:ironlake_fdi_link_train] FDI train 2 done.
>[  905.580191] [drm:ironlake_fdi_link_train] FDI train done
>[  905.580195] [drm:ironlake_enable_shared_dpll] enable PCH DPLL A (active 0, on? 0)for crtc 5
>[  905.580199] [drm:ironlake_enable_shared_dpll] enabling PCH DPLL A
>[  905.581814] [drm:ibx_irq_handler] *ERROR* PCH transcoder A FIFO underrun
>[  905.582161] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  905.582623] [drm:intel_dp_start_link_train] clock recovery OK
>[  905.583390] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  905.600695] [drm:intel_update_fbc] disabled per chip default
>[  905.618651] [drm:intel_connector_check_state] [CONNECTOR:24:DP-1]
>[  905.618665] [drm:check_encoder_state] [ENCODER:11:DAC-11]
>[  905.618671] [drm:check_encoder_state] [ENCODER:12:TMDS-12]
>[  905.618675] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  905.618680] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[  905.618689] [drm:check_encoder_state] [ENCODER:25:TMDS-25]
>[  905.618693] [drm:check_encoder_state] [ENCODER:27:TMDS-27]
>[  905.618697] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  905.618701] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[  905.618704] [drm:check_crtc_state] [CRTC:5]
>[  905.618734] [drm:check_crtc_state] [CRTC:8]
>[  905.618737] [drm:check_shared_dpll_state] PCH DPLL A
>[  905.618743] [drm:check_shared_dpll_state] PCH DPLL B
>[  910.621985] [drm:drm_mode_addfb2] [FB:57]
>[  910.713551] [drm:drm_mode_setcrtc] [CRTC:5]
>[  910.713563] [drm:drm_mode_setcrtc] [CONNECTOR:24:DP-1]
>[  910.713570] [drm:intel_crtc_set_config] [CRTC:5] [FB:57] #connectors=1 (x y) (0 0)
>[  910.713577] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[  910.713585] [drm:drm_mode_debug_printmodeline] Modeline 59:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  910.713594] [drm:drm_mode_debug_printmodeline] Modeline 59:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  910.713600] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=1, fb_changed=1
>[  910.713607] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:DP-1] to [CRTC:5]
>[  910.713615] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  910.713622] [drm:connected_sink_compute_bpp] [CONNECTOR:24:DP-1] checking for sink bpp constrains
>[  910.713630] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 25175KHz
>[  910.713637] [drm:intel_dp_compute_config] DP link bw 06 lane count 1 clock 162000 bpp 24
>[  910.713642] [drm:intel_dp_compute_config] DP link bw required 60420 available 129600
>[  910.713649] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 1
>[  910.713654] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  910.713659] [drm:intel_dump_pipe_config] [CRTC:5][modeset] config for pipe A
>[  910.713663] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  910.713668] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  910.713675] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 1, gmch_m: 1173240, gmch_n: 4194304, link_m: 48885, link_n: 524288, tu: 64
>[  910.713682] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 977700, gmch_n: 2097152, link_m: 40737, link_n: 262144, tu: 64
>[  910.713686] [drm:intel_dump_pipe_config] requested mode:
>[  910.713694] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  910.713697] [drm:intel_dump_pipe_config] adjusted mode:
>[  910.713703] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  910.713708] [drm:intel_dump_crtc_timings] crtc timings: 25175 640 656 752 800 480 490 492 525, type: 0x40 flags: 0xa
>[  910.713711] [drm:intel_dump_pipe_config] port clock: 162000
>[  910.713714] [drm:intel_dump_pipe_config] pipe src size: 640x480
>[  910.713718] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  910.713722] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  910.713725] [drm:intel_dump_pipe_config] ips: 0
>[  910.713728] [drm:intel_dump_pipe_config] double wide: 0
>[  910.721050] [drm:intel_dp_link_down] 
>[  910.823913] ------------[ cut here ]------------
>[  910.823958] WARNING: CPU: 1 PID: 4013 at drivers/gpu/drm/i915/intel_display.c:944 intel_wait_for_pipe_off+0x12e/0x135 [i915]()
>[  910.823962] pipe_off wait timed out
>[  910.823964] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt snd_hda_codec_generic iTCO_wdt iTCO_vendor_support ppdev dcdbas snd_hda_intel snd_hda_controller pcspkr snd_hda_codec i2c_i801 snd_hwdep snd_pcm lpc_ich mfd_core snd_timer firewire_ohci snd firewire_core crc_itu_t soundcore wmi battery tpm_tis tpm parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  910.824006] CPU: 1 PID: 4013 Comm: testdisplay Tainted: G        W     3.15.0-rc3_drm-intel-nightly_2be456_20140514+ #2598
>[  910.824009] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  910.824012]  00000000 c16a5021 f4993ccc c102cf1b f8569f80 c2858000 00070008 00094f6c
>[  910.824021]  f6175db4 c102cf96 00000009 f4993ccc f85acdb9 f4993ce4 f8569f80 f85ab5ab
>[  910.824029]  000003b0 f85acdb9 c2858000 f6175db8 f5bfc000 f856f6da f4993d00 f804c166
>[  910.824037] Call Trace:
>[  910.824045]  [<c16a5021>] ? dump_stack+0x3e/0x4e
>[  910.824053]  [<c102cf1b>] ? warn_slowpath_common+0x61/0x74
>[  910.824084]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  910.824091]  [<c102cf96>] ? warn_slowpath_fmt+0x29/0x2d
>[  910.824122]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  910.824154]  [<f856f6da>] ? ironlake_crtc_disable+0x85/0x713 [i915]
>[  910.824170]  [<f804c166>] ? drm_ut_debug_printk+0x2c/0x30 [drm]
>[  910.824202]  [<f85658f5>] ? intel_dump_pipe_config+0x29a/0x29f [i915]
>[  910.824233]  [<f85714fa>] ? __intel_set_mode+0xbe7/0xffd [i915]
>[  910.824239]  [<c105c80d>] ? console_unlock+0x309/0x33d
>[  910.824244]  [<c105c503>] ? wake_up_klogd+0x25/0x26
>[  910.824275]  [<f85731e2>] ? intel_set_mode+0x11/0x25 [i915]
>[  910.824306]  [<f8573c39>] ? intel_crtc_set_config+0x646/0x8f1 [i915]
>[  910.824312]  [<c16a2531>] ? printk+0x16/0x1a
>[  910.824329]  [<f80500e0>] ? drm_mode_set_config_internal+0x39/0x8a [drm]
>[  910.824345]  [<f8052685>] ? drm_mode_setcrtc+0x37e/0x408 [drm]
>[  910.824361]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  910.824373]  [<f80488b3>] ? drm_ioctl+0x22e/0x35f [drm]
>[  910.824389]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  910.824403]  [<f8048685>] ? drm_copy_field+0x47/0x47 [drm]
>[  910.824410]  [<c10c92f9>] ? do_vfs_ioctl+0x3fa/0x444
>[  910.824415]  [<c16a7ae6>] ? __schedule+0x597/0x6bb
>[  910.824421]  [<c10bcd7a>] ? vfs_write+0xf8/0x157
>[  910.824427]  [<c10c9385>] ? SyS_ioctl+0x42/0x6d
>[  910.824433]  [<c16adeac>] ? sysenter_do_call+0x12/0x22
>[  910.824436] ---[ end trace 705caa71d149a4fb ]---
>[  910.825858] [drm:intel_disable_shared_dpll] disable PCH DPLL A (active 1, on? 1) for crtc 5
>[  910.825865] [drm:intel_disable_shared_dpll] disabling PCH DPLL A
>[  910.826280] [drm:intel_update_fbc] no output, disabling
>[  910.826297] [drm:intel_get_shared_dpll] CRTC:5 dropping existing PCH DPLL A
>[  910.826298] [drm:intel_get_shared_dpll] CRTC:5 using pre-allocated PCH DPLL A
>[  910.826300] [drm:intel_get_shared_dpll] using PCH DPLL A for pipe A
>[  910.826301] [drm:intel_get_shared_dpll] setting up PCH DPLL A
>[  910.826318] [drm:ironlake_update_primary_plane] Writing base 0AF3C000 00000000 0 0 2560
>[  910.826323] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:640x480]
>[  910.826326] [drm:intel_dp_mode_set] Enabling DP audio on pipe A
>[  910.826328] [drm:intel_write_eld] ELD on [CONNECTOR:24:DP-1], [ENCODER:23:TMDS-23]
>[  910.826330] [drm:ironlake_write_eld] ELD on pipe A
>[  910.826333] [drm:ironlake_write_eld] Audio directed to unknown port
>[  910.826334] [drm:ironlake_write_eld] ELD: DisplayPort detected
>[  910.827196] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x100
>[  910.827200] [drm:ironlake_fdi_link_train] FDI train 1 done.
>[  910.827358] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x200
>[  910.827361] [drm:ironlake_fdi_link_train] FDI train 2 done.
>[  910.827364] [drm:ironlake_fdi_link_train] FDI train done
>[  910.827368] [drm:ironlake_enable_shared_dpll] enable PCH DPLL A (active 0, on? 0)for crtc 5
>[  910.827371] [drm:ironlake_enable_shared_dpll] enabling PCH DPLL A
>[  910.828985] [drm:ibx_irq_handler] *ERROR* PCH transcoder A FIFO underrun
>[  910.829338] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  910.829793] [drm:intel_dp_start_link_train] clock recovery OK
>[  910.830568] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  910.847932] [drm:intel_update_fbc] disabled per chip default
>[  910.865956] [drm:intel_connector_check_state] [CONNECTOR:24:DP-1]
>[  910.865970] [drm:check_encoder_state] [ENCODER:11:DAC-11]
>[  910.865976] [drm:check_encoder_state] [ENCODER:12:TMDS-12]
>[  910.865980] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  910.865986] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[  910.865991] [drm:check_encoder_state] [ENCODER:25:TMDS-25]
>[  910.865996] [drm:check_encoder_state] [ENCODER:27:TMDS-27]
>[  910.866002] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  910.866007] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[  910.866011] [drm:check_crtc_state] [CRTC:5]
>[  910.866041] [drm:check_crtc_state] [CRTC:8]
>[  910.866045] [drm:check_shared_dpll_state] PCH DPLL A
>[  910.866052] [drm:check_shared_dpll_state] PCH DPLL B
>[  915.869297] [drm:drm_mode_addfb2] [FB:58]
>[  915.940791] [drm:drm_mode_setcrtc] [CRTC:5]
>[  915.940801] [drm:drm_mode_setcrtc] [CONNECTOR:24:DP-1]
>[  915.940806] [drm:intel_crtc_set_config] [CRTC:5] [FB:58] #connectors=1 (x y) (0 0)
>[  915.940812] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[  915.940819] [drm:drm_mode_debug_printmodeline] Modeline 59:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  915.940825] [drm:drm_mode_debug_printmodeline] Modeline 59:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  915.940829] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=1, fb_changed=1
>[  915.940834] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:DP-1] to [CRTC:5]
>[  915.940839] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  915.940845] [drm:connected_sink_compute_bpp] [CONNECTOR:24:DP-1] checking for sink bpp constrains
>[  915.940851] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 28320KHz
>[  915.940860] [drm:intel_dp_compute_config] DP link bw 06 lane count 1 clock 162000 bpp 24
>[  915.940864] [drm:intel_dp_compute_config] DP link bw required 67968 available 129600
>[  915.940870] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 1
>[  915.940874] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  915.940878] [drm:intel_dump_pipe_config] [CRTC:5][modeset] config for pipe A
>[  915.940881] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  915.940884] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  915.940889] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 1, gmch_m: 1319807, gmch_n: 4194304, link_m: 54991, link_n: 524288, tu: 64
>[  915.940894] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 1099839, gmch_n: 2097152, link_m: 45826, link_n: 262144, tu: 64
>[  915.940897] [drm:intel_dump_pipe_config] requested mode:
>[  915.940903] [drm:drm_mode_debug_printmodeline] Modeline 0:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  915.940906] [drm:intel_dump_pipe_config] adjusted mode:
>[  915.940911] [drm:drm_mode_debug_printmodeline] Modeline 0:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  915.940917] [drm:intel_dump_crtc_timings] crtc timings: 28320 720 738 846 900 400 412 414 449, type: 0x40 flags: 0x6
>[  915.940920] [drm:intel_dump_pipe_config] port clock: 162000
>[  915.940923] [drm:intel_dump_pipe_config] pipe src size: 720x400
>[  915.940927] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  915.940931] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  915.940934] [drm:intel_dump_pipe_config] ips: 0
>[  915.940937] [drm:intel_dump_pipe_config] double wide: 0
>[  915.956281] [drm:intel_dp_link_down] 
>[  916.059136] ------------[ cut here ]------------
>[  916.059173] WARNING: CPU: 1 PID: 4013 at drivers/gpu/drm/i915/intel_display.c:944 intel_wait_for_pipe_off+0x12e/0x135 [i915]()
>[  916.059176] pipe_off wait timed out
>[  916.059178] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt snd_hda_codec_generic iTCO_wdt iTCO_vendor_support ppdev dcdbas snd_hda_intel snd_hda_controller pcspkr snd_hda_codec i2c_i801 snd_hwdep snd_pcm lpc_ich mfd_core snd_timer firewire_ohci snd firewire_core crc_itu_t soundcore wmi battery tpm_tis tpm parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  916.059213] CPU: 1 PID: 4013 Comm: testdisplay Tainted: G        W     3.15.0-rc3_drm-intel-nightly_2be456_20140514+ #2598
>[  916.059216] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  916.059218]  00000000 c16a5021 f4993ccc c102cf1b f8569f80 c2858000 00070008 000963dc
>[  916.059225]  f6175db4 c102cf96 00000009 f4993ccc f85acdb9 f4993ce4 f8569f80 f85ab5ab
>[  916.059231]  000003b0 f85acdb9 c2858000 f6175db8 f5bfc000 f856f6da f4993d00 f804c166
>[  916.059238] Call Trace:
>[  916.059245]  [<c16a5021>] ? dump_stack+0x3e/0x4e
>[  916.059253]  [<c102cf1b>] ? warn_slowpath_common+0x61/0x74
>[  916.059279]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  916.059284]  [<c102cf96>] ? warn_slowpath_fmt+0x29/0x2d
>[  916.059310]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  916.059337]  [<f856f6da>] ? ironlake_crtc_disable+0x85/0x713 [i915]
>[  916.059350]  [<f804c166>] ? drm_ut_debug_printk+0x2c/0x30 [drm]
>[  916.059376]  [<f85658f5>] ? intel_dump_pipe_config+0x29a/0x29f [i915]
>[  916.059401]  [<f85714fa>] ? __intel_set_mode+0xbe7/0xffd [i915]
>[  916.059405]  [<c105c80d>] ? console_unlock+0x309/0x33d
>[  916.059409]  [<c105c503>] ? wake_up_klogd+0x25/0x26
>[  916.059435]  [<f85731e2>] ? intel_set_mode+0x11/0x25 [i915]
>[  916.059460]  [<f8573c39>] ? intel_crtc_set_config+0x646/0x8f1 [i915]
>[  916.059465]  [<c16a2531>] ? printk+0x16/0x1a
>[  916.059479]  [<f80500e0>] ? drm_mode_set_config_internal+0x39/0x8a [drm]
>[  916.059492]  [<f8052685>] ? drm_mode_setcrtc+0x37e/0x408 [drm]
>[  916.059505]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  916.059515]  [<f80488b3>] ? drm_ioctl+0x22e/0x35f [drm]
>[  916.059528]  [<f8052307>] ? drm_mode_setplane+0x2fd/0x2fd [drm]
>[  916.059539]  [<f8048685>] ? drm_copy_field+0x47/0x47 [drm]
>[  916.059546]  [<c10c92f9>] ? do_vfs_ioctl+0x3fa/0x444
>[  916.059550]  [<c16a7ae6>] ? __schedule+0x597/0x6bb
>[  916.059555]  [<c10bcd7a>] ? vfs_write+0xf8/0x157
>[  916.059559]  [<c10c9385>] ? SyS_ioctl+0x42/0x6d
>[  916.059564]  [<c16adeac>] ? sysenter_do_call+0x12/0x22
>[  916.059567] ---[ end trace 705caa71d149a4fc ]---
>[  916.061089] [drm:intel_disable_shared_dpll] disable PCH DPLL A (active 1, on? 1) for crtc 5
>[  916.061095] [drm:intel_disable_shared_dpll] disabling PCH DPLL A
>[  916.061510] [drm:intel_update_fbc] no output, disabling
>[  916.061527] [drm:intel_get_shared_dpll] CRTC:5 dropping existing PCH DPLL A
>[  916.061529] [drm:intel_get_shared_dpll] CRTC:5 using pre-allocated PCH DPLL A
>[  916.061530] [drm:intel_get_shared_dpll] using PCH DPLL A for pipe A
>[  916.061532] [drm:intel_get_shared_dpll] setting up PCH DPLL A
>[  916.061548] [drm:ironlake_update_primary_plane] Writing base 0B068000 00000000 0 0 2880
>[  916.061554] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:720x400]
>[  916.061556] [drm:intel_dp_mode_set] Enabling DP audio on pipe A
>[  916.061559] [drm:intel_write_eld] ELD on [CONNECTOR:24:DP-1], [ENCODER:23:TMDS-23]
>[  916.061560] [drm:ironlake_write_eld] ELD on pipe A
>[  916.061563] [drm:ironlake_write_eld] Audio directed to unknown port
>[  916.061564] [drm:ironlake_write_eld] ELD: DisplayPort detected
>[  916.062427] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x100
>[  916.062430] [drm:ironlake_fdi_link_train] FDI train 1 done.
>[  916.062589] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x200
>[  916.062592] [drm:ironlake_fdi_link_train] FDI train 2 done.
>[  916.062594] [drm:ironlake_fdi_link_train] FDI train done
>[  916.062598] [drm:ironlake_enable_shared_dpll] enable PCH DPLL A (active 0, on? 0)for crtc 5
>[  916.062601] [drm:ironlake_enable_shared_dpll] enabling PCH DPLL A
>[  916.064264] [drm:ibx_irq_handler] *ERROR* PCH transcoder A FIFO underrun
>[  916.064531] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  916.064990] [drm:intel_dp_start_link_train] clock recovery OK
>[  916.065757] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  916.081150] [drm:intel_update_fbc] disabled per chip default
>[  916.095176] [drm:intel_connector_check_state] [CONNECTOR:24:DP-1]
>[  916.095190] [drm:check_encoder_state] [ENCODER:11:DAC-11]
>[  916.095196] [drm:check_encoder_state] [ENCODER:12:TMDS-12]
>[  916.095200] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  916.095205] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[  916.095210] [drm:check_encoder_state] [ENCODER:25:TMDS-25]
>[  916.095215] [drm:check_encoder_state] [ENCODER:27:TMDS-27]
>[  916.095220] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  916.095225] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[  916.095230] [drm:check_crtc_state] [CRTC:5]
>[  916.095259] [drm:check_crtc_state] [CRTC:8]
>[  916.095262] [drm:check_shared_dpll_state] PCH DPLL A
>[  916.095268] [drm:check_shared_dpll_state] PCH DPLL B
>[  921.098502] [drm:intel_crtc_set_config] [CRTC:5] [NOFB]
>[  921.098509] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=1, fb_changed=0
>[  921.098513] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:DP-1] to [NOCRTC]
>[  921.098515] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  921.098518] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  921.098521] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  921.098525] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[  921.106473] [drm:intel_dp_link_down] 
>[  921.209309] ------------[ cut here ]------------
>[  921.209342] WARNING: CPU: 3 PID: 4013 at drivers/gpu/drm/i915/intel_display.c:944 intel_wait_for_pipe_off+0x12e/0x135 [i915]()
>[  921.209344] pipe_off wait timed out
>[  921.209346] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt snd_hda_codec_generic iTCO_wdt iTCO_vendor_support ppdev dcdbas snd_hda_intel snd_hda_controller pcspkr snd_hda_codec i2c_i801 snd_hwdep snd_pcm lpc_ich mfd_core snd_timer firewire_ohci snd firewire_core crc_itu_t soundcore wmi battery tpm_tis tpm parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  921.209380] CPU: 3 PID: 4013 Comm: testdisplay Tainted: G        W     3.15.0-rc3_drm-intel-nightly_2be456_20140514+ #2598
>[  921.209383] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  921.209385]  00000000 c16a5021 f4993cc0 c102cf1b f8569f80 c2858000 00070008 000977f7
>[  921.209392]  f6175db4 c102cf96 00000009 f4993cc0 f85acdb9 f4993cd8 f8569f80 f85ab5ab
>[  921.209398]  000003b0 f85acdb9 c2858000 f6175db8 f5bfc000 f856f6da f4993cf4 f804c166
>[  921.209405] Call Trace:
>[  921.209410]  [<c16a5021>] ? dump_stack+0x3e/0x4e
>[  921.209416]  [<c102cf1b>] ? warn_slowpath_common+0x61/0x74
>[  921.209443]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  921.209448]  [<c102cf96>] ? warn_slowpath_fmt+0x29/0x2d
>[  921.209474]  [<f8569f80>] ? intel_wait_for_pipe_off+0x12e/0x135 [i915]
>[  921.209501]  [<f856f6da>] ? ironlake_crtc_disable+0x85/0x713 [i915]
>[  921.209514]  [<f804c166>] ? drm_ut_debug_printk+0x2c/0x30 [drm]
>[  921.209540]  [<f8570ab6>] ? __intel_set_mode+0x1a3/0xffd [i915]
>[  921.209565]  [<f8571401>] ? __intel_set_mode+0xaee/0xffd [i915]
>[  921.209570]  [<c105401b>] ? up+0x9/0x2a
>[  921.209574]  [<c105c80d>] ? console_unlock+0x309/0x33d
>[  921.209600]  [<f85731e2>] ? intel_set_mode+0x11/0x25 [i915]
>[  921.209625]  [<f8573c39>] ? intel_crtc_set_config+0x646/0x8f1 [i915]
>[  921.209630]  [<c104e7c9>] ? load_balance+0x106/0x61f
>[  921.209644]  [<f80500e0>] ? drm_mode_set_config_internal+0x39/0x8a [drm]
>[  921.209657]  [<f80502f4>] ? drm_framebuffer_remove+0x70/0xd6 [drm]
>[  921.209670]  [<f8052ecf>] ? drm_mode_rmfb+0xa7/0xcd [drm]
>[  921.209683]  [<f8052e28>] ? drm_mode_addfb2+0x5c2/0x5c2 [drm]
>[  921.209693]  [<f80488b3>] ? drm_ioctl+0x22e/0x35f [drm]
>[  921.209706]  [<f8052e28>] ? drm_mode_addfb2+0x5c2/0x5c2 [drm]
>[  921.209710]  [<c16a7ae6>] ? __schedule+0x597/0x6bb
>[  921.209715]  [<c10415f2>] ? enqueue_hrtimer+0x10/0x2e
>[  921.209719]  [<c1041d5d>] ? __hrtimer_start_range_ns+0x15b/0x259
>[  921.209722]  [<c1041e44>] ? __hrtimer_start_range_ns+0x242/0x259
>[  921.209727]  [<c1041940>] ? lock_hrtimer_base.isra.26+0x14/0x2d
>[  921.209730]  [<c10419e3>] ? hrtimer_try_to_cancel+0x54/0x5a
>[  921.209741]  [<f8048685>] ? drm_copy_field+0x47/0x47 [drm]
>[  921.209745]  [<c10c92f9>] ? do_vfs_ioctl+0x3fa/0x444
>[  921.209750]  [<c1042506>] ? hrtimer_nanosleep+0x73/0xf3
>[  921.209753]  [<c104169b>] ? update_rmtp+0x5e/0x5e
>[  921.209757]  [<c10c9385>] ? SyS_ioctl+0x42/0x6d
>[  921.209762]  [<c16adeac>] ? sysenter_do_call+0x12/0x22
>[  921.209765] ---[ end trace 705caa71d149a4fd ]---
>[  921.213352] [drm:intel_disable_shared_dpll] disable PCH DPLL A (active 1, on? 1) for crtc 5
>[  921.213360] [drm:intel_disable_shared_dpll] disabling PCH DPLL A
>[  921.213778] [drm:intel_update_fbc] no output, disabling
>[  921.213798] [drm:check_encoder_state] [ENCODER:11:DAC-11]
>[  921.213803] [drm:check_encoder_state] [ENCODER:12:TMDS-12]
>[  921.213806] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  921.213811] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[  921.213815] [drm:check_encoder_state] [ENCODER:25:TMDS-25]
>[  921.213820] [drm:check_encoder_state] [ENCODER:27:TMDS-27]
>[  921.213823] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  921.213828] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[  921.213832] [drm:check_crtc_state] [CRTC:5]
>[  921.213835] [drm:check_crtc_state] [CRTC:8]
>[  921.213838] [drm:check_shared_dpll_state] PCH DPLL A
>[  921.213844] [drm:check_shared_dpll_state] PCH DPLL B
>[  921.213863] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[8] ENCODERS[8]
>[  921.213869] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[8] ENCODERS[8]
>[  921.213875] [drm:drm_mode_getconnector] [CONNECTOR:26:?]
>[  921.213880] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:26:HDMI-A-2]
>[  921.213883] [drm:intel_hdmi_detect] [CONNECTOR:26:HDMI-A-2]
>[  921.214045] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  921.214048] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  921.214053] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:26:HDMI-A-2] disconnected
>[  921.214058] [drm:drm_mode_getconnector] [CONNECTOR:26:?]
>[  921.214062] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:26:HDMI-A-2]
>[  921.214065] [drm:intel_hdmi_detect] [CONNECTOR:26:HDMI-A-2]
>[  921.214264] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  921.214275] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  921.214289] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:26:HDMI-A-2] disconnected
>[  921.214306] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[8] ENCODERS[8]
>[  921.214317] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[8] ENCODERS[8]
>[  921.214328] [drm:drm_mode_getconnector] [CONNECTOR:28:?]
>[  921.214339] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:28:HDMI-A-3]
>[  921.214350] [drm:intel_hdmi_detect] [CONNECTOR:28:HDMI-A-3]
>[  921.214513] [drm:gmbus_xfer] GMBUS [i915 gmbus dpd] NAK for addr: 0050 r(1)
>[  921.214516] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpd
>[  921.214519] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:28:HDMI-A-3] disconnected
>[  921.214523] [drm:drm_mode_getconnector] [CONNECTOR:28:?]
>[  921.214526] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:28:HDMI-A-3]
>[  921.214528] [drm:intel_hdmi_detect] [CONNECTOR:28:HDMI-A-3]
>[  921.214695] [drm:gmbus_xfer] GMBUS [i915 gmbus dpd] NAK for addr: 0050 r(1)
>[  921.214698] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpd
>[  921.214702] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:28:HDMI-A-3] disconnected
>[  921.214711] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[8] ENCODERS[8]
>[  921.214714] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[8] ENCODERS[8]
>[  921.214718] [drm:drm_mode_getconnector] [CONNECTOR:30:?]
>[  921.214721] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:30:DP-2]
>[  921.214724] [drm:intel_dp_detect] [CONNECTOR:30:DP-2]
>[  921.214729] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:30:DP-2] disconnected
>[  921.214732] [drm:drm_mode_getconnector] [CONNECTOR:30:?]
>[  921.214735] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:30:DP-2]
>[  921.214737] [drm:intel_dp_detect] [CONNECTOR:30:DP-2]
>[  921.214742] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:30:DP-2] disconnected
>[  921.214747] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[8] ENCODERS[8]
>[  921.214751] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[8] ENCODERS[8]
>[  921.214754] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[  921.214757] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:DP-3]
>[  921.214760] [drm:intel_dp_detect] [CONNECTOR:32:DP-3]
>[  921.214763] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:DP-3] disconnected
>[  921.214766] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[  921.214769] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:DP-3]
>[  921.214771] [drm:intel_dp_detect] [CONNECTOR:32:DP-3]
>[  921.214775] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:DP-3] disconnected
>[  921.214852] [drm:intel_crtc_cursor_set] cursor off
>[  921.214855] [drm:intel_crtc_set_config] [CRTC:5] [FB:56] #connectors=1 (x y) (0 0)
>[  921.214857] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  921.214858] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[  921.214862] [drm:drm_mode_debug_printmodeline] Modeline 59:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  921.214865] [drm:drm_mode_debug_printmodeline] Modeline 54:"1366x768" 60 69000 1366 1398 1422 1426 768 771 775 806 0x48 0x9
>[  921.214867] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=1, fb_changed=0
>[  921.214868] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  921.214870] [drm:intel_modeset_stage_output_state] [CONNECTOR:13:eDP-1] to [CRTC:5]
>[  921.214871] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  921.214872] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  921.214874] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  921.214877] [drm:connected_sink_compute_bpp] [CONNECTOR:13:eDP-1] checking for sink bpp constrains
>[  921.214878] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[  921.214881] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 69000KHz
>[  921.214882] [drm:intel_dp_compute_config] using min 1 lanes per VBT
>[  921.214883] [drm:intel_dp_compute_config] using min 0a link bw per VBT
>[  921.214885] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[  921.214887] [drm:intel_dp_compute_config] DP link bw required 124200 available 216000
>[  921.214889] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  921.214891] [drm:intel_dump_pipe_config] [CRTC:5][modeset] config for pipe A
>[  921.214892] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  921.214893] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  921.214895] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  921.214897] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2411724, gmch_n: 4194304, link_m: 133984, link_n: 524288, tu: 64
>[  921.214898] [drm:intel_dump_pipe_config] requested mode:
>[  921.214901] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 69000 1366 1398 1422 1426 768 771 775 806 0x48 0x9
>[  921.214902] [drm:intel_dump_pipe_config] adjusted mode:
>[  921.214905] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 69000 1366 1398 1422 1426 768 771 775 806 0x48 0x9
>[  921.214907] [drm:intel_dump_crtc_timings] crtc timings: 69000 1366 1398 1422 1426 768 771 775 806, type: 0x48 flags: 0x9
>[  921.214908] [drm:intel_dump_pipe_config] port clock: 270000
>[  921.214909] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[  921.214911] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  921.214913] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  921.214914] [drm:intel_dump_pipe_config] ips: 0
>[  921.214915] [drm:intel_dump_pipe_config] double wide: 0
>[  921.214972] [drm:ironlake_update_primary_plane] Writing base 00180000 00000000 0 0 10240
>[  921.214977] [drm:intel_crtc_mode_set] [ENCODER:12:TMDS-12] set [MODE:0:1366x768]
>[  921.214979] [drm:ironlake_set_pll_cpu_edp] eDP PLL enable for clock 270000
>[  921.215483] [drm:ironlake_edp_pll_on] 
>[  921.215812] [drm:_edp_panel_vdd_on] Turning eDP VDD on
>[  921.215814] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  921.215819] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[  921.215821] [drm:wait_panel_status] Wait complete
>[  921.215828] [drm:_edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  921.215830] [drm:_edp_panel_vdd_on] eDP was not running
>[  921.517015] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  921.517461] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  921.517899] [drm:intel_dp_start_link_train] clock recovery OK
>[  921.517900] [drm:intel_edp_panel_on] Turn eDP power on
>[  921.517902] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  921.517906] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[  921.517909] [drm:wait_panel_status] Wait complete
>[  921.517913] [drm:wait_panel_on] Wait for panel power on
>[  921.517917] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0009
>[  921.825618] [drm:wait_panel_status] Wait complete
>[  921.825622] [drm:edp_panel_vdd_off_sync] Turning eDP VDD off
>[  921.825628] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0003
>[  921.825631] [drm:_edp_panel_vdd_on] Turning eDP VDD on
>[  921.825639] [drm:_edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  921.826383] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  921.826532] [drm:intel_edp_backlight_on] 
>[  921.866654] [drm:intel_panel_enable_backlight] pipe A
>[  921.866659] [drm:intel_panel_actually_set_backlight] set backlight PWM = 93
>[  921.876663] [drm:intel_update_fbc] disabled per chip default
>[  921.894737] [drm:intel_connector_check_state] [CONNECTOR:13:eDP-1]
>[  921.894750] [drm:check_encoder_state] [ENCODER:11:DAC-11]
>[  921.894753] [drm:check_encoder_state] [ENCODER:12:TMDS-12]
>[  921.894755] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  921.894758] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[  921.894761] [drm:check_encoder_state] [ENCODER:25:TMDS-25]
>[  921.894764] [drm:check_encoder_state] [ENCODER:27:TMDS-27]
>[  921.894768] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  921.894771] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[  921.894774] [drm:check_crtc_state] [CRTC:5]
>[  921.894786] [drm:check_crtc_state] [CRTC:8]
>[  921.894788] [drm:check_shared_dpll_state] PCH DPLL A
>[  921.894793] [drm:check_shared_dpll_state] PCH DPLL B
>[  921.894800] [drm:intel_crtc_cursor_set] cursor off
>[  921.894802] [drm:intel_crtc_set_config] [CRTC:8] [FB:56] #connectors=1 (x y) (0 0)
>[  921.894805] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  921.894807] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=1, fb_changed=0
>[  921.894809] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  921.894811] [drm:intel_modeset_stage_output_state] [CONNECTOR:13:eDP-1] to [CRTC:5]
>[  921.894813] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:DP-1] to [CRTC:8]
>[  921.894814] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  921.894816] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  921.894818] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  921.894821] [drm:connected_sink_compute_bpp] [CONNECTOR:24:DP-1] checking for sink bpp constrains
>[  921.894825] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 268500KHz
>[  921.894831] [drm:intel_dp_compute_config] DP link bw 0a lane count 4 clock 270000 bpp 24
>[  921.894833] [drm:intel_dp_compute_config] DP link bw required 644400 available 864000
>[  921.894836] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe B, lanes 4
>[  921.894838] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  921.894840] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe B
>[  921.894841] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[  921.894842] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  921.894845] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 4, gmch_m: 6256503, gmch_n: 8388608, link_m: 521375, link_n: 524288, tu: 64
>[  921.894847] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6256503, gmch_n: 8388608, link_m: 521375, link_n: 524288, tu: 64
>[  921.894848] [drm:intel_dump_pipe_config] requested mode:
>[  921.894852] [drm:drm_mode_debug_printmodeline] Modeline 0:"2560x1600" 60 268500 2560 2608 2640 2720 1600 1603 1609 1646 0x48 0x9
>[  921.894853] [drm:intel_dump_pipe_config] adjusted mode:
>[  921.894856] [drm:drm_mode_debug_printmodeline] Modeline 0:"2560x1600" 60 268500 2560 2608 2640 2720 1600 1603 1609 1646 0x48 0x9
>[  921.894859] [drm:intel_dump_crtc_timings] crtc timings: 268500 2560 2608 2640 2720 1600 1603 1609 1646, type: 0x48 flags: 0x9
>[  921.894860] [drm:intel_dump_pipe_config] port clock: 270000
>[  921.894862] [drm:intel_dump_pipe_config] pipe src size: 2560x1600
>[  921.894864] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  921.894865] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  921.894866] [drm:intel_dump_pipe_config] ips: 0
>[  921.894867] [drm:intel_dump_pipe_config] double wide: 0
>[  921.894896] [drm:intel_get_shared_dpll] CRTC:8 using pre-allocated PCH DPLL B
>[  921.894897] [drm:intel_get_shared_dpll] using PCH DPLL B for pipe B
>[  921.894897] [drm:intel_get_shared_dpll] setting up PCH DPLL B
>[  921.894913] [drm:ironlake_update_primary_plane] Writing base 00180000 00000000 0 0 10240
>[  921.894917] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:2560x1600]
>[  921.894919] [drm:intel_dp_mode_set] Enabling DP audio on pipe B
>[  921.894921] [drm:intel_write_eld] ELD on [CONNECTOR:24:DP-1], [ENCODER:23:TMDS-23]
>[  921.894921] [drm:ironlake_write_eld] ELD on pipe B
>[  921.894923] [drm:ironlake_write_eld] Audio directed to unknown port
>[  921.894924] [drm:ironlake_write_eld] ELD: DisplayPort detected
>[  921.895772] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x100
>[  921.895773] [drm:ironlake_fdi_link_train] FDI train 1 done.
>[  921.895928] [drm:ironlake_fdi_link_train] FDI_RX_IIR 0x200
>[  921.895929] [drm:ironlake_fdi_link_train] FDI train 2 done.
>[  921.895929] [drm:ironlake_fdi_link_train] FDI train done
>[  921.895930] [drm:ironlake_enable_shared_dpll] enable PCH DPLL B (active 0, on? 0)for crtc 8
>[  921.895931] [drm:ironlake_enable_shared_dpll] enabling PCH DPLL B
>[  921.897836] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  921.897848] [drm:ibx_irq_handler] *ERROR* PCH transcoder B FIFO underrun
>[  921.898342] [drm:intel_dp_start_link_train] clock recovery OK
>[  921.899126] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  921.916682] [drm:intel_update_fbc] more than one pipe active, disabling compression
>[  921.932694] [drm:intel_connector_check_state] [CONNECTOR:13:eDP-1]
>[  921.932703] [drm:intel_connector_check_state] [CONNECTOR:24:DP-1]
>[  921.932712] [drm:check_encoder_state] [ENCODER:11:DAC-11]
>[  921.932717] [drm:check_encoder_state] [ENCODER:12:TMDS-12]
>[  921.932720] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  921.932724] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[  921.932729] [drm:check_encoder_state] [ENCODER:25:TMDS-25]
>[  921.932733] [drm:check_encoder_state] [ENCODER:27:TMDS-27]
>[  921.932736] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  921.932740] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[  921.932744] [drm:check_crtc_state] [CRTC:5]
>[  921.932759] [drm:check_crtc_state] [CRTC:8]
>[  921.932786] [drm:check_shared_dpll_state] PCH DPLL A
>[  921.932792] [drm:check_shared_dpll_state] PCH DPLL B
>[  922.104032] [drm:intel_crtc_cursor_set] cursor off
>[  922.104041] [drm:intel_crtc_set_config] [CRTC:5] [FB:56] #connectors=1 (x y) (0 0)
>[  922.104050] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  922.104057] [drm:intel_modeset_stage_output_state] [CONNECTOR:13:eDP-1] to [CRTC:5]
>[  922.104061] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:DP-1] to [CRTC:8]
>[  922.104065] [drm:intel_crtc_cursor_set] cursor off
>[  922.104070] [drm:intel_crtc_set_config] [CRTC:8] [FB:56] #connectors=1 (x y) (0 0)
>[  922.104075] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[  922.104079] [drm:intel_modeset_stage_output_state] [CONNECTOR:13:eDP-1] to [CRTC:5]
>[  922.104083] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:DP-1] to [CRTC:8]
>[  924.835552] [drm:edp_panel_vdd_off_sync] Turning eDP VDD off
>[  924.835562] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007

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Attachments on bug 77297: 97204 | 97792 | 99053 | 101151

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