Attachment 107055 Details for Bug 82885 – INTEL_DEBUG=fs output

INTEL_DEBUG=fs output

bug-82885-INTEL_DEBUG_fs.txt (text/plain), 6.80 KB, created by Samuel Iglesias Gonsálvez on 2014-09-29 10:01:45 UTC

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Creator: Samuel Iglesias Gonsálvez

Created: 2014-09-29 10:01:45 UTC

Size: 6.80 KB

patch

obsolete

>$ INTEL_DEBUG=fs bin/tex-miplevel-selection *GradARB Cube -fbo -auto 1> /dev/null
>GLSL IR for native fragment shader 0:
>(
>(declare (shader_in ) vec4 gl_Color)
>(declare (shader_out ) vec4 gl_FragColor)
>(function main
>  (signature void
>    (parameters
>    )
>    (
>      (assign  (xyzw) (var_ref gl_FragColor)  (var_ref gl_Color) ) 
>    ))
>
>)
>
>
>)
>
>Native code for unnamed fragment shader 0 (SIMD8 dispatch):
>SIMD8 shader: 5 instructions. 0 loops. Compacted 80 to 48 bytes (40%)
>   START B0
>   (declare (shader_in ) vec4 gl_Color)
>pln(8)          m1<1>F          g4<0,1,0>F      g2<8,8,1>F      { align1 1Q compacted };
>pln(8)          m2<1>F          g4.4<0,1,0>F    g2<8,8,1>F      { align1 1Q compacted };
>pln(8)          m3<1>F          g5<0,1,0>F      g2<8,8,1>F      { align1 1Q compacted };
>pln(8)          m4<1>F          g5.4<0,1,0>F    g2<8,8,1>F      { align1 1Q compacted };
>   FB write target 0
>sendc(8)        null            m1<8,8,1>F
>                            render RT write SIMD8 LastRT Surface = 0 mlen 4 rlen 0 { align1 1Q EOT };
>   END B0
>
>Native code for unnamed fragment shader 0 (SIMD16 dispatch):
>SIMD16 shader: 5 instructions. 0 loops. Compacted 80 to 48 bytes (40%)
>   START B0
>   (declare (shader_in ) vec4 gl_Color)
>pln(16)         m1<1>F          g6<0,1,0>F      g2<8,8,1>F      { align1 1H compacted };
>pln(16)         m3<1>F          g6.4<0,1,0>F    g2<8,8,1>F      { align1 1H compacted };
>pln(16)         m5<1>F          g7<0,1,0>F      g2<8,8,1>F      { align1 1H compacted };
>pln(16)         m7<1>F          g7.4<0,1,0>F    g2<8,8,1>F      { align1 1H compacted };
>   FB write target 0
>sendc(16)       null            m1<8,8,1>F
>                            render RT write SIMD16 LastRT Surface = 0 mlen 8 rlen 0 { align1 1H EOT };
>   END B0
>
>
>GLSL IR for native fragment shader 2:
>(
>(declare (shader_in ) vec4 gl_in_TexCoord0)
>(declare (shader_out ) vec4 gl_FragColor)
>(declare (uniform ) samplerCube tex)
>(declare (uniform ) vec3 dx)
>(declare (uniform ) vec3 dy)
>(function main
>  (signature void
>    (parameters
>    )
>    (
>      (declare (temporary ) vec3 flattening_tmp)
>      (declare (temporary ) float channel_expressions)
>      (assign  (x) (var_ref channel_expressions)  (expression float rcp (expression float max (expression float max (expression float abs (swiz x (var_ref gl_in_TexCoord0) )) (expression float abs (swiz y (var_ref gl_in_TexCoord0) )) ) (expression float abs (swiz z (var_ref gl_in_TexCoord0) )) ) ) ) 
>      (assign  (x) (var_ref flattening_tmp)  (expression float * (swiz x (var_ref gl_in_TexCoord0) )(var_ref channel_expressions) ) ) 
>      (assign  (y) (var_ref flattening_tmp)  (expression float * (swiz y (var_ref gl_in_TexCoord0) )(var_ref channel_expressions) ) ) 
>      (assign  (z) (var_ref flattening_tmp)  (expression float * (swiz z (var_ref gl_in_TexCoord0) )(var_ref channel_expressions) ) ) 
>      (assign  (xyzw) (var_ref gl_FragColor)  (txd vec4 (var_ref tex)  (var_ref flattening_tmp)  0 1 () ((var_ref dx)  (var_ref dy) ))) 
>    ))
>
>)
>
>
>)
>
>FS compile failed: Message length >MAX_SAMPLER_MESSAGE_SIZE disallowed by hardware
>
>Native code for unnamed fragment shader 2 (SIMD8 dispatch):
>SIMD8 shader: 21 instructions. 0 loops. Compacted 336 to 224 bytes (33%)
>   START B0
>   (declare (shader_in ) vec4 gl_in_TexCoord0)
>pln(8)          g7<1>F          g5<0,1,0>F      g2<8,8,1>F      { align1 1Q compacted };
>pln(8)          g8<1>F          g5.4<0,1,0>F    g2<8,8,1>F      { align1 1Q compacted };
>pln(8)          g9<1>F          g6<0,1,0>F      g2<8,8,1>F      { align1 1Q compacted };
>   (assign  (xyzw) (var_ref gl_FragColor)  (txd vec4 (var_ref tex)  (var_ref flattening_tmp)  0 1 () ((var_ref dx)  (var_ref dy) ))) 
>mov(8)          m6<1>F          g4<0,1,0>F                      { align1 1Q compacted };
>mov(8)          m7<1>F          g4.3<0,1,0>F                    { align1 1Q compacted };
>mov(8)          m8<1>F          g4.1<0,1,0>F                    { align1 1Q compacted };
>mov(8)          m9<1>F          g4.4<0,1,0>F                    { align1 1Q compacted };
>mov(8)          m10<1>F         g4.2<0,1,0>F                    { align1 1Q };
>mov(8)          m11<1>F         g4.5<0,1,0>F                    { align1 1Q compacted };
>   (assign  (x) (var_ref channel_expressions)  (expression float rcp (expression float max (expression float max (expression float abs (swiz x (var_ref gl_in_TexCoord0) )) (expression float abs (swiz y (var_ref gl_in_TexCoord0) )) ) (expression float abs (swiz z (var_ref gl_in_TexCoord0) )) ) ) ) 
>sel.ge(8)       g3<1>F          (abs)g7<8,8,1>F (abs)g8<8,8,1>F { align1 1Q };
>sel.ge(8)       g4<1>F          g3<8,8,1>F      (abs)g9<8,8,1>F { align1 1Q };
>math inv(8)     g2<1>F          g4<8,8,1>F      null            { align1 1Q };
>   (assign  (x) (var_ref flattening_tmp)  (expression float * (swiz x (var_ref gl_in_TexCoord0) )(var_ref channel_expressions) ) ) 
>mul(8)          m2<1>F          g7<8,8,1>F      g2<8,8,1>F      { align1 1Q compacted };
>   (assign  (y) (var_ref flattening_tmp)  (expression float * (swiz y (var_ref gl_in_TexCoord0) )(var_ref channel_expressions) ) ) 
>mul(8)          m3<1>F          g8<8,8,1>F      g2<8,8,1>F      { align1 1Q compacted };
>   (assign  (z) (var_ref flattening_tmp)  (expression float * (swiz z (var_ref gl_in_TexCoord0) )(var_ref channel_expressions) ) ) 
>mul(8)          m4<1>F          g9<8,8,1>F      g2<8,8,1>F      { align1 1Q compacted };
>   (assign  (xyzw) (var_ref gl_FragColor)  (txd vec4 (var_ref tex)  (var_ref flattening_tmp)  0 1 () ((var_ref dx)  (var_ref dy) ))) 
>send(8)         g2<1>UW         m2<8,8,1>F
>                            sampler (1, 0, 4, 1) mlen 10 rlen 4             { align1 1Q };
>   FB write target 0
>mov(8)          m1<1>F          g2<8,8,1>F                      { align1 1Q compacted };
>mov(8)          m2<1>F          g3<8,8,1>F                      { align1 1Q compacted };
>mov(8)          m3<1>F          g4<8,8,1>F                      { align1 1Q compacted };
>mov(8)          m4<1>F          g5<8,8,1>F                      { align1 1Q compacted };
>nop                                                             ;
>sendc(8)        null            m1<8,8,1>F
>                            render RT write SIMD8 LastRT Surface = 0 mlen 4 rlen 0 { align1 1Q EOT };
>   END B0
>
>
>GLSL IR for native fragment shader 5:
>(
>(declare (shader_out ) vec4 gl_FragColor)
>(declare (uniform ) vec4 color)
>(function main
>  (signature void
>    (parameters
>    )
>    (
>      (assign  (xyzw) (var_ref gl_FragColor)  (var_ref color) ) 
>    ))
>
>)
>
>
>)
>
>Native code for meta clear fragment shader 5 (SIMD16 dispatch):
>SIMD16 shader: 2 instructions. 0 loops. Compacted 32 to 32 bytes (0%)
>   START B0
>mov(4)          m1<1>F          g2<4,4,1>F                      { align1 WE_all };
>   FB write target 0
>sendc(16)       null            m1<8,8,1>F
>                            render RT write SIMD16/RepData LastRT Surface = 0 mlen 1 rlen 0 { align1 1H EOT };
>   END B0
>

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Attachments on bug 82885: 104998 | 107052 | 107053 | 107054 | 107055

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