Attachment 108936 Details for Bug 85902 – dmesg

dmesg

dmesg_bsw01_rc6_1105.txt (text/plain), 13.98 KB, created by lu hua on 2014-11-05 08:24:56 UTC

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Creator: lu hua

Created: 2014-11-05 08:24:56 UTC

Size: 13.98 KB

patch

obsolete

>[ 3842.891366] pm_rc6_residency: executing
>[ 3842.891717] [drm:i915_gem_open] 
>[ 3842.892004] [drm:valleyview_set_rps] GPU freq request from 208 MHz (20) to 624 MHz (60)
>[ 3842.893781] [drm:i915_gem_open] 
>[ 3842.893848] [drm:i915_gem_open] 
>[ 3842.993700] [drm:valleyview_set_rps] GPU freq request from 624 MHz (60) to 208 MHz (20)
>[ 3853.895470] pm_rc6_residency: starting subtest rc6-accuracy
>[ 3853.895979] [drm:valleyview_set_rps] GPU freq request from 208 MHz (20) to 624 MHz (60)
>[ 3853.898414] [drm:intel_crtc_set_config] [CRTC:8] [NOFB]
>[ 3853.898424] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[ 3853.898431] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[ 3853.898439] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[ 3853.898445] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=1, fb_changed=0
>[ 3853.898450] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[ 3853.898457] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[ 3853.898464] [drm:connected_sink_compute_bpp] [CONNECTOR:29:eDP-1] checking for sink bpp constrains
>[ 3853.898472] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[ 3853.898487] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[ 3853.898492] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[ 3853.898498] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[ 3853.898503] [drm:intel_dump_pipe_config] [CRTC:13][modeset] config for pipe B
>[ 3853.898506] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[ 3853.898510] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[ 3853.898516] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3853.898521] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[ 3853.898526] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[ 3853.898530] [drm:intel_dump_pipe_config] requested mode:
>[ 3853.898537] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[ 3853.898541] [drm:intel_dump_pipe_config] adjusted mode:
>[ 3853.898548] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[ 3853.898554] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[ 3853.898558] [drm:intel_dump_pipe_config] port clock: 270000
>[ 3853.898562] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[ 3853.898567] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 3853.898572] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 3853.898575] [drm:intel_dump_pipe_config] ips: 0
>[ 3853.898579] [drm:intel_dump_pipe_config] double wide: 0
>[ 3853.901997] [drm:intel_display_power_get] enabling pipe-a
>[ 3853.922042] [drm:intel_display_power_get] enabling dpio-common-bc
>[ 3853.934042] [drm:intel_display_power_get] enabling dpio-common-d
>[ 3853.998051] [drm:valleyview_set_rps] GPU freq request from 624 MHz (60) to 208 MHz (20)
>[ 3854.038138] [drm:vlv_init_panel_power_sequencer] initializing pipe B power sequencer for port C
>[ 3854.038151] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x87d00001, PP_OFF 0x1f40001, PP_DIV 0x270f06
>[ 3854.050135] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[ 3854.050145] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[ 3854.050154] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control 00000000
>[ 3854.479074] [drm:wait_panel_status] Wait complete
>[ 3854.479091] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[ 3854.479097] [drm:edp_panel_vdd_on] eDP port C panel power wasn't enabled
>[ 3854.680290] [drm:edp_panel_on] Turn eDP port C panel power on
>[ 3854.680303] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[ 3854.680312] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[ 3854.680317] [drm:wait_panel_status] Wait complete
>[ 3854.680324] [drm:wait_panel_on] Wait for panel power on
>[ 3854.680331] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd000b
>[ 3854.834089] [drm:wait_panel_status] Wait complete
>[ 3854.834102] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[ 3854.834113] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0003
>[ 3854.882090] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[ 3854.882103] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[ 3855.018111] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[ 3855.090093] [drm:intel_dp_start_link_train] clock recovery OK
>[ 3855.162097] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[ 3855.186200] [drm:g4x_check_srwm] SR watermark: display plane 107, cursor 2
>[ 3855.186207] [drm:g4x_check_srwm] SR watermark: display plane 211, cursor 2
>[ 3855.186214] [drm:cherryview_update_wm] Setting FIFO watermarks - A: plane=2, cursor=2, B: plane=61, cursor=2, C: plane=2, cursor=2, SR: plane=107, cursor=2
>[ 3855.186223] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[ 3855.186233] [drm:intel_edp_backlight_on] 
>[ 3855.186238] [drm:intel_panel_enable_backlight] pipe B
>[ 3855.186245] [drm:intel_panel_actually_set_backlight] set backlight PWM = 3906
>[ 3855.210112] [drm:i9xx_update_primary_plane] Writing base 000A0000 00000000 0 0 7680
>[ 3855.210134] [drm:intel_connector_check_state] [CONNECTOR:29:eDP-1]
>[ 3855.210149] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[ 3855.210154] [drm:check_encoder_state] [ENCODER:26:TMDS-26]
>[ 3855.210160] [drm:check_encoder_state] [ENCODER:28:TMDS-28]
>[ 3855.210165] [drm:check_encoder_state] [ENCODER:34:TMDS-34]
>[ 3855.210171] [drm:check_encoder_state] [ENCODER:36:TMDS-36]
>[ 3855.210177] [drm:check_crtc_state] [CRTC:8]
>[ 3855.210183] [drm:check_crtc_state] [CRTC:13]
>[ 3855.218152] [drm:check_crtc_state] [CRTC:18]
>[ 3855.218166] [drm:intel_crtc_set_config] [CRTC:18] [NOFB]
>[ 3855.218175] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:18], mode_changed=0, fb_changed=0
>[ 3855.218180] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[ 3857.785115] pm_rc6_residency: executing
>[ 3857.785453] [drm:i915_gem_open] 
>[ 3857.785727] [drm:valleyview_set_rps] GPU freq request from 208 MHz (20) to 624 MHz (60)
>[ 3857.787456] [drm:i915_gem_open] 
>[ 3857.787513] [drm:i915_gem_open] 
>[ 3857.895230] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[ 3857.895243] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[ 3857.917279] [drm:valleyview_set_rps] GPU freq request from 624 MHz (60) to 208 MHz (20)
>[ 3857.919523] [drm:intel_set_cpu_fifo_underrun_reporting [i915]] *ERROR* pipe B underrun
>[ 3857.919695] [drm:valleyview_pipestat_irq_handler [i915]] *ERROR* CPU pipe B FIFO underrun
>[ 3868.789404] pm_rc6_residency: starting subtest rc6-accuracy
>[ 3868.790328] [drm:valleyview_set_rps] GPU freq request from 208 MHz (20) to 624 MHz (60)
>[ 3868.791952] [drm:intel_crtc_set_config] [CRTC:8] [NOFB]
>[ 3868.791962] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[ 3868.791969] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[ 3868.791977] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[ 3868.791983] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=0, fb_changed=0
>[ 3868.791989] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[ 3868.791994] [drm:intel_crtc_set_config] [CRTC:18] [NOFB]
>[ 3868.791999] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:18], mode_changed=0, fb_changed=0
>[ 3868.792004] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[ 3868.891684] [drm:valleyview_set_rps] GPU freq request from 624 MHz (60) to 208 MHz (20)
>[ 3871.666080] pm_rc6_residency: executing
>[ 3871.666407] [drm:i915_gem_open] 
>[ 3871.666697] [drm:valleyview_set_rps] GPU freq request from 208 MHz (20) to 624 MHz (60)
>[ 3871.668113] [drm:i915_gem_open] 
>[ 3871.668167] [drm:i915_gem_open] 
>[ 3871.767984] [drm:valleyview_set_rps] GPU freq request from 624 MHz (60) to 208 MHz (20)
>[ 3882.669754] pm_rc6_residency: starting subtest rc6-accuracy
>[ 3882.670273] [drm:valleyview_set_rps] GPU freq request from 208 MHz (20) to 624 MHz (60)
>[ 3882.672598] [drm:intel_crtc_set_config] [CRTC:8] [NOFB]
>[ 3882.672608] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[ 3882.672614] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[ 3882.672622] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[ 3882.672629] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=0, fb_changed=0
>[ 3882.672634] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[ 3882.672639] [drm:intel_crtc_set_config] [CRTC:18] [NOFB]
>[ 3882.672645] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:18], mode_changed=0, fb_changed=0
>[ 3882.672650] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[ 3882.772313] [drm:valleyview_set_rps] GPU freq request from 624 MHz (60) to 208 MHz (20)
>[ 3944.301895] pm_rc6_residency: executing
>[ 3944.302550] [drm:i915_gem_open] 
>[ 3944.302873] [drm:valleyview_set_rps] GPU freq request from 208 MHz (20) to 624 MHz (60)
>[ 3944.304350] [drm:i915_gem_open] 
>[ 3944.304406] [drm:i915_gem_open] 
>[ 3944.404085] [drm:valleyview_set_rps] GPU freq request from 624 MHz (60) to 208 MHz (20)
>[ 3955.306203] pm_rc6_residency: starting subtest rc6-accuracy
>[ 3955.307105] [drm:valleyview_set_rps] GPU freq request from 208 MHz (20) to 624 MHz (60)
>[ 3955.308865] [drm:intel_crtc_set_config] [CRTC:8] [NOFB]
>[ 3955.308874] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[ 3955.308881] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[ 3955.308889] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[ 3955.308895] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=0, fb_changed=0
>[ 3955.308900] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[ 3955.308905] [drm:intel_crtc_set_config] [CRTC:18] [NOFB]
>[ 3955.308911] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:18], mode_changed=0, fb_changed=0
>[ 3955.308916] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[ 3955.408584] [drm:valleyview_set_rps] GPU freq request from 624 MHz (60) to 208 MHz (20)
>[ 3957.393323] pm_rc6_residency: executing
>[ 3957.393674] [drm:i915_gem_open] 
>[ 3957.394116] [drm:valleyview_set_rps] GPU freq request from 208 MHz (20) to 624 MHz (60)
>[ 3957.394374] [drm:valleyview_set_rps] GPU freq request from 624 MHz (60) to 416 MHz (40)
>[ 3957.394458] [drm:i915_gem_open] 
>[ 3957.394514] [drm:i915_gem_open] 
>[ 3957.395997] [drm:valleyview_set_rps] GPU freq request from 416 MHz (40) to 208 MHz (20)
>[ 3968.396519] pm_rc6_residency: starting subtest rc6-accuracy
>[ 3968.397036] [drm:valleyview_set_rps] GPU freq request from 208 MHz (20) to 624 MHz (60)
>[ 3968.398495] [drm:intel_crtc_set_config] [CRTC:8] [NOFB]
>[ 3968.398504] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[ 3968.398511] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[ 3968.398519] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[ 3968.398525] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=0, fb_changed=0
>[ 3968.398531] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[ 3968.398536] [drm:intel_crtc_set_config] [CRTC:18] [NOFB]
>[ 3968.398541] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:18], mode_changed=0, fb_changed=0
>[ 3968.398546] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[ 3968.498173] [drm:valleyview_set_rps] GPU freq request from 624 MHz (60) to 208 MHz (20)
>[ 3970.782482] pm_rc6_residency: executing
>[ 3970.782812] [drm:i915_gem_open] 
>[ 3970.783077] [drm:valleyview_set_rps] GPU freq request from 208 MHz (20) to 624 MHz (60)
>[ 3970.784609] [drm:i915_gem_open] 
>[ 3970.784673] [drm:i915_gem_open] 
>[ 3970.884275] [drm:valleyview_set_rps] GPU freq request from 624 MHz (60) to 208 MHz (20)
>[ 3981.786688] pm_rc6_residency: starting subtest rc6-accuracy
>[ 3981.787350] [drm:valleyview_set_rps] GPU freq request from 208 MHz (20) to 624 MHz (60)
>[ 3981.789125] [drm:intel_crtc_set_config] [CRTC:8] [NOFB]
>[ 3981.789138] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[ 3981.789145] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[ 3981.789156] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[ 3981.789162] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=0, fb_changed=0
>[ 3981.789168] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[ 3981.789173] [drm:intel_crtc_set_config] [CRTC:18] [NOFB]
>[ 3981.789179] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:18], mode_changed=0, fb_changed=0
>[ 3981.789183] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[ 3981.888775] [drm:valleyview_set_rps] GPU freq request from 624 MHz (60) to 208 MHz (20)

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Attachments on bug 85902: 108936

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