Attachment 109444 Details for Bug 86268 – dmesg

dmesg

dmesg_edp.log (text/plain), 123.51 KB, created by Li Xu on 2014-11-14 02:19:53 UTC

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Creator: Li Xu

Created: 2014-11-14 02:19:53 UTC

Size: 123.51 KB

patch

obsolete

>[    2.563036] option 1-3:1.1: GSM modem (1-port) converter detected
>[    2.563219] usb 1-3: GSM modem (1-port) converter now attached to ttyUSB1
>[    2.563291] option 1-3:1.2: GSM modem (1-port) converter detected
>[    2.563458] usb 1-3: GSM modem (1-port) converter now attached to ttyUSB2
>[    2.563543] option 1-3:1.5: GSM modem (1-port) converter detected
>[    2.563768] usb 1-3: GSM modem (1-port) converter now attached to ttyUSB3
>[    2.584286] tsc: Refined TSC clocksource calibration: 1359.955 MHz
>[    2.710324] usb 1-5: new full-speed USB device number 4 using xhci_hcd
>[    2.875126] usb 1-5: No LPM exit latency info found, disabling LPM.
>[    2.876443] usb 1-5: New USB device found, idVendor=8087, idProduct=0a2a
>[    2.876457] usb 1-5: New USB device strings: Mfr=0, Product=0, SerialNumber=0
>[    3.030382] usb 1-6: new high-speed USB device number 5 using xhci_hcd
>[    3.195173] usb 1-6: New USB device found, idVendor=0424, idProduct=4604
>[    3.195190] usb 1-6: New USB device strings: Mfr=0, Product=0, SerialNumber=0
>[    3.196496] hub 1-6:1.0: USB hub found
>[    3.196553] hub 1-6:1.0: 5 ports detected
>[    3.470519] usb 1-6.1: new high-speed USB device number 6 using xhci_hcd
>[    3.554802] usb 1-6.1: New USB device found, idVendor=1a40, idProduct=0101
>[    3.554820] usb 1-6.1: New USB device strings: Mfr=0, Product=1, SerialNumber=0
>[    3.554831] usb 1-6.1: Product: USB 2.0 Hub
>[    3.555955] hub 1-6.1:1.0: USB hub found
>[    3.556011] hub 1-6.1:1.0: 4 ports detected
>[    3.584592] Switched to clocksource tsc
>[    3.630365] usb 1-6.5: new high-speed USB device number 7 using xhci_hcd
>[    3.715139] usb 1-6.5: New USB device found, idVendor=0424, idProduct=2530
>[    3.715153] usb 1-6.5: New USB device strings: Mfr=0, Product=2, SerialNumber=0
>[    3.715164] usb 1-6.5: Product: Bridge device
>[    3.829564] usb 1-6.1.4: new high-speed USB device number 8 using xhci_hcd
>[    3.930250] usb 1-6.1.4: New USB device found, idVendor=0b95, idProduct=772a
>[    3.930263] usb 1-6.1.4: New USB device strings: Mfr=1, Product=2, SerialNumber=3
>[    3.930275] usb 1-6.1.4: Product: AX88x72A
>[    3.930283] usb 1-6.1.4: Manufacturer: ASIX Elec. Corp.
>[    3.930291] usb 1-6.1.4: SerialNumber: 0001E7
>[    4.237109] asix 1-6.1.4:1.0 eth0: register 'asix' at usb-0000:00:14.0-6.1.4, ASIX AX88772 USB 2.0 Ethernet, 8c:ae:4c:ec:98:aa
>[    5.432399] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[    5.432412] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0005
>[    5.492396] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[    5.492411] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000d
>[    5.718472] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    5.718482] [drm:intel_dp_drrs_init] VBT doesn't support DRRS
>[    5.718488] [drm:intel_edp_init_connector] using pipe B for initial backlight setup
>[    5.718503] [drm:intel_panel_setup_backlight] Connector eDP-1 backlight initialized, enabled, brightness 7812/7812
>[    5.718684] [drm:intel_dp_init_connector] Adding DP connector on port D
>[    5.718780] [drm:intel_dp_aux_init] registering DPDDC-D bus for card0-DP-2
>[    5.719194] [drm:intel_dsi_init] 
>[    5.719218] [drm:intel_modeset_readout_hw_state] [CRTC:8] hw state readout: disabled
>[    5.726498] [drm:intel_modeset_readout_hw_state] [CRTC:13] hw state readout: enabled
>[    5.726507] [drm:intel_modeset_readout_hw_state] [CRTC:18] hw state readout: disabled
>[    5.726515] [drm:intel_modeset_readout_hw_state] [ENCODER:21:TMDS-21] hw state readout: disabled, pipe A
>[    5.726522] [drm:intel_modeset_readout_hw_state] [ENCODER:26:TMDS-26] hw state readout: disabled, pipe A
>[    5.726533] [drm:intel_dp_get_config] pipe has 24 bpp for eDP panel, overriding BIOS-provided max 18 bpp
>[    5.726538] [drm:intel_modeset_readout_hw_state] [ENCODER:28:TMDS-28] hw state readout: enabled, pipe B
>[    5.726545] [drm:intel_modeset_readout_hw_state] [ENCODER:34:TMDS-34] hw state readout: disabled, pipe A
>[    5.726551] [drm:intel_modeset_readout_hw_state] [ENCODER:36:TMDS-36] hw state readout: disabled, pipe A
>[    5.726557] [drm:intel_modeset_readout_hw_state] [CONNECTOR:29:eDP-1] hw state readout: enabled
>[    5.726564] [drm:intel_modeset_readout_hw_state] [CONNECTOR:22:HDMI-A-1] hw state readout: disabled
>[    5.726570] [drm:intel_modeset_readout_hw_state] [CONNECTOR:27:DP-1] hw state readout: disabled
>[    5.726577] [drm:intel_modeset_readout_hw_state] [CONNECTOR:35:HDMI-A-2] hw state readout: disabled
>[    5.726583] [drm:intel_modeset_readout_hw_state] [CONNECTOR:37:DP-2] hw state readout: disabled
>[    5.726591] [drm:i915_get_vblank_timestamp] crtc 0 is disabled
>[    5.726598] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe A
>[    5.726602] [drm:i915_get_vblank_timestamp] crtc 0 is disabled
>[    5.726606] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe A
>[    5.726612] [drm:intel_dump_pipe_config] [CRTC:8][setup_hw_state] config for pipe A
>[    5.726616] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[    5.726620] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0
>[    5.726625] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    5.726630] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    5.726635] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    5.726638] [drm:intel_dump_pipe_config] requested mode:
>[    5.726645] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    5.726649] [drm:intel_dump_pipe_config] adjusted mode:
>[    5.726655] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    5.726661] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[    5.726664] [drm:intel_dump_pipe_config] port clock: 0
>[    5.726668] [drm:intel_dump_pipe_config] pipe src size: 0x0
>[    5.726673] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    5.726677] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    5.726681] [drm:intel_dump_pipe_config] ips: 0
>[    5.726684] [drm:intel_dump_pipe_config] double wide: 0
>[    5.726692] [drm:intel_dump_pipe_config] [CRTC:13][setup_hw_state] config for pipe B
>[    5.726696] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[    5.726700] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    5.726705] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    5.726710] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[    5.726715] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    5.726719] [drm:intel_dump_pipe_config] requested mode:
>[    5.726725] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 1920 0 0 0 1080 0 0 0 0x0 0x0
>[    5.726729] [drm:intel_dump_pipe_config] adjusted mode:
>[    5.726735] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0xa
>[    5.726741] [drm:intel_dump_crtc_timings] crtc timings: 138779 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x0 flags: 0xa
>[    5.726745] [drm:intel_dump_pipe_config] port clock: 270000
>[    5.726748] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    5.726753] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    5.726757] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    5.726761] [drm:intel_dump_pipe_config] ips: 0
>[    5.726764] [drm:intel_dump_pipe_config] double wide: 0
>[    5.726770] [drm:i915_get_vblank_timestamp] crtc 2 is disabled
>[    5.726775] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe C
>[    5.726779] [drm:i915_get_vblank_timestamp] crtc 2 is disabled
>[    5.726783] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe C
>[    5.726787] [drm:intel_dump_pipe_config] [CRTC:18][setup_hw_state] config for pipe C
>[    5.726791] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[    5.726795] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0
>[    5.726800] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    5.726805] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    5.726810] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    5.726813] [drm:intel_dump_pipe_config] requested mode:
>[    5.726819] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    5.726823] [drm:intel_dump_pipe_config] adjusted mode:
>[    5.726829] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    5.726834] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[    5.726838] [drm:intel_dump_pipe_config] port clock: 0
>[    5.726842] [drm:intel_dump_pipe_config] pipe src size: 0x0
>[    5.726846] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    5.726851] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    5.726854] [drm:intel_dump_pipe_config] ips: 0
>[    5.726858] [drm:intel_dump_pipe_config] double wide: 0
>[    5.726864] [drm:intel_connector_check_state] [CONNECTOR:29:eDP-1]
>[    5.726874] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[    5.726880] [drm:check_encoder_state] [ENCODER:26:TMDS-26]
>[    5.726885] [drm:check_encoder_state] [ENCODER:28:TMDS-28]
>[    5.726890] [drm:check_encoder_state] [ENCODER:34:TMDS-34]
>[    5.726896] [drm:check_encoder_state] [ENCODER:36:TMDS-36]
>[    5.726901] [drm:check_crtc_state] [CRTC:8]
>[    5.726907] [drm:check_crtc_state] [CRTC:13]
>[    5.734482] [drm:check_crtc_state] [CRTC:18]
>[    5.734502] [drm:i9xx_get_plane_config] pipe/plane 1/1 with fb: size=1920x1080@32, offset=0, pitch 7680, size 0x7e9000
>[    5.734513] [drm:i915_gem_setup_global_gtt] clearing unused GTT space: [0, 7ffff000]
>[    5.739869] [drm:gen8_ppgtt_init] Allocated 2 pages for page directories (0 wasted)
>[    5.739874] [drm:gen8_ppgtt_init] Allocated 1024 pages for page tables (0 wasted)
>[    5.739959] [drm:i915_gem_context_init] HW context support initialized
>[    5.739986] [drm:init_status_page] render ring hws offset: 0x00013000
>[    5.740176] [drm:intel_init_pipe_control] render ring pipe control offset: 0x00036000
>[    5.740201] [drm:init_status_page] bsd ring hws offset: 0x00037000
>[    5.740369] [drm:init_status_page] blitter ring hws offset: 0x0005a000
>[    5.740550] [drm:init_status_page] video enhancement ring hws offset: 0x0007d000
>[    5.740728] [drm:intel_ring_workarounds_emit] Number of Workarounds emitted: 2
>[    5.742459] [drm:cherryview_init_gt_powersave] DDR speed: 1600 MHz
>[    5.744506] [drm:cherryview_init_gt_powersave] max GPU freq: 600 MHz (60)
>[    5.746454] [drm:cherryview_init_gt_powersave] RPe GPU freq: 400 MHz (40)
>[    5.748549] [drm:cherryview_init_gt_powersave] RP1(Guar) GPU freq: 400 MHz (40)
>[    5.750458] [drm:cherryview_init_gt_powersave] min GPU freq: 200 MHz (20)
>[    5.750466] [drm:vlv_update_cdclk] Current CD clock rate: 400000 kHz
>[    5.750609] [drm:intel_backlight_device_register] Connector eDP-1 backlight sysfs interface registered
>[    5.750646] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:29:eDP-1]
>[    5.750652] [drm:intel_dp_detect] [CONNECTOR:29:eDP-1]
>[    5.756651] ACPI: Video Device [GFX0] (multi-head: yes  rom: no  post: no)
>[    5.756859] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:00/input/input9
>[    5.757042] [drm] Initialized i915 1.6.0 20141107 for 0000:00:02.0 on minor 0
>[    5.810410] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[    5.858410] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[    5.870426] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    5.870435] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:29:eDP-1] probed modes :
>[    5.870443] [drm:drm_mode_debug_printmodeline] Modeline 30:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    5.870449] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:22:HDMI-A-1]
>[    5.870453] [drm:intel_hdmi_detect] [CONNECTOR:22:HDMI-A-1]
>[    5.882716] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[    5.882721] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[    5.894411] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:22:HDMI-A-1] disconnected
>[    5.894417] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:27:DP-1]
>[    5.894422] [drm:intel_dp_detect] [CONNECTOR:27:DP-1]
>[    5.918411] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:27:DP-1] disconnected
>[    5.918418] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:HDMI-A-2]
>[    5.918422] [drm:intel_hdmi_detect] [CONNECTOR:35:HDMI-A-2]
>[    5.930644] [drm:gmbus_xfer] GMBUS [i915 gmbus panel] NAK for addr: 0050 r(1)
>[    5.930650] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus panel
>[    5.942413] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:HDMI-A-2] disconnected
>[    5.942420] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:37:DP-2]
>[    5.942424] [drm:intel_dp_detect] [CONNECTOR:37:DP-2]
>[    5.966414] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:37:DP-2] disconnected
>[    5.966420] [drm:drm_setup_crtcs] 
>[    5.966425] [drm:drm_enable_connectors] connector 29 enabled? yes
>[    5.966429] [drm:drm_enable_connectors] connector 22 enabled? no
>[    5.966433] [drm:drm_enable_connectors] connector 27 enabled? no
>[    5.966437] [drm:drm_enable_connectors] connector 35 enabled? no
>[    5.966441] [drm:drm_enable_connectors] connector 37 enabled? no
>[    5.966446] [drm:intel_fb_initial_config] looking for cmdline mode on connector eDP-1
>[    5.966450] [drm:intel_fb_initial_config] looking for preferred mode on connector eDP-1
>[    5.966455] [drm:intel_fb_initial_config] connector eDP-1 on pipe B [CRTC:13]: 1920x1080
>[    5.966459] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping
>[    5.966462] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping
>[    5.966466] [drm:intel_fb_initial_config] connector HDMI-A-2 not enabled, skipping
>[    5.966470] [drm:intel_fb_initial_config] connector DP-2 not enabled, skipping
>[    5.966474] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 13
>[    5.966481] [drm:intelfb_create] no BIOS fb, allocating a new one
>[    5.973203] [drm:intelfb_create] allocated 1920x1080 fb: 0x000a0000, bo ffff880002e6c000
>[    5.973447] fbcon: inteldrmfb (fb0) is primary device
>[    5.973618] [drm:intel_crtc_set_config] [CRTC:8] [NOFB]
>[    5.973625] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[    5.973629] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[    5.973634] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    5.973638] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[    5.973641] [drm:intel_set_config_compute_mode_changes] crtc has no fb, will flip
>[    5.973643] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[    5.973648] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    5.973653] [drm:drm_mode_debug_printmodeline] Modeline 38:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    5.973656] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=1, fb_changed=1
>[    5.973659] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[    5.973662] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[    5.973667] [drm:connected_sink_compute_bpp] [CONNECTOR:29:eDP-1] checking for sink bpp constrains
>[    5.973678] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[    5.973692] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    5.973694] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[    5.973698] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    5.973701] [drm:intel_dump_pipe_config] [CRTC:13][modeset] config for pipe B
>[    5.973702] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[    5.973704] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    5.973708] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    5.973711] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[    5.973714] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    5.973716] [drm:intel_dump_pipe_config] requested mode:
>[    5.973721] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    5.973722] [drm:intel_dump_pipe_config] adjusted mode:
>[    5.973727] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    5.973731] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[    5.973733] [drm:intel_dump_pipe_config] port clock: 270000
>[    5.973735] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    5.973737] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    5.973740] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    5.973742] [drm:intel_dump_pipe_config] ips: 0
>[    5.973743] [drm:intel_dump_pipe_config] double wide: 0
>[    5.973751] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[    5.997415] [drm:intel_edp_backlight_off] 
>[    6.222569] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[    6.258430] [drm:edp_panel_off] Turn eDP port C panel power off
>[    6.258435] [drm:wait_panel_off] Wait for panel power off time
>[    6.258441] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[    6.299800] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00100000, dig 0x00000000
>[    6.299804] [drm:intel_hpd_irq_handler] digital hpd port C - long
>[    6.299807] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 5 - cnt: 0
>[    6.299851] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port C
>[    6.302478] [drm:wait_panel_status] Wait complete
>[    6.342434] [drm:intel_dp_link_down] 
>[    6.417488] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[    6.417494] [drm:cherryview_update_wm] Setting FIFO watermarks - A: plane=2, cursor=2, B: plane=2, cursor=2, C: plane=2, cursor=2, SR: plane=0, cursor=0
>[    6.447435] [drm:intel_display_power_put] disabling always-on
>[    6.549442] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[    6.549445] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[    6.859458] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[    6.859462] [drm:wait_panel_status] Wait complete
>[    6.859468] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[    6.859471] [drm:edp_panel_vdd_on] eDP port C panel power wasn't enabled
>[    6.892129] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00100000, dig 0x00000000
>[    6.892133] [drm:intel_hpd_irq_handler] digital hpd port C - long
>[    6.892136] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 5 - cnt: 1
>[    6.892182] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port C
>[    7.060652] [drm:edp_panel_on] Turn eDP port C panel power on
>[    7.060658] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[    7.060665] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[    7.060668] [drm:wait_panel_status] Wait complete
>[    7.060673] [drm:wait_panel_on] Wait for panel power on
>[    7.060677] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd000b
>[    7.214532] [drm:wait_panel_status] Wait complete
>[    7.214538] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[    7.214546] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0003
>[    7.262475] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[    7.262483] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[    7.398484] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[    7.470484] [drm:intel_dp_start_link_train] clock recovery OK
>[    7.542485] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[    7.566546] [drm:g4x_check_srwm] SR watermark: display plane 107, cursor 2
>[    7.566549] [drm:g4x_check_srwm] SR watermark: display plane 211, cursor 2
>[    7.566553] [drm:cherryview_update_wm] Setting FIFO watermarks - A: plane=2, cursor=2, B: plane=61, cursor=2, C: plane=2, cursor=2, SR: plane=107, cursor=2
>[    7.566558] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[    7.566567] [drm:intel_edp_backlight_on] 
>[    7.566570] [drm:intel_panel_enable_backlight] pipe B
>[    7.566574] [drm:intel_panel_actually_set_backlight] set backlight PWM = 7812
>[    7.590499] [drm:i9xx_update_primary_plane] Writing base 000A0000 00000000 0 0 7680
>[    7.590516] [drm:intel_connector_check_state] [CONNECTOR:29:eDP-1]
>[    7.590528] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[    7.590531] [drm:check_encoder_state] [ENCODER:26:TMDS-26]
>[    7.590535] [drm:check_encoder_state] [ENCODER:28:TMDS-28]
>[    7.590538] [drm:check_encoder_state] [ENCODER:34:TMDS-34]
>[    7.590542] [drm:check_encoder_state] [ENCODER:36:TMDS-36]
>[    7.590545] [drm:check_crtc_state] [CRTC:8]
>[    7.590549] [drm:check_crtc_state] [CRTC:13]
>[    7.598495] [drm:check_crtc_state] [CRTC:18]
>[    7.598504] [drm:intel_crtc_set_config] [CRTC:18] [NOFB]
>[    7.598509] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:18], mode_changed=0, fb_changed=0
>[    7.598512] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[    7.598517] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    7.598533] Console: switching to colour frame buffer device 240x67
>[    7.598552] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[    7.598556] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=0, fb_changed=0
>[    7.598559] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[    7.598563] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[    7.598567] [drm:connected_sink_compute_bpp] [CONNECTOR:29:eDP-1] checking for sink bpp constrains
>[    7.598573] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[    7.598586] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    7.598588] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[    7.598591] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    7.598594] [drm:intel_dump_pipe_config] [CRTC:13][modeset] config for pipe B
>[    7.598596] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[    7.598598] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    7.598601] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    7.598604] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[    7.598607] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    7.598609] [drm:intel_dump_pipe_config] requested mode:
>[    7.598614] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    7.598616] [drm:intel_dump_pipe_config] adjusted mode:
>[    7.598620] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    7.598625] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[    7.598626] [drm:intel_dump_pipe_config] port clock: 270000
>[    7.598628] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    7.598631] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    7.598633] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    7.598635] [drm:intel_dump_pipe_config] ips: 0
>[    7.598636] [drm:intel_dump_pipe_config] double wide: 0
>[    7.621452] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device
>[    7.621569] i915 0000:00:02.0: registered panic notifier
>[    7.633628] dracut: Starting plymouth daemon
>[    7.654094] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[    7.654102] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=0, fb_changed=0
>[    7.654105] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[    7.654110] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[    7.654115] [drm:connected_sink_compute_bpp] [CONNECTOR:29:eDP-1] checking for sink bpp constrains
>[    7.654121] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[    7.654134] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    7.654136] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[    7.654141] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    7.654144] [drm:intel_dump_pipe_config] [CRTC:13][modeset] config for pipe B
>[    7.654145] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[    7.654147] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    7.654150] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    7.654154] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[    7.654157] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    7.654158] [drm:intel_dump_pipe_config] requested mode:
>[    7.654164] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    7.654165] [drm:intel_dump_pipe_config] adjusted mode:
>[    7.654170] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    7.654174] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[    7.654176] [drm:intel_dump_pipe_config] port clock: 270000
>[    7.654177] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    7.654180] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    7.654182] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    7.654184] [drm:intel_dump_pipe_config] ips: 0
>[    7.654185] [drm:intel_dump_pipe_config] double wide: 0
>[    7.694967] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[    7.694975] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=0, fb_changed=0
>[    7.694979] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[    7.694983] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[    7.694988] [drm:connected_sink_compute_bpp] [CONNECTOR:29:eDP-1] checking for sink bpp constrains
>[    7.694994] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[    7.695007] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    7.695009] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[    7.695013] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    7.695016] [drm:intel_dump_pipe_config] [CRTC:13][modeset] config for pipe B
>[    7.695018] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[    7.695020] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    7.695023] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    7.695026] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[    7.695029] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    7.695031] [drm:intel_dump_pipe_config] requested mode:
>[    7.695036] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    7.695037] [drm:intel_dump_pipe_config] adjusted mode:
>[    7.695042] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    7.695046] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[    7.695048] [drm:intel_dump_pipe_config] port clock: 270000
>[    7.695050] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    7.695052] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    7.695055] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    7.695056] [drm:intel_dump_pipe_config] ips: 0
>[    7.695058] [drm:intel_dump_pipe_config] double wide: 0
>[    7.748514] [drm:cherryview_enable_rps] GT fifo had a previous error 1080000
>[    7.748534] [drm:cherryview_enable_rps] PCBR offset : 0x7edf8001
>[    7.750513] [drm:cherryview_enable_rps] GPLL enabled? yes
>[    7.750522] [drm:cherryview_enable_rps] GPU status: 0x00282810
>[    7.750527] [drm:cherryview_enable_rps] current GPU freq: 400 MHz (40)
>[    7.750531] [drm:cherryview_enable_rps] setting GPU freq to 400 MHz (40)
>[    7.752705] [drm:valleyview_set_rps] GPU freq request from 400 MHz (40) to 200 MHz (20)
>[    7.956519] ACPI: Deprecated procfs I/F for AC is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared
>[    7.956896] ACPI: AC Adapter [ADP1] (on-line)
>[    7.975975] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared
>[    7.976169] ACPI: Battery Slot [BAT0] (battery present)
>[    7.976358] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared
>[    7.976569] ACPI: Battery Slot [BAT1] (battery absent)
>[    7.996109] r8169 Gigabit Ethernet driver 2.3LK-NAPI loaded
>[    7.996235] r8169 0000:03:00.0: can't disable ASPM; OS doesn't have ASPM control
>[    7.996380] r8169 0000:03:00.0: enabling device (0000 -> 0003)
>[    7.998838] ACPI Warning: SystemIO range 0x0000000000002040-0x000000000000205f conflicts with OpRegion 0x0000000000002040-0x000000000000204f (\_SB_.PCI0.SBUS.SMBI) (20140926/utaddress-258)
>[    7.999159] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
>[    7.999303] input: PC Speaker as /devices/platform/pcspkr/input/input10
>[    8.008532] r8169 0000:03:00.0: irq 118 for MSI/MSI-X
>[    8.009188] r8169 0000:03:00.0 eth1: RTL8168g/8111g at 0xffffc9000066c000, 00:e0:4c:68:00:88, XID 0c000800 IRQ 118
>[    8.009379] r8169 0000:03:00.0 eth1: jumbo features [frames: 9200 bytes, tx checksumming: ko]
>[    8.024656] snd_hda_intel 0000:00:1b.0: irq 119 for MSI/MSI-X
>[    8.032822] iTCO_vendor_support: vendor-support=0
>[    8.033283] iTCO_wdt: Intel TCO WatchDog Timer Driver v1.11
>[    8.033465] iTCO_wdt: unable to reset NO_REBOOT flag, device disabled by hardware/BIOS
>[    8.041590] sound hdaudioC0D0: autoconfig: line_outs=1 (0x1b/0x0/0x0/0x0/0x0) type:line
>[    8.041744] sound hdaudioC0D0:    speaker_outs=1 (0x14/0x0/0x0/0x0/0x0)
>[    8.041864] sound hdaudioC0D0:    hp_outs=1 (0x21/0x0/0x0/0x0/0x0)
>[    8.041973] sound hdaudioC0D0:    mono: mono_out=0x0
>[    8.042061] sound hdaudioC0D0:    dig-out=0x1e/0x0
>[    8.042146] sound hdaudioC0D0:    inputs:
>[    8.042220] sound hdaudioC0D0:      Internal Mic=0x12
>[    8.042312] sound hdaudioC0D0:      Rear Mic=0x19
>[    8.042397] sound hdaudioC0D0:      Front Mic=0x18
>[    8.042484] sound hdaudioC0D0:      Line=0x1a
>[    8.048294] r8169 0000:03:00.0 p2p1: renamed from eth1
>[    8.048767] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[    8.048774] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=0, fb_changed=0
>[    8.048778] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[    8.048783] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[    8.048789] [drm:connected_sink_compute_bpp] [CONNECTOR:29:eDP-1] checking for sink bpp constrains
>[    8.048795] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[    8.048808] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    8.048810] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[    8.048815] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    8.048817] [drm:intel_dump_pipe_config] [CRTC:13][modeset] config for pipe B
>[    8.048819] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[    8.048821] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    8.048824] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    8.048828] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[    8.048831] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    8.048832] [drm:intel_dump_pipe_config] requested mode:
>[    8.048838] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    8.048839] [drm:intel_dump_pipe_config] adjusted mode:
>[    8.048844] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    8.048848] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[    8.048850] [drm:intel_dump_pipe_config] port clock: 270000
>[    8.048852] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    8.048854] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    8.048856] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    8.048858] [drm:intel_dump_pipe_config] ips: 0
>[    8.048860] [drm:intel_dump_pipe_config] double wide: 0
>[    8.096891] EXT4-fs (sda3): INFO: recovery required on readonly filesystem
>[    8.097033] EXT4-fs (sda3): write access will be enabled during recovery
>[    8.181909] EXT4-fs (sda3): orphan cleanup on readonly fs
>[    8.184904] EXT4-fs (sda3): 4 orphan inodes deleted
>[    8.184997] EXT4-fs (sda3): recovery complete
>[    8.232623] EXT4-fs (sda3): mounted filesystem with ordered data mode. Opts: (null)
>[    8.293319] dracut: Checking ext4: /dev/sda3
>[    8.293915] dracut: issuing e2fsck -a  /dev/sda3
>[    8.322808] dracut: /dev/sda3: clean, 626691/4751360 files, 7631209/19000576 blocks
>[    8.324235] dracut: Remounting /dev/sda3 with -o errors=remount-ro,ro
>[    8.341419] EXT4-fs (sda3): mounted filesystem with ordered data mode. Opts: errors=remount-ro
>[    8.356132] dracut: Mounted root filesystem /dev/sda3
>[    8.394417] device-mapper: uevent: version 1.0.3
>[    8.400601] device-mapper: ioctl: 4.28.0-ioctl (2014-09-17) initialised: dm-devel@redhat.com
>[    8.444536] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[    8.444549] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[    8.495289] dracut: Switching root
>[    8.566645] random: init urandom read with 73 bits of entropy available
>[    8.615166] init: plymouth-upstart-bridge main process (2484) terminated with status 1
>[    8.621400] init: plymouth-upstart-bridge main process ended, respawning
>[    8.642509] init: plymouth-upstart-bridge main process (2494) terminated with status 1
>[    8.648632] init: plymouth-upstart-bridge main process ended, respawning
>[    8.655032] init: ureadahead main process (2487) terminated with status 5
>[    8.983558] systemd-udevd[2610]: starting version 204
>[    9.370143] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[    9.370151] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=0, fb_changed=0
>[    9.370155] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[    9.370160] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[    9.370164] [drm:connected_sink_compute_bpp] [CONNECTOR:29:eDP-1] checking for sink bpp constrains
>[    9.370171] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[    9.370184] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    9.370186] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[    9.370190] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    9.370194] [drm:intel_dump_pipe_config] [CRTC:13][modeset] config for pipe B
>[    9.370195] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[    9.370197] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    9.370200] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    9.370204] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[    9.370207] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    9.370208] [drm:intel_dump_pipe_config] requested mode:
>[    9.370214] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    9.370215] [drm:intel_dump_pipe_config] adjusted mode:
>[    9.370220] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    9.370224] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[    9.370226] [drm:intel_dump_pipe_config] port clock: 270000
>[    9.370228] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    9.370230] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    9.370233] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    9.370234] [drm:intel_dump_pipe_config] ips: 0
>[    9.370236] [drm:intel_dump_pipe_config] double wide: 0
>[    9.445974] systemd-udevd[2911]: could not open moddep file '/lib/modules/3.18.0-rc4_drm-intel-nightly_22ba72_20141113+/modules.dep.bin'
>[    9.463085] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[    9.463093] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=0, fb_changed=0
>[    9.463097] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[    9.463102] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[    9.463107] [drm:connected_sink_compute_bpp] [CONNECTOR:29:eDP-1] checking for sink bpp constrains
>[    9.463114] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[    9.463127] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    9.463129] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[    9.463134] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    9.463137] [drm:intel_dump_pipe_config] [CRTC:13][modeset] config for pipe B
>[    9.463138] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[    9.463140] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    9.463143] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    9.463147] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[    9.463150] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    9.463151] [drm:intel_dump_pipe_config] requested mode:
>[    9.463157] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    9.463158] [drm:intel_dump_pipe_config] adjusted mode:
>[    9.463163] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    9.463167] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[    9.463169] [drm:intel_dump_pipe_config] port clock: 270000
>[    9.463171] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    9.463173] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    9.463176] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    9.463177] [drm:intel_dump_pipe_config] ips: 0
>[    9.463179] [drm:intel_dump_pipe_config] double wide: 0
>[    9.497837] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[    9.497845] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=0, fb_changed=0
>[    9.497849] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[    9.497854] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[    9.497859] [drm:connected_sink_compute_bpp] [CONNECTOR:29:eDP-1] checking for sink bpp constrains
>[    9.497866] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[    9.497880] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    9.497882] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[    9.497887] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    9.497890] [drm:intel_dump_pipe_config] [CRTC:13][modeset] config for pipe B
>[    9.497891] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[    9.497893] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    9.497896] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    9.497900] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[    9.497903] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    9.497904] [drm:intel_dump_pipe_config] requested mode:
>[    9.497910] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    9.497911] [drm:intel_dump_pipe_config] adjusted mode:
>[    9.497916] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    9.497921] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[    9.497922] [drm:intel_dump_pipe_config] port clock: 270000
>[    9.497924] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    9.497927] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    9.497929] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    9.497931] [drm:intel_dump_pipe_config] ips: 0
>[    9.497932] [drm:intel_dump_pipe_config] double wide: 0
>[    9.523304] [drm:i915_gem_open] 
>[    9.523386] [drm:intel_crtc_set_config] [CRTC:8] [NOFB]
>[    9.523396] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[    9.523402] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[    9.523409] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    9.523416] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[    9.523423] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=0, fb_changed=0
>[    9.523428] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[    9.523433] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[    9.523440] [drm:connected_sink_compute_bpp] [CONNECTOR:29:eDP-1] checking for sink bpp constrains
>[    9.523448] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[    9.523464] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    9.523468] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[    9.523474] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    9.523479] [drm:intel_dump_pipe_config] [CRTC:13][modeset] config for pipe B
>[    9.523483] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[    9.523487] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    9.523492] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    9.523498] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[    9.523503] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    9.523506] [drm:intel_dump_pipe_config] requested mode:
>[    9.523514] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    9.523517] [drm:intel_dump_pipe_config] adjusted mode:
>[    9.523524] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    9.523530] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[    9.523534] [drm:intel_dump_pipe_config] port clock: 270000
>[    9.523538] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    9.523542] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    9.523547] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    9.523550] [drm:intel_dump_pipe_config] ips: 0
>[    9.523554] [drm:intel_dump_pipe_config] double wide: 0
>[    9.523579] [drm:intel_crtc_set_config] [CRTC:18] [NOFB]
>[    9.523585] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:18], mode_changed=0, fb_changed=0
>[    9.523590] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[    9.523595] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    9.523630] [drm:i915_gem_open] 
>[    9.523673] [drm:intel_crtc_set_config] [CRTC:8] [NOFB]
>[    9.523680] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[    9.523685] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[    9.523690] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    9.523696] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[    9.523702] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=0, fb_changed=0
>[    9.523706] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[    9.523711] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[    9.523717] [drm:connected_sink_compute_bpp] [CONNECTOR:29:eDP-1] checking for sink bpp constrains
>[    9.523723] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[    9.523735] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    9.523739] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[    9.523745] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    9.523749] [drm:intel_dump_pipe_config] [CRTC:13][modeset] config for pipe B
>[    9.523753] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[    9.523757] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    9.523762] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    9.523767] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[    9.523772] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    9.523776] [drm:intel_dump_pipe_config] requested mode:
>[    9.523782] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    9.523786] [drm:intel_dump_pipe_config] adjusted mode:
>[    9.523793] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    9.523799] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[    9.523803] [drm:intel_dump_pipe_config] port clock: 270000
>[    9.523807] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    9.523811] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    9.523816] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    9.523819] [drm:intel_dump_pipe_config] ips: 0
>[    9.523823] [drm:intel_dump_pipe_config] double wide: 0
>[    9.523828] [drm:intel_crtc_set_config] [CRTC:18] [NOFB]
>[    9.523833] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:18], mode_changed=0, fb_changed=0
>[    9.523836] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[    9.523839] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    9.523865] [drm:i915_gem_open] 
>[    9.523982] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[5]
>[    9.523990] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[5]
>[    9.524007] [drm:drm_mode_getconnector] [CONNECTOR:29:?]
>[    9.524014] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:29:eDP-1]
>[    9.524019] [drm:intel_dp_detect] [CONNECTOR:29:eDP-1]
>[    9.558624] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[    9.558633] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[    9.594690] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[    9.642650] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[    9.654758] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    9.654765] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:29:eDP-1] probed modes :
>[    9.654771] [drm:drm_mode_debug_printmodeline] Modeline 30:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    9.654790] [drm:drm_mode_getconnector] [CONNECTOR:29:?]
>[    9.670488] [drm:drm_mode_getconnector] [CONNECTOR:22:?]
>[    9.670499] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:22:HDMI-A-1]
>[    9.670505] [drm:intel_hdmi_detect] [CONNECTOR:22:HDMI-A-1]
>[    9.681839] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[    9.681849] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[    9.691606] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:22:HDMI-A-1] disconnected
>[    9.691627] [drm:drm_mode_getconnector] [CONNECTOR:22:?]
>[    9.691633] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:22:HDMI-A-1]
>[    9.691638] [drm:intel_hdmi_detect] [CONNECTOR:22:HDMI-A-1]
>[    9.703879] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[    9.703889] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[    9.704236] EXT4-fs (sda3): re-mounted. Opts: errors=remount-ro
>[    9.715602] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:22:HDMI-A-1] disconnected
>[    9.715628] [drm:drm_mode_getconnector] [CONNECTOR:27:?]
>[    9.715635] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:27:DP-1]
>[    9.715640] [drm:intel_dp_detect] [CONNECTOR:27:DP-1]
>[    9.739612] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:27:DP-1] disconnected
>[    9.739633] [drm:drm_mode_getconnector] [CONNECTOR:27:?]
>[    9.739639] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:27:DP-1]
>[    9.739644] [drm:intel_dp_detect] [CONNECTOR:27:DP-1]
>[    9.763594] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:27:DP-1] disconnected
>[    9.763621] [drm:drm_mode_getconnector] [CONNECTOR:35:?]
>[    9.763628] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:HDMI-A-2]
>[    9.763632] [drm:intel_hdmi_detect] [CONNECTOR:35:HDMI-A-2]
>[    9.775839] [drm:gmbus_xfer] GMBUS [i915 gmbus panel] NAK for addr: 0050 r(1)
>[    9.775847] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus panel
>[    9.787597] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:HDMI-A-2] disconnected
>[    9.787649] [drm:drm_mode_getconnector] [CONNECTOR:35:?]
>[    9.787656] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:HDMI-A-2]
>[    9.787661] [drm:intel_hdmi_detect] [CONNECTOR:35:HDMI-A-2]
>[    9.799855] [drm:gmbus_xfer] GMBUS [i915 gmbus panel] NAK for addr: 0050 r(1)
>[    9.799865] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus panel
>[    9.811771] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:HDMI-A-2] disconnected
>[    9.811798] [drm:drm_mode_getconnector] [CONNECTOR:37:?]
>[    9.811804] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:37:DP-2]
>[    9.811809] [drm:intel_dp_detect] [CONNECTOR:37:DP-2]
>[    9.835608] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:37:DP-2] disconnected
>[    9.835630] [drm:drm_mode_getconnector] [CONNECTOR:37:?]
>[    9.835636] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:37:DP-2]
>[    9.835641] [drm:intel_dp_detect] [CONNECTOR:37:DP-2]
>[    9.857595] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:37:DP-2] disconnected
>[    9.857657] [drm:add_framebuffer_internal] [FB:40]
>[   10.286568] random: nonblocking pool is initialized
>[   10.360662] init: bluetooth main process (3409) terminated with status 1
>[   10.360702] init: bluetooth main process ended, respawning
>[   10.643259] init: failsafe main process (3439) killed by TERM signal
>[   10.762734] init: bluetooth main process (3473) terminated with status 1
>[   10.762774] init: bluetooth main process ended, respawning
>[   11.292064] init: bluetooth main process (3668) terminated with status 1
>[   11.292099] init: bluetooth main process ended, respawning
>[   11.300135] asix 1-6.1.4:1.0 eth0: link up, 100Mbps, full-duplex, lpa 0x45E1
>[   11.302511] init: Failed to obtain startpar-bridge instance: Unknown parameter: INSTANCE
>[   11.371961] r8169 0000:03:00.0 p2p1: link down
>[   11.444842] asix 1-6.1.4:1.0 eth0: link up, 100Mbps, full-duplex, lpa 0x45E1
>[   11.525524] init: bluetooth main process (3820) terminated with status 1
>[   11.525560] init: bluetooth main process ended, respawning
>[   11.661591] [drm:intel_crtc_set_config] [CRTC:8] [NOFB]
>[   11.661604] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[   11.661612] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[   11.661619] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   11.661627] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[   11.661633] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=0, fb_changed=0
>[   11.661638] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[   11.661644] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   11.661651] [drm:connected_sink_compute_bpp] [CONNECTOR:29:eDP-1] checking for sink bpp constrains
>[   11.661677] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[   11.661693] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[   11.661698] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[   11.661704] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   11.661709] [drm:intel_dump_pipe_config] [CRTC:13][modeset] config for pipe B
>[   11.661713] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   11.661717] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   11.661722] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   11.661728] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[   11.661733] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   11.661736] [drm:intel_dump_pipe_config] requested mode:
>[   11.661744] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   11.661747] [drm:intel_dump_pipe_config] adjusted mode:
>[   11.661754] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   11.661761] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[   11.661765] [drm:intel_dump_pipe_config] port clock: 270000
>[   11.661768] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   11.661773] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   11.661778] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   11.661781] [drm:intel_dump_pipe_config] ips: 0
>[   11.661785] [drm:intel_dump_pipe_config] double wide: 0
>[   11.661790] [drm:intel_crtc_set_config] [CRTC:18] [NOFB]
>[   11.661796] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:18], mode_changed=0, fb_changed=0
>[   11.661801] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[   11.661807] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   11.662210] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[   11.662215] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=0, fb_changed=0
>[   11.662218] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[   11.662222] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   11.662225] [drm:connected_sink_compute_bpp] [CONNECTOR:29:eDP-1] checking for sink bpp constrains
>[   11.662229] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[   11.662240] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[   11.662242] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[   11.662245] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   11.662247] [drm:intel_dump_pipe_config] [CRTC:13][modeset] config for pipe B
>[   11.662249] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   11.662251] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   11.662254] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   11.662257] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[   11.662260] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   11.662262] [drm:intel_dump_pipe_config] requested mode:
>[   11.662267] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   11.662268] [drm:intel_dump_pipe_config] adjusted mode:
>[   11.662273] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   11.662277] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[   11.662279] [drm:intel_dump_pipe_config] port clock: 270000
>[   11.662281] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   11.662283] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   11.662286] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   11.662287] [drm:intel_dump_pipe_config] ips: 0
>[   11.662289] [drm:intel_dump_pipe_config] double wide: 0
>[   11.688099] init: plymouth-upstart-bridge main process ended, respawning
>[   11.729825] init: bluetooth main process (3882) terminated with status 1
>[   11.729862] init: bluetooth main process ended, respawning
>[   11.808087] init: bluetooth main process (3909) terminated with status 1
>[   11.808123] init: bluetooth main process ended, respawning
>[   11.862980] init: bluetooth main process (3933) terminated with status 1
>[   11.863018] init: bluetooth main process ended, respawning
>[   11.913893] init: bluetooth main process (3957) terminated with status 1
>[   11.913930] init: bluetooth main process ended, respawning
>[   11.982333] init: bluetooth main process (3984) terminated with status 1
>[   11.982369] init: bluetooth main process ended, respawning
>[   12.035325] init: bluetooth main process (4011) terminated with status 1
>[   12.035361] init: bluetooth main process ended, respawning
>[   12.083443] init: bluetooth main process (4035) terminated with status 1
>[   12.083477] init: bluetooth respawning too fast, stopped
>[   12.576775] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[   12.576789] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[   34.786216] [drm:i915_gem_open] 
>[   34.786533] [drm:valleyview_set_rps] GPU freq request from 200 MHz (20) to 600 MHz (60)
>[   34.787943] [drm:i915_gem_open] 
>[   34.787969] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[5]
>[   34.787984] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[5]
>[   34.788212] [drm:drm_mode_getconnector] [CONNECTOR:29:?]
>[   34.788220] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:29:eDP-1]
>[   34.788225] [drm:intel_dp_detect] [CONNECTOR:29:eDP-1]
>[   34.823789] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[   34.823803] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[   34.859772] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[   34.895964] [drm:valleyview_set_rps] GPU freq request from 600 MHz (60) to 200 MHz (20)
>[   34.909830] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   34.921813] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   34.921825] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:29:eDP-1] probed modes :
>[   34.921834] [drm:drm_mode_debug_printmodeline] Modeline 30:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   34.921852] [drm:drm_mode_getconnector] [CONNECTOR:29:?]
>[   34.922319] [drm:drm_mode_getconnector] [CONNECTOR:22:?]
>[   34.922326] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:22:HDMI-A-1]
>[   34.922331] [drm:intel_hdmi_detect] [CONNECTOR:22:HDMI-A-1]
>[   34.934161] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   34.934168] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   34.945767] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:22:HDMI-A-1] disconnected
>[   34.945780] [drm:drm_mode_getconnector] [CONNECTOR:22:?]
>[   34.945785] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:22:HDMI-A-1]
>[   34.945789] [drm:intel_hdmi_detect] [CONNECTOR:22:HDMI-A-1]
>[   34.958208] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   34.958216] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   34.969800] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:22:HDMI-A-1] disconnected
>[   34.969942] [drm:drm_mode_getconnector] [CONNECTOR:27:?]
>[   34.969948] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:27:DP-1]
>[   34.969953] [drm:intel_dp_detect] [CONNECTOR:27:DP-1]
>[   34.993775] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:27:DP-1] disconnected
>[   34.993788] [drm:drm_mode_getconnector] [CONNECTOR:27:?]
>[   34.993793] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:27:DP-1]
>[   34.993797] [drm:intel_dp_detect] [CONNECTOR:27:DP-1]
>[   35.017794] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:27:DP-1] disconnected
>[   35.017929] [drm:drm_mode_getconnector] [CONNECTOR:35:?]
>[   35.017936] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:HDMI-A-2]
>[   35.017940] [drm:intel_hdmi_detect] [CONNECTOR:35:HDMI-A-2]
>[   35.030040] [drm:gmbus_xfer] GMBUS [i915 gmbus panel] NAK for addr: 0050 r(1)
>[   35.030048] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus panel
>[   35.041776] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:HDMI-A-2] disconnected
>[   35.041789] [drm:drm_mode_getconnector] [CONNECTOR:35:?]
>[   35.041795] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:HDMI-A-2]
>[   35.041799] [drm:intel_hdmi_detect] [CONNECTOR:35:HDMI-A-2]
>[   35.054194] [drm:gmbus_xfer] GMBUS [i915 gmbus panel] NAK for addr: 0050 r(1)
>[   35.054202] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus panel
>[   35.065827] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:HDMI-A-2] disconnected
>[   35.065969] [drm:drm_mode_getconnector] [CONNECTOR:37:?]
>[   35.065976] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:37:DP-2]
>[   35.065980] [drm:intel_dp_detect] [CONNECTOR:37:DP-2]
>[   35.089778] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:37:DP-2] disconnected
>[   35.089790] [drm:drm_mode_getconnector] [CONNECTOR:37:?]
>[   35.089796] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:37:DP-2]
>[   35.089800] [drm:intel_dp_detect] [CONNECTOR:37:DP-2]
>[   35.113808] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:37:DP-2] disconnected
>[   35.113966] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[5]
>[   35.113975] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[5]
>[   35.114897] [drm:valleyview_set_rps] GPU freq request from 200 MHz (20) to 600 MHz (60)
>[   35.117037] [drm:intel_crtc_set_config] [CRTC:8] [NOFB]
>[   35.117046] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[   35.117052] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[   35.117059] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   35.117066] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[   35.117073] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=0, fb_changed=0
>[   35.117078] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[   35.117083] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   35.117090] [drm:connected_sink_compute_bpp] [CONNECTOR:29:eDP-1] checking for sink bpp constrains
>[   35.117097] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[   35.117112] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[   35.117116] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[   35.117122] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   35.117127] [drm:intel_dump_pipe_config] [CRTC:13][modeset] config for pipe B
>[   35.117131] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   35.117135] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   35.117140] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   35.117146] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[   35.117151] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   35.117154] [drm:intel_dump_pipe_config] requested mode:
>[   35.117161] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   35.117165] [drm:intel_dump_pipe_config] adjusted mode:
>[   35.117172] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   35.117178] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[   35.117182] [drm:intel_dump_pipe_config] port clock: 270000
>[   35.117186] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   35.117191] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   35.117195] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   35.117199] [drm:intel_dump_pipe_config] ips: 0
>[   35.117202] [drm:intel_dump_pipe_config] double wide: 0
>[   35.117207] [drm:intel_crtc_set_config] [CRTC:18] [NOFB]
>[   35.117213] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:18], mode_changed=0, fb_changed=0
>[   35.117218] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[   35.117223] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   35.216746] [drm:valleyview_set_rps] GPU freq request from 600 MHz (60) to 200 MHz (20)
>[   37.841911] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[   37.841926] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[   38.956815] [drm:i915_gem_open] 
>[   38.957123] [drm:valleyview_set_rps] GPU freq request from 200 MHz (20) to 600 MHz (60)
>[   38.959172] [drm:i915_gem_open] 
>[   38.959562] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[5]
>[   38.959577] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[5]
>[   38.959594] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[5]
>[   38.959600] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[5]
>[   38.959609] [drm:drm_mode_getconnector] [CONNECTOR:29:?]
>[   38.959616] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:29:eDP-1]
>[   38.959621] [drm:intel_dp_detect] [CONNECTOR:29:eDP-1]
>[   38.995002] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[   38.995016] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[   39.030958] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[   39.067013] [drm:valleyview_set_rps] GPU freq request from 600 MHz (60) to 200 MHz (20)
>[   39.078958] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   39.090976] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   39.090987] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:29:eDP-1] probed modes :
>[   39.090996] [drm:drm_mode_debug_printmodeline] Modeline 30:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   39.091030] [drm:drm_mode_getconnector] [CONNECTOR:29:?]
>[   39.091091] [drm:add_framebuffer_internal] [FB:40]
>[   39.217558] [drm:drm_mode_setcrtc] [CRTC:8]
>[   39.217573] [drm:drm_mode_setcrtc] [CONNECTOR:29:eDP-1]
>[   39.217581] [drm:intel_crtc_set_config] [CRTC:8] [FB:40] #connectors=1 (x y) (0 0)
>[   39.217589] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   39.217593] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[   39.217600] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[   39.217607] [drm:drm_mode_debug_printmodeline] Modeline 41:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   39.217612] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=1, fb_changed=0
>[   39.217618] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:8]
>[   39.217622] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   39.217627] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   39.217631] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   39.217637] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 2
>[   39.217644] [drm:connected_sink_compute_bpp] [CONNECTOR:29:eDP-1] checking for sink bpp constrains
>[   39.217652] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[   39.217668] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[   39.217672] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[   39.217679] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   39.217684] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[   39.217687] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[   39.217691] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   39.217697] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   39.217702] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[   39.217707] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   39.217711] [drm:intel_dump_pipe_config] requested mode:
>[   39.217718] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   39.217722] [drm:intel_dump_pipe_config] adjusted mode:
>[   39.217728] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   39.217735] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[   39.217739] [drm:intel_dump_pipe_config] port clock: 270000
>[   39.217743] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   39.217748] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   39.217752] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   39.217756] [drm:intel_dump_pipe_config] ips: 0
>[   39.217760] [drm:intel_dump_pipe_config] double wide: 0
>[   39.217770] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   39.241960] [drm:intel_edp_backlight_off] 
>[   39.466974] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[   39.502976] [drm:edp_panel_off] Turn eDP port C panel power off
>[   39.502985] [drm:wait_panel_off] Wait for panel power off time
>[   39.502993] [drm:wait_panel_status] mask b0000000 value 00000000 status e0000003 control abcd0000
>[   39.544501] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00100000, dig 0x00000000
>[   39.544509] [drm:intel_hpd_irq_handler] digital hpd port C - long
>[   39.544514] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 5 - cnt: 0
>[   39.544547] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port C
>[   39.546976] [drm:wait_panel_status] Wait complete
>[   39.586933] [drm:intel_dp_link_down] 
>[   39.661991] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   39.662003] [drm:cherryview_update_wm] Setting FIFO watermarks - A: plane=2, cursor=2, B: plane=2, cursor=2, C: plane=2, cursor=2, SR: plane=0, cursor=0
>[   39.791988] [drm:vlv_detach_power_sequencer] detaching pipe B power sequencer from port C
>[   39.791997] [drm:vlv_init_panel_power_sequencer] initializing pipe A power sequencer for port C
>[   39.792007] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x87d00001, PP_OFF 0x1f40001, PP_DIV 0x270f06
>[   39.803985] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[   39.803994] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   40.104149] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[   40.104158] [drm:wait_panel_status] Wait complete
>[   40.104169] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[   40.104175] [drm:edp_panel_vdd_on] eDP port C panel power wasn't enabled
>[   40.136678] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00100000, dig 0x00000000
>[   40.136689] [drm:intel_hpd_irq_handler] digital hpd port C - long
>[   40.136695] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 5 - cnt: 1
>[   40.136747] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port C
>[   40.305178] [drm:edp_panel_on] Turn eDP port C panel power on
>[   40.305192] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   40.305200] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[   40.305205] [drm:wait_panel_status] Wait complete
>[   40.305213] [drm:wait_panel_on] Wait for panel power on
>[   40.305219] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd000b
>[   40.459020] [drm:wait_panel_status] Wait complete
>[   40.459033] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[   40.459044] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0003
>[   40.507021] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[   40.507033] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[   40.643076] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[   40.715032] [drm:intel_dp_start_link_train] clock recovery OK
>[   40.787034] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[   40.811115] [drm:g4x_check_srwm] SR watermark: display plane 107, cursor 2
>[   40.811123] [drm:g4x_check_srwm] SR watermark: display plane 211, cursor 2
>[   40.811130] [drm:cherryview_update_wm] Setting FIFO watermarks - A: plane=61, cursor=2, B: plane=2, cursor=2, C: plane=2, cursor=2, SR: plane=107, cursor=2
>[   40.811138] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   40.811148] [drm:intel_edp_backlight_on] 
>[   40.811153] [drm:intel_panel_enable_backlight] pipe A
>[   40.811159] [drm:intel_panel_actually_set_backlight] set backlight PWM = 7812
>[   40.835044] [drm:i9xx_update_primary_plane] Writing base 0089B000 00000000 0 0 7680
>[   40.835069] [drm:intel_connector_check_state] [CONNECTOR:29:eDP-1]
>[   40.835083] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[   40.835089] [drm:check_encoder_state] [ENCODER:26:TMDS-26]
>[   40.835094] [drm:check_encoder_state] [ENCODER:28:TMDS-28]
>[   40.835100] [drm:check_encoder_state] [ENCODER:34:TMDS-34]
>[   40.835105] [drm:check_encoder_state] [ENCODER:36:TMDS-36]
>[   40.835111] [drm:check_crtc_state] [CRTC:8]
>[   40.843092] [drm:check_crtc_state] [CRTC:13]
>[   40.843101] [drm:check_crtc_state] [CRTC:18]
>[   42.010160] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[   42.010176] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[   45.843627] [drm:intel_crtc_set_config] [CRTC:8] [NOFB]
>[   45.843642] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=1, fb_changed=0
>[   45.843648] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [NOCRTC]
>[   45.843651] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   45.843656] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   45.843661] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   45.843668] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[   45.843678] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   45.868262] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[   45.868278] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[   45.880260] [drm:intel_edp_backlight_off] 
>[   46.105299] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[   46.141231] [drm:edp_panel_off] Turn eDP port C panel power off
>[   46.141243] [drm:wait_panel_off] Wait for panel power off time
>[   46.141252] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[   46.182787] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00100000, dig 0x00000000
>[   46.182796] [drm:intel_hpd_irq_handler] digital hpd port C - long
>[   46.182801] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 5 - cnt: 0
>[   46.182835] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port C
>[   46.185232] [drm:wait_panel_status] Wait complete
>[   46.213248] [drm:intel_dp_link_down] 
>[   46.288287] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   46.288298] [drm:cherryview_update_wm] Setting FIFO watermarks - A: plane=2, cursor=2, B: plane=2, cursor=2, C: plane=2, cursor=2, SR: plane=0, cursor=0
>[   46.296237] [drm:intel_display_power_put] disabling dpio-common-d
>[   46.308295] [drm:intel_display_power_put] disabling dpio-common-bc
>[   46.320282] [drm:intel_display_power_put] disabling pipe-a
>[   46.332244] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[   46.332251] [drm:check_encoder_state] [ENCODER:26:TMDS-26]
>[   46.332256] [drm:check_encoder_state] [ENCODER:28:TMDS-28]
>[   46.332260] [drm:check_encoder_state] [ENCODER:34:TMDS-34]
>[   46.332264] [drm:check_encoder_state] [ENCODER:36:TMDS-36]
>[   46.332269] [drm:check_crtc_state] [CRTC:8]
>[   46.332274] [drm:check_crtc_state] [CRTC:13]
>[   46.332278] [drm:check_crtc_state] [CRTC:18]
>[   46.335203] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[5]
>[   46.335216] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[5]
>[   46.335241] [drm:drm_mode_getconnector] [CONNECTOR:22:?]
>[   46.335248] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:22:HDMI-A-1]
>[   46.335253] [drm:intel_hdmi_detect] [CONNECTOR:22:HDMI-A-1]
>[   46.335259] [drm:intel_display_power_get] enabling pipe-a
>[   46.347234] [drm:intel_display_power_get] enabling dpio-common-bc
>[   46.359238] [drm:intel_display_power_get] enabling dpio-common-d
>[   46.372237] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   46.372244] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   46.372249] [drm:intel_display_power_put] disabling dpio-common-d
>[   46.384235] [drm:intel_display_power_put] disabling dpio-common-bc
>[   46.396235] [drm:intel_display_power_put] disabling pipe-a
>[   46.408239] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:22:HDMI-A-1] disconnected
>[   46.408259] [drm:drm_mode_getconnector] [CONNECTOR:22:?]
>[   46.408265] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:22:HDMI-A-1]
>[   46.408270] [drm:intel_hdmi_detect] [CONNECTOR:22:HDMI-A-1]
>[   46.408275] [drm:intel_display_power_get] enabling pipe-a
>[   46.420252] [drm:intel_display_power_get] enabling dpio-common-bc
>[   46.432237] [drm:intel_display_power_get] enabling dpio-common-d
>[   46.445242] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   46.445249] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   46.445254] [drm:intel_display_power_put] disabling dpio-common-d
>[   46.457238] [drm:intel_display_power_put] disabling dpio-common-bc
>[   46.469285] [drm:intel_display_power_put] disabling pipe-a
>[   46.481290] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:22:HDMI-A-1] disconnected
>[   46.481323] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[5]
>[   46.481331] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[5]
>[   46.481338] [drm:drm_mode_getconnector] [CONNECTOR:27:?]
>[   46.481343] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:27:DP-1]
>[   46.481348] [drm:intel_dp_detect] [CONNECTOR:27:DP-1]
>[   46.481354] [drm:intel_display_power_get] enabling pipe-a
>[   46.493331] [drm:intel_display_power_get] enabling dpio-common-bc
>[   46.507246] [drm:intel_display_power_get] enabling dpio-common-d
>[   46.519253] [drm:intel_display_power_put] disabling dpio-common-d
>[   46.531246] [drm:intel_display_power_put] disabling dpio-common-bc
>[   46.543253] [drm:intel_display_power_put] disabling pipe-a
>[   46.555249] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:27:DP-1] disconnected
>[   46.555269] [drm:drm_mode_getconnector] [CONNECTOR:27:?]
>[   46.555275] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:27:DP-1]
>[   46.555280] [drm:intel_dp_detect] [CONNECTOR:27:DP-1]
>[   46.555286] [drm:intel_display_power_get] enabling pipe-a
>[   46.567253] [drm:intel_display_power_get] enabling dpio-common-bc
>[   46.579342] [drm:intel_display_power_get] enabling dpio-common-d
>[   46.591255] [drm:intel_display_power_put] disabling dpio-common-d
>[   46.603295] [drm:intel_display_power_put] disabling dpio-common-bc
>[   46.615257] [drm:intel_display_power_put] disabling pipe-a
>[   46.627379] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:27:DP-1] disconnected
>[   46.627408] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[5]
>[   46.627416] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[5]
>[   46.627424] [drm:drm_mode_getconnector] [CONNECTOR:35:?]
>[   46.627430] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:HDMI-A-2]
>[   46.627434] [drm:intel_hdmi_detect] [CONNECTOR:35:HDMI-A-2]
>[   46.627441] [drm:intel_display_power_get] enabling pipe-a
>[   46.639255] [drm:intel_display_power_get] enabling dpio-common-bc
>[   46.651297] [drm:intel_display_power_get] enabling dpio-common-d
>[   46.664256] [drm:gmbus_xfer] GMBUS [i915 gmbus panel] NAK for addr: 0050 r(1)
>[   46.664264] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus panel
>[   46.664270] [drm:intel_display_power_put] disabling dpio-common-d
>[   46.676298] [drm:intel_display_power_put] disabling dpio-common-bc
>[   46.688254] [drm:intel_display_power_put] disabling pipe-a
>[   46.700349] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:HDMI-A-2] disconnected
>[   46.700370] [drm:drm_mode_getconnector] [CONNECTOR:35:?]
>[   46.700376] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:HDMI-A-2]
>[   46.700381] [drm:intel_hdmi_detect] [CONNECTOR:35:HDMI-A-2]
>[   46.700387] [drm:intel_display_power_get] enabling pipe-a
>[   46.712304] [drm:intel_display_power_get] enabling dpio-common-bc
>[   46.724300] [drm:intel_display_power_get] enabling dpio-common-d
>[   46.737257] [drm:gmbus_xfer] GMBUS [i915 gmbus panel] NAK for addr: 0050 r(1)
>[   46.737265] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus panel
>[   46.737270] [drm:intel_display_power_put] disabling dpio-common-d
>[   46.749273] [drm:intel_display_power_put] disabling dpio-common-bc
>[   46.761303] [drm:intel_display_power_put] disabling pipe-a
>[   46.773265] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:HDMI-A-2] disconnected
>[   46.773311] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[5]
>[   46.773354] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[5]
>[   46.773362] [drm:drm_mode_getconnector] [CONNECTOR:37:?]
>[   46.773368] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:37:DP-2]
>[   46.773372] [drm:intel_dp_detect] [CONNECTOR:37:DP-2]
>[   46.773378] [drm:intel_display_power_get] enabling pipe-a
>[   46.785303] [drm:intel_display_power_get] enabling dpio-common-bc
>[   46.797303] [drm:intel_display_power_get] enabling dpio-common-d
>[   46.809261] [drm:intel_display_power_put] disabling dpio-common-d
>[   46.821397] [drm:intel_display_power_put] disabling dpio-common-bc
>[   46.833260] [drm:intel_display_power_put] disabling pipe-a
>[   46.845308] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:37:DP-2] disconnected
>[   46.845329] [drm:drm_mode_getconnector] [CONNECTOR:37:?]
>[   46.845335] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:37:DP-2]
>[   46.845340] [drm:intel_dp_detect] [CONNECTOR:37:DP-2]
>[   46.845346] [drm:intel_display_power_get] enabling pipe-a
>[   46.857261] [drm:intel_display_power_get] enabling dpio-common-bc
>[   46.869325] [drm:intel_display_power_get] enabling dpio-common-d
>[   46.881338] [drm:intel_display_power_put] disabling dpio-common-d
>[   46.893273] [drm:intel_display_power_put] disabling dpio-common-bc
>[   46.905309] [drm:intel_display_power_put] disabling pipe-a
>[   46.917354] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:37:DP-2] disconnected
>[   46.917530] [drm:intel_crtc_set_config] [CRTC:8] [NOFB]
>[   46.917536] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[   46.917542] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   46.917548] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[   46.917551] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   46.917554] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=1, fb_changed=0
>[   46.917555] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   46.917558] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[   46.917561] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   46.917563] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   46.917566] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   46.917571] [drm:connected_sink_compute_bpp] [CONNECTOR:29:eDP-1] checking for sink bpp constrains
>[   46.917577] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[   46.917590] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[   46.917592] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[   46.917596] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   46.917599] [drm:intel_dump_pipe_config] [CRTC:13][modeset] config for pipe B
>[   46.917601] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   46.917603] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   46.917606] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   46.917610] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[   46.917613] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   46.917614] [drm:intel_dump_pipe_config] requested mode:
>[   46.917620] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   46.917621] [drm:intel_dump_pipe_config] adjusted mode:
>[   46.917626] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   46.917630] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[   46.917632] [drm:intel_dump_pipe_config] port clock: 270000
>[   46.917634] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   46.917636] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   46.917639] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   46.917640] [drm:intel_dump_pipe_config] ips: 0
>[   46.917642] [drm:intel_dump_pipe_config] double wide: 0
>[   46.917652] [drm:intel_display_power_get] enabling pipe-a
>[   46.937265] [drm:intel_display_power_get] enabling dpio-common-bc
>[   46.949311] [drm:intel_display_power_get] enabling dpio-common-d
>[   47.051319] [drm:vlv_init_panel_power_sequencer] initializing pipe B power sequencer for port C
>[   47.051328] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x87d00001, PP_OFF 0x1f40001, PP_DIV 0x270f06
>[   47.063318] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[   47.063323] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   47.063330] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control 00000000
>[   47.492365] [drm:wait_panel_status] Wait complete
>[   47.492376] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[   47.492379] [drm:edp_panel_vdd_on] eDP port C panel power wasn't enabled
>[   47.693378] [drm:edp_panel_on] Turn eDP port C panel power on
>[   47.693383] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   47.693389] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[   47.693391] [drm:wait_panel_status] Wait complete
>[   47.693396] [drm:wait_panel_on] Wait for panel power on
>[   47.693401] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd000b
>[   47.847354] [drm:wait_panel_status] Wait complete
>[   47.847360] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[   47.847369] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0003
>[   47.895354] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[   47.895363] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[   48.031363] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[   48.103405] [drm:intel_dp_start_link_train] clock recovery OK
>[   48.175368] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[   48.199429] [drm:g4x_check_srwm] SR watermark: display plane 107, cursor 2
>[   48.199432] [drm:g4x_check_srwm] SR watermark: display plane 211, cursor 2
>[   48.199436] [drm:cherryview_update_wm] Setting FIFO watermarks - A: plane=2, cursor=2, B: plane=61, cursor=2, C: plane=2, cursor=2, SR: plane=107, cursor=2
>[   48.199442] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   48.199451] [drm:intel_edp_backlight_on] 
>[   48.199454] [drm:intel_panel_enable_backlight] pipe B
>[   48.199458] [drm:intel_panel_actually_set_backlight] set backlight PWM = 7812
>[   48.223383] [drm:i9xx_update_primary_plane] Writing base 000A0000 00000000 0 0 7680
>[   48.223401] [drm:intel_connector_check_state] [CONNECTOR:29:eDP-1]
>[   48.223413] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[   48.223417] [drm:check_encoder_state] [ENCODER:26:TMDS-26]
>[   48.223421] [drm:check_encoder_state] [ENCODER:28:TMDS-28]
>[   48.223425] [drm:check_encoder_state] [ENCODER:34:TMDS-34]
>[   48.223428] [drm:check_encoder_state] [ENCODER:36:TMDS-36]
>[   48.223431] [drm:check_crtc_state] [CRTC:8]
>[   48.223435] [drm:check_crtc_state] [CRTC:13]
>[   48.231379] [drm:check_crtc_state] [CRTC:18]
>[   48.231388] [drm:intel_crtc_set_config] [CRTC:18] [NOFB]
>[   48.231394] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:18], mode_changed=0, fb_changed=0
>[   48.231397] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[   48.231402] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   48.231416] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[   48.231421] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=0, fb_changed=0
>[   48.231423] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[   48.231427] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   48.231431] [drm:connected_sink_compute_bpp] [CONNECTOR:29:eDP-1] checking for sink bpp constrains
>[   48.231437] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[   48.231451] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[   48.231453] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[   48.231456] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   48.231459] [drm:intel_dump_pipe_config] [CRTC:13][modeset] config for pipe B
>[   48.231461] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   48.231462] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   48.231466] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   48.231470] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[   48.231472] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   48.231474] [drm:intel_dump_pipe_config] requested mode:
>[   48.231480] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   48.231481] [drm:intel_dump_pipe_config] adjusted mode:
>[   48.231486] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   48.231490] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[   48.231492] [drm:intel_dump_pipe_config] port clock: 270000
>[   48.231494] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   48.231496] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   48.231499] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   48.231500] [drm:intel_dump_pipe_config] ips: 0
>[   48.231502] [drm:intel_dump_pipe_config] double wide: 0
>[   48.231528] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[   48.231532] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=0, fb_changed=0
>[   48.231535] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[   48.231538] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   48.231541] [drm:connected_sink_compute_bpp] [CONNECTOR:29:eDP-1] checking for sink bpp constrains
>[   48.231545] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[   48.231555] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[   48.231557] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[   48.231560] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   48.231563] [drm:intel_dump_pipe_config] [CRTC:13][modeset] config for pipe B
>[   48.231564] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   48.231566] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   48.231569] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   48.231573] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[   48.231576] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   48.231577] [drm:intel_dump_pipe_config] requested mode:
>[   48.231582] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   48.231584] [drm:intel_dump_pipe_config] adjusted mode:
>[   48.231589] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   48.231593] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[   48.231595] [drm:intel_dump_pipe_config] port clock: 270000
>[   48.231596] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   48.231599] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   48.231601] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   48.231603] [drm:intel_dump_pipe_config] ips: 0
>[   48.231605] [drm:intel_dump_pipe_config] double wide: 0
>[   48.254590] [drm:valleyview_set_rps] GPU freq request from 200 MHz (20) to 600 MHz (60)
>[   48.256709] [drm:intel_set_cpu_fifo_underrun_reporting [i915]] *ERROR* pipe B underrun
>[   48.256721] [drm:intel_crtc_set_config] [CRTC:8] [NOFB]
>[   48.256726] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[   48.256729] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[   48.256733] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   48.256737] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[   48.256741] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=0, fb_changed=0
>[   48.256744] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[   48.256747] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   48.256751] [drm:connected_sink_compute_bpp] [CONNECTOR:29:eDP-1] checking for sink bpp constrains
>[   48.256756] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[   48.256768] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[   48.256770] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[   48.256773] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   48.256776] [drm:intel_dump_pipe_config] [CRTC:13][modeset] config for pipe B
>[   48.256778] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   48.256780] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   48.256783] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   48.256786] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[   48.256789] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   48.256790] [drm:intel_dump_pipe_config] requested mode:
>[   48.256796] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   48.256797] [drm:intel_dump_pipe_config] adjusted mode:
>[   48.256802] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   48.256806] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[   48.256808] [drm:intel_dump_pipe_config] port clock: 270000
>[   48.256810] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   48.256813] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   48.256815] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   48.256816] [drm:intel_dump_pipe_config] ips: 0
>[   48.256818] [drm:intel_dump_pipe_config] double wide: 0
>[   48.256821] [drm:intel_crtc_set_config] [CRTC:18] [NOFB]
>[   48.256825] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:18], mode_changed=0, fb_changed=0
>[   48.256827] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[   48.256830] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   48.256945] [drm:valleyview_pipestat_irq_handler [i915]] *ERROR* CPU pipe B FIFO underrun
>[   48.356338] [drm:valleyview_set_rps] GPU freq request from 600 MHz (60) to 200 MHz (20)
>[   50.914495] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[   50.914510] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[   59.062291] [drm:i915_gem_open] 
>[   59.062594] [drm:valleyview_set_rps] GPU freq request from 200 MHz (20) to 600 MHz (60)
>[   59.064153] [drm:i915_gem_open] 
>[   59.064546] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[5]
>[   59.064561] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[5]
>[   59.064578] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[5]
>[   59.064585] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[5]
>[   59.064594] [drm:drm_mode_getconnector] [CONNECTOR:29:?]
>[   59.064601] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:29:eDP-1]
>[   59.064606] [drm:intel_dp_detect] [CONNECTOR:29:eDP-1]
>[   59.099859] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[   59.099872] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[   59.135863] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[   59.172225] [drm:valleyview_set_rps] GPU freq request from 600 MHz (60) to 200 MHz (20)
>[   59.185871] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   59.197877] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   59.197889] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:29:eDP-1] probed modes :
>[   59.197898] [drm:drm_mode_debug_printmodeline] Modeline 30:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   59.197932] [drm:drm_mode_getconnector] [CONNECTOR:29:?]
>[   59.197993] [drm:add_framebuffer_internal] [FB:40]
>[   59.293955] [drm:drm_mode_setcrtc] [CRTC:8]
>[   59.293971] [drm:drm_mode_setcrtc] [CONNECTOR:29:eDP-1]
>[   59.293978] [drm:intel_crtc_set_config] [CRTC:8] [FB:40] #connectors=1 (x y) (0 0)
>[   59.293985] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   59.293990] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=1, fb_changed=0
>[   59.293996] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:8]
>[   59.294001] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   59.294005] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   59.294009] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   59.294015] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 2
>[   59.294022] [drm:connected_sink_compute_bpp] [CONNECTOR:29:eDP-1] checking for sink bpp constrains
>[   59.294030] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[   59.294046] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[   59.294050] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[   59.294057] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   59.294062] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[   59.294065] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[   59.294069] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   59.294075] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   59.294080] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[   59.294086] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   59.294089] [drm:intel_dump_pipe_config] requested mode:
>[   59.294097] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   59.294100] [drm:intel_dump_pipe_config] adjusted mode:
>[   59.294107] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   59.294114] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[   59.294118] [drm:intel_dump_pipe_config] port clock: 270000
>[   59.294122] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   59.294126] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   59.294131] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   59.294135] [drm:intel_dump_pipe_config] ips: 0
>[   59.294138] [drm:intel_dump_pipe_config] double wide: 0
>[   59.294148] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   59.323940] [drm:intel_edp_backlight_off] 
>[   59.548879] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[   59.585002] [drm:edp_panel_off] Turn eDP port C panel power off
>[   59.585011] [drm:wait_panel_off] Wait for panel power off time
>[   59.585019] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[   59.628881] [drm:wait_panel_status] Wait complete
>[   59.652891] [drm:intel_dp_link_down] 
>[   59.727946] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   59.727956] [drm:cherryview_update_wm] Setting FIFO watermarks - A: plane=2, cursor=2, B: plane=2, cursor=2, C: plane=2, cursor=2, SR: plane=0, cursor=0
>[   59.857891] [drm:vlv_detach_power_sequencer] detaching pipe B power sequencer from port C
>[   59.857900] [drm:vlv_init_panel_power_sequencer] initializing pipe A power sequencer for port C
>[   59.857910] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x87d00001, PP_OFF 0x1f40001, PP_DIV 0x270f06
>[   59.869889] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[   59.869898] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   60.186059] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control 00000000
>[   60.186069] [drm:wait_panel_status] Wait complete
>[   60.186080] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[   60.186085] [drm:edp_panel_vdd_on] eDP port C panel power wasn't enabled
>[   60.387099] [drm:edp_panel_on] Turn eDP port C panel power on
>[   60.387113] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   60.387121] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[   60.387126] [drm:wait_panel_status] Wait complete
>[   60.387134] [drm:wait_panel_on] Wait for panel power on
>[   60.387140] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd000b
>[   60.540926] [drm:wait_panel_status] Wait complete
>[   60.540940] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[   60.540951] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0003
>[   60.588926] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[   60.588939] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[   60.724935] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[   60.794937] [drm:intel_dp_start_link_train] clock recovery OK
>[   60.867023] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[   60.890996] [drm:g4x_check_srwm] SR watermark: display plane 107, cursor 2
>[   60.891004] [drm:g4x_check_srwm] SR watermark: display plane 211, cursor 2
>[   60.891010] [drm:cherryview_update_wm] Setting FIFO watermarks - A: plane=61, cursor=2, B: plane=2, cursor=2, C: plane=2, cursor=2, SR: plane=107, cursor=2
>[   60.891019] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   60.891030] [drm:intel_edp_backlight_on] 
>[   60.891035] [drm:intel_panel_enable_backlight] pipe A
>[   60.891042] [drm:intel_panel_actually_set_backlight] set backlight PWM = 7812
>[   60.914976] [drm:i9xx_update_primary_plane] Writing base 0089C000 00000000 0 0 7680
>[   60.914998] [drm:intel_connector_check_state] [CONNECTOR:29:eDP-1]
>[   60.915013] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[   60.915019] [drm:check_encoder_state] [ENCODER:26:TMDS-26]
>[   60.915024] [drm:check_encoder_state] [ENCODER:28:TMDS-28]
>[   60.915030] [drm:check_encoder_state] [ENCODER:34:TMDS-34]
>[   60.915035] [drm:check_encoder_state] [ENCODER:36:TMDS-36]
>[   60.915041] [drm:check_crtc_state] [CRTC:8]
>[   60.922948] [drm:check_crtc_state] [CRTC:13]
>[   60.922957] [drm:check_crtc_state] [CRTC:18]
>[   62.123001] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[   62.123016] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[   65.923633] [drm:intel_crtc_set_config] [CRTC:8] [NOFB]
>[   65.923648] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=1, fb_changed=0
>[   65.923653] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [NOCRTC]
>[   65.923657] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   65.923662] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   65.923667] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   65.923674] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[   65.923684] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   65.949168] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[   65.949183] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[   65.961271] [drm:intel_edp_backlight_off] 
>[   66.186181] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[   66.222202] [drm:edp_panel_off] Turn eDP port C panel power off
>[   66.222211] [drm:wait_panel_off] Wait for panel power off time
>[   66.222219] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[   66.266446] [drm:wait_panel_status] Wait complete
>[   66.292198] [drm:intel_dp_link_down] 
>[   66.367229] [drm:intel_set_cpu_fifo_underrun_reporting [i915]] *ERROR* pipe A underrun
>[   66.367242] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   66.367249] [drm:cherryview_update_wm] Setting FIFO watermarks - A: plane=2, cursor=2, B: plane=2, cursor=2, C: plane=2, cursor=2, SR: plane=0, cursor=0
>[   66.375189] [drm:intel_display_power_put] disabling dpio-common-d
>[   66.387242] [drm:intel_display_power_put] disabling dpio-common-bc
>[   66.399188] [drm:intel_display_power_put] disabling pipe-a
>[   66.411196] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[   66.411203] [drm:check_encoder_state] [ENCODER:26:TMDS-26]
>[   66.411208] [drm:check_encoder_state] [ENCODER:28:TMDS-28]
>[   66.411212] [drm:check_encoder_state] [ENCODER:34:TMDS-34]
>[   66.411217] [drm:check_encoder_state] [ENCODER:36:TMDS-36]
>[   66.411221] [drm:check_crtc_state] [CRTC:8]
>[   66.411226] [drm:check_crtc_state] [CRTC:13]
>[   66.411230] [drm:check_crtc_state] [CRTC:18]
>[   66.411321] [drm:intel_crtc_set_config] [CRTC:8] [NOFB]
>[   66.411325] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[   66.411331] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   66.411335] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[   66.411338] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   66.411341] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=1, fb_changed=0
>[   66.411343] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   66.411346] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[   66.411348] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   66.411350] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   66.411354] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   66.411358] [drm:connected_sink_compute_bpp] [CONNECTOR:29:eDP-1] checking for sink bpp constrains
>[   66.411364] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[   66.411377] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[   66.411380] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[   66.411383] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   66.411386] [drm:intel_dump_pipe_config] [CRTC:13][modeset] config for pipe B
>[   66.411387] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   66.411389] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   66.411393] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   66.411396] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[   66.411399] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   66.411401] [drm:intel_dump_pipe_config] requested mode:
>[   66.411407] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   66.411408] [drm:intel_dump_pipe_config] adjusted mode:
>[   66.411413] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   66.411417] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[   66.411419] [drm:intel_dump_pipe_config] port clock: 270000
>[   66.411421] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   66.411423] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   66.411426] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   66.411427] [drm:intel_dump_pipe_config] ips: 0
>[   66.411429] [drm:intel_dump_pipe_config] double wide: 0
>[   66.411438] [drm:intel_display_power_get] enabling pipe-a
>[   66.431197] [drm:intel_display_power_get] enabling dpio-common-bc
>[   66.443190] [drm:intel_display_power_get] enabling dpio-common-d
>[   66.545192] [drm:vlv_init_panel_power_sequencer] initializing pipe B power sequencer for port C
>[   66.545201] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x87d00001, PP_OFF 0x1f40001, PP_DIV 0x270f06
>[   66.557191] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[   66.557195] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   66.823292] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control 00000000
>[   66.988335] [drm:wait_panel_status] Wait complete
>[   66.988347] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[   66.988350] [drm:edp_panel_vdd_on] eDP port C panel power wasn't enabled
>[   67.189439] [drm:edp_panel_on] Turn eDP port C panel power on
>[   67.189446] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   67.189453] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[   67.189456] [drm:wait_panel_status] Wait complete
>[   67.189462] [drm:wait_panel_on] Wait for panel power on
>[   67.189466] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd000b
>[   67.343234] [drm:wait_panel_status] Wait complete
>[   67.343240] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[   67.343249] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0003
>[   67.391234] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[   67.391242] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[   67.527238] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[   67.599267] [drm:intel_dp_start_link_train] clock recovery OK
>[   67.671245] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[   67.695316] [drm:g4x_check_srwm] SR watermark: display plane 107, cursor 2
>[   67.695319] [drm:g4x_check_srwm] SR watermark: display plane 211, cursor 2
>[   67.695324] [drm:cherryview_update_wm] Setting FIFO watermarks - A: plane=2, cursor=2, B: plane=61, cursor=2, C: plane=2, cursor=2, SR: plane=107, cursor=2
>[   67.695329] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   67.695338] [drm:intel_edp_backlight_on] 
>[   67.695340] [drm:intel_panel_enable_backlight] pipe B
>[   67.695345] [drm:intel_panel_actually_set_backlight] set backlight PWM = 7812
>[   67.719256] [drm:i9xx_update_primary_plane] Writing base 000A0000 00000000 0 0 7680
>[   67.719275] [drm:intel_connector_check_state] [CONNECTOR:29:eDP-1]
>[   67.719286] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[   67.719290] [drm:check_encoder_state] [ENCODER:26:TMDS-26]
>[   67.719293] [drm:check_encoder_state] [ENCODER:28:TMDS-28]
>[   67.719297] [drm:check_encoder_state] [ENCODER:34:TMDS-34]
>[   67.719301] [drm:check_encoder_state] [ENCODER:36:TMDS-36]
>[   67.719304] [drm:check_crtc_state] [CRTC:8]
>[   67.719308] [drm:check_crtc_state] [CRTC:13]
>[   67.727254] [drm:check_crtc_state] [CRTC:18]
>[   67.727263] [drm:intel_crtc_set_config] [CRTC:18] [NOFB]
>[   67.727269] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:18], mode_changed=0, fb_changed=0
>[   67.727272] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[   67.727277] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   67.750073] [drm:valleyview_set_rps] GPU freq request from 200 MHz (20) to 600 MHz (60)
>[   67.755243] [drm:intel_crtc_set_config] [CRTC:8] [NOFB]
>[   67.755255] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[   67.755262] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[   67.755269] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   67.755276] [drm:intel_crtc_set_config] [CRTC:13] [FB:39] #connectors=1 (x y) (0 0)
>[   67.755282] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:13], mode_changed=0, fb_changed=0
>[   67.755287] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[   67.755293] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   67.755300] [drm:connected_sink_compute_bpp] [CONNECTOR:29:eDP-1] checking for sink bpp constrains
>[   67.755308] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[   67.755324] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[   67.755328] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[   67.755334] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   67.755340] [drm:intel_dump_pipe_config] [CRTC:13][modeset] config for pipe B
>[   67.755343] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   67.755347] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   67.755353] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   67.755358] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[   67.755364] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   67.755367] [drm:intel_dump_pipe_config] requested mode:
>[   67.755375] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   67.755378] [drm:intel_dump_pipe_config] adjusted mode:
>[   67.755385] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   67.755391] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[   67.755395] [drm:intel_dump_pipe_config] port clock: 270000
>[   67.755400] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   67.755404] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   67.755409] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   67.755412] [drm:intel_dump_pipe_config] ips: 0
>[   67.755416] [drm:intel_dump_pipe_config] double wide: 0
>[   67.755421] [drm:intel_crtc_set_config] [CRTC:18] [NOFB]
>[   67.755427] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:18], mode_changed=0, fb_changed=0
>[   67.755432] [drm:intel_modeset_stage_output_state] [CONNECTOR:29:eDP-1] to [CRTC:13]
>[   67.755437] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   67.851212] [drm:valleyview_set_rps] GPU freq request from 600 MHz (60) to 200 MHz (20)
>[   67.853570] [drm:intel_set_cpu_fifo_underrun_reporting [i915]] *ERROR* pipe B underrun
>[   67.853742] [drm:valleyview_pipestat_irq_handler [i915]] *ERROR* CPU pipe B FIFO underrun
>[   70.411449] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[   70.411463] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  175.088850] NET: Registered protocol family 10
>[  175.090042] IPv6: ADDRCONF(NETDEV_UP): p2p1: link is not ready
>[  177.858686] asix 1-6.1.4:1.0 eth0: link up, 100Mbps, full-duplex, lpa 0x45E1
>[  182.850061] asix 1-6.1.4:1.0 eth0: link up, 100Mbps, full-duplex, lpa 0x45E1
>[  199.363093] asix 1-6.1.4:1.0 eth0: link up, 100Mbps, full-duplex, lpa 0x45E1

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