Attachment 111031 Details for Bug 87481 – dmesg

dmesg

dmesg_bytm02_i2c_1219.txt (text/plain), 125.08 KB, created by lu hua on 2014-12-19 07:45:58 UTC

(hide)

Description:

Filename:

MIME Type:

Creator: lu hua

Created: 2014-12-19 07:45:58 UTC

Size: 125.08 KB

patch

obsolete

>[   62.891730] [drm:intel_dump_pipe_config] port clock: 270000
>[   62.891743] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[   62.891757] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   62.891770] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   62.891783] [drm:intel_dump_pipe_config] ips: 0
>[   62.891795] [drm:intel_dump_pipe_config] double wide: 0
>[   62.891809] [drm:intel_crtc_set_config] [CRTC:24] [FB:72] #connectors=1 (x y) (0 0)
>[   62.891822] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[   62.891835] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [CRTC:19]
>[   62.891841] [drm:intel_modeset_stage_output_state] [CONNECTOR:30:HDMI-A-1] to [CRTC:24]
>[   62.891854] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   62.891867] [drm:connected_sink_compute_bpp] [CONNECTOR:30:HDMI-A-1] checking for sink bpp constrains
>[   62.891881] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[   62.891894] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[   62.891907] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   62.891921] [drm:intel_dump_pipe_config] [CRTC:24][modeset] config for pipe B
>[   62.891924] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   62.891927] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   62.891931] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   62.891936] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   62.891940] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   62.891943] [drm:intel_dump_pipe_config] audio: 1, infoframes: 1
>[   62.891946] [drm:intel_dump_pipe_config] requested mode:
>[   62.891952] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[   62.891955] [drm:intel_dump_pipe_config] adjusted mode:
>[   62.891961] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[   62.891966] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[   62.891969] [drm:intel_dump_pipe_config] port clock: 148500
>[   62.891972] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   62.891976] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   62.891980] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   62.891983] [drm:intel_dump_pipe_config] ips: 0
>[   62.891986] [drm:intel_dump_pipe_config] double wide: 0
>[   65.304024] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[   65.304051] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  187.020976] pm_rpm: executing
>[  187.021151] [drm:i915_gem_open] 
>[  187.021849] [drm:i915_gem_open] 
>[  187.021887] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[5] ENCODERS[5]
>[  187.021922] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[5] ENCODERS[5]
>[  187.021941] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[  187.021947] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:eDP-1]
>[  187.021951] [drm:intel_dp_detect] [CONNECTOR:39:eDP-1]
>[  187.021961] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[  187.021968] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[  187.022284] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[  187.022601] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  187.022627] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  187.022635] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:eDP-1] probed modes :
>[  187.022642] [drm:drm_mode_debug_printmodeline] Modeline 40:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  187.022650] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[  187.022696] [drm:drm_mode_getconnector] [CONNECTOR:27:?]
>[  187.022701] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:27:VGA-1]
>[  187.022705] [drm:intel_crt_detect] [CONNECTOR:27:VGA-1] force=1
>[  187.022710] [drm:valleyview_crt_detect_hotplug] trigger hotplug detect cycle: adpa=0x40000
>[  187.026582] [drm:valleyview_crt_detect_hotplug] valleyview hotplug adpa=0x40000, result 0
>[  187.026586] [drm:intel_crt_detect] CRT not detected via hotplug
>[  187.026761] [drm:gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1)
>[  187.026767] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[  187.026771] [drm:intel_crt_get_edid] CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[  187.026775] [drm:intel_gmbus_force_bit] enabling bit-banging on i915 gmbus vga. force bit now 1
>[  187.027056] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[  187.027060] [drm:intel_gmbus_force_bit] disabling bit-banging on i915 gmbus vga. force bit now 0
>[  187.027063] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found]
>[  187.027068] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:27:VGA-1] disconnected
>[  187.027076] [drm:drm_mode_getconnector] [CONNECTOR:27:?]
>[  187.027080] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:27:VGA-1]
>[  187.027084] [drm:intel_crt_detect] [CONNECTOR:27:VGA-1] force=1
>[  187.027088] [drm:valleyview_crt_detect_hotplug] trigger hotplug detect cycle: adpa=0x40000
>[  187.030772] [drm:valleyview_crt_detect_hotplug] valleyview hotplug adpa=0x40000, result 0
>[  187.030777] [drm:intel_crt_detect] CRT not detected via hotplug
>[  187.030997] [drm:gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1)
>[  187.031003] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[  187.031007] [drm:intel_crt_get_edid] CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[  187.031011] [drm:intel_gmbus_force_bit] enabling bit-banging on i915 gmbus vga. force bit now 1
>[  187.031291] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[  187.031295] [drm:intel_gmbus_force_bit] disabling bit-banging on i915 gmbus vga. force bit now 0
>[  187.031299] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found]
>[  187.031303] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:27:VGA-1] disconnected
>[  187.031332] [drm:drm_mode_getconnector] [CONNECTOR:30:?]
>[  187.031337] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:30:HDMI-A-1]
>[  187.031346] [drm:intel_hdmi_detect] [CONNECTOR:30:HDMI-A-1]
>[  187.055878] [drm:drm_detect_monitor_audio] Monitor has basic audio support
>[  187.056108] [drm:drm_edid_to_eld] ELD monitor Acer HS244HQ
>[  187.056114] [drm:parse_hdmi_vsdb] HDMI: DVI dual 0, max TMDS clock 165, latency present 0 0, video latency 192 1, audio latency 11 1
>[  187.056118] [drm:drm_edid_to_eld] ELD size 36, SAD count 1
>[  187.056242] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:30:HDMI-A-1] probed modes :
>[  187.056249] [drm:drm_mode_debug_printmodeline] Modeline 46:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  187.056255] [drm:drm_mode_debug_printmodeline] Modeline 103:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  187.056261] [drm:drm_mode_debug_printmodeline] Modeline 74:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  187.056267] [drm:drm_mode_debug_printmodeline] Modeline 91:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
>[  187.056273] [drm:drm_mode_debug_printmodeline] Modeline 109:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  187.056279] [drm:drm_mode_debug_printmodeline] Modeline 120:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
>[  187.056285] [drm:drm_mode_debug_printmodeline] Modeline 80:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  187.056291] [drm:drm_mode_debug_printmodeline] Modeline 73:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  187.056297] [drm:drm_mode_debug_printmodeline] Modeline 90:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x20015
>[  187.056302] [drm:drm_mode_debug_printmodeline] Modeline 70:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  187.056308] [drm:drm_mode_debug_printmodeline] Modeline 84:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x1c005
>[  187.056314] [drm:drm_mode_debug_printmodeline] Modeline 85:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x4005
>[  187.056320] [drm:drm_mode_debug_printmodeline] Modeline 93:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x20005
>[  187.056326] [drm:drm_mode_debug_printmodeline] Modeline 107:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  187.056332] [drm:drm_mode_debug_printmodeline] Modeline 116:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x1c005
>[  187.056338] [drm:drm_mode_debug_printmodeline] Modeline 117:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x4005
>[  187.056344] [drm:drm_mode_debug_printmodeline] Modeline 122:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x20005
>[  187.056350] [drm:drm_mode_debug_printmodeline] Modeline 54:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[  187.056356] [drm:drm_mode_debug_printmodeline] Modeline 62:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  187.056361] [drm:drm_mode_debug_printmodeline] Modeline 51:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  187.056367] [drm:drm_mode_debug_printmodeline] Modeline 53:"1440x900" 75 136750 1440 1536 1688 1936 900 903 909 942 0x40 0x6
>[  187.056373] [drm:drm_mode_debug_printmodeline] Modeline 52:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[  187.056379] [drm:drm_mode_debug_printmodeline] Modeline 50:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>[  187.056385] [drm:drm_mode_debug_printmodeline] Modeline 49:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  187.056391] [drm:drm_mode_debug_printmodeline] Modeline 48:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  187.056397] [drm:drm_mode_debug_printmodeline] Modeline 82:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x1c005
>[  187.056403] [drm:drm_mode_debug_printmodeline] Modeline 83:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x4005
>[  187.056409] [drm:drm_mode_debug_printmodeline] Modeline 97:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x20005
>[  187.056415] [drm:drm_mode_debug_printmodeline] Modeline 105:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  187.056421] [drm:drm_mode_debug_printmodeline] Modeline 114:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x1c005
>[  187.056427] [drm:drm_mode_debug_printmodeline] Modeline 115:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x4005
>[  187.056433] [drm:drm_mode_debug_printmodeline] Modeline 124:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x20005
>[  187.056438] [drm:drm_mode_debug_printmodeline] Modeline 71:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  187.056444] [drm:drm_mode_debug_printmodeline] Modeline 86:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x1c005
>[  187.056450] [drm:drm_mode_debug_printmodeline] Modeline 87:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x4005
>[  187.056456] [drm:drm_mode_debug_printmodeline] Modeline 95:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x20005
>[  187.056462] [drm:drm_mode_debug_printmodeline] Modeline 63:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  187.056468] [drm:drm_mode_debug_printmodeline] Modeline 64:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[  187.056474] [drm:drm_mode_debug_printmodeline] Modeline 65:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  187.056480] [drm:drm_mode_debug_printmodeline] Modeline 66:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[  187.056486] [drm:drm_mode_debug_printmodeline] Modeline 67:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  187.056492] [drm:drm_mode_debug_printmodeline] Modeline 68:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  187.056498] [drm:drm_mode_debug_printmodeline] Modeline 55:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  187.056503] [drm:drm_mode_debug_printmodeline] Modeline 56:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  187.056509] [drm:drm_mode_debug_printmodeline] Modeline 79:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  187.056515] [drm:drm_mode_debug_printmodeline] Modeline 111:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  187.056521] [drm:drm_mode_debug_printmodeline] Modeline 76:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  187.056527] [drm:drm_mode_debug_printmodeline] Modeline 57:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  187.056533] [drm:drm_mode_debug_printmodeline] Modeline 58:"640x480" 73 31500 640 664 704 832 480 489 491 520 0x40 0xa
>[  187.056538] [drm:drm_mode_debug_printmodeline] Modeline 59:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[  187.056544] [drm:drm_mode_debug_printmodeline] Modeline 60:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  187.056550] [drm:drm_mode_debug_printmodeline] Modeline 78:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  187.056556] [drm:drm_mode_debug_printmodeline] Modeline 61:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  187.056566] [drm:drm_mode_getconnector] [CONNECTOR:30:?]
>[  187.056628] [drm:drm_mode_getconnector] [CONNECTOR:35:?]
>[  187.056642] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:DP-1]
>[  187.056655] [drm:intel_dp_detect] [CONNECTOR:35:DP-1]
>[  187.059128] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  187.061586] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  187.065062] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  187.069065] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  187.070621] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:DP-1] disconnected
>[  187.070630] [drm:drm_mode_getconnector] [CONNECTOR:35:?]
>[  187.070634] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:DP-1]
>[  187.070638] [drm:intel_dp_detect] [CONNECTOR:35:DP-1]
>[  187.073096] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  187.075552] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  187.079073] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  187.083076] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  187.084633] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:DP-1] disconnected
>[  187.084659] [drm:drm_mode_getconnector] [CONNECTOR:37:?]
>[  187.084664] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:37:HDMI-A-2]
>[  187.084667] [drm:intel_hdmi_detect] [CONNECTOR:37:HDMI-A-2]
>[  187.084948] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  187.084953] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:37:HDMI-A-2] disconnected
>[  187.084959] [drm:drm_mode_getconnector] [CONNECTOR:37:?]
>[  187.084962] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:37:HDMI-A-2]
>[  187.084966] [drm:intel_hdmi_detect] [CONNECTOR:37:HDMI-A-2]
>[  187.085244] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  187.085248] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:37:HDMI-A-2] disconnected
>[  187.085345] [drm:add_framebuffer_internal] [FB:45]
>[  187.124994] [drm:add_framebuffer_internal] [FB:75]
>[  187.156273] pm_rpm: starting subtest i2c
>[  187.160406] [drm:drm_mode_setcrtc] [CRTC:19]
>[  187.160419] [drm:drm_mode_setcrtc] [CONNECTOR:39:eDP-1]
>[  187.160424] [drm:intel_crtc_set_config] [CRTC:19] [FB:45] #connectors=1 (x y) (0 0)
>[  187.160431] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:19], mode_changed=0, fb_changed=1
>[  187.160435] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [CRTC:19]
>[  187.160439] [drm:intel_modeset_stage_output_state] [CONNECTOR:30:HDMI-A-1] to [CRTC:24]
>[  187.160445] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  187.160451] [drm:connected_sink_compute_bpp] [CONNECTOR:39:eDP-1] checking for sink bpp constrains
>[  187.160455] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[  187.160461] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[  187.160466] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[  187.160470] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[  187.160475] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  187.160479] [drm:intel_dump_pipe_config] [CRTC:19][modeset] config for pipe A
>[  187.160482] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  187.160485] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  187.160490] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  187.160494] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[  187.160499] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  187.160502] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  187.160505] [drm:intel_dump_pipe_config] requested mode:
>[  187.160511] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  187.160514] [drm:intel_dump_pipe_config] adjusted mode:
>[  187.160520] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  187.160525] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[  187.160528] [drm:intel_dump_pipe_config] port clock: 270000
>[  187.160532] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[  187.160535] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  187.160539] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  187.160542] [drm:intel_dump_pipe_config] ips: 0
>[  187.160545] [drm:intel_dump_pipe_config] double wide: 0
>[  187.160564] [drm:i9xx_update_primary_plane] Writing base 0103C000 00000000 0 0 5504
>[  187.176011] [drm:drm_mode_setcrtc] [CRTC:19]
>[  187.176016] [drm:intel_crtc_set_config] [CRTC:19] [NOFB]
>[  187.176021] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:19], mode_changed=1, fb_changed=0
>[  187.176025] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [NOCRTC]
>[  187.176028] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  187.176032] [drm:intel_modeset_stage_output_state] [CONNECTOR:30:HDMI-A-1] to [CRTC:24]
>[  187.176036] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  187.176039] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  187.176044] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[  187.176050] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[  187.192653] [drm:intel_edp_backlight_off] 
>[  187.392890] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  187.393263] [drm:edp_panel_off] Turn eDP port C panel power off
>[  187.393268] [drm:wait_panel_off] Wait for panel power off time
>[  187.393274] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  187.437309] [drm:wait_panel_status] Wait complete
>[  187.443057] [drm:intel_dp_link_down] 
>[  187.494317] [drm:g4x_check_srwm] SR watermark: display plane 114, cursor 2
>[  187.494332] [drm:g4x_check_srwm] SR watermark: display plane 225, cursor 2
>[  187.494337] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=2, cursor=2, B: plane=64, cursor=2, SR: plane=114, cursor=2
>[  187.494342] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[  187.494366] [drm:intel_connector_check_state] [CONNECTOR:30:HDMI-A-1]
>[  187.494372] [drm:check_encoder_state] [ENCODER:28:DAC-28]
>[  187.494377] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  187.494381] [drm:check_encoder_state] [ENCODER:34:TMDS-34]
>[  187.494385] [drm:check_encoder_state] [ENCODER:36:TMDS-36]
>[  187.494389] [drm:check_encoder_state] [ENCODER:38:TMDS-38]
>[  187.494393] [drm:check_crtc_state] [CRTC:19]
>[  187.494398] [drm:check_crtc_state] [CRTC:24]
>[  187.495984] [drm:drm_mode_setcrtc] [CRTC:24]
>[  187.495989] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[  187.495994] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=1, fb_changed=0
>[  187.495998] [drm:intel_modeset_stage_output_state] [CONNECTOR:30:HDMI-A-1] to [NOCRTC]
>[  187.496001] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  187.496005] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  187.496009] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  187.496013] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[  187.496019] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[  187.513127] [drm:ilk_audio_codec_disable] Disable audio codec on port B, pipe B
>[  187.535138] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[  187.535145] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=2, cursor=2, B: plane=2, cursor=2, SR: plane=0, cursor=0
>[  187.549145] [drm:vlv_update_cdclk] Current CD clock rate: 200000 kHz
>[  187.549152] [drm:intel_display_power_put] disabling dpio-common
>[  187.552721] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00100000, dig 0x00000000
>[  187.552729] [drm:intel_hpd_irq_handler] digital hpd port C - long
>[  187.552733] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 5 - cnt: 0
>[  187.552843] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port C
>[  187.557152] [drm:intel_display_power_put] disabling dpio-tx-c-23
>[  187.565157] [drm:intel_display_power_put] disabling dpio-tx-c-01
>[  187.573165] [drm:intel_display_power_put] disabling dpio-tx-b-23
>[  187.581170] [drm:intel_display_power_put] disabling dpio-tx-b-01
>[  187.589178] [drm:intel_display_power_put] disabling display
>[  187.597198] [drm:intel_runtime_suspend] Suspending device
>[  187.597226] [drm:check_encoder_state] [ENCODER:28:DAC-28]
>[  187.597230] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  187.597234] [drm:check_encoder_state] [ENCODER:34:TMDS-34]
>[  187.597238] [drm:check_encoder_state] [ENCODER:36:TMDS-36]
>[  187.597241] [drm:check_encoder_state] [ENCODER:38:TMDS-38]
>[  187.597245] [drm:check_crtc_state] [CRTC:19]
>[  187.597249] [drm:check_crtc_state] [CRTC:24]
>[  187.599077] [drm:intel_runtime_suspend] Device suspended
>[  187.708300] [drm:intel_runtime_resume] Resuming device
>[  187.710276] [drm:intel_runtime_resume] Device resumed
>[  187.710282] [drm:intel_display_power_get] enabling display
>[  187.718292] [drm:i915_redisable_vga_power_on] Something enabled VGA plane, disabling it
>[  187.718601] [drm:intel_display_power_get] enabling dpio-tx-b-01
>[  187.726285] [drm:intel_display_power_get] enabling dpio-tx-b-23
>[  187.734290] [drm:intel_display_power_get] enabling dpio-tx-c-01
>[  187.742296] [drm:intel_display_power_get] enabling dpio-tx-c-23
>[  187.750303] [drm:intel_display_power_get] enabling dpio-common
>[  187.758313] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[  187.758318] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  187.894693] [drm:vlv_power_sequencer_pipe] picked pipe A power sequencer for port C
>[  187.894725] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x87d00001, PP_OFF 0x1f40001, PP_DIV 0x270f05
>[  187.894730] [drm:vlv_power_sequencer_kick] kicking pipe A power sequencer for port C
>[  187.917052] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control 00000000
>[  188.368061] [drm:wait_panel_status] Wait complete
>[  188.368096] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  188.368100] [drm:edp_panel_vdd_on] eDP port C panel power wasn't enabled
>[  188.461596] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00100000, dig 0x00000000
>[  188.461620] [drm:intel_hpd_irq_handler] digital hpd port C - long
>[  188.461637] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 5 - cnt: 1
>[  188.461811] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port C
>[  188.602479] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  188.602489] [drm:drm_dp_i2c_do_msg] transaction failed: -110
>[  188.604896] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  188.604903] [drm:drm_dp_i2c_do_msg] transaction failed: -110
>[  188.633066] [drm:gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 r(128)
>[  188.896688] [drm:intel_print_rc6_info] Enabling RC6 states: RC6 on
>[  188.898106] [drm:valleyview_enable_rps] GPLL enabled? yes
>[  188.898111] [drm:valleyview_enable_rps] GPU status: 0x0000c0d0
>[  188.898115] [drm:valleyview_enable_rps] current GPU freq: 187 MHz (192)
>[  188.898119] [drm:valleyview_enable_rps] setting GPU freq to 645 MHz (214)
>[  191.110238] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[  191.110250] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0000
>[  191.110255] [drm:intel_display_power_put] disabling dpio-common
>[  191.118044] [drm:intel_display_power_put] disabling dpio-tx-c-23
>[  191.126052] [drm:intel_display_power_put] disabling dpio-tx-c-01
>[  191.134061] [drm:intel_display_power_put] disabling dpio-tx-b-23
>[  191.142068] [drm:intel_display_power_put] disabling dpio-tx-b-01
>[  191.150074] [drm:intel_display_power_put] disabling display
>[  191.158085] [drm:intel_runtime_suspend] Suspending device
>[  191.159951] [drm:vlv_wait_for_gt_wells] waiting for GT wells to go off (000000a1)
>[  191.164112] [drm:intel_runtime_suspend] Device suspended
>[  191.243667] [drm:drm_mode_setcrtc] [CRTC:19]
>[  191.243704] [drm:drm_mode_setcrtc] [CONNECTOR:39:eDP-1]
>[  191.243725] [drm:intel_crtc_set_config] [CRTC:19] [FB:45] #connectors=1 (x y) (0 0)
>[  191.243731] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  191.243735] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:19], mode_changed=1, fb_changed=0
>[  191.243739] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  191.243743] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [CRTC:19]
>[  191.243747] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  191.243751] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  191.243755] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  191.243761] [drm:connected_sink_compute_bpp] [CONNECTOR:39:eDP-1] checking for sink bpp constrains
>[  191.243765] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[  191.243772] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[  191.243777] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[  191.243780] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[  191.243786] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  191.243790] [drm:intel_dump_pipe_config] [CRTC:19][modeset] config for pipe A
>[  191.243793] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  191.243797] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  191.243801] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  191.243806] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[  191.243810] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  191.243813] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  191.243816] [drm:intel_dump_pipe_config] requested mode:
>[  191.243822] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  191.243825] [drm:intel_dump_pipe_config] adjusted mode:
>[  191.243831] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  191.243837] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[  191.243840] [drm:intel_dump_pipe_config] port clock: 270000
>[  191.243843] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[  191.243847] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  191.243851] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  191.243854] [drm:intel_dump_pipe_config] ips: 0
>[  191.243857] [drm:intel_dump_pipe_config] double wide: 0
>[  191.254465] [drm:intel_runtime_resume] Resuming device
>[  191.256161] [drm:intel_runtime_resume] Device resumed
>[  191.256169] [drm:intel_display_power_get] enabling display
>[  191.264170] [drm:i915_redisable_vga_power_on] Something enabled VGA plane, disabling it
>[  191.264481] [drm:intel_display_power_get] enabling dpio-tx-b-01
>[  191.272168] [drm:intel_display_power_get] enabling dpio-tx-b-23
>[  191.280174] [drm:intel_display_power_get] enabling dpio-tx-c-01
>[  191.288181] [drm:intel_display_power_get] enabling dpio-tx-c-23
>[  191.296186] [drm:intel_display_power_get] enabling dpio-common
>[  191.318213] [drm:vlv_update_cdclk] Current CD clock rate: 266667 kHz
>[  191.358244] [drm:vlv_init_panel_power_sequencer] initializing pipe A power sequencer for port C
>[  191.358253] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x87d00001, PP_OFF 0x1f40001, PP_DIV 0x270f05
>[  191.358260] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[  191.358264] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  191.611397] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control 00000000
>[  191.688765] [drm:wait_panel_status] Wait complete
>[  191.688801] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  191.688806] [drm:edp_panel_vdd_on] eDP port C panel power wasn't enabled
>[  191.782333] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00100000, dig 0x00000000
>[  191.782358] [drm:intel_hpd_irq_handler] digital hpd port C - long
>[  191.782374] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 5 - cnt: 0
>[  191.782815] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port C
>[  191.889775] [drm:edp_panel_on] Turn eDP port C panel power on
>[  191.889805] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  191.889811] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[  191.889815] [drm:wait_panel_status] Wait complete
>[  191.889819] [drm:wait_panel_on] Wait for panel power on
>[  191.889824] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd000b
>[  192.044052] [drm:wait_panel_status] Wait complete
>[  192.044079] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[  192.044093] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0003
>[  192.044105] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[  192.044111] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  192.058808] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  192.059590] [drm:intel_dp_start_link_train] clock recovery OK
>[  192.060688] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  192.060886] [drm:g4x_check_srwm] SR watermark: display plane 56, cursor 2
>[  192.060890] [drm:g4x_check_srwm] SR watermark: display plane 109, cursor 2
>[  192.060895] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=109, cursor=2, B: plane=2, cursor=2, SR: plane=56, cursor=2
>[  192.060900] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[  192.060908] [drm:intel_edp_backlight_on] 
>[  192.060912] [drm:intel_panel_enable_backlight] pipe A
>[  192.060916] [drm:intel_panel_actually_set_backlight] set backlight PWM = 3906
>[  192.060924] [drm:intel_psr_enable] PSR not supported by this panel
>[  192.060936] [drm:i9xx_update_primary_plane] Writing base 0103C000 00000000 0 0 5504
>[  192.060947] [drm:intel_connector_check_state] [CONNECTOR:39:eDP-1]
>[  192.060956] [drm:check_encoder_state] [ENCODER:28:DAC-28]
>[  192.060961] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  192.060965] [drm:check_encoder_state] [ENCODER:34:TMDS-34]
>[  192.060969] [drm:check_encoder_state] [ENCODER:36:TMDS-36]
>[  192.060972] [drm:check_encoder_state] [ENCODER:38:TMDS-38]
>[  192.060977] [drm:check_crtc_state] [CRTC:19]
>[  192.062687] [drm:check_crtc_state] [CRTC:24]
>[  192.062862] [drm:intel_crtc_set_config] [CRTC:19] [NOFB]
>[  192.062868] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:19], mode_changed=1, fb_changed=0
>[  192.062872] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [NOCRTC]
>[  192.062875] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  192.062879] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  192.062883] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  192.062887] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[  192.062893] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[  192.078024] [drm:intel_edp_backlight_off] 
>[  192.278861] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  192.279244] [drm:edp_panel_off] Turn eDP port C panel power off
>[  192.279249] [drm:wait_panel_off] Wait for panel power off time
>[  192.279255] [drm:wait_panel_status] mask b0000000 value 00000000 status e0000003 control abcd0000
>[  192.323281] [drm:wait_panel_status] Wait complete
>[  192.329030] [drm:intel_dp_link_down] 
>[  192.380282] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[  192.380302] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=2, cursor=2, B: plane=2, cursor=2, SR: plane=0, cursor=0
>[  192.394080] [drm:vlv_update_cdclk] Current CD clock rate: 200000 kHz
>[  192.394087] [drm:intel_display_power_put] disabling dpio-common
>[  192.402088] [drm:intel_display_power_put] disabling dpio-tx-c-23
>[  192.410093] [drm:intel_display_power_put] disabling dpio-tx-c-01
>[  192.418100] [drm:intel_display_power_put] disabling dpio-tx-b-23
>[  192.426106] [drm:intel_display_power_put] disabling dpio-tx-b-01
>[  192.434113] [drm:intel_display_power_put] disabling display
>[  192.442127] [drm:check_encoder_state] [ENCODER:28:DAC-28]
>[  192.442133] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  192.442137] [drm:check_encoder_state] [ENCODER:34:TMDS-34]
>[  192.442141] [drm:check_encoder_state] [ENCODER:36:TMDS-36]
>[  192.442144] [drm:check_encoder_state] [ENCODER:38:TMDS-38]
>[  192.442148] [drm:check_crtc_state] [CRTC:19]
>[  192.442152] [drm:check_crtc_state] [CRTC:24]
>[  192.445577] [drm:intel_crtc_set_config] [CRTC:19] [FB:72] #connectors=1 (x y) (0 0)
>[  192.445581] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  192.445584] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:19], mode_changed=1, fb_changed=0
>[  192.445586] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  192.445588] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [CRTC:19]
>[  192.445590] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  192.445592] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  192.445595] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  192.445598] [drm:connected_sink_compute_bpp] [CONNECTOR:39:eDP-1] checking for sink bpp constrains
>[  192.445600] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[  192.445606] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[  192.445609] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[  192.445611] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[  192.445614] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  192.445616] [drm:intel_dump_pipe_config] [CRTC:19][modeset] config for pipe A
>[  192.445617] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  192.445619] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  192.445621] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  192.445624] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[  192.445627] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  192.445628] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  192.445629] [drm:intel_dump_pipe_config] requested mode:
>[  192.445634] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  192.445635] [drm:intel_dump_pipe_config] adjusted mode:
>[  192.445639] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  192.445643] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[  192.445644] [drm:intel_dump_pipe_config] port clock: 270000
>[  192.445646] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[  192.445648] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  192.445650] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  192.445651] [drm:intel_dump_pipe_config] ips: 0
>[  192.445653] [drm:intel_dump_pipe_config] double wide: 0
>[  192.445660] [drm:intel_display_power_get] enabling display
>[  192.453126] [drm:i915_redisable_vga_power_on] Something enabled VGA plane, disabling it
>[  192.453432] [drm:intel_display_power_get] enabling dpio-tx-b-01
>[  192.461136] [drm:intel_display_power_get] enabling dpio-tx-b-23
>[  192.469144] [drm:intel_display_power_get] enabling dpio-tx-c-01
>[  192.477151] [drm:intel_display_power_get] enabling dpio-tx-c-23
>[  192.485157] [drm:intel_display_power_get] enabling dpio-common
>[  192.507177] [drm:vlv_update_cdclk] Current CD clock rate: 266667 kHz
>[  192.547211] [drm:vlv_init_panel_power_sequencer] initializing pipe A power sequencer for port C
>[  192.547216] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x87d00001, PP_OFF 0x1f40001, PP_DIV 0x270f05
>[  192.547221] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[  192.547223] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  192.780271] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control 00000000
>[  192.879730] [drm:wait_panel_status] Wait complete
>[  192.879747] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  192.879758] [drm:edp_panel_vdd_on] eDP port C panel power wasn't enabled
>[  192.900013] [drm:intel_print_rc6_info] Enabling RC6 states: RC6 on
>[  192.901495] [drm:valleyview_enable_rps] GPLL enabled? yes
>[  192.901498] [drm:valleyview_enable_rps] GPU status: 0x0000c0d0
>[  192.901501] [drm:valleyview_enable_rps] current GPU freq: 187 MHz (192)
>[  192.901502] [drm:valleyview_enable_rps] setting GPU freq to 645 MHz (214)
>[  192.973275] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00100000, dig 0x00000000
>[  192.973284] [drm:intel_hpd_irq_handler] digital hpd port C - long
>[  192.973292] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 5 - cnt: 0
>[  192.973500] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port C
>[  193.080648] [drm:edp_panel_on] Turn eDP port C panel power on
>[  193.080658] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  193.080673] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[  193.080678] [drm:wait_panel_status] Wait complete
>[  193.080686] [drm:wait_panel_on] Wait for panel power on
>[  193.080696] [drm:wait_panel_status] mask b000000f value 80000008 status 9000000a control abcd000b
>[  193.235028] [drm:wait_panel_status] Wait complete
>[  193.235038] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[  193.235052] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0003
>[  193.235069] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[  193.235074] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  193.249775] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  193.250588] [drm:intel_dp_start_link_train] clock recovery OK
>[  193.251714] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  193.251910] [drm:g4x_check_srwm] SR watermark: display plane 56, cursor 2
>[  193.251912] [drm:g4x_check_srwm] SR watermark: display plane 109, cursor 2
>[  193.251915] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=109, cursor=2, B: plane=2, cursor=2, SR: plane=56, cursor=2
>[  193.251919] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[  193.251924] [drm:intel_edp_backlight_on] 
>[  193.251926] [drm:intel_panel_enable_backlight] pipe A
>[  193.251929] [drm:intel_panel_actually_set_backlight] set backlight PWM = 3906
>[  193.251935] [drm:intel_psr_enable] PSR not supported by this panel
>[  193.251944] [drm:i9xx_update_primary_plane] Writing base 00853000 00000000 0 0 7680
>[  193.251955] [drm:intel_connector_check_state] [CONNECTOR:39:eDP-1]
>[  193.251962] [drm:check_encoder_state] [ENCODER:28:DAC-28]
>[  193.251964] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  193.251966] [drm:check_encoder_state] [ENCODER:34:TMDS-34]
>[  193.251969] [drm:check_encoder_state] [ENCODER:36:TMDS-36]
>[  193.251971] [drm:check_encoder_state] [ENCODER:38:TMDS-38]
>[  193.251973] [drm:check_crtc_state] [CRTC:19]
>[  193.253655] [drm:check_crtc_state] [CRTC:24]
>[  193.253662] [drm:intel_crtc_set_config] [CRTC:24] [FB:72] #connectors=1 (x y) (0 0)
>[  193.253665] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  193.253668] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=1, fb_changed=0
>[  193.253669] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  193.253671] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [CRTC:19]
>[  193.253674] [drm:intel_modeset_stage_output_state] [CONNECTOR:30:HDMI-A-1] to [CRTC:24]
>[  193.253675] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  193.253677] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  193.253680] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  193.253684] [drm:connected_sink_compute_bpp] [CONNECTOR:30:HDMI-A-1] checking for sink bpp constrains
>[  193.253689] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[  193.253691] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[  193.253693] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  193.253695] [drm:intel_dump_pipe_config] [CRTC:24][modeset] config for pipe B
>[  193.253697] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[  193.253698] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  193.253701] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  193.253703] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  193.253705] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  193.253707] [drm:intel_dump_pipe_config] audio: 1, infoframes: 1
>[  193.253708] [drm:intel_dump_pipe_config] requested mode:
>[  193.253713] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  193.253714] [drm:intel_dump_pipe_config] adjusted mode:
>[  193.253718] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  193.253722] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[  193.253723] [drm:intel_dump_pipe_config] port clock: 148500
>[  193.253725] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  193.253727] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  193.253729] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  193.253730] [drm:intel_dump_pipe_config] ips: 0
>[  193.253731] [drm:intel_dump_pipe_config] double wide: 0
>[  193.329857] [drm:intel_enable_hdmi] Enabling HDMI audio on pipe B
>[  193.329861] [drm:intel_audio_codec_enable] ELD on [CONNECTOR:30:HDMI-A-1], [ENCODER:29:TMDS-29]
>[  193.329863] [drm:ilk_audio_codec_enable] Enable audio codec on port B, pipe B, 36 bytes ELD
>[  193.329870] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 148500 (0x00090000)
>[  193.329924] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[  193.329927] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=109, cursor=2, B: plane=64, cursor=2, SR: plane=0, cursor=0
>[  193.329938] [drm:i9xx_update_primary_plane] Writing base 00853000 00000000 0 0 7680
>[  193.329944] [drm:intel_connector_check_state] [CONNECTOR:39:eDP-1]
>[  193.329948] [drm:intel_connector_check_state] [CONNECTOR:30:HDMI-A-1]
>[  193.329951] [drm:check_encoder_state] [ENCODER:28:DAC-28]
>[  193.329954] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  193.329956] [drm:check_encoder_state] [ENCODER:34:TMDS-34]
>[  193.329958] [drm:check_encoder_state] [ENCODER:36:TMDS-36]
>[  193.329960] [drm:check_encoder_state] [ENCODER:38:TMDS-38]
>[  193.329962] [drm:check_crtc_state] [CRTC:19]
>[  193.331718] [drm:check_crtc_state] [CRTC:24]
>[  193.333727] [drm:intel_crtc_set_config] [CRTC:19] [FB:72] #connectors=1 (x y) (0 0)
>[  193.333731] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:19], mode_changed=0, fb_changed=0
>[  193.333734] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [CRTC:19]
>[  193.333736] [drm:intel_modeset_stage_output_state] [CONNECTOR:30:HDMI-A-1] to [CRTC:24]
>[  193.333744] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  193.333747] [drm:connected_sink_compute_bpp] [CONNECTOR:39:eDP-1] checking for sink bpp constrains
>[  193.333748] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[  193.333753] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[  193.333756] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[  193.333758] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[  193.333760] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  193.333762] [drm:intel_dump_pipe_config] [CRTC:19][modeset] config for pipe A
>[  193.333764] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  193.333765] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  193.333768] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  193.333771] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[  193.333773] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  193.333775] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  193.333776] [drm:intel_dump_pipe_config] requested mode:
>[  193.333780] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  193.333781] [drm:intel_dump_pipe_config] adjusted mode:
>[  193.333785] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  193.333789] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[  193.333790] [drm:intel_dump_pipe_config] port clock: 270000
>[  193.333792] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[  193.333794] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  193.333796] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  193.333797] [drm:intel_dump_pipe_config] ips: 0
>[  193.333799] [drm:intel_dump_pipe_config] double wide: 0
>[  193.333802] [drm:intel_crtc_set_config] [CRTC:24] [FB:72] #connectors=1 (x y) (0 0)
>[  193.333805] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[  193.333807] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [CRTC:19]
>[  193.333810] [drm:intel_modeset_stage_output_state] [CONNECTOR:30:HDMI-A-1] to [CRTC:24]
>[  193.333813] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  193.333815] [drm:connected_sink_compute_bpp] [CONNECTOR:30:HDMI-A-1] checking for sink bpp constrains
>[  193.333819] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[  193.333821] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[  193.333823] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  193.333824] [drm:intel_dump_pipe_config] [CRTC:24][modeset] config for pipe B
>[  193.333826] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[  193.333827] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  193.333830] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  193.333832] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  193.333834] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  193.333836] [drm:intel_dump_pipe_config] audio: 1, infoframes: 1
>[  193.333837] [drm:intel_dump_pipe_config] requested mode:
>[  193.333841] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  193.333842] [drm:intel_dump_pipe_config] adjusted mode:
>[  193.333846] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  193.333849] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[  193.333851] [drm:intel_dump_pipe_config] port clock: 148500
>[  193.333852] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  193.333854] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  193.333856] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  193.333858] [drm:intel_dump_pipe_config] ips: 0
>[  193.333859] [drm:intel_dump_pipe_config] double wide: 0
>[  193.333878] [drm:intel_crtc_set_config] [CRTC:19] [FB:72] #connectors=1 (x y) (0 0)
>[  193.333881] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:19], mode_changed=0, fb_changed=0
>[  193.333884] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [CRTC:19]
>[  193.333886] [drm:intel_modeset_stage_output_state] [CONNECTOR:30:HDMI-A-1] to [CRTC:24]
>[  193.333888] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  193.333891] [drm:connected_sink_compute_bpp] [CONNECTOR:39:eDP-1] checking for sink bpp constrains
>[  193.333893] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[  193.333896] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[  193.333898] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[  193.333900] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[  193.333903] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  193.333904] [drm:intel_dump_pipe_config] [CRTC:19][modeset] config for pipe A
>[  193.333910] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  193.333912] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  193.333914] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  193.333917] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[  193.333919] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  193.333921] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  193.333922] [drm:intel_dump_pipe_config] requested mode:
>[  193.333926] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  193.333927] [drm:intel_dump_pipe_config] adjusted mode:
>[  193.333931] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  193.333935] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[  193.333936] [drm:intel_dump_pipe_config] port clock: 270000
>[  193.333938] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[  193.333940] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  193.333942] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  193.333943] [drm:intel_dump_pipe_config] ips: 0
>[  193.333944] [drm:intel_dump_pipe_config] double wide: 0
>[  193.333948] [drm:intel_crtc_set_config] [CRTC:24] [FB:72] #connectors=1 (x y) (0 0)
>[  193.333951] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[  193.333953] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [CRTC:19]
>[  193.333955] [drm:intel_modeset_stage_output_state] [CONNECTOR:30:HDMI-A-1] to [CRTC:24]
>[  193.333957] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  193.333960] [drm:connected_sink_compute_bpp] [CONNECTOR:30:HDMI-A-1] checking for sink bpp constrains
>[  193.333963] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[  193.333965] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[  193.333967] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  193.333969] [drm:intel_dump_pipe_config] [CRTC:24][modeset] config for pipe B
>[  193.333970] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[  193.333972] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  193.333974] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  193.333977] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  193.333979] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  193.333980] [drm:intel_dump_pipe_config] audio: 1, infoframes: 1
>[  193.333982] [drm:intel_dump_pipe_config] requested mode:
>[  193.333985] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  193.333987] [drm:intel_dump_pipe_config] adjusted mode:
>[  193.333990] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  193.333994] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[  193.333995] [drm:intel_dump_pipe_config] port clock: 148500
>[  193.333997] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  193.333999] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  193.334001] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  193.334002] [drm:intel_dump_pipe_config] ips: 0
>[  193.334003] [drm:intel_dump_pipe_config] double wide: 0
>[  193.343854] [drm:intel_crtc_set_config] [CRTC:19] [FB:72] #connectors=1 (x y) (0 0)
>[  193.343868] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:19], mode_changed=0, fb_changed=0
>[  193.343882] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [CRTC:19]
>[  193.343895] [drm:intel_modeset_stage_output_state] [CONNECTOR:30:HDMI-A-1] to [CRTC:24]
>[  193.343908] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  193.343921] [drm:connected_sink_compute_bpp] [CONNECTOR:39:eDP-1] checking for sink bpp constrains
>[  193.343934] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[  193.343948] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[  193.343961] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[  193.343967] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[  193.343971] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  193.343975] [drm:intel_dump_pipe_config] [CRTC:19][modeset] config for pipe A
>[  193.343978] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  193.343981] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  193.343986] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  193.343990] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[  193.343995] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  193.343998] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  193.344001] [drm:intel_dump_pipe_config] requested mode:
>[  193.344007] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  193.344010] [drm:intel_dump_pipe_config] adjusted mode:
>[  193.344015] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  193.344021] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[  193.344024] [drm:intel_dump_pipe_config] port clock: 270000
>[  193.344027] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[  193.344031] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  193.344035] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  193.344038] [drm:intel_dump_pipe_config] ips: 0
>[  193.344041] [drm:intel_dump_pipe_config] double wide: 0
>[  193.344046] [drm:intel_crtc_set_config] [CRTC:24] [FB:72] #connectors=1 (x y) (0 0)
>[  193.344051] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[  193.344055] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [CRTC:19]
>[  193.344059] [drm:intel_modeset_stage_output_state] [CONNECTOR:30:HDMI-A-1] to [CRTC:24]
>[  193.344063] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  193.344068] [drm:connected_sink_compute_bpp] [CONNECTOR:30:HDMI-A-1] checking for sink bpp constrains
>[  193.344073] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[  193.344077] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[  193.344081] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  193.344084] [drm:intel_dump_pipe_config] [CRTC:24][modeset] config for pipe B
>[  193.344087] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[  193.344091] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  193.344095] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  193.344099] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  193.344103] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  193.344106] [drm:intel_dump_pipe_config] audio: 1, infoframes: 1
>[  193.344109] [drm:intel_dump_pipe_config] requested mode:
>[  193.344115] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  193.344118] [drm:intel_dump_pipe_config] adjusted mode:
>[  193.344124] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  193.344129] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[  193.344132] [drm:intel_dump_pipe_config] port clock: 148500
>[  193.344135] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  193.344139] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  193.344143] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  193.344146] [drm:intel_dump_pipe_config] ips: 0
>[  193.344149] [drm:intel_dump_pipe_config] double wide: 0
>[  195.762112] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[  195.762137] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  197.453632] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00040000, dig 0x00000000
>[  197.453656] [drm:intel_hpd_irq_handler] digital hpd port B - long
>[  197.453672] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 4 - cnt: 0
>[  197.453747] [drm:intel_dp_hpd_pulse] got hpd irq on port B - long
>[  197.453763] [drm:i915_hotplug_work_func] running encoder hotplug functions
>[  197.453769] [drm:i915_hotplug_work_func] Connector HDMI-A-1 (pin 4) received hotplug event.
>[  197.453773] [drm:i915_hotplug_work_func] Connector DP-1 (pin 4) received hotplug event.
>[  197.453777] [drm:intel_hdmi_detect] [CONNECTOR:30:HDMI-A-1]
>[  197.478213] [drm:drm_detect_monitor_audio] Monitor has basic audio support
>[  197.478219] [drm:intel_dp_detect] [CONNECTOR:35:DP-1]
>[  197.803309] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00040000, dig 0x00000000
>[  197.803334] [drm:intel_hpd_irq_handler] digital hpd port B - long
>[  197.803350] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 4 - cnt: 1
>[  197.803424] [drm:intel_dp_hpd_pulse] got hpd irq on port B - long
>[  197.805890] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  197.808352] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  197.812802] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  197.816803] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  197.818365] [drm:i915_hotplug_work_func] running encoder hotplug functions
>[  197.818371] [drm:i915_hotplug_work_func] Connector HDMI-A-1 (pin 4) received hotplug event.
>[  197.818375] [drm:i915_hotplug_work_func] Connector DP-1 (pin 4) received hotplug event.
>[  197.818380] [drm:intel_hdmi_detect] [CONNECTOR:30:HDMI-A-1]
>[  197.842801] [drm:drm_detect_monitor_audio] Monitor has basic audio support
>[  197.842808] [drm:intel_dp_detect] [CONNECTOR:35:DP-1]
>[  197.845262] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  197.847719] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  197.851831] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  197.855834] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  199.742334] pm_rpm: executing
>[  199.742513] [drm:i915_gem_open] 
>[  199.743239] [drm:i915_gem_open] 
>[  199.743277] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[5] ENCODERS[5]
>[  199.743312] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[5] ENCODERS[5]
>[  199.743332] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[  199.743338] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:eDP-1]
>[  199.743342] [drm:intel_dp_detect] [CONNECTOR:39:eDP-1]
>[  199.743351] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[  199.743358] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[  199.743684] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[  199.744024] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  199.744044] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  199.744051] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:eDP-1] probed modes :
>[  199.744058] [drm:drm_mode_debug_printmodeline] Modeline 40:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  199.744066] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[  199.744114] [drm:drm_mode_getconnector] [CONNECTOR:27:?]
>[  199.744119] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:27:VGA-1]
>[  199.744123] [drm:intel_crt_detect] [CONNECTOR:27:VGA-1] force=1
>[  199.744128] [drm:valleyview_crt_detect_hotplug] trigger hotplug detect cycle: adpa=0x40000
>[  199.747932] [drm:valleyview_crt_detect_hotplug] valleyview hotplug adpa=0x40000, result 0
>[  199.747934] [drm:intel_crt_detect] CRT not detected via hotplug
>[  199.748091] [drm:gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1)
>[  199.748097] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[  199.748100] [drm:intel_crt_get_edid] CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[  199.748105] [drm:intel_gmbus_force_bit] enabling bit-banging on i915 gmbus vga. force bit now 1
>[  199.748386] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[  199.748390] [drm:intel_gmbus_force_bit] disabling bit-banging on i915 gmbus vga. force bit now 0
>[  199.748393] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found]
>[  199.748397] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:27:VGA-1] disconnected
>[  199.748405] [drm:drm_mode_getconnector] [CONNECTOR:27:?]
>[  199.748409] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:27:VGA-1]
>[  199.748413] [drm:intel_crt_detect] [CONNECTOR:27:VGA-1] force=1
>[  199.748418] [drm:valleyview_crt_detect_hotplug] trigger hotplug detect cycle: adpa=0x40000
>[  199.751932] [drm:valleyview_crt_detect_hotplug] valleyview hotplug adpa=0x40000, result 0
>[  199.751936] [drm:intel_crt_detect] CRT not detected via hotplug
>[  199.752095] [drm:gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1)
>[  199.752099] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[  199.752102] [drm:intel_crt_get_edid] CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[  199.752106] [drm:intel_gmbus_force_bit] enabling bit-banging on i915 gmbus vga. force bit now 1
>[  199.752385] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[  199.752389] [drm:intel_gmbus_force_bit] disabling bit-banging on i915 gmbus vga. force bit now 0
>[  199.752393] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found]
>[  199.752397] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:27:VGA-1] disconnected
>[  199.752424] [drm:drm_mode_getconnector] [CONNECTOR:30:?]
>[  199.752429] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:30:HDMI-A-1]
>[  199.752438] [drm:intel_hdmi_detect] [CONNECTOR:30:HDMI-A-1]
>[  199.776876] [drm:drm_detect_monitor_audio] Monitor has basic audio support
>[  199.777111] [drm:drm_edid_to_eld] ELD monitor Acer HS244HQ
>[  199.777118] [drm:parse_hdmi_vsdb] HDMI: DVI dual 0, max TMDS clock 165, latency present 0 0, video latency 192 1, audio latency 11 1
>[  199.777121] [drm:drm_edid_to_eld] ELD size 36, SAD count 1
>[  199.777244] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:30:HDMI-A-1] probed modes :
>[  199.777251] [drm:drm_mode_debug_printmodeline] Modeline 46:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  199.777257] [drm:drm_mode_debug_printmodeline] Modeline 103:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  199.777263] [drm:drm_mode_debug_printmodeline] Modeline 74:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  199.777269] [drm:drm_mode_debug_printmodeline] Modeline 91:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
>[  199.777275] [drm:drm_mode_debug_printmodeline] Modeline 109:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  199.777280] [drm:drm_mode_debug_printmodeline] Modeline 120:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
>[  199.777286] [drm:drm_mode_debug_printmodeline] Modeline 80:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  199.777292] [drm:drm_mode_debug_printmodeline] Modeline 73:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  199.777298] [drm:drm_mode_debug_printmodeline] Modeline 90:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x20015
>[  199.777304] [drm:drm_mode_debug_printmodeline] Modeline 70:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  199.777310] [drm:drm_mode_debug_printmodeline] Modeline 84:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x1c005
>[  199.777316] [drm:drm_mode_debug_printmodeline] Modeline 85:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x4005
>[  199.777322] [drm:drm_mode_debug_printmodeline] Modeline 93:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x20005
>[  199.777328] [drm:drm_mode_debug_printmodeline] Modeline 107:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  199.777333] [drm:drm_mode_debug_printmodeline] Modeline 116:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x1c005
>[  199.777339] [drm:drm_mode_debug_printmodeline] Modeline 117:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x4005
>[  199.777345] [drm:drm_mode_debug_printmodeline] Modeline 122:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x20005
>[  199.777351] [drm:drm_mode_debug_printmodeline] Modeline 54:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[  199.777357] [drm:drm_mode_debug_printmodeline] Modeline 62:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  199.777363] [drm:drm_mode_debug_printmodeline] Modeline 51:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  199.777369] [drm:drm_mode_debug_printmodeline] Modeline 53:"1440x900" 75 136750 1440 1536 1688 1936 900 903 909 942 0x40 0x6
>[  199.777375] [drm:drm_mode_debug_printmodeline] Modeline 52:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[  199.777381] [drm:drm_mode_debug_printmodeline] Modeline 50:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>[  199.777386] [drm:drm_mode_debug_printmodeline] Modeline 49:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  199.777392] [drm:drm_mode_debug_printmodeline] Modeline 48:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  199.777398] [drm:drm_mode_debug_printmodeline] Modeline 82:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x1c005
>[  199.777404] [drm:drm_mode_debug_printmodeline] Modeline 83:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x4005
>[  199.777410] [drm:drm_mode_debug_printmodeline] Modeline 97:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x20005
>[  199.777416] [drm:drm_mode_debug_printmodeline] Modeline 105:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  199.777422] [drm:drm_mode_debug_printmodeline] Modeline 114:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x1c005
>[  199.777428] [drm:drm_mode_debug_printmodeline] Modeline 115:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x4005
>[  199.777434] [drm:drm_mode_debug_printmodeline] Modeline 124:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x20005
>[  199.777440] [drm:drm_mode_debug_printmodeline] Modeline 71:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  199.777446] [drm:drm_mode_debug_printmodeline] Modeline 86:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x1c005
>[  199.777452] [drm:drm_mode_debug_printmodeline] Modeline 87:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x4005
>[  199.777458] [drm:drm_mode_debug_printmodeline] Modeline 95:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x20005
>[  199.777464] [drm:drm_mode_debug_printmodeline] Modeline 63:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  199.777470] [drm:drm_mode_debug_printmodeline] Modeline 64:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[  199.777475] [drm:drm_mode_debug_printmodeline] Modeline 65:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  199.777481] [drm:drm_mode_debug_printmodeline] Modeline 66:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[  199.777487] [drm:drm_mode_debug_printmodeline] Modeline 67:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  199.777493] [drm:drm_mode_debug_printmodeline] Modeline 68:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  199.777499] [drm:drm_mode_debug_printmodeline] Modeline 55:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  199.777505] [drm:drm_mode_debug_printmodeline] Modeline 56:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  199.777511] [drm:drm_mode_debug_printmodeline] Modeline 79:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  199.777516] [drm:drm_mode_debug_printmodeline] Modeline 111:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  199.777522] [drm:drm_mode_debug_printmodeline] Modeline 76:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  199.777528] [drm:drm_mode_debug_printmodeline] Modeline 57:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  199.777534] [drm:drm_mode_debug_printmodeline] Modeline 58:"640x480" 73 31500 640 664 704 832 480 489 491 520 0x40 0xa
>[  199.777539] [drm:drm_mode_debug_printmodeline] Modeline 59:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[  199.777545] [drm:drm_mode_debug_printmodeline] Modeline 60:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  199.777551] [drm:drm_mode_debug_printmodeline] Modeline 78:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  199.777557] [drm:drm_mode_debug_printmodeline] Modeline 61:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  199.777568] [drm:drm_mode_getconnector] [CONNECTOR:30:?]
>[  199.777612] [drm:drm_mode_getconnector] [CONNECTOR:35:?]
>[  199.777616] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:DP-1]
>[  199.777620] [drm:intel_dp_detect] [CONNECTOR:35:DP-1]
>[  199.780173] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  199.782630] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  199.786405] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  199.790407] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  199.791964] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:DP-1] disconnected
>[  199.791973] [drm:drm_mode_getconnector] [CONNECTOR:35:?]
>[  199.791978] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:DP-1]
>[  199.791981] [drm:intel_dp_detect] [CONNECTOR:35:DP-1]
>[  199.794439] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  199.796894] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  199.800416] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  199.804418] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  199.805975] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:DP-1] disconnected
>[  199.806001] [drm:drm_mode_getconnector] [CONNECTOR:37:?]
>[  199.806006] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:37:HDMI-A-2]
>[  199.806009] [drm:intel_hdmi_detect] [CONNECTOR:37:HDMI-A-2]
>[  199.806292] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  199.806296] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:37:HDMI-A-2] disconnected
>[  199.806302] [drm:drm_mode_getconnector] [CONNECTOR:37:?]
>[  199.806306] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:37:HDMI-A-2]
>[  199.806309] [drm:intel_hdmi_detect] [CONNECTOR:37:HDMI-A-2]
>[  199.806589] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  199.806593] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:37:HDMI-A-2] disconnected
>[  199.806692] [drm:add_framebuffer_internal] [FB:45]
>[  199.846225] [drm:add_framebuffer_internal] [FB:75]
>[  199.877503] pm_rpm: starting subtest i2c
>[  199.881523] [drm:drm_mode_setcrtc] [CRTC:19]
>[  199.881535] [drm:drm_mode_setcrtc] [CONNECTOR:39:eDP-1]
>[  199.881541] [drm:intel_crtc_set_config] [CRTC:19] [FB:45] #connectors=1 (x y) (0 0)
>[  199.881547] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:19], mode_changed=0, fb_changed=1
>[  199.881552] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [CRTC:19]
>[  199.881556] [drm:intel_modeset_stage_output_state] [CONNECTOR:30:HDMI-A-1] to [CRTC:24]
>[  199.881562] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  199.881567] [drm:connected_sink_compute_bpp] [CONNECTOR:39:eDP-1] checking for sink bpp constrains
>[  199.881571] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[  199.881578] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[  199.881583] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[  199.881586] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[  199.881592] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  199.881596] [drm:intel_dump_pipe_config] [CRTC:19][modeset] config for pipe A
>[  199.881599] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  199.881602] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  199.881607] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  199.881611] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[  199.881615] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  199.881619] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  199.881622] [drm:intel_dump_pipe_config] requested mode:
>[  199.881628] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  199.881631] [drm:intel_dump_pipe_config] adjusted mode:
>[  199.881637] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  199.881642] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[  199.881645] [drm:intel_dump_pipe_config] port clock: 270000
>[  199.881648] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[  199.881652] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  199.881656] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  199.881659] [drm:intel_dump_pipe_config] ips: 0
>[  199.881662] [drm:intel_dump_pipe_config] double wide: 0
>[  199.881681] [drm:i9xx_update_primary_plane] Writing base 0103C000 00000000 0 0 5504
>[  199.886823] [drm:drm_mode_setcrtc] [CRTC:19]
>[  199.886828] [drm:intel_crtc_set_config] [CRTC:19] [NOFB]
>[  199.886833] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:19], mode_changed=1, fb_changed=0
>[  199.886837] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [NOCRTC]
>[  199.886840] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  199.886844] [drm:intel_modeset_stage_output_state] [CONNECTOR:30:HDMI-A-1] to [CRTC:24]
>[  199.886848] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  199.886851] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  199.886856] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[  199.886861] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[  199.903471] [drm:intel_edp_backlight_off] 
>[  200.104222] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  200.104585] [drm:edp_panel_off] Turn eDP port C panel power off
>[  200.104590] [drm:wait_panel_off] Wait for panel power off time
>[  200.104596] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  200.148648] [drm:wait_panel_status] Wait complete
>[  200.154392] [drm:intel_dp_link_down] 
>[  200.205650] [drm:g4x_check_srwm] SR watermark: display plane 114, cursor 2
>[  200.205677] [drm:g4x_check_srwm] SR watermark: display plane 225, cursor 2
>[  200.205682] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=2, cursor=2, B: plane=64, cursor=2, SR: plane=114, cursor=2
>[  200.205687] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[  200.205711] [drm:intel_connector_check_state] [CONNECTOR:30:HDMI-A-1]
>[  200.205717] [drm:check_encoder_state] [ENCODER:28:DAC-28]
>[  200.205721] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  200.205726] [drm:check_encoder_state] [ENCODER:34:TMDS-34]
>[  200.205730] [drm:check_encoder_state] [ENCODER:36:TMDS-36]
>[  200.205734] [drm:check_encoder_state] [ENCODER:38:TMDS-38]
>[  200.205738] [drm:check_crtc_state] [CRTC:19]
>[  200.205743] [drm:check_crtc_state] [CRTC:24]
>[  200.207319] [drm:drm_mode_setcrtc] [CRTC:24]
>[  200.207324] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[  200.207329] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=1, fb_changed=0
>[  200.207333] [drm:intel_modeset_stage_output_state] [CONNECTOR:30:HDMI-A-1] to [NOCRTC]
>[  200.207337] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  200.207340] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  200.207344] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  200.207349] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[  200.207355] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[  200.219302] [drm:ilk_audio_codec_disable] Disable audio codec on port B, pipe B
>[  200.241468] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[  200.241475] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=2, cursor=2, B: plane=2, cursor=2, SR: plane=0, cursor=0
>[  200.255472] [drm:vlv_update_cdclk] Current CD clock rate: 200000 kHz
>[  200.255479] [drm:intel_display_power_put] disabling dpio-common
>[  200.263477] [drm:intel_display_power_put] disabling dpio-tx-c-23
>[  200.263978] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00100000, dig 0x00000000
>[  200.263983] [drm:intel_hpd_irq_handler] digital hpd port C - long
>[  200.263987] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 5 - cnt: 0
>[  200.264086] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port C
>[  200.271484] [drm:intel_display_power_put] disabling dpio-tx-c-01
>[  200.279495] [drm:intel_display_power_put] disabling dpio-tx-b-23
>[  200.287498] [drm:intel_display_power_put] disabling dpio-tx-b-01
>[  200.295503] [drm:intel_display_power_put] disabling display
>[  200.303523] [drm:intel_runtime_suspend] Suspending device
>[  200.303551] [drm:check_encoder_state] [ENCODER:28:DAC-28]
>[  200.303556] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  200.303560] [drm:check_encoder_state] [ENCODER:34:TMDS-34]
>[  200.303563] [drm:check_encoder_state] [ENCODER:36:TMDS-36]
>[  200.303567] [drm:check_encoder_state] [ENCODER:38:TMDS-38]
>[  200.303570] [drm:check_crtc_state] [CRTC:19]
>[  200.303575] [drm:check_crtc_state] [CRTC:24]
>[  200.305410] [drm:intel_runtime_suspend] Device suspended
>[  200.414914] [drm:intel_runtime_resume] Resuming device
>[  200.416607] [drm:intel_runtime_resume] Device resumed
>[  200.416615] [drm:intel_display_power_get] enabling display
>[  200.424617] [drm:i915_redisable_vga_power_on] Something enabled VGA plane, disabling it
>[  200.424927] [drm:intel_display_power_get] enabling dpio-tx-b-01
>[  200.432615] [drm:intel_display_power_get] enabling dpio-tx-b-23
>[  200.440621] [drm:intel_display_power_get] enabling dpio-tx-c-01
>[  200.448628] [drm:intel_display_power_get] enabling dpio-tx-c-23
>[  200.456635] [drm:intel_display_power_get] enabling dpio-common
>[  200.464644] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[  200.464649] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  200.605817] [drm:vlv_power_sequencer_pipe] picked pipe A power sequencer for port C
>[  200.605858] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x87d00001, PP_OFF 0x1f40001, PP_DIV 0x270f05
>[  200.605862] [drm:vlv_power_sequencer_kick] kicking pipe A power sequencer for port C
>[  200.628386] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control 00000000
>[  201.079400] [drm:wait_panel_status] Wait complete
>[  201.079432] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  201.079437] [drm:edp_panel_vdd_on] eDP port C panel power wasn't enabled
>[  201.172932] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00100000, dig 0x00000000
>[  201.172956] [drm:intel_hpd_irq_handler] digital hpd port C - long
>[  201.172973] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 5 - cnt: 1
>[  201.173148] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port C
>[  201.313815] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  201.313826] [drm:drm_dp_i2c_do_msg] transaction failed: -110
>[  201.316232] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  201.316240] [drm:drm_dp_i2c_do_msg] transaction failed: -110
>[  201.344401] [drm:gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 r(128)
>[  201.907263] [drm:intel_print_rc6_info] Enabling RC6 states: RC6 on
>[  201.908683] [drm:valleyview_enable_rps] GPLL enabled? yes
>[  201.908688] [drm:valleyview_enable_rps] GPU status: 0x0000c0d0
>[  201.908692] [drm:valleyview_enable_rps] current GPU freq: 187 MHz (192)
>[  201.908695] [drm:valleyview_enable_rps] setting GPU freq to 645 MHz (214)
>[  203.816583] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[  203.816594] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0000
>[  203.816599] [drm:intel_display_power_put] disabling dpio-common
>[  203.824376] [drm:intel_display_power_put] disabling dpio-tx-c-23
>[  203.832382] [drm:intel_display_power_put] disabling dpio-tx-c-01
>[  203.840391] [drm:intel_display_power_put] disabling dpio-tx-b-23
>[  203.848396] [drm:intel_display_power_put] disabling dpio-tx-b-01
>[  203.856403] [drm:intel_display_power_put] disabling display
>[  203.864694] [drm:intel_runtime_suspend] Suspending device
>[  203.866282] [drm:vlv_wait_for_gt_wells] waiting for GT wells to go off (000000a1)
>[  203.870429] [drm:intel_runtime_suspend] Device suspended
>[  203.954537] [drm:drm_mode_setcrtc] [CRTC:19]
>[  203.954562] [drm:drm_mode_setcrtc] [CONNECTOR:39:eDP-1]
>[  203.954568] [drm:intel_crtc_set_config] [CRTC:19] [FB:45] #connectors=1 (x y) (0 0)
>[  203.954574] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  203.954578] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:19], mode_changed=1, fb_changed=0
>[  203.954582] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  203.954586] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [CRTC:19]
>[  203.954590] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  203.954593] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  203.954598] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  203.954604] [drm:connected_sink_compute_bpp] [CONNECTOR:39:eDP-1] checking for sink bpp constrains
>[  203.954607] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[  203.954614] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[  203.954619] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[  203.954623] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[  203.954628] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  203.954632] [drm:intel_dump_pipe_config] [CRTC:19][modeset] config for pipe A
>[  203.954635] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  203.954638] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  203.954643] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  203.954647] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[  203.954651] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  203.954655] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  203.954657] [drm:intel_dump_pipe_config] requested mode:
>[  203.954664] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  203.954667] [drm:intel_dump_pipe_config] adjusted mode:
>[  203.954673] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  203.954678] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[  203.954681] [drm:intel_dump_pipe_config] port clock: 270000
>[  203.954684] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[  203.954688] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  203.954692] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  203.954695] [drm:intel_dump_pipe_config] ips: 0
>[  203.954698] [drm:intel_dump_pipe_config] double wide: 0
>[  203.965803] [drm:intel_runtime_resume] Resuming device
>[  203.967496] [drm:intel_runtime_resume] Device resumed
>[  203.967504] [drm:intel_display_power_get] enabling display
>[  203.975507] [drm:i915_redisable_vga_power_on] Something enabled VGA plane, disabling it
>[  203.975818] [drm:intel_display_power_get] enabling dpio-tx-b-01
>[  203.983504] [drm:intel_display_power_get] enabling dpio-tx-b-23
>[  203.991509] [drm:intel_display_power_get] enabling dpio-tx-c-01
>[  203.999594] [drm:intel_display_power_get] enabling dpio-tx-c-23
>[  204.007522] [drm:intel_display_power_get] enabling dpio-common
>[  204.029544] [drm:vlv_update_cdclk] Current CD clock rate: 266667 kHz
>[  204.069579] [drm:vlv_init_panel_power_sequencer] initializing pipe A power sequencer for port C
>[  204.069588] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x87d00001, PP_OFF 0x1f40001, PP_DIV 0x270f05
>[  204.069596] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[  204.069600] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  204.318067] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control 00000000
>[  204.406108] [drm:wait_panel_status] Wait complete
>[  204.406141] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  204.406145] [drm:edp_panel_vdd_on] eDP port C panel power wasn't enabled
>[  204.499671] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00100000, dig 0x00000000
>[  204.499695] [drm:intel_hpd_irq_handler] digital hpd port C - long
>[  204.499711] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 5 - cnt: 0
>[  204.499800] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port C
>[  204.607118] [drm:edp_panel_on] Turn eDP port C panel power on
>[  204.607146] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  204.607153] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[  204.607157] [drm:wait_panel_status] Wait complete
>[  204.607161] [drm:wait_panel_on] Wait for panel power on
>[  204.607166] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd000b
>[  204.761694] [drm:wait_panel_status] Wait complete
>[  204.761704] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[  204.761711] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0003
>[  204.761724] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[  204.761730] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  204.776151] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  204.776960] [drm:intel_dp_start_link_train] clock recovery OK
>[  204.778107] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  204.778305] [drm:g4x_check_srwm] SR watermark: display plane 56, cursor 2
>[  204.778310] [drm:g4x_check_srwm] SR watermark: display plane 109, cursor 2
>[  204.778315] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=109, cursor=2, B: plane=2, cursor=2, SR: plane=56, cursor=2
>[  204.778320] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[  204.778327] [drm:intel_edp_backlight_on] 
>[  204.778331] [drm:intel_panel_enable_backlight] pipe A
>[  204.778336] [drm:intel_panel_actually_set_backlight] set backlight PWM = 3906
>[  204.778343] [drm:intel_psr_enable] PSR not supported by this panel
>[  204.778355] [drm:i9xx_update_primary_plane] Writing base 0103C000 00000000 0 0 5504
>[  204.778366] [drm:intel_connector_check_state] [CONNECTOR:39:eDP-1]
>[  204.778375] [drm:check_encoder_state] [ENCODER:28:DAC-28]
>[  204.778380] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  204.778384] [drm:check_encoder_state] [ENCODER:34:TMDS-34]
>[  204.778388] [drm:check_encoder_state] [ENCODER:36:TMDS-36]
>[  204.778391] [drm:check_encoder_state] [ENCODER:38:TMDS-38]
>[  204.778396] [drm:check_crtc_state] [CRTC:19]
>[  204.780027] [drm:check_crtc_state] [CRTC:24]
>[  204.780205] [drm:intel_crtc_set_config] [CRTC:19] [NOFB]
>[  204.780212] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:19], mode_changed=1, fb_changed=0
>[  204.780216] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [NOCRTC]
>[  204.780219] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  204.780223] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  204.780226] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  204.780231] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[  204.780236] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[  204.795488] [drm:intel_edp_backlight_off] 
>[  204.996421] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  204.996841] [drm:edp_panel_off] Turn eDP port C panel power off
>[  204.996847] [drm:wait_panel_off] Wait for panel power off time
>[  204.996852] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  205.040616] [drm:wait_panel_status] Wait complete
>[  205.046232] [drm:intel_dp_link_down] 
>[  205.097621] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[  205.097644] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=2, cursor=2, B: plane=2, cursor=2, SR: plane=0, cursor=0
>[  205.111420] [drm:vlv_update_cdclk] Current CD clock rate: 200000 kHz
>[  205.111427] [drm:intel_display_power_put] disabling dpio-common
>[  205.119426] [drm:intel_display_power_put] disabling dpio-tx-c-23
>[  205.127432] [drm:intel_display_power_put] disabling dpio-tx-c-01
>[  205.135439] [drm:intel_display_power_put] disabling dpio-tx-b-23
>[  205.143445] [drm:intel_display_power_put] disabling dpio-tx-b-01
>[  205.151451] [drm:intel_display_power_put] disabling display
>[  205.159465] [drm:check_encoder_state] [ENCODER:28:DAC-28]
>[  205.159471] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  205.159475] [drm:check_encoder_state] [ENCODER:34:TMDS-34]
>[  205.159479] [drm:check_encoder_state] [ENCODER:36:TMDS-36]
>[  205.159482] [drm:check_encoder_state] [ENCODER:38:TMDS-38]
>[  205.159486] [drm:check_crtc_state] [CRTC:19]
>[  205.159490] [drm:check_crtc_state] [CRTC:24]
>[  205.163034] [drm:intel_crtc_set_config] [CRTC:19] [FB:72] #connectors=1 (x y) (0 0)
>[  205.163038] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  205.163041] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:19], mode_changed=1, fb_changed=0
>[  205.163043] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  205.163045] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [CRTC:19]
>[  205.163047] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  205.163049] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  205.163052] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  205.163055] [drm:connected_sink_compute_bpp] [CONNECTOR:39:eDP-1] checking for sink bpp constrains
>[  205.163057] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[  205.163062] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[  205.163065] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[  205.163067] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[  205.163070] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  205.163072] [drm:intel_dump_pipe_config] [CRTC:19][modeset] config for pipe A
>[  205.163074] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  205.163075] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  205.163078] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  205.163081] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[  205.163083] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  205.163085] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  205.163086] [drm:intel_dump_pipe_config] requested mode:
>[  205.163090] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  205.163092] [drm:intel_dump_pipe_config] adjusted mode:
>[  205.163096] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  205.163099] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[  205.163101] [drm:intel_dump_pipe_config] port clock: 270000
>[  205.163102] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[  205.163105] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  205.163107] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  205.163108] [drm:intel_dump_pipe_config] ips: 0
>[  205.163109] [drm:intel_dump_pipe_config] double wide: 0
>[  205.163116] [drm:intel_display_power_get] enabling display
>[  205.170467] [drm:i915_redisable_vga_power_on] Something enabled VGA plane, disabling it
>[  205.170774] [drm:intel_display_power_get] enabling dpio-tx-b-01
>[  205.178475] [drm:intel_display_power_get] enabling dpio-tx-b-23
>[  205.186482] [drm:intel_display_power_get] enabling dpio-tx-c-01
>[  205.194488] [drm:intel_display_power_get] enabling dpio-tx-c-23
>[  205.202496] [drm:intel_display_power_get] enabling dpio-common
>[  205.224516] [drm:vlv_update_cdclk] Current CD clock rate: 266667 kHz
>[  205.264551] [drm:vlv_init_panel_power_sequencer] initializing pipe A power sequencer for port C
>[  205.264557] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x87d00001, PP_OFF 0x1f40001, PP_DIV 0x270f05
>[  205.264561] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[  205.264564] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  205.497610] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control 00000000
>[  205.597080] [drm:wait_panel_status] Wait complete
>[  205.597097] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  205.597104] [drm:edp_panel_vdd_on] eDP port C panel power wasn't enabled
>[  205.690611] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00100000, dig 0x00000000
>[  205.690619] [drm:intel_hpd_irq_handler] digital hpd port C - long
>[  205.690627] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 5 - cnt: 0
>[  205.690696] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port C
>[  205.797942] [drm:edp_panel_on] Turn eDP port C panel power on
>[  205.797953] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  205.797966] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[  205.797967] [drm:wait_panel_status] Wait complete
>[  205.797970] [drm:wait_panel_on] Wait for panel power on
>[  205.797973] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd000b
>[  205.910323] [drm:intel_print_rc6_info] Enabling RC6 states: RC6 on
>[  205.912073] [drm:valleyview_enable_rps] GPLL enabled? yes
>[  205.912076] [drm:valleyview_enable_rps] GPU status: 0x0000c0d0
>[  205.912078] [drm:valleyview_enable_rps] current GPU freq: 187 MHz (192)
>[  205.912080] [drm:valleyview_enable_rps] setting GPU freq to 645 MHz (214)
>[  205.952362] [drm:wait_panel_status] Wait complete
>[  205.952373] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[  205.952387] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0003
>[  205.952411] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[  205.952415] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  205.967114] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  205.967927] [drm:intel_dp_start_link_train] clock recovery OK
>[  205.969063] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  205.969260] [drm:g4x_check_srwm] SR watermark: display plane 56, cursor 2
>[  205.969262] [drm:g4x_check_srwm] SR watermark: display plane 109, cursor 2
>[  205.969265] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=109, cursor=2, B: plane=2, cursor=2, SR: plane=56, cursor=2
>[  205.969268] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[  205.969273] [drm:intel_edp_backlight_on] 
>[  205.969276] [drm:intel_panel_enable_backlight] pipe A
>[  205.969278] [drm:intel_panel_actually_set_backlight] set backlight PWM = 3906
>[  205.969284] [drm:intel_psr_enable] PSR not supported by this panel
>[  205.969294] [drm:i9xx_update_primary_plane] Writing base 00853000 00000000 0 0 7680
>[  205.969306] [drm:intel_connector_check_state] [CONNECTOR:39:eDP-1]
>[  205.969312] [drm:check_encoder_state] [ENCODER:28:DAC-28]
>[  205.969315] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  205.969317] [drm:check_encoder_state] [ENCODER:34:TMDS-34]
>[  205.969319] [drm:check_encoder_state] [ENCODER:36:TMDS-36]
>[  205.969321] [drm:check_encoder_state] [ENCODER:38:TMDS-38]
>[  205.969324] [drm:check_crtc_state] [CRTC:19]
>[  205.970994] [drm:check_crtc_state] [CRTC:24]
>[  205.971001] [drm:intel_crtc_set_config] [CRTC:24] [FB:72] #connectors=1 (x y) (0 0)
>[  205.971005] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  205.971008] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=1, fb_changed=0
>[  205.971009] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  205.971012] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [CRTC:19]
>[  205.971014] [drm:intel_modeset_stage_output_state] [CONNECTOR:30:HDMI-A-1] to [CRTC:24]
>[  205.971015] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  205.971017] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  205.971020] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  205.971024] [drm:connected_sink_compute_bpp] [CONNECTOR:30:HDMI-A-1] checking for sink bpp constrains
>[  205.971030] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[  205.971031] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[  205.971033] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  205.971035] [drm:intel_dump_pipe_config] [CRTC:24][modeset] config for pipe B
>[  205.971037] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[  205.971038] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  205.971041] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  205.971043] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  205.971046] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  205.971047] [drm:intel_dump_pipe_config] audio: 1, infoframes: 1
>[  205.971048] [drm:intel_dump_pipe_config] requested mode:
>[  205.971053] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  205.971054] [drm:intel_dump_pipe_config] adjusted mode:
>[  205.971058] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  205.971061] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[  205.971063] [drm:intel_dump_pipe_config] port clock: 148500
>[  205.971064] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  205.971066] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  205.971068] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  205.971070] [drm:intel_dump_pipe_config] ips: 0
>[  205.971071] [drm:intel_dump_pipe_config] double wide: 0
>[  206.047196] [drm:intel_enable_hdmi] Enabling HDMI audio on pipe B
>[  206.047200] [drm:intel_audio_codec_enable] ELD on [CONNECTOR:30:HDMI-A-1], [ENCODER:29:TMDS-29]
>[  206.047203] [drm:ilk_audio_codec_enable] Enable audio codec on port B, pipe B, 36 bytes ELD
>[  206.047209] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 148500 (0x00090000)
>[  206.047265] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[  206.047268] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=109, cursor=2, B: plane=64, cursor=2, SR: plane=0, cursor=0
>[  206.047278] [drm:i9xx_update_primary_plane] Writing base 00853000 00000000 0 0 7680
>[  206.047285] [drm:intel_connector_check_state] [CONNECTOR:39:eDP-1]
>[  206.047289] [drm:intel_connector_check_state] [CONNECTOR:30:HDMI-A-1]
>[  206.047292] [drm:check_encoder_state] [ENCODER:28:DAC-28]
>[  206.047295] [drm:check_encoder_state] [ENCODER:29:TMDS-29]
>[  206.047297] [drm:check_encoder_state] [ENCODER:34:TMDS-34]
>[  206.047299] [drm:check_encoder_state] [ENCODER:36:TMDS-36]
>[  206.047301] [drm:check_encoder_state] [ENCODER:38:TMDS-38]
>[  206.047303] [drm:check_crtc_state] [CRTC:19]
>[  206.049057] [drm:check_crtc_state] [CRTC:24]
>[  206.051068] [drm:intel_crtc_set_config] [CRTC:19] [FB:72] #connectors=1 (x y) (0 0)
>[  206.051072] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:19], mode_changed=0, fb_changed=0
>[  206.051074] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [CRTC:19]
>[  206.051076] [drm:intel_modeset_stage_output_state] [CONNECTOR:30:HDMI-A-1] to [CRTC:24]
>[  206.051084] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  206.051087] [drm:connected_sink_compute_bpp] [CONNECTOR:39:eDP-1] checking for sink bpp constrains
>[  206.051089] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[  206.051094] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[  206.051097] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[  206.051099] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[  206.051101] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  206.051103] [drm:intel_dump_pipe_config] [CRTC:19][modeset] config for pipe A
>[  206.051105] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  206.051106] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  206.051109] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  206.051112] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[  206.051114] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  206.051116] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  206.051117] [drm:intel_dump_pipe_config] requested mode:
>[  206.051121] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  206.051122] [drm:intel_dump_pipe_config] adjusted mode:
>[  206.051126] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  206.051130] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[  206.051131] [drm:intel_dump_pipe_config] port clock: 270000
>[  206.051133] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[  206.051135] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  206.051137] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  206.051138] [drm:intel_dump_pipe_config] ips: 0
>[  206.051140] [drm:intel_dump_pipe_config] double wide: 0
>[  206.051143] [drm:intel_crtc_set_config] [CRTC:24] [FB:72] #connectors=1 (x y) (0 0)
>[  206.051146] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[  206.051148] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [CRTC:19]
>[  206.051150] [drm:intel_modeset_stage_output_state] [CONNECTOR:30:HDMI-A-1] to [CRTC:24]
>[  206.051153] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  206.051156] [drm:connected_sink_compute_bpp] [CONNECTOR:30:HDMI-A-1] checking for sink bpp constrains
>[  206.051159] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[  206.051161] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[  206.051163] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  206.051165] [drm:intel_dump_pipe_config] [CRTC:24][modeset] config for pipe B
>[  206.051166] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[  206.051168] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  206.051170] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  206.051173] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  206.051175] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  206.051176] [drm:intel_dump_pipe_config] audio: 1, infoframes: 1
>[  206.051178] [drm:intel_dump_pipe_config] requested mode:
>[  206.051181] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  206.051183] [drm:intel_dump_pipe_config] adjusted mode:
>[  206.051186] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  206.051190] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[  206.051191] [drm:intel_dump_pipe_config] port clock: 148500
>[  206.051193] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  206.051195] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  206.051197] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  206.051198] [drm:intel_dump_pipe_config] ips: 0
>[  206.051199] [drm:intel_dump_pipe_config] double wide: 0
>[  206.051219] [drm:intel_crtc_set_config] [CRTC:19] [FB:72] #connectors=1 (x y) (0 0)
>[  206.051222] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:19], mode_changed=0, fb_changed=0
>[  206.051225] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [CRTC:19]
>[  206.051226] [drm:intel_modeset_stage_output_state] [CONNECTOR:30:HDMI-A-1] to [CRTC:24]
>[  206.051229] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  206.051232] [drm:connected_sink_compute_bpp] [CONNECTOR:39:eDP-1] checking for sink bpp constrains
>[  206.051234] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[  206.051237] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[  206.051239] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[  206.051241] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[  206.051243] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  206.051245] [drm:intel_dump_pipe_config] [CRTC:19][modeset] config for pipe A
>[  206.051251] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  206.051252] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  206.051255] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  206.051258] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[  206.051260] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  206.051262] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  206.051263] [drm:intel_dump_pipe_config] requested mode:
>[  206.051267] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  206.051268] [drm:intel_dump_pipe_config] adjusted mode:
>[  206.051272] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  206.051275] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[  206.051277] [drm:intel_dump_pipe_config] port clock: 270000
>[  206.051278] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[  206.051281] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  206.051282] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  206.051284] [drm:intel_dump_pipe_config] ips: 0
>[  206.051285] [drm:intel_dump_pipe_config] double wide: 0
>[  206.051288] [drm:intel_crtc_set_config] [CRTC:24] [FB:72] #connectors=1 (x y) (0 0)
>[  206.051291] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[  206.051294] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [CRTC:19]
>[  206.051295] [drm:intel_modeset_stage_output_state] [CONNECTOR:30:HDMI-A-1] to [CRTC:24]
>[  206.051298] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  206.051301] [drm:connected_sink_compute_bpp] [CONNECTOR:30:HDMI-A-1] checking for sink bpp constrains
>[  206.051304] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[  206.051305] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[  206.051307] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  206.051309] [drm:intel_dump_pipe_config] [CRTC:24][modeset] config for pipe B
>[  206.051311] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[  206.051312] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  206.051315] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  206.051317] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  206.051319] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  206.051321] [drm:intel_dump_pipe_config] audio: 1, infoframes: 1
>[  206.051322] [drm:intel_dump_pipe_config] requested mode:
>[  206.051326] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  206.051327] [drm:intel_dump_pipe_config] adjusted mode:
>[  206.051331] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  206.051334] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[  206.051336] [drm:intel_dump_pipe_config] port clock: 148500
>[  206.051337] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  206.051339] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  206.051341] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  206.051342] [drm:intel_dump_pipe_config] ips: 0
>[  206.051344] [drm:intel_dump_pipe_config] double wide: 0
>[  206.062442] [drm:intel_crtc_set_config] [CRTC:19] [FB:72] #connectors=1 (x y) (0 0)
>[  206.062452] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:19], mode_changed=0, fb_changed=0
>[  206.062458] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [CRTC:19]
>[  206.062462] [drm:intel_modeset_stage_output_state] [CONNECTOR:30:HDMI-A-1] to [CRTC:24]
>[  206.062468] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  206.062474] [drm:connected_sink_compute_bpp] [CONNECTOR:39:eDP-1] checking for sink bpp constrains
>[  206.062478] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[  206.062485] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[  206.062490] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[  206.062494] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[  206.062499] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  206.062503] [drm:intel_dump_pipe_config] [CRTC:19][modeset] config for pipe A
>[  206.062506] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  206.062509] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  206.062514] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  206.062518] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[  206.062523] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  206.062526] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  206.062529] [drm:intel_dump_pipe_config] requested mode:
>[  206.062535] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  206.062538] [drm:intel_dump_pipe_config] adjusted mode:
>[  206.062544] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[  206.062549] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[  206.062552] [drm:intel_dump_pipe_config] port clock: 270000
>[  206.062556] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[  206.062560] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  206.062563] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  206.062567] [drm:intel_dump_pipe_config] ips: 0
>[  206.062570] [drm:intel_dump_pipe_config] double wide: 0
>[  206.062576] [drm:intel_crtc_set_config] [CRTC:24] [FB:72] #connectors=1 (x y) (0 0)
>[  206.062581] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[  206.062585] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:eDP-1] to [CRTC:19]
>[  206.062589] [drm:intel_modeset_stage_output_state] [CONNECTOR:30:HDMI-A-1] to [CRTC:24]
>[  206.062594] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  206.062598] [drm:connected_sink_compute_bpp] [CONNECTOR:30:HDMI-A-1] checking for sink bpp constrains
>[  206.062605] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[  206.062608] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[  206.062612] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  206.062616] [drm:intel_dump_pipe_config] [CRTC:24][modeset] config for pipe B
>[  206.062619] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[  206.062622] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  206.062627] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  206.062631] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  206.062635] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  206.062638] [drm:intel_dump_pipe_config] audio: 1, infoframes: 1
>[  206.062641] [drm:intel_dump_pipe_config] requested mode:
>[  206.062647] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  206.062650] [drm:intel_dump_pipe_config] adjusted mode:
>[  206.062655] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  206.062660] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[  206.062664] [drm:intel_dump_pipe_config] port clock: 148500
>[  206.062667] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  206.062671] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  206.062674] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  206.062678] [drm:intel_dump_pipe_config] ips: 0
>[  206.062681] [drm:intel_dump_pipe_config] double wide: 0
>[  208.476751] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[  208.476762] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  210.157237] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00040000, dig 0x00000000
>[  210.157262] [drm:intel_hpd_irq_handler] digital hpd port B - long
>[  210.157277] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 4 - cnt: 0
>[  210.157351] [drm:intel_dp_hpd_pulse] got hpd irq on port B - long
>[  210.157367] [drm:i915_hotplug_work_func] running encoder hotplug functions
>[  210.157373] [drm:i915_hotplug_work_func] Connector HDMI-A-1 (pin 4) received hotplug event.
>[  210.157376] [drm:i915_hotplug_work_func] Connector DP-1 (pin 4) received hotplug event.
>[  210.157396] [drm:intel_hdmi_detect] [CONNECTOR:30:HDMI-A-1]
>[  210.181848] [drm:drm_detect_monitor_audio] Monitor has basic audio support
>[  210.181855] [drm:intel_dp_detect] [CONNECTOR:35:DP-1]
>[  210.506372] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00040000, dig 0x00000000
>[  210.506397] [drm:intel_hpd_irq_handler] digital hpd port B - long
>[  210.506413] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 4 - cnt: 1
>[  210.506487] [drm:intel_dp_hpd_pulse] got hpd irq on port B - long
>[  210.508957] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  210.511415] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  210.515128] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  210.519136] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  210.520692] [drm:i915_hotplug_work_func] running encoder hotplug functions
>[  210.520698] [drm:i915_hotplug_work_func] Connector HDMI-A-1 (pin 4) received hotplug event.
>[  210.520702] [drm:i915_hotplug_work_func] Connector DP-1 (pin 4) received hotplug event.
>[  210.520707] [drm:intel_hdmi_detect] [CONNECTOR:30:HDMI-A-1]
>[  210.545133] [drm:drm_detect_monitor_audio] Monitor has basic audio support
>[  210.545139] [drm:intel_dp_detect] [CONNECTOR:35:DP-1]
>[  210.547593] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  210.550050] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  210.554157] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>[  210.558161] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064

Actions: View

Attachments on bug 87481: 111031

Use of freedesktop.org services, including Bugzilla, is subject to our Code of Conduct. How we collect and use information is described in our Privacy Policy.