Attachment 111734 Details for Bug 88012 – Be more careful with punit reads

[patch] Be more careful with punit reads

0001-drm-i915-Don-t-let-timed-out-punit-reads-leak-back-t.patch (text/plain), 2.65 KB, created by Ben Widawsky on 2015-01-04 19:39:54 UTC

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Creator: Ben Widawsky

Created: 2015-01-04 19:39:54 UTC

Size: 2.65 KB

patch

obsolete

>From 5cd03061e6153f3358e385c26efd2020368b4cd1 Mon Sep 17 00:00:00 2001
>From: Ben Widawsky <benjamin.widawsky@intel.com>
>Date: Sun, 4 Jan 2015 11:37:59 -0800
>Subject: [PATCH] drm/i915: Don't let timed out punit reads leak back to rps
>
>This patch is a hack for experiment only.
>
>Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
>---
> drivers/gpu/drm/i915/i915_drv.h       | 2 ++
> drivers/gpu/drm/i915/i915_irq.c       | 9 ++++++++-
> drivers/gpu/drm/i915/intel_sideband.c | 4 ++--
> 3 files changed, 12 insertions(+), 3 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>index 921e4c5..ee85636 100644
>--- a/drivers/gpu/drm/i915/i915_drv.h
>+++ b/drivers/gpu/drm/i915/i915_drv.h
>@@ -3114,6 +3114,8 @@ int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u32 mbox, u32 *val
> int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u32 mbox, u32 val);
> 
> /* intel_sideband.c */
>+int vlv_sideband_rw(struct drm_i915_private *dev_priv, u32 devfn,
>+		    u32 port, u32 opcode, u32 addr, u32 *val);
> u32 vlv_punit_read(struct drm_i915_private *dev_priv, u8 addr);
> void vlv_punit_write(struct drm_i915_private *dev_priv, u8 addr, u32 val);
> u32 vlv_nc_read(struct drm_i915_private *dev_priv, u8 addr);
>diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>index aa3180c..06c327b 100644
>--- a/drivers/gpu/drm/i915/i915_irq.c
>+++ b/drivers/gpu/drm/i915/i915_irq.c
>@@ -1035,8 +1035,15 @@ static u32 vlv_c0_residency(struct drm_i915_private *dev_priv,
> 	u32 render_count, media_count;
> 	u32 elapsed_render, elapsed_media, elapsed_time;
> 	u32 residency = 0;
>+	int ret;
>+
>+	mutex_lock(&dev_priv->dpio_lock);
>+	ret = vlv_sideband_rw(dev_priv, PCI_DEVFN(2, 0), IOSF_PORT_PUNIT,
>+			0x06, 0xce, &cz_ts);
>+	mutex_unlock(&dev_priv->dpio_lock);
>+	if (WARN_ON(ret < 0))
>+		 return dev_priv->rps.cur_freq;
> 
>-	cz_ts = vlv_punit_read(dev_priv, PUNIT_REG_CZ_TIMESTAMP);
> 	cz_freq_khz = DIV_ROUND_CLOSEST(dev_priv->mem_freq * 1000, 4);
> 
> 	render_count = I915_READ(VLV_RENDER_C0_COUNT_REG);
>diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c
>index 01d841e..2d2156c 100644
>--- a/drivers/gpu/drm/i915/intel_sideband.c
>+++ b/drivers/gpu/drm/i915/intel_sideband.c
>@@ -39,8 +39,8 @@
> /* Private register write, double-word addressing, non-posted */
> #define SB_CRWRDA_NP	0x07
> 
>-static int vlv_sideband_rw(struct drm_i915_private *dev_priv, u32 devfn,
>-			   u32 port, u32 opcode, u32 addr, u32 *val)
>+int vlv_sideband_rw(struct drm_i915_private *dev_priv, u32 devfn,
>+		    u32 port, u32 opcode, u32 addr, u32 *val)
> {
> 	u32 cmd, be = 0xf, bar = 0;
> 	bool is_read = (opcode == SB_MRD_NP || opcode == SB_CRRDDA_NP);
>-- 
>2.2.1
>

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Attachments on bug 88012: 111723 | 111734 | 111739 | 111767 | 111800 | 111836 | 111842 | 111844 | 111932 | 115414 | 115415 | 120563 | 120584

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