Attachment 113443 Details for Bug 89124 – dmesg

dmesg

dmesg_psr.log (text/plain), 564.28 KB, created by liulei on 2015-02-13 05:25:55 UTC

(hide)

Description:

Filename:

MIME Type:

Creator: liulei

Created: 2015-02-13 05:25:55 UTC

Size: 564.28 KB

patch

obsolete

>[    0.000000] Initializing cgroup subsys cpuset
>[    0.000000] Initializing cgroup subsys cpu
>[    0.000000] Initializing cgroup subsys cpuacct
>[    0.000000] Linux version 3.19.0-rc7_drm-intel-nightly_b4442e_20150208+ (buildtopcommit@x-kernel) (gcc version 4.7.0 20120507 (Red Hat 4.7.0-5) (GCC) ) #198 SMP Sun Feb 8 11:22:38 CST 2015
>[    0.000000] Command line: BOOT_IMAGE=/boot/bzImage_x86_64 root=UUID=f53c75c6-eeb6-4aa4-98a8-51aeb7219d2a ro hpet=disable drm.debug=0x6 log_buf_len=4M i915.enable_psr=1
>[    0.000000] e820: BIOS-provided physical RAM map:
>[    0.000000] BIOS-e820: [mem 0x0000000000000000-0x0000000000057fff] usable
>[    0.000000] BIOS-e820: [mem 0x0000000000058000-0x0000000000058fff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000000059000-0x000000000009dfff] usable
>[    0.000000] BIOS-e820: [mem 0x000000000009e000-0x000000000009ffff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000000100000-0x00000000996b9fff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000996ba000-0x00000000996bbfff] ACPI data
>[    0.000000] BIOS-e820: [mem 0x00000000996bc000-0x000000009bf7efff] usable
>[    0.000000] BIOS-e820: [mem 0x000000009bf7f000-0x000000009bf7ffff] ACPI NVS
>[    0.000000] BIOS-e820: [mem 0x000000009bf80000-0x000000009bfa9fff] reserved
>[    0.000000] BIOS-e820: [mem 0x000000009bfaa000-0x000000009c0a5fff] usable
>[    0.000000] BIOS-e820: [mem 0x000000009c0a6000-0x000000009c0fffff] type 20
>[    0.000000] BIOS-e820: [mem 0x000000009c100000-0x000000009dd75fff] reserved
>[    0.000000] BIOS-e820: [mem 0x000000009dd76000-0x000000009df99fff] ACPI NVS
>[    0.000000] BIOS-e820: [mem 0x000000009df9a000-0x000000009dfeafff] ACPI data
>[    0.000000] BIOS-e820: [mem 0x000000009dfeb000-0x000000009dffffff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000e00fa000-0x00000000e00fafff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000e00fd000-0x00000000e00fdfff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fe000000-0x00000000fe010fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000ffa00000-0x00000000ffffffff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000100000000-0x000000014e7fffff] usable
>[    0.000000] NX (Execute Disable) protection: active
>[    0.000000] efi: EFI v2.40 by EDK II
>[    0.000000] efi:  SMBIOS=0x9c4e7000  ACPI=0x9dfea000  ACPI 2.0=0x9dfea014 
>[    0.000000] efi: mem00: [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000000000000-0x0000000000058000) (0MB)
>[    0.000000] efi: mem01: [Reserved           |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000000058000-0x0000000000059000) (0MB)
>[    0.000000] efi: mem02: [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000000059000-0x000000000009e000) (0MB)
>[    0.000000] efi: mem03: [Reserved           |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000000009e000-0x00000000000a0000) (0MB)
>[    0.000000] efi: mem04: [Loader Data        |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000000100000-0x0000000002888000) (39MB)
>[    0.000000] efi: mem05: [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000002888000-0x0000000003000000) (7MB)
>[    0.000000] efi: mem06: [Loader Data        |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000003000000-0x0000000005788000) (39MB)
>[    0.000000] efi: mem07: [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000005788000-0x0000000062b8d000) (1492MB)
>[    0.000000] efi: mem08: [Loader Data        |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000062b8d000-0x00000000890a7000) (613MB)
>[    0.000000] efi: mem09: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x00000000890a7000-0x00000000890c7000) (0MB)
>[    0.000000] efi: mem10: [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC] range=[0x00000000890c7000-0x00000000994a5000) (259MB)
>[    0.000000] efi: mem11: [Loader Code        |   |  |  |  |   |WB|WT|WC|UC] range=[0x00000000994a5000-0x000000009958f000) (0MB)
>[    0.000000] efi: mem12: [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009958f000-0x000000009966c000) (0MB)
>[    0.000000] efi: mem13: [Loader Data        |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009966c000-0x0000000099679000) (0MB)
>[    0.000000] efi: mem14: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099679000-0x00000000996ba000) (0MB)
>[    0.000000] efi: mem15: [ACPI Reclaim Memory|   |  |  |  |   |WB|WT|WC|UC] range=[0x00000000996ba000-0x00000000996bc000) (0MB)
>[    0.000000] efi: mem16: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x00000000996bc000-0x0000000099794000) (0MB)
>[    0.000000] efi: mem17: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099794000-0x000000009979a000) (0MB)
>[    0.000000] efi: mem18: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009979a000-0x0000000099de0000) (6MB)
>[    0.000000] efi: mem19: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099de0000-0x0000000099df3000) (0MB)
>[    0.000000] efi: mem20: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099df3000-0x0000000099e03000) (0MB)
>[    0.000000] efi: mem21: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099e03000-0x0000000099e04000) (0MB)
>[    0.000000] efi: mem22: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099e04000-0x0000000099e06000) (0MB)
>[    0.000000] efi: mem23: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099e06000-0x0000000099e0c000) (0MB)
>[    0.000000] efi: mem24: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099e0c000-0x0000000099e0e000) (0MB)
>[    0.000000] efi: mem25: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099e0e000-0x0000000099e7f000) (0MB)
>[    0.000000] efi: mem26: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099e7f000-0x0000000099ecb000) (0MB)
>[    0.000000] efi: mem27: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099ecb000-0x0000000099ee9000) (0MB)
>[    0.000000] efi: mem28: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099ee9000-0x0000000099eec000) (0MB)
>[    0.000000] efi: mem29: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099eec000-0x0000000099ef7000) (0MB)
>[    0.000000] efi: mem30: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099ef7000-0x0000000099efa000) (0MB)
>[    0.000000] efi: mem31: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099efa000-0x0000000099efe000) (0MB)
>[    0.000000] efi: mem32: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099efe000-0x0000000099f01000) (0MB)
>[    0.000000] efi: mem33: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099f01000-0x0000000099f10000) (0MB)
>[    0.000000] efi: mem34: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099f10000-0x0000000099f11000) (0MB)
>[    0.000000] efi: mem35: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099f11000-0x0000000099f14000) (0MB)
>[    0.000000] efi: mem36: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099f14000-0x0000000099f17000) (0MB)
>[    0.000000] efi: mem37: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099f17000-0x0000000099f1e000) (0MB)
>[    0.000000] efi: mem38: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099f1e000-0x0000000099f25000) (0MB)
>[    0.000000] efi: mem39: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099f25000-0x0000000099f8b000) (0MB)
>[    0.000000] efi: mem40: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099f8b000-0x0000000099f8d000) (0MB)
>[    0.000000] efi: mem41: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099f8d000-0x0000000099f9b000) (0MB)
>[    0.000000] efi: mem42: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099f9b000-0x0000000099fa0000) (0MB)
>[    0.000000] efi: mem43: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099fa0000-0x0000000099fb4000) (0MB)
>[    0.000000] efi: mem44: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099fb4000-0x0000000099fb6000) (0MB)
>[    0.000000] efi: mem45: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099fb6000-0x0000000099fc2000) (0MB)
>[    0.000000] efi: mem46: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099fc2000-0x0000000099fc8000) (0MB)
>[    0.000000] efi: mem47: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099fc8000-0x0000000099fd6000) (0MB)
>[    0.000000] efi: mem48: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099fd6000-0x0000000099fd9000) (0MB)
>[    0.000000] efi: mem49: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099fd9000-0x0000000099fde000) (0MB)
>[    0.000000] efi: mem50: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099fde000-0x0000000099fe1000) (0MB)
>[    0.000000] efi: mem51: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000099fe1000-0x000000009a03d000) (0MB)
>[    0.000000] efi: mem52: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a03d000-0x000000009a0c8000) (0MB)
>[    0.000000] efi: mem53: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a0c8000-0x000000009a0da000) (0MB)
>[    0.000000] efi: mem54: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a0da000-0x000000009a0e3000) (0MB)
>[    0.000000] efi: mem55: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a0e3000-0x000000009a0ea000) (0MB)
>[    0.000000] efi: mem56: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a0ea000-0x000000009a0ed000) (0MB)
>[    0.000000] efi: mem57: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a0ed000-0x000000009a0f7000) (0MB)
>[    0.000000] efi: mem58: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a0f7000-0x000000009a0fd000) (0MB)
>[    0.000000] efi: mem59: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a0fd000-0x000000009a103000) (0MB)
>[    0.000000] efi: mem60: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a103000-0x000000009a106000) (0MB)
>[    0.000000] efi: mem61: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a106000-0x000000009a107000) (0MB)
>[    0.000000] efi: mem62: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a107000-0x000000009a108000) (0MB)
>[    0.000000] efi: mem63: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a108000-0x000000009a10e000) (0MB)
>[    0.000000] efi: mem64: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a10e000-0x000000009a111000) (0MB)
>[    0.000000] efi: mem65: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a111000-0x000000009a112000) (0MB)
>[    0.000000] efi: mem66: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a112000-0x000000009a153000) (0MB)
>[    0.000000] efi: mem67: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a153000-0x000000009a1cd000) (0MB)
>[    0.000000] efi: mem68: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a1cd000-0x000000009a248000) (0MB)
>[    0.000000] efi: mem69: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a248000-0x000000009a24e000) (0MB)
>[    0.000000] efi: mem70: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a24e000-0x000000009a252000) (0MB)
>[    0.000000] efi: mem71: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a252000-0x000000009a253000) (0MB)
>[    0.000000] efi: mem72: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a253000-0x000000009a28e000) (0MB)
>[    0.000000] efi: mem73: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a28e000-0x000000009a290000) (0MB)
>[    0.000000] efi: mem74: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a290000-0x000000009a29b000) (0MB)
>[    0.000000] efi: mem75: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a29b000-0x000000009a29e000) (0MB)
>[    0.000000] efi: mem76: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a29e000-0x000000009a2a1000) (0MB)
>[    0.000000] efi: mem77: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a2a1000-0x000000009a2a6000) (0MB)
>[    0.000000] efi: mem78: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a2a6000-0x000000009a2a8000) (0MB)
>[    0.000000] efi: mem79: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a2a8000-0x000000009a2a9000) (0MB)
>[    0.000000] efi: mem80: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a2a9000-0x000000009a2ac000) (0MB)
>[    0.000000] efi: mem81: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a2ac000-0x000000009a2cc000) (0MB)
>[    0.000000] efi: mem82: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a2cc000-0x000000009a2cd000) (0MB)
>[    0.000000] efi: mem83: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a2cd000-0x000000009a2ce000) (0MB)
>[    0.000000] efi: mem84: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a2ce000-0x000000009a2ff000) (0MB)
>[    0.000000] efi: mem85: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a2ff000-0x000000009a303000) (0MB)
>[    0.000000] efi: mem86: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a303000-0x000000009a305000) (0MB)
>[    0.000000] efi: mem87: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a305000-0x000000009a308000) (0MB)
>[    0.000000] efi: mem88: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a308000-0x000000009a311000) (0MB)
>[    0.000000] efi: mem89: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a311000-0x000000009a315000) (0MB)
>[    0.000000] efi: mem90: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a315000-0x000000009a318000) (0MB)
>[    0.000000] efi: mem91: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a318000-0x000000009a31a000) (0MB)
>[    0.000000] efi: mem92: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a31a000-0x000000009a3cf000) (0MB)
>[    0.000000] efi: mem93: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a3cf000-0x000000009a3d8000) (0MB)
>[    0.000000] efi: mem94: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a3d8000-0x000000009a3e2000) (0MB)
>[    0.000000] efi: mem95: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a3e2000-0x000000009a3e5000) (0MB)
>[    0.000000] efi: mem96: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a3e5000-0x000000009a3e8000) (0MB)
>[    0.000000] efi: mem97: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a3e8000-0x000000009a3ef000) (0MB)
>[    0.000000] efi: mem98: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a3ef000-0x000000009a3f1000) (0MB)
>[    0.000000] efi: mem99: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a3f1000-0x000000009a3f5000) (0MB)
>[    0.000000] efi: mem100: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a3f5000-0x000000009a3f7000) (0MB)
>[    0.000000] efi: mem101: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a3f7000-0x000000009a403000) (0MB)
>[    0.000000] efi: mem102: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a403000-0x000000009a40d000) (0MB)
>[    0.000000] efi: mem103: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a40d000-0x000000009a41b000) (0MB)
>[    0.000000] efi: mem104: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a41b000-0x000000009a425000) (0MB)
>[    0.000000] efi: mem105: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a425000-0x000000009a426000) (0MB)
>[    0.000000] efi: mem106: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a426000-0x000000009a429000) (0MB)
>[    0.000000] efi: mem107: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a429000-0x000000009a42e000) (0MB)
>[    0.000000] efi: mem108: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a42e000-0x000000009a435000) (0MB)
>[    0.000000] efi: mem109: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a435000-0x000000009a436000) (0MB)
>[    0.000000] efi: mem110: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a436000-0x000000009a437000) (0MB)
>[    0.000000] efi: mem111: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a437000-0x000000009a45a000) (0MB)
>[    0.000000] efi: mem112: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a45a000-0x000000009a45e000) (0MB)
>[    0.000000] efi: mem113: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a45e000-0x000000009a460000) (0MB)
>[    0.000000] efi: mem114: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a460000-0x000000009a462000) (0MB)
>[    0.000000] efi: mem115: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a462000-0x000000009a464000) (0MB)
>[    0.000000] efi: mem116: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a464000-0x000000009a474000) (0MB)
>[    0.000000] efi: mem117: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a474000-0x000000009a47e000) (0MB)
>[    0.000000] efi: mem118: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a47e000-0x000000009a47f000) (0MB)
>[    0.000000] efi: mem119: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a47f000-0x000000009a481000) (0MB)
>[    0.000000] efi: mem120: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a481000-0x000000009a484000) (0MB)
>[    0.000000] efi: mem121: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a484000-0x000000009a486000) (0MB)
>[    0.000000] efi: mem122: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a486000-0x000000009a487000) (0MB)
>[    0.000000] efi: mem123: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a487000-0x000000009a491000) (0MB)
>[    0.000000] efi: mem124: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a491000-0x000000009a492000) (0MB)
>[    0.000000] efi: mem125: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a492000-0x000000009a494000) (0MB)
>[    0.000000] efi: mem126: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a494000-0x000000009a497000) (0MB)
>[    0.000000] efi: mem127: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a497000-0x000000009a4a1000) (0MB)
>[    0.000000] efi: mem128: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a4a1000-0x000000009a4a6000) (0MB)
>[    0.000000] efi: mem129: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a4a6000-0x000000009a4a7000) (0MB)
>[    0.000000] efi: mem130: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a4a7000-0x000000009a575000) (0MB)
>[    0.000000] efi: mem131: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a575000-0x000000009a583000) (0MB)
>[    0.000000] efi: mem132: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a583000-0x000000009a591000) (0MB)
>[    0.000000] efi: mem133: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a591000-0x000000009a59c000) (0MB)
>[    0.000000] efi: mem134: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a59c000-0x000000009a5a8000) (0MB)
>[    0.000000] efi: mem135: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a5a8000-0x000000009a5c0000) (0MB)
>[    0.000000] efi: mem136: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a5c0000-0x000000009a5c5000) (0MB)
>[    0.000000] efi: mem137: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a5c5000-0x000000009a5c6000) (0MB)
>[    0.000000] efi: mem138: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a5c6000-0x000000009a5c7000) (0MB)
>[    0.000000] efi: mem139: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a5c7000-0x000000009a5c8000) (0MB)
>[    0.000000] efi: mem140: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a5c8000-0x000000009a5cb000) (0MB)
>[    0.000000] efi: mem141: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a5cb000-0x000000009a5cd000) (0MB)
>[    0.000000] efi: mem142: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a5cd000-0x000000009a9ce000) (4MB)
>[    0.000000] efi: mem143: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009a9ce000-0x000000009aa21000) (0MB)
>[    0.000000] efi: mem144: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa21000-0x000000009aa24000) (0MB)
>[    0.000000] efi: mem145: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa24000-0x000000009aa26000) (0MB)
>[    0.000000] efi: mem146: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa26000-0x000000009aa28000) (0MB)
>[    0.000000] efi: mem147: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa28000-0x000000009aa2b000) (0MB)
>[    0.000000] efi: mem148: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa2b000-0x000000009aa2e000) (0MB)
>[    0.000000] efi: mem149: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa2e000-0x000000009aa2f000) (0MB)
>[    0.000000] efi: mem150: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa2f000-0x000000009aa30000) (0MB)
>[    0.000000] efi: mem151: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa30000-0x000000009aa32000) (0MB)
>[    0.000000] efi: mem152: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa32000-0x000000009aa34000) (0MB)
>[    0.000000] efi: mem153: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa34000-0x000000009aa36000) (0MB)
>[    0.000000] efi: mem154: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa36000-0x000000009aa38000) (0MB)
>[    0.000000] efi: mem155: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa38000-0x000000009aa3b000) (0MB)
>[    0.000000] efi: mem156: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa3b000-0x000000009aa3e000) (0MB)
>[    0.000000] efi: mem157: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa3e000-0x000000009aa49000) (0MB)
>[    0.000000] efi: mem158: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa49000-0x000000009aa4d000) (0MB)
>[    0.000000] efi: mem159: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa4d000-0x000000009aa51000) (0MB)
>[    0.000000] efi: mem160: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa51000-0x000000009aa52000) (0MB)
>[    0.000000] efi: mem161: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa52000-0x000000009aa57000) (0MB)
>[    0.000000] efi: mem162: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa57000-0x000000009aa58000) (0MB)
>[    0.000000] efi: mem163: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa58000-0x000000009aa5b000) (0MB)
>[    0.000000] efi: mem164: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa5b000-0x000000009aa5c000) (0MB)
>[    0.000000] efi: mem165: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa5c000-0x000000009aa60000) (0MB)
>[    0.000000] efi: mem166: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa60000-0x000000009aa62000) (0MB)
>[    0.000000] efi: mem167: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa62000-0x000000009aa65000) (0MB)
>[    0.000000] efi: mem168: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa65000-0x000000009aa67000) (0MB)
>[    0.000000] efi: mem169: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa67000-0x000000009aa82000) (0MB)
>[    0.000000] efi: mem170: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa82000-0x000000009aa84000) (0MB)
>[    0.000000] efi: mem171: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa84000-0x000000009aa86000) (0MB)
>[    0.000000] efi: mem172: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa86000-0x000000009aa88000) (0MB)
>[    0.000000] efi: mem173: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa88000-0x000000009aa89000) (0MB)
>[    0.000000] efi: mem174: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa89000-0x000000009aa8b000) (0MB)
>[    0.000000] efi: mem175: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa8b000-0x000000009aa8c000) (0MB)
>[    0.000000] efi: mem176: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa8c000-0x000000009aa8e000) (0MB)
>[    0.000000] efi: mem177: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa8e000-0x000000009aa8f000) (0MB)
>[    0.000000] efi: mem178: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa8f000-0x000000009aa91000) (0MB)
>[    0.000000] efi: mem179: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa91000-0x000000009aa92000) (0MB)
>[    0.000000] efi: mem180: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa92000-0x000000009aa93000) (0MB)
>[    0.000000] efi: mem181: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa93000-0x000000009aa95000) (0MB)
>[    0.000000] efi: mem182: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa95000-0x000000009aa96000) (0MB)
>[    0.000000] efi: mem183: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa96000-0x000000009aa9b000) (0MB)
>[    0.000000] efi: mem184: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009aa9b000-0x000000009bf7f000) (20MB)
>[    0.000000] efi: mem185: [ACPI Memory NVS    |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009bf7f000-0x000000009bf80000) (0MB)
>[    0.000000] efi: mem186: [Runtime Data       |RUN|  |  |  |   |WB|WT|WC|UC] range=[0x000000009bf80000-0x000000009bfaa000) (0MB)
>[    0.000000] efi: mem187: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009bfaa000-0x000000009c096000) (0MB)
>[    0.000000] efi: mem188: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009c096000-0x000000009c097000) (0MB)
>[    0.000000] efi: mem189: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009c097000-0x000000009c0a6000) (0MB)
>[    0.000000] efi: mem190: [Runtime Code       |RUN|  |  |  |   |WB|WT|WC|UC] range=[0x000000009c0a6000-0x000000009c100000) (0MB)
>[    0.000000] efi: mem191: [Runtime Data       |RUN|  |  |  |   |WB|WT|WC|UC] range=[0x000000009c100000-0x000000009c4eb000) (3MB)
>[    0.000000] efi: mem192: [Reserved           |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009c4eb000-0x000000009dd76000) (24MB)
>[    0.000000] efi: mem193: [ACPI Memory NVS    |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009dd76000-0x000000009df9a000) (2MB)
>[    0.000000] efi: mem194: [ACPI Reclaim Memory|   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009df9a000-0x000000009dfeb000) (0MB)
>[    0.000000] efi: mem195: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000009dfeb000-0x000000009e000000) (0MB)
>[    0.000000] efi: mem196: [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000100000000-0x000000014e800000) (1256MB)
>[    0.000000] efi: mem197: [Memory Mapped I/O  |RUN|  |  |  |   |  |  |  |UC] range=[0x00000000e00fa000-0x00000000e00fb000) (0MB)
>[    0.000000] efi: mem198: [Memory Mapped I/O  |RUN|  |  |  |   |  |  |  |UC] range=[0x00000000e00fd000-0x00000000e00fe000) (0MB)
>[    0.000000] efi: mem199: [Memory Mapped I/O  |RUN|  |  |  |   |  |  |  |UC] range=[0x00000000fe000000-0x00000000fe011000) (0MB)
>[    0.000000] efi: mem200: [Memory Mapped I/O  |RUN|  |  |  |   |  |  |  |UC] range=[0x00000000ffa00000-0x0000000100000000) (6MB)
>[    0.000000] SMBIOS 2.7 present.
>[    0.000000] DMI: Intel Corporation Skylake Client platform/Skylake Y LPDDR3 RVP3, BIOS SKLSE2R1.86C.B068.R00.1501090908 01/09/2015
>[    0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved
>[    0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable
>[    0.000000] AGP: No AGP bridge found
>[    0.000000] e820: last_pfn = 0x14e800 max_arch_pfn = 0x400000000
>[    0.000000] MTRR default type: write-back
>[    0.000000] MTRR fixed ranges enabled:
>[    0.000000]   00000-9FFFF write-back
>[    0.000000]   A0000-BFFFF uncachable
>[    0.000000]   C0000-FFFFF write-protect
>[    0.000000] MTRR variable ranges enabled:
>[    0.000000]   0 base 00C0000000 mask 7FC0000000 uncachable
>[    0.000000]   1 base 00B0000000 mask 7FF0000000 uncachable
>[    0.000000]   2 base 00AE000000 mask 7FFE000000 uncachable
>[    0.000000]   3 base 00AD000000 mask 7FFF000000 uncachable
>[    0.000000]   4 disabled
>[    0.000000]   5 disabled
>[    0.000000]   6 disabled
>[    0.000000]   7 disabled
>[    0.000000]   8 disabled
>[    0.000000]   9 disabled
>[    0.000000] PAT configuration [0-7]: WB  WC  UC- UC  WB  WC  UC- UC  
>[    0.000000] e820: last_pfn = 0x9e000 max_arch_pfn = 0x400000000
>[    0.000000] Base memory trampoline at [ffff880000098000] 98000 size 24576
>[    0.000000] Using GB pages for direct mapping
>[    0.000000] init_memory_mapping: [mem 0x00000000-0x000fffff]
>[    0.000000]  [mem 0x00000000-0x000fffff] page 4k
>[    0.000000] BRK [0x053f7000, 0x053f7fff] PGTABLE
>[    0.000000] BRK [0x053f8000, 0x053f8fff] PGTABLE
>[    0.000000] BRK [0x053f9000, 0x053f9fff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0x14e600000-0x14e7fffff]
>[    0.000000]  [mem 0x14e600000-0x14e7fffff] page 2M
>[    0.000000] BRK [0x053fa000, 0x053fafff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0x140000000-0x14e5fffff]
>[    0.000000]  [mem 0x140000000-0x14e5fffff] page 2M
>[    0.000000] init_memory_mapping: [mem 0x120000000-0x13fffffff]
>[    0.000000]  [mem 0x120000000-0x13fffffff] page 1G
>[    0.000000] init_memory_mapping: [mem 0x00100000-0x996b9fff]
>[    0.000000]  [mem 0x00100000-0x001fffff] page 4k
>[    0.000000]  [mem 0x00200000-0x3fffffff] page 2M
>[    0.000000]  [mem 0x40000000-0x7fffffff] page 1G
>[    0.000000]  [mem 0x80000000-0x995fffff] page 2M
>[    0.000000]  [mem 0x99600000-0x996b9fff] page 4k
>[    0.000000] init_memory_mapping: [mem 0x996bc000-0x9bf7efff]
>[    0.000000]  [mem 0x996bc000-0x997fffff] page 4k
>[    0.000000]  [mem 0x99800000-0x9bdfffff] page 2M
>[    0.000000]  [mem 0x9be00000-0x9bf7efff] page 4k
>[    0.000000] BRK [0x053fb000, 0x053fbfff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0x9bfaa000-0x9c0a5fff]
>[    0.000000]  [mem 0x9bfaa000-0x9c0a5fff] page 4k
>[    0.000000] BRK [0x053fc000, 0x053fcfff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0x9dfeb000-0x9dffffff]
>[    0.000000]  [mem 0x9dfeb000-0x9dffffff] page 4k
>[    0.000000] init_memory_mapping: [mem 0x100000000-0x11fffffff]
>[    0.000000]  [mem 0x100000000-0x11fffffff] page 1G
>[    0.000000] log_buf_len: 4194304 bytes
>[    0.000000] early log buf free: 99100(75%)
>[    0.000000] ACPI: Early table checksum verification disabled
>[    0.000000] ACPI: RSDP 0x000000009DFEA014 000024 (v02 INTEL )
>[    0.000000] ACPI: XSDT 0x000000009DF9E188 0000FC (v01 INTEL  SKL-ULT  00000000      01000013)
>[    0.000000] ACPI: FACP 0x000000009DFDF000 0000F4 (v05 INTEL  SKL-ULT  00000000 MSFT 0000005F)
>[    0.000000] ACPI: DSDT 0x000000009DFB1000 028A78 (v02 INTEL  SKL      00000000 INTL 20141107)
>[    0.000000] ACPI: FACS 0x000000009DF79000 000040
>[    0.000000] ACPI: UEFI 0x000000009DF8F000 000042 (v01 INTEL  EDK2     00000002      01000013)
>[    0.000000] ACPI: SSDT 0x000000009DFE1000 007814 (v02 SaSsdt SaSsdt   00003000 INTL 20141107)
>[    0.000000] ACPI: SSDT 0x000000009DFE0000 0005B1 (v02 Intel  PerfTune 00001000 INTL 20141107)
>[    0.000000] ACPI: HPET 0x000000009DFDE000 000038 (v01 INTEL  SKL-ULT  00000001 MSFT 0000005F)
>[    0.000000] ACPI: LPIT 0x000000009DFDD000 000094 (v01 INTEL  SKL-ULT  00000000 MSFT 0000005F)
>[    0.000000] ACPI: APIC 0x000000009DFDC000 0000BC (v03 INTEL  SKL-ULT  00000001 MSFT 0000005F)
>[    0.000000] ACPI: MCFG 0x000000009DFDB000 00003C (v01 INTEL  SKL-ULT  00000001 MSFT 0000005F)
>[    0.000000] ACPI: WDAT 0x000000009DFDA000 000104 (v01 INTEL  SKL-ULT  00000000 MSFT 0000005F)
>[    0.000000] ACPI: SSDT 0x000000009DFB0000 000248 (v02 INTEL  sensrhub 00000000 INTL 20141107)
>[    0.000000] ACPI: SSDT 0x000000009DFAD000 0022F7 (v02 INTEL  PtidDevc 00001000 INTL 20141107)
>[    0.000000] ACPI: SSDT 0x000000009DFA8000 0044AE (v02 INTEL  RVP3Rtd3 00001000 INTL 20141107)
>[    0.000000] ACPI: SSDT 0x000000009DFA7000 000C10 (v02 INTEL  Ther_Rvp 00001000 INTL 20141107)
>[    0.000000] ACPI: SSDT 0x000000009DFA6000 00019A (v02 INTEL  Sata0Ide 00001000 INTL 20141107)
>[    0.000000] ACPI: SSDT 0x000000009DFA5000 00016C (v02 INTEL  zpodd    00001000 INTL 20141107)
>[    0.000000] ACPI: DBGP 0x000000009DFA4000 000034 (v01 INTEL           00000000 MSFT 0000005F)
>[    0.000000] ACPI: DBG2 0x000000009DFA3000 000054 (v00 INTEL           00000000 MSFT 0000005F)
>[    0.000000] ACPI: SSDT 0x000000009DFA2000 00060F (v02 INTEL  xh_rvp03 00000000 INTL 20141107)
>[    0.000000] ACPI: BOOT 0x000000009DFA1000 000028 (v01 INTEL  TIANO    00000002 MSFT 01000013)
>[    0.000000] ACPI: SSDT 0x000000009DFA0000 0003AD (v02 PmRef  Cpu0Ist  00003000 INTL 20141107)
>[    0.000000] ACPI: SSDT 0x000000009DF9F000 000DA9 (v02 CpuRef CpuSsdt  00003000 INTL 20141107)
>[    0.000000] ACPI: DMAR 0x000000009DFE9000 00011C (v01 INTEL  SKL      00000001 INTL 00000001)
>[    0.000000] ACPI: SSDT 0x000000009DF9D000 000804 (v02 SgRef  SgPch    00001000 INTL 20141107)
>[    0.000000] ACPI: NHLT 0x000000009DF9B000 001748 (v00 INTEL  EDK2     00000002      01000013)
>[    0.000000] ACPI: FPDT 0x000000009DF9A000 000044 (v01 INTEL  EDK2     00000002      01000013)
>[    0.000000] ACPI: ASF! 0x00000000996BB000 0000A5 (v32 INTEL   HCG     00000001 TFSM 000F4240)
>[    0.000000] ACPI: BGRT 0x00000000996BA000 000038 (v01 INTEL  EDK2     00000002      01000013)
>[    0.000000] ACPI: Local APIC address 0xfee00000
>[    0.000000] No NUMA configuration found
>[    0.000000] Faking a node at [mem 0x0000000000000000-0x000000014e7fffff]
>[    0.000000] NODE_DATA(0) allocated [mem 0x14e3f9000-0x14e3fcfff]
>[    0.000000]  [ffffea0000000000-ffffea00053fffff] PMD -> [ffff880149e00000-ffff88014d9fffff] on node 0
>[    0.000000] Zone ranges:
>[    0.000000]   DMA      [mem 0x00001000-0x00ffffff]
>[    0.000000]   DMA32    [mem 0x01000000-0xffffffff]
>[    0.000000]   Normal   [mem 0x100000000-0x14e7fffff]
>[    0.000000] Movable zone start for each node
>[    0.000000] Early memory node ranges
>[    0.000000]   node   0: [mem 0x00001000-0x00057fff]
>[    0.000000]   node   0: [mem 0x00059000-0x0009dfff]
>[    0.000000]   node   0: [mem 0x00100000-0x996b9fff]
>[    0.000000]   node   0: [mem 0x996bc000-0x9bf7efff]
>[    0.000000]   node   0: [mem 0x9bfaa000-0x9c0a5fff]
>[    0.000000]   node   0: [mem 0x9dfeb000-0x9dffffff]
>[    0.000000]   node   0: [mem 0x100000000-0x14e7fffff]
>[    0.000000] Initmem setup node 0 [mem 0x00001000-0x14e7fffff]
>[    0.000000] On node 0 totalpages: 960554
>[    0.000000]   DMA zone: 64 pages used for memmap
>[    0.000000]   DMA zone: 24 pages reserved
>[    0.000000]   DMA zone: 3996 pages, LIFO batch:0
>[    0.000000]   DMA32 zone: 9923 pages used for memmap
>[    0.000000]   DMA32 zone: 635022 pages, LIFO batch:31
>[    0.000000]   Normal zone: 5024 pages used for memmap
>[    0.000000]   Normal zone: 321536 pages, LIFO batch:31
>[    0.000000] Reserving Intel graphics stolen memory at 0xad800000-0xaf7fffff
>[    0.000000] ACPI: PM-Timer IO Port: 0x1808
>[    0.000000] ACPI: Local APIC address 0xfee00000
>[    0.000000] ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x02] lapic_id[0x02] enabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x03] lapic_id[0x01] enabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x04] lapic_id[0x03] enabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x05] lapic_id[0xff] disabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x06] lapic_id[0xff] disabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x07] lapic_id[0xff] disabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x08] lapic_id[0xff] disabled)
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1])
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0x02] high edge lint[0x1])
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0x03] high edge lint[0x1])
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0x04] high edge lint[0x1])
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0x05] high edge lint[0x1])
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0x06] high edge lint[0x1])
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0x07] high edge lint[0x1])
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0x08] high edge lint[0x1])
>[    0.000000] ACPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0])
>[    0.000000] IOAPIC[0]: apic_id 2, version 32, address 0xfec00000, GSI 0-119
>[    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
>[    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level)
>[    0.000000] ACPI: IRQ0 used by override.
>[    0.000000] ACPI: IRQ9 used by override.
>[    0.000000] Using ACPI (MADT) for SMP configuration information
>[    0.000000] ACPI: HPET id: 0x8086a201 base: 0xfed00000
>[    0.000000] smpboot: Allowing 8 CPUs, 4 hotplug CPUs
>[    0.000000] PM: Registered nosave memory: [mem 0x00000000-0x00000fff]
>[    0.000000] PM: Registered nosave memory: [mem 0x00058000-0x00058fff]
>[    0.000000] PM: Registered nosave memory: [mem 0x0009e000-0x0009ffff]
>[    0.000000] PM: Registered nosave memory: [mem 0x000a0000-0x000fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0x996ba000-0x996bbfff]
>[    0.000000] PM: Registered nosave memory: [mem 0x9bf7f000-0x9bf7ffff]
>[    0.000000] PM: Registered nosave memory: [mem 0x9bf80000-0x9bfa9fff]
>[    0.000000] PM: Registered nosave memory: [mem 0x9c0a6000-0x9c0fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0x9c100000-0x9dd75fff]
>[    0.000000] PM: Registered nosave memory: [mem 0x9dd76000-0x9df99fff]
>[    0.000000] PM: Registered nosave memory: [mem 0x9df9a000-0x9dfeafff]
>[    0.000000] PM: Registered nosave memory: [mem 0x9e000000-0xad7fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xad800000-0xaf7fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xaf800000-0xe00f9fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xe00fa000-0xe00fafff]
>[    0.000000] PM: Registered nosave memory: [mem 0xe00fb000-0xe00fcfff]
>[    0.000000] PM: Registered nosave memory: [mem 0xe00fd000-0xe00fdfff]
>[    0.000000] PM: Registered nosave memory: [mem 0xe00fe000-0xfdffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfe000000-0xfe010fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfe011000-0xff9fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xffa00000-0xffffffff]
>[    0.000000] e820: [mem 0xaf800000-0xe00f9fff] available for PCI devices
>[    0.000000] setup_percpu: NR_CPUS:64 nr_cpumask_bits:64 nr_cpu_ids:8 nr_node_ids:1
>[    0.000000] PERCPU: Embedded 29 pages/cpu @ffff88014e000000 s78912 r8192 d31680 u262144
>[    0.000000] pcpu-alloc: s78912 r8192 d31680 u262144 alloc=1*2097152
>[    0.000000] pcpu-alloc: [0] 0 1 2 3 4 5 6 7 
>[    0.000000] Built 1 zonelists in Node order, mobility grouping on.  Total pages: 945519
>[    0.000000] Policy zone: Normal
>[    0.000000] Kernel command line: BOOT_IMAGE=/boot/bzImage_x86_64 root=UUID=f53c75c6-eeb6-4aa4-98a8-51aeb7219d2a ro hpet=disable drm.debug=0x6 log_buf_len=4M i915.enable_psr=1
>[    0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes)
>[    0.000000] xsave: enabled xstate_bv 0x1f, cntxt size 0x3c0 using compacted form
>[    0.000000] AGP: Checking aperture...
>[    0.000000] AGP: No AGP bridge found
>[    0.000000] Calgary: detecting Calgary via BIOS EBDA area
>[    0.000000] Calgary: Unable to locate Rio Grande table in EBDA - bailing!
>[    0.000000] Memory: 3629396K/3842216K available (7825K kernel code, 904K rwdata, 3968K rodata, 23444K init, 628K bss, 212820K reserved, 0K cma-reserved)
>[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
>[    0.000000] Hierarchical RCU implementation.
>[    0.000000] 	RCU restricting CPUs from NR_CPUS=64 to nr_cpu_ids=8.
>[    0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
>[    0.000000] NR_IRQS:4352 nr_irqs:2048 16
>[    0.000000] Console: colour dummy device 80x25
>[    0.000000] console [tty0] enabled
>[    0.000000] tsc: Fast TSC calibration failed
>[    0.000000] tsc: PIT calibration matches PMTIMER. 1 loops
>[    0.000000] tsc: Detected 1008.025 MHz processor
>[    0.000004] Calibrating delay loop (skipped), value calculated using timer frequency.. 2016.05 BogoMIPS (lpj=1008025)
>[    0.000013] pid_max: default: 32768 minimum: 301
>[    0.000022] ACPI: Core revision 20141107
>[    0.082982] ACPI Error: [_PR0] Namespace lookup failure, AE_ALREADY_EXISTS (20141107/dswload-369)
>[    0.082998] ACPI Exception: AE_ALREADY_EXISTS, During name lookup/catalog (20141107/psobject-224)
>[    0.083010] ACPI: All ACPI Tables successfully acquired
>[    0.084971] Security Framework initialized
>[    0.085453] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes)
>[    0.087036] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes)
>[    0.087722] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes)
>[    0.087738] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes)
>[    0.088108] CPU: Physical Processor ID: 0
>[    0.088113] CPU: Processor Core ID: 0
>[    0.088123] ENERGY_PERF_BIAS: Set to 'normal', was 'performance'
>[    0.088123] ENERGY_PERF_BIAS: View and update with x86_energy_perf_policy(8)
>[    0.090303] mce: CPU supports 8 MCE banks
>[    0.090336] CPU0: Thermal monitoring enabled (TM1)
>[    0.090360] Last level iTLB entries: 4KB 64, 2MB 8, 4MB 8
>[    0.090360] Last level dTLB entries: 4KB 64, 2MB 0, 4MB 0, 1GB 4
>[    0.091191] Freeing SMP alternatives memory: 32K (ffffffff83350000 - ffffffff83358000)
>[    0.097926] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
>[    0.107935] smpboot: CPU0: Genuine Intel(R) CPU 0000 @ 1.00GHz (fam: 06, model: 4e, stepping: 02)
>[    0.107985] TSC deadline timer enabled
>[    0.108027] Performance Events: no PEBS fmt3+, generic architected perfmon, full-width counters, Intel PMU driver.
>[    0.108042] ... version:                4
>[    0.108045] ... bit width:              48
>[    0.108049] ... generic registers:      4
>[    0.108053] ... value mask:             0000ffffffffffff
>[    0.108057] ... max period:             0000ffffffffffff
>[    0.108061] ... fixed-purpose events:   3
>[    0.108064] ... event mask:             000000070000000f
>[    0.108509] x86: Booting SMP configuration:
>[    0.108514] .... node  #0, CPUs:      #1 #2 #3
>[    0.155717] x86: Booted up 1 node, 4 CPUs
>[    0.155726] smpboot: Total of 4 processors activated (8064.20 BogoMIPS)
>[    0.164759] devtmpfs: initialized
>[    0.165555] PM: Registering ACPI NVS region [mem 0x9bf7f000-0x9bf7ffff] (4096 bytes)
>[    0.165562] PM: Registering ACPI NVS region [mem 0x9dd76000-0x9df99fff] (2244608 bytes)
>[    0.165901] xor: automatically using best checksumming function:
>[    0.175380]    avx       :  6636.000 MB/sec
>[    0.175505] RTC time:  1:36:03, date: 01/04/01
>[    0.175700] NET: Registered protocol family 16
>[    0.181421] cpuidle: using governor ladder
>[    0.187435] cpuidle: using governor menu
>[    0.187725] ACPI FADT declares the system doesn't support PCIe ASPM, so disable it
>[    0.187732] ACPI: bus type PCI registered
>[    0.187885] PCI: MMCONFIG for domain 0000 [bus 00-ff] at [mem 0xe0000000-0xefffffff] (base 0xe0000000)
>[    0.187894] PCI: not using MMCONFIG
>[    0.187898] PCI: Using configuration type 1 for base access
>[    0.211515] raid6: sse2x1    2902 MB/s
>[    0.228573] raid6: sse2x2    3437 MB/s
>[    0.245623] raid6: sse2x4    3851 MB/s
>[    0.262677] raid6: avx2x1    6875 MB/s
>[    0.279729] raid6: avx2x2    7714 MB/s
>[    0.296783] raid6: avx2x4    8199 MB/s
>[    0.296788] raid6: using algorithm avx2x4 (8199 MB/s)
>[    0.296792] raid6: using avx2x2 recovery algorithm
>[    0.296874] ACPI: Added _OSI(Module Device)
>[    0.296879] ACPI: Added _OSI(Processor Device)
>[    0.296883] ACPI: Added _OSI(3.0 _SCP Extensions)
>[    0.296888] ACPI: Added _OSI(Processor Aggregator Device)
>[    0.316704] ACPI: Executed 21 blocks of module-level executable AML code
>[    0.325960] [Firmware Bug]: ACPI: BIOS _OSI(Linux) query ignored
>[    0.330493] ACPI: Dynamic OEM Table Load:
>[    0.330522] ACPI: SSDT 0xFFFF8801485EE000 00045A (v02 PmRef  Cpu0Cst  00003001 INTL 20141107)
>[    0.332657] ACPI: Dynamic OEM Table Load:
>[    0.332680] ACPI Error: Method parse/execution failed [\_PR_.CPU0.GCAP] (Node ffff880149910de8), AE_ALREADY_EXISTS (20141107/psparse-536)
>[    0.332721] ACPI Error: Method parse/execution failed [\_PR_.CPU0._PDC] (Node ffff880149910d48), AE_ALREADY_EXISTS (20141107/psparse-536)
>[    0.332735] ACPI: Marking method _PDC as Serialized because of AE_ALREADY_EXISTS error
>[    0.333238] ACPI: Dynamic OEM Table Load:
>[    0.333262] ACPI: SSDT 0xFFFF8801485ED000 0005AA (v02 PmRef  ApIst    00003000 INTL 20141107)
>[    0.335857] ACPI: Dynamic OEM Table Load:
>[    0.335884] ACPI: SSDT 0xFFFF88014899F400 000119 (v02 PmRef  ApCst    00003000 INTL 20141107)
>[    0.344087] ACPI: Interpreter enabled
>[    0.344111] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S1_] (20141107/hwxface-580)
>[    0.344131] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S2_] (20141107/hwxface-580)
>[    0.344181] ACPI: (supports S0 S3 S4 S5)
>[    0.344186] ACPI: Using IOAPIC for interrupt routing
>[    0.344237] PCI: MMCONFIG for domain 0000 [bus 00-ff] at [mem 0xe0000000-0xefffffff] (base 0xe0000000)
>[    0.349643] PCI: MMCONFIG at [mem 0xe0000000-0xefffffff] reserved in ACPI motherboard resources
>[    0.350062] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
>[    0.351055] ACPI: Power Resource [PG00] (on)
>[    0.351923] ACPI: Power Resource [PG01] (on)
>[    0.352773] ACPI: Power Resource [PG02] (on)
>[    0.366895] ACPI: Power Resource [USBC] (on)
>[    0.367092] ACPI: Power Resource [PAUD] (on)
>[    0.368890] ACPI: Power Resource [PXP] (on)
>[    0.579313] ACPI: Power Resource [PXP] (off)
>[    0.581207] ACPI: Power Resource [PXP] (off)
>[    0.583519] ACPI: Power Resource [PXP] (on)
>[    0.604582] ACPI Error: No object attached to node [PC09] ffff880149912398 (20141107/exresnte-128)
>[    0.605713] ACPI: Power Resource [PXP] (on)
>[    0.719482] ACPI: Power Resource [SPPR] (on)
>[    0.722482] ACPI: Power Resource [SPPR] (on)
>[    0.724615] ACPI: Power Resource [SPPR] (off)
>[    0.725324] ACPI: Power Resource [V0PR] (on)
>[    0.725370] ACPI: Power Resource [V1PR] (on)
>[    0.725418] ACPI: Power Resource [V2PR] (on)
>[    0.730413] ACPI: Power Resource [PXTC] (on)
>[    0.746327] acpi ABCD0000:00: ACPI dock station (docks/bays count: 1)
>[    0.749102] ACPI: Power Resource [FN00] (off)
>[    0.749254] ACPI: Power Resource [FN01] (off)
>[    0.749404] ACPI: Power Resource [FN02] (off)
>[    0.749549] ACPI: Power Resource [FN03] (off)
>[    0.749696] ACPI: Power Resource [FN04] (off)
>[    0.751628] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-fe])
>[    0.751643] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI]
>[    0.755865] acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug PME AER PCIeCapability]
>[    0.756465] PCI host bridge to bus 0000:00
>[    0.756473] pci_bus 0000:00: root bus resource [bus 00-fe]
>[    0.756481] pci_bus 0000:00: root bus resource [io  0x0000-0x0cf7]
>[    0.756487] pci_bus 0000:00: root bus resource [io  0x0d00-0xffff]
>[    0.756493] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff]
>[    0.756498] pci_bus 0000:00: root bus resource [mem 0x000c0000-0x000c3fff]
>[    0.756504] pci_bus 0000:00: root bus resource [mem 0x000c4000-0x000c7fff]
>[    0.756509] pci_bus 0000:00: root bus resource [mem 0x000c8000-0x000cbfff]
>[    0.756515] pci_bus 0000:00: root bus resource [mem 0x000cc000-0x000cffff]
>[    0.756520] pci_bus 0000:00: root bus resource [mem 0x000d0000-0x000d3fff]
>[    0.756526] pci_bus 0000:00: root bus resource [mem 0x000d4000-0x000d7fff]
>[    0.756531] pci_bus 0000:00: root bus resource [mem 0x000d8000-0x000dbfff]
>[    0.756537] pci_bus 0000:00: root bus resource [mem 0x000dc000-0x000dffff]
>[    0.756542] pci_bus 0000:00: root bus resource [mem 0x000e0000-0x000e3fff]
>[    0.756548] pci_bus 0000:00: root bus resource [mem 0x000e4000-0x000e7fff]
>[    0.756553] pci_bus 0000:00: root bus resource [mem 0x000e8000-0x000ebfff]
>[    0.756559] pci_bus 0000:00: root bus resource [mem 0x000ec000-0x000effff]
>[    0.756564] pci_bus 0000:00: root bus resource [mem 0x000f0000-0x000fffff]
>[    0.756570] pci_bus 0000:00: root bus resource [mem 0xaf800000-0xfeafffff]
>[    0.756589] pci 0000:00:00.0: [8086:190c] type 00 class 0x060000
>[    0.757834] pci 0000:00:02.0: [8086:191e] type 00 class 0x030000
>[    0.757856] pci 0000:00:02.0: reg 0x10: [mem 0xc0000000-0xc0ffffff 64bit]
>[    0.757870] pci 0000:00:02.0: reg 0x18: [mem 0xb0000000-0xbfffffff 64bit pref]
>[    0.757884] pci 0000:00:02.0: reg 0x20: [io  0x3000-0x303f]
>[    0.758954] pci 0000:00:05.0: [8086:1919] type 00 class 0x048000
>[    0.758977] pci 0000:00:05.0: reg 0x10: [mem 0xc1000000-0xc13fffff 64bit]
>[    0.760037] pci 0000:00:08.0: [8086:1911] type 00 class 0x088000
>[    0.760062] pci 0000:00:08.0: reg 0x10: [mem 0xc174e000-0xc174efff 64bit]
>[    0.761150] pci 0000:00:13.0: [8086:9d35] type 00 class 0x000000
>[    0.761187] pci 0000:00:13.0: reg 0x10: [mem 0xaf900000-0xaf900fff 64bit]
>[    0.762287] pci 0000:00:14.0: [8086:9d2f] type 00 class 0x0c0330
>[    0.762322] pci 0000:00:14.0: reg 0x10: [mem 0xc1720000-0xc172ffff 64bit]
>[    0.762438] pci 0000:00:14.0: PME# supported from D3hot D3cold
>[    0.763407] pci 0000:00:14.0: System wakeup disabled by ACPI
>[    0.763614] pci 0000:00:15.0: [8086:9d60] type 00 class 0x118000
>[    0.763881] pci 0000:00:15.0: reg 0x10: [mem 0xc1752000-0xc1752fff 64bit]
>[    0.765947] pci 0000:00:15.1: [8086:9d61] type 00 class 0x118000
>[    0.766214] pci 0000:00:15.1: reg 0x10: [mem 0xc1753000-0xc1753fff 64bit]
>[    0.768208] pci 0000:00:16.0: [8086:9d3a] type 00 class 0x078000
>[    0.768309] pci 0000:00:16.0: reg 0x10: [mem 0xc1754000-0xc1754fff 64bit]
>[    0.768631] pci 0000:00:16.0: PME# supported from D3hot
>[    0.769681] pci 0000:00:16.3: [8086:9d3d] type 00 class 0x070002
>[    0.769713] pci 0000:00:16.3: reg 0x10: [io  0x3080-0x3087]
>[    0.769729] pci 0000:00:16.3: reg 0x14: [mem 0xc175d000-0xc175dfff]
>[    0.770850] pci 0000:00:17.0: [8086:9d03] type 00 class 0x010601
>[    0.770883] pci 0000:00:17.0: reg 0x10: [mem 0xc174c000-0xc174dfff]
>[    0.770900] pci 0000:00:17.0: reg 0x14: [mem 0xc175c000-0xc175c0ff]
>[    0.770945] pci 0000:00:17.0: reg 0x20: [io  0x3060-0x307f]
>[    0.770962] pci 0000:00:17.0: reg 0x24: [mem 0xc175b000-0xc175b7ff]
>[    0.771044] pci 0000:00:17.0: PME# supported from D3hot
>[    0.772080] pci 0000:00:1d.0: [8086:9d18] type 01 class 0x060400
>[    0.772218] pci 0000:00:1d.0: PME# supported from D0 D3hot D3cold
>[    0.773301] pci 0000:00:1d.0: System wakeup disabled by ACPI
>[    0.773531] pci 0000:00:1e.0: [8086:9d27] type 00 class 0x118000
>[    0.773798] pci 0000:00:1e.0: reg 0x10: [mem 0xc1755000-0xc1755fff 64bit]
>[    0.775758] pci 0000:00:1e.4: [8086:9d2b] type 00 class 0x080501
>[    0.775800] pci 0000:00:1e.4: reg 0x10: [mem 0xc1756000-0xc1756fff 64bit]
>[    0.776935] pci 0000:00:1e.5: [8086:9d2c] type 00 class 0x080501
>[    0.776981] pci 0000:00:1e.5: reg 0x10: [mem 0xc1757000-0xc1757fff 64bit]
>[    0.778108] pci 0000:00:1f.0: [8086:9d46] type 00 class 0x060100
>[    0.779289] pci 0000:00:1f.2: [8086:9d21] type 00 class 0x058000
>[    0.779308] pci 0000:00:1f.2: reg 0x10: [mem 0xc1748000-0xc174bfff]
>[    0.780371] pci 0000:00:1f.3: [8086:9d70] type 00 class 0x040100
>[    0.780405] pci 0000:00:1f.3: reg 0x10: [mem 0xc1744000-0xc1747fff 64bit]
>[    0.780441] pci 0000:00:1f.3: reg 0x20: [mem 0xc1730000-0xc173ffff 64bit]
>[    0.780516] pci 0000:00:1f.3: PME# supported from D3hot D3cold
>[    0.781476] pci 0000:00:1f.3: System wakeup disabled by ACPI
>[    0.781559] pci 0000:00:1f.4: [8086:9d23] type 00 class 0x0c0500
>[    0.781607] pci 0000:00:1f.4: reg 0x10: [mem 0xc1758000-0xc17580ff 64bit]
>[    0.781665] pci 0000:00:1f.4: reg 0x20: [io  0xefa0-0xefbf]
>[    0.782724] pci 0000:00:1f.5: [8086:9d24] type 00 class 0x000000
>[    0.782744] pci 0000:00:1f.5: reg 0x10: [mem 0xc175a000-0xc175afff]
>[    0.783815] pci 0000:00:1f.6: [8086:156f] type 00 class 0x020000
>[    0.783849] pci 0000:00:1f.6: reg 0x10: [mem 0xc1700000-0xc171ffff]
>[    0.783865] pci 0000:00:1f.6: reg 0x14: [mem 0xc1759000-0xc1759fff]
>[    0.783999] pci 0000:00:1f.6: PME# supported from D0 D3hot D3cold
>[    0.784963] pci 0000:00:1f.6: System wakeup disabled by ACPI
>[    0.785439] pci 0000:01:00.0: [8086:24f3] type 00 class 0x028000
>[    0.785530] pci 0000:01:00.0: reg 0x10: [mem 0xc1600000-0xc1601fff 64bit]
>[    0.785920] pci 0000:01:00.0: PME# supported from D0 D3hot D3cold
>[    0.786125] pci 0000:01:00.0: System wakeup disabled by ACPI
>[    0.789190] pci 0000:00:1d.0: PCI bridge to [bus 01]
>[    0.789205] pci 0000:00:1d.0:   bridge window [mem 0xc1600000-0xc16fffff]
>[    0.789367] acpi PNP0A08:00: Disabling ASPM (FADT indicates it is unsupported)
>[    0.799351] ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 10 *11 12 14 15)
>[    0.799447] ACPI: PCI Interrupt Link [LNKB] (IRQs 3 4 5 6 *10 11 12 14 15)
>[    0.799532] ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 5 6 10 *11 12 14 15)
>[    0.799616] ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 5 6 10 *11 12 14 15)
>[    0.799698] ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 10 *11 12 14 15)
>[    0.799783] ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 10 *11 12 14 15)
>[    0.799866] ACPI: PCI Interrupt Link [LNKG] (IRQs 3 4 5 6 10 *11 12 14 15)
>[    0.799947] ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 10 *11 12 14 15)
>[    0.800791] ACPI: Enabled 4 GPEs in block 00 to 7F
>[    0.801304] ACPI : EC: GPE = 0x50, I/O: command/status = 0x66, data = 0x62
>[    0.801513] vgaarb: setting as boot device: PCI:0000:00:02.0
>[    0.801520] vgaarb: device added: PCI:0000:00:02.0,decodes=io+mem,owns=io+mem,locks=none
>[    0.801532] vgaarb: loaded
>[    0.801535] vgaarb: bridge control possible 0000:00:02.0
>[    0.801705] SCSI subsystem initialized
>[    0.801806] libata version 3.00 loaded.
>[    0.801898] ACPI: bus type USB registered
>[    0.801949] usbcore: registered new interface driver usbfs
>[    0.801972] usbcore: registered new interface driver hub
>[    0.802011] usbcore: registered new device driver usb
>[    0.802075] pps_core: LinuxPPS API ver. 1 registered
>[    0.802082] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
>[    0.802101] PTP clock support registered
>[    0.802321] PCI: Using ACPI for IRQ routing
>[    0.831242] PCI: pci_cache_line_size set to 64 bytes
>[    0.831433] e820: reserve RAM buffer [mem 0x00058000-0x0005ffff]
>[    0.831436] e820: reserve RAM buffer [mem 0x0009e000-0x0009ffff]
>[    0.831439] e820: reserve RAM buffer [mem 0x996ba000-0x9bffffff]
>[    0.831443] e820: reserve RAM buffer [mem 0x9bf7f000-0x9bffffff]
>[    0.831446] e820: reserve RAM buffer [mem 0x9c0a6000-0x9fffffff]
>[    0.831449] e820: reserve RAM buffer [mem 0x9e000000-0x9fffffff]
>[    0.831452] e820: reserve RAM buffer [mem 0x14e800000-0x14fffffff]
>[    0.831670] NetLabel: Initializing
>[    0.831675] NetLabel:  domain hash size = 128
>[    0.831678] NetLabel:  protocols = UNLABELED CIPSOv4
>[    0.831706] NetLabel:  unlabeled traffic allowed by default
>[    0.832008] Switched to clocksource refined-jiffies
>[    0.838109] pnp: PnP ACPI init
>[    0.838841] system 00:00: [io  0x06a4] has been reserved
>[    0.838849] system 00:00: [io  0x06a0] has been reserved
>[    0.838857] system 00:00: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.839311] system 00:01: [io  0x0680-0x069f] has been reserved
>[    0.839318] system 00:01: [io  0xffff] has been reserved
>[    0.839324] system 00:01: [io  0xffff] has been reserved
>[    0.839329] system 00:01: [io  0xffff] has been reserved
>[    0.839335] system 00:01: [io  0x1800-0x18fe] could not be reserved
>[    0.839341] system 00:01: [io  0x164e-0x164f] has been reserved
>[    0.839348] system 00:01: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.839501] pnp 00:02: Plug and Play ACPI device, IDs PNP0b00 (active)
>[    0.839575] system 00:03: [io  0x1854-0x1857] has been reserved
>[    0.839586] system 00:03: Plug and Play ACPI device, IDs INT3f0d PNP0c02 (active)
>[    0.839767] pnp 00:04: Plug and Play ACPI device, IDs PNP0501 (active)
>[    0.839824] pnp 00:05: Plug and Play ACPI device, IDs PNP0303 (active)
>[    0.839893] pnp 00:06: Plug and Play ACPI device, IDs PNP0f03 (active)
>[    0.841618] system 00:07: [mem 0xfe029000-0xfe029fff] has been reserved
>[    0.841627] system 00:07: [mem 0xfe028000-0xfe028fff] has been reserved
>[    0.841633] system 00:07: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.843308] system 00:08: [mem 0xfe036800-0xfe03680b] has been reserved
>[    0.843316] system 00:08: [mem 0xfe03680c-0xfe036fff] has been reserved
>[    0.843323] system 00:08: [mem 0xfe037000-0xfe037fff] has been reserved
>[    0.843330] system 00:08: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.843635] system 00:09: [mem 0xfed10000-0xfed17fff] has been reserved
>[    0.843642] system 00:09: [mem 0xfed18000-0xfed18fff] has been reserved
>[    0.843648] system 00:09: [mem 0xfed19000-0xfed19fff] has been reserved
>[    0.843655] system 00:09: [mem 0xe0000000-0xefffffff] could not be reserved
>[    0.843661] system 00:09: [mem 0xfd000000-0xfdabffff] has been reserved
>[    0.843668] system 00:09: [mem 0xfdad0000-0xfdadffff] has been reserved
>[    0.843674] system 00:09: [mem 0xfdb00000-0xfdffffff] has been reserved
>[    0.843680] system 00:09: [mem 0xfe000000-0xfe01ffff] could not be reserved
>[    0.843687] system 00:09: [mem 0xfe03d000-0xfe7fffff] has been reserved
>[    0.843693] system 00:09: [mem 0xfed20000-0xfed3ffff] has been reserved
>[    0.843699] system 00:09: [mem 0xfed90000-0xfed93fff] has been reserved
>[    0.843705] system 00:09: [mem 0xfed45000-0xfed8ffff] has been reserved
>[    0.843711] system 00:09: [mem 0xff000000-0xffffffff] could not be reserved
>[    0.843717] system 00:09: [mem 0xfee00000-0xfeefffff] has been reserved
>[    0.843723] system 00:09: [mem 0xaf800000-0xaf81ffff] has been reserved
>[    0.843730] system 00:09: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.844204] system 00:0a: [mem 0x00000000-0x0009cfff] could not be reserved
>[    0.844212] system 00:0a: Plug and Play ACPI device, IDs PNP0c01 (active)
>[    0.844433] pnp: PnP ACPI: found 11 devices
>[    0.851994] Switched to clocksource acpi_pm
>[    0.852075] pci 0000:00:1d.0: PCI bridge to [bus 01]
>[    0.852086] pci 0000:00:1d.0:   bridge window [mem 0xc1600000-0xc16fffff]
>[    0.852102] pci_bus 0000:00: resource 4 [io  0x0000-0x0cf7]
>[    0.852106] pci_bus 0000:00: resource 5 [io  0x0d00-0xffff]
>[    0.852110] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff]
>[    0.852113] pci_bus 0000:00: resource 7 [mem 0x000c0000-0x000c3fff]
>[    0.852117] pci_bus 0000:00: resource 8 [mem 0x000c4000-0x000c7fff]
>[    0.852120] pci_bus 0000:00: resource 9 [mem 0x000c8000-0x000cbfff]
>[    0.852124] pci_bus 0000:00: resource 10 [mem 0x000cc000-0x000cffff]
>[    0.852127] pci_bus 0000:00: resource 11 [mem 0x000d0000-0x000d3fff]
>[    0.852131] pci_bus 0000:00: resource 12 [mem 0x000d4000-0x000d7fff]
>[    0.852134] pci_bus 0000:00: resource 13 [mem 0x000d8000-0x000dbfff]
>[    0.852137] pci_bus 0000:00: resource 14 [mem 0x000dc000-0x000dffff]
>[    0.852141] pci_bus 0000:00: resource 15 [mem 0x000e0000-0x000e3fff]
>[    0.852144] pci_bus 0000:00: resource 16 [mem 0x000e4000-0x000e7fff]
>[    0.852148] pci_bus 0000:00: resource 17 [mem 0x000e8000-0x000ebfff]
>[    0.852151] pci_bus 0000:00: resource 18 [mem 0x000ec000-0x000effff]
>[    0.852155] pci_bus 0000:00: resource 19 [mem 0x000f0000-0x000fffff]
>[    0.852158] pci_bus 0000:00: resource 20 [mem 0xaf800000-0xfeafffff]
>[    0.852162] pci_bus 0000:01: resource 1 [mem 0xc1600000-0xc16fffff]
>[    0.852232] NET: Registered protocol family 2
>[    0.852562] TCP established hash table entries: 32768 (order: 6, 262144 bytes)
>[    0.852711] TCP bind hash table entries: 32768 (order: 7, 524288 bytes)
>[    0.852817] TCP: Hash tables configured (established 32768 bind 32768)
>[    0.852845] TCP: reno registered
>[    0.852858] UDP hash table entries: 2048 (order: 4, 65536 bytes)
>[    0.852889] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes)
>[    0.852982] NET: Registered protocol family 1
>[    0.853106] RPC: Registered named UNIX socket transport module.
>[    0.853111] RPC: Registered udp transport module.
>[    0.853115] RPC: Registered tcp transport module.
>[    0.853119] RPC: Registered tcp NFSv4.1 backchannel transport module.
>[    0.853144] pci 0000:00:02.0: Video device with shadowed ROM
>[    0.853291] PCI: CLS 0 bytes, default 64
>[    1.782159] PCI-DMA: Using software bounce buffering for IO (SWIOTLB)
>[    1.782173] software IO TLB [mem 0x95679000-0x99679000] (64MB) mapped at [ffff880095679000-ffff880099678fff]
>[    1.782461] Simple Boot Flag at 0x47 set to 0x80
>[    1.783812] futex hash table entries: 2048 (order: 5, 131072 bytes)
>[    1.783872] audit: initializing netlink subsys (disabled)
>[    1.783890] audit: type=2000 audit(978572164.769:1): initialized
>[    1.784280] HugeTLB registered 2 MB page size, pre-allocated 0 pages
>[    1.787621] VFS: Disk quotas dquot_6.5.2
>[    1.787694] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
>[    1.788956] NFS: Registering the id_resolver key type
>[    1.788972] Key type id_resolver registered
>[    1.788977] Key type id_legacy registered
>[    1.788987] Installing knfsd (copyright (C) 1996 okir@monad.swb.de).
>[    1.789366] fuse init (API version 7.23)
>[    1.789977] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 250)
>[    1.789993] io scheduler noop registered
>[    1.790005] io scheduler deadline registered
>[    1.790074] io scheduler cfq registered (default)
>[    1.790684] aer 0000:00:1d.0:pcie02: service driver aer loaded
>[    1.790723] pcieport 0000:00:1d.0: Signaling PME through PCIe PME interrupt
>[    1.790729] pci 0000:01:00.0: Signaling PME through PCIe PME interrupt
>[    1.790738] pcie_pme 0000:00:1d.0:pcie01: service driver pcie_pme loaded
>[    1.790757] pci_hotplug: PCI Hot Plug PCI Core version: 0.5
>[    1.792551] Monitor-Mwait will be used to enter C-1 state
>[    1.792560] Monitor-Mwait will be used to enter C-2 state
>[    1.792566] Monitor-Mwait will be used to enter C-3 state
>[    1.792579] ACPI: acpi_idle registered with cpuidle
>[    1.815636] thermal LNXTHERM:00: registered as thermal_zone0
>[    1.815644] ACPI: Thermal Zone [TZ00] (27 C)
>[    1.817158] thermal LNXTHERM:01: registered as thermal_zone1
>[    1.817165] ACPI: Thermal Zone [TZ01] (27 C)
>[    1.817388] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
>[    1.838289] 00:04: ttyS0 at I/O 0x3f8 (irq = 4, base_baud = 115200) is a 16550A
>[    1.839061] serial 0000:00:16.3: enabling device (0000 -> 0003)
>[    1.859972] 0000:00:16.3: ttyS1 at I/O 0x3080 (irq = 19, base_baud = 115200) is a 16550A
>[    1.860377] hpet_acpi_add: no address or irqs in _CRS
>[    1.860527] Non-volatile memory driver v1.3
>[    1.860540] Linux agpgart interface v0.103
>[    1.862721] brd: module loaded
>[    1.862834] Loading iSCSI transport class v2.0-870.
>[    1.863187] iscsi: registered transport (tcp)
>[    1.863415] Adaptec aacraid driver 1.2-0[30300]-ms
>[    1.863461] aic94xx: Adaptec aic94xx SAS/SATA driver version 1.0.3 loaded
>[    1.863617] qla2xxx [0000:00:00.0]-0005: : QLogic Fibre Channel HBA Driver: 8.07.00.16-k.
>[    1.863688] iscsi: registered transport (qla4xxx)
>[    1.863720] QLogic iSCSI HBA Driver
>[    1.863827] GDT-HA: Storage RAID Controller Driver. Version: 3.05
>[    1.863929] RocketRAID 3xxx/4xxx Controller driver v1.8
>[    1.863966] stex: Promise SuperTrak EX Driver version: 4.6.0000.4
>[    1.864043] st: Version 20101219, fixed bufsize 32768, s/g segs 256
>[    1.864094] osst :I: Tape driver with OnStream support version 0.99.4
>[    1.864094] osst :I: $Id: osst.c,v 1.73 2005/01/01 21:13:34 wriede Exp $
>[    1.864250] SCSI Media Changer driver v0.25 
>[    1.864321] ahci 0000:00:17.0: version 3.0
>[    1.864616] ahci 0000:00:17.0: AHCI 0001.0301 32 slots 1 ports 6 Gbps 0x1 impl SATA mode
>[    1.864630] ahci 0000:00:17.0: flags: 64bit ncq pm led clo only pio slum part deso sadm sds apst 
>[    1.864969] scsi host0: ahci
>[    1.865089] ata1: SATA max UDMA/133 abar m2048@0xc175b000 port 0xc175b100 irq 121
>[    1.866781] bnx2x: Broadcom NetXtreme II 5771x/578xx 10/20-Gigabit Ethernet Driver bnx2x 1.710.51-0 (2014/02/10)
>[    1.866932] e100: Intel(R) PRO/100 Network Driver, 3.5.24-k2-NAPI
>[    1.866936] e100: Copyright(c) 1999-2006 Intel Corporation
>[    1.866972] e1000: Intel(R) PRO/1000 Network Driver - version 7.3.21-k8-NAPI
>[    1.866977] e1000: Copyright (c) 1999-2006 Intel Corporation.
>[    1.867011] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k
>[    1.867015] e1000e: Copyright(c) 1999 - 2014 Intel Corporation.
>[    1.867050] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.2.15-k
>[    1.867054] igb: Copyright (c) 2007-2014 Intel Corporation.
>[    1.867106] usbcore: registered new interface driver catc
>[    1.867150] usbcore: registered new interface driver kaweth
>[    1.867159] pegasus: v0.9.3 (2013/04/25), Pegasus/Pegasus II USB Ethernet driver
>[    1.867181] usbcore: registered new interface driver pegasus
>[    1.867203] usbcore: registered new interface driver rtl8150
>[    1.867229] usbcore: registered new interface driver asix
>[    1.867253] usbcore: registered new interface driver ax88179_178a
>[    1.867275] usbcore: registered new interface driver cdc_ether
>[    1.867296] usbcore: registered new interface driver dm9601
>[    1.867317] usbcore: registered new interface driver gl620a
>[    1.867340] usbcore: registered new interface driver net1080
>[    1.867362] usbcore: registered new interface driver plusb
>[    1.867386] usbcore: registered new interface driver rndis_host
>[    1.867408] usbcore: registered new interface driver cdc_subset
>[    1.867429] usbcore: registered new interface driver zaurus
>[    1.867452] usbcore: registered new interface driver MOSCHIP usb-ethernet driver
>[    1.867487] usbcore: registered new interface driver cdc_ncm
>[    1.867706] xhci_hcd 0000:00:14.0: xHCI Host Controller
>[    1.867775] xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 1
>[    1.867927] xhci_hcd 0000:00:14.0: cache line size of 64 is not supported
>[    1.868043] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
>[    1.868050] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
>[    1.868063] usb usb1: Product: xHCI Host Controller
>[    1.868069] usb usb1: Manufacturer: Linux 3.19.0-rc7_drm-intel-nightly_b4442e_20150208+ xhci-hcd
>[    1.868075] usb usb1: SerialNumber: 0000:00:14.0
>[    1.868299] hub 1-0:1.0: USB hub found
>[    1.868326] hub 1-0:1.0: 12 ports detected
>[    1.880239] xhci_hcd 0000:00:14.0: xHCI Host Controller
>[    1.880364] xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 2
>[    1.880427] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003
>[    1.880433] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
>[    1.880439] usb usb2: Product: xHCI Host Controller
>[    1.880445] usb usb2: Manufacturer: Linux 3.19.0-rc7_drm-intel-nightly_b4442e_20150208+ xhci-hcd
>[    1.880451] usb usb2: SerialNumber: 0000:00:14.0
>[    1.880697] hub 2-0:1.0: USB hub found
>[    1.880716] hub 2-0:1.0: 6 ports detected
>[    1.885641] usb: failed to peer usb2-port5 and usb1-port5 by location (usb2-port5:none) (usb1-port5:usb2-port2)
>[    1.885651] usb usb2-port5: failed to peer to usb1-port5 (-16)
>[    1.885655] usb: port power management may be unreliable
>[    1.886614] usb: failed to peer usb2-port6 and usb1-port5 by location (usb2-port6:none) (usb1-port5:usb2-port2)
>[    1.886622] usb usb2-port6: failed to peer to usb1-port5 (-16)
>[    1.886761] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
>[    1.886769] ehci-pci: EHCI PCI platform driver
>[    1.886819] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
>[    1.886830] ohci-pci: OHCI PCI platform driver
>[    1.886866] uhci_hcd: USB Universal Host Controller Interface driver
>[    1.886975] usbcore: registered new interface driver usb-storage
>[    1.887056] i8042: PNP: PS/2 Controller [PNP0303:PS2K,PNP0f03:PS2M] at 0x60,0x64 irq 1,12
>[    1.888215] serio: i8042 KBD port at 0x60,0x64 irq 1
>[    1.888224] serio: i8042 AUX port at 0x60,0x64 irq 12
>[    1.888413] mousedev: PS/2 mouse device common for all mice
>[    1.888601] rtc_cmos 00:02: RTC can wake from S4
>[    1.888998] rtc_cmos 00:02: rtc core: registered rtc_cmos as rtc0
>[    1.889090] rtc_cmos 00:02: alarms up to one month, y3k, 242 bytes nvram
>[    1.889117] i2c /dev entries driver
>[    1.889155] EFI Variables Facility v0.08 2004-May-17
>[    1.895222] hidraw: raw HID events driver (C) Jiri Kosina
>[    1.895719] usbcore: registered new interface driver usbhid
>[    1.895724] usbhid: USB HID core driver
>[    1.895855] TCP: cubic registered
>[    1.895863] Initializing XFRM netlink socket
>[    1.895874] NET: Registered protocol family 17
>[    1.895917] Key type dns_resolver registered
>[    1.896778] registered taskstats version 1
>[    1.897644] Btrfs loaded
>[    1.899382]   Magic number: 1:949:608
>[    1.899644] PM: Hibernation image not present or could not be loaded.
>[    1.899672] Warning: unable to open an initial console.
>[    1.924775] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input0
>[    2.170395] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
>[    2.170814] ata1.00: ATA-9: INTEL SSDSC2BB240G4, D2010370, max UDMA/133
>[    2.170827] ata1.00: 468862128 sectors, multi 1: LBA48 NCQ (depth 31/32)
>[    2.171462] ata1.00: configured for UDMA/133
>[    2.171924] scsi 0:0:0:0: Direct-Access     ATA      INTEL SSDSC2BB24 0370 PQ: 0 ANSI: 5
>[    2.172590] ata1.00: Enabling discard_zeroes_data
>[    2.172631] sd 0:0:0:0: [sda] 468862128 512-byte logical blocks: (240 GB/223 GiB)
>[    2.172642] sd 0:0:0:0: Attached scsi generic sg0 type 0
>[    2.172644] sd 0:0:0:0: [sda] 4096-byte physical blocks
>[    2.172779] sd 0:0:0:0: [sda] Write Protect is off
>[    2.172787] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
>[    2.172840] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
>[    2.173024] ata1.00: Enabling discard_zeroes_data
>[    2.174666]  sda: sda1 sda2 sda3
>[    2.175002] ata1.00: Enabling discard_zeroes_data
>[    2.175206] sd 0:0:0:0: [sda] Attached SCSI disk
>[    2.180156] Freeing unused kernel memory: 23444K (ffffffff81c6b000 - ffffffff83350000)
>[    2.232232] usb 1-5: new high-speed USB device number 2 using xhci_hcd
>[    2.245076] dracut: dracut-018-35.git20120510.fc17
>[    2.298485] udevd[1525]: starting version 182
>[    2.329558] [drm] Initialized drm 1.1.0 20060810
>[    2.331341] input: Lid Switch as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:18/PNP0C09:00/PNP0C0D:00/input/input3
>[    2.332551] ACPI: Lid Switch [LID0]
>[    2.332771] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input4
>[    2.332858] ACPI: Power Button [PWRB]
>[    2.332986] input: Sleep Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0E:00/input/input5
>[    2.333063] ACPI: Sleep Button [SLPB]
>[    2.333209] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input6
>[    2.333285] ACPI: Power Button [PWRF]
>[    2.339914] [drm:i915_dump_device_info] i915 device info: gen=9, pciid=0x191e rev=0x02 flags=need_gfx_hws,is_skylake,is_preliminary,has_fbc,has_hotplug,has_llc,has_ddi,
>[    2.339954] [drm:intel_detect_pch] Found SunrisePoint LP PCH
>[    2.340356] [drm] Memory usable by graphics device = 4096M
>[    2.340369] [drm:i915_gem_gtt_init] GMADR size = 256M
>[    2.340373] [drm:i915_gem_gtt_init] GTT stolen size = 32M
>[    2.340377] [drm:i915_gem_gtt_init] ppgtt mode: 2
>[    2.340381] [drm] Replacing VGA console driver
>[    2.342797] [drm:intel_opregion_setup] graphic opregion physical addr: 0x9df8b018
>[    2.342823] [drm:intel_opregion_setup] Public ACPI methods supported
>[    2.342827] [drm:intel_opregion_setup] SWSCI supported
>[    2.350219] [drm:swsci_setup] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00300483
>[    2.350224] [drm:intel_opregion_setup] ASLE supported
>[    2.350393] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
>[    2.350403] [drm] Driver supports precise vblank timestamp query.
>[    2.350412] [drm:init_vbt_defaults] Set default to SSC at 120000 kHz
>[    2.350418] [drm:validate_vbt] Using VBT from OpRegion: $VBT SKYLAKE        d
>[    2.350423] [drm:parse_general_features] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 0 lvds_use_ssc 0 lvds_ssc_freq 120000 display_clock_mode 0 fdi_rx_polarity_inverted 0
>[    2.350426] [drm:parse_general_definitions] crt_ddc_bus_pin: 2
>[    2.350429] [drm:parse_lfp_panel_data] DRRS supported mode is static
>[    2.350434] [drm:parse_lfp_panel_data] Found panel mode in BIOS VBT tables:
>[    2.350441] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 0 65000 1024 1048 1184 1344 768 771 777 806 0x8 0xa
>[    2.350446] [drm:parse_lfp_panel_data] VBT initial LVDS value 300
>[    2.350450] [drm:parse_lfp_backlight] VBT backlight PWM modulation frequency 200 Hz, active high, min brightness 0, level 255
>[    2.350454] [drm:parse_sdvo_device_mapping] No SDVO device info is found in VBT
>[    2.350457] [drm:parse_driver_features] DRRS State Enabled:1
>[    2.350462] [drm:parse_ddi_port] Port A VBT info: DP:1 HDMI:0 DVI:0 EDP:1 CRT:0
>[    2.350466] [drm:parse_ddi_port] VBT HDMI level shift for port A: 0
>[    2.350470] [drm:parse_ddi_port] Port B VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0
>[    2.350473] [drm:parse_ddi_port] VBT HDMI level shift for port B: 3
>[    2.350476] [drm:parse_ddi_port] Port C VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0
>[    2.350479] [drm:parse_ddi_port] VBT HDMI level shift for port C: 3
>[    2.350534] [drm:intel_dsm_pci_probe] no _DSM method for intel device
>[    2.350547] [drm:i915_gem_init_stolen] found 33554432 bytes of stolen memory at ad800000
>[    2.350552] [drm:intel_display_power_get] enabling always-on
>[    2.350556] [drm:intel_display_power_get] enabling power well 1
>[    2.350562] [drm:skl_set_power_well] Enabling power well 1
>[    2.350565] [drm:intel_display_power_get] enabling MISC IO power well
>[    2.350570] [drm:skl_set_power_well] Enabling MISC IO power well
>[    2.350573] [drm:intel_display_power_get] enabling power well 2
>[    2.350578] [drm:skl_set_power_well] Enabling power well 2
>[    2.350581] [drm:intel_display_power_get] enabling DDI A/E power well
>[    2.350584] [drm:skl_set_power_well] Enabling DDI A/E power well
>[    2.350586] [drm:intel_display_power_get] enabling DDI B power well
>[    2.350590] [drm:skl_set_power_well] Enabling DDI B power well
>[    2.350592] [drm:intel_display_power_get] enabling DDI C power well
>[    2.350595] [drm:skl_set_power_well] Enabling DDI C power well
>[    2.350598] [drm:intel_display_power_get] enabling DDI D power well
>[    2.350601] [drm:skl_set_power_well] Enabling DDI D power well
>[    2.350785] [drm:intel_print_wm_latency] Gen9 Plane WM0 latency 2 (2.0 usec)
>[    2.350788] [drm:intel_print_wm_latency] Gen9 Plane WM1 latency 19 (19.0 usec)
>[    2.350791] [drm:intel_print_wm_latency] Gen9 Plane WM2 latency 28 (28.0 usec)
>[    2.350794] [drm:intel_print_wm_latency] Gen9 Plane WM3 latency 32 (32.0 usec)
>[    2.350797] [drm:intel_print_wm_latency] Gen9 Plane WM4 latency 63 (63.0 usec)
>[    2.350800] [drm:intel_print_wm_latency] Gen9 Plane WM5 latency 77 (77.0 usec)
>[    2.350803] [drm:intel_print_wm_latency] Gen9 Plane WM6 latency 83 (83.0 usec)
>[    2.350806] [drm:intel_print_wm_latency] Gen9 Plane WM7 latency 99 (99.0 usec)
>[    2.350810] [drm:intel_modeset_init] 3 display pipes available.
>[    2.350834] [drm:intel_ddi_pll_init] CDCLK running at 675000KHz
>[    2.350840] vgaarb: device changed decodes: PCI:0000:00:02.0,olddecodes=io+mem,decodes=io+mem:owns=io+mem
>[    2.351177] [drm:intel_dp_init_connector] Adding eDP connector on port A
>[    2.351363] [drm:intel_dp_init_panel_power_sequencer] cur t1_t3 2000 t8 0 t9 2000 t10 500 t11_t12 6000
>[    2.351369] [drm:intel_dp_init_panel_power_sequencer] vbt t1_t3 2000 t8 10 t9 2000 t10 500 t11_t12 5000
>[    2.351374] [drm:intel_dp_init_panel_power_sequencer] panel power up delay 200, power down delay 50, power cycle delay 600
>[    2.351378] [drm:intel_dp_init_panel_power_sequencer] backlight on delay 1, off delay 200
>[    2.351383] [drm:intel_dp_aux_init] registering DPDDC-A bus for card0-eDP-1
>[    2.351695] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[    2.351745] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[    2.352216] [drm:intel_dp_get_dpcd] DPCD: 12 14 c4 41 00 00 01 c0 02 00 00 00 1f 0b 00
>[    2.352550] [drm:intel_dp_get_dpcd] Detected EDP PSR Panel.
>[    2.352552] [drm:intel_dp_get_dpcd] Displayport TPS3 supported
>[    2.352610] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x4af06
>[    2.378366] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    2.378370] [drm:intel_dp_drrs_init] VBT doesn't support DRRS
>[    2.378397] [drm:intel_panel_setup_backlight] Connector eDP-1 backlight initialized, enabled, brightness 937/937
>[    2.378420] [drm:intel_dp_init_connector] Adding DP connector on port B
>[    2.378499] [drm:intel_dp_aux_init] registering DPDDC-B bus for card0-DP-1
>[    2.378804] [drm:intel_dp_init_connector] Adding DP connector on port C
>[    2.378879] [drm:intel_dp_aux_init] registering DPDDC-C bus for card0-DP-2
>[    2.379168] [drm:intel_modeset_readout_hw_state] [CRTC:20] hw state readout: enabled
>[    2.379174] [drm:intel_modeset_readout_hw_state] [CRTC:25] hw state readout: disabled
>[    2.379179] [drm:intel_modeset_readout_hw_state] [CRTC:30] hw state readout: disabled
>[    2.379201] [drm:intel_modeset_readout_hw_state] DPLL 1 hw state readout: crtc_mask 0x00000000, on 0
>[    2.379206] [drm:intel_modeset_readout_hw_state] DPLL 2 hw state readout: crtc_mask 0x00000000, on 0
>[    2.379211] [drm:intel_modeset_readout_hw_state] DPLL 3 hw state readout: crtc_mask 0x00000000, on 0
>[    2.379221] [drm:intel_modeset_readout_hw_state] [ENCODER:33:TMDS-33] hw state readout: enabled, pipe A
>[    2.379227] [drm:intel_modeset_readout_hw_state] [ENCODER:42:TMDS-42] hw state readout: disabled, pipe A
>[    2.379230] [drm:intel_modeset_readout_hw_state] [ENCODER:44:DP MST-44] hw state readout: disabled, pipe A
>[    2.379233] [drm:intel_modeset_readout_hw_state] [ENCODER:45:DP MST-45] hw state readout: disabled, pipe B
>[    2.379236] [drm:intel_modeset_readout_hw_state] [ENCODER:46:DP MST-46] hw state readout: disabled, pipe C
>[    2.379240] [drm:intel_modeset_readout_hw_state] [ENCODER:49:TMDS-49] hw state readout: disabled, pipe A
>[    2.379243] [drm:intel_modeset_readout_hw_state] [ENCODER:51:DP MST-51] hw state readout: disabled, pipe A
>[    2.379246] [drm:intel_modeset_readout_hw_state] [ENCODER:52:DP MST-52] hw state readout: disabled, pipe B
>[    2.379249] [drm:intel_modeset_readout_hw_state] [ENCODER:53:DP MST-53] hw state readout: disabled, pipe C
>[    2.379254] [drm:intel_modeset_readout_hw_state] [CONNECTOR:34:eDP-1] hw state readout: enabled
>[    2.379258] [drm:intel_modeset_readout_hw_state] [CONNECTOR:43:DP-1] hw state readout: disabled
>[    2.379261] [drm:intel_modeset_readout_hw_state] [CONNECTOR:47:HDMI-A-1] hw state readout: disabled
>[    2.379265] [drm:intel_modeset_readout_hw_state] [CONNECTOR:50:DP-2] hw state readout: disabled
>[    2.379268] [drm:intel_modeset_readout_hw_state] [CONNECTOR:54:HDMI-A-2] hw state readout: disabled
>[    2.379275] [drm:intel_dump_pipe_config] [CRTC:20][setup_hw_state] config for pipe A
>[    2.379277] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    2.379280] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 0
>[    2.379284] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    2.379288] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 350797, link_n: 524288, tu: 64
>[    2.379292] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    2.379295] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    2.379297] [drm:intel_dump_pipe_config] requested mode:
>[    2.379303] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 3200 0 0 0 1800 0 0 0 0x0 0x0
>[    2.379306] [drm:intel_dump_pipe_config] adjusted mode:
>[    2.379310] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0xa
>[    2.379315] [drm:intel_dump_crtc_timings] crtc timings: 361309 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x0 flags: 0xa
>[    2.379317] [drm:intel_dump_pipe_config] port clock: 540000
>[    2.379320] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    2.379323] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    2.379327] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    2.379329] [drm:intel_dump_pipe_config] ips: 0
>[    2.379331] [drm:intel_dump_pipe_config] double wide: 0
>[    2.379339] [drm:i915_get_vblank_timestamp] crtc 1 is disabled
>[    2.379343] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe B
>[    2.379346] [drm:i915_get_vblank_timestamp] crtc 1 is disabled
>[    2.379349] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe B
>[    2.379353] [drm:intel_dump_pipe_config] [CRTC:25][setup_hw_state] config for pipe B
>[    2.379356] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[    2.379358] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0
>[    2.379362] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    2.379366] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    2.379369] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    2.379372] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    2.379374] [drm:intel_dump_pipe_config] requested mode:
>[    2.379379] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    2.379381] [drm:intel_dump_pipe_config] adjusted mode:
>[    2.379385] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    2.379390] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[    2.379392] [drm:intel_dump_pipe_config] port clock: 0
>[    2.379395] [drm:intel_dump_pipe_config] pipe src size: 0x0
>[    2.379398] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    2.379401] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    2.379403] [drm:intel_dump_pipe_config] ips: 0
>[    2.379405] [drm:intel_dump_pipe_config] double wide: 0
>[    2.379408] [drm:i915_get_vblank_timestamp] crtc 2 is disabled
>[    2.379412] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe C
>[    2.379415] [drm:i915_get_vblank_timestamp] crtc 2 is disabled
>[    2.379419] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe C
>[    2.379421] [drm:intel_dump_pipe_config] [CRTC:30][setup_hw_state] config for pipe C
>[    2.379424] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[    2.379426] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0
>[    2.379430] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    2.379433] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    2.379437] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    2.379439] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    2.379441] [drm:intel_dump_pipe_config] requested mode:
>[    2.379446] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    2.379448] [drm:intel_dump_pipe_config] adjusted mode:
>[    2.379452] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    2.379456] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[    2.379458] [drm:intel_dump_pipe_config] port clock: 0
>[    2.379461] [drm:intel_dump_pipe_config] pipe src size: 0x0
>[    2.379464] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    2.379467] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    2.379469] [drm:intel_dump_pipe_config] ips: 0
>[    2.379472] [drm:intel_dump_pipe_config] double wide: 0
>[    2.379521] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[    2.379527] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[    2.379530] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[    2.379534] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[    2.379536] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[    2.379539] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[    2.379541] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[    2.379544] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[    2.379546] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[    2.379549] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[    2.379552] [drm:check_crtc_state] [CRTC:20]
>[    2.379564] [drm:check_crtc_state] [CRTC:25]
>[    2.379568] [drm:check_crtc_state] [CRTC:30]
>[    2.379571] [drm:check_shared_dpll_state] DPLL 1
>[    2.379575] [drm:check_shared_dpll_state] DPLL 2
>[    2.379577] [drm:check_shared_dpll_state] DPLL 3
>[    2.379586] [drm:skylake_get_initial_plane_config] pipe A with fb: size=3200x1800@32, offset=0, pitch 12800, size 0x15f9000
>[    2.379590] [drm:i915_gem_object_create_stolen_for_preallocated] creating preallocated stolen object: stolen_offset=0, gtt_offset=0, size=15f9000
>[    2.379597] [drm:i915_pages_create_for_stolen] offset=0x0, size=23040000
>[    2.379604] [drm:intel_alloc_plane_obj] plane fb obj ffff880143e60000
>[    2.379609] [drm:i915_gem_setup_global_gtt] reserving preallocated space: 0 + 15f9000
>[    2.379613] [drm:i915_gem_setup_global_gtt] clearing unused GTT space: [15f9000, fffff000]
>[    2.384457] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    2.384461] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    2.384464] [drm:i915_gem_context_init] LR context support initialized
>[    2.384843] [drm:intel_init_pipe_control] render ring pipe control offset: 0x0162f000
>[    2.385048] [drm:gen8_init_common_ring] Execlists enabled for render ring
>[    2.385058] [drm:gen8_init_common_ring] Execlists enabled for bsd ring
>[    2.385065] [drm:gen8_init_common_ring] Execlists enabled for blitter ring
>[    2.385071] [drm:gen8_init_common_ring] Execlists enabled for video enhancement ring
>[    2.385421] [drm:intel_backlight_device_register] Connector eDP-1 backlight sysfs interface registered
>[    2.385512] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[    2.385520] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[    2.385877] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[    2.386219] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[    2.386226] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] status updated from 3 to 1
>[    2.386241] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    2.386248] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[    2.386254] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    2.386259] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[    2.386263] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[    2.386265] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[    2.386276] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] status updated from 3 to 2
>[    2.386279] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[    2.386282] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[    2.386285] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[    2.386539] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[    2.386543] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[    2.386548] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] status updated from 3 to 2
>[    2.386553] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[    2.386557] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[    2.386562] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[    2.386582] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] status updated from 3 to 2
>[    2.386586] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[    2.386589] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[    2.386591] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[    2.386839] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[    2.386842] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[    2.386846] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] status updated from 3 to 2
>[    2.386849] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[    2.386853] [drm:drm_setup_crtcs] 
>[    2.386856] [drm:drm_enable_connectors] connector 34 enabled? yes
>[    2.386859] [drm:drm_enable_connectors] connector 43 enabled? no
>[    2.386861] [drm:drm_enable_connectors] connector 47 enabled? no
>[    2.386864] [drm:drm_enable_connectors] connector 50 enabled? no
>[    2.386866] [drm:drm_enable_connectors] connector 54 enabled? no
>[    2.386874] [drm:intel_fb_initial_config] looking for cmdline mode on connector eDP-1
>[    2.386876] [drm:intel_fb_initial_config] looking for preferred mode on connector eDP-1 0
>[    2.386881] [drm:intel_fb_initial_config] connector eDP-1 on pipe A [CRTC:20]: 3200x1800
>[    2.386883] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping
>[    2.386886] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping
>[    2.386888] [drm:intel_fb_initial_config] connector DP-2 not enabled, skipping
>[    2.386891] [drm:intel_fb_initial_config] connector HDMI-A-2 not enabled, skipping
>[    2.386895] [drm:drm_setup_crtcs] desired mode 3200x1800 set on crtc 20 (0,0)
>[    2.386899] [drm:intelfb_create] no BIOS fb, allocating a new one
>[    2.386902] [drm:i915_gem_object_create_stolen] creating stolen object: size=15f9000
>[    2.389923] ACPI: Video Device [GFX0] (multi-head: yes  rom: no  post: no)
>[    2.390287] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:00/input/input7
>[    2.390818] [drm] Initialized i915 1.6.0 20150130 for 0000:00:02.0 on minor 0
>[    2.396528] usb 1-5: New USB device found, idVendor=1a40, idProduct=0101
>[    2.396543] usb 1-5: New USB device strings: Mfr=0, Product=1, SerialNumber=0
>[    2.396550] usb 1-5: Product: USB 2.0 Hub
>[    2.397428] hub 1-5:1.0: USB hub found
>[    2.397468] hub 1-5:1.0: 4 ports detected
>[    2.397648] [drm:intelfb_create] allocated 3200x1800 fb: 0x016c0000, bo ffff880004acc000
>[    2.397758] fbcon: inteldrmfb (fb0) is primary device
>[    2.397927] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880004c035a0
>[    2.397933] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880148d696c0 state to ffff880004c035a0
>[    2.397937] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880143ffbc00 state to ffff880004c035a0
>[    2.397940] [drm:drm_atomic_check_only] checking ffff880004c035a0
>[    2.397947] [drm:drm_atomic_commit] commiting ffff880004c035a0
>[    2.397972] [drm:intel_fbc_update] no output, disabling
>[    2.397978] [drm:drm_atomic_state_clear] Clearing atomic state ffff880004c035a0
>[    2.397981] [drm:drm_atomic_state_free] Freeing atomic state ffff880004c035a0
>[    2.397985] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880004c035a0
>[    2.397988] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff880148d69cc0 state to ffff880004c035a0
>[    2.397990] [drm:drm_atomic_check_only] checking ffff880004c035a0
>[    2.397992] [drm:drm_atomic_commit] commiting ffff880004c035a0
>[    2.397995] [drm:drm_atomic_state_clear] Clearing atomic state ffff880004c035a0
>[    2.397997] [drm:drm_atomic_state_free] Freeing atomic state ffff880004c035a0
>[    2.397999] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880004c035a0
>[    2.398001] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff880148d69900 state to ffff880004c035a0
>[    2.398002] [drm:drm_atomic_check_only] checking ffff880004c035a0
>[    2.398004] [drm:drm_atomic_commit] commiting ffff880004c035a0
>[    2.398006] [drm:drm_atomic_state_clear] Clearing atomic state ffff880004c035a0
>[    2.398007] [drm:drm_atomic_state_free] Freeing atomic state ffff880004c035a0
>[    2.398009] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880004c035a0
>[    2.398012] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880148d69480 state to ffff880004c035a0
>[    2.398013] [drm:drm_atomic_check_only] checking ffff880004c035a0
>[    2.398014] [drm:drm_atomic_commit] commiting ffff880004c035a0
>[    2.398016] [drm:drm_atomic_state_clear] Clearing atomic state ffff880004c035a0
>[    2.398018] [drm:drm_atomic_state_free] Freeing atomic state ffff880004c035a0
>[    2.398020] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880004c035a0
>[    2.398022] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff880148d699c0 state to ffff880004c035a0
>[    2.398023] [drm:drm_atomic_check_only] checking ffff880004c035a0
>[    2.398025] [drm:drm_atomic_commit] commiting ffff880004c035a0
>[    2.398026] [drm:drm_atomic_state_clear] Clearing atomic state ffff880004c035a0
>[    2.398028] [drm:drm_atomic_state_free] Freeing atomic state ffff880004c035a0
>[    2.398030] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880004c035a0
>[    2.398032] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff880148d69e40 state to ffff880004c035a0
>[    2.398033] [drm:drm_atomic_check_only] checking ffff880004c035a0
>[    2.398035] [drm:drm_atomic_commit] commiting ffff880004c035a0
>[    2.398036] [drm:drm_atomic_state_clear] Clearing atomic state ffff880004c035a0
>[    2.398038] [drm:drm_atomic_state_free] Freeing atomic state ffff880004c035a0
>[    2.398040] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880004c035a0
>[    2.398042] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff880148d69180 state to ffff880004c035a0
>[    2.398043] [drm:drm_atomic_check_only] checking ffff880004c035a0
>[    2.398045] [drm:drm_atomic_commit] commiting ffff880004c035a0
>[    2.398046] [drm:drm_atomic_state_clear] Clearing atomic state ffff880004c035a0
>[    2.398048] [drm:drm_atomic_state_free] Freeing atomic state ffff880004c035a0
>[    2.398050] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880004c035a0
>[    2.398052] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff880148d69c00 state to ffff880004c035a0
>[    2.398053] [drm:drm_atomic_check_only] checking ffff880004c035a0
>[    2.398054] [drm:drm_atomic_commit] commiting ffff880004c035a0
>[    2.398056] [drm:drm_atomic_state_clear] Clearing atomic state ffff880004c035a0
>[    2.398058] [drm:drm_atomic_state_free] Freeing atomic state ffff880004c035a0
>[    2.398060] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880004c035a0
>[    2.398062] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff880148d69540 state to ffff880004c035a0
>[    2.398063] [drm:drm_atomic_check_only] checking ffff880004c035a0
>[    2.398065] [drm:drm_atomic_commit] commiting ffff880004c035a0
>[    2.398066] [drm:drm_atomic_state_clear] Clearing atomic state ffff880004c035a0
>[    2.398068] [drm:drm_atomic_state_free] Freeing atomic state ffff880004c035a0
>[    2.398070] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880004c035a0
>[    2.398072] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff880148d69240 state to ffff880004c035a0
>[    2.398073] [drm:drm_atomic_check_only] checking ffff880004c035a0
>[    2.398075] [drm:drm_atomic_commit] commiting ffff880004c035a0
>[    2.398076] [drm:drm_atomic_state_clear] Clearing atomic state ffff880004c035a0
>[    2.398078] [drm:drm_atomic_state_free] Freeing atomic state ffff880004c035a0
>[    2.398080] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880004c035a0
>[    2.398082] [drm:drm_atomic_get_plane_state] Added [PLANE:31] ffff880148d69b40 state to ffff880004c035a0
>[    2.398083] [drm:drm_atomic_check_only] checking ffff880004c035a0
>[    2.398085] [drm:drm_atomic_commit] commiting ffff880004c035a0
>[    2.398087] [drm:drm_atomic_state_clear] Clearing atomic state ffff880004c035a0
>[    2.398088] [drm:drm_atomic_state_free] Freeing atomic state ffff880004c035a0
>[    2.398090] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880004c035a0
>[    2.398092] [drm:drm_atomic_get_plane_state] Added [PLANE:32] ffff880148d69a80 state to ffff880004c035a0
>[    2.398093] [drm:drm_atomic_check_only] checking ffff880004c035a0
>[    2.398095] [drm:drm_atomic_commit] commiting ffff880004c035a0
>[    2.398097] [drm:drm_atomic_state_clear] Clearing atomic state ffff880004c035a0
>[    2.398098] [drm:drm_atomic_state_free] Freeing atomic state ffff880004c035a0
>[    2.398102] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[    2.398106] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[    2.398110] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    2.398115] [drm:drm_mode_debug_printmodeline] Modeline 56:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    2.398117] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=1
>[    2.398120] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    2.398124] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    2.398127] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[    2.398132] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[    2.398133] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[    2.398136] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[    2.398138] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[    2.398142] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    2.398144] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    2.398145] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    2.398147] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    2.398149] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    2.398152] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[    2.398155] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    2.398157] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    2.398158] [drm:intel_dump_pipe_config] requested mode:
>[    2.398162] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    2.398163] [drm:intel_dump_pipe_config] adjusted mode:
>[    2.398167] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    2.398172] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[    2.398174] [drm:intel_dump_pipe_config] port clock: 540000
>[    2.398175] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    2.398178] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    2.398181] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    2.398182] [drm:intel_dump_pipe_config] ips: 0
>[    2.398184] [drm:intel_dump_pipe_config] double wide: 0
>[    2.398210] [drm:intel_edp_backlight_off] 
>[    2.551455] usb 1-7: new full-speed USB device number 3 using xhci_hcd
>[    2.599348] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[    2.609525] [drm:edp_panel_off] Turn eDP port A panel power off
>[    2.609549] [drm:wait_panel_off] Wait for panel power off time
>[    2.609567] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[    2.664432] [drm:wait_panel_status] Wait complete
>[    2.664455] [drm:intel_display_power_put] disabling DDI D power well
>[    2.664459] [drm:skl_set_power_well] Disabling DDI D power well
>[    2.664460] [drm:intel_display_power_put] disabling DDI C power well
>[    2.664463] [drm:skl_set_power_well] Disabling DDI C power well
>[    2.664464] [drm:intel_display_power_put] disabling DDI B power well
>[    2.664466] [drm:skl_set_power_well] Disabling DDI B power well
>[    2.664467] [drm:intel_display_power_put] disabling power well 2
>[    2.664470] [drm:skl_set_power_well] Disabling power well 2
>[    2.664471] [drm:intel_display_power_put] disabling always-on
>[    2.664477] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880148d64960
>[    2.664483] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88009bbc9c00 state to ffff880148d64960
>[    2.664486] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88009b915400 state to ffff880148d64960
>[    2.664488] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88009bbc9c00 to [CRTC:20]
>[    2.664490] [drm:drm_atomic_set_fb_for_plane] Set [FB:57] for plane state ffff88009bbc9c00
>[    2.664492] [drm:drm_atomic_check_only] checking ffff880148d64960
>[    2.664498] [drm:drm_atomic_commit] commiting ffff880148d64960
>[    2.664511] [drm:drm_atomic_state_clear] Clearing atomic state ffff880148d64960
>[    2.664514] [drm:drm_atomic_state_free] Freeing atomic state ffff880148d64960
>[    2.664530] [drm:edp_panel_on] Turn eDP port A panel power on
>[    2.664538] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[    2.718709] usb 1-7: New USB device found, idVendor=ffff, idProduct=0a5a
>[    2.718713] usb 1-7: New USB device strings: Mfr=1, Product=2, SerialNumber=3
>[    2.718716] usb 1-7: Product: Intel(R) Wilkins Peak 2x2
>[    2.718718] usb 1-7: Manufacturer: Intel(R) Corporation
>[    2.718720] usb 1-7: SerialNumber: 001122334455 WP_A0 
>[    2.784289] tsc: Refined TSC clocksource calibration: 1008.000 MHz
>[    2.788429] usb 1-5.4: new high-speed USB device number 4 using xhci_hcd
>[    2.832548] input: ImPS/2 Logitech Wheel Mouse as /devices/platform/i8042/serio1/input/input2
>[    2.896275] usb 1-5.4: New USB device found, idVendor=0b95, idProduct=772a
>[    2.896279] usb 1-5.4: New USB device strings: Mfr=1, Product=2, SerialNumber=3
>[    2.896281] usb 1-5.4: Product: AX88x72A
>[    2.896284] usb 1-5.4: Manufacturer: ASIX Elec. Corp.
>[    2.896286] usb 1-5.4: SerialNumber: 000CD6
>[    3.210452] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[    3.210461] [drm:wait_panel_status] Wait complete
>[    3.210484] [drm:wait_panel_on] Wait for panel power on
>[    3.210500] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[    3.419524] [drm:wait_panel_status] Wait complete
>[    3.419542] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[    3.419590] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[    3.420731] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[    3.421406] [drm:intel_dp_set_signal_levels] Using signal levels 04000000
>[    3.422065] [drm:intel_dp_start_link_train] clock recovery OK
>[    3.423035] [drm:intel_dp_set_signal_levels] Using signal levels 05000000
>[    3.423996] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[    3.424295] [drm:skl_wm_flush_pipe] flush pipe A (pass 3)
>[    3.424310] [drm:intel_edp_backlight_on] 
>[    3.424313] [drm:intel_panel_enable_backlight] pipe A
>[    3.424360] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[    3.424573] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[    3.424582] [drm:skylake_update_primary_plane] Writing base 016C0000 0,0,3200,1800 pitch=12800
>[    3.424591] [drm:intel_fbc_update] disabled per chip default
>[    3.424608] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[    3.424613] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[    3.424616] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[    3.424617] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[    3.424619] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[    3.424620] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[    3.424621] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[    3.424623] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[    3.424624] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[    3.424625] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[    3.424627] [drm:check_crtc_state] [CRTC:20]
>[    3.424642] [drm:check_crtc_state] [CRTC:25]
>[    3.424644] [drm:check_crtc_state] [CRTC:30]
>[    3.424645] [drm:check_shared_dpll_state] DPLL 1
>[    3.424648] [drm:check_shared_dpll_state] DPLL 2
>[    3.424649] [drm:check_shared_dpll_state] DPLL 3
>[    3.424679] [drm:intel_crtc_set_config] [CRTC:25] [NOFB]
>[    3.424683] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0
>[    3.424685] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    3.424690] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    3.424692] [drm:intel_crtc_set_config] [CRTC:30] [NOFB]
>[    3.424695] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=0, fb_changed=0
>[    3.424697] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    3.424699] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    3.424703] [drm:drm_fb_helper_hotplug_event] 
>[    3.424706] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[    3.424707] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[    3.425054] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[    3.425400] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[    3.425417] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    3.425422] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[    3.425427] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    3.425430] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[    3.425432] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[    3.425434] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[    3.425436] [drm:intel_display_power_get] enabling power well 2
>[    3.425438] [drm:skl_set_power_well] Enabling power well 2
>[    3.425441] [drm:intel_display_power_get] enabling DDI B power well
>[    3.425443] [drm:skl_set_power_well] Enabling DDI B power well
>[    3.425451] [drm:intel_display_power_put] disabling DDI B power well
>[    3.425454] [drm:skl_set_power_well] Disabling DDI B power well
>[    3.425455] [drm:intel_display_power_put] disabling power well 2
>[    3.425458] [drm:skl_set_power_well] Disabling power well 2
>[    3.425460] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[    3.425462] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[    3.425464] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[    3.425465] [drm:intel_display_power_get] enabling power well 2
>[    3.425467] [drm:skl_set_power_well] Enabling power well 2
>[    3.425469] [drm:intel_display_power_get] enabling DDI B power well
>[    3.425471] [drm:skl_set_power_well] Enabling DDI B power well
>[    3.425719] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[    3.425721] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[    3.425722] [drm:intel_display_power_put] disabling DDI B power well
>[    3.425725] [drm:skl_set_power_well] Disabling DDI B power well
>[    3.425726] [drm:intel_display_power_put] disabling power well 2
>[    3.425729] [drm:skl_set_power_well] Disabling power well 2
>[    3.425730] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[    3.425732] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[    3.425733] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[    3.425735] [drm:intel_display_power_get] enabling power well 2
>[    3.425737] [drm:skl_set_power_well] Enabling power well 2
>[    3.425739] [drm:intel_display_power_get] enabling DDI C power well
>[    3.425741] [drm:skl_set_power_well] Enabling DDI C power well
>[    3.425749] [drm:intel_display_power_put] disabling DDI C power well
>[    3.425752] [drm:skl_set_power_well] Disabling DDI C power well
>[    3.425753] [drm:intel_display_power_put] disabling power well 2
>[    3.425756] [drm:skl_set_power_well] Disabling power well 2
>[    3.425757] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[    3.425759] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[    3.425760] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[    3.425762] [drm:intel_display_power_get] enabling power well 2
>[    3.425764] [drm:skl_set_power_well] Enabling power well 2
>[    3.425765] [drm:intel_display_power_get] enabling DDI C power well
>[    3.425768] [drm:skl_set_power_well] Enabling DDI C power well
>[    3.426012] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[    3.426013] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[    3.426015] [drm:intel_display_power_put] disabling DDI C power well
>[    3.426017] [drm:skl_set_power_well] Disabling DDI C power well
>[    3.426018] [drm:intel_display_power_put] disabling power well 2
>[    3.426021] [drm:skl_set_power_well] Disabling power well 2
>[    3.426023] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[    3.426027] [drm:drm_setup_crtcs] 
>[    3.426029] [drm:drm_enable_connectors] connector 34 enabled? yes
>[    3.426030] [drm:drm_enable_connectors] connector 43 enabled? no
>[    3.426032] [drm:drm_enable_connectors] connector 47 enabled? no
>[    3.426033] [drm:drm_enable_connectors] connector 50 enabled? no
>[    3.426034] [drm:drm_enable_connectors] connector 54 enabled? no
>[    3.426037] [drm:intel_fb_initial_config] looking for cmdline mode on connector eDP-1
>[    3.426039] [drm:intel_fb_initial_config] looking for preferred mode on connector eDP-1 0
>[    3.426042] [drm:intel_fb_initial_config] connector eDP-1 on pipe A [CRTC:20]: 3200x1800
>[    3.426043] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping
>[    3.426045] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping
>[    3.426046] [drm:intel_fb_initial_config] connector DP-2 not enabled, skipping
>[    3.426047] [drm:intel_fb_initial_config] connector HDMI-A-2 not enabled, skipping
>[    3.426050] [drm:drm_setup_crtcs] desired mode 3200x1800 set on crtc 20 (0,0)
>[    3.426057] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88014697d120
>[    3.426061] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880004ac5a80 state to ffff88014697d120
>[    3.426064] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004b31c00 state to ffff88014697d120
>[    3.426066] [drm:drm_atomic_check_only] checking ffff88014697d120
>[    3.426071] [drm:drm_atomic_commit] commiting ffff88014697d120
>[    3.426094] [drm:skylake_update_primary_plane] Writing base 016C0000 0,0,3200,1800 pitch=12800
>[    3.426103] [drm:drm_atomic_state_clear] Clearing atomic state ffff88014697d120
>[    3.426106] [drm:drm_atomic_state_free] Freeing atomic state ffff88014697d120
>[    3.426110] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88014697d120
>[    3.426113] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff880004ac5b40 state to ffff88014697d120
>[    3.426115] [drm:drm_atomic_check_only] checking ffff88014697d120
>[    3.426117] [drm:drm_atomic_commit] commiting ffff88014697d120
>[    3.426120] [drm:drm_atomic_state_clear] Clearing atomic state ffff88014697d120
>[    3.426121] [drm:drm_atomic_state_free] Freeing atomic state ffff88014697d120
>[    3.426124] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88014697d120
>[    3.426126] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff880004ac5c00 state to ffff88014697d120
>[    3.426127] [drm:drm_atomic_check_only] checking ffff88014697d120
>[    3.426129] [drm:drm_atomic_commit] commiting ffff88014697d120
>[    3.426131] [drm:drm_atomic_state_clear] Clearing atomic state ffff88014697d120
>[    3.426132] [drm:drm_atomic_state_free] Freeing atomic state ffff88014697d120
>[    3.426135] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88014697d120
>[    3.426137] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880004ac5cc0 state to ffff88014697d120
>[    3.426138] [drm:drm_atomic_check_only] checking ffff88014697d120
>[    3.426140] [drm:drm_atomic_commit] commiting ffff88014697d120
>[    3.426142] [drm:drm_atomic_state_clear] Clearing atomic state ffff88014697d120
>[    3.426143] [drm:drm_atomic_state_free] Freeing atomic state ffff88014697d120
>[    3.426145] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88014697d120
>[    3.426147] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff880004ac5d80 state to ffff88014697d120
>[    3.426148] [drm:drm_atomic_check_only] checking ffff88014697d120
>[    3.426150] [drm:drm_atomic_commit] commiting ffff88014697d120
>[    3.426152] [drm:drm_atomic_state_clear] Clearing atomic state ffff88014697d120
>[    3.426154] [drm:drm_atomic_state_free] Freeing atomic state ffff88014697d120
>[    3.426156] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88014697d120
>[    3.426158] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff880004ac5e40 state to ffff88014697d120
>[    3.426159] [drm:drm_atomic_check_only] checking ffff88014697d120
>[    3.426160] [drm:drm_atomic_commit] commiting ffff88014697d120
>[    3.426162] [drm:drm_atomic_state_clear] Clearing atomic state ffff88014697d120
>[    3.426164] [drm:drm_atomic_state_free] Freeing atomic state ffff88014697d120
>[    3.426166] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88014697d120
>[    3.426168] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff880004ac5f00 state to ffff88014697d120
>[    3.426169] [drm:drm_atomic_check_only] checking ffff88014697d120
>[    3.426171] [drm:drm_atomic_commit] commiting ffff88014697d120
>[    3.426172] [drm:drm_atomic_state_clear] Clearing atomic state ffff88014697d120
>[    3.426174] [drm:drm_atomic_state_free] Freeing atomic state ffff88014697d120
>[    3.426176] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88014697d120
>[    3.426184] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff880004ade000 state to ffff88014697d120
>[    3.426186] [drm:drm_atomic_check_only] checking ffff88014697d120
>[    3.426187] [drm:drm_atomic_commit] commiting ffff88014697d120
>[    3.426189] [drm:drm_atomic_state_clear] Clearing atomic state ffff88014697d120
>[    3.426190] [drm:drm_atomic_state_free] Freeing atomic state ffff88014697d120
>[    3.426193] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88014697d120
>[    3.426195] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff880004ade0c0 state to ffff88014697d120
>[    3.426196] [drm:drm_atomic_check_only] checking ffff88014697d120
>[    3.426197] [drm:drm_atomic_commit] commiting ffff88014697d120
>[    3.426199] [drm:drm_atomic_state_clear] Clearing atomic state ffff88014697d120
>[    3.426201] [drm:drm_atomic_state_free] Freeing atomic state ffff88014697d120
>[    3.426203] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88014697d120
>[    3.426205] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff880004ade180 state to ffff88014697d120
>[    3.426206] [drm:drm_atomic_check_only] checking ffff88014697d120
>[    3.426207] [drm:drm_atomic_commit] commiting ffff88014697d120
>[    3.426209] [drm:drm_atomic_state_clear] Clearing atomic state ffff88014697d120
>[    3.426211] [drm:drm_atomic_state_free] Freeing atomic state ffff88014697d120
>[    3.426213] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88014697d120
>[    3.426215] [drm:drm_atomic_get_plane_state] Added [PLANE:31] ffff880004ade240 state to ffff88014697d120
>[    3.426216] [drm:drm_atomic_check_only] checking ffff88014697d120
>[    3.426218] [drm:drm_atomic_commit] commiting ffff88014697d120
>[    3.426219] [drm:drm_atomic_state_clear] Clearing atomic state ffff88014697d120
>[    3.426221] [drm:drm_atomic_state_free] Freeing atomic state ffff88014697d120
>[    3.426223] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88014697d120
>[    3.426225] [drm:drm_atomic_get_plane_state] Added [PLANE:32] ffff880004ade300 state to ffff88014697d120
>[    3.426226] [drm:drm_atomic_check_only] checking ffff88014697d120
>[    3.426227] [drm:drm_atomic_commit] commiting ffff88014697d120
>[    3.426229] [drm:drm_atomic_state_clear] Clearing atomic state ffff88014697d120
>[    3.426231] [drm:drm_atomic_state_free] Freeing atomic state ffff88014697d120
>[    3.426234] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[    3.426237] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    3.426240] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    3.426243] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    3.426245] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[    3.426249] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[    3.426250] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[    3.426253] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[    3.426255] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[    3.426258] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    3.426260] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    3.426261] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    3.426262] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    3.426265] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    3.426268] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[    3.426270] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    3.426272] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    3.426273] [drm:intel_dump_pipe_config] requested mode:
>[    3.426277] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    3.426278] [drm:intel_dump_pipe_config] adjusted mode:
>[    3.426281] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    3.426285] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[    3.426286] [drm:intel_dump_pipe_config] port clock: 540000
>[    3.426288] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    3.426290] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    3.426292] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    3.426293] [drm:intel_dump_pipe_config] ips: 0
>[    3.426295] [drm:intel_dump_pipe_config] double wide: 0
>[    3.426296] [drm:intel_crtc_set_config] [CRTC:25] [NOFB]
>[    3.426299] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0
>[    3.426301] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    3.426303] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    3.426305] [drm:intel_crtc_set_config] [CRTC:30] [NOFB]
>[    3.426307] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=0, fb_changed=0
>[    3.426309] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    3.426311] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    3.426333] Console: switching to colour frame buffer device 400x112
>[    3.426345] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[    3.426347] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    3.426349] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    3.426352] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    3.426354] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[    3.426356] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[    3.426358] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[    3.426360] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[    3.426361] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[    3.426363] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    3.426365] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    3.426366] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    3.426368] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    3.426370] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    3.426373] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[    3.426375] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    3.426377] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    3.426378] [drm:intel_dump_pipe_config] requested mode:
>[    3.426381] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    3.426382] [drm:intel_dump_pipe_config] adjusted mode:
>[    3.426386] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    3.426389] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[    3.426390] [drm:intel_dump_pipe_config] port clock: 540000
>[    3.426391] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    3.426393] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    3.426395] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    3.426396] [drm:intel_dump_pipe_config] ips: 0
>[    3.426397] [drm:intel_dump_pipe_config] double wide: 0
>[    3.459178] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device
>[    3.459234] i915 0000:00:02.0: registered panic notifier
>[    3.663373] asix 1-5.4:1.0 eth0: register 'asix' at usb-0000:00:14.0-5.4, ASIX AX88772 USB 2.0 Ethernet, 8c:ae:4c:fd:b1:57
>[    3.682137] dracut: Starting plymouth daemon
>[    3.695826] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[    3.695832] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    3.695835] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    3.695839] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    3.695842] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[    3.695848] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[    3.695850] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[    3.695852] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[    3.695854] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[    3.695858] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    3.695860] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    3.695861] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    3.695863] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    3.695865] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    3.695868] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[    3.695870] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    3.695872] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    3.695873] [drm:intel_dump_pipe_config] requested mode:
>[    3.695878] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    3.695879] [drm:intel_dump_pipe_config] adjusted mode:
>[    3.695882] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    3.695886] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[    3.695887] [drm:intel_dump_pipe_config] port clock: 540000
>[    3.695889] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    3.695891] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    3.695893] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    3.695894] [drm:intel_dump_pipe_config] ips: 0
>[    3.695895] [drm:intel_dump_pipe_config] double wide: 0
>[    3.720698] [drm] RC6 on
>[    3.740090] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[    3.740097] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    3.740101] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    3.740108] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    3.740115] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[    3.740120] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[    3.740122] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[    3.740124] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[    3.740126] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[    3.740129] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    3.740131] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    3.740133] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    3.740134] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    3.740137] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    3.740140] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[    3.740142] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    3.740144] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    3.740145] [drm:intel_dump_pipe_config] requested mode:
>[    3.740149] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    3.740151] [drm:intel_dump_pipe_config] adjusted mode:
>[    3.740154] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    3.740158] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[    3.740159] [drm:intel_dump_pipe_config] port clock: 540000
>[    3.740161] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    3.740163] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    3.740165] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    3.740166] [drm:intel_dump_pipe_config] ips: 0
>[    3.740167] [drm:intel_dump_pipe_config] double wide: 0
>[    3.784472] Switched to clocksource tsc
>[    3.915904] ACPI: Deprecated procfs I/F for AC is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared
>[    3.916189] ACPI: AC Adapter [ADP1] (off-line)
>[    3.999771] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared
>[    3.999925] ACPI: Battery Slot [BAT0] (battery present)
>[    4.000195] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared
>[    4.000306] ACPI: Battery Slot [BAT1] (battery absent)
>[    4.000607] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared
>[    4.000757] ACPI: Battery Slot [BAT2] (battery absent)
>[    4.011700] wmi: Mapper loaded
>[    4.021240] i801_smbus 0000:00:1f.4: enabling device (0000 -> 0003)
>[    4.021608] ACPI Warning: SystemIO range 0x000000000000efa0-0x000000000000efbf conflicts with OpRegion 0x000000000000efa0-0x000000000000efaf (\_SB_.PCI0.SBUS.SMBI) (20141107/utaddress-258)
>[    4.021868] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
>[    4.023479] input: PC Speaker as /devices/platform/pcspkr/input/input8
>[    4.032256] snd_hda_intel 0000:00:1f.3: enabling device (0000 -> 0002)
>[    4.048150] sound hdaudioC0D0: autoconfig for ALC286: line_outs=1 (0x14/0x0/0x0/0x0/0x0) type:speaker
>[    4.048292] sound hdaudioC0D0:    speaker_outs=0 (0x0/0x0/0x0/0x0/0x0)
>[    4.048393] sound hdaudioC0D0:    hp_outs=1 (0x21/0x0/0x0/0x0/0x0)
>[    4.048493] sound hdaudioC0D0:    mono: mono_out=0x0
>[    4.048570] sound hdaudioC0D0:    inputs:
>[    4.048634] sound hdaudioC0D0:      Mic=0x18
>[    4.048702] sound hdaudioC0D0:      Internal Mic=0x12
>[    4.048777] sound hdaudioC0D0:      Line=0x1a
>[    4.055695] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[    4.055702] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    4.055706] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    4.055711] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    4.055715] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[    4.055721] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[    4.055723] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[    4.055727] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[    4.055730] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[    4.055734] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    4.055737] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    4.055739] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    4.055741] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    4.055745] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    4.055749] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[    4.055752] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    4.055754] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    4.055755] [drm:intel_dump_pipe_config] requested mode:
>[    4.055762] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    4.055764] [drm:intel_dump_pipe_config] adjusted mode:
>[    4.055769] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    4.055775] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[    4.055777] [drm:intel_dump_pipe_config] port clock: 540000
>[    4.055779] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    4.055782] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    4.055784] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    4.055786] [drm:intel_dump_pipe_config] ips: 0
>[    4.055788] [drm:intel_dump_pipe_config] double wide: 0
>[    4.058680] ppdev: user-space parallel port driver
>[    4.122667] EXT4-fs (sda2): INFO: recovery required on readonly filesystem
>[    4.122741] EXT4-fs (sda2): write access will be enabled during recovery
>[    4.173942] EXT4-fs (sda2): recovery complete
>[    4.174213] EXT4-fs (sda2): mounted filesystem with ordered data mode. Opts: (null)
>[    4.208827] dracut: Checking ext4: /dev/disk/by-uuid/f53c75c6-eeb6-4aa4-98a8-51aeb7219d2a
>[    4.209168] dracut: issuing e2fsck -a  /dev/disk/by-uuid/f53c75c6-eeb6-4aa4-98a8-51aeb7219d2a
>[    4.236555] dracut: /dev/disk/by-uuid/f53c75c6-eeb6-4aa4-98a8-51aeb7219d2a: clean, 857342/13598720 files, 33707677/54366208 blocks
>[    4.237391] dracut: Remounting /dev/disk/by-uuid/f53c75c6-eeb6-4aa4-98a8-51aeb7219d2a with -o errors=remount-ro,ro
>[    4.248555] EXT4-fs (sda2): mounted filesystem with ordered data mode. Opts: errors=remount-ro
>[    4.253542] dracut: Mounted root filesystem /dev/sda2
>[    4.271675] device-mapper: uevent: version 1.0.3
>[    4.271927] device-mapper: ioctl: 4.29.0-ioctl (2014-10-28) initialised: dm-devel@redhat.com
>[    4.370205] dracut: Switching root
>[    4.486739] random: init urandom read with 113 bits of entropy available
>[    4.520071] init: plymouth-upstart-bridge main process (2982) terminated with status 1
>[    4.520215] init: plymouth-upstart-bridge main process ended, respawning
>[    4.526869] init: plymouth-upstart-bridge main process (2992) terminated with status 1
>[    4.526960] init: plymouth-upstart-bridge main process ended, respawning
>[    4.530233] init: plymouth-upstart-bridge main process (2994) terminated with status 1
>[    4.530333] init: plymouth-upstart-bridge main process ended, respawning
>[    4.534932] init: plymouth-upstart-bridge main process (2995) terminated with status 1
>[    4.535065] init: plymouth-upstart-bridge main process ended, respawning
>[    4.538216] init: plymouth-upstart-bridge main process (2997) terminated with status 1
>[    4.538313] init: plymouth-upstart-bridge main process ended, respawning
>[    4.542823] init: plymouth-upstart-bridge main process (2998) terminated with status 1
>[    4.542955] init: plymouth-upstart-bridge main process ended, respawning
>[    4.546113] init: plymouth-upstart-bridge main process (3000) terminated with status 1
>[    4.546199] init: plymouth-upstart-bridge main process ended, respawning
>[    4.551102] init: plymouth-upstart-bridge main process (3001) terminated with status 1
>[    4.551512] init: plymouth-upstart-bridge main process ended, respawning
>[    4.556167] init: plymouth-upstart-bridge main process (3003) terminated with status 1
>[    4.556270] init: plymouth-upstart-bridge main process ended, respawning
>[    4.561949] random: nonblocking pool is initialized
>[    4.562356] init: plymouth-upstart-bridge main process (3005) terminated with status 1
>[    4.562450] init: plymouth-upstart-bridge main process ended, respawning
>[    4.570030] init: ureadahead main process (2985) terminated with status 5
>[    4.918663] systemd-udevd[3118]: starting version 204
>[    5.392375] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[    5.392389] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    5.392393] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    5.392399] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    5.392403] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[    5.392410] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[    5.392412] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[    5.392415] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[    5.392417] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[    5.392421] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    5.392424] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    5.392426] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    5.392429] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    5.392433] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    5.392437] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[    5.392440] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    5.392442] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    5.392443] [drm:intel_dump_pipe_config] requested mode:
>[    5.392450] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    5.392451] [drm:intel_dump_pipe_config] adjusted mode:
>[    5.392456] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    5.392461] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[    5.392463] [drm:intel_dump_pipe_config] port clock: 540000
>[    5.392465] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    5.392468] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    5.392471] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    5.392472] [drm:intel_dump_pipe_config] ips: 0
>[    5.392474] [drm:intel_dump_pipe_config] double wide: 0
>[    5.399999] asix 1-5.4:1.0 eth5: renamed from eth0
>[    5.440928] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[    5.440934] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    5.440937] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    5.440941] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    5.440946] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[    5.440951] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[    5.440953] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[    5.440955] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[    5.440957] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[    5.440960] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    5.440963] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    5.440964] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    5.440965] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    5.440969] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    5.440971] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[    5.440974] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    5.440975] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    5.440977] [drm:intel_dump_pipe_config] requested mode:
>[    5.440981] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    5.440983] [drm:intel_dump_pipe_config] adjusted mode:
>[    5.440986] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    5.440990] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[    5.440991] [drm:intel_dump_pipe_config] port clock: 540000
>[    5.440992] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    5.440995] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    5.440997] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    5.440998] [drm:intel_dump_pipe_config] ips: 0
>[    5.440999] [drm:intel_dump_pipe_config] double wide: 0
>[    5.479519] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[    5.479526] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    5.479530] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    5.479535] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    5.479539] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[    5.479546] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[    5.479548] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[    5.479552] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[    5.479554] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[    5.479558] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    5.479561] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    5.479563] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    5.479565] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    5.479569] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    5.479573] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[    5.479629] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    5.479632] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    5.479633] [drm:intel_dump_pipe_config] requested mode:
>[    5.479639] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    5.479641] [drm:intel_dump_pipe_config] adjusted mode:
>[    5.479646] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    5.479651] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[    5.479653] [drm:intel_dump_pipe_config] port clock: 540000
>[    5.479655] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    5.479658] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    5.479660] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    5.479662] [drm:intel_dump_pipe_config] ips: 0
>[    5.479664] [drm:intel_dump_pipe_config] double wide: 0
>[    5.517762] systemd-udevd[3844]: renamed network interface eth0 to eth5
>[    5.530535] Adding 16440316k swap on /dev/sda3.  Priority:-1 extents:1 across:16440316k SS
>[    5.647999] EXT4-fs (sda2): re-mounted. Opts: errors=remount-ro
>[    5.651940] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[    5.651948] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    5.651952] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    5.651957] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    5.651961] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[    5.651967] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[    5.651969] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[    5.651973] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[    5.651976] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[    5.651980] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    5.651983] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    5.651985] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    5.651987] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    5.651991] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    5.651995] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[    5.651998] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    5.652001] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    5.652002] [drm:intel_dump_pipe_config] requested mode:
>[    5.652009] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    5.652010] [drm:intel_dump_pipe_config] adjusted mode:
>[    5.652016] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    5.652021] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[    5.652023] [drm:intel_dump_pipe_config] port clock: 540000
>[    5.652025] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    5.652028] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    5.652030] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    5.652032] [drm:intel_dump_pipe_config] ips: 0
>[    5.652033] [drm:intel_dump_pipe_config] double wide: 0
>[    5.989616] init: Failed to obtain startpar-bridge instance: Unknown parameter: INSTANCE
>[    6.258638] init: failsafe main process (4097) killed by TERM signal
>[    6.428723] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[    6.428769] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[    6.571346] init: bluetooth main process (4241) terminated with status 1
>[    6.571370] init: bluetooth main process ended, respawning
>[    6.890147] asix 1-5.4:1.0 eth5: link up, 100Mbps, full-duplex, lpa 0xC5E1
>[    6.968289] init: bluetooth main process (4332) terminated with status 1
>[    6.968313] init: bluetooth main process ended, respawning
>[    7.072793] asix 1-5.4:1.0 eth5: link up, 100Mbps, full-duplex, lpa 0xC5E1
>[    7.304073] init: bluetooth main process (4501) terminated with status 1
>[    7.304097] init: bluetooth main process ended, respawning
>[    7.389323] init: gdm main process (4435) killed by TERM signal
>[    7.444048] init: bluetooth main process (4556) terminated with status 1
>[    7.444072] init: bluetooth main process ended, respawning
>[    7.490032] init: bluetooth main process (4600) terminated with status 1
>[    7.490057] init: bluetooth main process ended, respawning
>[    7.554851] init: bluetooth main process (4639) terminated with status 1
>[    7.554877] init: bluetooth main process ended, respawning
>[    7.592905] init: bluetooth main process (4674) terminated with status 1
>[    7.592929] init: bluetooth main process ended, respawning
>[    7.666979] init: bluetooth main process (4709) terminated with status 1
>[    7.667016] init: bluetooth main process ended, respawning
>[    7.700308] init: bluetooth main process (4733) terminated with status 1
>[    7.700326] init: bluetooth main process ended, respawning
>[    7.733018] init: bluetooth main process (4757) terminated with status 1
>[    7.733043] init: bluetooth main process ended, respawning
>[    7.764968] init: bluetooth main process (4781) terminated with status 1
>[    7.764992] init: bluetooth respawning too fast, stopped
>[  206.690436] kms_psr_sink_crc: executing
>[  206.690605] [drm:i915_gem_open] 
>[  206.693162] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[  206.693168] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[  206.694135] [drm:i915_gem_open] 
>[  206.696708] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[  206.696711] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[  206.696936] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  206.696949] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  206.697461] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  206.697465] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  206.697471] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  206.697475] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  206.697478] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  206.697493] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  206.697540] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[  206.697914] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  206.698259] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  206.698280] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  206.698287] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  206.698294] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  206.698300] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  206.698309] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  206.698338] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  206.698343] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  206.698347] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  206.698354] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  206.698359] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  206.698363] [drm:intel_display_power_get] enabling power well 2
>[  206.698367] [drm:skl_set_power_well] Enabling power well 2
>[  206.698370] [drm:intel_display_power_get] enabling DDI B power well
>[  206.698374] [drm:skl_set_power_well] Enabling DDI B power well
>[  206.698384] [drm:intel_display_power_put] disabling DDI B power well
>[  206.698387] [drm:skl_set_power_well] Disabling DDI B power well
>[  206.698390] [drm:intel_display_power_put] disabling power well 2
>[  206.698394] [drm:skl_set_power_well] Disabling power well 2
>[  206.698397] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  206.698401] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  206.698404] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  206.698406] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  206.698409] [drm:intel_display_power_get] enabling power well 2
>[  206.698412] [drm:skl_set_power_well] Enabling power well 2
>[  206.698415] [drm:intel_display_power_get] enabling DDI B power well
>[  206.698418] [drm:skl_set_power_well] Enabling DDI B power well
>[  206.698427] [drm:intel_display_power_put] disabling DDI B power well
>[  206.698431] [drm:skl_set_power_well] Disabling DDI B power well
>[  206.698433] [drm:intel_display_power_put] disabling power well 2
>[  206.698437] [drm:skl_set_power_well] Disabling power well 2
>[  206.698440] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  206.698447] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  206.698452] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  206.698456] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  206.698459] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  206.698462] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  206.698465] [drm:intel_display_power_get] enabling power well 2
>[  206.698468] [drm:skl_set_power_well] Enabling power well 2
>[  206.698471] [drm:intel_display_power_get] enabling DDI B power well
>[  206.698474] [drm:skl_set_power_well] Enabling DDI B power well
>[  206.698721] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  206.698724] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  206.698736] [drm:intel_display_power_put] disabling DDI B power well
>[  206.698740] [drm:skl_set_power_well] Disabling DDI B power well
>[  206.698749] [drm:intel_display_power_put] disabling power well 2
>[  206.698760] [drm:skl_set_power_well] Disabling power well 2
>[  206.698771] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  206.698782] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  206.698792] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  206.698802] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  206.698812] [drm:intel_display_power_get] enabling power well 2
>[  206.698821] [drm:skl_set_power_well] Enabling power well 2
>[  206.698831] [drm:intel_display_power_get] enabling DDI B power well
>[  206.698841] [drm:skl_set_power_well] Enabling DDI B power well
>[  206.699096] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  206.699101] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  206.699105] [drm:intel_display_power_put] disabling DDI B power well
>[  206.699111] [drm:skl_set_power_well] Disabling DDI B power well
>[  206.699115] [drm:intel_display_power_put] disabling power well 2
>[  206.699119] [drm:skl_set_power_well] Disabling power well 2
>[  206.699124] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  206.699135] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  206.699142] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  206.699148] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  206.699152] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  206.699156] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  206.699160] [drm:intel_display_power_get] enabling power well 2
>[  206.699164] [drm:skl_set_power_well] Enabling power well 2
>[  206.699168] [drm:intel_display_power_get] enabling DDI C power well
>[  206.699171] [drm:skl_set_power_well] Enabling DDI C power well
>[  206.699181] [drm:intel_display_power_put] disabling DDI C power well
>[  206.699185] [drm:skl_set_power_well] Disabling DDI C power well
>[  206.699187] [drm:intel_display_power_put] disabling power well 2
>[  206.699191] [drm:skl_set_power_well] Disabling power well 2
>[  206.699193] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  206.699197] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  206.699200] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  206.699203] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  206.699205] [drm:intel_display_power_get] enabling power well 2
>[  206.699208] [drm:skl_set_power_well] Enabling power well 2
>[  206.699211] [drm:intel_display_power_get] enabling DDI C power well
>[  206.699214] [drm:skl_set_power_well] Enabling DDI C power well
>[  206.699224] [drm:intel_display_power_put] disabling DDI C power well
>[  206.699227] [drm:skl_set_power_well] Disabling DDI C power well
>[  206.699230] [drm:intel_display_power_put] disabling power well 2
>[  206.699233] [drm:skl_set_power_well] Disabling power well 2
>[  206.699236] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  206.699242] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  206.699246] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  206.699250] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  206.699253] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  206.699255] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  206.699258] [drm:intel_display_power_get] enabling power well 2
>[  206.699261] [drm:skl_set_power_well] Enabling power well 2
>[  206.699264] [drm:intel_display_power_get] enabling DDI C power well
>[  206.699267] [drm:skl_set_power_well] Enabling DDI C power well
>[  206.699512] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  206.699515] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  206.699517] [drm:intel_display_power_put] disabling DDI C power well
>[  206.699521] [drm:skl_set_power_well] Disabling DDI C power well
>[  206.699523] [drm:intel_display_power_put] disabling power well 2
>[  206.699527] [drm:skl_set_power_well] Disabling power well 2
>[  206.699530] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  206.699534] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  206.699536] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  206.699539] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  206.699541] [drm:intel_display_power_get] enabling power well 2
>[  206.699545] [drm:skl_set_power_well] Enabling power well 2
>[  206.699548] [drm:intel_display_power_get] enabling DDI C power well
>[  206.699551] [drm:skl_set_power_well] Enabling DDI C power well
>[  206.699803] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  206.699810] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  206.699813] [drm:intel_display_power_put] disabling DDI C power well
>[  206.699817] [drm:skl_set_power_well] Disabling DDI C power well
>[  206.699820] [drm:intel_display_power_put] disabling power well 2
>[  206.699825] [drm:skl_set_power_well] Disabling power well 2
>[  206.699829] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  206.699887] kms_psr_sink_crc: starting subtest primary_page_flip
>[  206.699939] [drm:add_framebuffer_internal] [FB:56]
>[  206.758706] [drm:add_framebuffer_internal] [FB:58]
>[  206.784773] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  206.784783] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  206.784790] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  206.784795] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  206.784799] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  206.785149] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  206.785480] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  206.785497] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  206.785504] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  206.785510] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  206.785515] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  206.785521] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  206.785538] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  206.785543] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  206.785548] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  206.785551] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  206.785554] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  206.785557] [drm:intel_display_power_get] enabling power well 2
>[  206.785561] [drm:skl_set_power_well] Enabling power well 2
>[  206.785564] [drm:intel_display_power_get] enabling DDI B power well
>[  206.785567] [drm:skl_set_power_well] Enabling DDI B power well
>[  206.785577] [drm:intel_display_power_put] disabling DDI B power well
>[  206.785581] [drm:skl_set_power_well] Disabling DDI B power well
>[  206.785584] [drm:intel_display_power_put] disabling power well 2
>[  206.785587] [drm:skl_set_power_well] Disabling power well 2
>[  206.785590] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  206.785594] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  206.785597] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  206.785600] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  206.785602] [drm:intel_display_power_get] enabling power well 2
>[  206.785605] [drm:skl_set_power_well] Enabling power well 2
>[  206.785608] [drm:intel_display_power_get] enabling DDI B power well
>[  206.785612] [drm:skl_set_power_well] Enabling DDI B power well
>[  206.785621] [drm:intel_display_power_put] disabling DDI B power well
>[  206.785625] [drm:skl_set_power_well] Disabling DDI B power well
>[  206.785627] [drm:intel_display_power_put] disabling power well 2
>[  206.785631] [drm:skl_set_power_well] Disabling power well 2
>[  206.785633] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  206.785640] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  206.785645] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  206.785648] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  206.785652] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  206.785655] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  206.785658] [drm:intel_display_power_get] enabling power well 2
>[  206.785661] [drm:skl_set_power_well] Enabling power well 2
>[  206.785664] [drm:intel_display_power_get] enabling DDI B power well
>[  206.785667] [drm:skl_set_power_well] Enabling DDI B power well
>[  206.785860] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  206.785868] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  206.785872] [drm:intel_display_power_put] disabling DDI B power well
>[  206.785876] [drm:skl_set_power_well] Disabling DDI B power well
>[  206.785879] [drm:intel_display_power_put] disabling power well 2
>[  206.785883] [drm:skl_set_power_well] Disabling power well 2
>[  206.785887] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  206.785896] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  206.785899] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  206.785902] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  206.785905] [drm:intel_display_power_get] enabling power well 2
>[  206.785909] [drm:skl_set_power_well] Enabling power well 2
>[  206.785912] [drm:intel_display_power_get] enabling DDI B power well
>[  206.785915] [drm:skl_set_power_well] Enabling DDI B power well
>[  206.786209] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  206.786216] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  206.786220] [drm:intel_display_power_put] disabling DDI B power well
>[  206.786225] [drm:skl_set_power_well] Disabling DDI B power well
>[  206.786227] [drm:intel_display_power_put] disabling power well 2
>[  206.786231] [drm:skl_set_power_well] Disabling power well 2
>[  206.786235] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  206.786249] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  206.786254] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  206.786259] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  206.786263] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  206.786265] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  206.786269] [drm:intel_display_power_get] enabling power well 2
>[  206.786272] [drm:skl_set_power_well] Enabling power well 2
>[  206.786276] [drm:intel_display_power_get] enabling DDI C power well
>[  206.786279] [drm:skl_set_power_well] Enabling DDI C power well
>[  206.786288] [drm:intel_display_power_put] disabling DDI C power well
>[  206.786292] [drm:skl_set_power_well] Disabling DDI C power well
>[  206.786294] [drm:intel_display_power_put] disabling power well 2
>[  206.786298] [drm:skl_set_power_well] Disabling power well 2
>[  206.786301] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  206.786304] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  206.786307] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  206.786310] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  206.786312] [drm:intel_display_power_get] enabling power well 2
>[  206.786315] [drm:skl_set_power_well] Enabling power well 2
>[  206.786319] [drm:intel_display_power_get] enabling DDI C power well
>[  206.786322] [drm:skl_set_power_well] Enabling DDI C power well
>[  206.786331] [drm:intel_display_power_put] disabling DDI C power well
>[  206.786335] [drm:skl_set_power_well] Disabling DDI C power well
>[  206.786337] [drm:intel_display_power_put] disabling power well 2
>[  206.786341] [drm:skl_set_power_well] Disabling power well 2
>[  206.786344] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  206.786349] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  206.786354] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  206.786358] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  206.786361] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  206.786364] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  206.786366] [drm:intel_display_power_get] enabling power well 2
>[  206.786370] [drm:skl_set_power_well] Enabling power well 2
>[  206.786373] [drm:intel_display_power_get] enabling DDI C power well
>[  206.786376] [drm:skl_set_power_well] Enabling DDI C power well
>[  206.786626] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  206.786629] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  206.786632] [drm:intel_display_power_put] disabling DDI C power well
>[  206.786635] [drm:skl_set_power_well] Disabling DDI C power well
>[  206.786638] [drm:intel_display_power_put] disabling power well 2
>[  206.786641] [drm:skl_set_power_well] Disabling power well 2
>[  206.786644] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  206.786648] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  206.786651] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  206.786653] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  206.786656] [drm:intel_display_power_get] enabling power well 2
>[  206.786659] [drm:skl_set_power_well] Enabling power well 2
>[  206.786662] [drm:intel_display_power_get] enabling DDI C power well
>[  206.786665] [drm:skl_set_power_well] Enabling DDI C power well
>[  206.786865] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  206.786873] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  206.786879] [drm:intel_display_power_put] disabling DDI C power well
>[  206.786884] [drm:skl_set_power_well] Disabling DDI C power well
>[  206.786888] [drm:intel_display_power_put] disabling power well 2
>[  206.786892] [drm:skl_set_power_well] Disabling power well 2
>[  206.786898] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  206.786925] [drm:drm_mode_setcrtc] [CRTC:20]
>[  206.786930] [drm:intel_crtc_set_config] [CRTC:20] [NOFB]
>[  206.786938] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  206.786943] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [NOCRTC]
>[  206.786946] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  206.786951] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  206.786956] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  206.786962] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[  206.786979] [drm:intel_edp_backlight_off] 
>[  206.987976] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  207.002081] [drm:edp_panel_off] Turn eDP port A panel power off
>[  207.002109] [drm:wait_panel_off] Wait for panel power off time
>[  207.002129] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  207.056973] [drm:wait_panel_status] Wait complete
>[  207.057007] [drm:intel_fbc_update] no output, disabling
>[  207.057015] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801459591e0
>[  207.057023] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880148d69cc0 state to ffff8801459591e0
>[  207.057028] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004bae800 state to ffff8801459591e0
>[  207.057031] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880148d69cc0 to [NOCRTC]
>[  207.057034] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880148d69cc0
>[  207.057037] [drm:drm_atomic_check_only] checking ffff8801459591e0
>[  207.057043] [drm:drm_atomic_commit] commiting ffff8801459591e0
>[  207.057055] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801459591e0
>[  207.057059] [drm:drm_atomic_state_free] Freeing atomic state ffff8801459591e0
>[  207.057068] [drm:intel_display_power_put] disabling DDI A/E power well
>[  207.057072] [drm:skl_set_power_well] Disabling DDI A/E power well
>[  207.057075] [drm:intel_display_power_put] disabling MISC IO power well
>[  207.057079] [drm:skl_set_power_well] Disabling MISC IO power well
>[  207.057081] [drm:intel_display_power_put] disabling power well 1
>[  207.057086] [drm:skl_set_power_well] Disabling power well 1
>[  207.057118] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  207.057121] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  207.057124] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  207.057127] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  207.057129] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  207.057132] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  207.057135] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  207.057137] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  207.057140] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  207.057143] [drm:check_crtc_state] [CRTC:20]
>[  207.057146] [drm:check_crtc_state] [CRTC:25]
>[  207.057148] [drm:check_crtc_state] [CRTC:30]
>[  207.057151] [drm:check_shared_dpll_state] DPLL 1
>[  207.057154] [drm:check_shared_dpll_state] DPLL 2
>[  207.057157] [drm:check_shared_dpll_state] DPLL 3
>[  207.057198] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  207.057205] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  207.057210] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  207.057215] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  207.057218] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  207.057221] [drm:intel_display_power_get] enabling power well 1
>[  207.057228] [drm:skl_set_power_well] Enabling power well 1
>[  207.057231] [drm:intel_display_power_get] enabling MISC IO power well
>[  207.057234] [drm:skl_set_power_well] Enabling MISC IO power well
>[  207.057237] [drm:intel_display_power_get] enabling DDI A/E power well
>[  207.057241] [drm:skl_set_power_well] Enabling DDI A/E power well
>[  207.057254] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  207.057263] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  207.603076] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control abcd0000
>[  207.636045] [drm:wait_panel_status] Wait complete
>[  207.636090] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  207.636100] [drm:edp_panel_vdd_on] eDP port A panel power wasn't enabled
>[  207.837372] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  207.837726] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  207.837746] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  207.837754] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  207.837760] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  207.837765] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  207.837780] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  207.837803] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  207.837808] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  207.837813] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  207.837816] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  207.837818] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  207.837822] [drm:intel_display_power_get] enabling power well 2
>[  207.837826] [drm:skl_set_power_well] Enabling power well 2
>[  207.837829] [drm:intel_display_power_get] enabling DDI B power well
>[  207.837833] [drm:skl_set_power_well] Enabling DDI B power well
>[  207.837843] [drm:intel_display_power_put] disabling DDI B power well
>[  207.837847] [drm:skl_set_power_well] Disabling DDI B power well
>[  207.837849] [drm:intel_display_power_put] disabling power well 2
>[  207.837853] [drm:skl_set_power_well] Disabling power well 2
>[  207.837856] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  207.837860] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  207.837863] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  207.837865] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  207.837867] [drm:intel_display_power_get] enabling power well 2
>[  207.837881] [drm:skl_set_power_well] Enabling power well 2
>[  207.837884] [drm:intel_display_power_get] enabling DDI B power well
>[  207.837887] [drm:skl_set_power_well] Enabling DDI B power well
>[  207.837897] [drm:intel_display_power_put] disabling DDI B power well
>[  207.837901] [drm:skl_set_power_well] Disabling DDI B power well
>[  207.837903] [drm:intel_display_power_put] disabling power well 2
>[  207.837907] [drm:skl_set_power_well] Disabling power well 2
>[  207.837909] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  207.837916] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  207.837922] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  207.837926] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  207.837929] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  207.837943] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  207.837953] [drm:intel_display_power_get] enabling power well 2
>[  207.837963] [drm:skl_set_power_well] Enabling power well 2
>[  207.837973] [drm:intel_display_power_get] enabling DDI B power well
>[  207.837983] [drm:skl_set_power_well] Enabling DDI B power well
>[  207.838253] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  207.838262] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  207.838268] [drm:intel_display_power_put] disabling DDI B power well
>[  207.838273] [drm:skl_set_power_well] Disabling DDI B power well
>[  207.838277] [drm:intel_display_power_put] disabling power well 2
>[  207.838282] [drm:skl_set_power_well] Disabling power well 2
>[  207.838287] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  207.838298] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  207.838303] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  207.838307] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  207.838312] [drm:intel_display_power_get] enabling power well 2
>[  207.838317] [drm:skl_set_power_well] Enabling power well 2
>[  207.838322] [drm:intel_display_power_get] enabling DDI B power well
>[  207.838326] [drm:skl_set_power_well] Enabling DDI B power well
>[  207.838664] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  207.838671] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  207.838675] [drm:intel_display_power_put] disabling DDI B power well
>[  207.838679] [drm:skl_set_power_well] Disabling DDI B power well
>[  207.838682] [drm:intel_display_power_put] disabling power well 2
>[  207.838686] [drm:skl_set_power_well] Disabling power well 2
>[  207.838690] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  207.838703] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  207.838708] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  207.838713] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  207.838717] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  207.838720] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  207.838723] [drm:intel_display_power_get] enabling power well 2
>[  207.838726] [drm:skl_set_power_well] Enabling power well 2
>[  207.838730] [drm:intel_display_power_get] enabling DDI C power well
>[  207.838733] [drm:skl_set_power_well] Enabling DDI C power well
>[  207.838743] [drm:intel_display_power_put] disabling DDI C power well
>[  207.838747] [drm:skl_set_power_well] Disabling DDI C power well
>[  207.838749] [drm:intel_display_power_put] disabling power well 2
>[  207.838753] [drm:skl_set_power_well] Disabling power well 2
>[  207.838756] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  207.838760] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  207.838763] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  207.838765] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  207.838768] [drm:intel_display_power_get] enabling power well 2
>[  207.838771] [drm:skl_set_power_well] Enabling power well 2
>[  207.838774] [drm:intel_display_power_get] enabling DDI C power well
>[  207.838777] [drm:skl_set_power_well] Enabling DDI C power well
>[  207.838787] [drm:intel_display_power_put] disabling DDI C power well
>[  207.838791] [drm:skl_set_power_well] Disabling DDI C power well
>[  207.838793] [drm:intel_display_power_put] disabling power well 2
>[  207.838797] [drm:skl_set_power_well] Disabling power well 2
>[  207.838800] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  207.838806] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  207.838810] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  207.838814] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  207.838817] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  207.838820] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  207.838823] [drm:intel_display_power_get] enabling power well 2
>[  207.838826] [drm:skl_set_power_well] Enabling power well 2
>[  207.838829] [drm:intel_display_power_get] enabling DDI C power well
>[  207.838833] [drm:skl_set_power_well] Enabling DDI C power well
>[  207.839032] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  207.839039] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  207.839043] [drm:intel_display_power_put] disabling DDI C power well
>[  207.839052] [drm:cpt_irq_handler] Audio CP request interrupt
>[  207.839053] [drm:skl_set_power_well] Disabling DDI C power well
>[  207.839058] [drm:intel_display_power_put] disabling power well 2
>[  207.839061] [drm:skl_set_power_well] Disabling power well 2
>[  207.839066] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  207.839074] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  207.839079] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  207.839082] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  207.839086] [drm:intel_display_power_get] enabling power well 2
>[  207.839111] [drm:skl_set_power_well] Enabling power well 2
>[  207.839115] [drm:intel_display_power_get] enabling DDI C power well
>[  207.839120] [drm:skl_set_power_well] Enabling DDI C power well
>[  207.839418] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  207.839425] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  207.839429] [drm:intel_display_power_put] disabling DDI C power well
>[  207.839434] [drm:skl_set_power_well] Disabling DDI C power well
>[  207.839436] [drm:intel_display_power_put] disabling power well 2
>[  207.839440] [drm:skl_set_power_well] Disabling power well 2
>[  207.839444] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  207.839463] [drm:drm_mode_setcrtc] [CRTC:20]
>[  207.839469] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1]
>[  207.839474] [drm:intel_crtc_set_config] [CRTC:20] [FB:56] #connectors=1 (x y) (0 0)
>[  207.839480] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  207.839483] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  207.839486] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  207.839490] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  207.839493] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  207.839496] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  207.839501] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  207.839505] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[  207.839511] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[  207.839514] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[  207.839518] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[  207.839521] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[  207.839526] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  207.839529] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  207.839532] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  207.839535] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  207.839539] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  207.839543] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[  207.839547] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  207.839550] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  207.839552] [drm:intel_dump_pipe_config] requested mode:
>[  207.839558] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  207.839561] [drm:intel_dump_pipe_config] adjusted mode:
>[  207.839565] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  207.839571] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[  207.839573] [drm:intel_dump_pipe_config] port clock: 540000
>[  207.839576] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[  207.839580] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  207.839583] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  207.839586] [drm:intel_dump_pipe_config] ips: 0
>[  207.839588] [drm:intel_dump_pipe_config] double wide: 0
>[  207.839601] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880148865ea0
>[  207.839606] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880148deaa80 state to ffff880148865ea0
>[  207.839611] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004d5c800 state to ffff880148865ea0
>[  207.839614] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880148deaa80 to [CRTC:20]
>[  207.839617] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff880148deaa80
>[  207.839620] [drm:drm_atomic_check_only] checking ffff880148865ea0
>[  207.839627] [drm:drm_atomic_commit] commiting ffff880148865ea0
>[  207.843027] [drm:drm_atomic_state_clear] Clearing atomic state ffff880148865ea0
>[  207.843032] [drm:drm_atomic_state_free] Freeing atomic state ffff880148865ea0
>[  207.843050] [drm:edp_panel_on] Turn eDP port A panel power on
>[  207.843059] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  207.843077] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[  207.843086] [drm:wait_panel_status] Wait complete
>[  207.843110] [drm:wait_panel_on] Wait for panel power on
>[  207.843127] [drm:wait_panel_status] mask b000000f value 80000008 status 9000000a control abcd000b
>[  208.052096] [drm:wait_panel_status] Wait complete
>[  208.053264] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  208.053935] [drm:intel_dp_set_signal_levels] Using signal levels 04000000
>[  208.054587] [drm:intel_dp_start_link_train] clock recovery OK
>[  208.055541] [drm:intel_dp_set_signal_levels] Using signal levels 05000000
>[  208.056484] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  208.056764] [drm:skl_wm_flush_pipe] flush pipe A (pass 3)
>[  208.056776] [drm:intel_edp_backlight_on] 
>[  208.056779] [drm:intel_panel_enable_backlight] pipe A
>[  208.056819] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  208.057028] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[  208.057038] [drm:skylake_update_primary_plane] Writing base 06CC0000 0,0,3200,1800 pitch=16384
>[  208.057045] [drm:intel_fbc_update] disabled per chip default
>[  208.057060] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[  208.057065] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  208.057070] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  208.057073] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  208.057075] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  208.057078] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  208.057080] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  208.057083] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  208.057085] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  208.057088] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  208.057090] [drm:check_crtc_state] [CRTC:20]
>[  208.057107] [drm:check_crtc_state] [CRTC:25]
>[  208.057110] [drm:check_crtc_state] [CRTC:30]
>[  208.057113] [drm:check_shared_dpll_state] DPLL 1
>[  208.057116] [drm:check_shared_dpll_state] DPLL 2
>[  208.057119] [drm:check_shared_dpll_state] DPLL 3
>[  211.057719] kms_psr_sink_crc: starting subtest primary_mmap_gtt
>[  211.057780] [drm:add_framebuffer_internal] [FB:59]
>[  211.069762] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[  211.069808] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  211.083961] [drm:add_framebuffer_internal] [FB:60]
>[  211.109881] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  211.109891] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  211.109897] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  211.109903] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  211.109906] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  211.109921] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  211.109968] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[  211.110325] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  211.110661] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  211.110679] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  211.110686] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  211.110692] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  211.110697] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  211.110705] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  211.110724] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  211.110729] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  211.110734] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  211.110737] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  211.110740] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  211.110743] [drm:intel_display_power_get] enabling power well 2
>[  211.110747] [drm:skl_set_power_well] Enabling power well 2
>[  211.110751] [drm:intel_display_power_get] enabling DDI B power well
>[  211.110754] [drm:skl_set_power_well] Enabling DDI B power well
>[  211.110764] [drm:intel_display_power_put] disabling DDI B power well
>[  211.110768] [drm:skl_set_power_well] Disabling DDI B power well
>[  211.110770] [drm:intel_display_power_put] disabling power well 2
>[  211.110774] [drm:skl_set_power_well] Disabling power well 2
>[  211.110777] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  211.110781] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  211.110784] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  211.110786] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  211.110789] [drm:intel_display_power_get] enabling power well 2
>[  211.110792] [drm:skl_set_power_well] Enabling power well 2
>[  211.110795] [drm:intel_display_power_get] enabling DDI B power well
>[  211.110798] [drm:skl_set_power_well] Enabling DDI B power well
>[  211.110808] [drm:intel_display_power_put] disabling DDI B power well
>[  211.110811] [drm:skl_set_power_well] Disabling DDI B power well
>[  211.110814] [drm:intel_display_power_put] disabling power well 2
>[  211.110817] [drm:skl_set_power_well] Disabling power well 2
>[  211.110820] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  211.110827] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  211.110831] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  211.110835] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  211.110839] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  211.110843] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  211.110846] [drm:intel_display_power_get] enabling power well 2
>[  211.110849] [drm:skl_set_power_well] Enabling power well 2
>[  211.110852] [drm:intel_display_power_get] enabling DDI B power well
>[  211.110855] [drm:skl_set_power_well] Enabling DDI B power well
>[  211.111104] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  211.111107] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  211.111110] [drm:intel_display_power_put] disabling DDI B power well
>[  211.111113] [drm:skl_set_power_well] Disabling DDI B power well
>[  211.111116] [drm:intel_display_power_put] disabling power well 2
>[  211.111119] [drm:skl_set_power_well] Disabling power well 2
>[  211.111123] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  211.111126] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  211.111129] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  211.111132] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  211.111134] [drm:intel_display_power_get] enabling power well 2
>[  211.111138] [drm:skl_set_power_well] Enabling power well 2
>[  211.111141] [drm:intel_display_power_get] enabling DDI B power well
>[  211.111144] [drm:skl_set_power_well] Enabling DDI B power well
>[  211.111403] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  211.111411] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  211.111417] [drm:intel_display_power_put] disabling DDI B power well
>[  211.111423] [drm:skl_set_power_well] Disabling DDI B power well
>[  211.111426] [drm:intel_display_power_put] disabling power well 2
>[  211.111431] [drm:skl_set_power_well] Disabling power well 2
>[  211.111437] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  211.111455] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  211.111463] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  211.111470] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  211.111475] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  211.111480] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  211.111485] [drm:intel_display_power_get] enabling power well 2
>[  211.111489] [drm:skl_set_power_well] Enabling power well 2
>[  211.111494] [drm:intel_display_power_get] enabling DDI C power well
>[  211.111498] [drm:skl_set_power_well] Enabling DDI C power well
>[  211.111509] [drm:intel_display_power_put] disabling DDI C power well
>[  211.111514] [drm:skl_set_power_well] Disabling DDI C power well
>[  211.111518] [drm:intel_display_power_put] disabling power well 2
>[  211.111522] [drm:skl_set_power_well] Disabling power well 2
>[  211.111531] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  211.111544] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  211.111556] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  211.111567] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  211.111578] [drm:intel_display_power_get] enabling power well 2
>[  211.111585] [drm:skl_set_power_well] Enabling power well 2
>[  211.111589] [drm:intel_display_power_get] enabling DDI C power well
>[  211.111594] [drm:skl_set_power_well] Enabling DDI C power well
>[  211.111605] [drm:intel_display_power_put] disabling DDI C power well
>[  211.111610] [drm:skl_set_power_well] Disabling DDI C power well
>[  211.111614] [drm:intel_display_power_put] disabling power well 2
>[  211.111619] [drm:skl_set_power_well] Disabling power well 2
>[  211.111623] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  211.111633] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  211.111644] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  211.111657] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  211.111662] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  211.111666] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  211.111669] [drm:intel_display_power_get] enabling power well 2
>[  211.111674] [drm:skl_set_power_well] Enabling power well 2
>[  211.111678] [drm:intel_display_power_get] enabling DDI C power well
>[  211.111682] [drm:skl_set_power_well] Enabling DDI C power well
>[  211.111939] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  211.111942] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  211.111945] [drm:intel_display_power_put] disabling DDI C power well
>[  211.111949] [drm:skl_set_power_well] Disabling DDI C power well
>[  211.111952] [drm:intel_display_power_put] disabling power well 2
>[  211.111955] [drm:skl_set_power_well] Disabling power well 2
>[  211.111958] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  211.111964] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  211.111967] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  211.111969] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  211.111972] [drm:intel_display_power_get] enabling power well 2
>[  211.111975] [drm:skl_set_power_well] Enabling power well 2
>[  211.111978] [drm:intel_display_power_get] enabling DDI C power well
>[  211.111982] [drm:skl_set_power_well] Enabling DDI C power well
>[  211.112226] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  211.112229] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  211.112231] [drm:intel_display_power_put] disabling DDI C power well
>[  211.112235] [drm:skl_set_power_well] Disabling DDI C power well
>[  211.112237] [drm:intel_display_power_put] disabling power well 2
>[  211.112241] [drm:skl_set_power_well] Disabling power well 2
>[  211.112244] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  211.112256] [drm:drm_mode_setcrtc] [CRTC:20]
>[  211.112260] [drm:intel_crtc_set_config] [CRTC:20] [NOFB]
>[  211.112266] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  211.112269] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [NOCRTC]
>[  211.112271] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  211.112274] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  211.112278] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  211.112298] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[  211.134455] [drm:intel_edp_backlight_off] 
>[  211.335514] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  211.343639] [drm:edp_panel_off] Turn eDP port A panel power off
>[  211.343667] [drm:wait_panel_off] Wait for panel power off time
>[  211.343686] [drm:wait_panel_status] mask b0000000 value 00000000 status a0000003 control abcd0000
>[  211.398500] [drm:wait_panel_status] Wait complete
>[  211.398532] [drm:intel_fbc_update] no output, disabling
>[  211.398541] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880145959ba0
>[  211.398549] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880148d69c00 state to ffff880145959ba0
>[  211.398554] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004bae800 state to ffff880145959ba0
>[  211.398557] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880148d69c00 to [NOCRTC]
>[  211.398560] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880148d69c00
>[  211.398563] [drm:drm_atomic_check_only] checking ffff880145959ba0
>[  211.398569] [drm:drm_atomic_commit] commiting ffff880145959ba0
>[  211.398580] [drm:drm_atomic_state_clear] Clearing atomic state ffff880145959ba0
>[  211.398585] [drm:drm_atomic_state_free] Freeing atomic state ffff880145959ba0
>[  211.398593] [drm:intel_display_power_put] disabling DDI A/E power well
>[  211.398598] [drm:skl_set_power_well] Disabling DDI A/E power well
>[  211.398600] [drm:intel_display_power_put] disabling MISC IO power well
>[  211.398604] [drm:skl_set_power_well] Disabling MISC IO power well
>[  211.398607] [drm:intel_display_power_put] disabling power well 1
>[  211.398612] [drm:skl_set_power_well] Disabling power well 1
>[  211.398644] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  211.398647] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  211.398650] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  211.398653] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  211.398655] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  211.398658] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  211.398661] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  211.398663] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  211.398666] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  211.398668] [drm:check_crtc_state] [CRTC:20]
>[  211.398672] [drm:check_crtc_state] [CRTC:25]
>[  211.398674] [drm:check_crtc_state] [CRTC:30]
>[  211.398678] [drm:check_shared_dpll_state] DPLL 1
>[  211.398681] [drm:check_shared_dpll_state] DPLL 2
>[  211.398683] [drm:check_shared_dpll_state] DPLL 3
>[  211.398712] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  211.398719] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  211.398724] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  211.398729] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  211.398732] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  211.398736] [drm:intel_display_power_get] enabling power well 1
>[  211.398742] [drm:skl_set_power_well] Enabling power well 1
>[  211.398745] [drm:intel_display_power_get] enabling MISC IO power well
>[  211.398749] [drm:skl_set_power_well] Enabling MISC IO power well
>[  211.398752] [drm:intel_display_power_get] enabling DDI A/E power well
>[  211.398755] [drm:skl_set_power_well] Enabling DDI A/E power well
>[  211.398768] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  211.398777] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  211.944600] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[  211.944613] [drm:wait_panel_status] Wait complete
>[  211.944653] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  211.944663] [drm:edp_panel_vdd_on] eDP port A panel power wasn't enabled
>[  212.145900] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  212.146252] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  212.146273] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  212.146280] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  212.146286] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  212.146291] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  212.146306] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  212.146329] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  212.146335] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  212.146339] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  212.146343] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  212.146346] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  212.146349] [drm:intel_display_power_get] enabling power well 2
>[  212.146353] [drm:skl_set_power_well] Enabling power well 2
>[  212.146357] [drm:intel_display_power_get] enabling DDI B power well
>[  212.146360] [drm:skl_set_power_well] Enabling DDI B power well
>[  212.146370] [drm:intel_display_power_put] disabling DDI B power well
>[  212.146374] [drm:skl_set_power_well] Disabling DDI B power well
>[  212.146377] [drm:intel_display_power_put] disabling power well 2
>[  212.146381] [drm:skl_set_power_well] Disabling power well 2
>[  212.146384] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  212.146388] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  212.146391] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  212.146393] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  212.146396] [drm:intel_display_power_get] enabling power well 2
>[  212.146399] [drm:skl_set_power_well] Enabling power well 2
>[  212.146402] [drm:intel_display_power_get] enabling DDI B power well
>[  212.146405] [drm:skl_set_power_well] Enabling DDI B power well
>[  212.146429] [drm:intel_display_power_put] disabling DDI B power well
>[  212.146442] [drm:skl_set_power_well] Disabling DDI B power well
>[  212.146452] [drm:intel_display_power_put] disabling power well 2
>[  212.146462] [drm:skl_set_power_well] Disabling power well 2
>[  212.146473] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  212.146486] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  212.146496] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  212.146500] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  212.146504] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  212.146508] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  212.146510] [drm:intel_display_power_get] enabling power well 2
>[  212.146514] [drm:skl_set_power_well] Enabling power well 2
>[  212.146517] [drm:intel_display_power_get] enabling DDI B power well
>[  212.146521] [drm:skl_set_power_well] Enabling DDI B power well
>[  212.146825] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  212.146833] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  212.146837] [drm:intel_display_power_put] disabling DDI B power well
>[  212.146841] [drm:skl_set_power_well] Disabling DDI B power well
>[  212.146844] [drm:intel_display_power_put] disabling power well 2
>[  212.146848] [drm:skl_set_power_well] Disabling power well 2
>[  212.146852] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  212.146861] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  212.146864] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  212.146867] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  212.146870] [drm:intel_display_power_get] enabling power well 2
>[  212.146874] [drm:skl_set_power_well] Enabling power well 2
>[  212.146877] [drm:intel_display_power_get] enabling DDI B power well
>[  212.146881] [drm:skl_set_power_well] Enabling DDI B power well
>[  212.147133] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  212.147139] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  212.147143] [drm:intel_display_power_put] disabling DDI B power well
>[  212.147147] [drm:skl_set_power_well] Disabling DDI B power well
>[  212.147150] [drm:intel_display_power_put] disabling power well 2
>[  212.147154] [drm:skl_set_power_well] Disabling power well 2
>[  212.147158] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  212.147172] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  212.147178] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  212.147182] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  212.147186] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  212.147189] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  212.147193] [drm:intel_display_power_get] enabling power well 2
>[  212.147196] [drm:skl_set_power_well] Enabling power well 2
>[  212.147200] [drm:intel_display_power_get] enabling DDI C power well
>[  212.147203] [drm:skl_set_power_well] Enabling DDI C power well
>[  212.147213] [drm:intel_display_power_put] disabling DDI C power well
>[  212.147216] [drm:skl_set_power_well] Disabling DDI C power well
>[  212.147219] [drm:intel_display_power_put] disabling power well 2
>[  212.147223] [drm:skl_set_power_well] Disabling power well 2
>[  212.147226] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  212.147229] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  212.147232] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  212.147235] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  212.147237] [drm:intel_display_power_get] enabling power well 2
>[  212.147241] [drm:skl_set_power_well] Enabling power well 2
>[  212.147244] [drm:intel_display_power_get] enabling DDI C power well
>[  212.147247] [drm:skl_set_power_well] Enabling DDI C power well
>[  212.147256] [drm:intel_display_power_put] disabling DDI C power well
>[  212.147260] [drm:skl_set_power_well] Disabling DDI C power well
>[  212.147263] [drm:intel_display_power_put] disabling power well 2
>[  212.147267] [drm:skl_set_power_well] Disabling power well 2
>[  212.147269] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  212.147275] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  212.147280] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  212.147284] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  212.147287] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  212.147289] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  212.147292] [drm:intel_display_power_get] enabling power well 2
>[  212.147295] [drm:skl_set_power_well] Enabling power well 2
>[  212.147298] [drm:intel_display_power_get] enabling DDI C power well
>[  212.147302] [drm:skl_set_power_well] Enabling DDI C power well
>[  212.147554] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  212.147561] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  212.147565] [drm:intel_display_power_put] disabling DDI C power well
>[  212.147570] [drm:skl_set_power_well] Disabling DDI C power well
>[  212.147572] [drm:intel_display_power_put] disabling power well 2
>[  212.147576] [drm:skl_set_power_well] Disabling power well 2
>[  212.147580] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  212.147589] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  212.147592] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  212.147595] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  212.147599] [drm:intel_display_power_get] enabling power well 2
>[  212.147602] [drm:skl_set_power_well] Enabling power well 2
>[  212.147606] [drm:intel_display_power_get] enabling DDI C power well
>[  212.147609] [drm:skl_set_power_well] Enabling DDI C power well
>[  212.147906] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  212.147913] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  212.147917] [drm:intel_display_power_put] disabling DDI C power well
>[  212.147921] [drm:skl_set_power_well] Disabling DDI C power well
>[  212.147924] [drm:intel_display_power_put] disabling power well 2
>[  212.147927] [drm:skl_set_power_well] Disabling power well 2
>[  212.147931] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  212.147950] [drm:drm_mode_setcrtc] [CRTC:20]
>[  212.147956] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1]
>[  212.147961] [drm:intel_crtc_set_config] [CRTC:20] [FB:59] #connectors=1 (x y) (0 0)
>[  212.147967] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  212.147970] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  212.147973] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  212.147977] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  212.147980] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  212.147983] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  212.147988] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  212.147992] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[  212.147998] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[  212.148000] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[  212.148004] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[  212.148007] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[  212.148012] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  212.148015] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  212.148018] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  212.148021] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  212.148025] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  212.148029] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[  212.148033] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  212.148036] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  212.148038] [drm:intel_dump_pipe_config] requested mode:
>[  212.148044] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  212.148046] [drm:intel_dump_pipe_config] adjusted mode:
>[  212.148051] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  212.148056] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[  212.148059] [drm:intel_dump_pipe_config] port clock: 540000
>[  212.148062] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[  212.148065] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  212.148069] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  212.148071] [drm:intel_dump_pipe_config] ips: 0
>[  212.148074] [drm:intel_dump_pipe_config] double wide: 0
>[  212.148086] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880145959960
>[  212.148092] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880148d69480 state to ffff880145959960
>[  212.148096] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004ba9000 state to ffff880145959960
>[  212.148099] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880148d69480 to [CRTC:20]
>[  212.148103] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880148d69480
>[  212.148106] [drm:drm_atomic_check_only] checking ffff880145959960
>[  212.148112] [drm:drm_atomic_commit] commiting ffff880145959960
>[  212.150946] [drm:drm_atomic_state_clear] Clearing atomic state ffff880145959960
>[  212.150951] [drm:drm_atomic_state_free] Freeing atomic state ffff880145959960
>[  212.150969] [drm:edp_panel_on] Turn eDP port A panel power on
>[  212.150979] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  212.150997] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[  212.151006] [drm:wait_panel_status] Wait complete
>[  212.151029] [drm:wait_panel_on] Wait for panel power on
>[  212.151047] [drm:wait_panel_status] mask b000000f value 80000008 status 9000000a control abcd000b
>[  212.359638] [drm:wait_panel_status] Wait complete
>[  212.360786] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  212.361453] [drm:intel_dp_set_signal_levels] Using signal levels 04000000
>[  212.362100] [drm:intel_dp_start_link_train] clock recovery OK
>[  212.363053] [drm:intel_dp_set_signal_levels] Using signal levels 05000000
>[  212.363995] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  212.364274] [drm:skl_wm_flush_pipe] flush pipe A (pass 3)
>[  212.364286] [drm:intel_edp_backlight_on] 
>[  212.364289] [drm:intel_panel_enable_backlight] pipe A
>[  212.364329] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  212.364539] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[  212.364550] [drm:skylake_update_primary_plane] Writing base 08CC0000 0,0,3200,1800 pitch=16384
>[  212.364559] [drm:intel_fbc_update] disabled per chip default
>[  212.364575] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[  212.364583] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  212.364589] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  212.364592] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  212.364596] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  212.364598] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  212.364601] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  212.364603] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  212.364606] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  212.364609] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  212.364611] [drm:check_crtc_state] [CRTC:20]
>[  212.364628] [drm:check_crtc_state] [CRTC:25]
>[  212.364631] [drm:check_crtc_state] [CRTC:30]
>[  212.364634] [drm:check_shared_dpll_state] DPLL 1
>[  212.364638] [drm:check_shared_dpll_state] DPLL 2
>[  212.364640] [drm:check_shared_dpll_state] DPLL 3
>[  215.365196] kms_psr_sink_crc: starting subtest primary_mmap_gtt_waiting
>[  215.365257] [drm:add_framebuffer_internal] [FB:61]
>[  215.377256] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[  215.377306] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  215.391503] [drm:add_framebuffer_internal] [FB:62]
>[  215.417291] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  215.417301] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  215.417307] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  215.417313] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  215.417316] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  215.417330] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  215.417379] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[  215.417737] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  215.418076] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  215.418094] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  215.418101] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  215.418107] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  215.418113] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  215.418120] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  215.418140] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  215.418145] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  215.418150] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  215.418153] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  215.418156] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  215.418159] [drm:intel_display_power_get] enabling power well 2
>[  215.418163] [drm:skl_set_power_well] Enabling power well 2
>[  215.418167] [drm:intel_display_power_get] enabling DDI B power well
>[  215.418170] [drm:skl_set_power_well] Enabling DDI B power well
>[  215.418180] [drm:intel_display_power_put] disabling DDI B power well
>[  215.418184] [drm:skl_set_power_well] Disabling DDI B power well
>[  215.418186] [drm:intel_display_power_put] disabling power well 2
>[  215.418190] [drm:skl_set_power_well] Disabling power well 2
>[  215.418193] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  215.418196] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  215.418199] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  215.418202] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  215.418204] [drm:intel_display_power_get] enabling power well 2
>[  215.418207] [drm:skl_set_power_well] Enabling power well 2
>[  215.418211] [drm:intel_display_power_get] enabling DDI B power well
>[  215.418214] [drm:skl_set_power_well] Enabling DDI B power well
>[  215.418223] [drm:intel_display_power_put] disabling DDI B power well
>[  215.418227] [drm:skl_set_power_well] Disabling DDI B power well
>[  215.418229] [drm:intel_display_power_put] disabling power well 2
>[  215.418233] [drm:skl_set_power_well] Disabling power well 2
>[  215.418235] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  215.418242] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  215.418247] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  215.418251] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  215.418254] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  215.418257] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  215.418260] [drm:intel_display_power_get] enabling power well 2
>[  215.418263] [drm:skl_set_power_well] Enabling power well 2
>[  215.418267] [drm:intel_display_power_get] enabling DDI B power well
>[  215.418270] [drm:skl_set_power_well] Enabling DDI B power well
>[  215.418600] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  215.418607] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  215.418612] [drm:intel_display_power_put] disabling DDI B power well
>[  215.418616] [drm:skl_set_power_well] Disabling DDI B power well
>[  215.418618] [drm:intel_display_power_put] disabling power well 2
>[  215.418622] [drm:skl_set_power_well] Disabling power well 2
>[  215.418626] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  215.418635] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  215.418639] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  215.418642] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  215.418646] [drm:intel_display_power_get] enabling power well 2
>[  215.418649] [drm:skl_set_power_well] Enabling power well 2
>[  215.418652] [drm:intel_display_power_get] enabling DDI B power well
>[  215.418656] [drm:skl_set_power_well] Enabling DDI B power well
>[  215.418908] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  215.418919] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  215.418929] [drm:intel_display_power_put] disabling DDI B power well
>[  215.418940] [drm:skl_set_power_well] Disabling DDI B power well
>[  215.418949] [drm:intel_display_power_put] disabling power well 2
>[  215.418957] [drm:skl_set_power_well] Disabling power well 2
>[  215.418964] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  215.418978] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  215.418986] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  215.418992] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  215.418995] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  215.418998] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  215.419001] [drm:intel_display_power_get] enabling power well 2
>[  215.419004] [drm:skl_set_power_well] Enabling power well 2
>[  215.419007] [drm:intel_display_power_get] enabling DDI C power well
>[  215.419010] [drm:skl_set_power_well] Enabling DDI C power well
>[  215.419020] [drm:intel_display_power_put] disabling DDI C power well
>[  215.419024] [drm:skl_set_power_well] Disabling DDI C power well
>[  215.419026] [drm:intel_display_power_put] disabling power well 2
>[  215.419030] [drm:skl_set_power_well] Disabling power well 2
>[  215.419033] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  215.419036] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  215.419039] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  215.419041] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  215.419044] [drm:intel_display_power_get] enabling power well 2
>[  215.419047] [drm:skl_set_power_well] Enabling power well 2
>[  215.419050] [drm:intel_display_power_get] enabling DDI C power well
>[  215.419053] [drm:skl_set_power_well] Enabling DDI C power well
>[  215.419062] [drm:intel_display_power_put] disabling DDI C power well
>[  215.419066] [drm:skl_set_power_well] Disabling DDI C power well
>[  215.419068] [drm:intel_display_power_put] disabling power well 2
>[  215.419072] [drm:skl_set_power_well] Disabling power well 2
>[  215.419074] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  215.419081] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  215.419086] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  215.419089] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  215.419092] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  215.419095] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  215.419098] [drm:intel_display_power_get] enabling power well 2
>[  215.419101] [drm:skl_set_power_well] Enabling power well 2
>[  215.419104] [drm:intel_display_power_get] enabling DDI C power well
>[  215.419107] [drm:skl_set_power_well] Enabling DDI C power well
>[  215.419353] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  215.419367] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  215.419381] [drm:intel_display_power_put] disabling DDI C power well
>[  215.419387] [drm:skl_set_power_well] Disabling DDI C power well
>[  215.419390] [drm:intel_display_power_put] disabling power well 2
>[  215.419393] [drm:skl_set_power_well] Disabling power well 2
>[  215.419396] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  215.419400] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  215.419403] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  215.419405] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  215.419408] [drm:intel_display_power_get] enabling power well 2
>[  215.419411] [drm:skl_set_power_well] Enabling power well 2
>[  215.419414] [drm:intel_display_power_get] enabling DDI C power well
>[  215.419417] [drm:skl_set_power_well] Enabling DDI C power well
>[  215.419660] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  215.419663] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  215.419666] [drm:intel_display_power_put] disabling DDI C power well
>[  215.419669] [drm:skl_set_power_well] Disabling DDI C power well
>[  215.419672] [drm:intel_display_power_put] disabling power well 2
>[  215.419675] [drm:skl_set_power_well] Disabling power well 2
>[  215.419678] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  215.419691] [drm:drm_mode_setcrtc] [CRTC:20]
>[  215.419695] [drm:intel_crtc_set_config] [CRTC:20] [NOFB]
>[  215.419701] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  215.419704] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [NOCRTC]
>[  215.419706] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  215.419709] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  215.419713] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  215.419718] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[  215.440852] [drm:intel_edp_backlight_off] 
>[  215.641980] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  215.652164] [drm:edp_panel_off] Turn eDP port A panel power off
>[  215.652192] [drm:wait_panel_off] Wait for panel power off time
>[  215.652211] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  215.707050] [drm:wait_panel_status] Wait complete
>[  215.707083] [drm:intel_fbc_update] no output, disabling
>[  215.707091] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880145959ba0
>[  215.707100] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880148d69cc0 state to ffff880145959ba0
>[  215.707105] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004ba9000 state to ffff880145959ba0
>[  215.707109] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880148d69cc0 to [NOCRTC]
>[  215.707112] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880148d69cc0
>[  215.707114] [drm:drm_atomic_check_only] checking ffff880145959ba0
>[  215.707120] [drm:drm_atomic_commit] commiting ffff880145959ba0
>[  215.707132] [drm:drm_atomic_state_clear] Clearing atomic state ffff880145959ba0
>[  215.707136] [drm:drm_atomic_state_free] Freeing atomic state ffff880145959ba0
>[  215.707144] [drm:intel_display_power_put] disabling DDI A/E power well
>[  215.707149] [drm:skl_set_power_well] Disabling DDI A/E power well
>[  215.707151] [drm:intel_display_power_put] disabling MISC IO power well
>[  215.707155] [drm:skl_set_power_well] Disabling MISC IO power well
>[  215.707157] [drm:intel_display_power_put] disabling power well 1
>[  215.707162] [drm:skl_set_power_well] Disabling power well 1
>[  215.707195] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  215.707198] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  215.707201] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  215.707203] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  215.707206] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  215.707208] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  215.707211] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  215.707214] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  215.707216] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  215.707219] [drm:check_crtc_state] [CRTC:20]
>[  215.707222] [drm:check_crtc_state] [CRTC:25]
>[  215.707225] [drm:check_crtc_state] [CRTC:30]
>[  215.707228] [drm:check_shared_dpll_state] DPLL 1
>[  215.707231] [drm:check_shared_dpll_state] DPLL 2
>[  215.707234] [drm:check_shared_dpll_state] DPLL 3
>[  215.707263] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  215.707271] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  215.707276] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  215.707281] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  215.707284] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  215.707287] [drm:intel_display_power_get] enabling power well 1
>[  215.707294] [drm:skl_set_power_well] Enabling power well 1
>[  215.707297] [drm:intel_display_power_get] enabling MISC IO power well
>[  215.707300] [drm:skl_set_power_well] Enabling MISC IO power well
>[  215.707303] [drm:intel_display_power_get] enabling DDI A/E power well
>[  215.707306] [drm:skl_set_power_well] Enabling DDI A/E power well
>[  215.707319] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  215.707329] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  216.253077] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[  216.253089] [drm:wait_panel_status] Wait complete
>[  216.253130] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  216.253140] [drm:edp_panel_vdd_on] eDP port A panel power wasn't enabled
>[  216.454516] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  216.454868] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  216.454889] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  216.454896] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  216.454902] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  216.454908] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  216.454922] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  216.454946] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  216.454962] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  216.454966] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  216.454970] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  216.454973] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  216.454976] [drm:intel_display_power_get] enabling power well 2
>[  216.454981] [drm:skl_set_power_well] Enabling power well 2
>[  216.454984] [drm:intel_display_power_get] enabling DDI B power well
>[  216.454987] [drm:skl_set_power_well] Enabling DDI B power well
>[  216.454998] [drm:intel_display_power_put] disabling DDI B power well
>[  216.455002] [drm:skl_set_power_well] Disabling DDI B power well
>[  216.455004] [drm:intel_display_power_put] disabling power well 2
>[  216.455008] [drm:skl_set_power_well] Disabling power well 2
>[  216.455022] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  216.455033] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  216.455043] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  216.455053] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  216.455062] [drm:intel_display_power_get] enabling power well 2
>[  216.455065] [drm:skl_set_power_well] Enabling power well 2
>[  216.455069] [drm:intel_display_power_get] enabling DDI B power well
>[  216.455072] [drm:skl_set_power_well] Enabling DDI B power well
>[  216.455082] [drm:intel_display_power_put] disabling DDI B power well
>[  216.455086] [drm:skl_set_power_well] Disabling DDI B power well
>[  216.455088] [drm:intel_display_power_put] disabling power well 2
>[  216.455092] [drm:skl_set_power_well] Disabling power well 2
>[  216.455095] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  216.455102] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  216.455107] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  216.455111] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  216.455115] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  216.455119] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  216.455122] [drm:intel_display_power_get] enabling power well 2
>[  216.455125] [drm:skl_set_power_well] Enabling power well 2
>[  216.455129] [drm:intel_display_power_get] enabling DDI B power well
>[  216.455133] [drm:skl_set_power_well] Enabling DDI B power well
>[  216.455438] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  216.455445] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  216.455450] [drm:intel_display_power_put] disabling DDI B power well
>[  216.455454] [drm:skl_set_power_well] Disabling DDI B power well
>[  216.455457] [drm:intel_display_power_put] disabling power well 2
>[  216.455460] [drm:skl_set_power_well] Disabling power well 2
>[  216.455465] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  216.455474] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  216.455477] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  216.455480] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  216.455483] [drm:intel_display_power_get] enabling power well 2
>[  216.455487] [drm:skl_set_power_well] Enabling power well 2
>[  216.455490] [drm:intel_display_power_get] enabling DDI B power well
>[  216.455494] [drm:skl_set_power_well] Enabling DDI B power well
>[  216.455744] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  216.455747] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  216.455749] [drm:intel_display_power_put] disabling DDI B power well
>[  216.455753] [drm:skl_set_power_well] Disabling DDI B power well
>[  216.455756] [drm:intel_display_power_put] disabling power well 2
>[  216.455759] [drm:skl_set_power_well] Disabling power well 2
>[  216.455762] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  216.455773] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  216.455778] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  216.455783] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  216.455786] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  216.455789] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  216.455792] [drm:intel_display_power_get] enabling power well 2
>[  216.455796] [drm:skl_set_power_well] Enabling power well 2
>[  216.455799] [drm:intel_display_power_get] enabling DDI C power well
>[  216.455802] [drm:skl_set_power_well] Enabling DDI C power well
>[  216.455812] [drm:intel_display_power_put] disabling DDI C power well
>[  216.455816] [drm:skl_set_power_well] Disabling DDI C power well
>[  216.455818] [drm:intel_display_power_put] disabling power well 2
>[  216.455822] [drm:skl_set_power_well] Disabling power well 2
>[  216.455825] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  216.455829] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  216.455831] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  216.455834] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  216.455836] [drm:intel_display_power_get] enabling power well 2
>[  216.455840] [drm:skl_set_power_well] Enabling power well 2
>[  216.455843] [drm:intel_display_power_get] enabling DDI C power well
>[  216.455846] [drm:skl_set_power_well] Enabling DDI C power well
>[  216.455856] [drm:intel_display_power_put] disabling DDI C power well
>[  216.455859] [drm:skl_set_power_well] Disabling DDI C power well
>[  216.455862] [drm:intel_display_power_put] disabling power well 2
>[  216.455866] [drm:skl_set_power_well] Disabling power well 2
>[  216.455868] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  216.455874] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  216.455879] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  216.455883] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  216.455886] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  216.455889] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  216.455892] [drm:intel_display_power_get] enabling power well 2
>[  216.455895] [drm:skl_set_power_well] Enabling power well 2
>[  216.455898] [drm:intel_display_power_get] enabling DDI C power well
>[  216.455901] [drm:skl_set_power_well] Enabling DDI C power well
>[  216.456164] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  216.456170] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  216.456175] [drm:intel_display_power_put] disabling DDI C power well
>[  216.456180] [drm:skl_set_power_well] Disabling DDI C power well
>[  216.456184] [drm:intel_display_power_put] disabling power well 2
>[  216.456189] [drm:skl_set_power_well] Disabling power well 2
>[  216.456194] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  216.456202] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  216.456206] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  216.456210] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  216.456215] [drm:intel_display_power_get] enabling power well 2
>[  216.456219] [drm:skl_set_power_well] Enabling power well 2
>[  216.456224] [drm:intel_display_power_get] enabling DDI C power well
>[  216.456228] [drm:skl_set_power_well] Enabling DDI C power well
>[  216.456490] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  216.456497] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  216.456501] [drm:intel_display_power_put] disabling DDI C power well
>[  216.456505] [drm:skl_set_power_well] Disabling DDI C power well
>[  216.456508] [drm:intel_display_power_put] disabling power well 2
>[  216.456512] [drm:skl_set_power_well] Disabling power well 2
>[  216.456516] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  216.456535] [drm:drm_mode_setcrtc] [CRTC:20]
>[  216.456541] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1]
>[  216.456546] [drm:intel_crtc_set_config] [CRTC:20] [FB:61] #connectors=1 (x y) (0 0)
>[  216.456551] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  216.456555] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  216.456558] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  216.456561] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  216.456564] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  216.456568] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  216.456572] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  216.456576] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[  216.456582] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[  216.456585] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[  216.456589] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[  216.456592] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[  216.456596] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  216.456600] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  216.456602] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  216.456605] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  216.456609] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  216.456613] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[  216.456617] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  216.456620] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  216.456622] [drm:intel_dump_pipe_config] requested mode:
>[  216.456628] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  216.456631] [drm:intel_dump_pipe_config] adjusted mode:
>[  216.456635] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  216.456640] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[  216.456643] [drm:intel_dump_pipe_config] port clock: 540000
>[  216.456646] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[  216.456649] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  216.456653] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  216.456655] [drm:intel_dump_pipe_config] ips: 0
>[  216.456658] [drm:intel_dump_pipe_config] double wide: 0
>[  216.456671] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801488655a0
>[  216.456676] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880148dea180 state to ffff8801488655a0
>[  216.456680] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004d5b800 state to ffff8801488655a0
>[  216.456684] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880148dea180 to [CRTC:20]
>[  216.456687] [drm:drm_atomic_set_fb_for_plane] Set [FB:61] for plane state ffff880148dea180
>[  216.456690] [drm:drm_atomic_check_only] checking ffff8801488655a0
>[  216.456697] [drm:drm_atomic_commit] commiting ffff8801488655a0
>[  216.459539] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801488655a0
>[  216.459543] [drm:drm_atomic_state_free] Freeing atomic state ffff8801488655a0
>[  216.459562] [drm:edp_panel_on] Turn eDP port A panel power on
>[  216.459571] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  216.459589] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[  216.459598] [drm:wait_panel_status] Wait complete
>[  216.459622] [drm:wait_panel_on] Wait for panel power on
>[  216.459639] [drm:wait_panel_status] mask b000000f value 80000008 status 9000000a control abcd000b
>[  216.668176] [drm:wait_panel_status] Wait complete
>[  216.669306] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  216.669956] [drm:intel_dp_set_signal_levels] Using signal levels 04000000
>[  216.670603] [drm:intel_dp_start_link_train] clock recovery OK
>[  216.671554] [drm:intel_dp_set_signal_levels] Using signal levels 05000000
>[  216.672495] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  216.672772] [drm:skl_wm_flush_pipe] flush pipe A (pass 3)
>[  216.672785] [drm:intel_edp_backlight_on] 
>[  216.672788] [drm:intel_panel_enable_backlight] pipe A
>[  216.672828] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  216.673040] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[  216.673054] [drm:skylake_update_primary_plane] Writing base 0CCC0000 0,0,3200,1800 pitch=16384
>[  216.673063] [drm:intel_fbc_update] disabled per chip default
>[  216.673078] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[  216.673084] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  216.673088] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  216.673091] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  216.673094] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  216.673097] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  216.673099] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  216.673102] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  216.673104] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  216.673107] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  216.673109] [drm:check_crtc_state] [CRTC:20]
>[  216.673126] [drm:check_crtc_state] [CRTC:25]
>[  216.673129] [drm:check_crtc_state] [CRTC:30]
>[  216.673132] [drm:check_shared_dpll_state] DPLL 1
>[  216.673136] [drm:check_shared_dpll_state] DPLL 2
>[  216.673138] [drm:check_shared_dpll_state] DPLL 3
>[  219.673785] kms_psr_sink_crc: starting subtest primary_mmap_cpu
>[  219.673842] [drm:add_framebuffer_internal] [FB:63]
>[  219.679466] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[  219.679509] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  219.700232] [drm:add_framebuffer_internal] [FB:64]
>[  219.726456] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  219.726467] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  219.726474] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  219.726480] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  219.726484] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  219.726499] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  219.726547] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[  219.726910] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  219.727245] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  219.727271] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  219.727278] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  219.727285] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  219.727290] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  219.727299] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  219.727320] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  219.727326] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  219.727331] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  219.727334] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  219.727337] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  219.727340] [drm:intel_display_power_get] enabling power well 2
>[  219.727344] [drm:skl_set_power_well] Enabling power well 2
>[  219.727348] [drm:intel_display_power_get] enabling DDI B power well
>[  219.727351] [drm:skl_set_power_well] Enabling DDI B power well
>[  219.727378] [drm:intel_display_power_put] disabling DDI B power well
>[  219.727389] [drm:skl_set_power_well] Disabling DDI B power well
>[  219.727399] [drm:intel_display_power_put] disabling power well 2
>[  219.727409] [drm:skl_set_power_well] Disabling power well 2
>[  219.727418] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  219.727422] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  219.727425] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  219.727428] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  219.727430] [drm:intel_display_power_get] enabling power well 2
>[  219.727433] [drm:skl_set_power_well] Enabling power well 2
>[  219.727436] [drm:intel_display_power_get] enabling DDI B power well
>[  219.727440] [drm:skl_set_power_well] Enabling DDI B power well
>[  219.727449] [drm:intel_display_power_put] disabling DDI B power well
>[  219.727453] [drm:skl_set_power_well] Disabling DDI B power well
>[  219.727455] [drm:intel_display_power_put] disabling power well 2
>[  219.727459] [drm:skl_set_power_well] Disabling power well 2
>[  219.727461] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  219.727469] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  219.727474] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  219.727478] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  219.727481] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  219.727484] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  219.727487] [drm:intel_display_power_get] enabling power well 2
>[  219.727490] [drm:skl_set_power_well] Enabling power well 2
>[  219.727493] [drm:intel_display_power_get] enabling DDI B power well
>[  219.727496] [drm:skl_set_power_well] Enabling DDI B power well
>[  219.727743] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  219.727746] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  219.727749] [drm:intel_display_power_put] disabling DDI B power well
>[  219.727753] [drm:skl_set_power_well] Disabling DDI B power well
>[  219.727755] [drm:intel_display_power_put] disabling power well 2
>[  219.727759] [drm:skl_set_power_well] Disabling power well 2
>[  219.727762] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  219.727766] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  219.727769] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  219.727772] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  219.727774] [drm:intel_display_power_get] enabling power well 2
>[  219.727777] [drm:skl_set_power_well] Enabling power well 2
>[  219.727780] [drm:intel_display_power_get] enabling DDI B power well
>[  219.727784] [drm:skl_set_power_well] Enabling DDI B power well
>[  219.728026] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  219.728029] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  219.728032] [drm:intel_display_power_put] disabling DDI B power well
>[  219.728035] [drm:skl_set_power_well] Disabling DDI B power well
>[  219.728038] [drm:intel_display_power_put] disabling power well 2
>[  219.728041] [drm:skl_set_power_well] Disabling power well 2
>[  219.728044] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  219.728051] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  219.728056] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  219.728060] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  219.728063] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  219.728065] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  219.728068] [drm:intel_display_power_get] enabling power well 2
>[  219.728071] [drm:skl_set_power_well] Enabling power well 2
>[  219.728074] [drm:intel_display_power_get] enabling DDI C power well
>[  219.728077] [drm:skl_set_power_well] Enabling DDI C power well
>[  219.728087] [drm:intel_display_power_put] disabling DDI C power well
>[  219.728090] [drm:skl_set_power_well] Disabling DDI C power well
>[  219.728093] [drm:intel_display_power_put] disabling power well 2
>[  219.728096] [drm:skl_set_power_well] Disabling power well 2
>[  219.728099] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  219.728102] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  219.728105] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  219.728108] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  219.728110] [drm:intel_display_power_get] enabling power well 2
>[  219.728113] [drm:skl_set_power_well] Enabling power well 2
>[  219.728116] [drm:intel_display_power_get] enabling DDI C power well
>[  219.728120] [drm:skl_set_power_well] Enabling DDI C power well
>[  219.728129] [drm:intel_display_power_put] disabling DDI C power well
>[  219.728133] [drm:skl_set_power_well] Disabling DDI C power well
>[  219.728135] [drm:intel_display_power_put] disabling power well 2
>[  219.728139] [drm:skl_set_power_well] Disabling power well 2
>[  219.728141] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  219.728147] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  219.728151] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  219.728155] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  219.728158] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  219.728161] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  219.728163] [drm:intel_display_power_get] enabling power well 2
>[  219.728166] [drm:skl_set_power_well] Enabling power well 2
>[  219.728170] [drm:intel_display_power_get] enabling DDI C power well
>[  219.728173] [drm:skl_set_power_well] Enabling DDI C power well
>[  219.728423] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  219.728434] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  219.728444] [drm:intel_display_power_put] disabling DDI C power well
>[  219.728454] [drm:skl_set_power_well] Disabling DDI C power well
>[  219.728464] [drm:intel_display_power_put] disabling power well 2
>[  219.728474] [drm:skl_set_power_well] Disabling power well 2
>[  219.728484] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  219.728495] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  219.728505] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  219.728515] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  219.728525] [drm:intel_display_power_get] enabling power well 2
>[  219.728535] [drm:skl_set_power_well] Enabling power well 2
>[  219.728545] [drm:intel_display_power_get] enabling DDI C power well
>[  219.728552] [drm:skl_set_power_well] Enabling DDI C power well
>[  219.728795] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  219.728797] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  219.728800] [drm:intel_display_power_put] disabling DDI C power well
>[  219.728804] [drm:skl_set_power_well] Disabling DDI C power well
>[  219.728806] [drm:intel_display_power_put] disabling power well 2
>[  219.728810] [drm:skl_set_power_well] Disabling power well 2
>[  219.728812] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  219.728823] [drm:drm_mode_setcrtc] [CRTC:20]
>[  219.728826] [drm:intel_crtc_set_config] [CRTC:20] [NOFB]
>[  219.728832] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  219.728835] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [NOCRTC]
>[  219.728837] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  219.728840] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  219.728844] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  219.728849] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[  219.750478] [drm:intel_edp_backlight_off] 
>[  219.951516] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  219.959707] [drm:edp_panel_off] Turn eDP port A panel power off
>[  219.959735] [drm:wait_panel_off] Wait for panel power off time
>[  219.959754] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  220.014593] [drm:wait_panel_status] Wait complete
>[  220.014626] [drm:intel_fbc_update] no output, disabling
>[  220.014635] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880145959d20
>[  220.014642] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880148d69480 state to ffff880145959d20
>[  220.014647] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004ba9000 state to ffff880145959d20
>[  220.014650] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880148d69480 to [NOCRTC]
>[  220.014653] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880148d69480
>[  220.014656] [drm:drm_atomic_check_only] checking ffff880145959d20
>[  220.014662] [drm:drm_atomic_commit] commiting ffff880145959d20
>[  220.014674] [drm:drm_atomic_state_clear] Clearing atomic state ffff880145959d20
>[  220.014678] [drm:drm_atomic_state_free] Freeing atomic state ffff880145959d20
>[  220.014686] [drm:intel_display_power_put] disabling DDI A/E power well
>[  220.014691] [drm:skl_set_power_well] Disabling DDI A/E power well
>[  220.014693] [drm:intel_display_power_put] disabling MISC IO power well
>[  220.014697] [drm:skl_set_power_well] Disabling MISC IO power well
>[  220.014700] [drm:intel_display_power_put] disabling power well 1
>[  220.014705] [drm:skl_set_power_well] Disabling power well 1
>[  220.014737] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  220.014740] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  220.014743] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  220.014746] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  220.014749] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  220.014751] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  220.014754] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  220.014756] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  220.014759] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  220.014762] [drm:check_crtc_state] [CRTC:20]
>[  220.014765] [drm:check_crtc_state] [CRTC:25]
>[  220.014767] [drm:check_crtc_state] [CRTC:30]
>[  220.014771] [drm:check_shared_dpll_state] DPLL 1
>[  220.014774] [drm:check_shared_dpll_state] DPLL 2
>[  220.014776] [drm:check_shared_dpll_state] DPLL 3
>[  220.014806] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  220.014814] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  220.014819] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  220.014824] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  220.014827] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  220.014831] [drm:intel_display_power_get] enabling power well 1
>[  220.014837] [drm:skl_set_power_well] Enabling power well 1
>[  220.014840] [drm:intel_display_power_get] enabling MISC IO power well
>[  220.014844] [drm:skl_set_power_well] Enabling MISC IO power well
>[  220.014847] [drm:intel_display_power_get] enabling DDI A/E power well
>[  220.014850] [drm:skl_set_power_well] Enabling DDI A/E power well
>[  220.014863] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  220.014911] [drm:edp_panel_vdd_on] PP_STATUS: 0x08000001 PP_CONTROL: 0xabcd0008
>[  220.014920] [drm:edp_panel_vdd_on] eDP port A panel power wasn't enabled
>[  220.215970] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  220.216321] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  220.216343] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  220.216350] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  220.216357] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  220.216362] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  220.216376] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  220.216399] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  220.216406] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  220.216410] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  220.216413] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  220.216426] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  220.216429] [drm:intel_display_power_get] enabling power well 2
>[  220.216433] [drm:skl_set_power_well] Enabling power well 2
>[  220.216437] [drm:intel_display_power_get] enabling DDI B power well
>[  220.216440] [drm:skl_set_power_well] Enabling DDI B power well
>[  220.216451] [drm:intel_display_power_put] disabling DDI B power well
>[  220.216454] [drm:skl_set_power_well] Disabling DDI B power well
>[  220.216457] [drm:intel_display_power_put] disabling power well 2
>[  220.216461] [drm:skl_set_power_well] Disabling power well 2
>[  220.216464] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  220.216468] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  220.216472] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  220.216474] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  220.216482] [drm:intel_display_power_get] enabling power well 2
>[  220.216494] [drm:skl_set_power_well] Enabling power well 2
>[  220.216504] [drm:intel_display_power_get] enabling DDI B power well
>[  220.216513] [drm:skl_set_power_well] Enabling DDI B power well
>[  220.216530] [drm:intel_display_power_put] disabling DDI B power well
>[  220.216538] [drm:skl_set_power_well] Disabling DDI B power well
>[  220.216540] [drm:intel_display_power_put] disabling power well 2
>[  220.216545] [drm:skl_set_power_well] Disabling power well 2
>[  220.216548] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  220.216555] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  220.216560] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  220.216564] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  220.216568] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  220.216571] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  220.216574] [drm:intel_display_power_get] enabling power well 2
>[  220.216578] [drm:skl_set_power_well] Enabling power well 2
>[  220.216581] [drm:intel_display_power_get] enabling DDI B power well
>[  220.216585] [drm:skl_set_power_well] Enabling DDI B power well
>[  220.216890] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  220.216897] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  220.216902] [drm:intel_display_power_put] disabling DDI B power well
>[  220.216906] [drm:skl_set_power_well] Disabling DDI B power well
>[  220.216909] [drm:intel_display_power_put] disabling power well 2
>[  220.216913] [drm:skl_set_power_well] Disabling power well 2
>[  220.216917] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  220.216926] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  220.216929] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  220.216932] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  220.216935] [drm:intel_display_power_get] enabling power well 2
>[  220.216939] [drm:skl_set_power_well] Enabling power well 2
>[  220.216942] [drm:intel_display_power_get] enabling DDI B power well
>[  220.216946] [drm:skl_set_power_well] Enabling DDI B power well
>[  220.217196] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  220.217198] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  220.217201] [drm:intel_display_power_put] disabling DDI B power well
>[  220.217205] [drm:skl_set_power_well] Disabling DDI B power well
>[  220.217207] [drm:intel_display_power_put] disabling power well 2
>[  220.217211] [drm:skl_set_power_well] Disabling power well 2
>[  220.217214] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  220.217224] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  220.217230] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  220.217235] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  220.217238] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  220.217241] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  220.217244] [drm:intel_display_power_get] enabling power well 2
>[  220.217247] [drm:skl_set_power_well] Enabling power well 2
>[  220.217251] [drm:intel_display_power_get] enabling DDI C power well
>[  220.217254] [drm:skl_set_power_well] Enabling DDI C power well
>[  220.217264] [drm:intel_display_power_put] disabling DDI C power well
>[  220.217268] [drm:skl_set_power_well] Disabling DDI C power well
>[  220.217270] [drm:intel_display_power_put] disabling power well 2
>[  220.217274] [drm:skl_set_power_well] Disabling power well 2
>[  220.217277] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  220.217281] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  220.217283] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  220.217286] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  220.217288] [drm:intel_display_power_get] enabling power well 2
>[  220.217292] [drm:skl_set_power_well] Enabling power well 2
>[  220.217295] [drm:intel_display_power_get] enabling DDI C power well
>[  220.217298] [drm:skl_set_power_well] Enabling DDI C power well
>[  220.217307] [drm:intel_display_power_put] disabling DDI C power well
>[  220.217311] [drm:skl_set_power_well] Disabling DDI C power well
>[  220.217314] [drm:intel_display_power_put] disabling power well 2
>[  220.217317] [drm:skl_set_power_well] Disabling power well 2
>[  220.217320] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  220.217326] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  220.217331] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  220.217335] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  220.217338] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  220.217340] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  220.217343] [drm:intel_display_power_get] enabling power well 2
>[  220.217346] [drm:skl_set_power_well] Enabling power well 2
>[  220.217349] [drm:intel_display_power_get] enabling DDI C power well
>[  220.217353] [drm:skl_set_power_well] Enabling DDI C power well
>[  220.217548] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  220.217557] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  220.217562] [drm:intel_display_power_put] disabling DDI C power well
>[  220.217568] [drm:skl_set_power_well] Disabling DDI C power well
>[  220.217572] [drm:intel_display_power_put] disabling power well 2
>[  220.217577] [drm:skl_set_power_well] Disabling power well 2
>[  220.217583] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  220.217594] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  220.217598] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  220.217602] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  220.217607] [drm:intel_display_power_get] enabling power well 2
>[  220.217612] [drm:skl_set_power_well] Enabling power well 2
>[  220.217617] [drm:intel_display_power_get] enabling DDI C power well
>[  220.217622] [drm:skl_set_power_well] Enabling DDI C power well
>[  220.217880] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  220.217886] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  220.217890] [drm:intel_display_power_put] disabling DDI C power well
>[  220.217895] [drm:skl_set_power_well] Disabling DDI C power well
>[  220.217899] [drm:intel_display_power_put] disabling power well 2
>[  220.217904] [drm:skl_set_power_well] Disabling power well 2
>[  220.217909] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  220.217928] [drm:drm_mode_setcrtc] [CRTC:20]
>[  220.217934] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1]
>[  220.217938] [drm:intel_crtc_set_config] [CRTC:20] [FB:63] #connectors=1 (x y) (0 0)
>[  220.217943] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  220.217947] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  220.217950] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  220.217953] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  220.217956] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  220.217960] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  220.217964] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  220.217969] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[  220.217974] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[  220.217977] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[  220.217981] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[  220.217984] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[  220.217989] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  220.217992] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  220.217995] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  220.217997] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  220.218002] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  220.218006] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[  220.218010] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  220.218013] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  220.218015] [drm:intel_dump_pipe_config] requested mode:
>[  220.218021] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  220.218023] [drm:intel_dump_pipe_config] adjusted mode:
>[  220.218028] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  220.218033] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[  220.218036] [drm:intel_dump_pipe_config] port clock: 540000
>[  220.218039] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[  220.218042] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  220.218046] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  220.218048] [drm:intel_dump_pipe_config] ips: 0
>[  220.218051] [drm:intel_dump_pipe_config] double wide: 0
>[  220.218063] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880148865ea0
>[  220.218068] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880148dea240 state to ffff880148865ea0
>[  220.218072] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004d5c800 state to ffff880148865ea0
>[  220.218075] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880148dea240 to [CRTC:20]
>[  220.218078] [drm:drm_atomic_set_fb_for_plane] Set [FB:63] for plane state ffff880148dea240
>[  220.218081] [drm:drm_atomic_check_only] checking ffff880148865ea0
>[  220.218088] [drm:drm_atomic_commit] commiting ffff880148865ea0
>[  220.221647] [drm:drm_atomic_state_clear] Clearing atomic state ffff880148865ea0
>[  220.221652] [drm:drm_atomic_state_free] Freeing atomic state ffff880148865ea0
>[  220.221670] [drm:edp_panel_on] Turn eDP port A panel power on
>[  220.221680] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  220.560700] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[  220.560713] [drm:wait_panel_status] Wait complete
>[  220.560737] [drm:wait_panel_on] Wait for panel power on
>[  220.560755] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd000b
>[  220.769689] [drm:wait_panel_status] Wait complete
>[  220.770824] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  220.771474] [drm:intel_dp_set_signal_levels] Using signal levels 04000000
>[  220.772120] [drm:intel_dp_start_link_train] clock recovery OK
>[  220.773071] [drm:intel_dp_set_signal_levels] Using signal levels 05000000
>[  220.774012] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  220.774289] [drm:skl_wm_flush_pipe] flush pipe A (pass 3)
>[  220.774301] [drm:intel_edp_backlight_on] 
>[  220.774304] [drm:intel_panel_enable_backlight] pipe A
>[  220.774344] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  220.774556] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[  220.774568] [drm:skylake_update_primary_plane] Writing base 08CC0000 0,0,3200,1800 pitch=16384
>[  220.774575] [drm:intel_fbc_update] disabled per chip default
>[  220.774590] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[  220.774596] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  220.774600] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  220.774603] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  220.774606] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  220.774608] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  220.774611] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  220.774613] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  220.774616] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  220.774618] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  220.774621] [drm:check_crtc_state] [CRTC:20]
>[  220.774638] [drm:check_crtc_state] [CRTC:25]
>[  220.774640] [drm:check_crtc_state] [CRTC:30]
>[  220.774644] [drm:check_shared_dpll_state] DPLL 1
>[  220.774647] [drm:check_shared_dpll_state] DPLL 2
>[  220.774650] [drm:check_shared_dpll_state] DPLL 3
>[  223.775242] kms_psr_sink_crc: starting subtest primary_blt
>[  223.775303] [drm:add_framebuffer_internal] [FB:65]
>[  223.787296] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[  223.787347] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  223.801540] [drm:add_framebuffer_internal] [FB:66]
>[  223.827590] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  223.827599] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  223.827606] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  223.827611] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  223.827614] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  223.827629] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  223.827677] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[  223.828042] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  223.828374] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  223.828393] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  223.828399] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  223.828405] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  223.828411] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  223.828419] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  223.828442] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  223.828449] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  223.828454] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  223.828457] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  223.828460] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  223.828464] [drm:intel_display_power_get] enabling power well 2
>[  223.828468] [drm:skl_set_power_well] Enabling power well 2
>[  223.828471] [drm:intel_display_power_get] enabling DDI B power well
>[  223.828474] [drm:skl_set_power_well] Enabling DDI B power well
>[  223.828485] [drm:intel_display_power_put] disabling DDI B power well
>[  223.828488] [drm:skl_set_power_well] Disabling DDI B power well
>[  223.828491] [drm:intel_display_power_put] disabling power well 2
>[  223.828495] [drm:skl_set_power_well] Disabling power well 2
>[  223.828498] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  223.828502] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  223.828504] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  223.828507] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  223.828509] [drm:intel_display_power_get] enabling power well 2
>[  223.828513] [drm:skl_set_power_well] Enabling power well 2
>[  223.828516] [drm:intel_display_power_get] enabling DDI B power well
>[  223.828519] [drm:skl_set_power_well] Enabling DDI B power well
>[  223.828528] [drm:intel_display_power_put] disabling DDI B power well
>[  223.828532] [drm:skl_set_power_well] Disabling DDI B power well
>[  223.828534] [drm:intel_display_power_put] disabling power well 2
>[  223.828538] [drm:skl_set_power_well] Disabling power well 2
>[  223.828541] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  223.828548] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  223.828553] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  223.828557] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  223.828560] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  223.828563] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  223.828566] [drm:intel_display_power_get] enabling power well 2
>[  223.828569] [drm:skl_set_power_well] Enabling power well 2
>[  223.828572] [drm:intel_display_power_get] enabling DDI B power well
>[  223.828575] [drm:skl_set_power_well] Enabling DDI B power well
>[  223.828821] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  223.828825] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  223.828828] [drm:intel_display_power_put] disabling DDI B power well
>[  223.828831] [drm:skl_set_power_well] Disabling DDI B power well
>[  223.828834] [drm:intel_display_power_put] disabling power well 2
>[  223.828837] [drm:skl_set_power_well] Disabling power well 2
>[  223.828840] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  223.828844] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  223.828847] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  223.828850] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  223.828852] [drm:intel_display_power_get] enabling power well 2
>[  223.828855] [drm:skl_set_power_well] Enabling power well 2
>[  223.828858] [drm:intel_display_power_get] enabling DDI B power well
>[  223.828862] [drm:skl_set_power_well] Enabling DDI B power well
>[  223.829109] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  223.829113] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  223.829117] [drm:intel_display_power_put] disabling DDI B power well
>[  223.829122] [drm:skl_set_power_well] Disabling DDI B power well
>[  223.829126] [drm:intel_display_power_put] disabling power well 2
>[  223.829130] [drm:skl_set_power_well] Disabling power well 2
>[  223.829135] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  223.829144] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  223.829151] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  223.829157] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  223.829161] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  223.829169] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  223.829178] [drm:intel_display_power_get] enabling power well 2
>[  223.829186] [drm:skl_set_power_well] Enabling power well 2
>[  223.829195] [drm:intel_display_power_get] enabling DDI C power well
>[  223.829200] [drm:skl_set_power_well] Enabling DDI C power well
>[  223.829211] [drm:intel_display_power_put] disabling DDI C power well
>[  223.829216] [drm:skl_set_power_well] Disabling DDI C power well
>[  223.829220] [drm:intel_display_power_put] disabling power well 2
>[  223.829225] [drm:skl_set_power_well] Disabling power well 2
>[  223.829229] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  223.829234] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  223.829238] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  223.829242] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  223.829246] [drm:intel_display_power_get] enabling power well 2
>[  223.829250] [drm:skl_set_power_well] Enabling power well 2
>[  223.829254] [drm:intel_display_power_get] enabling DDI C power well
>[  223.829258] [drm:skl_set_power_well] Enabling DDI C power well
>[  223.829272] [drm:intel_display_power_put] disabling DDI C power well
>[  223.829282] [drm:skl_set_power_well] Disabling DDI C power well
>[  223.829291] [drm:intel_display_power_put] disabling power well 2
>[  223.829296] [drm:skl_set_power_well] Disabling power well 2
>[  223.829300] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  223.829309] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  223.829315] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  223.829322] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  223.829326] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  223.829330] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  223.829334] [drm:intel_display_power_get] enabling power well 2
>[  223.829339] [drm:skl_set_power_well] Enabling power well 2
>[  223.829343] [drm:intel_display_power_get] enabling DDI C power well
>[  223.829347] [drm:skl_set_power_well] Enabling DDI C power well
>[  223.829593] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  223.829596] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  223.829599] [drm:intel_display_power_put] disabling DDI C power well
>[  223.829602] [drm:skl_set_power_well] Disabling DDI C power well
>[  223.829605] [drm:intel_display_power_put] disabling power well 2
>[  223.829608] [drm:skl_set_power_well] Disabling power well 2
>[  223.829611] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  223.829615] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  223.829618] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  223.829620] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  223.829623] [drm:intel_display_power_get] enabling power well 2
>[  223.829626] [drm:skl_set_power_well] Enabling power well 2
>[  223.829629] [drm:intel_display_power_get] enabling DDI C power well
>[  223.829632] [drm:skl_set_power_well] Enabling DDI C power well
>[  223.829875] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  223.829884] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  223.829893] [drm:intel_display_power_put] disabling DDI C power well
>[  223.829904] [drm:skl_set_power_well] Disabling DDI C power well
>[  223.829914] [drm:intel_display_power_put] disabling power well 2
>[  223.829924] [drm:skl_set_power_well] Disabling power well 2
>[  223.829929] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  223.829944] [drm:drm_mode_setcrtc] [CRTC:20]
>[  223.829949] [drm:intel_crtc_set_config] [CRTC:20] [NOFB]
>[  223.829957] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  223.829961] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [NOCRTC]
>[  223.829965] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  223.829970] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  223.829975] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  223.829981] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[  223.851881] [drm:intel_edp_backlight_off] 
>[  224.053115] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  224.061220] [drm:edp_panel_off] Turn eDP port A panel power off
>[  224.061247] [drm:wait_panel_off] Wait for panel power off time
>[  224.061267] [drm:wait_panel_status] mask b0000000 value 00000000 status a0000003 control abcd0000
>[  224.116047] [drm:wait_panel_status] Wait complete
>[  224.116080] [drm:intel_fbc_update] no output, disabling
>[  224.116088] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880145959d20
>[  224.116097] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880148d69480 state to ffff880145959d20
>[  224.116102] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004ba9000 state to ffff880145959d20
>[  224.116105] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880148d69480 to [NOCRTC]
>[  224.116108] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880148d69480
>[  224.116111] [drm:drm_atomic_check_only] checking ffff880145959d20
>[  224.116117] [drm:drm_atomic_commit] commiting ffff880145959d20
>[  224.116129] [drm:drm_atomic_state_clear] Clearing atomic state ffff880145959d20
>[  224.116133] [drm:drm_atomic_state_free] Freeing atomic state ffff880145959d20
>[  224.116141] [drm:intel_display_power_put] disabling DDI A/E power well
>[  224.116146] [drm:skl_set_power_well] Disabling DDI A/E power well
>[  224.116149] [drm:intel_display_power_put] disabling MISC IO power well
>[  224.116153] [drm:skl_set_power_well] Disabling MISC IO power well
>[  224.116155] [drm:intel_display_power_put] disabling power well 1
>[  224.116160] [drm:skl_set_power_well] Disabling power well 1
>[  224.116192] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  224.116196] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  224.116199] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  224.116201] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  224.116204] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  224.116206] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  224.116209] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  224.116212] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  224.116214] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  224.116217] [drm:check_crtc_state] [CRTC:20]
>[  224.116220] [drm:check_crtc_state] [CRTC:25]
>[  224.116223] [drm:check_crtc_state] [CRTC:30]
>[  224.116226] [drm:check_shared_dpll_state] DPLL 1
>[  224.116229] [drm:check_shared_dpll_state] DPLL 2
>[  224.116232] [drm:check_shared_dpll_state] DPLL 3
>[  224.116261] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  224.116269] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  224.116275] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  224.116280] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  224.116283] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  224.116286] [drm:intel_display_power_get] enabling power well 1
>[  224.116293] [drm:skl_set_power_well] Enabling power well 1
>[  224.116296] [drm:intel_display_power_get] enabling MISC IO power well
>[  224.116299] [drm:skl_set_power_well] Enabling MISC IO power well
>[  224.116302] [drm:intel_display_power_get] enabling DDI A/E power well
>[  224.116306] [drm:skl_set_power_well] Enabling DDI A/E power well
>[  224.116319] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  224.116328] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  224.662130] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[  224.662142] [drm:wait_panel_status] Wait complete
>[  224.662183] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  224.662193] [drm:edp_panel_vdd_on] eDP port A panel power wasn't enabled
>[  224.863564] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  224.863915] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  224.863936] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  224.863944] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  224.863950] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  224.863955] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  224.863970] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  224.863993] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  224.864009] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  224.864014] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  224.864017] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  224.864020] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  224.864024] [drm:intel_display_power_get] enabling power well 2
>[  224.864029] [drm:skl_set_power_well] Enabling power well 2
>[  224.864032] [drm:intel_display_power_get] enabling DDI B power well
>[  224.864035] [drm:skl_set_power_well] Enabling DDI B power well
>[  224.864046] [drm:intel_display_power_put] disabling DDI B power well
>[  224.864050] [drm:skl_set_power_well] Disabling DDI B power well
>[  224.864053] [drm:intel_display_power_put] disabling power well 2
>[  224.864057] [drm:skl_set_power_well] Disabling power well 2
>[  224.864071] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  224.864083] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  224.864093] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  224.864103] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  224.864112] [drm:intel_display_power_get] enabling power well 2
>[  224.864116] [drm:skl_set_power_well] Enabling power well 2
>[  224.864119] [drm:intel_display_power_get] enabling DDI B power well
>[  224.864123] [drm:skl_set_power_well] Enabling DDI B power well
>[  224.864132] [drm:intel_display_power_put] disabling DDI B power well
>[  224.864136] [drm:skl_set_power_well] Disabling DDI B power well
>[  224.864139] [drm:intel_display_power_put] disabling power well 2
>[  224.864143] [drm:skl_set_power_well] Disabling power well 2
>[  224.864146] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  224.864153] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  224.864158] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  224.864162] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  224.864166] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  224.864169] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  224.864172] [drm:intel_display_power_get] enabling power well 2
>[  224.864176] [drm:skl_set_power_well] Enabling power well 2
>[  224.864179] [drm:intel_display_power_get] enabling DDI B power well
>[  224.864182] [drm:skl_set_power_well] Enabling DDI B power well
>[  224.864486] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  224.864493] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  224.864498] [drm:intel_display_power_put] disabling DDI B power well
>[  224.864502] [drm:skl_set_power_well] Disabling DDI B power well
>[  224.864504] [drm:intel_display_power_put] disabling power well 2
>[  224.864508] [drm:skl_set_power_well] Disabling power well 2
>[  224.864512] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  224.864522] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  224.864525] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  224.864528] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  224.864531] [drm:intel_display_power_get] enabling power well 2
>[  224.864535] [drm:skl_set_power_well] Enabling power well 2
>[  224.864538] [drm:intel_display_power_get] enabling DDI B power well
>[  224.864541] [drm:skl_set_power_well] Enabling DDI B power well
>[  224.864791] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  224.864794] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  224.864797] [drm:intel_display_power_put] disabling DDI B power well
>[  224.864801] [drm:skl_set_power_well] Disabling DDI B power well
>[  224.864803] [drm:intel_display_power_put] disabling power well 2
>[  224.864807] [drm:skl_set_power_well] Disabling power well 2
>[  224.864810] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  224.864821] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  224.864827] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  224.864831] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  224.864834] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  224.864837] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  224.864840] [drm:intel_display_power_get] enabling power well 2
>[  224.864844] [drm:skl_set_power_well] Enabling power well 2
>[  224.864847] [drm:intel_display_power_get] enabling DDI C power well
>[  224.864850] [drm:skl_set_power_well] Enabling DDI C power well
>[  224.864860] [drm:intel_display_power_put] disabling DDI C power well
>[  224.864864] [drm:skl_set_power_well] Disabling DDI C power well
>[  224.864866] [drm:intel_display_power_put] disabling power well 2
>[  224.864870] [drm:skl_set_power_well] Disabling power well 2
>[  224.864873] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  224.864876] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  224.864879] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  224.864882] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  224.864884] [drm:intel_display_power_get] enabling power well 2
>[  224.864887] [drm:skl_set_power_well] Enabling power well 2
>[  224.864891] [drm:intel_display_power_get] enabling DDI C power well
>[  224.864894] [drm:skl_set_power_well] Enabling DDI C power well
>[  224.864903] [drm:intel_display_power_put] disabling DDI C power well
>[  224.864907] [drm:skl_set_power_well] Disabling DDI C power well
>[  224.864909] [drm:intel_display_power_put] disabling power well 2
>[  224.864913] [drm:skl_set_power_well] Disabling power well 2
>[  224.864916] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  224.864922] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  224.864927] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  224.864931] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  224.864934] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  224.864936] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  224.864939] [drm:intel_display_power_get] enabling power well 2
>[  224.864942] [drm:skl_set_power_well] Enabling power well 2
>[  224.864945] [drm:intel_display_power_get] enabling DDI C power well
>[  224.864949] [drm:skl_set_power_well] Enabling DDI C power well
>[  224.865211] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  224.865218] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  224.865222] [drm:intel_display_power_put] disabling DDI C power well
>[  224.865227] [drm:skl_set_power_well] Disabling DDI C power well
>[  224.865231] [drm:intel_display_power_put] disabling power well 2
>[  224.865237] [drm:skl_set_power_well] Disabling power well 2
>[  224.865242] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  224.865250] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  224.865254] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  224.865258] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  224.865262] [drm:intel_display_power_get] enabling power well 2
>[  224.865267] [drm:skl_set_power_well] Enabling power well 2
>[  224.865272] [drm:intel_display_power_get] enabling DDI C power well
>[  224.865277] [drm:skl_set_power_well] Enabling DDI C power well
>[  224.865539] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  224.865546] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  224.865550] [drm:intel_display_power_put] disabling DDI C power well
>[  224.865554] [drm:skl_set_power_well] Disabling DDI C power well
>[  224.865556] [drm:intel_display_power_put] disabling power well 2
>[  224.865560] [drm:skl_set_power_well] Disabling power well 2
>[  224.865564] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  224.865583] [drm:drm_mode_setcrtc] [CRTC:20]
>[  224.865590] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1]
>[  224.865595] [drm:intel_crtc_set_config] [CRTC:20] [FB:65] #connectors=1 (x y) (0 0)
>[  224.865600] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  224.865603] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  224.865606] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  224.865610] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  224.865613] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  224.865616] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  224.865621] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  224.865625] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[  224.865630] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[  224.865633] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[  224.865637] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[  224.865640] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[  224.865645] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  224.865648] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  224.865651] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  224.865654] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  224.865658] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  224.865662] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[  224.865666] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  224.865669] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  224.865671] [drm:intel_dump_pipe_config] requested mode:
>[  224.865677] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  224.865680] [drm:intel_dump_pipe_config] adjusted mode:
>[  224.865684] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  224.865689] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[  224.865692] [drm:intel_dump_pipe_config] port clock: 540000
>[  224.865695] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[  224.865698] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  224.865701] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  224.865704] [drm:intel_dump_pipe_config] ips: 0
>[  224.865706] [drm:intel_dump_pipe_config] double wide: 0
>[  224.865718] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880148865900
>[  224.865724] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880148dea6c0 state to ffff880148865900
>[  224.865728] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004d5b800 state to ffff880148865900
>[  224.865731] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880148dea6c0 to [CRTC:20]
>[  224.865734] [drm:drm_atomic_set_fb_for_plane] Set [FB:65] for plane state ffff880148dea6c0
>[  224.865737] [drm:drm_atomic_check_only] checking ffff880148865900
>[  224.865744] [drm:drm_atomic_commit] commiting ffff880148865900
>[  224.869320] [drm:drm_atomic_state_clear] Clearing atomic state ffff880148865900
>[  224.869326] [drm:drm_atomic_state_free] Freeing atomic state ffff880148865900
>[  224.869344] [drm:edp_panel_on] Turn eDP port A panel power on
>[  224.869353] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  224.869372] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[  224.869381] [drm:wait_panel_status] Wait complete
>[  224.869405] [drm:wait_panel_on] Wait for panel power on
>[  224.869422] [drm:wait_panel_status] mask b000000f value 80000008 status 9000000a control abcd000b
>[  225.078079] [drm:wait_panel_status] Wait complete
>[  225.079213] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  225.079865] [drm:intel_dp_set_signal_levels] Using signal levels 04000000
>[  225.080525] [drm:intel_dp_start_link_train] clock recovery OK
>[  225.081476] [drm:intel_dp_set_signal_levels] Using signal levels 05000000
>[  225.082417] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  225.082695] [drm:skl_wm_flush_pipe] flush pipe A (pass 3)
>[  225.082707] [drm:intel_edp_backlight_on] 
>[  225.082711] [drm:intel_panel_enable_backlight] pipe A
>[  225.082750] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  225.082954] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[  225.082964] [drm:skylake_update_primary_plane] Writing base 0CCC0000 0,0,3200,1800 pitch=16384
>[  225.082971] [drm:intel_fbc_update] disabled per chip default
>[  225.082985] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[  225.082990] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  225.082994] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  225.082997] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  225.083000] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  225.083003] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  225.083005] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  225.083008] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  225.083010] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  225.083013] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  225.083015] [drm:check_crtc_state] [CRTC:20]
>[  225.083037] [drm:check_crtc_state] [CRTC:25]
>[  225.083040] [drm:check_crtc_state] [CRTC:30]
>[  225.083043] [drm:check_shared_dpll_state] DPLL 1
>[  225.083047] [drm:check_shared_dpll_state] DPLL 2
>[  225.083050] [drm:check_shared_dpll_state] DPLL 3
>[  228.083872] kms_psr_sink_crc: starting subtest primary_render
>[  228.083929] [drm:add_framebuffer_internal] [FB:67]
>[  228.088493] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[  228.088537] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  228.110078] [drm:add_framebuffer_internal] [FB:68]
>[  228.136166] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  228.136178] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  228.136184] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  228.136189] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  228.136193] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  228.136208] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  228.136256] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[  228.136622] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  228.136957] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  228.136977] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  228.136986] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  228.136992] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  228.136998] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  228.137008] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  228.137028] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  228.137035] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  228.137039] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  228.137042] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  228.137045] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  228.137049] [drm:intel_display_power_get] enabling power well 2
>[  228.137053] [drm:skl_set_power_well] Enabling power well 2
>[  228.137056] [drm:intel_display_power_get] enabling DDI B power well
>[  228.137059] [drm:skl_set_power_well] Enabling DDI B power well
>[  228.137069] [drm:intel_display_power_put] disabling DDI B power well
>[  228.137073] [drm:skl_set_power_well] Disabling DDI B power well
>[  228.137075] [drm:intel_display_power_put] disabling power well 2
>[  228.137079] [drm:skl_set_power_well] Disabling power well 2
>[  228.137082] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  228.137086] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  228.137088] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  228.137091] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  228.137093] [drm:intel_display_power_get] enabling power well 2
>[  228.137097] [drm:skl_set_power_well] Enabling power well 2
>[  228.137100] [drm:intel_display_power_get] enabling DDI B power well
>[  228.137103] [drm:skl_set_power_well] Enabling DDI B power well
>[  228.137112] [drm:intel_display_power_put] disabling DDI B power well
>[  228.137116] [drm:skl_set_power_well] Disabling DDI B power well
>[  228.137118] [drm:intel_display_power_put] disabling power well 2
>[  228.137122] [drm:skl_set_power_well] Disabling power well 2
>[  228.137124] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  228.137132] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  228.137137] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  228.137141] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  228.137144] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  228.137147] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  228.137150] [drm:intel_display_power_get] enabling power well 2
>[  228.137153] [drm:skl_set_power_well] Enabling power well 2
>[  228.137156] [drm:intel_display_power_get] enabling DDI B power well
>[  228.137160] [drm:skl_set_power_well] Enabling DDI B power well
>[  228.137406] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  228.137422] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  228.137425] [drm:intel_display_power_put] disabling DDI B power well
>[  228.137429] [drm:skl_set_power_well] Disabling DDI B power well
>[  228.137431] [drm:intel_display_power_put] disabling power well 2
>[  228.137435] [drm:skl_set_power_well] Disabling power well 2
>[  228.137438] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  228.137442] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  228.137445] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  228.137447] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  228.137450] [drm:intel_display_power_get] enabling power well 2
>[  228.137453] [drm:skl_set_power_well] Enabling power well 2
>[  228.137456] [drm:intel_display_power_get] enabling DDI B power well
>[  228.137459] [drm:skl_set_power_well] Enabling DDI B power well
>[  228.137703] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  228.137706] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  228.137708] [drm:intel_display_power_put] disabling DDI B power well
>[  228.137712] [drm:skl_set_power_well] Disabling DDI B power well
>[  228.137714] [drm:intel_display_power_put] disabling power well 2
>[  228.137717] [drm:skl_set_power_well] Disabling power well 2
>[  228.137720] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  228.137727] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  228.137732] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  228.137736] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  228.137739] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  228.137742] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  228.137744] [drm:intel_display_power_get] enabling power well 2
>[  228.137748] [drm:skl_set_power_well] Enabling power well 2
>[  228.137751] [drm:intel_display_power_get] enabling DDI C power well
>[  228.137754] [drm:skl_set_power_well] Enabling DDI C power well
>[  228.137763] [drm:intel_display_power_put] disabling DDI C power well
>[  228.137767] [drm:skl_set_power_well] Disabling DDI C power well
>[  228.137769] [drm:intel_display_power_put] disabling power well 2
>[  228.137773] [drm:skl_set_power_well] Disabling power well 2
>[  228.137776] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  228.137779] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  228.137782] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  228.137784] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  228.137799] [drm:intel_display_power_get] enabling power well 2
>[  228.137813] [drm:skl_set_power_well] Enabling power well 2
>[  228.137827] [drm:intel_display_power_get] enabling DDI C power well
>[  228.137840] [drm:skl_set_power_well] Enabling DDI C power well
>[  228.137860] [drm:intel_display_power_put] disabling DDI C power well
>[  228.137867] [drm:skl_set_power_well] Disabling DDI C power well
>[  228.137869] [drm:intel_display_power_put] disabling power well 2
>[  228.137873] [drm:skl_set_power_well] Disabling power well 2
>[  228.137876] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  228.137881] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  228.137886] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  228.137890] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  228.137893] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  228.137895] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  228.137898] [drm:intel_display_power_get] enabling power well 2
>[  228.137901] [drm:skl_set_power_well] Enabling power well 2
>[  228.137904] [drm:intel_display_power_get] enabling DDI C power well
>[  228.137907] [drm:skl_set_power_well] Enabling DDI C power well
>[  228.138150] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  228.138153] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  228.138156] [drm:intel_display_power_put] disabling DDI C power well
>[  228.138159] [drm:skl_set_power_well] Disabling DDI C power well
>[  228.138161] [drm:intel_display_power_put] disabling power well 2
>[  228.138165] [drm:skl_set_power_well] Disabling power well 2
>[  228.138168] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  228.138171] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  228.138174] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  228.138177] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  228.138179] [drm:intel_display_power_get] enabling power well 2
>[  228.138182] [drm:skl_set_power_well] Enabling power well 2
>[  228.138185] [drm:intel_display_power_get] enabling DDI C power well
>[  228.138189] [drm:skl_set_power_well] Enabling DDI C power well
>[  228.138435] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  228.138438] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  228.138440] [drm:intel_display_power_put] disabling DDI C power well
>[  228.138444] [drm:skl_set_power_well] Disabling DDI C power well
>[  228.138446] [drm:intel_display_power_put] disabling power well 2
>[  228.138450] [drm:skl_set_power_well] Disabling power well 2
>[  228.138452] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  228.138463] [drm:drm_mode_setcrtc] [CRTC:20]
>[  228.138467] [drm:intel_crtc_set_config] [CRTC:20] [NOFB]
>[  228.138483] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  228.138493] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [NOCRTC]
>[  228.138503] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  228.138513] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  228.138523] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  228.138533] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[  228.160420] [drm:intel_edp_backlight_off] 
>[  228.361655] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  228.369757] [drm:edp_panel_off] Turn eDP port A panel power off
>[  228.369785] [drm:wait_panel_off] Wait for panel power off time
>[  228.369804] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  228.424644] [drm:wait_panel_status] Wait complete
>[  228.424677] [drm:intel_fbc_update] no output, disabling
>[  228.424685] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880145959d20
>[  228.424693] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88009bae59c0 state to ffff880145959d20
>[  228.424697] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004ba9000 state to ffff880145959d20
>[  228.424700] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88009bae59c0 to [NOCRTC]
>[  228.424704] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88009bae59c0
>[  228.424706] [drm:drm_atomic_check_only] checking ffff880145959d20
>[  228.424712] [drm:drm_atomic_commit] commiting ffff880145959d20
>[  228.424724] [drm:drm_atomic_state_clear] Clearing atomic state ffff880145959d20
>[  228.424729] [drm:drm_atomic_state_free] Freeing atomic state ffff880145959d20
>[  228.424737] [drm:intel_display_power_put] disabling DDI A/E power well
>[  228.424742] [drm:skl_set_power_well] Disabling DDI A/E power well
>[  228.424744] [drm:intel_display_power_put] disabling MISC IO power well
>[  228.424748] [drm:skl_set_power_well] Disabling MISC IO power well
>[  228.424751] [drm:intel_display_power_put] disabling power well 1
>[  228.424756] [drm:skl_set_power_well] Disabling power well 1
>[  228.424788] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  228.424791] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  228.424794] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  228.424797] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  228.424799] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  228.424802] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  228.424805] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  228.424807] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  228.424810] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  228.424813] [drm:check_crtc_state] [CRTC:20]
>[  228.424816] [drm:check_crtc_state] [CRTC:25]
>[  228.424819] [drm:check_crtc_state] [CRTC:30]
>[  228.424822] [drm:check_shared_dpll_state] DPLL 1
>[  228.424825] [drm:check_shared_dpll_state] DPLL 2
>[  228.424827] [drm:check_shared_dpll_state] DPLL 3
>[  228.424858] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  228.424866] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  228.424872] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  228.424876] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  228.424879] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  228.424883] [drm:intel_display_power_get] enabling power well 1
>[  228.424889] [drm:skl_set_power_well] Enabling power well 1
>[  228.424893] [drm:intel_display_power_get] enabling MISC IO power well
>[  228.424896] [drm:skl_set_power_well] Enabling MISC IO power well
>[  228.424899] [drm:intel_display_power_get] enabling DDI A/E power well
>[  228.424902] [drm:skl_set_power_well] Enabling DDI A/E power well
>[  228.424916] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  228.424925] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  228.970661] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[  228.970673] [drm:wait_panel_status] Wait complete
>[  228.970714] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  228.970724] [drm:edp_panel_vdd_on] eDP port A panel power wasn't enabled
>[  229.172116] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  229.172467] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  229.172487] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  229.172494] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  229.172500] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  229.172506] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  229.172520] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  229.172553] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  229.172560] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  229.172564] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  229.172568] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  229.172570] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  229.172574] [drm:intel_display_power_get] enabling power well 2
>[  229.172579] [drm:skl_set_power_well] Enabling power well 2
>[  229.172582] [drm:intel_display_power_get] enabling DDI B power well
>[  229.172585] [drm:skl_set_power_well] Enabling DDI B power well
>[  229.172596] [drm:intel_display_power_put] disabling DDI B power well
>[  229.172610] [drm:skl_set_power_well] Disabling DDI B power well
>[  229.172620] [drm:intel_display_power_put] disabling power well 2
>[  229.172631] [drm:skl_set_power_well] Disabling power well 2
>[  229.172641] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  229.172645] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  229.172648] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  229.172650] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  229.172653] [drm:intel_display_power_get] enabling power well 2
>[  229.172656] [drm:skl_set_power_well] Enabling power well 2
>[  229.172659] [drm:intel_display_power_get] enabling DDI B power well
>[  229.172663] [drm:skl_set_power_well] Enabling DDI B power well
>[  229.172673] [drm:intel_display_power_put] disabling DDI B power well
>[  229.172676] [drm:skl_set_power_well] Disabling DDI B power well
>[  229.172679] [drm:intel_display_power_put] disabling power well 2
>[  229.172683] [drm:skl_set_power_well] Disabling power well 2
>[  229.172686] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  229.172694] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  229.172700] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  229.172704] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  229.172708] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  229.172711] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  229.172714] [drm:intel_display_power_get] enabling power well 2
>[  229.172718] [drm:skl_set_power_well] Enabling power well 2
>[  229.172721] [drm:intel_display_power_get] enabling DDI B power well
>[  229.172724] [drm:skl_set_power_well] Enabling DDI B power well
>[  229.173028] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  229.173035] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  229.173039] [drm:intel_display_power_put] disabling DDI B power well
>[  229.173043] [drm:skl_set_power_well] Disabling DDI B power well
>[  229.173046] [drm:intel_display_power_put] disabling power well 2
>[  229.173050] [drm:skl_set_power_well] Disabling power well 2
>[  229.173054] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  229.173063] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  229.173066] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  229.173069] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  229.173073] [drm:intel_display_power_get] enabling power well 2
>[  229.173076] [drm:skl_set_power_well] Enabling power well 2
>[  229.173080] [drm:intel_display_power_get] enabling DDI B power well
>[  229.173083] [drm:skl_set_power_well] Enabling DDI B power well
>[  229.173333] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  229.173336] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  229.173338] [drm:intel_display_power_put] disabling DDI B power well
>[  229.173342] [drm:skl_set_power_well] Disabling DDI B power well
>[  229.173345] [drm:intel_display_power_put] disabling power well 2
>[  229.173348] [drm:skl_set_power_well] Disabling power well 2
>[  229.173351] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  229.173363] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  229.173368] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  229.173373] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  229.173377] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  229.173380] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  229.173382] [drm:intel_display_power_get] enabling power well 2
>[  229.173386] [drm:skl_set_power_well] Enabling power well 2
>[  229.173389] [drm:intel_display_power_get] enabling DDI C power well
>[  229.173392] [drm:skl_set_power_well] Enabling DDI C power well
>[  229.173402] [drm:intel_display_power_put] disabling DDI C power well
>[  229.173406] [drm:skl_set_power_well] Disabling DDI C power well
>[  229.173409] [drm:intel_display_power_put] disabling power well 2
>[  229.173412] [drm:skl_set_power_well] Disabling power well 2
>[  229.173415] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  229.173419] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  229.173421] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  229.173424] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  229.173426] [drm:intel_display_power_get] enabling power well 2
>[  229.173430] [drm:skl_set_power_well] Enabling power well 2
>[  229.173433] [drm:intel_display_power_get] enabling DDI C power well
>[  229.173436] [drm:skl_set_power_well] Enabling DDI C power well
>[  229.173446] [drm:intel_display_power_put] disabling DDI C power well
>[  229.173449] [drm:skl_set_power_well] Disabling DDI C power well
>[  229.173452] [drm:intel_display_power_put] disabling power well 2
>[  229.173456] [drm:skl_set_power_well] Disabling power well 2
>[  229.173458] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  229.173464] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  229.173469] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  229.173473] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  229.173476] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  229.173479] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  229.173481] [drm:intel_display_power_get] enabling power well 2
>[  229.173485] [drm:skl_set_power_well] Enabling power well 2
>[  229.173488] [drm:intel_display_power_get] enabling DDI C power well
>[  229.173491] [drm:skl_set_power_well] Enabling DDI C power well
>[  229.173753] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  229.173759] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  229.173763] [drm:intel_display_power_put] disabling DDI C power well
>[  229.173769] [drm:skl_set_power_well] Disabling DDI C power well
>[  229.173773] [drm:intel_display_power_put] disabling power well 2
>[  229.173778] [drm:skl_set_power_well] Disabling power well 2
>[  229.173783] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  229.173791] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  229.173795] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  229.173799] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  229.173804] [drm:intel_display_power_get] enabling power well 2
>[  229.173808] [drm:skl_set_power_well] Enabling power well 2
>[  229.173813] [drm:intel_display_power_get] enabling DDI C power well
>[  229.173817] [drm:skl_set_power_well] Enabling DDI C power well
>[  229.174079] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  229.174086] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  229.174090] [drm:intel_display_power_put] disabling DDI C power well
>[  229.174095] [drm:skl_set_power_well] Disabling DDI C power well
>[  229.174098] [drm:intel_display_power_put] disabling power well 2
>[  229.174102] [drm:skl_set_power_well] Disabling power well 2
>[  229.174106] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  229.174125] [drm:drm_mode_setcrtc] [CRTC:20]
>[  229.174131] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1]
>[  229.174136] [drm:intel_crtc_set_config] [CRTC:20] [FB:67] #connectors=1 (x y) (0 0)
>[  229.174141] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  229.174145] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  229.174148] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  229.174151] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  229.174154] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  229.174157] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  229.174162] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  229.174166] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[  229.174172] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[  229.174175] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[  229.174178] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[  229.174182] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[  229.174186] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  229.174190] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  229.174192] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  229.174195] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  229.174200] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  229.174204] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[  229.174208] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  229.174211] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  229.174213] [drm:intel_dump_pipe_config] requested mode:
>[  229.174219] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  229.174222] [drm:intel_dump_pipe_config] adjusted mode:
>[  229.174226] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  229.174231] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[  229.174234] [drm:intel_dump_pipe_config] port clock: 540000
>[  229.174237] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[  229.174240] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  229.174243] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  229.174246] [drm:intel_dump_pipe_config] ips: 0
>[  229.174248] [drm:intel_dump_pipe_config] double wide: 0
>[  229.174261] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880148865660
>[  229.174266] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880148dea180 state to ffff880148865660
>[  229.174271] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004d5c800 state to ffff880148865660
>[  229.174274] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880148dea180 to [CRTC:20]
>[  229.174277] [drm:drm_atomic_set_fb_for_plane] Set [FB:67] for plane state ffff880148dea180
>[  229.174280] [drm:drm_atomic_check_only] checking ffff880148865660
>[  229.174287] [drm:drm_atomic_commit] commiting ffff880148865660
>[  229.177866] [drm:drm_atomic_state_clear] Clearing atomic state ffff880148865660
>[  229.177871] [drm:drm_atomic_state_free] Freeing atomic state ffff880148865660
>[  229.177889] [drm:edp_panel_on] Turn eDP port A panel power on
>[  229.177899] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  229.177917] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[  229.177925] [drm:wait_panel_status] Wait complete
>[  229.177949] [drm:wait_panel_on] Wait for panel power on
>[  229.177967] [drm:wait_panel_status] mask b000000f value 80000008 status 9000000a control abcd000b
>[  229.386754] [drm:wait_panel_status] Wait complete
>[  229.387905] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  229.388557] [drm:intel_dp_set_signal_levels] Using signal levels 04000000
>[  229.389206] [drm:intel_dp_start_link_train] clock recovery OK
>[  229.390156] [drm:intel_dp_set_signal_levels] Using signal levels 05000000
>[  229.391096] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  229.391374] [drm:skl_wm_flush_pipe] flush pipe A (pass 3)
>[  229.391386] [drm:intel_edp_backlight_on] 
>[  229.391389] [drm:intel_panel_enable_backlight] pipe A
>[  229.391429] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  229.391641] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[  229.391652] [drm:skylake_update_primary_plane] Writing base 04CC0000 0,0,3200,1800 pitch=16384
>[  229.391659] [drm:intel_fbc_update] disabled per chip default
>[  229.391674] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[  229.391680] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  229.391684] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  229.391687] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  229.391690] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  229.391692] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  229.391695] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  229.391697] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  229.391700] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  229.391702] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  229.391705] [drm:check_crtc_state] [CRTC:20]
>[  229.391722] [drm:check_crtc_state] [CRTC:25]
>[  229.391725] [drm:check_crtc_state] [CRTC:30]
>[  229.391728] [drm:check_shared_dpll_state] DPLL 1
>[  229.391731] [drm:check_shared_dpll_state] DPLL 2
>[  229.391734] [drm:check_shared_dpll_state] DPLL 3
>[  232.392325] kms_psr_sink_crc: starting subtest sprite_mmap_gtt
>[  232.392398] [drm:add_framebuffer_internal] [FB:69]
>[  232.404335] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[  232.404380] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  232.418519] [drm:add_framebuffer_internal] [FB:70]
>[  232.425115] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  232.425125] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  232.425131] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  232.425137] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  232.425140] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  232.425154] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  232.425202] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[  232.425551] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  232.425881] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  232.425899] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  232.425905] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  232.425911] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  232.425916] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  232.425922] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  232.425940] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  232.425958] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  232.425971] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  232.425982] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  232.425991] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  232.426005] [drm:intel_display_power_get] enabling power well 2
>[  232.426011] [drm:skl_set_power_well] Enabling power well 2
>[  232.426015] [drm:intel_display_power_get] enabling DDI B power well
>[  232.426019] [drm:skl_set_power_well] Enabling DDI B power well
>[  232.426029] [drm:intel_display_power_put] disabling DDI B power well
>[  232.426034] [drm:skl_set_power_well] Disabling DDI B power well
>[  232.426037] [drm:intel_display_power_put] disabling power well 2
>[  232.426042] [drm:skl_set_power_well] Disabling power well 2
>[  232.426046] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  232.426052] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  232.426056] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  232.426060] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  232.426064] [drm:intel_display_power_get] enabling power well 2
>[  232.426068] [drm:skl_set_power_well] Enabling power well 2
>[  232.426073] [drm:intel_display_power_get] enabling DDI B power well
>[  232.426078] [drm:skl_set_power_well] Enabling DDI B power well
>[  232.426089] [drm:intel_display_power_put] disabling DDI B power well
>[  232.426094] [drm:skl_set_power_well] Disabling DDI B power well
>[  232.426097] [drm:intel_display_power_put] disabling power well 2
>[  232.426102] [drm:skl_set_power_well] Disabling power well 2
>[  232.426106] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  232.426117] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  232.426124] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  232.426132] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  232.426143] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  232.426154] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  232.426162] [drm:intel_display_power_get] enabling power well 2
>[  232.426173] [drm:skl_set_power_well] Enabling power well 2
>[  232.426183] [drm:intel_display_power_get] enabling DDI B power well
>[  232.426190] [drm:skl_set_power_well] Enabling DDI B power well
>[  232.426439] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  232.426442] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  232.426446] [drm:intel_display_power_put] disabling DDI B power well
>[  232.426449] [drm:skl_set_power_well] Disabling DDI B power well
>[  232.426452] [drm:intel_display_power_put] disabling power well 2
>[  232.426455] [drm:skl_set_power_well] Disabling power well 2
>[  232.426458] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  232.426463] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  232.426465] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  232.426468] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  232.426471] [drm:intel_display_power_get] enabling power well 2
>[  232.426474] [drm:skl_set_power_well] Enabling power well 2
>[  232.426477] [drm:intel_display_power_get] enabling DDI B power well
>[  232.426480] [drm:skl_set_power_well] Enabling DDI B power well
>[  232.426723] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  232.426726] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  232.426728] [drm:intel_display_power_put] disabling DDI B power well
>[  232.426732] [drm:skl_set_power_well] Disabling DDI B power well
>[  232.426734] [drm:intel_display_power_put] disabling power well 2
>[  232.426738] [drm:skl_set_power_well] Disabling power well 2
>[  232.426740] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  232.426748] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  232.426753] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  232.426757] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  232.426760] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  232.426762] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  232.426765] [drm:intel_display_power_get] enabling power well 2
>[  232.426768] [drm:skl_set_power_well] Enabling power well 2
>[  232.426772] [drm:intel_display_power_get] enabling DDI C power well
>[  232.426775] [drm:skl_set_power_well] Enabling DDI C power well
>[  232.426784] [drm:intel_display_power_put] disabling DDI C power well
>[  232.426788] [drm:skl_set_power_well] Disabling DDI C power well
>[  232.426790] [drm:intel_display_power_put] disabling power well 2
>[  232.426794] [drm:skl_set_power_well] Disabling power well 2
>[  232.426797] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  232.426800] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  232.426803] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  232.426805] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  232.426808] [drm:intel_display_power_get] enabling power well 2
>[  232.426811] [drm:skl_set_power_well] Enabling power well 2
>[  232.426814] [drm:intel_display_power_get] enabling DDI C power well
>[  232.426817] [drm:skl_set_power_well] Enabling DDI C power well
>[  232.426826] [drm:intel_display_power_put] disabling DDI C power well
>[  232.426830] [drm:skl_set_power_well] Disabling DDI C power well
>[  232.426832] [drm:intel_display_power_put] disabling power well 2
>[  232.426836] [drm:skl_set_power_well] Disabling power well 2
>[  232.426839] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  232.426844] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  232.426849] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  232.426853] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  232.426856] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  232.426859] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  232.426861] [drm:intel_display_power_get] enabling power well 2
>[  232.426865] [drm:skl_set_power_well] Enabling power well 2
>[  232.426868] [drm:intel_display_power_get] enabling DDI C power well
>[  232.426871] [drm:skl_set_power_well] Enabling DDI C power well
>[  232.427066] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  232.427075] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  232.427080] [drm:intel_display_power_put] disabling DDI C power well
>[  232.427086] [drm:skl_set_power_well] Disabling DDI C power well
>[  232.427090] [drm:intel_display_power_put] disabling power well 2
>[  232.427095] [drm:skl_set_power_well] Disabling power well 2
>[  232.427101] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  232.427112] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  232.427117] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  232.427121] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  232.427126] [drm:intel_display_power_get] enabling power well 2
>[  232.427131] [drm:skl_set_power_well] Enabling power well 2
>[  232.427136] [drm:intel_display_power_get] enabling DDI C power well
>[  232.427140] [drm:skl_set_power_well] Enabling DDI C power well
>[  232.427397] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  232.427402] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  232.427407] [drm:intel_display_power_put] disabling DDI C power well
>[  232.427412] [drm:skl_set_power_well] Disabling DDI C power well
>[  232.427415] [drm:intel_display_power_put] disabling power well 2
>[  232.427420] [drm:skl_set_power_well] Disabling power well 2
>[  232.427424] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  232.427440] [drm:drm_mode_setcrtc] [CRTC:20]
>[  232.427444] [drm:intel_crtc_set_config] [CRTC:20] [NOFB]
>[  232.427450] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  232.427454] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [NOCRTC]
>[  232.427456] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  232.427459] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  232.427463] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  232.427467] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[  232.427481] [drm:intel_edp_backlight_off] 
>[  232.628154] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  232.644303] [drm:edp_panel_off] Turn eDP port A panel power off
>[  232.644330] [drm:wait_panel_off] Wait for panel power off time
>[  232.644350] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  232.699117] [drm:wait_panel_status] Wait complete
>[  232.699150] [drm:intel_fbc_update] no output, disabling
>[  232.699159] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880145959d20
>[  232.699167] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88009bae5f00 state to ffff880145959d20
>[  232.699172] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004ba9000 state to ffff880145959d20
>[  232.699175] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88009bae5f00 to [NOCRTC]
>[  232.699178] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88009bae5f00
>[  232.699181] [drm:drm_atomic_check_only] checking ffff880145959d20
>[  232.699187] [drm:drm_atomic_commit] commiting ffff880145959d20
>[  232.699199] [drm:drm_atomic_state_clear] Clearing atomic state ffff880145959d20
>[  232.699204] [drm:drm_atomic_state_free] Freeing atomic state ffff880145959d20
>[  232.699211] [drm:intel_display_power_put] disabling DDI A/E power well
>[  232.699216] [drm:skl_set_power_well] Disabling DDI A/E power well
>[  232.699218] [drm:intel_display_power_put] disabling MISC IO power well
>[  232.699222] [drm:skl_set_power_well] Disabling MISC IO power well
>[  232.699225] [drm:intel_display_power_put] disabling power well 1
>[  232.699230] [drm:skl_set_power_well] Disabling power well 1
>[  232.699262] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  232.699265] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  232.699268] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  232.699270] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  232.699273] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  232.699276] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  232.699278] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  232.699281] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  232.699283] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  232.699286] [drm:check_crtc_state] [CRTC:20]
>[  232.699289] [drm:check_crtc_state] [CRTC:25]
>[  232.699292] [drm:check_crtc_state] [CRTC:30]
>[  232.699295] [drm:check_shared_dpll_state] DPLL 1
>[  232.699298] [drm:check_shared_dpll_state] DPLL 2
>[  232.699300] [drm:check_shared_dpll_state] DPLL 3
>[  232.699367] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880145959d20
>[  232.699369] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88009bae5b40 state to ffff880145959d20
>[  232.699371] [drm:drm_atomic_check_only] checking ffff880145959d20
>[  232.699374] [drm:drm_atomic_commit] commiting ffff880145959d20
>[  232.699376] [drm:drm_atomic_state_clear] Clearing atomic state ffff880145959d20
>[  232.699378] [drm:drm_atomic_state_free] Freeing atomic state ffff880145959d20
>[  232.699380] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880145959d20
>[  232.699382] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff88009bae5f00 state to ffff880145959d20
>[  232.699383] [drm:drm_atomic_check_only] checking ffff880145959d20
>[  232.699385] [drm:drm_atomic_commit] commiting ffff880145959d20
>[  232.699387] [drm:drm_atomic_state_clear] Clearing atomic state ffff880145959d20
>[  232.699389] [drm:drm_atomic_state_free] Freeing atomic state ffff880145959d20
>[  232.699391] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880145959d20
>[  232.699393] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff88009bae5900 state to ffff880145959d20
>[  232.699395] [drm:drm_atomic_check_only] checking ffff880145959d20
>[  232.699396] [drm:drm_atomic_commit] commiting ffff880145959d20
>[  232.699398] [drm:drm_atomic_state_clear] Clearing atomic state ffff880145959d20
>[  232.699400] [drm:drm_atomic_state_free] Freeing atomic state ffff880145959d20
>[  232.699402] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880145959d20
>[  232.699404] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88009bae5780 state to ffff880145959d20
>[  232.699405] [drm:drm_atomic_check_only] checking ffff880145959d20
>[  232.699407] [drm:drm_atomic_commit] commiting ffff880145959d20
>[  232.699409] [drm:drm_atomic_state_clear] Clearing atomic state ffff880145959d20
>[  232.699410] [drm:drm_atomic_state_free] Freeing atomic state ffff880145959d20
>[  232.699412] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880145959d20
>[  232.699414] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88009bae50c0 state to ffff880145959d20
>[  232.699416] [drm:drm_atomic_check_only] checking ffff880145959d20
>[  232.699417] [drm:drm_atomic_commit] commiting ffff880145959d20
>[  232.699419] [drm:drm_atomic_state_clear] Clearing atomic state ffff880145959d20
>[  232.699420] [drm:drm_atomic_state_free] Freeing atomic state ffff880145959d20
>[  232.699423] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880145959d20
>[  232.699424] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88009bae5000 state to ffff880145959d20
>[  232.699426] [drm:drm_atomic_check_only] checking ffff880145959d20
>[  232.699427] [drm:drm_atomic_commit] commiting ffff880145959d20
>[  232.699429] [drm:drm_atomic_state_clear] Clearing atomic state ffff880145959d20
>[  232.699430] [drm:drm_atomic_state_free] Freeing atomic state ffff880145959d20
>[  232.699432] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880145959d20
>[  232.699434] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88009bae5840 state to ffff880145959d20
>[  232.699436] [drm:drm_atomic_check_only] checking ffff880145959d20
>[  232.699437] [drm:drm_atomic_commit] commiting ffff880145959d20
>[  232.699439] [drm:drm_atomic_state_clear] Clearing atomic state ffff880145959d20
>[  232.699440] [drm:drm_atomic_state_free] Freeing atomic state ffff880145959d20
>[  232.699442] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880145959d20
>[  232.699445] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff88009bae59c0 state to ffff880145959d20
>[  232.699446] [drm:drm_atomic_check_only] checking ffff880145959d20
>[  232.699447] [drm:drm_atomic_commit] commiting ffff880145959d20
>[  232.699449] [drm:drm_atomic_state_clear] Clearing atomic state ffff880145959d20
>[  232.699451] [drm:drm_atomic_state_free] Freeing atomic state ffff880145959d20
>[  232.699453] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880145959d20
>[  232.699456] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff88009bae5e40 state to ffff880145959d20
>[  232.699457] [drm:drm_atomic_check_only] checking ffff880145959d20
>[  232.699458] [drm:drm_atomic_commit] commiting ffff880145959d20
>[  232.699460] [drm:drm_atomic_state_clear] Clearing atomic state ffff880145959d20
>[  232.699462] [drm:drm_atomic_state_free] Freeing atomic state ffff880145959d20
>[  232.699464] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880145959d20
>[  232.699466] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff88009bae5300 state to ffff880145959d20
>[  232.699467] [drm:drm_atomic_check_only] checking ffff880145959d20
>[  232.699468] [drm:drm_atomic_commit] commiting ffff880145959d20
>[  232.699470] [drm:drm_atomic_state_clear] Clearing atomic state ffff880145959d20
>[  232.699472] [drm:drm_atomic_state_free] Freeing atomic state ffff880145959d20
>[  232.699474] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880145959d20
>[  232.699476] [drm:drm_atomic_get_plane_state] Added [PLANE:31] ffff88009bae5240 state to ffff880145959d20
>[  232.699477] [drm:drm_atomic_check_only] checking ffff880145959d20
>[  232.699478] [drm:drm_atomic_commit] commiting ffff880145959d20
>[  232.699480] [drm:drm_atomic_state_clear] Clearing atomic state ffff880145959d20
>[  232.699482] [drm:drm_atomic_state_free] Freeing atomic state ffff880145959d20
>[  232.699484] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880145959d20
>[  232.699486] [drm:drm_atomic_get_plane_state] Added [PLANE:32] ffff88009bae5c00 state to ffff880145959d20
>[  232.699487] [drm:drm_atomic_check_only] checking ffff880145959d20
>[  232.699489] [drm:drm_atomic_commit] commiting ffff880145959d20
>[  232.699490] [drm:drm_atomic_state_clear] Clearing atomic state ffff880145959d20
>[  232.699492] [drm:drm_atomic_state_free] Freeing atomic state ffff880145959d20
>[  232.699496] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[  232.699498] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  232.699501] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  232.699502] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  232.699504] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  232.699506] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  232.699508] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  232.699512] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  232.699515] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[  232.699520] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[  232.699521] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[  232.699524] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[  232.699526] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[  232.699529] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  232.699531] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  232.699533] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  232.699534] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  232.699537] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  232.699540] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[  232.699542] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  232.699544] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  232.699545] [drm:intel_dump_pipe_config] requested mode:
>[  232.699549] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  232.699550] [drm:intel_dump_pipe_config] adjusted mode:
>[  232.699554] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  232.699557] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[  232.699558] [drm:intel_dump_pipe_config] port clock: 540000
>[  232.699560] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[  232.699562] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  232.699564] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  232.699565] [drm:intel_dump_pipe_config] ips: 0
>[  232.699566] [drm:intel_dump_pipe_config] double wide: 0
>[  232.699572] [drm:intel_display_power_get] enabling power well 1
>[  232.699578] [drm:skl_set_power_well] Enabling power well 1
>[  232.699580] [drm:intel_display_power_get] enabling MISC IO power well
>[  232.699582] [drm:skl_set_power_well] Enabling MISC IO power well
>[  232.699584] [drm:intel_display_power_get] enabling DDI A/E power well
>[  232.699586] [drm:skl_set_power_well] Enabling DDI A/E power well
>[  232.699590] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880145959960
>[  232.699593] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88009bae5d80 state to ffff880145959960
>[  232.699595] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004bad800 state to ffff880145959960
>[  232.699597] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88009bae5d80 to [CRTC:20]
>[  232.699599] [drm:drm_atomic_set_fb_for_plane] Set [FB:57] for plane state ffff88009bae5d80
>[  232.699600] [drm:drm_atomic_check_only] checking ffff880145959960
>[  232.699603] [drm:drm_atomic_commit] commiting ffff880145959960
>[  232.699611] [drm:drm_atomic_state_clear] Clearing atomic state ffff880145959960
>[  232.699613] [drm:drm_atomic_state_free] Freeing atomic state ffff880145959960
>[  232.699628] [drm:edp_panel_on] Turn eDP port A panel power on
>[  232.699636] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  233.245280] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control abcd0000
>[  233.278239] [drm:wait_panel_status] Wait complete
>[  233.278263] [drm:wait_panel_on] Wait for panel power on
>[  233.278281] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[  233.487275] [drm:wait_panel_status] Wait complete
>[  233.487293] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  233.487340] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  233.488447] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  233.489098] [drm:intel_dp_set_signal_levels] Using signal levels 04000000
>[  233.489737] [drm:intel_dp_start_link_train] clock recovery OK
>[  233.490687] [drm:intel_dp_set_signal_levels] Using signal levels 05000000
>[  233.491624] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  233.491900] [drm:skl_wm_flush_pipe] flush pipe A (pass 3)
>[  233.491911] [drm:intel_edp_backlight_on] 
>[  233.491913] [drm:intel_panel_enable_backlight] pipe A
>[  233.491952] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  233.492155] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[  233.492163] [drm:skylake_update_primary_plane] Writing base 016C0000 0,0,3200,1800 pitch=12800
>[  233.492168] [drm:intel_fbc_update] disabled per chip default
>[  233.492182] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[  233.492186] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  233.492189] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  233.492191] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  233.492192] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  233.492194] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  233.492195] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  233.492196] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  233.492197] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  233.492199] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  233.492200] [drm:check_crtc_state] [CRTC:20]
>[  233.492215] [drm:check_crtc_state] [CRTC:25]
>[  233.492217] [drm:check_crtc_state] [CRTC:30]
>[  233.492219] [drm:check_shared_dpll_state] DPLL 1
>[  233.492221] [drm:check_shared_dpll_state] DPLL 2
>[  233.492223] [drm:check_shared_dpll_state] DPLL 3
>[  233.492228] [drm:intel_crtc_set_config] [CRTC:25] [NOFB]
>[  233.492233] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0
>[  233.492235] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  233.492239] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  233.492242] [drm:intel_crtc_set_config] [CRTC:30] [NOFB]
>[  233.492244] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=0, fb_changed=0
>[  233.492246] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  233.492249] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  233.591683] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880148bf58a0
>[  233.591692] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880148d6bf00 state to ffff880148bf58a0
>[  233.591698] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88009a5ba000 state to ffff880148bf58a0
>[  233.591702] [drm:drm_atomic_check_only] checking ffff880148bf58a0
>[  233.591708] [drm:drm_atomic_commit] commiting ffff880148bf58a0
>[  233.591729] [drm:skylake_update_primary_plane] Writing base 016C0000 0,0,3200,1800 pitch=12800
>[  233.591741] [drm:drm_atomic_state_clear] Clearing atomic state ffff880148bf58a0
>[  233.591745] [drm:drm_atomic_state_free] Freeing atomic state ffff880148bf58a0
>[  233.591749] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880148bf58a0
>[  233.591753] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff880148d6b840 state to ffff880148bf58a0
>[  233.591755] [drm:drm_atomic_check_only] checking ffff880148bf58a0
>[  233.591759] [drm:drm_atomic_commit] commiting ffff880148bf58a0
>[  233.591762] [drm:drm_atomic_state_clear] Clearing atomic state ffff880148bf58a0
>[  233.591765] [drm:drm_atomic_state_free] Freeing atomic state ffff880148bf58a0
>[  233.591768] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880148bf58a0
>[  233.591772] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff880148d6ba80 state to ffff880148bf58a0
>[  233.591774] [drm:drm_atomic_check_only] checking ffff880148bf58a0
>[  233.591778] [drm:drm_atomic_commit] commiting ffff880148bf58a0
>[  233.591781] [drm:drm_atomic_state_clear] Clearing atomic state ffff880148bf58a0
>[  233.591784] [drm:drm_atomic_state_free] Freeing atomic state ffff880148bf58a0
>[  233.591787] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880148bf58a0
>[  233.591791] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880148d6b780 state to ffff880148bf58a0
>[  233.591793] [drm:drm_atomic_check_only] checking ffff880148bf58a0
>[  233.591796] [drm:drm_atomic_commit] commiting ffff880148bf58a0
>[  233.591799] [drm:drm_atomic_state_clear] Clearing atomic state ffff880148bf58a0
>[  233.591802] [drm:drm_atomic_state_free] Freeing atomic state ffff880148bf58a0
>[  233.591805] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880148bf58a0
>[  233.591809] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff880148d6b240 state to ffff880148bf58a0
>[  233.591811] [drm:drm_atomic_check_only] checking ffff880148bf58a0
>[  233.591814] [drm:drm_atomic_commit] commiting ffff880148bf58a0
>[  233.591817] [drm:drm_atomic_state_clear] Clearing atomic state ffff880148bf58a0
>[  233.591820] [drm:drm_atomic_state_free] Freeing atomic state ffff880148bf58a0
>[  233.591823] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880148bf58a0
>[  233.591827] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff880148d6b480 state to ffff880148bf58a0
>[  233.591829] [drm:drm_atomic_check_only] checking ffff880148bf58a0
>[  233.591832] [drm:drm_atomic_commit] commiting ffff880148bf58a0
>[  233.591835] [drm:drm_atomic_state_clear] Clearing atomic state ffff880148bf58a0
>[  233.591838] [drm:drm_atomic_state_free] Freeing atomic state ffff880148bf58a0
>[  233.591841] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880148bf58a0
>[  233.591844] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff880148d6b180 state to ffff880148bf58a0
>[  233.591847] [drm:drm_atomic_check_only] checking ffff880148bf58a0
>[  233.591850] [drm:drm_atomic_commit] commiting ffff880148bf58a0
>[  233.591853] [drm:drm_atomic_state_clear] Clearing atomic state ffff880148bf58a0
>[  233.591855] [drm:drm_atomic_state_free] Freeing atomic state ffff880148bf58a0
>[  233.591859] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880148bf58a0
>[  233.591862] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff880148d6b540 state to ffff880148bf58a0
>[  233.591865] [drm:drm_atomic_check_only] checking ffff880148bf58a0
>[  233.591867] [drm:drm_atomic_commit] commiting ffff880148bf58a0
>[  233.591870] [drm:drm_atomic_state_clear] Clearing atomic state ffff880148bf58a0
>[  233.591873] [drm:drm_atomic_state_free] Freeing atomic state ffff880148bf58a0
>[  233.591876] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880148bf58a0
>[  233.591880] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff880148d6bb40 state to ffff880148bf58a0
>[  233.591883] [drm:drm_atomic_check_only] checking ffff880148bf58a0
>[  233.591886] [drm:drm_atomic_commit] commiting ffff880148bf58a0
>[  233.591889] [drm:drm_atomic_state_clear] Clearing atomic state ffff880148bf58a0
>[  233.591891] [drm:drm_atomic_state_free] Freeing atomic state ffff880148bf58a0
>[  233.591895] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880148bf58a0
>[  233.591899] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff880143c6ab40 state to ffff880148bf58a0
>[  233.591902] [drm:drm_atomic_check_only] checking ffff880148bf58a0
>[  233.591905] [drm:drm_atomic_commit] commiting ffff880148bf58a0
>[  233.591908] [drm:drm_atomic_state_clear] Clearing atomic state ffff880148bf58a0
>[  233.591910] [drm:drm_atomic_state_free] Freeing atomic state ffff880148bf58a0
>[  233.591914] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880148bf58a0
>[  233.591917] [drm:drm_atomic_get_plane_state] Added [PLANE:31] ffff880143c6a000 state to ffff880148bf58a0
>[  233.591920] [drm:drm_atomic_check_only] checking ffff880148bf58a0
>[  233.591922] [drm:drm_atomic_commit] commiting ffff880148bf58a0
>[  233.591925] [drm:drm_atomic_state_clear] Clearing atomic state ffff880148bf58a0
>[  233.591928] [drm:drm_atomic_state_free] Freeing atomic state ffff880148bf58a0
>[  233.591931] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880148bf58a0
>[  233.591937] [drm:drm_atomic_get_plane_state] Added [PLANE:32] ffff880143c6a900 state to ffff880148bf58a0
>[  233.591940] [drm:drm_atomic_check_only] checking ffff880148bf58a0
>[  233.591943] [drm:drm_atomic_commit] commiting ffff880148bf58a0
>[  233.591946] [drm:drm_atomic_state_clear] Clearing atomic state ffff880148bf58a0
>[  233.591949] [drm:drm_atomic_state_free] Freeing atomic state ffff880148bf58a0
>[  233.591955] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[  233.591960] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  233.591964] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  233.591970] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  233.591974] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[  233.591980] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[  233.591983] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[  233.591988] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[  233.591991] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[  233.591995] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  233.591999] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  233.592001] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  233.592004] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  233.592008] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  233.592012] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[  233.592016] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  233.592019] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  233.592022] [drm:intel_dump_pipe_config] requested mode:
>[  233.592027] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  233.592030] [drm:intel_dump_pipe_config] adjusted mode:
>[  233.592034] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  233.592039] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[  233.592042] [drm:intel_dump_pipe_config] port clock: 540000
>[  233.592045] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[  233.592048] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  233.592052] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  233.592054] [drm:intel_dump_pipe_config] ips: 0
>[  233.592057] [drm:intel_dump_pipe_config] double wide: 0
>[  233.592060] [drm:intel_crtc_set_config] [CRTC:25] [NOFB]
>[  233.592064] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0
>[  233.592068] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  233.592072] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  233.592075] [drm:intel_crtc_set_config] [CRTC:30] [NOFB]
>[  233.592079] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=0, fb_changed=0
>[  233.592082] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  233.592086] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  236.497669] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[  236.497713] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  302.094274] kms_psr_sink_crc: executing
>[  302.094439] [drm:i915_gem_open] 
>[  302.096916] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[  302.096921] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[  302.097700] [drm:i915_gem_open] 
>[  302.100240] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[  302.100244] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[  302.100495] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  302.100509] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  302.101066] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  302.101071] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  302.101077] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  302.101082] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  302.101086] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  302.101100] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  302.101148] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[  302.101487] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  302.101834] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  302.101852] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  302.101858] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  302.101864] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  302.101869] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  302.101875] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  302.101898] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  302.101903] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  302.101908] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  302.101911] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  302.101913] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  302.101917] [drm:intel_display_power_get] enabling power well 2
>[  302.101921] [drm:skl_set_power_well] Enabling power well 2
>[  302.101924] [drm:intel_display_power_get] enabling DDI B power well
>[  302.101927] [drm:skl_set_power_well] Enabling DDI B power well
>[  302.101937] [drm:intel_display_power_put] disabling DDI B power well
>[  302.101941] [drm:skl_set_power_well] Disabling DDI B power well
>[  302.101944] [drm:intel_display_power_put] disabling power well 2
>[  302.101947] [drm:skl_set_power_well] Disabling power well 2
>[  302.101951] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  302.101954] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  302.101957] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  302.101960] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  302.101962] [drm:intel_display_power_get] enabling power well 2
>[  302.101965] [drm:skl_set_power_well] Enabling power well 2
>[  302.101968] [drm:intel_display_power_get] enabling DDI B power well
>[  302.101972] [drm:skl_set_power_well] Enabling DDI B power well
>[  302.101981] [drm:intel_display_power_put] disabling DDI B power well
>[  302.101985] [drm:skl_set_power_well] Disabling DDI B power well
>[  302.101987] [drm:intel_display_power_put] disabling power well 2
>[  302.101991] [drm:skl_set_power_well] Disabling power well 2
>[  302.101993] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  302.102001] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  302.102006] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  302.102010] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  302.102013] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  302.102016] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  302.102019] [drm:intel_display_power_get] enabling power well 2
>[  302.102022] [drm:skl_set_power_well] Enabling power well 2
>[  302.102025] [drm:intel_display_power_get] enabling DDI B power well
>[  302.102029] [drm:skl_set_power_well] Enabling DDI B power well
>[  302.102275] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  302.102278] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  302.102281] [drm:intel_display_power_put] disabling DDI B power well
>[  302.102285] [drm:skl_set_power_well] Disabling DDI B power well
>[  302.102287] [drm:intel_display_power_put] disabling power well 2
>[  302.102291] [drm:skl_set_power_well] Disabling power well 2
>[  302.102294] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  302.102298] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  302.102301] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  302.102303] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  302.102305] [drm:intel_display_power_get] enabling power well 2
>[  302.102309] [drm:skl_set_power_well] Enabling power well 2
>[  302.102312] [drm:intel_display_power_get] enabling DDI B power well
>[  302.102315] [drm:skl_set_power_well] Enabling DDI B power well
>[  302.102557] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  302.102561] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  302.102563] [drm:intel_display_power_put] disabling DDI B power well
>[  302.102567] [drm:skl_set_power_well] Disabling DDI B power well
>[  302.102569] [drm:intel_display_power_put] disabling power well 2
>[  302.102573] [drm:skl_set_power_well] Disabling power well 2
>[  302.102575] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  302.102582] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  302.102586] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  302.102590] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  302.102593] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  302.102595] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  302.102598] [drm:intel_display_power_get] enabling power well 2
>[  302.102601] [drm:skl_set_power_well] Enabling power well 2
>[  302.102604] [drm:intel_display_power_get] enabling DDI C power well
>[  302.102607] [drm:skl_set_power_well] Enabling DDI C power well
>[  302.102617] [drm:intel_display_power_put] disabling DDI C power well
>[  302.102620] [drm:skl_set_power_well] Disabling DDI C power well
>[  302.102623] [drm:intel_display_power_put] disabling power well 2
>[  302.102627] [drm:skl_set_power_well] Disabling power well 2
>[  302.102629] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  302.102633] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  302.102636] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  302.102638] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  302.102640] [drm:intel_display_power_get] enabling power well 2
>[  302.102643] [drm:skl_set_power_well] Enabling power well 2
>[  302.102647] [drm:intel_display_power_get] enabling DDI C power well
>[  302.102650] [drm:skl_set_power_well] Enabling DDI C power well
>[  302.102668] [drm:intel_display_power_put] disabling DDI C power well
>[  302.102672] [drm:skl_set_power_well] Disabling DDI C power well
>[  302.102675] [drm:intel_display_power_put] disabling power well 2
>[  302.102678] [drm:skl_set_power_well] Disabling power well 2
>[  302.102681] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  302.102686] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  302.102691] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  302.102694] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  302.102697] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  302.102700] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  302.102702] [drm:intel_display_power_get] enabling power well 2
>[  302.102706] [drm:skl_set_power_well] Enabling power well 2
>[  302.102708] [drm:intel_display_power_get] enabling DDI C power well
>[  302.102712] [drm:skl_set_power_well] Enabling DDI C power well
>[  302.102968] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  302.102973] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  302.102976] [drm:intel_display_power_put] disabling DDI C power well
>[  302.102982] [drm:skl_set_power_well] Disabling DDI C power well
>[  302.102985] [drm:intel_display_power_put] disabling power well 2
>[  302.102989] [drm:skl_set_power_well] Disabling power well 2
>[  302.102993] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  302.102998] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  302.103001] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  302.103004] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  302.103008] [drm:intel_display_power_get] enabling power well 2
>[  302.103012] [drm:skl_set_power_well] Enabling power well 2
>[  302.103017] [drm:intel_display_power_get] enabling DDI C power well
>[  302.103021] [drm:skl_set_power_well] Enabling DDI C power well
>[  302.103270] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  302.103275] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  302.103279] [drm:intel_display_power_put] disabling DDI C power well
>[  302.103284] [drm:skl_set_power_well] Disabling DDI C power well
>[  302.103287] [drm:intel_display_power_put] disabling power well 2
>[  302.103292] [drm:skl_set_power_well] Disabling power well 2
>[  302.103296] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  302.103356] kms_psr_sink_crc: starting subtest primary_page_flip
>[  302.103402] [drm:add_framebuffer_internal] [FB:56]
>[  302.129632] [drm:add_framebuffer_internal] [FB:58]
>[  302.155540] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  302.155549] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  302.155556] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  302.155561] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  302.155564] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  302.155927] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  302.156261] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  302.156277] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  302.156284] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  302.156290] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  302.156295] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  302.156302] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  302.156321] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  302.156326] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  302.156331] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  302.156335] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  302.156340] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  302.156348] [drm:intel_display_power_get] enabling power well 2
>[  302.156353] [drm:skl_set_power_well] Enabling power well 2
>[  302.156357] [drm:intel_display_power_get] enabling DDI B power well
>[  302.156360] [drm:skl_set_power_well] Enabling DDI B power well
>[  302.156370] [drm:intel_display_power_put] disabling DDI B power well
>[  302.156373] [drm:skl_set_power_well] Disabling DDI B power well
>[  302.156376] [drm:intel_display_power_put] disabling power well 2
>[  302.156379] [drm:skl_set_power_well] Disabling power well 2
>[  302.156382] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  302.156386] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  302.156389] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  302.156391] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  302.156394] [drm:intel_display_power_get] enabling power well 2
>[  302.156397] [drm:skl_set_power_well] Enabling power well 2
>[  302.156400] [drm:intel_display_power_get] enabling DDI B power well
>[  302.156403] [drm:skl_set_power_well] Enabling DDI B power well
>[  302.156413] [drm:intel_display_power_put] disabling DDI B power well
>[  302.156416] [drm:skl_set_power_well] Disabling DDI B power well
>[  302.156419] [drm:intel_display_power_put] disabling power well 2
>[  302.156422] [drm:skl_set_power_well] Disabling power well 2
>[  302.156425] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  302.156431] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  302.156436] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  302.156440] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  302.156443] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  302.156446] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  302.156449] [drm:intel_display_power_get] enabling power well 2
>[  302.156452] [drm:skl_set_power_well] Enabling power well 2
>[  302.156455] [drm:intel_display_power_get] enabling DDI B power well
>[  302.156458] [drm:skl_set_power_well] Enabling DDI B power well
>[  302.156714] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  302.156717] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  302.156720] [drm:intel_display_power_put] disabling DDI B power well
>[  302.156723] [drm:skl_set_power_well] Disabling DDI B power well
>[  302.156726] [drm:intel_display_power_put] disabling power well 2
>[  302.156734] [drm:skl_set_power_well] Disabling power well 2
>[  302.156745] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  302.156757] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  302.156767] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  302.156777] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  302.156787] [drm:intel_display_power_get] enabling power well 2
>[  302.156797] [drm:skl_set_power_well] Enabling power well 2
>[  302.156807] [drm:intel_display_power_get] enabling DDI B power well
>[  302.156817] [drm:skl_set_power_well] Enabling DDI B power well
>[  302.157072] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  302.157077] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  302.157081] [drm:intel_display_power_put] disabling DDI B power well
>[  302.157086] [drm:skl_set_power_well] Disabling DDI B power well
>[  302.157090] [drm:intel_display_power_put] disabling power well 2
>[  302.157095] [drm:skl_set_power_well] Disabling power well 2
>[  302.157099] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  302.157110] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  302.157117] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  302.157123] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  302.157128] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  302.157132] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  302.157136] [drm:intel_display_power_get] enabling power well 2
>[  302.157141] [drm:skl_set_power_well] Enabling power well 2
>[  302.157145] [drm:intel_display_power_get] enabling DDI C power well
>[  302.157150] [drm:skl_set_power_well] Enabling DDI C power well
>[  302.157161] [drm:intel_display_power_put] disabling DDI C power well
>[  302.157166] [drm:skl_set_power_well] Disabling DDI C power well
>[  302.157170] [drm:intel_display_power_put] disabling power well 2
>[  302.157175] [drm:skl_set_power_well] Disabling power well 2
>[  302.157179] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  302.157184] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  302.157188] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  302.157191] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  302.157194] [drm:intel_display_power_get] enabling power well 2
>[  302.157198] [drm:skl_set_power_well] Enabling power well 2
>[  302.157201] [drm:intel_display_power_get] enabling DDI C power well
>[  302.157204] [drm:skl_set_power_well] Enabling DDI C power well
>[  302.157213] [drm:intel_display_power_put] disabling DDI C power well
>[  302.157217] [drm:skl_set_power_well] Disabling DDI C power well
>[  302.157219] [drm:intel_display_power_put] disabling power well 2
>[  302.157223] [drm:skl_set_power_well] Disabling power well 2
>[  302.157226] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  302.157232] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  302.157237] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  302.157240] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  302.157243] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  302.157246] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  302.157249] [drm:intel_display_power_get] enabling power well 2
>[  302.157252] [drm:skl_set_power_well] Enabling power well 2
>[  302.157255] [drm:intel_display_power_get] enabling DDI C power well
>[  302.157258] [drm:skl_set_power_well] Enabling DDI C power well
>[  302.157503] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  302.157506] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  302.157508] [drm:intel_display_power_put] disabling DDI C power well
>[  302.157512] [drm:skl_set_power_well] Disabling DDI C power well
>[  302.157514] [drm:intel_display_power_put] disabling power well 2
>[  302.157518] [drm:skl_set_power_well] Disabling power well 2
>[  302.157521] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  302.157524] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  302.157527] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  302.157530] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  302.157532] [drm:intel_display_power_get] enabling power well 2
>[  302.157535] [drm:skl_set_power_well] Enabling power well 2
>[  302.157538] [drm:intel_display_power_get] enabling DDI C power well
>[  302.157541] [drm:skl_set_power_well] Enabling DDI C power well
>[  302.157789] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  302.157796] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  302.157801] [drm:intel_display_power_put] disabling DDI C power well
>[  302.157805] [drm:skl_set_power_well] Disabling DDI C power well
>[  302.157807] [drm:intel_display_power_put] disabling power well 2
>[  302.157811] [drm:skl_set_power_well] Disabling power well 2
>[  302.157815] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  302.157838] [drm:drm_mode_setcrtc] [CRTC:20]
>[  302.157841] [drm:intel_crtc_set_config] [CRTC:20] [NOFB]
>[  302.157848] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  302.157851] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [NOCRTC]
>[  302.157854] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  302.157857] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  302.157860] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  302.157865] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[  302.168846] [drm:intel_edp_backlight_off] 
>[  302.369945] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  302.384015] [drm:edp_panel_off] Turn eDP port A panel power off
>[  302.384043] [drm:wait_panel_off] Wait for panel power off time
>[  302.384063] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  302.438897] [drm:wait_panel_status] Wait complete
>[  302.438930] [drm:intel_fbc_update] no output, disabling
>[  302.438938] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214a480
>[  302.438946] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880004c119c0 state to ffff88009214a480
>[  302.438951] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004bad000 state to ffff88009214a480
>[  302.438955] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880004c119c0 to [NOCRTC]
>[  302.438958] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880004c119c0
>[  302.438961] [drm:drm_atomic_check_only] checking ffff88009214a480
>[  302.438966] [drm:drm_atomic_commit] commiting ffff88009214a480
>[  302.438978] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214a480
>[  302.438983] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214a480
>[  302.438991] [drm:intel_display_power_put] disabling DDI A/E power well
>[  302.438996] [drm:skl_set_power_well] Disabling DDI A/E power well
>[  302.438998] [drm:intel_display_power_put] disabling MISC IO power well
>[  302.439002] [drm:skl_set_power_well] Disabling MISC IO power well
>[  302.439004] [drm:intel_display_power_put] disabling power well 1
>[  302.439009] [drm:skl_set_power_well] Disabling power well 1
>[  302.439042] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  302.439045] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  302.439048] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  302.439051] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  302.439053] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  302.439056] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  302.439058] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  302.439061] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  302.439063] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  302.439067] [drm:check_crtc_state] [CRTC:20]
>[  302.439070] [drm:check_crtc_state] [CRTC:25]
>[  302.439072] [drm:check_crtc_state] [CRTC:30]
>[  302.439076] [drm:check_shared_dpll_state] DPLL 1
>[  302.439079] [drm:check_shared_dpll_state] DPLL 2
>[  302.439081] [drm:check_shared_dpll_state] DPLL 3
>[  302.439121] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  302.439128] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  302.439134] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  302.439138] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  302.439141] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  302.439145] [drm:intel_display_power_get] enabling power well 1
>[  302.439151] [drm:skl_set_power_well] Enabling power well 1
>[  302.439155] [drm:intel_display_power_get] enabling MISC IO power well
>[  302.439158] [drm:skl_set_power_well] Enabling MISC IO power well
>[  302.439161] [drm:intel_display_power_get] enabling DDI A/E power well
>[  302.439164] [drm:skl_set_power_well] Enabling DDI A/E power well
>[  302.439177] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  302.439186] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  302.984983] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control abcd0000
>[  302.995966] [drm:wait_panel_status] Wait complete
>[  302.996010] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  302.996020] [drm:edp_panel_vdd_on] eDP port A panel power wasn't enabled
>[  303.197405] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  303.197756] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  303.197776] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  303.197783] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  303.197789] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  303.197809] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  303.197825] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  303.197849] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  303.197866] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  303.197875] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  303.197879] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  303.197882] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  303.197886] [drm:intel_display_power_get] enabling power well 2
>[  303.197891] [drm:skl_set_power_well] Enabling power well 2
>[  303.197894] [drm:intel_display_power_get] enabling DDI B power well
>[  303.197898] [drm:skl_set_power_well] Enabling DDI B power well
>[  303.197908] [drm:intel_display_power_put] disabling DDI B power well
>[  303.197913] [drm:skl_set_power_well] Disabling DDI B power well
>[  303.197917] [drm:intel_display_power_put] disabling power well 2
>[  303.197923] [drm:skl_set_power_well] Disabling power well 2
>[  303.197928] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  303.197934] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  303.197937] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  303.197942] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  303.197945] [drm:intel_display_power_get] enabling power well 2
>[  303.197950] [drm:skl_set_power_well] Enabling power well 2
>[  303.197954] [drm:intel_display_power_get] enabling DDI B power well
>[  303.197960] [drm:skl_set_power_well] Enabling DDI B power well
>[  303.197978] [drm:intel_display_power_put] disabling DDI B power well
>[  303.197991] [drm:skl_set_power_well] Disabling DDI B power well
>[  303.197999] [drm:intel_display_power_put] disabling power well 2
>[  303.198005] [drm:skl_set_power_well] Disabling power well 2
>[  303.198009] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  303.198021] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  303.198029] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  303.198035] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  303.198040] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  303.198044] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  303.198049] [drm:intel_display_power_get] enabling power well 2
>[  303.198054] [drm:skl_set_power_well] Enabling power well 2
>[  303.198060] [drm:intel_display_power_get] enabling DDI B power well
>[  303.198065] [drm:skl_set_power_well] Enabling DDI B power well
>[  303.198322] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  303.198326] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  303.198329] [drm:intel_display_power_put] disabling DDI B power well
>[  303.198333] [drm:skl_set_power_well] Disabling DDI B power well
>[  303.198336] [drm:intel_display_power_put] disabling power well 2
>[  303.198339] [drm:skl_set_power_well] Disabling power well 2
>[  303.198343] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  303.198349] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  303.198352] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  303.198354] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  303.198357] [drm:intel_display_power_get] enabling power well 2
>[  303.198361] [drm:skl_set_power_well] Enabling power well 2
>[  303.198364] [drm:intel_display_power_get] enabling DDI B power well
>[  303.198367] [drm:skl_set_power_well] Enabling DDI B power well
>[  303.198611] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  303.198614] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  303.198617] [drm:intel_display_power_put] disabling DDI B power well
>[  303.198620] [drm:skl_set_power_well] Disabling DDI B power well
>[  303.198623] [drm:intel_display_power_put] disabling power well 2
>[  303.198626] [drm:skl_set_power_well] Disabling power well 2
>[  303.198630] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  303.198637] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  303.198642] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  303.198646] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  303.198650] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  303.198652] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  303.198655] [drm:intel_display_power_get] enabling power well 2
>[  303.198658] [drm:skl_set_power_well] Enabling power well 2
>[  303.198662] [drm:intel_display_power_get] enabling DDI C power well
>[  303.198665] [drm:skl_set_power_well] Enabling DDI C power well
>[  303.198674] [drm:intel_display_power_put] disabling DDI C power well
>[  303.198678] [drm:skl_set_power_well] Disabling DDI C power well
>[  303.198681] [drm:intel_display_power_put] disabling power well 2
>[  303.198685] [drm:skl_set_power_well] Disabling power well 2
>[  303.198687] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  303.198691] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  303.198694] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  303.198696] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  303.198699] [drm:intel_display_power_get] enabling power well 2
>[  303.198702] [drm:skl_set_power_well] Enabling power well 2
>[  303.198705] [drm:intel_display_power_get] enabling DDI C power well
>[  303.198708] [drm:skl_set_power_well] Enabling DDI C power well
>[  303.198718] [drm:intel_display_power_put] disabling DDI C power well
>[  303.198722] [drm:skl_set_power_well] Disabling DDI C power well
>[  303.198724] [drm:intel_display_power_put] disabling power well 2
>[  303.198728] [drm:skl_set_power_well] Disabling power well 2
>[  303.198731] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  303.198736] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  303.198741] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  303.198745] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  303.198748] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  303.198750] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  303.198753] [drm:intel_display_power_get] enabling power well 2
>[  303.198756] [drm:skl_set_power_well] Enabling power well 2
>[  303.198759] [drm:intel_display_power_get] enabling DDI C power well
>[  303.198763] [drm:skl_set_power_well] Enabling DDI C power well
>[  303.199033] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  303.199040] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  303.199046] [drm:intel_display_power_put] disabling DDI C power well
>[  303.199052] [drm:skl_set_power_well] Disabling DDI C power well
>[  303.199056] [drm:intel_display_power_put] disabling power well 2
>[  303.199061] [drm:skl_set_power_well] Disabling power well 2
>[  303.199067] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  303.199078] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  303.199083] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  303.199087] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  303.199092] [drm:intel_display_power_get] enabling power well 2
>[  303.199097] [drm:skl_set_power_well] Enabling power well 2
>[  303.199102] [drm:intel_display_power_get] enabling DDI C power well
>[  303.199107] [drm:skl_set_power_well] Enabling DDI C power well
>[  303.199372] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  303.199381] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  303.199386] [drm:intel_display_power_put] disabling DDI C power well
>[  303.199392] [drm:skl_set_power_well] Disabling DDI C power well
>[  303.199396] [drm:intel_display_power_put] disabling power well 2
>[  303.199402] [drm:skl_set_power_well] Disabling power well 2
>[  303.199407] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  303.199430] [drm:drm_mode_setcrtc] [CRTC:20]
>[  303.199436] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1]
>[  303.199441] [drm:intel_crtc_set_config] [CRTC:20] [FB:56] #connectors=1 (x y) (0 0)
>[  303.199446] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  303.199450] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  303.199453] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  303.199456] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  303.199459] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  303.199463] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  303.199467] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  303.199471] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[  303.199477] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[  303.199480] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[  303.199484] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[  303.199487] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[  303.199492] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  303.199495] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  303.199498] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  303.199501] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  303.199505] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  303.199509] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[  303.199513] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  303.199516] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  303.199518] [drm:intel_dump_pipe_config] requested mode:
>[  303.199524] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  303.199526] [drm:intel_dump_pipe_config] adjusted mode:
>[  303.199531] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  303.199536] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[  303.199539] [drm:intel_dump_pipe_config] port clock: 540000
>[  303.199541] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[  303.199545] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  303.199548] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  303.199551] [drm:intel_dump_pipe_config] ips: 0
>[  303.199553] [drm:intel_dump_pipe_config] double wide: 0
>[  303.199566] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  303.199571] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880004c11900 state to ffff88009214ab40
>[  303.199575] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004ba9000 state to ffff88009214ab40
>[  303.199578] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880004c11900 to [CRTC:20]
>[  303.199581] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff880004c11900
>[  303.199584] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  303.199591] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  303.202979] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  303.202984] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  303.203003] [drm:edp_panel_on] Turn eDP port A panel power on
>[  303.203012] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  303.203030] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[  303.203039] [drm:wait_panel_status] Wait complete
>[  303.203063] [drm:wait_panel_on] Wait for panel power on
>[  303.203081] [drm:wait_panel_status] mask b000000f value 80000008 status 9000000a control abcd000b
>[  303.411956] [drm:wait_panel_status] Wait complete
>[  303.413085] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  303.413758] [drm:intel_dp_set_signal_levels] Using signal levels 04000000
>[  303.414405] [drm:intel_dp_start_link_train] clock recovery OK
>[  303.415363] [drm:intel_dp_set_signal_levels] Using signal levels 05000000
>[  303.416310] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  303.416589] [drm:skl_wm_flush_pipe] flush pipe A (pass 3)
>[  303.416601] [drm:intel_edp_backlight_on] 
>[  303.416605] [drm:intel_panel_enable_backlight] pipe A
>[  303.416645] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  303.416869] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[  303.416884] [drm:skylake_update_primary_plane] Writing base 06D80000 0,0,3200,1800 pitch=16384
>[  303.416894] [drm:intel_fbc_update] disabled per chip default
>[  303.416911] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[  303.416919] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  303.416925] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  303.416929] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  303.416933] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  303.416937] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  303.416941] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  303.416945] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  303.416949] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  303.416953] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  303.416958] [drm:check_crtc_state] [CRTC:20]
>[  303.416977] [drm:check_crtc_state] [CRTC:25]
>[  303.416981] [drm:check_crtc_state] [CRTC:30]
>[  303.416986] [drm:check_shared_dpll_state] DPLL 1
>[  303.416990] [drm:check_shared_dpll_state] DPLL 2
>[  303.416992] [drm:check_shared_dpll_state] DPLL 3
>[  306.417741] kms_psr_sink_crc: starting subtest primary_mmap_gtt
>[  306.417801] [drm:add_framebuffer_internal] [FB:59]
>[  306.429790] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[  306.429837] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  306.443921] [drm:add_framebuffer_internal] [FB:60]
>[  306.469645] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  306.469654] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  306.469660] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  306.469666] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  306.469669] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  306.469684] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  306.469732] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[  306.470081] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  306.470431] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  306.470460] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  306.470467] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  306.470473] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  306.470478] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  306.470486] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  306.470506] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  306.470511] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  306.470515] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  306.470519] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  306.470521] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  306.470525] [drm:intel_display_power_get] enabling power well 2
>[  306.470529] [drm:skl_set_power_well] Enabling power well 2
>[  306.470532] [drm:intel_display_power_get] enabling DDI B power well
>[  306.470535] [drm:skl_set_power_well] Enabling DDI B power well
>[  306.470546] [drm:intel_display_power_put] disabling DDI B power well
>[  306.470549] [drm:skl_set_power_well] Disabling DDI B power well
>[  306.470552] [drm:intel_display_power_put] disabling power well 2
>[  306.470555] [drm:skl_set_power_well] Disabling power well 2
>[  306.470558] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  306.470563] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  306.470565] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  306.470568] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  306.470571] [drm:intel_display_power_get] enabling power well 2
>[  306.470574] [drm:skl_set_power_well] Enabling power well 2
>[  306.470577] [drm:intel_display_power_get] enabling DDI B power well
>[  306.470580] [drm:skl_set_power_well] Enabling DDI B power well
>[  306.470589] [drm:intel_display_power_put] disabling DDI B power well
>[  306.470593] [drm:skl_set_power_well] Disabling DDI B power well
>[  306.470595] [drm:intel_display_power_put] disabling power well 2
>[  306.470599] [drm:skl_set_power_well] Disabling power well 2
>[  306.470602] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  306.470609] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  306.470613] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  306.470617] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  306.470621] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  306.470624] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  306.470626] [drm:intel_display_power_get] enabling power well 2
>[  306.470630] [drm:skl_set_power_well] Enabling power well 2
>[  306.470633] [drm:intel_display_power_get] enabling DDI B power well
>[  306.470636] [drm:skl_set_power_well] Enabling DDI B power well
>[  306.470968] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  306.470976] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  306.470980] [drm:intel_display_power_put] disabling DDI B power well
>[  306.470984] [drm:skl_set_power_well] Disabling DDI B power well
>[  306.470986] [drm:intel_display_power_put] disabling power well 2
>[  306.470990] [drm:skl_set_power_well] Disabling power well 2
>[  306.470994] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  306.471004] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  306.471008] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  306.471011] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  306.471014] [drm:intel_display_power_get] enabling power well 2
>[  306.471018] [drm:skl_set_power_well] Enabling power well 2
>[  306.471021] [drm:intel_display_power_get] enabling DDI B power well
>[  306.471024] [drm:skl_set_power_well] Enabling DDI B power well
>[  306.471283] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  306.471294] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  306.471304] [drm:intel_display_power_put] disabling DDI B power well
>[  306.471315] [drm:skl_set_power_well] Disabling DDI B power well
>[  306.471325] [drm:intel_display_power_put] disabling power well 2
>[  306.471333] [drm:skl_set_power_well] Disabling power well 2
>[  306.471337] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  306.471350] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  306.471357] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  306.471364] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  306.471369] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  306.471373] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  306.471377] [drm:intel_display_power_get] enabling power well 2
>[  306.471382] [drm:skl_set_power_well] Enabling power well 2
>[  306.471386] [drm:intel_display_power_get] enabling DDI C power well
>[  306.471391] [drm:skl_set_power_well] Enabling DDI C power well
>[  306.471403] [drm:intel_display_power_put] disabling DDI C power well
>[  306.471408] [drm:skl_set_power_well] Disabling DDI C power well
>[  306.471412] [drm:intel_display_power_put] disabling power well 2
>[  306.471417] [drm:skl_set_power_well] Disabling power well 2
>[  306.471421] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  306.471426] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  306.471430] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  306.471433] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  306.471437] [drm:intel_display_power_get] enabling power well 2
>[  306.471442] [drm:skl_set_power_well] Enabling power well 2
>[  306.471446] [drm:intel_display_power_get] enabling DDI C power well
>[  306.471450] [drm:skl_set_power_well] Enabling DDI C power well
>[  306.471461] [drm:intel_display_power_put] disabling DDI C power well
>[  306.471466] [drm:skl_set_power_well] Disabling DDI C power well
>[  306.471470] [drm:intel_display_power_put] disabling power well 2
>[  306.471475] [drm:skl_set_power_well] Disabling power well 2
>[  306.471480] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  306.471489] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  306.471496] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  306.471502] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  306.471507] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  306.471511] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  306.471515] [drm:intel_display_power_get] enabling power well 2
>[  306.471519] [drm:skl_set_power_well] Enabling power well 2
>[  306.471524] [drm:intel_display_power_get] enabling DDI C power well
>[  306.471528] [drm:skl_set_power_well] Enabling DDI C power well
>[  306.471776] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  306.471779] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  306.471782] [drm:intel_display_power_put] disabling DDI C power well
>[  306.471786] [drm:skl_set_power_well] Disabling DDI C power well
>[  306.471788] [drm:intel_display_power_put] disabling power well 2
>[  306.471792] [drm:skl_set_power_well] Disabling power well 2
>[  306.471794] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  306.471798] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  306.471801] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  306.471804] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  306.471806] [drm:intel_display_power_get] enabling power well 2
>[  306.471810] [drm:skl_set_power_well] Enabling power well 2
>[  306.471813] [drm:intel_display_power_get] enabling DDI C power well
>[  306.471816] [drm:skl_set_power_well] Enabling DDI C power well
>[  306.472059] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  306.472062] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  306.472064] [drm:intel_display_power_put] disabling DDI C power well
>[  306.472068] [drm:skl_set_power_well] Disabling DDI C power well
>[  306.472070] [drm:intel_display_power_put] disabling power well 2
>[  306.472074] [drm:skl_set_power_well] Disabling power well 2
>[  306.472077] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  306.472089] [drm:drm_mode_setcrtc] [CRTC:20]
>[  306.472093] [drm:intel_crtc_set_config] [CRTC:20] [NOFB]
>[  306.472099] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  306.472102] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [NOCRTC]
>[  306.472104] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  306.472108] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  306.472111] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  306.472116] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[  306.493379] [drm:intel_edp_backlight_off] 
>[  306.694439] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  306.704551] [drm:edp_panel_off] Turn eDP port A panel power off
>[  306.704579] [drm:wait_panel_off] Wait for panel power off time
>[  306.704599] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  306.759419] [drm:wait_panel_status] Wait complete
>[  306.759451] [drm:intel_fbc_update] no output, disabling
>[  306.759460] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214a480
>[  306.759467] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880004c11f00 state to ffff88009214a480
>[  306.759472] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004ba9000 state to ffff88009214a480
>[  306.759475] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880004c11f00 to [NOCRTC]
>[  306.759479] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880004c11f00
>[  306.759481] [drm:drm_atomic_check_only] checking ffff88009214a480
>[  306.759487] [drm:drm_atomic_commit] commiting ffff88009214a480
>[  306.759498] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214a480
>[  306.759503] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214a480
>[  306.759511] [drm:intel_display_power_put] disabling DDI A/E power well
>[  306.759516] [drm:skl_set_power_well] Disabling DDI A/E power well
>[  306.759518] [drm:intel_display_power_put] disabling MISC IO power well
>[  306.759522] [drm:skl_set_power_well] Disabling MISC IO power well
>[  306.759525] [drm:intel_display_power_put] disabling power well 1
>[  306.759530] [drm:skl_set_power_well] Disabling power well 1
>[  306.759562] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  306.759566] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  306.759569] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  306.759571] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  306.759574] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  306.759577] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  306.759579] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  306.759582] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  306.759584] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  306.759587] [drm:check_crtc_state] [CRTC:20]
>[  306.759591] [drm:check_crtc_state] [CRTC:25]
>[  306.759593] [drm:check_crtc_state] [CRTC:30]
>[  306.759596] [drm:check_shared_dpll_state] DPLL 1
>[  306.759600] [drm:check_shared_dpll_state] DPLL 2
>[  306.759602] [drm:check_shared_dpll_state] DPLL 3
>[  306.759630] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  306.759638] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  306.759643] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  306.759648] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  306.759651] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  306.759654] [drm:intel_display_power_get] enabling power well 1
>[  306.759661] [drm:skl_set_power_well] Enabling power well 1
>[  306.759664] [drm:intel_display_power_get] enabling MISC IO power well
>[  306.759668] [drm:skl_set_power_well] Enabling MISC IO power well
>[  306.759670] [drm:intel_display_power_get] enabling DDI A/E power well
>[  306.759674] [drm:skl_set_power_well] Enabling DDI A/E power well
>[  306.759687] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  306.759696] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  307.305524] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[  307.305536] [drm:wait_panel_status] Wait complete
>[  307.305577] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  307.305587] [drm:edp_panel_vdd_on] eDP port A panel power wasn't enabled
>[  307.506826] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  307.507177] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  307.507199] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  307.507206] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  307.507213] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  307.507218] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  307.507233] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  307.507256] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  307.507261] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  307.507266] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  307.507269] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  307.507272] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  307.507276] [drm:intel_display_power_get] enabling power well 2
>[  307.507280] [drm:skl_set_power_well] Enabling power well 2
>[  307.507284] [drm:intel_display_power_get] enabling DDI B power well
>[  307.507287] [drm:skl_set_power_well] Enabling DDI B power well
>[  307.507297] [drm:intel_display_power_put] disabling DDI B power well
>[  307.507301] [drm:skl_set_power_well] Disabling DDI B power well
>[  307.507303] [drm:intel_display_power_put] disabling power well 2
>[  307.507307] [drm:skl_set_power_well] Disabling power well 2
>[  307.507310] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  307.507314] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  307.507317] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  307.507320] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  307.507322] [drm:intel_display_power_get] enabling power well 2
>[  307.507325] [drm:skl_set_power_well] Enabling power well 2
>[  307.507339] [drm:intel_display_power_get] enabling DDI B power well
>[  307.507342] [drm:skl_set_power_well] Enabling DDI B power well
>[  307.507352] [drm:intel_display_power_put] disabling DDI B power well
>[  307.507355] [drm:skl_set_power_well] Disabling DDI B power well
>[  307.507358] [drm:intel_display_power_put] disabling power well 2
>[  307.507362] [drm:skl_set_power_well] Disabling power well 2
>[  307.507365] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  307.507372] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  307.507376] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  307.507380] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  307.507384] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  307.507387] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  307.507397] [drm:intel_display_power_get] enabling power well 2
>[  307.507408] [drm:skl_set_power_well] Enabling power well 2
>[  307.507418] [drm:intel_display_power_get] enabling DDI B power well
>[  307.507428] [drm:skl_set_power_well] Enabling DDI B power well
>[  307.507736] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  307.507743] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  307.507747] [drm:intel_display_power_put] disabling DDI B power well
>[  307.507752] [drm:skl_set_power_well] Disabling DDI B power well
>[  307.507754] [drm:intel_display_power_put] disabling power well 2
>[  307.507758] [drm:skl_set_power_well] Disabling power well 2
>[  307.507762] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  307.507772] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  307.507775] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  307.507778] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  307.507782] [drm:intel_display_power_get] enabling power well 2
>[  307.507785] [drm:skl_set_power_well] Enabling power well 2
>[  307.507788] [drm:intel_display_power_get] enabling DDI B power well
>[  307.507792] [drm:skl_set_power_well] Enabling DDI B power well
>[  307.508125] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  307.508132] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  307.508136] [drm:intel_display_power_put] disabling DDI B power well
>[  307.508141] [drm:skl_set_power_well] Disabling DDI B power well
>[  307.508143] [drm:intel_display_power_put] disabling power well 2
>[  307.508147] [drm:skl_set_power_well] Disabling power well 2
>[  307.508151] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  307.508165] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  307.508170] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  307.508175] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  307.508179] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  307.508182] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  307.508185] [drm:intel_display_power_get] enabling power well 2
>[  307.508189] [drm:skl_set_power_well] Enabling power well 2
>[  307.508192] [drm:intel_display_power_get] enabling DDI C power well
>[  307.508195] [drm:skl_set_power_well] Enabling DDI C power well
>[  307.508205] [drm:intel_display_power_put] disabling DDI C power well
>[  307.508209] [drm:skl_set_power_well] Disabling DDI C power well
>[  307.508212] [drm:intel_display_power_put] disabling power well 2
>[  307.508215] [drm:skl_set_power_well] Disabling power well 2
>[  307.508218] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  307.508222] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  307.508225] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  307.508227] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  307.508230] [drm:intel_display_power_get] enabling power well 2
>[  307.508233] [drm:skl_set_power_well] Enabling power well 2
>[  307.508236] [drm:intel_display_power_get] enabling DDI C power well
>[  307.508239] [drm:skl_set_power_well] Enabling DDI C power well
>[  307.508249] [drm:intel_display_power_put] disabling DDI C power well
>[  307.508253] [drm:skl_set_power_well] Disabling DDI C power well
>[  307.508255] [drm:intel_display_power_put] disabling power well 2
>[  307.508259] [drm:skl_set_power_well] Disabling power well 2
>[  307.508262] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  307.508267] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  307.508272] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  307.508276] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  307.508279] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  307.508282] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  307.508284] [drm:intel_display_power_get] enabling power well 2
>[  307.508288] [drm:skl_set_power_well] Enabling power well 2
>[  307.508291] [drm:intel_display_power_get] enabling DDI C power well
>[  307.508294] [drm:skl_set_power_well] Enabling DDI C power well
>[  307.508553] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  307.508559] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  307.508564] [drm:intel_display_power_put] disabling DDI C power well
>[  307.508569] [drm:skl_set_power_well] Disabling DDI C power well
>[  307.508573] [drm:intel_display_power_put] disabling power well 2
>[  307.508579] [drm:skl_set_power_well] Disabling power well 2
>[  307.508584] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  307.508592] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  307.508596] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  307.508600] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  307.508605] [drm:intel_display_power_get] enabling power well 2
>[  307.508609] [drm:skl_set_power_well] Enabling power well 2
>[  307.508614] [drm:intel_display_power_get] enabling DDI C power well
>[  307.508618] [drm:skl_set_power_well] Enabling DDI C power well
>[  307.508880] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  307.508887] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  307.508891] [drm:intel_display_power_put] disabling DDI C power well
>[  307.508895] [drm:skl_set_power_well] Disabling DDI C power well
>[  307.508898] [drm:intel_display_power_put] disabling power well 2
>[  307.508902] [drm:skl_set_power_well] Disabling power well 2
>[  307.508906] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  307.508924] [drm:drm_mode_setcrtc] [CRTC:20]
>[  307.508930] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1]
>[  307.508935] [drm:intel_crtc_set_config] [CRTC:20] [FB:59] #connectors=1 (x y) (0 0)
>[  307.508940] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  307.508944] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  307.508947] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  307.508950] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  307.508953] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  307.508957] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  307.508962] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  307.508966] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[  307.508972] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[  307.508975] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[  307.508978] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[  307.508982] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[  307.508986] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  307.508990] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  307.508992] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  307.508995] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  307.508999] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  307.509003] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[  307.509007] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  307.509010] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  307.509013] [drm:intel_dump_pipe_config] requested mode:
>[  307.509018] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  307.509021] [drm:intel_dump_pipe_config] adjusted mode:
>[  307.509026] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  307.509031] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[  307.509033] [drm:intel_dump_pipe_config] port clock: 540000
>[  307.509036] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[  307.509040] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  307.509043] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  307.509046] [drm:intel_dump_pipe_config] ips: 0
>[  307.509048] [drm:intel_dump_pipe_config] double wide: 0
>[  307.509061] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880144047480
>[  307.509066] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88009ba7e000 state to ffff880144047480
>[  307.509070] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004d5e400 state to ffff880144047480
>[  307.509073] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88009ba7e000 to [CRTC:20]
>[  307.509077] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88009ba7e000
>[  307.509080] [drm:drm_atomic_check_only] checking ffff880144047480
>[  307.509086] [drm:drm_atomic_commit] commiting ffff880144047480
>[  307.511936] [drm:drm_atomic_state_clear] Clearing atomic state ffff880144047480
>[  307.511940] [drm:drm_atomic_state_free] Freeing atomic state ffff880144047480
>[  307.511958] [drm:edp_panel_on] Turn eDP port A panel power on
>[  307.511968] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  307.511986] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[  307.511995] [drm:wait_panel_status] Wait complete
>[  307.512019] [drm:wait_panel_on] Wait for panel power on
>[  307.512036] [drm:wait_panel_status] mask b000000f value 80000008 status 9000000a control abcd000b
>[  307.720557] [drm:wait_panel_status] Wait complete
>[  307.721713] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  307.722378] [drm:intel_dp_set_signal_levels] Using signal levels 04000000
>[  307.723024] [drm:intel_dp_start_link_train] clock recovery OK
>[  307.723975] [drm:intel_dp_set_signal_levels] Using signal levels 05000000
>[  307.724916] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  307.725193] [drm:skl_wm_flush_pipe] flush pipe A (pass 3)
>[  307.725206] [drm:intel_edp_backlight_on] 
>[  307.725209] [drm:intel_panel_enable_backlight] pipe A
>[  307.725249] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  307.725456] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[  307.725465] [drm:skylake_update_primary_plane] Writing base 08D80000 0,0,3200,1800 pitch=16384
>[  307.725472] [drm:intel_fbc_update] disabled per chip default
>[  307.725487] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[  307.725493] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  307.725497] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  307.725500] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  307.725503] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  307.725505] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  307.725508] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  307.725510] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  307.725513] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  307.725515] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  307.725518] [drm:check_crtc_state] [CRTC:20]
>[  307.725535] [drm:check_crtc_state] [CRTC:25]
>[  307.725537] [drm:check_crtc_state] [CRTC:30]
>[  307.725540] [drm:check_shared_dpll_state] DPLL 1
>[  307.725544] [drm:check_shared_dpll_state] DPLL 2
>[  307.725547] [drm:check_shared_dpll_state] DPLL 3
>[  310.726074] kms_psr_sink_crc: starting subtest primary_mmap_gtt_waiting
>[  310.726132] [drm:add_framebuffer_internal] [FB:61]
>[  310.738063] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[  310.738108] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  310.752190] [drm:add_framebuffer_internal] [FB:62]
>[  310.778041] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  310.778052] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  310.778059] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  310.778064] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  310.778067] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  310.778082] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  310.778129] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[  310.778480] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  310.778822] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  310.778859] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  310.778866] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  310.778872] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  310.778878] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  310.778884] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  310.778902] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  310.778907] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  310.778912] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  310.778915] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  310.778918] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  310.778921] [drm:intel_display_power_get] enabling power well 2
>[  310.778925] [drm:skl_set_power_well] Enabling power well 2
>[  310.778928] [drm:intel_display_power_get] enabling DDI B power well
>[  310.778932] [drm:skl_set_power_well] Enabling DDI B power well
>[  310.778942] [drm:intel_display_power_put] disabling DDI B power well
>[  310.778945] [drm:skl_set_power_well] Disabling DDI B power well
>[  310.778948] [drm:intel_display_power_put] disabling power well 2
>[  310.778951] [drm:skl_set_power_well] Disabling power well 2
>[  310.778955] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  310.778958] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  310.778961] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  310.778964] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  310.778966] [drm:intel_display_power_get] enabling power well 2
>[  310.778970] [drm:skl_set_power_well] Enabling power well 2
>[  310.778973] [drm:intel_display_power_get] enabling DDI B power well
>[  310.778976] [drm:skl_set_power_well] Enabling DDI B power well
>[  310.778985] [drm:intel_display_power_put] disabling DDI B power well
>[  310.778989] [drm:skl_set_power_well] Disabling DDI B power well
>[  310.778991] [drm:intel_display_power_put] disabling power well 2
>[  310.778995] [drm:skl_set_power_well] Disabling power well 2
>[  310.778997] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  310.779004] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  310.779009] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  310.779013] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  310.779016] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  310.779019] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  310.779022] [drm:intel_display_power_get] enabling power well 2
>[  310.779025] [drm:skl_set_power_well] Enabling power well 2
>[  310.779028] [drm:intel_display_power_get] enabling DDI B power well
>[  310.779032] [drm:skl_set_power_well] Enabling DDI B power well
>[  310.779369] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  310.779376] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  310.779380] [drm:intel_display_power_put] disabling DDI B power well
>[  310.779385] [drm:skl_set_power_well] Disabling DDI B power well
>[  310.779387] [drm:intel_display_power_put] disabling power well 2
>[  310.779391] [drm:skl_set_power_well] Disabling power well 2
>[  310.779395] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  310.779405] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  310.779408] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  310.779411] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  310.779415] [drm:intel_display_power_get] enabling power well 2
>[  310.779418] [drm:skl_set_power_well] Enabling power well 2
>[  310.779422] [drm:intel_display_power_get] enabling DDI B power well
>[  310.779425] [drm:skl_set_power_well] Enabling DDI B power well
>[  310.779670] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  310.779673] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  310.779676] [drm:intel_display_power_put] disabling DDI B power well
>[  310.779679] [drm:skl_set_power_well] Disabling DDI B power well
>[  310.779682] [drm:intel_display_power_put] disabling power well 2
>[  310.779685] [drm:skl_set_power_well] Disabling power well 2
>[  310.779688] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  310.779699] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  310.779705] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  310.779710] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  310.779713] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  310.779716] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  310.779719] [drm:intel_display_power_get] enabling power well 2
>[  310.779722] [drm:skl_set_power_well] Enabling power well 2
>[  310.779725] [drm:intel_display_power_get] enabling DDI C power well
>[  310.779728] [drm:skl_set_power_well] Enabling DDI C power well
>[  310.779750] [drm:intel_display_power_put] disabling DDI C power well
>[  310.779755] [drm:skl_set_power_well] Disabling DDI C power well
>[  310.779759] [drm:intel_display_power_put] disabling power well 2
>[  310.779764] [drm:skl_set_power_well] Disabling power well 2
>[  310.779772] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  310.779784] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  310.779794] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  310.779805] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  310.779815] [drm:intel_display_power_get] enabling power well 2
>[  310.779824] [drm:skl_set_power_well] Enabling power well 2
>[  310.779832] [drm:intel_display_power_get] enabling DDI C power well
>[  310.779841] [drm:skl_set_power_well] Enabling DDI C power well
>[  310.779858] [drm:intel_display_power_put] disabling DDI C power well
>[  310.779868] [drm:skl_set_power_well] Disabling DDI C power well
>[  310.779878] [drm:intel_display_power_put] disabling power well 2
>[  310.779887] [drm:skl_set_power_well] Disabling power well 2
>[  310.779896] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  310.779910] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  310.779923] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  310.779934] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  310.779944] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  310.779955] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  310.779963] [drm:intel_display_power_get] enabling power well 2
>[  310.779967] [drm:skl_set_power_well] Enabling power well 2
>[  310.779971] [drm:intel_display_power_get] enabling DDI C power well
>[  310.779975] [drm:skl_set_power_well] Enabling DDI C power well
>[  310.780224] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  310.780228] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  310.780232] [drm:intel_display_power_put] disabling DDI C power well
>[  310.780237] [drm:skl_set_power_well] Disabling DDI C power well
>[  310.780241] [drm:intel_display_power_put] disabling power well 2
>[  310.780245] [drm:skl_set_power_well] Disabling power well 2
>[  310.780250] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  310.780256] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  310.780259] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  310.780263] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  310.780266] [drm:intel_display_power_get] enabling power well 2
>[  310.780271] [drm:skl_set_power_well] Enabling power well 2
>[  310.780275] [drm:intel_display_power_get] enabling DDI C power well
>[  310.780280] [drm:skl_set_power_well] Enabling DDI C power well
>[  310.780525] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  310.780528] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  310.780530] [drm:intel_display_power_put] disabling DDI C power well
>[  310.780534] [drm:skl_set_power_well] Disabling DDI C power well
>[  310.780536] [drm:intel_display_power_put] disabling power well 2
>[  310.780540] [drm:skl_set_power_well] Disabling power well 2
>[  310.780543] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  310.780557] [drm:drm_mode_setcrtc] [CRTC:20]
>[  310.780560] [drm:intel_crtc_set_config] [CRTC:20] [NOFB]
>[  310.780567] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  310.780570] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [NOCRTC]
>[  310.780572] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  310.780575] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  310.780579] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  310.780583] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[  310.801921] [drm:intel_edp_backlight_off] 
>[  311.002957] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  311.013087] [drm:edp_panel_off] Turn eDP port A panel power off
>[  311.013115] [drm:wait_panel_off] Wait for panel power off time
>[  311.013134] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  311.067913] [drm:wait_panel_status] Wait complete
>[  311.067945] [drm:intel_fbc_update] no output, disabling
>[  311.067954] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214a480
>[  311.067961] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880004c11600 state to ffff88009214a480
>[  311.067966] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004bab400 state to ffff88009214a480
>[  311.067969] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880004c11600 to [NOCRTC]
>[  311.067972] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880004c11600
>[  311.067975] [drm:drm_atomic_check_only] checking ffff88009214a480
>[  311.067981] [drm:drm_atomic_commit] commiting ffff88009214a480
>[  311.067992] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214a480
>[  311.067997] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214a480
>[  311.068005] [drm:intel_display_power_put] disabling DDI A/E power well
>[  311.068010] [drm:skl_set_power_well] Disabling DDI A/E power well
>[  311.068012] [drm:intel_display_power_put] disabling MISC IO power well
>[  311.068016] [drm:skl_set_power_well] Disabling MISC IO power well
>[  311.068019] [drm:intel_display_power_put] disabling power well 1
>[  311.068024] [drm:skl_set_power_well] Disabling power well 1
>[  311.068056] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  311.068060] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  311.068063] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  311.068066] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  311.068068] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  311.068071] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  311.068073] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  311.068076] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  311.068078] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  311.068081] [drm:check_crtc_state] [CRTC:20]
>[  311.068084] [drm:check_crtc_state] [CRTC:25]
>[  311.068087] [drm:check_crtc_state] [CRTC:30]
>[  311.068090] [drm:check_shared_dpll_state] DPLL 1
>[  311.068093] [drm:check_shared_dpll_state] DPLL 2
>[  311.068095] [drm:check_shared_dpll_state] DPLL 3
>[  311.068123] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  311.068131] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  311.068136] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  311.068141] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  311.068144] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  311.068147] [drm:intel_display_power_get] enabling power well 1
>[  311.068154] [drm:skl_set_power_well] Enabling power well 1
>[  311.068157] [drm:intel_display_power_get] enabling MISC IO power well
>[  311.068160] [drm:skl_set_power_well] Enabling MISC IO power well
>[  311.068163] [drm:intel_display_power_get] enabling DDI A/E power well
>[  311.068167] [drm:skl_set_power_well] Enabling DDI A/E power well
>[  311.068180] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  311.068189] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  311.614055] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[  311.614067] [drm:wait_panel_status] Wait complete
>[  311.614108] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  311.614118] [drm:edp_panel_vdd_on] eDP port A panel power wasn't enabled
>[  311.815271] ------------[ cut here ]------------
>[  311.815311] WARNING: CPU: 0 PID: 5262 at drivers/gpu/drm/i915/intel_dp.c:653 intel_dp_aux_ch+0xaa/0x573 [i915]()
>[  311.815315] eDP powered off while attempting aux channel communication.
>[  311.815317] Modules linked in: dm_mod ppdev snd_hda_codec_realtek snd_hda_codec_generic snd_hda_intel snd_hda_controller snd_hda_codec snd_hwdep pcspkr snd_pcm snd_timer i2c_i801 snd soundcore wmi battery parport_pc parport ac acpi_cpufreq i915 button video drm_kms_helper drm cfbfillrect cfbimgblt cfbcopyarea
>[  311.815352] CPU: 0 PID: 5262 Comm: kms_psr_sink_cr Not tainted 3.19.0-rc7_drm-intel-nightly_b4442e_20150208+ #198
>[  311.815356] Hardware name: Intel Corporation Skylake Client platform/Skylake Y LPDDR3 RVP3, BIOS SKLSE2R1.86C.B068.R00.1501090908 01/09/2015
>[  311.815359]  0000000000000000 0000000000000009 ffffffff8179a69b ffff880142e8ba58
>[  311.815365]  ffffffff8103bdec ffff880143ea44e8 ffffffffa00f6d78 0000000000000000
>[  311.815370]  ffff880143ea40e0 ffff880004e60000 ffff880004e60000 0000000000000003
>[  311.815375] Call Trace:
>[  311.815386]  [<ffffffff8179a69b>] ? dump_stack+0x40/0x50
>[  311.815394]  [<ffffffff8103bdec>] ? warn_slowpath_common+0x98/0xb0
>[  311.815419]  [<ffffffffa00f6d78>] ? intel_dp_aux_ch+0xaa/0x573 [i915]
>[  311.815425]  [<ffffffff8103be9c>] ? warn_slowpath_fmt+0x45/0x4a
>[  311.815448]  [<ffffffffa00f6d78>] ? intel_dp_aux_ch+0xaa/0x573 [i915]
>[  311.815457]  [<ffffffff81065284>] ? add_wait_queue+0x3c/0x3c
>[  311.815480]  [<ffffffffa00f7377>] ? intel_dp_aux_transfer+0x136/0x142 [i915]
>[  311.815487]  [<ffffffff8179e8ea>] ? mutex_lock+0x9/0x25
>[  311.815496]  [<ffffffffa005d5e5>] ? drm_dp_dpcd_access+0x61/0xe7 [drm_kms_helper]
>[  311.815504]  [<ffffffffa005d6e8>] ? drm_dp_dpcd_read+0x14/0x19 [drm_kms_helper]
>[  311.815527]  [<ffffffffa00f2dc9>] ? intel_dp_dpcd_read_wake+0x3a/0x64 [i915]
>[  311.815548]  [<ffffffffa00f4b91>] ? intel_dp_probe_oui.part.6+0x20/0xa5 [i915]
>[  311.815570]  [<ffffffffa00f662b>] ? intel_dp_detect+0x11a/0x184 [i915]
>[  311.815579]  [<ffffffffa005def0>] ? drm_helper_probe_single_connector_modes_merge_bits+0xc5/0x398 [drm_kms_helper]
>[  311.815597]  [<ffffffffa001b492>] ? drm_mode_getconnector+0xed/0x2c2 [drm]
>[  311.815611]  [<ffffffffa001070a>] ? drm_ioctl+0x279/0x3bc [drm]
>[  311.815625]  [<ffffffffa001b3a5>] ? drm_mode_getcrtc+0xb6/0xb6 [drm]
>[  311.815638]  [<ffffffffa000faeb>] ? drm_gem_vm_close+0x2a/0x4b [drm]
>[  311.815645]  [<ffffffff8112241d>] ? do_vfs_ioctl+0x412/0x459
>[  311.815651]  [<ffffffff811224ad>] ? SyS_ioctl+0x49/0x78
>[  311.815657]  [<ffffffff817a0092>] ? system_call_fastpath+0x12/0x17
>[  311.815661] ---[ end trace 044e3267fd3f6c3d ]---
>[  311.815680] [drm:intel_dp_check_edp] Status 0x00000000 Control 0xabcd0008
>[  311.815845] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  311.816214] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  311.816235] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  311.816242] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  311.816248] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  311.816254] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  311.816268] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  311.816290] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  311.816296] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  311.816300] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  311.816304] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  311.816306] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  311.816310] [drm:intel_display_power_get] enabling power well 2
>[  311.816315] [drm:skl_set_power_well] Enabling power well 2
>[  311.816318] [drm:intel_display_power_get] enabling DDI B power well
>[  311.816321] [drm:skl_set_power_well] Enabling DDI B power well
>[  311.816331] [drm:intel_display_power_put] disabling DDI B power well
>[  311.816335] [drm:skl_set_power_well] Disabling DDI B power well
>[  311.816338] [drm:intel_display_power_put] disabling power well 2
>[  311.816342] [drm:skl_set_power_well] Disabling power well 2
>[  311.816345] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  311.816349] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  311.816351] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  311.816354] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  311.816356] [drm:intel_display_power_get] enabling power well 2
>[  311.816360] [drm:skl_set_power_well] Enabling power well 2
>[  311.816363] [drm:intel_display_power_get] enabling DDI B power well
>[  311.816366] [drm:skl_set_power_well] Enabling DDI B power well
>[  311.816376] [drm:intel_display_power_put] disabling DDI B power well
>[  311.816380] [drm:skl_set_power_well] Disabling DDI B power well
>[  311.816382] [drm:intel_display_power_put] disabling power well 2
>[  311.816386] [drm:skl_set_power_well] Disabling power well 2
>[  311.816389] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  311.816395] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  311.816400] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  311.816404] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  311.816407] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  311.816410] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  311.816413] [drm:intel_display_power_get] enabling power well 2
>[  311.816416] [drm:skl_set_power_well] Enabling power well 2
>[  311.816420] [drm:intel_display_power_get] enabling DDI B power well
>[  311.816423] [drm:skl_set_power_well] Enabling DDI B power well
>[  311.816670] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  311.816674] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  311.816677] [drm:intel_display_power_put] disabling DDI B power well
>[  311.816680] [drm:skl_set_power_well] Disabling DDI B power well
>[  311.816683] [drm:intel_display_power_put] disabling power well 2
>[  311.816686] [drm:skl_set_power_well] Disabling power well 2
>[  311.816689] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  311.816693] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  311.816696] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  311.816699] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  311.816701] [drm:intel_display_power_get] enabling power well 2
>[  311.816704] [drm:skl_set_power_well] Enabling power well 2
>[  311.816708] [drm:intel_display_power_get] enabling DDI B power well
>[  311.816711] [drm:skl_set_power_well] Enabling DDI B power well
>[  311.816963] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  311.816974] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  311.816985] [drm:intel_display_power_put] disabling DDI B power well
>[  311.816996] [drm:skl_set_power_well] Disabling DDI B power well
>[  311.817003] [drm:intel_display_power_put] disabling power well 2
>[  311.817007] [drm:skl_set_power_well] Disabling power well 2
>[  311.817012] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  311.817022] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  311.817029] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  311.817035] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  311.817040] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  311.817044] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  311.817048] [drm:intel_display_power_get] enabling power well 2
>[  311.817053] [drm:skl_set_power_well] Enabling power well 2
>[  311.817057] [drm:intel_display_power_get] enabling DDI C power well
>[  311.817062] [drm:skl_set_power_well] Enabling DDI C power well
>[  311.817073] [drm:intel_display_power_put] disabling DDI C power well
>[  311.817078] [drm:skl_set_power_well] Disabling DDI C power well
>[  311.817082] [drm:intel_display_power_put] disabling power well 2
>[  311.817088] [drm:skl_set_power_well] Disabling power well 2
>[  311.817092] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  311.817097] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  311.817101] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  311.817105] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  311.817109] [drm:intel_display_power_get] enabling power well 2
>[  311.817114] [drm:skl_set_power_well] Enabling power well 2
>[  311.817118] [drm:intel_display_power_get] enabling DDI C power well
>[  311.817123] [drm:skl_set_power_well] Enabling DDI C power well
>[  311.817134] [drm:intel_display_power_put] disabling DDI C power well
>[  311.817139] [drm:skl_set_power_well] Disabling DDI C power well
>[  311.817143] [drm:intel_display_power_put] disabling power well 2
>[  311.817148] [drm:skl_set_power_well] Disabling power well 2
>[  311.817153] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  311.817161] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  311.817168] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  311.817173] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  311.817177] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  311.817180] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  311.817184] [drm:intel_display_power_get] enabling power well 2
>[  311.817188] [drm:skl_set_power_well] Enabling power well 2
>[  311.817193] [drm:intel_display_power_get] enabling DDI C power well
>[  311.817197] [drm:skl_set_power_well] Enabling DDI C power well
>[  311.817445] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  311.817448] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  311.817451] [drm:intel_display_power_put] disabling DDI C power well
>[  311.817455] [drm:skl_set_power_well] Disabling DDI C power well
>[  311.817458] [drm:intel_display_power_put] disabling power well 2
>[  311.817461] [drm:skl_set_power_well] Disabling power well 2
>[  311.817464] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  311.817468] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  311.817471] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  311.817473] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  311.817476] [drm:intel_display_power_get] enabling power well 2
>[  311.817479] [drm:skl_set_power_well] Enabling power well 2
>[  311.817482] [drm:intel_display_power_get] enabling DDI C power well
>[  311.817486] [drm:skl_set_power_well] Enabling DDI C power well
>[  311.817730] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  311.817732] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  311.817735] [drm:intel_display_power_put] disabling DDI C power well
>[  311.817739] [drm:skl_set_power_well] Disabling DDI C power well
>[  311.817741] [drm:intel_display_power_put] disabling power well 2
>[  311.817745] [drm:skl_set_power_well] Disabling power well 2
>[  311.817748] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  311.817759] [drm:drm_mode_setcrtc] [CRTC:20]
>[  311.817764] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1]
>[  311.817769] [drm:intel_crtc_set_config] [CRTC:20] [FB:61] #connectors=1 (x y) (0 0)
>[  311.817774] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  311.817777] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  311.817780] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  311.817784] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  311.817786] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  311.817790] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  311.817795] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  311.817799] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[  311.817804] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[  311.817807] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[  311.817811] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[  311.817814] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[  311.817819] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  311.817822] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  311.817825] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  311.817828] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  311.817832] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  311.817836] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[  311.817840] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  311.817843] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  311.817846] [drm:intel_dump_pipe_config] requested mode:
>[  311.817851] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  311.817853] [drm:intel_dump_pipe_config] adjusted mode:
>[  311.817858] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  311.817863] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[  311.817865] [drm:intel_dump_pipe_config] port clock: 540000
>[  311.817876] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[  311.817885] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  311.817897] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  311.817907] [drm:intel_dump_pipe_config] ips: 0
>[  311.817916] [drm:intel_dump_pipe_config] double wide: 0
>[  311.817937] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  311.817949] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880004c11780 state to ffff88009214ab40
>[  311.817960] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004babc00 state to ffff88009214ab40
>[  311.817971] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880004c11780 to [CRTC:20]
>[  311.817983] [drm:drm_atomic_set_fb_for_plane] Set [FB:61] for plane state ffff880004c11780
>[  311.817992] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  311.818004] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  311.820946] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  311.820951] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  311.820969] [drm:edp_panel_on] Turn eDP port A panel power on
>[  311.820979] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  311.820997] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[  311.821005] [drm:wait_panel_status] Wait complete
>[  311.821029] [drm:wait_panel_on] Wait for panel power on
>[  311.821047] [drm:wait_panel_status] mask b000000f value 80000008 status 9000000a control abcd000b
>[  312.030039] [drm:wait_panel_status] Wait complete
>[  312.031162] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  312.031811] [drm:intel_dp_set_signal_levels] Using signal levels 04000000
>[  312.032455] [drm:intel_dp_start_link_train] clock recovery OK
>[  312.033406] [drm:intel_dp_set_signal_levels] Using signal levels 05000000
>[  312.034346] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  312.034624] [drm:skl_wm_flush_pipe] flush pipe A (pass 3)
>[  312.034636] [drm:intel_edp_backlight_on] 
>[  312.034639] [drm:intel_panel_enable_backlight] pipe A
>[  312.034679] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  312.034883] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[  312.034892] [drm:skylake_update_primary_plane] Writing base 0CD80000 0,0,3200,1800 pitch=16384
>[  312.034903] [drm:intel_fbc_update] disabled per chip default
>[  312.034918] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[  312.034924] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  312.034928] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  312.034931] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  312.034933] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  312.034936] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  312.034938] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  312.034941] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  312.034943] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  312.034946] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  312.034949] [drm:check_crtc_state] [CRTC:20]
>[  312.034965] [drm:check_crtc_state] [CRTC:25]
>[  312.034968] [drm:check_crtc_state] [CRTC:30]
>[  312.034971] [drm:check_shared_dpll_state] DPLL 1
>[  312.034979] [drm:check_shared_dpll_state] DPLL 2
>[  312.034990] [drm:check_shared_dpll_state] DPLL 3
>[  315.035735] kms_psr_sink_crc: starting subtest primary_mmap_cpu
>[  315.035793] [drm:add_framebuffer_internal] [FB:63]
>[  315.047764] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[  315.047807] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  315.062164] [drm:add_framebuffer_internal] [FB:64]
>[  315.088304] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  315.088315] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  315.088322] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  315.088327] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  315.088331] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  315.088345] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  315.088393] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[  315.088734] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  315.089065] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  315.089083] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  315.089089] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  315.089095] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  315.089100] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  315.089106] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  315.089123] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  315.089128] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  315.089133] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  315.089136] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  315.089139] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  315.089142] [drm:intel_display_power_get] enabling power well 2
>[  315.089146] [drm:skl_set_power_well] Enabling power well 2
>[  315.089149] [drm:intel_display_power_get] enabling DDI B power well
>[  315.089153] [drm:skl_set_power_well] Enabling DDI B power well
>[  315.089163] [drm:intel_display_power_put] disabling DDI B power well
>[  315.089166] [drm:skl_set_power_well] Disabling DDI B power well
>[  315.089169] [drm:intel_display_power_put] disabling power well 2
>[  315.089172] [drm:skl_set_power_well] Disabling power well 2
>[  315.089176] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  315.089179] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  315.089182] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  315.089185] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  315.089187] [drm:intel_display_power_get] enabling power well 2
>[  315.089190] [drm:skl_set_power_well] Enabling power well 2
>[  315.089194] [drm:intel_display_power_get] enabling DDI B power well
>[  315.089197] [drm:skl_set_power_well] Enabling DDI B power well
>[  315.089206] [drm:intel_display_power_put] disabling DDI B power well
>[  315.089210] [drm:skl_set_power_well] Disabling DDI B power well
>[  315.089212] [drm:intel_display_power_put] disabling power well 2
>[  315.089216] [drm:skl_set_power_well] Disabling power well 2
>[  315.089219] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  315.089226] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  315.089231] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  315.089235] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  315.089238] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  315.089241] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  315.089244] [drm:intel_display_power_get] enabling power well 2
>[  315.089247] [drm:skl_set_power_well] Enabling power well 2
>[  315.089250] [drm:intel_display_power_get] enabling DDI B power well
>[  315.089253] [drm:skl_set_power_well] Enabling DDI B power well
>[  315.089500] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  315.089503] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  315.089506] [drm:intel_display_power_put] disabling DDI B power well
>[  315.089510] [drm:skl_set_power_well] Disabling DDI B power well
>[  315.089512] [drm:intel_display_power_put] disabling power well 2
>[  315.089516] [drm:skl_set_power_well] Disabling power well 2
>[  315.089519] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  315.089523] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  315.089526] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  315.089528] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  315.089531] [drm:intel_display_power_get] enabling power well 2
>[  315.089534] [drm:skl_set_power_well] Enabling power well 2
>[  315.089537] [drm:intel_display_power_get] enabling DDI B power well
>[  315.089540] [drm:skl_set_power_well] Enabling DDI B power well
>[  315.089783] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  315.089786] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  315.089788] [drm:intel_display_power_put] disabling DDI B power well
>[  315.089792] [drm:skl_set_power_well] Disabling DDI B power well
>[  315.089794] [drm:intel_display_power_put] disabling power well 2
>[  315.089798] [drm:skl_set_power_well] Disabling power well 2
>[  315.089801] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  315.089808] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  315.089812] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  315.089816] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  315.089819] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  315.089822] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  315.089824] [drm:intel_display_power_get] enabling power well 2
>[  315.089827] [drm:skl_set_power_well] Enabling power well 2
>[  315.089831] [drm:intel_display_power_get] enabling DDI C power well
>[  315.089834] [drm:skl_set_power_well] Enabling DDI C power well
>[  315.089843] [drm:intel_display_power_put] disabling DDI C power well
>[  315.089847] [drm:skl_set_power_well] Disabling DDI C power well
>[  315.089849] [drm:intel_display_power_put] disabling power well 2
>[  315.089853] [drm:skl_set_power_well] Disabling power well 2
>[  315.089856] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  315.089859] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  315.089862] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  315.089864] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  315.089867] [drm:intel_display_power_get] enabling power well 2
>[  315.089870] [drm:skl_set_power_well] Enabling power well 2
>[  315.089873] [drm:intel_display_power_get] enabling DDI C power well
>[  315.089876] [drm:skl_set_power_well] Enabling DDI C power well
>[  315.089885] [drm:intel_display_power_put] disabling DDI C power well
>[  315.089889] [drm:skl_set_power_well] Disabling DDI C power well
>[  315.089891] [drm:intel_display_power_put] disabling power well 2
>[  315.089895] [drm:skl_set_power_well] Disabling power well 2
>[  315.089898] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  315.089903] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  315.089908] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  315.089912] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  315.089915] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  315.089917] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  315.089920] [drm:intel_display_power_get] enabling power well 2
>[  315.089923] [drm:skl_set_power_well] Enabling power well 2
>[  315.089926] [drm:intel_display_power_get] enabling DDI C power well
>[  315.089929] [drm:skl_set_power_well] Enabling DDI C power well
>[  315.090172] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  315.090175] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  315.090177] [drm:intel_display_power_put] disabling DDI C power well
>[  315.090181] [drm:skl_set_power_well] Disabling DDI C power well
>[  315.090183] [drm:intel_display_power_put] disabling power well 2
>[  315.090187] [drm:skl_set_power_well] Disabling power well 2
>[  315.090190] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  315.090193] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  315.090196] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  315.090199] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  315.090201] [drm:intel_display_power_get] enabling power well 2
>[  315.090204] [drm:skl_set_power_well] Enabling power well 2
>[  315.090207] [drm:intel_display_power_get] enabling DDI C power well
>[  315.090210] [drm:skl_set_power_well] Enabling DDI C power well
>[  315.090399] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  315.090408] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  315.090413] [drm:intel_display_power_put] disabling DDI C power well
>[  315.090426] [drm:skl_set_power_well] Disabling DDI C power well
>[  315.090430] [drm:intel_display_power_put] disabling power well 2
>[  315.090435] [drm:skl_set_power_well] Disabling power well 2
>[  315.090441] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  315.090464] [drm:drm_mode_setcrtc] [CRTC:20]
>[  315.090470] [drm:intel_crtc_set_config] [CRTC:20] [NOFB]
>[  315.090478] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  315.090482] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [NOCRTC]
>[  315.090486] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  315.090490] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  315.090495] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  315.090501] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[  315.112452] [drm:intel_edp_backlight_off] 
>[  315.313520] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  315.321640] [drm:edp_panel_off] Turn eDP port A panel power off
>[  315.321667] [drm:wait_panel_off] Wait for panel power off time
>[  315.321687] [drm:wait_panel_status] mask b0000000 value 00000000 status a0000003 control abcd0000
>[  315.376513] [drm:wait_panel_status] Wait complete
>[  315.376546] [drm:intel_fbc_update] no output, disabling
>[  315.376555] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214a480
>[  315.376562] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880148c039c0 state to ffff88009214a480
>[  315.376567] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004babc00 state to ffff88009214a480
>[  315.376570] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880148c039c0 to [NOCRTC]
>[  315.376573] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880148c039c0
>[  315.376576] [drm:drm_atomic_check_only] checking ffff88009214a480
>[  315.376582] [drm:drm_atomic_commit] commiting ffff88009214a480
>[  315.376594] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214a480
>[  315.376599] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214a480
>[  315.376607] [drm:intel_display_power_put] disabling DDI A/E power well
>[  315.376612] [drm:skl_set_power_well] Disabling DDI A/E power well
>[  315.376614] [drm:intel_display_power_put] disabling MISC IO power well
>[  315.376618] [drm:skl_set_power_well] Disabling MISC IO power well
>[  315.376620] [drm:intel_display_power_put] disabling power well 1
>[  315.376625] [drm:skl_set_power_well] Disabling power well 1
>[  315.376658] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  315.376661] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  315.376664] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  315.376667] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  315.376669] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  315.376672] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  315.376675] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  315.376677] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  315.376680] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  315.376683] [drm:check_crtc_state] [CRTC:20]
>[  315.376686] [drm:check_crtc_state] [CRTC:25]
>[  315.376688] [drm:check_crtc_state] [CRTC:30]
>[  315.376692] [drm:check_shared_dpll_state] DPLL 1
>[  315.376695] [drm:check_shared_dpll_state] DPLL 2
>[  315.376697] [drm:check_shared_dpll_state] DPLL 3
>[  315.376725] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  315.376733] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  315.376739] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  315.376743] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  315.376747] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  315.376750] [drm:intel_display_power_get] enabling power well 1
>[  315.376757] [drm:skl_set_power_well] Enabling power well 1
>[  315.376760] [drm:intel_display_power_get] enabling MISC IO power well
>[  315.376764] [drm:skl_set_power_well] Enabling MISC IO power well
>[  315.376766] [drm:intel_display_power_get] enabling DDI A/E power well
>[  315.376770] [drm:skl_set_power_well] Enabling DDI A/E power well
>[  315.376783] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  315.376792] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  315.922614] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[  315.922626] [drm:wait_panel_status] Wait complete
>[  315.922667] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  315.922676] [drm:edp_panel_vdd_on] eDP port A panel power wasn't enabled
>[  316.123969] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  316.124321] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  316.124342] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  316.124349] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  316.124355] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  316.124361] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  316.124375] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  316.124399] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  316.124405] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  316.124419] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  316.124423] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  316.124425] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  316.124429] [drm:intel_display_power_get] enabling power well 2
>[  316.124433] [drm:skl_set_power_well] Enabling power well 2
>[  316.124437] [drm:intel_display_power_get] enabling DDI B power well
>[  316.124440] [drm:skl_set_power_well] Enabling DDI B power well
>[  316.124450] [drm:intel_display_power_put] disabling DDI B power well
>[  316.124454] [drm:skl_set_power_well] Disabling DDI B power well
>[  316.124457] [drm:intel_display_power_put] disabling power well 2
>[  316.124461] [drm:skl_set_power_well] Disabling power well 2
>[  316.124464] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  316.124474] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  316.124486] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  316.124496] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  316.124507] [drm:intel_display_power_get] enabling power well 2
>[  316.124517] [drm:skl_set_power_well] Enabling power well 2
>[  316.124526] [drm:intel_display_power_get] enabling DDI B power well
>[  316.124530] [drm:skl_set_power_well] Enabling DDI B power well
>[  316.124539] [drm:intel_display_power_put] disabling DDI B power well
>[  316.124543] [drm:skl_set_power_well] Disabling DDI B power well
>[  316.124546] [drm:intel_display_power_put] disabling power well 2
>[  316.124550] [drm:skl_set_power_well] Disabling power well 2
>[  316.124553] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  316.124561] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  316.124567] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  316.124573] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  316.124577] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  316.124581] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  316.124585] [drm:intel_display_power_get] enabling power well 2
>[  316.124589] [drm:skl_set_power_well] Enabling power well 2
>[  316.124593] [drm:intel_display_power_get] enabling DDI B power well
>[  316.124598] [drm:skl_set_power_well] Enabling DDI B power well
>[  316.124856] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  316.124862] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  316.124867] [drm:intel_display_power_put] disabling DDI B power well
>[  316.124873] [drm:skl_set_power_well] Disabling DDI B power well
>[  316.124876] [drm:intel_display_power_put] disabling power well 2
>[  316.124881] [drm:skl_set_power_well] Disabling power well 2
>[  316.124886] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  316.124895] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  316.124898] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  316.124901] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  316.124904] [drm:intel_display_power_get] enabling power well 2
>[  316.124907] [drm:skl_set_power_well] Enabling power well 2
>[  316.124911] [drm:intel_display_power_get] enabling DDI B power well
>[  316.124914] [drm:skl_set_power_well] Enabling DDI B power well
>[  316.125159] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  316.125162] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  316.125165] [drm:intel_display_power_put] disabling DDI B power well
>[  316.125169] [drm:skl_set_power_well] Disabling DDI B power well
>[  316.125171] [drm:intel_display_power_put] disabling power well 2
>[  316.125175] [drm:skl_set_power_well] Disabling power well 2
>[  316.125178] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  316.125186] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  316.125192] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  316.125196] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  316.125199] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  316.125202] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  316.125205] [drm:intel_display_power_get] enabling power well 2
>[  316.125208] [drm:skl_set_power_well] Enabling power well 2
>[  316.125211] [drm:intel_display_power_get] enabling DDI C power well
>[  316.125215] [drm:skl_set_power_well] Enabling DDI C power well
>[  316.125224] [drm:intel_display_power_put] disabling DDI C power well
>[  316.125228] [drm:skl_set_power_well] Disabling DDI C power well
>[  316.125230] [drm:intel_display_power_put] disabling power well 2
>[  316.125234] [drm:skl_set_power_well] Disabling power well 2
>[  316.125237] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  316.125240] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  316.125243] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  316.125246] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  316.125248] [drm:intel_display_power_get] enabling power well 2
>[  316.125251] [drm:skl_set_power_well] Enabling power well 2
>[  316.125255] [drm:intel_display_power_get] enabling DDI C power well
>[  316.125258] [drm:skl_set_power_well] Enabling DDI C power well
>[  316.125267] [drm:intel_display_power_put] disabling DDI C power well
>[  316.125271] [drm:skl_set_power_well] Disabling DDI C power well
>[  316.125274] [drm:intel_display_power_put] disabling power well 2
>[  316.125277] [drm:skl_set_power_well] Disabling power well 2
>[  316.125280] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  316.125286] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  316.125290] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  316.125294] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  316.125297] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  316.125300] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  316.125302] [drm:intel_display_power_get] enabling power well 2
>[  316.125306] [drm:skl_set_power_well] Enabling power well 2
>[  316.125309] [drm:intel_display_power_get] enabling DDI C power well
>[  316.125312] [drm:skl_set_power_well] Enabling DDI C power well
>[  316.125561] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  316.125568] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  316.125572] [drm:intel_display_power_put] disabling DDI C power well
>[  316.125577] [drm:skl_set_power_well] Disabling DDI C power well
>[  316.125579] [drm:intel_display_power_put] disabling power well 2
>[  316.125583] [drm:skl_set_power_well] Disabling power well 2
>[  316.125587] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  316.125597] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  316.125600] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  316.125603] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  316.125607] [drm:intel_display_power_get] enabling power well 2
>[  316.125610] [drm:skl_set_power_well] Enabling power well 2
>[  316.125613] [drm:intel_display_power_get] enabling DDI C power well
>[  316.125617] [drm:skl_set_power_well] Enabling DDI C power well
>[  316.125914] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  316.125921] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  316.125925] [drm:intel_display_power_put] disabling DDI C power well
>[  316.125930] [drm:skl_set_power_well] Disabling DDI C power well
>[  316.125933] [drm:intel_display_power_put] disabling power well 2
>[  316.125936] [drm:skl_set_power_well] Disabling power well 2
>[  316.125941] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  316.125959] [drm:drm_mode_setcrtc] [CRTC:20]
>[  316.125965] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1]
>[  316.125970] [drm:intel_crtc_set_config] [CRTC:20] [FB:63] #connectors=1 (x y) (0 0)
>[  316.125976] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  316.125979] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  316.125982] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  316.125986] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  316.125988] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  316.125992] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  316.125996] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  316.126001] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[  316.126006] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[  316.126009] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[  316.126013] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[  316.126016] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[  316.126021] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  316.126024] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  316.126027] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  316.126030] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  316.126034] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  316.126038] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[  316.126042] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  316.126045] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  316.126048] [drm:intel_dump_pipe_config] requested mode:
>[  316.126053] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  316.126056] [drm:intel_dump_pipe_config] adjusted mode:
>[  316.126061] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  316.126066] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[  316.126069] [drm:intel_dump_pipe_config] port clock: 540000
>[  316.126071] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[  316.126075] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  316.126078] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  316.126081] [drm:intel_dump_pipe_config] ips: 0
>[  316.126083] [drm:intel_dump_pipe_config] double wide: 0
>[  316.126096] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880144047000
>[  316.126101] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88009ba7e240 state to ffff880144047000
>[  316.126105] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004d58c00 state to ffff880144047000
>[  316.126109] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88009ba7e240 to [CRTC:20]
>[  316.126112] [drm:drm_atomic_set_fb_for_plane] Set [FB:63] for plane state ffff88009ba7e240
>[  316.126115] [drm:drm_atomic_check_only] checking ffff880144047000
>[  316.126122] [drm:drm_atomic_commit] commiting ffff880144047000
>[  316.129723] [drm:drm_atomic_state_clear] Clearing atomic state ffff880144047000
>[  316.129728] [drm:drm_atomic_state_free] Freeing atomic state ffff880144047000
>[  316.129746] [drm:edp_panel_on] Turn eDP port A panel power on
>[  316.129755] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  316.129773] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[  316.129782] [drm:wait_panel_status] Wait complete
>[  316.129806] [drm:wait_panel_on] Wait for panel power on
>[  316.129823] [drm:wait_panel_status] mask b000000f value 80000008 status 9000000a control abcd000b
>[  316.338633] [drm:wait_panel_status] Wait complete
>[  316.339791] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  316.340457] [drm:intel_dp_set_signal_levels] Using signal levels 04000000
>[  316.341105] [drm:intel_dp_start_link_train] clock recovery OK
>[  316.342059] [drm:intel_dp_set_signal_levels] Using signal levels 05000000
>[  316.343003] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  316.343281] [drm:skl_wm_flush_pipe] flush pipe A (pass 3)
>[  316.343294] [drm:intel_edp_backlight_on] 
>[  316.343297] [drm:intel_panel_enable_backlight] pipe A
>[  316.343338] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  316.343549] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[  316.343559] [drm:skylake_update_primary_plane] Writing base 08D80000 0,0,3200,1800 pitch=16384
>[  316.343567] [drm:intel_fbc_update] disabled per chip default
>[  316.343582] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[  316.343588] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  316.343592] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  316.343595] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  316.343597] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  316.343600] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  316.343602] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  316.343605] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  316.343607] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  316.343610] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  316.343613] [drm:check_crtc_state] [CRTC:20]
>[  316.343629] [drm:check_crtc_state] [CRTC:25]
>[  316.343632] [drm:check_crtc_state] [CRTC:30]
>[  316.343635] [drm:check_shared_dpll_state] DPLL 1
>[  316.343638] [drm:check_shared_dpll_state] DPLL 2
>[  316.343641] [drm:check_shared_dpll_state] DPLL 3
>[  319.344278] kms_psr_sink_crc: starting subtest primary_blt
>[  319.344347] [drm:add_framebuffer_internal] [FB:65]
>[  319.356345] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[  319.356391] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  319.370494] [drm:add_framebuffer_internal] [FB:66]
>[  319.396539] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  319.396549] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  319.396556] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  319.396562] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  319.396565] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  319.396579] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  319.396627] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[  319.396989] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  319.397321] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  319.397339] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  319.397346] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  319.397352] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  319.397358] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  319.397366] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  319.397389] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  319.397397] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  319.397402] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  319.397405] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  319.397408] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  319.397411] [drm:intel_display_power_get] enabling power well 2
>[  319.397415] [drm:skl_set_power_well] Enabling power well 2
>[  319.397419] [drm:intel_display_power_get] enabling DDI B power well
>[  319.397422] [drm:skl_set_power_well] Enabling DDI B power well
>[  319.397432] [drm:intel_display_power_put] disabling DDI B power well
>[  319.397435] [drm:skl_set_power_well] Disabling DDI B power well
>[  319.397438] [drm:intel_display_power_put] disabling power well 2
>[  319.397442] [drm:skl_set_power_well] Disabling power well 2
>[  319.397445] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  319.397448] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  319.397451] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  319.397454] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  319.397456] [drm:intel_display_power_get] enabling power well 2
>[  319.397459] [drm:skl_set_power_well] Enabling power well 2
>[  319.397462] [drm:intel_display_power_get] enabling DDI B power well
>[  319.397466] [drm:skl_set_power_well] Enabling DDI B power well
>[  319.397475] [drm:intel_display_power_put] disabling DDI B power well
>[  319.397479] [drm:skl_set_power_well] Disabling DDI B power well
>[  319.397481] [drm:intel_display_power_put] disabling power well 2
>[  319.397485] [drm:skl_set_power_well] Disabling power well 2
>[  319.397488] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  319.397494] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  319.397499] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  319.397503] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  319.397507] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  319.397510] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  319.397513] [drm:intel_display_power_get] enabling power well 2
>[  319.397516] [drm:skl_set_power_well] Enabling power well 2
>[  319.397519] [drm:intel_display_power_get] enabling DDI B power well
>[  319.397522] [drm:skl_set_power_well] Enabling DDI B power well
>[  319.397769] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  319.397772] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  319.397775] [drm:intel_display_power_put] disabling DDI B power well
>[  319.397779] [drm:skl_set_power_well] Disabling DDI B power well
>[  319.397781] [drm:intel_display_power_put] disabling power well 2
>[  319.397785] [drm:skl_set_power_well] Disabling power well 2
>[  319.397788] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  319.397792] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  319.397794] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  319.397797] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  319.397799] [drm:intel_display_power_get] enabling power well 2
>[  319.397802] [drm:skl_set_power_well] Enabling power well 2
>[  319.397806] [drm:intel_display_power_get] enabling DDI B power well
>[  319.397809] [drm:skl_set_power_well] Enabling DDI B power well
>[  319.398056] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  319.398061] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  319.398065] [drm:intel_display_power_put] disabling DDI B power well
>[  319.398070] [drm:skl_set_power_well] Disabling DDI B power well
>[  319.398074] [drm:intel_display_power_put] disabling power well 2
>[  319.398079] [drm:skl_set_power_well] Disabling power well 2
>[  319.398083] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  319.398094] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  319.398101] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  319.398106] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  319.398110] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  319.398114] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  319.398117] [drm:intel_display_power_get] enabling power well 2
>[  319.398122] [drm:skl_set_power_well] Enabling power well 2
>[  319.398128] [drm:intel_display_power_get] enabling DDI C power well
>[  319.398138] [drm:skl_set_power_well] Enabling DDI C power well
>[  319.398154] [drm:intel_display_power_put] disabling DDI C power well
>[  319.398162] [drm:skl_set_power_well] Disabling DDI C power well
>[  319.398166] [drm:intel_display_power_put] disabling power well 2
>[  319.398171] [drm:skl_set_power_well] Disabling power well 2
>[  319.398176] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  319.398181] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  319.398185] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  319.398189] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  319.398193] [drm:intel_display_power_get] enabling power well 2
>[  319.398197] [drm:skl_set_power_well] Enabling power well 2
>[  319.398202] [drm:intel_display_power_get] enabling DDI C power well
>[  319.398206] [drm:skl_set_power_well] Enabling DDI C power well
>[  319.398217] [drm:intel_display_power_put] disabling DDI C power well
>[  319.398222] [drm:skl_set_power_well] Disabling DDI C power well
>[  319.398225] [drm:intel_display_power_put] disabling power well 2
>[  319.398230] [drm:skl_set_power_well] Disabling power well 2
>[  319.398235] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  319.398244] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  319.398257] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  319.398269] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  319.398280] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  319.398288] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  319.398292] [drm:intel_display_power_get] enabling power well 2
>[  319.398296] [drm:skl_set_power_well] Enabling power well 2
>[  319.398300] [drm:intel_display_power_get] enabling DDI C power well
>[  319.398305] [drm:skl_set_power_well] Enabling DDI C power well
>[  319.398550] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  319.398553] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  319.398556] [drm:intel_display_power_put] disabling DDI C power well
>[  319.398559] [drm:skl_set_power_well] Disabling DDI C power well
>[  319.398562] [drm:intel_display_power_put] disabling power well 2
>[  319.398565] [drm:skl_set_power_well] Disabling power well 2
>[  319.398568] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  319.398572] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  319.398575] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  319.398578] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  319.398580] [drm:intel_display_power_get] enabling power well 2
>[  319.398584] [drm:skl_set_power_well] Enabling power well 2
>[  319.398587] [drm:intel_display_power_get] enabling DDI C power well
>[  319.398590] [drm:skl_set_power_well] Enabling DDI C power well
>[  319.398939] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  319.398948] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  319.398954] [drm:intel_display_power_put] disabling DDI C power well
>[  319.398960] [drm:skl_set_power_well] Disabling DDI C power well
>[  319.398964] [drm:intel_display_power_put] disabling power well 2
>[  319.398969] [drm:skl_set_power_well] Disabling power well 2
>[  319.398974] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  319.398996] [drm:drm_mode_setcrtc] [CRTC:20]
>[  319.399001] [drm:intel_crtc_set_config] [CRTC:20] [NOFB]
>[  319.399009] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  319.399014] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [NOCRTC]
>[  319.399018] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  319.399022] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  319.399027] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  319.399034] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[  319.420996] [drm:intel_edp_backlight_off] 
>[  319.622051] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  319.630179] [drm:edp_panel_off] Turn eDP port A panel power off
>[  319.630208] [drm:wait_panel_off] Wait for panel power off time
>[  319.630227] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  319.685052] [drm:wait_panel_status] Wait complete
>[  319.685084] [drm:intel_fbc_update] no output, disabling
>[  319.685093] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214a480
>[  319.685101] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880148c03540 state to ffff88009214a480
>[  319.685105] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004babc00 state to ffff88009214a480
>[  319.685109] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880148c03540 to [NOCRTC]
>[  319.685112] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880148c03540
>[  319.685115] [drm:drm_atomic_check_only] checking ffff88009214a480
>[  319.685121] [drm:drm_atomic_commit] commiting ffff88009214a480
>[  319.685132] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214a480
>[  319.685137] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214a480
>[  319.685145] [drm:intel_display_power_put] disabling DDI A/E power well
>[  319.685150] [drm:skl_set_power_well] Disabling DDI A/E power well
>[  319.685153] [drm:intel_display_power_put] disabling MISC IO power well
>[  319.685157] [drm:skl_set_power_well] Disabling MISC IO power well
>[  319.685159] [drm:intel_display_power_put] disabling power well 1
>[  319.685164] [drm:skl_set_power_well] Disabling power well 1
>[  319.685197] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  319.685200] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  319.685203] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  319.685206] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  319.685208] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  319.685210] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  319.685213] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  319.685216] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  319.685218] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  319.685221] [drm:check_crtc_state] [CRTC:20]
>[  319.685224] [drm:check_crtc_state] [CRTC:25]
>[  319.685227] [drm:check_crtc_state] [CRTC:30]
>[  319.685230] [drm:check_shared_dpll_state] DPLL 1
>[  319.685233] [drm:check_shared_dpll_state] DPLL 2
>[  319.685236] [drm:check_shared_dpll_state] DPLL 3
>[  319.685265] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  319.685273] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  319.685279] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  319.685284] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  319.685287] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  319.685290] [drm:intel_display_power_get] enabling power well 1
>[  319.685297] [drm:skl_set_power_well] Enabling power well 1
>[  319.685300] [drm:intel_display_power_get] enabling MISC IO power well
>[  319.685303] [drm:skl_set_power_well] Enabling MISC IO power well
>[  319.685306] [drm:intel_display_power_get] enabling DDI A/E power well
>[  319.685310] [drm:skl_set_power_well] Enabling DDI A/E power well
>[  319.685323] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  319.685332] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  320.231070] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[  320.231082] [drm:wait_panel_status] Wait complete
>[  320.231123] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  320.231133] [drm:edp_panel_vdd_on] eDP port A panel power wasn't enabled
>[  320.432452] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  320.432803] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  320.432825] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  320.432832] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  320.432838] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  320.432843] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  320.432858] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  320.432882] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  320.432889] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  320.432893] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  320.432897] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  320.432899] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  320.432903] [drm:intel_display_power_get] enabling power well 2
>[  320.432907] [drm:skl_set_power_well] Enabling power well 2
>[  320.432911] [drm:intel_display_power_get] enabling DDI B power well
>[  320.432914] [drm:skl_set_power_well] Enabling DDI B power well
>[  320.432924] [drm:intel_display_power_put] disabling DDI B power well
>[  320.432928] [drm:skl_set_power_well] Disabling DDI B power well
>[  320.432931] [drm:intel_display_power_put] disabling power well 2
>[  320.432934] [drm:skl_set_power_well] Disabling power well 2
>[  320.432937] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  320.432941] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  320.432944] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  320.432956] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  320.432959] [drm:intel_display_power_get] enabling power well 2
>[  320.432962] [drm:skl_set_power_well] Enabling power well 2
>[  320.432965] [drm:intel_display_power_get] enabling DDI B power well
>[  320.432969] [drm:skl_set_power_well] Enabling DDI B power well
>[  320.432978] [drm:intel_display_power_put] disabling DDI B power well
>[  320.432982] [drm:skl_set_power_well] Disabling DDI B power well
>[  320.432984] [drm:intel_display_power_put] disabling power well 2
>[  320.432988] [drm:skl_set_power_well] Disabling power well 2
>[  320.432991] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  320.432998] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  320.433004] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  320.433008] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  320.433022] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  320.433033] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  320.433043] [drm:intel_display_power_get] enabling power well 2
>[  320.433053] [drm:skl_set_power_well] Enabling power well 2
>[  320.433063] [drm:intel_display_power_get] enabling DDI B power well
>[  320.433073] [drm:skl_set_power_well] Enabling DDI B power well
>[  320.433399] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  320.433405] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  320.433409] [drm:intel_display_power_put] disabling DDI B power well
>[  320.433414] [drm:skl_set_power_well] Disabling DDI B power well
>[  320.433416] [drm:intel_display_power_put] disabling power well 2
>[  320.433420] [drm:skl_set_power_well] Disabling power well 2
>[  320.433424] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  320.433433] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  320.433437] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  320.433439] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  320.433443] [drm:intel_display_power_get] enabling power well 2
>[  320.433446] [drm:skl_set_power_well] Enabling power well 2
>[  320.433450] [drm:intel_display_power_get] enabling DDI B power well
>[  320.433453] [drm:skl_set_power_well] Enabling DDI B power well
>[  320.433788] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  320.433795] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  320.433800] [drm:intel_display_power_put] disabling DDI B power well
>[  320.433804] [drm:skl_set_power_well] Disabling DDI B power well
>[  320.433806] [drm:intel_display_power_put] disabling power well 2
>[  320.433810] [drm:skl_set_power_well] Disabling power well 2
>[  320.433814] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  320.433828] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  320.433835] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  320.433839] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  320.433843] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  320.433846] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  320.433850] [drm:intel_display_power_get] enabling power well 2
>[  320.433853] [drm:skl_set_power_well] Enabling power well 2
>[  320.433856] [drm:intel_display_power_get] enabling DDI C power well
>[  320.433860] [drm:skl_set_power_well] Enabling DDI C power well
>[  320.433870] [drm:intel_display_power_put] disabling DDI C power well
>[  320.433874] [drm:skl_set_power_well] Disabling DDI C power well
>[  320.433876] [drm:intel_display_power_put] disabling power well 2
>[  320.433880] [drm:skl_set_power_well] Disabling power well 2
>[  320.433883] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  320.433886] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  320.433889] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  320.433892] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  320.433894] [drm:intel_display_power_get] enabling power well 2
>[  320.433898] [drm:skl_set_power_well] Enabling power well 2
>[  320.433901] [drm:intel_display_power_get] enabling DDI C power well
>[  320.433904] [drm:skl_set_power_well] Enabling DDI C power well
>[  320.433914] [drm:intel_display_power_put] disabling DDI C power well
>[  320.433917] [drm:skl_set_power_well] Disabling DDI C power well
>[  320.433920] [drm:intel_display_power_put] disabling power well 2
>[  320.433924] [drm:skl_set_power_well] Disabling power well 2
>[  320.433926] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  320.433932] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  320.433937] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  320.433941] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  320.433945] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  320.433960] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  320.433963] [drm:intel_display_power_get] enabling power well 2
>[  320.433966] [drm:skl_set_power_well] Enabling power well 2
>[  320.433969] [drm:intel_display_power_get] enabling DDI C power well
>[  320.433972] [drm:skl_set_power_well] Enabling DDI C power well
>[  320.434241] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  320.434248] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  320.434253] [drm:intel_display_power_put] disabling DDI C power well
>[  320.434259] [drm:skl_set_power_well] Disabling DDI C power well
>[  320.434263] [drm:intel_display_power_put] disabling power well 2
>[  320.434268] [drm:skl_set_power_well] Disabling power well 2
>[  320.434274] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  320.434284] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  320.434289] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  320.434293] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  320.434301] [drm:intel_display_power_get] enabling power well 2
>[  320.434312] [drm:skl_set_power_well] Enabling power well 2
>[  320.434322] [drm:intel_display_power_get] enabling DDI C power well
>[  320.434327] [drm:skl_set_power_well] Enabling DDI C power well
>[  320.434575] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  320.434578] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  320.434581] [drm:intel_display_power_put] disabling DDI C power well
>[  320.434585] [drm:skl_set_power_well] Disabling DDI C power well
>[  320.434587] [drm:intel_display_power_put] disabling power well 2
>[  320.434591] [drm:skl_set_power_well] Disabling power well 2
>[  320.434594] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  320.434610] [drm:drm_mode_setcrtc] [CRTC:20]
>[  320.434616] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1]
>[  320.434621] [drm:intel_crtc_set_config] [CRTC:20] [FB:65] #connectors=1 (x y) (0 0)
>[  320.434626] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  320.434630] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  320.434632] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  320.434636] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  320.434639] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  320.434642] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  320.434647] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  320.434651] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[  320.434657] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[  320.434660] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[  320.434664] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[  320.434668] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[  320.434672] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  320.434675] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  320.434678] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  320.434681] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  320.434685] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  320.434689] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[  320.434693] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  320.434696] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  320.434698] [drm:intel_dump_pipe_config] requested mode:
>[  320.434704] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  320.434706] [drm:intel_dump_pipe_config] adjusted mode:
>[  320.434711] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  320.434716] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[  320.434718] [drm:intel_dump_pipe_config] port clock: 540000
>[  320.434721] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[  320.434725] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  320.434728] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  320.434731] [drm:intel_dump_pipe_config] ips: 0
>[  320.434733] [drm:intel_dump_pipe_config] double wide: 0
>[  320.434745] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009ab83ae0
>[  320.434751] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880142e619c0 state to ffff88009ab83ae0
>[  320.434755] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880142e2bc00 state to ffff88009ab83ae0
>[  320.434758] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880142e619c0 to [CRTC:20]
>[  320.434761] [drm:drm_atomic_set_fb_for_plane] Set [FB:65] for plane state ffff880142e619c0
>[  320.434764] [drm:drm_atomic_check_only] checking ffff88009ab83ae0
>[  320.434771] [drm:drm_atomic_commit] commiting ffff88009ab83ae0
>[  320.438321] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009ab83ae0
>[  320.438326] [drm:drm_atomic_state_free] Freeing atomic state ffff88009ab83ae0
>[  320.438345] [drm:edp_panel_on] Turn eDP port A panel power on
>[  320.438354] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  320.438372] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[  320.438381] [drm:wait_panel_status] Wait complete
>[  320.438405] [drm:wait_panel_on] Wait for panel power on
>[  320.438422] [drm:wait_panel_status] mask b000000f value 80000008 status 9000000a control abcd000b
>[  320.647173] [drm:wait_panel_status] Wait complete
>[  320.648332] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  320.649005] [drm:intel_dp_set_signal_levels] Using signal levels 04000000
>[  320.649657] [drm:intel_dp_start_link_train] clock recovery OK
>[  320.650612] [drm:intel_dp_set_signal_levels] Using signal levels 05000000
>[  320.651555] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  320.651833] [drm:skl_wm_flush_pipe] flush pipe A (pass 3)
>[  320.651845] [drm:intel_edp_backlight_on] 
>[  320.651849] [drm:intel_panel_enable_backlight] pipe A
>[  320.651888] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  320.652099] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[  320.652108] [drm:skylake_update_primary_plane] Writing base 0CD80000 0,0,3200,1800 pitch=16384
>[  320.652115] [drm:intel_fbc_update] disabled per chip default
>[  320.652130] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[  320.652136] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  320.652140] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  320.652143] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  320.652146] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  320.652148] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  320.652150] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  320.652153] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  320.652156] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  320.652158] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  320.652161] [drm:check_crtc_state] [CRTC:20]
>[  320.652177] [drm:check_crtc_state] [CRTC:25]
>[  320.652180] [drm:check_crtc_state] [CRTC:30]
>[  320.652183] [drm:check_shared_dpll_state] DPLL 1
>[  320.652187] [drm:check_shared_dpll_state] DPLL 2
>[  320.652190] [drm:check_shared_dpll_state] DPLL 3
>[  323.652811] kms_psr_sink_crc: starting subtest primary_render
>[  323.652868] [drm:add_framebuffer_internal] [FB:67]
>[  323.664848] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[  323.664896] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  323.679068] [drm:add_framebuffer_internal] [FB:68]
>[  323.705109] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  323.705121] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  323.705127] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  323.705132] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  323.705136] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  323.705150] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  323.705198] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[  323.705559] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  323.705891] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  323.705909] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  323.705915] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  323.705922] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  323.705927] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  323.705934] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  323.705957] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  323.705962] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  323.705967] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  323.705970] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  323.705973] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  323.705976] [drm:intel_display_power_get] enabling power well 2
>[  323.705980] [drm:skl_set_power_well] Enabling power well 2
>[  323.705983] [drm:intel_display_power_get] enabling DDI B power well
>[  323.705986] [drm:skl_set_power_well] Enabling DDI B power well
>[  323.705996] [drm:intel_display_power_put] disabling DDI B power well
>[  323.706000] [drm:skl_set_power_well] Disabling DDI B power well
>[  323.706003] [drm:intel_display_power_put] disabling power well 2
>[  323.706006] [drm:skl_set_power_well] Disabling power well 2
>[  323.706009] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  323.706013] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  323.706016] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  323.706018] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  323.706021] [drm:intel_display_power_get] enabling power well 2
>[  323.706024] [drm:skl_set_power_well] Enabling power well 2
>[  323.706027] [drm:intel_display_power_get] enabling DDI B power well
>[  323.706030] [drm:skl_set_power_well] Enabling DDI B power well
>[  323.706039] [drm:intel_display_power_put] disabling DDI B power well
>[  323.706043] [drm:skl_set_power_well] Disabling DDI B power well
>[  323.706046] [drm:intel_display_power_put] disabling power well 2
>[  323.706049] [drm:skl_set_power_well] Disabling power well 2
>[  323.706052] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  323.706059] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  323.706064] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  323.706069] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  323.706072] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  323.706075] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  323.706078] [drm:intel_display_power_get] enabling power well 2
>[  323.706081] [drm:skl_set_power_well] Enabling power well 2
>[  323.706084] [drm:intel_display_power_get] enabling DDI B power well
>[  323.706087] [drm:skl_set_power_well] Enabling DDI B power well
>[  323.706334] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  323.706338] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  323.706341] [drm:intel_display_power_put] disabling DDI B power well
>[  323.706344] [drm:skl_set_power_well] Disabling DDI B power well
>[  323.706347] [drm:intel_display_power_put] disabling power well 2
>[  323.706350] [drm:skl_set_power_well] Disabling power well 2
>[  323.706353] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  323.706365] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  323.706368] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  323.706370] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  323.706373] [drm:intel_display_power_get] enabling power well 2
>[  323.706376] [drm:skl_set_power_well] Enabling power well 2
>[  323.706379] [drm:intel_display_power_get] enabling DDI B power well
>[  323.706382] [drm:skl_set_power_well] Enabling DDI B power well
>[  323.706629] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  323.706634] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  323.706638] [drm:intel_display_power_put] disabling DDI B power well
>[  323.706642] [drm:skl_set_power_well] Disabling DDI B power well
>[  323.706646] [drm:intel_display_power_put] disabling power well 2
>[  323.706651] [drm:skl_set_power_well] Disabling power well 2
>[  323.706655] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  323.706666] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  323.706674] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  323.706688] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  323.706698] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  323.706702] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  323.706706] [drm:intel_display_power_get] enabling power well 2
>[  323.706711] [drm:skl_set_power_well] Enabling power well 2
>[  323.706716] [drm:intel_display_power_get] enabling DDI C power well
>[  323.706722] [drm:skl_set_power_well] Enabling DDI C power well
>[  323.706740] [drm:intel_display_power_put] disabling DDI C power well
>[  323.706745] [drm:skl_set_power_well] Disabling DDI C power well
>[  323.706752] [drm:intel_display_power_put] disabling power well 2
>[  323.706757] [drm:skl_set_power_well] Disabling power well 2
>[  323.706765] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  323.706770] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  323.706775] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  323.706778] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  323.706782] [drm:intel_display_power_get] enabling power well 2
>[  323.706786] [drm:skl_set_power_well] Enabling power well 2
>[  323.706790] [drm:intel_display_power_get] enabling DDI C power well
>[  323.706795] [drm:skl_set_power_well] Enabling DDI C power well
>[  323.706809] [drm:intel_display_power_put] disabling DDI C power well
>[  323.706817] [drm:skl_set_power_well] Disabling DDI C power well
>[  323.706820] [drm:intel_display_power_put] disabling power well 2
>[  323.706825] [drm:skl_set_power_well] Disabling power well 2
>[  323.706829] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  323.706839] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  323.706852] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  323.706858] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  323.706866] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  323.706870] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  323.706873] [drm:intel_display_power_get] enabling power well 2
>[  323.706878] [drm:skl_set_power_well] Enabling power well 2
>[  323.706882] [drm:intel_display_power_get] enabling DDI C power well
>[  323.706886] [drm:skl_set_power_well] Enabling DDI C power well
>[  323.707133] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  323.707136] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  323.707139] [drm:intel_display_power_put] disabling DDI C power well
>[  323.707142] [drm:skl_set_power_well] Disabling DDI C power well
>[  323.707145] [drm:intel_display_power_put] disabling power well 2
>[  323.707148] [drm:skl_set_power_well] Disabling power well 2
>[  323.707151] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  323.707156] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  323.707159] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  323.707161] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  323.707164] [drm:intel_display_power_get] enabling power well 2
>[  323.707167] [drm:skl_set_power_well] Enabling power well 2
>[  323.707170] [drm:intel_display_power_get] enabling DDI C power well
>[  323.707173] [drm:skl_set_power_well] Enabling DDI C power well
>[  323.707423] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  323.707433] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  323.707441] [drm:intel_display_power_put] disabling DDI C power well
>[  323.707445] [drm:skl_set_power_well] Disabling DDI C power well
>[  323.707447] [drm:intel_display_power_put] disabling power well 2
>[  323.707451] [drm:skl_set_power_well] Disabling power well 2
>[  323.707453] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  323.707466] [drm:drm_mode_setcrtc] [CRTC:20]
>[  323.707471] [drm:intel_crtc_set_config] [CRTC:20] [NOFB]
>[  323.707479] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  323.707483] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [NOCRTC]
>[  323.707486] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  323.707491] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  323.707496] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  323.707502] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[  323.729368] [drm:intel_edp_backlight_off] 
>[  323.930584] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  323.938708] [drm:edp_panel_off] Turn eDP port A panel power off
>[  323.938737] [drm:wait_panel_off] Wait for panel power off time
>[  323.938756] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  323.993591] [drm:wait_panel_status] Wait complete
>[  323.993624] [drm:intel_fbc_update] no output, disabling
>[  323.993633] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214a240
>[  323.993641] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880004ceff00 state to ffff88009214a240
>[  323.993645] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004bacc00 state to ffff88009214a240
>[  323.993649] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880004ceff00 to [NOCRTC]
>[  323.993652] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880004ceff00
>[  323.993654] [drm:drm_atomic_check_only] checking ffff88009214a240
>[  323.993660] [drm:drm_atomic_commit] commiting ffff88009214a240
>[  323.993672] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214a240
>[  323.993677] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214a240
>[  323.993685] [drm:intel_display_power_put] disabling DDI A/E power well
>[  323.993690] [drm:skl_set_power_well] Disabling DDI A/E power well
>[  323.993692] [drm:intel_display_power_put] disabling MISC IO power well
>[  323.993696] [drm:skl_set_power_well] Disabling MISC IO power well
>[  323.993699] [drm:intel_display_power_put] disabling power well 1
>[  323.993704] [drm:skl_set_power_well] Disabling power well 1
>[  323.993736] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  323.993740] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  323.993743] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  323.993746] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  323.993748] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  323.993751] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  323.993754] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  323.993756] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  323.993759] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  323.993762] [drm:check_crtc_state] [CRTC:20]
>[  323.993765] [drm:check_crtc_state] [CRTC:25]
>[  323.993767] [drm:check_crtc_state] [CRTC:30]
>[  323.993771] [drm:check_shared_dpll_state] DPLL 1
>[  323.993774] [drm:check_shared_dpll_state] DPLL 2
>[  323.993776] [drm:check_shared_dpll_state] DPLL 3
>[  323.993805] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  323.993813] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  323.993819] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  323.993824] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[  323.993827] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[  323.993830] [drm:intel_display_power_get] enabling power well 1
>[  323.993837] [drm:skl_set_power_well] Enabling power well 1
>[  323.993840] [drm:intel_display_power_get] enabling MISC IO power well
>[  323.993843] [drm:skl_set_power_well] Enabling MISC IO power well
>[  323.993846] [drm:intel_display_power_get] enabling DDI A/E power well
>[  323.993849] [drm:skl_set_power_well] Enabling DDI A/E power well
>[  323.993863] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  323.993873] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  324.539674] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[  324.539686] [drm:wait_panel_status] Wait complete
>[  324.539727] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  324.539737] [drm:edp_panel_vdd_on] eDP port A panel power wasn't enabled
>[  324.740894] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[  324.741245] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  324.741264] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  324.741271] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[  324.741277] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  324.741283] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[  324.741298] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[  324.741323] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  324.741330] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  324.741335] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  324.741338] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  324.741341] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  324.741345] [drm:intel_display_power_get] enabling power well 2
>[  324.741349] [drm:skl_set_power_well] Enabling power well 2
>[  324.741352] [drm:intel_display_power_get] enabling DDI B power well
>[  324.741356] [drm:skl_set_power_well] Enabling DDI B power well
>[  324.741366] [drm:intel_display_power_put] disabling DDI B power well
>[  324.741370] [drm:skl_set_power_well] Disabling DDI B power well
>[  324.741372] [drm:intel_display_power_put] disabling power well 2
>[  324.741376] [drm:skl_set_power_well] Disabling power well 2
>[  324.741379] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  324.741383] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  324.741386] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[  324.741388] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[  324.741391] [drm:intel_display_power_get] enabling power well 2
>[  324.741394] [drm:skl_set_power_well] Enabling power well 2
>[  324.741397] [drm:intel_display_power_get] enabling DDI B power well
>[  324.741401] [drm:skl_set_power_well] Enabling DDI B power well
>[  324.741410] [drm:intel_display_power_put] disabling DDI B power well
>[  324.741414] [drm:skl_set_power_well] Disabling DDI B power well
>[  324.741417] [drm:intel_display_power_put] disabling power well 2
>[  324.741420] [drm:skl_set_power_well] Disabling power well 2
>[  324.741423] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[  324.741430] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  324.741436] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  324.741440] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  324.741443] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  324.741446] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  324.741449] [drm:intel_display_power_get] enabling power well 2
>[  324.741452] [drm:skl_set_power_well] Enabling power well 2
>[  324.741455] [drm:intel_display_power_get] enabling DDI B power well
>[  324.741459] [drm:skl_set_power_well] Enabling DDI B power well
>[  324.741727] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  324.741734] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  324.741740] [drm:intel_display_power_put] disabling DDI B power well
>[  324.741746] [drm:skl_set_power_well] Disabling DDI B power well
>[  324.741750] [drm:intel_display_power_put] disabling power well 2
>[  324.741755] [drm:skl_set_power_well] Disabling power well 2
>[  324.741761] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  324.741772] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[  324.741777] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[  324.741781] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[  324.741787] [drm:intel_display_power_get] enabling power well 2
>[  324.741791] [drm:skl_set_power_well] Enabling power well 2
>[  324.741796] [drm:intel_display_power_get] enabling DDI B power well
>[  324.741801] [drm:skl_set_power_well] Enabling DDI B power well
>[  324.742065] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  324.742073] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  324.742078] [drm:intel_display_power_put] disabling DDI B power well
>[  324.742083] [drm:skl_set_power_well] Disabling DDI B power well
>[  324.742085] [drm:intel_display_power_put] disabling power well 2
>[  324.742089] [drm:skl_set_power_well] Disabling power well 2
>[  324.742093] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[  324.742107] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  324.742113] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  324.742118] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  324.742122] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  324.742125] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  324.742128] [drm:intel_display_power_get] enabling power well 2
>[  324.742132] [drm:skl_set_power_well] Enabling power well 2
>[  324.742135] [drm:intel_display_power_get] enabling DDI C power well
>[  324.742139] [drm:skl_set_power_well] Enabling DDI C power well
>[  324.742148] [drm:intel_display_power_put] disabling DDI C power well
>[  324.742152] [drm:skl_set_power_well] Disabling DDI C power well
>[  324.742155] [drm:intel_display_power_put] disabling power well 2
>[  324.742158] [drm:skl_set_power_well] Disabling power well 2
>[  324.742161] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  324.742165] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[  324.742168] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[  324.742171] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[  324.742173] [drm:intel_display_power_get] enabling power well 2
>[  324.742176] [drm:skl_set_power_well] Enabling power well 2
>[  324.742179] [drm:intel_display_power_get] enabling DDI C power well
>[  324.742183] [drm:skl_set_power_well] Enabling DDI C power well
>[  324.742192] [drm:intel_display_power_put] disabling DDI C power well
>[  324.742196] [drm:skl_set_power_well] Disabling DDI C power well
>[  324.742199] [drm:intel_display_power_put] disabling power well 2
>[  324.742202] [drm:skl_set_power_well] Disabling power well 2
>[  324.742205] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[  324.742211] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  324.742217] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[  324.742220] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  324.742224] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  324.742226] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  324.742229] [drm:intel_display_power_get] enabling power well 2
>[  324.742232] [drm:skl_set_power_well] Enabling power well 2
>[  324.742235] [drm:intel_display_power_get] enabling DDI C power well
>[  324.742239] [drm:skl_set_power_well] Enabling DDI C power well
>[  324.742490] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  324.742506] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  324.742517] [drm:intel_display_power_put] disabling DDI C power well
>[  324.742527] [drm:skl_set_power_well] Disabling DDI C power well
>[  324.742537] [drm:intel_display_power_put] disabling power well 2
>[  324.742548] [drm:skl_set_power_well] Disabling power well 2
>[  324.742558] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  324.742570] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[  324.742581] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[  324.742590] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[  324.742598] [drm:intel_display_power_get] enabling power well 2
>[  324.742607] [drm:skl_set_power_well] Enabling power well 2
>[  324.742617] [drm:intel_display_power_get] enabling DDI C power well
>[  324.742623] [drm:skl_set_power_well] Enabling DDI C power well
>[  324.742873] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  324.742876] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[  324.742879] [drm:intel_display_power_put] disabling DDI C power well
>[  324.742883] [drm:skl_set_power_well] Disabling DDI C power well
>[  324.742885] [drm:intel_display_power_put] disabling power well 2
>[  324.742889] [drm:skl_set_power_well] Disabling power well 2
>[  324.742892] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[  324.742907] [drm:drm_mode_setcrtc] [CRTC:20]
>[  324.742913] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1]
>[  324.742918] [drm:intel_crtc_set_config] [CRTC:20] [FB:67] #connectors=1 (x y) (0 0)
>[  324.742923] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  324.742927] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  324.742929] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[  324.742933] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  324.742936] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  324.742939] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  324.742944] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  324.742948] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[  324.742954] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[  324.742957] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[  324.742961] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[  324.742964] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[  324.742969] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  324.742972] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  324.742975] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  324.742977] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  324.742981] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  324.742986] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[  324.742990] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  324.742992] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  324.742995] [drm:intel_dump_pipe_config] requested mode:
>[  324.743001] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  324.743003] [drm:intel_dump_pipe_config] adjusted mode:
>[  324.743008] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  324.743013] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[  324.743016] [drm:intel_dump_pipe_config] port clock: 540000
>[  324.743019] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[  324.743022] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  324.743026] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  324.743028] [drm:intel_dump_pipe_config] ips: 0
>[  324.743031] [drm:intel_dump_pipe_config] double wide: 0
>[  324.743043] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880148bf56c0
>[  324.743048] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88009ba87e40 state to ffff880148bf56c0
>[  324.743052] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88009a5b9400 state to ffff880148bf56c0
>[  324.743056] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88009ba87e40 to [CRTC:20]
>[  324.743059] [drm:drm_atomic_set_fb_for_plane] Set [FB:67] for plane state ffff88009ba87e40
>[  324.743062] [drm:drm_atomic_check_only] checking ffff880148bf56c0
>[  324.743068] [drm:drm_atomic_commit] commiting ffff880148bf56c0
>[  324.746420] [drm:drm_atomic_state_clear] Clearing atomic state ffff880148bf56c0
>[  324.746425] [drm:drm_atomic_state_free] Freeing atomic state ffff880148bf56c0
>[  324.746444] [drm:edp_panel_on] Turn eDP port A panel power on
>[  324.746454] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  324.746472] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[  324.746480] [drm:wait_panel_status] Wait complete
>[  324.746511] [drm:wait_panel_on] Wait for panel power on
>[  324.746533] [drm:wait_panel_status] mask b000000f value 80000008 status 9000000a control abcd000b
>[  324.955716] [drm:wait_panel_status] Wait complete
>[  324.956879] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  324.957550] [drm:intel_dp_set_signal_levels] Using signal levels 04000000
>[  324.958202] [drm:intel_dp_start_link_train] clock recovery OK
>[  324.959157] [drm:intel_dp_set_signal_levels] Using signal levels 05000000
>[  324.960101] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  324.960379] [drm:skl_wm_flush_pipe] flush pipe A (pass 3)
>[  324.960391] [drm:intel_edp_backlight_on] 
>[  324.960395] [drm:intel_panel_enable_backlight] pipe A
>[  324.960435] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  324.960644] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[  324.960653] [drm:skylake_update_primary_plane] Writing base 04CC0000 0,0,3200,1800 pitch=16384
>[  324.960661] [drm:intel_fbc_update] disabled per chip default
>[  324.960675] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[  324.960681] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  324.960685] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  324.960688] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  324.960691] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  324.960693] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  324.960696] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  324.960698] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  324.960701] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  324.960703] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  324.960706] [drm:check_crtc_state] [CRTC:20]
>[  324.960723] [drm:check_crtc_state] [CRTC:25]
>[  324.960725] [drm:check_crtc_state] [CRTC:30]
>[  324.960729] [drm:check_shared_dpll_state] DPLL 1
>[  324.960732] [drm:check_shared_dpll_state] DPLL 2
>[  324.960735] [drm:check_shared_dpll_state] DPLL 3
>[  326.330304] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  326.330309] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880004cef480 state to ffff88009214ab40
>[  326.330313] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004bacc00 state to ffff88009214ab40
>[  326.330315] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  326.330321] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  326.331832] [drm:skylake_update_primary_plane] Writing base 04CC0000 0,0,3200,1800 pitch=16384
>[  326.331847] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  326.331852] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  326.331858] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  326.331862] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff880004cef6c0 state to ffff88009214ab40
>[  326.331864] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  326.331867] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  326.331870] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  326.331872] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  326.331874] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  326.331877] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff880004ceff00 state to ffff88009214ab40
>[  326.331879] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  326.331880] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  326.331883] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  326.331884] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  326.331886] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  326.331889] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880004cefc00 state to ffff88009214ab40
>[  326.331890] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  326.331892] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  326.331894] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  326.331895] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  326.331897] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  326.331899] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff880004cef600 state to ffff88009214ab40
>[  326.331900] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  326.331903] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  326.331905] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  326.331907] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  326.331909] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  326.331912] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff880004cef240 state to ffff88009214ab40
>[  326.331914] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  326.331916] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  326.331918] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  326.331920] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  326.331923] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  326.331925] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff880004cef780 state to ffff88009214ab40
>[  326.331927] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  326.331929] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  326.331932] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  326.331933] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  326.331937] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  326.331940] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff880004cef900 state to ffff88009214ab40
>[  326.331941] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  326.331943] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  326.331945] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  326.331947] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  326.331949] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  326.331951] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff880004cefcc0 state to ffff88009214ab40
>[  326.331953] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  326.331955] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  326.331957] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  326.331958] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  326.331963] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  326.331973] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff880004cef0c0 state to ffff88009214ab40
>[  326.331975] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  326.331977] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  326.331980] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  326.331981] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  326.331984] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  326.331987] [drm:drm_atomic_get_plane_state] Added [PLANE:31] ffff880004cef3c0 state to ffff88009214ab40
>[  326.331989] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  326.331991] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  326.331993] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  326.331995] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  326.331998] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  326.332001] [drm:drm_atomic_get_plane_state] Added [PLANE:32] ffff880004cef540 state to ffff88009214ab40
>[  326.332003] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  326.332006] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  326.332008] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  326.332010] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  326.332016] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[  326.332021] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1
>[  326.332024] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  326.332028] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  326.332031] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[  326.332037] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[  326.332038] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[  326.332041] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[  326.332043] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[  326.332046] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  326.332048] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  326.332049] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  326.332051] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  326.332054] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  326.332056] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[  326.332059] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  326.332060] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  326.332062] [drm:intel_dump_pipe_config] requested mode:
>[  326.332066] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  326.332067] [drm:intel_dump_pipe_config] adjusted mode:
>[  326.332071] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  326.332074] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[  326.332076] [drm:intel_dump_pipe_config] port clock: 540000
>[  326.332077] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[  326.332079] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  326.332081] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  326.332083] [drm:intel_dump_pipe_config] ips: 0
>[  326.332084] [drm:intel_dump_pipe_config] double wide: 0
>[  326.332087] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214a240
>[  326.332089] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880004cefb40 state to ffff88009214a240
>[  326.332092] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004bacc00 state to ffff88009214a240
>[  326.332094] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880004cefb40 to [CRTC:20]
>[  326.332095] [drm:drm_atomic_set_fb_for_plane] Set [FB:57] for plane state ffff880004cefb40
>[  326.332097] [drm:drm_atomic_check_only] checking ffff88009214a240
>[  326.332100] [drm:drm_atomic_commit] commiting ffff88009214a240
>[  326.332116] [drm:skylake_update_primary_plane] Writing base 016C0000 0,0,3200,1800 pitch=12800
>[  326.332123] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214a240
>[  326.332124] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214a240
>[  326.332127] [drm:intel_crtc_set_config] [CRTC:25] [NOFB]
>[  326.332131] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0
>[  326.332133] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  326.332136] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  326.332138] [drm:intel_crtc_set_config] [CRTC:30] [NOFB]
>[  326.332140] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=0, fb_changed=0
>[  326.332142] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  326.332144] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  326.425723] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  326.425733] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880004cef9c0 state to ffff88009214ab40
>[  326.425739] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004bae000 state to ffff88009214ab40
>[  326.425742] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  326.425748] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  326.425768] [drm:skylake_update_primary_plane] Writing base 016C0000 0,0,3200,1800 pitch=12800
>[  326.425779] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  326.425783] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  326.425787] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  326.425791] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff880004cefb40 state to ffff88009214ab40
>[  326.425793] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  326.425797] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  326.425800] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  326.425803] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  326.425807] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  326.425810] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff880004cef6c0 state to ffff88009214ab40
>[  326.425813] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  326.425816] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  326.425819] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  326.425822] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  326.425825] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  326.425828] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880004ceff00 state to ffff88009214ab40
>[  326.425831] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  326.425834] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  326.425837] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  326.425840] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  326.425843] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  326.425846] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff880004cefc00 state to ffff88009214ab40
>[  326.425849] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  326.425852] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  326.425855] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  326.425858] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  326.425861] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  326.425864] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff880004cef600 state to ffff88009214ab40
>[  326.425867] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  326.425870] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  326.425873] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  326.425875] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  326.425878] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  326.425882] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff880004cef240 state to ffff88009214ab40
>[  326.425884] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  326.425887] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  326.425890] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  326.425893] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  326.425896] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  326.425900] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff880004cef780 state to ffff88009214ab40
>[  326.425902] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  326.425905] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  326.425908] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  326.425911] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  326.425914] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  326.425917] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff880004cef900 state to ffff88009214ab40
>[  326.425920] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  326.425923] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  326.425926] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  326.425929] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  326.425932] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  326.425935] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff880004cefcc0 state to ffff88009214ab40
>[  326.425938] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  326.425941] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  326.425944] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  326.425946] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  326.425950] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  326.425953] [drm:drm_atomic_get_plane_state] Added [PLANE:31] ffff880004cef0c0 state to ffff88009214ab40
>[  326.425955] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  326.425958] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  326.425961] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  326.425964] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  326.425967] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88009214ab40
>[  326.425971] [drm:drm_atomic_get_plane_state] Added [PLANE:32] ffff880004cef3c0 state to ffff88009214ab40
>[  326.425973] [drm:drm_atomic_check_only] checking ffff88009214ab40
>[  326.425976] [drm:drm_atomic_commit] commiting ffff88009214ab40
>[  326.425979] [drm:drm_atomic_state_clear] Clearing atomic state ffff88009214ab40
>[  326.425982] [drm:drm_atomic_state_free] Freeing atomic state ffff88009214ab40
>[  326.425987] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[  326.425993] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  326.425997] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  326.426003] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  326.426007] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[  326.426013] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[  326.426016] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[  326.426020] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[  326.426023] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[  326.426027] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  326.426030] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  326.426033] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  326.426036] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  326.426040] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  326.426044] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[  326.426048] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  326.426051] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  326.426053] [drm:intel_dump_pipe_config] requested mode:
>[  326.426059] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  326.426062] [drm:intel_dump_pipe_config] adjusted mode:
>[  326.426066] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  326.426071] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[  326.426074] [drm:intel_dump_pipe_config] port clock: 540000
>[  326.426076] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[  326.426080] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  326.426083] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  326.426085] [drm:intel_dump_pipe_config] ips: 0
>[  326.426088] [drm:intel_dump_pipe_config] double wide: 0
>[  326.426091] [drm:intel_crtc_set_config] [CRTC:25] [NOFB]
>[  326.426095] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0
>[  326.426099] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  326.426103] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  326.426106] [drm:intel_crtc_set_config] [CRTC:30] [NOFB]
>[  326.426109] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=0, fb_changed=0
>[  326.426112] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  326.426116] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  327.965023] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[  327.965067] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  926.826968] [drm:intel_edp_backlight_off] 
>[  927.027986] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  927.035928] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  927.035975] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  927.036156] [drm:edp_panel_off] Turn eDP port A panel power off
>[  927.036179] [drm:wait_panel_off] Wait for panel power off time
>[  927.036196] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  927.090988] [drm:wait_panel_status] Wait complete
>[  927.091016] [drm:intel_fbc_update] no output, disabling
>[  927.091020] [drm:intel_display_power_put] disabling DDI A/E power well
>[  927.091023] [drm:skl_set_power_well] Disabling DDI A/E power well
>[  927.091025] [drm:intel_display_power_put] disabling MISC IO power well
>[  927.091027] [drm:skl_set_power_well] Disabling MISC IO power well
>[  927.091029] [drm:intel_display_power_put] disabling power well 1
>[  927.091032] [drm:skl_set_power_well] Disabling power well 1
>[  927.091064] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  927.091066] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  927.091068] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  927.091069] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  927.091070] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  927.091072] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  927.091073] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  927.091074] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  927.091076] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  927.091077] [drm:check_crtc_state] [CRTC:20]
>[  927.091080] [drm:check_crtc_state] [CRTC:25]
>[  927.091081] [drm:check_crtc_state] [CRTC:30]
>[  927.091084] [drm:check_shared_dpll_state] DPLL 1
>[  927.091085] [drm:check_shared_dpll_state] DPLL 2
>[  927.091086] [drm:check_shared_dpll_state] DPLL 3

Actions: View

Attachments on bug 89124: 113443 | 114215

Use of freedesktop.org services, including Bugzilla, is subject to our Code of Conduct. How we collect and use information is described in our Privacy Policy.