Attachment 11465 Details for Bug 10808 – Xorg log with the cachelines option. DRI enbled.

Xorg log with the cachelines option. DRI enbled.

Xorg.cachelines.log (text/plain), 107.83 KB, created by Raúl on 2007-09-07 18:38:26 UTC

(hide)

Description:

Filename:

MIME Type:

Creator: Raúl

Created: 2007-09-07 18:38:26 UTC

Size: 107.83 KB

patch

obsolete

>
>X Window System Version 1.3.0
>Release Date: 19 April 2007
>X Protocol Version 11, Revision 0, Release 1.3
>Build Operating System: Linux Debian (xorg-server 2:1.3.0.0.dfsg-12)
>Current Operating System: Linux parvo 2.6.22rs #1 SMP Sat Aug 18 21:51:04 CEST 2007 i686
>Build Date: 09 August 2007
>	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>Module Loader present
>Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>(==) Log file: "/var/log/Xorg.0.log", Time: Fri Sep  7 21:57:14 2007
>(==) Using config file: "/etc/X11/xorg.conf"
>(==) ServerLayout "Default Layout"
>(**) |-->Screen "Default Screen" (0)
>(**) |   |-->Monitor "Monitor genÃ©rico"
>(**) |   |-->Device "Intel Corporation 82852/855GM Integrated Graphics Device"
>(**) |-->Input Device "Generic Keyboard"
>(**) |-->Input Device "Synaptics Touchpad"
>(**) |-->Input Device "Configured Mouse"
>(WW) Duplicate core pointer devices.  Removing core pointer attribute from "Configured Mouse"
>(**) Option "AIGLX" "true"
>(WW) The directory "/usr/X11R6/lib/X11/fonts/misc" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/X11/cyrillic" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/X11R6/lib/X11/fonts/cyrillic" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/X11R6/lib/X11/fonts/100dpi/" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/X11R6/lib/X11/fonts/75dpi/" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/X11R6/lib/X11/fonts/Type1" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/X11R6/lib/X11/fonts/100dpi" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/X11R6/lib/X11/fonts/75dpi" does not exist.
>	Entry deleted from font path.
>(WW) Including the default font path /usr/share/fonts/X11/misc,/usr/share/fonts/X11/cyrillic,/usr/share/fonts/X11/100dpi/:unscaled,/usr/share/fonts/X11/75dpi/:unscaled,/usr/share/fonts/X11/Type1,/usr/share/fonts/X11/100dpi,/usr/share/fonts/X11/75dpi,/var/lib/defoma/x-ttcidfont-conf.d/dirs/TrueType.
>(**) FontPath set to:
>	/usr/share/fonts/X11/misc,
>	/usr/share/fonts/X11/100dpi/:unscaled,
>	/usr/share/fonts/X11/75dpi/:unscaled,
>	/usr/share/fonts/X11/Type1,
>	/usr/share/fonts/X11/100dpi,
>	/usr/share/fonts/X11/75dpi,
>	/var/lib/defoma/x-ttcidfont-conf.d/dirs/TrueType,
>	/usr/share/fonts/X11/misc,
>	/usr/share/fonts/X11/cyrillic,
>	/usr/share/fonts/X11/100dpi/:unscaled,
>	/usr/share/fonts/X11/75dpi/:unscaled,
>	/usr/share/fonts/X11/Type1,
>	/usr/share/fonts/X11/100dpi,
>	/usr/share/fonts/X11/75dpi,
>	/var/lib/defoma/x-ttcidfont-conf.d/dirs/TrueType
>(==) RgbPath set to "/etc/X11/rgb"
>(==) ModulePath set to "/usr/lib/xorg/modules"
>(**) Extension "Composite" is enabled
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) Loader magic: 0x81e5140
>(II) Module ABI versions:
>	X.Org ANSI C Emulation: 0.3
>	X.Org Video Driver: 1.2
>	X.Org XInput driver : 0.7
>	X.Org Server Extension : 0.3
>	X.Org Font Renderer : 0.5
>(II) Loader running on linux
>(II) LoadModule: "pcidata"
>(II) Loading /usr/lib/xorg/modules//libpcidata.so
>(II) Module pcidata: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 1.2
>(++) using VT number 7
>
>(II) PCI: PCI scan (all values are in hex)
>(II) PCI: 00:00:0: chip 8086,3580 card 1028,0164 rev 02 class 06,00,00 hdr 80
>(II) PCI: 00:00:1: chip 8086,3584 card 1028,0164 rev 02 class 08,80,00 hdr 00
>(II) PCI: 00:00:3: chip 8086,3585 card 1028,0164 rev 02 class 08,80,00 hdr 80
>(II) PCI: 00:02:0: chip 8086,3582 card 1028,0164 rev 02 class 03,00,00 hdr 80
>(II) PCI: 00:02:1: chip 8086,3582 card 1028,0164 rev 02 class 03,80,00 hdr 80
>(II) PCI: 00:1d:0: chip 8086,24c2 card 1028,0164 rev 01 class 0c,03,00 hdr 80
>(II) PCI: 00:1d:1: chip 8086,24c4 card 1028,0164 rev 01 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:2: chip 8086,24c7 card 1028,0164 rev 01 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:7: chip 8086,24cd card 1028,0164 rev 01 class 0c,03,20 hdr 00
>(II) PCI: 00:1e:0: chip 8086,2448 card 0000,0000 rev 81 class 06,04,00 hdr 01
>(II) PCI: 00:1f:0: chip 8086,24cc card 0000,0000 rev 01 class 06,01,00 hdr 80
>(II) PCI: 00:1f:1: chip 8086,24ca card 1028,0164 rev 01 class 01,01,8a hdr 00
>(II) PCI: 00:1f:5: chip 8086,24c5 card 1028,0164 rev 01 class 04,01,00 hdr 00
>(II) PCI: 00:1f:6: chip 8086,24c6 card 14f1,5422 rev 01 class 07,03,00 hdr 00
>(II) PCI: 01:01:0: chip 104c,ac44 card e000,0000 rev 02 class 06,07,00 hdr 82
>(II) PCI: 01:01:1: chip 104c,8029 card 1028,0164 rev 00 class 0c,00,10 hdr 80
>(II) PCI: 01:03:0: chip 8086,4220 card 8086,2722 rev 05 class 02,80,00 hdr 00
>(II) PCI: 01:08:0: chip 8086,103d card 1028,2002 rev 81 class 02,00,00 hdr 00
>(II) PCI: End of PCI scan
>(II) Intel Bridge workaround enabled
>(II) Host-to-PCI bridge:
>(II) Bus 0: bridge is at (0:0:0), (0,0,2), BCTRL: 0x0008 (VGA_EN is set)
>(II) Bus 0 I/O range:
>	[0] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) Bus 0 non-prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>(II) Bus 0 prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>(II) Subtractive PCI-to-PCI bridge:
>(II) Bus 1: bridge is at (0:30:0), (0,1,5), BCTRL: 0x0004 (VGA_EN is cleared)
>(II) Bus 1 I/O range:
>	[0] -1	0	0x0000e000 - 0x0000e0ff (0x100) IX[B]
>	[1] -1	0	0x0000e400 - 0x0000e4ff (0x100) IX[B]
>	[2] -1	0	0x0000e800 - 0x0000e8ff (0x100) IX[B]
>	[3] -1	0	0x0000ec00 - 0x0000ecff (0x100) IX[B]
>(II) Bus 1 non-prefetchable memory range:
>	[0] -1	0	0xfc000000 - 0xfdffffff (0x2000000) MX[B]
>(II) Bus 1 prefetchable memory range:
>	[0] -1	0	0x30000000 - 0x33ffffff (0x4000000) MX[B]
>(II) PCI-to-ISA bridge:
>(II) Bus -1: bridge is at (0:31:0), (0,-1,-1), BCTRL: 0x0008 (VGA_EN is set)
>(II) PCI-to-CardBus bridge:
>(II) Bus 2: bridge is at (1:1:0), (1,2,5), BCTRL: 0x05c0 (VGA_EN is cleared)
>(II) Bus 2 I/O range:
>	[0] -1	0	0x0000e000 - 0x0000e0ff (0x100) IX[B]
>	[1] -1	0	0x0000e400 - 0x0000e4ff (0x100) IX[B]
>(II) Bus 2 prefetchable memory range:
>	[0] -1	0	0x30000000 - 0x33ffffff (0x4000000) MX[B]
>(--) PCI:*(0:2:0) Intel Corporation 82852/855GM Integrated Graphics Device rev 2, Mem @ 0xf0000000/27, 0xfaf80000/19, I/O @ 0xc000/3
>(--) PCI: (0:2:1) Intel Corporation 82852/855GM Integrated Graphics Device rev 2, Mem @ 0xe8000000/27, 0xfaf00000/19
>(II) Addressable bus resource ranges are
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>	[1] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) OS-reported resource ranges:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) Active PCI resource ranges:
>	[0] -1	0	0xfcffd000 - 0xfcffdfff (0x1000) MX[B]
>	[1] -1	0	0xfcffe000 - 0xfcffefff (0x1000) MX[B]
>	[2] -1	0	0xfcff8000 - 0xfcffbfff (0x4000) MX[B]
>	[3] -1	0	0xfcfff800 - 0xfcffffff (0x800) MX[B]
>	[4] -1	0	0xfaeff400 - 0xfaeff4ff (0x100) MX[B]
>	[5] -1	0	0xfaeff800 - 0xfaeff9ff (0x200) MX[B]
>	[6] -1	0	0x34000000 - 0x340003ff (0x400) MX[B]
>	[7] -1	0	0xfaeffc00 - 0xfaefffff (0x400) MX[B]
>	[8] -1	0	0xfaf00000 - 0xfaf7ffff (0x80000) MX[B](B)
>	[9] -1	0	0xe8000000 - 0xefffffff (0x8000000) MX[B](B)
>	[10] -1	0	0xfaf80000 - 0xfaffffff (0x80000) MX[B](B)
>	[11] -1	0	0xf0000000 - 0xf7ffffff (0x8000000) MX[B](B)
>	[12] -1	0	0x0000ecc0 - 0x0000ecff (0x40) IX[B]
>	[13] -1	0	0x0000d080 - 0x0000d0ff (0x80) IX[B]
>	[14] -1	0	0x0000d400 - 0x0000d4ff (0x100) IX[B]
>	[15] -1	0	0x0000dc40 - 0x0000dc7f (0x40) IX[B]
>	[16] -1	0	0x0000d800 - 0x0000d8ff (0x100) IX[B]
>	[17] -1	0	0x0000bfa0 - 0x0000bfaf (0x10) IX[B]
>	[18] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[19] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[20] -1	0	0x000003f4 - 0x000003f4 (0x1) IX[B]
>	[21] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[22] -1	0	0x0000bf20 - 0x0000bf3f (0x20) IX[B]
>	[23] -1	0	0x0000bf40 - 0x0000bf5f (0x20) IX[B]
>	[24] -1	0	0x0000bf80 - 0x0000bf9f (0x20) IX[B]
>	[25] -1	0	0x0000c000 - 0x0000c007 (0x8) IX[B](B)
>(II) Active PCI resource ranges after removing overlaps:
>	[0] -1	0	0xfcffd000 - 0xfcffdfff (0x1000) MX[B]
>	[1] -1	0	0xfcffe000 - 0xfcffefff (0x1000) MX[B]
>	[2] -1	0	0xfcff8000 - 0xfcffbfff (0x4000) MX[B]
>	[3] -1	0	0xfcfff800 - 0xfcffffff (0x800) MX[B]
>	[4] -1	0	0xfaeff400 - 0xfaeff4ff (0x100) MX[B]
>	[5] -1	0	0xfaeff800 - 0xfaeff9ff (0x200) MX[B]
>	[6] -1	0	0x34000000 - 0x340003ff (0x400) MX[B]
>	[7] -1	0	0xfaeffc00 - 0xfaefffff (0x400) MX[B]
>	[8] -1	0	0xfaf00000 - 0xfaf7ffff (0x80000) MX[B](B)
>	[9] -1	0	0xe8000000 - 0xefffffff (0x8000000) MX[B](B)
>	[10] -1	0	0xfaf80000 - 0xfaffffff (0x80000) MX[B](B)
>	[11] -1	0	0xf0000000 - 0xf7ffffff (0x8000000) MX[B](B)
>	[12] -1	0	0x0000ecc0 - 0x0000ecff (0x40) IX[B]
>	[13] -1	0	0x0000d080 - 0x0000d0ff (0x80) IX[B]
>	[14] -1	0	0x0000d400 - 0x0000d4ff (0x100) IX[B]
>	[15] -1	0	0x0000dc40 - 0x0000dc7f (0x40) IX[B]
>	[16] -1	0	0x0000d800 - 0x0000d8ff (0x100) IX[B]
>	[17] -1	0	0x0000bfa0 - 0x0000bfaf (0x10) IX[B]
>	[18] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[19] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[20] -1	0	0x000003f4 - 0x000003f4 (0x1) IX[B]
>	[21] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[22] -1	0	0x0000bf20 - 0x0000bf3f (0x20) IX[B]
>	[23] -1	0	0x0000bf40 - 0x0000bf5f (0x20) IX[B]
>	[24] -1	0	0x0000bf80 - 0x0000bf9f (0x20) IX[B]
>	[25] -1	0	0x0000c000 - 0x0000c007 (0x8) IX[B](B)
>(II) OS-reported resource ranges after removing overlaps with PCI:
>	[0] -1	0	0x00100000 - 0x33ffffff (0x33f00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) All system resource ranges:
>	[0] -1	0	0x00100000 - 0x33ffffff (0x33f00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xfcffd000 - 0xfcffdfff (0x1000) MX[B]
>	[5] -1	0	0xfcffe000 - 0xfcffefff (0x1000) MX[B]
>	[6] -1	0	0xfcff8000 - 0xfcffbfff (0x4000) MX[B]
>	[7] -1	0	0xfcfff800 - 0xfcffffff (0x800) MX[B]
>	[8] -1	0	0xfaeff400 - 0xfaeff4ff (0x100) MX[B]
>	[9] -1	0	0xfaeff800 - 0xfaeff9ff (0x200) MX[B]
>	[10] -1	0	0x34000000 - 0x340003ff (0x400) MX[B]
>	[11] -1	0	0xfaeffc00 - 0xfaefffff (0x400) MX[B]
>	[12] -1	0	0xfaf00000 - 0xfaf7ffff (0x80000) MX[B](B)
>	[13] -1	0	0xe8000000 - 0xefffffff (0x8000000) MX[B](B)
>	[14] -1	0	0xfaf80000 - 0xfaffffff (0x80000) MX[B](B)
>	[15] -1	0	0xf0000000 - 0xf7ffffff (0x8000000) MX[B](B)
>	[16] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[17] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[18] -1	0	0x0000ecc0 - 0x0000ecff (0x40) IX[B]
>	[19] -1	0	0x0000d080 - 0x0000d0ff (0x80) IX[B]
>	[20] -1	0	0x0000d400 - 0x0000d4ff (0x100) IX[B]
>	[21] -1	0	0x0000dc40 - 0x0000dc7f (0x40) IX[B]
>	[22] -1	0	0x0000d800 - 0x0000d8ff (0x100) IX[B]
>	[23] -1	0	0x0000bfa0 - 0x0000bfaf (0x10) IX[B]
>	[24] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[25] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[26] -1	0	0x000003f4 - 0x000003f4 (0x1) IX[B]
>	[27] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[28] -1	0	0x0000bf20 - 0x0000bf3f (0x20) IX[B]
>	[29] -1	0	0x0000bf40 - 0x0000bf5f (0x20) IX[B]
>	[30] -1	0	0x0000bf80 - 0x0000bf9f (0x20) IX[B]
>	[31] -1	0	0x0000c000 - 0x0000c007 (0x8) IX[B](B)
>(II) LoadModule: "i2c"(II) Module already built-in
>(II) LoadModule: "ddc"(II) Module already built-in
>(II) LoadModule: "dri"
>(II) Loading /usr/lib/xorg/modules/extensions//libdri.so
>(II) Module dri: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension XFree86-DRI
>(II) LoadModule: "extmod"
>(II) Loading /usr/lib/xorg/modules/extensions//libextmod.so
>(II) Module extmod: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension SHAPE
>(II) Loading extension MIT-SUNDRY-NONSTANDARD
>(II) Loading extension BIG-REQUESTS
>(II) Loading extension SYNC
>(II) Loading extension MIT-SCREEN-SAVER
>(II) Loading extension XC-MISC
>(II) Loading extension XFree86-VidModeExtension
>(II) Loading extension XFree86-Misc
>(II) Loading extension XFree86-DGA
>(II) Loading extension DPMS
>(II) Loading extension TOG-CUP
>(II) Loading extension Extended-Visual-Information
>(II) Loading extension XVideo
>(II) Loading extension XVideo-MotionCompensation
>(II) Loading extension X-Resource
>(II) LoadModule: "freetype"
>(II) Loading /usr/lib/xorg/modules//fonts/libfreetype.so
>(II) Module freetype: vendor="X.Org Foundation & the After X-TT Project"
>	compiled for 1.3.0, module version = 2.1.0
>	Module class: X.Org Font Renderer
>	ABI class: X.Org Font Renderer, version 0.5
>(II) Loading font FreeType
>(II) LoadModule: "glx"
>(II) Loading /usr/lib/xorg/modules/extensions//libglx.so
>(II) Module glx: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(**) AIGLX enabled
>(II) Loading extension GLX
>(II) LoadModule: "int10"
>(II) Loading /usr/lib/xorg/modules//libint10.so
>(II) Module int10: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 1.2
>(II) LoadModule: "vbe"
>(II) Loading /usr/lib/xorg/modules//libvbe.so
>(II) Module vbe: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.1.0
>	ABI class: X.Org Video Driver, version 1.2
>(II) LoadModule: "dbe"
>(II) Loading /usr/lib/xorg/modules/extensions//libdbe.so
>(II) Module dbe: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension DOUBLE-BUFFER
>(II) LoadModule: "record"
>(II) Loading /usr/lib/xorg/modules/extensions//librecord.so
>(II) Module record: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.13.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension RECORD
>(II) LoadModule: "intel"
>(II) Loading /usr/lib/xorg/modules/drivers//intel_drv.so
>(II) Module intel: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 2.1.1
>	Module class: X.Org Video Driver
>	ABI class: X.Org Video Driver, version 1.2
>(II) LoadModule: "kbd"
>(II) Loading /usr/lib/xorg/modules/input//kbd_drv.so
>(II) Module kbd: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.2.1
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 0.7
>(II) LoadModule: "synaptics"
>(II) Loading /usr/lib/xorg/modules/input//synaptics_drv.so
>(II) Module synaptics: vendor="X.Org Foundation"
>	compiled for 4.3.99.902, module version = 1.0.0
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 0.7
>(II) LoadModule: "mouse"
>(II) Loading /usr/lib/xorg/modules/input//mouse_drv.so
>(II) Module mouse: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.2.2
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 0.7
>(II) intel: Driver for Intel Integrated Graphics Chipsets: i810,
>	i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G,
>	E7221 (i915), 915GM, 945G, 945GM, 945GME, 965G, 965G, 965Q, 946GZ,
>	965GM, 965GME/GLE, G33, Q35, Q33
>(II) Primary Device is: PCI 00:02:0
>(--) Chipset 852GM/855GM found
>(II) resource ranges after xf86ClaimFixedResources() call:
>	[0] -1	0	0x00100000 - 0x33ffffff (0x33f00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xfcffd000 - 0xfcffdfff (0x1000) MX[B]
>	[5] -1	0	0xfcffe000 - 0xfcffefff (0x1000) MX[B]
>	[6] -1	0	0xfcff8000 - 0xfcffbfff (0x4000) MX[B]
>	[7] -1	0	0xfcfff800 - 0xfcffffff (0x800) MX[B]
>	[8] -1	0	0xfaeff400 - 0xfaeff4ff (0x100) MX[B]
>	[9] -1	0	0xfaeff800 - 0xfaeff9ff (0x200) MX[B]
>	[10] -1	0	0x34000000 - 0x340003ff (0x400) MX[B]
>	[11] -1	0	0xfaeffc00 - 0xfaefffff (0x400) MX[B]
>	[12] -1	0	0xfaf00000 - 0xfaf7ffff (0x80000) MX[B](B)
>	[13] -1	0	0xe8000000 - 0xefffffff (0x8000000) MX[B](B)
>	[14] -1	0	0xfaf80000 - 0xfaffffff (0x80000) MX[B](B)
>	[15] -1	0	0xf0000000 - 0xf7ffffff (0x8000000) MX[B](B)
>	[16] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[17] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[18] -1	0	0x0000ecc0 - 0x0000ecff (0x40) IX[B]
>	[19] -1	0	0x0000d080 - 0x0000d0ff (0x80) IX[B]
>	[20] -1	0	0x0000d400 - 0x0000d4ff (0x100) IX[B]
>	[21] -1	0	0x0000dc40 - 0x0000dc7f (0x40) IX[B]
>	[22] -1	0	0x0000d800 - 0x0000d8ff (0x100) IX[B]
>	[23] -1	0	0x0000bfa0 - 0x0000bfaf (0x10) IX[B]
>	[24] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[25] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[26] -1	0	0x000003f4 - 0x000003f4 (0x1) IX[B]
>	[27] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[28] -1	0	0x0000bf20 - 0x0000bf3f (0x20) IX[B]
>	[29] -1	0	0x0000bf40 - 0x0000bf5f (0x20) IX[B]
>	[30] -1	0	0x0000bf80 - 0x0000bf9f (0x20) IX[B]
>	[31] -1	0	0x0000c000 - 0x0000c007 (0x8) IX[B](B)
>(II) resource ranges after probing:
>	[0] -1	0	0x00100000 - 0x33ffffff (0x33f00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xfcffd000 - 0xfcffdfff (0x1000) MX[B]
>	[5] -1	0	0xfcffe000 - 0xfcffefff (0x1000) MX[B]
>	[6] -1	0	0xfcff8000 - 0xfcffbfff (0x4000) MX[B]
>	[7] -1	0	0xfcfff800 - 0xfcffffff (0x800) MX[B]
>	[8] -1	0	0xfaeff400 - 0xfaeff4ff (0x100) MX[B]
>	[9] -1	0	0xfaeff800 - 0xfaeff9ff (0x200) MX[B]
>	[10] -1	0	0x34000000 - 0x340003ff (0x400) MX[B]
>	[11] -1	0	0xfaeffc00 - 0xfaefffff (0x400) MX[B]
>	[12] -1	0	0xfaf00000 - 0xfaf7ffff (0x80000) MX[B](B)
>	[13] -1	0	0xe8000000 - 0xefffffff (0x8000000) MX[B](B)
>	[14] -1	0	0xfaf80000 - 0xfaffffff (0x80000) MX[B](B)
>	[15] -1	0	0xf0000000 - 0xf7ffffff (0x8000000) MX[B](B)
>	[16] 1	0	0x000a0000 - 0x000affff (0x10000) MS[B]
>	[17] 1	0	0x000b0000 - 0x000b7fff (0x8000) MS[B]
>	[18] 1	0	0x000b8000 - 0x000bffff (0x8000) MS[B]
>	[19] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[20] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[21] -1	0	0x0000ecc0 - 0x0000ecff (0x40) IX[B]
>	[22] -1	0	0x0000d080 - 0x0000d0ff (0x80) IX[B]
>	[23] -1	0	0x0000d400 - 0x0000d4ff (0x100) IX[B]
>	[24] -1	0	0x0000dc40 - 0x0000dc7f (0x40) IX[B]
>	[25] -1	0	0x0000d800 - 0x0000d8ff (0x100) IX[B]
>	[26] -1	0	0x0000bfa0 - 0x0000bfaf (0x10) IX[B]
>	[27] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[28] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[29] -1	0	0x000003f4 - 0x000003f4 (0x1) IX[B]
>	[30] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[31] -1	0	0x0000bf20 - 0x0000bf3f (0x20) IX[B]
>	[32] -1	0	0x0000bf40 - 0x0000bf5f (0x20) IX[B]
>	[33] -1	0	0x0000bf80 - 0x0000bf9f (0x20) IX[B]
>	[34] -1	0	0x0000c000 - 0x0000c007 (0x8) IX[B](B)
>	[35] 1	0	0x000003b0 - 0x000003bb (0xc) IS[B]
>	[36] 1	0	0x000003c0 - 0x000003df (0x20) IS[B]
>(II) Setting vga for screen 0.
>(II) Loading sub module "int10"
>(II) LoadModule: "int10"
>(II) Reloading /usr/lib/xorg/modules//libint10.so
>(II) Loading sub module "vbe"
>(II) LoadModule: "vbe"
>(II) Reloading /usr/lib/xorg/modules//libvbe.so
>(II) Loading sub module "vgahw"
>(II) LoadModule: "vgahw"
>(II) Loading /usr/lib/xorg/modules//libvgahw.so
>(II) Module vgahw: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 0.1.0
>	ABI class: X.Org Video Driver, version 1.2
>(**) intel(0): Depth 24, (--) framebuffer bpp 32
>(==) intel(0): RGB weight 888
>(==) intel(0): Default visual is TrueColor
>(**) intel(0): Option "CacheLines" "3582"
>(**) intel(0): Option "ModeDebug" "1"
>(II) intel(0): Integrated Graphics Chipset: Intel(R) 855GME
>(--) intel(0): Chipset: "852GM/855GM"
>(--) intel(0): Linear framebuffer at 0xF0000000
>(--) intel(0): IO registers at addr 0xFAF80000
>(II) intel(0): Hardware state on X startup:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4)
>(II) intel(0):            DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled)
>(II) intel(0):              D_STATE: 0x0000030f
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000
>(II) intel(0):       RENCLK_GATE_D1: 0x00000001
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00015455
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40009c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc0300300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOC: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xc0000008 (on, ready, sequencing idle)
>(II) intel(0):         PFIT_CONTROL: 0x80000668
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000000
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):                 FPA0: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):                 FPA1: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):               DPLL_A: 0x808b0000 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 13, p2 = 4)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x49000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000280 (640 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x018f02cf (720, 400)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x027f018f (640, 400)
>(II) intel(0):                 FPB0: 0x00061207 (n = 6, m1 = 18, m2 = 7)
>(II) intel(0):                 FPB1: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):               DPLL_B: 0x90016000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 1, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x053f03ff (1024 active, 1344 total)
>(II) intel(0):             HBLANK_B: 0x053f03ff (1024 start, 1344 end)
>(II) intel(0):              HSYNC_B: 0x049f0417 (1048 start, 1184 end)
>(II) intel(0):             VTOTAL_B: 0x032502ff (768 active, 806 total)
>(II) intel(0):             VBLANK_B: 0x032502ff (768 start, 806 end)
>(II) intel(0):              VSYNC_B: 0x03080302 (771 start, 777 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00021207
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x0000888b
>(II) intel(0):             VGACNTRL: 0x2204008e (enabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x0d
>(II) intel(0):                 CR0b: 0x0e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x20
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 50307 n 2 m1 18 m2 7 p1 13 p2 4
>(II) intel(0): pipe B dot 97321 n 6 m1 18 m2 7 p1 1 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): 2 display pipes available.
>(==) intel(0): Using XAA for acceleration
>(--) intel(0): Will try to allocate texture pool for old Mesa 3D driver.
>(II) intel(0): Will try to reserve 32768 kiB of AGP aperture space
>	for the DRM memory manager.
>(II) Loading sub module "ddc"
>(II) LoadModule: "ddc"(II) Module already built-in
>(II) Loading sub module "i2c"
>(II) LoadModule: "i2c"(II) Module already built-in
>(II) intel(0): Output VGA using monitor section Monitor genÃ©rico
>(II) intel(0): I2C bus "CRTDDC_A" initialized.
>(II) intel(0): Output LVDS has no monitor section
>(II) intel(0): I2C bus "LVDSDDC_C" initialized.
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" registered at address 0xA0.
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" removed.
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: SEC  Model: 4358  Serial#: 0
>(II) intel(0): Year: 2003  Week: 0
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max H-Image Size [cm]: horiz.: 30  vert.: 23
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified; RGB/Color Display
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): redX: 0.580 redY: 0.340   greenX: 0.310 greenY: 0.550
>(II) intel(0): blueX: 0.155 blueY: 0.155   whiteX: 0.313 whiteY: 0.329
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 65.0 MHz   Image Size:  304 x 228 mm
>(II) intel(0): h_active: 1024  h_sync: 1048  h_sync_end 1184 h_blank_end 1344 h_border: 0
>(II) intel(0): v_active: 768  v_sync: 771  v_sync_end 777 v_blanking: 806 v_border: 0
>(II) intel(0):  D1185150XC
>(II) intel(0):  ÐÈ¿¯_
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff004ca3584300000000
>(II) intel(0): 	000d0103801e17780a87f594574f8c27
>(II) intel(0): 	27505400000001010101010101010101
>(II) intel(0): 	01010101010164190040410026301888
>(II) intel(0): 	360030e4100000190000000f00000000
>(II) intel(0): 	000000000018ee027400000000fe0044
>(II) intel(0): 	313138350431353058430a20000000fe
>(II) intel(0): 	00d0c8bfaf9f805f00010a20202000a1
>(II) intel(0): EDID vendor "SEC", prod id 17240
>(II) Loading sub module "int10"
>(II) LoadModule: "int10"
>(II) Reloading /usr/lib/xorg/modules//libint10.so
>(II) intel(0): initializing int10
>(WW) intel(0): Bad V_BIOS checksum
>(II) intel(0): Primary V_BIOS segment is: 0xc000
>(II) intel(0): VESA BIOS detected
>(II) intel(0): VESA VBE Version 3.0
>(II) intel(0): VESA VBE Total Mem: 832 kB
>(II) intel(0): VESA VBE OEM: Intel(r)852GM/852GME/855GM/855GME Graphics Chip Accelerated VGA BIOS
>(II) intel(0): VESA VBE OEM Software Rev: 1.0
>(II) intel(0): VESA VBE OEM Vendor: Intel Corporation
>(II) intel(0): VESA VBE OEM Product: Intel(r)852GM/852GME/855GM/855GME Graphics Controller
>(II) intel(0): VESA VBE OEM Product Rev: Hardware Version 0.0
>(II) intel(0): Found panel mode in BIOS VBT tables:
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 (48.4 kHz)
>(WW) intel(0): BIOS panel mode data doesn't match probed data, continuing with probed.
>(II) intel(0): BIOS mode:
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 (48.4 kHz)
>(II) intel(0): probed mode:
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): I2C bus "DVODDC_D" initialized.
>(II) Loading sub module "sil164"
>(II) LoadModule: "sil164"
>(II) Loading /usr/lib/xorg/modules/drivers//sil164.so
>(II) Module sil164: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 1.2
>(II) intel(0): I2C bus "DVOI2C_E" initialized.
>(EE) intel(0): detecting sil164
>(EE) intel(0): Unable to read from DVOI2C_E Slave 112.
>(II) Loading sub module "ch7xxx"
>(II) LoadModule: "ch7xxx"
>(II) Loading /usr/lib/xorg/modules/drivers//ch7xxx.so
>(II) Module ch7xxx: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 1.2
>(II) intel(0): I2C bus "DVOI2C_E" removed.
>(II) intel(0): I2C bus "DVOI2C_E" initialized.
>(II) intel(0): Detected CH7009B chipset, vendor/device ID 0x85/0x17
>(II) intel(0): I2C device "DVOI2C_E:CH7xxx TMDS Controller" registered at address 0xEC.
>(II) intel(0): Output TMDS has no monitor section
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>chosen: dotclock 31500 vco 1008000 ((m 126, m1 20, m2 14), n 4, (p 32, p1 8, p2 4))
>(II) intel(0): Output VGA disconnected
>(II) intel(0): EDID for output VGA
>(II) intel(0): Output LVDS connected
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" registered at address 0xA0.
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" removed.
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: SEC  Model: 4358  Serial#: 0
>(II) intel(0): Year: 2003  Week: 0
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max H-Image Size [cm]: horiz.: 30  vert.: 23
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified; RGB/Color Display
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): redX: 0.580 redY: 0.340   greenX: 0.310 greenY: 0.550
>(II) intel(0): blueX: 0.155 blueY: 0.155   whiteX: 0.313 whiteY: 0.329
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 65.0 MHz   Image Size:  304 x 228 mm
>(II) intel(0): h_active: 1024  h_sync: 1048  h_sync_end 1184 h_blank_end 1344 h_border: 0
>(II) intel(0): v_active: 768  v_sync: 771  v_sync_end 777 v_blanking: 806 v_border: 0
>(II) intel(0):  D1185150XC
>(II) intel(0):  ÐÈ¿¯_
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff004ca3584300000000
>(II) intel(0): 	000d0103801e17780a87f594574f8c27
>(II) intel(0): 	27505400000001010101010101010101
>(II) intel(0): 	01010101010164190040410026301888
>(II) intel(0): 	360030e4100000190000000f00000000
>(II) intel(0): 	000000000018ee027400000000fe0044
>(II) intel(0): 	313138350431353058430a20000000fe
>(II) intel(0): 	00d0c8bfaf9f805f00010a20202000a1
>(II) intel(0): EDID vendor "SEC", prod id 17240
>(II) intel(0): Not using default mode "640x350" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "720x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1152x864" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x960" (hsync out of range)
>(II) intel(0): Not using default mode "1280x960" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x1024" (hsync out of range)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (hsync out of range)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "1792x1344" (hsync out of range)
>(II) intel(0): Not using default mode "1792x1344" (vrefresh out of range)
>(II) intel(0): Not using default mode "1856x1392" (hsync out of range)
>(II) intel(0): Not using default mode "1856x1392" (vrefresh out of range)
>(II) intel(0): Not using default mode "1920x1440" (hsync out of range)
>(II) intel(0): Not using default mode "1920x1440" (vrefresh out of range)
>(II) intel(0): Not using default mode "832x624" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x768" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x800" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1152x864" (vrefresh out of range)
>(II) intel(0): Not using default mode "1400x1050" (hsync out of range)
>(II) intel(0): Not using default mode "1400x1050" (vrefresh out of range)
>(II) intel(0): Not using default mode "1400x1050" (vrefresh out of range)
>(II) intel(0): Not using default mode "1400x1050" (vrefresh out of range)
>(II) intel(0): Not using default mode "1440x900" (hsync out of range)
>(II) intel(0): Not using default mode "1600x1024" (hsync out of range)
>(II) intel(0): Not using default mode "1680x1050" (hsync out of range)
>(II) intel(0): Not using default mode "1920x1200" (hsync out of range)
>(II) intel(0): Not using default mode "1920x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "1920x1440" (vrefresh out of range)
>(II) intel(0): Not using default mode "2048x1536" (hsync out of range)
>(II) intel(0): Not using default mode "2048x1536" (vrefresh out of range)
>(II) intel(0): Not using default mode "2048x1536" (vrefresh out of range)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Output TMDS disconnected
>(II) intel(0): EDID for output TMDS
>(II) intel(0): Output VGA disconnected
>(II) intel(0): Output LVDS connected
>(II) intel(0): Output TMDS disconnected
>(II) intel(0): Output LVDS using initial mode 1024x768
>(II) intel(0): Monitoring connected displays enabled
>(II) intel(0): detected 128 kB GTT.
>(II) intel(0): detected 892 kB stolen memory.
>(==) intel(0): video overlay key set to 0x101fe
>(==) intel(0): Will not try to enable page flipping
>(==) intel(0): Triple buffering disabled
>(==) intel(0): Using gamma correction (1.0, 1.0, 1.0)
>(==) intel(0): DPI set to (75, 75)
>(II) Loading sub module "fb"
>(II) LoadModule: "fb"
>(II) Loading /usr/lib/xorg/modules//libfb.so
>(II) Module fb: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.0
>	ABI class: X.Org ANSI C Emulation, version 0.3
>(II) Loading sub module "xaa"
>(II) LoadModule: "xaa"
>(II) Loading /usr/lib/xorg/modules//libxaa.so
>(II) Module xaa: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.2.0
>	ABI class: X.Org Video Driver, version 1.2
>(II) Loading sub module "ramdac"
>(II) LoadModule: "ramdac"(II) Module already built-in
>(II) intel(0): Comparing regs from server start up to After PreInit
>(==) Depth 24 pixmap format is 32 bpp
>(II) do I need RAC?  No, I don't.
>(II) resource ranges after preInit:
>	[0] 1	0	0xfaf80000 - 0xfaffffff (0x80000) MS[B]
>	[1] 1	0	0xf0000000 - 0xf7ffffff (0x8000000) MS[B]
>	[2] -1	0	0x00100000 - 0x33ffffff (0x33f00000) MX[B]E(B)
>	[3] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[4] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[5] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[6] -1	0	0xfcffd000 - 0xfcffdfff (0x1000) MX[B]
>	[7] -1	0	0xfcffe000 - 0xfcffefff (0x1000) MX[B]
>	[8] -1	0	0xfcff8000 - 0xfcffbfff (0x4000) MX[B]
>	[9] -1	0	0xfcfff800 - 0xfcffffff (0x800) MX[B]
>	[10] -1	0	0xfaeff400 - 0xfaeff4ff (0x100) MX[B]
>	[11] -1	0	0xfaeff800 - 0xfaeff9ff (0x200) MX[B]
>	[12] -1	0	0x34000000 - 0x340003ff (0x400) MX[B]
>	[13] -1	0	0xfaeffc00 - 0xfaefffff (0x400) MX[B]
>	[14] -1	0	0xfaf00000 - 0xfaf7ffff (0x80000) MX[B](B)
>	[15] -1	0	0xe8000000 - 0xefffffff (0x8000000) MX[B](B)
>	[16] -1	0	0xfaf80000 - 0xfaffffff (0x80000) MX[B](B)
>	[17] -1	0	0xf0000000 - 0xf7ffffff (0x8000000) MX[B](B)
>	[18] 1	0	0x000a0000 - 0x000affff (0x10000) MS[B](OprD)
>	[19] 1	0	0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD)
>	[20] 1	0	0x000b8000 - 0x000bffff (0x8000) MS[B](OprD)
>	[21] 1	0	0x0000c000 - 0x0000c007 (0x8) IS[B]
>	[22] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[23] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[24] -1	0	0x0000ecc0 - 0x0000ecff (0x40) IX[B]
>	[25] -1	0	0x0000d080 - 0x0000d0ff (0x80) IX[B]
>	[26] -1	0	0x0000d400 - 0x0000d4ff (0x100) IX[B]
>	[27] -1	0	0x0000dc40 - 0x0000dc7f (0x40) IX[B]
>	[28] -1	0	0x0000d800 - 0x0000d8ff (0x100) IX[B]
>	[29] -1	0	0x0000bfa0 - 0x0000bfaf (0x10) IX[B]
>	[30] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[31] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[32] -1	0	0x000003f4 - 0x000003f4 (0x1) IX[B]
>	[33] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[34] -1	0	0x0000bf20 - 0x0000bf3f (0x20) IX[B]
>	[35] -1	0	0x0000bf40 - 0x0000bf5f (0x20) IX[B]
>	[36] -1	0	0x0000bf80 - 0x0000bf9f (0x20) IX[B]
>	[37] -1	0	0x0000c000 - 0x0000c007 (0x8) IX[B](B)
>	[38] 1	0	0x000003b0 - 0x000003bb (0xc) IS[B](OprU)
>	[39] 1	0	0x000003c0 - 0x000003df (0x20) IS[B](OprU)
>(II) intel(0): Kernel reported 112128 total, 1 used
>(II) intel(0): I830CheckAvailableMemory: 448508 kB available
>(==) intel(0): VideoRam: 131072 KB
>(**) intel(0): Requested 3582 cache lines
>(**) intel(0): Framebuffer compression enabled
>(**) intel(0): Tiling enabled
>(II) intel(0): Attempting memory allocation with tiled buffers and 
>	       large DRI memory manager reservation:
>(WW) intel(0): xf86AllocateGARTMemory: allocation of 1536 pages failed
>	(Cannot allocate memory)
>(WW) intel(0): Allocation error, framebuffer compression disabled
>(WW) intel(0): xf86AllocateGARTMemory: allocation of 10 pages failed
>	(Cannot allocate memory)
>(II) intel(0): Allocating 3582 scanlines for pixmap cache
>(II) intel(0): Attempting memory allocation with tiled buffers and 
>	       small DRI memory manager reservation:
>(WW) intel(0): xf86AllocateGARTMemory: allocation of 10 pages failed
>	(Cannot allocate memory)
>(II) intel(0): Allocating 3582 scanlines for pixmap cache
>(WW) intel(0): Failed to allocate texture space.
>(II) intel(0): Attempting memory allocation with untiled buffers and 
>	       large DRI memory manager reservation:
>(WW) intel(0): xf86AllocateGARTMemory: allocation of 10 pages failed
>	(Cannot allocate memory)
>(II) intel(0): Allocating 3582 scanlines for pixmap cache
>(WW) intel(0): Failed to allocate texture space.
>(II) intel(0): Attempting memory allocation with untiled buffers and 
>	       small DRI memory manager reservation:
>(WW) intel(0): xf86AllocateGARTMemory: allocation of 10 pages failed
>	(Cannot allocate memory)
>(II) intel(0): Allocating 3582 scanlines for pixmap cache
>(II) intel(0): Success.
>(II) intel(0): Memory allocation layout:
>(II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB)
>(II) intel(0): 0x00020000-0x00027fff: logical 3D context (32 kB)
>(II) intel(0): 0x00028000-0x00037fff: xaa scratch (64 kB)
>(II) intel(0): 0x000df000:            end of stolen memory
>(II) intel(0): 0x000df000-0x000dffff: Core cursor (4 kB, 0x0000000013207000 physical
>)
>(II) intel(0): 0x000e0000-0x000e3fff: ARGB cursor (16 kB, 0x0000000004278000 physical
>)
>(II) intel(0): 0x000e4000-0x000e4fff: Core cursor (4 kB, 0x000000001db82000 physical
>)
>(II) intel(0): 0x000e5000-0x000e8fff: ARGB cursor (16 kB, 0x00000000048b0000 physical
>)
>(II) intel(0): 0x000e9000-0x000e9fff: overlay registers (4 kB, 0x00000000132de000 physical
>)
>(II) intel(0): 0x000f0000-0x02cebfff: front buffer (45040 kB)
>(II) intel(0): 0x02cec000-0x03cebfff: back buffer (16384 kB)
>(II) intel(0): 0x03cec000-0x04cebfff: depth buffer (16384 kB)
>(II) intel(0): 0x04cec000-0x04eebfff: DRI memory manager (2048 kB)
>(II) intel(0): 0x04eec000-0x06eebfff: textures (32768 kB)
>(II) intel(0): 0x08000000:            end of aperture
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 8, (OK)
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 8, (OK)
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 8, (OK)
>drmOpenByBusid: drmOpenMinor returns 8
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(II) intel(0): [drm] DRM interface version 1.3
>(II) intel(0): [drm] created "i915" driver at busid "pci:0000:00:02.0"
>(II) intel(0): [drm] added 8192 byte SAREA at 0xe0bb8000
>(II) intel(0): [drm] mapped SAREA 0xe0bb8000 to 0xb7b22000
>(II) intel(0): [drm] framebuffer handle = 0xf00f0000
>(II) intel(0): [drm] added 1 reserved context for kernel
>(II) intel(0): Unable to use TTM-based memory manager with DRM version 1.6
>(II) intel(0): [drm] Registers = 0xfaf80000
>(II) intel(0): [drm] ring buffer = 0xf0000000
>(II) intel(0): [drm] init sarea width,height = 2048 x 2048 (pitch 2048)
>(II) intel(0): [drm] Mapping front buffer
>(II) intel(0): [drm] Front Buffer = 0x2e01e000
>(II) intel(0): [drm] Back Buffer = 0xf2cec000
>(II) intel(0): [drm] Depth Buffer = 0xf3cec000
>(II) intel(0): [drm] textures = 0xf4eec000
>(II) intel(0): [drm] Initialized kernel agp heap manager, 33554432
>(II) intel(0): [dri] visual configs initialized
>(II) intel(0): Page Flipping disabled
>(==) intel(0): Write-combining range (0xf0000000,0x8000000)
>(II) intel(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000
>(**) intel(0): Option "XaaNoOffscreenPixmaps"
>(II) intel(0): Using XFree86 Acceleration Architecture (XAA)
>	Screen to screen bit blits
>	Solid filled rectangles
>	8x8 mono pattern filled rectangles
>	Indirect CPU to Screen color expansion
>	Solid Horizontal and Vertical Lines
>	Setting up tile and stipple cache:
>		32 128x128 slots
>		32 256x256 slots
>		16 512x512 slots
>(==) intel(0): Backing store disabled
>(==) intel(0): Silken mouse enabled
>(II) intel(0): Initializing HW Cursor
>(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x000df000 (pgoffset 223)
>(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x000e0000 (pgoffset 224)
>(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x000e4000 (pgoffset 228)
>(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x000e5000 (pgoffset 229)
>(II) intel(0): xf86BindGARTMemory: bind key 4 at 0x000e9000 (pgoffset 233)
>(II) intel(0): xf86BindGARTMemory: bind key 5 at 0x000f0000 (pgoffset 240)
>(II) intel(0): xf86BindGARTMemory: bind key 6 at 0x02cec000 (pgoffset 11500)
>(II) intel(0): xf86BindGARTMemory: bind key 7 at 0x03cec000 (pgoffset 15596)
>(II) intel(0): xf86BindGARTMemory: bind key 8 at 0x04eec000 (pgoffset 20204)
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>chosen: dotclock 66612 vco 932571 ((m 136, m1 22, m2 14), n 5, (p 14, p1 1, p2 14))
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>chosen: dotclock 31500 vco 1008000 ((m 126, m1 20, m2 14), n 4, (p 32, p1 8, p2 4))
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4)
>(II) intel(0):            DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled)
>(II) intel(0):              D_STATE: 0x0000030f
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000
>(II) intel(0):       RENCLK_GATE_D1: 0x00000001
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00015455
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40009c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc0300300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOC: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PFIT_CONTROL: 0x00000008
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000000
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0xd9000000 (enabled, pipe B)
>(II) intel(0):           DSPASTRIDE: 0x00002000 (8192 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x02ff03ff (1024, 768)
>(II) intel(0):             DSPABASE: 0x000f0000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):                 FPA0: 0x0004140e (n = 4, m1 = 20, m2 = 14)
>(II) intel(0):                 FPA1: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):               DPLL_A: 0x10860000 (disabled, non-dvo, default clock, DAC/serial mode, p1 = 8, p2 = 4)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x033f027f (640 active, 832 total)
>(II) intel(0):             HBLANK_A: 0x033f027f (640 start, 832 end)
>(II) intel(0):              HSYNC_A: 0x02bf0297 (664 start, 704 end)
>(II) intel(0):             VTOTAL_A: 0x020701df (480 active, 520 total)
>(II) intel(0):             VBLANK_A: 0x020701df (480 start, 520 end)
>(II) intel(0):              VSYNC_A: 0x01ea01e8 (489 start, 491 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x58000000 (disabled, pipe A)
>(II) intel(0):           DSPBSTRIDE: 0x00002000 (8192 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x01df027f (640, 480)
>(II) intel(0):             DSPBBASE: 0x000f0000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x03ff02ff (1024, 768)
>(II) intel(0):                 FPB0: 0x0005160e (n = 5, m1 = 22, m2 = 14)
>(II) intel(0):                 FPB1: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):               DPLL_B: 0x90010000 (enabled, non-dvo, default clock, LVDS mode, p1 = 1, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x053f03ff (1024 active, 1344 total)
>(II) intel(0):             HBLANK_B: 0x053f03ff (1024 start, 1344 end)
>(II) intel(0):              HSYNC_B: 0x049f0417 (1048 start, 1184 end)
>(II) intel(0):             VTOTAL_B: 0x032502ff (768 active, 806 total)
>(II) intel(0):             VBLANK_B: 0x032502ff (768 start, 806 end)
>(II) intel(0):              VSYNC_B: 0x03080302 (771 start, 777 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00021207
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x0000888b
>(II) intel(0):             VGACNTRL: 0x80000000 (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x0d
>(II) intel(0):                 CR0b: 0x0e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x0e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x00
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 63000 n 4 m1 20 m2 14 p1 8 p2 4
>(II) intel(0): pipe B dot 133224 n 5 m1 22 m2 14 p1 1 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is off
>(II) intel(0):   Display plane B is now disabled and connected to pipe A.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane A is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output LVDS is connected to pipe B
>(II) intel(0):   Output TMDS is connected to pipe none
>(**) Option "dpms"
>(**) intel(0): DPMS enabled
>(II) intel(0): Set up overlay video
>(II) intel(0): X context handle = 0x1
>(II) intel(0): [drm] installed DRM signal handler
>(II) intel(0): [DRI] installation complete
>(II) intel(0): [drm] dma control initialized, using IRQ 11
>(II) intel(0): direct rendering: Enabled
>(II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>(--) RandR disabled
>(II) Initializing built-in extension MIT-SHM
>(II) Initializing built-in extension XInputExtension
>(II) Initializing built-in extension XTEST
>(II) Initializing built-in extension XKEYBOARD
>(II) Initializing built-in extension XC-APPGROUP
>(II) Initializing built-in extension XAccessControlExtension
>(II) Initializing built-in extension SECURITY
>(II) Initializing built-in extension XINERAMA
>(II) Initializing built-in extension XFIXES
>(II) Initializing built-in extension XFree86-Bigfont
>(II) Initializing built-in extension RENDER
>(II) Initializing built-in extension RANDR
>(II) Initializing built-in extension COMPOSITE
>(II) Initializing built-in extension DAMAGE
>(II) Initializing built-in extension XEVIE
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 9, (OK)
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 9, (OK)
>drmOpenByBusid: drmOpenMinor returns 9
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(WW) AIGLX: 3D driver claims to not support visual 0x23
>(WW) AIGLX: 3D driver claims to not support visual 0x24
>(WW) AIGLX: 3D driver claims to not support visual 0x25
>(WW) AIGLX: 3D driver claims to not support visual 0x26
>(WW) AIGLX: 3D driver claims to not support visual 0x27
>(WW) AIGLX: 3D driver claims to not support visual 0x28
>(WW) AIGLX: 3D driver claims to not support visual 0x29
>(WW) AIGLX: 3D driver claims to not support visual 0x2a
>(WW) AIGLX: 3D driver claims to not support visual 0x2b
>(WW) AIGLX: 3D driver claims to not support visual 0x2c
>(WW) AIGLX: 3D driver claims to not support visual 0x2d
>(WW) AIGLX: 3D driver claims to not support visual 0x2e
>(WW) AIGLX: 3D driver claims to not support visual 0x2f
>(WW) AIGLX: 3D driver claims to not support visual 0x30
>(WW) AIGLX: 3D driver claims to not support visual 0x31
>(WW) AIGLX: 3D driver claims to not support visual 0x32
>(II) AIGLX: Loaded and initialized /usr/lib/dri/i915_dri.so
>(II) GLX: Initialized DRI GL provider for screen 0
>(II) intel(0): Setting screen physical size to 304 x 228
>(**) Option "CoreKeyboard"
>(**) Generic Keyboard: Core Keyboard
>(**) Option "Protocol" "standard"
>(**) Generic Keyboard: Protocol: standard
>(**) Option "AutoRepeat" "500 30"
>(**) Option "XkbRules" "xorg"
>(**) Generic Keyboard: XkbRules: "xorg"
>(**) Option "XkbModel" "pc105"
>(**) Generic Keyboard: XkbModel: "pc105"
>(**) Option "XkbLayout" "es"
>(**) Generic Keyboard: XkbLayout: "es"
>(**) Option "CustomKeycodes" "off"
>(**) Generic Keyboard: CustomKeycodes disabled
>(II) Synaptics touchpad driver version 0.14.6 (1406)
>(--) Synaptics Touchpad auto-dev sets device to /dev/input/event2
>(**) Option "Device" "/dev/input/event2"
>(**) Option "SHMConfig" "on"
>(**) Option "LeftEdge" "120"
>(**) Option "RightEdge" "830"
>(**) Option "TopEdge" "120"
>(**) Option "BottomEdge" "650"
>(**) Option "VertScrollDelta" "20"
>(**) Option "HorizScrollDelta" "20"
>(**) Option "FingerLow" "45"
>(**) Option "FingerHigh" "35"
>(**) Option "MaxTapTime" "70"
>(**) Option "MaxTapMove" "180"
>(**) Option "MaxDoubleTapTime" "100"
>(**) Option "ClickTime" "50"
>(**) Option "FastTaps" "1"
>(**) Option "EdgeMotionUseAlways" "1"
>(**) Option "Repeater" "/dev/ps2mouse"
>(**) Option "UpDownScrolling" "1"
>(**) Option "RTCornerButton" "2"
>(**) Option "RBCornerButton" "3"
>(**) Option "TapButton1" "1"
>(**) Option "TapButton2" "2"
>(**) Option "TapButton3" "3"
>(**) Option "SingleTapTimeout" "88"
>(**) Option "Device" "/dev/ps2mouse"
>(--) Synaptics Touchpad touchpad found
>(**) Option "CorePointer"
>(**) Synaptics Touchpad: Core Pointer
>(**) Option "Protocol" "ImPS/2"
>(**) Configured Mouse: Device: "/dev/input/mice"
>(**) Configured Mouse: Protocol: "ImPS/2"
>(**) Option "CorePointer" "False"
>(**) Option "Device" "/dev/input/mice"
>(**) Option "Emulate3Buttons" "true"
>(**) Configured Mouse: Emulate3Buttons, Emulate3Timeout: 50
>(**) Configured Mouse: ZAxisMapping: buttons 4 and 5
>(**) Configured Mouse: Buttons: 9
>(**) Configured Mouse: Sensitivity: 1
>(II) XINPUT: Adding extended input device "Configured Mouse" (type: MOUSE)
>(II) XINPUT: Adding extended input device "Synaptics Touchpad" (type: MOUSE)
>(II) XINPUT: Adding extended input device "Generic Keyboard" (type: KEYBOARD)
>Synaptics DeviceInit called
>SynapticsCtrl called.
>Synaptics DeviceOn called
>(--) Synaptics Touchpad auto-dev sets device to /dev/input/event2
>(**) Option "Device" "/dev/input/event2"
>(--) Synaptics Touchpad touchpad found
>Could not init font path element /usr/share/fonts/X11/cyrillic, removing from list!
>Synaptics DeviceOff called
>(II) AIGLX: Suspending AIGLX clients for VT switch
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd0000009
>(WW) intel(0): PP_STATUS before: on, ready, sequencing idle
>(WW) intel(0): PP_STATUS after: on, ready, sequencing on
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4)
>(II) intel(0):            DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled)
>(II) intel(0):              D_STATE: 0x0000030f
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000
>(II) intel(0):       RENCLK_GATE_D1: 0x00000001
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00015455
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40009c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc0300300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOC: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PFIT_CONTROL: 0x80000668
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000000
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):                 FPA0: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):                 FPA1: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):               DPLL_A: 0x808b0000 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 13, p2 = 4)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x49000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000280 (640 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x018f02cf (720, 400)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x027f018f (640, 400)
>(II) intel(0):                 FPB0: 0x00061207 (n = 6, m1 = 18, m2 = 7)
>(II) intel(0):                 FPB1: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):               DPLL_B: 0x90016000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 1, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x053f03ff (1024 active, 1344 total)
>(II) intel(0):             HBLANK_B: 0x053f03ff (1024 start, 1344 end)
>(II) intel(0):              HSYNC_B: 0x049f0417 (1048 start, 1184 end)
>(II) intel(0):             VTOTAL_B: 0x032502ff (768 active, 806 total)
>(II) intel(0):             VBLANK_B: 0x032502ff (768 start, 806 end)
>(II) intel(0):              VSYNC_B: 0x03080302 (771 start, 777 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00021207
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x0000888b
>(II) intel(0):             VGACNTRL: 0x2204008e (enabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x0d
>(II) intel(0):                 CR0b: 0x0e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x00
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 50307 n 2 m1 18 m2 7 p1 13 p2 4
>(II) intel(0): pipe B dot 97321 n 6 m1 18 m2 7 p1 1 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): xf86UnbindGARTMemory: unbind key 0
>(II) intel(0): xf86UnbindGARTMemory: unbind key 1
>(II) intel(0): xf86UnbindGARTMemory: unbind key 2
>(II) intel(0): xf86UnbindGARTMemory: unbind key 3
>(II) intel(0): xf86UnbindGARTMemory: unbind key 4
>(II) intel(0): xf86UnbindGARTMemory: unbind key 5
>(II) intel(0): xf86UnbindGARTMemory: unbind key 6
>(II) intel(0): xf86UnbindGARTMemory: unbind key 7
>(II) intel(0): xf86UnbindGARTMemory: unbind key 8
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) AIGLX: Resuming AIGLX clients after VT switch
>(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x000df000 (pgoffset 223)
>(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x000e0000 (pgoffset 224)
>(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x000e4000 (pgoffset 228)
>(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x000e5000 (pgoffset 229)
>(II) intel(0): xf86BindGARTMemory: bind key 4 at 0x000e9000 (pgoffset 233)
>(II) intel(0): xf86BindGARTMemory: bind key 5 at 0x000f0000 (pgoffset 240)
>(II) intel(0): xf86BindGARTMemory: bind key 6 at 0x02cec000 (pgoffset 11500)
>(II) intel(0): xf86BindGARTMemory: bind key 7 at 0x03cec000 (pgoffset 15596)
>(II) intel(0): xf86BindGARTMemory: bind key 8 at 0x04eec000 (pgoffset 20204)
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>chosen: dotclock 66612 vco 932571 ((m 136, m1 22, m2 14), n 5, (p 14, p1 1, p2 14))
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4)
>(II) intel(0):            DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled)
>(II) intel(0):              D_STATE: 0x0000030f
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000
>(II) intel(0):       RENCLK_GATE_D1: 0x00000001
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00015455
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40009c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc0300300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOC: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PFIT_CONTROL: 0x00000008
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000000
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0xd9000000 (enabled, pipe B)
>(II) intel(0):           DSPASTRIDE: 0x00002000 (8192 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x02ff03ff (1024, 768)
>(II) intel(0):             DSPABASE: 0x000f0000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):                 FPA0: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):                 FPA1: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):               DPLL_A: 0x008b0000 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 13, p2 = 4)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x49000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000280 (640 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x018f02cf (720, 400)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x03ff02ff (1024, 768)
>(II) intel(0):                 FPB0: 0x0005160e (n = 5, m1 = 22, m2 = 14)
>(II) intel(0):                 FPB1: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):               DPLL_B: 0x90010000 (enabled, non-dvo, default clock, LVDS mode, p1 = 1, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x053f03ff (1024 active, 1344 total)
>(II) intel(0):             HBLANK_B: 0x053f03ff (1024 start, 1344 end)
>(II) intel(0):              HSYNC_B: 0x049f0417 (1048 start, 1184 end)
>(II) intel(0):             VTOTAL_B: 0x032502ff (768 active, 806 total)
>(II) intel(0):             VBLANK_B: 0x032502ff (768 start, 806 end)
>(II) intel(0):              VSYNC_B: 0x03080302 (771 start, 777 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00021207
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x0000888b
>(II) intel(0):             VGACNTRL: 0x80000000 (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x1f
>(II) intel(0):                 CR0b: 0x1e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0xfd
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x20
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 50307 n 2 m1 18 m2 7 p1 13 p2 4
>(II) intel(0): pipe B dot 133224 n 5 m1 22 m2 14 p1 1 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is off
>(II) intel(0):   Display plane B is now disabled and connected to pipe B.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane A is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output LVDS is connected to pipe B
>(II) intel(0):   Output TMDS is connected to pipe none
>(II) intel(0): [drm] dma control initialized, using IRQ 11
>(II) Configured Mouse: ps2EnableDataReporting: succeeded
>Synaptics DeviceOn called
>(--) Synaptics Touchpad auto-dev sets device to /dev/input/event2
>(**) Option "Device" "/dev/input/event2"
>(--) Synaptics Touchpad touchpad found
>Synaptics DeviceOff called
>(II) AIGLX: Suspending AIGLX clients for VT switch
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd0000009
>(WW) intel(0): PP_STATUS before: on, ready, sequencing idle
>(WW) intel(0): PP_STATUS after: on, ready, sequencing on
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4)
>(II) intel(0):            DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled)
>(II) intel(0):              D_STATE: 0x0000030f
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000
>(II) intel(0):       RENCLK_GATE_D1: 0x00000001
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00015455
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40009c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc0300300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOC: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PFIT_CONTROL: 0x80000668
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000000
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):                 FPA0: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):                 FPA1: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):               DPLL_A: 0x808b0000 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 13, p2 = 4)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x49000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000280 (640 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x018f02cf (720, 400)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x027f018f (640, 400)
>(II) intel(0):                 FPB0: 0x00061207 (n = 6, m1 = 18, m2 = 7)
>(II) intel(0):                 FPB1: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):               DPLL_B: 0x90016000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 1, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x053f03ff (1024 active, 1344 total)
>(II) intel(0):             HBLANK_B: 0x053f03ff (1024 start, 1344 end)
>(II) intel(0):              HSYNC_B: 0x049f0417 (1048 start, 1184 end)
>(II) intel(0):             VTOTAL_B: 0x032502ff (768 active, 806 total)
>(II) intel(0):             VBLANK_B: 0x032502ff (768 start, 806 end)
>(II) intel(0):              VSYNC_B: 0x03080302 (771 start, 777 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00021207
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x0000888b
>(II) intel(0):             VGACNTRL: 0x2204008e (enabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x1f
>(II) intel(0):                 CR0b: 0x1e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0xfd
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x20
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 50307 n 2 m1 18 m2 7 p1 13 p2 4
>(II) intel(0): pipe B dot 97321 n 6 m1 18 m2 7 p1 1 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): xf86UnbindGARTMemory: unbind key 0
>(II) intel(0): xf86UnbindGARTMemory: unbind key 1
>(II) intel(0): xf86UnbindGARTMemory: unbind key 2
>(II) intel(0): xf86UnbindGARTMemory: unbind key 3
>(II) intel(0): xf86UnbindGARTMemory: unbind key 4
>(II) intel(0): xf86UnbindGARTMemory: unbind key 5
>(II) intel(0): xf86UnbindGARTMemory: unbind key 6
>(II) intel(0): xf86UnbindGARTMemory: unbind key 7
>(II) intel(0): xf86UnbindGARTMemory: unbind key 8
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) AIGLX: Resuming AIGLX clients after VT switch
>(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x000df000 (pgoffset 223)
>(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x000e0000 (pgoffset 224)
>(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x000e4000 (pgoffset 228)
>(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x000e5000 (pgoffset 229)
>(II) intel(0): xf86BindGARTMemory: bind key 4 at 0x000e9000 (pgoffset 233)
>(II) intel(0): xf86BindGARTMemory: bind key 5 at 0x000f0000 (pgoffset 240)
>(II) intel(0): xf86BindGARTMemory: bind key 6 at 0x02cec000 (pgoffset 11500)
>(II) intel(0): xf86BindGARTMemory: bind key 7 at 0x03cec000 (pgoffset 15596)
>(II) intel(0): xf86BindGARTMemory: bind key 8 at 0x04eec000 (pgoffset 20204)
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>chosen: dotclock 66612 vco 932571 ((m 136, m1 22, m2 14), n 5, (p 14, p1 1, p2 14))
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4)
>(II) intel(0):            DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled)
>(II) intel(0):              D_STATE: 0x0000030f
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000
>(II) intel(0):       RENCLK_GATE_D1: 0x00000001
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00015455
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40009c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc0300300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOC: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PFIT_CONTROL: 0x00000008
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000000
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0xd9000000 (enabled, pipe B)
>(II) intel(0):           DSPASTRIDE: 0x00002000 (8192 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x02ff03ff (1024, 768)
>(II) intel(0):             DSPABASE: 0x000f0000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):                 FPA0: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):                 FPA1: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):               DPLL_A: 0x008b0000 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 13, p2 = 4)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x49000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000280 (640 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x018f02cf (720, 400)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x03ff02ff (1024, 768)
>(II) intel(0):                 FPB0: 0x0005160e (n = 5, m1 = 22, m2 = 14)
>(II) intel(0):                 FPB1: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):               DPLL_B: 0x90010000 (enabled, non-dvo, default clock, LVDS mode, p1 = 1, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x053f03ff (1024 active, 1344 total)
>(II) intel(0):             HBLANK_B: 0x053f03ff (1024 start, 1344 end)
>(II) intel(0):              HSYNC_B: 0x049f0417 (1048 start, 1184 end)
>(II) intel(0):             VTOTAL_B: 0x032502ff (768 active, 806 total)
>(II) intel(0):             VBLANK_B: 0x032502ff (768 start, 806 end)
>(II) intel(0):              VSYNC_B: 0x03080302 (771 start, 777 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00021207
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x0000888b
>(II) intel(0):             VGACNTRL: 0x80000000 (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x1f
>(II) intel(0):                 CR0b: 0x1e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x20
>(II) intel(0):                 CR0f: 0x87
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x20
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 50307 n 2 m1 18 m2 7 p1 13 p2 4
>(II) intel(0): pipe B dot 133224 n 5 m1 22 m2 14 p1 1 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is off
>(II) intel(0):   Display plane B is now disabled and connected to pipe B.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane A is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output LVDS is connected to pipe B
>(II) intel(0):   Output TMDS is connected to pipe none
>(II) intel(0): [drm] dma control initialized, using IRQ 11
>(II) Configured Mouse: ps2EnableDataReporting: succeeded
>Synaptics DeviceOn called
>(--) Synaptics Touchpad auto-dev sets device to /dev/input/event2
>(**) Option "Device" "/dev/input/event2"
>(--) Synaptics Touchpad touchpad found
>Synaptics DeviceOff called
>(II) intel(0): [drm] removed 1 reserved context for kernel
>(II) intel(0): [drm] unmapping 8192 bytes of SAREA 0xe0bb8000 at 0xb7b22000
>(EE) intel(0): I830 Vblank Pipe Setup Failed 0
>(EE) intel(0): I830 Vblank Pipe Setup Failed 0
>(EE) intel(0): I830 Vblank Pipe Setup Failed 0
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd0000009
>(WW) intel(0): PP_STATUS before: on, ready, sequencing idle
>(WW) intel(0): PP_STATUS after: on, ready, sequencing on
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4)
>(II) intel(0):            DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled)
>(II) intel(0):              D_STATE: 0x0000030f
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000
>(II) intel(0):       RENCLK_GATE_D1: 0x00000001
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00015455
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40009c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc0300300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOC: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PFIT_CONTROL: 0x80000668
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000000
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):                 FPA0: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):                 FPA1: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):               DPLL_A: 0x808b0000 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 13, p2 = 4)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x49000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000280 (640 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x018f02cf (720, 400)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x027f018f (640, 400)
>(II) intel(0):                 FPB0: 0x00061207 (n = 6, m1 = 18, m2 = 7)
>(II) intel(0):                 FPB1: 0x00021207 (n = 2, m1 = 18, m2 = 7)
>(II) intel(0):               DPLL_B: 0x90016000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 1, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x053f03ff (1024 active, 1344 total)
>(II) intel(0):             HBLANK_B: 0x053f03ff (1024 start, 1344 end)
>(II) intel(0):              HSYNC_B: 0x049f0417 (1048 start, 1184 end)
>(II) intel(0):             VTOTAL_B: 0x032502ff (768 active, 806 total)
>(II) intel(0):             VBLANK_B: 0x032502ff (768 start, 806 end)
>(II) intel(0):              VSYNC_B: 0x03080302 (771 start, 777 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00021207
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x0000888b
>(II) intel(0):             VGACNTRL: 0x2204008e (enabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x1f
>(II) intel(0):                 CR0b: 0x1e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x20
>(II) intel(0):                 CR0f: 0x87
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x20
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 50307 n 2 m1 18 m2 7 p1 13 p2 4
>(II) intel(0): pipe B dot 97321 n 6 m1 18 m2 7 p1 1 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): xf86UnbindGARTMemory: unbind key 0
>(II) intel(0): xf86UnbindGARTMemory: unbind key 1
>(II) intel(0): xf86UnbindGARTMemory: unbind key 2
>(II) intel(0): xf86UnbindGARTMemory: unbind key 3
>(II) intel(0): xf86UnbindGARTMemory: unbind key 4
>(II) intel(0): xf86UnbindGARTMemory: unbind key 5
>(II) intel(0): xf86UnbindGARTMemory: unbind key 6
>(II) intel(0): xf86UnbindGARTMemory: unbind key 7
>(II) intel(0): xf86UnbindGARTMemory: unbind key 8
>FreeFontPath: FPE "/usr/share/fonts/X11/misc" refcount is 2, should be 1; fixing.

Actions: View

Attachments on bug 10808: 9790 | 9791 | 9792 | 11092 | 11359 | 11360 | 11465 | 11466 | 11467

Use of freedesktop.org services, including Bugzilla, is subject to our Code of Conduct. How we collect and use information is described in our Privacy Policy.