Attachment 115643 Details for Bug 78439 – dmesg.txt (higher modes)

dmesg.txt (higher modes)

dmesg1.txt (text/plain), 265.60 KB, created by Andrius Štikonas on 2015-05-08 18:17:56 UTC

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Creator: Andrius Štikonas

Created: 2015-05-08 18:17:56 UTC

Size: 265.60 KB

patch

obsolete

>[    0.000000] Initializing cgroup subsys cpuset
>[    0.000000] Initializing cgroup subsys cpu
>[    0.000000] Initializing cgroup subsys cpuacct
>[    0.000000] Linux version 3.18.11-gentoo-gnu (root@dell) (gcc version 4.8.4 (Gentoo 4.8.4 p1.4, pie-0.6.1) ) #1 SMP Tue Apr 7 14:05:53 EEST 2015
>[    0.000000] Command line: BOOT_IMAGE=/vmlinuz-3.18.11-gentoo-gnu root=/dev/mapper/lvm-root ro rootflags=subvol=root rd.luks.uuid=luks-161c22c0-1741-4711-8a1e-e793cb41e7e8 rd.lvm.lv=lvm/root quiet splash nouveau.debug=PDISP=trace,I2C=trace drm.debug=0xe log_buf_len=1M
>[    0.000000] e820: BIOS-provided physical RAM map:
>[    0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000009d7ff] usable
>[    0.000000] BIOS-e820: [mem 0x000000000009d800-0x000000000009ffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000000e0000-0x00000000000fffff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000000100000-0x000000001fffdfff] usable
>[    0.000000] BIOS-e820: [mem 0x000000001fffe000-0x000000001fffffff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000020000000-0x00000000bbd80fff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000bbd81000-0x00000000bbdcffff] ACPI NVS
>[    0.000000] BIOS-e820: [mem 0x00000000bbdd0000-0x00000000bbddefff] ACPI data
>[    0.000000] BIOS-e820: [mem 0x00000000bbddf000-0x00000000bbdf2fff] ACPI NVS
>[    0.000000] BIOS-e820: [mem 0x00000000bbdf3000-0x00000000bbe19fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000bbe1a000-0x00000000bbe1afff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000bbe1b000-0x00000000bbe22fff] ACPI NVS
>[    0.000000] BIOS-e820: [mem 0x00000000bbe23000-0x00000000bbe26fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000bbe27000-0x00000000bbe2bfff] ACPI NVS
>[    0.000000] BIOS-e820: [mem 0x00000000bbe2c000-0x00000000bbe4cfff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000bbe4d000-0x00000000bbe8ffff] ACPI NVS
>[    0.000000] BIOS-e820: [mem 0x00000000bbe90000-0x00000000bbffffff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000bc000000-0x00000000bf7fffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000e0000000-0x00000000efffffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fed1c000-0x00000000fed1ffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000ff000000-0x00000000ffffffff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000100000000-0x000000023fffffff] usable
>[    0.000000] NX (Execute Disable) protection: active
>[    0.000000] SMBIOS 2.6 present.
>[    0.000000] DMI: Dell Inc. XPS L401X/0KXFG0, BIOS A06 12/22/2010
>[    0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved
>[    0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable
>[    0.000000] AGP: No AGP bridge found
>[    0.000000] e820: last_pfn = 0x240000 max_arch_pfn = 0x400000000
>[    0.000000] MTRR default type: uncachable
>[    0.000000] MTRR fixed ranges enabled:
>[    0.000000]   00000-9FFFF write-back
>[    0.000000]   A0000-BFFFF uncachable
>[    0.000000]   C0000-CFFFF write-protect
>[    0.000000]   D0000-E7FFF uncachable
>[    0.000000]   E8000-FFFFF write-protect
>[    0.000000] MTRR variable ranges enabled:
>[    0.000000]   0 base 000000000 mask E00000000 write-back
>[    0.000000]   1 base 200000000 mask FC0000000 write-back
>[    0.000000]   2 base 0C0000000 mask FC0000000 uncachable
>[    0.000000]   3 disabled
>[    0.000000]   4 disabled
>[    0.000000]   5 disabled
>[    0.000000]   6 disabled
>[    0.000000]   7 disabled
>[    0.000000] x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106
>[    0.000000] e820: update [mem 0xc0000000-0xffffffff] usable ==> reserved
>[    0.000000] e820: last_pfn = 0xbc000 max_arch_pfn = 0x400000000
>[    0.000000] found SMP MP-table at [mem 0x000fce50-0x000fce5f] mapped at [ffff8800000fce50]
>[    0.000000] Scanning 1 areas for low memory corruption
>[    0.000000] Base memory trampoline at [ffff880000097000] 97000 size 24576
>[    0.000000] init_memory_mapping: [mem 0x00000000-0x000fffff]
>[    0.000000]  [mem 0x00000000-0x000fffff] page 4k
>[    0.000000] BRK [0x01f47000, 0x01f47fff] PGTABLE
>[    0.000000] BRK [0x01f48000, 0x01f48fff] PGTABLE
>[    0.000000] BRK [0x01f49000, 0x01f49fff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0x23fe00000-0x23fffffff]
>[    0.000000]  [mem 0x23fe00000-0x23fffffff] page 2M
>[    0.000000] BRK [0x01f4a000, 0x01f4afff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0x23c000000-0x23fdfffff]
>[    0.000000]  [mem 0x23c000000-0x23fdfffff] page 2M
>[    0.000000] init_memory_mapping: [mem 0x200000000-0x23bffffff]
>[    0.000000]  [mem 0x200000000-0x23bffffff] page 2M
>[    0.000000] init_memory_mapping: [mem 0x00100000-0x1fffdfff]
>[    0.000000]  [mem 0x00100000-0x001fffff] page 4k
>[    0.000000]  [mem 0x00200000-0x1fdfffff] page 2M
>[    0.000000]  [mem 0x1fe00000-0x1fffdfff] page 4k
>[    0.000000] init_memory_mapping: [mem 0x20000000-0xbbd80fff]
>[    0.000000]  [mem 0x20000000-0xbbbfffff] page 2M
>[    0.000000]  [mem 0xbbc00000-0xbbd80fff] page 4k
>[    0.000000] BRK [0x01f4b000, 0x01f4bfff] PGTABLE
>[    0.000000] BRK [0x01f4c000, 0x01f4cfff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0xbbe1a000-0xbbe1afff]
>[    0.000000]  [mem 0xbbe1a000-0xbbe1afff] page 4k
>[    0.000000] init_memory_mapping: [mem 0xbbe90000-0xbbffffff]
>[    0.000000]  [mem 0xbbe90000-0xbbffffff] page 4k
>[    0.000000] init_memory_mapping: [mem 0x100000000-0x1ffffffff]
>[    0.000000]  [mem 0x100000000-0x1ffffffff] page 2M
>[    0.000000] log_buf_len: 1048576 bytes
>[    0.000000] early log buf free: 256676(97%)
>[    0.000000] RAMDISK: [mem 0x36ef2000-0x37770fff]
>[    0.000000] ACPI: Early table checksum verification disabled
>[    0.000000] ACPI: RSDP 0x00000000000F0410 000024 (v03 DELL  )
>[    0.000000] ACPI: XSDT 0x00000000BBDD0088 000064 (v01 DELL   EV09     01072009 AMI  00010013)
>[    0.000000] ACPI: FACP 0x00000000BBDDBD18 0000F4 (v04 DELL   EV09     01072009 AMI  00010013)
>[    0.000000] ACPI BIOS Warning (bug): 32/64X FACS address mismatch in FADT: 0xBBE27F40/0x00000000BBE27F80, using 32-bit address (20140926/tbfadt-283)
>[    0.000000] ACPI: DSDT 0x00000000BBDD0180 00BB96 (v02 DELL   EV09     00000001 INTL 20051117)
>[    0.000000] ACPI: FACS 0x00000000BBE27F40 000040
>[    0.000000] ACPI: APIC 0x00000000BBDDBE10 000092 (v01 DELL   EV09     01072009 AMI  00010013)
>[    0.000000] ACPI: SSDT 0x00000000BBDDBEA8 0001D6 (v01 AMICPU PROC     00000001 MSFT 03000001)
>[    0.000000] ACPI: MCFG 0x00000000BBDDC080 00003C (v01 DELL   EV09     01072009 MSFT 00000097)
>[    0.000000] ACPI: SLIC 0x00000000BBDDC0C0 000176 (v01 DELL   EV09     01072009 AMI  00010013)
>[    0.000000] ACPI: HPET 0x00000000BBDDC238 000038 (v01 DELL   EV09     01072009 AMI. 00000003)
>[    0.000000] ACPI: OSFR 0x00000000BBDDC270 000078 (v01 DELL   M11      07DA0C16 ASL  00000061)
>[    0.000000] ACPI: SSDT 0x00000000BBDDC2E8 00275A (v01 NvdRef NvdTabl  00001000 INTL 20051117)
>[    0.000000] ACPI: Local APIC address 0xfee00000
>[    0.000000] No NUMA configuration found
>[    0.000000] Faking a node at [mem 0x0000000000000000-0x000000023fffffff]
>[    0.000000] NODE_DATA(0) allocated [mem 0x23fef5000-0x23fef8fff]
>[    0.000000]  [ffffea0000000000-ffffea0008ffffff] PMD -> [ffff880237600000-ffff88023f5fffff] on node 0
>[    0.000000] Zone ranges:
>[    0.000000]   DMA      [mem 0x00001000-0x00ffffff]
>[    0.000000]   DMA32    [mem 0x01000000-0xffffffff]
>[    0.000000]   Normal   [mem 0x100000000-0x23fffffff]
>[    0.000000] Movable zone start for each node
>[    0.000000] Early memory node ranges
>[    0.000000]   node   0: [mem 0x00001000-0x0009cfff]
>[    0.000000]   node   0: [mem 0x00100000-0x1fffdfff]
>[    0.000000]   node   0: [mem 0x20000000-0xbbd80fff]
>[    0.000000]   node   0: [mem 0xbbe1a000-0xbbe1afff]
>[    0.000000]   node   0: [mem 0xbbe90000-0xbbffffff]
>[    0.000000]   node   0: [mem 0x100000000-0x23fffffff]
>[    0.000000] Initmem setup node 0 [mem 0x00001000-0x23fffffff]
>[    0.000000] On node 0 totalpages: 2080396
>[    0.000000]   DMA zone: 64 pages used for memmap
>[    0.000000]   DMA zone: 21 pages reserved
>[    0.000000]   DMA zone: 3996 pages, LIFO batch:0
>[    0.000000]   DMA32 zone: 11964 pages used for memmap
>[    0.000000]   DMA32 zone: 765680 pages, LIFO batch:31
>[    0.000000]   Normal zone: 20480 pages used for memmap
>[    0.000000]   Normal zone: 1310720 pages, LIFO batch:31
>[    0.000000] ACPI: PM-Timer IO Port: 0x408
>[    0.000000] ACPI: Local APIC address 0xfee00000
>[    0.000000] ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x02] lapic_id[0x02] enabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x03] lapic_id[0x04] enabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x04] lapic_id[0x06] enabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x05] lapic_id[0x01] enabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x06] lapic_id[0x03] enabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x07] lapic_id[0x05] enabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x08] lapic_id[0x07] enabled)
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0xff] high edge lint[0x1])
>[    0.000000] ACPI: IOAPIC (id[0x00] address[0xfec00000] gsi_base[0])
>[    0.000000] IOAPIC[0]: apic_id 0, version 32, address 0xfec00000, GSI 0-23
>[    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
>[    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level)
>[    0.000000] ACPI: IRQ0 used by override.
>[    0.000000] ACPI: IRQ9 used by override.
>[    0.000000] Using ACPI (MADT) for SMP configuration information
>[    0.000000] ACPI: HPET id: 0x8086a701 base: 0xfed00000
>[    0.000000] smpboot: Allowing 8 CPUs, 0 hotplug CPUs
>[    0.000000] PM: Registered nosave memory: [mem 0x00000000-0x00000fff]
>[    0.000000] PM: Registered nosave memory: [mem 0x0009d000-0x0009dfff]
>[    0.000000] PM: Registered nosave memory: [mem 0x0009e000-0x0009ffff]
>[    0.000000] PM: Registered nosave memory: [mem 0x000a0000-0x000dffff]
>[    0.000000] PM: Registered nosave memory: [mem 0x000e0000-0x000fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0x1fffe000-0x1fffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xbbd81000-0xbbdcffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xbbdd0000-0xbbddefff]
>[    0.000000] PM: Registered nosave memory: [mem 0xbbddf000-0xbbdf2fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xbbdf3000-0xbbe19fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xbbe1b000-0xbbe22fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xbbe23000-0xbbe26fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xbbe27000-0xbbe2bfff]
>[    0.000000] PM: Registered nosave memory: [mem 0xbbe2c000-0xbbe4cfff]
>[    0.000000] PM: Registered nosave memory: [mem 0xbbe4d000-0xbbe8ffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xbc000000-0xbf7fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xbf800000-0xdfffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xe0000000-0xefffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xf0000000-0xfed1bfff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed1c000-0xfed1ffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed20000-0xfeffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xff000000-0xffffffff]
>[    0.000000] e820: [mem 0xbf800000-0xdfffffff] available for PCI devices
>[    0.000000] setup_percpu: NR_CPUS:8 nr_cpumask_bits:8 nr_cpu_ids:8 nr_node_ids:1
>[    0.000000] PERCPU: Embedded 28 pages/cpu @ffff88023fc00000 s75648 r8192 d30848 u262144
>[    0.000000] pcpu-alloc: s75648 r8192 d30848 u262144 alloc=1*2097152
>[    0.000000] pcpu-alloc: [0] 0 1 2 3 4 5 6 7 
>[    0.000000] Built 1 zonelists in Node order, mobility grouping on.  Total pages: 2047867
>[    0.000000] Policy zone: Normal
>[    0.000000] Kernel command line: BOOT_IMAGE=/vmlinuz-3.18.11-gentoo-gnu root=/dev/mapper/lvm-root ro rootflags=subvol=root rd.luks.uuid=luks-161c22c0-1741-4711-8a1e-e793cb41e7e8 rd.lvm.lv=lvm/root quiet splash nouveau.debug=PDISP=trace,I2C=trace drm.debug=0xe log_buf_len=1M
>[    0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes)
>[    0.000000] AGP: Checking aperture...
>[    0.000000] AGP: No AGP bridge found
>[    0.000000] Calgary: detecting Calgary via BIOS EBDA area
>[    0.000000] Calgary: Unable to locate Rio Grande table in EBDA - bailing!
>[    0.000000] Memory: 8097888K/8321584K available (6736K kernel code, 898K rwdata, 2988K rodata, 1196K init, 1224K bss, 223696K reserved)
>[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
>[    0.000000] Hierarchical RCU implementation.
>[    0.000000] 	RCU dyntick-idle grace-period acceleration is enabled.
>[    0.000000] NR_IRQS:4352 nr_irqs:488 0
>[    0.000000] Console: colour VGA+ 80x25
>[    0.000000] console [tty0] enabled
>[    0.000000] hpet clockevent registered
>[    0.000000] tsc: Fast TSC calibration using PIT
>[    0.000000] tsc: Detected 1729.054 MHz processor
>[    0.000003] Calibrating delay loop (skipped), value calculated using timer frequency.. 3458.10 BogoMIPS (lpj=17290540)
>[    0.000007] pid_max: default: 32768 minimum: 301
>[    0.000015] ACPI: Core revision 20140926
>[    0.014825] ACPI: All ACPI Tables successfully acquired
>[    0.016934] Security Framework initialized
>[    0.016942] AppArmor: AppArmor initialized
>[    0.017799] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes)
>[    0.020359] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes)
>[    0.021470] Mount-cache hash table entries: 16384 (order: 5, 131072 bytes)
>[    0.021486] Mountpoint-cache hash table entries: 16384 (order: 5, 131072 bytes)
>[    0.021795] Initializing cgroup subsys devices
>[    0.021800] Initializing cgroup subsys freezer
>[    0.021804] Initializing cgroup subsys net_cls
>[    0.021807] Initializing cgroup subsys blkio
>[    0.021833] CPU: Physical Processor ID: 0
>[    0.021835] CPU: Processor Core ID: 0
>[    0.021840] mce: CPU supports 9 MCE banks
>[    0.021855] CPU0: Thermal monitoring enabled (TM1)
>[    0.021869] Last level iTLB entries: 4KB 512, 2MB 7, 4MB 7
>Last level dTLB entries: 4KB 512, 2MB 32, 4MB 32, 1GB 0
>[    0.022015] Freeing SMP alternatives memory: 24K (ffffffff81e0d000 - ffffffff81e13000)
>[    0.022020] ftrace: allocating 26158 entries in 103 pages
>[    0.041187] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
>[    0.141158] smpboot: CPU0: Intel(R) Core(TM) i7 CPU       Q 740  @ 1.73GHz (fam: 06, model: 1e, stepping: 05)
>[    0.256264] Performance Events: PEBS fmt1+, 16-deep LBR, Nehalem events, Intel PMU driver.
>[    0.256289] perf_event_intel: CPU erratum AAJ80 worked around
>[    0.256291] perf_event_intel: CPUID marked event: 'bus cycles' unavailable
>[    0.256294] ... version:                3
>[    0.256296] ... bit width:              48
>[    0.256297] ... generic registers:      4
>[    0.256299] ... value mask:             0000ffffffffffff
>[    0.256301] ... max period:             000000007fffffff
>[    0.256303] ... fixed-purpose events:   3
>[    0.256305] ... event mask:             000000070000000f
>[    0.257791] x86: Booting SMP configuration:
>[    0.257794] .... node  #0, CPUs:      #1 #2 #3 #4 #5 #6 #7
>[    0.351027] x86: Booted up 1 node, 8 CPUs
>[    0.351030] smpboot: Total of 8 processors activated (27664.86 BogoMIPS)
>[    0.356448] devtmpfs: initialized
>[    0.356755] PM: Registering ACPI NVS region [mem 0xbbd81000-0xbbdcffff] (323584 bytes)
>[    0.356764] PM: Registering ACPI NVS region [mem 0xbbddf000-0xbbdf2fff] (81920 bytes)
>[    0.356766] PM: Registering ACPI NVS region [mem 0xbbe1b000-0xbbe22fff] (32768 bytes)
>[    0.356768] PM: Registering ACPI NVS region [mem 0xbbe27000-0xbbe2bfff] (20480 bytes)
>[    0.356770] PM: Registering ACPI NVS region [mem 0xbbe4d000-0xbbe8ffff] (274432 bytes)
>[    0.358124] xor: measuring software checksum speed
>[    0.456153]    prefetch64-sse:  7060.800 MB/sec
>[    0.556108]    generic_sse:  6239.200 MB/sec
>[    0.556110] xor: using function: prefetch64-sse (7060.800 MB/sec)
>[    0.556179] regulator-dummy: no parameters
>[    0.556283] RTC time: 17:33:40, date: 05/08/15
>[    0.556393] NET: Registered protocol family 16
>[    0.586119] cpuidle: using governor ladder
>[    0.610820] cpuidle: using governor menu
>[    0.610954] ACPI: bus type PCI registered
>[    0.611049] PCI: MMCONFIG for domain 0000 [bus 00-ff] at [mem 0xe0000000-0xefffffff] (base 0xe0000000)
>[    0.611052] PCI: MMCONFIG at [mem 0xe0000000-0xefffffff] reserved in E820
>[    0.611378] PCI: Using configuration type 1 for base access
>[    0.796044] raid6: sse2x1    4268 MB/s
>[    0.965974] raid6: sse2x2    5016 MB/s
>[    1.135888] raid6: sse2x4    5609 MB/s
>[    1.135890] raid6: using algorithm sse2x4 (5609 MB/s)
>[    1.135892] raid6: using ssse3x2 recovery algorithm
>[    1.135963] ACPI: Added _OSI(Module Device)
>[    1.135966] ACPI: Added _OSI(Processor Device)
>[    1.135967] ACPI: Added _OSI(3.0 _SCP Extensions)
>[    1.135969] ACPI: Added _OSI(Processor Aggregator Device)
>[    1.140078] ACPI: Executed 1 blocks of module-level executable AML code
>[    1.166858] [Firmware Bug]: ACPI: BIOS _OSI(Linux) query ignored
>[    1.191326] ACPI: Dynamic OEM Table Load:
>[    1.191335] ACPI: SSDT 0xFFFF880235DC0000 0007F4 (v01 AMI    IST      00000001 MSFT 03000001)
>[    1.192195] ACPI: Dynamic OEM Table Load:
>[    1.192198] ACPI BIOS Warning (bug): Incorrect checksum in table [SSDT] - 0x3F, should be 0x91 (20140926/tbprint-218)
>[    1.192204] ACPI: SSDT 0xFFFF880235CF4800 0000E4 (v01 AMI    CST      00000001 MSFT 03000001)
>[    1.194051] ACPI: Interpreter enabled
>[    1.194064] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S2_] (20140926/hwxface-580)
>[    1.194082] ACPI: (supports S0 S1 S3 S4 S5)
>[    1.194084] ACPI: Using IOAPIC for interrupt routing
>[    1.194123] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
>[    1.210682] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff])
>[    1.210690] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI]
>[    1.210883] acpi PNP0A08:00: _OSC: platform does not support [PME]
>[    1.211056] acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug AER PCIeCapability]
>[    1.211253] PCI host bridge to bus 0000:00
>[    1.211257] pci_bus 0000:00: root bus resource [bus 00-ff]
>[    1.211259] pci_bus 0000:00: root bus resource [io  0x0000-0x0cf7]
>[    1.211262] pci_bus 0000:00: root bus resource [io  0x0d00-0xffff]
>[    1.211264] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff]
>[    1.211267] pci_bus 0000:00: root bus resource [mem 0xc0000000-0xffffffff]
>[    1.211278] pci 0000:00:00.0: [8086:d132] type 00 class 0x060000
>[    1.211422] pci 0000:00:03.0: [8086:d138] type 01 class 0x060400
>[    1.211488] pci 0000:00:03.0: PME# supported from D0 D3hot D3cold
>[    1.211547] pci 0000:00:03.0: System wakeup disabled by ACPI
>[    1.211600] pci 0000:00:08.0: [8086:d155] type 00 class 0x088000
>[    1.211730] pci 0000:00:08.1: [8086:d156] type 00 class 0x088000
>[    1.211860] pci 0000:00:08.2: [8086:d157] type 00 class 0x088000
>[    1.211986] pci 0000:00:08.3: [8086:d158] type 00 class 0x088000
>[    1.212113] pci 0000:00:10.0: [8086:d150] type 00 class 0x088000
>[    1.212224] pci 0000:00:10.1: [8086:d151] type 00 class 0x088000
>[    1.212364] pci 0000:00:16.0: [8086:3b64] type 00 class 0x078000
>[    1.212405] pci 0000:00:16.0: reg 0x10: [mem 0xfbd09000-0xfbd0900f 64bit]
>[    1.212511] pci 0000:00:16.0: PME# supported from D0 D3hot D3cold
>[    1.212640] pci 0000:00:1a.0: [8086:3b3c] type 00 class 0x0c0320
>[    1.212671] pci 0000:00:1a.0: reg 0x10: [mem 0xfbd08000-0xfbd083ff]
>[    1.212781] pci 0000:00:1a.0: PME# supported from D0 D3hot D3cold
>[    1.212844] pci 0000:00:1a.0: System wakeup disabled by ACPI
>[    1.212907] pci 0000:00:1b.0: [8086:3b56] type 00 class 0x040300
>[    1.212929] pci 0000:00:1b.0: reg 0x10: [mem 0xfbd00000-0xfbd03fff 64bit]
>[    1.213020] pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold
>[    1.213132] pci 0000:00:1c.0: [8086:3b42] type 01 class 0x060400
>[    1.213226] pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold
>[    1.213290] pci 0000:00:1c.0: System wakeup disabled by ACPI
>[    1.213347] pci 0000:00:1c.1: [8086:3b44] type 01 class 0x060400
>[    1.213441] pci 0000:00:1c.1: PME# supported from D0 D3hot D3cold
>[    1.213504] pci 0000:00:1c.1: System wakeup disabled by ACPI
>[    1.213567] pci 0000:00:1c.3: [8086:3b48] type 01 class 0x060400
>[    1.213661] pci 0000:00:1c.3: PME# supported from D0 D3hot D3cold
>[    1.213724] pci 0000:00:1c.3: System wakeup disabled by ACPI
>[    1.213789] pci 0000:00:1c.5: [8086:3b4c] type 01 class 0x060400
>[    1.213882] pci 0000:00:1c.5: PME# supported from D0 D3hot D3cold
>[    1.213946] pci 0000:00:1c.5: System wakeup disabled by ACPI
>[    1.214010] pci 0000:00:1d.0: [8086:3b34] type 00 class 0x0c0320
>[    1.214042] pci 0000:00:1d.0: reg 0x10: [mem 0xfbd07000-0xfbd073ff]
>[    1.214152] pci 0000:00:1d.0: PME# supported from D0 D3hot D3cold
>[    1.214216] pci 0000:00:1d.0: System wakeup disabled by ACPI
>[    1.214269] pci 0000:00:1e.0: [8086:2448] type 01 class 0x060401
>[    1.214385] pci 0000:00:1e.0: System wakeup disabled by ACPI
>[    1.214448] pci 0000:00:1f.0: [8086:3b0b] type 00 class 0x060100
>[    1.214677] pci 0000:00:1f.2: [8086:3b2f] type 00 class 0x010601
>[    1.214702] pci 0000:00:1f.2: reg 0x10: [io  0xf070-0xf077]
>[    1.214715] pci 0000:00:1f.2: reg 0x14: [io  0xf060-0xf063]
>[    1.214728] pci 0000:00:1f.2: reg 0x18: [io  0xf050-0xf057]
>[    1.214741] pci 0000:00:1f.2: reg 0x1c: [io  0xf040-0xf043]
>[    1.214754] pci 0000:00:1f.2: reg 0x20: [io  0xf020-0xf03f]
>[    1.214767] pci 0000:00:1f.2: reg 0x24: [mem 0xfbd06000-0xfbd067ff]
>[    1.214833] pci 0000:00:1f.2: PME# supported from D3hot
>[    1.214944] pci 0000:00:1f.3: [8086:3b30] type 00 class 0x0c0500
>[    1.214970] pci 0000:00:1f.3: reg 0x10: [mem 0xfbd05000-0xfbd050ff 64bit]
>[    1.214997] pci 0000:00:1f.3: reg 0x20: [io  0xf000-0xf01f]
>[    1.215181] pci 0000:02:00.0: [10de:0df0] type 00 class 0x030000
>[    1.215194] pci 0000:02:00.0: reg 0x10: [mem 0xfa000000-0xfaffffff]
>[    1.215206] pci 0000:02:00.0: reg 0x14: [mem 0xc0000000-0xcfffffff 64bit pref]
>[    1.215217] pci 0000:02:00.0: reg 0x1c: [mem 0xd0000000-0xd1ffffff 64bit pref]
>[    1.215225] pci 0000:02:00.0: reg 0x24: [io  0xe000-0xe07f]
>[    1.215234] pci 0000:02:00.0: reg 0x30: [mem 0xfb000000-0xfb07ffff pref]
>[    1.215341] pci 0000:02:00.1: [10de:0bea] type 00 class 0x040300
>[    1.215353] pci 0000:02:00.1: reg 0x10: [mem 0xfb080000-0xfb083fff]
>[    1.227347] pci 0000:00:03.0: PCI bridge to [bus 02]
>[    1.227355] pci 0000:00:03.0:   bridge window [io  0xe000-0xefff]
>[    1.227362] pci 0000:00:03.0:   bridge window [mem 0xfa000000-0xfb0fffff]
>[    1.227370] pci 0000:00:03.0:   bridge window [mem 0xc0000000-0xd1ffffff 64bit pref]
>[    1.227544] pci 0000:11:00.0: [168c:1014] type 00 class 0x020000
>[    1.227599] pci 0000:11:00.0: reg 0x10: [mem 0xfbc00000-0xfbc0ffff 64bit]
>[    1.228032] pci 0000:11:00.0: disabling ASPM on pre-1.1 PCIe device.  You can enable it with 'pcie_aspm=force'
>[    1.228057] pci 0000:00:1c.0: PCI bridge to [bus 11]
>[    1.228067] pci 0000:00:1c.0:   bridge window [mem 0xfbc00000-0xfbcfffff]
>[    1.228146] pci 0000:00:1c.1: PCI bridge to [bus 12]
>[    1.228299] pci 0000:14:00.0: [197b:2392] type 00 class 0x088000
>[    1.228385] pci 0000:14:00.0: reg 0x10: [mem 0xfb203000-0xfb2030ff]
>[    1.229170] pci 0000:14:00.2: [197b:2391] type 00 class 0x080501
>[    1.229257] pci 0000:14:00.2: reg 0x10: [mem 0xfb202000-0xfb2020ff]
>[    1.230048] pci 0000:14:00.3: [197b:2393] type 00 class 0x088000
>[    1.230136] pci 0000:14:00.3: reg 0x10: [mem 0xfb201000-0xfb2010ff]
>[    1.230874] pci 0000:14:00.4: [197b:2394] type 00 class 0x088000
>[    1.230958] pci 0000:14:00.4: reg 0x10: [mem 0xfb200000-0xfb2000ff]
>[    1.231890] pci 0000:00:1c.3: PCI bridge to [bus 14]
>[    1.231899] pci 0000:00:1c.3:   bridge window [io  0xd000-0xdfff]
>[    1.231908] pci 0000:00:1c.3:   bridge window [mem 0xfb200000-0xfbbfffff]
>[    1.231918] pci 0000:00:1c.3:   bridge window [mem 0xd2100000-0xd2afffff 64bit pref]
>[    1.232022] pci 0000:16:00.0: [10ec:8168] type 00 class 0x020000
>[    1.232120] pci 0000:16:00.0: reg 0x10: [io  0xc000-0xc0ff]
>[    1.232155] pci 0000:16:00.0: reg 0x18: [mem 0xd2c04000-0xd2c04fff 64bit pref]
>[    1.232178] pci 0000:16:00.0: reg 0x20: [mem 0xd2c00000-0xd2c03fff 64bit pref]
>[    1.232564] pci 0000:16:00.0: supports D1 D2
>[    1.232566] pci 0000:16:00.0: PME# supported from D0 D1 D2 D3hot D3cold
>[    1.232761] pci 0000:00:1c.5: PCI bridge to [bus 16]
>[    1.232769] pci 0000:00:1c.5:   bridge window [io  0xc000-0xcfff]
>[    1.232782] pci 0000:00:1c.5:   bridge window [mem 0xd2c00000-0xd2cfffff 64bit pref]
>[    1.232869] pci 0000:00:1e.0: PCI bridge to [bus 20] (subtractive decode)
>[    1.232884] pci 0000:00:1e.0:   bridge window [io  0x0000-0x0cf7] (subtractive decode)
>[    1.232886] pci 0000:00:1e.0:   bridge window [io  0x0d00-0xffff] (subtractive decode)
>[    1.232889] pci 0000:00:1e.0:   bridge window [mem 0x000a0000-0x000bffff] (subtractive decode)
>[    1.232891] pci 0000:00:1e.0:   bridge window [mem 0xc0000000-0xffffffff] (subtractive decode)
>[    1.233709] ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 7 10 *11 12 14 15)
>[    1.233797] ACPI: PCI Interrupt Link [LNKB] (IRQs 3 4 5 6 7 *10 11 12 14 15)
>[    1.233880] ACPI: PCI Interrupt Link [LNKC] (IRQs 3 *4 5 6 10 11 12 14 15)
>[    1.233959] ACPI: PCI Interrupt Link [LNKD] (IRQs *3 4 5 6 10 11 12 14 15)
>[    1.234042] ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 7 10 11 12 14 15) *0
>[    1.234125] ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 7 10 11 12 14 15) *0
>[    1.234209] ACPI: PCI Interrupt Link [LNKG] (IRQs 3 4 *5 6 7 10 11 12 14 15)
>[    1.234290] ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 *7 10 11 12 14 15)
>[    1.235972] ACPI: Enabled 4 GPEs in block 00 to 3F
>[    1.236066] ACPI : EC: GPE = 0x17, I/O: command/status = 0x66, data = 0x62
>[    1.236162] vgaarb: setting as boot device: PCI:0000:02:00.0
>[    1.236164] vgaarb: device added: PCI:0000:02:00.0,decodes=io+mem,owns=io+mem,locks=none
>[    1.236167] vgaarb: loaded
>[    1.236169] vgaarb: bridge control possible 0000:02:00.0
>[    1.236305] SCSI subsystem initialized
>[    1.236358] libata version 3.00 loaded.
>[    1.236397] ACPI: bus type USB registered
>[    1.236420] usbcore: registered new interface driver usbfs
>[    1.236431] usbcore: registered new interface driver hub
>[    1.236461] usbcore: registered new device driver usb
>[    1.236941] wmi: Mapper loaded
>[    1.236952] PCI: Using ACPI for IRQ routing
>[    1.243672] PCI: Discovered peer bus ff
>[    1.243674] PCI: root bus ff: using default resources
>[    1.243675] PCI: Probing PCI hardware (bus ff)
>[    1.243705] PCI host bridge to bus 0000:ff
>[    1.243709] pci_bus 0000:ff: root bus resource [io  0x0000-0xffff]
>[    1.243711] pci_bus 0000:ff: root bus resource [mem 0x00000000-0xfffffffff]
>[    1.243714] pci_bus 0000:ff: No busn resource found for root bus, will use [bus ff-ff]
>[    1.243717] pci_bus 0000:ff: busn_res: can not insert [bus ff] under domain [bus 00-ff] (conflicts with (null) [bus 00-ff])
>[    1.243724] pci 0000:ff:00.0: [8086:2c52] type 00 class 0x060000
>[    1.243782] pci 0000:ff:00.1: [8086:2c81] type 00 class 0x060000
>[    1.243838] pci 0000:ff:02.0: [8086:2c90] type 00 class 0x060000
>[    1.243891] pci 0000:ff:02.1: [8086:2c91] type 00 class 0x060000
>[    1.243946] pci 0000:ff:03.0: [8086:2c98] type 00 class 0x060000
>[    1.243999] pci 0000:ff:03.1: [8086:2c99] type 00 class 0x060000
>[    1.244053] pci 0000:ff:03.4: [8086:2c9c] type 00 class 0x060000
>[    1.244108] pci 0000:ff:04.0: [8086:2ca0] type 00 class 0x060000
>[    1.244163] pci 0000:ff:04.1: [8086:2ca1] type 00 class 0x060000
>[    1.244216] pci 0000:ff:04.2: [8086:2ca2] type 00 class 0x060000
>[    1.244267] pci 0000:ff:04.3: [8086:2ca3] type 00 class 0x060000
>[    1.244322] pci 0000:ff:05.0: [8086:2ca8] type 00 class 0x060000
>[    1.244375] pci 0000:ff:05.1: [8086:2ca9] type 00 class 0x060000
>[    1.244428] pci 0000:ff:05.2: [8086:2caa] type 00 class 0x060000
>[    1.244481] pci 0000:ff:05.3: [8086:2cab] type 00 class 0x060000
>[    1.244552] pci_bus 0000:ff: busn_res: [bus ff] end is updated to ff
>[    1.244555] pci_bus 0000:ff: busn_res: can not insert [bus ff] under domain [bus 00-ff] (conflicts with (null) [bus 00-ff])
>[    1.244560] PCI: pci_cache_line_size set to 64 bytes
>[    1.244746] e820: reserve RAM buffer [mem 0x0009d800-0x0009ffff]
>[    1.244748] e820: reserve RAM buffer [mem 0x1fffe000-0x1fffffff]
>[    1.244750] e820: reserve RAM buffer [mem 0xbbd81000-0xbbffffff]
>[    1.244753] e820: reserve RAM buffer [mem 0xbbe1b000-0xbbffffff]
>[    1.244883] NetLabel: Initializing
>[    1.244885] NetLabel:  domain hash size = 128
>[    1.244886] NetLabel:  protocols = UNLABELED CIPSOv4
>[    1.244903] NetLabel:  unlabeled traffic allowed by default
>[    1.245053] HPET: 8 timers in total, 5 timers will be used for per-cpu timer
>[    1.245062] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 24, 25, 26, 27, 28, 0
>[    1.245069] hpet0: 8 comparators, 64-bit 14.318180 MHz counter
>[    1.247123] hpet: hpet2 irq 24 for MSI
>[    1.247187] hpet: hpet3 irq 25 for MSI
>[    1.247250] hpet: hpet4 irq 26 for MSI
>[    1.247310] hpet: hpet5 irq 27 for MSI
>[    1.247379] hpet: hpet6 irq 28 for MSI
>[    1.247526] Switched to clocksource hpet
>[    1.253675] AppArmor: AppArmor Filesystem Enabled
>[    1.256242] pnp: PnP ACPI init
>[    1.256387] system 00:00: [mem 0xfed14000-0xfed19fff] has been reserved
>[    1.256391] system 00:00: [mem 0xe0000000-0xefffffff] has been reserved
>[    1.256394] system 00:00: [mem 0xfed90000-0xfed93fff] has been reserved
>[    1.256397] system 00:00: [mem 0xfed20000-0xfed3ffff] has been reserved
>[    1.256399] system 00:00: [mem 0xfee00000-0xfee0ffff] has been reserved
>[    1.256403] system 00:00: Plug and Play ACPI device, IDs PNP0c01 (active)
>[    1.256589] pnp 00:01: Plug and Play ACPI device, IDs PNP0b00 (active)
>[    1.256663] system 00:02: [io  0x04d0-0x04d1] has been reserved
>[    1.256667] system 00:02: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    1.256727] pnp 00:03: Plug and Play ACPI device, IDs PNP0303 PNP030b (active)
>[    1.256792] pnp 00:04: Plug and Play ACPI device, IDs DLL0468 PNP0f13 (active)
>[    1.257006] system 00:05: [io  0x0400-0x047f] could not be reserved
>[    1.257009] system 00:05: [io  0x1180-0x119f] has been reserved
>[    1.257012] system 00:05: [io  0x0500-0x057f] has been reserved
>[    1.257015] system 00:05: [mem 0xfed1c000-0xfed1ffff] has been reserved
>[    1.257018] system 00:05: [mem 0xfec00000-0xfecfffff] could not be reserved
>[    1.257021] system 00:05: [mem 0xfed08000-0xfed08fff] has been reserved
>[    1.257024] system 00:05: [mem 0xff000000-0xffffffff] has been reserved
>[    1.257028] system 00:05: Plug and Play ACPI device, IDs PNP0c01 (active)
>[    1.259940] pnp: PnP ACPI: found 6 devices
>[    1.264588] pci 0000:00:03.0: PCI bridge to [bus 02]
>[    1.264593] pci 0000:00:03.0:   bridge window [io  0xe000-0xefff]
>[    1.264598] pci 0000:00:03.0:   bridge window [mem 0xfa000000-0xfb0fffff]
>[    1.264602] pci 0000:00:03.0:   bridge window [mem 0xc0000000-0xd1ffffff 64bit pref]
>[    1.264607] pci 0000:00:1c.0: PCI bridge to [bus 11]
>[    1.264613] pci 0000:00:1c.0:   bridge window [mem 0xfbc00000-0xfbcfffff]
>[    1.264626] pci 0000:00:1c.1: PCI bridge to [bus 12]
>[    1.264641] pci 0000:00:1c.3: PCI bridge to [bus 14]
>[    1.264649] pci 0000:00:1c.3:   bridge window [io  0xd000-0xdfff]
>[    1.264658] pci 0000:00:1c.3:   bridge window [mem 0xfb200000-0xfbbfffff]
>[    1.264667] pci 0000:00:1c.3:   bridge window [mem 0xd2100000-0xd2afffff 64bit pref]
>[    1.264677] pci 0000:00:1c.5: PCI bridge to [bus 16]
>[    1.264685] pci 0000:00:1c.5:   bridge window [io  0xc000-0xcfff]
>[    1.264695] pci 0000:00:1c.5:   bridge window [mem 0xd2c00000-0xd2cfffff 64bit pref]
>[    1.264705] pci 0000:00:1e.0: PCI bridge to [bus 20]
>[    1.264721] pci_bus 0000:00: resource 4 [io  0x0000-0x0cf7]
>[    1.264724] pci_bus 0000:00: resource 5 [io  0x0d00-0xffff]
>[    1.264726] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff]
>[    1.264729] pci_bus 0000:00: resource 7 [mem 0xc0000000-0xffffffff]
>[    1.264731] pci_bus 0000:02: resource 0 [io  0xe000-0xefff]
>[    1.264733] pci_bus 0000:02: resource 1 [mem 0xfa000000-0xfb0fffff]
>[    1.264736] pci_bus 0000:02: resource 2 [mem 0xc0000000-0xd1ffffff 64bit pref]
>[    1.264739] pci_bus 0000:11: resource 1 [mem 0xfbc00000-0xfbcfffff]
>[    1.264741] pci_bus 0000:14: resource 0 [io  0xd000-0xdfff]
>[    1.264743] pci_bus 0000:14: resource 1 [mem 0xfb200000-0xfbbfffff]
>[    1.264746] pci_bus 0000:14: resource 2 [mem 0xd2100000-0xd2afffff 64bit pref]
>[    1.264748] pci_bus 0000:16: resource 0 [io  0xc000-0xcfff]
>[    1.264751] pci_bus 0000:16: resource 2 [mem 0xd2c00000-0xd2cfffff 64bit pref]
>[    1.264754] pci_bus 0000:20: resource 4 [io  0x0000-0x0cf7]
>[    1.264756] pci_bus 0000:20: resource 5 [io  0x0d00-0xffff]
>[    1.264758] pci_bus 0000:20: resource 6 [mem 0x000a0000-0x000bffff]
>[    1.264761] pci_bus 0000:20: resource 7 [mem 0xc0000000-0xffffffff]
>[    1.264764] pci_bus 0000:ff: resource 4 [io  0x0000-0xffff]
>[    1.264767] pci_bus 0000:ff: resource 5 [mem 0x00000000-0xfffffffff]
>[    1.264801] NET: Registered protocol family 2
>[    1.265052] TCP established hash table entries: 65536 (order: 7, 524288 bytes)
>[    1.265369] TCP bind hash table entries: 65536 (order: 8, 1048576 bytes)
>[    1.265797] TCP: Hash tables configured (established 65536 bind 65536)
>[    1.265822] TCP: reno registered
>[    1.265836] UDP hash table entries: 4096 (order: 5, 131072 bytes)
>[    1.265925] UDP-Lite hash table entries: 4096 (order: 5, 131072 bytes)
>[    1.266054] NET: Registered protocol family 1
>[    1.307700] pci 0000:02:00.0: Video device with shadowed ROM
>[    1.307718] PCI: CLS mismatch (64 != 32), using 64 bytes
>[    1.307792] Trying to unpack rootfs image as initramfs...
>[    2.749585] Freeing initrd memory: 8700K (ffff880036ef2000 - ffff880037771000)
>[    2.749596] PCI-DMA: Using software bounce buffering for IO (SWIOTLB)
>[    2.749599] software IO TLB [mem 0xb7d81000-0xbbd81000] (64MB) mapped at [ffff8800b7d81000-ffff8800bbd80fff]
>[    2.750136] Scanning for low memory corruption every 60 seconds
>[    2.750607] futex hash table entries: 2048 (order: 5, 131072 bytes)
>[    2.750649] audit: initializing netlink subsys (disabled)
>[    2.750664] audit: type=2000 audit(1431106422.640:1): initialized
>[    2.751002] HugeTLB registered 2 MB page size, pre-allocated 0 pages
>[    2.753228] VFS: Disk quotas dquot_6.5.2
>[    2.753277] Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
>[    2.753400] fuse init (API version 7.23)
>[    2.753512] msgmni has been set to 15833
>[    2.753921] NET: Registered protocol family 38
>[    2.753947] bounce: pool size: 64 pages
>[    2.753988] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252)
>[    2.753992] io scheduler noop registered
>[    2.753995] io scheduler deadline registered
>[    2.754035] io scheduler cfq registered (default)
>[    2.754279] pcieport 0000:00:03.0: irq 29 for MSI/MSI-X
>[    2.754732] pcieport 0000:00:1c.3: irq 30 for MSI/MSI-X
>[    2.754982] aer 0000:00:03.0:pcie02: service driver aer loaded
>[    2.755011] pci_hotplug: PCI Hot Plug PCI Core version: 0.5
>[    2.755078] pciehp 0000:00:1c.3:pcie04: Slot #3 AttnBtn- AttnInd- PwrInd- PwrCtrl- MRL- Interlock- NoCompl+ LLActRep+
>[    2.755147] pciehp 0000:00:1c.3:pcie04: service driver pciehp loaded
>[    2.755154] pciehp: PCI Express Hot Plug Controller Driver version: 0.4
>[    2.755211] Serial: 8250/16550 driver, 32 ports, IRQ sharing enabled
>[    2.757264] Linux agpgart interface v0.103
>[    2.757363] intel_idle: MWAIT substates: 0x1120
>[    2.757378] intel_idle: v0.4 model 0x1E
>[    2.757380] intel_idle: lapic_timer_reliable_states 0x2
>[    2.976872] ACPI: AC Adapter [ADP1] (on-line)
>[    2.977081] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input0
>[    2.977089] ACPI: Power Button [PWRB]
>[    2.977182] input: Lid Switch as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0D:00/input/input1
>[    2.979998] ACPI: Lid Switch [LID0]
>[    2.980094] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input2
>[    2.980100] ACPI: Power Button [PWRF]
>[    2.987923] brd: module loaded
>[    2.990646] loop: module loaded
>[    2.990966] ahci 0000:00:1f.2: version 3.0
>[    2.991271] ahci 0000:00:1f.2: irq 31 for MSI/MSI-X
>[    2.991333] ahci 0000:00:1f.2: SSS flag set, parallel bus scan disabled
>[    2.991386] ahci 0000:00:1f.2: AHCI 0001.0300 32 slots 6 ports 3 Gbps 0x13 impl SATA mode
>[    2.991394] ahci 0000:00:1f.2: flags: 64bit ncq sntf ilck stag pm led clo pmp pio slum part ems apst 
>[    3.010404] ACPI: Battery Slot [BAT1] (battery present)
>[    3.028087] scsi host0: ahci
>[    3.028535] scsi host1: ahci
>[    3.028893] scsi host2: ahci
>[    3.029282] scsi host3: ahci
>[    3.029636] scsi host4: ahci
>[    3.029999] scsi host5: ahci
>[    3.030116] ata1: SATA max UDMA/133 abar m2048@0xfbd06000 port 0xfbd06100 irq 31
>[    3.030126] ata2: SATA max UDMA/133 abar m2048@0xfbd06000 port 0xfbd06180 irq 31
>[    3.030129] ata3: DUMMY
>[    3.030131] ata4: DUMMY
>[    3.030139] ata5: SATA max UDMA/133 abar m2048@0xfbd06000 port 0xfbd06300 irq 31
>[    3.030142] ata6: DUMMY
>[    3.031048] libphy: Fixed MDIO Bus: probed
>[    3.031112] tun: Universal TUN/TAP device driver, 1.6
>[    3.031115] tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com>
>[    3.031231] PPP generic driver version 2.4.2
>[    3.031409] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
>[    3.031415] ehci-pci: EHCI PCI platform driver
>[    3.031683] ehci-pci 0000:00:1a.0: EHCI Host Controller
>[    3.031772] ehci-pci 0000:00:1a.0: new USB bus registered, assigned bus number 1
>[    3.031817] ehci-pci 0000:00:1a.0: debug port 2
>[    3.035805] ehci-pci 0000:00:1a.0: cache line size of 64 is not supported
>[    3.035832] ehci-pci 0000:00:1a.0: irq 16, io mem 0xfbd08000
>[    3.046924] ehci-pci 0000:00:1a.0: USB 2.0 started, EHCI 1.00
>[    3.047223] hub 1-0:1.0: USB hub found
>[    3.047238] hub 1-0:1.0: 2 ports detected
>[    3.047711] ehci-pci 0000:00:1d.0: EHCI Host Controller
>[    3.047817] ehci-pci 0000:00:1d.0: new USB bus registered, assigned bus number 2
>[    3.047860] ehci-pci 0000:00:1d.0: debug port 2
>[    3.051861] ehci-pci 0000:00:1d.0: cache line size of 64 is not supported
>[    3.051883] ehci-pci 0000:00:1d.0: irq 23, io mem 0xfbd07000
>[    3.066807] ehci-pci 0000:00:1d.0: USB 2.0 started, EHCI 1.00
>[    3.067180] hub 2-0:1.0: USB hub found
>[    3.067193] hub 2-0:1.0: 2 ports detected
>[    3.067454] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
>[    3.067466] ohci-pci: OHCI PCI platform driver
>[    3.067495] uhci_hcd: USB Universal Host Controller Interface driver
>[    3.067594] i8042: PNP: PS/2 Controller [PNP0303:PS2K,PNP0f13:PS2M] at 0x60,0x64 irq 1,12
>[    3.075455] i8042: Detected active multiplexing controller, rev 1.1
>[    3.078087] serio: i8042 KBD port at 0x60,0x64 irq 1
>[    3.078093] serio: i8042 AUX0 port at 0x60,0x64 irq 12
>[    3.078133] serio: i8042 AUX1 port at 0x60,0x64 irq 12
>[    3.078181] serio: i8042 AUX2 port at 0x60,0x64 irq 12
>[    3.078233] serio: i8042 AUX3 port at 0x60,0x64 irq 12
>[    3.078866] mousedev: PS/2 mouse device common for all mice
>[    3.080044] rtc_cmos 00:01: RTC can wake from S4
>[    3.080659] rtc_cmos 00:01: rtc core: registered rtc_cmos as rtc0
>[    3.080749] rtc_cmos 00:01: alarms up to one month, y3k, 114 bytes nvram, hpet irqs
>[    3.080904] device-mapper: uevent: version 1.0.3
>[    3.081166] device-mapper: ioctl: 4.28.0-ioctl (2014-09-17) initialised: dm-devel@redhat.com
>[    3.081970] device-mapper: multipath: version 1.7.0 loaded
>[    3.081988] device-mapper: multipath round-robin: version 1.0.0 loaded
>[    3.082090] hidraw: raw HID events driver (C) Jiri Kosina
>[    3.082162] usbcore: registered new interface driver usbhid
>[    3.082165] usbhid: USB HID core driver
>[    3.082324] TCP: cubic registered
>[    3.082565] NET: Registered protocol family 10
>[    3.083167] NET: Registered protocol family 17
>[    3.083217] Key type dns_resolver registered
>[    3.084655] registered taskstats version 1
>[    3.085788] Btrfs loaded
>[    3.085828] AppArmor: AppArmor sha1 policy hashing enabled
>[    3.088564]   Magic number: 15:426:592
>[    3.088871] rtc_cmos 00:01: setting system clock to 2015-05-08 17:33:43 UTC (1431106423)
>[    3.239427] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input3
>[    3.262505] atkbd serio0: Unknown key released (translated set 2, code 0x7c on isa0060/serio0).
>[    3.262513] atkbd serio0: Use 'setkeycodes 7c <keycode>' to make it known.
>[    3.273634] BIOS EDD facility v0.16 2004-Jun-25, 0 devices found
>[    3.273636] EDD information not available.
>[    3.273698] PM: Checking hibernation image partition /dev/sda2
>[    3.366881] usb 1-1: new high-speed USB device number 2 using ehci-pci
>[    3.386878] usb 2-1: new high-speed USB device number 2 using ehci-pci
>[    3.462899] atkbd serio0: Unknown key released (translated set 2, code 0x7c on isa0060/serio0).
>[    3.462906] atkbd serio0: Use 'setkeycodes 7c <keycode>' to make it known.
>[    3.518299] hub 1-1:1.0: USB hub found
>[    3.518611] hub 1-1:1.0: 6 ports detected
>[    3.538299] hub 2-1:1.0: USB hub found
>[    3.538612] hub 2-1:1.0: 8 ports detected
>[    3.576694] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
>[    3.578849] ata1.00: ACPI cmd 00/00:00:00:00:00:a0 (NOP) rejected by device (Stat=0x51 Err=0x04)
>[    3.579259] ata1.00: ATA-8: WDC WD5000BEKT-75KA9T0, 01.01A01, max UDMA/133
>[    3.579266] ata1.00: 976773168 sectors, multi 16: LBA48 NCQ (depth 31/32), AA
>[    3.581579] ata1.00: ACPI cmd 00/00:00:00:00:00:a0 (NOP) rejected by device (Stat=0x51 Err=0x04)
>[    3.581975] ata1.00: configured for UDMA/133
>[    3.582505] scsi 0:0:0:0: Direct-Access     ATA      WDC WD5000BEKT-7 1A01 PQ: 0 ANSI: 5
>[    3.583276] sd 0:0:0:0: Attached scsi generic sg0 type 0
>[    3.583439] sd 0:0:0:0: [sda] 976773168 512-byte logical blocks: (500 GB/465 GiB)
>[    3.584103] sd 0:0:0:0: [sda] Write Protect is off
>[    3.584112] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
>[    3.584450] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
>[    3.662857] atkbd serio0: Unknown key released (translated set 2, code 0x7c on isa0060/serio0).
>[    3.662860] atkbd serio0: Use 'setkeycodes 7c <keycode>' to make it known.
>[    3.680473]  sda: sda1 sda2 sda3
>[    3.681314] sd 0:0:0:0: [sda] Attached SCSI disk
>[    3.746717] tsc: Refined TSC clocksource calibration: 1729.000 MHz
>[    3.797000] usb 1-1.4: new high-speed USB device number 3 using ehci-pci
>[    3.817104] usb 2-1.3: new high-speed USB device number 3 using ehci-pci
>[    3.862531] atkbd serio0: Unknown key released (translated set 2, code 0x7c on isa0060/serio0).
>[    3.862539] atkbd serio0: Use 'setkeycodes 7c <keycode>' to make it known.
>[    3.930954] hub 2-1.3:1.0: USB hub found
>[    3.931219] hub 2-1.3:1.0: 4 ports detected
>[    4.016920] usb 2-1.4: new full-speed USB device number 4 using ehci-pci
>[    4.126511] ata2: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
>[    4.135460] input: Logitech USB Receiver as /devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.4/2-1.4:1.0/0003:046D:C52B.0001/input/input8
>[    4.135860] hid-generic 0003:046D:C52B.0001: input,hidraw0: USB HID v1.11 Keyboard [Logitech USB Receiver] on usb-0000:00:1d.0-1.4/input0
>[    4.139831] input: Logitech USB Receiver as /devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.4/2-1.4:1.1/0003:046D:C52B.0002/input/input9
>[    4.140596] ata2.00: ATAPI: TSSTcorp DVD+/-RW TS-U633F, D500, max UDMA/100
>[    4.140605] ata2.00: applying bridge limits
>[    4.140946] hid-generic 0003:046D:C52B.0002: input,hiddev0,hidraw1: USB HID v1.11 Mouse [Logitech USB Receiver] on usb-0000:00:1d.0-1.4/input1
>[    4.147019] hid-generic 0003:046D:C52B.0003: hiddev0,hidraw2: USB HID v1.11 Device [Logitech USB Receiver] on usb-0000:00:1d.0-1.4/input2
>[    4.154933] ata2.00: configured for UDMA/100
>[    4.162578] scsi 1:0:0:0: CD-ROM            TSSTcorp DVD+-RW TS-U633F D500 PQ: 0 ANSI: 5
>[    4.181851] sr 1:0:0:0: [sr0] scsi3-mmc drive: 24x/24x writer dvd-ram cd/rw xa/form2 cdda tray
>[    4.181857] cdrom: Uniform CD-ROM driver Revision: 3.20
>[    4.182296] sr 1:0:0:0: Attached scsi CD-ROM sr0
>[    4.182596] sr 1:0:0:0: Attached scsi generic sg1 type 5
>[    4.226908] usb 2-1.3.1: new full-speed USB device number 5 using ehci-pci
>[    4.348217] usb 2-1.3.1: No LPM exit latency info found, disabling LPM.
>[    4.486924] usb 2-1.3.2: new low-speed USB device number 6 using ehci-pci
>[    4.526268] ata5: SATA link down (SStatus 0 SControl 300)
>[    4.526823] PM: Hibernation image partition 8:2 present
>[    4.526828] PM: Looking for hibernation image.
>[    4.582353] PM: Image not found (code -22)
>[    4.582358] PM: Hibernation image not present or could not be loaded.
>[    4.583278] Freeing unused kernel memory: 1196K (ffffffff81ce2000 - ffffffff81e0d000)
>[    4.583280] Write protecting the kernel read-only data: 12288k
>[    4.586801] Freeing unused kernel memory: 1444K (ffff880001697000 - ffff880001800000)
>[    4.589186] Freeing unused kernel memory: 1108K (ffff880001aeb000 - ffff880001c00000)
>[    4.590527] random: systemd urandom read with 48 bits of entropy available
>[    4.660005] vboxdrv: Found 8 processor cores.
>[    4.664587] vboxdrv: fAsync=0 offMin=0x211 offMax=0x17416
>[    4.664734] vboxdrv: TSC mode is 'synchronous', kernel timer mode is 'normal'.
>[    4.664736] vboxdrv: Successfully loaded version 4.3.18 (interface 0x001a0008).
>[    4.669462] input: CHICONY HP Basic USB Keyboard as /devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.3/2-1.3.2/2-1.3.2:1.0/0003:03F0:0024.0004/input/input10
>[    4.669668] hid-generic 0003:03F0:0024.0004: input,hidraw3: USB HID v1.11 Keyboard [CHICONY HP Basic USB Keyboard] on usb-0000:00:1d.0-1.3.2/input0
>[    4.746450] Switched to clocksource tsc
>[    5.007232] [Firmware Bug]: ACPI(PEGP) defines _DOD but not _DOS
>[    5.007807] ACPI: Video Device [PEGP] (multi-head: yes  rom: yes  post: no)
>[    5.015049] acpi device:03: registered as cooling_device8
>[    5.019972] [drm] Initialized drm 1.1.0 20060810
>[    5.019992] sdhci: Secure Digital Host Controller Interface driver
>[    5.019995] sdhci: Copyright(c) Pierre Ossman
>[    5.020381] sdhci-pci 0000:14:00.0: SDHCI controller found [197b:2392] (rev 30)
>[    5.020499] acpi device:05: registered as cooling_device9
>[    5.020548] sdhci-pci 0000:14:00.0: No vmmc regulator found
>[    5.020550] sdhci-pci 0000:14:00.0: No vqmmc regulator found
>[    5.020588] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:02/LNXVIDEO:00/input/input11
>[    5.021853] mmc0: SDHCI controller on PCI [0000:14:00.0] using DMA
>[    5.021877] sdhci-pci 0000:14:00.2: SDHCI controller found [197b:2391] (rev 30)
>[    5.021961] sdhci-pci 0000:14:00.2: Refusing to bind to secondary interface.
>[    5.028987] [drm:nouveau_display_options] Loading Nouveau with parameters:
>[    5.028991] [drm:nouveau_display_options] ... tv_disable   : 0
>[    5.028993] [drm:nouveau_display_options] ... ignorelid    : 0
>[    5.028995] [drm:nouveau_display_options] ... duallink     : 1
>[    5.028996] [drm:nouveau_display_options] ... nofbaccel    : 0
>[    5.028998] [drm:nouveau_display_options] ... config       : (null)
>[    5.029000] [drm:nouveau_display_options] ... debug        : PDISP=trace,I2C=trace
>[    5.029001] [drm:nouveau_display_options] ... noaccel      : 0
>[    5.029003] [drm:nouveau_display_options] ... modeset      : -1
>[    5.029005] [drm:nouveau_display_options] ... runpm        : -1
>[    5.029006] [drm:nouveau_display_options] ... vram_pushbuf : 0
>[    5.029008] [drm:nouveau_display_options] ... pstate       : 0
>[    5.029010] MXM: GUID detected in BIOS
>[    5.029390] ACPI Warning: \_SB_.PCI0.P0P2.PEGP._DSM: Argument #4 type mismatch - Found [Buffer], ACPI requires [Package] (20140926/nsarguments-95)
>[    5.029620] ACPI: \_SB_.PCI0.P0P2.PEGP: failed to evaluate _DSM
>[    5.030093] nouveau  [  DEVICE][0000:02:00.0] BOOT0  : 0x0c1800a1
>[    5.030097] nouveau  [  DEVICE][0000:02:00.0] Chipset: GF108 (NVC1)
>[    5.030100] nouveau  [  DEVICE][0000:02:00.0] Family : NVC0
>[    5.030126] nouveau  [   VBIOS][0000:02:00.0] checking PRAMIN for image...
>[    5.097035] nouveau  [   VBIOS][0000:02:00.0] ... appears to be valid
>[    5.097039] nouveau  [   VBIOS][0000:02:00.0] using image from PRAMIN
>[    5.097131] nouveau  [   VBIOS][0000:02:00.0] BIT signature found
>[    5.097133] nouveau  [   VBIOS][0000:02:00.0] version 70.08.19.00.10
>[    5.097147] nouveau T[     I2C][0000:02:00.0] inc() == 2
>[    5.097149] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6a380] created
>[    5.097151] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6a380] inc() == 2
>[    5.097152] nouveau T[     I2C][0000:02:00.0] inc() == 3
>[    5.097258] nouveau T[     I2C][0000:02:00.0][0x00000005][ffff880232e38400] created
>[    5.097260] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6a380] dec() == 1
>[    5.097262] nouveau T[     I2C][0000:02:00.0] inc() == 4
>[    5.097264] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6a400] created
>[    5.097266] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6a400] inc() == 2
>[    5.097267] nouveau T[     I2C][0000:02:00.0] inc() == 5
>[    5.097297] nouveau T[     I2C][0000:02:00.0][0x00000005][ffff880232e38800] created
>[    5.097299] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6a400] dec() == 1
>[    5.097301] nouveau T[     I2C][0000:02:00.0] inc() == 6
>[    5.097302] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6a440] created
>[    5.097304] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6a440] inc() == 2
>[    5.097306] nouveau T[     I2C][0000:02:00.0] inc() == 7
>[    5.097331] nouveau T[     I2C][0000:02:00.0][0x00000005][ffff880232e38c00] created
>[    5.097333] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6a440] dec() == 1
>[    5.097334] nouveau T[     I2C][0000:02:00.0] inc() == 8
>[    5.097336] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6aec0] created
>[    5.097338] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6aec0] inc() == 2
>[    5.097339] nouveau T[     I2C][0000:02:00.0] inc() == 9
>[    5.097365] nouveau T[     I2C][0000:02:00.0][0x00000005][ffff880232e39000] created
>[    5.097367] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6aec0] dec() == 1
>[    5.097369] nouveau T[     I2C][0000:02:00.0] inc() == 10
>[    5.097370] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6afc0] created
>[    5.097372] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6afc0] inc() == 2
>[    5.097374] nouveau T[     I2C][0000:02:00.0] inc() == 11
>[    5.097400] nouveau T[     I2C][0000:02:00.0][0x00000005][ffff880232e39400] created
>[    5.097402] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6afc0] dec() == 1
>[    5.097404] nouveau T[     I2C][0000:02:00.0] inc() == 12
>[    5.097406] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6a500] created
>[    5.097407] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6a500] inc() == 2
>[    5.097409] nouveau T[     I2C][0000:02:00.0] inc() == 13
>[    5.097434] nouveau T[     I2C][0000:02:00.0][0x00000005][ffff880232e39800] created
>[    5.097436] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6a500] dec() == 1
>[    5.097438] nouveau T[     I2C][0000:02:00.0] inc() == 14
>[    5.097440] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6a480] created
>[    5.097442] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6a480] inc() == 2
>[    5.097443] nouveau T[     I2C][0000:02:00.0] inc() == 15
>[    5.097469] nouveau T[     I2C][0000:02:00.0][0x00000005][ffff880232e39c00] created
>[    5.097471] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6a480] dec() == 1
>[    5.097472] nouveau T[     I2C][0000:02:00.0] inc() == 16
>[    5.097474] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6a5c0] created
>[    5.097476] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6a5c0] inc() == 2
>[    5.097477] nouveau T[     I2C][0000:02:00.0] inc() == 17
>[    5.097503] nouveau T[     I2C][0000:02:00.0][0x00000005][ffff880232e3a000] created
>[    5.097505] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6a5c0] dec() == 1
>[    5.097507] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6afc0] inc() == 3
>[    5.097509] nouveau T[     I2C][0000:02:00.0] inc() == 18
>[    5.097536] nouveau T[     I2C][0000:02:00.0][0x00000006][ffff880232e3a400] created
>[    5.097537] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6afc0] dec() == 2
>[    5.097540] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6a500] inc() == 3
>[    5.097541] nouveau T[     I2C][0000:02:00.0] inc() == 19
>[    5.097566] nouveau T[     I2C][0000:02:00.0][0x00000006][ffff880232e3a800] created
>[    5.097568] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6a500] dec() == 2
>[    5.097570] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6a480] inc() == 3
>[    5.097571] nouveau T[     I2C][0000:02:00.0] inc() == 20
>[    5.097597] nouveau T[     I2C][0000:02:00.0][0x00000006][ffff880232e3ac00] created
>[    5.097599] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6a480] dec() == 2
>[    5.097601] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6a5c0] inc() == 3
>[    5.097603] nouveau T[     I2C][0000:02:00.0] inc() == 21
>[    5.097628] nouveau T[     I2C][0000:02:00.0][0x00000006][ffff880232e3b000] created
>[    5.097630] nouveau T[     I2C][0000:02:00.0][0x00000000][ffff880232c6a5c0] dec() == 2
>[    5.097633] nouveau T[     I2C][0000:02:00.0] created
>[    5.097688] nouveau T[     I2C][0000:02:00.0] use(+1) == 1
>[    5.097689] nouveau T[     I2C][0000:02:00.0] initialising...
>[    5.097691] nouveau T[     I2C][0000:02:00.0] resetting...
>[    5.097692] nouveau D[     I2C][0000:02:00.0] PAD:X:00: -> NULL
>[    5.097694] nouveau D[     I2C][0000:02:00.0] PAD:X:01: -> NULL
>[    5.097695] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    5.097696] nouveau D[     I2C][0000:02:00.0] PAD:X:05: -> NULL
>[    5.097700] nouveau D[     I2C][0000:02:00.0] PAD:S:00: -> NULL
>[    5.097702] nouveau D[     I2C][0000:02:00.0] PAD:S:01: -> NULL
>[    5.097705] nouveau D[     I2C][0000:02:00.0] PAD:S:02: -> NULL
>[    5.097708] nouveau D[     I2C][0000:02:00.0] PAD:S:03: -> NULL
>[    5.097711] nouveau D[     I2C][0000:02:00.0] PAD:S:00: -> NULL
>[    5.097713] nouveau D[     I2C][0000:02:00.0] PAD:S:01: -> NULL
>[    5.097716] nouveau D[     I2C][0000:02:00.0] PAD:S:02: -> NULL
>[    5.097722] nouveau D[     I2C][0000:02:00.0] PAD:S:03: -> NULL
>[    5.097727] nouveau D[     I2C][0000:02:00.0] reset
>[    5.097730] nouveau T[     I2C][0000:02:00.0] initialised
>[    5.097750] nouveau 0000:02:00.0: irq 32 for MSI/MSI-X
>[    5.097757] nouveau  [     PMC][0000:02:00.0] MSI interrupts enabled
>[    5.097786] nouveau W[     PFB][0000:02:00.0][0x00000000][ffff880235e23800] reclocking of this ram type unsupported
>[    5.097787] nouveau  [     PFB][0000:02:00.0] RAM type: DDR3
>[    5.097789] nouveau  [     PFB][0000:02:00.0] RAM size: 1024 MiB
>[    5.097790] nouveau  [     PFB][0000:02:00.0]    ZCOMP: 0 tags
>[    5.100816] nouveau  [    VOLT][0000:02:00.0] GPU voltage: 830000uv
>[    5.100823] nouveau D[     I2C][0000:02:00.0] probing monitoring devices on bus: 2
>[    5.100826] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    5.101886] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    5.101888] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    5.102951] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    5.102953] nouveau D[     I2C][0000:02:00.0] using custom udelay 40 instead of 10
>[    5.102954] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    5.106862] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    5.106865] nouveau D[     I2C][0000:02:00.0] using custom udelay 40 instead of 10
>[    5.106868] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    5.110666] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    5.110669] nouveau D[     I2C][0000:02:00.0] using custom udelay 40 instead of 10
>[    5.110671] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    5.114458] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    5.114459] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    5.115517] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    5.115519] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    5.116634] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    5.116640] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    5.117709] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    5.117711] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    5.118776] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    5.118778] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    5.119842] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    5.119843] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    5.120905] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    5.120907] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    5.121970] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    5.121973] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    5.123031] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    5.123032] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    5.124093] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    5.124096] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    5.125157] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    5.125159] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    5.126233] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    5.126238] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    5.127305] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    5.127308] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    5.128369] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    5.128372] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    5.129433] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    5.129435] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    5.130497] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    5.130499] nouveau D[     I2C][0000:02:00.0] no devices found.
>[    5.130506] nouveau  [  PTHERM][0000:02:00.0] FAN control: none / external
>[    5.130524] nouveau  [  PTHERM][0000:02:00.0] fan management: automatic
>[    5.130548] nouveau  [  PTHERM][0000:02:00.0] internal sensor: yes
>[    5.150618] nouveau  [     CLK][0000:02:00.0] 03: core 50 MHz memory 135 MHz 
>[    5.150622] nouveau  [     CLK][0000:02:00.0] 07: core 202 MHz memory 324 MHz 
>[    5.150625] nouveau  [     CLK][0000:02:00.0] 0f: core 560 MHz memory 800 MHz 
>[    5.150782] nouveau  [     CLK][0000:02:00.0] --: core 202 MHz memory 324 MHz 
>[    5.151729] BTRFS: device label boot devid 1 transid 6097 /dev/sda2
>[    5.266398] nouveau T[   PDISP][0000:02:00.0] inc() == 2
>[    5.266402] nouveau T[   PDISP][0000:02:00.0] inc() == 3
>[    5.266405] nouveau D[   PDISP][0000:02:00.0] 00:0003:03c1: type 03 loc 0 or 1 link 3 con 0 edid 2 bus 0 head 3
>[    5.266408] nouveau T[   PDISP][0000:02:00.0] inc() == 4
>[    5.266410] nouveau T[   PDISP][0000:02:00.0] inc() == 5
>[    5.266413] nouveau D[   PDISP][0000:02:00.0] 00:0340: type 40 loc 3 hpd 00 dp 0 di 0 sr 0 lcdid 0
>[    5.266415] nouveau T[   PDISP][0000:02:00.0][0x00000000][ffff880037318840] created
>[    5.266417] nouveau T[   PDISP][0000:02:00.0][0x00000000][ffff88023249b180] created
>[    5.266419] nouveau T[   PDISP][0000:02:00.0] inc() == 6
>[    5.266421] nouveau T[   PDISP][0000:02:00.0] inc() == 7
>[    5.266424] nouveau D[   PDISP][0000:02:00.0] 01:0002:0342: type 02 loc 0 or 2 link 1 con 1 edid 6 bus 2 head 3
>[    5.266426] nouveau T[   PDISP][0000:02:00.0] inc() == 8
>[    5.266428] nouveau T[   PDISP][0000:02:00.0] inc() == 9
>[    5.266430] nouveau D[   PDISP][0000:02:00.0] 01:0061: type 61 loc 0 hpd 01 dp 0 di 0 sr 0 lcdid 0
>[    5.266434] nouveau D[   PDISP][0000:02:00.0] 01:0061: func 07 (HPD)
>[    5.266436] nouveau T[   PDISP][0000:02:00.0][0x00000000][ffff880037318f00] created
>[    5.266438] nouveau T[   PDISP][0000:02:00.0][0x00000000][ffff88023249b200] created
>[    5.266440] nouveau T[   PDISP][0000:02:00.0] inc() == 10
>[    5.266442] nouveau T[   PDISP][0000:02:00.0] inc() == 11
>[    5.266445] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: type 06 loc 0 or 4 link 1 con 3 edid b bus 3 head 3
>[    5.266447] nouveau T[   PDISP][0000:02:00.0] inc() == 12
>[    5.266449] nouveau T[   PDISP][0000:02:00.0] inc() == 13
>[    5.266452] nouveau D[   PDISP][0000:02:00.0] 03:0346: type 46 loc 3 hpd 02 dp 0 di 0 sr 0 lcdid 0
>[    5.266455] nouveau D[   PDISP][0000:02:00.0] 03:0346: func 08 (HPD)
>[    5.266457] nouveau T[   PDISP][0000:02:00.0][0x00000000][ffff880037318cc0] created
>[    5.266462] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: bios dp 21 12 0a 05
>[    5.266465] nouveau T[   PDISP][0000:02:00.0][0x00000006][ffff8800b793ee00] created
>[    5.266467] nouveau T[   PDISP][0000:02:00.0] inc() == 14
>[    5.266468] nouveau T[   PDISP][0000:02:00.0] inc() == 15
>[    5.266471] nouveau D[   PDISP][0000:02:00.0] 03:0002:0344: type 02 loc 0 or 4 link 1 con 3 edid 7 bus 3 head 3
>[    5.266473] nouveau T[   PDISP][0000:02:00.0][0x00000000][ffff88023249b280] created
>[    5.266476] nouveau T[   PDISP][0000:02:00.0] created
>[    5.266477] nouveau T[   PDISP][0000:02:00.0] resetting...
>[    5.266479] nouveau D[   PDISP][0000:02:00.0] reset
>[    5.266695] [TTM] Zone  kernel: Available graphics memory: 4055180 kiB
>[    5.266697] [TTM] Zone   dma32: Available graphics memory: 2097152 kiB
>[    5.266699] [TTM] Initializing pool allocator
>[    5.266706] [TTM] Initializing DMA pool allocator
>[    5.266721] nouveau  [     DRM] VRAM: 1024 MiB
>[    5.266723] nouveau  [     DRM] GART: 1048576 MiB
>[    5.266728] nouveau  [     DRM] TMDS table version 2.0
>[    5.266731] nouveau  [     DRM] DCB version 4.0
>[    5.266734] nouveau  [     DRM] DCB outp 00: 01000323 00010034
>[    5.266740] nouveau  [     DRM] DCB outp 01: 02021362 00020010
>[    5.266742] nouveau  [     DRM] DCB outp 02: 040333b6 0f220010
>[    5.266744] nouveau  [     DRM] DCB outp 03: 04033372 00020010
>[    5.266746] nouveau  [     DRM] DCB conn 00: 00000340
>[    5.266749] nouveau  [     DRM] DCB conn 01: 00001061
>[    5.266751] nouveau  [     DRM] DCB conn 02: 00000147
>[    5.266753] nouveau  [     DRM] DCB conn 03: 00002346
>[    5.266755] nouveau  [     DRM] DCB conn 04: 00000400
>[    5.266756] nouveau  [     DRM] DCB conn 05: 00000210
>[    5.266758] nouveau  [     DRM] DCB conn 06: 00000211
>[    5.266760] nouveau  [     DRM] DCB conn 07: 00000213
>[    5.266783] nouveau T[   PDISP][0000:02:00.0] use(+1) == 1
>[    5.266785] nouveau T[   PDISP][0000:02:00.0] initialising...
>[    5.266787] nouveau T[   PDISP][0000:02:00.0] resetting...
>[    5.266790] nouveau D[   PDISP][0000:02:00.0] reset
>[    5.266814] nouveau D[     I2C][0000:02:00.0] PAD:S:01: -> PORT:0b
>[    5.266816] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000000 16
>[    5.267393] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110900f 0x10000010
>[    5.267396] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    5.267400] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    5.267404] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    5.267409] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    5.267414] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: aux power -> always
>[    5.267416] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000100 2
>[    5.267575] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109001 0x10000002
>[    5.267579] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f78406
>[    5.267584] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    5.267588] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    5.267593] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    5.267597] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000202 3
>[    5.267764] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109002 0x10000003
>[    5.267769] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7800000
>[    5.267773] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    5.267778] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    5.267782] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    5.267787] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: no inter-lane alignment
>[    5.268325] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000102 1
>[    5.268477] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109000 0x10000001
>[    5.268481] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7800000
>[    5.268485] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    5.268490] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    5.268494] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    5.268499] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 8: 0x00000102 1
>[    5.268512] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000020
>[    5.268513] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    5.268515] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    5.268517] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    5.268655] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01108000 0x10000000
>[    5.268660] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x0000000d 1
>[    5.268811] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109000 0x10000001
>[    5.268816] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7800000
>[    5.268820] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    5.268824] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    5.268829] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    5.268835] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: 4 lanes at 162000 KB/s
>[    5.268862] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 8: 0x00000100 2
>[    5.268877] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00008406
>[    5.268878] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    5.268880] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    5.268882] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    5.269028] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01108001 0x10000000
>[    5.269031] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: training pattern 1
>[    5.269035] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000102 1
>[    5.269187] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109000 0x10000001
>[    5.269191] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7800020
>[    5.269196] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    5.269200] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    5.269204] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    5.269209] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 8: 0x00000102 1
>[    5.269224] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000021
>[    5.269226] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    5.269228] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    5.269229] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    5.269367] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01108000 0x10000000
>[    5.269372] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: config lane 0 00 00
>[    5.269384] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: config lane 1 00 00
>[    5.269395] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: config lane 2 00 00
>[    5.269405] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: config lane 3 00 00
>[    5.269415] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 8: 0x00000103 4
>[    5.269428] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    5.269430] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    5.269432] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    5.269433] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    5.269594] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01108003 0x10000000
>[    6.257260] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000202 6
>[    6.257453] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109005 0x10000006
>[    6.257456] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00801111
>[    6.257460] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f70000
>[    6.257464] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    6.257468] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    6.257473] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: status 11 11 80 00 00 00
>[    6.257475] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: training pattern 2
>[    6.257480] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000102 1
>[    6.257629] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109000 0x10000001
>[    6.257631] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00801121
>[    6.257635] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f70000
>[    6.257639] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    6.257644] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    6.257648] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 8: 0x00000102 1
>[    6.257661] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000022
>[    6.257662] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    6.257664] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    6.257665] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    6.257803] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01108000 0x10000000
>[    7.245485] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000202 6
>[    7.245679] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109005 0x10000006
>[    7.245683] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01817777
>[    7.245688] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f70000
>[    7.245693] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    7.245697] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    7.245703] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: status 77 77 81 01 00 00
>[    7.245705] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: training pattern 0
>[    7.245710] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000102 1
>[    7.245863] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109000 0x10000001
>[    7.245868] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01817722
>[    7.245872] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f70000
>[    7.245877] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    7.245882] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    7.245887] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 8: 0x00000102 1
>[    7.245902] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000020
>[    7.245904] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    7.245906] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    7.245908] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    7.246048] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01108000 0x10000000
>[    7.246056] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000102 1
>[    7.246208] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109000 0x10000001
>[    7.246213] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01817720
>[    7.246217] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f70000
>[    7.246222] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    7.246227] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    7.246231] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 8: 0x00000102 1
>[    7.246246] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    7.246248] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    7.246250] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    7.246252] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    7.246391] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01108000 0x10000000
>[    7.246396] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: training complete
>[    7.246480] nouveau T[   PDISP][0000:02:00.0] initialised
>[    7.246517] nouveau T[   PDISP][0000:02:00.0] inc() == 2
>[    7.246521] nouveau T[   PDISP][0000:02:00.0][0x03005024][ffff880232e1aa00] created
>[    7.246524] nouveau T[   PDISP][0000:02:00.0][0x03005024][ffff880232e1aa00] inc() == 2
>[    7.246526] nouveau T[   PDISP][0000:02:00.0] inc() == 3
>[    7.246529] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] inc() == 3
>[    7.246531] nouveau T[   PDISP][0000:02:00.0] inc() == 4
>[    7.246533] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] dec() == 2
>[    7.246693] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] created
>[    7.246696] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] use(+1) == 1
>[    7.246698] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] initialising...
>[    7.246701] nouveau T[   PDISP][0000:02:00.0][0x03005024][ffff880232e1aa00] use(+1) == 1
>[    7.246703] nouveau T[   PDISP][0000:02:00.0][0x03005024][ffff880232e1aa00] initialising...
>[    7.246708] nouveau T[   PDISP][0000:02:00.0] use(+1) == 2
>[    7.246711] nouveau T[   PDISP][0000:02:00.0][0x03005024][ffff880232e1aa00] initialised
>[    7.246713] nouveau T[   PDISP][0000:02:00.0] use(+1) == 3
>[    7.246777] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] initialised
>[    7.246780] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] inc() == 2
>[    7.246783] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] use(+1) == 2
>[    7.246785] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] use(-1) == 1
>[    7.246788] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] dec() == 1
>[    7.246790] nouveau T[   PDISP][0000:02:00.0][0x03005024][ffff880232e1aa00] dec() == 1
>[    7.246792] nouveau T[   PDISP][0000:02:00.0] use(-1) == 2
>[    7.246840] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] illegal class 0x947d
>[    7.246843] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] handle 0x947d0000 not found
>[    7.246846] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] illegal class 0x927d
>[    7.246849] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] handle 0x927d0000 not found
>[    7.246852] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] illegal class 0x917d
>[    7.246855] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] handle 0x917d0000 not found
>[    7.246858] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] illegal class 0x907d
>[    7.246860] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] handle 0x907d0000 not found
>[    7.246863] nouveau T[   PDISP][0000:02:00.0] use(+1) == 3
>[    7.246866] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] inc() == 3
>[    7.246868] nouveau T[   PDISP][0000:02:00.0] inc() == 5
>[    7.246871] nouveau T[   PDISP][0000:02:00.0][0xc000857d][ffff880233001980] created
>[    7.246873] nouveau T[   PDISP][0000:02:00.0][0xc000857d][ffff880233001980] use(+1) == 1
>[    7.246875] nouveau T[   PDISP][0000:02:00.0][0xc000857d][ffff880233001980] initialising...
>[    7.246878] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] use(+1) == 2
>[    7.246880] nouveau T[   PDISP][0000:02:00.0] use(+1) == 4
>[    7.246923] nouveau T[   PDISP][0000:02:00.0][0xc000857d][ffff880233001980] initialised
>[    7.246926] nouveau T[   PDISP][0000:02:00.0][0xc000857d][ffff880233001980] inc() == 2
>[    7.246928] nouveau T[   PDISP][0000:02:00.0][0xc000857d][ffff880233001980] use(+1) == 2
>[    7.246931] nouveau T[   PDISP][0000:02:00.0][0xc000857d][ffff880233001980] use(-1) == 1
>[    7.246933] nouveau T[   PDISP][0000:02:00.0][0xc000857d][ffff880233001980] dec() == 1
>[    7.246936] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] dec() == 2
>[    7.246937] nouveau T[   PDISP][0000:02:00.0] use(-1) == 3
>[    7.246948] nouveau T[   PDISP][0000:02:00.0][0xc000857d][ffff880233001980] inc() == 2
>[    7.246951] nouveau T[   PDISP][0000:02:00.0][0xc000857d][ffff880233001980] inc() == 3
>[    7.246959] nouveau T[   PDISP][0000:02:00.0][0xc000857d][ffff880233001980] use(+1) == 2
>[    7.246969] nouveau T[   PDISP][0000:02:00.0][0xc000857d][ffff880233001980] dec() == 2
>[    7.246972] nouveau T[   PDISP][0000:02:00.0][0xc000857d][ffff880233001980] inc() == 3
>[    7.246975] nouveau T[   PDISP][0000:02:00.0][0xc000857d][ffff880233001980] inc() == 4
>[    7.246982] nouveau T[   PDISP][0000:02:00.0][0xc000857d][ffff880233001980] use(+1) == 3
>[    7.246991] nouveau T[   PDISP][0000:02:00.0][0xc000857d][ffff880233001980] dec() == 3
>[    7.247023] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] illegal class 0x917a
>[    7.247026] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] handle 0x917a0000 not found
>[    7.247029] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] illegal class 0x907a
>[    7.247032] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] handle 0x907a0000 not found
>[    7.247034] nouveau T[   PDISP][0000:02:00.0] use(+1) == 4
>[    7.247037] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] inc() == 4
>[    7.247039] nouveau T[   PDISP][0000:02:00.0] inc() == 6
>[    7.247041] nouveau T[   PDISP][0000:02:00.0][0xc000857a][ffff880233001c00] created
>[    7.247043] nouveau T[   PDISP][0000:02:00.0][0xc000857a][ffff880233001c00] use(+1) == 1
>[    7.247046] nouveau T[   PDISP][0000:02:00.0][0xc000857a][ffff880233001c00] initialising...
>[    7.247048] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] use(+1) == 3
>[    7.247050] nouveau T[   PDISP][0000:02:00.0] use(+1) == 5
>[    7.247063] nouveau T[   PDISP][0000:02:00.0][0xc000857a][ffff880233001c00] initialised
>[    7.247066] nouveau T[   PDISP][0000:02:00.0][0xc000857a][ffff880233001c00] inc() == 2
>[    7.247068] nouveau T[   PDISP][0000:02:00.0][0xc000857a][ffff880233001c00] use(+1) == 2
>[    7.247071] nouveau T[   PDISP][0000:02:00.0][0xc000857a][ffff880233001c00] use(-1) == 1
>[    7.247073] nouveau T[   PDISP][0000:02:00.0][0xc000857a][ffff880233001c00] dec() == 1
>[    7.247076] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] dec() == 3
>[    7.247077] nouveau T[   PDISP][0000:02:00.0] use(-1) == 4
>[    7.247110] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] illegal class 0x927c
>[    7.247113] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] handle 0x927c0000 not found
>[    7.247116] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] illegal class 0x917c
>[    7.247118] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] handle 0x917c0000 not found
>[    7.247121] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] illegal class 0x907c
>[    7.247124] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] handle 0x907c0000 not found
>[    7.247126] nouveau T[   PDISP][0000:02:00.0] use(+1) == 5
>[    7.247129] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] inc() == 5
>[    7.247131] nouveau T[   PDISP][0000:02:00.0] inc() == 7
>[    7.247134] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff880233001d80] created
>[    7.247136] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff880233001d80] use(+1) == 1
>[    7.247138] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff880233001d80] initialising...
>[    7.247141] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] use(+1) == 4
>[    7.247143] nouveau T[   PDISP][0000:02:00.0] use(+1) == 6
>[    7.247156] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff880233001d80] initialised
>[    7.247159] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff880233001d80] inc() == 2
>[    7.247161] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff880233001d80] use(+1) == 2
>[    7.247163] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff880233001d80] use(-1) == 1
>[    7.247166] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff880233001d80] dec() == 1
>[    7.247168] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] dec() == 4
>[    7.247170] nouveau T[   PDISP][0000:02:00.0] use(-1) == 5
>[    7.247180] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff880233001d80] inc() == 2
>[    7.247182] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff880233001d80] inc() == 3
>[    7.247190] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff880233001d80] use(+1) == 2
>[    7.247200] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff880233001d80] dec() == 2
>[    7.247203] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff880233001d80] inc() == 3
>[    7.247205] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff880233001d80] inc() == 4
>[    7.247212] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff880233001d80] use(+1) == 3
>[    7.247222] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff880233001d80] dec() == 3
>[    7.247225] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] illegal class 0x917b
>[    7.247228] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] handle 0x917b0000 not found
>[    7.247230] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] illegal class 0x907b
>[    7.247233] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] handle 0x907b0000 not found
>[    7.247236] nouveau T[   PDISP][0000:02:00.0] use(+1) == 6
>[    7.247238] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] inc() == 6
>[    7.247240] nouveau T[   PDISP][0000:02:00.0] inc() == 8
>[    7.247242] nouveau T[   PDISP][0000:02:00.0][0xc000857b][ffff880233001f80] created
>[    7.247245] nouveau T[   PDISP][0000:02:00.0][0xc000857b][ffff880233001f80] use(+1) == 1
>[    7.247247] nouveau T[   PDISP][0000:02:00.0][0xc000857b][ffff880233001f80] initialising...
>[    7.247250] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] use(+1) == 5
>[    7.247252] nouveau T[   PDISP][0000:02:00.0] use(+1) == 7
>[    7.247265] nouveau T[   PDISP][0000:02:00.0][0xc000857b][ffff880233001f80] initialised
>[    7.247267] nouveau T[   PDISP][0000:02:00.0][0xc000857b][ffff880233001f80] inc() == 2
>[    7.247270] nouveau T[   PDISP][0000:02:00.0][0xc000857b][ffff880233001f80] use(+1) == 2
>[    7.247272] nouveau T[   PDISP][0000:02:00.0][0xc000857b][ffff880233001f80] use(-1) == 1
>[    7.247275] nouveau T[   PDISP][0000:02:00.0][0xc000857b][ffff880233001f80] dec() == 1
>[    7.247277] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] dec() == 5
>[    7.247279] nouveau T[   PDISP][0000:02:00.0] use(-1) == 6
>[    7.247292] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] illegal class 0x917e
>[    7.247295] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] handle 0x917e0000 not found
>[    7.247298] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] illegal class 0x907e
>[    7.247301] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] handle 0x907e0000 not found
>[    7.247303] nouveau T[   PDISP][0000:02:00.0] use(+1) == 7
>[    7.247306] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] inc() == 7
>[    7.247307] nouveau T[   PDISP][0000:02:00.0] inc() == 9
>[    7.247310] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff880233001400] created
>[    7.247313] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff880233001400] use(+1) == 1
>[    7.247315] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff880233001400] initialising...
>[    7.247317] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] use(+1) == 6
>[    7.247319] nouveau T[   PDISP][0000:02:00.0] use(+1) == 8
>[    7.247333] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff880233001400] initialised
>[    7.247335] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff880233001400] inc() == 2
>[    7.247338] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff880233001400] use(+1) == 2
>[    7.247340] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff880233001400] use(-1) == 1
>[    7.247342] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff880233001400] dec() == 1
>[    7.247345] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] dec() == 6
>[    7.247346] nouveau T[   PDISP][0000:02:00.0] use(-1) == 7
>[    7.247356] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff880233001400] inc() == 2
>[    7.247358] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff880233001400] inc() == 3
>[    7.247366] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff880233001400] use(+1) == 2
>[    7.247375] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff880233001400] dec() == 2
>[    7.247378] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff880233001400] inc() == 3
>[    7.247381] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff880233001400] inc() == 4
>[    7.247388] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff880233001400] use(+1) == 3
>[    7.247397] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff880233001400] dec() == 3
>[    7.247428] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] illegal class 0x917a
>[    7.247431] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] handle 0x917a0001 not found
>[    7.247434] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] illegal class 0x907a
>[    7.247437] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] handle 0x907a0001 not found
>[    7.247439] nouveau T[   PDISP][0000:02:00.0] use(+1) == 8
>[    7.247442] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] inc() == 8
>[    7.247444] nouveau T[   PDISP][0000:02:00.0] inc() == 10
>[    7.247446] nouveau T[   PDISP][0000:02:00.0][0xc000857a][ffff880233001080] created
>[    7.247448] nouveau T[   PDISP][0000:02:00.0][0xc000857a][ffff880233001080] use(+1) == 1
>[    7.247451] nouveau T[   PDISP][0000:02:00.0][0xc000857a][ffff880233001080] initialising...
>[    7.247453] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] use(+1) == 7
>[    7.247455] nouveau T[   PDISP][0000:02:00.0] use(+1) == 9
>[    7.247468] nouveau T[   PDISP][0000:02:00.0][0xc000857a][ffff880233001080] initialised
>[    7.247471] nouveau T[   PDISP][0000:02:00.0][0xc000857a][ffff880233001080] inc() == 2
>[    7.247473] nouveau T[   PDISP][0000:02:00.0][0xc000857a][ffff880233001080] use(+1) == 2
>[    7.247476] nouveau T[   PDISP][0000:02:00.0][0xc000857a][ffff880233001080] use(-1) == 1
>[    7.247478] nouveau T[   PDISP][0000:02:00.0][0xc000857a][ffff880233001080] dec() == 1
>[    7.247480] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] dec() == 7
>[    7.247482] nouveau T[   PDISP][0000:02:00.0] use(-1) == 8
>[    7.247514] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] illegal class 0x927c
>[    7.247518] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] handle 0x927c0001 not found
>[    7.247521] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] illegal class 0x917c
>[    7.247523] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] handle 0x917c0001 not found
>[    7.247526] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] illegal class 0x907c
>[    7.247529] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] handle 0x907c0001 not found
>[    7.247531] nouveau T[   PDISP][0000:02:00.0] use(+1) == 9
>[    7.247534] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] inc() == 9
>[    7.247536] nouveau T[   PDISP][0000:02:00.0] inc() == 11
>[    7.247539] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff8800370b8900] created
>[    7.247541] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff8800370b8900] use(+1) == 1
>[    7.247543] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff8800370b8900] initialising...
>[    7.247546] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] use(+1) == 8
>[    7.247548] nouveau T[   PDISP][0000:02:00.0] use(+1) == 10
>[    7.247559] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff8800370b8900] initialised
>[    7.247562] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff8800370b8900] inc() == 2
>[    7.247564] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff8800370b8900] use(+1) == 2
>[    7.247567] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff8800370b8900] use(-1) == 1
>[    7.247569] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff8800370b8900] dec() == 1
>[    7.247571] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] dec() == 8
>[    7.247573] nouveau T[   PDISP][0000:02:00.0] use(-1) == 9
>[    7.247583] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff8800370b8900] inc() == 2
>[    7.247586] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff8800370b8900] inc() == 3
>[    7.247595] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff8800370b8900] use(+1) == 2
>[    7.247605] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff8800370b8900] dec() == 2
>[    7.247608] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff8800370b8900] inc() == 3
>[    7.247610] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff8800370b8900] inc() == 4
>[    7.247617] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff8800370b8900] use(+1) == 3
>[    7.247626] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff8800370b8900] dec() == 3
>[    7.247629] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] illegal class 0x917b
>[    7.247632] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] handle 0x917b0001 not found
>[    7.247635] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] illegal class 0x907b
>[    7.247638] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] handle 0x907b0001 not found
>[    7.247640] nouveau T[   PDISP][0000:02:00.0] use(+1) == 10
>[    7.247643] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] inc() == 10
>[    7.247645] nouveau T[   PDISP][0000:02:00.0] inc() == 12
>[    7.247647] nouveau T[   PDISP][0000:02:00.0][0xc000857b][ffff8800b78b4100] created
>[    7.247650] nouveau T[   PDISP][0000:02:00.0][0xc000857b][ffff8800b78b4100] use(+1) == 1
>[    7.247652] nouveau T[   PDISP][0000:02:00.0][0xc000857b][ffff8800b78b4100] initialising...
>[    7.247654] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] use(+1) == 9
>[    7.247656] nouveau T[   PDISP][0000:02:00.0] use(+1) == 11
>[    7.247670] nouveau T[   PDISP][0000:02:00.0][0xc000857b][ffff8800b78b4100] initialised
>[    7.247672] nouveau T[   PDISP][0000:02:00.0][0xc000857b][ffff8800b78b4100] inc() == 2
>[    7.247675] nouveau T[   PDISP][0000:02:00.0][0xc000857b][ffff8800b78b4100] use(+1) == 2
>[    7.247677] nouveau T[   PDISP][0000:02:00.0][0xc000857b][ffff8800b78b4100] use(-1) == 1
>[    7.247679] nouveau T[   PDISP][0000:02:00.0][0xc000857b][ffff8800b78b4100] dec() == 1
>[    7.247682] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] dec() == 9
>[    7.247684] nouveau T[   PDISP][0000:02:00.0] use(-1) == 10
>[    7.247697] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] illegal class 0x917e
>[    7.247700] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] handle 0x917e0001 not found
>[    7.247703] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] illegal class 0x907e
>[    7.247706] nouveau D[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] handle 0x907e0001 not found
>[    7.247708] nouveau T[   PDISP][0000:02:00.0] use(+1) == 11
>[    7.247711] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] inc() == 11
>[    7.247713] nouveau T[   PDISP][0000:02:00.0] inc() == 13
>[    7.247715] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff8800b78b4200] created
>[    7.247718] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff8800b78b4200] use(+1) == 1
>[    7.247720] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff8800b78b4200] initialising...
>[    7.247723] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] use(+1) == 10
>[    7.247725] nouveau T[   PDISP][0000:02:00.0] use(+1) == 12
>[    7.247738] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff8800b78b4200] initialised
>[    7.247740] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff8800b78b4200] inc() == 2
>[    7.247743] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff8800b78b4200] use(+1) == 2
>[    7.247745] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff8800b78b4200] use(-1) == 1
>[    7.247748] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff8800b78b4200] dec() == 1
>[    7.247750] nouveau T[   PDISP][0000:02:00.0][0x80008570][ffff880233175060] dec() == 10
>[    7.247752] nouveau T[   PDISP][0000:02:00.0] use(-1) == 11
>[    7.247762] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff8800b78b4200] inc() == 2
>[    7.247764] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff8800b78b4200] inc() == 3
>[    7.247772] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff8800b78b4200] use(+1) == 2
>[    7.247782] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff8800b78b4200] dec() == 2
>[    7.247785] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff8800b78b4200] inc() == 3
>[    7.247787] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff8800b78b4200] inc() == 4
>[    7.247794] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff8800b78b4200] use(+1) == 3
>[    7.247803] nouveau T[   PDISP][0000:02:00.0][0xc000857e][ffff8800b78b4200] dec() == 3
>[    7.247992] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
>[    7.247994] [drm] Driver supports precise vblank timestamp query.
>[    7.264860] nouveau  [     DRM] MM: using COPY0 for buffer copies
>[    7.264903] nouveau D[   PDISP][0000:02:00.0] supervisor 0x00000010 0x000002a0
>[    7.264906] nouveau D[   PDISP][0000:02:00.0] Core:
>[    7.264913] nouveau D[   PDISP][0000:02:00.0] 	0x0084: 0x019e02e2 -> 0x80000000
>[    7.264920] nouveau D[   PDISP][0000:02:00.0] 	0x0088: 0x00000000 -> 0xf0000000
>[    7.264923] nouveau D[   PDISP][0000:02:00.0] Core - DAC 0:
>[    7.264930] nouveau D[   PDISP][0000:02:00.0] 	0x0400: 0x00000000              
>[    7.264936] nouveau D[   PDISP][0000:02:00.0] 	0x0404: 0x00000000              
>[    7.264943] nouveau D[   PDISP][0000:02:00.0] 	0x0420: 0x00010000              
>[    7.264947] nouveau D[   PDISP][0000:02:00.0] Core - DAC 1:
>[    7.264954] nouveau D[   PDISP][0000:02:00.0] 	0x0480: 0x00000000              
>[    7.264961] nouveau D[   PDISP][0000:02:00.0] 	0x0484: 0x00000000              
>[    7.264967] nouveau D[   PDISP][0000:02:00.0] 	0x04a0: 0x00010000              
>[    7.264970] nouveau D[   PDISP][0000:02:00.0] Core - DAC 2:
>[    7.264976] nouveau D[   PDISP][0000:02:00.0] 	0x0500: 0x00000000              
>[    7.264990] nouveau D[   PDISP][0000:02:00.0] 	0x0504: 0x00000000              
>[    7.264998] nouveau D[   PDISP][0000:02:00.0] 	0x0520: 0x00010000              
>[    7.265002] nouveau D[   PDISP][0000:02:00.0] Core - SOR 0:
>[    7.265011] nouveau D[   PDISP][0000:02:00.0] 	0x0600: 0x00003001 -> 0x00000000
>[    7.265014] nouveau D[   PDISP][0000:02:00.0] Core - SOR 1:
>[    7.265023] nouveau D[   PDISP][0000:02:00.0] 	0x0640: 0x00000000              
>[    7.265026] nouveau D[   PDISP][0000:02:00.0] Core - SOR 2:
>[    7.265032] nouveau D[   PDISP][0000:02:00.0] 	0x0680: 0x00000000              
>[    7.265034] nouveau D[   PDISP][0000:02:00.0] Core - SOR 3:
>[    7.265041] nouveau D[   PDISP][0000:02:00.0] 	0x06c0: 0x00000000              
>[    7.265043] nouveau D[   PDISP][0000:02:00.0] Core - PIOR 0:
>[    7.265051] nouveau D[   PDISP][0000:02:00.0] 	0x0700: 0x00000000              
>[    7.265053] nouveau D[   PDISP][0000:02:00.0] Core - PIOR 1:
>[    7.265059] nouveau D[   PDISP][0000:02:00.0] 	0x0740: 0x00000000              
>[    7.265062] nouveau D[   PDISP][0000:02:00.0] Core - PIOR 2:
>[    7.265068] nouveau D[   PDISP][0000:02:00.0] 	0x0780: 0x00000000              
>[    7.265070] nouveau D[   PDISP][0000:02:00.0] Core - HEAD 0:
>[    7.265077] nouveau D[   PDISP][0000:02:00.0] 	0x0800: 0x00000000              
>[    7.265084] nouveau D[   PDISP][0000:02:00.0] 	0x0804: 0x02811558 -> 0x00000000
>[    7.265090] nouveau D[   PDISP][0000:02:00.0] 	0x0808: 0x00000000              
>[    7.265097] nouveau D[   PDISP][0000:02:00.0] 	0x080c: 0x00000000              
>[    7.265104] nouveau D[   PDISP][0000:02:00.0] 	0x0810: 0x00000000              
>[    7.265111] nouveau D[   PDISP][0000:02:00.0] 	0x0814: 0x031605da -> 0x00050008
>[    7.265118] nouveau D[   PDISP][0000:02:00.0] 	0x0818: 0x0003001f -> 0x00000001
>[    7.265125] nouveau D[   PDISP][0000:02:00.0] 	0x081c: 0x00140053 -> 0x00010003
>[    7.265131] nouveau D[   PDISP][0000:02:00.0] 	0x0820: 0x031405a9 -> 0x00030004
>[    7.265138] nouveau D[   PDISP][0000:02:00.0] 	0x0824: 0x019f049f -> 0x00000001
>[    7.265145] nouveau D[   PDISP][0000:02:00.0] 	0x0828: 0x00000000              
>[    7.265152] nouveau D[   PDISP][0000:02:00.0] 	0x082c: 0x00000000              
>[    7.265158] nouveau D[   PDISP][0000:02:00.0] 	0x0830: 0x00000000              
>[    7.265165] nouveau D[   PDISP][0000:02:00.0] 	0x0838: 0x00000000              
>[    7.265172] nouveau D[   PDISP][0000:02:00.0] 	0x0840: 0x00000000              
>[    7.265178] nouveau D[   PDISP][0000:02:00.0] 	0x0844: 0x00000000              
>[    7.265185] nouveau D[   PDISP][0000:02:00.0] 	0x0848: 0x00000000              
>[    7.265192] nouveau D[   PDISP][0000:02:00.0] 	0x084c: 0x00000000              
>[    7.265198] nouveau D[   PDISP][0000:02:00.0] 	0x085c: 0x00000000              
>[    7.265205] nouveau D[   PDISP][0000:02:00.0] 	0x0860: 0x00000000              
>[    7.265212] nouveau D[   PDISP][0000:02:00.0] 	0x0864: 0x00000000              
>[    7.265218] nouveau D[   PDISP][0000:02:00.0] 	0x0868: 0x00000000              
>[    7.265226] nouveau D[   PDISP][0000:02:00.0] 	0x086c: 0x00000000              
>[    7.265232] nouveau D[   PDISP][0000:02:00.0] 	0x0870: 0x0000e900              
>[    7.265239] nouveau D[   PDISP][0000:02:00.0] 	0x0874: 0x00000000              
>[    7.265246] nouveau D[   PDISP][0000:02:00.0] 	0x0878: 0x00000000              
>[    7.265252] nouveau D[   PDISP][0000:02:00.0] 	0x0880: 0x20000000              
>[    7.265259] nouveau D[   PDISP][0000:02:00.0] 	0x0884: 0x00000000              
>[    7.265266] nouveau D[   PDISP][0000:02:00.0] 	0x089c: 0x00000000              
>[    7.265273] nouveau D[   PDISP][0000:02:00.0] 	0x08a0: 0x00000011 -> 0x00000000
>[    7.265279] nouveau D[   PDISP][0000:02:00.0] 	0x08a4: 0x00000000              
>[    7.265286] nouveau D[   PDISP][0000:02:00.0] 	0x08a8: 0x00040000              
>[    7.265292] nouveau D[   PDISP][0000:02:00.0] 	0x08c0: 0x00000000              
>[    7.265299] nouveau D[   PDISP][0000:02:00.0] 	0x08c4: 0x00000000              
>[    7.265306] nouveau D[   PDISP][0000:02:00.0] 	0x08c8: 0x00000000              
>[    7.265313] nouveau D[   PDISP][0000:02:00.0] 	0x08d4: 0x00000000              
>[    7.265320] nouveau D[   PDISP][0000:02:00.0] 	0x08d8: 0x03000556 -> 0x00000000
>[    7.265326] nouveau D[   PDISP][0000:02:00.0] 	0x08dc: 0x00000000              
>[    7.265333] nouveau D[   PDISP][0000:02:00.0] 	0x0900: 0x00000300              
>[    7.265340] nouveau D[   PDISP][0000:02:00.0] 	0x0904: 0x00000100              
>[    7.265346] nouveau D[   PDISP][0000:02:00.0] 	0x0910: 0x00000000              
>[    7.265354] nouveau D[   PDISP][0000:02:00.0] 	0x0914: 0x00000000              
>[    7.265356] nouveau D[   PDISP][0000:02:00.0] Core - HEAD 1:
>[    7.265363] nouveau D[   PDISP][0000:02:00.0] 	0x0c00: 0x00000000              
>[    7.265370] nouveau D[   PDISP][0000:02:00.0] 	0x0c04: 0x00000000              
>[    7.265376] nouveau D[   PDISP][0000:02:00.0] 	0x0c08: 0x00000000              
>[    7.265383] nouveau D[   PDISP][0000:02:00.0] 	0x0c0c: 0x00000000              
>[    7.265390] nouveau D[   PDISP][0000:02:00.0] 	0x0c10: 0x00000000              
>[    7.265396] nouveau D[   PDISP][0000:02:00.0] 	0x0c14: 0x00050008              
>[    7.265404] nouveau D[   PDISP][0000:02:00.0] 	0x0c18: 0x00000001              
>[    7.265411] nouveau D[   PDISP][0000:02:00.0] 	0x0c1c: 0x00010003              
>[    7.265417] nouveau D[   PDISP][0000:02:00.0] 	0x0c20: 0x00030004              
>[    7.265424] nouveau D[   PDISP][0000:02:00.0] 	0x0c24: 0x00000001              
>[    7.265430] nouveau D[   PDISP][0000:02:00.0] 	0x0c28: 0x00000000              
>[    7.265436] nouveau D[   PDISP][0000:02:00.0] 	0x0c2c: 0x00000000              
>[    7.265443] nouveau D[   PDISP][0000:02:00.0] 	0x0c30: 0x00000000              
>[    7.265450] nouveau D[   PDISP][0000:02:00.0] 	0x0c38: 0x00000000              
>[    7.265456] nouveau D[   PDISP][0000:02:00.0] 	0x0c40: 0x00000000              
>[    7.265463] nouveau D[   PDISP][0000:02:00.0] 	0x0c44: 0x00000000              
>[    7.265469] nouveau D[   PDISP][0000:02:00.0] 	0x0c48: 0x00000000              
>[    7.265476] nouveau D[   PDISP][0000:02:00.0] 	0x0c4c: 0x00000000              
>[    7.265482] nouveau D[   PDISP][0000:02:00.0] 	0x0c5c: 0x00000000              
>[    7.265490] nouveau D[   PDISP][0000:02:00.0] 	0x0c60: 0x00000000              
>[    7.265497] nouveau D[   PDISP][0000:02:00.0] 	0x0c64: 0x00000000              
>[    7.265503] nouveau D[   PDISP][0000:02:00.0] 	0x0c68: 0x00000000              
>[    7.265510] nouveau D[   PDISP][0000:02:00.0] 	0x0c6c: 0x00000000              
>[    7.265516] nouveau D[   PDISP][0000:02:00.0] 	0x0c70: 0x0000e900              
>[    7.265523] nouveau D[   PDISP][0000:02:00.0] 	0x0c74: 0x00000000              
>[    7.265530] nouveau D[   PDISP][0000:02:00.0] 	0x0c78: 0x00000000              
>[    7.265537] nouveau D[   PDISP][0000:02:00.0] 	0x0c80: 0x20000000              
>[    7.265543] nouveau D[   PDISP][0000:02:00.0] 	0x0c84: 0x00000000              
>[    7.265550] nouveau D[   PDISP][0000:02:00.0] 	0x0c9c: 0x00000000              
>[    7.265557] nouveau D[   PDISP][0000:02:00.0] 	0x0ca0: 0x00000000              
>[    7.265563] nouveau D[   PDISP][0000:02:00.0] 	0x0ca4: 0x00000000              
>[    7.265570] nouveau D[   PDISP][0000:02:00.0] 	0x0ca8: 0x00040000              
>[    7.265577] nouveau D[   PDISP][0000:02:00.0] 	0x0cc0: 0x00000000              
>[    7.265583] nouveau D[   PDISP][0000:02:00.0] 	0x0cc4: 0x00000000              
>[    7.265590] nouveau D[   PDISP][0000:02:00.0] 	0x0cc8: 0x00000000              
>[    7.265596] nouveau D[   PDISP][0000:02:00.0] 	0x0cd4: 0x00000000              
>[    7.265603] nouveau D[   PDISP][0000:02:00.0] 	0x0cd8: 0x00000000              
>[    7.265610] nouveau D[   PDISP][0000:02:00.0] 	0x0cdc: 0x00000000              
>[    7.265616] nouveau D[   PDISP][0000:02:00.0] 	0x0d00: 0x00000300              
>[    7.265623] nouveau D[   PDISP][0000:02:00.0] 	0x0d04: 0x00000100              
>[    7.265630] nouveau D[   PDISP][0000:02:00.0] 	0x0d10: 0x00000000              
>[    7.265636] nouveau D[   PDISP][0000:02:00.0] 	0x0d14: 0x00000000              
>[    7.387605] random: nonblocking pool is initialized
>[    8.434737] nouveau D[   PDISP][0000:02:00.0] supervisor 0x00000020 0x000002b0
>[    8.434795] nouveau D[   PDISP][0000:02:00.0] supervisor 0x00000040 0x000002b0
>[    8.434874] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:19:LVDS-1]
>[    8.434881] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    8.435831] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    8.435833] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    8.436781] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    8.436783] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    8.467097] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    8.468929] [drm:drm_mode_detailed] composite sync not supported
>[    8.468943] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:19:LVDS-1] probed modes :
>[    8.468948] [drm:drm_mode_debug_printmodeline] Modeline 27:"1366x768" 60 71000 1366 1414 1446 1498 768 769 773 790 0x48 0xa
>[    8.468951] [drm:drm_mode_debug_printmodeline] Modeline 30:"1024x768" 60 63500 1024 1072 1176 1328 768 771 775 798 0x40 0x6
>[    8.468954] [drm:drm_mode_debug_printmodeline] Modeline 31:"800x600" 60 38250 800 832 912 1024 600 603 607 624 0x40 0x6
>[    8.468957] [drm:drm_mode_debug_printmodeline] Modeline 33:"640x480" 59 23750 640 664 720 800 480 483 487 500 0x40 0x6
>[    8.468960] [drm:drm_mode_debug_printmodeline] Modeline 32:"720x400" 60 22250 720 744 808 896 400 403 413 417 0x40 0x6
>[    8.468963] [drm:drm_mode_debug_printmodeline] Modeline 34:"640x400" 60 20000 640 664 720 800 400 403 409 417 0x40 0x6
>[    8.468966] [drm:drm_mode_debug_printmodeline] Modeline 35:"640x350" 60 17500 640 664 720 800 350 353 363 366 0x40 0x6
>[    8.468968] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:21:HDMI-A-1]
>[    8.468978] nouveau D[     I2C][0000:02:00.0] PAD:S:00: -> PORT:06
>[    8.470044] nouveau D[     I2C][0000:02:00.0] PAD:S:00: -> NULL
>[    8.470047] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:21:HDMI-A-1] disconnected
>[    8.470049] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:23:DP-1]
>[    8.470052] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000000 8
>[    8.470261] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109007 0x10000008
>[    8.470266] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01840a11
>[    8.470271] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00010000
>[    8.470276] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    8.470281] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    8.470286] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 4: 0x00000050 1
>[    8.470301] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    8.470303] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    8.470305] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    8.470307] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    8.470447] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01104000 0x10000001
>[    8.470452] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 1: 0x00000050 1
>[    8.470604] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01101000 0x10000001
>[    8.470609] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01840a00
>[    8.470614] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00010000
>[    8.470618] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    8.470623] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7f7f7f7
>[    8.470628] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 4: 0x00000050 1
>[    8.470643] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    8.470645] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    8.470647] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    8.470649] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    8.470786] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01104000 0x10000001
>[    8.470791] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[    8.471070] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[    8.471074] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xffffff00
>[    8.471079] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00ffffff
>[    8.471084] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x2846f022
>[    8.471088] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00000000
>[    8.471093] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[    8.471372] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[    8.471376] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x04011520
>[    8.471381] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x781a29a5
>[    8.471385] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xa4c53726
>[    8.471390] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x259b4c55
>[    8.471395] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[    8.471675] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[    8.471679] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xa1545012
>[    8.471684] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x40810008
>[    8.471689] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01018081
>[    8.471694] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01010101
>[    8.471698] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[    8.471978] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[    8.471982] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01010101
>[    8.471987] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x299a0101
>[    8.471991] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x8451d0a0
>[    8.471996] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x98503022
>[    8.472001] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[    8.472280] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[    8.472283] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xff980036
>[    8.472288] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x1c000010
>[    8.472293] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xfd000000
>[    8.472297] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x184c3200
>[    8.472302] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[    8.472580] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[    8.472585] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a010e53
>[    8.472589] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x20202020
>[    8.472594] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00002020
>[    8.472598] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x4c00fc00
>[    8.472604] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[    8.472881] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[    8.472886] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30393141
>[    8.472891] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x20200a35
>[    8.472896] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x20202020
>[    8.472900] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xff000000
>[    8.472905] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 1: 0x00000050 16
>[    8.473183] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110100f 0x10000010
>[    8.473188] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x434e4300
>[    8.473192] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30323331
>[    8.473197] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[    8.473201] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[    8.473215] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:23:DP-1] probed modes :
>[    8.473218] [drm:drm_mode_debug_printmodeline] Modeline 36:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[    8.473221] [drm:drm_mode_debug_printmodeline] Modeline 38:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[    8.473224] [drm:drm_mode_debug_printmodeline] Modeline 37:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[    8.473227] [drm:drm_mode_debug_printmodeline] Modeline 42:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[    8.473231] [drm:drm_mode_debug_printmodeline] Modeline 39:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[    8.473234] [drm:drm_mode_debug_printmodeline] Modeline 40:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[    8.473237] [drm:drm_mode_debug_printmodeline] Modeline 41:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[    8.473238] [drm:drm_setup_crtcs] 
>[    8.473240] [drm:drm_enable_connectors] connector 19 enabled? yes
>[    8.473242] [drm:drm_enable_connectors] connector 21 enabled? no
>[    8.473244] [drm:drm_enable_connectors] connector 23 enabled? yes
>[    8.473246] [drm:drm_target_preferred] looking for cmdline mode on connector 19
>[    8.473247] [drm:drm_target_preferred] looking for preferred mode on connector 19
>[    8.473249] [drm:drm_target_preferred] found mode 1366x768
>[    8.473250] [drm:drm_target_preferred] looking for cmdline mode on connector 23
>[    8.473252] [drm:drm_target_preferred] looking for preferred mode on connector 23
>[    8.473254] [drm:drm_target_preferred] found mode 1440x900
>[    8.473255] [drm:drm_setup_crtcs] picking CRTCs for 8192x8192 config
>[    8.473258] [drm:drm_setup_crtcs] desired mode 1366x768 set on crtc 16
>[    8.473260] [drm:drm_setup_crtcs] desired mode 1440x900 set on crtc 18
>[    8.474026] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff880233001d80] inc() == 4
>[    8.474029] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff880233001d80] inc() == 5
>[    8.474037] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff880233001d80] use(+1) == 4
>[    8.474048] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff880233001d80] dec() == 4
>[    8.474052] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff8800370b8900] inc() == 4
>[    8.474054] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff8800370b8900] inc() == 5
>[    8.474061] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff8800370b8900] use(+1) == 4
>[    8.474071] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff8800370b8900] dec() == 4
>[    8.474075] nouveau T[   PDISP][0000:02:00.0][0xc000857d][ffff880233001980] inc() == 4
>[    8.474077] nouveau T[   PDISP][0000:02:00.0][0xc000857d][ffff880233001980] inc() == 5
>[    8.474085] nouveau T[   PDISP][0000:02:00.0][0xc000857d][ffff880233001980] use(+1) == 4
>[    8.474094] nouveau T[   PDISP][0000:02:00.0][0xc000857d][ffff880233001980] dec() == 4
>[    8.533974] nouveau  [     DRM] allocated 1440x900 fb: 0x60000, bo ffff8800b792dc00
>[    8.534053] fbcon: nouveaufb (fb0) is primary device
>[    8.535985] [drm:drm_crtc_helper_set_config] 
>[    8.535987] [drm:drm_crtc_helper_set_config] [CRTC:16] [FB:46] #connectors=1 (x y) (0 0)
>[    8.535989] [drm:drm_crtc_helper_set_config] crtc has no fb, full mode set
>[    8.535989] [drm:drm_crtc_helper_set_config] modes are different, full mode set
>[    8.535992] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    8.535994] [drm:drm_mode_debug_printmodeline] Modeline 44:"1366x768" 60 71000 1366 1414 1446 1498 768 769 773 790 0x48 0xa
>[    8.535995] [drm:drm_crtc_helper_set_config] encoder changed, full mode switch
>[    8.535996] [drm:drm_crtc_helper_set_config] crtc changed, full mode switch
>[    8.535997] [drm:drm_crtc_helper_set_config] [CONNECTOR:19:LVDS-1] to [CRTC:16]
>[    8.535998] [drm:drm_crtc_helper_set_config] attempting to set mode from userspace
>[    8.536000] [drm:drm_mode_debug_printmodeline] Modeline 44:"1366x768" 60 71000 1366 1414 1446 1498 768 769 773 790 0x48 0xa
>[    8.536002] [drm:drm_crtc_helper_set_mode] [CRTC:16]
>[    8.536031] [drm:drm_crtc_helper_set_mode] [ENCODER:20:LVDS-20] set [MODE:44:1366x768]
>[    8.536115] nouveau D[   PDISP][0000:02:00.0] supervisor 0x00000010 0x000002a0
>[    8.536119] nouveau D[   PDISP][0000:02:00.0] Core:
>[    8.536125] nouveau D[   PDISP][0000:02:00.0] 	0x0084: 0x019e02e2 -> 0x00000000
>[    8.536132] nouveau D[   PDISP][0000:02:00.0] 	0x0088: 0xf0000000              
>[    8.536133] nouveau D[   PDISP][0000:02:00.0] Core - DAC 0:
>[    8.536139] nouveau D[   PDISP][0000:02:00.0] 	0x0400: 0x00000000              
>[    8.536145] nouveau D[   PDISP][0000:02:00.0] 	0x0404: 0x00000000              
>[    8.536151] nouveau D[   PDISP][0000:02:00.0] 	0x0420: 0x00010000              
>[    8.536152] nouveau D[   PDISP][0000:02:00.0] Core - DAC 1:
>[    8.536158] nouveau D[   PDISP][0000:02:00.0] 	0x0480: 0x00000000              
>[    8.536164] nouveau D[   PDISP][0000:02:00.0] 	0x0484: 0x00000000              
>[    8.536170] nouveau D[   PDISP][0000:02:00.0] 	0x04a0: 0x00010000              
>[    8.536172] nouveau D[   PDISP][0000:02:00.0] Core - DAC 2:
>[    8.536178] nouveau D[   PDISP][0000:02:00.0] 	0x0500: 0x00000000              
>[    8.536184] nouveau D[   PDISP][0000:02:00.0] 	0x0504: 0x00000000              
>[    8.536190] nouveau D[   PDISP][0000:02:00.0] 	0x0520: 0x00010000              
>[    8.536191] nouveau D[   PDISP][0000:02:00.0] Core - SOR 0:
>[    8.536197] nouveau D[   PDISP][0000:02:00.0] 	0x0600: 0x00000000 -> 0x00003001
>[    8.536198] nouveau D[   PDISP][0000:02:00.0] Core - SOR 1:
>[    8.536204] nouveau D[   PDISP][0000:02:00.0] 	0x0640: 0x00000000              
>[    8.536205] nouveau D[   PDISP][0000:02:00.0] Core - SOR 2:
>[    8.536211] nouveau D[   PDISP][0000:02:00.0] 	0x0680: 0x00000000              
>[    8.536213] nouveau D[   PDISP][0000:02:00.0] Core - SOR 3:
>[    8.536218] nouveau D[   PDISP][0000:02:00.0] 	0x06c0: 0x00000000              
>[    8.536220] nouveau D[   PDISP][0000:02:00.0] Core - PIOR 0:
>[    8.536225] nouveau D[   PDISP][0000:02:00.0] 	0x0700: 0x00000000              
>[    8.536227] nouveau D[   PDISP][0000:02:00.0] Core - PIOR 1:
>[    8.536232] nouveau D[   PDISP][0000:02:00.0] 	0x0740: 0x00000000              
>[    8.536234] nouveau D[   PDISP][0000:02:00.0] Core - PIOR 2:
>[    8.536239] nouveau D[   PDISP][0000:02:00.0] 	0x0780: 0x00000000              
>[    8.536241] nouveau D[   PDISP][0000:02:00.0] Core - HEAD 0:
>[    8.536247] nouveau D[   PDISP][0000:02:00.0] 	0x0800: 0x00000000              
>[    8.536253] nouveau D[   PDISP][0000:02:00.0] 	0x0804: 0x00000000 -> 0x00811558
>[    8.536259] nouveau D[   PDISP][0000:02:00.0] 	0x0808: 0x00000000              
>[    8.536265] nouveau D[   PDISP][0000:02:00.0] 	0x080c: 0x00000000              
>[    8.536270] nouveau D[   PDISP][0000:02:00.0] 	0x0810: 0x00000000              
>[    8.536276] nouveau D[   PDISP][0000:02:00.0] 	0x0814: 0x00050008 -> 0x031605da
>[    8.536282] nouveau D[   PDISP][0000:02:00.0] 	0x0818: 0x00000001 -> 0x0003001f
>[    8.536288] nouveau D[   PDISP][0000:02:00.0] 	0x081c: 0x00010003 -> 0x00140053
>[    8.536294] nouveau D[   PDISP][0000:02:00.0] 	0x0820: 0x00030004 -> 0x031405a9
>[    8.536300] nouveau D[   PDISP][0000:02:00.0] 	0x0824: 0x00000001              
>[    8.536306] nouveau D[   PDISP][0000:02:00.0] 	0x0828: 0x00000000 -> 0x000001a5
>[    8.536312] nouveau D[   PDISP][0000:02:00.0] 	0x082c: 0x00000000              
>[    8.536318] nouveau D[   PDISP][0000:02:00.0] 	0x0830: 0x00000000              
>[    8.536324] nouveau D[   PDISP][0000:02:00.0] 	0x0838: 0x00000000              
>[    8.536330] nouveau D[   PDISP][0000:02:00.0] 	0x0840: 0x00000000 -> 0xc0000000
>[    8.536336] nouveau D[   PDISP][0000:02:00.0] 	0x0844: 0x00000000 -> 0x00000410
>[    8.536342] nouveau D[   PDISP][0000:02:00.0] 	0x0848: 0x00000000              
>[    8.536348] nouveau D[   PDISP][0000:02:00.0] 	0x084c: 0x00000000              
>[    8.536354] nouveau D[   PDISP][0000:02:00.0] 	0x085c: 0x00000000 -> 0xf0000001
>[    8.536360] nouveau D[   PDISP][0000:02:00.0] 	0x0860: 0x00000000 -> 0x00000600
>[    8.536365] nouveau D[   PDISP][0000:02:00.0] 	0x0864: 0x00000000              
>[    8.536372] nouveau D[   PDISP][0000:02:00.0] 	0x0868: 0x00000000 -> 0x038405a0
>[    8.536378] nouveau D[   PDISP][0000:02:00.0] 	0x086c: 0x00000000 -> 0x00101700
>[    8.536384] nouveau D[   PDISP][0000:02:00.0] 	0x0870: 0x0000e900 -> 0x0000cf00
>[    8.536390] nouveau D[   PDISP][0000:02:00.0] 	0x0874: 0x00000000 -> 0xffff0000
>[    8.536396] nouveau D[   PDISP][0000:02:00.0] 	0x0878: 0x00000000              
>[    8.536402] nouveau D[   PDISP][0000:02:00.0] 	0x0880: 0x20000000 -> 0x05000000
>[    8.536408] nouveau D[   PDISP][0000:02:00.0] 	0x0884: 0x00000000              
>[    8.536414] nouveau D[   PDISP][0000:02:00.0] 	0x089c: 0x00000000              
>[    8.536420] nouveau D[   PDISP][0000:02:00.0] 	0x08a0: 0x00000000 -> 0x00000011
>[    8.536425] nouveau D[   PDISP][0000:02:00.0] 	0x08a4: 0x00000000              
>[    8.536431] nouveau D[   PDISP][0000:02:00.0] 	0x08a8: 0x00040000              
>[    8.536437] nouveau D[   PDISP][0000:02:00.0] 	0x08c0: 0x00000000              
>[    8.536443] nouveau D[   PDISP][0000:02:00.0] 	0x08c4: 0x00000000              
>[    8.536449] nouveau D[   PDISP][0000:02:00.0] 	0x08c8: 0x00000000 -> 0x03000556
>[    8.536455] nouveau D[   PDISP][0000:02:00.0] 	0x08d4: 0x00000000              
>[    8.536461] nouveau D[   PDISP][0000:02:00.0] 	0x08d8: 0x00000000 -> 0x03000556
>[    8.536467] nouveau D[   PDISP][0000:02:00.0] 	0x08dc: 0x00000000 -> 0x03000556
>[    8.536474] nouveau D[   PDISP][0000:02:00.0] 	0x0900: 0x00000300 -> 0x00000311
>[    8.536479] nouveau D[   PDISP][0000:02:00.0] 	0x0904: 0x00000100              
>[    8.536485] nouveau D[   PDISP][0000:02:00.0] 	0x0910: 0x00000000              
>[    8.536491] nouveau D[   PDISP][0000:02:00.0] 	0x0914: 0x00000000              
>[    8.536492] nouveau D[   PDISP][0000:02:00.0] Core - HEAD 1:
>[    8.536498] nouveau D[   PDISP][0000:02:00.0] 	0x0c00: 0x00000000              
>[    8.536504] nouveau D[   PDISP][0000:02:00.0] 	0x0c04: 0x00000000              
>[    8.536510] nouveau D[   PDISP][0000:02:00.0] 	0x0c08: 0x00000000              
>[    8.536515] nouveau D[   PDISP][0000:02:00.0] 	0x0c0c: 0x00000000              
>[    8.536521] nouveau D[   PDISP][0000:02:00.0] 	0x0c10: 0x00000000              
>[    8.536527] nouveau D[   PDISP][0000:02:00.0] 	0x0c14: 0x00050008              
>[    8.536533] nouveau D[   PDISP][0000:02:00.0] 	0x0c18: 0x00000001              
>[    8.536539] nouveau D[   PDISP][0000:02:00.0] 	0x0c1c: 0x00010003              
>[    8.536545] nouveau D[   PDISP][0000:02:00.0] 	0x0c20: 0x00030004              
>[    8.536551] nouveau D[   PDISP][0000:02:00.0] 	0x0c24: 0x00000001              
>[    8.536556] nouveau D[   PDISP][0000:02:00.0] 	0x0c28: 0x00000000              
>[    8.536562] nouveau D[   PDISP][0000:02:00.0] 	0x0c2c: 0x00000000              
>[    8.536568] nouveau D[   PDISP][0000:02:00.0] 	0x0c30: 0x00000000              
>[    8.536574] nouveau D[   PDISP][0000:02:00.0] 	0x0c38: 0x00000000              
>[    8.536580] nouveau D[   PDISP][0000:02:00.0] 	0x0c40: 0x00000000              
>[    8.536586] nouveau D[   PDISP][0000:02:00.0] 	0x0c44: 0x00000000              
>[    8.536592] nouveau D[   PDISP][0000:02:00.0] 	0x0c48: 0x00000000              
>[    8.536598] nouveau D[   PDISP][0000:02:00.0] 	0x0c4c: 0x00000000              
>[    8.536603] nouveau D[   PDISP][0000:02:00.0] 	0x0c5c: 0x00000000              
>[    8.536609] nouveau D[   PDISP][0000:02:00.0] 	0x0c60: 0x00000000              
>[    8.536615] nouveau D[   PDISP][0000:02:00.0] 	0x0c64: 0x00000000              
>[    8.536621] nouveau D[   PDISP][0000:02:00.0] 	0x0c68: 0x00000000              
>[    8.536627] nouveau D[   PDISP][0000:02:00.0] 	0x0c6c: 0x00000000              
>[    8.536632] nouveau D[   PDISP][0000:02:00.0] 	0x0c70: 0x0000e900              
>[    8.536638] nouveau D[   PDISP][0000:02:00.0] 	0x0c74: 0x00000000              
>[    8.536644] nouveau D[   PDISP][0000:02:00.0] 	0x0c78: 0x00000000              
>[    8.536650] nouveau D[   PDISP][0000:02:00.0] 	0x0c80: 0x20000000              
>[    8.536656] nouveau D[   PDISP][0000:02:00.0] 	0x0c84: 0x00000000              
>[    8.536662] nouveau D[   PDISP][0000:02:00.0] 	0x0c9c: 0x00000000              
>[    8.536667] nouveau D[   PDISP][0000:02:00.0] 	0x0ca0: 0x00000000              
>[    8.536673] nouveau D[   PDISP][0000:02:00.0] 	0x0ca4: 0x00000000              
>[    8.536679] nouveau D[   PDISP][0000:02:00.0] 	0x0ca8: 0x00040000              
>[    8.536685] nouveau D[   PDISP][0000:02:00.0] 	0x0cc0: 0x00000000              
>[    8.536691] nouveau D[   PDISP][0000:02:00.0] 	0x0cc4: 0x00000000              
>[    8.536697] nouveau D[   PDISP][0000:02:00.0] 	0x0cc8: 0x00000000              
>[    8.536703] nouveau D[   PDISP][0000:02:00.0] 	0x0cd4: 0x00000000              
>[    8.536708] nouveau D[   PDISP][0000:02:00.0] 	0x0cd8: 0x00000000              
>[    8.536714] nouveau D[   PDISP][0000:02:00.0] 	0x0cdc: 0x00000000              
>[    8.536720] nouveau D[   PDISP][0000:02:00.0] 	0x0d00: 0x00000300              
>[    8.536726] nouveau D[   PDISP][0000:02:00.0] 	0x0d04: 0x00000100              
>[    8.536732] nouveau D[   PDISP][0000:02:00.0] 	0x0d10: 0x00000000              
>[    8.536737] nouveau D[   PDISP][0000:02:00.0] 	0x0d14: 0x00000000              
>[    8.536776] nouveau D[   PDISP][0000:02:00.0] supervisor 0x00000020 0x000002b0
>[    9.085933] nouveau D[   PDISP][0000:02:00.0] supervisor 0x00000040 0x000002b0
>[    9.102875] [drm:drm_crtc_helper_set_config] Setting connector DPMS state to on
>[    9.102877] [drm:drm_crtc_helper_set_config] 	[CONNECTOR:19:LVDS-1] set DPMS on
>[    9.119534] [drm:drm_crtc_helper_set_config] 
>[    9.119535] [drm:drm_crtc_helper_set_config] [CRTC:18] [FB:46] #connectors=1 (x y) (0 0)
>[    9.119536] [drm:drm_crtc_helper_set_config] crtc has no fb, full mode set
>[    9.119537] [drm:drm_crtc_helper_set_config] modes are different, full mode set
>[    9.119538] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    9.119540] [drm:drm_mode_debug_printmodeline] Modeline 45:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[    9.119540] [drm:drm_crtc_helper_set_config] encoder changed, full mode switch
>[    9.119541] [drm:drm_crtc_helper_set_config] [CONNECTOR:19:LVDS-1] to [CRTC:16]
>[    9.119542] [drm:drm_crtc_helper_set_config] crtc changed, full mode switch
>[    9.119542] [drm:drm_crtc_helper_set_config] [CONNECTOR:23:DP-1] to [CRTC:18]
>[    9.119543] [drm:drm_crtc_helper_set_config] attempting to set mode from userspace
>[    9.119544] [drm:drm_mode_debug_printmodeline] Modeline 45:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[    9.119546] [drm:drm_crtc_helper_set_mode] [CRTC:18]
>[    9.119573] [drm:drm_crtc_helper_set_mode] [ENCODER:24:TMDS-24] set [MODE:45:1440x900]
>[    9.119594] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000100 2
>[    9.119752] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109001 0x10000002
>[    9.119754] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x434e8406
>[    9.119758] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30323331
>[    9.119761] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[    9.119764] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[    9.119768] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000202 3
>[    9.119933] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109002 0x10000003
>[    9.119936] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x43017777
>[    9.119939] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30323331
>[    9.119942] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[    9.119945] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[    9.120039] nouveau D[   PDISP][0000:02:00.0] supervisor 0x00000010 0x00000540
>[    9.120041] nouveau D[   PDISP][0000:02:00.0] Core:
>[    9.120046] nouveau D[   PDISP][0000:02:00.0] 	0x0084: 0x019e02e2 -> 0x00000000
>[    9.120052] nouveau D[   PDISP][0000:02:00.0] 	0x0088: 0xf0000000              
>[    9.120053] nouveau D[   PDISP][0000:02:00.0] Core - DAC 0:
>[    9.120059] nouveau D[   PDISP][0000:02:00.0] 	0x0400: 0x00000000              
>[    9.120064] nouveau D[   PDISP][0000:02:00.0] 	0x0404: 0x00000000              
>[    9.120070] nouveau D[   PDISP][0000:02:00.0] 	0x0420: 0x00010000              
>[    9.120071] nouveau D[   PDISP][0000:02:00.0] Core - DAC 1:
>[    9.120076] nouveau D[   PDISP][0000:02:00.0] 	0x0480: 0x00000000              
>[    9.120081] nouveau D[   PDISP][0000:02:00.0] 	0x0484: 0x00000000              
>[    9.120087] nouveau D[   PDISP][0000:02:00.0] 	0x04a0: 0x00010000              
>[    9.120088] nouveau D[   PDISP][0000:02:00.0] Core - DAC 2:
>[    9.120093] nouveau D[   PDISP][0000:02:00.0] 	0x0500: 0x00000000              
>[    9.120098] nouveau D[   PDISP][0000:02:00.0] 	0x0504: 0x00000000              
>[    9.120104] nouveau D[   PDISP][0000:02:00.0] 	0x0520: 0x00010000              
>[    9.120105] nouveau D[   PDISP][0000:02:00.0] Core - SOR 0:
>[    9.120110] nouveau D[   PDISP][0000:02:00.0] 	0x0600: 0x00003001              
>[    9.120111] nouveau D[   PDISP][0000:02:00.0] Core - SOR 1:
>[    9.120116] nouveau D[   PDISP][0000:02:00.0] 	0x0640: 0x00000000              
>[    9.120117] nouveau D[   PDISP][0000:02:00.0] Core - SOR 2:
>[    9.120123] nouveau D[   PDISP][0000:02:00.0] 	0x0680: 0x00000000 -> 0x00051802
>[    9.120124] nouveau D[   PDISP][0000:02:00.0] Core - SOR 3:
>[    9.120129] nouveau D[   PDISP][0000:02:00.0] 	0x06c0: 0x00000000              
>[    9.120130] nouveau D[   PDISP][0000:02:00.0] Core - PIOR 0:
>[    9.120136] nouveau D[   PDISP][0000:02:00.0] 	0x0700: 0x00000000              
>[    9.120137] nouveau D[   PDISP][0000:02:00.0] Core - PIOR 1:
>[    9.120142] nouveau D[   PDISP][0000:02:00.0] 	0x0740: 0x00000000              
>[    9.120143] nouveau D[   PDISP][0000:02:00.0] Core - PIOR 2:
>[    9.120148] nouveau D[   PDISP][0000:02:00.0] 	0x0780: 0x00000000              
>[    9.120149] nouveau D[   PDISP][0000:02:00.0] Core - HEAD 0:
>[    9.120154] nouveau D[   PDISP][0000:02:00.0] 	0x0800: 0x00000000              
>[    9.120160] nouveau D[   PDISP][0000:02:00.0] 	0x0804: 0x00811558              
>[    9.120165] nouveau D[   PDISP][0000:02:00.0] 	0x0808: 0x00000000              
>[    9.120170] nouveau D[   PDISP][0000:02:00.0] 	0x080c: 0x00000000              
>[    9.120176] nouveau D[   PDISP][0000:02:00.0] 	0x0810: 0x00000000              
>[    9.120181] nouveau D[   PDISP][0000:02:00.0] 	0x0814: 0x031605da              
>[    9.120186] nouveau D[   PDISP][0000:02:00.0] 	0x0818: 0x0003001f              
>[    9.120191] nouveau D[   PDISP][0000:02:00.0] 	0x081c: 0x00140053              
>[    9.120197] nouveau D[   PDISP][0000:02:00.0] 	0x0820: 0x031405a9              
>[    9.120202] nouveau D[   PDISP][0000:02:00.0] 	0x0824: 0x00000001              
>[    9.120208] nouveau D[   PDISP][0000:02:00.0] 	0x0828: 0x000001a5              
>[    9.120213] nouveau D[   PDISP][0000:02:00.0] 	0x082c: 0x00000000              
>[    9.120218] nouveau D[   PDISP][0000:02:00.0] 	0x0830: 0x00000000              
>[    9.120224] nouveau D[   PDISP][0000:02:00.0] 	0x0838: 0x00000000              
>[    9.120229] nouveau D[   PDISP][0000:02:00.0] 	0x0840: 0xc0000000              
>[    9.120234] nouveau D[   PDISP][0000:02:00.0] 	0x0844: 0x00000410              
>[    9.120240] nouveau D[   PDISP][0000:02:00.0] 	0x0848: 0x00000000              
>[    9.120245] nouveau D[   PDISP][0000:02:00.0] 	0x084c: 0x00000000              
>[    9.120250] nouveau D[   PDISP][0000:02:00.0] 	0x085c: 0xf0000001              
>[    9.120255] nouveau D[   PDISP][0000:02:00.0] 	0x0860: 0x00000600              
>[    9.120261] nouveau D[   PDISP][0000:02:00.0] 	0x0864: 0x00000000              
>[    9.120266] nouveau D[   PDISP][0000:02:00.0] 	0x0868: 0x038405a0              
>[    9.120271] nouveau D[   PDISP][0000:02:00.0] 	0x086c: 0x00101700              
>[    9.120277] nouveau D[   PDISP][0000:02:00.0] 	0x0870: 0x0000cf00              
>[    9.120282] nouveau D[   PDISP][0000:02:00.0] 	0x0874: 0xffff0000              
>[    9.120287] nouveau D[   PDISP][0000:02:00.0] 	0x0878: 0x00000000              
>[    9.120293] nouveau D[   PDISP][0000:02:00.0] 	0x0880: 0x05000000              
>[    9.120298] nouveau D[   PDISP][0000:02:00.0] 	0x0884: 0x00000000              
>[    9.120303] nouveau D[   PDISP][0000:02:00.0] 	0x089c: 0x00000000              
>[    9.120309] nouveau D[   PDISP][0000:02:00.0] 	0x08a0: 0x00000011              
>[    9.120314] nouveau D[   PDISP][0000:02:00.0] 	0x08a4: 0x00000000              
>[    9.120319] nouveau D[   PDISP][0000:02:00.0] 	0x08a8: 0x00040000              
>[    9.120325] nouveau D[   PDISP][0000:02:00.0] 	0x08c0: 0x00000000              
>[    9.120330] nouveau D[   PDISP][0000:02:00.0] 	0x08c4: 0x00000000              
>[    9.120336] nouveau D[   PDISP][0000:02:00.0] 	0x08c8: 0x03000556              
>[    9.120341] nouveau D[   PDISP][0000:02:00.0] 	0x08d4: 0x00000000              
>[    9.120346] nouveau D[   PDISP][0000:02:00.0] 	0x08d8: 0x03000556              
>[    9.120352] nouveau D[   PDISP][0000:02:00.0] 	0x08dc: 0x03000556              
>[    9.120357] nouveau D[   PDISP][0000:02:00.0] 	0x0900: 0x00000311              
>[    9.120362] nouveau D[   PDISP][0000:02:00.0] 	0x0904: 0x00000100              
>[    9.120368] nouveau D[   PDISP][0000:02:00.0] 	0x0910: 0x00000000              
>[    9.120373] nouveau D[   PDISP][0000:02:00.0] 	0x0914: 0x00000000              
>[    9.120374] nouveau D[   PDISP][0000:02:00.0] Core - HEAD 1:
>[    9.120380] nouveau D[   PDISP][0000:02:00.0] 	0x0c00: 0x00000000              
>[    9.120385] nouveau D[   PDISP][0000:02:00.0] 	0x0c04: 0x00000000 -> 0x0081a004
>[    9.120390] nouveau D[   PDISP][0000:02:00.0] 	0x0c08: 0x00000000              
>[    9.120396] nouveau D[   PDISP][0000:02:00.0] 	0x0c0c: 0x00000000              
>[    9.120401] nouveau D[   PDISP][0000:02:00.0] 	0x0c10: 0x00000000              
>[    9.120407] nouveau D[   PDISP][0000:02:00.0] 	0x0c14: 0x00050008 -> 0x03a60770
>[    9.120412] nouveau D[   PDISP][0000:02:00.0] 	0x0c18: 0x00000001 -> 0x00050097
>[    9.120417] nouveau D[   PDISP][0000:02:00.0] 	0x0c1c: 0x00010003 -> 0x001e017f
>[    9.120423] nouveau D[   PDISP][0000:02:00.0] 	0x0c20: 0x00030004 -> 0x03a2071f
>[    9.120428] nouveau D[   PDISP][0000:02:00.0] 	0x0c24: 0x00000001              
>[    9.120434] nouveau D[   PDISP][0000:02:00.0] 	0x0c28: 0x00000000 -> 0x0000023c
>[    9.120439] nouveau D[   PDISP][0000:02:00.0] 	0x0c2c: 0x00000000              
>[    9.120445] nouveau D[   PDISP][0000:02:00.0] 	0x0c30: 0x00000000              
>[    9.120450] nouveau D[   PDISP][0000:02:00.0] 	0x0c38: 0x00000000              
>[    9.120456] nouveau D[   PDISP][0000:02:00.0] 	0x0c40: 0x00000000 -> 0xc0000000
>[    9.120461] nouveau D[   PDISP][0000:02:00.0] 	0x0c44: 0x00000000 -> 0x00000470
>[    9.120466] nouveau D[   PDISP][0000:02:00.0] 	0x0c48: 0x00000000              
>[    9.120472] nouveau D[   PDISP][0000:02:00.0] 	0x0c4c: 0x00000000              
>[    9.120477] nouveau D[   PDISP][0000:02:00.0] 	0x0c5c: 0x00000000 -> 0xf0000001
>[    9.120483] nouveau D[   PDISP][0000:02:00.0] 	0x0c60: 0x00000000 -> 0x00000600
>[    9.120488] nouveau D[   PDISP][0000:02:00.0] 	0x0c64: 0x00000000              
>[    9.120493] nouveau D[   PDISP][0000:02:00.0] 	0x0c68: 0x00000000 -> 0x038405a0
>[    9.120498] nouveau D[   PDISP][0000:02:00.0] 	0x0c6c: 0x00000000 -> 0x00101700
>[    9.120504] nouveau D[   PDISP][0000:02:00.0] 	0x0c70: 0x0000e900 -> 0x0000cf00
>[    9.120509] nouveau D[   PDISP][0000:02:00.0] 	0x0c74: 0x00000000 -> 0xffff0000
>[    9.120515] nouveau D[   PDISP][0000:02:00.0] 	0x0c78: 0x00000000              
>[    9.120520] nouveau D[   PDISP][0000:02:00.0] 	0x0c80: 0x20000000 -> 0x05000000
>[    9.120525] nouveau D[   PDISP][0000:02:00.0] 	0x0c84: 0x00000000              
>[    9.120531] nouveau D[   PDISP][0000:02:00.0] 	0x0c9c: 0x00000000              
>[    9.120536] nouveau D[   PDISP][0000:02:00.0] 	0x0ca0: 0x00000000 -> 0x00000002
>[    9.120541] nouveau D[   PDISP][0000:02:00.0] 	0x0ca4: 0x00000000              
>[    9.120546] nouveau D[   PDISP][0000:02:00.0] 	0x0ca8: 0x00040000              
>[    9.120552] nouveau D[   PDISP][0000:02:00.0] 	0x0cc0: 0x00000000              
>[    9.120557] nouveau D[   PDISP][0000:02:00.0] 	0x0cc4: 0x00000000              
>[    9.120563] nouveau D[   PDISP][0000:02:00.0] 	0x0cc8: 0x00000000 -> 0x038405a0
>[    9.120568] nouveau D[   PDISP][0000:02:00.0] 	0x0cd4: 0x00000000              
>[    9.120573] nouveau D[   PDISP][0000:02:00.0] 	0x0cd8: 0x00000000 -> 0x038405a0
>[    9.120579] nouveau D[   PDISP][0000:02:00.0] 	0x0cdc: 0x00000000 -> 0x038405a0
>[    9.120584] nouveau D[   PDISP][0000:02:00.0] 	0x0d00: 0x00000300 -> 0x00000311
>[    9.120590] nouveau D[   PDISP][0000:02:00.0] 	0x0d04: 0x00000100              
>[    9.120595] nouveau D[   PDISP][0000:02:00.0] 	0x0d10: 0x00000000              
>[    9.120600] nouveau D[   PDISP][0000:02:00.0] 	0x0d14: 0x00000000              
>[    9.120637] nouveau D[   PDISP][0000:02:00.0] supervisor 0x00000020 0x00000550
>[    9.120686] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000100 2
>[    9.120842] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109001 0x10000002
>[    9.120845] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x43018406
>[    9.120848] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30323331
>[    9.120851] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[    9.120854] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[    9.120859] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000202 3
>[    9.121024] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109002 0x10000003
>[    9.121027] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x43017777
>[    9.121030] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30323331
>[    9.121034] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[    9.121037] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[    9.121657] nouveau D[   PDISP][0000:02:00.0] supervisor 0x00000040 0x00000550
>[    9.154920] [drm:drm_crtc_helper_set_config] Setting connector DPMS state to on
>[    9.154921] [drm:drm_crtc_helper_set_config] 	[CONNECTOR:23:DP-1] set DPMS on
>[    9.154922] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 8: 0x00000600 1
>[    9.154935] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000001
>[    9.154936] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    9.154937] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    9.154937] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    9.155075] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01108000 0x10000000
>[    9.157094] [drm:drm_crtc_helper_set_config] 
>[    9.157095] [drm:drm_crtc_helper_set_config] [CRTC:16] [FB:46] #connectors=1 (x y) (0 0)
>[    9.157096] [drm:drm_crtc_helper_set_config] [CONNECTOR:19:LVDS-1] to [CRTC:16]
>[    9.157097] [drm:drm_crtc_helper_set_config] [CONNECTOR:23:DP-1] to [CRTC:18]
>[    9.157098] [drm:drm_crtc_helper_set_config] 
>[    9.157099] [drm:drm_crtc_helper_set_config] [CRTC:18] [FB:46] #connectors=1 (x y) (0 0)
>[    9.157100] [drm:drm_crtc_helper_set_config] [CONNECTOR:19:LVDS-1] to [CRTC:16]
>[    9.157100] [drm:drm_crtc_helper_set_config] [CONNECTOR:23:DP-1] to [CRTC:18]
>[    9.158469] Console: switching to colour frame buffer device 170x48
>[    9.158472] [drm:drm_crtc_helper_set_config] 
>[    9.158473] [drm:drm_crtc_helper_set_config] [CRTC:16] [FB:46] #connectors=1 (x y) (0 0)
>[    9.158474] [drm:drm_crtc_helper_set_config] [CONNECTOR:19:LVDS-1] to [CRTC:16]
>[    9.158475] [drm:drm_crtc_helper_set_config] [CONNECTOR:23:DP-1] to [CRTC:18]
>[    9.158475] [drm:drm_crtc_helper_set_config] 
>[    9.158476] [drm:drm_crtc_helper_set_config] [CRTC:18] [FB:46] #connectors=1 (x y) (0 0)
>[    9.158477] [drm:drm_crtc_helper_set_config] [CONNECTOR:19:LVDS-1] to [CRTC:16]
>[    9.158478] [drm:drm_crtc_helper_set_config] [CONNECTOR:23:DP-1] to [CRTC:18]
>[    9.161184] nouveau 0000:02:00.0: fb0: nouveaufb frame buffer device
>[    9.161185] nouveau 0000:02:00.0: registered panic notifier
>[    9.214308] [drm] Initialized nouveau 1.2.1 20120801 for 0000:02:00.0 on minor 0
>[    9.214522] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[3] ENCODERS[4]
>[    9.214529] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[3] ENCODERS[4]
>[    9.214535] [drm:drm_mode_getconnector] [CONNECTOR:19:?]
>[    9.214539] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:19:LVDS-1]
>[    9.214546] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    9.215514] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    9.215519] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    9.216482] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    9.216486] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[    9.246834] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[    9.248197] [drm:drm_mode_detailed] composite sync not supported
>[    9.248224] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:19:LVDS-1] probed modes :
>[    9.248232] [drm:drm_mode_debug_printmodeline] Modeline 27:"1366x768" 60 71000 1366 1414 1446 1498 768 769 773 790 0x48 0xa
>[    9.248238] [drm:drm_mode_debug_printmodeline] Modeline 30:"1024x768" 60 63500 1024 1072 1176 1328 768 771 775 798 0x40 0x6
>[    9.248244] [drm:drm_mode_debug_printmodeline] Modeline 31:"800x600" 60 38250 800 832 912 1024 600 603 607 624 0x40 0x6
>[    9.248250] [drm:drm_mode_debug_printmodeline] Modeline 33:"640x480" 59 23750 640 664 720 800 480 483 487 500 0x40 0x6
>[    9.248259] [drm:drm_mode_debug_printmodeline] Modeline 32:"720x400" 60 22250 720 744 808 896 400 403 413 417 0x40 0x6
>[    9.248261] [drm:drm_mode_debug_printmodeline] Modeline 34:"640x400" 60 20000 640 664 720 800 400 403 409 417 0x40 0x6
>[    9.248263] [drm:drm_mode_debug_printmodeline] Modeline 35:"640x350" 60 17500 640 664 720 800 350 353 363 366 0x40 0x6
>[    9.248274] [drm:drm_mode_getconnector] [CONNECTOR:19:?]
>[    9.250414] [drm:drm_mode_getconnector] [CONNECTOR:21:?]
>[    9.250417] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:21:HDMI-A-1]
>[    9.250427] nouveau D[     I2C][0000:02:00.0] PAD:S:00: -> PORT:06
>[    9.251490] nouveau D[     I2C][0000:02:00.0] PAD:S:00: -> NULL
>[    9.251492] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:21:HDMI-A-1] disconnected
>[    9.251494] [drm:drm_mode_getconnector] [CONNECTOR:21:?]
>[    9.251495] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:21:HDMI-A-1]
>[    9.251503] nouveau D[     I2C][0000:02:00.0] PAD:S:00: -> PORT:06
>[    9.252560] nouveau D[     I2C][0000:02:00.0] PAD:S:00: -> NULL
>[    9.252561] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:21:HDMI-A-1] disconnected
>[    9.252565] [drm:drm_mode_getconnector] [CONNECTOR:23:?]
>[    9.252566] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:23:DP-1]
>[    9.252570] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000000 8
>[    9.252777] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109007 0x10000008
>[    9.252779] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01840a11
>[    9.252783] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00010000
>[    9.252787] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[    9.252791] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[    9.252796] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 4: 0x00000050 1
>[    9.252808] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    9.252809] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    9.252810] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    9.252812] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    9.252950] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01104000 0x10000001
>[    9.252953] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 1: 0x00000050 1
>[    9.253103] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01101000 0x10000001
>[    9.253106] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01840a00
>[    9.253109] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00010000
>[    9.253113] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[    9.253117] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[    9.253122] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 4: 0x00000050 1
>[    9.253134] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    9.253135] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    9.253136] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    9.253138] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[    9.253273] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01104000 0x10000001
>[    9.253276] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[    9.253551] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[    9.253554] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xffffff00
>[    9.253558] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00ffffff
>[    9.253561] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x2846f022
>[    9.253565] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00000000
>[    9.253570] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[    9.253846] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[    9.253849] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x04011520
>[    9.253853] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x781a29a5
>[    9.253856] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xa4c53726
>[    9.253860] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x259b4c55
>[    9.253865] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[    9.254140] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[    9.254142] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xa1545012
>[    9.254146] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x40810008
>[    9.254303] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01018081
>[    9.254311] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01010101
>[    9.254324] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[    9.254602] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[    9.254604] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01010101
>[    9.254609] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x299a0101
>[    9.254613] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x8451d0a0
>[    9.254618] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x98503022
>[    9.254622] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[    9.254898] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[    9.254900] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xff980036
>[    9.254904] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x1c000010
>[    9.254908] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xfd000000
>[    9.254912] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x184c3200
>[    9.254917] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[    9.255195] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[    9.255198] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a010e53
>[    9.255202] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x20202020
>[    9.255206] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00002020
>[    9.255210] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x4c00fc00
>[    9.255215] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[    9.255491] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[    9.255494] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30393141
>[    9.255498] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x20200a35
>[    9.255502] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x20202020
>[    9.255506] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xff000000
>[    9.255510] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 1: 0x00000050 16
>[    9.255787] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110100f 0x10000010
>[    9.255790] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x434e4300
>[    9.255794] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30323331
>[    9.255798] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[    9.255802] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[    9.255816] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:23:DP-1] probed modes :
>[    9.255819] [drm:drm_mode_debug_printmodeline] Modeline 36:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[    9.255821] [drm:drm_mode_debug_printmodeline] Modeline 38:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[    9.255824] [drm:drm_mode_debug_printmodeline] Modeline 37:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[    9.255827] [drm:drm_mode_debug_printmodeline] Modeline 42:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[    9.255829] [drm:drm_mode_debug_printmodeline] Modeline 39:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[    9.255831] [drm:drm_mode_debug_printmodeline] Modeline 40:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[    9.255833] [drm:drm_mode_debug_printmodeline] Modeline 41:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[    9.255836] [drm:drm_mode_getconnector] [CONNECTOR:23:?]
>[    9.268343] [drm:drm_mode_addfb] [FB:29]
>[    9.472865] [drm:drm_mode_addfb] [FB:29]
>[    9.472882] [drm:drm_mode_setcrtc] [CRTC:16]
>[    9.472885] [drm:drm_mode_setcrtc] [CONNECTOR:19:LVDS-1]
>[    9.472886] [drm:drm_crtc_helper_set_config] 
>[    9.472888] [drm:drm_crtc_helper_set_config] [CRTC:16] [FB:29] #connectors=1 (x y) (0 0)
>[    9.472891] [drm:drm_crtc_helper_set_config] [CONNECTOR:19:LVDS-1] to [CRTC:16]
>[    9.472893] [drm:drm_crtc_helper_set_config] [CONNECTOR:23:DP-1] to [CRTC:18]
>[    9.502830] [drm:drm_mode_addfb] [FB:43]
>[    9.502858] [drm:drm_mode_setcrtc] [CRTC:18]
>[    9.502865] [drm:drm_mode_setcrtc] [CONNECTOR:23:DP-1]
>[    9.502868] [drm:drm_crtc_helper_set_config] 
>[    9.502872] [drm:drm_crtc_helper_set_config] [CRTC:18] [FB:43] #connectors=1 (x y) (0 0)
>[    9.502879] [drm:drm_crtc_helper_set_config] [CONNECTOR:19:LVDS-1] to [CRTC:16]
>[    9.502883] [drm:drm_crtc_helper_set_config] [CONNECTOR:23:DP-1] to [CRTC:18]
>[    9.524519] [drm:drm_mode_setcrtc] [CRTC:16]
>[    9.524523] [drm:drm_mode_setcrtc] [CONNECTOR:19:LVDS-1]
>[    9.524525] [drm:drm_crtc_helper_set_config] 
>[    9.524526] [drm:drm_crtc_helper_set_config] [CRTC:16] [FB:29] #connectors=1 (x y) (0 0)
>[    9.524529] [drm:drm_crtc_helper_set_config] [CONNECTOR:19:LVDS-1] to [CRTC:16]
>[    9.524530] [drm:drm_crtc_helper_set_config] [CONNECTOR:23:DP-1] to [CRTC:18]
>[    9.527452] [drm:drm_mode_setcrtc] [CRTC:18]
>[    9.527455] [drm:drm_mode_setcrtc] [CONNECTOR:23:DP-1]
>[    9.527457] [drm:drm_crtc_helper_set_config] 
>[    9.527458] [drm:drm_crtc_helper_set_config] [CRTC:18] [FB:43] #connectors=1 (x y) (0 0)
>[    9.527461] [drm:drm_crtc_helper_set_config] [CONNECTOR:19:LVDS-1] to [CRTC:16]
>[    9.527462] [drm:drm_crtc_helper_set_config] [CONNECTOR:23:DP-1] to [CRTC:18]
>[   14.249146] BTRFS: device label root devid 1 transid 1048447 /dev/dm-1
>[   14.426056] BTRFS info (device dm-1): disk space caching is enabled
>[   14.426060] BTRFS: has skinny extents
>[   17.535550] systemd-journald[143]: Received SIGTERM from PID 1 (systemd).
>[   24.435406] [drm:drm_crtc_helper_set_config] 
>[   24.435408] [drm:drm_crtc_helper_set_config] [CRTC:16] [FB:46] #connectors=1 (x y) (0 0)
>[   24.435412] [drm:drm_crtc_helper_set_config] [CONNECTOR:19:LVDS-1] to [CRTC:16]
>[   24.435412] [drm:drm_crtc_helper_set_config] [CONNECTOR:23:DP-1] to [CRTC:18]
>[   24.464233] [drm:drm_crtc_helper_set_config] 
>[   24.464238] [drm:drm_crtc_helper_set_config] [CRTC:18] [FB:46] #connectors=1 (x y) (0 0)
>[   24.464243] [drm:drm_crtc_helper_set_config] [CONNECTOR:19:LVDS-1] to [CRTC:16]
>[   24.464246] [drm:drm_crtc_helper_set_config] [CONNECTOR:23:DP-1] to [CRTC:18]
>[   27.722054] BTRFS info (device dm-1): enabling auto defrag
>[   27.722057] BTRFS info (device dm-1): disk space caching is enabled
>[   28.366493] systemd-journald[564]: Received request to flush runtime journal from PID 1
>[   33.013320] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: IRQ: 4
>[   33.013331] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000100 2
>[   33.013494] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109001 0x10000002
>[   33.013497] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00008406
>[   33.013501] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30320080
>[   33.013505] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   33.013508] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   33.013513] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000202 3
>[   33.013677] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109002 0x10000003
>[   33.013679] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00000000
>[   33.013683] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30320080
>[   33.013687] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   33.013691] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   33.013695] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: no inter-lane alignment
>[   35.003995] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000102 1
>[   35.004147] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109000 0x10000001
>[   35.004151] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00000000
>[   35.004155] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30320080
>[   35.004159] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   35.004163] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   35.004168] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 8: 0x00000102 1
>[   35.004180] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000020
>[   35.004181] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   35.004182] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   35.004184] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   35.004322] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01108000 0x10000000
>[   35.004326] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x0000000d 1
>[   35.004479] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109000 0x10000001
>[   35.004486] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00000000
>[   35.004494] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30320080
>[   35.004499] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   35.004504] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   35.004511] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: 4 lanes at 162000 KB/s
>[   35.004538] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 8: 0x00000100 2
>[   35.004553] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00008406
>[   35.004556] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   35.004560] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   35.004562] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   35.004708] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01108001 0x10000000
>[   35.004711] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: training pattern 1
>[   35.004714] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000102 1
>[   35.004863] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109000 0x10000001
>[   35.004866] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00000020
>[   35.004870] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30320080
>[   35.004874] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   35.004878] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   35.004882] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 8: 0x00000102 1
>[   35.004894] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000021
>[   35.004896] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   35.004897] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   35.004899] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   35.005037] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01108000 0x10000000
>[   35.005041] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: config lane 0 00 00
>[   35.005052] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: config lane 1 00 00
>[   35.005060] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: config lane 2 00 00
>[   35.005070] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: config lane 3 00 00
>[   35.005079] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 8: 0x00000103 4
>[   35.005092] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   35.005094] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   35.005095] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   35.005096] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   35.005258] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01108003 0x10000000
>[   35.993068] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000202 6
>[   35.993263] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109005 0x10000006
>[   35.993267] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00801111
>[   35.993271] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30320000
>[   35.993275] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   35.993279] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   35.993284] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: status 11 11 80 00 00 00
>[   35.993287] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: training pattern 2
>[   35.993291] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000102 1
>[   35.993441] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109000 0x10000001
>[   35.993444] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00801121
>[   35.993447] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30320000
>[   35.993452] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   35.993456] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   35.993460] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 8: 0x00000102 1
>[   35.993473] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000022
>[   35.993475] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   35.993476] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   35.993478] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   35.993616] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01108000 0x10000000
>[   36.981293] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000202 6
>[   36.981483] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109005 0x10000006
>[   36.981486] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01817777
>[   36.981490] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30320000
>[   36.981494] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   36.981498] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   36.981503] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: status 77 77 81 01 00 00
>[   36.981505] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: training pattern 0
>[   36.981510] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000102 1
>[   36.981657] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109000 0x10000001
>[   36.981659] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01817722
>[   36.981663] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30320000
>[   36.981667] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   36.981671] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   36.981676] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 8: 0x00000102 1
>[   36.981689] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000020
>[   36.981690] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   36.981692] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   36.981693] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   36.981831] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01108000 0x10000000
>[   36.981838] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000102 1
>[   36.981989] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109000 0x10000001
>[   36.981992] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01817720
>[   36.981996] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30320000
>[   36.982000] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   36.982004] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   36.982009] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 8: 0x00000102 1
>[   36.982021] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   36.982022] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   36.982024] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   36.982026] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   36.982164] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01108000 0x10000000
>[   36.982167] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: training complete
>[   36.982203] nouveau D[   PDISP][0000:02:00.0] 02:0006:0344: IRQ: 4
>[   36.982205] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000100 2
>[   36.982365] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109001 0x10000002
>[   36.982367] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01818406
>[   36.982371] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30320000
>[   36.982375] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   36.982380] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   36.982384] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000202 3
>[   36.982550] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109002 0x10000003
>[   36.982554] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01017777
>[   36.982559] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30320000
>[   36.982564] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   36.982568] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   39.073751] microcode: CPU0 sig=0x106e5, pf=0x10, revision=0x4
>[   39.073759] microcode: Missing Free firmware (non-Free firmware loading is disabled)
>[   39.385979] input: PC Speaker as /devices/platform/pcspkr/input/input12
>[   39.553230] shpchp: Standard Hot Plug PCI Controller Driver version: 0.4
>[   39.814685] microcode: CPU1 sig=0x106e5, pf=0x10, revision=0x4
>[   39.814691] microcode: Missing Free firmware (non-Free firmware loading is disabled)
>[   39.814923] microcode: CPU2 sig=0x106e5, pf=0x10, revision=0x4
>[   39.814926] microcode: Missing Free firmware (non-Free firmware loading is disabled)
>[   39.815119] microcode: CPU3 sig=0x106e5, pf=0x10, revision=0x4
>[   39.815122] microcode: Missing Free firmware (non-Free firmware loading is disabled)
>[   39.815821] microcode: CPU4 sig=0x106e5, pf=0x10, revision=0x4
>[   39.815828] microcode: Missing Free firmware (non-Free firmware loading is disabled)
>[   39.816448] microcode: CPU5 sig=0x106e5, pf=0x10, revision=0x4
>[   39.816455] microcode: Missing Free firmware (non-Free firmware loading is disabled)
>[   39.816989] microcode: CPU6 sig=0x106e5, pf=0x10, revision=0x4
>[   39.816991] microcode: Missing Free firmware (non-Free firmware loading is disabled)
>[   39.817599] microcode: CPU7 sig=0x106e5, pf=0x10, revision=0x4
>[   39.817602] microcode: Missing Free firmware (non-Free firmware loading is disabled)
>[   39.818256] microcode: Microcode Update Driver: v2.00 <tigran@aivazian.fsnet.co.uk>, Peter Oruba
>[   40.081450] EDAC MC: Ver: 3.0.0
>[   40.193924] ACPI Warning: SystemIO range 0x0000000000000540-0x000000000000054f conflicts with OpRegion 0x0000000000000500-0x0000000000000549 (\_SB_.AMW0.GPIO) (20140926/utaddress-258)
>[   40.193930] ACPI Warning: SystemIO range 0x0000000000000540-0x000000000000054f conflicts with OpRegion 0x0000000000000500-0x0000000000000549 (\_SB_.PCI0.P0P2.PEGP.GPIO) (20140926/utaddress-258)
>[   40.193933] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
>[   40.193935] ACPI Warning: SystemIO range 0x0000000000000530-0x000000000000053f conflicts with OpRegion 0x0000000000000500-0x0000000000000549 (\_SB_.AMW0.GPIO) (20140926/utaddress-258)
>[   40.193938] ACPI Warning: SystemIO range 0x0000000000000530-0x000000000000053f conflicts with OpRegion 0x0000000000000500-0x0000000000000549 (\_SB_.PCI0.P0P2.PEGP.GPIO) (20140926/utaddress-258)
>[   40.193941] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
>[   40.193942] ACPI Warning: SystemIO range 0x0000000000000500-0x000000000000052f conflicts with OpRegion 0x0000000000000500-0x0000000000000549 (\_SB_.AMW0.GPIO) (20140926/utaddress-258)
>[   40.193945] ACPI Warning: SystemIO range 0x0000000000000500-0x000000000000052f conflicts with OpRegion 0x0000000000000500-0x0000000000000549 (\_SB_.PCI0.P0P2.PEGP.GPIO) (20140926/utaddress-258)
>[   40.193947] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
>[   40.193948] lpc_ich: Resource conflict(s) found affecting gpio_ich
>[   40.282525] EDAC i7core: Device not found: dev 00.0 PCI ID 8086:2c50
>[   40.295947] ACPI Warning: SystemIO range 0x000000000000f000-0x000000000000f01f conflicts with OpRegion 0x000000000000f000-0x000000000000f00f (\_SB_.PCI0.SMB_.SMBI) (20140926/utaddress-258)
>[   40.295953] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
>[   40.347390] Error: Driver 'pcspkr' is already registered, aborting...
>[   40.394450] dcdbas dcdbas: Dell Systems Management Base Driver (version 5.6.0-3.2)
>[   40.581325] snd_hda_intel 0000:00:1b.0: irq 33 for MSI/MSI-X
>[   40.581423] snd_hda_intel 0000:02:00.1: Disabling MSI
>[   40.581430] snd_hda_intel 0000:02:00.1: Handle VGA-switcheroo audio client
>[   40.734143] iTCO_vendor_support: vendor-support=0
>[   40.841517] iTCO_wdt: Intel TCO WatchDog Timer Driver v1.11
>[   40.841547] iTCO_wdt: Found a HM57 TCO device (Version=2, TCOBASE=0x0460)
>[   40.841931] iTCO_wdt: initialized. heartbeat=30 sec (nowayout=0)
>[   41.015692] input: Dell WMI hotkeys as /devices/virtual/input/input13
>[   41.292536] atkbd serio0: Unknown key released (translated set 2, code 0x7c on isa0060/serio0).
>[   41.292546] atkbd serio0: Use 'setkeycodes 7c <keycode>' to make it known.
>[   41.312419] sound hdaudioC0D0: ALC665: SKU not ready 0x598301f0
>[   41.312976] sound hdaudioC0D0: autoconfig: line_outs=1 (0x15/0x0/0x0/0x0/0x0) type:speaker
>[   41.312979] sound hdaudioC0D0:    speaker_outs=0 (0x0/0x0/0x0/0x0/0x0)
>[   41.312981] sound hdaudioC0D0:    hp_outs=2 (0x1b/0x19/0x0/0x0/0x0)
>[   41.312983] sound hdaudioC0D0:    mono: mono_out=0x0
>[   41.312985] sound hdaudioC0D0:    dig-out=0x1e/0x0
>[   41.312987] sound hdaudioC0D0:    inputs:
>[   41.312990] sound hdaudioC0D0:      Mic=0x1a
>[   41.312992] sound hdaudioC0D0:      Internal Mic=0x12
>[   41.323076] input: HDA Intel MID Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input16
>[   41.323210] input: HDA Intel MID Headphone as /devices/pci0000:00/0000:00:1b.0/sound/card0/input17
>[   41.323346] input: HDA Intel MID Headphone as /devices/pci0000:00/0000:00:1b.0/sound/card0/input18
>[   41.486163] atkbd serio0: Unknown key released (translated set 2, code 0x7c on isa0060/serio0).
>[   41.486167] atkbd serio0: Use 'setkeycodes 7c <keycode>' to make it known.
>[   41.524242] r8169 Gigabit Ethernet driver 2.3LK-NAPI loaded
>[   41.524522] r8169 0000:16:00.0: irq 34 for MSI/MSI-X
>[   41.524726] r8169 0000:16:00.0 eth0: RTL8168e/8111e at 0xffffc9001267e000, b8:ac:6f:c5:46:4e, XID 0c200000 IRQ 34
>[   41.524729] r8169 0000:16:00.0 eth0: jumbo features [frames: 9200 bytes, tx checksumming: ko]
>[   42.144927] kvm: VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL does not work properly. Using workaround
>[   42.334022] cfg80211: Calling CRDA to update world regulatory domain
>[   42.655911] psmouse serio4: synaptics: Touchpad model: 1, fw: 7.4, id: 0x1c0b1, caps: 0xd04773/0xa40000/0x8a0400, board id: 3655, fw id: 647759
>[   42.706592] input: SynPS/2 Synaptics TouchPad as /devices/platform/i8042/serio4/input/input20
>[   42.740709] input: HDA NVidia HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:03.0/0000:02:00.1/sound/card1/input21
>[   42.740813] input: HDA NVidia HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:03.0/0000:02:00.1/sound/card1/input22
>[   42.740916] input: HDA NVidia HDMI/DP,pcm=8 as /devices/pci0000:00/0000:00:03.0/0000:02:00.1/sound/card1/input23
>[   42.741020] input: HDA NVidia HDMI/DP,pcm=9 as /devices/pci0000:00/0000:00:03.0/0000:02:00.1/sound/card1/input24
>[   43.011677] ath5k 0000:11:00.0: registered as 'phy0'
>[   43.599960] ath: EEPROM regdomain: 0x62
>[   43.599963] ath: EEPROM indicates we should expect a direct regpair map
>[   43.599967] ath: Country alpha2 being used: 00
>[   43.599968] ath: Regpair used: 0x62
>[   43.599971] cfg80211: Updating information on frequency 2412 MHz with regulatory rule:
>[   43.599974] cfg80211: 2402000 KHz - 2472000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   43.599976] cfg80211: Updating information on frequency 2417 MHz with regulatory rule:
>[   43.599978] cfg80211: 2402000 KHz - 2472000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   43.599980] cfg80211: Updating information on frequency 2422 MHz with regulatory rule:
>[   43.599983] cfg80211: 2402000 KHz - 2472000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   43.599984] cfg80211: Updating information on frequency 2427 MHz with regulatory rule:
>[   43.599987] cfg80211: 2402000 KHz - 2472000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   43.599988] cfg80211: Updating information on frequency 2432 MHz with regulatory rule:
>[   43.599991] cfg80211: 2402000 KHz - 2472000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   43.599992] cfg80211: Updating information on frequency 2437 MHz with regulatory rule:
>[   43.599995] cfg80211: 2402000 KHz - 2472000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   43.599997] cfg80211: Updating information on frequency 2442 MHz with regulatory rule:
>[   43.599999] cfg80211: 2402000 KHz - 2472000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   43.600001] cfg80211: Updating information on frequency 2447 MHz with regulatory rule:
>[   43.600003] cfg80211: 2402000 KHz - 2472000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   43.600005] cfg80211: Updating information on frequency 2452 MHz with regulatory rule:
>[   43.600007] cfg80211: 2402000 KHz - 2472000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   43.600009] cfg80211: Updating information on frequency 2457 MHz with regulatory rule:
>[   43.600011] cfg80211: 2402000 KHz - 2472000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   43.600013] cfg80211: Updating information on frequency 2462 MHz with regulatory rule:
>[   43.600015] cfg80211: 2402000 KHz - 2472000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   43.600017] cfg80211: Updating information on frequency 2467 MHz with regulatory rule:
>[   43.600019] cfg80211: 2457000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   43.600021] cfg80211: Updating information on frequency 2472 MHz with regulatory rule:
>[   43.600023] cfg80211: 2457000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   43.600025] cfg80211: Updating information on frequency 2484 MHz with regulatory rule:
>[   43.600027] cfg80211: 2474000 KHz - 2494000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   43.600029] cfg80211: Disabling freq 5040 MHz as custom regd has no rule that fits it
>[   43.600031] cfg80211: Disabling freq 5060 MHz as custom regd has no rule that fits it
>[   43.600032] cfg80211: Disabling freq 5080 MHz as custom regd has no rule that fits it
>[   43.600034] cfg80211: Updating information on frequency 5180 MHz with regulatory rule:
>[   43.600036] cfg80211: 5140000 KHz - 5360000 KHz @ 80000 KHz), (N/A mBi, 3000 mBm)
>[   43.600038] cfg80211: Updating information on frequency 5200 MHz with regulatory rule:
>[   43.600041] cfg80211: 5140000 KHz - 5360000 KHz @ 80000 KHz), (N/A mBi, 3000 mBm)
>[   43.600042] cfg80211: Updating information on frequency 5220 MHz with regulatory rule:
>[   43.600045] cfg80211: 5140000 KHz - 5360000 KHz @ 80000 KHz), (N/A mBi, 3000 mBm)
>[   43.600046] cfg80211: Updating information on frequency 5240 MHz with regulatory rule:
>[   43.600049] cfg80211: 5140000 KHz - 5360000 KHz @ 80000 KHz), (N/A mBi, 3000 mBm)
>[   43.600051] cfg80211: Updating information on frequency 5260 MHz with regulatory rule:
>[   43.600053] cfg80211: 5140000 KHz - 5360000 KHz @ 80000 KHz), (N/A mBi, 3000 mBm)
>[   43.600055] cfg80211: Updating information on frequency 5280 MHz with regulatory rule:
>[   43.600057] cfg80211: 5140000 KHz - 5360000 KHz @ 80000 KHz), (N/A mBi, 3000 mBm)
>[   43.600059] cfg80211: Updating information on frequency 5300 MHz with regulatory rule:
>[   43.600061] cfg80211: 5140000 KHz - 5360000 KHz @ 80000 KHz), (N/A mBi, 3000 mBm)
>[   43.600063] cfg80211: Updating information on frequency 5320 MHz with regulatory rule:
>[   43.600065] cfg80211: 5140000 KHz - 5360000 KHz @ 80000 KHz), (N/A mBi, 3000 mBm)
>[   43.600067] cfg80211: Updating information on frequency 5500 MHz with regulatory rule:
>[   43.600069] cfg80211: 5460000 KHz - 5860000 KHz @ 80000 KHz), (N/A mBi, 3000 mBm)
>[   43.600071] cfg80211: Updating information on frequency 5520 MHz with regulatory rule:
>[   43.600073] cfg80211: 5460000 KHz - 5860000 KHz @ 80000 KHz), (N/A mBi, 3000 mBm)
>[   43.600075] cfg80211: Updating information on frequency 5540 MHz with regulatory rule:
>[   43.600077] cfg80211: 5460000 KHz - 5860000 KHz @ 80000 KHz), (N/A mBi, 3000 mBm)
>[   43.600079] cfg80211: Updating information on frequency 5560 MHz with regulatory rule:
>[   43.600082] cfg80211: 5460000 KHz - 5860000 KHz @ 80000 KHz), (N/A mBi, 3000 mBm)
>[   43.600083] cfg80211: Updating information on frequency 5580 MHz with regulatory rule:
>[   43.600085] cfg80211: 5460000 KHz - 5860000 KHz @ 80000 KHz), (N/A mBi, 3000 mBm)
>[   43.600087] cfg80211: Updating information on frequency 5600 MHz with regulatory rule:
>[   43.600090] cfg80211: 5460000 KHz - 5860000 KHz @ 80000 KHz), (N/A mBi, 3000 mBm)
>[   43.600091] cfg80211: Updating information on frequency 5620 MHz with regulatory rule:
>[   43.600094] cfg80211: 5460000 KHz - 5860000 KHz @ 80000 KHz), (N/A mBi, 3000 mBm)
>[   43.600096] cfg80211: Updating information on frequency 5640 MHz with regulatory rule:
>[   43.600098] cfg80211: 5460000 KHz - 5860000 KHz @ 80000 KHz), (N/A mBi, 3000 mBm)
>[   43.600100] cfg80211: Updating information on frequency 5660 MHz with regulatory rule:
>[   43.600102] cfg80211: 5460000 KHz - 5860000 KHz @ 80000 KHz), (N/A mBi, 3000 mBm)
>[   43.600104] cfg80211: Updating information on frequency 5680 MHz with regulatory rule:
>[   43.600106] cfg80211: 5460000 KHz - 5860000 KHz @ 80000 KHz), (N/A mBi, 3000 mBm)
>[   43.600108] cfg80211: Updating information on frequency 5700 MHz with regulatory rule:
>[   43.600110] cfg80211: 5460000 KHz - 5860000 KHz @ 80000 KHz), (N/A mBi, 3000 mBm)
>[   43.600112] cfg80211: Updating information on frequency 5745 MHz with regulatory rule:
>[   43.600114] cfg80211: 5460000 KHz - 5860000 KHz @ 80000 KHz), (N/A mBi, 3000 mBm)
>[   43.600116] cfg80211: Updating information on frequency 5765 MHz with regulatory rule:
>[   43.600118] cfg80211: 5460000 KHz - 5860000 KHz @ 80000 KHz), (N/A mBi, 3000 mBm)
>[   43.600120] cfg80211: Updating information on frequency 5785 MHz with regulatory rule:
>[   43.600122] cfg80211: 5460000 KHz - 5860000 KHz @ 80000 KHz), (N/A mBi, 3000 mBm)
>[   43.600124] cfg80211: Updating information on frequency 5805 MHz with regulatory rule:
>[   43.600127] cfg80211: 5460000 KHz - 5860000 KHz @ 80000 KHz), (N/A mBi, 3000 mBm)
>[   43.600128] cfg80211: Updating information on frequency 5825 MHz with regulatory rule:
>[   43.600131] cfg80211: 5460000 KHz - 5860000 KHz @ 80000 KHz), (N/A mBi, 3000 mBm)
>[   43.600181] cfg80211: Ignoring regulatory request set by core since the driver uses its own custom regulatory domain
>[   43.674477] ieee80211 phy0: Selected rate control algorithm 'minstrel_ht'
>[   43.674749] ath5k: phy0: Atheros AR5414 chip found (MAC: 0xa3, PHY: 0x61)
>[   44.826669] Adding 4194300k swap on /dev/mapper/lvm-swap.  Priority:-1 extents:1 across:4194300k 
>[   46.952251] Linux video capture interface: v2.00
>[   47.507686] uvcvideo: Found UVC 1.00 device Laptop_Integrated_Webcam_2HDM (0408:2fb2)
>[   47.535312] uvcvideo: No streaming interface found for terminal 6.
>[   47.535443] input: Laptop_Integrated_Webcam_2HDM as /devices/pci0000:00/0000:00:1a.0/usb1/1-1/1-1.4/1-1.4:1.0/input/input25
>[   47.535650] usbcore: registered new interface driver uvcvideo
>[   47.535655] USB Video Class driver (1.1.1)
>[   48.154606] cfg80211: Ignoring regulatory request set by core since the driver uses its own custom regulatory domain
>[   48.154611] cfg80211: World regulatory domain updated:
>[   48.154612] cfg80211:  DFS Master region: unset
>[   48.154613] cfg80211:   (start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp), (dfs_cac_time)
>[   48.154615] cfg80211:   (2402000 KHz - 2472000 KHz @ 40000 KHz), (N/A, 2000 mBm), (N/A)
>[   48.154617] cfg80211:   (2457000 KHz - 2482000 KHz @ 40000 KHz), (N/A, 2000 mBm), (N/A)
>[   48.154619] cfg80211:   (2474000 KHz - 2494000 KHz @ 20000 KHz), (N/A, 2000 mBm), (N/A)
>[   48.154621] cfg80211:   (5170000 KHz - 5250000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A, 2000 mBm), (N/A)
>[   48.154622] cfg80211:   (5250000 KHz - 5330000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A, 2000 mBm), (0 s)
>[   48.154624] cfg80211:   (5490000 KHz - 5730000 KHz @ 160000 KHz), (N/A, 2000 mBm), (0 s)
>[   48.154626] cfg80211:   (5735000 KHz - 5835000 KHz @ 80000 KHz), (N/A, 2000 mBm), (N/A)
>[   48.154627] cfg80211:   (57240000 KHz - 63720000 KHz @ 2160000 KHz), (N/A, 0 mBm), (N/A)
>[   58.762471] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[3] ENCODERS[4]
>[   58.762475] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[3] ENCODERS[4]
>[   58.762479] [drm:drm_mode_getconnector] [CONNECTOR:19:?]
>[   58.762482] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:19:LVDS-1]
>[   58.762488] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[   58.763447] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[   58.763450] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[   58.764399] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[   58.764401] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[   58.794891] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[   58.796439] [drm:drm_mode_detailed] composite sync not supported
>[   58.796453] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:19:LVDS-1] probed modes :
>[   58.796457] [drm:drm_mode_debug_printmodeline] Modeline 27:"1366x768" 60 71000 1366 1414 1446 1498 768 769 773 790 0x48 0xa
>[   58.796461] [drm:drm_mode_debug_printmodeline] Modeline 30:"1024x768" 60 63500 1024 1072 1176 1328 768 771 775 798 0x40 0x6
>[   58.796464] [drm:drm_mode_debug_printmodeline] Modeline 31:"800x600" 60 38250 800 832 912 1024 600 603 607 624 0x40 0x6
>[   58.796467] [drm:drm_mode_debug_printmodeline] Modeline 33:"640x480" 59 23750 640 664 720 800 480 483 487 500 0x40 0x6
>[   58.796470] [drm:drm_mode_debug_printmodeline] Modeline 32:"720x400" 60 22250 720 744 808 896 400 403 413 417 0x40 0x6
>[   58.796473] [drm:drm_mode_debug_printmodeline] Modeline 34:"640x400" 60 20000 640 664 720 800 400 403 409 417 0x40 0x6
>[   58.796475] [drm:drm_mode_debug_printmodeline] Modeline 35:"640x350" 60 17500 640 664 720 800 350 353 363 366 0x40 0x6
>[   58.796481] [drm:drm_mode_getconnector] [CONNECTOR:19:?]
>[   58.798344] [drm:drm_mode_getconnector] [CONNECTOR:21:?]
>[   58.798347] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:21:HDMI-A-1]
>[   58.798357] nouveau D[     I2C][0000:02:00.0] PAD:S:00: -> PORT:06
>[   58.799420] nouveau D[     I2C][0000:02:00.0] PAD:S:00: -> NULL
>[   58.799423] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:21:HDMI-A-1] disconnected
>[   58.799426] [drm:drm_mode_getconnector] [CONNECTOR:21:?]
>[   58.799427] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:21:HDMI-A-1]
>[   58.799435] nouveau D[     I2C][0000:02:00.0] PAD:S:00: -> PORT:06
>[   58.800501] nouveau D[     I2C][0000:02:00.0] PAD:S:00: -> NULL
>[   58.800503] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:21:HDMI-A-1] disconnected
>[   58.800508] [drm:drm_mode_getconnector] [CONNECTOR:23:?]
>[   58.800510] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:23:DP-1]
>[   58.800515] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000000 8
>[   58.800723] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109007 0x10000008
>[   58.800725] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01840a11
>[   58.800729] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00010000
>[   58.800733] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   58.800738] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   58.800743] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 4: 0x00000050 1
>[   58.800758] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   58.800759] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   58.800761] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   58.800762] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   58.800897] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01104000 0x10000001
>[   58.800900] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 1: 0x00000050 1
>[   58.801045] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01101000 0x10000001
>[   58.801048] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01840a00
>[   58.801052] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00010000
>[   58.801056] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   58.801061] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   58.801065] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 4: 0x00000050 1
>[   58.801078] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   58.801079] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   58.801081] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   58.801082] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   58.801217] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01104000 0x10000001
>[   58.801220] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[   58.801497] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[   58.801500] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xffffff00
>[   58.801504] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00ffffff
>[   58.801508] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x2846f022
>[   58.801512] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00000000
>[   58.801517] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[   58.801794] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[   58.801797] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x04011520
>[   58.801800] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x781a29a5
>[   58.801805] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xa4c53726
>[   58.801809] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x259b4c55
>[   58.801813] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[   58.802089] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[   58.802092] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xa1545012
>[   58.802096] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x40810008
>[   58.802100] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01018081
>[   58.802105] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01010101
>[   58.802109] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[   58.802386] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[   58.802388] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01010101
>[   58.802392] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x299a0101
>[   58.802396] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x8451d0a0
>[   58.802401] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x98503022
>[   58.802405] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[   58.802682] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[   58.802684] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xff980036
>[   58.802688] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x1c000010
>[   58.802692] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xfd000000
>[   58.802696] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x184c3200
>[   58.802701] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[   58.802978] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[   58.802981] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a010e53
>[   58.802985] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x20202020
>[   58.802989] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00002020
>[   58.802993] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x4c00fc00
>[   58.802997] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[   58.803326] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[   58.803334] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30393141
>[   58.803340] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x20200a35
>[   58.803349] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x20202020
>[   58.803353] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xff000000
>[   58.803358] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 1: 0x00000050 16
>[   58.803636] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110100f 0x10000010
>[   58.803639] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x434e4300
>[   58.803643] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30323331
>[   58.803647] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   58.803651] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   58.803666] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:23:DP-1] probed modes :
>[   58.803668] [drm:drm_mode_debug_printmodeline] Modeline 36:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[   58.803671] [drm:drm_mode_debug_printmodeline] Modeline 38:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   58.803673] [drm:drm_mode_debug_printmodeline] Modeline 37:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[   58.803675] [drm:drm_mode_debug_printmodeline] Modeline 42:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   58.803678] [drm:drm_mode_debug_printmodeline] Modeline 39:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   58.803680] [drm:drm_mode_debug_printmodeline] Modeline 40:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   58.803682] [drm:drm_mode_debug_printmodeline] Modeline 41:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   58.803685] [drm:drm_mode_getconnector] [CONNECTOR:23:?]
>[   58.815874] [drm:drm_mode_addfb] [FB:47]
>[   83.170409] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[3] ENCODERS[4]
>[   83.170413] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[3] ENCODERS[4]
>[   83.368742] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[3] ENCODERS[4]
>[   83.368745] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[3] ENCODERS[4]
>[   83.368757] [drm:drm_mode_getconnector] [CONNECTOR:19:?]
>[   83.368759] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:19:LVDS-1]
>[   83.368765] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[   83.369713] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[   83.369715] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[   83.370662] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[   83.370664] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[   83.401044] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[   83.402278] [drm:drm_mode_detailed] composite sync not supported
>[   83.402292] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:19:LVDS-1] probed modes :
>[   83.402296] [drm:drm_mode_debug_printmodeline] Modeline 27:"1366x768" 60 71000 1366 1414 1446 1498 768 769 773 790 0x48 0xa
>[   83.402300] [drm:drm_mode_debug_printmodeline] Modeline 30:"1024x768" 60 63500 1024 1072 1176 1328 768 771 775 798 0x40 0x6
>[   83.402303] [drm:drm_mode_debug_printmodeline] Modeline 31:"800x600" 60 38250 800 832 912 1024 600 603 607 624 0x40 0x6
>[   83.402306] [drm:drm_mode_debug_printmodeline] Modeline 33:"640x480" 59 23750 640 664 720 800 480 483 487 500 0x40 0x6
>[   83.402309] [drm:drm_mode_debug_printmodeline] Modeline 32:"720x400" 60 22250 720 744 808 896 400 403 413 417 0x40 0x6
>[   83.402312] [drm:drm_mode_debug_printmodeline] Modeline 34:"640x400" 60 20000 640 664 720 800 400 403 409 417 0x40 0x6
>[   83.402315] [drm:drm_mode_debug_printmodeline] Modeline 35:"640x350" 60 17500 640 664 720 800 350 353 363 366 0x40 0x6
>[   83.402321] [drm:drm_mode_getconnector] [CONNECTOR:19:?]
>[   83.402362] [drm:drm_mode_getconnector] [CONNECTOR:21:?]
>[   83.402365] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:21:HDMI-A-1]
>[   83.402375] nouveau D[     I2C][0000:02:00.0] PAD:S:00: -> PORT:06
>[   83.403488] nouveau D[     I2C][0000:02:00.0] PAD:S:00: -> NULL
>[   83.403491] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:21:HDMI-A-1] disconnected
>[   83.403495] [drm:drm_mode_getconnector] [CONNECTOR:21:?]
>[   83.403497] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:21:HDMI-A-1]
>[   83.403505] nouveau D[     I2C][0000:02:00.0] PAD:S:00: -> PORT:06
>[   83.404568] nouveau D[     I2C][0000:02:00.0] PAD:S:00: -> NULL
>[   83.404570] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:21:HDMI-A-1] disconnected
>[   83.404594] [drm:drm_mode_getconnector] [CONNECTOR:23:?]
>[   83.404597] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:23:DP-1]
>[   83.404602] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000000 8
>[   83.404810] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109007 0x10000008
>[   83.404815] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01840a11
>[   83.404820] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00010000
>[   83.404824] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   83.404829] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   83.404835] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 4: 0x00000050 1
>[   83.404851] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   83.404853] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   83.404855] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   83.404857] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   83.404994] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01104000 0x10000001
>[   83.405000] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 1: 0x00000050 1
>[   83.405152] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01101000 0x10000001
>[   83.405157] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01840a00
>[   83.405161] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00010000
>[   83.405166] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   83.405171] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   83.405176] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 4: 0x00000050 1
>[   83.405191] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   83.405193] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   83.405195] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   83.405197] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   83.405334] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01104000 0x10000001
>[   83.405339] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[   83.405617] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[   83.405621] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xffffff00
>[   83.405626] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00ffffff
>[   83.405631] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x2846f022
>[   83.405635] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00000000
>[   83.405640] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[   83.405919] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[   83.405924] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x04011520
>[   83.405929] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x781a29a5
>[   83.405933] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xa4c53726
>[   83.405938] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x259b4c55
>[   83.405943] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[   83.406221] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[   83.406226] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xa1545012
>[   83.406230] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x40810008
>[   83.406235] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01018081
>[   83.406240] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01010101
>[   83.406245] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[   83.406523] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[   83.406528] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01010101
>[   83.406532] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x299a0101
>[   83.406537] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x8451d0a0
>[   83.406542] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x98503022
>[   83.406547] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[   83.406826] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[   83.406830] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xff980036
>[   83.406835] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x1c000010
>[   83.406840] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xfd000000
>[   83.406844] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x184c3200
>[   83.406849] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[   83.407129] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[   83.407134] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a010e53
>[   83.407138] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x20202020
>[   83.407143] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00002020
>[   83.407148] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x4c00fc00
>[   83.407153] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[   83.407431] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[   83.407436] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30393141
>[   83.407440] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x20200a35
>[   83.407445] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x20202020
>[   83.407450] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xff000000
>[   83.407455] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 1: 0x00000050 16
>[   83.407734] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110100f 0x10000010
>[   83.407738] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x434e4300
>[   83.407743] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30323331
>[   83.407747] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   83.407752] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   83.407768] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:23:DP-1] probed modes :
>[   83.407771] [drm:drm_mode_debug_printmodeline] Modeline 36:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[   83.407774] [drm:drm_mode_debug_printmodeline] Modeline 38:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   83.407777] [drm:drm_mode_debug_printmodeline] Modeline 37:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[   83.407781] [drm:drm_mode_debug_printmodeline] Modeline 42:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   83.407784] [drm:drm_mode_debug_printmodeline] Modeline 39:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   83.407787] [drm:drm_mode_debug_printmodeline] Modeline 40:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   83.407790] [drm:drm_mode_debug_printmodeline] Modeline 41:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   83.407797] [drm:drm_mode_getconnector] [CONNECTOR:23:?]
>[   83.418010] [drm:drm_mode_getconnector] [CONNECTOR:19:?]
>[   83.418013] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:19:LVDS-1]
>[   83.418017] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[   83.418964] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[   83.418966] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[   83.419924] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[   83.419929] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> PORT:02
>[   83.450413] nouveau D[     I2C][0000:02:00.0] PAD:X:03: -> NULL
>[   83.451299] [drm:drm_mode_detailed] composite sync not supported
>[   83.451311] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:19:LVDS-1] probed modes :
>[   83.451315] [drm:drm_mode_debug_printmodeline] Modeline 27:"1366x768" 60 71000 1366 1414 1446 1498 768 769 773 790 0x48 0xa
>[   83.451318] [drm:drm_mode_debug_printmodeline] Modeline 30:"1024x768" 60 63500 1024 1072 1176 1328 768 771 775 798 0x40 0x6
>[   83.451321] [drm:drm_mode_debug_printmodeline] Modeline 31:"800x600" 60 38250 800 832 912 1024 600 603 607 624 0x40 0x6
>[   83.451324] [drm:drm_mode_debug_printmodeline] Modeline 33:"640x480" 59 23750 640 664 720 800 480 483 487 500 0x40 0x6
>[   83.451327] [drm:drm_mode_debug_printmodeline] Modeline 32:"720x400" 60 22250 720 744 808 896 400 403 413 417 0x40 0x6
>[   83.451330] [drm:drm_mode_debug_printmodeline] Modeline 34:"640x400" 60 20000 640 664 720 800 400 403 409 417 0x40 0x6
>[   83.451333] [drm:drm_mode_debug_printmodeline] Modeline 35:"640x350" 60 17500 640 664 720 800 350 353 363 366 0x40 0x6
>[   83.451339] [drm:drm_mode_getconnector] [CONNECTOR:19:?]
>[   83.451822] [drm:drm_mode_getconnector] [CONNECTOR:21:?]
>[   83.451825] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:21:HDMI-A-1]
>[   83.451834] nouveau D[     I2C][0000:02:00.0] PAD:S:00: -> PORT:06
>[   83.452926] nouveau D[     I2C][0000:02:00.0] PAD:S:00: -> NULL
>[   83.452929] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:21:HDMI-A-1] disconnected
>[   83.452933] [drm:drm_mode_getconnector] [CONNECTOR:21:?]
>[   83.452934] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:21:HDMI-A-1]
>[   83.452942] nouveau D[     I2C][0000:02:00.0] PAD:S:00: -> PORT:06
>[   83.454006] nouveau D[     I2C][0000:02:00.0] PAD:S:00: -> NULL
>[   83.454008] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:21:HDMI-A-1] disconnected
>[   83.454031] [drm:drm_mode_getconnector] [CONNECTOR:23:?]
>[   83.454033] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:23:DP-1]
>[   83.454037] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000000 8
>[   83.454245] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109007 0x10000008
>[   83.454250] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01840a11
>[   83.454254] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00010000
>[   83.454259] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   83.454264] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   83.454270] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 4: 0x00000050 1
>[   83.454285] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   83.454287] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   83.454289] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   83.454291] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   83.454432] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01104000 0x10000001
>[   83.454437] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 1: 0x00000050 1
>[   83.454587] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01101000 0x10000001
>[   83.454592] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01840a00
>[   83.454597] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00010000
>[   83.454602] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   83.454606] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   83.454612] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 4: 0x00000050 1
>[   83.454626] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   83.454629] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   83.454631] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   83.454634] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   83.454768] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01104000 0x10000001
>[   83.454773] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[   83.455051] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[   83.455056] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xffffff00
>[   83.455060] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00ffffff
>[   83.455065] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x2846f022
>[   83.455070] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00000000
>[   83.455075] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[   83.455354] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[   83.455359] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x04011520
>[   83.455363] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x781a29a5
>[   83.455368] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xa4c53726
>[   83.455374] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x259b4c55
>[   83.455379] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[   83.455658] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[   83.455663] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xa1545012
>[   83.455668] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x40810008
>[   83.455672] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01018081
>[   83.455677] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01010101
>[   83.455682] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[   83.455961] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[   83.455966] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x01010101
>[   83.455970] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x299a0101
>[   83.455975] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x8451d0a0
>[   83.455980] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x98503022
>[   83.455985] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[   83.456263] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[   83.456268] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xff980036
>[   83.456273] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x1c000010
>[   83.456277] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xfd000000
>[   83.456282] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x184c3200
>[   83.456287] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[   83.456565] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[   83.456570] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a010e53
>[   83.456575] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x20202020
>[   83.456579] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x00002020
>[   83.456584] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x4c00fc00
>[   83.456589] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 5: 0x00000050 16
>[   83.456868] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110500f 0x10000010
>[   83.456872] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30393141
>[   83.456877] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x20200a35
>[   83.456882] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x20202020
>[   83.456886] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xff000000
>[   83.456892] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 1: 0x00000050 16
>[   83.457170] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x0110100f 0x10000010
>[   83.457175] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x434e4300
>[   83.457180] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30323331
>[   83.457185] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   83.457189] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   83.457204] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:23:DP-1] probed modes :
>[   83.457207] [drm:drm_mode_debug_printmodeline] Modeline 36:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[   83.457210] [drm:drm_mode_debug_printmodeline] Modeline 38:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   83.457213] [drm:drm_mode_debug_printmodeline] Modeline 37:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[   83.457217] [drm:drm_mode_debug_printmodeline] Modeline 42:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   83.457220] [drm:drm_mode_debug_printmodeline] Modeline 39:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   83.457223] [drm:drm_mode_debug_printmodeline] Modeline 40:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   83.457226] [drm:drm_mode_debug_printmodeline] Modeline 41:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   83.457229] [drm:drm_mode_getconnector] [CONNECTOR:23:?]
>[   83.731990] nouveau T[     I2C][0000:02:00.0] inc() == 2
>[   83.731995] nouveau T[   PDISP][0000:02:00.0] inc() == 14
>[   86.324021] 0000:16:00.0: Missing Free firmware (non-Free firmware loading is disabled)
>[   86.324042] r8169 0000:16:00.0: Direct firmware load for /*(DEBLOBBED)*/ failed with error -2
>[   86.324046] r8169 0000:16:00.0 eth0: unable to load firmware patch /*(DEBLOBBED)*/ (-22)
>[   86.355800] r8169 0000:16:00.0 eth0: link down
>[   86.355832] r8169 0000:16:00.0 eth0: link down
>[   88.726743] r8169 0000:16:00.0 eth0: link up
>[   89.094293] cfg80211: Found new beacon on frequency: 5180 MHz (Ch 36) on phy0
>[   91.736091] wlan0: authenticate with 64:d8:14:b2:b7:ae
>[   91.741107] wlan0: direct probe to 64:d8:14:b2:b7:ae (try 1/3)
>[   91.949267] wlan0: send auth to 64:d8:14:b2:b7:ae (try 2/3)
>[   91.950454] wlan0: authenticated
>[   91.959280] wlan0: associate with 64:d8:14:b2:b7:ae (try 1/3)
>[   91.961239] wlan0: RX AssocResp from 64:d8:14:b2:b7:ae (capab=0x11 status=0 aid=6)
>[   91.961441] wlan0: associated
>[   91.961486] cfg80211: Calling CRDA for country: GB
>[   91.964067] cfg80211: Updating information on frequency 2412 MHz with regulatory rule:
>[   91.964079] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   91.964086] cfg80211: Updating information on frequency 2417 MHz with regulatory rule:
>[   91.964093] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   91.964109] cfg80211: Updating information on frequency 2422 MHz with regulatory rule:
>[   91.964112] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   91.964115] cfg80211: Updating information on frequency 2427 MHz with regulatory rule:
>[   91.964118] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   91.964120] cfg80211: Updating information on frequency 2432 MHz with regulatory rule:
>[   91.964126] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   91.964128] cfg80211: Updating information on frequency 2437 MHz with regulatory rule:
>[   91.964130] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   91.964132] cfg80211: Updating information on frequency 2442 MHz with regulatory rule:
>[   91.964134] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   91.964135] cfg80211: Updating information on frequency 2447 MHz with regulatory rule:
>[   91.964137] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   91.964139] cfg80211: Updating information on frequency 2452 MHz with regulatory rule:
>[   91.964141] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   91.964143] cfg80211: Updating information on frequency 2457 MHz with regulatory rule:
>[   91.964144] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   91.964147] cfg80211: Updating information on frequency 2462 MHz with regulatory rule:
>[   91.964148] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   91.964150] cfg80211: Updating information on frequency 2467 MHz with regulatory rule:
>[   91.964151] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   91.964152] cfg80211: Updating information on frequency 2472 MHz with regulatory rule:
>[   91.964153] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[   91.964155] cfg80211: Disabling freq 2484 MHz
>[   91.964156] cfg80211: Disabling freq 5040 MHz
>[   91.964157] cfg80211: Disabling freq 5060 MHz
>[   91.964157] cfg80211: Disabling freq 5080 MHz
>[   91.964159] cfg80211: Updating information on frequency 5180 MHz with regulatory rule:
>[   91.964160] cfg80211: 5170000 KHz - 5250000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A mBi, 2000 mBm)
>[   91.964162] cfg80211: Updating information on frequency 5200 MHz with regulatory rule:
>[   91.964163] cfg80211: 5170000 KHz - 5250000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A mBi, 2000 mBm)
>[   91.964164] cfg80211: Updating information on frequency 5220 MHz with regulatory rule:
>[   91.964166] cfg80211: 5170000 KHz - 5250000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A mBi, 2000 mBm)
>[   91.964167] cfg80211: Updating information on frequency 5240 MHz with regulatory rule:
>[   91.964169] cfg80211: 5170000 KHz - 5250000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A mBi, 2000 mBm)
>[   91.964170] cfg80211: Updating information on frequency 5260 MHz with regulatory rule:
>[   91.964171] cfg80211: 5250000 KHz - 5330000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A mBi, 2000 mBm)
>[   91.964173] cfg80211: Updating information on frequency 5280 MHz with regulatory rule:
>[   91.964174] cfg80211: 5250000 KHz - 5330000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A mBi, 2000 mBm)
>[   91.964175] cfg80211: Updating information on frequency 5300 MHz with regulatory rule:
>[   91.964177] cfg80211: 5250000 KHz - 5330000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A mBi, 2000 mBm)
>[   91.964178] cfg80211: Updating information on frequency 5320 MHz with regulatory rule:
>[   91.964179] cfg80211: 5250000 KHz - 5330000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A mBi, 2000 mBm)
>[   91.964181] cfg80211: Updating information on frequency 5500 MHz with regulatory rule:
>[   91.964182] cfg80211: 5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A mBi, 2700 mBm)
>[   91.964183] cfg80211: Updating information on frequency 5520 MHz with regulatory rule:
>[   91.964185] cfg80211: 5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A mBi, 2700 mBm)
>[   91.964186] cfg80211: Updating information on frequency 5540 MHz with regulatory rule:
>[   91.964187] cfg80211: 5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A mBi, 2700 mBm)
>[   91.964188] cfg80211: Updating information on frequency 5560 MHz with regulatory rule:
>[   91.964190] cfg80211: 5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A mBi, 2700 mBm)
>[   91.964191] cfg80211: Updating information on frequency 5580 MHz with regulatory rule:
>[   91.964192] cfg80211: 5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A mBi, 2700 mBm)
>[   91.964193] cfg80211: Updating information on frequency 5600 MHz with regulatory rule:
>[   91.964195] cfg80211: 5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A mBi, 2700 mBm)
>[   91.964196] cfg80211: Updating information on frequency 5620 MHz with regulatory rule:
>[   91.964197] cfg80211: 5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A mBi, 2700 mBm)
>[   91.964198] cfg80211: Updating information on frequency 5640 MHz with regulatory rule:
>[   91.964200] cfg80211: 5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A mBi, 2700 mBm)
>[   91.964201] cfg80211: Updating information on frequency 5660 MHz with regulatory rule:
>[   91.964202] cfg80211: 5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A mBi, 2700 mBm)
>[   91.964204] cfg80211: Updating information on frequency 5680 MHz with regulatory rule:
>[   91.964205] cfg80211: 5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A mBi, 2700 mBm)
>[   91.964206] cfg80211: Updating information on frequency 5700 MHz with regulatory rule:
>[   91.964207] cfg80211: 5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A mBi, 2700 mBm)
>[   91.964208] cfg80211: Disabling freq 5745 MHz
>[   91.964209] cfg80211: Disabling freq 5765 MHz
>[   91.964210] cfg80211: Disabling freq 5785 MHz
>[   91.964211] cfg80211: Disabling freq 5805 MHz
>[   91.964212] cfg80211: Disabling freq 5825 MHz
>[   91.964217] ath: EEPROM regdomain: 0x833a
>[   91.964218] ath: EEPROM indicates we should expect a country code
>[   91.964219] ath: doing EEPROM country->regdmn map search
>[   91.964220] ath: country maps to regdmn code: 0x37
>[   91.964221] ath: Country alpha2 being used: GB
>[   91.964222] ath: Regpair used: 0x37
>[   91.964223] ath: regdomain 0x833a dynamically updated by country IE
>[   91.964224] cfg80211: Regulatory domain changed to country: GB
>[   91.964225] cfg80211:  DFS Master region: unset
>[   91.964226] cfg80211:   (start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp), (dfs_cac_time)
>[   91.964228] cfg80211:   (2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A, 2000 mBm), (N/A)
>[   91.964230] cfg80211:   (5170000 KHz - 5250000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A, 2000 mBm), (N/A)
>[   91.964232] cfg80211:   (5250000 KHz - 5330000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A, 2000 mBm), (0 s)
>[   91.964234] cfg80211:   (5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A, 2700 mBm), (0 s)
>[   91.964235] cfg80211:   (57000000 KHz - 66000000 KHz @ 2160000 KHz), (N/A, 4000 mBm), (N/A)
>[   92.017650] wlan0: Limiting TX power to 17 dBm as advertised by 64:d8:14:b2:b7:ae
>[   93.162621] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff880233001d80] inc() == 5
>[   93.162626] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff880233001d80] inc() == 6
>[   93.162634] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff880233001d80] use(+1) == 5
>[   93.162645] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff880233001d80] dec() == 5
>[   93.162648] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff8800370b8900] inc() == 5
>[   93.162649] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff8800370b8900] inc() == 6
>[   93.162655] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff8800370b8900] use(+1) == 5
>[   93.162664] nouveau T[   PDISP][0000:02:00.0][0xc000857c][ffff8800370b8900] dec() == 5
>[   93.162667] nouveau T[   PDISP][0000:02:00.0][0xc000857d][ffff880233001980] inc() == 5
>[   93.162668] nouveau T[   PDISP][0000:02:00.0][0xc000857d][ffff880233001980] inc() == 6
>[   93.162674] nouveau T[   PDISP][0000:02:00.0][0xc000857d][ffff880233001980] use(+1) == 5
>[   93.162685] nouveau T[   PDISP][0000:02:00.0][0xc000857d][ffff880233001980] dec() == 5
>[   93.162687] [drm:drm_mode_addfb] [FB:29]
>[   93.162704] [drm:drm_mode_setcrtc] [CRTC:16]
>[   93.162707] [drm:drm_mode_setcrtc] [CONNECTOR:19:LVDS-1]
>[   93.162708] [drm:drm_crtc_helper_set_config] 
>[   93.162710] [drm:drm_crtc_helper_set_config] [CRTC:16] [FB:29] #connectors=1 (x y) (0 0)
>[   93.162713] [drm:drm_crtc_helper_set_config] modes are different, full mode set
>[   93.162716] [drm:drm_mode_debug_printmodeline] Modeline 44:"1366x768" 60 71000 1366 1414 1446 1498 768 769 773 790 0x48 0xa
>[   93.162718] [drm:drm_mode_debug_printmodeline] Modeline 43:"" 0 63500 1024 1072 1176 1328 768 771 775 798 0x0 0x6
>[   93.162720] [drm:drm_crtc_helper_set_config] [CONNECTOR:19:LVDS-1] to [CRTC:16]
>[   93.162722] [drm:drm_crtc_helper_set_config] [CONNECTOR:23:DP-1] to [CRTC:18]
>[   93.162723] [drm:drm_crtc_helper_set_config] attempting to set mode from userspace
>[   93.162725] [drm:drm_mode_debug_printmodeline] Modeline 43:"" 0 63500 1024 1072 1176 1328 768 771 775 798 0x0 0x6
>[   93.162728] [drm:drm_crtc_helper_set_mode] [CRTC:16]
>[   93.173724] [drm:drm_crtc_helper_set_mode] [ENCODER:20:LVDS-20] set [MODE:43:]
>[   93.173812] nouveau D[   PDISP][0000:02:00.0] supervisor 0x00000010 0x00000020
>[   93.173816] nouveau D[   PDISP][0000:02:00.0] Core:
>[   93.173824] nouveau D[   PDISP][0000:02:00.0] 	0x0084: 0x019e02e2 -> 0x00000000
>[   93.173831] nouveau D[   PDISP][0000:02:00.0] 	0x0088: 0xf0000000              
>[   93.173833] nouveau D[   PDISP][0000:02:00.0] Core - DAC 0:
>[   93.173841] nouveau D[   PDISP][0000:02:00.0] 	0x0400: 0x00000000              
>[   93.173847] nouveau D[   PDISP][0000:02:00.0] 	0x0404: 0x00000000              
>[   93.173854] nouveau D[   PDISP][0000:02:00.0] 	0x0420: 0x00010000              
>[   93.173856] nouveau D[   PDISP][0000:02:00.0] Core - DAC 1:
>[   93.173863] nouveau D[   PDISP][0000:02:00.0] 	0x0480: 0x00000000              
>[   93.173870] nouveau D[   PDISP][0000:02:00.0] 	0x0484: 0x00000000              
>[   93.173876] nouveau D[   PDISP][0000:02:00.0] 	0x04a0: 0x00010000              
>[   93.173878] nouveau D[   PDISP][0000:02:00.0] Core - DAC 2:
>[   93.173885] nouveau D[   PDISP][0000:02:00.0] 	0x0500: 0x00000000              
>[   93.173892] nouveau D[   PDISP][0000:02:00.0] 	0x0504: 0x00000000              
>[   93.173898] nouveau D[   PDISP][0000:02:00.0] 	0x0520: 0x00010000              
>[   93.173901] nouveau D[   PDISP][0000:02:00.0] Core - SOR 0:
>[   93.173907] nouveau D[   PDISP][0000:02:00.0] 	0x0600: 0x00003001              
>[   93.173909] nouveau D[   PDISP][0000:02:00.0] Core - SOR 1:
>[   93.173916] nouveau D[   PDISP][0000:02:00.0] 	0x0640: 0x00000000              
>[   93.173918] nouveau D[   PDISP][0000:02:00.0] Core - SOR 2:
>[   93.173925] nouveau D[   PDISP][0000:02:00.0] 	0x0680: 0x00051802              
>[   93.173927] nouveau D[   PDISP][0000:02:00.0] Core - SOR 3:
>[   93.173933] nouveau D[   PDISP][0000:02:00.0] 	0x06c0: 0x00000000              
>[   93.173936] nouveau D[   PDISP][0000:02:00.0] Core - PIOR 0:
>[   93.173942] nouveau D[   PDISP][0000:02:00.0] 	0x0700: 0x00000000              
>[   93.173944] nouveau D[   PDISP][0000:02:00.0] Core - PIOR 1:
>[   93.173951] nouveau D[   PDISP][0000:02:00.0] 	0x0740: 0x00000000              
>[   93.173953] nouveau D[   PDISP][0000:02:00.0] Core - PIOR 2:
>[   93.173960] nouveau D[   PDISP][0000:02:00.0] 	0x0780: 0x00000000              
>[   93.173962] nouveau D[   PDISP][0000:02:00.0] Core - HEAD 0:
>[   93.173968] nouveau D[   PDISP][0000:02:00.0] 	0x0800: 0x00000000              
>[   93.173975] nouveau D[   PDISP][0000:02:00.0] 	0x0804: 0x00811558              
>[   93.173982] nouveau D[   PDISP][0000:02:00.0] 	0x0808: 0x00000000              
>[   93.173988] nouveau D[   PDISP][0000:02:00.0] 	0x080c: 0x00000000              
>[   93.173995] nouveau D[   PDISP][0000:02:00.0] 	0x0810: 0x00000000              
>[   93.174002] nouveau D[   PDISP][0000:02:00.0] 	0x0814: 0x031605da              
>[   93.174008] nouveau D[   PDISP][0000:02:00.0] 	0x0818: 0x0003001f              
>[   93.174015] nouveau D[   PDISP][0000:02:00.0] 	0x081c: 0x00140053              
>[   93.174021] nouveau D[   PDISP][0000:02:00.0] 	0x0820: 0x031405a9              
>[   93.174028] nouveau D[   PDISP][0000:02:00.0] 	0x0824: 0x00000001              
>[   93.174035] nouveau D[   PDISP][0000:02:00.0] 	0x0828: 0x000001a5              
>[   93.174041] nouveau D[   PDISP][0000:02:00.0] 	0x082c: 0x00000000              
>[   93.174048] nouveau D[   PDISP][0000:02:00.0] 	0x0830: 0x00000000              
>[   93.174054] nouveau D[   PDISP][0000:02:00.0] 	0x0838: 0x00000000              
>[   93.174061] nouveau D[   PDISP][0000:02:00.0] 	0x0840: 0xc0000000              
>[   93.174068] nouveau D[   PDISP][0000:02:00.0] 	0x0844: 0x00000410              
>[   93.174075] nouveau D[   PDISP][0000:02:00.0] 	0x0848: 0x00000000              
>[   93.174081] nouveau D[   PDISP][0000:02:00.0] 	0x084c: 0x00000000              
>[   93.174088] nouveau D[   PDISP][0000:02:00.0] 	0x085c: 0xf0000001              
>[   93.174094] nouveau D[   PDISP][0000:02:00.0] 	0x0860: 0x00000600 -> 0x00005a00
>[   93.174101] nouveau D[   PDISP][0000:02:00.0] 	0x0864: 0x00000000              
>[   93.174108] nouveau D[   PDISP][0000:02:00.0] 	0x0868: 0x038405a0 -> 0x03000400
>[   93.174115] nouveau D[   PDISP][0000:02:00.0] 	0x086c: 0x00101700 -> 0x00004004
>[   93.174122] nouveau D[   PDISP][0000:02:00.0] 	0x0870: 0x0000cf00              
>[   93.174129] nouveau D[   PDISP][0000:02:00.0] 	0x0874: 0xffff0000 -> 0xffff00fe
>[   93.174136] nouveau D[   PDISP][0000:02:00.0] 	0x0878: 0x00000000              
>[   93.174142] nouveau D[   PDISP][0000:02:00.0] 	0x0880: 0x05000000              
>[   93.174149] nouveau D[   PDISP][0000:02:00.0] 	0x0884: 0x00000000              
>[   93.174156] nouveau D[   PDISP][0000:02:00.0] 	0x089c: 0x00000000              
>[   93.174163] nouveau D[   PDISP][0000:02:00.0] 	0x08a0: 0x00000011              
>[   93.174170] nouveau D[   PDISP][0000:02:00.0] 	0x08a4: 0x00000000              
>[   93.174176] nouveau D[   PDISP][0000:02:00.0] 	0x08a8: 0x00040000              
>[   93.174183] nouveau D[   PDISP][0000:02:00.0] 	0x08c0: 0x00000000              
>[   93.174190] nouveau D[   PDISP][0000:02:00.0] 	0x08c4: 0x00000000              
>[   93.174197] nouveau D[   PDISP][0000:02:00.0] 	0x08c8: 0x03000556 -> 0x03000400
>[   93.174203] nouveau D[   PDISP][0000:02:00.0] 	0x08d4: 0x00000000              
>[   93.174210] nouveau D[   PDISP][0000:02:00.0] 	0x08d8: 0x03000556              
>[   93.174217] nouveau D[   PDISP][0000:02:00.0] 	0x08dc: 0x03000556              
>[   93.174223] nouveau D[   PDISP][0000:02:00.0] 	0x0900: 0x00000311              
>[   93.174230] nouveau D[   PDISP][0000:02:00.0] 	0x0904: 0x00000100              
>[   93.174237] nouveau D[   PDISP][0000:02:00.0] 	0x0910: 0x00000000              
>[   93.174244] nouveau D[   PDISP][0000:02:00.0] 	0x0914: 0x00000000              
>[   93.174246] nouveau D[   PDISP][0000:02:00.0] Core - HEAD 1:
>[   93.174252] nouveau D[   PDISP][0000:02:00.0] 	0x0c00: 0x00000000              
>[   93.174259] nouveau D[   PDISP][0000:02:00.0] 	0x0c04: 0x0081a004              
>[   93.174266] nouveau D[   PDISP][0000:02:00.0] 	0x0c08: 0x00000000              
>[   93.174272] nouveau D[   PDISP][0000:02:00.0] 	0x0c0c: 0x00000000              
>[   93.174279] nouveau D[   PDISP][0000:02:00.0] 	0x0c10: 0x00000000              
>[   93.174285] nouveau D[   PDISP][0000:02:00.0] 	0x0c14: 0x03a60770              
>[   93.174292] nouveau D[   PDISP][0000:02:00.0] 	0x0c18: 0x00050097              
>[   93.174298] nouveau D[   PDISP][0000:02:00.0] 	0x0c1c: 0x001e017f              
>[   93.174305] nouveau D[   PDISP][0000:02:00.0] 	0x0c20: 0x03a2071f              
>[   93.174312] nouveau D[   PDISP][0000:02:00.0] 	0x0c24: 0x00000001              
>[   93.174318] nouveau D[   PDISP][0000:02:00.0] 	0x0c28: 0x0000023c              
>[   93.174325] nouveau D[   PDISP][0000:02:00.0] 	0x0c2c: 0x00000000              
>[   93.174332] nouveau D[   PDISP][0000:02:00.0] 	0x0c30: 0x00000000              
>[   93.174338] nouveau D[   PDISP][0000:02:00.0] 	0x0c38: 0x00000000              
>[   93.174345] nouveau D[   PDISP][0000:02:00.0] 	0x0c40: 0xc0000000              
>[   93.174352] nouveau D[   PDISP][0000:02:00.0] 	0x0c44: 0x00000470              
>[   93.174358] nouveau D[   PDISP][0000:02:00.0] 	0x0c48: 0x00000000              
>[   93.174364] nouveau D[   PDISP][0000:02:00.0] 	0x0c4c: 0x00000000              
>[   93.174371] nouveau D[   PDISP][0000:02:00.0] 	0x0c5c: 0xf0000001              
>[   93.174378] nouveau D[   PDISP][0000:02:00.0] 	0x0c60: 0x00000600              
>[   93.174385] nouveau D[   PDISP][0000:02:00.0] 	0x0c64: 0x00000000              
>[   93.174391] nouveau D[   PDISP][0000:02:00.0] 	0x0c68: 0x038405a0              
>[   93.174398] nouveau D[   PDISP][0000:02:00.0] 	0x0c6c: 0x00101700              
>[   93.174405] nouveau D[   PDISP][0000:02:00.0] 	0x0c70: 0x0000cf00              
>[   93.174412] nouveau D[   PDISP][0000:02:00.0] 	0x0c74: 0xffff0000              
>[   93.174418] nouveau D[   PDISP][0000:02:00.0] 	0x0c78: 0x00000000              
>[   93.174425] nouveau D[   PDISP][0000:02:00.0] 	0x0c80: 0x05000000              
>[   93.174432] nouveau D[   PDISP][0000:02:00.0] 	0x0c84: 0x00000000              
>[   93.174438] nouveau D[   PDISP][0000:02:00.0] 	0x0c9c: 0x00000000              
>[   93.174445] nouveau D[   PDISP][0000:02:00.0] 	0x0ca0: 0x00000002              
>[   93.174451] nouveau D[   PDISP][0000:02:00.0] 	0x0ca4: 0x00000000              
>[   93.174457] nouveau D[   PDISP][0000:02:00.0] 	0x0ca8: 0x00040000              
>[   93.174464] nouveau D[   PDISP][0000:02:00.0] 	0x0cc0: 0x00000000              
>[   93.174470] nouveau D[   PDISP][0000:02:00.0] 	0x0cc4: 0x00000000              
>[   93.174477] nouveau D[   PDISP][0000:02:00.0] 	0x0cc8: 0x038405a0              
>[   93.174484] nouveau D[   PDISP][0000:02:00.0] 	0x0cd4: 0x00000000              
>[   93.174490] nouveau D[   PDISP][0000:02:00.0] 	0x0cd8: 0x038405a0              
>[   93.174497] nouveau D[   PDISP][0000:02:00.0] 	0x0cdc: 0x038405a0              
>[   93.174504] nouveau D[   PDISP][0000:02:00.0] 	0x0d00: 0x00000311              
>[   93.174511] nouveau D[   PDISP][0000:02:00.0] 	0x0d04: 0x00000100              
>[   93.174517] nouveau D[   PDISP][0000:02:00.0] 	0x0d10: 0x00000000              
>[   93.174524] nouveau D[   PDISP][0000:02:00.0] 	0x0d14: 0x00000000              
>[   93.190381] nouveau D[   PDISP][0000:02:00.0] supervisor 0x00000020 0x00000030
>[   93.190402] nouveau D[   PDISP][0000:02:00.0] supervisor 0x00000040 0x00000030
>[   93.223613] [drm:drm_crtc_helper_set_config] Setting connector DPMS state to on
>[   93.223617] [drm:drm_crtc_helper_set_config] 	[CONNECTOR:19:LVDS-1] set DPMS on
>[   93.223662] [drm:drm_mode_setcrtc] [CRTC:18]
>[   93.223666] [drm:drm_mode_setcrtc] [CONNECTOR:23:DP-1]
>[   93.223667] [drm:drm_crtc_helper_set_config] 
>[   93.223670] [drm:drm_crtc_helper_set_config] [CRTC:18] [FB:29] #connectors=1 (x y) (0 0)
>[   93.223672] [drm:drm_crtc_helper_set_config] modes are different, full mode set
>[   93.223676] [drm:drm_mode_debug_printmodeline] Modeline 45:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[   93.223679] [drm:drm_mode_debug_printmodeline] Modeline 43:"" 0 65000 1024 1048 1184 1344 768 771 777 806 0x0 0xa
>[   93.223681] [drm:drm_crtc_helper_set_config] [CONNECTOR:19:LVDS-1] to [CRTC:16]
>[   93.223683] [drm:drm_crtc_helper_set_config] [CONNECTOR:23:DP-1] to [CRTC:18]
>[   93.223685] [drm:drm_crtc_helper_set_config] attempting to set mode from userspace
>[   93.223688] [drm:drm_mode_debug_printmodeline] Modeline 43:"" 0 65000 1024 1048 1184 1344 768 771 777 806 0x0 0xa
>[   93.223691] [drm:drm_crtc_helper_set_mode] [CRTC:18]
>[   93.227256] [drm:drm_crtc_helper_set_mode] [ENCODER:24:TMDS-24] set [MODE:43:]
>[   93.227280] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000100 2
>[   93.227440] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109001 0x10000002
>[   93.227445] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x434e8406
>[   93.227450] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30323331
>[   93.227454] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   93.227459] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   93.227464] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000202 3
>[   93.227632] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109002 0x10000003
>[   93.227636] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x43017777
>[   93.227641] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30323331
>[   93.227645] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   93.227650] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   93.227775] nouveau D[   PDISP][0000:02:00.0] supervisor 0x00000010 0x00000040
>[   93.227779] nouveau D[   PDISP][0000:02:00.0] Core:
>[   93.227787] nouveau D[   PDISP][0000:02:00.0] 	0x0084: 0x019e02e2 -> 0x00000000
>[   93.227794] nouveau D[   PDISP][0000:02:00.0] 	0x0088: 0xf0000000              
>[   93.227797] nouveau D[   PDISP][0000:02:00.0] Core - DAC 0:
>[   93.227804] nouveau D[   PDISP][0000:02:00.0] 	0x0400: 0x00000000              
>[   93.227811] nouveau D[   PDISP][0000:02:00.0] 	0x0404: 0x00000000              
>[   93.227817] nouveau D[   PDISP][0000:02:00.0] 	0x0420: 0x00010000              
>[   93.227820] nouveau D[   PDISP][0000:02:00.0] Core - DAC 1:
>[   93.227826] nouveau D[   PDISP][0000:02:00.0] 	0x0480: 0x00000000              
>[   93.227833] nouveau D[   PDISP][0000:02:00.0] 	0x0484: 0x00000000              
>[   93.227839] nouveau D[   PDISP][0000:02:00.0] 	0x04a0: 0x00010000              
>[   93.227841] nouveau D[   PDISP][0000:02:00.0] Core - DAC 2:
>[   93.227848] nouveau D[   PDISP][0000:02:00.0] 	0x0500: 0x00000000              
>[   93.227855] nouveau D[   PDISP][0000:02:00.0] 	0x0504: 0x00000000              
>[   93.227861] nouveau D[   PDISP][0000:02:00.0] 	0x0520: 0x00010000              
>[   93.227863] nouveau D[   PDISP][0000:02:00.0] Core - SOR 0:
>[   93.227870] nouveau D[   PDISP][0000:02:00.0] 	0x0600: 0x00003001              
>[   93.227872] nouveau D[   PDISP][0000:02:00.0] Core - SOR 1:
>[   93.227879] nouveau D[   PDISP][0000:02:00.0] 	0x0640: 0x00000000              
>[   93.227881] nouveau D[   PDISP][0000:02:00.0] Core - SOR 2:
>[   93.227888] nouveau D[   PDISP][0000:02:00.0] 	0x0680: 0x00051802              
>[   93.227890] nouveau D[   PDISP][0000:02:00.0] Core - SOR 3:
>[   93.227896] nouveau D[   PDISP][0000:02:00.0] 	0x06c0: 0x00000000              
>[   93.227899] nouveau D[   PDISP][0000:02:00.0] Core - PIOR 0:
>[   93.227905] nouveau D[   PDISP][0000:02:00.0] 	0x0700: 0x00000000              
>[   93.227908] nouveau D[   PDISP][0000:02:00.0] Core - PIOR 1:
>[   93.227914] nouveau D[   PDISP][0000:02:00.0] 	0x0740: 0x00000000              
>[   93.227916] nouveau D[   PDISP][0000:02:00.0] Core - PIOR 2:
>[   93.227923] nouveau D[   PDISP][0000:02:00.0] 	0x0780: 0x00000000              
>[   93.227925] nouveau D[   PDISP][0000:02:00.0] Core - HEAD 0:
>[   93.227932] nouveau D[   PDISP][0000:02:00.0] 	0x0800: 0x00000000              
>[   93.227938] nouveau D[   PDISP][0000:02:00.0] 	0x0804: 0x00811558              
>[   93.227945] nouveau D[   PDISP][0000:02:00.0] 	0x0808: 0x00000000              
>[   93.227951] nouveau D[   PDISP][0000:02:00.0] 	0x080c: 0x00000000              
>[   93.227958] nouveau D[   PDISP][0000:02:00.0] 	0x0810: 0x00000000              
>[   93.227964] nouveau D[   PDISP][0000:02:00.0] 	0x0814: 0x031605da              
>[   93.227971] nouveau D[   PDISP][0000:02:00.0] 	0x0818: 0x0003001f              
>[   93.227977] nouveau D[   PDISP][0000:02:00.0] 	0x081c: 0x00140053              
>[   93.227984] nouveau D[   PDISP][0000:02:00.0] 	0x0820: 0x031405a9              
>[   93.227991] nouveau D[   PDISP][0000:02:00.0] 	0x0824: 0x00000001              
>[   93.227998] nouveau D[   PDISP][0000:02:00.0] 	0x0828: 0x000001a5              
>[   93.228005] nouveau D[   PDISP][0000:02:00.0] 	0x082c: 0x00000000              
>[   93.228011] nouveau D[   PDISP][0000:02:00.0] 	0x0830: 0x00000000              
>[   93.228018] nouveau D[   PDISP][0000:02:00.0] 	0x0838: 0x00000000              
>[   93.228024] nouveau D[   PDISP][0000:02:00.0] 	0x0840: 0xc0000000              
>[   93.228031] nouveau D[   PDISP][0000:02:00.0] 	0x0844: 0x00000410              
>[   93.228037] nouveau D[   PDISP][0000:02:00.0] 	0x0848: 0x00000000              
>[   93.228044] nouveau D[   PDISP][0000:02:00.0] 	0x084c: 0x00000000              
>[   93.228051] nouveau D[   PDISP][0000:02:00.0] 	0x085c: 0xf0000001              
>[   93.228057] nouveau D[   PDISP][0000:02:00.0] 	0x0860: 0x00005a00              
>[   93.228063] nouveau D[   PDISP][0000:02:00.0] 	0x0864: 0x00000000              
>[   93.228070] nouveau D[   PDISP][0000:02:00.0] 	0x0868: 0x03000400              
>[   93.228077] nouveau D[   PDISP][0000:02:00.0] 	0x086c: 0x00004004              
>[   93.228083] nouveau D[   PDISP][0000:02:00.0] 	0x0870: 0x0000cf00              
>[   93.228090] nouveau D[   PDISP][0000:02:00.0] 	0x0874: 0xffff00fe              
>[   93.228096] nouveau D[   PDISP][0000:02:00.0] 	0x0878: 0x00000000              
>[   93.228103] nouveau D[   PDISP][0000:02:00.0] 	0x0880: 0x05000000              
>[   93.228109] nouveau D[   PDISP][0000:02:00.0] 	0x0884: 0x00000000              
>[   93.228115] nouveau D[   PDISP][0000:02:00.0] 	0x089c: 0x00000000              
>[   93.228122] nouveau D[   PDISP][0000:02:00.0] 	0x08a0: 0x00000011              
>[   93.228128] nouveau D[   PDISP][0000:02:00.0] 	0x08a4: 0x00000000              
>[   93.228135] nouveau D[   PDISP][0000:02:00.0] 	0x08a8: 0x00040000              
>[   93.228141] nouveau D[   PDISP][0000:02:00.0] 	0x08c0: 0x00000000              
>[   93.228148] nouveau D[   PDISP][0000:02:00.0] 	0x08c4: 0x00000000              
>[   93.228154] nouveau D[   PDISP][0000:02:00.0] 	0x08c8: 0x03000400              
>[   93.228161] nouveau D[   PDISP][0000:02:00.0] 	0x08d4: 0x00000000              
>[   93.228167] nouveau D[   PDISP][0000:02:00.0] 	0x08d8: 0x03000556              
>[   93.228174] nouveau D[   PDISP][0000:02:00.0] 	0x08dc: 0x03000556              
>[   93.228180] nouveau D[   PDISP][0000:02:00.0] 	0x0900: 0x00000311              
>[   93.228187] nouveau D[   PDISP][0000:02:00.0] 	0x0904: 0x00000100              
>[   93.228194] nouveau D[   PDISP][0000:02:00.0] 	0x0910: 0x00000000              
>[   93.228200] nouveau D[   PDISP][0000:02:00.0] 	0x0914: 0x00000000              
>[   93.228202] nouveau D[   PDISP][0000:02:00.0] Core - HEAD 1:
>[   93.228209] nouveau D[   PDISP][0000:02:00.0] 	0x0c00: 0x00000000              
>[   93.228215] nouveau D[   PDISP][0000:02:00.0] 	0x0c04: 0x0081a004              
>[   93.228222] nouveau D[   PDISP][0000:02:00.0] 	0x0c08: 0x00000000              
>[   93.228228] nouveau D[   PDISP][0000:02:00.0] 	0x0c0c: 0x00000000              
>[   93.228235] nouveau D[   PDISP][0000:02:00.0] 	0x0c10: 0x00000000              
>[   93.228242] nouveau D[   PDISP][0000:02:00.0] 	0x0c14: 0x03a60770              
>[   93.228248] nouveau D[   PDISP][0000:02:00.0] 	0x0c18: 0x00050097              
>[   93.228255] nouveau D[   PDISP][0000:02:00.0] 	0x0c1c: 0x001e017f              
>[   93.228262] nouveau D[   PDISP][0000:02:00.0] 	0x0c20: 0x03a2071f              
>[   93.228268] nouveau D[   PDISP][0000:02:00.0] 	0x0c24: 0x00000001              
>[   93.228275] nouveau D[   PDISP][0000:02:00.0] 	0x0c28: 0x0000023c              
>[   93.228281] nouveau D[   PDISP][0000:02:00.0] 	0x0c2c: 0x00000000              
>[   93.228288] nouveau D[   PDISP][0000:02:00.0] 	0x0c30: 0x00000000              
>[   93.228294] nouveau D[   PDISP][0000:02:00.0] 	0x0c38: 0x00000000              
>[   93.228301] nouveau D[   PDISP][0000:02:00.0] 	0x0c40: 0xc0000000              
>[   93.228307] nouveau D[   PDISP][0000:02:00.0] 	0x0c44: 0x00000470              
>[   93.228314] nouveau D[   PDISP][0000:02:00.0] 	0x0c48: 0x00000000              
>[   93.228320] nouveau D[   PDISP][0000:02:00.0] 	0x0c4c: 0x00000000              
>[   93.228327] nouveau D[   PDISP][0000:02:00.0] 	0x0c5c: 0xf0000001              
>[   93.228333] nouveau D[   PDISP][0000:02:00.0] 	0x0c60: 0x00000600 -> 0x00005a00
>[   93.228340] nouveau D[   PDISP][0000:02:00.0] 	0x0c64: 0x00000000              
>[   93.228347] nouveau D[   PDISP][0000:02:00.0] 	0x0c68: 0x038405a0 -> 0x03000400
>[   93.228354] nouveau D[   PDISP][0000:02:00.0] 	0x0c6c: 0x00101700 -> 0x00004004
>[   93.228361] nouveau D[   PDISP][0000:02:00.0] 	0x0c70: 0x0000cf00              
>[   93.228367] nouveau D[   PDISP][0000:02:00.0] 	0x0c74: 0xffff0000 -> 0xffff00fe
>[   93.228374] nouveau D[   PDISP][0000:02:00.0] 	0x0c78: 0x00000000              
>[   93.228381] nouveau D[   PDISP][0000:02:00.0] 	0x0c80: 0x05000000              
>[   93.228388] nouveau D[   PDISP][0000:02:00.0] 	0x0c84: 0x00000000              
>[   93.228394] nouveau D[   PDISP][0000:02:00.0] 	0x0c9c: 0x00000000              
>[   93.228401] nouveau D[   PDISP][0000:02:00.0] 	0x0ca0: 0x00000002              
>[   93.228407] nouveau D[   PDISP][0000:02:00.0] 	0x0ca4: 0x00000000              
>[   93.228414] nouveau D[   PDISP][0000:02:00.0] 	0x0ca8: 0x00040000              
>[   93.228420] nouveau D[   PDISP][0000:02:00.0] 	0x0cc0: 0x00000000              
>[   93.228427] nouveau D[   PDISP][0000:02:00.0] 	0x0cc4: 0x00000000              
>[   93.228434] nouveau D[   PDISP][0000:02:00.0] 	0x0cc8: 0x038405a0 -> 0x03000400
>[   93.228440] nouveau D[   PDISP][0000:02:00.0] 	0x0cd4: 0x00000000              
>[   93.228447] nouveau D[   PDISP][0000:02:00.0] 	0x0cd8: 0x038405a0              
>[   93.228453] nouveau D[   PDISP][0000:02:00.0] 	0x0cdc: 0x038405a0              
>[   93.228460] nouveau D[   PDISP][0000:02:00.0] 	0x0d00: 0x00000311              
>[   93.228467] nouveau D[   PDISP][0000:02:00.0] 	0x0d04: 0x00000100              
>[   93.228474] nouveau D[   PDISP][0000:02:00.0] 	0x0d10: 0x00000000              
>[   93.228480] nouveau D[   PDISP][0000:02:00.0] 	0x0d14: 0x00000000              
>[   93.244036] nouveau D[   PDISP][0000:02:00.0] supervisor 0x00000020 0x00000050
>[   93.244071] nouveau D[   PDISP][0000:02:00.0] supervisor 0x00000040 0x00000050
>[   93.277243] [drm:drm_crtc_helper_set_config] Setting connector DPMS state to on
>[   93.277245] [drm:drm_crtc_helper_set_config] 	[CONNECTOR:23:DP-1] set DPMS on
>[   93.277247] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 8: 0x00000600 1
>[   93.277261] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000001
>[   93.277262] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   93.277263] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   93.277265] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   93.277403] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01108000 0x10000000
>[   93.278643] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 8: 0x00000600 1
>[   93.278659] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000001
>[   93.278661] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   93.278663] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   93.278664] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   93.278803] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01108000 0x10000000
>[   99.042302] [drm:drm_crtc_helper_set_config] 
>[   99.042305] [drm:drm_crtc_helper_set_config] [CRTC:16] [FB:46] #connectors=1 (x y) (0 0)
>[   99.042307] [drm:drm_crtc_helper_set_config] modes are different, full mode set
>[   99.042310] [drm:drm_mode_debug_printmodeline] Modeline 43:"" 0 63500 1024 1072 1176 1328 768 771 775 798 0x0 0x6
>[   99.042313] [drm:drm_mode_debug_printmodeline] Modeline 44:"1366x768" 60 71000 1366 1414 1446 1498 768 769 773 790 0x48 0xa
>[   99.042314] [drm:drm_crtc_helper_set_config] [CONNECTOR:19:LVDS-1] to [CRTC:16]
>[   99.042316] [drm:drm_crtc_helper_set_config] [CONNECTOR:23:DP-1] to [CRTC:18]
>[   99.042317] [drm:drm_crtc_helper_set_config] attempting to set mode from userspace
>[   99.042319] [drm:drm_mode_debug_printmodeline] Modeline 44:"1366x768" 60 71000 1366 1414 1446 1498 768 769 773 790 0x48 0xa
>[   99.042322] [drm:drm_crtc_helper_set_mode] [CRTC:16]
>[   99.054963] [drm:drm_crtc_helper_set_mode] [ENCODER:20:LVDS-20] set [MODE:44:1366x768]
>[   99.055083] nouveau D[   PDISP][0000:02:00.0] supervisor 0x00000010 0x00000020
>[   99.055085] nouveau D[   PDISP][0000:02:00.0] Core:
>[   99.055091] nouveau D[   PDISP][0000:02:00.0] 	0x0084: 0x019e02e2 -> 0x00000000
>[   99.055096] nouveau D[   PDISP][0000:02:00.0] 	0x0088: 0xf0000000              
>[   99.055098] nouveau D[   PDISP][0000:02:00.0] Core - DAC 0:
>[   99.055103] nouveau D[   PDISP][0000:02:00.0] 	0x0400: 0x00000000              
>[   99.055109] nouveau D[   PDISP][0000:02:00.0] 	0x0404: 0x00000000              
>[   99.055114] nouveau D[   PDISP][0000:02:00.0] 	0x0420: 0x00010000              
>[   99.055115] nouveau D[   PDISP][0000:02:00.0] Core - DAC 1:
>[   99.055121] nouveau D[   PDISP][0000:02:00.0] 	0x0480: 0x00000000              
>[   99.055126] nouveau D[   PDISP][0000:02:00.0] 	0x0484: 0x00000000              
>[   99.055132] nouveau D[   PDISP][0000:02:00.0] 	0x04a0: 0x00010000              
>[   99.055133] nouveau D[   PDISP][0000:02:00.0] Core - DAC 2:
>[   99.055138] nouveau D[   PDISP][0000:02:00.0] 	0x0500: 0x00000000              
>[   99.055143] nouveau D[   PDISP][0000:02:00.0] 	0x0504: 0x00000000              
>[   99.055149] nouveau D[   PDISP][0000:02:00.0] 	0x0520: 0x00010000              
>[   99.055150] nouveau D[   PDISP][0000:02:00.0] Core - SOR 0:
>[   99.055155] nouveau D[   PDISP][0000:02:00.0] 	0x0600: 0x00003001              
>[   99.055156] nouveau D[   PDISP][0000:02:00.0] Core - SOR 1:
>[   99.055161] nouveau D[   PDISP][0000:02:00.0] 	0x0640: 0x00000000              
>[   99.055162] nouveau D[   PDISP][0000:02:00.0] Core - SOR 2:
>[   99.055168] nouveau D[   PDISP][0000:02:00.0] 	0x0680: 0x00051802              
>[   99.055169] nouveau D[   PDISP][0000:02:00.0] Core - SOR 3:
>[   99.055174] nouveau D[   PDISP][0000:02:00.0] 	0x06c0: 0x00000000              
>[   99.055175] nouveau D[   PDISP][0000:02:00.0] Core - PIOR 0:
>[   99.055181] nouveau D[   PDISP][0000:02:00.0] 	0x0700: 0x00000000              
>[   99.055182] nouveau D[   PDISP][0000:02:00.0] Core - PIOR 1:
>[   99.055187] nouveau D[   PDISP][0000:02:00.0] 	0x0740: 0x00000000              
>[   99.055188] nouveau D[   PDISP][0000:02:00.0] Core - PIOR 2:
>[   99.055194] nouveau D[   PDISP][0000:02:00.0] 	0x0780: 0x00000000              
>[   99.055195] nouveau D[   PDISP][0000:02:00.0] Core - HEAD 0:
>[   99.055200] nouveau D[   PDISP][0000:02:00.0] 	0x0800: 0x00000000              
>[   99.055206] nouveau D[   PDISP][0000:02:00.0] 	0x0804: 0x00811558              
>[   99.055211] nouveau D[   PDISP][0000:02:00.0] 	0x0808: 0x00000000              
>[   99.055216] nouveau D[   PDISP][0000:02:00.0] 	0x080c: 0x00000000              
>[   99.055221] nouveau D[   PDISP][0000:02:00.0] 	0x0810: 0x00000000              
>[   99.055227] nouveau D[   PDISP][0000:02:00.0] 	0x0814: 0x031605da              
>[   99.055232] nouveau D[   PDISP][0000:02:00.0] 	0x0818: 0x0003001f              
>[   99.055237] nouveau D[   PDISP][0000:02:00.0] 	0x081c: 0x00140053              
>[   99.055243] nouveau D[   PDISP][0000:02:00.0] 	0x0820: 0x031405a9              
>[   99.055248] nouveau D[   PDISP][0000:02:00.0] 	0x0824: 0x00000001              
>[   99.055253] nouveau D[   PDISP][0000:02:00.0] 	0x0828: 0x000001a5              
>[   99.055259] nouveau D[   PDISP][0000:02:00.0] 	0x082c: 0x00000000              
>[   99.055264] nouveau D[   PDISP][0000:02:00.0] 	0x0830: 0x00000000              
>[   99.055269] nouveau D[   PDISP][0000:02:00.0] 	0x0838: 0x00000000              
>[   99.055275] nouveau D[   PDISP][0000:02:00.0] 	0x0840: 0xc0000000              
>[   99.055280] nouveau D[   PDISP][0000:02:00.0] 	0x0844: 0x00000410              
>[   99.055286] nouveau D[   PDISP][0000:02:00.0] 	0x0848: 0x00000000              
>[   99.055291] nouveau D[   PDISP][0000:02:00.0] 	0x084c: 0x00000000              
>[   99.055296] nouveau D[   PDISP][0000:02:00.0] 	0x085c: 0xf0000001              
>[   99.055302] nouveau D[   PDISP][0000:02:00.0] 	0x0860: 0x00005a00 -> 0x00000600
>[   99.055307] nouveau D[   PDISP][0000:02:00.0] 	0x0864: 0x00000000              
>[   99.055313] nouveau D[   PDISP][0000:02:00.0] 	0x0868: 0x03000400 -> 0x038405a0
>[   99.055318] nouveau D[   PDISP][0000:02:00.0] 	0x086c: 0x00004004 -> 0x00101700
>[   99.055323] nouveau D[   PDISP][0000:02:00.0] 	0x0870: 0x0000cf00              
>[   99.055328] nouveau D[   PDISP][0000:02:00.0] 	0x0874: 0xffff00fe -> 0xffff0000
>[   99.055334] nouveau D[   PDISP][0000:02:00.0] 	0x0878: 0x00000000              
>[   99.055339] nouveau D[   PDISP][0000:02:00.0] 	0x0880: 0x05000000              
>[   99.055345] nouveau D[   PDISP][0000:02:00.0] 	0x0884: 0x00000000              
>[   99.055350] nouveau D[   PDISP][0000:02:00.0] 	0x089c: 0x00000000              
>[   99.055355] nouveau D[   PDISP][0000:02:00.0] 	0x08a0: 0x00000011              
>[   99.055360] nouveau D[   PDISP][0000:02:00.0] 	0x08a4: 0x00000000              
>[   99.055365] nouveau D[   PDISP][0000:02:00.0] 	0x08a8: 0x00040000              
>[   99.055371] nouveau D[   PDISP][0000:02:00.0] 	0x08c0: 0x00000000              
>[   99.055376] nouveau D[   PDISP][0000:02:00.0] 	0x08c4: 0x00000000              
>[   99.055381] nouveau D[   PDISP][0000:02:00.0] 	0x08c8: 0x03000400 -> 0x03000556
>[   99.055386] nouveau D[   PDISP][0000:02:00.0] 	0x08d4: 0x00000000              
>[   99.055392] nouveau D[   PDISP][0000:02:00.0] 	0x08d8: 0x03000556              
>[   99.055397] nouveau D[   PDISP][0000:02:00.0] 	0x08dc: 0x03000556              
>[   99.055403] nouveau D[   PDISP][0000:02:00.0] 	0x0900: 0x00000311              
>[   99.055408] nouveau D[   PDISP][0000:02:00.0] 	0x0904: 0x00000100              
>[   99.055413] nouveau D[   PDISP][0000:02:00.0] 	0x0910: 0x00000000              
>[   99.055418] nouveau D[   PDISP][0000:02:00.0] 	0x0914: 0x00000000              
>[   99.055419] nouveau D[   PDISP][0000:02:00.0] Core - HEAD 1:
>[   99.055425] nouveau D[   PDISP][0000:02:00.0] 	0x0c00: 0x00000000              
>[   99.055430] nouveau D[   PDISP][0000:02:00.0] 	0x0c04: 0x0081a004              
>[   99.055435] nouveau D[   PDISP][0000:02:00.0] 	0x0c08: 0x00000000              
>[   99.055441] nouveau D[   PDISP][0000:02:00.0] 	0x0c0c: 0x00000000              
>[   99.055446] nouveau D[   PDISP][0000:02:00.0] 	0x0c10: 0x00000000              
>[   99.055451] nouveau D[   PDISP][0000:02:00.0] 	0x0c14: 0x03a60770              
>[   99.055457] nouveau D[   PDISP][0000:02:00.0] 	0x0c18: 0x00050097              
>[   99.055462] nouveau D[   PDISP][0000:02:00.0] 	0x0c1c: 0x001e017f              
>[   99.055467] nouveau D[   PDISP][0000:02:00.0] 	0x0c20: 0x03a2071f              
>[   99.055473] nouveau D[   PDISP][0000:02:00.0] 	0x0c24: 0x00000001              
>[   99.055478] nouveau D[   PDISP][0000:02:00.0] 	0x0c28: 0x0000023c              
>[   99.055483] nouveau D[   PDISP][0000:02:00.0] 	0x0c2c: 0x00000000              
>[   99.055488] nouveau D[   PDISP][0000:02:00.0] 	0x0c30: 0x00000000              
>[   99.055494] nouveau D[   PDISP][0000:02:00.0] 	0x0c38: 0x00000000              
>[   99.055499] nouveau D[   PDISP][0000:02:00.0] 	0x0c40: 0xc0000000              
>[   99.055505] nouveau D[   PDISP][0000:02:00.0] 	0x0c44: 0x00000470              
>[   99.055510] nouveau D[   PDISP][0000:02:00.0] 	0x0c48: 0x00000000              
>[   99.055515] nouveau D[   PDISP][0000:02:00.0] 	0x0c4c: 0x00000000              
>[   99.055520] nouveau D[   PDISP][0000:02:00.0] 	0x0c5c: 0xf0000001              
>[   99.055526] nouveau D[   PDISP][0000:02:00.0] 	0x0c60: 0x00005a00              
>[   99.055531] nouveau D[   PDISP][0000:02:00.0] 	0x0c64: 0x00000000              
>[   99.055536] nouveau D[   PDISP][0000:02:00.0] 	0x0c68: 0x03000400              
>[   99.055542] nouveau D[   PDISP][0000:02:00.0] 	0x0c6c: 0x00004004              
>[   99.055547] nouveau D[   PDISP][0000:02:00.0] 	0x0c70: 0x0000cf00              
>[   99.055552] nouveau D[   PDISP][0000:02:00.0] 	0x0c74: 0xffff00fe              
>[   99.055558] nouveau D[   PDISP][0000:02:00.0] 	0x0c78: 0x00000000              
>[   99.055563] nouveau D[   PDISP][0000:02:00.0] 	0x0c80: 0x05000000              
>[   99.055568] nouveau D[   PDISP][0000:02:00.0] 	0x0c84: 0x00000000              
>[   99.055574] nouveau D[   PDISP][0000:02:00.0] 	0x0c9c: 0x00000000              
>[   99.055579] nouveau D[   PDISP][0000:02:00.0] 	0x0ca0: 0x00000002              
>[   99.055585] nouveau D[   PDISP][0000:02:00.0] 	0x0ca4: 0x00000000              
>[   99.055590] nouveau D[   PDISP][0000:02:00.0] 	0x0ca8: 0x00040000              
>[   99.055595] nouveau D[   PDISP][0000:02:00.0] 	0x0cc0: 0x00000000              
>[   99.055601] nouveau D[   PDISP][0000:02:00.0] 	0x0cc4: 0x00000000              
>[   99.055606] nouveau D[   PDISP][0000:02:00.0] 	0x0cc8: 0x03000400              
>[   99.055611] nouveau D[   PDISP][0000:02:00.0] 	0x0cd4: 0x00000000              
>[   99.055617] nouveau D[   PDISP][0000:02:00.0] 	0x0cd8: 0x038405a0              
>[   99.055622] nouveau D[   PDISP][0000:02:00.0] 	0x0cdc: 0x038405a0              
>[   99.055627] nouveau D[   PDISP][0000:02:00.0] 	0x0d00: 0x00000311              
>[   99.055632] nouveau D[   PDISP][0000:02:00.0] 	0x0d04: 0x00000100              
>[   99.055637] nouveau D[   PDISP][0000:02:00.0] 	0x0d10: 0x00000000              
>[   99.055643] nouveau D[   PDISP][0000:02:00.0] 	0x0d14: 0x00000000              
>[   99.071710] nouveau D[   PDISP][0000:02:00.0] supervisor 0x00000020 0x00000030
>[   99.071735] nouveau D[   PDISP][0000:02:00.0] supervisor 0x00000040 0x00000030
>[   99.104945] [drm:drm_crtc_helper_set_config] Setting connector DPMS state to on
>[   99.104946] [drm:drm_crtc_helper_set_config] 	[CONNECTOR:19:LVDS-1] set DPMS on
>[   99.104948] [drm:drm_crtc_helper_set_config] 
>[   99.104949] [drm:drm_crtc_helper_set_config] [CRTC:18] [FB:46] #connectors=1 (x y) (0 0)
>[   99.104950] [drm:drm_crtc_helper_set_config] modes are different, full mode set
>[   99.104952] [drm:drm_mode_debug_printmodeline] Modeline 43:"" 0 65000 1024 1048 1184 1344 768 771 777 806 0x0 0xa
>[   99.104954] [drm:drm_mode_debug_printmodeline] Modeline 45:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[   99.104955] [drm:drm_crtc_helper_set_config] [CONNECTOR:19:LVDS-1] to [CRTC:16]
>[   99.104955] [drm:drm_crtc_helper_set_config] [CONNECTOR:23:DP-1] to [CRTC:18]
>[   99.104956] [drm:drm_crtc_helper_set_config] attempting to set mode from userspace
>[   99.104957] [drm:drm_mode_debug_printmodeline] Modeline 45:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[   99.104959] [drm:drm_crtc_helper_set_mode] [CRTC:18]
>[   99.119120] [drm:drm_crtc_helper_set_mode] [ENCODER:24:TMDS-24] set [MODE:45:1440x900]
>[   99.119140] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000100 2
>[   99.119298] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109001 0x10000002
>[   99.119301] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x43018406
>[   99.119304] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30323331
>[   99.119307] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   99.119311] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   99.119315] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 9: 0x00000202 3
>[   99.119479] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01109002 0x10000003
>[   99.119482] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x43017777
>[   99.119485] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x30323331
>[   99.119489] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0x0a353736
>[   99.119492] nouveau D[     I2C][0000:02:00.0] AUXCH(1): rd 0xf7002020
>[   99.119592] nouveau D[   PDISP][0000:02:00.0] supervisor 0x00000010 0x00000040
>[   99.119594] nouveau D[   PDISP][0000:02:00.0] Core:
>[   99.119600] nouveau D[   PDISP][0000:02:00.0] 	0x0084: 0x019e02e2 -> 0x00000000
>[   99.119605] nouveau D[   PDISP][0000:02:00.0] 	0x0088: 0xf0000000              
>[   99.119606] nouveau D[   PDISP][0000:02:00.0] Core - DAC 0:
>[   99.119612] nouveau D[   PDISP][0000:02:00.0] 	0x0400: 0x00000000              
>[   99.119617] nouveau D[   PDISP][0000:02:00.0] 	0x0404: 0x00000000              
>[   99.119623] nouveau D[   PDISP][0000:02:00.0] 	0x0420: 0x00010000              
>[   99.119624] nouveau D[   PDISP][0000:02:00.0] Core - DAC 1:
>[   99.119629] nouveau D[   PDISP][0000:02:00.0] 	0x0480: 0x00000000              
>[   99.119635] nouveau D[   PDISP][0000:02:00.0] 	0x0484: 0x00000000              
>[   99.119640] nouveau D[   PDISP][0000:02:00.0] 	0x04a0: 0x00010000              
>[   99.119641] nouveau D[   PDISP][0000:02:00.0] Core - DAC 2:
>[   99.119646] nouveau D[   PDISP][0000:02:00.0] 	0x0500: 0x00000000              
>[   99.119652] nouveau D[   PDISP][0000:02:00.0] 	0x0504: 0x00000000              
>[   99.119657] nouveau D[   PDISP][0000:02:00.0] 	0x0520: 0x00010000              
>[   99.119658] nouveau D[   PDISP][0000:02:00.0] Core - SOR 0:
>[   99.119663] nouveau D[   PDISP][0000:02:00.0] 	0x0600: 0x00003001              
>[   99.119664] nouveau D[   PDISP][0000:02:00.0] Core - SOR 1:
>[   99.119669] nouveau D[   PDISP][0000:02:00.0] 	0x0640: 0x00000000              
>[   99.119670] nouveau D[   PDISP][0000:02:00.0] Core - SOR 2:
>[   99.119676] nouveau D[   PDISP][0000:02:00.0] 	0x0680: 0x00051802              
>[   99.119677] nouveau D[   PDISP][0000:02:00.0] Core - SOR 3:
>[   99.119683] nouveau D[   PDISP][0000:02:00.0] 	0x06c0: 0x00000000              
>[   99.119684] nouveau D[   PDISP][0000:02:00.0] Core - PIOR 0:
>[   99.119689] nouveau D[   PDISP][0000:02:00.0] 	0x0700: 0x00000000              
>[   99.119690] nouveau D[   PDISP][0000:02:00.0] Core - PIOR 1:
>[   99.119696] nouveau D[   PDISP][0000:02:00.0] 	0x0740: 0x00000000              
>[   99.119697] nouveau D[   PDISP][0000:02:00.0] Core - PIOR 2:
>[   99.119703] nouveau D[   PDISP][0000:02:00.0] 	0x0780: 0x00000000              
>[   99.119704] nouveau D[   PDISP][0000:02:00.0] Core - HEAD 0:
>[   99.119710] nouveau D[   PDISP][0000:02:00.0] 	0x0800: 0x00000000              
>[   99.119715] nouveau D[   PDISP][0000:02:00.0] 	0x0804: 0x00811558              
>[   99.119721] nouveau D[   PDISP][0000:02:00.0] 	0x0808: 0x00000000              
>[   99.119726] nouveau D[   PDISP][0000:02:00.0] 	0x080c: 0x00000000              
>[   99.119731] nouveau D[   PDISP][0000:02:00.0] 	0x0810: 0x00000000              
>[   99.119737] nouveau D[   PDISP][0000:02:00.0] 	0x0814: 0x031605da              
>[   99.119742] nouveau D[   PDISP][0000:02:00.0] 	0x0818: 0x0003001f              
>[   99.119748] nouveau D[   PDISP][0000:02:00.0] 	0x081c: 0x00140053              
>[   99.119753] nouveau D[   PDISP][0000:02:00.0] 	0x0820: 0x031405a9              
>[   99.119758] nouveau D[   PDISP][0000:02:00.0] 	0x0824: 0x00000001              
>[   99.119763] nouveau D[   PDISP][0000:02:00.0] 	0x0828: 0x000001a5              
>[   99.119768] nouveau D[   PDISP][0000:02:00.0] 	0x082c: 0x00000000              
>[   99.119773] nouveau D[   PDISP][0000:02:00.0] 	0x0830: 0x00000000              
>[   99.119779] nouveau D[   PDISP][0000:02:00.0] 	0x0838: 0x00000000              
>[   99.119784] nouveau D[   PDISP][0000:02:00.0] 	0x0840: 0xc0000000              
>[   99.119790] nouveau D[   PDISP][0000:02:00.0] 	0x0844: 0x00000410              
>[   99.119795] nouveau D[   PDISP][0000:02:00.0] 	0x0848: 0x00000000              
>[   99.119800] nouveau D[   PDISP][0000:02:00.0] 	0x084c: 0x00000000              
>[   99.119806] nouveau D[   PDISP][0000:02:00.0] 	0x085c: 0xf0000001              
>[   99.119811] nouveau D[   PDISP][0000:02:00.0] 	0x0860: 0x00000600              
>[   99.119816] nouveau D[   PDISP][0000:02:00.0] 	0x0864: 0x00000000              
>[   99.119822] nouveau D[   PDISP][0000:02:00.0] 	0x0868: 0x038405a0              
>[   99.119827] nouveau D[   PDISP][0000:02:00.0] 	0x086c: 0x00101700              
>[   99.119832] nouveau D[   PDISP][0000:02:00.0] 	0x0870: 0x0000cf00              
>[   99.119838] nouveau D[   PDISP][0000:02:00.0] 	0x0874: 0xffff0000              
>[   99.119843] nouveau D[   PDISP][0000:02:00.0] 	0x0878: 0x00000000              
>[   99.119848] nouveau D[   PDISP][0000:02:00.0] 	0x0880: 0x05000000              
>[   99.119854] nouveau D[   PDISP][0000:02:00.0] 	0x0884: 0x00000000              
>[   99.119859] nouveau D[   PDISP][0000:02:00.0] 	0x089c: 0x00000000              
>[   99.119864] nouveau D[   PDISP][0000:02:00.0] 	0x08a0: 0x00000011              
>[   99.119870] nouveau D[   PDISP][0000:02:00.0] 	0x08a4: 0x00000000              
>[   99.119875] nouveau D[   PDISP][0000:02:00.0] 	0x08a8: 0x00040000              
>[   99.119880] nouveau D[   PDISP][0000:02:00.0] 	0x08c0: 0x00000000              
>[   99.119886] nouveau D[   PDISP][0000:02:00.0] 	0x08c4: 0x00000000              
>[   99.119891] nouveau D[   PDISP][0000:02:00.0] 	0x08c8: 0x03000556              
>[   99.119896] nouveau D[   PDISP][0000:02:00.0] 	0x08d4: 0x00000000              
>[   99.119901] nouveau D[   PDISP][0000:02:00.0] 	0x08d8: 0x03000556              
>[   99.119907] nouveau D[   PDISP][0000:02:00.0] 	0x08dc: 0x03000556              
>[   99.119912] nouveau D[   PDISP][0000:02:00.0] 	0x0900: 0x00000311              
>[   99.119917] nouveau D[   PDISP][0000:02:00.0] 	0x0904: 0x00000100              
>[   99.119923] nouveau D[   PDISP][0000:02:00.0] 	0x0910: 0x00000000              
>[   99.119928] nouveau D[   PDISP][0000:02:00.0] 	0x0914: 0x00000000              
>[   99.119929] nouveau D[   PDISP][0000:02:00.0] Core - HEAD 1:
>[   99.119934] nouveau D[   PDISP][0000:02:00.0] 	0x0c00: 0x00000000              
>[   99.119940] nouveau D[   PDISP][0000:02:00.0] 	0x0c04: 0x0081a004              
>[   99.119945] nouveau D[   PDISP][0000:02:00.0] 	0x0c08: 0x00000000              
>[   99.119951] nouveau D[   PDISP][0000:02:00.0] 	0x0c0c: 0x00000000              
>[   99.119956] nouveau D[   PDISP][0000:02:00.0] 	0x0c10: 0x00000000              
>[   99.119961] nouveau D[   PDISP][0000:02:00.0] 	0x0c14: 0x03a60770              
>[   99.119967] nouveau D[   PDISP][0000:02:00.0] 	0x0c18: 0x00050097              
>[   99.119972] nouveau D[   PDISP][0000:02:00.0] 	0x0c1c: 0x001e017f              
>[   99.119978] nouveau D[   PDISP][0000:02:00.0] 	0x0c20: 0x03a2071f              
>[   99.119983] nouveau D[   PDISP][0000:02:00.0] 	0x0c24: 0x00000001              
>[   99.119988] nouveau D[   PDISP][0000:02:00.0] 	0x0c28: 0x0000023c              
>[   99.119993] nouveau D[   PDISP][0000:02:00.0] 	0x0c2c: 0x00000000              
>[   99.119999] nouveau D[   PDISP][0000:02:00.0] 	0x0c30: 0x00000000              
>[   99.120004] nouveau D[   PDISP][0000:02:00.0] 	0x0c38: 0x00000000              
>[   99.120009] nouveau D[   PDISP][0000:02:00.0] 	0x0c40: 0xc0000000              
>[   99.120015] nouveau D[   PDISP][0000:02:00.0] 	0x0c44: 0x00000470              
>[   99.120020] nouveau D[   PDISP][0000:02:00.0] 	0x0c48: 0x00000000              
>[   99.120025] nouveau D[   PDISP][0000:02:00.0] 	0x0c4c: 0x00000000              
>[   99.120031] nouveau D[   PDISP][0000:02:00.0] 	0x0c5c: 0xf0000001              
>[   99.120036] nouveau D[   PDISP][0000:02:00.0] 	0x0c60: 0x00005a00 -> 0x00000600
>[   99.120042] nouveau D[   PDISP][0000:02:00.0] 	0x0c64: 0x00000000              
>[   99.120047] nouveau D[   PDISP][0000:02:00.0] 	0x0c68: 0x03000400 -> 0x038405a0
>[   99.120053] nouveau D[   PDISP][0000:02:00.0] 	0x0c6c: 0x00004004 -> 0x00101700
>[   99.120058] nouveau D[   PDISP][0000:02:00.0] 	0x0c70: 0x0000cf00              
>[   99.120063] nouveau D[   PDISP][0000:02:00.0] 	0x0c74: 0xffff00fe -> 0xffff0000
>[   99.120069] nouveau D[   PDISP][0000:02:00.0] 	0x0c78: 0x00000000              
>[   99.120074] nouveau D[   PDISP][0000:02:00.0] 	0x0c80: 0x05000000              
>[   99.120080] nouveau D[   PDISP][0000:02:00.0] 	0x0c84: 0x00000000              
>[   99.120085] nouveau D[   PDISP][0000:02:00.0] 	0x0c9c: 0x00000000              
>[   99.120090] nouveau D[   PDISP][0000:02:00.0] 	0x0ca0: 0x00000002              
>[   99.120096] nouveau D[   PDISP][0000:02:00.0] 	0x0ca4: 0x00000000              
>[   99.120101] nouveau D[   PDISP][0000:02:00.0] 	0x0ca8: 0x00040000              
>[   99.120107] nouveau D[   PDISP][0000:02:00.0] 	0x0cc0: 0x00000000              
>[   99.120112] nouveau D[   PDISP][0000:02:00.0] 	0x0cc4: 0x00000000              
>[   99.120117] nouveau D[   PDISP][0000:02:00.0] 	0x0cc8: 0x03000400 -> 0x038405a0
>[   99.120123] nouveau D[   PDISP][0000:02:00.0] 	0x0cd4: 0x00000000              
>[   99.120128] nouveau D[   PDISP][0000:02:00.0] 	0x0cd8: 0x038405a0              
>[   99.120134] nouveau D[   PDISP][0000:02:00.0] 	0x0cdc: 0x038405a0              
>[   99.120139] nouveau D[   PDISP][0000:02:00.0] 	0x0d00: 0x00000311              
>[   99.120144] nouveau D[   PDISP][0000:02:00.0] 	0x0d04: 0x00000100              
>[   99.120149] nouveau D[   PDISP][0000:02:00.0] 	0x0d10: 0x00000000              
>[   99.120155] nouveau D[   PDISP][0000:02:00.0] 	0x0d14: 0x00000000              
>[   99.135919] nouveau D[   PDISP][0000:02:00.0] supervisor 0x00000020 0x00000050
>[   99.135941] nouveau D[   PDISP][0000:02:00.0] supervisor 0x00000040 0x00000050
>[   99.169182] [drm:drm_crtc_helper_set_config] Setting connector DPMS state to on
>[   99.169183] [drm:drm_crtc_helper_set_config] 	[CONNECTOR:23:DP-1] set DPMS on
>[   99.169185] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 8: 0x00000600 1
>[   99.169199] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000001
>[   99.169199] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   99.169200] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   99.169201] nouveau D[     I2C][0000:02:00.0] AUXCH(1): wr 0x00000000
>[   99.169338] nouveau D[     I2C][0000:02:00.0] AUXCH(1): 00 0x01108000 0x10000000
>[   99.171346] [drm:drm_crtc_helper_set_config] 
>[   99.171347] [drm:drm_crtc_helper_set_config] [CRTC:16] [FB:46] #connectors=1 (x y) (0 0)
>[   99.171349] [drm:drm_crtc_helper_set_config] [CONNECTOR:19:LVDS-1] to [CRTC:16]
>[   99.171350] [drm:drm_crtc_helper_set_config] [CONNECTOR:23:DP-1] to [CRTC:18]
>[   99.171351] [drm:drm_crtc_helper_set_config] 
>[   99.171351] [drm:drm_crtc_helper_set_config] [CRTC:18] [FB:46] #connectors=1 (x y) (0 0)
>[   99.171353] [drm:drm_crtc_helper_set_config] [CONNECTOR:19:LVDS-1] to [CRTC:16]
>[   99.171353] [drm:drm_crtc_helper_set_config] [CONNECTOR:23:DP-1] to [CRTC:18]
>[   99.171362] [drm:drm_crtc_helper_set_config] 
>[   99.171363] [drm:drm_crtc_helper_set_config] [CRTC:16] [FB:46] #connectors=1 (x y) (0 0)
>[   99.171364] [drm:drm_crtc_helper_set_config] [CONNECTOR:19:LVDS-1] to [CRTC:16]
>[   99.171365] [drm:drm_crtc_helper_set_config] [CONNECTOR:23:DP-1] to [CRTC:18]
>[   99.171365] [drm:drm_crtc_helper_set_config] 
>[   99.171366] [drm:drm_crtc_helper_set_config] [CRTC:18] [FB:46] #connectors=1 (x y) (0 0)
>[   99.171367] [drm:drm_crtc_helper_set_config] [CONNECTOR:19:LVDS-1] to [CRTC:16]
>[   99.171368] [drm:drm_crtc_helper_set_config] [CONNECTOR:23:DP-1] to [CRTC:18]
>[   99.614845] systemd-journald[564]: Failed to read ACL on /var/log/journal/4282edddc94074beaa0537810000002b/user-1000.journal, ignoring: Operation not supported
>[  101.799952] [drm:drm_crtc_helper_set_config] 
>[  101.799954] [drm:drm_crtc_helper_set_config] [CRTC:16] [FB:46] #connectors=1 (x y) (0 0)
>[  101.799958] [drm:drm_crtc_helper_set_config] [CONNECTOR:19:LVDS-1] to [CRTC:16]
>[  101.799959] [drm:drm_crtc_helper_set_config] [CONNECTOR:23:DP-1] to [CRTC:18]
>[  101.799961] [drm:drm_crtc_helper_set_config] 
>[  101.799962] [drm:drm_crtc_helper_set_config] [CRTC:18] [FB:46] #connectors=1 (x y) (0 0)
>[  101.799964] [drm:drm_crtc_helper_set_config] [CONNECTOR:19:LVDS-1] to [CRTC:16]
>[  101.799965] [drm:drm_crtc_helper_set_config] [CONNECTOR:23:DP-1] to [CRTC:18]
>[  117.059927] wlan0: deauthenticating from 64:d8:14:b2:b7:ae by local choice (Reason: 3=DEAUTH_LEAVING)
>[  117.066150] cfg80211: All devices are disconnected, going to restore regulatory settings
>[  117.066156] cfg80211: Restoring regulatory settings
>[  117.066161] cfg80211: Kicking the queue
>[  117.066165] cfg80211: Calling CRDA to update world regulatory domain
>[  117.069399] cfg80211: Ignoring regulatory request set by core since the driver uses its own custom regulatory domain
>[  117.069403] cfg80211: World regulatory domain updated:
>[  117.069405] cfg80211:  DFS Master region: unset
>[  117.069406] cfg80211:   (start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp), (dfs_cac_time)
>[  117.069419] cfg80211:   (2402000 KHz - 2472000 KHz @ 40000 KHz), (N/A, 2000 mBm), (N/A)
>[  117.069434] cfg80211:   (2457000 KHz - 2482000 KHz @ 40000 KHz), (N/A, 2000 mBm), (N/A)
>[  117.069441] cfg80211:   (2474000 KHz - 2494000 KHz @ 20000 KHz), (N/A, 2000 mBm), (N/A)
>[  117.069444] cfg80211:   (5170000 KHz - 5250000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A, 2000 mBm), (N/A)
>[  117.069446] cfg80211:   (5250000 KHz - 5330000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A, 2000 mBm), (0 s)
>[  117.069449] cfg80211:   (5490000 KHz - 5730000 KHz @ 160000 KHz), (N/A, 2000 mBm), (0 s)
>[  117.069451] cfg80211:   (5735000 KHz - 5835000 KHz @ 80000 KHz), (N/A, 2000 mBm), (N/A)
>[  117.069453] cfg80211:   (57240000 KHz - 63720000 KHz @ 2160000 KHz), (N/A, 0 mBm), (N/A)
>[  118.069431] cfg80211: Found new beacon on frequency: 5180 MHz (Ch 36) on phy0
>[  120.707708] wlan0: authenticate with 64:d8:14:b2:b7:ae
>[  120.716358] wlan0: send auth to 64:d8:14:b2:b7:ae (try 1/3)
>[  120.717302] wlan0: authenticated
>[  120.726963] wlan0: associate with 64:d8:14:b2:b7:ae (try 1/3)
>[  120.728854] wlan0: RX AssocResp from 64:d8:14:b2:b7:ae (capab=0x11 status=0 aid=6)
>[  120.729069] wlan0: associated
>[  120.729130] cfg80211: Calling CRDA for country: GB
>[  120.731446] cfg80211: Updating information on frequency 2412 MHz with regulatory rule:
>[  120.731451] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[  120.731455] cfg80211: Updating information on frequency 2417 MHz with regulatory rule:
>[  120.731459] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[  120.731461] cfg80211: Updating information on frequency 2422 MHz with regulatory rule:
>[  120.731463] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[  120.731465] cfg80211: Updating information on frequency 2427 MHz with regulatory rule:
>[  120.731466] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[  120.731468] cfg80211: Updating information on frequency 2432 MHz with regulatory rule:
>[  120.731470] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[  120.731471] cfg80211: Updating information on frequency 2437 MHz with regulatory rule:
>[  120.731473] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[  120.731475] cfg80211: Updating information on frequency 2442 MHz with regulatory rule:
>[  120.731477] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[  120.731478] cfg80211: Updating information on frequency 2447 MHz with regulatory rule:
>[  120.731480] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[  120.731482] cfg80211: Updating information on frequency 2452 MHz with regulatory rule:
>[  120.731484] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[  120.731485] cfg80211: Updating information on frequency 2457 MHz with regulatory rule:
>[  120.731487] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[  120.731489] cfg80211: Updating information on frequency 2462 MHz with regulatory rule:
>[  120.731490] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[  120.731492] cfg80211: Updating information on frequency 2467 MHz with regulatory rule:
>[  120.731494] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[  120.731495] cfg80211: Updating information on frequency 2472 MHz with regulatory rule:
>[  120.731497] cfg80211: 2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A mBi, 2000 mBm)
>[  120.731499] cfg80211: Disabling freq 2484 MHz
>[  120.731500] cfg80211: Disabling freq 5040 MHz
>[  120.731501] cfg80211: Disabling freq 5060 MHz
>[  120.731502] cfg80211: Disabling freq 5080 MHz
>[  120.731504] cfg80211: Updating information on frequency 5180 MHz with regulatory rule:
>[  120.731506] cfg80211: 5170000 KHz - 5250000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A mBi, 2000 mBm)
>[  120.731508] cfg80211: Updating information on frequency 5200 MHz with regulatory rule:
>[  120.731510] cfg80211: 5170000 KHz - 5250000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A mBi, 2000 mBm)
>[  120.731512] cfg80211: Updating information on frequency 5220 MHz with regulatory rule:
>[  120.731514] cfg80211: 5170000 KHz - 5250000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A mBi, 2000 mBm)
>[  120.731516] cfg80211: Updating information on frequency 5240 MHz with regulatory rule:
>[  120.731518] cfg80211: 5170000 KHz - 5250000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A mBi, 2000 mBm)
>[  120.731519] cfg80211: Updating information on frequency 5260 MHz with regulatory rule:
>[  120.731521] cfg80211: 5250000 KHz - 5330000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A mBi, 2000 mBm)
>[  120.731523] cfg80211: Updating information on frequency 5280 MHz with regulatory rule:
>[  120.731525] cfg80211: 5250000 KHz - 5330000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A mBi, 2000 mBm)
>[  120.731527] cfg80211: Updating information on frequency 5300 MHz with regulatory rule:
>[  120.731529] cfg80211: 5250000 KHz - 5330000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A mBi, 2000 mBm)
>[  120.731531] cfg80211: Updating information on frequency 5320 MHz with regulatory rule:
>[  120.731532] cfg80211: 5250000 KHz - 5330000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A mBi, 2000 mBm)
>[  120.731534] cfg80211: Updating information on frequency 5500 MHz with regulatory rule:
>[  120.731536] cfg80211: 5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A mBi, 2700 mBm)
>[  120.731538] cfg80211: Updating information on frequency 5520 MHz with regulatory rule:
>[  120.731539] cfg80211: 5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A mBi, 2700 mBm)
>[  120.731541] cfg80211: Updating information on frequency 5540 MHz with regulatory rule:
>[  120.731543] cfg80211: 5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A mBi, 2700 mBm)
>[  120.731544] cfg80211: Updating information on frequency 5560 MHz with regulatory rule:
>[  120.731546] cfg80211: 5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A mBi, 2700 mBm)
>[  120.731548] cfg80211: Updating information on frequency 5580 MHz with regulatory rule:
>[  120.731550] cfg80211: 5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A mBi, 2700 mBm)
>[  120.731551] cfg80211: Updating information on frequency 5600 MHz with regulatory rule:
>[  120.731553] cfg80211: 5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A mBi, 2700 mBm)
>[  120.731555] cfg80211: Updating information on frequency 5620 MHz with regulatory rule:
>[  120.731557] cfg80211: 5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A mBi, 2700 mBm)
>[  120.731558] cfg80211: Updating information on frequency 5640 MHz with regulatory rule:
>[  120.731560] cfg80211: 5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A mBi, 2700 mBm)
>[  120.731562] cfg80211: Updating information on frequency 5660 MHz with regulatory rule:
>[  120.731564] cfg80211: 5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A mBi, 2700 mBm)
>[  120.731565] cfg80211: Updating information on frequency 5680 MHz with regulatory rule:
>[  120.731567] cfg80211: 5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A mBi, 2700 mBm)
>[  120.731569] cfg80211: Updating information on frequency 5700 MHz with regulatory rule:
>[  120.731570] cfg80211: 5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A mBi, 2700 mBm)
>[  120.731572] cfg80211: Disabling freq 5745 MHz
>[  120.731573] cfg80211: Disabling freq 5765 MHz
>[  120.731574] cfg80211: Disabling freq 5785 MHz
>[  120.731575] cfg80211: Disabling freq 5805 MHz
>[  120.731577] cfg80211: Disabling freq 5825 MHz
>[  120.731583] ath: EEPROM regdomain: 0x833a
>[  120.731585] ath: EEPROM indicates we should expect a country code
>[  120.731587] ath: doing EEPROM country->regdmn map search
>[  120.731588] ath: country maps to regdmn code: 0x37
>[  120.731589] ath: Country alpha2 being used: GB
>[  120.731591] ath: Regpair used: 0x37
>[  120.731592] ath: regdomain 0x833a dynamically updated by country IE
>[  120.731594] cfg80211: Regulatory domain changed to country: GB
>[  120.731595] cfg80211:  DFS Master region: unset
>[  120.731596] cfg80211:   (start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp), (dfs_cac_time)
>[  120.731599] cfg80211:   (2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A, 2000 mBm), (N/A)
>[  120.731601] cfg80211:   (5170000 KHz - 5250000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A, 2000 mBm), (N/A)
>[  120.731604] cfg80211:   (5250000 KHz - 5330000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A, 2000 mBm), (0 s)
>[  120.731606] cfg80211:   (5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A, 2700 mBm), (0 s)
>[  120.731608] cfg80211:   (57000000 KHz - 66000000 KHz @ 2160000 KHz), (N/A, 4000 mBm), (N/A)
>[  120.999831] wlan0: Limiting TX power to 17 dBm as advertised by 64:d8:14:b2:b7:ae

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Attachments on bug 78439: 98687 | 98688 | 98689 | 100920 | 100923 | 100924 | 101180 | 101204 | 101299 | 115643 | 115644

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