Attachment 118695 Details for Bug 92308 – dmesg with drm.debug=0x1e

dmesg with drm.debug=0x1e

dmesg.txt (text/plain), 915.64 KB, created by Benjamin Herrenschmidt on 2015-10-06 01:27:30 UTC

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Creator: Benjamin Herrenschmidt

Created: 2015-10-06 01:27:30 UTC

Size: 915.64 KB

patch

obsolete

>[    0.000000] Initializing cgroup subsys cpuset
>[    0.000000] Initializing cgroup subsys cpu
>[    0.000000] Initializing cgroup subsys cpuacct
>[    0.000000] Linux version 4.3.0-rc4+ (benh@pasglop) (gcc version 5.1.1 20150618 (Red Hat 5.1.1-4) (GCC) ) #1 SMP Tue Oct 6 11:46:15 AEDT 2015
>[    0.000000] Command line: BOOT_IMAGE=/boot/vmlinuz-4.3.0-rc4+ root=UUID=edace074-b6a4-4d59-b4ea-1f9886886247 ro rhgb quiet drm.debug=0x1e log_buf_len=2M LANG=en_AU.UTF-8
>[    0.000000] x86/fpu: xstate_offset[2]: 0240, xstate_sizes[2]: 0100
>[    0.000000] x86/fpu: Supporting XSAVE feature 0x01: 'x87 floating point registers'
>[    0.000000] x86/fpu: Supporting XSAVE feature 0x02: 'SSE registers'
>[    0.000000] x86/fpu: Supporting XSAVE feature 0x04: 'AVX registers'
>[    0.000000] x86/fpu: Enabled xstate features 0x7, context size is 0x340 bytes, using 'standard' format.
>[    0.000000] x86/fpu: Using 'eager' FPU context switches.
>[    0.000000] e820: BIOS-provided physical RAM map:
>[    0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000009cfff] usable
>[    0.000000] BIOS-e820: [mem 0x000000000009d000-0x000000000009ffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000000e0000-0x00000000000fffff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000000100000-0x000000000fffffff] usable
>[    0.000000] BIOS-e820: [mem 0x0000000010000000-0x000000001000afff] reserved
>[    0.000000] BIOS-e820: [mem 0x000000001000b000-0x00000000be0adfff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000be0ae000-0x00000000ccbfefff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000ccbff000-0x00000000ccd7efff] ACPI NVS
>[    0.000000] BIOS-e820: [mem 0x00000000ccd7f000-0x00000000ccdfefff] ACPI data
>[    0.000000] BIOS-e820: [mem 0x00000000ccdff000-0x00000000cfffffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000f8000000-0x00000000fbffffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fec00000-0x00000000fec00fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fed08000-0x00000000fed08fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fed10000-0x00000000fed19fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fed1c000-0x00000000fed1ffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fee00000-0x00000000fee00fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000ffa00000-0x00000000ffffffff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000100000000-0x000000022dffffff] usable
>[    0.000000] NX (Execute Disable) protection: active
>[    0.000000] SMBIOS 2.7 present.
>[    0.000000] DMI: LENOVO 20BTCTO1WW/20BTCTO1WW, BIOS N14ET32W (1.10 ) 08/13/2015
>[    0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved
>[    0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable
>[    0.000000] e820: last_pfn = 0x22e000 max_arch_pfn = 0x400000000
>[    0.000000] MTRR default type: write-back
>[    0.000000] MTRR fixed ranges enabled:
>[    0.000000]   00000-9FFFF write-back
>[    0.000000]   A0000-BFFFF uncachable
>[    0.000000]   C0000-FFFFF write-protect
>[    0.000000] MTRR variable ranges enabled:
>[    0.000000]   0 base 00E0000000 mask 7FF0000000 uncachable
>[    0.000000]   1 base 00D0000000 mask 7FF0000000 uncachable
>[    0.000000]   2 base 00CE000000 mask 7FFE000000 uncachable
>[    0.000000]   3 base 00CD000000 mask 7FFF000000 uncachable
>[    0.000000]   4 base 00CCE00000 mask 7FFFE00000 uncachable
>[    0.000000]   5 base 00F0000000 mask 7FF0000000 uncachable
>[    0.000000]   6 disabled
>[    0.000000]   7 disabled
>[    0.000000]   8 disabled
>[    0.000000]   9 disabled
>[    0.000000] x86/PAT: Configuration [0-7]: WB  WC  UC- UC  WB  WC  UC- WT  
>[    0.000000] e820: last_pfn = 0xbe0ae max_arch_pfn = 0x400000000
>[    0.000000] found SMP MP-table at [mem 0x000f0100-0x000f010f] mapped at [ffff8800000f0100]
>[    0.000000] Base memory trampoline at [ffff880000097000] 97000 size 24576
>[    0.000000] Using GB pages for direct mapping
>[    0.000000] init_memory_mapping: [mem 0x00000000-0x000fffff]
>[    0.000000]  [mem 0x00000000-0x000fffff] page 4k
>[    0.000000] BRK [0x02024000, 0x02024fff] PGTABLE
>[    0.000000] BRK [0x02025000, 0x02025fff] PGTABLE
>[    0.000000] BRK [0x02026000, 0x02026fff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0x22de00000-0x22dffffff]
>[    0.000000]  [mem 0x22de00000-0x22dffffff] page 2M
>[    0.000000] BRK [0x02027000, 0x02027fff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0x220000000-0x22ddfffff]
>[    0.000000]  [mem 0x220000000-0x22ddfffff] page 2M
>[    0.000000] init_memory_mapping: [mem 0x200000000-0x21fffffff]
>[    0.000000]  [mem 0x200000000-0x21fffffff] page 2M
>[    0.000000] init_memory_mapping: [mem 0x00100000-0x0fffffff]
>[    0.000000]  [mem 0x00100000-0x001fffff] page 4k
>[    0.000000]  [mem 0x00200000-0x0fffffff] page 2M
>[    0.000000] init_memory_mapping: [mem 0x1000b000-0xbe0adfff]
>[    0.000000]  [mem 0x1000b000-0x101fffff] page 4k
>[    0.000000]  [mem 0x10200000-0x3fffffff] page 2M
>[    0.000000]  [mem 0x40000000-0x7fffffff] page 1G
>[    0.000000]  [mem 0x80000000-0xbdffffff] page 2M
>[    0.000000]  [mem 0xbe000000-0xbe0adfff] page 4k
>[    0.000000] BRK [0x02028000, 0x02028fff] PGTABLE
>[    0.000000] BRK [0x02029000, 0x02029fff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0x100000000-0x1ffffffff]
>[    0.000000]  [mem 0x100000000-0x1ffffffff] page 1G
>[    0.000000] log_buf_len: 2097152 bytes
>[    0.000000] early log buf free: 256764(97%)
>[    0.000000] RAMDISK: [mem 0x33832000-0x35c10fff]
>[    0.000000] ACPI: Early table checksum verification disabled
>[    0.000000] ACPI: RSDP 0x00000000000F0120 000024 (v02 LENOVO)
>[    0.000000] ACPI: XSDT 0x00000000CCDFE1C0 0000EC (v01 LENOVO TP-N14   00001100 PTEC 00000002)
>[    0.000000] ACPI: FACP 0x00000000CCDF9000 00010C (v05 LENOVO TP-N14   00001100 PTEC 00000002)
>[    0.000000] ACPI: DSDT 0x00000000CCDE3000 01126D (v01 LENOVO TP-N14   00001100 INTL 20120711)
>[    0.000000] ACPI: FACS 0x00000000CCD68000 000040
>[    0.000000] ACPI: ASF! 0x00000000CCDFD000 0000A5 (v32 LENOVO TP-N14   00001100 PTEC 00000002)
>[    0.000000] ACPI: HPET 0x00000000CCDFC000 000038 (v01 LENOVO TP-N14   00001100 PTEC 00000002)
>[    0.000000] ACPI: ECDT 0x00000000CCDFB000 000052 (v01 LENOVO TP-N14   00001100 PTEC 00000002)
>[    0.000000] ACPI: APIC 0x00000000CCDF8000 000098 (v01 LENOVO TP-N14   00001100 PTEC 00000002)
>[    0.000000] ACPI: MCFG 0x00000000CCDF7000 00003C (v01 LENOVO TP-N14   00001100 PTEC 00000002)
>[    0.000000] ACPI: SSDT 0x00000000CCDF6000 000033 (v01 LENOVO TP-SSDT1 00000100 INTL 20120711)
>[    0.000000] ACPI: SSDT 0x00000000CCDF5000 000486 (v01 LENOVO TP-SSDT2 00000200 INTL 20120711)
>[    0.000000] ACPI: SSDT 0x00000000CCDE2000 000290 (v01 LENOVO PcieAhci 00001000 INTL 20120711)
>[    0.000000] ACPI: SSDT 0x00000000CCDE1000 000152 (v01 LENOVO Rmv_Batt 00001000 INTL 20120711)
>[    0.000000] ACPI: SSDT 0x00000000CCDE0000 000691 (v01 LENOVO Cpu0Ist  00003000 INTL 20120711)
>[    0.000000] ACPI: SSDT 0x00000000CCDDF000 000B74 (v02 LENOVO CpuSsdt  00003000 INTL 20120711)
>[    0.000000] ACPI: SSDT 0x00000000CCDDE000 000369 (v02 LENOVO CtdpB    00001000 INTL 20120711)
>[    0.000000] ACPI: SSDT 0x00000000CCDDC000 001475 (v01 LENOVO SaSsdt   00003000 INTL 20120711)
>[    0.000000] ACPI: SSDT 0x00000000CCDDB000 000394 (v02 LENOVO CppcTabl 00001000 INTL 20120711)
>[    0.000000] ACPI: PCCT 0x00000000CCDDA000 00006E (v05 LENOVO TP-N14   00001100 PTEC 00000002)
>[    0.000000] ACPI: SSDT 0x00000000CCDD9000 000AC4 (v02 LENOVO Cpc_Tabl 00001000 INTL 20120711)
>[    0.000000] ACPI: TCPA 0x00000000CCDD8000 000032 (v02 PTL    LENOVO   06040000 LNVO 00000001)
>[    0.000000] ACPI: SSDT 0x00000000CCDD7000 0006A3 (v01 Intel_ TpmTable 00001000 INTL 20120711)
>[    0.000000] ACPI: UEFI 0x00000000CCDD6000 000042 (v01 LENOVO TP-N14   00001100 PTEC 00000002)
>[    0.000000] ACPI: POAT 0x00000000CCCB1000 000055 (v03 LENOVO TP-N14   00001100 PTEC 00000002)
>[    0.000000] ACPI: BATB 0x00000000CCDD5000 000046 (v01 LENOVO TP-N14   00001100 PTEC 00000002)
>[    0.000000] ACPI: FPDT 0x00000000CCDD4000 000064 (v01 LENOVO TP-N14   00001100 PTEC 00000002)
>[    0.000000] ACPI: UEFI 0x00000000CCDD3000 0002F6 (v01 LENOVO TP-N14   00001100 PTEC 00000002)
>[    0.000000] ACPI: DMAR 0x00000000CCDD2000 0000B0 (v01 LENOVO TP-N14   00001100 PTEC 00000002)
>[    0.000000] ACPI: Local APIC address 0xfee00000
>[    0.000000] No NUMA configuration found
>[    0.000000] Faking a node at [mem 0x0000000000000000-0x000000022dffffff]
>[    0.000000] NODE_DATA(0) allocated [mem 0x22ddeb000-0x22ddfefff]
>[    0.000000]  [ffffea0000000000-ffffea0008bfffff] PMD -> [ffff880225800000-ffff88022d3fffff] on node 0
>[    0.000000] Zone ranges:
>[    0.000000]   DMA      [mem 0x0000000000001000-0x0000000000ffffff]
>[    0.000000]   DMA32    [mem 0x0000000001000000-0x00000000ffffffff]
>[    0.000000]   Normal   [mem 0x0000000100000000-0x000000022dffffff]
>[    0.000000] Movable zone start for each node
>[    0.000000] Early memory node ranges
>[    0.000000]   node   0: [mem 0x0000000000001000-0x000000000009cfff]
>[    0.000000]   node   0: [mem 0x0000000000100000-0x000000000fffffff]
>[    0.000000]   node   0: [mem 0x000000001000b000-0x00000000be0adfff]
>[    0.000000]   node   0: [mem 0x0000000100000000-0x000000022dffffff]
>[    0.000000] Initmem setup node 0 [mem 0x0000000000001000-0x000000022dffffff]
>[    0.000000] On node 0 totalpages: 2015295
>[    0.000000]   DMA zone: 64 pages used for memmap
>[    0.000000]   DMA zone: 21 pages reserved
>[    0.000000]   DMA zone: 3996 pages, LIFO batch:0
>[    0.000000]   DMA32 zone: 12099 pages used for memmap
>[    0.000000]   DMA32 zone: 774307 pages, LIFO batch:31
>[    0.000000]   Normal zone: 19328 pages used for memmap
>[    0.000000]   Normal zone: 1236992 pages, LIFO batch:31
>[    0.000000] Reserving Intel graphics stolen memory at 0xce000000-0xcfffffff
>[    0.000000] ACPI: PM-Timer IO Port: 0x1808
>[    0.000000] ACPI: Local APIC address 0xfee00000
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0x00] high edge lint[0x1])
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1])
>[    0.000000] IOAPIC[0]: apic_id 2, version 32, address 0xfec00000, GSI 0-39
>[    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
>[    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level)
>[    0.000000] ACPI: IRQ0 used by override.
>[    0.000000] ACPI: IRQ9 used by override.
>[    0.000000] Using ACPI (MADT) for SMP configuration information
>[    0.000000] ACPI: HPET id: 0x8086a301 base: 0xfed00000
>[    0.000000] smpboot: Allowing 8 CPUs, 4 hotplug CPUs
>[    0.000000] PM: Registered nosave memory: [mem 0x00000000-0x00000fff]
>[    0.000000] PM: Registered nosave memory: [mem 0x0009d000-0x0009ffff]
>[    0.000000] PM: Registered nosave memory: [mem 0x000a0000-0x000dffff]
>[    0.000000] PM: Registered nosave memory: [mem 0x000e0000-0x000fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0x10000000-0x1000afff]
>[    0.000000] PM: Registered nosave memory: [mem 0xbe0ae000-0xccbfefff]
>[    0.000000] PM: Registered nosave memory: [mem 0xccbff000-0xccd7efff]
>[    0.000000] PM: Registered nosave memory: [mem 0xccd7f000-0xccdfefff]
>[    0.000000] PM: Registered nosave memory: [mem 0xccdff000-0xcfffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xd0000000-0xf7ffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xf8000000-0xfbffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfc000000-0xfebfffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfec00000-0xfec00fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfec01000-0xfed07fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed08000-0xfed08fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed09000-0xfed0ffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed10000-0xfed19fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed1a000-0xfed1bfff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed1c000-0xfed1ffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed20000-0xfedfffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfee00000-0xfee00fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfee01000-0xff9fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xffa00000-0xffffffff]
>[    0.000000] e820: [mem 0xd0000000-0xf7ffffff] available for PCI devices
>[    0.000000] Booting paravirtualized kernel on bare hardware
>[    0.000000] clocksource: refined-jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1910969940391419 ns
>[    0.000000] setup_percpu: NR_CPUS:64 nr_cpumask_bits:64 nr_cpu_ids:8 nr_node_ids:1
>[    0.000000] PERCPU: Embedded 33 pages/cpu @ffff88022da00000 s98136 r8192 d28840 u262144
>[    0.000000] pcpu-alloc: s98136 r8192 d28840 u262144 alloc=1*2097152
>[    0.000000] pcpu-alloc: [0] 0 1 2 3 4 5 6 7 
>[    0.000000] Built 1 zonelists in Node order, mobility grouping on.  Total pages: 1983783
>[    0.000000] Policy zone: Normal
>[    0.000000] Kernel command line: BOOT_IMAGE=/boot/vmlinuz-4.3.0-rc4+ root=UUID=edace074-b6a4-4d59-b4ea-1f9886886247 ro rhgb quiet drm.debug=0x1e log_buf_len=2M LANG=en_AU.UTF-8
>[    0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes)
>[    0.000000] Memory: 7811344K/8061180K available (7580K kernel code, 1239K rwdata, 3320K rodata, 1496K init, 1464K bss, 249836K reserved, 0K cma-reserved)
>[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
>[    0.000000] Hierarchical RCU implementation.
>[    0.000000] 	Build-time adjustment of leaf fanout to 64.
>[    0.000000] 	RCU restricting CPUs from NR_CPUS=64 to nr_cpu_ids=8.
>[    0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=64, nr_cpu_ids=8
>[    0.000000] NR_IRQS:4352 nr_irqs:760 16
>[    0.000000] 	Offload RCU callbacks from all CPUs
>[    0.000000] 	Offload RCU callbacks from CPUs: 0-7.
>[    0.000000] Console: colour VGA+ 80x25
>[    0.000000] console [tty0] enabled
>[    0.000000] clocksource: hpet: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 133484882848 ns
>[    0.000000] hpet clockevent registered
>[    0.000000] tsc: Fast TSC calibration using PIT
>[    0.000000] tsc: Detected 2593.813 MHz processor
>[    0.000027] Calibrating delay loop (skipped), value calculated using timer frequency.. 5187.62 BogoMIPS (lpj=2593813)
>[    0.000029] pid_max: default: 32768 minimum: 301
>[    0.000034] ACPI: Core revision 20150818
>[    0.017586] ACPI: 12 ACPI AML tables successfully acquired and loaded
>[    0.017607] Security Framework initialized
>[    0.017609] Yama: becoming mindful.
>[    0.017612] SELinux:  Initializing.
>[    0.017618] SELinux:  Starting in permissive mode
>[    0.018146] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes)
>[    0.019577] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes)
>[    0.020179] Mount-cache hash table entries: 16384 (order: 5, 131072 bytes)
>[    0.020189] Mountpoint-cache hash table entries: 16384 (order: 5, 131072 bytes)
>[    0.020370] Initializing cgroup subsys io
>[    0.020374] Initializing cgroup subsys memory
>[    0.020380] Initializing cgroup subsys devices
>[    0.020381] Initializing cgroup subsys freezer
>[    0.020383] Initializing cgroup subsys net_cls
>[    0.020385] Initializing cgroup subsys perf_event
>[    0.020386] Initializing cgroup subsys net_prio
>[    0.020388] Initializing cgroup subsys hugetlb
>[    0.020409] CPU: Physical Processor ID: 0
>[    0.020410] CPU: Processor Core ID: 0
>[    0.020414] ENERGY_PERF_BIAS: Set to 'normal', was 'performance'
>[    0.020415] ENERGY_PERF_BIAS: View and update with x86_energy_perf_policy(8)
>[    0.021379] mce: CPU supports 7 MCE banks
>[    0.021390] CPU0: Thermal monitoring enabled (TM1)
>[    0.021397] process: using mwait in idle threads
>[    0.021400] Last level iTLB entries: 4KB 64, 2MB 8, 4MB 8
>[    0.021401] Last level dTLB entries: 4KB 64, 2MB 0, 4MB 0, 1GB 4
>[    0.021728] Freeing SMP alternatives memory: 28K (ffffffff81ead000 - ffffffff81eb4000)
>[    0.026697] ftrace: allocating 28673 entries in 113 pages
>[    0.037657] DMAR: Host address width 39
>[    0.037658] DMAR: DRHD base: 0x000000fed90000 flags: 0x0
>[    0.037664] DMAR: dmar0: reg_base_addr fed90000 ver 1:0 cap 1c0000c40660462 ecap 7e1ff0505e
>[    0.037666] DMAR: DRHD base: 0x000000fed91000 flags: 0x1
>[    0.037670] DMAR: dmar1: reg_base_addr fed91000 ver 1:0 cap d2008c20660462 ecap f010da
>[    0.037672] DMAR: RMRR base: 0x000000cafce000 end: 0x000000cafe4fff
>[    0.037673] DMAR: RMRR base: 0x000000cd800000 end: 0x000000cfffffff
>[    0.037674] DMAR-IR: IOAPIC id 2 under DRHD base  0xfed91000 IOMMU 1
>[    0.037676] DMAR-IR: HPET id 0 under DRHD base 0xfed91000
>[    0.037677] DMAR-IR: x2apic is disabled because BIOS sets x2apic opt out bit.
>[    0.037677] DMAR-IR: Use 'intremap=no_x2apic_optout' to override the BIOS setting.
>[    0.038085] DMAR-IR: Enabled IRQ remapping in xapic mode
>[    0.038086] x2apic: IRQ remapping doesn't support X2APIC mode
>[    0.038697] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
>[    0.048709] TSC deadline timer enabled
>[    0.048712] smpboot: CPU0: Intel(R) Core(TM) i7-5600U CPU @ 2.60GHz (family: 0x6, model: 0x3d, stepping: 0x4)
>[    0.048731] Performance Events: PEBS fmt2+, 16-deep LBR, Broadwell events, full-width counters, Intel PMU driver.
>[    0.048749] ... version:                3
>[    0.048750] ... bit width:              48
>[    0.048750] ... generic registers:      4
>[    0.048751] ... value mask:             0000ffffffffffff
>[    0.048752] ... max period:             0000ffffffffffff
>[    0.048753] ... fixed-purpose events:   3
>[    0.048754] ... event mask:             000000070000000f
>[    0.049377] x86: Booting SMP configuration:
>[    0.049378] .... node  #0, CPUs:      #1
>[    0.052978] NMI watchdog: enabled on all CPUs, permanently consumes one hw-PMU counter.
>[    0.053049]  #2 #3
>[    0.060037] x86: Booted up 1 node, 4 CPUs
>[    0.060040] smpboot: Total of 4 processors activated (20750.50 BogoMIPS)
>[    0.064106] devtmpfs: initialized
>[    0.066132] PM: Registering ACPI NVS region [mem 0xccbff000-0xccd7efff] (1572864 bytes)
>[    0.066217] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275000 ns
>[    0.066295] atomic64_test: passed for x86-64 platform with CX8 and with SSE
>[    0.066298] pinctrl core: initialized pinctrl subsystem
>[    0.066341] RTC time: 12:22:19, date: 10/06/15
>[    0.066439] NET: Registered protocol family 16
>[    0.068941] cpuidle: using governor menu
>[    0.069024] ACPI FADT declares the system doesn't support PCIe ASPM, so disable it
>[    0.069026] ACPI: bus type PCI registered
>[    0.069027] acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
>[    0.069212] PCI: MMCONFIG for domain 0000 [bus 00-3f] at [mem 0xf8000000-0xfbffffff] (base 0xf8000000)
>[    0.069214] PCI: MMCONFIG at [mem 0xf8000000-0xfbffffff] reserved in E820
>[    0.069218] PCI: Using configuration type 1 for base access
>[    0.073226] ACPI: Added _OSI(Module Device)
>[    0.073227] ACPI: Added _OSI(Processor Device)
>[    0.073228] ACPI: Added _OSI(3.0 _SCP Extensions)
>[    0.073229] ACPI: Added _OSI(Processor Aggregator Device)
>[    0.074925] ACPI : EC: EC description table is found, configuring boot EC
>[    0.074937] ACPI : EC: EC started
>[    0.079473] [Firmware Bug]: ACPI: BIOS _OSI(Linux) query ignored
>[    0.082011] ACPI: Dynamic OEM Table Load:
>[    0.082021] ACPI: SSDT 0xFFFF880223C7B800 000436 (v01 PmRef  Cpu0Cst  00003001 INTL 20120711)
>[    0.082643] ACPI: Dynamic OEM Table Load:
>[    0.082652] ACPI: SSDT 0xFFFF880223C7C000 0005AA (v01 PmRef  ApIst    00003000 INTL 20120711)
>[    0.083316] ACPI: Dynamic OEM Table Load:
>[    0.083323] ACPI: SSDT 0xFFFF880223D28400 000119 (v02 PmRef  ApCst    00003000 INTL 20120711)
>[    0.084301] ACPI: Interpreter enabled
>[    0.084309] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S1_] (20150818/hwxface-580)
>[    0.084315] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S2_] (20150818/hwxface-580)
>[    0.084333] ACPI: (supports S0 S3 S4 S5)
>[    0.084335] ACPI: Using IOAPIC for interrupt routing
>[    0.084358] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
>[    0.086582] ACPI: Power Resource [PUBS] (on)
>[    0.087040] acpi PNP0C0A:01: ACPI dock station (docks/bays count: 1)
>[    0.087305] ACPI: Power Resource [NVP3] (on)
>[    0.087327] ACPI: Power Resource [NVP2] (on)
>[    0.090196] ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 7 9 10 *11)
>[    0.090259] ACPI: PCI Interrupt Link [LNKB] (IRQs 3 4 5 6 7 *9 10 11)
>[    0.090319] ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 5 6 7 9 *10 11)
>[    0.090379] ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 5 *6 7 9 10 11)
>[    0.090438] ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 7 9 10 *11)
>[    0.090486] ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 7 9 10 11) *0, disabled.
>[    0.090546] ACPI: PCI Interrupt Link [LNKG] (IRQs 3 4 5 6 7 9 *10 11)
>[    0.090606] ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 *7 9 10 11)
>[    0.090670] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-3f])
>[    0.090674] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI]
>[    0.090758] acpi PNP0A08:00: _OSC: platform does not support [PCIeCapability]
>[    0.090794] acpi PNP0A08:00: _OSC: not requesting control; platform does not support [PCIeCapability]
>[    0.090796] acpi PNP0A08:00: _OSC: OS requested [PCIeHotplug PME AER PCIeCapability]
>[    0.090798] acpi PNP0A08:00: _OSC: platform willing to grant [PCIeHotplug PME AER]
>[    0.090799] acpi PNP0A08:00: _OSC failed (AE_SUPPORT); disabling ASPM
>[    0.090924] PCI host bridge to bus 0000:00
>[    0.090926] pci_bus 0000:00: root bus resource [bus 00-3f]
>[    0.090928] pci_bus 0000:00: root bus resource [io  0x0000-0x0cf7 window]
>[    0.090930] pci_bus 0000:00: root bus resource [io  0x0d00-0xffff window]
>[    0.090931] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff window]
>[    0.090932] pci_bus 0000:00: root bus resource [mem 0xd0000000-0xfebfffff window]
>[    0.090933] pci_bus 0000:00: root bus resource [mem 0xfed40000-0xfed4bfff window]
>[    0.090940] pci 0000:00:00.0: [8086:1604] type 00 class 0x060000
>[    0.091014] pci 0000:00:02.0: [8086:1616] type 00 class 0x030000
>[    0.091026] pci 0000:00:02.0: reg 0x10: [mem 0xf0000000-0xf0ffffff 64bit]
>[    0.091032] pci 0000:00:02.0: reg 0x18: [mem 0xe0000000-0xefffffff 64bit pref]
>[    0.091036] pci 0000:00:02.0: reg 0x20: [io  0x3000-0x303f]
>[    0.091094] pci 0000:00:03.0: [8086:160c] type 00 class 0x040300
>[    0.091104] pci 0000:00:03.0: reg 0x10: [mem 0xf1230000-0xf1233fff 64bit]
>[    0.091182] pci 0000:00:14.0: [8086:9cb1] type 00 class 0x0c0330
>[    0.091203] pci 0000:00:14.0: reg 0x10: [mem 0xf1220000-0xf122ffff 64bit]
>[    0.091243] pci 0000:00:14.0: PME# supported from D3hot D3cold
>[    0.091267] pci 0000:00:14.0: System wakeup disabled by ACPI
>[    0.091299] pci 0000:00:16.0: [8086:9cba] type 00 class 0x078000
>[    0.091324] pci 0000:00:16.0: reg 0x10: [mem 0xf1239000-0xf123901f 64bit]
>[    0.091372] pci 0000:00:16.0: PME# supported from D0 D3hot D3cold
>[    0.091428] pci 0000:00:19.0: [8086:15a2] type 00 class 0x020000
>[    0.091448] pci 0000:00:19.0: reg 0x10: [mem 0xf1200000-0xf121ffff]
>[    0.091455] pci 0000:00:19.0: reg 0x14: [mem 0xf123d000-0xf123dfff]
>[    0.091461] pci 0000:00:19.0: reg 0x18: [io  0x3060-0x307f]
>[    0.091498] pci 0000:00:19.0: PME# supported from D0 D3hot D3cold
>[    0.091521] pci 0000:00:19.0: System wakeup disabled by ACPI
>[    0.091552] pci 0000:00:1b.0: [8086:9ca0] type 00 class 0x040300
>[    0.091573] pci 0000:00:1b.0: reg 0x10: [mem 0xf1234000-0xf1237fff 64bit]
>[    0.091613] pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold
>[    0.091665] pci 0000:00:1c.0: [8086:9c92] type 01 class 0x060400
>[    0.091723] pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold
>[    0.091812] pci 0000:00:1c.1: [8086:9c94] type 01 class 0x060400
>[    0.091872] pci 0000:00:1c.1: PME# supported from D0 D3hot D3cold
>[    0.091927] pci 0000:00:1c.1: System wakeup disabled by ACPI
>[    0.091961] pci 0000:00:1c.5: [8086:9c9a] type 01 class 0x060400
>[    0.092024] pci 0000:00:1c.5: PME# supported from D0 D3hot D3cold
>[    0.092109] pci 0000:00:1d.0: [8086:9ca6] type 00 class 0x0c0320
>[    0.092134] pci 0000:00:1d.0: reg 0x10: [mem 0xf123c000-0xf123c3ff]
>[    0.092195] pci 0000:00:1d.0: PME# supported from D0 D3hot D3cold
>[    0.092222] pci 0000:00:1d.0: System wakeup disabled by ACPI
>[    0.092255] pci 0000:00:1f.0: [8086:9cc3] type 00 class 0x060100
>[    0.092396] pci 0000:00:1f.3: [8086:9ca2] type 00 class 0x0c0500
>[    0.092409] pci 0000:00:1f.3: reg 0x10: [mem 0xf1238000-0xf12380ff 64bit]
>[    0.092426] pci 0000:00:1f.3: reg 0x20: [io  0xefa0-0xefbf]
>[    0.092491] pci 0000:00:1f.6: [8086:9ca4] type 00 class 0x118000
>[    0.092531] pci 0000:00:1f.6: reg 0x10: [mem 0xf123b000-0xf123bfff 64bit]
>[    0.092682] pci 0000:00:1c.0: PCI bridge to [bus 03]
>[    0.092902] pci 0000:04:00.0: [8086:095b] type 00 class 0x028000
>[    0.093063] pci 0000:04:00.0: reg 0x10: [mem 0xf1100000-0xf1101fff 64bit]
>[    0.093306] pci 0000:04:00.0: PME# supported from D0 D3hot D3cold
>[    0.095184] pci 0000:00:1c.1: PCI bridge to [bus 04]
>[    0.095188] pci 0000:00:1c.1:   bridge window [mem 0xf1100000-0xf11fffff]
>[    0.095308] pci 0000:0a:00.0: [144d:a801] type 00 class 0x010601
>[    0.095371] pci 0000:0a:00.0: reg 0x24: [mem 0xf1000000-0xf1001fff]
>[    0.097085] pci 0000:00:1c.5: PCI bridge to [bus 0a]
>[    0.097089] pci 0000:00:1c.5:   bridge window [mem 0xf1000000-0xf10fffff]
>[    0.097762] ACPI: Enabled 4 GPEs in block 00 to 7F
>[    0.097811] ACPI : EC: GPE = 0x24, I/O: command/status = 0x66, data = 0x62
>[    0.097895] vgaarb: setting as boot device: PCI:0000:00:02.0
>[    0.097896] vgaarb: device added: PCI:0000:00:02.0,decodes=io+mem,owns=io+mem,locks=none
>[    0.097898] vgaarb: loaded
>[    0.097899] vgaarb: bridge control possible 0000:00:02.0
>[    0.097970] SCSI subsystem initialized
>[    0.098003] libata version 3.00 loaded.
>[    0.098025] ACPI: bus type USB registered
>[    0.098038] usbcore: registered new interface driver usbfs
>[    0.098045] usbcore: registered new interface driver hub
>[    0.098060] usbcore: registered new device driver usb
>[    0.098144] PCI: Using ACPI for IRQ routing
>[    0.099311] PCI: pci_cache_line_size set to 64 bytes
>[    0.099723] e820: reserve RAM buffer [mem 0x0009d000-0x0009ffff]
>[    0.099724] e820: reserve RAM buffer [mem 0xbe0ae000-0xbfffffff]
>[    0.099725] e820: reserve RAM buffer [mem 0x22e000000-0x22fffffff]
>[    0.099815] NetLabel: Initializing
>[    0.099817] NetLabel:  domain hash size = 128
>[    0.099817] NetLabel:  protocols = UNLABELED CIPSOv4
>[    0.099826] NetLabel:  unlabeled traffic allowed by default
>[    0.099874] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0, 0, 0, 0, 0
>[    0.099878] hpet0: 8 comparators, 64-bit 14.318180 MHz counter
>[    0.101902] clocksource: Switched to clocksource hpet
>[    0.107568] pnp: PnP ACPI init
>[    0.107894] system 00:00: [mem 0x00000000-0x0009ffff] could not be reserved
>[    0.107896] system 00:00: [mem 0x000c0000-0x000c3fff] could not be reserved
>[    0.107897] system 00:00: [mem 0x000c4000-0x000c7fff] could not be reserved
>[    0.107899] system 00:00: [mem 0x000c8000-0x000cbfff] could not be reserved
>[    0.107900] system 00:00: [mem 0x000cc000-0x000cffff] could not be reserved
>[    0.107902] system 00:00: [mem 0x000d0000-0x000d3fff] has been reserved
>[    0.107903] system 00:00: [mem 0x000d4000-0x000d7fff] has been reserved
>[    0.107911] system 00:00: [mem 0x000d8000-0x000dbfff] has been reserved
>[    0.107912] system 00:00: [mem 0x000dc000-0x000dffff] has been reserved
>[    0.107914] system 00:00: [mem 0x000e0000-0x000e3fff] could not be reserved
>[    0.107915] system 00:00: [mem 0x000e4000-0x000e7fff] could not be reserved
>[    0.107916] system 00:00: [mem 0x000e8000-0x000ebfff] could not be reserved
>[    0.107918] system 00:00: [mem 0x000ec000-0x000effff] could not be reserved
>[    0.107919] system 00:00: [mem 0x000f0000-0x000fffff] could not be reserved
>[    0.107920] system 00:00: [mem 0x00100000-0xcfffffff] could not be reserved
>[    0.107922] system 00:00: [mem 0xfec00000-0xfed3ffff] could not be reserved
>[    0.107924] system 00:00: [mem 0xfed4c000-0xffffffff] could not be reserved
>[    0.107927] system 00:00: Plug and Play ACPI device, IDs PNP0c01 (active)
>[    0.108006] system 00:01: [io  0x1800-0x189f] could not be reserved
>[    0.108008] system 00:01: [io  0x0800-0x087f] has been reserved
>[    0.108010] system 00:01: [io  0x0880-0x08ff] has been reserved
>[    0.108011] system 00:01: [io  0x0900-0x097f] has been reserved
>[    0.108012] system 00:01: [io  0x0980-0x09ff] has been reserved
>[    0.108014] system 00:01: [io  0x0a00-0x0a7f] has been reserved
>[    0.108015] system 00:01: [io  0x0a80-0x0aff] has been reserved
>[    0.108016] system 00:01: [io  0x0b00-0x0b7f] has been reserved
>[    0.108018] system 00:01: [io  0x0b80-0x0bff] has been reserved
>[    0.108019] system 00:01: [io  0x15e0-0x15ef] has been reserved
>[    0.108020] system 00:01: [io  0x1600-0x167f] has been reserved
>[    0.108022] system 00:01: [io  0x1640-0x165f] has been reserved
>[    0.108024] system 00:01: [mem 0xf8000000-0xfbffffff] has been reserved
>[    0.108025] system 00:01: [mem 0xfed1c000-0xfed1ffff] has been reserved
>[    0.108027] system 00:01: [mem 0xfed10000-0xfed13fff] has been reserved
>[    0.108028] system 00:01: [mem 0xfed18000-0xfed18fff] has been reserved
>[    0.108030] system 00:01: [mem 0xfed19000-0xfed19fff] has been reserved
>[    0.108031] system 00:01: [mem 0xfed45000-0xfed4bfff] has been reserved
>[    0.108033] system 00:01: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.108079] pnp 00:02: Plug and Play ACPI device, IDs PNP0b00 (active)
>[    0.108097] pnp 00:03: Plug and Play ACPI device, IDs LEN0071 PNP0303 (active)
>[    0.108114] pnp 00:04: Plug and Play ACPI device, IDs LEN0048 PNP0f13 (active)
>[    0.108354] pnp 00:05: Plug and Play ACPI device, IDs SMO1200 PNP0c31 (active)
>[    0.108489] system 00:06: [mem 0xd0010000-0xd001ffff] has been reserved
>[    0.108490] system 00:06: [mem 0xd0000000-0xd000ffff] has been reserved
>[    0.108492] system 00:06: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.108513] pnp: PnP ACPI: found 7 devices
>[    0.114568] clocksource: acpi_pm: mask: 0xffffff max_cycles: 0xffffff, max_idle_ns: 2085701024 ns
>[    0.114583] pci 0000:00:1c.0: bridge window [io  0x1000-0x0fff] to [bus 03] add_size 1000
>[    0.114585] pci 0000:00:1c.0: bridge window [mem 0x00100000-0x000fffff 64bit pref] to [bus 03] add_size 200000 add_align 100000
>[    0.114587] pci 0000:00:1c.0: bridge window [mem 0x00100000-0x000fffff] to [bus 03] add_size 200000 add_align 100000
>[    0.114603] pci 0000:00:1c.0: res[14]=[mem 0x00100000-0x000fffff] res_to_dev_res add_size 200000 min_align 100000
>[    0.114604] pci 0000:00:1c.0: res[14]=[mem 0x00100000-0x002fffff] res_to_dev_res add_size 200000 min_align 100000
>[    0.114606] pci 0000:00:1c.0: res[15]=[mem 0x00100000-0x000fffff 64bit pref] res_to_dev_res add_size 200000 min_align 100000
>[    0.114607] pci 0000:00:1c.0: res[15]=[mem 0x00100000-0x002fffff 64bit pref] res_to_dev_res add_size 200000 min_align 100000
>[    0.114609] pci 0000:00:1c.0: res[13]=[io  0x1000-0x0fff] res_to_dev_res add_size 1000 min_align 1000
>[    0.114610] pci 0000:00:1c.0: res[13]=[io  0x1000-0x1fff] res_to_dev_res add_size 1000 min_align 1000
>[    0.114614] pci 0000:00:1c.0: BAR 14: assigned [mem 0xd0100000-0xd02fffff]
>[    0.114618] pci 0000:00:1c.0: BAR 15: assigned [mem 0xd0300000-0xd04fffff 64bit pref]
>[    0.114620] pci 0000:00:1c.0: BAR 13: assigned [io  0x2000-0x2fff]
>[    0.114621] pci 0000:00:1c.0: PCI bridge to [bus 03]
>[    0.114625] pci 0000:00:1c.0:   bridge window [io  0x2000-0x2fff]
>[    0.114629] pci 0000:00:1c.0:   bridge window [mem 0xd0100000-0xd02fffff]
>[    0.114632] pci 0000:00:1c.0:   bridge window [mem 0xd0300000-0xd04fffff 64bit pref]
>[    0.114637] pci 0000:00:1c.1: PCI bridge to [bus 04]
>[    0.114641] pci 0000:00:1c.1:   bridge window [mem 0xf1100000-0xf11fffff]
>[    0.114648] pci 0000:00:1c.5: PCI bridge to [bus 0a]
>[    0.114652] pci 0000:00:1c.5:   bridge window [mem 0xf1000000-0xf10fffff]
>[    0.114660] pci_bus 0000:00: resource 4 [io  0x0000-0x0cf7 window]
>[    0.114661] pci_bus 0000:00: resource 5 [io  0x0d00-0xffff window]
>[    0.114662] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff window]
>[    0.114663] pci_bus 0000:00: resource 7 [mem 0xd0000000-0xfebfffff window]
>[    0.114665] pci_bus 0000:00: resource 8 [mem 0xfed40000-0xfed4bfff window]
>[    0.114666] pci_bus 0000:03: resource 0 [io  0x2000-0x2fff]
>[    0.114667] pci_bus 0000:03: resource 1 [mem 0xd0100000-0xd02fffff]
>[    0.114669] pci_bus 0000:03: resource 2 [mem 0xd0300000-0xd04fffff 64bit pref]
>[    0.114670] pci_bus 0000:04: resource 1 [mem 0xf1100000-0xf11fffff]
>[    0.114671] pci_bus 0000:0a: resource 1 [mem 0xf1000000-0xf10fffff]
>[    0.114706] NET: Registered protocol family 2
>[    0.114872] TCP established hash table entries: 65536 (order: 7, 524288 bytes)
>[    0.115009] TCP bind hash table entries: 65536 (order: 8, 1048576 bytes)
>[    0.115111] TCP: Hash tables configured (established 65536 bind 65536)
>[    0.115136] UDP hash table entries: 4096 (order: 5, 131072 bytes)
>[    0.115159] UDP-Lite hash table entries: 4096 (order: 5, 131072 bytes)
>[    0.115214] NET: Registered protocol family 1
>[    0.115227] pci 0000:00:02.0: Video device with shadowed ROM
>[    0.115515] PCI: CLS 64 bytes, default 64
>[    0.115554] Unpacking initramfs...
>[    0.637521] Freeing initrd memory: 36732K (ffff880033832000 - ffff880035c11000)
>[    0.637573] PCI-DMA: Using software bounce buffering for IO (SWIOTLB)
>[    0.637576] software IO TLB [mem 0xba0ae000-0xbe0ae000] (64MB) mapped at [ffff8800ba0ae000-ffff8800be0adfff]
>[    0.637642] RAPL PMU detected, API unit is 2^-32 Joules, 4 fixed counters 655360 ms ovfl timer
>[    0.637643] hw unit of domain pp0-core 2^-14 Joules
>[    0.637644] hw unit of domain package 2^-14 Joules
>[    0.637645] hw unit of domain dram 2^-14 Joules
>[    0.637645] hw unit of domain pp1-gpu 2^-14 Joules
>[    0.637677] resource sanity check: requesting [mem 0xfed10000-0xfed15fff], which spans more than pnp 00:01 [mem 0xfed10000-0xfed13fff]
>[    0.637678] ------------[ cut here ]------------
>[    0.637682] WARNING: CPU: 2 PID: 1 at arch/x86/mm/ioremap.c:198 __ioremap_caller+0x2b3/0x370()
>[    0.637682] Info: mapping multiple BARs. Your kernel is fine.
>[    0.637683] Modules linked in:
>
>[    0.637686] CPU: 2 PID: 1 Comm: swapper/0 Not tainted 4.3.0-rc4+ #1
>[    0.637687] Hardware name: LENOVO 20BTCTO1WW/20BTCTO1WW, BIOS N14ET32W (1.10 ) 08/13/2015
>[    0.637689]  0000000000000000 000000005799cbb7 ffff88022460baf8 ffffffff8139427f
>[    0.637691]  ffff88022460bb40 ffff88022460bb30 ffffffff8109d322 00000000fed10000
>[    0.637693]  ffffc90000e88000 0000000000006000 0000000000000000 ffff8800b80bd040
>[    0.637695] Call Trace:
>[    0.637698]  [<ffffffff8139427f>] dump_stack+0x44/0x55
>[    0.637700]  [<ffffffff8109d322>] warn_slowpath_common+0x82/0xc0
>[    0.637702]  [<ffffffff8109d3bc>] warn_slowpath_fmt+0x5c/0x80
>[    0.637704]  [<ffffffff810a3a7a>] ? iomem_map_sanity_check+0xba/0xd0
>[    0.637706]  [<ffffffff81065793>] __ioremap_caller+0x2b3/0x370
>[    0.637708]  [<ffffffff81065867>] ioremap_nocache+0x17/0x20
>[    0.637710]  [<ffffffff8103a2f9>] snb_uncore_imc_init_box+0x79/0xb0
>[    0.637713]  [<ffffffff81038ae0>] uncore_pci_probe+0xd0/0x1b0
>[    0.637715]  [<ffffffff813dd555>] local_pci_probe+0x45/0xa0
>[    0.637716]  [<ffffffff813de93d>] pci_device_probe+0xfd/0x140
>[    0.637719]  [<ffffffff814c5ce2>] driver_probe_device+0x222/0x480
>[    0.637720]  [<ffffffff814c5fc4>] __driver_attach+0x84/0x90
>[    0.637722]  [<ffffffff814c5f40>] ? driver_probe_device+0x480/0x480
>[    0.637723]  [<ffffffff814c37bc>] bus_for_each_dev+0x6c/0xc0
>[    0.637725]  [<ffffffff814c549e>] driver_attach+0x1e/0x20
>[    0.637726]  [<ffffffff814c4fdb>] bus_add_driver+0x1eb/0x280
>[    0.637728]  [<ffffffff81d5ef57>] ? uncore_cpu_setup+0x12/0x12
>[    0.637729]  [<ffffffff814c6810>] driver_register+0x60/0xe0
>[    0.637731]  [<ffffffff813dcf3c>] __pci_register_driver+0x4c/0x50
>[    0.637733]  [<ffffffff81d5f039>] intel_uncore_init+0xe2/0x2d2
>[    0.637734]  [<ffffffff81d5ef57>] ? uncore_cpu_setup+0x12/0x12
>[    0.637736]  [<ffffffff81002123>] do_one_initcall+0xb3/0x200
>[    0.637738]  [<ffffffff810ba800>] ? parse_args+0x190/0x4a0
>[    0.637740]  [<ffffffff81d501ae>] kernel_init_freeable+0x189/0x223
>[    0.637743]  [<ffffffff81756a60>] ? rest_init+0x80/0x80
>[    0.637745]  [<ffffffff81756a6e>] kernel_init+0xe/0xe0
>[    0.637747]  [<ffffffff817623df>] ret_from_fork+0x3f/0x70
>[    0.637749]  [<ffffffff81756a60>] ? rest_init+0x80/0x80
>[    0.637753] ---[ end trace 47ff612120282898 ]---
>[    0.637828] microcode: CPU0 sig=0x306d4, pf=0x40, revision=0x21
>[    0.637835] microcode: CPU1 sig=0x306d4, pf=0x40, revision=0x21
>[    0.637839] microcode: CPU2 sig=0x306d4, pf=0x40, revision=0x21
>[    0.637846] microcode: CPU3 sig=0x306d4, pf=0x40, revision=0x21
>[    0.637892] microcode: Microcode Update Driver: v2.00 <tigran@aivazian.fsnet.co.uk>, Peter Oruba
>[    0.638412] futex hash table entries: 2048 (order: 5, 131072 bytes)
>[    0.638440] audit: initializing netlink subsys (disabled)
>[    0.638455] audit: type=2000 audit(1444134139.622:1): initialized
>[    0.638759] Initialise system trusted keyring
>[    0.638828] HugeTLB registered 2 MB page size, pre-allocated 0 pages
>[    0.640021] zbud: loaded
>[    0.640189] VFS: Disk quotas dquot_6.6.0
>[    0.640218] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
>[    0.640547] Key type big_key registered
>[    0.640550] SELinux:  Registering netfilter hooks
>[    0.643462] NET: Registered protocol family 38
>[    0.643471] Key type asymmetric registered
>[    0.643474] Asymmetric key parser 'x509' registered
>[    0.643493] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 250)
>[    0.643525] io scheduler noop registered
>[    0.643528] io scheduler deadline registered
>[    0.643560] io scheduler cfq registered (default)
>[    0.643902] pci_hotplug: PCI Hot Plug PCI Core version: 0.5
>[    0.643909] pciehp: PCI Express Hot Plug Controller Driver version: 0.4
>[    0.643936] intel_idle: MWAIT substates: 0x11142120
>[    0.643937] intel_idle: v0.4 model 0x3D
>[    0.643938] intel_idle: lapic_timer_reliable_states 0xffffffff
>[    0.644252] ACPI: AC Adapter [AC] (on-line)
>[    0.644302] input: Lid Switch as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0D:00/input/input0
>[    0.644403] ACPI: Lid Switch [LID]
>[    0.644432] input: Sleep Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0E:00/input/input1
>[    0.644434] ACPI: Sleep Button [SLPB]
>[    0.644468] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input2
>[    0.644470] ACPI: Power Button [PWRF]
>[    0.645571] thermal LNXTHERM:00: registered as thermal_zone0
>[    0.645573] ACPI: Thermal Zone [THM0] (52 C)
>[    0.645608] GHES: HEST is not enabled!
>[    0.645712] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
>[    0.646336] Non-volatile memory driver v1.3
>[    0.646366] Linux agpgart interface v0.103
>[    0.646882] ahci 0000:0a:00.0: version 3.0
>[    0.653081] ACPI: Battery Slot [BAT0] (battery present)
>[    0.657444] ahci 0000:0a:00.0: AHCI 0001.0300 32 slots 1 ports 6 Gbps 0x1 impl SATA mode
>[    0.657446] ahci 0000:0a:00.0: flags: 64bit ncq led clo only pio ccc 
>[    0.657719] scsi host0: ahci
>[    0.657776] ata1: SATA max UDMA/133 abar m8192@0xf1000000 port 0xf1000100 irq 42
>[    0.657850] libphy: Fixed MDIO Bus: probed
>[    0.657971] xhci_hcd 0000:00:14.0: xHCI Host Controller
>[    0.658010] xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 1
>[    0.658079] xhci_hcd 0000:00:14.0: hcc params 0x200077c1 hci version 0x100 quirks 0x00009810
>[    0.658084] xhci_hcd 0000:00:14.0: cache line size of 64 is not supported
>[    0.658182] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
>[    0.658184] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
>[    0.658185] usb usb1: Product: xHCI Host Controller
>[    0.658186] usb usb1: Manufacturer: Linux 4.3.0-rc4+ xhci-hcd
>[    0.658187] usb usb1: SerialNumber: 0000:00:14.0
>[    0.658287] hub 1-0:1.0: USB hub found
>[    0.658297] hub 1-0:1.0: 11 ports detected
>[    0.659038] xhci_hcd 0000:00:14.0: xHCI Host Controller
>[    0.659075] xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 2
>[    0.659099] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003
>[    0.659101] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
>[    0.659102] usb usb2: Product: xHCI Host Controller
>[    0.659103] usb usb2: Manufacturer: Linux 4.3.0-rc4+ xhci-hcd
>[    0.659104] usb usb2: SerialNumber: 0000:00:14.0
>[    0.659189] hub 2-0:1.0: USB hub found
>[    0.659197] hub 2-0:1.0: 4 ports detected
>[    0.659708] usb: failed to peer usb2-port3 and usb1-port1 by location (usb2-port3:none) (usb1-port1:usb2-port1)
>[    0.659710] usb usb2-port3: failed to peer to usb1-port1 (-16)
>[    0.659711] usb: port power management may be unreliable
>[    0.659843] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
>[    0.659847] ehci-pci: EHCI PCI platform driver
>[    0.659913] ehci-pci 0000:00:1d.0: EHCI Host Controller
>[    0.659948] ehci-pci 0000:00:1d.0: new USB bus registered, assigned bus number 3
>[    0.659957] ehci-pci 0000:00:1d.0: debug port 2
>[    0.663858] ehci-pci 0000:00:1d.0: cache line size of 64 is not supported
>[    0.663869] ehci-pci 0000:00:1d.0: irq 23, io mem 0xf123c000
>[    0.669260] ehci-pci 0000:00:1d.0: USB 2.0 started, EHCI 1.00
>[    0.669285] usb usb3: New USB device found, idVendor=1d6b, idProduct=0002
>[    0.669286] usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1
>[    0.669287] usb usb3: Product: EHCI Host Controller
>[    0.669288] usb usb3: Manufacturer: Linux 4.3.0-rc4+ ehci_hcd
>[    0.669289] usb usb3: SerialNumber: 0000:00:1d.0
>[    0.669382] hub 3-0:1.0: USB hub found
>[    0.669386] hub 3-0:1.0: 3 ports detected
>[    0.669574] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
>[    0.669578] ohci-pci: OHCI PCI platform driver
>[    0.669586] uhci_hcd: USB Universal Host Controller Interface driver
>[    0.669617] usbcore: registered new interface driver usbserial
>[    0.669623] usbcore: registered new interface driver usbserial_generic
>[    0.669628] usbserial: USB Serial support registered for generic
>[    0.669656] i8042: PNP: PS/2 Controller [PNP0303:KBD,PNP0f13:MOU] at 0x60,0x64 irq 1,12
>[    0.671356] serio: i8042 KBD port at 0x60,0x64 irq 1
>[    0.671359] serio: i8042 AUX port at 0x60,0x64 irq 12
>[    0.671455] mousedev: PS/2 mouse device common for all mice
>[    0.671613] rtc_cmos 00:02: RTC can wake from S4
>[    0.671756] rtc_cmos 00:02: rtc core: registered rtc_cmos as rtc0
>[    0.671783] rtc_cmos 00:02: alarms up to one month, y3k, 114 bytes nvram, hpet irqs
>[    0.671826] device-mapper: uevent: version 1.0.3
>[    0.671898] device-mapper: ioctl: 4.33.0-ioctl (2015-8-18) initialised: dm-devel@redhat.com
>[    0.671958] Intel P-state driver initializing.
>[    0.672956] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input3
>[    0.673513] hidraw: raw HID events driver (C) Jiri Kosina
>[    0.673625] usbcore: registered new interface driver usbhid
>[    0.673628] usbhid: USB HID core driver
>[    0.673801] drop_monitor: Initializing network drop monitor service
>[    0.673980] ip_tables: (C) 2000-2006 Netfilter Core Team
>[    0.674088] Initializing XFRM netlink socket
>[    0.674397] NET: Registered protocol family 10
>[    0.674829] mip6: Mobile IPv6
>[    0.674839] NET: Registered protocol family 17
>[    0.675360] AVX2 version of gcm_enc/dec engaged.
>[    0.675363] AES CTR mode by8 optimization enabled
>[    0.700543] registered taskstats version 1
>[    0.700560] Loading compiled-in X.509 certificates
>[    0.701144] Loaded X.509 cert 'Build time autogenerated kernel key: b39a33dddb78b104ab935f9840d978dae55e6e77'
>[    0.701164] zswap: loaded using pool lzo/zbud
>[    0.701722]   Magic number: 3:569:379
>[    0.701817] rtc_cmos 00:02: setting system clock to 2015-10-06 12:22:20 UTC (1444134140)
>[    0.701876] PM: Hibernation image not present or could not be loaded.
>[    0.961641] usb 2-3: new SuperSpeed USB device number 2 using xhci_hcd
>[    0.964695] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
>[    0.965694] ata1.00: ACPI cmd ef/02:00:00:00:00:a0 (SET FEATURES) succeeded
>[    0.965697] ata1.00: ACPI cmd f5/00:00:00:00:00:a0 (SECURITY FREEZE LOCK) filtered out
>[    0.965841] ata1.00: ACPI cmd ef/05:01:51:00:00:a0 (SET FEATURES) succeeded
>[    0.965900] ata1.00: ACPI cmd ef/05:02:4c:00:00:a0 (SET FEATURES) succeeded
>[    0.966375] ata1.00: ATA-9: SAMSUNG MZHPV512HDGL-000L1, BXW25L0Q, max UDMA/133
>[    0.966377] ata1.00: 1000215216 sectors, multi 16: LBA48 NCQ (depth 31/32), AA
>[    0.966680] ata1.00: ACPI cmd ef/02:00:00:00:00:a0 (SET FEATURES) succeeded
>[    0.966682] ata1.00: ACPI cmd f5/00:00:00:00:00:a0 (SECURITY FREEZE LOCK) filtered out
>[    0.966738] ata1.00: ACPI cmd ef/05:01:51:00:00:a0 (SET FEATURES) succeeded
>[    0.966793] ata1.00: ACPI cmd ef/05:02:4c:00:00:a0 (SET FEATURES) succeeded
>[    0.967012] ata1.00: configured for UDMA/133
>[    0.967145] scsi 0:0:0:0: Direct-Access     ATA      SAMSUNG MZHPV512 5L0Q PQ: 0 ANSI: 5
>[    0.967280] sd 0:0:0:0: [sda] 1000215216 512-byte logical blocks: (512 GB/476 GiB)
>[    0.967307] sd 0:0:0:0: Attached scsi generic sg0 type 0
>[    0.967358] sd 0:0:0:0: [sda] Write Protect is off
>[    0.967360] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
>[    0.967382] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
>[    0.967826]  sda: sda1 sda2 sda3 < sda5 sda6 sda7 >
>[    0.968154] sd 0:0:0:0: [sda] Attached SCSI disk
>[    0.968378] Freeing unused kernel memory: 1496K (ffffffff81d37000 - ffffffff81ead000)
>[    0.968380] Write protecting the kernel read-only data: 12288k
>[    0.968571] Freeing unused kernel memory: 600K (ffff88000176a000 - ffff880001800000)
>[    0.968708] Freeing unused kernel memory: 776K (ffff880001b3e000 - ffff880001c00000)
>[    0.970302] random: systemd urandom read with 13 bits of entropy available
>[    0.971171] systemd[1]: systemd 219 running in system mode. (+PAM +AUDIT +SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ -LZ4 +SECCOMP +BLKID +ELFUTILS +KMOD +IDN)
>[    0.971270] systemd[1]: Detected architecture x86-64.
>[    0.971271] systemd[1]: Running in initial RAM disk.
>[    0.971284] systemd[1]: Set hostname to <pasglop>.
>[    0.971450] usb 3-1: new high-speed USB device number 2 using ehci-pci
>[    0.993213] systemd[1]: Created slice -.slice.
>[    0.993221] systemd[1]: Starting -.slice.
>[    0.993239] systemd[1]: Listening on udev Kernel Socket.
>[    0.993244] systemd[1]: Starting udev Kernel Socket.
>[    0.993267] systemd[1]: Listening on Journal Socket.
>[    0.993272] systemd[1]: Starting Journal Socket.
>[    0.993320] systemd[1]: Listening on Journal Audit Socket.
>[    0.993325] systemd[1]: Starting Journal Audit Socket.
>[    0.993367] systemd[1]: Created slice System Slice.
>[    0.993372] systemd[1]: Starting System Slice.
>[    0.993379] systemd[1]: Reached target Slices.
>[    0.993383] systemd[1]: Starting Slices.
>[    0.993617] systemd[1]: Starting Setup Virtual Console...
>[    0.993934] systemd[1]: Starting Load Kernel Modules...
>[    0.993957] systemd[1]: Reached target Swap.
>[    0.993968] systemd[1]: Starting Swap.
>[    0.994012] systemd[1]: Listening on udev Control Socket.
>[    0.994020] systemd[1]: Starting udev Control Socket.
>[    0.994056] systemd[1]: Started dracut ask for additional cmdline parameters.
>[    0.994397] systemd[1]: Starting dracut cmdline hook...
>[    0.994415] systemd[1]: Reached target Timers.
>[    0.994427] systemd[1]: Starting Timers.
>[    0.995672] systemd[1]: Starting Create list of required static device nodes for the current kernel...
>[    0.995722] systemd[1]: Listening on Journal Socket (/dev/log).
>[    0.995735] systemd[1]: Starting Journal Socket (/dev/log).
>[    0.995752] systemd[1]: Reached target Local File Systems.
>[    0.995761] systemd[1]: Starting Local File Systems.
>[    0.996140] systemd[1]: Starting Journal Service...
>[    0.996160] systemd[1]: Reached target Sockets.
>[    0.996171] systemd[1]: Starting Sockets.
>[    0.997813] systemd[1]: Started Create list of required static device nodes for the current kernel.
>[    0.998322] systemd[1]: Starting Create Static Device Nodes in /dev...
>[    1.000223] systemd[1]: Started Create Static Device Nodes in /dev.
>[    1.000257] audit: type=1130 audit(1444134140.796:2): pid=1 uid=0 auid=4294967295 ses=4294967295 subj=kernel msg='unit=systemd-tmpfiles-setup-dev comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success'
>[    1.011472] usb 1-3: new high-speed USB device number 2 using xhci_hcd
>[    1.018185] systemd[1]: Started Journal Service.
>[    1.018234] audit: type=1130 audit(1444134140.814:3): pid=1 uid=0 auid=4294967295 ses=4294967295 subj=kernel msg='unit=systemd-journald comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success'
>[    1.042778] snd_pcm_oss: Unknown symbol snd_pcm_lib_read (err 0)
>[    1.042783] snd_pcm_oss: Unknown symbol snd_pcm_hw_param_first (err 0)
>[    1.042788] snd_pcm_oss: Unknown symbol snd_pcm_kernel_ioctl (err 0)
>[    1.042792] snd_pcm_oss: Unknown symbol snd_pcm_format_unsigned (err 0)
>[    1.042797] snd_pcm_oss: Unknown symbol _snd_pcm_hw_params_any (err 0)
>[    1.042800] snd_pcm_oss: Unknown symbol snd_interval_refine (err 0)
>[    1.042803] snd_pcm_oss: Unknown symbol snd_pcm_format_physical_width (err 0)
>[    1.042806] snd_pcm_oss: Unknown symbol snd_pcm_format_little_endian (err 0)
>[    1.042812] snd_pcm_oss: Unknown symbol snd_pcm_format_silence_64 (err 0)
>[    1.042815] snd_pcm_oss: Unknown symbol snd_pcm_open_substream (err 0)
>[    1.042817] snd_pcm_oss: Unknown symbol snd_pcm_lib_readv (err 0)
>[    1.042819] snd_pcm_oss: Unknown symbol snd_pcm_stream_unlock_irq (err 0)
>[    1.042823] snd_pcm_oss: Unknown symbol snd_pcm_stream_lock_irq (err 0)
>[    1.042829] snd_pcm_oss: Unknown symbol snd_pcm_lib_writev (err 0)
>[    1.042832] snd_pcm_oss: Unknown symbol snd_pcm_format_linear (err 0)
>[    1.042834] snd_pcm_oss: Unknown symbol snd_pcm_mmap_data (err 0)
>[    1.042838] snd_pcm_oss: Unknown symbol snd_pcm_hw_param_last (err 0)
>[    1.042844] snd_pcm_oss: Unknown symbol snd_pcm_hw_param_value (err 0)
>[    1.042847] snd_pcm_oss: Unknown symbol snd_pcm_format_signed (err 0)
>[    1.042854] snd_pcm_oss: Unknown symbol snd_pcm_hw_refine (err 0)
>[    1.042860] snd_pcm_oss: Unknown symbol snd_pcm_format_big_endian (err 0)
>[    1.042863] snd_pcm_oss: Unknown symbol snd_pcm_notify (err 0)
>[    1.042865] snd_pcm_oss: Unknown symbol snd_pcm_release_substream (err 0)
>[    1.042867] snd_pcm_oss: Unknown symbol snd_pcm_lib_write (err 0)
>[    1.042870] snd_pcm_oss: Unknown symbol snd_pcm_format_set_silence (err 0)
>[    1.042875] snd_pcm_oss: Unknown symbol snd_pcm_format_width (err 0)
>[    1.044869] audit: type=1130 audit(1444134140.841:4): pid=1 uid=0 auid=4294967295 ses=4294967295 subj=kernel msg='unit=dracut-cmdline comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success'
>[    1.050418] audit: type=1130 audit(1444134140.846:5): pid=1 uid=0 auid=4294967295 ses=4294967295 subj=kernel msg='unit=systemd-modules-load comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=failed'
>[    1.053070] audit: type=1130 audit(1444134140.849:6): pid=1 uid=0 auid=4294967295 ses=4294967295 subj=kernel msg='unit=systemd-sysctl comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success'
>[    1.061997] audit: type=1130 audit(1444134140.858:7): pid=1 uid=0 auid=4294967295 ses=4294967295 subj=kernel msg='unit=systemd-vconsole-setup comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success'
>[    1.068698] audit: type=1130 audit(1444134140.865:8): pid=1 uid=0 auid=4294967295 ses=4294967295 subj=kernel msg='unit=dracut-pre-udev comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success'
>[    1.071849] audit: type=1130 audit(1444134140.868:9): pid=1 uid=0 auid=4294967295 ses=4294967295 subj=kernel msg='unit=systemd-udevd comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success'
>[    1.081755] audit: type=1130 audit(1444134140.878:10): pid=1 uid=0 auid=4294967295 ses=4294967295 subj=kernel msg='unit=dracut-pre-trigger comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success'
>[    1.086049] usb 3-1: New USB device found, idVendor=8087, idProduct=8001
>[    1.086053] usb 3-1: New USB device strings: Mfr=0, Product=0, SerialNumber=0
>[    1.086202] hub 3-1:1.0: USB hub found
>[    1.086293] hub 3-1:1.0: 8 ports detected
>[    1.118587] pps_core: LinuxPPS API ver. 1 registered
>[    1.118589] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
>[    1.125955] PTP clock support registered
>[    1.164770] e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k
>[    1.164771] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
>[    1.164876] e1000e 0000:00:19.0: Interrupt Throttling Rate (ints/sec) set to dynamic conservative mode
>[    1.185348] [drm] Initialized drm 1.1.0 20060810
>[    1.188398] usb 1-3: New USB device found, idVendor=2109, idProduct=2812
>[    1.188401] usb 1-3: New USB device strings: Mfr=1, Product=2, SerialNumber=0
>[    1.188402] usb 1-3: Product: OneLink Pro Dock       
>[    1.188403] usb 1-3: Manufacturer: LENOVO                 
>[    1.189001] hub 1-3:1.0: USB hub found
>[    1.189162] hub 1-3:1.0: 4 ports detected
>[    1.205120] usb 2-3: New USB device found, idVendor=2109, idProduct=0812
>[    1.205122] usb 2-3: New USB device strings: Mfr=1, Product=2, SerialNumber=0
>[    1.205124] usb 2-3: Product: OneLink Pro Dock       
>[    1.205125] usb 2-3: Manufacturer: LENOVO                 
>[    1.348702] usb 1-6: new full-speed USB device number 3 using xhci_hcd
>[    1.407323] hub 2-3:1.0: USB hub found
>[    1.407455] hub 2-3:1.0: 4 ports detected
>[    1.441830] e1000e 0000:00:19.0 eth0: registered PHC clock
>[    1.441833] e1000e 0000:00:19.0 eth0: (PCI Express:2.5GT/s:Width x1) 54:ee:75:63:0b:6a
>[    1.441834] e1000e 0000:00:19.0 eth0: Intel(R) PRO/1000 Network Connection
>[    1.441857] e1000e 0000:00:19.0 eth0: MAC: 11, PHY: 12, PBA No: 1000FF-0FF
>[    1.442331] [drm:i915_dump_device_info] i915 device info: gen=8, pciid=0x1616 rev=0x09 flags=is_mobile,need_gfx_hws,has_fbc,has_hotplug,has_llc,has_ddi,has_fpga_dbg,
>[    1.442343] [drm:intel_detect_pch] Found LynxPoint LP PCH
>[    1.442388] e1000e 0000:00:19.0 enp0s25: renamed from eth0
>[    1.442405] [drm] Memory usable by graphics device = 4096M
>[    1.442407] [drm:i915_gem_gtt_init] GMADR size = 256M
>[    1.442408] [drm:i915_gem_gtt_init] GTT stolen size = 32M
>[    1.442410] [drm:i915_gem_gtt_init] ppgtt mode: 2
>[    1.442413] [drm] Replacing VGA console driver
>[    1.443057] Console: switching to colour dummy device 80x25
>[    1.443587] [drm:intel_opregion_setup] graphic opregion physical addr: 0xccd65018
>[    1.443594] [drm:intel_opregion_setup] Public ACPI methods supported
>[    1.443596] [drm:intel_opregion_setup] SWSCI supported
>[    1.449640] [drm:swsci_setup] SWSCI BIOS requested (00200383) SBCB callbacks that are not supported (02200705)
>[    1.449643] [drm:swsci_setup] SWSCI GBDA callbacks 00000483, SBCB callbacks 00200383
>[    1.449645] [drm:intel_opregion_setup] ASLE supported
>[    1.450131] [drm:intel_device_info_runtime_init] slice total: 1
>[    1.450133] [drm:intel_device_info_runtime_init] subslice total: 3
>[    1.450134] [drm:intel_device_info_runtime_init] subslice per slice: 3
>[    1.450136] [drm:intel_device_info_runtime_init] EU total: 24
>[    1.450137] [drm:intel_device_info_runtime_init] EU per subslice: 8
>[    1.450138] [drm:intel_device_info_runtime_init] has slice power gating: n
>[    1.450140] [drm:intel_device_info_runtime_init] has subslice power gating: n
>[    1.450141] [drm:intel_device_info_runtime_init] has EU power gating: n
>[    1.450142] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
>[    1.450144] [drm] Driver supports precise vblank timestamp query.
>[    1.450146] [drm:init_vbt_defaults] Set default to SSC at 120000 kHz
>[    1.450148] [drm:validate_vbt] Using VBT from OpRegion: $VBT HASWELL        d
>[    1.450150] [drm:parse_general_features] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 0 lvds_use_ssc 1 lvds_ssc_freq 120000 display_clock_mode 0 fdi_rx_polarity_inverted 0
>[    1.450152] [drm:parse_general_definitions] crt_ddc_bus_pin: 0
>[    1.450153] [drm:parse_lfp_panel_data] DRRS supported mode is static
>[    1.450156] [drm:parse_lfp_panel_data] Found panel mode in BIOS VBT tables:
>[    1.450159] [drm:drm_mode_debug_printmodeline] Modeline 0:"2560x1440" 0 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x8 0xa
>[    1.450160] [drm:parse_lfp_panel_data] VBT initial LVDS value 20033c
>[    1.450162] [drm:parse_lfp_backlight] VBT backlight PWM modulation frequency 220 Hz, active high, min brightness 3, level 255
>[    1.450164] [drm:parse_sdvo_panel_data] Found SDVO panel mode in BIOS VBT tables:
>[    1.450167] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 0 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x8 0xa
>[    1.450168] [drm:parse_sdvo_device_mapping] No SDVO device info is found in VBT
>[    1.450170] [drm:parse_driver_features] DRRS State Enabled:1
>[    1.450171] [drm:parse_edp] VBT has unknown eDP link rate value 2
>[    1.450174] [drm:parse_ddi_port] Port A VBT info: DP:1 HDMI:0 DVI:0 EDP:1 CRT:0
>[    1.450175] [drm:parse_ddi_port] VBT HDMI level shift for port A: 0
>[    1.450177] [drm:parse_ddi_port] Port B VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0
>[    1.450178] [drm:parse_ddi_port] VBT HDMI level shift for port B: 6
>[    1.450180] [drm:parse_ddi_port] Port C VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0
>[    1.450181] [drm:parse_ddi_port] VBT HDMI level shift for port C: 6
>[    1.450188] [drm:intel_dsm_pci_probe] no _DSM method for intel device
>[    1.450194] [drm:i915_gem_init_stolen] Memory reserved for graphics device: 32768K, usable: 31744K
>[    1.450196] [drm:intel_power_well_enable] enabling always-on
>[    1.450197] [drm:intel_power_well_enable] enabling display
>[    1.450260] [drm:intel_print_wm_latency] Primary WM0 latency 20 (2.0 usec)
>[    1.450262] [drm:intel_print_wm_latency] Primary WM1 latency 50 (25.0 usec)
>[    1.450263] [drm:intel_print_wm_latency] Primary WM2 latency 90 (45.0 usec)
>[    1.450265] [drm:intel_print_wm_latency] Primary WM3 latency 130 (65.0 usec)
>[    1.450266] [drm:intel_print_wm_latency] Primary WM4 latency 160 (80.0 usec)
>[    1.450268] [drm:intel_print_wm_latency] Sprite WM0 latency 20 (2.0 usec)
>[    1.450269] [drm:intel_print_wm_latency] Sprite WM1 latency 50 (25.0 usec)
>[    1.450271] [drm:intel_print_wm_latency] Sprite WM2 latency 90 (45.0 usec)
>[    1.450273] [drm:intel_print_wm_latency] Sprite WM3 latency 130 (65.0 usec)
>[    1.450274] [drm:intel_print_wm_latency] Sprite WM4 latency 160 (80.0 usec)
>[    1.450276] [drm:intel_print_wm_latency] Cursor WM0 latency 20 (2.0 usec)
>[    1.450277] [drm:intel_print_wm_latency] Cursor WM1 latency 50 (25.0 usec)
>[    1.450279] [drm:intel_print_wm_latency] Cursor WM2 latency 90 (45.0 usec)
>[    1.450280] [drm:intel_print_wm_latency] Cursor WM3 latency 130 (65.0 usec)
>[    1.450282] [drm:intel_print_wm_latency] Cursor WM4 latency 160 (80.0 usec)
>[    1.450284] [drm:intel_modeset_init] 3 display pipes available.
>[    1.450295] [drm:intel_update_cdclk] Current CD clock rate: 675000 kHz
>[    1.450296] [drm:intel_update_max_cdclk] Max CD clock rate: 540000 kHz
>[    1.450298] [drm:intel_update_max_cdclk] Max dotclock rate: 540000 kHz
>[    1.450301] vgaarb: device changed decodes: PCI:0000:00:02.0,olddecodes=io+mem,decodes=io+mem:owns=io+mem
>[    1.450611] [drm:intel_dp_init_connector] Adding eDP connector on port A
>[    1.450724] [drm:intel_dp_init_panel_power_sequencer] cur t1_t3 0 t8 0 t9 0 t10 500 t11_t12 6000
>[    1.450726] [drm:intel_dp_init_panel_power_sequencer] vbt t1_t3 2000 t8 50 t9 2000 t10 500 t11_t12 5000
>[    1.450736] [drm:intel_dp_init_panel_power_sequencer] panel power up delay 200, power down delay 50, power cycle delay 600
>[    1.450737] [drm:intel_dp_init_panel_power_sequencer] backlight on delay 5, off delay 200
>[    1.450743] [drm:intel_dp_aux_init] registering DPDDC-A bus for card0-eDP-1
>[    1.450821] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[    1.450828] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[    1.451245] [drm:intel_dp_get_dpcd] DPCD: 12 0a c4 41 00 00 01 c0 02 00 00 00 1f 0b 00
>[    1.451548] [drm:intel_dp_get_dpcd] Detected EDP PSR Panel.
>[    1.451549] [drm:intel_dp_get_dpcd] Display Port TPS3 support: source yes, sink yes
>[    1.451962] [drm:intel_dp_print_rates] source rates: 162000, 270000, 540000
>[    1.451964] [drm:intel_dp_print_rates] sink rates: 162000, 270000
>[    1.451966] [drm:intel_dp_print_rates] common rates: 162000, 270000
>[    1.451973] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x4af06
>[    1.454092] [drm:drm_dp_i2c_do_msg] native defer
>[    1.455094] [drm:drm_dp_i2c_do_msg] native defer
>[    1.456362] [drm:drm_dp_i2c_do_msg] native defer
>[    1.457362] [drm:drm_dp_i2c_do_msg] native defer
>[    1.458644] [drm:drm_dp_i2c_do_msg] native defer
>[    1.459642] [drm:drm_dp_i2c_do_msg] native defer
>[    1.460914] [drm:drm_dp_i2c_do_msg] native defer
>[    1.461910] [drm:drm_dp_i2c_do_msg] native defer
>[    1.463179] [drm:drm_dp_i2c_do_msg] native defer
>[    1.464136] [drm:drm_dp_i2c_do_msg] native defer
>[    1.465405] [drm:drm_dp_i2c_do_msg] native defer
>[    1.466404] [drm:drm_dp_i2c_do_msg] native defer
>[    1.467676] [drm:drm_dp_i2c_do_msg] native defer
>[    1.468114] psmouse serio1: synaptics: queried max coordinates: x [..5676], y [..4758]
>[    1.468673] [drm:drm_dp_i2c_do_msg] native defer
>[    1.469540] 8021q: 802.1Q VLAN Support v1.8
>[    1.469951] [drm:drm_dp_i2c_do_msg] native defer
>[    1.470965] [drm:drm_dp_i2c_do_msg] native defer
>[    1.471994] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    1.471996] [drm:intel_dp_drrs_init] VBT doesn't support DRRS
>[    1.472000] [drm:intel_panel_setup_backlight] Connector eDP-1 backlight initialized, enabled, brightness 852/852
>[    1.472014] [drm:intel_dp_init_connector] Adding DP connector on port B
>[    1.472048] [drm:intel_dp_aux_init] registering DPDDC-B bus for card0-DP-1
>[    1.472131] [drm:intel_dp_init_connector] Adding DP connector on port C
>[    1.472157] [drm:intel_dp_aux_init] registering DPDDC-C bus for card0-DP-2
>[    1.481874] [drm:intel_modeset_readout_hw_state] [CRTC:21] hw state readout: enabled
>[    1.481876] [drm:intel_modeset_readout_hw_state] [CRTC:25] hw state readout: disabled
>[    1.481878] [drm:intel_modeset_readout_hw_state] [CRTC:29] hw state readout: disabled
>[    1.481879] [drm:intel_modeset_readout_hw_state] WRPLL 1 hw state readout: crtc_mask 0x00000001, on 1
>[    1.481881] [drm:intel_modeset_readout_hw_state] WRPLL 2 hw state readout: crtc_mask 0x00000000, on 0
>[    1.481885] [drm:intel_modeset_readout_hw_state] [ENCODER:31:TMDS-31] hw state readout: enabled, pipe A
>[    1.481886] [drm:intel_modeset_readout_hw_state] [ENCODER:39:TMDS-39] hw state readout: disabled, pipe A
>[    1.481887] [drm:intel_modeset_readout_hw_state] [ENCODER:41:DP MST-41] hw state readout: disabled, pipe A
>[    1.481888] [drm:intel_modeset_readout_hw_state] [ENCODER:42:DP MST-42] hw state readout: disabled, pipe B
>[    1.481889] [drm:intel_modeset_readout_hw_state] [ENCODER:43:DP MST-43] hw state readout: disabled, pipe C
>[    1.481890] [drm:intel_modeset_readout_hw_state] [ENCODER:46:TMDS-46] hw state readout: disabled, pipe A
>[    1.481891] [drm:intel_modeset_readout_hw_state] [ENCODER:48:DP MST-48] hw state readout: disabled, pipe A
>[    1.481892] [drm:intel_modeset_readout_hw_state] [ENCODER:49:DP MST-49] hw state readout: disabled, pipe B
>[    1.481893] [drm:intel_modeset_readout_hw_state] [ENCODER:50:DP MST-50] hw state readout: disabled, pipe C
>[    1.481894] [drm:intel_modeset_readout_hw_state] [CONNECTOR:32:eDP-1] hw state readout: enabled
>[    1.481895] [drm:intel_modeset_readout_hw_state] [CONNECTOR:40:DP-1] hw state readout: disabled
>[    1.481896] [drm:intel_modeset_readout_hw_state] [CONNECTOR:44:HDMI-A-1] hw state readout: disabled
>[    1.481897] [drm:intel_modeset_readout_hw_state] [CONNECTOR:47:DP-2] hw state readout: disabled
>[    1.481898] [drm:intel_modeset_readout_hw_state] [CONNECTOR:51:HDMI-A-2] hw state readout: disabled
>[    1.481902] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:2560x1440] for CRTC state ffff88021e5ba400
>[    1.481910] [drm:intel_dump_pipe_config] [CRTC:21][setup_hw_state] config ffff88021e5ba400 for pipe A
>[    1.481911] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    1.481912] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 0
>[    1.481913] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    1.481914] [drm:intel_dump_pipe_config] dp: 1, lanes: 4, gmch_m: 4166237, gmch_n: 8388608, link_m: 462915, link_n: 524288, tu: 64
>[    1.481915] [drm:intel_dump_pipe_config] dp: 1, lanes: 4, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    1.481916] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    1.481917] [drm:intel_dump_pipe_config] requested mode:
>[    1.481918] [drm:drm_mode_debug_printmodeline] Modeline 0:"2560x1440" 60 238393 2560 2608 2640 2720 1440 1442 1445 1457 0x40 0x9
>[    1.481919] [drm:intel_dump_pipe_config] adjusted mode:
>[    1.481920] [drm:drm_mode_debug_printmodeline] Modeline 0:"2560x1440" 60 238393 2560 2608 2640 2720 1440 1442 1445 1457 0x40 0x9
>[    1.481922] [drm:intel_dump_crtc_timings] crtc timings: 238393 2560 2608 2640 2720 1440 1442 1445 1457, type: 0x40 flags: 0x9
>[    1.481922] [drm:intel_dump_pipe_config] port clock: 270000
>[    1.481923] [drm:intel_dump_pipe_config] pipe src size: 720x400
>[    1.481924] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[    1.481925] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    1.481926] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x0a0005a0, enabled
>[    1.481926] [drm:intel_dump_pipe_config] ips: 0
>[    1.481927] [drm:intel_dump_pipe_config] double wide: 0
>[    1.481928] [drm:intel_dump_pipe_config] ddi_pll_sel: 2147483648; dpll_hw_state: wrpll: 0x90280202
>[    1.481929] [drm:intel_dump_pipe_config] planes on this crtc
>[    1.481930] [drm:intel_dump_pipe_config] STANDARD PLANE:18 plane: 0.0 idx: 0 disabled, scaler_id = 0
>[    1.481931] [drm:intel_dump_pipe_config] CURSOR PLANE:20 plane: 0.1 idx: 1 disabled, scaler_id = 0
>[    1.481932] [drm:intel_dump_pipe_config] STANDARD PLANE:22 plane: 0.1 idx: 2 disabled, scaler_id = 0
>[    1.481933] [drm:intel_dump_pipe_config] [CRTC:25][setup_hw_state] config ffff88021e5bb400 for pipe B
>[    1.481934] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[    1.481935] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0
>[    1.481936] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    1.481937] [drm:intel_dump_pipe_config] dp: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    1.481938] [drm:intel_dump_pipe_config] dp: 0, lanes: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    1.481938] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    1.481939] [drm:intel_dump_pipe_config] requested mode:
>[    1.481940] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    1.481941] [drm:intel_dump_pipe_config] adjusted mode:
>[    1.481942] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    1.481943] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[    1.481944] [drm:intel_dump_pipe_config] port clock: 0
>[    1.481944] [drm:intel_dump_pipe_config] pipe src size: 0x0
>[    1.481945] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[    1.481946] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    1.481947] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    1.481948] [drm:intel_dump_pipe_config] ips: 0
>[    1.481948] [drm:intel_dump_pipe_config] double wide: 0
>[    1.481949] [drm:intel_dump_pipe_config] ddi_pll_sel: 0; dpll_hw_state: wrpll: 0x0
>[    1.481950] [drm:intel_dump_pipe_config] planes on this crtc
>[    1.481950] [drm:intel_dump_pipe_config] STANDARD PLANE:23 plane: 1.0 idx: 3 disabled, scaler_id = 0
>[    1.481951] [drm:intel_dump_pipe_config] CURSOR PLANE:24 plane: 1.2 idx: 4 disabled, scaler_id = 0
>[    1.481952] [drm:intel_dump_pipe_config] STANDARD PLANE:26 plane: 1.1 idx: 5 disabled, scaler_id = 0
>[    1.481954] [drm:intel_dump_pipe_config] [CRTC:29][setup_hw_state] config ffff88021e5bc400 for pipe C
>[    1.481954] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[    1.481955] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0
>[    1.481956] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    1.481957] [drm:intel_dump_pipe_config] dp: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    1.481958] [drm:intel_dump_pipe_config] dp: 0, lanes: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    1.481959] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    1.481959] [drm:intel_dump_pipe_config] requested mode:
>[    1.481960] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    1.481961] [drm:intel_dump_pipe_config] adjusted mode:
>[    1.481962] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    1.481963] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[    1.481964] [drm:intel_dump_pipe_config] port clock: 0
>[    1.481964] [drm:intel_dump_pipe_config] pipe src size: 0x0
>[    1.481965] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[    1.481966] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    1.481967] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    1.481967] [drm:intel_dump_pipe_config] ips: 0
>[    1.481968] [drm:intel_dump_pipe_config] double wide: 0
>[    1.481969] [drm:intel_dump_pipe_config] ddi_pll_sel: 0; dpll_hw_state: wrpll: 0x0
>[    1.481969] [drm:intel_dump_pipe_config] planes on this crtc
>[    1.481970] [drm:intel_dump_pipe_config] STANDARD PLANE:27 plane: 2.0 idx: 6 disabled, scaler_id = 0
>[    1.481971] [drm:intel_dump_pipe_config] CURSOR PLANE:28 plane: 2.3 idx: 7 disabled, scaler_id = 0
>[    1.481972] [drm:intel_dump_pipe_config] STANDARD PLANE:30 plane: 2.1 idx: 8 disabled, scaler_id = 0
>[    1.481976] [drm:intel_power_well_disable] disabling display
>[    1.481978] [drm:hsw_set_power_well] Requesting to disable the power well
>[    1.482019] [drm:i915_gem_setup_global_gtt] clearing unused GTT space: [0, fffff000]
>[    1.483374] [drm:i915_gem_context_init] LR context support initialized
>[    1.483392] [drm:intel_init_pipe_control] render ring pipe control offset: 0x00000000
>[    1.483488] [drm:gen8_init_common_ring] Execlists enabled for render ring
>[    1.483495] [drm:gen8_init_common_ring] Execlists enabled for bsd ring
>[    1.483499] [drm:gen8_init_common_ring] Execlists enabled for blitter ring
>[    1.483505] [drm:gen8_init_common_ring] Execlists enabled for video enhancement ring
>[    1.483530] [drm:intel_update_cdclk] Current CD clock rate: 675000 kHz
>[    1.483648] [drm:intel_backlight_device_register] Connector eDP-1 backlight sysfs interface registered
>[    1.483650] [drm:intel_fbdev_init_bios] pipe A not active or no fb, skipping
>[    1.483651] [drm:intel_fbdev_init_bios] pipe B not active or no fb, skipping
>[    1.483652] [drm:intel_fbdev_init_bios] pipe C not active or no fb, skipping
>[    1.483653] [drm:intel_fbdev_init_bios] no active fbs found, not using BIOS config
>[    1.483681] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1]
>[    1.483684] [drm:intel_dp_detect] [CONNECTOR:32:eDP-1]
>[    1.483718] [drm:intel_didl_outputs] 8 outputs detected
>[    1.483998] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[    1.484171] ACPI: Video Device [VID] (multi-head: yes  rom: no  post: no)
>[    1.484303] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[    1.484528] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:00/input/input6
>[    1.484599] [drm] Initialized i915 1.6.0 20150928 for 0000:00:02.0 on minor 0
>[    1.484828] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1] status updated from 3 to 1
>[    1.484837] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    1.484840] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1] probed modes :
>[    1.484843] [drm:drm_mode_debug_printmodeline] Modeline 33:"2560x1440" 60 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x48 0x9
>[    1.484845] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1]
>[    1.484846] [drm:intel_dp_detect] [CONNECTOR:40:DP-1]
>[    1.484849] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1] status updated from 3 to 2
>[    1.484851] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1] disconnected
>[    1.484853] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1]
>[    1.484855] [drm:intel_hdmi_detect] [CONNECTOR:44:HDMI-A-1]
>[    1.499441] psmouse serio1: synaptics: queried min coordinates: x [1266..], y [1096..]
>[    1.504872] [drm:intel_hdmi_detect] Live status not up!
>[    1.504901] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1] status updated from 3 to 2
>[    1.504905] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1] disconnected
>[    1.504906] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2]
>[    1.504907] [drm:intel_dp_detect] [CONNECTOR:47:DP-2]
>[    1.504910] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2] status updated from 3 to 2
>[    1.504911] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2] disconnected
>[    1.504911] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2]
>[    1.504912] [drm:intel_hdmi_detect] [CONNECTOR:51:HDMI-A-2]
>[    1.513902] usb 1-6: New USB device found, idVendor=138a, idProduct=0017
>[    1.513904] usb 1-6: New USB device strings: Mfr=0, Product=0, SerialNumber=1
>[    1.513906] usb 1-6: SerialNumber: 5571788a45bf
>[    1.524930] [drm:intel_hdmi_detect] Live status not up!
>[    1.524932] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2] status updated from 3 to 2
>[    1.524933] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2] disconnected
>[    1.524935] [drm:drm_setup_crtcs] 
>[    1.524936] [drm:drm_enable_connectors] connector 32 enabled? yes
>[    1.524937] [drm:drm_enable_connectors] connector 40 enabled? no
>[    1.524937] [drm:drm_enable_connectors] connector 44 enabled? no
>[    1.524938] [drm:drm_enable_connectors] connector 47 enabled? no
>[    1.524939] [drm:drm_enable_connectors] connector 51 enabled? no
>[    1.524950] [drm:intel_fb_initial_config] looking for cmdline mode on connector eDP-1
>[    1.524951] [drm:intel_fb_initial_config] looking for preferred mode on connector eDP-1 0
>[    1.524953] [drm:intel_fb_initial_config] connector eDP-1 on pipe A [CRTC:21]: 2560x1440
>[    1.524954] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping
>[    1.524954] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping
>[    1.524955] [drm:intel_fb_initial_config] connector DP-2 not enabled, skipping
>[    1.524956] [drm:intel_fb_initial_config] connector HDMI-A-2 not enabled, skipping
>[    1.524957] [drm:drm_setup_crtcs] desired mode 2560x1440 set on crtc 21 (0,0)
>[    1.524958] [drm:intelfb_create] no BIOS fb, allocating a new one
>[    1.524960] [drm:i915_gem_object_create_stolen] creating stolen object: size=e10000
>[    1.524963] [drm:i915_pages_create_for_stolen] offset=0x1000, size=14745600
>[    1.525879] [drm:intelfb_create] allocated 2560x1440 fb: 0x000af000, bo ffff88021f52c000
>[    1.525964] fbcon: inteldrmfb (fb0) is primary device
>[    1.526034] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fa14200
>[    1.526036] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8802243cf0c0 state to ffff88021fa14200
>[    1.526037] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8802243cf780 state to ffff88021fa14200
>[    1.526038] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8802243cf780 to [NOCRTC]
>[    1.526039] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8802243cf780
>[    1.526040] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8802243cf000 state to ffff88021fa14200
>[    1.526041] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8802243cf000 to [NOCRTC]
>[    1.526041] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8802243cf000
>[    1.526042] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8802243cfe40 state to ffff88021fa14200
>[    1.526044] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff8802243cf840 state to ffff88021fa14200
>[    1.526044] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8802243cf840 to [NOCRTC]
>[    1.526045] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8802243cf840
>[    1.526046] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8802243cf6c0 state to ffff88021fa14200
>[    1.526047] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8802243cf6c0 to [NOCRTC]
>[    1.526048] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8802243cf6c0
>[    1.526050] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff88021db8f000 state to ffff88021fa14200
>[    1.526051] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff88021db8f0c0 state to ffff88021fa14200
>[    1.526051] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021db8f0c0 to [NOCRTC]
>[    1.526052] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88021db8f0c0
>[    1.526053] [drm:drm_atomic_get_plane_state] Added [PLANE:30] ffff88021db8f180 state to ffff88021fa14200
>[    1.526054] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021db8f180 to [NOCRTC]
>[    1.526054] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88021db8f180
>[    1.526056] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e5be400 state to ffff88021fa14200
>[    1.526058] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:2560x1440] for CRTC state ffff88021e5be400
>[    1.526059] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8802243cf0c0 to [CRTC:21]
>[    1.526060] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802243cf0c0
>[    1.526061] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:32] ffff88021e7a8ec0 state to ffff88021fa14200
>[    1.526063] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88021fa14200
>[    1.526064] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88021e7a8ec0 to [NOCRTC]
>[    1.526065] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88021e7a8ec0 to [CRTC:21]
>[    1.526066] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88021e5be800 state to ffff88021fa14200
>[    1.526067] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88021e5be800
>[    1.526067] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8802243cfe40 to [NOCRTC]
>[    1.526068] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8802243cfe40
>[    1.526069] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88021fa14200
>[    1.526070] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff88021fa14200
>[    1.526071] [drm:drm_atomic_connectors_for_crtc] State ffff88021fa14200 has 1 connectors for [CRTC:21]
>[    1.526072] [drm:drm_atomic_get_crtc_state] Added [CRTC:29] ffff88021e5bec00 state to ffff88021fa14200
>[    1.526073] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88021e5bec00
>[    1.526073] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021db8f000 to [NOCRTC]
>[    1.526073] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88021db8f000
>[    1.526074] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88021fa14200
>[    1.526075] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff88021fa14200
>[    1.526075] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:29] to ffff88021fa14200
>[    1.526076] [drm:drm_atomic_connectors_for_crtc] State ffff88021fa14200 has 1 connectors for [CRTC:21]
>[    1.526076] [drm:drm_atomic_connectors_for_crtc] State ffff88021fa14200 has 0 connectors for [CRTC:25]
>[    1.526077] [drm:drm_atomic_check_only] checking ffff88021fa14200
>[    1.526078] [drm:drm_atomic_helper_check_modeset] [CRTC:21] mode changed
>[    1.526079] [drm:update_connector_routing] Updating routing for [CONNECTOR:32:eDP-1]
>[    1.526080] [drm:update_connector_routing] [CONNECTOR:32:eDP-1] keeps [ENCODER:31:TMDS-31], now on [CRTC:21]
>[    1.526080] [drm:drm_atomic_helper_check_modeset] [CRTC:21] needs all connectors, enable: y, active: y
>[    1.526081] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88021fa14200
>[    1.526082] [drm:drm_atomic_connectors_for_crtc] State ffff88021fa14200 has 1 connectors for [CRTC:21]
>[    1.526082] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88021fa14200
>[    1.526083] [drm:connected_sink_compute_bpp] [CONNECTOR:32:eDP-1] checking for sink bpp constrains
>[    1.526084] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to default limit of 24
>[    1.526086] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 270000 pixel clock 237800KHz
>[    1.526086] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[    1.526087] [drm:intel_dp_compute_config] DP link bw 0a rate select 00 lane count 4 clock 270000 bpp 18
>[    1.526087] [drm:intel_dp_compute_config] DP link bw required 428040 available 864000
>[    1.526088] [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[    1.526090] [drm:intel_pipe_config_compare] mismatch in dp_m_n (expected tu 64 gmch 4166237/8388608 link 462915/524288, or tu 0 gmch 0/0 link 0/0, found tu 64, gmch 4155856/8388608 link 461761/524288)
>[    1.526092] [drm:intel_pipe_config_compare] mismatch in ddi_pll_sel (expected 0x80000000, found 0x20000000)
>[    1.526092] [drm:intel_pipe_config_compare] mismatch in dpll_hw_state.wrpll (expected 0x90280202, found 0x00000000)
>[    1.526093] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config ffff88021e5be400 for pipe A
>[    1.526094] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    1.526094] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    1.526095] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    1.526096] [drm:intel_dump_pipe_config] dp: 1, lanes: 4, gmch_m: 4155856, gmch_n: 8388608, link_m: 461761, link_n: 524288, tu: 64
>[    1.526097] [drm:intel_dump_pipe_config] dp: 1, lanes: 4, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    1.526098] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    1.526098] [drm:intel_dump_pipe_config] requested mode:
>[    1.526099] [drm:drm_mode_debug_printmodeline] Modeline 0:"2560x1440" 60 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x48 0x9
>[    1.526099] [drm:intel_dump_pipe_config] adjusted mode:
>[    1.526100] [drm:drm_mode_debug_printmodeline] Modeline 0:"2560x1440" 60 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x48 0x9
>[    1.526101] [drm:intel_dump_crtc_timings] crtc timings: 237800 2560 2608 2640 2720 1440 1442 1445 1457, type: 0x48 flags: 0x9
>[    1.526101] [drm:intel_dump_pipe_config] port clock: 270000
>[    1.526102] [drm:intel_dump_pipe_config] pipe src size: 2560x1440
>[    1.526102] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[    1.526103] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    1.526104] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    1.526104] [drm:intel_dump_pipe_config] ips: 1
>[    1.526104] [drm:intel_dump_pipe_config] double wide: 0
>[    1.526105] [drm:intel_dump_pipe_config] ddi_pll_sel: 536870912; dpll_hw_state: wrpll: 0x0
>[    1.526105] [drm:intel_dump_pipe_config] planes on this crtc
>[    1.526106] [drm:intel_dump_pipe_config] STANDARD PLANE:18 plane: 0.0 idx: 0 disabled, scaler_id = 0
>[    1.526106] [drm:intel_dump_pipe_config] CURSOR PLANE:20 plane: 0.1 idx: 1 disabled, scaler_id = 0
>[    1.526107] [drm:intel_dump_pipe_config] STANDARD PLANE:22 plane: 0.1 idx: 2 disabled, scaler_id = 0
>[    1.526109] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 54
>[    1.526110] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 0 -> 1, off 0, on 1, ms 1
>[    1.526114] [drm:drm_atomic_commit] commiting ffff88021fa14200
>[    1.526118] [drm:set_no_fbc_reason] Disabling FBC: disabled per chip default
>[    1.527829] [drm:intel_edp_backlight_off] 
>[    1.555865] psmouse serio1: synaptics: Touchpad model: 1, fw: 8.1, id: 0x1e2b1, caps: 0xf003a3/0x943300/0x12e800/0x10000, board id: 3072, fw id: 1795685
>[    1.555871] psmouse serio1: synaptics: serio: Synaptics pass-through port at isa0060/serio1/input0
>[    1.587877] usb 1-3.1: new high-speed USB device number 4 using xhci_hcd
>[    1.593806] input: SynPS/2 Synaptics TouchPad as /devices/platform/i8042/serio1/input/input5
>[    1.638903] tsc: Refined TSC clocksource calibration: 2593.994 MHz
>[    1.638905] clocksource: tsc: mask: 0xffffffffffffffff max_cycles: 0x256412811b4, max_idle_ns: 440795306987 ns
>[    1.677048] usb 1-3.1: New USB device found, idVendor=2109, idProduct=2812
>[    1.677049] usb 1-3.1: New USB device strings: Mfr=1, Product=2, SerialNumber=0
>[    1.677050] usb 1-3.1: Product: OneLink Pro Dock       
>[    1.677050] usb 1-3.1: Manufacturer: LENOVO                 
>[    1.711660] hub 1-3.1:1.0: USB hub found
>[    1.712025] hub 1-3.1:1.0: 4 ports detected
>[    1.728972] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[    1.728982] [drm:intel_disable_pipe] disabling pipe A
>[    1.731190] [drm:edp_panel_off] Turn eDP port A panel power off
>[    1.731194] [drm:wait_panel_off] Wait for panel power off time
>[    1.731197] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[    1.783933] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000008, dig 0x00000012, pins 0x00000010
>[    1.783934] [drm:intel_hpd_irq_handler] digital hpd port A - long
>[    1.783934] [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 4 - cnt: 0
>[    1.783964] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port A
>[    1.791010] [drm:wait_panel_status] Wait complete
>[    1.791014] [drm:intel_disable_shared_dpll] disable WRPLL 1 (active 1, on? 1) for crtc 21
>[    1.791015] [drm:intel_disable_shared_dpll] disabling WRPLL 1
>[    1.795012] [drm:intel_update_cdclk] Current CD clock rate: 337500 kHz
>[    1.795027] [drm:edp_panel_on] Turn eDP port A panel power on
>[    1.795030] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[    1.864047] usb 1-7: new full-speed USB device number 5 using xhci_hcd
>[    1.874211] usb 2-3.1: new SuperSpeed USB device number 3 using xhci_hcd
>[    2.029739] usb 1-7: New USB device found, idVendor=8087, idProduct=0a2a
>[    2.029740] usb 1-7: New USB device strings: Mfr=0, Product=0, SerialNumber=0
>[    2.103175] usb 1-3.2: new high-speed USB device number 6 using xhci_hcd
>[    2.117514] usb 2-3.1: New USB device found, idVendor=2109, idProduct=0812
>[    2.117515] usb 2-3.1: New USB device strings: Mfr=1, Product=2, SerialNumber=0
>[    2.117516] usb 2-3.1: Product: OneLink Pro Dock       
>[    2.117517] usb 2-3.1: Manufacturer: LENOVO                 
>[    2.119717] hub 2-3.1:1.0: USB hub found
>[    2.119832] hub 2-3.1:1.0: 4 ports detected
>[    2.190629] usb 1-3.2: New USB device found, idVendor=1a40, idProduct=0101
>[    2.190630] usb 1-3.2: New USB device strings: Mfr=0, Product=1, SerialNumber=0
>[    2.190631] usb 1-3.2: Product: USB 2.0 Hub
>[    2.191144] hub 1-3.2:1.0: USB hub found
>[    2.191204] hub 1-3.2:1.0: 4 ports detected
>[    2.264278] usb 1-3.1.4: new full-speed USB device number 7 using xhci_hcd
>[    2.332365] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[    2.332368] [drm:wait_panel_status] Wait complete
>[    2.332371] [drm:wait_panel_on] Wait for panel power on
>[    2.332373] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[    2.356225] usb 1-3.1.4: config 1 interface 1 altsetting 1 has 2 endpoint descriptors, different from the interface descriptor's value: 1
>[    2.358865] usb 1-3.1.4: New USB device found, idVendor=17ef, idProduct=304e
>[    2.358867] usb 1-3.1.4: New USB device strings: Mfr=1, Product=2, SerialNumber=0
>[    2.358867] usb 1-3.1.4: Product: ThinkPad OneLink Pro Dock Audio
>[    2.358868] usb 1-3.1.4: Manufacturer: C-Media Electronics Inc.
>[    2.358978] usb 1-3.1.4: ep 0x89 - rounding interval to 32 microframes, ep desc says 48 microframes
>[    2.358982] usb 1-3.1.4: ep 0x87 - rounding interval to 32 microframes, ep desc says 48 microframes
>[    2.361620] input: C-Media Electronics Inc. ThinkPad OneLink Pro Dock Audio as /devices/pci0000:00/0000:00:14.0/usb1/1-3/1-3.1/1-3.1.4/1-3.1.4:1.3/0003:17EF:304E.0001/input/input8
>[    2.361759] hid-generic 0003:17EF:304E.0001: input,hidraw0: USB HID v1.00 Device [C-Media Electronics Inc. ThinkPad OneLink Pro Dock Audio] on usb-0000:00:14.0-3.1.4/input3
>[    2.436487] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000008, dig 0x00000012, pins 0x00000010
>[    2.436489] [drm:intel_hpd_irq_handler] digital hpd port A - long
>[    2.436490] [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 4 - cnt: 1
>[    2.436523] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port A
>[    2.484783] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000008, dig 0x00000011, pins 0x00000010
>[    2.484784] [drm:intel_hpd_irq_handler] digital hpd port A - short
>[    2.484820] [drm:intel_dp_hpd_pulse] got hpd irq on port A - short
>[    2.485557] usb 2-3.1.2: new SuperSpeed USB device number 4 using xhci_hcd
>[    2.499441] usb 2-3.1.2: New USB device found, idVendor=05e3, idProduct=0616
>[    2.499443] usb 2-3.1.2: New USB device strings: Mfr=1, Product=2, SerialNumber=0
>[    2.499443] usb 2-3.1.2: Product: USB3.0 Hub
>[    2.499444] usb 2-3.1.2: Manufacturer: GenesysLogic
>[    2.501715] hub 2-3.1.2:1.0: USB hub found
>[    2.501973] hub 2-3.1.2:1.0: 4 ports detected
>[    2.504382] usb 1-8: new high-speed USB device number 8 using xhci_hcd
>[    2.533451] [drm:wait_panel_status] Wait complete
>[    2.533458] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[    2.533463] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[    2.534564] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[    2.534565] [drm:intel_dp_set_signal_levels] Using vswing level 0
>[    2.534566] [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0
>[    2.535192] [drm:intel_dp_start_link_train] clock recovery OK
>[    2.536122] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[    2.536209] [drm:intel_enable_pipe] enabling pipe A
>[    2.536366] [drm:intel_edp_backlight_on] 
>[    2.536367] [drm:intel_panel_enable_backlight] pipe A
>[    2.536375] [drm:intel_panel_actually_set_backlight] set backlight PWM = 852
>[    2.539437] [drm:intel_psr_match_conditions] PSR disable by flag
>[    2.539438] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[    2.566554] usb 2-3.1.3: new SuperSpeed USB device number 5 using xhci_hcd
>[    2.578135] usb 2-3.1.3: New USB device found, idVendor=17ef, idProduct=304f
>[    2.578136] usb 2-3.1.3: New USB device strings: Mfr=1, Product=2, SerialNumber=6
>[    2.578137] usb 2-3.1.3: Product: ThinkPad Dock Giga
>[    2.578138] usb 2-3.1.3: Manufacturer: Lenovo
>[    2.578139] usb 2-3.1.3: SerialNumber: 000001000000
>[    2.587541] usbcore: registered new interface driver r8152
>[    2.603077] [drm:intel_connector_check_state] [CONNECTOR:32:eDP-1]
>[    2.603080] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[    2.603082] [drm:check_encoder_state] [ENCODER:39:TMDS-39]
>[    2.603083] [drm:check_encoder_state] [ENCODER:41:DP MST-41]
>[    2.603083] [drm:check_encoder_state] [ENCODER:42:DP MST-42]
>[    2.603084] [drm:check_encoder_state] [ENCODER:43:DP MST-43]
>[    2.603084] [drm:check_encoder_state] [ENCODER:46:TMDS-46]
>[    2.603085] [drm:check_encoder_state] [ENCODER:48:DP MST-48]
>[    2.603086] [drm:check_encoder_state] [ENCODER:49:DP MST-49]
>[    2.603086] [drm:check_encoder_state] [ENCODER:50:DP MST-50]
>[    2.603089] [drm:check_crtc_state] [CRTC:21]
>[    2.603096] [drm:check_shared_dpll_state] WRPLL 1
>[    2.603097] [drm:check_shared_dpll_state] WRPLL 2
>[    2.603098] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fa14200
>[    2.603101] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fa14200
>[    2.603105] [drm:drm_fb_helper_hotplug_event] 
>[    2.603107] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1]
>[    2.603108] [drm:intel_dp_detect] [CONNECTOR:32:eDP-1]
>[    2.603431] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[    2.604206] [drm:intel_dp_get_dpcd] DPCD: 12 0a c4 41 00 00 01 c0 02 00 00 00 1f 0b 00
>[    2.604520] [drm:intel_dp_get_dpcd] Detected EDP PSR Panel.
>[    2.604521] [drm:intel_dp_get_dpcd] Display Port TPS3 support: source yes, sink yes
>[    2.604817] [drm:intel_dp_print_rates] source rates: 162000, 270000, 540000
>[    2.604818] [drm:intel_dp_print_rates] sink rates: 162000, 270000
>[    2.604819] [drm:intel_dp_print_rates] common rates: 162000, 270000
>[    2.605582] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[    2.606093] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    2.606094] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1] probed modes :
>[    2.606096] [drm:drm_mode_debug_printmodeline] Modeline 33:"2560x1440" 60 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x48 0x9
>[    2.606097] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1]
>[    2.606097] [drm:intel_dp_detect] [CONNECTOR:40:DP-1]
>[    2.606100] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1] disconnected
>[    2.606101] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1]
>[    2.606101] [drm:intel_hdmi_detect] [CONNECTOR:44:HDMI-A-1]
>[    2.626118] [drm:intel_hdmi_detect] Live status not up!
>[    2.626118] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1] disconnected
>[    2.626119] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2]
>[    2.626119] [drm:intel_dp_detect] [CONNECTOR:47:DP-2]
>[    2.626122] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2] disconnected
>[    2.626123] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2]
>[    2.626123] [drm:intel_hdmi_detect] [CONNECTOR:51:HDMI-A-2]
>[    2.646143] [drm:intel_hdmi_detect] Live status not up!
>[    2.646143] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2] disconnected
>[    2.646144] [drm:drm_setup_crtcs] 
>[    2.646145] [drm:drm_enable_connectors] connector 32 enabled? yes
>[    2.646155] [drm:drm_enable_connectors] connector 40 enabled? no
>[    2.646155] [drm:drm_enable_connectors] connector 44 enabled? no
>[    2.646156] [drm:drm_enable_connectors] connector 47 enabled? no
>[    2.646156] [drm:drm_enable_connectors] connector 51 enabled? no
>[    2.646157] [drm:intel_fb_initial_config] looking for cmdline mode on connector eDP-1
>[    2.646158] [drm:intel_fb_initial_config] looking for preferred mode on connector eDP-1 0
>[    2.646159] [drm:intel_fb_initial_config] connector eDP-1 on pipe A [CRTC:21]: 2560x1440
>[    2.646159] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping
>[    2.646159] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping
>[    2.646160] [drm:intel_fb_initial_config] connector DP-2 not enabled, skipping
>[    2.646160] [drm:intel_fb_initial_config] connector HDMI-A-2 not enabled, skipping
>[    2.646161] [drm:drm_setup_crtcs] desired mode 2560x1440 set on crtc 21 (0,0)
>[    2.646164] [drm:drm_atomic_state_init] Allocated atomic state ffff88021f531600
>[    2.646166] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800354a7540 state to ffff88021f531600
>[    2.646167] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021f580400 state to ffff88021f531600
>[    2.646168] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800354a7900 state to ffff88021f531600
>[    2.646169] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800354a7900 to [NOCRTC]
>[    2.646169] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800354a7900
>[    2.646170] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800354a7000 state to ffff88021f531600
>[    2.646170] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800354a7000 to [NOCRTC]
>[    2.646171] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800354a7000
>[    2.646171] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800354a7c00 state to ffff88021f531600
>[    2.646172] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff8800354a7b40 state to ffff88021f531600
>[    2.646172] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800354a7b40 to [NOCRTC]
>[    2.646173] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800354a7b40
>[    2.646173] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800354a7a80 state to ffff88021f531600
>[    2.646174] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800354a7a80 to [NOCRTC]
>[    2.646174] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800354a7a80
>[    2.646175] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff8800354a73c0 state to ffff88021f531600
>[    2.646176] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff8800354a7300 state to ffff88021f531600
>[    2.646176] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800354a7300 to [NOCRTC]
>[    2.646176] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800354a7300
>[    2.646177] [drm:drm_atomic_get_plane_state] Added [PLANE:30] ffff8800354a7f00 state to ffff88021f531600
>[    2.646177] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800354a7f00 to [NOCRTC]
>[    2.646178] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800354a7f00
>[    2.646179] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:2560x1440] for CRTC state ffff88021f580400
>[    2.646179] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800354a7540 to [CRTC:21]
>[    2.646180] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800354a7540
>[    2.646180] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:32] ffff8802243d6e00 state to ffff88021f531600
>[    2.646181] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88021f531600
>[    2.646185] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8802243d6e00 to [NOCRTC]
>[    2.646185] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8802243d6e00 to [CRTC:21]
>[    2.646186] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88021f584400 state to ffff88021f531600
>[    2.646187] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88021f584400
>[    2.646188] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800354a7c00 to [NOCRTC]
>[    2.646188] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800354a7c00
>[    2.646195] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88021f531600
>[    2.646196] clocksource: Switched to clocksource tsc
>[    2.646197] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff88021f531600
>[    2.646198] [drm:drm_atomic_connectors_for_crtc] State ffff88021f531600 has 1 connectors for [CRTC:21]
>[    2.646199] [drm:drm_atomic_get_crtc_state] Added [CRTC:29] ffff88021f584000 state to ffff88021f531600
>[    2.646200] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88021f584000
>[    2.646200] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800354a73c0 to [NOCRTC]
>[    2.646200] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800354a73c0
>[    2.646201] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88021f531600
>[    2.646201] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff88021f531600
>[    2.646202] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:29] to ffff88021f531600
>[    2.646202] [drm:drm_atomic_connectors_for_crtc] State ffff88021f531600 has 1 connectors for [CRTC:21]
>[    2.646203] [drm:drm_atomic_connectors_for_crtc] State ffff88021f531600 has 0 connectors for [CRTC:25]
>[    2.646203] [drm:drm_atomic_check_only] checking ffff88021f531600
>[    2.646205] [drm:update_connector_routing] Updating routing for [CONNECTOR:32:eDP-1]
>[    2.646206] [drm:update_connector_routing] [CONNECTOR:32:eDP-1] keeps [ENCODER:31:TMDS-31], now on [CRTC:21]
>[    2.646208] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 54
>[    2.646208] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 0, on 0, ms 0
>[    2.646211] [drm:drm_atomic_commit] commiting ffff88021f531600
>[    2.646224] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021f531600
>[    2.646235] [drm:drm_atomic_state_free] Freeing atomic state ffff88021f531600
>[    2.646240] Console: switching to colour frame buffer device 320x90
>[    2.646245] [drm:drm_atomic_state_init] Allocated atomic state ffff88021f531600
>[    2.646246] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021f586000 state to ffff88021f531600
>[    2.646246] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8802243cf6c0 state to ffff88021f531600
>[    2.646247] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:2560x1440] for CRTC state ffff88021f586000
>[    2.646248] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8802243cf6c0 to [CRTC:21]
>[    2.646248] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802243cf6c0
>[    2.646249] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:32] ffff8802243d6ca0 state to ffff88021f531600
>[    2.646249] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88021f531600
>[    2.646250] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8802243d6ca0 to [NOCRTC]
>[    2.646250] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8802243d6ca0 to [CRTC:21]
>[    2.646251] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88021f586400 state to ffff88021f531600
>[    2.646251] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8802243cfe40 state to ffff88021f531600
>[    2.646252] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88021f586400
>[    2.646252] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8802243cfe40 to [NOCRTC]
>[    2.646252] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8802243cfe40
>[    2.646253] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88021f531600
>[    2.646253] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff88021f531600
>[    2.646254] [drm:drm_atomic_connectors_for_crtc] State ffff88021f531600 has 1 connectors for [CRTC:21]
>[    2.646255] [drm:drm_atomic_get_crtc_state] Added [CRTC:29] ffff88021f586800 state to ffff88021f531600
>[    2.646255] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff8802243cf000 state to ffff88021f531600
>[    2.646255] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88021f586800
>[    2.646256] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8802243cf000 to [NOCRTC]
>[    2.646256] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8802243cf000
>[    2.646257] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88021f531600
>[    2.646257] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff88021f531600
>[    2.646258] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:29] to ffff88021f531600
>[    2.646258] [drm:drm_atomic_connectors_for_crtc] State ffff88021f531600 has 1 connectors for [CRTC:21]
>[    2.646259] [drm:drm_atomic_connectors_for_crtc] State ffff88021f531600 has 0 connectors for [CRTC:25]
>[    2.646259] [drm:drm_atomic_check_only] checking ffff88021f531600
>[    2.646259] [drm:update_connector_routing] Updating routing for [CONNECTOR:32:eDP-1]
>[    2.646260] [drm:update_connector_routing] [CONNECTOR:32:eDP-1] keeps [ENCODER:31:TMDS-31], now on [CRTC:21]
>[    2.646261] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 54
>[    2.646261] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 0, on 0, ms 0
>[    2.646262] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8802243cf780 state to ffff88021f531600
>[    2.646263] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8802243cf0c0 state to ffff88021f531600
>[    2.646264] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021f4a2b40 state to ffff88021f531600
>[    2.646264] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021f4a2cc0 state to ffff88021f531600
>[    2.646265] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff88021f4a29c0 state to ffff88021f531600
>[    2.646266] [drm:drm_atomic_get_plane_state] Added [PLANE:30] ffff88021f4a2d80 state to ffff88021f531600
>[    2.646267] [drm:drm_atomic_commit] commiting ffff88021f531600
>[    2.646273] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021f531600
>[    2.646274] [drm:drm_atomic_state_free] Freeing atomic state ffff88021f531600
>[    2.652831] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device
>[    2.653019] usb 2-3.1.3: reset SuperSpeed USB device number 5 using xhci_hcd
>[    2.653048] [drm:i915_gem_open] 
>[    2.653098] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fa16800
>[    2.653101] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021db8fa80 state to ffff88021fa16800
>[    2.653104] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e5bf800 state to ffff88021fa16800
>[    2.653105] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021db8fc00 state to ffff88021fa16800
>[    2.653107] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021db8fc00 to [NOCRTC]
>[    2.653108] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88021db8fc00
>[    2.653111] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021db8fcc0 state to ffff88021fa16800
>[    2.653112] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021db8fcc0 to [NOCRTC]
>[    2.653113] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88021db8fcc0
>[    2.653115] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021db8fd80 state to ffff88021fa16800
>[    2.653117] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021db8fe40 state to ffff88021fa16800
>[    2.653118] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021db8fe40 to [NOCRTC]
>[    2.653119] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88021db8fe40
>[    2.653121] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021db8ff00 state to ffff88021fa16800
>[    2.653122] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021db8ff00 to [NOCRTC]
>[    2.653123] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88021db8ff00
>[    2.653125] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff88021db8f180 state to ffff88021fa16800
>[    2.653127] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff88021db8f0c0 state to ffff88021fa16800
>[    2.653128] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021db8f0c0 to [NOCRTC]
>[    2.653129] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88021db8f0c0
>[    2.653131] [drm:drm_atomic_get_plane_state] Added [PLANE:30] ffff88021db8f000 state to ffff88021fa16800
>[    2.653132] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021db8f000 to [NOCRTC]
>[    2.653134] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88021db8f000
>[    2.653136] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:2560x1440] for CRTC state ffff88021e5bf800
>[    2.653138] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021db8fa80 to [CRTC:21]
>[    2.653139] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88021db8fa80
>[    2.653141] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:32] ffff88021e7a8f80 state to ffff88021fa16800
>[    2.653143] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88021fa16800
>[    2.653145] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88021e7a8f80 to [NOCRTC]
>[    2.653147] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88021e7a8f80 to [CRTC:21]
>[    2.653149] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88021e5bf000 state to ffff88021fa16800
>[    2.653150] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88021e5bf000
>[    2.653151] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021db8fd80 to [NOCRTC]
>[    2.653152] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88021db8fd80
>[    2.653154] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88021fa16800
>[    2.653155] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff88021fa16800
>[    2.653157] [drm:drm_atomic_connectors_for_crtc] State ffff88021fa16800 has 1 connectors for [CRTC:21]
>[    2.653159] [drm:drm_atomic_get_crtc_state] Added [CRTC:29] ffff88021e5b9800 state to ffff88021fa16800
>[    2.653161] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88021e5b9800
>[    2.653162] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021db8f180 to [NOCRTC]
>[    2.653163] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88021db8f180
>[    2.653165] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88021fa16800
>[    2.653166] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff88021fa16800
>[    2.653168] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:29] to ffff88021fa16800
>[    2.653169] [drm:drm_atomic_connectors_for_crtc] State ffff88021fa16800 has 1 connectors for [CRTC:21]
>[    2.653170] [drm:drm_atomic_connectors_for_crtc] State ffff88021fa16800 has 0 connectors for [CRTC:25]
>[    2.653172] [drm:drm_atomic_check_only] checking ffff88021fa16800
>[    2.653175] [drm:update_connector_routing] Updating routing for [CONNECTOR:32:eDP-1]
>[    2.653177] [drm:update_connector_routing] [CONNECTOR:32:eDP-1] keeps [ENCODER:31:TMDS-31], now on [CRTC:21]
>[    2.653180] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 54
>[    2.653181] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 0, on 0, ms 0
>[    2.653186] [drm:drm_atomic_commit] commiting ffff88021fa16800
>[    2.653200] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fa16800
>[    2.653203] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fa16800
>[    2.653214] [drm:i915_gem_open] 
>[    2.653261] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[    2.653265] [drm:drm_mode_getresources] [CRTC:21]
>[    2.653266] [drm:drm_mode_getresources] [CRTC:25]
>[    2.653267] [drm:drm_mode_getresources] [CRTC:29]
>[    2.653268] [drm:drm_mode_getresources] [ENCODER:31:TMDS-31]
>[    2.653270] [drm:drm_mode_getresources] [ENCODER:39:TMDS-39]
>[    2.653271] [drm:drm_mode_getresources] [ENCODER:41:DP MST-41]
>[    2.653272] [drm:drm_mode_getresources] [ENCODER:42:DP MST-42]
>[    2.653274] [drm:drm_mode_getresources] [ENCODER:43:DP MST-43]
>[    2.653275] [drm:drm_mode_getresources] [ENCODER:46:TMDS-46]
>[    2.653277] [drm:drm_mode_getresources] [ENCODER:48:DP MST-48]
>[    2.653278] [drm:drm_mode_getresources] [ENCODER:49:DP MST-49]
>[    2.653279] [drm:drm_mode_getresources] [ENCODER:50:DP MST-50]
>[    2.653280] [drm:drm_mode_getresources] [CONNECTOR:32:eDP-1]
>[    2.653282] [drm:drm_mode_getresources] [CONNECTOR:40:DP-1]
>[    2.653283] [drm:drm_mode_getresources] [CONNECTOR:44:HDMI-A-1]
>[    2.653284] [drm:drm_mode_getresources] [CONNECTOR:47:DP-2]
>[    2.653286] [drm:drm_mode_getresources] [CONNECTOR:51:HDMI-A-2]
>[    2.653287] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[    2.653291] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[    2.653292] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1]
>[    2.653294] [drm:intel_dp_detect] [CONNECTOR:32:eDP-1]
>[    2.653608] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[    2.653915] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[    2.654356] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    2.654358] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1] probed modes :
>[    2.654360] [drm:drm_mode_debug_printmodeline] Modeline 33:"2560x1440" 60 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x48 0x9
>[    2.654363] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[    2.664813] [drm:drm_mode_getconnector] [CONNECTOR:40:?]
>[    2.664816] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1]
>[    2.664817] [drm:intel_dp_detect] [CONNECTOR:40:DP-1]
>[    2.664823] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1] disconnected
>[    2.664825] [drm:drm_mode_getconnector] [CONNECTOR:40:?]
>[    2.664827] [drm:drm_mode_getconnector] [CONNECTOR:44:?]
>[    2.664829] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1]
>[    2.664830] [drm:intel_hdmi_detect] [CONNECTOR:44:HDMI-A-1]
>[    2.684849] [drm:intel_hdmi_detect] Live status not up!
>[    2.684853] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1] disconnected
>[    2.684860] [drm:drm_mode_getconnector] [CONNECTOR:44:?]
>[    2.684864] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[    2.684865] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2]
>[    2.684866] [drm:intel_dp_detect] [CONNECTOR:47:DP-2]
>[    2.684869] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2] disconnected
>[    2.684870] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[    2.684872] [drm:drm_mode_getconnector] [CONNECTOR:51:?]
>[    2.684873] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2]
>[    2.684874] [drm:intel_hdmi_detect] [CONNECTOR:51:HDMI-A-2]
>[    2.686587] r8152 2-3.1.3:1.0 eth0: v1.08.2
>[    2.686994] r8152 2-3.1.3:1.0 enp0s20u3u1u3: renamed from eth0
>[    2.692995] usb 1-8: New USB device found, idVendor=04f2, idProduct=b45d
>[    2.692998] usb 1-8: New USB device strings: Mfr=3, Product=1, SerialNumber=2
>[    2.693000] usb 1-8: Product: Integrated Camera
>[    2.693001] usb 1-8: Manufacturer: Chicony Electronics Co.,Ltd.
>[    2.693003] usb 1-8: SerialNumber: 0x0001
>[    2.704891] [drm:intel_hdmi_detect] Live status not up!
>[    2.704894] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2] disconnected
>[    2.704899] [drm:drm_mode_getconnector] [CONNECTOR:51:?]
>[    2.704916] [drm:drm_mode_addfb2] [FB:52]
>[    2.710140] [drm:drm_mode_addfb2] [FB:52]
>[    2.710156] [drm:drm_mode_setcrtc] [CRTC:21]
>[    2.710159] [drm:drm_mode_setcrtc] [CONNECTOR:32:eDP-1]
>[    2.710163] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fa16a00
>[    2.710165] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e5b9400 state to ffff88021fa16a00
>[    2.710166] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021db8f840 state to ffff88021fa16a00
>[    2.710168] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:2560x1440] for CRTC state ffff88021e5b9400
>[    2.710169] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021db8f840 to [CRTC:21]
>[    2.710170] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88021db8f840
>[    2.710171] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:32] ffff88021e7a8ec0 state to ffff88021fa16a00
>[    2.710172] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88021fa16a00
>[    2.710173] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88021e7a8ec0 to [NOCRTC]
>[    2.710174] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88021e7a8ec0 to [CRTC:21]
>[    2.710175] [drm:drm_atomic_check_only] checking ffff88021fa16a00
>[    2.710177] [drm:update_connector_routing] Updating routing for [CONNECTOR:32:eDP-1]
>[    2.710178] [drm:update_connector_routing] [CONNECTOR:32:eDP-1] keeps [ENCODER:31:TMDS-31], now on [CRTC:21]
>[    2.710181] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 52
>[    2.710182] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 0, on 0, ms 0
>[    2.710183] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021db8f6c0 state to ffff88021fa16a00
>[    2.710184] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021db8f600 state to ffff88021fa16a00
>[    2.710187] [drm:drm_atomic_commit] commiting ffff88021fa16a00
>[    2.711597] [drm:intel_print_rc6_info] Enabling RC6 states: RC6 on
>[    2.719785] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fa16a00
>[    2.719790] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fa16a00
>[    2.723140] [drm:drm_mode_setcrtc] [CRTC:21]
>[    2.723144] [drm:drm_mode_setcrtc] [CONNECTOR:32:eDP-1]
>[    2.723146] [drm:drm_atomic_state_init] Allocated atomic state ffff88021f532800
>[    2.723148] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021f584400 state to ffff88021f532800
>[    2.723150] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800354a7900 state to ffff88021f532800
>[    2.723151] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:2560x1440] for CRTC state ffff88021f584400
>[    2.723152] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800354a7900 to [CRTC:21]
>[    2.723153] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800354a7900
>[    2.723154] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:32] ffff8802243d68a0 state to ffff88021f532800
>[    2.723155] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88021f532800
>[    2.723157] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8802243d68a0 to [NOCRTC]
>[    2.723158] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8802243d68a0 to [CRTC:21]
>[    2.723159] [drm:drm_atomic_check_only] checking ffff88021f532800
>[    2.723160] [drm:update_connector_routing] Updating routing for [CONNECTOR:32:eDP-1]
>[    2.723162] [drm:update_connector_routing] [CONNECTOR:32:eDP-1] keeps [ENCODER:31:TMDS-31], now on [CRTC:21]
>[    2.723164] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 52
>[    2.723165] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 0, on 0, ms 0
>[    2.723167] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800354a7e40 state to ffff88021f532800
>[    2.723168] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800354a7300 state to ffff88021f532800
>[    2.723170] [drm:drm_atomic_commit] commiting ffff88021f532800
>[    2.723183] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021f532800
>[    2.723185] [drm:drm_atomic_state_free] Freeing atomic state ffff88021f532800
>[    2.741575] usb 1-3.2.1: new high-speed USB device number 9 using xhci_hcd
>[    2.825880] usb 1-3.2.1: New USB device found, idVendor=1a40, idProduct=0101
>[    2.825883] usb 1-3.2.1: New USB device strings: Mfr=0, Product=1, SerialNumber=0
>[    2.825884] usb 1-3.2.1: Product: USB 2.0 Hub
>[    2.826432] hub 1-3.2.1:1.0: USB hub found
>[    2.826488] hub 1-3.2.1:1.0: 4 ports detected
>[    2.899660] usb 1-3.2.2: new full-speed USB device number 10 using xhci_hcd
>[    2.987021] usb 1-3.2.2: New USB device found, idVendor=1532, idProduct=011c
>[    2.987024] usb 1-3.2.2: New USB device strings: Mfr=1, Product=2, SerialNumber=0
>[    2.987026] usb 1-3.2.2: Product: Razer BlackWidow Tournament Edition
>[    2.987027] usb 1-3.2.2: Manufacturer: Razer
>[    2.989020] input: Razer Razer BlackWidow Tournament Edition as /devices/pci0000:00/0000:00:14.0/usb1/1-3/1-3.2/1-3.2.2/1-3.2.2:1.0/0003:1532:011C.0002/input/input9
>[    3.039916] hid-generic 0003:1532:011C.0002: input,hidraw1: USB HID v1.11 Keyboard [Razer Razer BlackWidow Tournament Edition] on usb-0000:00:14.0-3.2.2/input0
>[    3.042779] input: Razer Razer BlackWidow Tournament Edition as /devices/pci0000:00/0000:00:14.0/usb1/1-3/1-3.2/1-3.2.2/1-3.2.2:1.1/0003:1532:011C.0003/input/input10
>[    3.093967] hid-generic 0003:1532:011C.0003: input,hidraw2: USB HID v1.11 Keyboard [Razer Razer BlackWidow Tournament Edition] on usb-0000:00:14.0-3.2.2/input1
>[    3.096613] input: Razer Razer BlackWidow Tournament Edition as /devices/pci0000:00/0000:00:14.0/usb1/1-3/1-3.2/1-3.2.2/1-3.2.2:1.2/0003:1532:011C.0004/input/input11
>[    3.096706] hid-generic 0003:1532:011C.0004: input,hidraw3: USB HID v1.11 Mouse [Razer Razer BlackWidow Tournament Edition] on usb-0000:00:14.0-3.2.2/input2
>[    3.166369] EXT4-fs (sda7): mounted filesystem with ordered data mode. Opts: (null)
>[    3.357179] systemd-journald[161]: Received SIGTERM from PID 1 (systemd).
>[    3.388779] SELinux:  Disabled at runtime.
>[    3.388796] SELinux:  Unregistering netfilter hooks
>[    3.405583] systemd[1]: RTC configured in localtime, applying delta of 660 minutes to system time.
>[    3.466805] random: nonblocking pool is initialized
>[    3.476617] EXT4-fs (sda7): re-mounted. Opts: (null)
>[    3.517969] systemd-journald[429]: Received request to flush runtime journal from PID 1
>[    3.553779] RPC: Registered named UNIX socket transport module.
>[    3.553781] RPC: Registered udp transport module.
>[    3.553781] RPC: Registered tcp transport module.
>[    3.553782] RPC: Registered tcp NFSv4.1 backchannel transport module.
>[    3.656123] tpm_tis 00:05: 1.2 TPM (device-id 0x0, rev-id 78)
>[    3.704167] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=852/852
>[    3.704170] [drm:intel_panel_actually_set_backlight] set backlight PWM = 852
>[    3.713604] Installing knfsd (copyright (C) 1996 okir@monad.swb.de).
>[    3.714519] wmi: Mapper loaded
>[    3.714652] thinkpad_acpi: ThinkPad ACPI Extras v0.25
>[    3.714654] thinkpad_acpi: http://ibm-acpi.sf.net/
>[    3.714655] thinkpad_acpi: ThinkPad BIOS N14ET32W (1.10 ), EC unknown
>[    3.714656] thinkpad_acpi: Lenovo ThinkPad X1 Carbon 3rd, model 20BTCTO1WW
>[    3.715361] thinkpad_acpi: Unsupported brightness interface, please contact ibm-acpi-devel@lists.sourceforge.net
>[    3.715389] thinkpad_acpi: radio switch found; radios are enabled
>[    3.715402] thinkpad_acpi: This ThinkPad has standard ACPI backlight brightness control, supported by the ACPI video driver
>[    3.715403] thinkpad_acpi: Disabling thinkpad-acpi brightness events by default...
>[    3.717259] thinkpad_acpi: rfkill switch tpacpi_bluetooth_sw: radio is unblocked
>[    3.740654] input: ThinkPad Extra Buttons as /devices/platform/thinkpad_acpi/input/input12
>[    3.835108] media: Linux media interface: v0.10
>[    3.835457] shpchp: Standard Hot Plug PCI Controller Driver version: 0.4
>[    3.837186] Bluetooth: Core ver 2.20
>[    3.837251] NET: Registered protocol family 31
>[    3.837253] Bluetooth: HCI device and connection manager initialized
>[    3.837257] Bluetooth: HCI socket layer initialized
>[    3.837260] Bluetooth: L2CAP socket layer initialized
>[    3.837269] Bluetooth: SCO socket layer initialized
>[    3.890396] Linux video capture interface: v2.00
>[    3.911069] snd_hda_intel 0000:00:03.0: bound 0000:00:02.0 (ops i915_audio_component_bind_ops [i915])
>[    3.914868] [drm:intel_power_well_enable] enabling display
>[    3.914872] [drm:hsw_set_power_well] Enabling power well
>[    3.919736] i801_smbus 0000:00:1f.3: SMBus using PCI interrupt
>[    3.939539] snd_hda_codec_realtek hdaudioC1D0: autoconfig for ALC3232: line_outs=1 (0x14/0x0/0x0/0x0/0x0) type:speaker
>[    3.939542] snd_hda_codec_realtek hdaudioC1D0:    speaker_outs=0 (0x0/0x0/0x0/0x0/0x0)
>[    3.939545] snd_hda_codec_realtek hdaudioC1D0:    hp_outs=1 (0x15/0x0/0x0/0x0/0x0)
>[    3.939546] snd_hda_codec_realtek hdaudioC1D0:    mono: mono_out=0x0
>[    3.939548] snd_hda_codec_realtek hdaudioC1D0:    inputs:
>[    3.939550] snd_hda_codec_realtek hdaudioC1D0:      Mic=0x1a
>[    3.939552] snd_hda_codec_realtek hdaudioC1D0:      Internal Mic=0x12
>[    3.961367] input: HDA Intel PCH Mic as /devices/pci0000:00/0000:00:1b.0/sound/card1/input13
>[    3.961429] input: HDA Intel PCH Headphone as /devices/pci0000:00/0000:00:1b.0/sound/card1/input14
>[    3.974865] usbcore: registered new interface driver btusb
>[    3.978281] input: HDA Intel HDMI HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:03.0/sound/card0/input15
>[    3.978346] input: HDA Intel HDMI HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:03.0/sound/card0/input16
>[    3.978412] input: HDA Intel HDMI HDMI/DP,pcm=8 as /devices/pci0000:00/0000:00:03.0/sound/card0/input17
>[    3.982694] input: PC Speaker as /devices/platform/pcspkr/input/input18
>[    3.988078] usbcore: registered new interface driver snd-usb-audio
>[    3.990658] Bluetooth: hci0: read Intel version: 370810011003110e0f
>[    3.990661] Bluetooth: hci0: Intel device is already patched. patch num: 0f
>[    3.995902] Adding 7999484k swap on /dev/sda5.  Priority:-1 extents:1 across:7999484k SSFS
>[    4.003627] uvcvideo: Found UVC 1.00 device Integrated Camera (04f2:b45d)
>[    4.004795] input: Integrated Camera as /devices/pci0000:00/0000:00:14.0/usb1/1-8/1-8:1.0/input/input19
>[    4.004860] usbcore: registered new interface driver uvcvideo
>[    4.004861] USB Video Class driver (1.1.1)
>[    4.076302] EXT4-fs (sda6): mounted filesystem with ordered data mode. Opts: (null)
>[    4.239982] Intel(R) Wireless WiFi driver for Linux
>[    4.239984] Copyright(c) 2003- 2015 Intel Corporation
>[    4.244965] iTCO_vendor_support: vendor-support=0
>[    4.249258] iwlwifi 0000:04:00.0: Direct firmware load for iwlwifi-7265D-17.ucode failed with error -2
>[    4.249368] iwlwifi 0000:04:00.0: Direct firmware load for iwlwifi-7265D-16.ucode failed with error -2
>[    4.249383] iwlwifi 0000:04:00.0: Direct firmware load for iwlwifi-7265D-15.ucode failed with error -2
>[    4.249396] iwlwifi 0000:04:00.0: Direct firmware load for iwlwifi-7265D-14.ucode failed with error -2
>[    4.251853] iwlwifi 0000:04:00.0: loaded firmware version 25.30.13.0 op_mode iwlmvm
>[    4.253587] iTCO_wdt: Intel TCO WatchDog Timer Driver v1.11
>[    4.253622] iTCO_wdt: Found a Wildcat Point_LP TCO device (Version=2, TCOBASE=0x1860)
>[    4.257478] iTCO_wdt: initialized. heartbeat=30 sec (nowayout=0)
>[    4.274432] cfg80211: World regulatory domain updated:
>[    4.274435] cfg80211:  DFS Master region: unset
>[    4.274436] cfg80211:   (start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp), (dfs_cac_time)
>[    4.274438] cfg80211:   (2402000 KHz - 2472000 KHz @ 40000 KHz), (N/A, 2000 mBm), (N/A)
>[    4.274440] cfg80211:   (2457000 KHz - 2482000 KHz @ 40000 KHz), (N/A, 2000 mBm), (N/A)
>[    4.274442] cfg80211:   (2474000 KHz - 2494000 KHz @ 20000 KHz), (N/A, 2000 mBm), (N/A)
>[    4.274444] cfg80211:   (5170000 KHz - 5250000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A, 2000 mBm), (N/A)
>[    4.274446] cfg80211:   (5250000 KHz - 5330000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A, 2000 mBm), (0 s)
>[    4.274447] cfg80211:   (5490000 KHz - 5730000 KHz @ 160000 KHz), (N/A, 2000 mBm), (0 s)
>[    4.274449] cfg80211:   (5735000 KHz - 5835000 KHz @ 80000 KHz), (N/A, 2000 mBm), (N/A)
>[    4.274450] cfg80211:   (57240000 KHz - 63720000 KHz @ 2160000 KHz), (N/A, 0 mBm), (N/A)
>[    4.402769] intel_rapl: Found RAPL domain package
>[    4.402772] intel_rapl: Found RAPL domain core
>[    4.402774] intel_rapl: Found RAPL domain uncore
>[    4.402776] intel_rapl: Found RAPL domain dram
>[    4.476272] iwlwifi 0000:04:00.0: Detected Intel(R) Dual Band Wireless AC 7265, REV=0x210
>[    4.477020] iwlwifi 0000:04:00.0: L1 Enabled - LTR Enabled
>[    4.477464] iwlwifi 0000:04:00.0: L1 Enabled - LTR Enabled
>[    4.552593] ieee80211 phy0: Selected rate control algorithm 'iwl-mvm-rs'
>[    4.554331] iwlwifi 0000:04:00.0 wlp4s0: renamed from wlan0
>[    5.380977] Bluetooth: BNEP (Ethernet Emulation) ver 1.3
>[    5.380980] Bluetooth: BNEP filters: protocol multicast
>[    5.380984] Bluetooth: BNEP socket layer initialized
>[    5.622238] nf_conntrack version 0.5.0 (65536 buckets, 262144 max)
>[    5.665315] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[    5.665322] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[    5.667902] ip6_tables: (C) 2000-2006 Netfilter Core Team
>[    5.727088] Ebtables v2.0 registered
>[    5.774623] bridge: automatic filtering via arp/ip/ip6tables has been deprecated. Update your scripts to load br_netfilter if you need this.
>[    5.905862] IPv6: ADDRCONF(NETDEV_UP): enp0s25: link is not ready
>[    6.092403] psmouse serio2: trackpoint: IBM TrackPoint firmware: 0x0e, buttons: 3/3
>[    6.196964] IPv6: ADDRCONF(NETDEV_UP): enp0s25: link is not ready
>[    6.198518] IPv6: ADDRCONF(NETDEV_UP): wlp4s0: link is not ready
>[    6.199045] iwlwifi 0000:04:00.0: L1 Enabled - LTR Enabled
>[    6.199491] iwlwifi 0000:04:00.0: L1 Enabled - LTR Enabled
>[    6.268421] iwlwifi 0000:04:00.0: L1 Enabled - LTR Enabled
>[    6.268877] iwlwifi 0000:04:00.0: L1 Enabled - LTR Enabled
>[    6.288536] input: TPPS/2 IBM TrackPoint as /devices/platform/i8042/serio1/serio2/input/input7
>[    6.307278] IPv6: ADDRCONF(NETDEV_UP): wlp4s0: link is not ready
>[    6.309038] IPv6: ADDRCONF(NETDEV_UP): enp0s20u3u1u3: link is not ready
>[    6.354882] IPv6: ADDRCONF(NETDEV_UP): enp0s20u3u1u3: link is not ready
>[    6.401971] IPv6: ADDRCONF(NETDEV_UP): wlp4s0: link is not ready
>[    6.518785] [drm:i915_gem_open] 
>[    6.518841] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[    6.532370] [drm:i915_gem_open] 
>[    6.549041] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[    6.550015] [drm:i915_gem_open] 
>[    6.550046] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[    6.550049] [drm:drm_mode_getresources] [CRTC:21]
>[    6.550050] [drm:drm_mode_getresources] [CRTC:25]
>[    6.550052] [drm:drm_mode_getresources] [CRTC:29]
>[    6.550053] [drm:drm_mode_getresources] [ENCODER:31:TMDS-31]
>[    6.550055] [drm:drm_mode_getresources] [ENCODER:39:TMDS-39]
>[    6.550056] [drm:drm_mode_getresources] [ENCODER:41:DP MST-41]
>[    6.550057] [drm:drm_mode_getresources] [ENCODER:42:DP MST-42]
>[    6.550059] [drm:drm_mode_getresources] [ENCODER:43:DP MST-43]
>[    6.550060] [drm:drm_mode_getresources] [ENCODER:46:TMDS-46]
>[    6.550061] [drm:drm_mode_getresources] [ENCODER:48:DP MST-48]
>[    6.550063] [drm:drm_mode_getresources] [ENCODER:49:DP MST-49]
>[    6.550064] [drm:drm_mode_getresources] [ENCODER:50:DP MST-50]
>[    6.550065] [drm:drm_mode_getresources] [CONNECTOR:32:eDP-1]
>[    6.550067] [drm:drm_mode_getresources] [CONNECTOR:40:DP-1]
>[    6.550068] [drm:drm_mode_getresources] [CONNECTOR:44:HDMI-A-1]
>[    6.550069] [drm:drm_mode_getresources] [CONNECTOR:47:DP-2]
>[    6.550071] [drm:drm_mode_getresources] [CONNECTOR:51:HDMI-A-2]
>[    6.550072] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[    6.550845] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[    6.550864] [drm:drm_mode_addfb2] [FB:53]
>[    6.551079] [drm:internal_framebuffer_create] could not create framebuffer
>[    6.551085] [drm:internal_framebuffer_create] could not create framebuffer
>[    6.551121] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[    6.551123] [drm:drm_mode_getresources] [CRTC:21]
>[    6.551124] [drm:drm_mode_getresources] [CRTC:25]
>[    6.551125] [drm:drm_mode_getresources] [CRTC:29]
>[    6.551127] [drm:drm_mode_getresources] [ENCODER:31:TMDS-31]
>[    6.551128] [drm:drm_mode_getresources] [ENCODER:39:TMDS-39]
>[    6.551130] [drm:drm_mode_getresources] [ENCODER:41:DP MST-41]
>[    6.551131] [drm:drm_mode_getresources] [ENCODER:42:DP MST-42]
>[    6.551132] [drm:drm_mode_getresources] [ENCODER:43:DP MST-43]
>[    6.551134] [drm:drm_mode_getresources] [ENCODER:46:TMDS-46]
>[    6.551135] [drm:drm_mode_getresources] [ENCODER:48:DP MST-48]
>[    6.551136] [drm:drm_mode_getresources] [ENCODER:49:DP MST-49]
>[    6.551138] [drm:drm_mode_getresources] [ENCODER:50:DP MST-50]
>[    6.551139] [drm:drm_mode_getresources] [CONNECTOR:32:eDP-1]
>[    6.551140] [drm:drm_mode_getresources] [CONNECTOR:40:DP-1]
>[    6.551142] [drm:drm_mode_getresources] [CONNECTOR:44:HDMI-A-1]
>[    6.551143] [drm:drm_mode_getresources] [CONNECTOR:47:DP-2]
>[    6.551144] [drm:drm_mode_getresources] [CONNECTOR:51:HDMI-A-2]
>[    6.551146] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[    6.551227] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[    6.551266] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[    6.571935] [drm:drm_mode_getconnector] [CONNECTOR:40:?]
>[    6.571947] [drm:drm_mode_getconnector] [CONNECTOR:40:?]
>[    6.571991] [drm:drm_mode_getconnector] [CONNECTOR:44:?]
>[    6.571995] [drm:drm_mode_getconnector] [CONNECTOR:44:?]
>[    6.572034] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[    6.572038] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[    6.572069] [drm:drm_mode_getconnector] [CONNECTOR:51:?]
>[    6.572073] [drm:drm_mode_getconnector] [CONNECTOR:51:?]
>[    6.629491] [drm:drm_mode_addfb2] [FB:53]
>[    6.769890] [drm:drm_mode_setcrtc] [CRTC:21]
>[    6.769894] [drm:drm_mode_setcrtc] [CONNECTOR:32:eDP-1]
>[    6.769897] [drm:drm_atomic_state_init] Allocated atomic state ffff88021e18ac00
>[    6.769899] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3a8400 state to ffff88021e18ac00
>[    6.769901] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8802233429c0 state to ffff88021e18ac00
>[    6.769903] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:2560x1440] for CRTC state ffff88021e3a8400
>[    6.769904] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8802233429c0 to [CRTC:21]
>[    6.769905] [drm:drm_atomic_set_fb_for_plane] Set [FB:53] for plane state ffff8802233429c0
>[    6.769906] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:32] ffff8800b8090b60 state to ffff88021e18ac00
>[    6.769907] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88021e18ac00
>[    6.769909] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8800b8090b60 to [NOCRTC]
>[    6.769910] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8800b8090b60 to [CRTC:21]
>[    6.769911] [drm:drm_atomic_check_only] checking ffff88021e18ac00
>[    6.769913] [drm:update_connector_routing] Updating routing for [CONNECTOR:32:eDP-1]
>[    6.769914] [drm:update_connector_routing] [CONNECTOR:32:eDP-1] keeps [ENCODER:31:TMDS-31], now on [CRTC:21]
>[    6.769917] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 53
>[    6.769918] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 0, on 0, ms 0
>[    6.769920] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223342d80 state to ffff88021e18ac00
>[    6.769921] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8802233426c0 state to ffff88021e18ac00
>[    6.769924] [drm:drm_atomic_commit] commiting ffff88021e18ac00
>[    6.788625] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021e18ac00
>[    6.788629] [drm:drm_atomic_state_free] Freeing atomic state ffff88021e18ac00
>[    6.874175] [drm:i915_gem_open] 
>[    6.877423] fuse init (API version 7.23)
>[    6.917912] [drm:i915_gem_open] 
>[    6.949775] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[    6.950706] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[    7.205009] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[    7.205013] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1]
>[    7.205015] [drm:intel_dp_detect] [CONNECTOR:32:eDP-1]
>[    7.205021] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[    7.205027] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[    7.205342] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[    7.205794] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[    7.206236] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    7.206239] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1] probed modes :
>[    7.206242] [drm:drm_mode_debug_printmodeline] Modeline 33:"2560x1440" 60 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x48 0x9
>[    7.206254] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[    7.206418] [drm:drm_mode_getconnector] [CONNECTOR:40:?]
>[    7.206420] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1]
>[    7.206421] [drm:intel_dp_detect] [CONNECTOR:40:DP-1]
>[    7.206425] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1] disconnected
>[    7.206430] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[    7.206432] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2]
>[    7.206433] [drm:intel_dp_detect] [CONNECTOR:47:DP-2]
>[    7.206435] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2] disconnected
>[    7.206438] [drm:drm_mode_getconnector] [CONNECTOR:44:?]
>[    7.206440] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1]
>[    7.206441] [drm:intel_hdmi_detect] [CONNECTOR:44:HDMI-A-1]
>[    7.226460] [drm:intel_hdmi_detect] Live status not up!
>[    7.226465] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1] disconnected
>[    7.226492] [drm:drm_mode_getconnector] [CONNECTOR:51:?]
>[    7.226494] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2]
>[    7.226495] [drm:intel_hdmi_detect] [CONNECTOR:51:HDMI-A-2]
>[    7.234340] [drm:i915_audio_component_sync_audio_rate] no pipe for the port B
>[    7.236378] [drm:i915_audio_component_sync_audio_rate] no pipe for the port B
>[    7.237707] [drm:i915_audio_component_sync_audio_rate] no pipe for the port B
>[    7.239374] [drm:i915_audio_component_sync_audio_rate] no pipe for the port B
>[    7.240542] [drm:i915_audio_component_sync_audio_rate] no pipe for the port B
>[    7.242378] [drm:i915_audio_component_sync_audio_rate] no pipe for the port B
>[    7.243551] [drm:i915_audio_component_sync_audio_rate] no pipe for the port C
>[    7.245379] [drm:i915_audio_component_sync_audio_rate] no pipe for the port C
>[    7.246511] [drm:intel_hdmi_detect] Live status not up!
>[    7.246515] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2] disconnected
>[    7.246614] [drm:i915_audio_component_sync_audio_rate] no pipe for the port C
>[    7.247134] [drm:i915_gem_open] 
>[    7.248384] [drm:i915_audio_component_sync_audio_rate] no pipe for the port C
>[    7.249488] [drm:i915_audio_component_sync_audio_rate] no pipe for the port C
>[    7.251384] [drm:i915_audio_component_sync_audio_rate] no pipe for the port C
>[    7.252428] [drm:i915_audio_component_sync_audio_rate] no pipe for the port D
>[    7.254391] [drm:i915_audio_component_sync_audio_rate] no pipe for the port D
>[    7.255598] [drm:i915_audio_component_sync_audio_rate] no pipe for the port D
>[    7.257394] [drm:i915_audio_component_sync_audio_rate] no pipe for the port D
>[    7.258452] [drm:i915_audio_component_sync_audio_rate] no pipe for the port D
>[    7.260389] [drm:i915_audio_component_sync_audio_rate] no pipe for the port D
>[    7.264373] [drm:i915_audio_component_sync_audio_rate] no pipe for the port B
>[    7.266394] [drm:i915_audio_component_sync_audio_rate] no pipe for the port B
>[    7.272818] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[    7.273332] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[    7.274851] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[    7.458213] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae200
>[    7.458218] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096ca80 state to ffff8800b91ae200
>[    7.458221] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c4400 state to ffff8800b91ae200
>[    7.458223] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096ca80 to [CRTC:21]
>[    7.458225] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88022096ca80
>[    7.458227] [drm:drm_atomic_check_only] checking ffff8800b91ae200
>[    7.458233] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 55
>[    7.458235] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[    7.458238] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096c9c0 state to ffff8800b91ae200
>[    7.458240] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096c900 state to ffff8800b91ae200
>[    7.458244] [drm:drm_atomic_commit] commiting ffff8800b91ae200
>[    7.458278] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae200
>[    7.458280] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae200
>[    8.249689] [drm:drm_atomic_state_init] Allocated atomic state ffff880222fdea00
>[    8.249694] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021f598cc0 state to ffff880222fdea00
>[    8.249697] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3a6c00 state to ffff880222fdea00
>[    8.249699] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021f598cc0 to [CRTC:21]
>[    8.249700] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021f598cc0
>[    8.249702] [drm:drm_atomic_check_only] checking ffff880222fdea00
>[    8.249707] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 55
>[    8.249708] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[    8.249711] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021f5986c0 state to ffff880222fdea00
>[    8.249713] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021f598180 state to ffff880222fdea00
>[    8.249718] [drm:drm_atomic_commit] commiting ffff880222fdea00
>[    8.249736] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222fdea00
>[    8.249738] [drm:drm_atomic_state_free] Freeing atomic state ffff880222fdea00
>[    8.335565] [drm:drm_mode_addfb2] [FB:57]
>[    8.409393] [drm:drm_atomic_state_init] Allocated atomic state ffff880222fdca00
>[    8.409398] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e1fba80 state to ffff880222fdca00
>[    8.409400] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3a2400 state to ffff880222fdca00
>[    8.409402] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e1fba80 to [CRTC:21]
>[    8.409403] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e1fba80
>[    8.409405] [drm:drm_atomic_check_only] checking ffff880222fdca00
>[    8.409409] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 55
>[    8.409411] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[    8.409414] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800352e29c0 state to ffff880222fdca00
>[    8.409416] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800352e2f00 state to ffff880222fdca00
>[    8.409420] [drm:drm_atomic_commit] commiting ffff880222fdca00
>[    8.409440] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222fdca00
>[    8.409443] [drm:drm_atomic_state_free] Freeing atomic state ffff880222fdca00
>[    9.610995] IPv6: ADDRCONF(NETDEV_CHANGE): enp0s20u3u1u3: link becomes ready
>[   10.212129] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[   10.212137] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[   10.321326] nf_conntrack: automatic helper assignment is deprecated and it will be removed soon. Use the iptables CT target to attach helpers instead.
>[   15.231588] tun: Universal TUN/TAP device driver, 1.6
>[   15.231591] tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com>
>[   15.258357] device virbr0-nic entered promiscuous mode
>[   15.367197] virbr0: port 1(virbr0-nic) entered listening state
>[   15.367214] virbr0: port 1(virbr0-nic) entered listening state
>[   15.377789] virbr0: port 1(virbr0-nic) entered disabled state
>[   15.744440] Adjusting tsc more than 11% (5419170 vs 7179164)
>[   23.831882] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b75fd800
>[   23.831889] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b2d80 state to ffff8800b75fd800
>[   23.831893] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b7ae7c00 state to ffff8800b75fd800
>[   23.831895] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2d80 to [CRTC:21]
>[   23.831897] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b2d80
>[   23.831899] [drm:drm_atomic_check_only] checking ffff8800b75fd800
>[   23.831905] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 55
>[   23.831908] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   23.831911] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2e40 state to ffff8800b75fd800
>[   23.831914] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b2540 state to ffff8800b75fd800
>[   23.831919] [drm:drm_atomic_commit] commiting ffff8800b75fd800
>[   23.831946] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b75fd800
>[   23.831949] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b75fd800
>[   23.842025] [drm:drm_atomic_state_init] Allocated atomic state ffff880034c43400
>[   23.842030] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880222f73d80 state to ffff880034c43400
>[   23.842033] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880035684400 state to ffff880034c43400
>[   23.842034] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880222f73d80 to [CRTC:21]
>[   23.842036] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff880222f73d80
>[   23.842037] [drm:drm_atomic_check_only] checking ffff880034c43400
>[   23.842042] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 55
>[   23.842044] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   23.842047] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880222f73480 state to ffff880034c43400
>[   23.842049] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880222f73300 state to ffff880034c43400
>[   23.842053] [drm:drm_atomic_commit] commiting ffff880034c43400
>[   23.842073] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880034c43400
>[   23.842076] [drm:drm_atomic_state_free] Freeing atomic state ffff880034c43400
>[   23.850778] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b75fc200
>[   23.850782] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b29c0 state to ffff8800b75fc200
>[   23.850785] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b7ae5c00 state to ffff8800b75fc200
>[   23.850786] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b29c0 to [CRTC:21]
>[   23.850787] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b29c0
>[   23.850788] [drm:drm_atomic_check_only] checking ffff8800b75fc200
>[   23.850792] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 55
>[   23.850793] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   23.850795] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b26c0 state to ffff8800b75fc200
>[   23.850797] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b2a80 state to ffff8800b75fc200
>[   23.850800] [drm:drm_atomic_commit] commiting ffff8800b75fc200
>[   23.850814] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b75fc200
>[   23.850816] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b75fc200
>[   23.860886] [drm:drm_atomic_state_init] Allocated atomic state ffff880034c40a00
>[   23.860890] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880222f73900 state to ffff880034c40a00
>[   23.860893] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880035682800 state to ffff880034c40a00
>[   23.860894] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880222f73900 to [CRTC:21]
>[   23.860895] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff880222f73900
>[   23.860896] [drm:drm_atomic_check_only] checking ffff880034c40a00
>[   23.860900] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 55
>[   23.860901] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   23.860903] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880222f733c0 state to ffff880034c40a00
>[   23.860905] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880222f73300 state to ffff880034c40a00
>[   23.860908] [drm:drm_atomic_commit] commiting ffff880034c40a00
>[   23.860924] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880034c40a00
>[   23.860926] [drm:drm_atomic_state_free] Freeing atomic state ffff880034c40a00
>[   23.899308] [drm:drm_atomic_state_init] Allocated atomic state ffff880034c42000
>[   23.899312] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880222f73d80 state to ffff880034c42000
>[   23.899314] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880035682c00 state to ffff880034c42000
>[   23.899316] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880222f73d80 to [CRTC:21]
>[   23.899317] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff880222f73d80
>[   23.899318] [drm:drm_atomic_check_only] checking ffff880034c42000
>[   23.899322] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 55
>[   23.899323] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   23.899325] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880222f73480 state to ffff880034c42000
>[   23.899326] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880222f73b40 state to ffff880034c42000
>[   23.899329] [drm:drm_atomic_commit] commiting ffff880034c42000
>[   23.899347] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880034c42000
>[   23.899349] [drm:drm_atomic_state_free] Freeing atomic state ffff880034c42000
>[   24.837418] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aee00
>[   24.837422] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096c780 state to ffff8800b91aee00
>[   24.837424] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b9050400 state to ffff8800b91aee00
>[   24.837425] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096c780 to [NOCRTC]
>[   24.837426] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88022096c780
>[   24.837427] [drm:drm_atomic_check_only] checking ffff8800b91aee00
>[   24.837430] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb -1
>[   24.837431] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 0, off 1, on 0, ms 0
>[   24.837433] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096c0c0 state to ffff8800b91aee00
>[   24.837434] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096c3c0 state to ffff8800b91aee00
>[   24.837437] [drm:drm_atomic_commit] commiting ffff8800b91aee00
>[   24.837458] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aee00
>[   24.837460] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aee00
>[   24.839085] [drm:drm_atomic_state_init] Allocated atomic state ffff880222fdcc00
>[   24.839091] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096cb40 state to ffff880222fdcc00
>[   24.839094] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800354bb800 state to ffff880222fdcc00
>[   24.839095] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096cb40 to [NOCRTC]
>[   24.839097] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88022096cb40
>[   24.839098] [drm:drm_atomic_check_only] checking ffff880222fdcc00
>[   24.839102] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb -1
>[   24.839104] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 0, off 1, on 0, ms 0
>[   24.839107] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096c180 state to ffff880222fdcc00
>[   24.839109] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096c480 state to ffff880222fdcc00
>[   24.839112] [drm:drm_atomic_commit] commiting ffff880222fdcc00
>[   24.898435] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222fdcc00
>[   24.898439] [drm:drm_atomic_state_free] Freeing atomic state ffff880222fdcc00
>[   24.911498] [drm:i915_gem_open] 
>[   24.911534] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   24.919345] [drm:i915_gem_open] 
>[   24.922101] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   24.922249] [drm:i915_gem_open] 
>[   24.922295] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   24.922297] [drm:drm_mode_getresources] [CRTC:21]
>[   24.922298] [drm:drm_mode_getresources] [CRTC:25]
>[   24.922298] [drm:drm_mode_getresources] [CRTC:29]
>[   24.922299] [drm:drm_mode_getresources] [ENCODER:31:TMDS-31]
>[   24.922300] [drm:drm_mode_getresources] [ENCODER:39:TMDS-39]
>[   24.922301] [drm:drm_mode_getresources] [ENCODER:41:DP MST-41]
>[   24.922302] [drm:drm_mode_getresources] [ENCODER:42:DP MST-42]
>[   24.922302] [drm:drm_mode_getresources] [ENCODER:43:DP MST-43]
>[   24.922303] [drm:drm_mode_getresources] [ENCODER:46:TMDS-46]
>[   24.922304] [drm:drm_mode_getresources] [ENCODER:48:DP MST-48]
>[   24.922304] [drm:drm_mode_getresources] [ENCODER:49:DP MST-49]
>[   24.922305] [drm:drm_mode_getresources] [ENCODER:50:DP MST-50]
>[   24.922306] [drm:drm_mode_getresources] [CONNECTOR:32:eDP-1]
>[   24.922307] [drm:drm_mode_getresources] [CONNECTOR:40:DP-1]
>[   24.922307] [drm:drm_mode_getresources] [CONNECTOR:44:HDMI-A-1]
>[   24.922308] [drm:drm_mode_getresources] [CONNECTOR:47:DP-2]
>[   24.922309] [drm:drm_mode_getresources] [CONNECTOR:51:HDMI-A-2]
>[   24.922310] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   24.922612] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   24.922621] [drm:drm_mode_addfb2] [FB:52]
>[   24.922814] [drm:internal_framebuffer_create] could not create framebuffer
>[   24.922816] [drm:internal_framebuffer_create] could not create framebuffer
>[   24.922844] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   24.922845] [drm:drm_mode_getresources] [CRTC:21]
>[   24.922846] [drm:drm_mode_getresources] [CRTC:25]
>[   24.922846] [drm:drm_mode_getresources] [CRTC:29]
>[   24.922847] [drm:drm_mode_getresources] [ENCODER:31:TMDS-31]
>[   24.922848] [drm:drm_mode_getresources] [ENCODER:39:TMDS-39]
>[   24.922849] [drm:drm_mode_getresources] [ENCODER:41:DP MST-41]
>[   24.922850] [drm:drm_mode_getresources] [ENCODER:42:DP MST-42]
>[   24.922850] [drm:drm_mode_getresources] [ENCODER:43:DP MST-43]
>[   24.922851] [drm:drm_mode_getresources] [ENCODER:46:TMDS-46]
>[   24.922852] [drm:drm_mode_getresources] [ENCODER:48:DP MST-48]
>[   24.922853] [drm:drm_mode_getresources] [ENCODER:49:DP MST-49]
>[   24.922853] [drm:drm_mode_getresources] [ENCODER:50:DP MST-50]
>[   24.922854] [drm:drm_mode_getresources] [CONNECTOR:32:eDP-1]
>[   24.922855] [drm:drm_mode_getresources] [CONNECTOR:40:DP-1]
>[   24.922855] [drm:drm_mode_getresources] [CONNECTOR:44:HDMI-A-1]
>[   24.922856] [drm:drm_mode_getresources] [CONNECTOR:47:DP-2]
>[   24.922857] [drm:drm_mode_getresources] [CONNECTOR:51:HDMI-A-2]
>[   24.922858] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   24.922917] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   24.922923] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   24.937740] [drm:drm_mode_getconnector] [CONNECTOR:40:?]
>[   24.937750] [drm:drm_mode_getconnector] [CONNECTOR:40:?]
>[   24.937778] [drm:drm_mode_getconnector] [CONNECTOR:44:?]
>[   24.937780] [drm:drm_mode_getconnector] [CONNECTOR:44:?]
>[   24.937803] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   24.937805] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   24.937824] [drm:drm_mode_getconnector] [CONNECTOR:51:?]
>[   24.937826] [drm:drm_mode_getconnector] [CONNECTOR:51:?]
>[   24.970103] [drm:drm_mode_addfb2] [FB:52]
>[   25.033228] [drm:drm_mode_setcrtc] [CRTC:21]
>[   25.033234] [drm:drm_mode_setcrtc] [CONNECTOR:32:eDP-1]
>[   25.033238] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2c000
>[   25.033242] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff88021fd2c000
>[   25.033244] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88003460c9c0 state to ffff88021fd2c000
>[   25.033247] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:2560x1440] for CRTC state ffff8800b797d800
>[   25.033249] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88003460c9c0 to [CRTC:21]
>[   25.033251] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88003460c9c0
>[   25.033253] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:32] ffff880223015600 state to ffff88021fd2c000
>[   25.033255] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88021fd2c000
>[   25.033257] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880223015600 to [NOCRTC]
>[   25.033259] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880223015600 to [CRTC:21]
>[   25.033261] [drm:drm_atomic_check_only] checking ffff88021fd2c000
>[   25.033263] [drm:update_connector_routing] Updating routing for [CONNECTOR:32:eDP-1]
>[   25.033265] [drm:update_connector_routing] [CONNECTOR:32:eDP-1] keeps [ENCODER:31:TMDS-31], now on [CRTC:21]
>[   25.033269] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 52
>[   25.033271] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 0 -> 1, off 0, on 1, ms 0
>[   25.033274] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88003460c480 state to ffff88021fd2c000
>[   25.033276] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88003460cc00 state to ffff88021fd2c000
>[   25.033279] [drm:drm_atomic_commit] commiting ffff88021fd2c000
>[   25.098544] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2c000
>[   25.098549] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2c000
>[   25.114475] [drm:i915_gem_open] 
>[   25.141788] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   25.143973] [drm:i915_gem_context_create_ioctl] HW context 2 created
>[   25.144337] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   25.144969] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   25.145178] [drm:i915_gem_context_destroy_ioctl] HW context 2 destroyed
>[   25.146044] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   25.540607] [drm:i915_gem_open] 
>[   25.571962] [drm:i915_gem_open] 
>[   25.598366] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   25.598964] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   25.675118] [drm:i915_audio_component_sync_audio_rate] no pipe for the port B
>[   25.677204] [drm:i915_audio_component_sync_audio_rate] no pipe for the port B
>[   25.678350] [drm:i915_audio_component_sync_audio_rate] no pipe for the port B
>[   25.680206] [drm:i915_audio_component_sync_audio_rate] no pipe for the port B
>[   25.681308] [drm:i915_audio_component_sync_audio_rate] no pipe for the port B
>[   25.683209] [drm:i915_audio_component_sync_audio_rate] no pipe for the port B
>[   25.684372] [drm:i915_audio_component_sync_audio_rate] no pipe for the port C
>[   25.686211] [drm:i915_audio_component_sync_audio_rate] no pipe for the port C
>[   25.687358] [drm:i915_audio_component_sync_audio_rate] no pipe for the port C
>[   25.689209] [drm:i915_audio_component_sync_audio_rate] no pipe for the port C
>[   25.690335] [drm:i915_audio_component_sync_audio_rate] no pipe for the port C
>[   25.692219] [drm:i915_audio_component_sync_audio_rate] no pipe for the port C
>[   25.693487] [drm:i915_audio_component_sync_audio_rate] no pipe for the port D
>[   25.695221] [drm:i915_audio_component_sync_audio_rate] no pipe for the port D
>[   25.696359] [drm:i915_audio_component_sync_audio_rate] no pipe for the port D
>[   25.698221] [drm:i915_audio_component_sync_audio_rate] no pipe for the port D
>[   25.699492] [drm:i915_audio_component_sync_audio_rate] no pipe for the port D
>[   25.701221] [drm:i915_audio_component_sync_audio_rate] no pipe for the port D
>[   25.706893] [drm:i915_audio_component_sync_audio_rate] no pipe for the port B
>[   25.709221] [drm:i915_audio_component_sync_audio_rate] no pipe for the port B
>[   25.817692] Bluetooth: RFCOMM TTY layer initialized
>[   25.817697] Bluetooth: RFCOMM socket layer initialized
>[   25.817702] Bluetooth: RFCOMM ver 1.11
>[   25.841515] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   25.841519] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1]
>[   25.841521] [drm:intel_dp_detect] [CONNECTOR:32:eDP-1]
>[   25.841527] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   25.841534] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[   25.841978] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   25.842451] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   25.842895] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   25.842899] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1] probed modes :
>[   25.842902] [drm:drm_mode_debug_printmodeline] Modeline 33:"2560x1440" 60 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x48 0x9
>[   25.842912] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   25.843077] [drm:drm_mode_getconnector] [CONNECTOR:40:?]
>[   25.843080] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1]
>[   25.843081] [drm:intel_dp_detect] [CONNECTOR:40:DP-1]
>[   25.843085] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1] disconnected
>[   25.843089] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   25.843091] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2]
>[   25.843092] [drm:intel_dp_detect] [CONNECTOR:47:DP-2]
>[   25.843095] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2] disconnected
>[   25.843097] [drm:drm_mode_getconnector] [CONNECTOR:44:?]
>[   25.843099] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1]
>[   25.843101] [drm:intel_hdmi_detect] [CONNECTOR:44:HDMI-A-1]
>[   25.863122] [drm:intel_hdmi_detect] Live status not up!
>[   25.863126] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1] disconnected
>[   25.863144] [drm:drm_mode_getconnector] [CONNECTOR:51:?]
>[   25.863146] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2]
>[   25.863146] [drm:intel_hdmi_detect] [CONNECTOR:51:HDMI-A-2]
>[   25.883167] [drm:intel_hdmi_detect] Live status not up!
>[   25.883171] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2] disconnected
>[   25.884373] [drm:i915_gem_open] 
>[   25.919714] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   25.920200] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   25.921817] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   26.002365] [drm:drm_atomic_state_init] Allocated atomic state ffff880222fdfc00
>[   26.002368] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880034d38240 state to ffff880222fdfc00
>[   26.002370] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3adc00 state to ffff880222fdfc00
>[   26.002371] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880034d38240 to [CRTC:21]
>[   26.002372] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff880034d38240
>[   26.002373] [drm:drm_atomic_check_only] checking ffff880222fdfc00
>[   26.002378] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   26.002379] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[   26.002381] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880034d38180 state to ffff880222fdfc00
>[   26.002382] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880034d380c0 state to ffff880222fdfc00
>[   26.002385] [drm:drm_atomic_commit] commiting ffff880222fdfc00
>[   26.002413] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222fdfc00
>[   26.002414] [drm:drm_atomic_state_free] Freeing atomic state ffff880222fdfc00
>[   27.804786] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ed3400
>[   27.804791] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880034c95600 state to ffff880222ed3400
>[   27.804794] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91a4c00 state to ffff880222ed3400
>[   27.804795] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880034c95600 to [CRTC:21]
>[   27.804797] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff880034c95600
>[   27.804799] [drm:drm_atomic_check_only] checking ffff880222ed3400
>[   27.804804] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   27.804805] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   27.804807] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880034c95000 state to ffff880222ed3400
>[   27.804809] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880034c95540 state to ffff880222ed3400
>[   27.804812] [drm:drm_atomic_commit] commiting ffff880222ed3400
>[   27.804829] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ed3400
>[   27.804830] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ed3400
>[   28.024833] [drm:drm_mode_addfb2] [FB:58]
>[   28.131131] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ed0800
>[   28.131136] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b9340b40 state to ffff880222ed0800
>[   28.131139] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c4000 state to ffff880222ed0800
>[   28.131141] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b9340b40 to [CRTC:21]
>[   28.131143] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b9340b40
>[   28.131144] [drm:drm_atomic_check_only] checking ffff880222ed0800
>[   28.131150] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   28.131151] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   28.131154] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b9340c00 state to ffff880222ed0800
>[   28.131157] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b97f1f00 state to ffff880222ed0800
>[   28.131160] [drm:drm_atomic_commit] commiting ffff880222ed0800
>[   28.131175] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ed0800
>[   28.131177] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ed0800
>[   28.467895] CPU1: Core temperature above threshold, cpu clock throttled (total events = 1)
>[   28.467896] CPU0: Core temperature above threshold, cpu clock throttled (total events = 1)
>[   28.467899] CPU3: Package temperature above threshold, cpu clock throttled (total events = 1)
>[   28.467900] CPU2: Package temperature above threshold, cpu clock throttled (total events = 1)
>[   28.467901] CPU0: Package temperature above threshold, cpu clock throttled (total events = 1)
>[   28.467906] mce: [Hardware Error]: Machine check events logged
>[   28.467907] CPU1: Package temperature above threshold, cpu clock throttled (total events = 1)
>[   28.467909] mce: [Hardware Error]: Machine check events logged
>[   28.468897] CPU0: Core temperature/speed normal
>[   28.468898] CPU1: Core temperature/speed normal
>[   28.468899] CPU2: Package temperature/speed normal
>[   28.468900] CPU3: Package temperature/speed normal
>[   28.468900] CPU1: Package temperature/speed normal
>[   28.468906] CPU0: Package temperature/speed normal
>[   28.854033] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[   28.854039] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[   28.875251] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ed0c00
>[   28.875260] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880200e2f900 state to ffff880222ed0c00
>[   28.875267] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3abc00 state to ffff880222ed0c00
>[   28.875271] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200e2f900 to [CRTC:21]
>[   28.875274] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff880200e2f900
>[   28.875276] [drm:drm_atomic_check_only] checking ffff880222ed0c00
>[   28.875289] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   28.875290] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   28.875300] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880200e2f180 state to ffff880222ed0c00
>[   28.875304] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880200e2f240 state to ffff880222ed0c00
>[   28.875313] [drm:drm_atomic_commit] commiting ffff880222ed0c00
>[   28.876932] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ed0c00
>[   28.876935] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ed0c00
>[   32.271201] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ada00
>[   32.271205] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0540 state to ffff8800b91ada00
>[   32.271208] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797ac00 state to ffff8800b91ada00
>[   32.271209] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0540 to [CRTC:21]
>[   32.271210] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0540
>[   32.271211] [drm:drm_atomic_check_only] checking ffff8800b91ada00
>[   32.271216] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.271217] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.271219] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0000 state to ffff8800b91ada00
>[   32.271220] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0c00 state to ffff8800b91ada00
>[   32.271223] [drm:drm_atomic_commit] commiting ffff8800b91ada00
>[   32.271240] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ada00
>[   32.271242] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ada00
>[   32.273942] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae200
>[   32.273945] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0cc0 state to ffff8800b91ae200
>[   32.273947] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91ae200
>[   32.273949] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0cc0 to [CRTC:21]
>[   32.273950] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0cc0
>[   32.273951] [drm:drm_atomic_check_only] checking ffff8800b91ae200
>[   32.273954] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.273956] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.273957] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0d80 state to ffff8800b91ae200
>[   32.273959] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0e40 state to ffff8800b91ae200
>[   32.273962] [drm:drm_atomic_commit] commiting ffff8800b91ae200
>[   32.273979] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae200
>[   32.273981] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae200
>[   32.281188] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ad600
>[   32.281194] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0c00 state to ffff8800b91ad600
>[   32.281198] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797ac00 state to ffff8800b91ad600
>[   32.281200] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0c00 to [CRTC:21]
>[   32.281202] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0c00
>[   32.281203] [drm:drm_atomic_check_only] checking ffff8800b91ad600
>[   32.281209] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.281211] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.281214] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0540 state to ffff8800b91ad600
>[   32.281216] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0000 state to ffff8800b91ad600
>[   32.281221] [drm:drm_atomic_commit] commiting ffff8800b91ad600
>[   32.281244] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ad600
>[   32.281247] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ad600
>[   32.290070] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712c000
>[   32.290076] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096cb40 state to ffff8800b712c000
>[   32.290079] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e5bfc00 state to ffff8800b712c000
>[   32.290081] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096cb40 to [CRTC:21]
>[   32.290082] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88022096cb40
>[   32.290084] [drm:drm_atomic_check_only] checking ffff8800b712c000
>[   32.290092] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.290094] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.290096] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096cd80 state to ffff8800b712c000
>[   32.290098] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096c180 state to ffff8800b712c000
>[   32.290103] [drm:drm_atomic_commit] commiting ffff8800b712c000
>[   32.290161] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712c000
>[   32.290165] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712c000
>[   32.300142] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae000
>[   32.300146] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0e40 state to ffff8800b91ae000
>[   32.300148] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91ae000
>[   32.300149] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0e40 to [CRTC:21]
>[   32.300151] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0e40
>[   32.300152] [drm:drm_atomic_check_only] checking ffff8800b91ae000
>[   32.300156] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.300157] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.300159] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0cc0 state to ffff8800b91ae000
>[   32.300160] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0d80 state to ffff8800b91ae000
>[   32.300163] [drm:drm_atomic_commit] commiting ffff8800b91ae000
>[   32.300177] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae000
>[   32.300179] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae000
>[   32.310197] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af400
>[   32.310202] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0f00 state to ffff8800b91af400
>[   32.310204] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91af400
>[   32.310205] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0f00 to [CRTC:21]
>[   32.310206] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0f00
>[   32.310207] [drm:drm_atomic_check_only] checking ffff8800b91af400
>[   32.310211] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.310212] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.310214] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0480 state to ffff8800b91af400
>[   32.310216] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0600 state to ffff8800b91af400
>[   32.310219] [drm:drm_atomic_commit] commiting ffff8800b91af400
>[   32.310238] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af400
>[   32.310239] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af400
>[   32.319200] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aea00
>[   32.319203] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0d80 state to ffff8800b91aea00
>[   32.319206] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91aea00
>[   32.319207] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0d80 to [CRTC:21]
>[   32.319208] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0d80
>[   32.319209] [drm:drm_atomic_check_only] checking ffff8800b91aea00
>[   32.319213] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.319214] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.319216] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0e40 state to ffff8800b91aea00
>[   32.319217] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0cc0 state to ffff8800b91aea00
>[   32.319220] [drm:drm_atomic_commit] commiting ffff8800b91aea00
>[   32.319237] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aea00
>[   32.319239] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aea00
>[   32.319295] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af600
>[   32.319297] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0600 state to ffff8800b91af600
>[   32.319299] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91af600
>[   32.319300] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0600 to [CRTC:21]
>[   32.319301] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0600
>[   32.319303] [drm:drm_atomic_check_only] checking ffff8800b91af600
>[   32.319305] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.319307] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.319309] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0f00 state to ffff8800b91af600
>[   32.319310] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0480 state to ffff8800b91af600
>[   32.319312] [drm:drm_atomic_commit] commiting ffff8800b91af600
>[   32.319324] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af600
>[   32.319326] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af600
>[   32.329227] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aca00
>[   32.329231] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0cc0 state to ffff8800b91aca00
>[   32.329234] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91aca00
>[   32.329235] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0cc0 to [CRTC:21]
>[   32.329236] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0cc0
>[   32.329237] [drm:drm_atomic_check_only] checking ffff8800b91aca00
>[   32.329241] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.329242] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.329244] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0d80 state to ffff8800b91aca00
>[   32.329246] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0e40 state to ffff8800b91aca00
>[   32.329249] [drm:drm_atomic_commit] commiting ffff8800b91aca00
>[   32.329267] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aca00
>[   32.329268] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aca00
>[   32.339238] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aea00
>[   32.339242] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0480 state to ffff8800b91aea00
>[   32.339244] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91aea00
>[   32.339245] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0480 to [CRTC:21]
>[   32.339246] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0480
>[   32.339247] [drm:drm_atomic_check_only] checking ffff8800b91aea00
>[   32.339251] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.339253] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.339255] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0600 state to ffff8800b91aea00
>[   32.339256] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0f00 state to ffff8800b91aea00
>[   32.339259] [drm:drm_atomic_commit] commiting ffff8800b91aea00
>[   32.339275] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aea00
>[   32.339278] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aea00
>[   32.348501] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af400
>[   32.348505] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0e40 state to ffff8800b91af400
>[   32.348507] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91af400
>[   32.348509] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0e40 to [CRTC:21]
>[   32.348510] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0e40
>[   32.348511] [drm:drm_atomic_check_only] checking ffff8800b91af400
>[   32.348516] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.348517] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.348519] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0cc0 state to ffff8800b91af400
>[   32.348521] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0d80 state to ffff8800b91af400
>[   32.348524] [drm:drm_atomic_commit] commiting ffff8800b91af400
>[   32.348541] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af400
>[   32.348542] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af400
>[   32.358550] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae000
>[   32.358554] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0f00 state to ffff8800b91ae000
>[   32.358557] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91ae000
>[   32.358558] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0f00 to [CRTC:21]
>[   32.358559] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0f00
>[   32.358560] [drm:drm_atomic_check_only] checking ffff8800b91ae000
>[   32.358564] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.358565] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.358567] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0480 state to ffff8800b91ae000
>[   32.358569] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0600 state to ffff8800b91ae000
>[   32.358572] [drm:drm_atomic_commit] commiting ffff8800b91ae000
>[   32.358588] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae000
>[   32.358590] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae000
>[   32.367587] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ad600
>[   32.367591] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0d80 state to ffff8800b91ad600
>[   32.367593] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91ad600
>[   32.367594] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0d80 to [CRTC:21]
>[   32.367595] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0d80
>[   32.367596] [drm:drm_atomic_check_only] checking ffff8800b91ad600
>[   32.367600] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.367601] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.367603] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0e40 state to ffff8800b91ad600
>[   32.367605] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0cc0 state to ffff8800b91ad600
>[   32.367608] [drm:drm_atomic_commit] commiting ffff8800b91ad600
>[   32.367624] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ad600
>[   32.367626] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ad600
>[   32.377606] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae200
>[   32.377610] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0600 state to ffff8800b91ae200
>[   32.377613] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91ae200
>[   32.377614] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0600 to [CRTC:21]
>[   32.377615] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0600
>[   32.377616] [drm:drm_atomic_check_only] checking ffff8800b91ae200
>[   32.377620] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.377621] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.377623] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0f00 state to ffff8800b91ae200
>[   32.377625] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0480 state to ffff8800b91ae200
>[   32.377628] [drm:drm_atomic_commit] commiting ffff8800b91ae200
>[   32.377644] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae200
>[   32.377646] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae200
>[   32.389050] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ada00
>[   32.389055] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0cc0 state to ffff8800b91ada00
>[   32.389058] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91ada00
>[   32.389060] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0cc0 to [CRTC:21]
>[   32.389062] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0cc0
>[   32.389064] [drm:drm_atomic_check_only] checking ffff8800b91ada00
>[   32.389069] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.389071] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.389074] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0d80 state to ffff8800b91ada00
>[   32.389076] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0e40 state to ffff8800b91ada00
>[   32.389080] [drm:drm_atomic_commit] commiting ffff8800b91ada00
>[   32.389100] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ada00
>[   32.389102] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ada00
>[   32.396743] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af800
>[   32.396747] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0480 state to ffff8800b91af800
>[   32.396750] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91af800
>[   32.396751] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0480 to [CRTC:21]
>[   32.396752] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0480
>[   32.396753] [drm:drm_atomic_check_only] checking ffff8800b91af800
>[   32.396758] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.396760] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.396761] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0600 state to ffff8800b91af800
>[   32.396763] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0f00 state to ffff8800b91af800
>[   32.396766] [drm:drm_atomic_commit] commiting ffff8800b91af800
>[   32.396783] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af800
>[   32.396785] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af800
>[   32.406711] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ad400
>[   32.406716] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0e40 state to ffff8800b91ad400
>[   32.406718] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91ad400
>[   32.406720] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0e40 to [CRTC:21]
>[   32.406721] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0e40
>[   32.406723] [drm:drm_atomic_check_only] checking ffff8800b91ad400
>[   32.406727] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.406728] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.406731] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0cc0 state to ffff8800b91ad400
>[   32.406733] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0d80 state to ffff8800b91ad400
>[   32.406737] [drm:drm_atomic_commit] commiting ffff8800b91ad400
>[   32.406753] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ad400
>[   32.406755] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ad400
>[   32.416922] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af000
>[   32.416927] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0f00 state to ffff8800b91af000
>[   32.416929] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91af000
>[   32.416930] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0f00 to [CRTC:21]
>[   32.416931] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0f00
>[   32.416933] [drm:drm_atomic_check_only] checking ffff8800b91af000
>[   32.416936] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.416938] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.416940] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0480 state to ffff8800b91af000
>[   32.416941] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0600 state to ffff8800b91af000
>[   32.416944] [drm:drm_atomic_commit] commiting ffff8800b91af000
>[   32.416960] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af000
>[   32.416962] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af000
>[   32.426104] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ac400
>[   32.426108] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0d80 state to ffff8800b91ac400
>[   32.426110] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91ac400
>[   32.426112] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0d80 to [CRTC:21]
>[   32.426113] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0d80
>[   32.426114] [drm:drm_atomic_check_only] checking ffff8800b91ac400
>[   32.426118] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.426119] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.426121] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0e40 state to ffff8800b91ac400
>[   32.426122] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0cc0 state to ffff8800b91ac400
>[   32.426125] [drm:drm_atomic_commit] commiting ffff8800b91ac400
>[   32.426142] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ac400
>[   32.426144] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ac400
>[   32.436278] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91afc00
>[   32.436282] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0600 state to ffff8800b91afc00
>[   32.436285] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91afc00
>[   32.436286] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0600 to [CRTC:21]
>[   32.436287] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0600
>[   32.436288] [drm:drm_atomic_check_only] checking ffff8800b91afc00
>[   32.436292] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.436293] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.436295] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0f00 state to ffff8800b91afc00
>[   32.436297] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0480 state to ffff8800b91afc00
>[   32.436301] [drm:drm_atomic_commit] commiting ffff8800b91afc00
>[   32.436317] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91afc00
>[   32.436319] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91afc00
>[   32.445335] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91adc00
>[   32.445339] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0cc0 state to ffff8800b91adc00
>[   32.445341] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91adc00
>[   32.445343] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0cc0 to [CRTC:21]
>[   32.445344] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0cc0
>[   32.445345] [drm:drm_atomic_check_only] checking ffff8800b91adc00
>[   32.445349] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.445350] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.445352] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0d80 state to ffff8800b91adc00
>[   32.445354] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0e40 state to ffff8800b91adc00
>[   32.445356] [drm:drm_atomic_commit] commiting ffff8800b91adc00
>[   32.445374] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91adc00
>[   32.445376] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91adc00
>[   32.455343] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ac800
>[   32.455347] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0480 state to ffff8800b91ac800
>[   32.455349] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91ac800
>[   32.455351] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0480 to [CRTC:21]
>[   32.455352] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0480
>[   32.455353] [drm:drm_atomic_check_only] checking ffff8800b91ac800
>[   32.455357] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.455359] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.455360] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0600 state to ffff8800b91ac800
>[   32.455362] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0f00 state to ffff8800b91ac800
>[   32.455365] [drm:drm_atomic_commit] commiting ffff8800b91ac800
>[   32.455382] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ac800
>[   32.455384] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ac800
>[   32.464547] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae400
>[   32.464552] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0e40 state to ffff8800b91ae400
>[   32.464554] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91ae400
>[   32.464555] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0e40 to [CRTC:21]
>[   32.464556] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0e40
>[   32.464557] [drm:drm_atomic_check_only] checking ffff8800b91ae400
>[   32.464561] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.464563] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.464565] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0cc0 state to ffff8800b91ae400
>[   32.464566] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0d80 state to ffff8800b91ae400
>[   32.464569] [drm:drm_atomic_commit] commiting ffff8800b91ae400
>[   32.464586] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae400
>[   32.464588] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae400
>[   32.493919] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ac600
>[   32.493923] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0f00 state to ffff8800b91ac600
>[   32.493925] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91ac600
>[   32.493926] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0f00 to [CRTC:21]
>[   32.493928] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0f00
>[   32.493929] [drm:drm_atomic_check_only] checking ffff8800b91ac600
>[   32.493933] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.493934] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.493936] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0480 state to ffff8800b91ac600
>[   32.493937] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0600 state to ffff8800b91ac600
>[   32.493940] [drm:drm_atomic_commit] commiting ffff8800b91ac600
>[   32.493957] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ac600
>[   32.493958] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ac600
>[   32.504065] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af200
>[   32.504069] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0d80 state to ffff8800b91af200
>[   32.504072] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91af200
>[   32.504073] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0d80 to [CRTC:21]
>[   32.504074] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0d80
>[   32.504075] [drm:drm_atomic_check_only] checking ffff8800b91af200
>[   32.504079] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.504080] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.504082] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0e40 state to ffff8800b91af200
>[   32.504084] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0cc0 state to ffff8800b91af200
>[   32.504087] [drm:drm_atomic_commit] commiting ffff8800b91af200
>[   32.504104] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af200
>[   32.504106] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af200
>[   32.513148] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aee00
>[   32.513152] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0600 state to ffff8800b91aee00
>[   32.513155] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91aee00
>[   32.513156] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0600 to [CRTC:21]
>[   32.513157] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0600
>[   32.513159] [drm:drm_atomic_check_only] checking ffff8800b91aee00
>[   32.513164] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.513165] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.513167] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0f00 state to ffff8800b91aee00
>[   32.513168] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0480 state to ffff8800b91aee00
>[   32.513171] [drm:drm_atomic_commit] commiting ffff8800b91aee00
>[   32.513189] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aee00
>[   32.513191] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aee00
>[   32.523137] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aee00
>[   32.523141] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e00c0 state to ffff8800b91aee00
>[   32.523144] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91aee00
>[   32.523145] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e00c0 to [CRTC:21]
>[   32.523146] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e00c0
>[   32.523147] [drm:drm_atomic_check_only] checking ffff8800b91aee00
>[   32.523151] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.523152] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.523154] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0900 state to ffff8800b91aee00
>[   32.523156] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0cc0 state to ffff8800b91aee00
>[   32.523159] [drm:drm_atomic_commit] commiting ffff8800b91aee00
>[   32.523176] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aee00
>[   32.523177] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aee00
>[   32.532582] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91afc00
>[   32.532586] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0480 state to ffff8800b91afc00
>[   32.532588] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91afc00
>[   32.532589] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0480 to [CRTC:21]
>[   32.532591] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0480
>[   32.532592] [drm:drm_atomic_check_only] checking ffff8800b91afc00
>[   32.532596] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.532597] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.532599] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0600 state to ffff8800b91afc00
>[   32.532600] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0f00 state to ffff8800b91afc00
>[   32.532604] [drm:drm_atomic_commit] commiting ffff8800b91afc00
>[   32.532618] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91afc00
>[   32.532619] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91afc00
>[   32.542565] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ac400
>[   32.542570] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0cc0 state to ffff8800b91ac400
>[   32.542572] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91ac400
>[   32.542573] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0cc0 to [CRTC:21]
>[   32.542574] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0cc0
>[   32.542576] [drm:drm_atomic_check_only] checking ffff8800b91ac400
>[   32.542579] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.542581] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.542583] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e00c0 state to ffff8800b91ac400
>[   32.542584] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0900 state to ffff8800b91ac400
>[   32.542587] [drm:drm_atomic_commit] commiting ffff8800b91ac400
>[   32.542606] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ac400
>[   32.542607] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ac400
>[   32.551538] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af000
>[   32.551541] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0f00 state to ffff8800b91af000
>[   32.551542] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91af000
>[   32.551543] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0f00 to [CRTC:21]
>[   32.551545] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0f00
>[   32.551545] [drm:drm_atomic_check_only] checking ffff8800b91af000
>[   32.551548] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.551549] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.551551] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0480 state to ffff8800b91af000
>[   32.551552] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0600 state to ffff8800b91af000
>[   32.551554] [drm:drm_atomic_commit] commiting ffff8800b91af000
>[   32.551567] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af000
>[   32.551568] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af000
>[   32.561620] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ad400
>[   32.561624] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0900 state to ffff8800b91ad400
>[   32.561626] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91ad400
>[   32.561627] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0900 to [CRTC:21]
>[   32.561629] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0900
>[   32.561630] [drm:drm_atomic_check_only] checking ffff8800b91ad400
>[   32.561635] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.561636] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.561638] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0cc0 state to ffff8800b91ad400
>[   32.561639] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e00c0 state to ffff8800b91ad400
>[   32.561642] [drm:drm_atomic_commit] commiting ffff8800b91ad400
>[   32.561659] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ad400
>[   32.561661] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ad400
>[   32.571605] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af800
>[   32.571608] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0600 state to ffff8800b91af800
>[   32.571610] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91af800
>[   32.571611] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0600 to [CRTC:21]
>[   32.571612] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0600
>[   32.571613] [drm:drm_atomic_check_only] checking ffff8800b91af800
>[   32.571616] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.571617] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.571618] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0f00 state to ffff8800b91af800
>[   32.571620] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0480 state to ffff8800b91af800
>[   32.571622] [drm:drm_atomic_commit] commiting ffff8800b91af800
>[   32.571635] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af800
>[   32.571636] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af800
>[   32.580698] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ada00
>[   32.580702] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e00c0 state to ffff8800b91ada00
>[   32.580705] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91ada00
>[   32.580706] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e00c0 to [CRTC:21]
>[   32.580707] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e00c0
>[   32.580708] [drm:drm_atomic_check_only] checking ffff8800b91ada00
>[   32.580712] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.580713] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.580715] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0900 state to ffff8800b91ada00
>[   32.580717] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0cc0 state to ffff8800b91ada00
>[   32.580720] [drm:drm_atomic_commit] commiting ffff8800b91ada00
>[   32.580737] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ada00
>[   32.580739] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ada00
>[   32.590752] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae200
>[   32.590756] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0480 state to ffff8800b91ae200
>[   32.590759] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91ae200
>[   32.590760] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0480 to [CRTC:21]
>[   32.590762] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0480
>[   32.590763] [drm:drm_atomic_check_only] checking ffff8800b91ae200
>[   32.590767] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.590768] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.590770] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0600 state to ffff8800b91ae200
>[   32.590771] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0f00 state to ffff8800b91ae200
>[   32.590774] [drm:drm_atomic_commit] commiting ffff8800b91ae200
>[   32.590791] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae200
>[   32.590793] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae200
>[   32.600738] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ad600
>[   32.600742] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0cc0 state to ffff8800b91ad600
>[   32.600744] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91ad600
>[   32.600746] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0cc0 to [CRTC:21]
>[   32.600747] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0cc0
>[   32.600748] [drm:drm_atomic_check_only] checking ffff8800b91ad600
>[   32.600752] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.600753] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.600755] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e00c0 state to ffff8800b91ad600
>[   32.600756] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0900 state to ffff8800b91ad600
>[   32.600759] [drm:drm_atomic_commit] commiting ffff8800b91ad600
>[   32.600776] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ad600
>[   32.600778] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ad600
>[   32.609840] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae000
>[   32.609844] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0f00 state to ffff8800b91ae000
>[   32.609847] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91ae000
>[   32.609848] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0f00 to [CRTC:21]
>[   32.609849] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0f00
>[   32.609850] [drm:drm_atomic_check_only] checking ffff8800b91ae000
>[   32.609854] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.609855] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.609857] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0480 state to ffff8800b91ae000
>[   32.609858] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0600 state to ffff8800b91ae000
>[   32.609861] [drm:drm_atomic_commit] commiting ffff8800b91ae000
>[   32.609878] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae000
>[   32.609880] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae000
>[   32.620002] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af400
>[   32.620006] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0900 state to ffff8800b91af400
>[   32.620008] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91af400
>[   32.620010] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0900 to [CRTC:21]
>[   32.620011] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0900
>[   32.620012] [drm:drm_atomic_check_only] checking ffff8800b91af400
>[   32.620016] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.620018] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.620020] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0cc0 state to ffff8800b91af400
>[   32.620021] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e00c0 state to ffff8800b91af400
>[   32.620024] [drm:drm_atomic_commit] commiting ffff8800b91af400
>[   32.620041] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af400
>[   32.620043] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af400
>[   32.629244] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aea00
>[   32.629248] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0600 state to ffff8800b91aea00
>[   32.629250] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91aea00
>[   32.629251] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0600 to [CRTC:21]
>[   32.629253] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0600
>[   32.629254] [drm:drm_atomic_check_only] checking ffff8800b91aea00
>[   32.629258] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.629259] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.629261] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0f00 state to ffff8800b91aea00
>[   32.629263] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0480 state to ffff8800b91aea00
>[   32.629266] [drm:drm_atomic_commit] commiting ffff8800b91aea00
>[   32.629284] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aea00
>[   32.629285] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aea00
>[   32.639344] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aca00
>[   32.639349] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e00c0 state to ffff8800b91aca00
>[   32.639352] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91aca00
>[   32.639353] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e00c0 to [CRTC:21]
>[   32.639354] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e00c0
>[   32.639355] [drm:drm_atomic_check_only] checking ffff8800b91aca00
>[   32.639359] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.639361] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.639362] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0900 state to ffff8800b91aca00
>[   32.639364] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0cc0 state to ffff8800b91aca00
>[   32.639367] [drm:drm_atomic_commit] commiting ffff8800b91aca00
>[   32.639384] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aca00
>[   32.639385] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aca00
>[   32.648358] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af600
>[   32.648362] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0480 state to ffff8800b91af600
>[   32.648364] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91af600
>[   32.648365] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0480 to [CRTC:21]
>[   32.648366] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0480
>[   32.648367] [drm:drm_atomic_check_only] checking ffff8800b91af600
>[   32.648371] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.648372] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.648374] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0600 state to ffff8800b91af600
>[   32.648376] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0f00 state to ffff8800b91af600
>[   32.648379] [drm:drm_atomic_commit] commiting ffff8800b91af600
>[   32.648395] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af600
>[   32.648398] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af600
>[   32.658371] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af600
>[   32.658375] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0cc0 state to ffff8800b91af600
>[   32.658378] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91af600
>[   32.658379] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0cc0 to [CRTC:21]
>[   32.658380] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0cc0
>[   32.658381] [drm:drm_atomic_check_only] checking ffff8800b91af600
>[   32.658385] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.658386] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.658388] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e00c0 state to ffff8800b91af600
>[   32.658389] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0900 state to ffff8800b91af600
>[   32.658393] [drm:drm_atomic_commit] commiting ffff8800b91af600
>[   32.658409] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af600
>[   32.658411] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af600
>[   32.668378] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aca00
>[   32.668382] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0f00 state to ffff8800b91aca00
>[   32.668384] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91aca00
>[   32.668385] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0f00 to [CRTC:21]
>[   32.668387] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0f00
>[   32.668388] [drm:drm_atomic_check_only] checking ffff8800b91aca00
>[   32.668392] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.668393] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.668395] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0480 state to ffff8800b91aca00
>[   32.668396] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0600 state to ffff8800b91aca00
>[   32.668399] [drm:drm_atomic_commit] commiting ffff8800b91aca00
>[   32.668416] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aca00
>[   32.668418] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aca00
>[   32.677474] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aea00
>[   32.677478] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0900 state to ffff8800b91aea00
>[   32.677481] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91aea00
>[   32.677482] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0900 to [CRTC:21]
>[   32.677483] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0900
>[   32.677484] [drm:drm_atomic_check_only] checking ffff8800b91aea00
>[   32.677488] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.677489] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.677491] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0cc0 state to ffff8800b91aea00
>[   32.677493] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e00c0 state to ffff8800b91aea00
>[   32.677496] [drm:drm_atomic_commit] commiting ffff8800b91aea00
>[   32.677512] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aea00
>[   32.677514] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aea00
>[   32.687465] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af400
>[   32.687470] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0600 state to ffff8800b91af400
>[   32.687472] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91af400
>[   32.687473] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0600 to [CRTC:21]
>[   32.687474] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0600
>[   32.687476] [drm:drm_atomic_check_only] checking ffff8800b91af400
>[   32.687479] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.687481] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.687483] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0f00 state to ffff8800b91af400
>[   32.687484] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0480 state to ffff8800b91af400
>[   32.687487] [drm:drm_atomic_commit] commiting ffff8800b91af400
>[   32.687505] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af400
>[   32.687507] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af400
>[   32.900644] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ad600
>[   32.900648] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e00c0 state to ffff8800b91ad600
>[   32.900650] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91ad600
>[   32.900651] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e00c0 to [CRTC:21]
>[   32.900653] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e00c0
>[   32.900654] [drm:drm_atomic_check_only] checking ffff8800b91ad600
>[   32.900658] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.900659] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.900661] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0900 state to ffff8800b91ad600
>[   32.900662] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0cc0 state to ffff8800b91ad600
>[   32.900665] [drm:drm_atomic_commit] commiting ffff8800b91ad600
>[   32.900682] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ad600
>[   32.900684] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ad600
>[   32.910601] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae200
>[   32.910605] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0480 state to ffff8800b91ae200
>[   32.910607] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91ae200
>[   32.910608] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0480 to [CRTC:21]
>[   32.910609] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0480
>[   32.910611] [drm:drm_atomic_check_only] checking ffff8800b91ae200
>[   32.910614] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.910616] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.910617] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0600 state to ffff8800b91ae200
>[   32.910619] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0f00 state to ffff8800b91ae200
>[   32.910622] [drm:drm_atomic_commit] commiting ffff8800b91ae200
>[   32.910638] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae200
>[   32.910640] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae200
>[   32.919620] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ada00
>[   32.919625] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0cc0 state to ffff8800b91ada00
>[   32.919627] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91ada00
>[   32.919628] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0cc0 to [CRTC:21]
>[   32.919629] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0cc0
>[   32.919630] [drm:drm_atomic_check_only] checking ffff8800b91ada00
>[   32.919634] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.919636] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.919637] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e00c0 state to ffff8800b91ada00
>[   32.919639] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0900 state to ffff8800b91ada00
>[   32.919642] [drm:drm_atomic_commit] commiting ffff8800b91ada00
>[   32.919659] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ada00
>[   32.919661] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ada00
>[   32.929790] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af800
>[   32.929794] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0f00 state to ffff8800b91af800
>[   32.929796] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91af800
>[   32.929797] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0f00 to [CRTC:21]
>[   32.929798] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0f00
>[   32.929799] [drm:drm_atomic_check_only] checking ffff8800b91af800
>[   32.929803] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.929804] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.929806] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0480 state to ffff8800b91af800
>[   32.929808] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0600 state to ffff8800b91af800
>[   32.929811] [drm:drm_atomic_commit] commiting ffff8800b91af800
>[   32.929828] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af800
>[   32.929830] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af800
>[   32.938693] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ad400
>[   32.938696] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0900 state to ffff8800b91ad400
>[   32.938698] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91ad400
>[   32.938699] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0900 to [CRTC:21]
>[   32.938700] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0900
>[   32.938701] [drm:drm_atomic_check_only] checking ffff8800b91ad400
>[   32.938704] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.938705] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.938707] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0cc0 state to ffff8800b91ad400
>[   32.938708] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e00c0 state to ffff8800b91ad400
>[   32.938710] [drm:drm_atomic_commit] commiting ffff8800b91ad400
>[   32.938722] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ad400
>[   32.938724] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ad400
>[   32.948749] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af000
>[   32.948753] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0600 state to ffff8800b91af000
>[   32.948756] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91af000
>[   32.948757] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0600 to [CRTC:21]
>[   32.948758] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0600
>[   32.948759] [drm:drm_atomic_check_only] checking ffff8800b91af000
>[   32.948764] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.948765] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.948767] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0f00 state to ffff8800b91af000
>[   32.948769] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0480 state to ffff8800b91af000
>[   32.948772] [drm:drm_atomic_commit] commiting ffff8800b91af000
>[   32.948789] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af000
>[   32.948790] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af000
>[   32.958627] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ec8e00
>[   32.958631] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021d5049c0 state to ffff880222ec8e00
>[   32.958633] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3a6c00 state to ffff880222ec8e00
>[   32.958634] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021d5049c0 to [CRTC:21]
>[   32.958635] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88021d5049c0
>[   32.958636] [drm:drm_atomic_check_only] checking ffff880222ec8e00
>[   32.958640] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.958642] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.958643] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021d504b40 state to ffff880222ec8e00
>[   32.958646] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b711e3c0 state to ffff880222ec8e00
>[   32.958648] [drm:drm_atomic_commit] commiting ffff880222ec8e00
>[   32.958665] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ec8e00
>[   32.958667] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ec8e00
>[   32.968720] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ac400
>[   32.968724] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e00c0 state to ffff8800b91ac400
>[   32.968726] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91ac400
>[   32.968727] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e00c0 to [CRTC:21]
>[   32.968729] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e00c0
>[   32.968730] [drm:drm_atomic_check_only] checking ffff8800b91ac400
>[   32.968733] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.968735] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.968737] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0900 state to ffff8800b91ac400
>[   32.968738] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0cc0 state to ffff8800b91ac400
>[   32.968741] [drm:drm_atomic_commit] commiting ffff8800b91ac400
>[   32.968758] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ac400
>[   32.968760] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ac400
>[   32.977687] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91afc00
>[   32.977690] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0d80 state to ffff8800b91afc00
>[   32.977693] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91afc00
>[   32.977694] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0d80 to [CRTC:21]
>[   32.977696] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0d80
>[   32.977697] [drm:drm_atomic_check_only] checking ffff8800b91afc00
>[   32.977700] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.977702] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.977703] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0e40 state to ffff8800b91afc00
>[   32.977705] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0300 state to ffff8800b91afc00
>[   32.977708] [drm:drm_atomic_commit] commiting ffff8800b91afc00
>[   32.977725] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91afc00
>[   32.977726] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91afc00
>[   32.987684] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91adc00
>[   32.987689] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0cc0 state to ffff8800b91adc00
>[   32.987692] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91adc00
>[   32.987693] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0cc0 to [CRTC:21]
>[   32.987694] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0cc0
>[   32.987695] [drm:drm_atomic_check_only] checking ffff8800b91adc00
>[   32.987699] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.987700] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.987702] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e00c0 state to ffff8800b91adc00
>[   32.987704] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0900 state to ffff8800b91adc00
>[   32.987707] [drm:drm_atomic_commit] commiting ffff8800b91adc00
>[   32.987724] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91adc00
>[   32.987725] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91adc00
>[   32.997740] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ac800
>[   32.997744] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0300 state to ffff8800b91ac800
>[   32.997746] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91ac800
>[   32.997748] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0300 to [CRTC:21]
>[   32.997749] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0300
>[   32.997750] [drm:drm_atomic_check_only] checking ffff8800b91ac800
>[   32.997754] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   32.997755] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   32.997757] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0d80 state to ffff8800b91ac800
>[   32.997758] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0e40 state to ffff8800b91ac800
>[   32.997761] [drm:drm_atomic_commit] commiting ffff8800b91ac800
>[   32.997778] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ac800
>[   32.997780] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ac800
>[   33.006750] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae400
>[   33.006754] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0900 state to ffff8800b91ae400
>[   33.006756] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91ae400
>[   33.006757] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0900 to [CRTC:21]
>[   33.006758] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0900
>[   33.006759] [drm:drm_atomic_check_only] checking ffff8800b91ae400
>[   33.006763] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.006765] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.006767] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0cc0 state to ffff8800b91ae400
>[   33.006769] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e00c0 state to ffff8800b91ae400
>[   33.006772] [drm:drm_atomic_commit] commiting ffff8800b91ae400
>[   33.006788] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae400
>[   33.006790] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae400
>[   33.016769] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ac600
>[   33.016774] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0e40 state to ffff8800b91ac600
>[   33.016778] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91ac600
>[   33.016780] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0e40 to [CRTC:21]
>[   33.016782] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0e40
>[   33.016783] [drm:drm_atomic_check_only] checking ffff8800b91ac600
>[   33.016787] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.016788] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.016791] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0300 state to ffff8800b91ac600
>[   33.016792] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0d80 state to ffff8800b91ac600
>[   33.016795] [drm:drm_atomic_commit] commiting ffff8800b91ac600
>[   33.016812] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ac600
>[   33.016814] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ac600
>[   33.113849] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aee00
>[   33.113854] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e00c0 state to ffff8800b91aee00
>[   33.113856] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91aee00
>[   33.113857] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e00c0 to [CRTC:21]
>[   33.113858] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e00c0
>[   33.113859] [drm:drm_atomic_check_only] checking ffff8800b91aee00
>[   33.113863] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.113865] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.113866] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0900 state to ffff8800b91aee00
>[   33.113868] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0cc0 state to ffff8800b91aee00
>[   33.113871] [drm:drm_atomic_commit] commiting ffff8800b91aee00
>[   33.113888] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aee00
>[   33.113890] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aee00
>[   33.142824] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91afc00
>[   33.142828] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0d80 state to ffff8800b91afc00
>[   33.142830] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91afc00
>[   33.142831] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0d80 to [CRTC:21]
>[   33.142833] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0d80
>[   33.142834] [drm:drm_atomic_check_only] checking ffff8800b91afc00
>[   33.142838] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.142839] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.142841] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0e40 state to ffff8800b91afc00
>[   33.142842] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0300 state to ffff8800b91afc00
>[   33.142845] [drm:drm_atomic_commit] commiting ffff8800b91afc00
>[   33.142859] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91afc00
>[   33.142860] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91afc00
>[   33.210545] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ac400
>[   33.210548] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0cc0 state to ffff8800b91ac400
>[   33.210551] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91ac400
>[   33.210552] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0cc0 to [CRTC:21]
>[   33.210553] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0cc0
>[   33.210554] [drm:drm_atomic_check_only] checking ffff8800b91ac400
>[   33.210559] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.210560] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.210562] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e00c0 state to ffff8800b91ac400
>[   33.210563] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0900 state to ffff8800b91ac400
>[   33.210566] [drm:drm_atomic_commit] commiting ffff8800b91ac400
>[   33.210583] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ac400
>[   33.210585] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ac400
>[   33.220597] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af000
>[   33.220601] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0300 state to ffff8800b91af000
>[   33.220603] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91af000
>[   33.220604] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0300 to [CRTC:21]
>[   33.220606] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0300
>[   33.220607] [drm:drm_atomic_check_only] checking ffff8800b91af000
>[   33.220611] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.220612] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.220614] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0d80 state to ffff8800b91af000
>[   33.220615] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0e40 state to ffff8800b91af000
>[   33.220618] [drm:drm_atomic_commit] commiting ffff8800b91af000
>[   33.220636] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af000
>[   33.220638] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af000
>[   33.229680] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ad400
>[   33.229698] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0900 state to ffff8800b91ad400
>[   33.229701] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91ad400
>[   33.229702] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0900 to [CRTC:21]
>[   33.229703] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0900
>[   33.229704] [drm:drm_atomic_check_only] checking ffff8800b91ad400
>[   33.229708] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.229709] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.229711] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0cc0 state to ffff8800b91ad400
>[   33.229713] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e00c0 state to ffff8800b91ad400
>[   33.229716] [drm:drm_atomic_commit] commiting ffff8800b91ad400
>[   33.229733] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ad400
>[   33.229735] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ad400
>[   33.239640] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af800
>[   33.239644] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0e40 state to ffff8800b91af800
>[   33.239646] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91af800
>[   33.239647] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0e40 to [CRTC:21]
>[   33.239648] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0e40
>[   33.239649] [drm:drm_atomic_check_only] checking ffff8800b91af800
>[   33.239653] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.239654] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.239657] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0300 state to ffff8800b91af800
>[   33.239659] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0d80 state to ffff8800b91af800
>[   33.239662] [drm:drm_atomic_commit] commiting ffff8800b91af800
>[   33.239678] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af800
>[   33.239680] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af800
>[   33.248913] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ada00
>[   33.248918] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e00c0 state to ffff8800b91ada00
>[   33.248920] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91ada00
>[   33.248921] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e00c0 to [CRTC:21]
>[   33.248922] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e00c0
>[   33.248924] [drm:drm_atomic_check_only] checking ffff8800b91ada00
>[   33.248927] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.248929] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.248931] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0900 state to ffff8800b91ada00
>[   33.248932] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0cc0 state to ffff8800b91ada00
>[   33.248935] [drm:drm_atomic_commit] commiting ffff8800b91ada00
>[   33.248952] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ada00
>[   33.248954] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ada00
>[   33.258818] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae200
>[   33.258822] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0d80 state to ffff8800b91ae200
>[   33.258825] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91ae200
>[   33.258826] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0d80 to [CRTC:21]
>[   33.258827] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0d80
>[   33.258828] [drm:drm_atomic_check_only] checking ffff8800b91ae200
>[   33.258832] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.258834] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.258835] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0e40 state to ffff8800b91ae200
>[   33.258837] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0300 state to ffff8800b91ae200
>[   33.258840] [drm:drm_atomic_commit] commiting ffff8800b91ae200
>[   33.258857] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae200
>[   33.258859] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae200
>[   33.268918] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ad600
>[   33.268922] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0cc0 state to ffff8800b91ad600
>[   33.268925] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91ad600
>[   33.268926] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0cc0 to [CRTC:21]
>[   33.268927] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0cc0
>[   33.268928] [drm:drm_atomic_check_only] checking ffff8800b91ad600
>[   33.268932] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.268934] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.268935] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e00c0 state to ffff8800b91ad600
>[   33.268937] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0900 state to ffff8800b91ad600
>[   33.268940] [drm:drm_atomic_commit] commiting ffff8800b91ad600
>[   33.268956] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ad600
>[   33.268958] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ad600
>[   33.278019] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae000
>[   33.278023] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0300 state to ffff8800b91ae000
>[   33.278026] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91ae000
>[   33.278027] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0300 to [CRTC:21]
>[   33.278028] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0300
>[   33.278029] [drm:drm_atomic_check_only] checking ffff8800b91ae000
>[   33.278033] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.278034] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.278036] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0d80 state to ffff8800b91ae000
>[   33.278038] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0e40 state to ffff8800b91ae000
>[   33.278041] [drm:drm_atomic_commit] commiting ffff8800b91ae000
>[   33.278057] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae000
>[   33.278059] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae000
>[   33.287972] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af400
>[   33.287976] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0900 state to ffff8800b91af400
>[   33.287978] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91af400
>[   33.287979] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0900 to [CRTC:21]
>[   33.287980] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0900
>[   33.287981] [drm:drm_atomic_check_only] checking ffff8800b91af400
>[   33.287985] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.287987] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.287988] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0cc0 state to ffff8800b91af400
>[   33.287990] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e00c0 state to ffff8800b91af400
>[   33.287993] [drm:drm_atomic_commit] commiting ffff8800b91af400
>[   33.288010] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af400
>[   33.288012] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af400
>[   33.297996] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aea00
>[   33.298000] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0e40 state to ffff8800b91aea00
>[   33.298002] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91aea00
>[   33.298003] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0e40 to [CRTC:21]
>[   33.298004] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0e40
>[   33.298006] [drm:drm_atomic_check_only] checking ffff8800b91aea00
>[   33.298009] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.298011] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.298013] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0300 state to ffff8800b91aea00
>[   33.298014] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0d80 state to ffff8800b91aea00
>[   33.298017] [drm:drm_atomic_commit] commiting ffff8800b91aea00
>[   33.298033] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aea00
>[   33.298036] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aea00
>[   33.559705] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aca00
>[   33.559716] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e00c0 state to ffff8800b91aca00
>[   33.559722] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91aca00
>[   33.559726] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e00c0 to [CRTC:21]
>[   33.559730] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e00c0
>[   33.559733] [drm:drm_atomic_check_only] checking ffff8800b91aca00
>[   33.559744] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.559748] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.559754] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0900 state to ffff8800b91aca00
>[   33.559758] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0cc0 state to ffff8800b91aca00
>[   33.559766] [drm:drm_atomic_commit] commiting ffff8800b91aca00
>[   33.559807] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aca00
>[   33.559812] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aca00
>[   33.568657] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aea00
>[   33.568666] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0d80 state to ffff8800b91aea00
>[   33.568670] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91aea00
>[   33.568673] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0d80 to [CRTC:21]
>[   33.568676] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0d80
>[   33.568678] [drm:drm_atomic_check_only] checking ffff8800b91aea00
>[   33.568686] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.568689] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.568694] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0e40 state to ffff8800b91aea00
>[   33.568697] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0300 state to ffff8800b91aea00
>[   33.568703] [drm:drm_atomic_commit] commiting ffff8800b91aea00
>[   33.568735] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aea00
>[   33.568739] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aea00
>[   33.578680] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af400
>[   33.578684] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0cc0 state to ffff8800b91af400
>[   33.578687] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91af400
>[   33.578688] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0cc0 to [CRTC:21]
>[   33.578690] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0cc0
>[   33.578691] [drm:drm_atomic_check_only] checking ffff8800b91af400
>[   33.578696] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.578697] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.578699] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e00c0 state to ffff8800b91af400
>[   33.578701] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0900 state to ffff8800b91af400
>[   33.578704] [drm:drm_atomic_commit] commiting ffff8800b91af400
>[   33.578724] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af400
>[   33.578726] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af400
>[   33.587716] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae000
>[   33.587721] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0300 state to ffff8800b91ae000
>[   33.587723] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91ae000
>[   33.587725] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0300 to [CRTC:21]
>[   33.587726] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0300
>[   33.587727] [drm:drm_atomic_check_only] checking ffff8800b91ae000
>[   33.587732] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.587733] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.587735] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0d80 state to ffff8800b91ae000
>[   33.587737] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0e40 state to ffff8800b91ae000
>[   33.587740] [drm:drm_atomic_commit] commiting ffff8800b91ae000
>[   33.587760] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae000
>[   33.587762] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae000
>[   33.597768] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ad600
>[   33.597773] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0900 state to ffff8800b91ad600
>[   33.597775] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91ad600
>[   33.597777] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0900 to [CRTC:21]
>[   33.597778] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0900
>[   33.597779] [drm:drm_atomic_check_only] checking ffff8800b91ad600
>[   33.597783] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.597784] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.597787] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0cc0 state to ffff8800b91ad600
>[   33.597788] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e00c0 state to ffff8800b91ad600
>[   33.597791] [drm:drm_atomic_commit] commiting ffff8800b91ad600
>[   33.597809] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ad600
>[   33.597811] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ad600
>[   33.607899] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae200
>[   33.607903] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0e40 state to ffff8800b91ae200
>[   33.607905] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91ae200
>[   33.607907] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0e40 to [CRTC:21]
>[   33.607908] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0e40
>[   33.607910] [drm:drm_atomic_check_only] checking ffff8800b91ae200
>[   33.607929] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.607930] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.607932] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0300 state to ffff8800b91ae200
>[   33.607934] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0d80 state to ffff8800b91ae200
>[   33.607937] [drm:drm_atomic_commit] commiting ffff8800b91ae200
>[   33.607955] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae200
>[   33.607958] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae200
>[   33.616988] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91afc00
>[   33.616993] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e00c0 state to ffff8800b91afc00
>[   33.616996] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91afc00
>[   33.616998] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e00c0 to [CRTC:21]
>[   33.616999] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e00c0
>[   33.617001] [drm:drm_atomic_check_only] checking ffff8800b91afc00
>[   33.617006] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.617007] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.617010] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0900 state to ffff8800b91afc00
>[   33.617012] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0cc0 state to ffff8800b91afc00
>[   33.617016] [drm:drm_atomic_commit] commiting ffff8800b91afc00
>[   33.617031] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91afc00
>[   33.617033] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91afc00
>[   33.617141] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91adc00
>[   33.617143] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0d80 state to ffff8800b91adc00
>[   33.617145] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797d800 state to ffff8800b91adc00
>[   33.617147] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0d80 to [CRTC:21]
>[   33.617148] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0d80
>[   33.617149] [drm:drm_atomic_check_only] checking ffff8800b91adc00
>[   33.617152] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.617153] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.617156] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0e40 state to ffff8800b91adc00
>[   33.617157] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0300 state to ffff8800b91adc00
>[   33.617159] [drm:drm_atomic_commit] commiting ffff8800b91adc00
>[   33.617172] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91adc00
>[   33.617174] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91adc00
>[   33.636238] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ac600
>[   33.636242] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0cc0 state to ffff8800b91ac600
>[   33.636244] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91ac600
>[   33.636245] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0cc0 to [CRTC:21]
>[   33.636246] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0cc0
>[   33.636247] [drm:drm_atomic_check_only] checking ffff8800b91ac600
>[   33.636251] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.636253] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.636254] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e00c0 state to ffff8800b91ac600
>[   33.636256] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0900 state to ffff8800b91ac600
>[   33.636259] [drm:drm_atomic_commit] commiting ffff8800b91ac600
>[   33.636275] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ac600
>[   33.636277] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ac600
>[   33.977447] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae000
>[   33.977450] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0300 state to ffff8800b91ae000
>[   33.977452] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797ec00 state to ffff8800b91ae000
>[   33.977453] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0300 to [CRTC:21]
>[   33.977454] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0300
>[   33.977455] [drm:drm_atomic_check_only] checking ffff8800b91ae000
>[   33.977459] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.977460] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.977462] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0d80 state to ffff8800b91ae000
>[   33.977463] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0e40 state to ffff8800b91ae000
>[   33.977474] [drm:drm_atomic_commit] commiting ffff8800b91ae000
>[   33.977488] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae000
>[   33.977490] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae000
>[   33.978181] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ac800
>[   33.978184] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0900 state to ffff8800b91ac800
>[   33.978186] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91ac800
>[   33.978187] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0900 to [CRTC:21]
>[   33.978188] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0900
>[   33.978189] [drm:drm_atomic_check_only] checking ffff8800b91ac800
>[   33.978192] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   33.978193] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   33.978195] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0cc0 state to ffff8800b91ac800
>[   33.978196] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e00c0 state to ffff8800b91ac800
>[   33.978199] [drm:drm_atomic_commit] commiting ffff8800b91ac800
>[   33.978212] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ac800
>[   33.978213] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ac800
>[   34.101806] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91adc00
>[   34.101810] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0300 state to ffff8800b91adc00
>[   34.101812] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797cc00 state to ffff8800b91adc00
>[   34.101813] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0300 to [CRTC:21]
>[   34.101815] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0300
>[   34.101816] [drm:drm_atomic_check_only] checking ffff8800b91adc00
>[   34.101819] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.101821] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.101822] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0d80 state to ffff8800b91adc00
>[   34.101824] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0b40 state to ffff8800b91adc00
>[   34.101827] [drm:drm_atomic_commit] commiting ffff8800b91adc00
>[   34.101844] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91adc00
>[   34.101845] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91adc00
>[   34.110842] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91afc00
>[   34.110846] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e00c0 state to ffff8800b91afc00
>[   34.110849] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91afc00
>[   34.110850] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e00c0 to [CRTC:21]
>[   34.110851] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e00c0
>[   34.110852] [drm:drm_atomic_check_only] checking ffff8800b91afc00
>[   34.110856] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.110858] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.110860] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0900 state to ffff8800b91afc00
>[   34.110861] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0cc0 state to ffff8800b91afc00
>[   34.110864] [drm:drm_atomic_commit] commiting ffff8800b91afc00
>[   34.110881] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91afc00
>[   34.110883] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91afc00
>[   34.120826] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ac400
>[   34.120830] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0b40 state to ffff8800b91ac400
>[   34.120832] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797cc00 state to ffff8800b91ac400
>[   34.120833] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0b40 to [CRTC:21]
>[   34.120835] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0b40
>[   34.120836] [drm:drm_atomic_check_only] checking ffff8800b91ac400
>[   34.120840] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.120841] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.120843] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0300 state to ffff8800b91ac400
>[   34.120844] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0d80 state to ffff8800b91ac400
>[   34.120847] [drm:drm_atomic_commit] commiting ffff8800b91ac400
>[   34.120864] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ac400
>[   34.120866] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ac400
>[   34.130876] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af800
>[   34.130880] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0cc0 state to ffff8800b91af800
>[   34.130882] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91af800
>[   34.130883] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0cc0 to [CRTC:21]
>[   34.130884] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0cc0
>[   34.130885] [drm:drm_atomic_check_only] checking ffff8800b91af800
>[   34.130889] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.130891] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.130894] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e00c0 state to ffff8800b91af800
>[   34.130895] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0900 state to ffff8800b91af800
>[   34.130898] [drm:drm_atomic_commit] commiting ffff8800b91af800
>[   34.130912] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af800
>[   34.130913] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af800
>[   34.139816] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae000
>[   34.139821] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0840 state to ffff8800b91ae000
>[   34.139824] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797cc00 state to ffff8800b91ae000
>[   34.139826] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0840 to [CRTC:21]
>[   34.139827] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0840
>[   34.139829] [drm:drm_atomic_check_only] checking ffff8800b91ae000
>[   34.139834] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.139836] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.139839] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0180 state to ffff8800b91ae000
>[   34.139841] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0a80 state to ffff8800b91ae000
>[   34.139845] [drm:drm_atomic_commit] commiting ffff8800b91ae000
>[   34.139864] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae000
>[   34.139866] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae000
>[   34.149820] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712da00
>[   34.149827] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096c780 state to ffff8800b712da00
>[   34.149830] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092259c00 state to ffff8800b712da00
>[   34.149833] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096c780 to [CRTC:21]
>[   34.149835] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88022096c780
>[   34.149837] [drm:drm_atomic_check_only] checking ffff8800b712da00
>[   34.149844] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.149845] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.149848] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096c300 state to ffff8800b712da00
>[   34.149850] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096c480 state to ffff8800b712da00
>[   34.149855] [drm:drm_atomic_commit] commiting ffff8800b712da00
>[   34.149884] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712da00
>[   34.149887] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712da00
>[   34.159720] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712c800
>[   34.159727] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096cd80 state to ffff8800b712c800
>[   34.159731] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a000 state to ffff8800b712c800
>[   34.159732] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096cd80 to [CRTC:21]
>[   34.159734] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88022096cd80
>[   34.159736] [drm:drm_atomic_check_only] checking ffff8800b712c800
>[   34.159742] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.159743] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.159747] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b7aef000 state to ffff8800b712c800
>[   34.159749] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b7aef6c0 state to ffff8800b712c800
>[   34.159754] [drm:drm_atomic_commit] commiting ffff8800b712c800
>[   34.159777] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712c800
>[   34.159780] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712c800
>[   34.168690] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aca00
>[   34.168695] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0a80 state to ffff8800b91aca00
>[   34.168697] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797fc00 state to ffff8800b91aca00
>[   34.168699] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0a80 to [CRTC:21]
>[   34.168700] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0a80
>[   34.168701] [drm:drm_atomic_check_only] checking ffff8800b91aca00
>[   34.168705] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.168706] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.168708] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0840 state to ffff8800b91aca00
>[   34.168710] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0180 state to ffff8800b91aca00
>[   34.168713] [drm:drm_atomic_commit] commiting ffff8800b91aca00
>[   34.168727] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aca00
>[   34.168729] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aca00
>[   34.178630] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712e200
>[   34.178635] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b7aef9c0 state to ffff8800b712e200
>[   34.178638] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092259c00 state to ffff8800b712e200
>[   34.178639] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b7aef9c0 to [CRTC:21]
>[   34.178640] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b7aef9c0
>[   34.178642] [drm:drm_atomic_check_only] checking ffff8800b712e200
>[   34.178646] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.178648] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.178650] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b7aeff00 state to ffff8800b712e200
>[   34.178652] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b7aef540 state to ffff8800b712e200
>[   34.178656] [drm:drm_atomic_commit] commiting ffff8800b712e200
>[   34.178673] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712e200
>[   34.178675] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712e200
>[   34.188622] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ecaa00
>[   34.188626] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b711e780 state to ffff880222ecaa00
>[   34.188628] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3a1400 state to ffff880222ecaa00
>[   34.188629] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b711e780 to [CRTC:21]
>[   34.188631] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b711e780
>[   34.188632] [drm:drm_atomic_check_only] checking ffff880222ecaa00
>[   34.188636] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.188637] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.188639] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b711e3c0 state to ffff880222ecaa00
>[   34.188641] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223162d80 state to ffff880222ecaa00
>[   34.188644] [drm:drm_atomic_commit] commiting ffff880222ecaa00
>[   34.188656] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ecaa00
>[   34.188658] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ecaa00
>[   34.198704] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af600
>[   34.198708] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0480 state to ffff8800b91af600
>[   34.198710] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b797ac00 state to ffff8800b91af600
>[   34.198711] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0480 to [CRTC:21]
>[   34.198712] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0480
>[   34.198713] [drm:drm_atomic_check_only] checking ffff8800b91af600
>[   34.198717] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.198719] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.198720] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0600 state to ffff8800b91af600
>[   34.198723] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0f00 state to ffff8800b91af600
>[   34.198726] [drm:drm_atomic_commit] commiting ffff8800b91af600
>[   34.198739] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af600
>[   34.198741] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af600
>[   34.207628] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712c200
>[   34.207632] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b7aeff00 state to ffff8800b712c200
>[   34.207636] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a800 state to ffff8800b712c200
>[   34.207637] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b7aeff00 to [CRTC:21]
>[   34.207639] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b7aeff00
>[   34.207640] [drm:drm_atomic_check_only] checking ffff8800b712c200
>[   34.207644] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.207645] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.207647] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b7aef6c0 state to ffff8800b712c200
>[   34.207648] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b7aef000 state to ffff8800b712c200
>[   34.207651] [drm:drm_atomic_commit] commiting ffff8800b712c200
>[   34.207669] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712c200
>[   34.207672] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712c200
>[   34.219049] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712dc00
>[   34.219053] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880034622600 state to ffff8800b712dc00
>[   34.219055] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225c800 state to ffff8800b712dc00
>[   34.219056] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880034622600 to [CRTC:21]
>[   34.219058] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff880034622600
>[   34.219059] [drm:drm_atomic_check_only] checking ffff8800b712dc00
>[   34.219066] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.219067] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.219069] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800346226c0 state to ffff8800b712dc00
>[   34.219070] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880034622840 state to ffff8800b712dc00
>[   34.219073] [drm:drm_atomic_commit] commiting ffff8800b712dc00
>[   34.219090] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712dc00
>[   34.219092] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712dc00
>[   34.227665] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ed3800
>[   34.227670] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b93bc840 state to ffff880222ed3800
>[   34.227673] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3afc00 state to ffff880222ed3800
>[   34.227674] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b93bc840 to [CRTC:21]
>[   34.227676] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b93bc840
>[   34.227678] [drm:drm_atomic_check_only] checking ffff880222ed3800
>[   34.227683] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.227684] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.227687] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b93bcd80 state to ffff880222ed3800
>[   34.227689] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b93bccc0 state to ffff880222ed3800
>[   34.227693] [drm:drm_atomic_commit] commiting ffff880222ed3800
>[   34.227707] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ed3800
>[   34.227710] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ed3800
>[   34.236722] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ed3600
>[   34.236726] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b93bc180 state to ffff880222ed3600
>[   34.236727] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1952000 state to ffff880222ed3600
>[   34.236728] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b93bc180 to [CRTC:21]
>[   34.236730] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b93bc180
>[   34.236730] [drm:drm_atomic_check_only] checking ffff880222ed3600
>[   34.236734] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.236736] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.236738] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b93bc3c0 state to ffff880222ed3600
>[   34.236739] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b93bc540 state to ffff880222ed3600
>[   34.236742] [drm:drm_atomic_commit] commiting ffff880222ed3600
>[   34.236820] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ed3600
>[   34.236822] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ed3600
>[   34.246734] [drm:drm_atomic_state_init] Allocated atomic state ffff880222eca800
>[   34.246743] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b91543c0 state to ffff880222eca800
>[   34.246747] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1913c00 state to ffff880222eca800
>[   34.246749] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b91543c0 to [CRTC:21]
>[   34.246750] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b91543c0
>[   34.246752] [drm:drm_atomic_check_only] checking ffff880222eca800
>[   34.246760] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.246761] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.246765] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8802243dcf00 state to ffff880222eca800
>[   34.246767] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800354f5d80 state to ffff880222eca800
>[   34.246773] [drm:drm_atomic_commit] commiting ffff880222eca800
>[   34.246797] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222eca800
>[   34.246799] [drm:drm_atomic_state_free] Freeing atomic state ffff880222eca800
>[   34.256661] [drm:drm_atomic_state_init] Allocated atomic state ffff880222eca200
>[   34.256666] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b9294e40 state to ffff880222eca200
>[   34.256669] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1914000 state to ffff880222eca200
>[   34.256671] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b9294e40 to [CRTC:21]
>[   34.256672] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b9294e40
>[   34.256674] [drm:drm_atomic_check_only] checking ffff880222eca200
>[   34.256679] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.256680] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.256683] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b9294780 state to ffff880222eca200
>[   34.256685] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b9294d80 state to ffff880222eca200
>[   34.256688] [drm:drm_atomic_commit] commiting ffff880222eca200
>[   34.256704] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222eca200
>[   34.256708] [drm:drm_atomic_state_free] Freeing atomic state ffff880222eca200
>[   34.265866] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91adc00
>[   34.265870] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0000 state to ffff8800b91adc00
>[   34.265872] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c2400 state to ffff8800b91adc00
>[   34.265874] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0000 to [CRTC:21]
>[   34.265875] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0000
>[   34.265876] [drm:drm_atomic_check_only] checking ffff8800b91adc00
>[   34.265880] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.265881] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.265883] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0540 state to ffff8800b91adc00
>[   34.265884] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0240 state to ffff8800b91adc00
>[   34.265887] [drm:drm_atomic_commit] commiting ffff8800b91adc00
>[   34.265902] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91adc00
>[   34.265904] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91adc00
>[   34.275773] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af600
>[   34.275777] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0480 state to ffff8800b91af600
>[   34.275780] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c5800 state to ffff8800b91af600
>[   34.275781] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0480 to [CRTC:21]
>[   34.275782] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0480
>[   34.275783] [drm:drm_atomic_check_only] checking ffff8800b91af600
>[   34.275788] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.275789] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.275791] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0600 state to ffff8800b91af600
>[   34.275792] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0180 state to ffff8800b91af600
>[   34.275795] [drm:drm_atomic_commit] commiting ffff8800b91af600
>[   34.275814] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af600
>[   34.275816] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af600
>[   34.287450] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aee00
>[   34.287454] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0840 state to ffff8800b91aee00
>[   34.287456] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c2400 state to ffff8800b91aee00
>[   34.287457] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0840 to [CRTC:21]
>[   34.287458] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0840
>[   34.287459] [drm:drm_atomic_check_only] checking ffff8800b91aee00
>[   34.287462] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.287463] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.287468] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b9cc7000 state to ffff8800b91aee00
>[   34.287469] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b9cc7b40 state to ffff8800b91aee00
>[   34.287472] [drm:drm_atomic_commit] commiting ffff8800b91aee00
>[   34.287489] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aee00
>[   34.287491] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aee00
>[   34.294762] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ada00
>[   34.294766] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b9cc7540 state to ffff8800b91ada00
>[   34.294768] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c5800 state to ffff8800b91ada00
>[   34.294769] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b9cc7540 to [CRTC:21]
>[   34.294770] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b9cc7540
>[   34.294771] [drm:drm_atomic_check_only] checking ffff8800b91ada00
>[   34.294775] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.294776] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.294778] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b9cc7a80 state to ffff8800b91ada00
>[   34.294781] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0180 state to ffff8800b91ada00
>[   34.294784] [drm:drm_atomic_commit] commiting ffff8800b91ada00
>[   34.294796] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ada00
>[   34.294798] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ada00
>[   34.304758] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af600
>[   34.304763] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0480 state to ffff8800b91af600
>[   34.304766] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c2400 state to ffff8800b91af600
>[   34.304767] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0480 to [CRTC:21]
>[   34.304768] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0480
>[   34.304770] [drm:drm_atomic_check_only] checking ffff8800b91af600
>[   34.304775] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.304776] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.304778] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0600 state to ffff8800b91af600
>[   34.304783] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b9cc7b40 state to ffff8800b91af600
>[   34.304787] [drm:drm_atomic_commit] commiting ffff8800b91af600
>[   34.304925] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af600
>[   34.304927] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af600
>[   34.314786] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af200
>[   34.314793] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b9cc7000 state to ffff8800b91af200
>[   34.314796] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c5800 state to ffff8800b91af200
>[   34.314797] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b9cc7000 to [CRTC:21]
>[   34.314799] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b9cc7000
>[   34.314800] [drm:drm_atomic_check_only] checking ffff8800b91af200
>[   34.314806] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.314807] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.314811] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0180 state to ffff8800b91af200
>[   34.314813] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223162d80 state to ffff8800b91af200
>[   34.314820] [drm:drm_atomic_commit] commiting ffff8800b91af200
>[   34.314846] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af200
>[   34.314849] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af200
>[   34.323708] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ecbe00
>[   34.323712] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b9294780 state to ffff880222ecbe00
>[   34.323714] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1913c00 state to ffff880222ecbe00
>[   34.323715] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b9294780 to [CRTC:21]
>[   34.323717] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b9294780
>[   34.323718] [drm:drm_atomic_check_only] checking ffff880222ecbe00
>[   34.323723] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.323724] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.323727] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800354f5d80 state to ffff880222ecbe00
>[   34.323728] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b91543c0 state to ffff880222ecbe00
>[   34.323731] [drm:drm_atomic_commit] commiting ffff880222ecbe00
>[   34.323748] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ecbe00
>[   34.323750] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ecbe00
>[   34.333794] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af200
>[   34.333798] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223162d80 state to ffff8800b91af200
>[   34.333801] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c2400 state to ffff8800b91af200
>[   34.333802] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223162d80 to [CRTC:21]
>[   34.333803] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff880223162d80
>[   34.333804] [drm:drm_atomic_check_only] checking ffff8800b91af200
>[   34.333808] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.333810] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.333812] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b9cc7000 state to ffff8800b91af200
>[   34.333813] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b9cc7b40 state to ffff8800b91af200
>[   34.333817] [drm:drm_atomic_commit] commiting ffff8800b91af200
>[   34.333831] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af200
>[   34.333833] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af200
>[   34.362960] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712c000
>[   34.362966] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880034622840 state to ffff8800b712c000
>[   34.362969] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225ec00 state to ffff8800b712c000
>[   34.362972] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880034622840 to [CRTC:21]
>[   34.362974] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff880034622840
>[   34.362975] [drm:drm_atomic_check_only] checking ffff8800b712c000
>[   34.362983] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.362985] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.362988] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880034622600 state to ffff8800b712c000
>[   34.362991] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800346226c0 state to ffff8800b712c000
>[   34.362995] [drm:drm_atomic_commit] commiting ffff8800b712c000
>[   34.363011] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712c000
>[   34.363014] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712c000
>[   34.411011] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712f800
>[   34.411016] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800347fbe40 state to ffff8800b712f800
>[   34.411019] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225f000 state to ffff8800b712f800
>[   34.411021] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800347fbe40 to [CRTC:21]
>[   34.411022] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800347fbe40
>[   34.411024] [drm:drm_atomic_check_only] checking ffff8800b712f800
>[   34.411028] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.411030] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.411032] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800347fbd80 state to ffff8800b712f800
>[   34.411034] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800347fbb40 state to ffff8800b712f800
>[   34.411038] [drm:drm_atomic_commit] commiting ffff8800b712f800
>[   34.411056] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712f800
>[   34.411058] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712f800
>[   34.420992] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712f400
>[   34.420998] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800347fb9c0 state to ffff8800b712f400
>[   34.421001] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225ec00 state to ffff8800b712f400
>[   34.421002] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800347fb9c0 to [CRTC:21]
>[   34.421003] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800347fb9c0
>[   34.421004] [drm:drm_atomic_check_only] checking ffff8800b712f400
>[   34.421012] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.421013] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.421015] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800347fb300 state to ffff8800b712f400
>[   34.421016] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800347fb480 state to ffff8800b712f400
>[   34.421022] [drm:drm_atomic_commit] commiting ffff8800b712f400
>[   34.421504] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712f400
>[   34.421506] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712f400
>[   34.431052] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af800
>[   34.431056] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b81e0480 state to ffff8800b91af800
>[   34.431058] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c0c00 state to ffff8800b91af800
>[   34.431059] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b81e0480 to [CRTC:21]
>[   34.431060] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b81e0480
>[   34.431061] [drm:drm_atomic_check_only] checking ffff8800b91af800
>[   34.431066] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.431067] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.431069] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0600 state to ffff8800b91af800
>[   34.431071] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021faf7780 state to ffff8800b91af800
>[   34.431074] [drm:drm_atomic_commit] commiting ffff8800b91af800
>[   34.431091] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af800
>[   34.431093] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af800
>[   34.439946] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91afc00
>[   34.439951] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021faf7300 state to ffff8800b91afc00
>[   34.439953] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c4800 state to ffff8800b91afc00
>[   34.439955] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021faf7300 to [CRTC:21]
>[   34.439956] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88021faf7300
>[   34.439957] [drm:drm_atomic_check_only] checking ffff8800b91afc00
>[   34.439961] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.439962] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.439964] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021f779240 state to ffff8800b91afc00
>[   34.439966] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021f779000 state to ffff8800b91afc00
>[   34.439969] [drm:drm_atomic_commit] commiting ffff8800b91afc00
>[   34.439987] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91afc00
>[   34.439989] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91afc00
>[   34.449964] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af000
>[   34.449968] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021faf7780 state to ffff8800b91af000
>[   34.449971] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c0c00 state to ffff8800b91af000
>[   34.449972] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021faf7780 to [CRTC:21]
>[   34.449973] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88021faf7780
>[   34.449974] [drm:drm_atomic_check_only] checking ffff8800b91af000
>[   34.449978] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.449979] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.449981] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0480 state to ffff8800b91af000
>[   34.449983] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0600 state to ffff8800b91af000
>[   34.449987] [drm:drm_atomic_commit] commiting ffff8800b91af000
>[   34.450003] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af000
>[   34.450005] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af000
>[   34.460150] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aee00
>[   34.460158] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021faf7300 state to ffff8800b91aee00
>[   34.460162] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c4800 state to ffff8800b91aee00
>[   34.460165] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021faf7300 to [CRTC:21]
>[   34.460166] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88021faf7300
>[   34.460168] [drm:drm_atomic_check_only] checking ffff8800b91aee00
>[   34.460177] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.460179] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.460183] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021f779000 state to ffff8800b91aee00
>[   34.460186] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021f779240 state to ffff8800b91aee00
>[   34.460193] [drm:drm_atomic_commit] commiting ffff8800b91aee00
>[   34.460224] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aee00
>[   34.460227] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aee00
>[   34.469043] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae200
>[   34.469047] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021faf7780 state to ffff8800b91ae200
>[   34.469049] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c0c00 state to ffff8800b91ae200
>[   34.469051] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021faf7780 to [CRTC:21]
>[   34.469052] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88021faf7780
>[   34.469053] [drm:drm_atomic_check_only] checking ffff8800b91ae200
>[   34.469057] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.469058] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.469060] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b81e0600 state to ffff8800b91ae200
>[   34.469062] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b81e0480 state to ffff8800b91ae200
>[   34.469065] [drm:drm_atomic_commit] commiting ffff8800b91ae200
>[   34.469078] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae200
>[   34.469080] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae200
>[   34.479183] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712fe00
>[   34.479193] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800347fb780 state to ffff8800b712fe00
>[   34.479196] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225f000 state to ffff8800b712fe00
>[   34.479198] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800347fb780 to [CRTC:21]
>[   34.479199] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800347fb780
>[   34.479201] [drm:drm_atomic_check_only] checking ffff8800b712fe00
>[   34.479210] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.479211] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.479214] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800347fb6c0 state to ffff8800b712fe00
>[   34.479217] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800347fb3c0 state to ffff8800b712fe00
>[   34.479222] [drm:drm_atomic_commit] commiting ffff8800b712fe00
>[   34.479247] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712fe00
>[   34.479251] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712fe00
>[   34.753200] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af400
>[   34.753204] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021f779240 state to ffff8800b91af400
>[   34.753205] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c0800 state to ffff8800b91af400
>[   34.753206] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021f779240 to [CRTC:21]
>[   34.753208] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88021f779240
>[   34.753208] [drm:drm_atomic_check_only] checking ffff8800b91af400
>[   34.753212] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.753213] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.753223] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021f779000 state to ffff8800b91af400
>[   34.753225] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b3c0 state to ffff8800b91af400
>[   34.753228] [drm:drm_atomic_commit] commiting ffff8800b91af400
>[   34.753243] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af400
>[   34.753245] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af400
>[   34.755450] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af800
>[   34.755454] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b0c0 state to ffff8800b91af800
>[   34.755455] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c1000 state to ffff8800b91af800
>[   34.755456] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b0c0 to [CRTC:21]
>[   34.755457] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88022096b0c0
>[   34.755458] [drm:drm_atomic_check_only] checking ffff8800b91af800
>[   34.755463] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.755464] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.755466] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b480 state to ffff8800b91af800
>[   34.755467] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b600 state to ffff8800b91af800
>[   34.755470] [drm:drm_atomic_commit] commiting ffff8800b91af800
>[   34.755484] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af800
>[   34.755486] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af800
>[   34.799025] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae200
>[   34.799028] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b3c0 state to ffff8800b91ae200
>[   34.799031] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c0800 state to ffff8800b91ae200
>[   34.799032] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b3c0 to [CRTC:21]
>[   34.799033] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88022096b3c0
>[   34.799034] [drm:drm_atomic_check_only] checking ffff8800b91ae200
>[   34.799038] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.799039] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.799042] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b240 state to ffff8800b91ae200
>[   34.799043] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b000 state to ffff8800b91ae200
>[   34.799046] [drm:drm_atomic_commit] commiting ffff8800b91ae200
>[   34.799062] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae200
>[   34.799064] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae200
>[   34.799123] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91adc00
>[   34.799125] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b600 state to ffff8800b91adc00
>[   34.799127] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c1000 state to ffff8800b91adc00
>[   34.799128] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b600 to [CRTC:21]
>[   34.799129] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88022096b600
>[   34.799131] [drm:drm_atomic_check_only] checking ffff8800b91adc00
>[   34.799133] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.799135] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.799136] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b0c0 state to ffff8800b91adc00
>[   34.799138] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b480 state to ffff8800b91adc00
>[   34.799140] [drm:drm_atomic_commit] commiting ffff8800b91adc00
>[   34.799152] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91adc00
>[   34.799154] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91adc00
>[   34.807916] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae000
>[   34.807920] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b000 state to ffff8800b91ae000
>[   34.807923] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c0800 state to ffff8800b91ae000
>[   34.807925] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b000 to [CRTC:21]
>[   34.807926] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88022096b000
>[   34.807928] [drm:drm_atomic_check_only] checking ffff8800b91ae000
>[   34.807932] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.807934] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.807937] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b3c0 state to ffff8800b91ae000
>[   34.807939] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b240 state to ffff8800b91ae000
>[   34.807942] [drm:drm_atomic_commit] commiting ffff8800b91ae000
>[   34.807961] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae000
>[   34.807963] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae000
>[   34.808590] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ac800
>[   34.808593] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b480 state to ffff8800b91ac800
>[   34.808595] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c1000 state to ffff8800b91ac800
>[   34.808596] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b480 to [CRTC:21]
>[   34.808598] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88022096b480
>[   34.808599] [drm:drm_atomic_check_only] checking ffff8800b91ac800
>[   34.808602] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.808604] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.808605] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b600 state to ffff8800b91ac800
>[   34.808607] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b0c0 state to ffff8800b91ac800
>[   34.808609] [drm:drm_atomic_commit] commiting ffff8800b91ac800
>[   34.808623] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ac800
>[   34.808625] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ac800
>[   34.808714] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ac400
>[   34.808716] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b240 state to ffff8800b91ac400
>[   34.808718] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c0800 state to ffff8800b91ac400
>[   34.808719] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b240 to [CRTC:21]
>[   34.808721] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88022096b240
>[   34.808722] [drm:drm_atomic_check_only] checking ffff8800b91ac400
>[   34.808725] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.808726] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.808727] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b000 state to ffff8800b91ac400
>[   34.808728] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b3c0 state to ffff8800b91ac400
>[   34.808730] [drm:drm_atomic_commit] commiting ffff8800b91ac400
>[   34.808740] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ac400
>[   34.808742] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ac400
>[   34.817947] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aea00
>[   34.817951] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b0c0 state to ffff8800b91aea00
>[   34.817953] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c1000 state to ffff8800b91aea00
>[   34.817954] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b0c0 to [CRTC:21]
>[   34.817956] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88022096b0c0
>[   34.817957] [drm:drm_atomic_check_only] checking ffff8800b91aea00
>[   34.817961] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.817962] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.817964] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b480 state to ffff8800b91aea00
>[   34.817965] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b600 state to ffff8800b91aea00
>[   34.817970] [drm:drm_atomic_commit] commiting ffff8800b91aea00
>[   34.817986] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aea00
>[   34.817988] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aea00
>[   34.823453] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af000
>[   34.823457] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b000 state to ffff8800b91af000
>[   34.823458] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c0800 state to ffff8800b91af000
>[   34.823460] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b000 to [CRTC:21]
>[   34.823461] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88022096b000
>[   34.823462] [drm:drm_atomic_check_only] checking ffff8800b91af000
>[   34.823465] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.823467] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.823468] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b840 state to ffff8800b91af000
>[   34.823470] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b180 state to ffff8800b91af000
>[   34.823473] [drm:drm_atomic_commit] commiting ffff8800b91af000
>[   34.823489] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af000
>[   34.823490] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af000
>[   34.827882] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af600
>[   34.827885] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b600 state to ffff8800b91af600
>[   34.827887] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c1000 state to ffff8800b91af600
>[   34.827888] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b600 to [CRTC:21]
>[   34.827890] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88022096b600
>[   34.827891] [drm:drm_atomic_check_only] checking ffff8800b91af600
>[   34.827894] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.827895] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.827897] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b0c0 state to ffff8800b91af600
>[   34.827898] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b480 state to ffff8800b91af600
>[   34.827901] [drm:drm_atomic_commit] commiting ffff8800b91af600
>[   34.827912] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af600
>[   34.827913] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af600
>[   34.828117] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aca00
>[   34.828118] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b180 state to ffff8800b91aca00
>[   34.828120] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c0800 state to ffff8800b91aca00
>[   34.828121] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b180 to [CRTC:21]
>[   34.828122] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88022096b180
>[   34.828123] [drm:drm_atomic_check_only] checking ffff8800b91aca00
>[   34.828125] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.828126] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.828127] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b000 state to ffff8800b91aca00
>[   34.828128] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b840 state to ffff8800b91aca00
>[   34.828130] [drm:drm_atomic_commit] commiting ffff8800b91aca00
>[   34.828138] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aca00
>[   34.828140] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aca00
>[   34.836942] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af800
>[   34.836946] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b0c0 state to ffff8800b91af800
>[   34.836948] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c1000 state to ffff8800b91af800
>[   34.836949] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b0c0 to [CRTC:21]
>[   34.836951] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88022096b0c0
>[   34.836952] [drm:drm_atomic_check_only] checking ffff8800b91af800
>[   34.836956] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.836957] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.836959] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b780 state to ffff8800b91af800
>[   34.836960] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096bf00 state to ffff8800b91af800
>[   34.836963] [drm:drm_atomic_commit] commiting ffff8800b91af800
>[   34.836977] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af800
>[   34.836978] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af800
>[   34.846898] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ad600
>[   34.846902] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b840 state to ffff8800b91ad600
>[   34.846904] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c0800 state to ffff8800b91ad600
>[   34.846905] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b840 to [CRTC:21]
>[   34.846907] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88022096b840
>[   34.846908] [drm:drm_atomic_check_only] checking ffff8800b91ad600
>[   34.846912] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.846913] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.846915] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b180 state to ffff8800b91ad600
>[   34.846916] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b000 state to ffff8800b91ad600
>[   34.846919] [drm:drm_atomic_commit] commiting ffff8800b91ad600
>[   34.846933] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ad600
>[   34.846935] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ad600
>[   34.856926] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ada00
>[   34.856930] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b0c0 state to ffff8800b91ada00
>[   34.856933] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c1000 state to ffff8800b91ada00
>[   34.856934] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b0c0 to [CRTC:21]
>[   34.856935] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88022096b0c0
>[   34.856937] [drm:drm_atomic_check_only] checking ffff8800b91ada00
>[   34.856940] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.856942] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.856944] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b780 state to ffff8800b91ada00
>[   34.856946] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021f779240 state to ffff8800b91ada00
>[   34.856949] [drm:drm_atomic_commit] commiting ffff8800b91ada00
>[   34.856968] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ada00
>[   34.856970] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ada00
>[   34.865948] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91adc00
>[   34.865951] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021f779000 state to ffff8800b91adc00
>[   34.865954] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c0800 state to ffff8800b91adc00
>[   34.865955] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021f779000 to [CRTC:21]
>[   34.865956] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88021f779000
>[   34.865957] [drm:drm_atomic_check_only] checking ffff8800b91adc00
>[   34.865961] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.865963] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.865965] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b000 state to ffff8800b91adc00
>[   34.865966] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b840 state to ffff8800b91adc00
>[   34.865969] [drm:drm_atomic_commit] commiting ffff8800b91adc00
>[   34.865986] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91adc00
>[   34.865988] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91adc00
>[   34.876063] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aca00
>[   34.876067] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b0c0 state to ffff8800b91aca00
>[   34.876070] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c1000 state to ffff8800b91aca00
>[   34.876071] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b0c0 to [CRTC:21]
>[   34.876072] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88022096b0c0
>[   34.876073] [drm:drm_atomic_check_only] checking ffff8800b91aca00
>[   34.876078] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.876079] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.876081] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b780 state to ffff8800b91aca00
>[   34.876083] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b180 state to ffff8800b91aca00
>[   34.876086] [drm:drm_atomic_commit] commiting ffff8800b91aca00
>[   34.876103] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aca00
>[   34.876105] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aca00
>[   34.885543] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af600
>[   34.885547] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b840 state to ffff8800b91af600
>[   34.885549] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c0800 state to ffff8800b91af600
>[   34.885551] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b840 to [CRTC:21]
>[   34.885552] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88022096b840
>[   34.885553] [drm:drm_atomic_check_only] checking ffff8800b91af600
>[   34.885557] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.885558] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.885560] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b000 state to ffff8800b91af600
>[   34.885562] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021f779000 state to ffff8800b91af600
>[   34.885566] [drm:drm_atomic_commit] commiting ffff8800b91af600
>[   34.885582] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af600
>[   34.885584] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af600
>[   34.895659] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af400
>[   34.895663] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021f779240 state to ffff8800b91af400
>[   34.895665] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c1000 state to ffff8800b91af400
>[   34.895667] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021f779240 to [CRTC:21]
>[   34.895668] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88021f779240
>[   34.895669] [drm:drm_atomic_check_only] checking ffff8800b91af400
>[   34.895673] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.895674] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.895676] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b180 state to ffff8800b91af400
>[   34.895678] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b0c0 state to ffff8800b91af400
>[   34.895681] [drm:drm_atomic_commit] commiting ffff8800b91af400
>[   34.895716] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af400
>[   34.895720] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af400
>[   34.905764] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aee00
>[   34.905768] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b840 state to ffff8800b91aee00
>[   34.905770] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c0800 state to ffff8800b91aee00
>[   34.905772] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b840 to [CRTC:21]
>[   34.905773] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88022096b840
>[   34.905774] [drm:drm_atomic_check_only] checking ffff8800b91aee00
>[   34.905778] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 56
>[   34.905779] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   34.905782] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b000 state to ffff8800b91aee00
>[   34.905784] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b780 state to ffff8800b91aee00
>[   34.905787] [drm:drm_atomic_commit] commiting ffff8800b91aee00
>[   34.905803] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aee00
>[   34.905806] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aee00
>[   37.052586] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ec8e00
>[   37.052601] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880034d380c0 state to ffff880222ec8e00
>[   37.052610] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1917c00 state to ffff880222ec8e00
>[   37.052616] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880034d380c0 to [NOCRTC]
>[   37.052621] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880034d380c0
>[   37.052627] [drm:drm_atomic_check_only] checking ffff880222ec8e00
>[   37.052640] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb -1
>[   37.052647] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 0, off 1, on 0, ms 0
>[   37.052656] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880034d383c0 state to ffff880222ec8e00
>[   37.052664] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880034d38480 state to ffff880222ec8e00
>[   37.052676] [drm:drm_atomic_commit] commiting ffff880222ec8e00
>[   37.052739] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ec8e00
>[   37.052748] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ec8e00
>[   49.253335] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101210, pins 0x00000040
>[   49.253344] [drm:intel_hpd_irq_handler] digital hpd port C - long
>[   49.253348] [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 6 - cnt: 0
>[   49.253392] [drm:intel_dp_hpd_pulse] got hpd irq on port C - long
>[   49.253906] [drm:intel_dp_get_dpcd] DPCD: 12 14 c2 01 00 15 01 83 02 00 00 00 00 00 04
>[   49.253915] [drm:intel_dp_get_dpcd] Display Port TPS3 support: source yes, sink yes
>[   49.253926] [drm:intel_dp_print_rates] source rates: 162000, 270000, 540000
>[   49.253933] [drm:intel_dp_print_rates] sink rates: 162000, 270000, 540000
>[   49.253939] [drm:intel_dp_print_rates] common rates: 162000, 270000, 540000
>[   49.254853] [drm:intel_dp_probe_oui] Sink OUI: 000000
>[   49.255225] [drm:intel_dp_probe_oui] Branch OUI: 90cc24
>[   49.255572] [drm:intel_dp_probe_mst] Sink is MST capable
>[   49.259075] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.259084] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.259125] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.259658] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.261503] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.261508] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.262403] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.262407] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.262417] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.262931] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.263680] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.263957] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.263987] [drm:drm_dp_send_link_address] link address reply: 4
>[   49.263990] [drm:drm_dp_send_link_address] port 0: input 1, pdt: 1, pn: 0, dpcd_rev: 00, mcs: 1, ddps: 1, ldps 0, sdp 0/0
>[   49.263994] [drm:drm_dp_send_link_address] port 1: input 0, pdt: 0, pn: 1, dpcd_rev: 00, mcs: 0, ddps: 0, ldps 0, sdp 0/0
>[   49.263997] [drm:drm_dp_send_link_address] port 2: input 0, pdt: 3, pn: 2, dpcd_rev: 12, mcs: 0, ddps: 1, ldps 0, sdp 1/1
>[   49.264000] [drm:drm_dp_send_link_address] port 3: input 0, pdt: 0, pn: 3, dpcd_rev: 00, mcs: 0, ddps: 0, ldps 0, sdp 0/0
>[   49.264653] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.264656] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.265567] [drm:drm_mode_getresources] [CONNECTOR:32:eDP-1]
>[   49.265569] [drm:drm_mode_getresources] [CONNECTOR:40:DP-1]
>[   49.265570] [drm:drm_mode_getresources] [CONNECTOR:44:HDMI-A-1]
>[   49.265571] [drm:drm_mode_getresources] [CONNECTOR:47:DP-2]
>[   49.265572] [drm:drm_mode_getresources] [CONNECTOR:51:HDMI-A-2]
>[   49.265573] [drm:drm_mode_getresources] [CONNECTOR:56:DP-3]
>[   49.265574] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[6] ENCODERS[9]
>[   49.265579] [drm:drm_mode_getconnector] [CONNECTOR:56:?]
>[   49.265583] [drm:drm_mode_getconnector] [CONNECTOR:56:?]
>[   49.265587] [drm:drm_mode_getconnector] [CONNECTOR:56:?]
>[   49.265681] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   49.265683] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1]
>[   49.265684] [drm:intel_dp_detect] [CONNECTOR:32:eDP-1]
>[   49.265689] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   49.265695] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[   49.266003] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   49.266308] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   49.266748] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   49.266756] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.266757] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.266760] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1] probed modes :
>[   49.266762] [drm:drm_mode_debug_printmodeline] Modeline 33:"2560x1440" 60 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x48 0x9
>[   49.266765] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   49.266767] [drm:drm_mode_getconnector] [CONNECTOR:40:?]
>[   49.266768] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1]
>[   49.266768] [drm:intel_dp_detect] [CONNECTOR:40:DP-1]
>[   49.266772] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1] disconnected
>[   49.266774] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   49.266775] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2]
>[   49.266775] [drm:intel_dp_detect] [CONNECTOR:47:DP-2]
>[   49.266776] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2] disconnected
>[   49.266777] [drm:drm_mode_getconnector] [CONNECTOR:44:?]
>[   49.266778] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1]
>[   49.266779] [drm:intel_hdmi_detect] [CONNECTOR:44:HDMI-A-1]
>[   49.267261] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.267429] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.267742] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.267743] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.268098] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.268288] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.268759] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.268760] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.268761] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.286797] [drm:intel_hdmi_detect] Live status not up!
>[   49.286804] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1] disconnected
>[   49.286819] [drm:drm_mode_getconnector] [CONNECTOR:51:?]
>[   49.286820] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2]
>[   49.286821] [drm:intel_hdmi_detect] [CONNECTOR:51:HDMI-A-2]
>[   49.287038] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.288048] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.288050] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.288073] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.288238] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.288555] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.288556] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.288910] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.288914] [drm:drm_dp_send_enum_path_resources] enum path resources 2: 2560 2560
>[   49.289101] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.289256] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.289572] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.289573] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.289574] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.297036] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   49.297037] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   49.297218] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   49.297219] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   49.297220] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2] disconnected
>[   49.297310] [drm:drm_mode_getconnector] [CONNECTOR:56:?]
>[   49.297312] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3]
>[   49.297313] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3] status updated from 3 to 2
>[   49.297314] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3] disconnected
>[   49.298084] [drm:drm_mode_getresources] [CONNECTOR:32:eDP-1]
>[   49.298087] [drm:drm_mode_getresources] [CONNECTOR:40:DP-1]
>[   49.298089] [drm:drm_mode_getresources] [CONNECTOR:44:HDMI-A-1]
>[   49.298091] [drm:drm_mode_getresources] [CONNECTOR:47:DP-2]
>[   49.298093] [drm:drm_mode_getresources] [CONNECTOR:51:HDMI-A-2]
>[   49.298094] [drm:drm_mode_getresources] [CONNECTOR:56:DP-3]
>[   49.298096] [drm:drm_mode_getresources] [CONNECTOR:55:DP-4]
>[   49.298097] [drm:drm_mode_getresources] [CONNECTOR:63:DP-5]
>[   49.298099] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[8] ENCODERS[9]
>[   49.298101] [drm:drm_mode_getconnector] [CONNECTOR:55:?]
>[   49.298105] [drm:drm_mode_getconnector] [CONNECTOR:55:?]
>[   49.298108] [drm:drm_mode_getconnector] [CONNECTOR:55:?]
>[   49.298184] [drm:drm_mode_getconnector] [CONNECTOR:63:?]
>[   49.298186] [drm:drm_mode_getconnector] [CONNECTOR:63:?]
>[   49.298189] [drm:drm_mode_getconnector] [CONNECTOR:63:?]
>[   49.298239] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   49.298241] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1]
>[   49.298242] [drm:intel_dp_detect] [CONNECTOR:32:eDP-1]
>[   49.298566] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   49.298883] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   49.299325] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   49.299327] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1] probed modes :
>[   49.299329] [drm:drm_mode_debug_printmodeline] Modeline 33:"2560x1440" 60 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x48 0x9
>[   49.299342] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   49.299344] [drm:drm_mode_getconnector] [CONNECTOR:40:?]
>[   49.299345] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1]
>[   49.299346] [drm:intel_dp_detect] [CONNECTOR:40:DP-1]
>[   49.299350] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1] disconnected
>[   49.299351] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   49.299352] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2]
>[   49.299353] [drm:intel_dp_detect] [CONNECTOR:47:DP-2]
>[   49.299353] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2] disconnected
>[   49.299354] [drm:drm_mode_getconnector] [CONNECTOR:56:?]
>[   49.299355] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3]
>[   49.299357] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3] disconnected
>[   49.299358] [drm:drm_mode_getconnector] [CONNECTOR:44:?]
>[   49.299359] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1]
>[   49.299360] [drm:intel_hdmi_detect] [CONNECTOR:44:HDMI-A-1]
>[   49.319378] [drm:intel_hdmi_detect] Live status not up!
>[   49.319380] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1] disconnected
>[   49.319382] [drm:drm_mode_getconnector] [CONNECTOR:51:?]
>[   49.319383] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2]
>[   49.319384] [drm:intel_hdmi_detect] [CONNECTOR:51:HDMI-A-2]
>[   49.329604] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   49.329606] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   49.329760] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.329772] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   49.329773] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   49.329774] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2] disconnected
>[   49.329779] [drm:drm_mode_getconnector] [CONNECTOR:55:?]
>[   49.329780] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:55:DP-4]
>[   49.329782] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:55:DP-4] status updated from 3 to 1
>[   49.330093] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.331168] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.331170] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.331177] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.331663] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.331664] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.332023] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.332216] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.332373] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.332691] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.332692] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.332694] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.332996] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.334683] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.334684] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.334689] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.335167] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.335527] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.335884] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.336238] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.336425] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.336580] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.336896] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.336897] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.336899] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.337952] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.337953] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.337956] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.338432] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.338792] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.339148] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.339502] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.339690] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.339845] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.340161] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.340162] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.340163] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.341199] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.341200] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.341220] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.341389] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.341706] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.341707] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.342068] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.342422] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.342767] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.342955] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.343111] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.343428] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.343429] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.343430] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.343726] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.345409] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.345410] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.345431] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.345599] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.345917] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.345919] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.346278] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.346636] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.346992] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.347180] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.347335] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.347651] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.347652] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.347653] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.348728] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.348730] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.348744] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.349222] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.349582] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.350295] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.350480] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.350635] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.350951] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.350952] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.350953] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.351998] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.351999] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.352020] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.352188] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.352507] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.352508] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.352868] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.353225] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.353569] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.353582] [drm:drm_mode_detailed] composite sync not supported
>[   49.353635] [drm:drm_edid_to_eld] ELD monitor Pro2840m
>[   49.353637] [drm:drm_edid_to_eld] ELD size 32, SAD count 1
>[   49.353665] [drm:drm_mode_debug_printmodeline] Modeline 85:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   49.353666] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
>[   49.353669] [drm:drm_mode_debug_printmodeline] Modeline 89:"720x480i" 0 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[   49.353670] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
>[   49.353672] [drm:drm_mode_debug_printmodeline] Modeline 90:"720x576i" 0 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   49.353673] [drm:drm_mode_prune_invalid] Not using 720x576i mode: NO_INTERLACE
>[   49.353676] [drm:drm_mode_debug_printmodeline] Modeline 95:"1920x1080i" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   49.353677] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
>[   49.353679] [drm:drm_mode_debug_printmodeline] Modeline 105:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   49.353681] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
>[   49.353683] [drm:drm_mode_debug_printmodeline] Modeline 109:"720x480i" 60 13513 720 739 801 858 480 488 494 525 0x40 0x101a
>[   49.353684] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
>[   49.353688] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:55:DP-4] probed modes :
>[   49.353691] [drm:drm_mode_debug_printmodeline] Modeline 66:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x5
>[   49.353693] [drm:drm_mode_debug_printmodeline] Modeline 67:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   49.353695] [drm:drm_mode_debug_printmodeline] Modeline 101:"3840x2160" 30 296704 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   49.353698] [drm:drm_mode_debug_printmodeline] Modeline 71:"1920x2160" 60 297000 1920 2008 2052 2200 2160 2168 2178 2250 0x40 0xa
>[   49.353700] [drm:drm_mode_debug_printmodeline] Modeline 69:"2560x1600" 60 268500 2560 2608 2640 2720 1600 1603 1609 1646 0x40 0x6
>[   49.353702] [drm:drm_mode_debug_printmodeline] Modeline 70:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x6
>[   49.353704] [drm:drm_mode_debug_printmodeline] Modeline 79:"1920x1200" 60 193250 1920 2056 2256 2592 1200 1203 1209 1245 0x40 0x6
>[   49.353706] [drm:drm_mode_debug_printmodeline] Modeline 78:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0xa
>[   49.353708] [drm:drm_mode_debug_printmodeline] Modeline 84:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   49.353711] [drm:drm_mode_debug_printmodeline] Modeline 104:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   49.353713] [drm:drm_mode_debug_printmodeline] Modeline 92:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   49.353715] [drm:drm_mode_debug_printmodeline] Modeline 100:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   49.353717] [drm:drm_mode_debug_printmodeline] Modeline 113:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   49.353719] [drm:drm_mode_debug_printmodeline] Modeline 96:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   49.353722] [drm:drm_mode_debug_printmodeline] Modeline 111:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   49.353724] [drm:drm_mode_debug_printmodeline] Modeline 77:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[   49.353726] [drm:drm_mode_debug_printmodeline] Modeline 76:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[   49.353728] [drm:drm_mode_debug_printmodeline] Modeline 74:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   49.353730] [drm:drm_mode_debug_printmodeline] Modeline 75:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[   49.353733] [drm:drm_mode_debug_printmodeline] Modeline 68:"1360x768" 60 85500 1360 1472 1536 1792 768 771 777 795 0x40 0x5
>[   49.353735] [drm:drm_mode_debug_printmodeline] Modeline 72:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6
>[   49.353737] [drm:drm_mode_debug_printmodeline] Modeline 73:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   49.353739] [drm:drm_mode_debug_printmodeline] Modeline 102:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   49.353741] [drm:drm_mode_debug_printmodeline] Modeline 94:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   49.353744] [drm:drm_mode_debug_printmodeline] Modeline 83:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   49.353758] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.353761] [drm:drm_mode_debug_printmodeline] Modeline 80:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   49.353764] [drm:drm_mode_debug_printmodeline] Modeline 93:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   49.353766] [drm:drm_mode_debug_printmodeline] Modeline 107:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   49.353768] [drm:drm_mode_debug_printmodeline] Modeline 87:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   49.353770] [drm:drm_mode_debug_printmodeline] Modeline 81:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   49.353772] [drm:drm_mode_debug_printmodeline] Modeline 91:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   49.353775] [drm:drm_mode_debug_printmodeline] Modeline 82:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   49.353819] [drm:drm_mode_getconnector] [CONNECTOR:55:?]
>[   49.353826] [drm:drm_mode_getconnector] [CONNECTOR:63:?]
>[   49.353827] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:63:DP-5]
>[   49.353829] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:63:DP-5] status updated from 3 to 2
>[   49.353832] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:63:DP-5] disconnected
>[   49.353914] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.354061] [drm:drm_mode_getresources] [CONNECTOR:32:eDP-1]
>[   49.354062] [drm:drm_mode_getresources] [CONNECTOR:40:DP-1]
>[   49.354064] [drm:drm_mode_getresources] [CONNECTOR:44:HDMI-A-1]
>[   49.354065] [drm:drm_mode_getresources] [CONNECTOR:47:DP-2]
>[   49.354066] [drm:drm_mode_getresources] [CONNECTOR:51:HDMI-A-2]
>[   49.354067] [drm:drm_mode_getresources] [CONNECTOR:56:DP-3]
>[   49.354068] [drm:drm_mode_getresources] [CONNECTOR:55:DP-4]
>[   49.354069] [drm:drm_mode_getresources] [CONNECTOR:63:DP-5]
>[   49.354071] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[8] ENCODERS[9]
>[   49.354073] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   49.354074] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1]
>[   49.354076] [drm:intel_dp_detect] [CONNECTOR:32:eDP-1]
>[   49.354233] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.354235] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.354236] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.354549] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   49.354862] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   49.355309] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   49.355312] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1] probed modes :
>[   49.355315] [drm:drm_mode_debug_printmodeline] Modeline 33:"2560x1440" 60 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x48 0x9
>[   49.355319] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   49.355323] [drm:drm_mode_getconnector] [CONNECTOR:40:?]
>[   49.355324] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1]
>[   49.355326] [drm:intel_dp_detect] [CONNECTOR:40:DP-1]
>[   49.355330] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1] disconnected
>[   49.355333] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   49.355334] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2]
>[   49.355335] [drm:intel_dp_detect] [CONNECTOR:47:DP-2]
>[   49.355337] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2] disconnected
>[   49.355339] [drm:drm_mode_getconnector] [CONNECTOR:56:?]
>[   49.355340] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3]
>[   49.355342] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3] disconnected
>[   49.355345] [drm:drm_mode_getconnector] [CONNECTOR:55:?]
>[   49.355347] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:55:DP-4]
>[   49.356717] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.356719] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.356723] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.357205] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.357206] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.357563] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.357756] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.357913] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.358231] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.358231] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.358232] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.358532] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.360217] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.360218] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.360233] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.360399] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.360716] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.360717] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.361077] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.361434] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.361789] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.361977] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.362131] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.362446] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.362447] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.362449] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.363491] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.363492] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.363517] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.363695] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.364010] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.364724] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.365080] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.365268] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.365423] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.365739] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.365740] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.365741] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.366802] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.366803] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.366824] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.366993] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.367307] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.367669] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.368025] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.368370] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.368561] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.368718] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.369035] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.369036] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.369037] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.369333] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.371040] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.371041] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.371057] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.371540] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.371541] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.371901] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.372259] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.372615] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.372818] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.372986] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.373315] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.373327] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.373328] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.374341] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.374343] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.374347] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.374512] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.374840] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.374850] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.375208] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.375934] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.376133] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.376301] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.376630] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.376642] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.376643] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.377640] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.377641] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.377645] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.377809] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.378138] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.378148] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.378505] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.378875] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.379231] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.379254] [drm:drm_mode_detailed] composite sync not supported
>[   49.379310] [drm:drm_edid_to_eld] ELD monitor Pro2840m
>[   49.379311] [drm:drm_edid_to_eld] ELD size 32, SAD count 1
>[   49.379345] [drm:drm_mode_debug_printmodeline] Modeline 117:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   49.379346] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
>[   49.379349] [drm:drm_mode_debug_printmodeline] Modeline 121:"720x480i" 0 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[   49.379350] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
>[   49.379352] [drm:drm_mode_debug_printmodeline] Modeline 122:"720x576i" 0 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   49.379353] [drm:drm_mode_prune_invalid] Not using 720x576i mode: NO_INTERLACE
>[   49.379356] [drm:drm_mode_debug_printmodeline] Modeline 127:"1920x1080i" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   49.379357] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
>[   49.379359] [drm:drm_mode_debug_printmodeline] Modeline 137:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   49.379361] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
>[   49.379363] [drm:drm_mode_debug_printmodeline] Modeline 141:"720x480i" 60 13513 720 739 801 858 480 488 494 525 0x40 0x101a
>[   49.379364] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
>[   49.379368] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:55:DP-4] probed modes :
>[   49.379370] [drm:drm_mode_debug_printmodeline] Modeline 66:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x5
>[   49.379373] [drm:drm_mode_debug_printmodeline] Modeline 67:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   49.379375] [drm:drm_mode_debug_printmodeline] Modeline 101:"3840x2160" 30 296704 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   49.379377] [drm:drm_mode_debug_printmodeline] Modeline 71:"1920x2160" 60 297000 1920 2008 2052 2200 2160 2168 2178 2250 0x40 0xa
>[   49.379379] [drm:drm_mode_debug_printmodeline] Modeline 69:"2560x1600" 60 268500 2560 2608 2640 2720 1600 1603 1609 1646 0x40 0x6
>[   49.379381] [drm:drm_mode_debug_printmodeline] Modeline 70:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x6
>[   49.379384] [drm:drm_mode_debug_printmodeline] Modeline 79:"1920x1200" 60 193250 1920 2056 2256 2592 1200 1203 1209 1245 0x40 0x6
>[   49.379386] [drm:drm_mode_debug_printmodeline] Modeline 78:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0xa
>[   49.379388] [drm:drm_mode_debug_printmodeline] Modeline 84:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   49.379390] [drm:drm_mode_debug_printmodeline] Modeline 104:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   49.379392] [drm:drm_mode_debug_printmodeline] Modeline 92:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   49.379395] [drm:drm_mode_debug_printmodeline] Modeline 100:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   49.379397] [drm:drm_mode_debug_printmodeline] Modeline 113:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   49.379399] [drm:drm_mode_debug_printmodeline] Modeline 96:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   49.379401] [drm:drm_mode_debug_printmodeline] Modeline 111:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   49.379403] [drm:drm_mode_debug_printmodeline] Modeline 77:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[   49.379406] [drm:drm_mode_debug_printmodeline] Modeline 76:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[   49.379408] [drm:drm_mode_debug_printmodeline] Modeline 74:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   49.379410] [drm:drm_mode_debug_printmodeline] Modeline 75:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[   49.379412] [drm:drm_mode_debug_printmodeline] Modeline 68:"1360x768" 60 85500 1360 1472 1536 1792 768 771 777 795 0x40 0x5
>[   49.379414] [drm:drm_mode_debug_printmodeline] Modeline 72:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6
>[   49.379417] [drm:drm_mode_debug_printmodeline] Modeline 73:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   49.379419] [drm:drm_mode_debug_printmodeline] Modeline 102:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   49.379421] [drm:drm_mode_debug_printmodeline] Modeline 94:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   49.379423] [drm:drm_mode_debug_printmodeline] Modeline 83:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   49.379425] [drm:drm_mode_debug_printmodeline] Modeline 80:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   49.379433] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.379436] [drm:drm_mode_debug_printmodeline] Modeline 93:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   49.379438] [drm:drm_mode_debug_printmodeline] Modeline 107:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   49.379440] [drm:drm_mode_debug_printmodeline] Modeline 87:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   49.379443] [drm:drm_mode_debug_printmodeline] Modeline 81:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   49.379445] [drm:drm_mode_debug_printmodeline] Modeline 91:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   49.379447] [drm:drm_mode_debug_printmodeline] Modeline 82:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   49.379452] [drm:drm_mode_getconnector] [CONNECTOR:55:?]
>[   49.379459] [drm:drm_mode_getconnector] [CONNECTOR:63:?]
>[   49.379460] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:63:DP-5]
>[   49.379462] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:63:DP-5] disconnected
>[   49.379464] [drm:drm_mode_getconnector] [CONNECTOR:44:?]
>[   49.379466] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1]
>[   49.379467] [drm:intel_hdmi_detect] [CONNECTOR:44:HDMI-A-1]
>[   49.379600] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.379931] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.379942] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.379944] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.399486] [drm:intel_hdmi_detect] Live status not up!
>[   49.399488] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1] disconnected
>[   49.399490] [drm:drm_mode_getconnector] [CONNECTOR:51:?]
>[   49.399491] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2]
>[   49.399492] [drm:intel_hdmi_detect] [CONNECTOR:51:HDMI-A-2]
>[   49.409658] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.409659] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   49.409660] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   49.409833] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   49.409835] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   49.409836] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2] disconnected
>[   49.410039] [drm:drm_mode_getresources] [CONNECTOR:32:eDP-1]
>[   49.410041] [drm:drm_mode_getresources] [CONNECTOR:40:DP-1]
>[   49.410041] [drm:drm_mode_getresources] [CONNECTOR:44:HDMI-A-1]
>[   49.410042] [drm:drm_mode_getresources] [CONNECTOR:47:DP-2]
>[   49.410043] [drm:drm_mode_getresources] [CONNECTOR:51:HDMI-A-2]
>[   49.410043] [drm:drm_mode_getresources] [CONNECTOR:56:DP-3]
>[   49.410044] [drm:drm_mode_getresources] [CONNECTOR:55:DP-4]
>[   49.410045] [drm:drm_mode_getresources] [CONNECTOR:63:DP-5]
>[   49.410046] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[8] ENCODERS[9]
>[   49.410047] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   49.410048] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1]
>[   49.410049] [drm:intel_dp_detect] [CONNECTOR:32:eDP-1]
>[   49.410360] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   49.410671] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   49.411111] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   49.411113] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1] probed modes :
>[   49.411115] [drm:drm_mode_debug_printmodeline] Modeline 33:"2560x1440" 60 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x48 0x9
>[   49.411118] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   49.411119] [drm:drm_mode_getconnector] [CONNECTOR:40:?]
>[   49.411120] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1]
>[   49.411121] [drm:intel_dp_detect] [CONNECTOR:40:DP-1]
>[   49.411125] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1] disconnected
>[   49.411126] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   49.411127] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2]
>[   49.411128] [drm:intel_dp_detect] [CONNECTOR:47:DP-2]
>[   49.411129] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2] disconnected
>[   49.411130] [drm:drm_mode_getconnector] [CONNECTOR:56:?]
>[   49.411131] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3]
>[   49.411132] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3] disconnected
>[   49.411134] [drm:drm_mode_getconnector] [CONNECTOR:55:?]
>[   49.411135] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:55:DP-4]
>[   49.412495] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.412498] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.412504] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.412671] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.413004] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.413017] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.413376] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.413589] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.413750] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.414069] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.414070] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.414071] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.416035] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.416037] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.416042] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.416208] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.416523] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.416524] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.416893] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.417249] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.417604] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.417791] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.417945] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.418261] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.418262] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.418263] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.419303] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.419304] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.419308] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.419481] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.419797] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.419798] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.420158] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.420514] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.420869] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.421057] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.421211] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.421527] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.421530] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.421531] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.422563] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.422575] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.422598] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.423080] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.423795] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.424138] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.424327] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.424483] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.424800] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.424801] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.424802] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.425099] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.426773] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.426774] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.426794] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.427276] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.427638] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.427993] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.428349] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.428705] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.429020] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.429021] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.429023] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.430051] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.430052] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.430072] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.430240] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.430555] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.431626] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.431814] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.431969] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.432285] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.432286] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.432287] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.433324] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   49.433325] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   49.433346] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   49.433515] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.433832] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.433833] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   49.434193] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.434551] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.434893] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.434905] [drm:drm_mode_detailed] composite sync not supported
>[   49.434961] [drm:drm_edid_to_eld] ELD monitor Pro2840m
>[   49.434962] [drm:drm_edid_to_eld] ELD size 32, SAD count 1
>[   49.434995] [drm:drm_mode_debug_printmodeline] Modeline 117:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   49.434997] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
>[   49.434999] [drm:drm_mode_debug_printmodeline] Modeline 121:"720x480i" 0 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[   49.435001] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
>[   49.435003] [drm:drm_mode_debug_printmodeline] Modeline 122:"720x576i" 0 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   49.435004] [drm:drm_mode_prune_invalid] Not using 720x576i mode: NO_INTERLACE
>[   49.435006] [drm:drm_mode_debug_printmodeline] Modeline 127:"1920x1080i" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   49.435008] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
>[   49.435010] [drm:drm_mode_debug_printmodeline] Modeline 137:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   49.435011] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
>[   49.435013] [drm:drm_mode_debug_printmodeline] Modeline 141:"720x480i" 60 13513 720 739 801 858 480 488 494 525 0x40 0x101a
>[   49.435015] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
>[   49.435019] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:55:DP-4] probed modes :
>[   49.435021] [drm:drm_mode_debug_printmodeline] Modeline 66:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x5
>[   49.435023] [drm:drm_mode_debug_printmodeline] Modeline 67:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   49.435026] [drm:drm_mode_debug_printmodeline] Modeline 101:"3840x2160" 30 296704 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   49.435028] [drm:drm_mode_debug_printmodeline] Modeline 71:"1920x2160" 60 297000 1920 2008 2052 2200 2160 2168 2178 2250 0x40 0xa
>[   49.435030] [drm:drm_mode_debug_printmodeline] Modeline 69:"2560x1600" 60 268500 2560 2608 2640 2720 1600 1603 1609 1646 0x40 0x6
>[   49.435032] [drm:drm_mode_debug_printmodeline] Modeline 70:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x6
>[   49.435034] [drm:drm_mode_debug_printmodeline] Modeline 79:"1920x1200" 60 193250 1920 2056 2256 2592 1200 1203 1209 1245 0x40 0x6
>[   49.435036] [drm:drm_mode_debug_printmodeline] Modeline 78:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0xa
>[   49.435039] [drm:drm_mode_debug_printmodeline] Modeline 84:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   49.435041] [drm:drm_mode_debug_printmodeline] Modeline 104:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   49.435043] [drm:drm_mode_debug_printmodeline] Modeline 92:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   49.435045] [drm:drm_mode_debug_printmodeline] Modeline 100:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   49.435047] [drm:drm_mode_debug_printmodeline] Modeline 113:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   49.435050] [drm:drm_mode_debug_printmodeline] Modeline 96:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   49.435052] [drm:drm_mode_debug_printmodeline] Modeline 111:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   49.435054] [drm:drm_mode_debug_printmodeline] Modeline 77:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[   49.435056] [drm:drm_mode_debug_printmodeline] Modeline 76:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[   49.435058] [drm:drm_mode_debug_printmodeline] Modeline 74:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   49.435061] [drm:drm_mode_debug_printmodeline] Modeline 75:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[   49.435063] [drm:drm_mode_debug_printmodeline] Modeline 68:"1360x768" 60 85500 1360 1472 1536 1792 768 771 777 795 0x40 0x5
>[   49.435065] [drm:drm_mode_debug_printmodeline] Modeline 72:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6
>[   49.435067] [drm:drm_mode_debug_printmodeline] Modeline 73:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   49.435069] [drm:drm_mode_debug_printmodeline] Modeline 102:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   49.435083] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.435087] [drm:drm_mode_debug_printmodeline] Modeline 94:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   49.435089] [drm:drm_mode_debug_printmodeline] Modeline 83:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   49.435092] [drm:drm_mode_debug_printmodeline] Modeline 80:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   49.435094] [drm:drm_mode_debug_printmodeline] Modeline 93:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   49.435096] [drm:drm_mode_debug_printmodeline] Modeline 107:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   49.435098] [drm:drm_mode_debug_printmodeline] Modeline 87:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   49.435100] [drm:drm_mode_debug_printmodeline] Modeline 81:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   49.435103] [drm:drm_mode_debug_printmodeline] Modeline 91:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   49.435105] [drm:drm_mode_debug_printmodeline] Modeline 82:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   49.435109] [drm:drm_mode_getconnector] [CONNECTOR:55:?]
>[   49.435116] [drm:drm_mode_getconnector] [CONNECTOR:63:?]
>[   49.435117] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:63:DP-5]
>[   49.435119] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:63:DP-5] disconnected
>[   49.435121] [drm:drm_mode_getconnector] [CONNECTOR:44:?]
>[   49.435123] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1]
>[   49.435124] [drm:intel_hdmi_detect] [CONNECTOR:44:HDMI-A-1]
>[   49.435238] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.435555] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.435557] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   49.435558] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   49.455143] [drm:intel_hdmi_detect] Live status not up!
>[   49.455146] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1] disconnected
>[   49.455150] [drm:drm_mode_getconnector] [CONNECTOR:51:?]
>[   49.455152] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2]
>[   49.455153] [drm:intel_hdmi_detect] [CONNECTOR:51:HDMI-A-2]
>[   49.465328] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.465339] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   49.465340] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   49.465502] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   49.465511] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   49.465512] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   49.465513] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2] disconnected
>[   49.467487] show_signal_msg: 222 callbacks suppressed
>[   49.467490] gnome-shell[2199]: segfault at 0 ip 0000003d8c44f392 sp 00007fff24b45ee0 error 4 in libmutter.so.0.0.0[3d8c400000+f0000]
>[   49.622275] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712c400
>[   49.622281] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8801e1869900 state to ffff8800b712c400
>[   49.622284] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225ec00 state to ffff8800b712c400
>[   49.622285] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801e1869900 to [CRTC:21]
>[   49.622287] [drm:drm_atomic_set_fb_for_plane] Set [FB:65] for plane state ffff8801e1869900
>[   49.622288] [drm:drm_atomic_check_only] checking ffff8800b712c400
>[   49.622293] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 65
>[   49.622295] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[   49.622298] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8801e18699c0 state to ffff8800b712c400
>[   49.622300] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8801e1869a80 state to ffff8800b712c400
>[   49.622304] [drm:drm_atomic_commit] commiting ffff8800b712c400
>[   49.622328] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712c400
>[   49.622330] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712c400
>[   49.622481] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ecbe00
>[   49.622484] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8801e1869b40 state to ffff880222ecbe00
>[   49.622486] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225f400 state to ffff880222ecbe00
>[   49.622487] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801e1869b40 to [NOCRTC]
>[   49.622489] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801e1869b40
>[   49.622490] [drm:drm_atomic_check_only] checking ffff880222ecbe00
>[   49.622493] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb -1
>[   49.622495] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 0, off 1, on 0, ms 0
>[   49.622497] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8801e1869cc0 state to ffff880222ecbe00
>[   49.622499] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8801e1869d80 state to ffff880222ecbe00
>[   49.622501] [drm:drm_atomic_commit] commiting ffff880222ecbe00
>[   49.622517] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ecbe00
>[   49.622519] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ecbe00
>[   49.652571] [drm:i915_gem_open] 
>[   49.701423] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   49.702171] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   49.704154] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   49.746323] [drm:drm_mode_addfb2] [FB:65]
>[   49.746721] [drm:drm_mode_setcrtc] [CRTC:21]
>[   49.746736] [drm:drm_mode_setcrtc] [CONNECTOR:32:eDP-1]
>[   49.746740] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ec8a00
>[   49.746747] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225cc00 state to ffff880222ec8a00
>[   49.746753] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8801e1869000 state to ffff880222ec8a00
>[   49.746757] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:2560x1440] for CRTC state ffff88009225cc00
>[   49.746759] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801e1869000 to [CRTC:21]
>[   49.746761] [drm:drm_atomic_set_fb_for_plane] Set [FB:65] for plane state ffff8801e1869000
>[   49.746764] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:32] ffff8801f98b97c0 state to ffff880222ec8a00
>[   49.746766] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff880222ec8a00
>[   49.746770] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801f98b97c0 to [NOCRTC]
>[   49.746771] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801f98b97c0 to [CRTC:21]
>[   49.746773] [drm:drm_atomic_check_only] checking ffff880222ec8a00
>[   49.746777] [drm:update_connector_routing] Updating routing for [CONNECTOR:32:eDP-1]
>[   49.746780] [drm:update_connector_routing] [CONNECTOR:32:eDP-1] keeps [ENCODER:31:TMDS-31], now on [CRTC:21]
>[   49.746788] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 65
>[   49.746790] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 0, on 0, ms 0
>[   49.746795] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88003560d3c0 state to ffff880222ec8a00
>[   49.746798] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88003560df00 state to ffff880222ec8a00
>[   49.746803] [drm:drm_atomic_commit] commiting ffff880222ec8a00
>[   49.778550] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ec8a00
>[   49.778556] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ec8a00
>[   49.779492] [drm:drm_mode_setcrtc] [CRTC:21]
>[   49.779505] [drm:drm_mode_setcrtc] [CONNECTOR:55:DP-4]
>[   49.779511] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ecbc00
>[   49.779518] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225f400 state to ffff880222ecbc00
>[   49.779523] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8801e1869d80 state to ffff880222ecbc00
>[   49.779528] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:] for CRTC state ffff88009225f400
>[   49.779532] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801e1869d80 to [CRTC:21]
>[   49.779535] [drm:drm_atomic_set_fb_for_plane] Set [FB:65] for plane state ffff8801e1869d80
>[   49.779540] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:55] ffff8801f98b97e0 state to ffff880222ecbc00
>[   49.779543] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff880222ecbc00
>[   49.779545] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:32] ffff8801f98b9800 state to ffff880222ecbc00
>[   49.779548] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801f98b9800 to [NOCRTC]
>[   49.779549] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801f98b97e0 to [CRTC:21]
>[   49.779552] [drm:drm_atomic_check_only] checking ffff880222ecbc00
>[   49.779557] [drm:drm_atomic_helper_check_modeset] [CRTC:21] mode changed
>[   49.779560] [drm:update_connector_routing] Updating routing for [CONNECTOR:32:eDP-1]
>[   49.779561] [drm:update_connector_routing] Disabling [CONNECTOR:32:eDP-1]
>[   49.779563] [drm:update_connector_routing] Updating routing for [CONNECTOR:55:DP-4]
>[   49.779570] [drm:update_connector_routing] [CONNECTOR:55:DP-4] using [ENCODER:48:DP MST-48] on [CRTC:21]
>[   49.779572] [drm:drm_atomic_helper_check_modeset] [CRTC:21] needs all connectors, enable: y, active: y
>[   49.779575] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff880222ecbc00
>[   49.779580] [drm:drm_atomic_connectors_for_crtc] State ffff880222ecbc00 has 1 connectors for [CRTC:21]
>[   49.779583] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff880222ecbc00
>[   49.779589] [drm:connected_sink_compute_bpp] [CONNECTOR:55:DP-4] checking for sink bpp constrains
>[   49.779591] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to EDID reported max of 24
>[   49.779599] [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[   49.779603] [drm:intel_pipe_config_compare] mismatch in cpu_transcoder (expected 3, found 0)
>[   49.779607] [drm:intel_pipe_config_compare] mismatch in lane_count (expected 4, found 2)
>[   49.779611] [drm:intel_pipe_config_compare] mismatch in dp_m_n (expected tu 64 gmch 4155856/8388608 link 461761/524288, or tu 0 gmch 0/0 link 0/0, found tu 33, gmch 12425625/8388608 link 1035468/1048576)
>[   49.779613] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hdisplay (expected 2560, found 3840)
>[   49.779614] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_htotal (expected 2720, found 4000)
>[   49.779616] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hblank_start (expected 2560, found 3840)
>[   49.779617] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hblank_end (expected 2720, found 4000)
>[   49.779619] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hsync_start (expected 2608, found 3888)
>[   49.779620] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hsync_end (expected 2640, found 3920)
>[   49.779622] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vdisplay (expected 1440, found 2160)
>[   49.779623] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vtotal (expected 1457, found 2222)
>[   49.779625] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vblank_start (expected 1440, found 2160)
>[   49.779627] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vblank_end (expected 1457, found 2222)
>[   49.779628] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vsync_start (expected 1442, found 2163)
>[   49.779629] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vsync_end (expected 1445, found 2168)
>[   49.779633] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.flags(DRM_MODE_FLAG_PVSYNC) (expected 0, found 4)
>[   49.779634] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.flags(DRM_MODE_FLAG_NVSYNC) (expected 8, found 0)
>[   49.779639] [drm:intel_pipe_config_compare] mismatch in ddi_pll_sel (expected 0x20000000, found 0x00000000)
>[   49.779642] [drm:intel_pipe_config_compare] mismatch in pipe_bpp (expected 18, found 24)
>[   49.779644] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_clock (expected 237800, found 533250)
>[   49.779645] [drm:intel_pipe_config_compare] mismatch in port_clock (expected 270000, found 540000)
>[   49.779649] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config ffff88009225f400 for pipe A
>[   49.779650] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[   49.779652] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   49.779653] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   49.779655] [drm:intel_dump_pipe_config] dp: 1, lanes: 2, gmch_m: 12425625, gmch_n: 8388608, link_m: 1035468, link_n: 1048576, tu: 33
>[   49.779657] [drm:intel_dump_pipe_config] dp: 1, lanes: 2, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   49.779659] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   49.779660] [drm:intel_dump_pipe_config] requested mode:
>[   49.779663] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x0 0x5
>[   49.779664] [drm:intel_dump_pipe_config] adjusted mode:
>[   49.779667] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x0 0x5
>[   49.779669] [drm:intel_dump_crtc_timings] crtc timings: 533250 3840 3888 3920 4000 2160 2163 2168 2222, type: 0x0 flags: 0x5
>[   49.779670] [drm:intel_dump_pipe_config] port clock: 540000
>[   49.779672] [drm:intel_dump_pipe_config] pipe src size: 3840x2160
>[   49.779675] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[   49.779676] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   49.779678] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   49.779679] [drm:intel_dump_pipe_config] ips: 0
>[   49.779680] [drm:intel_dump_pipe_config] double wide: 0
>[   49.779682] [drm:intel_dump_pipe_config] ddi_pll_sel: 0; dpll_hw_state: wrpll: 0x0
>[   49.779683] [drm:intel_dump_pipe_config] planes on this crtc
>[   49.779685] [drm:intel_dump_pipe_config] STANDARD PLANE:18 plane: 0.0 idx: 0 enabled
>[   49.779687] [drm:intel_dump_pipe_config] 	FB:65, fb = 6400x2160 format = 0x34325258
>[   49.779689] [drm:intel_dump_pipe_config] 	scaler:0 src (0, 0) 2560x1440 dst (0, 0) 2560x1440
>[   49.779692] [drm:intel_dump_pipe_config] CURSOR PLANE:20 plane: 0.1 idx: 1 disabled, scaler_id = 0
>[   49.779694] [drm:intel_dump_pipe_config] STANDARD PLANE:22 plane: 0.1 idx: 2 disabled, scaler_id = 0
>[   49.779701] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225fc00 state to ffff880222ecbc00
>[   49.779706] [drm:drm_atomic_get_crtc_state] Added [CRTC:29] ffff880092258800 state to ffff880222ecbc00
>[   49.779714] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 65
>[   49.779716] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 1, on 1, ms 1
>[   49.779724] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8801e1869cc0 state to ffff880222ecbc00
>[   49.779729] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800351f1a80 state to ffff880222ecbc00
>[   49.779738] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800b7a8c0c0 state to ffff880222ecbc00
>[   49.779768] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff8800b7a8c180 state to ffff880222ecbc00
>[   49.779773] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800b7a8c540 state to ffff880222ecbc00
>[   49.779780] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff8800b7a8ca80 state to ffff880222ecbc00
>[   49.779783] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff8800b7a8cf00 state to ffff880222ecbc00
>[   49.779786] [drm:drm_atomic_get_plane_state] Added [PLANE:30] ffff8800b7a8c300 state to ffff880222ecbc00
>[   49.779790] [drm:drm_atomic_commit] commiting ffff880222ecbc00
>[   49.813913] [drm:intel_edp_backlight_off] 
>[   50.014905] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[   50.014918] [drm:intel_disable_pipe] disabling pipe A
>[   50.029131] [drm:edp_panel_off] Turn eDP port A panel power off
>[   50.029137] [drm:wait_panel_off] Wait for panel power off time
>[   50.029150] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[   50.081442] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000008, dig 0x00000012, pins 0x00000010
>[   50.081445] [drm:intel_hpd_irq_handler] digital hpd port A - long
>[   50.081447] [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 4 - cnt: 0
>[   50.081469] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port A
>[   50.089217] [drm:wait_panel_status] Wait complete
>[   50.093245] [drm:intel_update_cdclk] Current CD clock rate: 540000 kHz
>[   50.093259] [drm:intel_mst_pre_enable_dp] 0
>[   50.093444] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   50.094515] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   50.094699] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   50.094710] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[   50.094712] [drm:intel_dp_set_signal_levels] Using vswing level 0
>[   50.094713] [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0
>[   50.111134] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   50.111537] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   50.111548] [drm:intel_dp_start_link_train] clock recovery OK
>[   50.111763] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   50.127948] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   50.128353] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   50.130373] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[   50.130566] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   50.130576] [drm:drm_dp_mst_allocate_vcpi] initing vcpi for 658 33
>[   50.130742] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   50.130933] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   50.131104] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   50.131199] [drm:intel_enable_pipe] enabling pipe A
>[   50.131205] [drm:intel_mst_enable_dp] 1
>[   50.133391] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   50.133404] [drm:drm_dp_update_payload_part2] payload 0 1
>[   50.133667] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   50.134844] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   50.134846] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   50.134854] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   50.135028] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   50.135366] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   50.135379] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   50.135736] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   50.135941] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   50.136110] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   50.136447] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   50.136459] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   50.136460] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   50.148112] [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR* CPU pipe A FIFO underrun
>[   50.164786] [drm:intel_connector_check_state] [CONNECTOR:32:eDP-1]
>[   50.164789] [drm:intel_connector_check_state] [CONNECTOR:55:DP-4]
>[   50.164791] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[   50.164794] [drm:check_encoder_state] [ENCODER:39:TMDS-39]
>[   50.164796] [drm:check_encoder_state] [ENCODER:41:DP MST-41]
>[   50.164797] [drm:check_encoder_state] [ENCODER:42:DP MST-42]
>[   50.164798] [drm:check_encoder_state] [ENCODER:43:DP MST-43]
>[   50.164800] [drm:check_encoder_state] [ENCODER:46:TMDS-46]
>[   50.164802] [drm:check_encoder_state] [ENCODER:48:DP MST-48]
>[   50.164803] [drm:check_encoder_state] [ENCODER:49:DP MST-49]
>[   50.164805] [drm:check_encoder_state] [ENCODER:50:DP MST-50]
>[   50.164807] [drm:check_crtc_state] [CRTC:21]
>[   50.164816] [drm:check_shared_dpll_state] WRPLL 1
>[   50.164817] [drm:check_shared_dpll_state] WRPLL 2
>[   50.164820] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ecbc00
>[   50.164823] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ecbc00
>[   50.164852] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=0/852
>[   50.164859] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ecbc00
>[   50.164862] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225cc00 state to ffff880222ecbc00
>[   50.164864] [drm:drm_atomic_check_only] checking ffff880222ecbc00
>[   50.164868] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b7a8c600 state to ffff880222ecbc00
>[   50.164870] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b7a8cc00 state to ffff880222ecbc00
>[   50.164872] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b7a8cb40 state to ffff880222ecbc00
>[   50.164875] [drm:drm_atomic_commit] commiting ffff880222ecbc00
>[   50.164887] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ecbc00
>[   50.164889] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ecbc00
>[   50.165179] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ecaa00
>[   50.165182] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b7a8c840 state to ffff880222ecaa00
>[   50.165185] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225f400 state to ffff880222ecaa00
>[   50.165186] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b7a8c840 to [CRTC:21]
>[   50.165189] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8800b7a8c840
>[   50.165190] [drm:drm_atomic_check_only] checking ffff880222ecaa00
>[   50.165194] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 58
>[   50.165196] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[   50.165198] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b7a8ccc0 state to ffff880222ecaa00
>[   50.165200] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b7a8c900 state to ffff880222ecaa00
>[   50.165203] [drm:drm_atomic_commit] commiting ffff880222ecaa00
>[   50.165219] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ecaa00
>[   50.165221] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ecaa00
>[   50.166029] [drm:drm_mode_setcrtc] [CRTC:25]
>[   50.166033] [drm:drm_mode_setcrtc] [CONNECTOR:32:eDP-1]
>[   50.166036] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b75ff200
>[   50.166039] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff880092259800 state to ffff8800b75ff200
>[   50.166041] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800b7a8cb40 state to ffff8800b75ff200
>[   50.166043] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:] for CRTC state ffff880092259800
>[   50.166044] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b7a8cb40 to [CRTC:25]
>[   50.166046] [drm:drm_atomic_set_fb_for_plane] Set [FB:65] for plane state ffff8800b7a8cb40
>[   50.166048] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:32] ffff8801f98b92a0 state to ffff8800b75ff200
>[   50.166050] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff8800b75ff200
>[   50.166052] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801f98b92a0 to [CRTC:25]
>[   50.166053] [drm:drm_atomic_check_only] checking ffff8800b75ff200
>[   50.166055] [drm:drm_atomic_helper_check_modeset] [CRTC:25] mode changed
>[   50.166056] [drm:drm_atomic_helper_check_modeset] [CRTC:25] enable changed
>[   50.166057] [drm:update_connector_routing] Updating routing for [CONNECTOR:32:eDP-1]
>[   50.166060] [drm:update_connector_routing] [CONNECTOR:32:eDP-1] using [ENCODER:31:TMDS-31] on [CRTC:25]
>[   50.166061] [drm:drm_atomic_helper_check_modeset] [CRTC:25] active changed
>[   50.166062] [drm:drm_atomic_helper_check_modeset] [CRTC:25] needs all connectors, enable: y, active: y
>[   50.166064] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff8800b75ff200
>[   50.166066] [drm:drm_atomic_connectors_for_crtc] State ffff8800b75ff200 has 1 connectors for [CRTC:25]
>[   50.166068] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff8800b75ff200
>[   50.166070] [drm:connected_sink_compute_bpp] [CONNECTOR:32:eDP-1] checking for sink bpp constrains
>[   50.166071] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to default limit of 24
>[   50.166074] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 270000 pixel clock 237800KHz
>[   50.166076] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[   50.166078] [drm:intel_dp_compute_config] DP link bw 0a rate select 00 lane count 4 clock 270000 bpp 18
>[   50.166079] [drm:intel_dp_compute_config] DP link bw required 428040 available 864000
>[   50.166082] [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[   50.166083] [drm:intel_pipe_config_compare] mismatch in cpu_transcoder (expected 1, found 3)
>[   50.166085] [drm:intel_pipe_config_compare] mismatch in has_dp_encoder (expected 0, found 1)
>[   50.166086] [drm:intel_pipe_config_compare] mismatch in lane_count (expected 0, found 4)
>[   50.166089] [drm:intel_pipe_config_compare] mismatch in dp_m_n (expected tu 0 gmch 0/0 link 0/0, or tu 0 gmch 0/0 link 0/0, found tu 64, gmch 4155856/8388608 link 461761/524288)
>[   50.166091] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hdisplay (expected 0, found 2560)
>[   50.166092] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_htotal (expected 0, found 2720)
>[   50.166094] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hblank_start (expected 0, found 2560)
>[   50.166095] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hblank_end (expected 0, found 2720)
>[   50.166096] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hsync_start (expected 0, found 2608)
>[   50.166098] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hsync_end (expected 0, found 2640)
>[   50.166099] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vdisplay (expected 0, found 1440)
>[   50.166100] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vtotal (expected 0, found 1457)
>[   50.166102] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vblank_start (expected 0, found 1440)
>[   50.166103] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vblank_end (expected 0, found 1457)
>[   50.166104] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vsync_start (expected 0, found 1442)
>[   50.166106] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vsync_end (expected 0, found 1445)
>[   50.166107] [drm:intel_pipe_config_compare] mismatch in pixel_multiplier (expected 0, found 1)
>[   50.166109] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.flags(DRM_MODE_FLAG_PHSYNC) (expected 0, found 1)
>[   50.166110] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.flags(DRM_MODE_FLAG_NVSYNC) (expected 0, found 8)
>[   50.166112] [drm:intel_pipe_config_compare] mismatch in ddi_pll_sel (expected 0x00000000, found 0x20000000)
>[   50.166114] [drm:intel_pipe_config_compare] mismatch in pipe_bpp (expected 0, found 18)
>[   50.166115] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_clock (expected 0, found 237800)
>[   50.166116] [drm:intel_pipe_config_compare] mismatch in port_clock (expected 0, found 270000)
>[   50.166119] [drm:intel_dump_pipe_config] [CRTC:25][modeset] config ffff880092259800 for pipe B
>[   50.166120] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   50.166121] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[   50.166123] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   50.166126] [drm:intel_dump_pipe_config] dp: 1, lanes: 4, gmch_m: 4155856, gmch_n: 8388608, link_m: 461761, link_n: 524288, tu: 64
>[   50.166128] [drm:intel_dump_pipe_config] dp: 1, lanes: 4, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   50.166129] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   50.166130] [drm:intel_dump_pipe_config] requested mode:
>[   50.166133] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x0 0x9
>[   50.166134] [drm:intel_dump_pipe_config] adjusted mode:
>[   50.166136] [drm:drm_mode_debug_printmodeline] Modeline 0:"2560x1440" 60 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x48 0x9
>[   50.166138] [drm:intel_dump_crtc_timings] crtc timings: 237800 2560 2608 2640 2720 1440 1442 1445 1457, type: 0x48 flags: 0x9
>[   50.166140] [drm:intel_dump_pipe_config] port clock: 270000
>[   50.166141] [drm:intel_dump_pipe_config] pipe src size: 2560x1440
>[   50.166142] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[   50.166144] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   50.166145] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   50.166147] [drm:intel_dump_pipe_config] ips: 0
>[   50.166148] [drm:intel_dump_pipe_config] double wide: 0
>[   50.166149] [drm:intel_dump_pipe_config] ddi_pll_sel: 536870912; dpll_hw_state: wrpll: 0x0
>[   50.166150] [drm:intel_dump_pipe_config] planes on this crtc
>[   50.166152] [drm:intel_dump_pipe_config] STANDARD PLANE:23 plane: 1.0 idx: 3 disabled, scaler_id = 0
>[   50.166154] [drm:intel_dump_pipe_config] CURSOR PLANE:24 plane: 1.2 idx: 4 disabled, scaler_id = 0
>[   50.166156] [drm:intel_dump_pipe_config] STANDARD PLANE:26 plane: 1.1 idx: 5 disabled, scaler_id = 0
>[   50.166159] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225f800 state to ffff8800b75ff200
>[   50.166161] [drm:drm_atomic_get_crtc_state] Added [CRTC:29] ffff88009225a800 state to ffff8800b75ff200
>[   50.166164] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:23] with fb 65
>[   50.166166] [drm:intel_plane_atomic_calc_changes] [PLANE:23] visible 0 -> 1, off 0, on 1, ms 1
>[   50.166168] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b7a8c600 state to ffff8800b75ff200
>[   50.166171] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800351f1a80 state to ffff8800b75ff200
>[   50.166173] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88003560df00 state to ffff8800b75ff200
>[   50.166176] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88003560d3c0 state to ffff8800b75ff200
>[   50.166178] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8801e1869cc0 state to ffff8800b75ff200
>[   50.166180] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff8801e1869d80 state to ffff8800b75ff200
>[   50.166182] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff8801e1869000 state to ffff8800b75ff200
>[   50.166184] [drm:drm_atomic_get_plane_state] Added [PLANE:30] ffff8801e1869300 state to ffff8800b75ff200
>[   50.166186] [drm:drm_atomic_commit] commiting ffff8800b75ff200
>[   50.166212] [drm:edp_panel_on] Turn eDP port A panel power on
>[   50.166216] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   50.630288] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control abcd0000
>[   50.650317] [drm:wait_panel_status] Wait complete
>[   50.650324] [drm:wait_panel_on] Wait for panel power on
>[   50.650328] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[   50.658502] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101210, pins 0x00000040
>[   50.658505] [drm:intel_hpd_irq_handler] digital hpd port C - long
>[   50.658507] [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 6 - cnt: 0
>[   50.658535] [drm:intel_dp_hpd_pulse] got hpd irq on port C - long
>[   50.658541] [drm:intel_dp_hpd_pulse] MST device may have disappeared 1 vs 1
>[   50.754473] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000008, dig 0x00000012, pins 0x00000010
>[   50.754476] [drm:intel_hpd_irq_handler] digital hpd port A - long
>[   50.754478] [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 4 - cnt: 1
>[   50.802760] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000008, dig 0x00000011, pins 0x00000010
>[   50.802763] [drm:intel_hpd_irq_handler] digital hpd port A - short
>[   50.870610] [drm:wait_panel_status] Wait complete
>[   50.870633] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   50.870641] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[   50.870974] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   50.870975] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port A
>[   50.871711] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[   50.871713] [drm:intel_dp_set_signal_levels] Using vswing level 0
>[   50.871714] [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0
>[   50.872331] [drm:intel_dp_start_link_train] clock recovery OK
>[   50.873253] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[   50.873341] [drm:intel_enable_pipe] enabling pipe B
>[   50.873495] [drm:intel_edp_backlight_on] 
>[   50.873497] [drm:intel_panel_enable_backlight] pipe B
>[   50.873504] [drm:intel_panel_actually_set_backlight] set backlight PWM = 852
>[   50.876425] [drm:intel_psr_match_conditions] PSR disable by flag
>[   50.876427] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[   50.931989] [drm:intel_connector_check_state] [CONNECTOR:32:eDP-1]
>[   50.931994] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[   50.931996] [drm:check_encoder_state] [ENCODER:39:TMDS-39]
>[   50.931998] [drm:check_encoder_state] [ENCODER:41:DP MST-41]
>[   50.932000] [drm:check_encoder_state] [ENCODER:42:DP MST-42]
>[   50.932001] [drm:check_encoder_state] [ENCODER:43:DP MST-43]
>[   50.932002] [drm:check_encoder_state] [ENCODER:46:TMDS-46]
>[   50.932004] [drm:check_encoder_state] [ENCODER:48:DP MST-48]
>[   50.932005] [drm:check_encoder_state] [ENCODER:49:DP MST-49]
>[   50.932007] [drm:check_encoder_state] [ENCODER:50:DP MST-50]
>[   50.932008] [drm:check_crtc_state] [CRTC:25]
>[   50.932017] [drm:check_shared_dpll_state] WRPLL 1
>[   50.932019] [drm:check_shared_dpll_state] WRPLL 2
>[   50.932021] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b75ff200
>[   50.932026] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b75ff200
>[   50.932057] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b75ff200
>[   50.932061] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff880092258800 state to ffff8800b75ff200
>[   50.932062] [drm:drm_atomic_check_only] checking ffff8800b75ff200
>[   50.932067] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800b7a8c300 state to ffff8800b75ff200
>[   50.932069] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff8800b7a8cf00 state to ffff8800b75ff200
>[   50.932078] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800b7a8ca80 state to ffff8800b75ff200
>[   50.932081] [drm:drm_atomic_commit] commiting ffff8800b75ff200
>[   50.932094] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b75ff200
>[   50.932096] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b75ff200
>[   50.932133] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=852/852
>[   50.932135] [drm:intel_panel_actually_set_backlight] set backlight PWM = 852
>[   50.932167] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b75ff200
>[   50.932170] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b7a8cb40 state to ffff8800b75ff200
>[   50.932172] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092259800 state to ffff8800b75ff200
>[   50.932173] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b7a8cb40 to [CRTC:21]
>[   50.932175] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8800b7a8cb40
>[   50.932176] [drm:drm_atomic_check_only] checking ffff8800b75ff200
>[   50.932179] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 58
>[   50.932181] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.932183] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b7a8c540 state to ffff8800b75ff200
>[   50.932185] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b7a8c180 state to ffff8800b75ff200
>[   50.932188] [drm:drm_atomic_commit] commiting ffff8800b75ff200
>[   50.932200] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b75ff200
>[   50.932202] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b75ff200
>[   50.932207] [drm:intel_dp_destroy_mst_connector] 
>[   50.932210] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b75ff200
>[   50.932212] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff8800b7a8c0c0 state to ffff8800b75ff200
>[   50.941455] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225f800 state to ffff8800b75ff200
>[   50.941458] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b7a8c0c0 to [CRTC:25]
>[   50.941460] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b7a8c0c0
>[   50.941462] [drm:drm_atomic_check_only] checking ffff8800b75ff200
>[   50.941467] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb 56
>[   50.941469] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 0 -> 1, off 0, on 1, ms 0
>[   50.941472] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800b7a8c900 state to ffff8800b75ff200
>[   50.941482] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800b7a8c840 state to ffff8800b75ff200
>[   50.941485] [drm:drm_atomic_commit] commiting ffff8800b75ff200
>[   50.941504] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b75ff200
>[   50.941507] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b75ff200
>[   50.941535] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ed3600
>[   50.941539] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1915c00 state to ffff880222ed3600
>[   50.941540] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880200f62b40 state to ffff880222ed3600
>[   50.941541] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff8801e1915c00
>[   50.941542] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200f62b40 to [NOCRTC]
>[   50.941543] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880200f62b40
>[   50.941544] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff880222ed3600
>[   50.941546] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:55] ffff880200e47f40 state to ffff880222ed3600
>[   50.941547] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880200e47f40 to [NOCRTC]
>[   50.941548] [drm:drm_atomic_check_only] checking ffff880222ed3600
>[   50.941549] [drm:drm_atomic_helper_check_modeset] [CRTC:21] mode changed
>[   50.941550] [drm:drm_atomic_helper_check_modeset] [CRTC:21] enable changed
>[   50.941551] [drm:update_connector_routing] Updating routing for [CONNECTOR:55:DP-4]
>[   50.941552] [drm:update_connector_routing] Disabling [CONNECTOR:55:DP-4]
>[   50.941553] [drm:drm_atomic_helper_check_modeset] [CRTC:21] active changed
>[   50.941553] [drm:drm_atomic_helper_check_modeset] [CRTC:21] needs all connectors, enable: n, active: n
>[   50.941554] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff880222ed3600
>[   50.941556] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880200f62f00 state to ffff880222ed3600
>[   50.941557] [drm:drm_atomic_connectors_for_crtc] State ffff880222ed3600 has 0 connectors for [CRTC:21]
>[   50.941560] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff8801e1915000 state to ffff880222ed3600
>[   50.941562] [drm:drm_atomic_get_crtc_state] Added [CRTC:29] ffff8801e1917c00 state to ffff880222ed3600
>[   50.941563] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff880222ed3600
>[   50.941565] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:32] ffff880200e47f60 state to ffff880222ed3600
>[   50.941567] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff880200f62540 state to ffff880222ed3600
>[   50.941568] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff880200f62d80 state to ffff880222ed3600
>[   50.941571] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb -1
>[   50.941572] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 0, off 1, on 0, ms 1
>[   50.941574] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 58
>[   50.941576] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 0, off 1, on 0, ms 1
>[   50.941578] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:23] with fb 65
>[   50.941579] [drm:intel_plane_atomic_calc_changes] [PLANE:23] visible 1 -> 1, off 1, on 1, ms 1
>[   50.941581] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb 56
>[   50.941583] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 1 -> 1, off 1, on 1, ms 1
>[   50.941585] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880200f623c0 state to ffff880222ed3600
>[   50.941588] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff880200f62840 state to ffff880222ed3600
>[   50.941591] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff880200f620c0 state to ffff880222ed3600
>[   50.941594] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff880200f626c0 state to ffff880222ed3600
>[   50.941595] [drm:drm_atomic_get_plane_state] Added [PLANE:30] ffff880200f62480 state to ffff880222ed3600
>[   50.941597] [drm:drm_atomic_commit] commiting ffff880222ed3600
>[   50.943555] [drm:intel_mst_disable_dp] 1
>[   50.943568] [drm:intel_disable_pipe] disabling pipe A
>[   50.949470] [drm:intel_mst_post_disable_dp] 1
>[   50.949649] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   50.949650] [drm:drm_dp_update_payload_part2] payload 0 0
>[   50.949820] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   50.949979] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   50.951992] [drm:intel_edp_backlight_off] 
>[   51.152615] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[   51.152626] [drm:intel_disable_pipe] disabling pipe B
>[   51.166965] [drm:edp_panel_off] Turn eDP port A panel power off
>[   51.166971] [drm:wait_panel_off] Wait for panel power off time
>[   51.166974] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[   51.188087] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101210, pins 0x00000040
>[   51.188090] [drm:intel_hpd_irq_handler] digital hpd port C - long
>[   51.188092] [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 6 - cnt: 1
>[   51.188121] [drm:intel_dp_hpd_pulse] got hpd irq on port C - long
>[   51.219239] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000008, dig 0x00000012, pins 0x00000010
>[   51.219242] [drm:intel_hpd_irq_handler] digital hpd port A - long
>[   51.219244] [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 4 - cnt: 0
>[   51.227100] [drm:wait_panel_status] Wait complete
>[   51.227279] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.227582] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.227595] [drm:intel_dp_get_dpcd] DPCD: 12 14 c2 01 00 15 01 83 02 00 00 00 00 00 04
>[   51.227597] [drm:intel_dp_get_dpcd] Display Port TPS3 support: source yes, sink yes
>[   51.227599] [drm:intel_dp_print_rates] source rates: 162000, 270000, 540000
>[   51.227601] [drm:intel_dp_print_rates] sink rates: 162000, 270000, 540000
>[   51.227603] [drm:intel_dp_print_rates] common rates: 162000, 270000, 540000
>[   51.227767] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.228114] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.228288] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.228485] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.228495] [drm:intel_dp_probe_oui] Sink OUI: 000000
>[   51.228657] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.228853] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.228863] [drm:intel_dp_probe_oui] Branch OUI: 90cc24
>[   51.229024] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.229193] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.229201] [drm:intel_dp_probe_mst] Sink is MST capable
>[   51.229491] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.229664] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.229857] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.230030] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.230488] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.230799] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.230815] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port A
>[   51.231033] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.231126] [drm:intel_update_cdclk] Current CD clock rate: 337500 kHz
>[   51.231146] [drm:edp_panel_on] Turn eDP port A panel power on
>[   51.231149] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   51.232737] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   51.232739] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   51.232746] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   51.767997] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[   51.768002] [drm:wait_panel_status] Wait complete
>[   51.768005] [drm:wait_panel_on] Wait for panel power on
>[   51.768008] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[   51.872152] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000008, dig 0x00000012, pins 0x00000010
>[   51.872156] [drm:intel_hpd_irq_handler] digital hpd port A - long
>[   51.872158] [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 4 - cnt: 1
>[   51.920439] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000008, dig 0x00000011, pins 0x00000010
>[   51.920442] [drm:intel_hpd_irq_handler] digital hpd port A - short
>[   51.983847] [drm:wait_panel_status] Wait complete
>[   51.983857] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   51.983863] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[   51.984184] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.984519] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.984532] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   51.984892] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.985216] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[   51.985218] [drm:intel_dp_set_signal_levels] Using vswing level 0
>[   51.985219] [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0
>[   51.985575] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.986127] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.986478] [drm:intel_dp_start_link_train] clock recovery OK
>[   51.986669] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.986842] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.987175] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.987188] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   51.987190] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   51.987193] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port A
>[   51.988049] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   51.988051] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   51.988055] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   51.988105] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[   51.988195] [drm:intel_enable_pipe] enabling pipe B
>[   51.988266] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.988600] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.988613] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   51.988760] [drm:intel_edp_backlight_on] 
>[   51.988762] [drm:intel_panel_enable_backlight] pipe B
>[   51.988771] [drm:intel_panel_actually_set_backlight] set backlight PWM = 852
>[   51.989120] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.989492] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.989761] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.989778] [drm:intel_psr_match_conditions] PSR disable by flag
>[   51.989780] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[   51.989784] [drm:drm_dp_send_link_address] link address reply: 4
>[   51.989787] [drm:drm_dp_send_link_address] port 0: input 1, pdt: 1, pn: 0, dpcd_rev: 00, mcs: 1, ddps: 1, ldps 0, sdp 0/0
>[   51.989789] [drm:drm_dp_send_link_address] port 1: input 0, pdt: 0, pn: 1, dpcd_rev: 00, mcs: 0, ddps: 0, ldps 0, sdp 0/0
>[   51.989791] [drm:drm_dp_send_link_address] port 2: input 0, pdt: 3, pn: 2, dpcd_rev: 12, mcs: 0, ddps: 1, ldps 0, sdp 1/1
>[   51.989794] [drm:drm_dp_send_link_address] port 3: input 0, pdt: 0, pn: 3, dpcd_rev: 00, mcs: 0, ddps: 0, ldps 0, sdp 0/0
>[   51.989964] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.990132] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.990464] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   51.990477] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   51.990479] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   52.021672] [drm:intel_connector_check_state] [CONNECTOR:32:eDP-1]
>[   52.021676] [drm:intel_connector_check_state] [CONNECTOR:55:DP-4]
>[   52.021677] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[   52.021679] [drm:check_encoder_state] [ENCODER:39:TMDS-39]
>[   52.021680] [drm:check_encoder_state] [ENCODER:41:DP MST-41]
>[   52.021681] [drm:check_encoder_state] [ENCODER:42:DP MST-42]
>[   52.021682] [drm:check_encoder_state] [ENCODER:43:DP MST-43]
>[   52.021683] [drm:check_encoder_state] [ENCODER:46:TMDS-46]
>[   52.021684] [drm:check_encoder_state] [ENCODER:48:DP MST-48]
>[   52.021684] [drm:check_encoder_state] [ENCODER:49:DP MST-49]
>[   52.021685] [drm:check_encoder_state] [ENCODER:50:DP MST-50]
>[   52.021688] [drm:check_crtc_state] [CRTC:21]
>[   52.021689] [drm:check_crtc_state] [CRTC:25]
>[   52.021696] [drm:check_shared_dpll_state] WRPLL 1
>[   52.021697] [drm:check_shared_dpll_state] WRPLL 2
>[   52.021699] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ed3600
>[   52.021701] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ed3600
>[   52.021714] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c86400
>[   52.021718] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b7a8c300 state to ffff8800b9c86400
>[   52.021720] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225dc00 state to ffff8800b9c86400
>[   52.021722] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b7a8c300 to [NOCRTC]
>[   52.021724] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800b7a8c300
>[   52.021725] [drm:drm_atomic_check_only] checking ffff8800b9c86400
>[   52.021730] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b7a8ccc0 state to ffff8800b9c86400
>[   52.021733] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b7a8c840 state to ffff8800b9c86400
>[   52.021736] [drm:drm_atomic_commit] commiting ffff8800b9c86400
>[   52.021740] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c86400
>[   52.021743] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c86400
>[   52.021758] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c86400
>[   52.021760] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff8800b7a8c000 state to ffff8800b9c86400
>[   52.031115] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225e000 state to ffff8800b9c86400
>[   52.031118] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b7a8c000 to [CRTC:25]
>[   52.031120] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800b7a8c000
>[   52.031121] [drm:drm_atomic_check_only] checking ffff8800b9c86400
>[   52.031126] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb 56
>[   52.031128] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 1 -> 1, off 0, on 0, ms 0
>[   52.031131] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800b7a8c0c0 state to ffff8800b9c86400
>[   52.031141] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800b7a8c900 state to ffff8800b9c86400
>[   52.031144] [drm:drm_atomic_commit] commiting ffff8800b9c86400
>[   52.031164] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c86400
>[   52.031166] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c86400
>[   52.031201] [drm:intel_dp_destroy_mst_connector] 
>[   52.031204] [drm:i915_hotplug_work_func] running encoder hotplug functions
>[   52.031206] [drm:i915_hotplug_work_func] Connector DP-2 (pin 6) received hotplug event.
>[   52.031207] [drm:intel_dp_detect] [CONNECTOR:47:DP-2]
>[   52.031208] [drm:i915_hotplug_work_func] Connector HDMI-A-2 (pin 6) received hotplug event.
>[   52.031209] [drm:intel_hdmi_detect] [CONNECTOR:51:HDMI-A-2]
>[   52.031387] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c84000
>[   52.031390] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff8800b7a8c180 state to ffff8800b9c84000
>[   52.031392] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225bc00 state to ffff8800b9c84000
>[   52.031394] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b7a8c180 to [NOCRTC]
>[   52.031395] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800b7a8c180
>[   52.031397] [drm:drm_atomic_check_only] checking ffff8800b9c84000
>[   52.031400] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb -1
>[   52.031402] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 1 -> 0, off 1, on 0, ms 0
>[   52.031404] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800b7a8cb40 state to ffff8800b9c84000
>[   52.031406] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800b7a8c540 state to ffff8800b9c84000
>[   52.031409] [drm:drm_atomic_commit] commiting ffff8800b9c84000
>[   52.031424] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c84000
>[   52.031427] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c84000
>[   52.031915] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c84000
>[   52.031918] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff8800b7a8c900 state to ffff8800b9c84000
>[   52.031920] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225e000 state to ffff8800b9c84000
>[   52.031922] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b7a8c900 to [CRTC:25]
>[   52.031923] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff8800b7a8c900
>[   52.031925] [drm:drm_atomic_check_only] checking ffff8800b9c84000
>[   52.031928] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb 55
>[   52.031930] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 0 -> 1, off 0, on 1, ms 0
>[   52.031932] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800b7a8c000 state to ffff8800b9c84000
>[   52.031934] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800b7a8c0c0 state to ffff8800b9c84000
>[   52.031936] [drm:drm_atomic_commit] commiting ffff8800b9c84000
>[   52.031952] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c84000
>[   52.031954] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c84000
>[   52.037558] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c86200
>[   52.037563] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff8800b7a8c540 state to ffff8800b9c86200
>[   52.037566] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff880092259c00 state to ffff8800b9c86200
>[   52.037567] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b7a8c540 to [CRTC:25]
>[   52.037569] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff8800b7a8c540
>[   52.037570] [drm:drm_atomic_check_only] checking ffff8800b9c86200
>[   52.037575] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb 55
>[   52.037576] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 1 -> 1, off 0, on 0, ms 0
>[   52.037579] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800b7a8c180 state to ffff8800b9c86200
>[   52.037582] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800b7a8cb40 state to ffff8800b9c86200
>[   52.037585] [drm:drm_atomic_commit] commiting ffff8800b9c86200
>[   52.037603] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c86200
>[   52.037606] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c86200
>[   52.038631] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c84000
>[   52.038635] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff8800b7a8c0c0 state to ffff8800b9c84000
>[   52.038637] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225e000 state to ffff8800b9c84000
>[   52.038639] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b7a8c0c0 to [CRTC:25]
>[   52.038640] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff8800b7a8c0c0
>[   52.038642] [drm:drm_atomic_check_only] checking ffff8800b9c84000
>[   52.038645] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb 55
>[   52.038647] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 1 -> 1, off 0, on 0, ms 0
>[   52.038650] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800b7a8c900 state to ffff8800b9c84000
>[   52.038652] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800b7a8c000 state to ffff8800b9c84000
>[   52.038655] [drm:drm_atomic_commit] commiting ffff8800b9c84000
>[   52.038669] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c84000
>[   52.038671] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c84000
>[   52.041265] [drm:drm_dp_mst_put_payload_id] putting payload 1
>[   52.041695] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   52.041697] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   52.041860] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.041861] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   52.041864] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   52.042290] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.042559] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.042757] [drm:drm_mode_getresources] [CONNECTOR:32:eDP-1]
>[   52.042759] [drm:drm_mode_getresources] [CONNECTOR:40:DP-1]
>[   52.042761] [drm:drm_mode_getresources] [CONNECTOR:44:HDMI-A-1]
>[   52.042762] [drm:drm_mode_getresources] [CONNECTOR:47:DP-2]
>[   52.042763] [drm:drm_mode_getresources] [CONNECTOR:51:HDMI-A-2]
>[   52.042765] [drm:drm_mode_getresources] [CONNECTOR:63:DP-5]
>[   52.042766] [drm:drm_mode_getresources] [CONNECTOR:56:DP-3]
>[   52.042767] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[7] ENCODERS[9]
>[   52.042770] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   52.042773] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1]
>[   52.042774] [drm:intel_dp_detect] [CONNECTOR:32:eDP-1]
>[   52.043091] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   52.043400] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   52.043843] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   52.043846] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1] probed modes :
>[   52.043849] [drm:drm_mode_debug_printmodeline] Modeline 33:"2560x1440" 60 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x48 0x9
>[   52.043855] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   52.043860] [drm:drm_mode_getconnector] [CONNECTOR:40:?]
>[   52.043861] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1]
>[   52.043863] [drm:intel_dp_detect] [CONNECTOR:40:DP-1]
>[   52.043867] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1] disconnected
>[   52.043870] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   52.043871] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2]
>[   52.043872] [drm:intel_dp_detect] [CONNECTOR:47:DP-2]
>[   52.043874] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2] disconnected
>[   52.043876] [drm:drm_mode_getconnector] [CONNECTOR:56:?]
>[   52.043878] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3]
>[   52.043880] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3] status updated from 3 to 2
>[   52.043884] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3] disconnected
>[   52.043917] [drm:drm_mode_getconnector] [CONNECTOR:63:?]
>[   52.043919] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:63:DP-5]
>[   52.043920] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:63:DP-5] disconnected
>[   52.043923] [drm:drm_mode_getconnector] [CONNECTOR:44:?]
>[   52.043924] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1]
>[   52.043926] [drm:intel_hdmi_detect] [CONNECTOR:44:HDMI-A-1]
>[   52.044048] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   52.044050] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   52.048140] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   52.048310] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.048735] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.048736] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   52.049094] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.049287] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.049442] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.049759] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.049760] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   52.049762] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   52.063949] [drm:intel_hdmi_detect] Live status not up!
>[   52.063998] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1] disconnected
>[   52.064008] [drm:drm_mode_getconnector] [CONNECTOR:51:?]
>[   52.064010] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2]
>[   52.064012] [drm:intel_hdmi_detect] [CONNECTOR:51:HDMI-A-2]
>[   52.064215] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.065224] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   52.065226] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   52.065233] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   52.074202] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   52.074204] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   52.074357] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   52.074359] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   52.074361] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2] disconnected
>[   52.074375] [drm:intel_dp_destroy_mst_connector] 
>[   52.074385] [drm:drm_mode_setcrtc] [CRTC:21]
>[   52.074388] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c87c00
>[   52.074391] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225c400 state to ffff8800b9c87c00
>[   52.074394] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b7a8c540 state to ffff8800b9c87c00
>[   52.074396] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88009225c400
>[   52.074397] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b7a8c540 to [NOCRTC]
>[   52.074399] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800b7a8c540
>[   52.074400] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff8800b9c87c00
>[   52.074403] [drm:drm_atomic_check_only] checking ffff8800b9c87c00
>[   52.074408] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b7a8c180 state to ffff8800b9c87c00
>[   52.074410] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b7a8cf00 state to ffff8800b9c87c00
>[   52.074413] [drm:drm_atomic_commit] commiting ffff8800b9c87c00
>[   52.074417] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c87c00
>[   52.074420] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c87c00
>[   52.074429] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c87c00
>[   52.074431] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff8800b7a8c840 state to ffff8800b9c87c00
>[   52.074433] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225dc00 state to ffff8800b9c87c00
>[   52.074435] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b7a8c840 to [CRTC:25]
>[   52.074436] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff8800b7a8c840
>[   52.074438] [drm:drm_atomic_check_only] checking ffff8800b9c87c00
>[   52.074441] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb 55
>[   52.074443] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 1 -> 1, off 0, on 0, ms 0
>[   52.074445] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800b7a8c300 state to ffff8800b9c87c00
>[   52.074447] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800b7a8ccc0 state to ffff8800b9c87c00
>[   52.074450] [drm:drm_atomic_commit] commiting ffff8800b9c87c00
>[   52.074467] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c87c00
>[   52.074469] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c87c00
>[   52.074519] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.074521] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   52.074883] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.074890] [drm:drm_dp_send_enum_path_resources] enum path resources 2: 2560 2560
>[   52.075074] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.075210] [drm:drm_mode_getresources] [CONNECTOR:32:eDP-1]
>[   52.075212] [drm:drm_mode_getresources] [CONNECTOR:40:DP-1]
>[   52.075214] [drm:drm_mode_getresources] [CONNECTOR:44:HDMI-A-1]
>[   52.075215] [drm:drm_mode_getresources] [CONNECTOR:47:DP-2]
>[   52.075217] [drm:drm_mode_getresources] [CONNECTOR:51:HDMI-A-2]
>[   52.075218] [drm:drm_mode_getresources] [CONNECTOR:56:DP-3]
>[   52.075220] [drm:drm_mode_getresources] [CONNECTOR:61:DP-4]
>[   52.075221] [drm:drm_mode_getresources] [CONNECTOR:66:DP-5]
>[   52.075237] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.075240] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[8] ENCODERS[9]
>[   52.075243] [drm:drm_mode_getconnector] [CONNECTOR:61:?]
>[   52.075247] [drm:drm_mode_getconnector] [CONNECTOR:61:?]
>[   52.075252] [drm:drm_mode_getconnector] [CONNECTOR:61:?]
>[   52.075420] [drm:drm_mode_getconnector] [CONNECTOR:66:?]
>[   52.075423] [drm:drm_mode_getconnector] [CONNECTOR:66:?]
>[   52.075427] [drm:drm_mode_getconnector] [CONNECTOR:66:?]
>[   52.075567] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   52.075569] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1]
>[   52.075571] [drm:intel_dp_detect] [CONNECTOR:32:eDP-1]
>[   52.075589] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   52.075591] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   52.075896] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   52.076204] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   52.076647] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   52.076650] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1] probed modes :
>[   52.076654] [drm:drm_mode_debug_printmodeline] Modeline 33:"2560x1440" 60 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x48 0x9
>[   52.076657] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   52.076659] [drm:drm_mode_getconnector] [CONNECTOR:40:?]
>[   52.076661] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1]
>[   52.076662] [drm:intel_dp_detect] [CONNECTOR:40:DP-1]
>[   52.076667] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1] disconnected
>[   52.076669] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   52.076670] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2]
>[   52.076672] [drm:intel_dp_detect] [CONNECTOR:47:DP-2]
>[   52.076673] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2] disconnected
>[   52.076675] [drm:drm_mode_getconnector] [CONNECTOR:56:?]
>[   52.076677] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3]
>[   52.076679] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3] disconnected
>[   52.076681] [drm:drm_mode_getconnector] [CONNECTOR:61:?]
>[   52.076682] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:61:DP-4]
>[   52.076684] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:61:DP-4] status updated from 3 to 1
>[   52.076987] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.078066] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   52.078069] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   52.078076] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   52.078245] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.078559] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   52.079266] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.079584] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.079585] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   52.079586] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   52.079885] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.081546] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   52.081548] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   52.081553] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   52.082030] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   52.082392] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.082747] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.083102] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.083289] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.083445] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.083762] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.083763] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   52.083764] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   52.084786] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   52.084788] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   52.084792] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   52.085274] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.085275] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   52.085636] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.085992] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.086346] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.086534] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.086691] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.087008] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.087008] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   52.087010] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   52.088016] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   52.088018] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   52.088043] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   52.088210] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.088529] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.088530] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   52.088890] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.089247] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.089590] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.090254] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.090255] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   52.090256] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   52.090556] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.092212] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   52.092214] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   52.092234] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   52.092717] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.092718] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   52.094437] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   52.094439] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   52.095468] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   52.095470] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   52.095490] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   52.095973] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.095974] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   52.096335] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.096690] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.097046] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.097233] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.097388] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.097701] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   52.097702] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   52.098715] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   52.098717] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   52.098736] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   52.099220] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.099221] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   52.099582] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.099938] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.100280] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.100297] [drm:drm_mode_detailed] composite sync not supported
>[   52.100358] [drm:drm_edid_to_eld] ELD monitor Pro2840m
>[   52.100360] [drm:drm_edid_to_eld] ELD size 32, SAD count 1
>[   52.100390] [drm:drm_mode_debug_printmodeline] Modeline 90:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   52.100392] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
>[   52.100395] [drm:drm_mode_debug_printmodeline] Modeline 94:"720x480i" 0 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[   52.100396] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
>[   52.100399] [drm:drm_mode_debug_printmodeline] Modeline 95:"720x576i" 0 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   52.100400] [drm:drm_mode_prune_invalid] Not using 720x576i mode: NO_INTERLACE
>[   52.100403] [drm:drm_mode_debug_printmodeline] Modeline 100:"1920x1080i" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   52.100404] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
>[   52.100407] [drm:drm_mode_debug_printmodeline] Modeline 110:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   52.100408] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
>[   52.100411] [drm:drm_mode_debug_printmodeline] Modeline 114:"720x480i" 60 13513 720 739 801 858 480 488 494 525 0x40 0x101a
>[   52.100412] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
>[   52.100418] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:61:DP-4] probed modes :
>[   52.100420] [drm:drm_mode_debug_printmodeline] Modeline 69:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x5
>[   52.100423] [drm:drm_mode_debug_printmodeline] Modeline 70:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   52.100425] [drm:drm_mode_debug_printmodeline] Modeline 106:"3840x2160" 30 296704 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   52.100428] [drm:drm_mode_debug_printmodeline] Modeline 74:"1920x2160" 60 297000 1920 2008 2052 2200 2160 2168 2178 2250 0x40 0xa
>[   52.100430] [drm:drm_mode_debug_printmodeline] Modeline 72:"2560x1600" 60 268500 2560 2608 2640 2720 1600 1603 1609 1646 0x40 0x6
>[   52.100432] [drm:drm_mode_debug_printmodeline] Modeline 73:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x6
>[   52.100435] [drm:drm_mode_debug_printmodeline] Modeline 82:"1920x1200" 60 193250 1920 2056 2256 2592 1200 1203 1209 1245 0x40 0x6
>[   52.100437] [drm:drm_mode_debug_printmodeline] Modeline 81:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0xa
>[   52.100440] [drm:drm_mode_debug_printmodeline] Modeline 89:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   52.100442] [drm:drm_mode_debug_printmodeline] Modeline 109:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   52.100445] [drm:drm_mode_debug_printmodeline] Modeline 97:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   52.100447] [drm:drm_mode_debug_printmodeline] Modeline 105:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   52.100450] [drm:drm_mode_debug_printmodeline] Modeline 118:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   52.100452] [drm:drm_mode_debug_printmodeline] Modeline 101:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   52.100454] [drm:drm_mode_debug_printmodeline] Modeline 116:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   52.100471] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.100474] [drm:drm_mode_debug_printmodeline] Modeline 80:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[   52.100476] [drm:drm_mode_debug_printmodeline] Modeline 79:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[   52.100479] [drm:drm_mode_debug_printmodeline] Modeline 77:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   52.100481] [drm:drm_mode_debug_printmodeline] Modeline 78:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[   52.100484] [drm:drm_mode_debug_printmodeline] Modeline 71:"1360x768" 60 85500 1360 1472 1536 1792 768 771 777 795 0x40 0x5
>[   52.100486] [drm:drm_mode_debug_printmodeline] Modeline 75:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6
>[   52.100488] [drm:drm_mode_debug_printmodeline] Modeline 76:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   52.100491] [drm:drm_mode_debug_printmodeline] Modeline 107:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   52.100493] [drm:drm_mode_debug_printmodeline] Modeline 99:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   52.100495] [drm:drm_mode_debug_printmodeline] Modeline 87:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   52.100498] [drm:drm_mode_debug_printmodeline] Modeline 83:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   52.100500] [drm:drm_mode_debug_printmodeline] Modeline 98:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   52.100503] [drm:drm_mode_debug_printmodeline] Modeline 112:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   52.100505] [drm:drm_mode_debug_printmodeline] Modeline 92:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   52.100507] [drm:drm_mode_debug_printmodeline] Modeline 84:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   52.100510] [drm:drm_mode_debug_printmodeline] Modeline 96:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   52.100512] [drm:drm_mode_debug_printmodeline] Modeline 86:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   52.100559] [drm:drm_mode_getconnector] [CONNECTOR:61:?]
>[   52.100567] [drm:drm_mode_getconnector] [CONNECTOR:66:?]
>[   52.100569] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:66:DP-5]
>[   52.100571] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:66:DP-5] status updated from 3 to 2
>[   52.100573] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:66:DP-5] disconnected
>[   52.100591] [drm:drm_mode_getconnector] [CONNECTOR:44:?]
>[   52.100593] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1]
>[   52.100595] [drm:intel_hdmi_detect] [CONNECTOR:44:HDMI-A-1]
>[   52.100626] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.101298] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.101350] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   52.101353] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   52.120616] [drm:intel_hdmi_detect] Live status not up!
>[   52.120620] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1] disconnected
>[   52.120627] [drm:drm_mode_getconnector] [CONNECTOR:51:?]
>[   52.120629] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2]
>[   52.120631] [drm:intel_hdmi_detect] [CONNECTOR:51:HDMI-A-2]
>[   52.130806] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.130818] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   52.130820] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   52.130973] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.130983] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   52.130985] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   52.130987] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2] disconnected
>[   52.131279] [drm:drm_mode_getresources] [CONNECTOR:32:eDP-1]
>[   52.131281] [drm:drm_mode_getresources] [CONNECTOR:40:DP-1]
>[   52.131283] [drm:drm_mode_getresources] [CONNECTOR:44:HDMI-A-1]
>[   52.131284] [drm:drm_mode_getresources] [CONNECTOR:47:DP-2]
>[   52.131286] [drm:drm_mode_getresources] [CONNECTOR:51:HDMI-A-2]
>[   52.131287] [drm:drm_mode_getresources] [CONNECTOR:56:DP-3]
>[   52.131289] [drm:drm_mode_getresources] [CONNECTOR:61:DP-4]
>[   52.131290] [drm:drm_mode_getresources] [CONNECTOR:66:DP-5]
>[   52.131292] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[8] ENCODERS[9]
>[   52.131295] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   52.131297] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1]
>[   52.131298] [drm:intel_dp_detect] [CONNECTOR:32:eDP-1]
>[   52.131612] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   52.131920] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   52.132364] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   52.132367] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1] probed modes :
>[   52.132380] [drm:drm_mode_debug_printmodeline] Modeline 33:"2560x1440" 60 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x48 0x9
>[   52.132383] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   52.132385] [drm:drm_mode_getconnector] [CONNECTOR:40:?]
>[   52.132387] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1]
>[   52.132388] [drm:intel_dp_detect] [CONNECTOR:40:DP-1]
>[   52.132393] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1] disconnected
>[   52.132395] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   52.132396] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2]
>[   52.132397] [drm:intel_dp_detect] [CONNECTOR:47:DP-2]
>[   52.132399] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2] disconnected
>[   52.132401] [drm:drm_mode_getconnector] [CONNECTOR:56:?]
>[   52.132403] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3]
>[   52.132405] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3] disconnected
>[   52.132407] [drm:drm_mode_getconnector] [CONNECTOR:61:?]
>[   52.132408] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:61:DP-4]
>[   52.132720] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.133795] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   52.133797] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   52.133818] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   52.134305] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.134306] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   52.134858] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.135011] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.135329] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.135330] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   52.135331] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   52.135634] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.137294] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   52.137296] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   52.137315] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   52.137794] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   52.138510] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.138865] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.139051] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.139207] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.139525] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.139526] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   52.139527] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   52.140538] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   52.140540] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   52.140545] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   52.141027] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.141028] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   52.141388] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.141744] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.142100] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.142287] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.142443] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.142760] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.142761] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   52.142763] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   52.143770] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   52.143772] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   52.143796] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   52.144282] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.144283] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   52.144644] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.145000] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.145343] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.145533] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.145689] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.146007] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.146008] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   52.146010] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   52.146309] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.147965] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   52.147967] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   52.147987] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   52.148472] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.148473] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   52.148834] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.149189] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.149547] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.149734] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.149890] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.150207] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.150208] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   52.150209] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   52.151231] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   52.151233] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   52.151237] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   52.151714] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   52.152430] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.152786] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.152972] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.153127] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.153445] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.153446] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   52.153447] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   52.154456] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   52.154458] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   52.154463] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   52.154940] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   52.155300] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.155657] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.156000] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.156015] [drm:drm_mode_detailed] composite sync not supported
>[   52.156074] [drm:drm_edid_to_eld] ELD monitor Pro2840m
>[   52.156076] [drm:drm_edid_to_eld] ELD size 32, SAD count 1
>[   52.156112] [drm:drm_mode_debug_printmodeline] Modeline 122:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   52.156114] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
>[   52.156117] [drm:drm_mode_debug_printmodeline] Modeline 126:"720x480i" 0 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[   52.156118] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
>[   52.156121] [drm:drm_mode_debug_printmodeline] Modeline 127:"720x576i" 0 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   52.156122] [drm:drm_mode_prune_invalid] Not using 720x576i mode: NO_INTERLACE
>[   52.156125] [drm:drm_mode_debug_printmodeline] Modeline 132:"1920x1080i" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   52.156126] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
>[   52.156128] [drm:drm_mode_debug_printmodeline] Modeline 142:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   52.156130] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
>[   52.156132] [drm:drm_mode_debug_printmodeline] Modeline 146:"720x480i" 60 13513 720 739 801 858 480 488 494 525 0x40 0x101a
>[   52.156134] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
>[   52.156138] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:61:DP-4] probed modes :
>[   52.156141] [drm:drm_mode_debug_printmodeline] Modeline 69:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x5
>[   52.156143] [drm:drm_mode_debug_printmodeline] Modeline 70:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   52.156146] [drm:drm_mode_debug_printmodeline] Modeline 106:"3840x2160" 30 296704 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   52.156148] [drm:drm_mode_debug_printmodeline] Modeline 74:"1920x2160" 60 297000 1920 2008 2052 2200 2160 2168 2178 2250 0x40 0xa
>[   52.156151] [drm:drm_mode_debug_printmodeline] Modeline 72:"2560x1600" 60 268500 2560 2608 2640 2720 1600 1603 1609 1646 0x40 0x6
>[   52.156153] [drm:drm_mode_debug_printmodeline] Modeline 73:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x6
>[   52.156156] [drm:drm_mode_debug_printmodeline] Modeline 82:"1920x1200" 60 193250 1920 2056 2256 2592 1200 1203 1209 1245 0x40 0x6
>[   52.156158] [drm:drm_mode_debug_printmodeline] Modeline 81:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0xa
>[   52.156160] [drm:drm_mode_debug_printmodeline] Modeline 89:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   52.156163] [drm:drm_mode_debug_printmodeline] Modeline 109:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   52.156165] [drm:drm_mode_debug_printmodeline] Modeline 97:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   52.156168] [drm:drm_mode_debug_printmodeline] Modeline 105:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   52.156170] [drm:drm_mode_debug_printmodeline] Modeline 118:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   52.156186] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.156201] [drm:drm_mode_debug_printmodeline] Modeline 101:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   52.156203] [drm:drm_mode_debug_printmodeline] Modeline 116:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   52.156206] [drm:drm_mode_debug_printmodeline] Modeline 80:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[   52.156208] [drm:drm_mode_debug_printmodeline] Modeline 79:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[   52.156210] [drm:drm_mode_debug_printmodeline] Modeline 77:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   52.156213] [drm:drm_mode_debug_printmodeline] Modeline 78:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[   52.156215] [drm:drm_mode_debug_printmodeline] Modeline 71:"1360x768" 60 85500 1360 1472 1536 1792 768 771 777 795 0x40 0x5
>[   52.156218] [drm:drm_mode_debug_printmodeline] Modeline 75:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6
>[   52.156221] [drm:drm_mode_debug_printmodeline] Modeline 76:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   52.156224] [drm:drm_mode_debug_printmodeline] Modeline 107:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   52.156226] [drm:drm_mode_debug_printmodeline] Modeline 99:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   52.156228] [drm:drm_mode_debug_printmodeline] Modeline 87:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   52.156231] [drm:drm_mode_debug_printmodeline] Modeline 83:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   52.156233] [drm:drm_mode_debug_printmodeline] Modeline 98:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   52.156236] [drm:drm_mode_debug_printmodeline] Modeline 112:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   52.156238] [drm:drm_mode_debug_printmodeline] Modeline 92:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   52.156240] [drm:drm_mode_debug_printmodeline] Modeline 84:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   52.156243] [drm:drm_mode_debug_printmodeline] Modeline 96:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   52.156246] [drm:drm_mode_debug_printmodeline] Modeline 86:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   52.156253] [drm:drm_mode_getconnector] [CONNECTOR:61:?]
>[   52.156261] [drm:drm_mode_getconnector] [CONNECTOR:66:?]
>[   52.156262] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:66:DP-5]
>[   52.156264] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:66:DP-5] disconnected
>[   52.156267] [drm:drm_mode_getconnector] [CONNECTOR:44:?]
>[   52.156269] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1]
>[   52.156271] [drm:intel_hdmi_detect] [CONNECTOR:44:HDMI-A-1]
>[   52.156342] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.156659] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.156660] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   52.156662] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   52.176291] [drm:intel_hdmi_detect] Live status not up!
>[   52.176295] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1] disconnected
>[   52.176303] [drm:drm_mode_getconnector] [CONNECTOR:51:?]
>[   52.176305] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2]
>[   52.176306] [drm:intel_hdmi_detect] [CONNECTOR:51:HDMI-A-2]
>[   52.186481] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.186494] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   52.186495] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   52.186648] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   52.186659] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   52.186661] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   52.186662] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2] disconnected
>[   52.189333] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1d400
>[   52.189337] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff8800b7a8ca80 state to ffff8800b9e1d400
>[   52.189340] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff880092258400 state to ffff8800b9e1d400
>[   52.189342] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b7a8ca80 to [CRTC:25]
>[   52.189343] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff8800b7a8ca80
>[   52.189345] [drm:drm_atomic_check_only] checking ffff8800b9e1d400
>[   52.189350] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb 55
>[   52.189351] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 1 -> 1, off 0, on 0, ms 0
>[   52.189354] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800351f1a80 state to ffff8800b9e1d400
>[   52.189357] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8801e1869780 state to ffff8800b9e1d400
>[   52.189360] [drm:drm_atomic_commit] commiting ffff8800b9e1d400
>[   52.189380] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1d400
>[   52.189383] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1d400
>[   53.174357] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aea00
>[   53.174364] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff8800b7aef480 state to ffff8800b91aea00
>[   53.174367] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff8800b91c7800 state to ffff8800b91aea00
>[   53.174369] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b7aef480 to [CRTC:25]
>[   53.174371] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff8800b7aef480
>[   53.174372] [drm:drm_atomic_check_only] checking ffff8800b91aea00
>[   53.174377] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb 55
>[   53.174379] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 1 -> 1, off 0, on 0, ms 0
>[   53.174382] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800b7aef000 state to ffff8800b91aea00
>[   53.174384] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800b7aef840 state to ffff8800b91aea00
>[   53.174388] [drm:drm_atomic_commit] commiting ffff8800b91aea00
>[   53.174409] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aea00
>[   53.174412] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aea00
>[   53.184300] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af600
>[   53.184306] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff8800b7aef3c0 state to ffff8800b91af600
>[   53.184309] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff8800b91c0c00 state to ffff8800b91af600
>[   53.184311] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b7aef3c0 to [CRTC:25]
>[   53.184312] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff8800b7aef3c0
>[   53.184314] [drm:drm_atomic_check_only] checking ffff8800b91af600
>[   53.184318] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb 55
>[   53.184320] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 1 -> 1, off 0, on 0, ms 0
>[   53.184323] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800b7aef6c0 state to ffff8800b91af600
>[   53.184325] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800b7aefd80 state to ffff8800b91af600
>[   53.184328] [drm:drm_atomic_commit] commiting ffff8800b91af600
>[   53.184349] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af600
>[   53.184351] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af600
>[   53.193262] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af600
>[   53.193267] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff8800b7aef840 state to ffff8800b91af600
>[   53.193270] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff8800b91c7800 state to ffff8800b91af600
>[   53.193272] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b7aef840 to [CRTC:25]
>[   53.193274] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff8800b7aef840
>[   53.193275] [drm:drm_atomic_check_only] checking ffff8800b91af600
>[   53.193280] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb 55
>[   53.193282] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 1 -> 1, off 0, on 0, ms 0
>[   53.193285] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800b7aef480 state to ffff8800b91af600
>[   53.193287] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800b7aef000 state to ffff8800b91af600
>[   53.193290] [drm:drm_atomic_commit] commiting ffff8800b91af600
>[   53.193308] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af600
>[   53.193311] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af600
>[   53.203340] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af800
>[   53.203346] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff8800b7aefd80 state to ffff8800b91af800
>[   53.203349] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff8800b91c0c00 state to ffff8800b91af800
>[   53.203351] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b7aefd80 to [CRTC:25]
>[   53.203352] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff8800b7aefd80
>[   53.203354] [drm:drm_atomic_check_only] checking ffff8800b91af800
>[   53.203359] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb 55
>[   53.203360] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 1 -> 1, off 0, on 0, ms 0
>[   53.203363] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800b7aef3c0 state to ffff8800b91af800
>[   53.203365] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800b7aef6c0 state to ffff8800b91af800
>[   53.203369] [drm:drm_atomic_commit] commiting ffff8800b91af800
>[   53.203388] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af800
>[   53.203390] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af800
>[   53.205538] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af000
>[   53.205542] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff8800b7aef000 state to ffff8800b91af000
>[   53.205544] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff8800b91c7800 state to ffff8800b91af000
>[   53.205545] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b7aef000 to [CRTC:25]
>[   53.205546] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff8800b7aef000
>[   53.205547] [drm:drm_atomic_check_only] checking ffff8800b91af000
>[   53.205550] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb 55
>[   53.205551] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 1 -> 1, off 0, on 0, ms 0
>[   53.205553] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800b7aef840 state to ffff8800b91af000
>[   53.205554] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800b7aef480 state to ffff8800b91af000
>[   53.205557] [drm:drm_atomic_commit] commiting ffff8800b91af000
>[   53.205638] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af000
>[   53.205643] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af000
>[   53.205803] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1d600
>[   53.205806] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff880200fbe6c0 state to ffff8800b9e1d600
>[   53.205808] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225dc00 state to ffff8800b9e1d600
>[   53.205810] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200fbe6c0 to [CRTC:25]
>[   53.205812] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff880200fbe6c0
>[   53.205813] [drm:drm_atomic_check_only] checking ffff8800b9e1d600
>[   53.205816] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb 55
>[   53.205818] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 1 -> 1, off 0, on 0, ms 0
>[   53.205821] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff880200fbec00 state to ffff8800b9e1d600
>[   53.205823] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff880200fbe3c0 state to ffff8800b9e1d600
>[   53.205844] [drm:drm_atomic_commit] commiting ffff8800b9e1d600
>[   53.205857] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1d600
>[   53.205860] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1d600
>[   53.213411] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1ce00
>[   53.213416] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff880200fbeb40 state to ffff8800b9e1ce00
>[   53.213419] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225a000 state to ffff8800b9e1ce00
>[   53.213421] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200fbeb40 to [CRTC:25]
>[   53.213423] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff880200fbeb40
>[   53.213424] [drm:drm_atomic_check_only] checking ffff8800b9e1ce00
>[   53.213429] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb 55
>[   53.213431] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 1 -> 1, off 0, on 0, ms 0
>[   53.213434] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff880200fbe780 state to ffff8800b9e1ce00
>[   53.213436] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff880200fbe540 state to ffff8800b9e1ce00
>[   53.213439] [drm:drm_atomic_commit] commiting ffff8800b9e1ce00
>[   53.213458] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1ce00
>[   53.213461] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1ce00
>[   53.222559] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   53.222567] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff880200fbec00 state to ffff8800b9e1cc00
>[   53.222572] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225b800 state to ffff8800b9e1cc00
>[   53.222574] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200fbec00 to [CRTC:25]
>[   53.222576] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff880200fbec00
>[   53.222578] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   53.222595] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb 55
>[   53.222596] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 1 -> 1, off 0, on 0, ms 0
>[   53.222603] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff880200fbe300 state to ffff8800b9e1cc00
>[   53.222606] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff880200fbe900 state to ffff8800b9e1cc00
>[   53.222615] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   53.222651] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   53.222655] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   53.229766] [drm:drm_atomic_state_init] Allocated atomic state ffff8801e198fa00
>[   53.229770] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b2e40 state to ffff8801e198fa00
>[   53.229772] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff8801e1917000 state to ffff8801e198fa00
>[   53.229773] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2e40 to [NOCRTC]
>[   53.229774] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88021e2b2e40
>[   53.229775] [drm:drm_atomic_check_only] checking ffff8801e198fa00
>[   53.229778] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb -1
>[   53.229779] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 1 -> 0, off 1, on 0, ms 0
>[   53.229782] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b2840 state to ffff8801e198fa00
>[   53.229783] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b20c0 state to ffff8801e198fa00
>[   53.229786] [drm:drm_atomic_commit] commiting ffff8801e198fa00
>[   53.229805] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8801e198fa00
>[   53.229807] [drm:drm_atomic_state_free] Freeing atomic state ffff8801e198fa00
>[   53.229900] [drm:drm_atomic_state_init] Allocated atomic state ffff8801e198ca00
>[   53.229902] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b2540 state to ffff8801e198ca00
>[   53.229904] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff8801e1914400 state to ffff8801e198ca00
>[   53.229905] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2540 to [CRTC:25]
>[   53.229906] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b2540
>[   53.229906] [drm:drm_atomic_check_only] checking ffff8801e198ca00
>[   53.229909] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb 55
>[   53.229910] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 0 -> 1, off 0, on 1, ms 0
>[   53.229911] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b23c0 state to ffff8801e198ca00
>[   53.229912] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b29c0 state to ffff8801e198ca00
>[   53.229914] [drm:drm_atomic_commit] commiting ffff8801e198ca00
>[   53.229927] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8801e198ca00
>[   53.229928] [drm:drm_atomic_state_free] Freeing atomic state ffff8801e198ca00
>[   53.229966] [drm:drm_mode_setcrtc] [CRTC:21]
>[   53.229969] [drm:drm_mode_setcrtc] [CONNECTOR:32:eDP-1]
>[   53.229970] [drm:drm_atomic_state_init] Allocated atomic state ffff8801e198c200
>[   53.229971] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1917000 state to ffff8801e198c200
>[   53.229972] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b20c0 state to ffff8801e198c200
>[   53.229974] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:] for CRTC state ffff8801e1917000
>[   53.229975] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b20c0 to [CRTC:21]
>[   53.229975] [drm:drm_atomic_set_fb_for_plane] Set [FB:65] for plane state ffff88021e2b20c0
>[   53.229977] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:32] ffff880200e47800 state to ffff8801e198c200
>[   53.229978] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff8801e1915800 state to ffff8801e198c200
>[   53.229979] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff8801e198c200
>[   53.229980] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff8801e198c200
>[   53.229981] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880200e47800 to [CRTC:21]
>[   53.229982] [drm:drm_atomic_connectors_for_crtc] State ffff8801e198c200 has 0 connectors for [CRTC:25]
>[   53.229983] [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state ffff8801e1915800
>[   53.229985] [drm:drm_atomic_check_only] checking ffff8801e198c200
>[   53.229986] [drm:drm_atomic_helper_check_modeset] [CRTC:21] mode changed
>[   53.229987] [drm:drm_atomic_helper_check_modeset] [CRTC:21] enable changed
>[   53.229988] [drm:drm_atomic_helper_check_modeset] [CRTC:25] mode changed
>[   53.229988] [drm:drm_atomic_helper_check_modeset] [CRTC:25] enable changed
>[   53.229989] [drm:update_connector_routing] Updating routing for [CONNECTOR:32:eDP-1]
>[   53.229990] [drm:update_connector_routing] [CONNECTOR:32:eDP-1] keeps [ENCODER:31:TMDS-31], now on [CRTC:21]
>[   53.229991] [drm:drm_atomic_helper_check_modeset] [CRTC:21] active changed
>[   53.229992] [drm:drm_atomic_helper_check_modeset] [CRTC:21] needs all connectors, enable: y, active: y
>[   53.229993] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff8801e198c200
>[   53.229994] [drm:drm_atomic_connectors_for_crtc] State ffff8801e198c200 has 1 connectors for [CRTC:21]
>[   53.229995] [drm:drm_atomic_helper_check_modeset] [CRTC:25] active changed
>[   53.229996] [drm:drm_atomic_helper_check_modeset] [CRTC:25] needs all connectors, enable: n, active: n
>[   53.229996] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff8801e198c200
>[   53.229998] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b2840 state to ffff8801e198c200
>[   53.229999] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b2180 state to ffff8801e198c200
>[   53.230001] [drm:drm_atomic_connectors_for_crtc] State ffff8801e198c200 has 0 connectors for [CRTC:25]
>[   53.230002] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff8801e198c200
>[   53.230003] [drm:connected_sink_compute_bpp] [CONNECTOR:32:eDP-1] checking for sink bpp constrains
>[   53.230005] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to default limit of 24
>[   53.230007] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 270000 pixel clock 237800KHz
>[   53.230008] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[   53.230010] [drm:intel_dp_compute_config] DP link bw 0a rate select 00 lane count 4 clock 270000 bpp 18
>[   53.230011] [drm:intel_dp_compute_config] DP link bw required 428040 available 864000
>[   53.230012] [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[   53.230014] [drm:intel_pipe_config_compare] mismatch in cpu_transcoder (expected 0, found 3)
>[   53.230015] [drm:intel_pipe_config_compare] mismatch in lane_count (expected 2, found 4)
>[   53.230016] [drm:intel_pipe_config_compare] mismatch in dp_m_n (expected tu 33 gmch 12425625/8388608 link 1035468/1048576, or tu 0 gmch 0/0 link 0/0, found tu 64, gmch 4155856/8388608 link 461761/524288)
>[   53.230017] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hdisplay (expected 0, found 2560)
>[   53.230018] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_htotal (expected 0, found 2720)
>[   53.230019] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hblank_start (expected 0, found 2560)
>[   53.230020] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hblank_end (expected 0, found 2720)
>[   53.230020] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hsync_start (expected 0, found 2608)
>[   53.230021] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hsync_end (expected 0, found 2640)
>[   53.230022] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vdisplay (expected 0, found 1440)
>[   53.230023] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vtotal (expected 0, found 1457)
>[   53.230023] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vblank_start (expected 0, found 1440)
>[   53.230024] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vblank_end (expected 0, found 1457)
>[   53.230025] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vsync_start (expected 0, found 1442)
>[   53.230026] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vsync_end (expected 0, found 1445)
>[   53.230027] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.flags(DRM_MODE_FLAG_PHSYNC) (expected 0, found 1)
>[   53.230027] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.flags(DRM_MODE_FLAG_NVSYNC) (expected 0, found 8)
>[   53.230029] [drm:intel_pipe_config_compare] mismatch in ddi_pll_sel (expected 0x00000000, found 0x20000000)
>[   53.230030] [drm:intel_pipe_config_compare] mismatch in pipe_bpp (expected 24, found 18)
>[   53.230031] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_clock (expected 0, found 237800)
>[   53.230031] [drm:intel_pipe_config_compare] mismatch in port_clock (expected 540000, found 270000)
>[   53.230034] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config ffff8801e1917000 for pipe A
>[   53.230035] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   53.230035] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[   53.230036] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   53.230038] [drm:intel_dump_pipe_config] dp: 1, lanes: 4, gmch_m: 4155856, gmch_n: 8388608, link_m: 461761, link_n: 524288, tu: 64
>[   53.230039] [drm:intel_dump_pipe_config] dp: 1, lanes: 4, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   53.230039] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   53.230040] [drm:intel_dump_pipe_config] requested mode:
>[   53.230042] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x0 0x9
>[   53.230042] [drm:intel_dump_pipe_config] adjusted mode:
>[   53.230044] [drm:drm_mode_debug_printmodeline] Modeline 0:"2560x1440" 60 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x48 0x9
>[   53.230045] [drm:intel_dump_crtc_timings] crtc timings: 237800 2560 2608 2640 2720 1440 1442 1445 1457, type: 0x48 flags: 0x9
>[   53.230046] [drm:intel_dump_pipe_config] port clock: 270000
>[   53.230046] [drm:intel_dump_pipe_config] pipe src size: 2560x1440
>[   53.230047] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[   53.230048] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   53.230049] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   53.230050] [drm:intel_dump_pipe_config] ips: 1
>[   53.230050] [drm:intel_dump_pipe_config] double wide: 0
>[   53.230051] [drm:intel_dump_pipe_config] ddi_pll_sel: 536870912; dpll_hw_state: wrpll: 0x0
>[   53.230052] [drm:intel_dump_pipe_config] planes on this crtc
>[   53.230054] [drm:intel_dump_pipe_config] STANDARD PLANE:18 plane: 0.0 idx: 0 disabled, scaler_id = 0
>[   53.230055] [drm:intel_dump_pipe_config] CURSOR PLANE:20 plane: 0.1 idx: 1 disabled, scaler_id = 0
>[   53.230056] [drm:intel_dump_pipe_config] STANDARD PLANE:22 plane: 0.1 idx: 2 disabled, scaler_id = 0
>[   53.230058] [drm:drm_atomic_get_crtc_state] Added [CRTC:29] ffff8801e1914c00 state to ffff8801e198c200
>[   53.230059] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 65
>[   53.230060] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 0 -> 1, off 0, on 1, ms 1
>[   53.230061] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:23] with fb 65
>[   53.230062] [drm:intel_plane_atomic_calc_changes] [PLANE:23] visible 1 -> 0, off 1, on 0, ms 1
>[   53.230063] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb 55
>[   53.230064] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 1 -> 0, off 1, on 0, ms 1
>[   53.230066] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b26c0 state to ffff8801e198c200
>[   53.230067] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b2a80 state to ffff8801e198c200
>[   53.230069] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b2000 state to ffff8801e198c200
>[   53.230070] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff88021e2b2d80 state to ffff8801e198c200
>[   53.230071] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff8800b9cc7b40 state to ffff8801e198c200
>[   53.230072] [drm:drm_atomic_get_plane_state] Added [PLANE:30] ffff8800b9cc7000 state to ffff8801e198c200
>[   53.230075] [drm:drm_atomic_commit] commiting ffff8801e198c200
>[   53.231849] [drm:intel_edp_backlight_off] 
>[   53.432999] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[   53.433011] [drm:intel_disable_pipe] disabling pipe B
>[   53.439242] [drm:edp_panel_off] Turn eDP port A panel power off
>[   53.439248] [drm:wait_panel_off] Wait for panel power off time
>[   53.439262] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[   53.491532] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000008, dig 0x00000012, pins 0x00000010
>[   53.491536] [drm:intel_hpd_irq_handler] digital hpd port A - long
>[   53.491537] [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 4 - cnt: 0
>[   53.491566] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port A
>[   53.495048] [drm:wait_panel_status] Wait complete
>[   53.495069] [drm:edp_panel_on] Turn eDP port A panel power on
>[   53.495072] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   54.040362] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[   54.040367] [drm:wait_panel_status] Wait complete
>[   54.040371] [drm:wait_panel_on] Wait for panel power on
>[   54.040374] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[   54.144448] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000008, dig 0x00000012, pins 0x00000010
>[   54.144452] [drm:intel_hpd_irq_handler] digital hpd port A - long
>[   54.144454] [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 4 - cnt: 1
>[   54.144477] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port A
>[   54.192734] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000008, dig 0x00000011, pins 0x00000010
>[   54.192738] [drm:intel_hpd_irq_handler] digital hpd port A - short
>[   54.192761] [drm:intel_dp_hpd_pulse] got hpd irq on port A - short
>[   54.257514] [drm:wait_panel_status] Wait complete
>[   54.257523] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   54.257529] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[   54.258607] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[   54.258609] [drm:intel_dp_set_signal_levels] Using vswing level 0
>[   54.258610] [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0
>[   54.259229] [drm:intel_dp_start_link_train] clock recovery OK
>[   54.260151] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[   54.260249] [drm:intel_enable_pipe] enabling pipe A
>[   54.260402] [drm:intel_edp_backlight_on] 
>[   54.260404] [drm:intel_panel_enable_backlight] pipe A
>[   54.260411] [drm:intel_panel_actually_set_backlight] set backlight PWM = 852
>[   54.263479] [drm:intel_psr_match_conditions] PSR disable by flag
>[   54.263481] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[   54.327065] [drm:intel_connector_check_state] [CONNECTOR:32:eDP-1]
>[   54.327069] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[   54.327072] [drm:check_encoder_state] [ENCODER:39:TMDS-39]
>[   54.327074] [drm:check_encoder_state] [ENCODER:41:DP MST-41]
>[   54.327075] [drm:check_encoder_state] [ENCODER:42:DP MST-42]
>[   54.327077] [drm:check_encoder_state] [ENCODER:43:DP MST-43]
>[   54.327078] [drm:check_encoder_state] [ENCODER:46:TMDS-46]
>[   54.327079] [drm:check_encoder_state] [ENCODER:48:DP MST-48]
>[   54.327081] [drm:check_encoder_state] [ENCODER:49:DP MST-49]
>[   54.327082] [drm:check_encoder_state] [ENCODER:50:DP MST-50]
>[   54.327083] [drm:check_crtc_state] [CRTC:21]
>[   54.327094] [drm:check_crtc_state] [CRTC:25]
>[   54.327096] [drm:check_shared_dpll_state] WRPLL 1
>[   54.327098] [drm:check_shared_dpll_state] WRPLL 2
>[   54.327100] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8801e198c200
>[   54.327105] [drm:drm_atomic_state_free] Freeing atomic state ffff8801e198c200
>[   54.327191] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327194] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880200fbeb40 state to ffff8800b9e1cc00
>[   54.327196] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.327198] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200fbeb40 to [CRTC:21]
>[   54.327199] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880200fbeb40
>[   54.327201] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327205] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.327206] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[   54.327209] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880200fbe780 state to ffff8800b9e1cc00
>[   54.327211] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880200fbe3c0 state to ffff8800b9e1cc00
>[   54.327214] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327234] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327235] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.327240] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327242] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff880200fbe900 state to ffff8800b9e1cc00
>[   54.327244] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff880092258800 state to ffff8800b9e1cc00
>[   54.327245] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200fbe900 to [CRTC:25]
>[   54.327246] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff880200fbe900
>[   54.327248] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327251] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff880200fbec00 state to ffff8800b9e1cc00
>[   54.327252] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff880200fbe300 state to ffff8800b9e1cc00
>[   54.327254] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327258] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327259] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.327282] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327284] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.327286] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.327287] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2000 to [CRTC:21]
>[   54.327288] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b2000
>[   54.327290] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327292] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.327293] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.327295] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.327297] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.327299] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327309] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327311] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.327314] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327316] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.327317] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.327319] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2a80 to [CRTC:25]
>[   54.327320] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b2a80
>[   54.327321] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327324] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b26c0 state to ffff8800b9e1cc00
>[   54.327325] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.327327] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327330] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327331] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.327345] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327347] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b29c0 state to ffff8800b9e1cc00
>[   54.327349] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092258800 state to ffff8800b9e1cc00
>[   54.327350] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b29c0 to [CRTC:21]
>[   54.327351] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b29c0
>[   54.327352] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327354] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.327356] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.327357] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2540 state to ffff8800b9e1cc00
>[   54.327359] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b23c0 state to ffff8800b9e1cc00
>[   54.327361] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327370] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327372] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.327375] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327377] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.327378] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.327380] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2840 to [CRTC:25]
>[   54.327381] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b2840
>[   54.327382] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327384] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.327386] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.327388] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327390] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327392] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.327405] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327408] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.327410] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.327411] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b20c0 to [CRTC:21]
>[   54.327412] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b20c0
>[   54.327414] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327415] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.327417] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.327418] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.327420] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b26c0 state to ffff8800b9e1cc00
>[   54.327422] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327431] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327433] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.327435] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327437] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b23c0 state to ffff8800b9e1cc00
>[   54.327438] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff880092258800 state to ffff8800b9e1cc00
>[   54.327440] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b23c0 to [CRTC:25]
>[   54.327441] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b23c0
>[   54.327442] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327444] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b29c0 state to ffff8800b9e1cc00
>[   54.327446] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b2540 state to ffff8800b9e1cc00
>[   54.327447] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327450] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327452] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.327465] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327470] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.327471] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.327473] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2180 to [CRTC:21]
>[   54.327474] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b2180
>[   54.327475] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327477] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.327478] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.327480] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.327482] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.327484] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327493] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327495] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.327498] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327499] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b26c0 state to ffff8800b9e1cc00
>[   54.327501] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.327502] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b26c0 to [CRTC:25]
>[   54.327504] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b26c0
>[   54.327505] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327525] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.327528] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.327530] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327533] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327535] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.327547] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327549] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b2540 state to ffff8800b9e1cc00
>[   54.327551] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092258800 state to ffff8800b9e1cc00
>[   54.327552] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2540 to [CRTC:21]
>[   54.327554] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b2540
>[   54.327555] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327557] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.327558] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.327560] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b23c0 state to ffff8800b9e1cc00
>[   54.327562] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b29c0 state to ffff8800b9e1cc00
>[   54.327564] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327573] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327575] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.327577] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327579] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.327581] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.327582] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2000 to [CRTC:25]
>[   54.327584] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b2000
>[   54.327585] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327587] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.327589] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.327591] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327594] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327595] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.327608] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327610] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.327615] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.327617] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2a80 to [CRTC:21]
>[   54.327618] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b2a80
>[   54.327619] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327621] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.327623] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.327625] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b26c0 state to ffff8800b9e1cc00
>[   54.327626] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.327628] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327637] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327639] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.327642] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327643] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b29c0 state to ffff8800b9e1cc00
>[   54.327645] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff880092258800 state to ffff8800b9e1cc00
>[   54.327646] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b29c0 to [CRTC:25]
>[   54.327648] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b29c0
>[   54.327650] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327652] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b2540 state to ffff8800b9e1cc00
>[   54.327654] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b23c0 state to ffff8800b9e1cc00
>[   54.327655] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327658] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327660] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.327671] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327673] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.327675] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.327676] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2840 to [CRTC:21]
>[   54.327678] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b2840
>[   54.327679] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327681] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.327682] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.327684] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.327685] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.327687] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327697] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327699] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.327701] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327703] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.327705] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.327706] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b20c0 to [CRTC:25]
>[   54.327707] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b20c0
>[   54.327709] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327711] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.327713] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b26c0 state to ffff8800b9e1cc00
>[   54.327715] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327717] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327719] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.327731] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327733] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b23c0 state to ffff8800b9e1cc00
>[   54.327735] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092258800 state to ffff8800b9e1cc00
>[   54.327736] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b23c0 to [CRTC:21]
>[   54.327738] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b23c0
>[   54.327739] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327741] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.327742] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.327744] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b29c0 state to ffff8800b9e1cc00
>[   54.327745] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b2540 state to ffff8800b9e1cc00
>[   54.327747] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327756] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327757] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.327761] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327762] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.327764] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.327765] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2180 to [CRTC:25]
>[   54.327767] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b2180
>[   54.327768] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327770] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.327772] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.327774] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327777] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327778] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.327790] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327792] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b26c0 state to ffff8800b9e1cc00
>[   54.327794] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.327796] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b26c0 to [CRTC:21]
>[   54.327797] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b26c0
>[   54.327798] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327800] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.327801] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.327803] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.327805] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.327806] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327815] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327817] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.327820] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327821] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b2540 state to ffff8800b9e1cc00
>[   54.327823] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff880092258800 state to ffff8800b9e1cc00
>[   54.327824] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2540 to [CRTC:25]
>[   54.327826] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b2540
>[   54.327827] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327829] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b23c0 state to ffff8800b9e1cc00
>[   54.327831] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b29c0 state to ffff8800b9e1cc00
>[   54.327832] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327835] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327836] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.327849] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327850] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.327852] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.327854] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2000 to [CRTC:21]
>[   54.327855] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b2000
>[   54.327856] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327858] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.327859] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.327861] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.327863] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.327865] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327875] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327876] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.327879] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327880] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.327882] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.327884] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2a80 to [CRTC:25]
>[   54.327885] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b2a80
>[   54.327887] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327889] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b26c0 state to ffff8800b9e1cc00
>[   54.327891] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.327892] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327895] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327896] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.327909] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327911] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b29c0 state to ffff8800b9e1cc00
>[   54.327913] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092258800 state to ffff8800b9e1cc00
>[   54.327915] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b29c0 to [CRTC:21]
>[   54.327916] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b29c0
>[   54.327917] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327919] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.327921] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.327922] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2540 state to ffff8800b9e1cc00
>[   54.327924] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b23c0 state to ffff8800b9e1cc00
>[   54.327926] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327935] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327936] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.327940] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327942] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.327944] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.327945] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2840 to [CRTC:25]
>[   54.327946] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b2840
>[   54.327948] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327950] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.327951] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.327953] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327956] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327957] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.327969] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.327971] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.327973] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.327975] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b20c0 to [CRTC:21]
>[   54.327976] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b20c0
>[   54.327977] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.327979] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.327982] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.327984] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.327985] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b26c0 state to ffff8800b9e1cc00
>[   54.327987] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.327996] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.327998] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328001] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328003] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b23c0 state to ffff8800b9e1cc00
>[   54.328005] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff880092258800 state to ffff8800b9e1cc00
>[   54.328006] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b23c0 to [CRTC:25]
>[   54.328008] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b23c0
>[   54.328009] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328011] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b29c0 state to ffff8800b9e1cc00
>[   54.328013] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b2540 state to ffff8800b9e1cc00
>[   54.328014] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328017] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328018] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328030] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328032] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.328033] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.328035] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2180 to [CRTC:21]
>[   54.328036] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b2180
>[   54.328037] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328039] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.328040] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.328042] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.328044] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.328046] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328055] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328056] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328059] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328061] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b26c0 state to ffff8800b9e1cc00
>[   54.328063] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.328064] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b26c0 to [CRTC:25]
>[   54.328065] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b26c0
>[   54.328066] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328068] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.328070] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.328072] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328075] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328076] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328089] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328091] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b2540 state to ffff8800b9e1cc00
>[   54.328093] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092258800 state to ffff8800b9e1cc00
>[   54.328094] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2540 to [CRTC:21]
>[   54.328096] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b2540
>[   54.328098] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328100] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.328101] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.328103] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b23c0 state to ffff8800b9e1cc00
>[   54.328105] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b29c0 state to ffff8800b9e1cc00
>[   54.328106] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328116] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328118] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328122] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328123] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.328125] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.328126] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2000 to [CRTC:25]
>[   54.328127] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b2000
>[   54.328128] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328131] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.328132] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.328134] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328136] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328138] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328155] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328157] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.328158] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.328160] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2a80 to [CRTC:21]
>[   54.328161] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b2a80
>[   54.328163] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328165] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.328166] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.328168] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b26c0 state to ffff8800b9e1cc00
>[   54.328170] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.328172] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328181] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328182] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328187] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328188] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b29c0 state to ffff8800b9e1cc00
>[   54.328190] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff880092258800 state to ffff8800b9e1cc00
>[   54.328192] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b29c0 to [CRTC:25]
>[   54.328193] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b29c0
>[   54.328194] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328196] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b2540 state to ffff8800b9e1cc00
>[   54.328198] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b23c0 state to ffff8800b9e1cc00
>[   54.328199] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328202] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328203] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328215] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328217] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.328218] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.328220] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2840 to [CRTC:21]
>[   54.328221] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b2840
>[   54.328222] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328224] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.328225] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.328227] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.328229] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.328231] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328241] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328243] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328245] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328247] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.328249] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.328251] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b20c0 to [CRTC:25]
>[   54.328252] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b20c0
>[   54.328253] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328255] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.328257] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b26c0 state to ffff8800b9e1cc00
>[   54.328259] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328261] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328263] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328273] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328275] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b23c0 state to ffff8800b9e1cc00
>[   54.328277] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092258800 state to ffff8800b9e1cc00
>[   54.328278] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b23c0 to [CRTC:21]
>[   54.328279] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b23c0
>[   54.328280] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328282] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.328284] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.328285] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b29c0 state to ffff8800b9e1cc00
>[   54.328287] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b2540 state to ffff8800b9e1cc00
>[   54.328289] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328299] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328300] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328303] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328305] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.328307] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.328308] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2180 to [CRTC:25]
>[   54.328309] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b2180
>[   54.328310] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328313] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.328314] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.328316] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328319] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328320] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328332] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328334] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b26c0 state to ffff8800b9e1cc00
>[   54.328336] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.328337] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b26c0 to [CRTC:21]
>[   54.328339] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b26c0
>[   54.328340] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328342] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.328344] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.328346] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.328348] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.328349] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328358] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328360] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328363] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328365] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b2540 state to ffff8800b9e1cc00
>[   54.328367] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff880092258800 state to ffff8800b9e1cc00
>[   54.328369] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2540 to [CRTC:25]
>[   54.328370] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b2540
>[   54.328371] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328373] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b23c0 state to ffff8800b9e1cc00
>[   54.328375] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b29c0 state to ffff8800b9e1cc00
>[   54.328377] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328379] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328380] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328392] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328394] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.328395] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.328397] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2000 to [CRTC:21]
>[   54.328398] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b2000
>[   54.328399] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328401] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.328403] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.328405] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.328406] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.328408] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328417] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328418] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328421] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328423] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.328425] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.328426] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2a80 to [CRTC:25]
>[   54.328427] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b2a80
>[   54.328428] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328430] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b26c0 state to ffff8800b9e1cc00
>[   54.328432] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.328435] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328438] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328439] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328452] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328454] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b29c0 state to ffff8800b9e1cc00
>[   54.328456] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092258800 state to ffff8800b9e1cc00
>[   54.328458] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b29c0 to [CRTC:21]
>[   54.328459] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b29c0
>[   54.328460] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328462] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.328463] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.328465] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2540 state to ffff8800b9e1cc00
>[   54.328467] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b23c0 state to ffff8800b9e1cc00
>[   54.328468] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328478] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328480] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328482] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328484] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.328485] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.328487] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2840 to [CRTC:25]
>[   54.328488] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b2840
>[   54.328489] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328491] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.328493] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.328494] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328497] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328499] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328515] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328517] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.328519] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.328520] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b20c0 to [CRTC:21]
>[   54.328521] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b20c0
>[   54.328523] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328525] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.328526] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.328528] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.328529] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b26c0 state to ffff8800b9e1cc00
>[   54.328532] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328544] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328545] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328549] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328550] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b23c0 state to ffff8800b9e1cc00
>[   54.328552] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff880092258800 state to ffff8800b9e1cc00
>[   54.328553] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b23c0 to [CRTC:25]
>[   54.328554] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b23c0
>[   54.328555] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328557] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b29c0 state to ffff8800b9e1cc00
>[   54.328559] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b2540 state to ffff8800b9e1cc00
>[   54.328561] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328563] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328565] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328582] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328584] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.328586] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.328588] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2180 to [CRTC:21]
>[   54.328589] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b2180
>[   54.328590] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328592] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.328593] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.328594] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.328596] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.328598] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328609] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328610] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328615] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328616] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b26c0 state to ffff8800b9e1cc00
>[   54.328618] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.328619] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b26c0 to [CRTC:25]
>[   54.328620] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b26c0
>[   54.328621] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328624] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.328625] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.328628] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328631] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328632] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328647] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328650] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b2540 state to ffff8800b9e1cc00
>[   54.328653] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092258800 state to ffff8800b9e1cc00
>[   54.328654] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2540 to [CRTC:21]
>[   54.328655] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b2540
>[   54.328656] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328658] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.328659] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.328661] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b23c0 state to ffff8800b9e1cc00
>[   54.328662] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b29c0 state to ffff8800b9e1cc00
>[   54.328664] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328674] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328676] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328679] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328680] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.328682] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.328684] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2000 to [CRTC:25]
>[   54.328685] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b2000
>[   54.328686] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328689] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.328690] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.328692] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328694] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328696] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328712] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328713] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.328715] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.328716] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2a80 to [CRTC:21]
>[   54.328717] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b2a80
>[   54.328720] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328722] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.328723] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.328725] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b26c0 state to ffff8800b9e1cc00
>[   54.328726] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.328728] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328737] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328739] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328743] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328745] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b29c0 state to ffff8800b9e1cc00
>[   54.328747] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff880092258800 state to ffff8800b9e1cc00
>[   54.328748] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b29c0 to [CRTC:25]
>[   54.328749] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b29c0
>[   54.328750] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328752] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b2540 state to ffff8800b9e1cc00
>[   54.328754] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b23c0 state to ffff8800b9e1cc00
>[   54.328756] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328759] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328760] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328778] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328780] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.328781] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.328782] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2840 to [CRTC:21]
>[   54.328784] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b2840
>[   54.328786] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328788] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.328789] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.328792] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.328793] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.328795] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328805] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328807] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328810] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328812] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.328813] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.328814] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b20c0 to [CRTC:25]
>[   54.328815] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b20c0
>[   54.328816] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328819] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.328820] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b26c0 state to ffff8800b9e1cc00
>[   54.328822] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328824] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328827] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328840] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328842] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b23c0 state to ffff8800b9e1cc00
>[   54.328844] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092258800 state to ffff8800b9e1cc00
>[   54.328845] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b23c0 to [CRTC:21]
>[   54.328846] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b23c0
>[   54.328847] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328849] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.328850] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.328853] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b29c0 state to ffff8800b9e1cc00
>[   54.328854] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b2540 state to ffff8800b9e1cc00
>[   54.328856] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328871] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328872] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328876] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328878] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.328880] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.328881] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2180 to [CRTC:25]
>[   54.328882] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b2180
>[   54.328883] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328886] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.328887] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.328889] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328892] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328893] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328910] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328911] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b26c0 state to ffff8800b9e1cc00
>[   54.328913] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.328914] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b26c0 to [CRTC:21]
>[   54.328916] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b26c0
>[   54.328917] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328919] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.328921] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.328922] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.328924] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.328926] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328936] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328937] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328941] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328942] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b2540 state to ffff8800b9e1cc00
>[   54.328944] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff880092258800 state to ffff8800b9e1cc00
>[   54.328945] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2540 to [CRTC:25]
>[   54.328947] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b2540
>[   54.328948] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328950] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b23c0 state to ffff8800b9e1cc00
>[   54.328952] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b29c0 state to ffff8800b9e1cc00
>[   54.328953] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.328956] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.328957] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.328989] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.328991] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.328993] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.328994] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2000 to [CRTC:21]
>[   54.328996] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b2000
>[   54.328997] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.328999] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.329001] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.329003] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.329005] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.329007] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.329016] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.329018] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.329020] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.329022] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.329024] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.329026] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2a80 to [CRTC:25]
>[   54.329028] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b2a80
>[   54.329029] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.329031] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b26c0 state to ffff8800b9e1cc00
>[   54.329033] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.329034] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.329037] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.329038] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.329051] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.329053] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b29c0 state to ffff8800b9e1cc00
>[   54.329055] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092258800 state to ffff8800b9e1cc00
>[   54.329056] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b29c0 to [CRTC:21]
>[   54.329057] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b29c0
>[   54.329059] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.329061] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.329062] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.329064] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2540 state to ffff8800b9e1cc00
>[   54.329065] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b23c0 state to ffff8800b9e1cc00
>[   54.329068] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.329078] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.329079] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.329082] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.329084] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.329085] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.329087] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2840 to [CRTC:25]
>[   54.329088] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b2840
>[   54.329090] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.329092] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.329094] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.329096] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.329099] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.329100] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.329112] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.329114] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.329116] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.329118] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b20c0 to [CRTC:21]
>[   54.329119] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b20c0
>[   54.329120] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.329122] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.329124] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.329125] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.329127] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b26c0 state to ffff8800b9e1cc00
>[   54.329129] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.329138] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.329139] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.329142] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.329144] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b23c0 state to ffff8800b9e1cc00
>[   54.329146] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff880092258800 state to ffff8800b9e1cc00
>[   54.329147] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b23c0 to [CRTC:25]
>[   54.329149] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b23c0
>[   54.329150] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.329153] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b29c0 state to ffff8800b9e1cc00
>[   54.329155] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b2540 state to ffff8800b9e1cc00
>[   54.329157] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.329159] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.329161] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.329175] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.329177] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.329179] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.329180] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2180 to [CRTC:21]
>[   54.329181] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b2180
>[   54.329183] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.329184] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.329186] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.329188] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.329190] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.329192] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.329202] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.329203] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.329206] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.329208] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b26c0 state to ffff8800b9e1cc00
>[   54.329210] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.329211] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b26c0 to [CRTC:25]
>[   54.329213] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b26c0
>[   54.329214] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.329216] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.329219] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.329220] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.329223] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.329225] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.329236] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.329238] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b2540 state to ffff8800b9e1cc00
>[   54.329241] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092258800 state to ffff8800b9e1cc00
>[   54.329242] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2540 to [CRTC:21]
>[   54.329244] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b2540
>[   54.329245] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.329247] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.329249] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.329251] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b23c0 state to ffff8800b9e1cc00
>[   54.329252] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b29c0 state to ffff8800b9e1cc00
>[   54.329254] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.329264] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.329265] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.329268] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.329270] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.329272] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.329273] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2000 to [CRTC:25]
>[   54.329275] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b2000
>[   54.329276] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.329278] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.329281] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.329282] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.329285] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.329287] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.329297] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.329299] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.329302] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.329303] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2a80 to [CRTC:21]
>[   54.329305] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b2a80
>[   54.329306] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.329308] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.329310] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.329312] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b26c0 state to ffff8800b9e1cc00
>[   54.329313] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.329315] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.329325] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.329326] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.329329] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.329331] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b29c0 state to ffff8800b9e1cc00
>[   54.329333] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff880092258800 state to ffff8800b9e1cc00
>[   54.329334] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b29c0 to [CRTC:25]
>[   54.329336] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b29c0
>[   54.329337] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.329339] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b2540 state to ffff8800b9e1cc00
>[   54.329341] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b23c0 state to ffff8800b9e1cc00
>[   54.329343] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.329346] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.329348] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.329360] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.329362] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.329364] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.329365] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2840 to [CRTC:21]
>[   54.329367] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b2840
>[   54.329369] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.329371] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.329372] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.329374] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.329376] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.329378] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.329387] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.329389] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.329391] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.329393] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.329395] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.329396] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b20c0 to [CRTC:25]
>[   54.329398] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b20c0
>[   54.329399] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.329401] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.329403] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b26c0 state to ffff8800b9e1cc00
>[   54.329404] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.329407] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.329409] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.329420] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.329422] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b23c0 state to ffff8800b9e1cc00
>[   54.329424] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092258800 state to ffff8800b9e1cc00
>[   54.329425] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b23c0 to [CRTC:21]
>[   54.329427] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b23c0
>[   54.329428] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.329430] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.329431] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.329433] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b29c0 state to ffff8800b9e1cc00
>[   54.329435] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b2540 state to ffff8800b9e1cc00
>[   54.329437] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.329447] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.329448] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.329451] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.329453] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.329454] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.329456] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2180 to [CRTC:25]
>[   54.329457] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff88021e2b2180
>[   54.329458] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.329461] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.329463] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.329465] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.329468] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.329469] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.329779] [drm:intel_dp_get_dpcd] DPCD: 12 0a c4 41 00 00 01 c0 02 00 00 00 1f 0b 00
>[   54.330077] [drm:intel_dp_get_dpcd] Detected EDP PSR Panel.
>[   54.330079] [drm:intel_dp_get_dpcd] Display Port TPS3 support: source yes, sink yes
>[   54.330369] [drm:intel_dp_print_rates] source rates: 162000, 270000, 540000
>[   54.330371] [drm:intel_dp_print_rates] sink rates: 162000, 270000
>[   54.330373] [drm:intel_dp_print_rates] common rates: 162000, 270000
>[   54.330815] [drm:drm_mode_setcrtc] [CRTC:25]
>[   54.330818] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.330820] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.330823] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b26c0 state to ffff8800b9e1cc00
>[   54.330825] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88009225c400
>[   54.330826] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b26c0 to [NOCRTC]
>[   54.330828] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88021e2b26c0
>[   54.330830] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff8800b9e1cc00
>[   54.330832] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.330836] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.330838] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.330840] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.330844] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.330846] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.330856] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.330857] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021e2b2000 state to ffff8800b9e1cc00
>[   54.330859] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225a000 state to ffff8800b9e1cc00
>[   54.330861] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2000 to [NOCRTC]
>[   54.330862] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88021e2b2000
>[   54.330864] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.330867] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b2180 state to ffff8800b9e1cc00
>[   54.330869] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021e2b2840 state to ffff8800b9e1cc00
>[   54.330870] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.330873] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.330875] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.330881] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1cc00
>[   54.330882] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b2300 state to ffff8800b9e1cc00
>[   54.330884] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225c400 state to ffff8800b9e1cc00
>[   54.330886] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2300 to [CRTC:21]
>[   54.330888] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b2300
>[   54.330889] [drm:drm_atomic_check_only] checking ffff8800b9e1cc00
>[   54.330892] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.330893] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.330895] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2a80 state to ffff8800b9e1cc00
>[   54.330897] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b20c0 state to ffff8800b9e1cc00
>[   54.330899] [drm:drm_atomic_commit] commiting ffff8800b9e1cc00
>[   54.330910] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1cc00
>[   54.330912] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1cc00
>[   54.331493] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c86200
>[   54.331496] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b2540 state to ffff8800b9c86200
>[   54.331498] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092258800 state to ffff8800b9c86200
>[   54.331500] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2540 to [CRTC:21]
>[   54.331501] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b2540
>[   54.331503] [drm:drm_atomic_check_only] checking ffff8800b9c86200
>[   54.331506] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.331507] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   54.331514] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b23c0 state to ffff8800b9c86200
>[   54.331517] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b29c0 state to ffff8800b9c86200
>[   54.331519] [drm:drm_atomic_commit] commiting ffff8800b9c86200
>[   54.331533] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c86200
>[   54.331535] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c86200
>[   54.331635] [drm:drm_mode_setcrtc] [CRTC:25]
>[   54.331639] [drm:drm_mode_setcrtc] [CONNECTOR:61:DP-4]
>[   54.331641] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c86600
>[   54.331643] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009225c400 state to ffff8800b9c86600
>[   54.331645] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021e2b20c0 state to ffff8800b9c86600
>[   54.331647] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:] for CRTC state ffff88009225c400
>[   54.331649] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b20c0 to [CRTC:25]
>[   54.331650] [drm:drm_atomic_set_fb_for_plane] Set [FB:65] for plane state ffff88021e2b20c0
>[   54.331653] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:61] ffff8801f98b9920 state to ffff8800b9c86600
>[   54.331654] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff8800b9c86600
>[   54.331656] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801f98b9920 to [CRTC:25]
>[   54.331658] [drm:drm_atomic_check_only] checking ffff8800b9c86600
>[   54.331659] [drm:drm_atomic_helper_check_modeset] [CRTC:25] mode changed
>[   54.331661] [drm:drm_atomic_helper_check_modeset] [CRTC:25] enable changed
>[   54.331663] [drm:update_connector_routing] Updating routing for [CONNECTOR:61:DP-4]
>[   54.331666] [drm:update_connector_routing] [CONNECTOR:61:DP-4] using [ENCODER:49:DP MST-49] on [CRTC:25]
>[   54.331667] [drm:drm_atomic_helper_check_modeset] [CRTC:25] active changed
>[   54.331668] [drm:drm_atomic_helper_check_modeset] [CRTC:25] needs all connectors, enable: y, active: y
>[   54.331670] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff8800b9c86600
>[   54.331672] [drm:drm_atomic_connectors_for_crtc] State ffff8800b9c86600 has 1 connectors for [CRTC:25]
>[   54.331674] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff8800b9c86600
>[   54.331676] [drm:connected_sink_compute_bpp] [CONNECTOR:61:DP-4] checking for sink bpp constrains
>[   54.331677] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to EDID reported max of 24
>[   54.331681] [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[   54.331682] [drm:intel_pipe_config_compare] mismatch in cpu_transcoder (expected 3, found 1)
>[   54.331684] [drm:intel_pipe_config_compare] mismatch in lane_count (expected 4, found 2)
>[   54.331688] [drm:intel_pipe_config_compare] mismatch in dp_m_n (expected tu 64 gmch 4155856/8388608 link 461761/524288, or tu 0 gmch 0/0 link 0/0, found tu 33, gmch 12425625/8388608 link 1035468/1048576)
>[   54.331690] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hdisplay (expected 0, found 3840)
>[   54.331691] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_htotal (expected 0, found 4000)
>[   54.331692] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hblank_start (expected 0, found 3840)
>[   54.331694] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hblank_end (expected 0, found 4000)
>[   54.331695] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hsync_start (expected 0, found 3888)
>[   54.331696] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hsync_end (expected 0, found 3920)
>[   54.331698] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vdisplay (expected 0, found 2160)
>[   54.331699] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vtotal (expected 0, found 2222)
>[   54.331701] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vblank_start (expected 0, found 2160)
>[   54.331702] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vblank_end (expected 0, found 2222)
>[   54.331704] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vsync_start (expected 0, found 2163)
>[   54.331705] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vsync_end (expected 0, found 2168)
>[   54.331708] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.flags(DRM_MODE_FLAG_PHSYNC) (expected 0, found 1)
>[   54.331709] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.flags(DRM_MODE_FLAG_PVSYNC) (expected 0, found 4)
>[   54.331711] [drm:intel_pipe_config_compare] mismatch in ddi_pll_sel (expected 0x20000000, found 0x00000000)
>[   54.331713] [drm:intel_pipe_config_compare] mismatch in pipe_bpp (expected 18, found 24)
>[   54.331714] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_clock (expected 0, found 533250)
>[   54.331716] [drm:intel_pipe_config_compare] mismatch in port_clock (expected 270000, found 540000)
>[   54.331718] [drm:intel_dump_pipe_config] [CRTC:25][modeset] config ffff88009225c400 for pipe B
>[   54.331720] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   54.331721] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   54.331723] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   54.331725] [drm:intel_dump_pipe_config] dp: 1, lanes: 2, gmch_m: 12425625, gmch_n: 8388608, link_m: 1035468, link_n: 1048576, tu: 33
>[   54.331727] [drm:intel_dump_pipe_config] dp: 1, lanes: 2, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   54.331728] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   54.331729] [drm:intel_dump_pipe_config] requested mode:
>[   54.331733] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x0 0x5
>[   54.331734] [drm:intel_dump_pipe_config] adjusted mode:
>[   54.331736] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x0 0x5
>[   54.331739] [drm:intel_dump_crtc_timings] crtc timings: 533250 3840 3888 3920 4000 2160 2163 2168 2222, type: 0x0 flags: 0x5
>[   54.331740] [drm:intel_dump_pipe_config] port clock: 540000
>[   54.331741] [drm:intel_dump_pipe_config] pipe src size: 3840x2160
>[   54.331743] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[   54.331744] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   54.331746] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   54.331747] [drm:intel_dump_pipe_config] ips: 0
>[   54.331748] [drm:intel_dump_pipe_config] double wide: 0
>[   54.331749] [drm:intel_dump_pipe_config] ddi_pll_sel: 0; dpll_hw_state: wrpll: 0x0
>[   54.331751] [drm:intel_dump_pipe_config] planes on this crtc
>[   54.331753] [drm:intel_dump_pipe_config] STANDARD PLANE:23 plane: 1.0 idx: 3 disabled, scaler_id = 0
>[   54.331755] [drm:intel_dump_pipe_config] CURSOR PLANE:24 plane: 1.2 idx: 4 disabled, scaler_id = 0
>[   54.331757] [drm:intel_dump_pipe_config] STANDARD PLANE:26 plane: 1.1 idx: 5 disabled, scaler_id = 0
>[   54.331759] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225d400 state to ffff8800b9c86600
>[   54.331761] [drm:drm_atomic_get_crtc_state] Added [CRTC:29] ffff88009225e000 state to ffff8800b9c86600
>[   54.331763] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff8800b9c86600
>[   54.331765] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:32] ffff8801f98b9940 state to ffff8800b9c86600
>[   54.331767] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2a80 state to ffff8800b9c86600
>[   54.331769] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b26c0 state to ffff8800b9c86600
>[   54.331772] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 65
>[   54.331774] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 1, on 1, ms 1
>[   54.331776] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   54.331777] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 1, on 1, ms 1
>[   54.331779] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:23] with fb 65
>[   54.331781] [drm:intel_plane_atomic_calc_changes] [PLANE:23] visible 0 -> 1, off 0, on 1, ms 1
>[   54.331784] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880200fbe300 state to ffff8800b9c86600
>[   54.331787] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff880200fbe900 state to ffff8800b9c86600
>[   54.331789] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff880200fbec00 state to ffff8800b9c86600
>[   54.331792] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff880200fbe3c0 state to ffff8800b9c86600
>[   54.331794] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff880200fbeb40 state to ffff8800b9c86600
>[   54.331796] [drm:drm_atomic_get_plane_state] Added [PLANE:30] ffff880200fbe780 state to ffff8800b9c86600
>[   54.331799] [drm:drm_atomic_commit] commiting ffff8800b9c86600
>[   54.362428] [drm:intel_edp_backlight_off] 
>[   54.562671] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[   54.562683] [drm:intel_disable_pipe] disabling pipe A
>[   54.578898] [drm:edp_panel_off] Turn eDP port A panel power off
>[   54.578905] [drm:wait_panel_off] Wait for panel power off time
>[   54.578918] [drm:wait_panel_status] mask b0000000 value 00000000 status a0000003 control abcd0000
>[   54.631130] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000008, dig 0x00000012, pins 0x00000010
>[   54.631133] [drm:intel_hpd_irq_handler] digital hpd port A - long
>[   54.631135] [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 4 - cnt: 0
>[   54.631158] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port A
>[   54.638989] [drm:wait_panel_status] Wait complete
>[   54.643021] [drm:intel_update_cdclk] Current CD clock rate: 540000 kHz
>[   54.643035] [drm:edp_panel_on] Turn eDP port A panel power on
>[   54.643038] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   55.180058] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[   55.180062] [drm:wait_panel_status] Wait complete
>[   55.180066] [drm:wait_panel_on] Wait for panel power on
>[   55.180070] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[   55.284144] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000008, dig 0x00000012, pins 0x00000010
>[   55.284148] [drm:intel_hpd_irq_handler] digital hpd port A - long
>[   55.284149] [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 4 - cnt: 1
>[   55.284177] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port A
>[   55.332426] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000008, dig 0x00000011, pins 0x00000010
>[   55.332430] [drm:intel_hpd_irq_handler] digital hpd port A - short
>[   55.332458] [drm:intel_dp_hpd_pulse] got hpd irq on port A - short
>[   55.398282] [drm:wait_panel_status] Wait complete
>[   55.398292] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   55.398298] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[   55.399361] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[   55.399363] [drm:intel_dp_set_signal_levels] Using vswing level 0
>[   55.399364] [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0
>[   55.399980] [drm:intel_dp_start_link_train] clock recovery OK
>[   55.400906] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[   55.400992] [drm:intel_enable_pipe] enabling pipe A
>[   55.401144] [drm:intel_edp_backlight_on] 
>[   55.401146] [drm:intel_panel_enable_backlight] pipe A
>[   55.401153] [drm:intel_panel_actually_set_backlight] set backlight PWM = 852
>[   55.404179] [drm:intel_psr_match_conditions] PSR disable by flag
>[   55.404182] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[   55.453163] [drm:intel_mst_pre_enable_dp] 0
>[   55.453354] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   55.454613] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   55.454626] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[   55.454627] [drm:intel_dp_set_signal_levels] Using vswing level 0
>[   55.454629] [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0
>[   55.454862] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   55.471066] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   55.471472] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   55.471484] [drm:intel_dp_start_link_train] clock recovery OK
>[   55.471699] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   55.488291] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   55.490314] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[   55.490508] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   55.490519] [drm:drm_dp_mst_allocate_vcpi] initing vcpi for 658 33
>[   55.490687] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   55.490880] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   55.491051] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   55.491143] [drm:intel_enable_pipe] enabling pipe B
>[   55.491149] [drm:intel_mst_enable_dp] 1
>[   55.493335] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   55.493346] [drm:drm_dp_update_payload_part2] payload 0 1
>[   55.493611] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   55.494788] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   55.494790] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   55.517885] [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR* CPU pipe B FIFO underrun
>[   58.408026] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[   58.408036] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[   59.495676] [drm:drm_dp_mst_wait_tx_reply] timedout msg send ffff880092259000 2 1
>[   59.537244] [drm:intel_connector_check_state] [CONNECTOR:32:eDP-1]
>[   59.537249] [drm:intel_connector_check_state] [CONNECTOR:61:DP-4]
>[   59.537252] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[   59.537254] [drm:check_encoder_state] [ENCODER:39:TMDS-39]
>[   59.537256] [drm:check_encoder_state] [ENCODER:41:DP MST-41]
>[   59.537258] [drm:check_encoder_state] [ENCODER:42:DP MST-42]
>[   59.537259] [drm:check_encoder_state] [ENCODER:43:DP MST-43]
>[   59.537260] [drm:check_encoder_state] [ENCODER:46:TMDS-46]
>[   59.537263] [drm:check_encoder_state] [ENCODER:48:DP MST-48]
>[   59.537264] [drm:check_encoder_state] [ENCODER:49:DP MST-49]
>[   59.537266] [drm:check_encoder_state] [ENCODER:50:DP MST-50]
>[   59.537267] [drm:check_crtc_state] [CRTC:21]
>[   59.537276] [drm:check_crtc_state] [CRTC:25]
>[   59.537281] [drm:check_shared_dpll_state] WRPLL 1
>[   59.537283] [drm:check_shared_dpll_state] WRPLL 2
>[   59.537286] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c86600
>[   59.537290] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c86600
>[   59.537326] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   59.537333] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[   59.538096] [drm:intel_dp_get_dpcd] DPCD: 12 0a c4 41 00 00 01 c0 02 00 00 00 1f 0b 00
>[   59.538396] [drm:intel_dp_get_dpcd] Detected EDP PSR Panel.
>[   59.538398] [drm:intel_dp_get_dpcd] Display Port TPS3 support: source yes, sink yes
>[   59.538691] [drm:intel_dp_print_rates] source rates: 162000, 270000, 540000
>[   59.538693] [drm:intel_dp_print_rates] sink rates: 162000, 270000
>[   59.538695] [drm:intel_dp_print_rates] common rates: 162000, 270000
>[   59.539133] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   59.539139] [drm:drm_atomic_state_init] Allocated atomic state ffff880221900400
>[   59.539145] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff8801e1915400 state to ffff880221900400
>[   59.539147] [drm:drm_atomic_check_only] checking ffff880221900400
>[   59.539151] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800b9178000 state to ffff880221900400
>[   59.539153] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff8800b9178a80 state to ffff880221900400
>[   59.539155] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800b9178240 state to ffff880221900400
>[   59.539158] [drm:drm_atomic_commit] commiting ffff880221900400
>[   59.539171] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880221900400
>[   59.539173] [drm:drm_atomic_state_free] Freeing atomic state ffff880221900400
>[   59.539228] [drm:drm_atomic_state_init] Allocated atomic state ffff880221900400
>[   59.539230] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b9178180 state to ffff880221900400
>[   59.539232] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1911800 state to ffff880221900400
>[   59.539234] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b9178180 to [CRTC:21]
>[   59.539235] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8800b9178180
>[   59.539236] [drm:drm_atomic_check_only] checking ffff880221900400
>[   59.539240] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.539241] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.539244] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223314840 state to ffff880221900400
>[   59.539246] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223314a80 state to ffff880221900400
>[   59.539249] [drm:drm_atomic_commit] commiting ffff880221900400
>[   59.539260] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880221900400
>[   59.539262] [drm:drm_atomic_state_free] Freeing atomic state ffff880221900400
>[   59.539303] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   59.539641] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   59.539653] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   59.540285] [drm:drm_dp_mst_handle_down_rep] Got MST reply with no msg ffff8801e73b83c0 1 1 79 11
>[   59.540484] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   59.540659] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   59.540998] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   59.541010] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   59.541012] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   59.654776] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1d800
>[   59.654782] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223314900 state to ffff8800b9e1d800
>[   59.654785] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1913000 state to ffff8800b9e1d800
>[   59.654787] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223314900 to [CRTC:21]
>[   59.654789] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223314900
>[   59.654790] [drm:drm_atomic_check_only] checking ffff8800b9e1d800
>[   59.654795] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.654797] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.654800] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223314d80 state to ffff8800b9e1d800
>[   59.654802] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223314c00 state to ffff8800b9e1d800
>[   59.654806] [drm:drm_atomic_commit] commiting ffff8800b9e1d800
>[   59.654829] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1d800
>[   59.654832] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1d800
>[   59.665255] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1d400
>[   59.665260] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223314a80 state to ffff8800b9e1d400
>[   59.665262] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1914400 state to ffff8800b9e1d400
>[   59.665264] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223314a80 to [CRTC:21]
>[   59.665266] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223314a80
>[   59.665267] [drm:drm_atomic_check_only] checking ffff8800b9e1d400
>[   59.665273] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.665275] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.665278] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223314840 state to ffff8800b9e1d400
>[   59.665280] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8802233140c0 state to ffff8800b9e1d400
>[   59.665284] [drm:drm_atomic_commit] commiting ffff8800b9e1d400
>[   59.665304] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1d400
>[   59.665306] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1d400
>[   59.674223] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1da00
>[   59.674229] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223314c00 state to ffff8800b9e1da00
>[   59.674232] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1913000 state to ffff8800b9e1da00
>[   59.674233] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223314c00 to [CRTC:21]
>[   59.674235] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223314c00
>[   59.674237] [drm:drm_atomic_check_only] checking ffff8800b9e1da00
>[   59.674241] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.674243] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.674246] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223314900 state to ffff8800b9e1da00
>[   59.674248] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223314d80 state to ffff8800b9e1da00
>[   59.674252] [drm:drm_atomic_commit] commiting ffff8800b9e1da00
>[   59.674273] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1da00
>[   59.674275] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1da00
>[   59.683265] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1c200
>[   59.683271] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8802233140c0 state to ffff8800b9e1c200
>[   59.683274] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1917000 state to ffff8800b9e1c200
>[   59.683276] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8802233140c0 to [CRTC:21]
>[   59.683277] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8802233140c0
>[   59.683279] [drm:drm_atomic_check_only] checking ffff8800b9e1c200
>[   59.683283] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.683285] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.683288] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223314a80 state to ffff8800b9e1c200
>[   59.683290] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223314840 state to ffff8800b9e1c200
>[   59.683294] [drm:drm_atomic_commit] commiting ffff8800b9e1c200
>[   59.683316] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1c200
>[   59.683318] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1c200
>[   59.693241] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1e200
>[   59.693246] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223314d80 state to ffff8800b9e1e200
>[   59.693249] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1915800 state to ffff8800b9e1e200
>[   59.693250] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223314d80 to [CRTC:21]
>[   59.693252] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223314d80
>[   59.693254] [drm:drm_atomic_check_only] checking ffff8800b9e1e200
>[   59.693259] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.693260] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.693263] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223314c00 state to ffff8800b9e1e200
>[   59.693265] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223314900 state to ffff8800b9e1e200
>[   59.693269] [drm:drm_atomic_commit] commiting ffff8800b9e1e200
>[   59.693287] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1e200
>[   59.693290] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1e200
>[   59.703217] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af400
>[   59.703222] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b480 state to ffff8800b91af400
>[   59.703227] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092259400 state to ffff8800b91af400
>[   59.703229] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b480 to [CRTC:21]
>[   59.703230] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b480
>[   59.703232] [drm:drm_atomic_check_only] checking ffff8800b91af400
>[   59.703236] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.703238] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.703240] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b000 state to ffff8800b91af400
>[   59.703242] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b600 state to ffff8800b91af400
>[   59.703246] [drm:drm_atomic_commit] commiting ffff8800b91af400
>[   59.703267] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af400
>[   59.703270] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af400
>[   59.703559] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae200
>[   59.703562] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b840 state to ffff8800b91ae200
>[   59.703564] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225b400 state to ffff8800b91ae200
>[   59.703565] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b840 to [CRTC:21]
>[   59.703567] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b840
>[   59.703568] [drm:drm_atomic_check_only] checking ffff8800b91ae200
>[   59.703571] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.703573] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.703575] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b0c0 state to ffff8800b91ae200
>[   59.703576] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b300 state to ffff8800b91ae200
>[   59.703579] [drm:drm_atomic_commit] commiting ffff8800b91ae200
>[   59.703592] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae200
>[   59.703594] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae200
>[   59.715766] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ac800
>[   59.715770] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b240 state to ffff8800b91ac800
>[   59.715773] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092259400 state to ffff8800b91ac800
>[   59.715775] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b240 to [CRTC:21]
>[   59.715777] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b240
>[   59.715779] [drm:drm_atomic_check_only] checking ffff8800b91ac800
>[   59.715791] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.715793] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.715796] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096bf00 state to ffff8800b91ac800
>[   59.715798] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b9178180 state to ffff8800b91ac800
>[   59.715803] [drm:drm_atomic_commit] commiting ffff8800b91ac800
>[   59.715824] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ac800
>[   59.715826] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ac800
>[   59.723877] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b75fee00
>[   59.723882] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880200fbec00 state to ffff8800b75fee00
>[   59.723886] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91a4000 state to ffff8800b75fee00
>[   59.723888] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200fbec00 to [CRTC:21]
>[   59.723889] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880200fbec00
>[   59.723891] [drm:drm_atomic_check_only] checking ffff8800b75fee00
>[   59.723897] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.723899] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.723902] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880200fbe300 state to ffff8800b75fee00
>[   59.723905] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880200fbe6c0 state to ffff8800b75fee00
>[   59.723909] [drm:drm_atomic_commit] commiting ffff8800b75fee00
>[   59.724294] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b75fee00
>[   59.724297] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b75fee00
>[   59.732397] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b75ff200
>[   59.732403] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b26c0 state to ffff8800b75ff200
>[   59.732406] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91a4800 state to ffff8800b75ff200
>[   59.732408] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b26c0 to [CRTC:21]
>[   59.732410] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b26c0
>[   59.732412] [drm:drm_atomic_check_only] checking ffff8800b75ff200
>[   59.732418] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.732420] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.732423] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2a80 state to ffff8800b75ff200
>[   59.732425] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b20c0 state to ffff8800b75ff200
>[   59.732429] [drm:drm_atomic_commit] commiting ffff8800b75ff200
>[   59.732449] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b75ff200
>[   59.732452] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b75ff200
>[   59.732699] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b75ff200
>[   59.732701] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b2d80 state to ffff8800b75ff200
>[   59.732703] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91a4000 state to ffff8800b75ff200
>[   59.732705] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b2d80 to [CRTC:21]
>[   59.732706] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b2d80
>[   59.732708] [drm:drm_atomic_check_only] checking ffff8800b75ff200
>[   59.732710] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.732712] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.732714] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b2840 state to ffff8800b75ff200
>[   59.732716] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b2000 state to ffff8800b75ff200
>[   59.732719] [drm:drm_atomic_commit] commiting ffff8800b75ff200
>[   59.732732] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b75ff200
>[   59.732734] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b75ff200
>[   59.741432] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae400
>[   59.741437] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b91780c0 state to ffff8800b91ae400
>[   59.741440] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225e400 state to ffff8800b91ae400
>[   59.741441] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b91780c0 to [CRTC:21]
>[   59.741443] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8800b91780c0
>[   59.741444] [drm:drm_atomic_check_only] checking ffff8800b91ae400
>[   59.741450] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.741452] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.741454] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b9178180 state to ffff8800b91ae400
>[   59.741457] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b600 state to ffff8800b91ae400
>[   59.741460] [drm:drm_atomic_commit] commiting ffff8800b91ae400
>[   59.741481] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae400
>[   59.741484] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae400
>[   59.751428] [drm:drm_atomic_state_init] Allocated atomic state ffff88003562b600
>[   59.751433] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021e2b20c0 state to ffff88003562b600
>[   59.751436] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91a4400 state to ffff88003562b600
>[   59.751437] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021e2b20c0 to [CRTC:21]
>[   59.751439] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021e2b20c0
>[   59.751440] [drm:drm_atomic_check_only] checking ffff88003562b600
>[   59.751445] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.751446] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.751449] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021e2b29c0 state to ffff88003562b600
>[   59.751452] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021e2b2540 state to ffff88003562b600
>[   59.751455] [drm:drm_atomic_commit] commiting ffff88003562b600
>[   59.751474] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88003562b600
>[   59.751476] [drm:drm_atomic_state_free] Freeing atomic state ffff88003562b600
>[   59.761415] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae400
>[   59.761422] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b480 state to ffff8800b91ae400
>[   59.761425] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a800 state to ffff8800b91ae400
>[   59.761427] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b480 to [CRTC:21]
>[   59.761429] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b480
>[   59.761430] [drm:drm_atomic_check_only] checking ffff8800b91ae400
>[   59.761436] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.761438] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.761441] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b300 state to ffff8800b91ae400
>[   59.761443] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b840 state to ffff8800b91ae400
>[   59.761447] [drm:drm_atomic_commit] commiting ffff8800b91ae400
>[   59.761465] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae400
>[   59.761468] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae400
>[   59.770423] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae000
>[   59.770428] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b0c0 state to ffff8800b91ae000
>[   59.770431] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225f000 state to ffff8800b91ae000
>[   59.770432] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b0c0 to [CRTC:21]
>[   59.770434] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b0c0
>[   59.770435] [drm:drm_atomic_check_only] checking ffff8800b91ae000
>[   59.770440] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.770442] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.770445] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b000 state to ffff8800b91ae000
>[   59.770447] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b6c0 state to ffff8800b91ae000
>[   59.770451] [drm:drm_atomic_commit] commiting ffff8800b91ae000
>[   59.770472] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae000
>[   59.770475] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae000
>[   59.780406] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ad400
>[   59.780411] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b840 state to ffff8800b91ad400
>[   59.780415] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a800 state to ffff8800b91ad400
>[   59.780417] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b840 to [CRTC:21]
>[   59.780418] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b840
>[   59.780420] [drm:drm_atomic_check_only] checking ffff8800b91ad400
>[   59.780425] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.780426] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.780429] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b480 state to ffff8800b91ad400
>[   59.780431] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b300 state to ffff8800b91ad400
>[   59.780434] [drm:drm_atomic_commit] commiting ffff8800b91ad400
>[   59.780454] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ad400
>[   59.780457] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ad400
>[   59.790401] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ad600
>[   59.790406] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b6c0 state to ffff8800b91ad600
>[   59.790409] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225f000 state to ffff8800b91ad600
>[   59.790410] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b6c0 to [CRTC:21]
>[   59.790412] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b6c0
>[   59.790413] [drm:drm_atomic_check_only] checking ffff8800b91ad600
>[   59.790418] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.790419] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.790422] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b0c0 state to ffff8800b91ad600
>[   59.790423] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b000 state to ffff8800b91ad600
>[   59.790427] [drm:drm_atomic_commit] commiting ffff8800b91ad600
>[   59.790445] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ad600
>[   59.790447] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ad600
>[   59.800429] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aee00
>[   59.800434] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b300 state to ffff8800b91aee00
>[   59.800437] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a800 state to ffff8800b91aee00
>[   59.800439] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b300 to [CRTC:21]
>[   59.800440] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b300
>[   59.800442] [drm:drm_atomic_check_only] checking ffff8800b91aee00
>[   59.800447] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.800449] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.800452] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b840 state to ffff8800b91aee00
>[   59.800453] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b480 state to ffff8800b91aee00
>[   59.800457] [drm:drm_atomic_commit] commiting ffff8800b91aee00
>[   59.800478] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aee00
>[   59.800480] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aee00
>[   59.809633] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ada00
>[   59.809638] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b000 state to ffff8800b91ada00
>[   59.809641] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225f000 state to ffff8800b91ada00
>[   59.809643] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b000 to [CRTC:21]
>[   59.809644] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b000
>[   59.809646] [drm:drm_atomic_check_only] checking ffff8800b91ada00
>[   59.809651] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.809653] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.809655] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b6c0 state to ffff8800b91ada00
>[   59.809657] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b0c0 state to ffff8800b91ada00
>[   59.809661] [drm:drm_atomic_commit] commiting ffff8800b91ada00
>[   59.809681] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ada00
>[   59.809683] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ada00
>[   59.810252] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ac800
>[   59.810256] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b480 state to ffff8800b91ac800
>[   59.810258] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a800 state to ffff8800b91ac800
>[   59.810260] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b480 to [CRTC:21]
>[   59.810261] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b480
>[   59.810263] [drm:drm_atomic_check_only] checking ffff8800b91ac800
>[   59.810266] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.810268] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.810270] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b300 state to ffff8800b91ac800
>[   59.810272] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b840 state to ffff8800b91ac800
>[   59.810275] [drm:drm_atomic_commit] commiting ffff8800b91ac800
>[   59.810292] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ac800
>[   59.810294] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ac800
>[   59.819751] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af200
>[   59.819757] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b0c0 state to ffff8800b91af200
>[   59.819759] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225f000 state to ffff8800b91af200
>[   59.819761] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b0c0 to [CRTC:21]
>[   59.819763] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b0c0
>[   59.819764] [drm:drm_atomic_check_only] checking ffff8800b91af200
>[   59.819769] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.819771] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.819774] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b000 state to ffff8800b91af200
>[   59.819776] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b6c0 state to ffff8800b91af200
>[   59.819780] [drm:drm_atomic_commit] commiting ffff8800b91af200
>[   59.819799] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af200
>[   59.819801] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af200
>[   59.820397] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af200
>[   59.820401] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b840 state to ffff8800b91af200
>[   59.820403] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a800 state to ffff8800b91af200
>[   59.820404] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b840 to [CRTC:21]
>[   59.820406] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b840
>[   59.820407] [drm:drm_atomic_check_only] checking ffff8800b91af200
>[   59.820412] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.820414] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.820416] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b480 state to ffff8800b91af200
>[   59.820418] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b300 state to ffff8800b91af200
>[   59.820421] [drm:drm_atomic_commit] commiting ffff8800b91af200
>[   59.820435] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af200
>[   59.820437] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af200
>[   59.828927] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af600
>[   59.828934] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b6c0 state to ffff8800b91af600
>[   59.828937] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225f000 state to ffff8800b91af600
>[   59.828939] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b6c0 to [CRTC:21]
>[   59.828940] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b6c0
>[   59.828942] [drm:drm_atomic_check_only] checking ffff8800b91af600
>[   59.828947] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.828948] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.828951] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b0c0 state to ffff8800b91af600
>[   59.828953] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b000 state to ffff8800b91af600
>[   59.828958] [drm:drm_atomic_commit] commiting ffff8800b91af600
>[   59.828978] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af600
>[   59.828980] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af600
>[   59.839009] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af600
>[   59.839015] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b300 state to ffff8800b91af600
>[   59.839019] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a800 state to ffff8800b91af600
>[   59.839021] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b300 to [CRTC:21]
>[   59.839022] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b300
>[   59.839024] [drm:drm_atomic_check_only] checking ffff8800b91af600
>[   59.839029] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.839030] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.839033] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b840 state to ffff8800b91af600
>[   59.839035] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b480 state to ffff8800b91af600
>[   59.839039] [drm:drm_atomic_commit] commiting ffff8800b91af600
>[   59.839059] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af600
>[   59.839061] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af600
>[   59.848692] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af600
>[   59.848697] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b000 state to ffff8800b91af600
>[   59.848700] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225f000 state to ffff8800b91af600
>[   59.848702] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b000 to [CRTC:21]
>[   59.848703] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b000
>[   59.848705] [drm:drm_atomic_check_only] checking ffff8800b91af600
>[   59.848711] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.848713] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.848715] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b6c0 state to ffff8800b91af600
>[   59.848717] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b0c0 state to ffff8800b91af600
>[   59.848721] [drm:drm_atomic_commit] commiting ffff8800b91af600
>[   59.848740] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af600
>[   59.848742] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af600
>[   59.857667] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af600
>[   59.857672] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b480 state to ffff8800b91af600
>[   59.857675] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a800 state to ffff8800b91af600
>[   59.857677] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b480 to [CRTC:21]
>[   59.857679] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b480
>[   59.857680] [drm:drm_atomic_check_only] checking ffff8800b91af600
>[   59.857686] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.857688] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.857691] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b300 state to ffff8800b91af600
>[   59.857693] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b840 state to ffff8800b91af600
>[   59.857697] [drm:drm_atomic_commit] commiting ffff8800b91af600
>[   59.857717] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af600
>[   59.857719] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af600
>[   59.867648] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af600
>[   59.867653] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b0c0 state to ffff8800b91af600
>[   59.867656] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225f000 state to ffff8800b91af600
>[   59.867657] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b0c0 to [CRTC:21]
>[   59.867659] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b0c0
>[   59.867660] [drm:drm_atomic_check_only] checking ffff8800b91af600
>[   59.867664] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.867666] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.867668] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b000 state to ffff8800b91af600
>[   59.867670] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b6c0 state to ffff8800b91af600
>[   59.867674] [drm:drm_atomic_commit] commiting ffff8800b91af600
>[   59.867696] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af600
>[   59.867699] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af600
>[   59.877627] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af600
>[   59.877632] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b840 state to ffff8800b91af600
>[   59.877635] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a800 state to ffff8800b91af600
>[   59.877637] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b840 to [CRTC:21]
>[   59.877638] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b840
>[   59.877640] [drm:drm_atomic_check_only] checking ffff8800b91af600
>[   59.877644] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.877646] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.877650] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b480 state to ffff8800b91af600
>[   59.877652] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b300 state to ffff8800b91af600
>[   59.877655] [drm:drm_atomic_commit] commiting ffff8800b91af600
>[   59.877673] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af600
>[   59.877675] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af600
>[   59.886609] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af600
>[   59.886615] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b6c0 state to ffff8800b91af600
>[   59.886618] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225f000 state to ffff8800b91af600
>[   59.886620] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b6c0 to [CRTC:21]
>[   59.886621] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b6c0
>[   59.886623] [drm:drm_atomic_check_only] checking ffff8800b91af600
>[   59.886628] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.886629] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.886632] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b0c0 state to ffff8800b91af600
>[   59.886634] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b000 state to ffff8800b91af600
>[   59.886638] [drm:drm_atomic_commit] commiting ffff8800b91af600
>[   59.886658] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af600
>[   59.886661] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af600
>[   59.896585] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af600
>[   59.896590] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b300 state to ffff8800b91af600
>[   59.896593] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a800 state to ffff8800b91af600
>[   59.896595] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b300 to [CRTC:21]
>[   59.896597] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b300
>[   59.896598] [drm:drm_atomic_check_only] checking ffff8800b91af600
>[   59.896603] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.896605] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.896608] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b840 state to ffff8800b91af600
>[   59.896610] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b480 state to ffff8800b91af600
>[   59.896613] [drm:drm_atomic_commit] commiting ffff8800b91af600
>[   59.896633] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af600
>[   59.896636] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af600
>[   59.906585] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af600
>[   59.906590] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b000 state to ffff8800b91af600
>[   59.906593] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225f000 state to ffff8800b91af600
>[   59.906594] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b000 to [CRTC:21]
>[   59.906596] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b000
>[   59.906597] [drm:drm_atomic_check_only] checking ffff8800b91af600
>[   59.906602] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.906604] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.906606] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b6c0 state to ffff8800b91af600
>[   59.906608] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b0c0 state to ffff8800b91af600
>[   59.906612] [drm:drm_atomic_commit] commiting ffff8800b91af600
>[   59.906632] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af600
>[   59.906634] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af600
>[   59.916579] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af600
>[   59.916585] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b480 state to ffff8800b91af600
>[   59.916588] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a800 state to ffff8800b91af600
>[   59.916590] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b480 to [CRTC:21]
>[   59.916592] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b480
>[   59.916593] [drm:drm_atomic_check_only] checking ffff8800b91af600
>[   59.916598] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.916599] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.916602] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b300 state to ffff8800b91af600
>[   59.916604] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b840 state to ffff8800b91af600
>[   59.916608] [drm:drm_atomic_commit] commiting ffff8800b91af600
>[   59.916627] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af600
>[   59.916629] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af600
>[   59.919118] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af200
>[   59.919121] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b0c0 state to ffff8800b91af200
>[   59.919123] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225f000 state to ffff8800b91af200
>[   59.919124] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b0c0 to [CRTC:21]
>[   59.919125] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b0c0
>[   59.919126] [drm:drm_atomic_check_only] checking ffff8800b91af200
>[   59.919129] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.919130] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.919132] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b000 state to ffff8800b91af200
>[   59.919133] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b6c0 state to ffff8800b91af200
>[   59.919136] [drm:drm_atomic_commit] commiting ffff8800b91af200
>[   59.919154] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af200
>[   59.919156] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af200
>[   59.925508] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af800
>[   59.925513] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b840 state to ffff8800b91af800
>[   59.925516] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a800 state to ffff8800b91af800
>[   59.925518] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b840 to [CRTC:21]
>[   59.925520] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b840
>[   59.925521] [drm:drm_atomic_check_only] checking ffff8800b91af800
>[   59.925526] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.925527] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.925530] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b480 state to ffff8800b91af800
>[   59.925532] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b300 state to ffff8800b91af800
>[   59.925535] [drm:drm_atomic_commit] commiting ffff8800b91af800
>[   59.925551] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af800
>[   59.925553] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af800
>[   59.935513] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af200
>[   59.935518] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b6c0 state to ffff8800b91af200
>[   59.935521] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225ec00 state to ffff8800b91af200
>[   59.935523] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b6c0 to [CRTC:21]
>[   59.935525] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b6c0
>[   59.935526] [drm:drm_atomic_check_only] checking ffff8800b91af200
>[   59.935531] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.935533] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.935535] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b0c0 state to ffff8800b91af200
>[   59.935537] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b000 state to ffff8800b91af200
>[   59.935541] [drm:drm_atomic_commit] commiting ffff8800b91af200
>[   59.935564] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af200
>[   59.935566] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af200
>[   59.974332] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ecb200
>[   59.974336] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021da5e0c0 state to ffff880222ecb200
>[   59.974338] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a400 state to ffff880222ecb200
>[   59.974339] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021da5e0c0 to [CRTC:21]
>[   59.974340] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021da5e0c0
>[   59.974341] [drm:drm_atomic_check_only] checking ffff880222ecb200
>[   59.974346] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.974347] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.974349] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021da5e240 state to ffff880222ecb200
>[   59.974350] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021da5e600 state to ffff880222ecb200
>[   59.974353] [drm:drm_atomic_commit] commiting ffff880222ecb200
>[   59.974371] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ecb200
>[   59.974373] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ecb200
>[   59.984290] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ecb400
>[   59.984295] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021da5e6c0 state to ffff880222ecb400
>[   59.984297] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225c400 state to ffff880222ecb400
>[   59.984299] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021da5e6c0 to [CRTC:21]
>[   59.984301] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021da5e6c0
>[   59.984302] [drm:drm_atomic_check_only] checking ffff880222ecb400
>[   59.984307] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.984309] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.984312] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021da5ee40 state to ffff880222ecb400
>[   59.984314] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021da5ed80 state to ffff880222ecb400
>[   59.984318] [drm:drm_atomic_commit] commiting ffff880222ecb400
>[   59.984337] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ecb400
>[   59.984340] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ecb400
>[   59.993230] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ecbc00
>[   59.993235] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021da5e600 state to ffff880222ecbc00
>[   59.993239] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a400 state to ffff880222ecbc00
>[   59.993241] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021da5e600 to [CRTC:21]
>[   59.993242] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021da5e600
>[   59.993244] [drm:drm_atomic_check_only] checking ffff880222ecbc00
>[   59.993249] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   59.993251] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   59.993254] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021da5e0c0 state to ffff880222ecbc00
>[   59.993256] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021da5e240 state to ffff880222ecbc00
>[   59.993260] [drm:drm_atomic_commit] commiting ffff880222ecbc00
>[   59.993279] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ecbc00
>[   59.993281] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ecbc00
>[   60.003189] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ec9a00
>[   60.003196] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021da5ed80 state to ffff880222ec9a00
>[   60.003199] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225c400 state to ffff880222ec9a00
>[   60.003200] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021da5ed80 to [CRTC:21]
>[   60.003202] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021da5ed80
>[   60.003203] [drm:drm_atomic_check_only] checking ffff880222ec9a00
>[   60.003208] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.003210] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.003213] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021da5e6c0 state to ffff880222ec9a00
>[   60.003215] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021da5ee40 state to ffff880222ec9a00
>[   60.003218] [drm:drm_atomic_commit] commiting ffff880222ec9a00
>[   60.003239] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ec9a00
>[   60.003241] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ec9a00
>[   60.013139] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ec8200
>[   60.013144] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021da5e240 state to ffff880222ec8200
>[   60.013148] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092258000 state to ffff880222ec8200
>[   60.013149] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021da5e240 to [CRTC:21]
>[   60.013150] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021da5e240
>[   60.013152] [drm:drm_atomic_check_only] checking ffff880222ec8200
>[   60.013157] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.013159] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.013161] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021da5e600 state to ffff880222ec8200
>[   60.013163] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021da5e0c0 state to ffff880222ec8200
>[   60.013166] [drm:drm_atomic_commit] commiting ffff880222ec8200
>[   60.013187] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ec8200
>[   60.013190] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ec8200
>[   60.024918] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2ec00
>[   60.024923] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b6c0 state to ffff88021fd2ec00
>[   60.024926] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91a2c00 state to ffff88021fd2ec00
>[   60.024928] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b6c0 to [CRTC:21]
>[   60.024930] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b6c0
>[   60.024931] [drm:drm_atomic_check_only] checking ffff88021fd2ec00
>[   60.024936] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.024938] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.024941] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b0c0 state to ffff88021fd2ec00
>[   60.024943] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b840 state to ffff88021fd2ec00
>[   60.024946] [drm:drm_atomic_commit] commiting ffff88021fd2ec00
>[   60.024967] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2ec00
>[   60.024969] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2ec00
>[   60.032100] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2c600
>[   60.032105] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b300 state to ffff88021fd2c600
>[   60.032108] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91a2800 state to ffff88021fd2c600
>[   60.032110] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b300 to [CRTC:21]
>[   60.032112] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b300
>[   60.032113] [drm:drm_atomic_check_only] checking ffff88021fd2c600
>[   60.032118] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.032120] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.032123] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b600 state to ffff88021fd2c600
>[   60.032125] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b000 state to ffff88021fd2c600
>[   60.032129] [drm:drm_atomic_commit] commiting ffff88021fd2c600
>[   60.032150] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2c600
>[   60.032153] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2c600
>[   60.042110] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ec8a00
>[   60.042115] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021da5e540 state to ffff880222ec8a00
>[   60.042118] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225f000 state to ffff880222ec8a00
>[   60.042120] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021da5e540 to [CRTC:21]
>[   60.042122] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021da5e540
>[   60.042123] [drm:drm_atomic_check_only] checking ffff880222ec8a00
>[   60.042128] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.042130] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.042133] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021da5ea80 state to ffff880222ec8a00
>[   60.042135] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021da5ecc0 state to ffff880222ec8a00
>[   60.042139] [drm:drm_atomic_commit] commiting ffff880222ec8a00
>[   60.042158] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ec8a00
>[   60.042161] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ec8a00
>[   60.052082] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ec8a00
>[   60.052087] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021da5ec00 state to ffff880222ec8a00
>[   60.052090] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092259000 state to ffff880222ec8a00
>[   60.052092] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021da5ec00 to [CRTC:21]
>[   60.052093] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021da5ec00
>[   60.052095] [drm:drm_atomic_check_only] checking ffff880222ec8a00
>[   60.052100] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.052102] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.052104] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021da5e840 state to ffff880222ec8a00
>[   60.052106] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021da5e000 state to ffff880222ec8a00
>[   60.052111] [drm:drm_atomic_commit] commiting ffff880222ec8a00
>[   60.052129] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ec8a00
>[   60.052132] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ec8a00
>[   60.061163] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ecbc00
>[   60.061169] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021da5ecc0 state to ffff880222ecbc00
>[   60.061172] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092258800 state to ffff880222ecbc00
>[   60.061173] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021da5ecc0 to [CRTC:21]
>[   60.061175] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021da5ecc0
>[   60.061177] [drm:drm_atomic_check_only] checking ffff880222ecbc00
>[   60.061182] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.061184] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.061187] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021da5ea80 state to ffff880222ecbc00
>[   60.061189] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021da5e480 state to ffff880222ecbc00
>[   60.061193] [drm:drm_atomic_commit] commiting ffff880222ecbc00
>[   60.061212] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ecbc00
>[   60.061215] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ecbc00
>[   60.071248] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ecb200
>[   60.071253] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021da5e000 state to ffff880222ecb200
>[   60.071256] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a800 state to ffff880222ecb200
>[   60.071258] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021da5e000 to [CRTC:21]
>[   60.071260] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021da5e000
>[   60.071261] [drm:drm_atomic_check_only] checking ffff880222ecb200
>[   60.071266] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.071268] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.071271] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021da5e840 state to ffff880222ecb200
>[   60.071273] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021da5ef00 state to ffff880222ecb200
>[   60.071277] [drm:drm_atomic_commit] commiting ffff880222ecb200
>[   60.071300] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ecb200
>[   60.071302] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ecb200
>[   60.081213] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ecb400
>[   60.081218] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021da5ecc0 state to ffff880222ecb400
>[   60.081221] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092258800 state to ffff880222ecb400
>[   60.081223] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021da5ecc0 to [CRTC:21]
>[   60.081224] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021da5ecc0
>[   60.081226] [drm:drm_atomic_check_only] checking ffff880222ecb400
>[   60.081231] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.081232] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.081235] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021da5ea80 state to ffff880222ecb400
>[   60.081237] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021da5e180 state to ffff880222ecb400
>[   60.081241] [drm:drm_atomic_commit] commiting ffff880222ecb400
>[   60.081259] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ecb400
>[   60.081261] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ecb400
>[   60.090288] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b793fc00
>[   60.090292] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021da5ef00 state to ffff8800b793fc00
>[   60.090295] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225fc00 state to ffff8800b793fc00
>[   60.090296] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021da5ef00 to [CRTC:21]
>[   60.090298] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021da5ef00
>[   60.090299] [drm:drm_atomic_check_only] checking ffff8800b793fc00
>[   60.090304] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.090306] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.090309] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021da5e000 state to ffff8800b793fc00
>[   60.090310] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021da5e840 state to ffff8800b793fc00
>[   60.090316] [drm:drm_atomic_commit] commiting ffff8800b793fc00
>[   60.090335] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b793fc00
>[   60.090337] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b793fc00
>[   60.100262] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ec9200
>[   60.100267] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021da5e180 state to ffff880222ec9200
>[   60.100270] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225cc00 state to ffff880222ec9200
>[   60.100271] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021da5e180 to [CRTC:21]
>[   60.100273] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021da5e180
>[   60.100275] [drm:drm_atomic_check_only] checking ffff880222ec9200
>[   60.100280] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.100282] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.100284] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021da5e3c0 state to ffff880222ec9200
>[   60.100287] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021da5e6c0 state to ffff880222ec9200
>[   60.100292] [drm:drm_atomic_commit] commiting ffff880222ec9200
>[   60.100312] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ec9200
>[   60.100314] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ec9200
>[   60.127239] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ecb200
>[   60.127244] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021da5e000 state to ffff880222ecb200
>[   60.127247] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225d400 state to ffff880222ecb200
>[   60.127249] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021da5e000 to [CRTC:21]
>[   60.127250] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021da5e000
>[   60.127251] [drm:drm_atomic_check_only] checking ffff880222ecb200
>[   60.127256] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.127257] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.127260] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021da5ed80 state to ffff880222ecb200
>[   60.127263] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021da5e0c0 state to ffff880222ecb200
>[   60.127267] [drm:drm_atomic_commit] commiting ffff880222ecb200
>[   60.127287] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ecb200
>[   60.127290] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ecb200
>[   60.127316] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ecb200
>[   60.127318] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021da5e6c0 state to ffff880222ecb200
>[   60.127320] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225cc00 state to ffff880222ecb200
>[   60.127321] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021da5e6c0 to [CRTC:21]
>[   60.127323] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021da5e6c0
>[   60.127324] [drm:drm_atomic_check_only] checking ffff880222ecb200
>[   60.127327] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.127328] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.127330] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021da5e180 state to ffff880222ecb200
>[   60.127332] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021da5e3c0 state to ffff880222ecb200
>[   60.127335] [drm:drm_atomic_commit] commiting ffff880222ecb200
>[   60.127346] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ecb200
>[   60.127347] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ecb200
>[   60.127363] [drm:drm_mode_addfb2] [FB:55]
>[   60.129201] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ecb800
>[   60.129205] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021da5e000 state to ffff880222ecb800
>[   60.129208] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225d400 state to ffff880222ecb800
>[   60.129210] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021da5e000 to [CRTC:21]
>[   60.129211] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021da5e000
>[   60.129213] [drm:drm_atomic_check_only] checking ffff880222ecb800
>[   60.129217] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.129219] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.129222] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021da5ed80 state to ffff880222ecb800
>[   60.129224] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021da5e240 state to ffff880222ecb800
>[   60.129227] [drm:drm_atomic_commit] commiting ffff880222ecb800
>[   60.129246] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ecb800
>[   60.129248] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ecb800
>[   60.139203] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1f800
>[   60.139210] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021f5d2a80 state to ffff8800b9e1f800
>[   60.139213] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1914400 state to ffff8800b9e1f800
>[   60.139214] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021f5d2a80 to [CRTC:21]
>[   60.139216] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021f5d2a80
>[   60.139217] [drm:drm_atomic_check_only] checking ffff8800b9e1f800
>[   60.139222] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.139224] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.139227] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021f5d2b40 state to ffff8800b9e1f800
>[   60.139229] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b77e6840 state to ffff8800b9e1f800
>[   60.139233] [drm:drm_atomic_commit] commiting ffff8800b9e1f800
>[   60.139254] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1f800
>[   60.139256] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1f800
>[   60.148180] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ec9800
>[   60.148186] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021da5e6c0 state to ffff880222ec9800
>[   60.148189] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225e800 state to ffff880222ec9800
>[   60.148191] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021da5e6c0 to [CRTC:21]
>[   60.148193] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021da5e6c0
>[   60.148194] [drm:drm_atomic_check_only] checking ffff880222ec9800
>[   60.148200] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.148202] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.148205] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021da5e240 state to ffff880222ec9800
>[   60.148207] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021da5e000 state to ffff880222ec9800
>[   60.148211] [drm:drm_atomic_commit] commiting ffff880222ec9800
>[   60.148231] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ec9800
>[   60.148233] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ec9800
>[   60.158201] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1f200
>[   60.158207] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b77e6c00 state to ffff8800b9e1f200
>[   60.158210] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1913000 state to ffff8800b9e1f200
>[   60.158211] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b77e6c00 to [CRTC:21]
>[   60.158213] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8800b77e6c00
>[   60.158214] [drm:drm_atomic_check_only] checking ffff8800b9e1f200
>[   60.158220] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.158222] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.158225] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b77e6840 state to ffff8800b9e1f200
>[   60.158227] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b77e66c0 state to ffff8800b9e1f200
>[   60.158230] [drm:drm_atomic_commit] commiting ffff8800b9e1f200
>[   60.158249] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1f200
>[   60.158252] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1f200
>[   60.168293] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ec8200
>[   60.168298] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b94c7f00 state to ffff880222ec8200
>[   60.168301] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a400 state to ffff880222ec8200
>[   60.168303] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b94c7f00 to [CRTC:21]
>[   60.168306] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8800b94c7f00
>[   60.168307] [drm:drm_atomic_check_only] checking ffff880222ec8200
>[   60.168312] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.168314] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.168317] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b94c7a80 state to ffff880222ec8200
>[   60.168319] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b94c7900 state to ffff880222ec8200
>[   60.168323] [drm:drm_atomic_commit] commiting ffff880222ec8200
>[   60.168342] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ec8200
>[   60.168345] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ec8200
>[   60.177419] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ecbc00
>[   60.177423] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b94c7840 state to ffff880222ecbc00
>[   60.177426] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092259800 state to ffff880222ecbc00
>[   60.177428] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b94c7840 to [CRTC:21]
>[   60.177429] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8800b94c7840
>[   60.177431] [drm:drm_atomic_check_only] checking ffff880222ecbc00
>[   60.177435] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.177437] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.177440] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b94c76c0 state to ffff880222ecbc00
>[   60.177442] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b94c7300 state to ffff880222ecbc00
>[   60.177446] [drm:drm_atomic_commit] commiting ffff880222ecbc00
>[   60.177467] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ecbc00
>[   60.177469] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ecbc00
>[   60.189158] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ec9200
>[   60.189164] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b77e66c0 state to ffff880222ec9200
>[   60.189167] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a400 state to ffff880222ec9200
>[   60.189169] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b77e66c0 to [CRTC:21]
>[   60.189171] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8800b77e66c0
>[   60.189173] [drm:drm_atomic_check_only] checking ffff880222ec9200
>[   60.189177] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.189179] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.189182] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b77e6c00 state to ffff880222ec9200
>[   60.189184] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b77e6840 state to ffff880222ec9200
>[   60.189188] [drm:drm_atomic_commit] commiting ffff880222ec9200
>[   60.189208] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ec9200
>[   60.189211] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ec9200
>[   60.213481] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2ec00
>[   60.213498] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b0c0 state to ffff88021fd2ec00
>[   60.213505] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b9053c00 state to ffff88021fd2ec00
>[   60.213509] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b0c0 to [CRTC:21]
>[   60.213511] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b0c0
>[   60.213513] [drm:drm_atomic_check_only] checking ffff88021fd2ec00
>[   60.213529] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.213531] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.213540] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b240 state to ffff88021fd2ec00
>[   60.213544] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b480 state to ffff88021fd2ec00
>[   60.213553] [drm:drm_atomic_commit] commiting ffff88021fd2ec00
>[   60.213613] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2ec00
>[   60.213620] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2ec00
>[   60.213748] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2ec00
>[   60.213757] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096bf00 state to ffff88021fd2ec00
>[   60.213762] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b9050000 state to ffff88021fd2ec00
>[   60.213764] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096bf00 to [CRTC:21]
>[   60.213765] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096bf00
>[   60.213767] [drm:drm_atomic_check_only] checking ffff88021fd2ec00
>[   60.213776] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.213778] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.213783] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b000 state to ffff88021fd2ec00
>[   60.213786] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b300 state to ffff88021fd2ec00
>[   60.213796] [drm:drm_atomic_commit] commiting ffff88021fd2ec00
>[   60.213825] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2ec00
>[   60.213827] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2ec00
>[   60.220293] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2ec00
>[   60.220309] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b0c0 state to ffff88021fd2ec00
>[   60.220316] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b9053c00 state to ffff88021fd2ec00
>[   60.220318] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b0c0 to [CRTC:21]
>[   60.220319] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b0c0
>[   60.220321] [drm:drm_atomic_check_only] checking ffff88021fd2ec00
>[   60.220336] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.220337] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.220343] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b240 state to ffff88021fd2ec00
>[   60.220346] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b600 state to ffff88021fd2ec00
>[   60.220359] [drm:drm_atomic_commit] commiting ffff88021fd2ec00
>[   60.220440] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2ec00
>[   60.220448] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2ec00
>[   60.239541] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1fe00
>[   60.239547] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021da5e300 state to ffff8800b9e1fe00
>[   60.239549] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1915000 state to ffff8800b9e1fe00
>[   60.239551] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021da5e300 to [CRTC:21]
>[   60.239553] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021da5e300
>[   60.239554] [drm:drm_atomic_check_only] checking ffff8800b9e1fe00
>[   60.239559] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.239560] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.239563] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021da5e600 state to ffff8800b9e1fe00
>[   60.239565] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021da5e000 state to ffff8800b9e1fe00
>[   60.239569] [drm:drm_atomic_commit] commiting ffff8800b9e1fe00
>[   60.239583] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1fe00
>[   60.239585] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1fe00
>[   60.239608] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1fe00
>[   60.239610] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021da5eb40 state to ffff8800b9e1fe00
>[   60.239612] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1912c00 state to ffff8800b9e1fe00
>[   60.239614] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021da5eb40 to [CRTC:21]
>[   60.239615] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021da5eb40
>[   60.239616] [drm:drm_atomic_check_only] checking ffff8800b9e1fe00
>[   60.239618] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.239620] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.239622] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021da5e6c0 state to ffff8800b9e1fe00
>[   60.239623] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021da5e3c0 state to ffff8800b9e1fe00
>[   60.239625] [drm:drm_atomic_commit] commiting ffff8800b9e1fe00
>[   60.239633] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1fe00
>[   60.239634] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1fe00
>[   60.246175] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2d000
>[   60.246179] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096bf00 state to ffff88021fd2d000
>[   60.246182] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b9050000 state to ffff88021fd2d000
>[   60.246184] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096bf00 to [CRTC:21]
>[   60.246186] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096bf00
>[   60.246187] [drm:drm_atomic_check_only] checking ffff88021fd2d000
>[   60.246193] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.246195] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.246197] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b000 state to ffff88021fd2d000
>[   60.246200] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b180 state to ffff88021fd2d000
>[   60.246204] [drm:drm_atomic_commit] commiting ffff88021fd2d000
>[   60.246219] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2d000
>[   60.246221] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2d000
>[   60.255454] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2ea00
>[   60.255459] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b6c0 state to ffff88021fd2ea00
>[   60.255462] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b9057400 state to ffff88021fd2ea00
>[   60.255464] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b6c0 to [CRTC:21]
>[   60.255466] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b6c0
>[   60.255467] [drm:drm_atomic_check_only] checking ffff88021fd2ea00
>[   60.255473] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.255475] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.255478] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b600 state to ffff88021fd2ea00
>[   60.255480] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b0c0 state to ffff88021fd2ea00
>[   60.255484] [drm:drm_atomic_commit] commiting ffff88021fd2ea00
>[   60.255503] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2ea00
>[   60.255505] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2ea00
>[   60.264418] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2c200
>[   60.264423] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b180 state to ffff88021fd2c200
>[   60.264427] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b9050000 state to ffff88021fd2c200
>[   60.264429] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b180 to [CRTC:21]
>[   60.264431] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b180
>[   60.264432] [drm:drm_atomic_check_only] checking ffff88021fd2c200
>[   60.264437] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.264438] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.264441] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096bf00 state to ffff88021fd2c200
>[   60.264443] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b000 state to ffff88021fd2c200
>[   60.264447] [drm:drm_atomic_commit] commiting ffff88021fd2c200
>[   60.264467] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2c200
>[   60.264469] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2c200
>[   60.274419] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2e600
>[   60.274424] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b0c0 state to ffff88021fd2e600
>[   60.274427] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b9057400 state to ffff88021fd2e600
>[   60.274429] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b0c0 to [CRTC:21]
>[   60.274431] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b0c0
>[   60.274433] [drm:drm_atomic_check_only] checking ffff88021fd2e600
>[   60.274438] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.274440] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.274444] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b6c0 state to ffff88021fd2e600
>[   60.274446] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b600 state to ffff88021fd2e600
>[   60.274449] [drm:drm_atomic_commit] commiting ffff88021fd2e600
>[   60.274470] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2e600
>[   60.274472] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2e600
>[   60.284373] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2f800
>[   60.284378] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b000 state to ffff88021fd2f800
>[   60.284381] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b9050000 state to ffff88021fd2f800
>[   60.284383] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b000 to [CRTC:21]
>[   60.284385] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b000
>[   60.284387] [drm:drm_atomic_check_only] checking ffff88021fd2f800
>[   60.284391] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.284393] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.284396] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b180 state to ffff88021fd2f800
>[   60.284398] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096bf00 state to ffff88021fd2f800
>[   60.284402] [drm:drm_atomic_commit] commiting ffff88021fd2f800
>[   60.284419] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2f800
>[   60.284422] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2f800
>[   60.295191] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2d000
>[   60.295195] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b600 state to ffff88021fd2d000
>[   60.295198] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b9053c00 state to ffff88021fd2d000
>[   60.295200] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b600 to [CRTC:21]
>[   60.295201] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b600
>[   60.295203] [drm:drm_atomic_check_only] checking ffff88021fd2d000
>[   60.295207] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.295209] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.295212] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b0c0 state to ffff88021fd2d000
>[   60.295215] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b6c0 state to ffff88021fd2d000
>[   60.295218] [drm:drm_atomic_commit] commiting ffff88021fd2d000
>[   60.295238] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2d000
>[   60.295240] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2d000
>[   60.306199] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2ee00
>[   60.306204] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096bf00 state to ffff88021fd2ee00
>[   60.306206] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3adc00 state to ffff88021fd2ee00
>[   60.306208] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096bf00 to [CRTC:21]
>[   60.306209] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096bf00
>[   60.306211] [drm:drm_atomic_check_only] checking ffff88021fd2ee00
>[   60.306215] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.306217] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.306220] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b000 state to ffff88021fd2ee00
>[   60.306223] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b180 state to ffff88021fd2ee00
>[   60.306226] [drm:drm_atomic_commit] commiting ffff88021fd2ee00
>[   60.306243] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2ee00
>[   60.306246] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2ee00
>[   60.306369] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2f400
>[   60.306371] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b6c0 state to ffff88021fd2f400
>[   60.306373] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3ac400 state to ffff88021fd2f400
>[   60.306375] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b6c0 to [CRTC:21]
>[   60.306376] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b6c0
>[   60.306378] [drm:drm_atomic_check_only] checking ffff88021fd2f400
>[   60.306380] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.306382] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.306384] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b600 state to ffff88021fd2f400
>[   60.306386] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b0c0 state to ffff88021fd2f400
>[   60.306389] [drm:drm_atomic_commit] commiting ffff88021fd2f400
>[   60.306397] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2f400
>[   60.306399] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2f400
>[   60.313287] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2c400
>[   60.313291] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b180 state to ffff88021fd2c400
>[   60.313294] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3adc00 state to ffff88021fd2c400
>[   60.313296] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b180 to [CRTC:21]
>[   60.313298] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b180
>[   60.313299] [drm:drm_atomic_check_only] checking ffff88021fd2c400
>[   60.313305] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.313306] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.313309] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096bf00 state to ffff88021fd2c400
>[   60.313311] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b000 state to ffff88021fd2c400
>[   60.313315] [drm:drm_atomic_commit] commiting ffff88021fd2c400
>[   60.313333] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2c400
>[   60.313335] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2c400
>[   60.323263] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1e200
>[   60.323268] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021db8f900 state to ffff8800b9e1e200
>[   60.323271] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1913c00 state to ffff8800b9e1e200
>[   60.323273] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021db8f900 to [CRTC:21]
>[   60.323275] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021db8f900
>[   60.323276] [drm:drm_atomic_check_only] checking ffff8800b9e1e200
>[   60.323281] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.323283] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.323285] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021db8fb40 state to ffff8800b9e1e200
>[   60.323288] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021db8fe40 state to ffff8800b9e1e200
>[   60.323291] [drm:drm_atomic_commit] commiting ffff8800b9e1e200
>[   60.323312] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1e200
>[   60.323315] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1e200
>[   60.332263] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1fe00
>[   60.332269] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8802243ce540 state to ffff8800b9e1fe00
>[   60.332272] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1914c00 state to ffff8800b9e1fe00
>[   60.332274] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8802243ce540 to [CRTC:21]
>[   60.332276] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8802243ce540
>[   60.332278] [drm:drm_atomic_check_only] checking ffff8800b9e1fe00
>[   60.332282] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.332284] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.332287] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8802243ce180 state to ffff8800b9e1fe00
>[   60.332289] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880222fd5840 state to ffff8800b9e1fe00
>[   60.332293] [drm:drm_atomic_commit] commiting ffff8800b9e1fe00
>[   60.332313] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1fe00
>[   60.332316] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1fe00
>[   60.343594] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2c400
>[   60.343599] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b0c0 state to ffff88021fd2c400
>[   60.343602] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3ae800 state to ffff88021fd2c400
>[   60.343604] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b0c0 to [CRTC:21]
>[   60.343606] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b0c0
>[   60.343607] [drm:drm_atomic_check_only] checking ffff88021fd2c400
>[   60.343612] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.343614] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.343617] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b6c0 state to ffff88021fd2c400
>[   60.343619] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b600 state to ffff88021fd2c400
>[   60.343622] [drm:drm_atomic_commit] commiting ffff88021fd2c400
>[   60.343640] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2c400
>[   60.343643] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2c400
>[   60.352237] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1fe00
>[   60.352242] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880222fd5000 state to ffff8800b9e1fe00
>[   60.352245] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1913c00 state to ffff8800b9e1fe00
>[   60.352246] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880222fd5000 to [CRTC:21]
>[   60.352248] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880222fd5000
>[   60.352249] [drm:drm_atomic_check_only] checking ffff8800b9e1fe00
>[   60.352255] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.352257] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.352260] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880222fd59c0 state to ffff8800b9e1fe00
>[   60.352261] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880222fd5b40 state to ffff8800b9e1fe00
>[   60.352266] [drm:drm_atomic_commit] commiting ffff8800b9e1fe00
>[   60.352286] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1fe00
>[   60.352288] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1fe00
>[   60.410167] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b793ec00
>[   60.410174] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788300 state to ffff8800b793ec00
>[   60.410177] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092258400 state to ffff8800b793ec00
>[   60.410179] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788300 to [CRTC:21]
>[   60.410180] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788300
>[   60.410182] [drm:drm_atomic_check_only] checking ffff8800b793ec00
>[   60.410187] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.410188] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.410192] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788f00 state to ffff8800b793ec00
>[   60.410194] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223788e40 state to ffff8800b793ec00
>[   60.410197] [drm:drm_atomic_commit] commiting ffff8800b793ec00
>[   60.410228] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b793ec00
>[   60.410230] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b793ec00
>[   60.420140] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b793f800
>[   60.420147] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788240 state to ffff8800b793f800
>[   60.420150] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a000 state to ffff8800b793f800
>[   60.420152] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788240 to [CRTC:21]
>[   60.420153] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788240
>[   60.420155] [drm:drm_atomic_check_only] checking ffff8800b793f800
>[   60.420159] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.420161] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.420164] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788600 state to ffff8800b793f800
>[   60.420166] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223788780 state to ffff8800b793f800
>[   60.420170] [drm:drm_atomic_commit] commiting ffff8800b793f800
>[   60.420189] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b793f800
>[   60.420191] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b793f800
>[   60.429271] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b793fc00
>[   60.429277] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788f00 state to ffff8800b793fc00
>[   60.429280] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092258400 state to ffff8800b793fc00
>[   60.429282] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788f00 to [CRTC:21]
>[   60.429283] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788f00
>[   60.429285] [drm:drm_atomic_check_only] checking ffff8800b793fc00
>[   60.429290] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.429292] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.429295] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8802237886c0 state to ffff8800b793fc00
>[   60.429297] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223788900 state to ffff8800b793fc00
>[   60.429301] [drm:drm_atomic_commit] commiting ffff8800b793fc00
>[   60.429317] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b793fc00
>[   60.429319] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b793fc00
>[   60.439347] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b793c200
>[   60.439353] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788780 state to ffff8800b793c200
>[   60.439356] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225a000 state to ffff8800b793c200
>[   60.439358] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788780 to [CRTC:21]
>[   60.439360] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788780
>[   60.439362] [drm:drm_atomic_check_only] checking ffff8800b793c200
>[   60.439366] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.439368] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.439371] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788240 state to ffff8800b793c200
>[   60.439373] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223788600 state to ffff8800b793c200
>[   60.439377] [drm:drm_atomic_commit] commiting ffff8800b793c200
>[   60.439395] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b793c200
>[   60.439398] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b793c200
>[   60.448414] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2d200
>[   60.448418] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b6c0 state to ffff88021fd2d200
>[   60.448423] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3a8c00 state to ffff88021fd2d200
>[   60.448425] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b6c0 to [CRTC:21]
>[   60.448426] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b6c0
>[   60.448428] [drm:drm_atomic_check_only] checking ffff88021fd2d200
>[   60.448433] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.448435] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.448438] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b000 state to ffff88021fd2d200
>[   60.448440] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b180 state to ffff88021fd2d200
>[   60.448443] [drm:drm_atomic_commit] commiting ffff88021fd2d200
>[   60.448463] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2d200
>[   60.448466] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2d200
>[   60.458374] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2e200
>[   60.458379] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096bf00 state to ffff88021fd2e200
>[   60.458382] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3adc00 state to ffff88021fd2e200
>[   60.458384] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096bf00 to [CRTC:21]
>[   60.458385] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096bf00
>[   60.458387] [drm:drm_atomic_check_only] checking ffff88021fd2e200
>[   60.458392] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.458393] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.458396] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b240 state to ffff88021fd2e200
>[   60.458398] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b0c0 state to ffff88021fd2e200
>[   60.458402] [drm:drm_atomic_commit] commiting ffff88021fd2e200
>[   60.458420] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2e200
>[   60.458422] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2e200
>[   60.468409] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2ee00
>[   60.468414] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b180 state to ffff88021fd2ee00
>[   60.468416] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3afc00 state to ffff88021fd2ee00
>[   60.468418] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b180 to [CRTC:21]
>[   60.468420] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b180
>[   60.468421] [drm:drm_atomic_check_only] checking ffff88021fd2ee00
>[   60.468426] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.468427] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.468430] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b6c0 state to ffff88021fd2ee00
>[   60.468432] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b000 state to ffff88021fd2ee00
>[   60.468435] [drm:drm_atomic_commit] commiting ffff88021fd2ee00
>[   60.468455] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2ee00
>[   60.468459] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2ee00
>[   60.478318] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c86800
>[   60.478322] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021fbd5f00 state to ffff8800b9c86800
>[   60.478324] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1916000 state to ffff8800b9c86800
>[   60.478325] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021fbd5f00 to [CRTC:21]
>[   60.478326] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021fbd5f00
>[   60.478327] [drm:drm_atomic_check_only] checking ffff8800b9c86800
>[   60.478331] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.478332] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.478333] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021fbd5780 state to ffff8800b9c86800
>[   60.478334] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021fbd5c00 state to ffff8800b9c86800
>[   60.478337] [drm:drm_atomic_commit] commiting ffff8800b9c86800
>[   60.478355] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c86800
>[   60.478357] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c86800
>[   60.487283] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c85c00
>[   60.487286] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021fbd5e40 state to ffff8800b9c85c00
>[   60.487288] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1910000 state to ffff8800b9c85c00
>[   60.487289] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021fbd5e40 to [CRTC:21]
>[   60.487290] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021fbd5e40
>[   60.487291] [drm:drm_atomic_check_only] checking ffff8800b9c85c00
>[   60.487295] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.487296] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.487298] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021fbd56c0 state to ffff8800b9c85c00
>[   60.487299] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021fbd5840 state to ffff8800b9c85c00
>[   60.487302] [drm:drm_atomic_commit] commiting ffff8800b9c85c00
>[   60.487318] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c85c00
>[   60.487320] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c85c00
>[   60.497241] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b793f800
>[   60.497245] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788b40 state to ffff8800b793f800
>[   60.497248] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092259400 state to ffff8800b793f800
>[   60.497249] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788b40 to [CRTC:21]
>[   60.497250] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788b40
>[   60.497251] [drm:drm_atomic_check_only] checking ffff8800b793f800
>[   60.497255] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.497256] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.497278] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788c00 state to ffff8800b793f800
>[   60.497280] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223788cc0 state to ffff8800b793f800
>[   60.497285] [drm:drm_atomic_commit] commiting ffff8800b793f800
>[   60.497304] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b793f800
>[   60.497307] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b793f800
>[   60.507231] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b793f400
>[   60.507234] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788d80 state to ffff8800b793f400
>[   60.507238] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225bc00 state to ffff8800b793f400
>[   60.507239] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788d80 to [CRTC:21]
>[   60.507240] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788d80
>[   60.507241] [drm:drm_atomic_check_only] checking ffff8800b793f400
>[   60.507244] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.507245] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.507247] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788e40 state to ffff8800b793f400
>[   60.507248] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223788a80 state to ffff8800b793f400
>[   60.507252] [drm:drm_atomic_commit] commiting ffff8800b793f400
>[   60.507289] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b793f400
>[   60.507294] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b793f400
>[   60.517335] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b793ec00
>[   60.517340] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788cc0 state to ffff8800b793ec00
>[   60.517344] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092259400 state to ffff8800b793ec00
>[   60.517346] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788cc0 to [CRTC:21]
>[   60.517347] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788cc0
>[   60.517349] [drm:drm_atomic_check_only] checking ffff8800b793ec00
>[   60.517355] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.517356] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.517359] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788b40 state to ffff8800b793ec00
>[   60.517361] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223788c00 state to ffff8800b793ec00
>[   60.517364] [drm:drm_atomic_commit] commiting ffff8800b793ec00
>[   60.517384] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b793ec00
>[   60.517387] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b793ec00
>[   60.526101] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b793f600
>[   60.526105] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788a80 state to ffff8800b793f600
>[   60.526107] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225bc00 state to ffff8800b793f600
>[   60.526108] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788a80 to [CRTC:21]
>[   60.526109] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788a80
>[   60.526110] [drm:drm_atomic_check_only] checking ffff8800b793f600
>[   60.526114] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.526115] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.526116] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788d80 state to ffff8800b793f600
>[   60.526118] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223788e40 state to ffff8800b793f600
>[   60.526120] [drm:drm_atomic_commit] commiting ffff8800b793f600
>[   60.526137] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b793f600
>[   60.526138] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b793f600
>[   60.536511] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b793fc00
>[   60.536515] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788c00 state to ffff8800b793fc00
>[   60.536518] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880092259400 state to ffff8800b793fc00
>[   60.536519] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788c00 to [CRTC:21]
>[   60.536520] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788c00
>[   60.536521] [drm:drm_atomic_check_only] checking ffff8800b793fc00
>[   60.536525] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.536526] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.536528] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788cc0 state to ffff8800b793fc00
>[   60.536529] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223788b40 state to ffff8800b793fc00
>[   60.536532] [drm:drm_atomic_commit] commiting ffff8800b793fc00
>[   60.536547] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b793fc00
>[   60.536550] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b793fc00
>[   60.545642] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c86400
>[   60.545646] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021fbd5c00 state to ffff8800b9c86400
>[   60.545648] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1916000 state to ffff8800b9c86400
>[   60.545649] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021fbd5c00 to [CRTC:21]
>[   60.545650] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021fbd5c00
>[   60.545651] [drm:drm_atomic_check_only] checking ffff8800b9c86400
>[   60.545655] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.545656] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.545658] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021fbd5f00 state to ffff8800b9c86400
>[   60.545659] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021fbd5780 state to ffff8800b9c86400
>[   60.545662] [drm:drm_atomic_commit] commiting ffff8800b9c86400
>[   60.550525] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c86400
>[   60.550531] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c86400
>[   60.555701] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c86600
>[   60.555705] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021fbd5540 state to ffff8800b9c86600
>[   60.555707] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1912400 state to ffff8800b9c86600
>[   60.555708] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021fbd5540 to [CRTC:21]
>[   60.555709] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021fbd5540
>[   60.555710] [drm:drm_atomic_check_only] checking ffff8800b9c86600
>[   60.555714] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.555716] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.555717] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021fbd5840 state to ffff8800b9c86600
>[   60.555719] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021fbd5e40 state to ffff8800b9c86600
>[   60.555722] [drm:drm_atomic_commit] commiting ffff8800b9c86600
>[   60.561292] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c86600
>[   60.561306] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c86600
>[   60.564643] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c86600
>[   60.564646] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021fbd56c0 state to ffff8800b9c86600
>[   60.564648] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1916c00 state to ffff8800b9c86600
>[   60.564649] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021fbd56c0 to [CRTC:21]
>[   60.564650] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021fbd56c0
>[   60.564651] [drm:drm_atomic_check_only] checking ffff8800b9c86600
>[   60.564656] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.564657] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.564660] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021fbd50c0 state to ffff8800b9c86600
>[   60.564661] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021fbd5780 state to ffff8800b9c86600
>[   60.564664] [drm:drm_atomic_commit] commiting ffff8800b9c86600
>[   60.564676] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c86600
>[   60.564677] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c86600
>[   60.574659] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c86400
>[   60.574663] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021fbd5e40 state to ffff8800b9c86400
>[   60.574665] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1912400 state to ffff8800b9c86400
>[   60.574666] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021fbd5e40 to [CRTC:21]
>[   60.574667] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021fbd5e40
>[   60.574668] [drm:drm_atomic_check_only] checking ffff8800b9c86400
>[   60.574672] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.574673] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.574675] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021fbd5540 state to ffff8800b9c86400
>[   60.574676] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021fbd5840 state to ffff8800b9c86400
>[   60.574679] [drm:drm_atomic_commit] commiting ffff8800b9c86400
>[   60.574694] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c86400
>[   60.574697] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c86400
>[   60.584661] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c85c00
>[   60.584665] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021fbd5780 state to ffff8800b9c85c00
>[   60.584667] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1916c00 state to ffff8800b9c85c00
>[   60.584668] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021fbd5780 to [CRTC:21]
>[   60.584669] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021fbd5780
>[   60.584670] [drm:drm_atomic_check_only] checking ffff8800b9c85c00
>[   60.584674] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.584675] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.584677] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021fbd56c0 state to ffff8800b9c85c00
>[   60.584678] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021fbd50c0 state to ffff8800b9c85c00
>[   60.584681] [drm:drm_atomic_commit] commiting ffff8800b9c85c00
>[   60.584697] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c85c00
>[   60.584699] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c85c00
>[   60.593575] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c84000
>[   60.593578] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021fbd5840 state to ffff8800b9c84000
>[   60.593581] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1912400 state to ffff8800b9c84000
>[   60.593582] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021fbd5840 to [CRTC:21]
>[   60.593584] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021fbd5840
>[   60.593585] [drm:drm_atomic_check_only] checking ffff8800b9c84000
>[   60.593589] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.593590] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.593591] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021fbd5e40 state to ffff8800b9c84000
>[   60.593593] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021fbd5540 state to ffff8800b9c84000
>[   60.593595] [drm:drm_atomic_commit] commiting ffff8800b9c84000
>[   60.593610] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c84000
>[   60.593612] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c84000
>[   60.603535] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c87c00
>[   60.603538] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021fbd50c0 state to ffff8800b9c87c00
>[   60.603540] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1916c00 state to ffff8800b9c87c00
>[   60.603541] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021fbd50c0 to [CRTC:21]
>[   60.603542] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021fbd50c0
>[   60.603543] [drm:drm_atomic_check_only] checking ffff8800b9c87c00
>[   60.603548] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.603549] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.603550] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021fbd5780 state to ffff8800b9c87c00
>[   60.603551] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021fbd56c0 state to ffff8800b9c87c00
>[   60.603554] [drm:drm_atomic_commit] commiting ffff8800b9c87c00
>[   60.603565] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c87c00
>[   60.603567] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c87c00
>[   60.613626] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c86400
>[   60.613640] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021fbd5540 state to ffff8800b9c86400
>[   60.613643] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1912400 state to ffff8800b9c86400
>[   60.613644] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021fbd5540 to [CRTC:21]
>[   60.613646] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021fbd5540
>[   60.613647] [drm:drm_atomic_check_only] checking ffff8800b9c86400
>[   60.613663] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.613664] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.613667] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021fbd5840 state to ffff8800b9c86400
>[   60.613671] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021fbd5e40 state to ffff8800b9c86400
>[   60.613676] [drm:drm_atomic_commit] commiting ffff8800b9c86400
>[   60.619696] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c86400
>[   60.619699] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c86400
>[   60.623480] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2fc00
>[   60.623484] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b180 state to ffff88021fd2fc00
>[   60.623487] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3adc00 state to ffff88021fd2fc00
>[   60.623489] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b180 to [CRTC:21]
>[   60.623491] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88022096b180
>[   60.623492] [drm:drm_atomic_check_only] checking ffff88021fd2fc00
>[   60.623497] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.623498] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.623502] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b6c0 state to ffff88021fd2fc00
>[   60.623505] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8802243ce540 state to ffff88021fd2fc00
>[   60.623508] [drm:drm_atomic_commit] commiting ffff88021fd2fc00
>[   60.623523] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2fc00
>[   60.623526] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2fc00
>[   60.632528] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2e200
>[   60.632537] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8802243ce180 state to ffff88021fd2e200
>[   60.632543] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3ae800 state to ffff88021fd2e200
>[   60.632545] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8802243ce180 to [CRTC:21]
>[   60.632547] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8802243ce180
>[   60.632549] [drm:drm_atomic_check_only] checking ffff88021fd2e200
>[   60.632559] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.632561] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.632566] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8802243cec00 state to ffff88021fd2e200
>[   60.632569] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8802243ce9c0 state to ffff88021fd2e200
>[   60.632577] [drm:drm_atomic_commit] commiting ffff88021fd2e200
>[   60.635030] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2e200
>[   60.635034] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2e200
>[   60.642396] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2d400
>[   60.642401] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8802243ce540 state to ffff88021fd2d400
>[   60.642404] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3adc00 state to ffff88021fd2d400
>[   60.642406] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8802243ce540 to [CRTC:21]
>[   60.642408] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8802243ce540
>[   60.642410] [drm:drm_atomic_check_only] checking ffff88021fd2d400
>[   60.642415] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.642416] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.642420] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b180 state to ffff88021fd2d400
>[   60.642422] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b6c0 state to ffff88021fd2d400
>[   60.642425] [drm:drm_atomic_commit] commiting ffff88021fd2d400
>[   60.642443] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2d400
>[   60.642446] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2d400
>[   60.652352] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2ec00
>[   60.652369] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8802243ce9c0 state to ffff88021fd2ec00
>[   60.652372] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3ae800 state to ffff88021fd2ec00
>[   60.652374] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8802243ce9c0 to [CRTC:21]
>[   60.652376] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8802243ce9c0
>[   60.652377] [drm:drm_atomic_check_only] checking ffff88021fd2ec00
>[   60.652382] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.652384] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.652387] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8802243ce180 state to ffff88021fd2ec00
>[   60.652389] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8802243cec00 state to ffff88021fd2ec00
>[   60.652401] [drm:drm_atomic_commit] commiting ffff88021fd2ec00
>[   60.652415] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2ec00
>[   60.652418] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2ec00
>[   60.662494] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2c200
>[   60.662505] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8802243ce540 state to ffff88021fd2c200
>[   60.662510] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3ac400 state to ffff88021fd2c200
>[   60.662512] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8802243ce540 to [CRTC:21]
>[   60.662514] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8802243ce540
>[   60.662516] [drm:drm_atomic_check_only] checking ffff88021fd2c200
>[   60.662530] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.662531] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.662537] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b6c0 state to ffff88021fd2c200
>[   60.662539] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b180 state to ffff88021fd2c200
>[   60.662548] [drm:drm_atomic_commit] commiting ffff88021fd2c200
>[   60.668017] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2c200
>[   60.668021] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2c200
>[   60.671277] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2e200
>[   60.671281] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8802243cec00 state to ffff88021fd2e200
>[   60.671283] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3ae800 state to ffff88021fd2e200
>[   60.671285] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8802243cec00 to [CRTC:21]
>[   60.671286] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8802243cec00
>[   60.671288] [drm:drm_atomic_check_only] checking ffff88021fd2e200
>[   60.671292] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.671294] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.671296] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8802243ce9c0 state to ffff88021fd2e200
>[   60.671298] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8802243ce180 state to ffff88021fd2e200
>[   60.671301] [drm:drm_atomic_commit] commiting ffff88021fd2e200
>[   60.671319] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2e200
>[   60.671332] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2e200
>[   60.681427] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c84000
>[   60.681447] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021fbd5780 state to ffff8800b9c84000
>[   60.681454] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1916c00 state to ffff8800b9c84000
>[   60.681456] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021fbd5780 to [CRTC:21]
>[   60.681457] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021fbd5780
>[   60.681460] [drm:drm_atomic_check_only] checking ffff8800b9c84000
>[   60.681472] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.681473] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.681478] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021fbd5c00 state to ffff8800b9c84000
>[   60.681480] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021fbd5f00 state to ffff8800b9c84000
>[   60.681488] [drm:drm_atomic_commit] commiting ffff8800b9c84000
>[   60.686562] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c84000
>[   60.686564] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c84000
>[   60.691273] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c84000
>[   60.691276] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021fbd5e40 state to ffff8800b9c84000
>[   60.691278] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1917800 state to ffff8800b9c84000
>[   60.691279] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021fbd5e40 to [CRTC:21]
>[   60.691280] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021fbd5e40
>[   60.691281] [drm:drm_atomic_check_only] checking ffff8800b9c84000
>[   60.691285] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.691286] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.691287] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021fbd5540 state to ffff8800b9c84000
>[   60.691289] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021fbd5840 state to ffff8800b9c84000
>[   60.691292] [drm:drm_atomic_commit] commiting ffff8800b9c84000
>[   60.691306] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c84000
>[   60.691308] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c84000
>[   60.929961] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c84000
>[   60.929975] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b8381480 state to ffff8800b9c84000
>[   60.929979] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1913800 state to ffff8800b9c84000
>[   60.929982] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b8381480 to [CRTC:21]
>[   60.929983] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8800b8381480
>[   60.929985] [drm:drm_atomic_check_only] checking ffff8800b9c84000
>[   60.929999] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.930000] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.930006] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b8381e40 state to ffff8800b9c84000
>[   60.930008] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b8381000 state to ffff8800b9c84000
>[   60.930016] [drm:drm_atomic_commit] commiting ffff8800b9c84000
>[   60.931596] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c84000
>[   60.931602] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c84000
>[   60.936935] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b793e400
>[   60.936943] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788780 state to ffff8800b793e400
>[   60.936947] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88009225bc00 state to ffff8800b793e400
>[   60.936948] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788780 to [CRTC:21]
>[   60.936950] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788780
>[   60.936951] [drm:drm_atomic_check_only] checking ffff8800b793e400
>[   60.936958] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   60.936960] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   60.936963] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788600 state to ffff8800b793e400
>[   60.936965] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223788840 state to ffff8800b793e400
>[   60.936969] [drm:drm_atomic_commit] commiting ffff8800b793e400
>[   60.936991] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b793e400
>[   60.936993] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b793e400
>[   61.146861] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2c400
>[   61.146873] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b77e6840 state to ffff88021fd2c400
>[   61.146877] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3ae800 state to ffff88021fd2c400
>[   61.146880] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b77e6840 to [CRTC:21]
>[   61.146882] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8800b77e6840
>[   61.146884] [drm:drm_atomic_check_only] checking ffff88021fd2c400
>[   61.146895] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   61.146897] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   61.146904] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b77e60c0 state to ffff88021fd2c400
>[   61.146907] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b77e6c00 state to ffff88021fd2c400
>[   61.146914] [drm:drm_atomic_commit] commiting ffff88021fd2c400
>[   61.146956] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2c400
>[   61.146963] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2c400
>[   61.156366] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2c200
>[   61.156376] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b77e66c0 state to ffff88021fd2c200
>[   61.156385] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3a8c00 state to ffff88021fd2c200
>[   61.156387] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b77e66c0 to [CRTC:21]
>[   61.156388] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8800b77e66c0
>[   61.156390] [drm:drm_atomic_check_only] checking ffff88021fd2c200
>[   61.156402] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   61.156403] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   61.156409] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788840 state to ffff88021fd2c200
>[   61.156413] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223788780 state to ffff88021fd2c200
>[   61.156423] [drm:drm_atomic_commit] commiting ffff88021fd2c200
>[   61.158206] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2c200
>[   61.158211] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2c200
>[   61.165336] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2fe00
>[   61.165340] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788600 state to ffff88021fd2fe00
>[   61.165343] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3ae800 state to ffff88021fd2fe00
>[   61.165344] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788600 to [CRTC:21]
>[   61.165346] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788600
>[   61.165347] [drm:drm_atomic_check_only] checking ffff88021fd2fe00
>[   61.165352] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   61.165354] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   61.165357] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b77e6c00 state to ffff88021fd2fe00
>[   61.165359] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b77e6840 state to ffff88021fd2fe00
>[   61.165362] [drm:drm_atomic_commit] commiting ffff88021fd2fe00
>[   61.165375] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2fe00
>[   61.165377] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2fe00
>[   61.175643] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2d000
>[   61.175656] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b77e60c0 state to ffff88021fd2d000
>[   61.175662] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3a8c00 state to ffff88021fd2d000
>[   61.175663] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b77e60c0 to [CRTC:21]
>[   61.175665] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8800b77e60c0
>[   61.175667] [drm:drm_atomic_check_only] checking ffff88021fd2d000
>[   61.175747] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   61.175750] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   61.175763] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788780 state to ffff88021fd2d000
>[   61.175765] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223788840 state to ffff88021fd2d000
>[   61.175778] [drm:drm_atomic_commit] commiting ffff88021fd2d000
>[   61.175833] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2d000
>[   61.175839] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2d000
>[   61.184394] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2ec00
>[   61.184398] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788600 state to ffff88021fd2ec00
>[   61.184401] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3ae800 state to ffff88021fd2ec00
>[   61.184403] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788600 to [CRTC:21]
>[   61.184405] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788600
>[   61.184406] [drm:drm_atomic_check_only] checking ffff88021fd2ec00
>[   61.184410] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   61.184412] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   61.184416] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b77e6840 state to ffff88021fd2ec00
>[   61.184418] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b77e6c00 state to ffff88021fd2ec00
>[   61.184422] [drm:drm_atomic_commit] commiting ffff88021fd2ec00
>[   61.184435] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2ec00
>[   61.184437] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2ec00
>[   61.194481] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2ea00
>[   61.194491] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788840 state to ffff88021fd2ea00
>[   61.194495] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3a8c00 state to ffff88021fd2ea00
>[   61.194497] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788840 to [CRTC:21]
>[   61.194499] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788840
>[   61.194501] [drm:drm_atomic_check_only] checking ffff88021fd2ea00
>[   61.194514] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   61.194516] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   61.194522] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788780 state to ffff88021fd2ea00
>[   61.194525] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b94c7e40 state to ffff88021fd2ea00
>[   61.194533] [drm:drm_atomic_commit] commiting ffff88021fd2ea00
>[   61.194571] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2ea00
>[   61.194575] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2ea00
>[   61.204316] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c86000
>[   61.204320] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021fbd5e40 state to ffff8800b9c86000
>[   61.204322] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1913400 state to ffff8800b9c86000
>[   61.204323] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021fbd5e40 to [CRTC:21]
>[   61.204324] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff88021fbd5e40
>[   61.204325] [drm:drm_atomic_check_only] checking ffff8800b9c86000
>[   61.204328] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   61.204329] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   61.204331] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021fbd5540 state to ffff8800b9c86000
>[   61.204333] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b8381900 state to ffff8800b9c86000
>[   61.204335] [drm:drm_atomic_commit] commiting ffff8800b9c86000
>[   61.204349] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c86000
>[   61.204350] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c86000
>[   61.214441] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c84000
>[   61.214446] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800347fb240 state to ffff8800b9c84000
>[   61.214449] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1912800 state to ffff8800b9c84000
>[   61.214450] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800347fb240 to [CRTC:21]
>[   61.214451] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8800347fb240
>[   61.214452] [drm:drm_atomic_check_only] checking ffff8800b9c84000
>[   61.214455] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   61.214456] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   61.214458] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800347fbd80 state to ffff8800b9c84000
>[   61.214460] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800347fbe40 state to ffff8800b9c84000
>[   61.214463] [drm:drm_atomic_commit] commiting ffff8800b9c84000
>[   61.214478] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c84000
>[   61.214480] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c84000
>[   61.223401] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c84000
>[   61.223410] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800347fb9c0 state to ffff8800b9c84000
>[   61.223415] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1913400 state to ffff8800b9c84000
>[   61.223416] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800347fb9c0 to [CRTC:21]
>[   61.223418] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8800347fb9c0
>[   61.223419] [drm:drm_atomic_check_only] checking ffff8800b9c84000
>[   61.223432] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   61.223433] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   61.223436] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800347fb480 state to ffff8800b9c84000
>[   61.223438] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800347fbb40 state to ffff8800b9c84000
>[   61.223444] [drm:drm_atomic_commit] commiting ffff8800b9c84000
>[   61.224950] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c84000
>[   61.224953] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c84000
>[   61.233248] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2fe00
>[   61.233253] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b94c7300 state to ffff88021fd2fe00
>[   61.233256] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3ae800 state to ffff88021fd2fe00
>[   61.233258] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b94c7300 to [CRTC:21]
>[   61.233259] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8800b94c7300
>[   61.233261] [drm:drm_atomic_check_only] checking ffff88021fd2fe00
>[   61.233265] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   61.233267] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   61.233270] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b94c7a80 state to ffff88021fd2fe00
>[   61.233272] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b94c7f00 state to ffff88021fd2fe00
>[   61.233275] [drm:drm_atomic_commit] commiting ffff88021fd2fe00
>[   61.233290] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2fe00
>[   61.233293] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2fe00
>[   61.243357] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2d000
>[   61.243369] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b94c7840 state to ffff88021fd2d000
>[   61.243373] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3a8c00 state to ffff88021fd2d000
>[   61.243375] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b94c7840 to [CRTC:21]
>[   61.243377] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8800b94c7840
>[   61.243379] [drm:drm_atomic_check_only] checking ffff88021fd2d000
>[   61.243390] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   61.243391] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   61.243396] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b94c7e40 state to ffff88021fd2d000
>[   61.243399] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223788d80 state to ffff88021fd2d000
>[   61.243409] [drm:drm_atomic_commit] commiting ffff88021fd2d000
>[   61.243448] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2d000
>[   61.243454] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2d000
>[   61.252177] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2d400
>[   61.252181] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788240 state to ffff88021fd2d400
>[   61.252184] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3ae800 state to ffff88021fd2d400
>[   61.252185] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788240 to [CRTC:21]
>[   61.252187] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788240
>[   61.252188] [drm:drm_atomic_check_only] checking ffff88021fd2d400
>[   61.252193] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   61.252195] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   61.252199] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788a80 state to ffff88021fd2d400
>[   61.252201] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8802237883c0 state to ffff88021fd2d400
>[   61.252204] [drm:drm_atomic_commit] commiting ffff88021fd2d400
>[   61.252218] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2d400
>[   61.252220] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2d400
>[   61.262314] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2c200
>[   61.262323] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788480 state to ffff88021fd2c200
>[   61.262329] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3a8c00 state to ffff88021fd2c200
>[   61.262331] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788480 to [CRTC:21]
>[   61.262333] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788480
>[   61.262335] [drm:drm_atomic_check_only] checking ffff88021fd2c200
>[   61.262345] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   61.262346] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   61.262351] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788000 state to ffff88021fd2c200
>[   61.262355] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223788cc0 state to ffff88021fd2c200
>[   61.262364] [drm:drm_atomic_commit] commiting ffff88021fd2c200
>[   61.262402] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2c200
>[   61.262406] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2c200
>[   61.272271] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2c200
>[   61.272283] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788240 state to ffff88021fd2c200
>[   61.272288] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3ae800 state to ffff88021fd2c200
>[   61.272289] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788240 to [CRTC:21]
>[   61.272291] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788240
>[   61.272293] [drm:drm_atomic_check_only] checking ffff88021fd2c200
>[   61.272309] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   61.272310] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   61.272314] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788a80 state to ffff88021fd2c200
>[   61.272317] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223788c00 state to ffff88021fd2c200
>[   61.272326] [drm:drm_atomic_commit] commiting ffff88021fd2c200
>[   61.274915] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2c200
>[   61.274919] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2c200
>[   61.291242] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2d000
>[   61.291254] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788480 state to ffff88021fd2d000
>[   61.291260] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3a8c00 state to ffff88021fd2d000
>[   61.291262] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788480 to [CRTC:21]
>[   61.291264] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788480
>[   61.291266] [drm:drm_atomic_check_only] checking ffff88021fd2d000
>[   61.291280] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   61.291281] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   61.291287] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788000 state to ffff88021fd2d000
>[   61.291290] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223788b40 state to ffff88021fd2d000
>[   61.291301] [drm:drm_atomic_commit] commiting ffff88021fd2d000
>[   61.291611] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2d000
>[   61.291614] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2d000
>[   61.301083] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2d400
>[   61.301087] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788c00 state to ffff88021fd2d400
>[   61.301090] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3ae800 state to ffff88021fd2d400
>[   61.301092] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788c00 to [CRTC:21]
>[   61.301093] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788c00
>[   61.301095] [drm:drm_atomic_check_only] checking ffff88021fd2d400
>[   61.301099] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   61.301101] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   61.301104] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788240 state to ffff88021fd2d400
>[   61.301106] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223788a80 state to ffff88021fd2d400
>[   61.301109] [drm:drm_atomic_commit] commiting ffff88021fd2d400
>[   61.301123] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2d400
>[   61.301125] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2d400
>[   61.311187] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2c200
>[   61.311197] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788480 state to ffff88021fd2c200
>[   61.311202] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3a8c00 state to ffff88021fd2c200
>[   61.311203] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788480 to [CRTC:21]
>[   61.311206] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788480
>[   61.311207] [drm:drm_atomic_check_only] checking ffff88021fd2c200
>[   61.311220] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   61.311222] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   61.311227] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788000 state to ffff88021fd2c200
>[   61.311229] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8802237880c0 state to ffff88021fd2c200
>[   61.311237] [drm:drm_atomic_commit] commiting ffff88021fd2c200
>[   61.311280] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2c200
>[   61.311284] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2c200
>[   61.320026] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2fc00
>[   61.320030] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788a80 state to ffff88021fd2fc00
>[   61.320033] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3ae800 state to ffff88021fd2fc00
>[   61.320035] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788a80 to [CRTC:21]
>[   61.320036] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788a80
>[   61.320038] [drm:drm_atomic_check_only] checking ffff88021fd2fc00
>[   61.320042] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   61.320044] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   61.320046] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788c00 state to ffff88021fd2fc00
>[   61.320048] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223788240 state to ffff88021fd2fc00
>[   61.320052] [drm:drm_atomic_commit] commiting ffff88021fd2fc00
>[   61.320065] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2fc00
>[   61.320067] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2fc00
>[   61.330132] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2c400
>[   61.330141] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788480 state to ffff88021fd2c400
>[   61.330146] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3a8c00 state to ffff88021fd2c400
>[   61.330147] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788480 to [CRTC:21]
>[   61.330149] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788480
>[   61.330152] [drm:drm_atomic_check_only] checking ffff88021fd2c400
>[   61.330166] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   61.330167] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   61.330172] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788180 state to ffff88021fd2c400
>[   61.330175] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223788540 state to ffff88021fd2c400
>[   61.330183] [drm:drm_atomic_commit] commiting ffff88021fd2c400
>[   61.330223] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2c400
>[   61.330227] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2c400
>[   61.340157] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2fe00
>[   61.340168] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788a80 state to ffff88021fd2fe00
>[   61.340173] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3ae800 state to ffff88021fd2fe00
>[   61.340175] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788a80 to [CRTC:21]
>[   61.340177] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788a80
>[   61.340179] [drm:drm_atomic_check_only] checking ffff88021fd2fe00
>[   61.340190] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   61.340191] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   61.340196] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788c00 state to ffff88021fd2fe00
>[   61.340200] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8802237886c0 state to ffff88021fd2fe00
>[   61.340208] [drm:drm_atomic_commit] commiting ffff88021fd2fe00
>[   61.341653] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2fe00
>[   61.341657] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2fe00
>[   61.349038] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2d400
>[   61.349042] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788540 state to ffff88021fd2d400
>[   61.349045] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3a8c00 state to ffff88021fd2d400
>[   61.349047] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788540 to [CRTC:21]
>[   61.349048] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788540
>[   61.349050] [drm:drm_atomic_check_only] checking ffff88021fd2d400
>[   61.349055] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   61.349057] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   61.349059] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788480 state to ffff88021fd2d400
>[   61.349061] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223788180 state to ffff88021fd2d400
>[   61.349065] [drm:drm_atomic_commit] commiting ffff88021fd2d400
>[   61.349077] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2d400
>[   61.349079] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2d400
>[   61.359355] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2ec00
>[   61.359366] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788a80 state to ffff88021fd2ec00
>[   61.359372] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3ae800 state to ffff88021fd2ec00
>[   61.359375] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788a80 to [CRTC:21]
>[   61.359376] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788a80
>[   61.359380] [drm:drm_atomic_check_only] checking ffff88021fd2ec00
>[   61.359396] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   61.359397] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   61.359403] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788c00 state to ffff88021fd2ec00
>[   61.359405] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8802237889c0 state to ffff88021fd2ec00
>[   61.359415] [drm:drm_atomic_commit] commiting ffff88021fd2ec00
>[   61.359462] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2ec00
>[   61.359466] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2ec00
>[   61.369225] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2d400
>[   61.369229] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788180 state to ffff88021fd2d400
>[   61.369232] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3a8c00 state to ffff88021fd2d400
>[   61.369233] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788180 to [CRTC:21]
>[   61.369235] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788180
>[   61.369237] [drm:drm_atomic_check_only] checking ffff88021fd2d400
>[   61.369241] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   61.369243] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   61.369245] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788540 state to ffff88021fd2d400
>[   61.369247] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223788480 state to ffff88021fd2d400
>[   61.369251] [drm:drm_atomic_commit] commiting ffff88021fd2d400
>[   61.369264] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2d400
>[   61.369266] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2d400
>[   61.378497] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2c200
>[   61.378507] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880223788a80 state to ffff88021fd2c200
>[   61.378512] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021e3ae800 state to ffff88021fd2c200
>[   61.378513] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880223788a80 to [CRTC:21]
>[   61.378516] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880223788a80
>[   61.378517] [drm:drm_atomic_check_only] checking ffff88021fd2c200
>[   61.378531] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   61.378532] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   61.378538] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880223788c00 state to ffff88021fd2c200
>[   61.378540] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880223788f00 state to ffff88021fd2c200
>[   61.378547] [drm:drm_atomic_commit] commiting ffff88021fd2c200
>[   61.378585] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2c200
>[   61.378588] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2c200
>[   61.970116] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9c84000
>[   61.970121] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021fbd5c00 state to ffff8800b9c84000
>[   61.970124] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1913800 state to ffff8800b9c84000
>[   61.970125] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021fbd5c00 to [NOCRTC]
>[   61.970127] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88021fbd5c00
>[   61.970128] [drm:drm_atomic_check_only] checking ffff8800b9c84000
>[   61.970133] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb -1
>[   61.970134] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 0, off 1, on 0, ms 0
>[   61.970136] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021fbd5180 state to ffff8800b9c84000
>[   61.970138] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021fbd5900 state to ffff8800b9c84000
>[   61.970142] [drm:drm_atomic_commit] commiting ffff8800b9c84000
>[   61.970177] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9c84000
>[   61.970180] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9c84000
>[   62.546524] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[   62.546535] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[   63.086607] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   63.086610] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   63.086633] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   63.086811] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   63.087154] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   63.087169] [drm:intel_dp_check_mst_status] got esi 01 20 00
>[   63.087536] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   63.087807] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   63.088031] [drm:drm_dp_mst_handle_up_req] Got RSN: pn: 2 avail_pbn 0
>[   63.088225] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   63.088394] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   63.088731] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   63.088741] [drm:intel_dp_check_mst_status] got esi2 01 20 00
>[   63.088743] [drm:intel_dp_check_mst_status] got esi 01 20 00
>[   63.089107] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   63.089371] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   63.089373] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   63.089389] [drm:drm_dp_mst_handle_up_req] Got RSN: pn: 2 avail_pbn 0
>[   63.089741] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   63.090062] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   63.090063] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   63.090065] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   63.090067] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   63.090550] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   64.052391] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ecbe00
>[   64.052396] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b7927c00 state to ffff880222ecbe00
>[   64.052399] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880223c4dc00 state to ffff880222ecbe00
>[   64.052400] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b7927c00 to [CRTC:21]
>[   64.052402] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8800b7927c00
>[   64.052404] [drm:drm_atomic_check_only] checking ffff880222ecbe00
>[   64.052408] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   64.052410] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[   64.052413] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b7927900 state to ffff880222ecbe00
>[   64.052415] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b7927300 state to ffff880222ecbe00
>[   64.052445] [drm:drm_atomic_commit] commiting ffff880222ecbe00
>[   64.052470] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ecbe00
>[   64.052473] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ecbe00
>[   64.058075] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2ea00
>[   64.058080] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880200e2f9c0 state to ffff88021fd2ea00
>[   64.058083] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1917c00 state to ffff88021fd2ea00
>[   64.058085] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200e2f9c0 to [NOCRTC]
>[   64.058086] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880200e2f9c0
>[   64.058088] [drm:drm_atomic_check_only] checking ffff88021fd2ea00
>[   64.058092] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb -1
>[   64.058094] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 0, off 1, on 0, ms 0
>[   64.058099] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880200e2f000 state to ffff88021fd2ea00
>[   64.058109] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880200e2f300 state to ffff88021fd2ea00
>[   64.058113] [drm:drm_atomic_commit] commiting ffff88021fd2ea00
>[   64.058136] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2ea00
>[   64.058138] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2ea00
>[   64.061830] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2e600
>[   64.061834] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880200e2f0c0 state to ffff88021fd2e600
>[   64.061836] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1911c00 state to ffff88021fd2e600
>[   64.061837] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200e2f0c0 to [CRTC:21]
>[   64.061838] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880200e2f0c0
>[   64.061839] [drm:drm_atomic_check_only] checking ffff88021fd2e600
>[   64.061843] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   64.061844] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[   64.061846] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880200e2f900 state to ffff88021fd2e600
>[   64.061848] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880200e2f180 state to ffff88021fd2e600
>[   64.061850] [drm:drm_atomic_commit] commiting ffff88021fd2e600
>[   64.061870] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2e600
>[   64.061872] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2e600
>[   64.070639] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2fe00
>[   64.070644] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880200e2f300 state to ffff88021fd2fe00
>[   64.070646] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1917c00 state to ffff88021fd2fe00
>[   64.070647] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200e2f300 to [CRTC:21]
>[   64.070649] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff880200e2f300
>[   64.070650] [drm:drm_atomic_check_only] checking ffff88021fd2fe00
>[   64.070654] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   64.070655] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   64.070657] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880200e2f9c0 state to ffff88021fd2fe00
>[   64.070659] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880200e2f000 state to ffff88021fd2fe00
>[   64.070662] [drm:drm_atomic_commit] commiting ffff88021fd2fe00
>[   64.070678] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2fe00
>[   64.070680] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2fe00
>[   64.080616] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ec8a00
>[   64.080622] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b7927540 state to ffff880222ec8a00
>[   64.080625] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880223c4f400 state to ffff880222ec8a00
>[   64.080627] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b7927540 to [CRTC:21]
>[   64.080628] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8800b7927540
>[   64.080630] [drm:drm_atomic_check_only] checking ffff880222ec8a00
>[   64.080634] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   64.080636] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   64.080639] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b7927480 state to ffff880222ec8a00
>[   64.080641] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b79273c0 state to ffff880222ec8a00
>[   64.080645] [drm:drm_atomic_commit] commiting ffff880222ec8a00
>[   64.080664] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ec8a00
>[   64.080667] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ec8a00
>[   64.090580] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ec8200
>[   64.090585] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b7927180 state to ffff880222ec8200
>[   64.090588] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880223c4e400 state to ffff880222ec8200
>[   64.090589] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b7927180 to [CRTC:21]
>[   64.090591] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8800b7927180
>[   64.090592] [drm:drm_atomic_check_only] checking ffff880222ec8200
>[   64.090597] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   64.090599] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   64.090601] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b7927300 state to ffff880222ec8200
>[   64.090603] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b7927c00 state to ffff880222ec8200
>[   64.090607] [drm:drm_atomic_commit] commiting ffff880222ec8200
>[   64.090623] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ec8200
>[   64.090625] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ec8200
>[   64.109729] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ec9a00
>[   64.109734] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b7927480 state to ffff880222ec9a00
>[   64.109737] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880223c4f400 state to ffff880222ec9a00
>[   64.109738] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b7927480 to [CRTC:21]
>[   64.109740] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff8800b7927480
>[   64.109742] [drm:drm_atomic_check_only] checking ffff880222ec9a00
>[   64.109746] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 59
>[   64.109748] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   64.109751] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b7927900 state to ffff880222ec9a00
>[   64.109753] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b970f780 state to ffff880222ec9a00
>[   64.109757] [drm:drm_atomic_commit] commiting ffff880222ec9a00
>[   64.109774] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ec9a00
>[   64.109777] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ec9a00
>[   64.160422] [drm:drm_atomic_state_init] Allocated atomic state ffff88021fd2c200
>[   64.160427] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880200e2f180 state to ffff88021fd2c200
>[   64.160430] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8801e1911c00 state to ffff88021fd2c200
>[   64.160431] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200e2f180 to [NOCRTC]
>[   64.160433] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880200e2f180
>[   64.160434] [drm:drm_atomic_check_only] checking ffff88021fd2c200
>[   64.160439] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb -1
>[   64.160440] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 0, off 1, on 0, ms 0
>[   64.160443] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880200e2f0c0 state to ffff88021fd2c200
>[   64.160445] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880200e2f900 state to ffff88021fd2c200
>[   64.160449] [drm:drm_atomic_commit] commiting ffff88021fd2c200
>[   64.160472] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88021fd2c200
>[   64.160473] [drm:drm_atomic_state_free] Freeing atomic state ffff88021fd2c200
>[   65.057696] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101210, pins 0x00000040
>[   65.057699] [drm:intel_hpd_irq_handler] digital hpd port C - long
>[   65.057701] [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 6 - cnt: 0
>[   65.057731] [drm:intel_dp_hpd_pulse] got hpd irq on port C - long
>[   65.057738] [drm:intel_dp_hpd_pulse] MST device may have disappeared 1 vs 1
>[   65.057980] [drm:intel_dp_destroy_mst_connector] 
>[   65.057985] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ecaa00
>[   65.057989] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff880223c4e400 state to ffff880222ecaa00
>[   65.057992] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800b970f0c0 state to ffff880222ecaa00
>[   65.057994] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff880223c4e400
>[   65.057995] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b970f0c0 to [NOCRTC]
>[   65.057997] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800b970f0c0
>[   65.057999] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff880222ecaa00
>[   65.058001] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:61] ffff8800346d61c0 state to ffff880222ecaa00
>[   65.058003] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8800346d61c0 to [NOCRTC]
>[   65.058004] [drm:drm_atomic_check_only] checking ffff880222ecaa00
>[   65.058006] [drm:drm_atomic_helper_check_modeset] [CRTC:25] mode changed
>[   65.058008] [drm:drm_atomic_helper_check_modeset] [CRTC:25] enable changed
>[   65.058010] [drm:update_connector_routing] Updating routing for [CONNECTOR:61:DP-4]
>[   65.058011] [drm:update_connector_routing] Disabling [CONNECTOR:61:DP-4]
>[   65.058013] [drm:drm_atomic_helper_check_modeset] [CRTC:25] active changed
>[   65.058014] [drm:drm_atomic_helper_check_modeset] [CRTC:25] needs all connectors, enable: n, active: n
>[   65.058016] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff880222ecaa00
>[   65.058018] [drm:drm_atomic_connectors_for_crtc] State ffff880222ecaa00 has 0 connectors for [CRTC:25]
>[   65.058022] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880223c4f400 state to ffff880222ecaa00
>[   65.058024] [drm:drm_atomic_get_crtc_state] Added [CRTC:29] ffff880223c4dc00 state to ffff880222ecaa00
>[   65.058026] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff880222ecaa00
>[   65.058028] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:32] ffff8800346d61e0 state to ffff880222ecaa00
>[   65.058043] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b970f000 state to ffff880222ecaa00
>[   65.058047] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 55
>[   65.058049] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 1, on 1, ms 1
>[   65.058050] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:23] with fb -1
>[   65.058052] [drm:intel_plane_atomic_calc_changes] [PLANE:23] visible 1 -> 0, off 1, on 0, ms 1
>[   65.058055] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b970fd80 state to ffff880222ecaa00
>[   65.058057] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b970fe40 state to ffff880222ecaa00
>[   65.058061] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff8800b970f180 state to ffff880222ecaa00
>[   65.058063] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800b970f240 state to ffff880222ecaa00
>[   65.058066] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff8800b970f3c0 state to ffff880222ecaa00
>[   65.058068] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff8800b970f480 state to ffff880222ecaa00
>[   65.058070] [drm:drm_atomic_get_plane_state] Added [PLANE:30] ffff8800b970f840 state to ffff880222ecaa00
>[   65.058072] [drm:drm_atomic_commit] commiting ffff880222ecaa00
>[   65.091693] [drm:intel_edp_backlight_off] 
>[   65.292194] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[   65.292207] [drm:intel_disable_pipe] disabling pipe A
>[   65.308269] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   65.308279] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[   65.308430] [drm:edp_panel_off] Turn eDP port A panel power off
>[   65.308434] [drm:wait_panel_off] Wait for panel power off time
>[   65.308437] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[   65.360709] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000008, dig 0x00000012, pins 0x00000010
>[   65.360713] [drm:intel_hpd_irq_handler] digital hpd port A - long
>[   65.360715] [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 4 - cnt: 0
>[   65.360739] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port A
>[   65.368522] [drm:wait_panel_status] Wait complete
>[   65.370544] [drm:intel_mst_disable_dp] 1
>[   65.370550] [drm:intel_disable_pipe] disabling pipe B
>[   65.374577] [drm:intel_mst_post_disable_dp] 1
>[   65.374751] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   65.374762] [drm:drm_dp_update_payload_part2] payload 0 0
>[   65.374932] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   65.375105] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   65.379135] [drm:intel_update_cdclk] Current CD clock rate: 337500 kHz
>[   65.379151] [drm:edp_panel_on] Turn eDP port A panel power on
>[   65.379154] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   65.586403] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101210, pins 0x00000040
>[   65.586407] [drm:intel_hpd_irq_handler] digital hpd port C - long
>[   65.586409] [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 6 - cnt: 1
>[   65.586433] [drm:intel_dp_hpd_pulse] got hpd irq on port C - long
>[   65.909572] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control abcd0000
>[   65.949623] [drm:wait_panel_status] Wait complete
>[   65.949628] [drm:wait_panel_on] Wait for panel power on
>[   65.949632] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[   66.053750] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000008, dig 0x00000012, pins 0x00000010
>[   66.053754] [drm:intel_hpd_irq_handler] digital hpd port A - long
>[   66.053755] [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 4 - cnt: 1
>[   66.102036] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000008, dig 0x00000011, pins 0x00000010
>[   66.102040] [drm:intel_hpd_irq_handler] digital hpd port A - short
>[   66.169885] [drm:wait_panel_status] Wait complete
>[   66.169907] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   66.169915] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[   66.170235] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.170515] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.170517] [drm:intel_dp_get_dpcd] DPCD: 12 14 c2 01 00 15 01 83 02 00 00 00 00 00 04
>[   66.170518] [drm:intel_dp_get_dpcd] Display Port TPS3 support: source yes, sink yes
>[   66.170520] [drm:intel_dp_print_rates] source rates: 162000, 270000, 540000
>[   66.170521] [drm:intel_dp_print_rates] sink rates: 162000, 270000, 540000
>[   66.170522] [drm:intel_dp_print_rates] common rates: 162000, 270000, 540000
>[   66.170685] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.171016] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.171181] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.171379] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.171388] [drm:intel_dp_probe_oui] Sink OUI: 000000
>[   66.171551] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.171746] [drm:intel_dp_probe_oui] Branch OUI: 90cc24
>[   66.171911] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.172081] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.172089] [drm:intel_dp_probe_mst] Sink is MST capable
>[   66.172380] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.172555] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.172748] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.172920] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.173379] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.173689] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.173705] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port A
>[   66.174025] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[   66.174027] [drm:intel_dp_set_signal_levels] Using vswing level 0
>[   66.174028] [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0
>[   66.174645] [drm:intel_dp_start_link_train] clock recovery OK
>[   66.175567] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[   66.175665] [drm:intel_enable_pipe] enabling pipe A
>[   66.175819] [drm:intel_edp_backlight_on] 
>[   66.175821] [drm:intel_panel_enable_backlight] pipe A
>[   66.175828] [drm:intel_panel_actually_set_backlight] set backlight PWM = 852
>[   66.175834] [drm:intel_psr_match_conditions] PSR disable by flag
>[   66.175836] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[   66.176053] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.177756] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   66.177758] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   66.177765] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   66.177939] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.178269] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.178280] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   66.178640] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.179009] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.179381] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.179583] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.179753] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.180085] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.180098] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   66.180100] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   66.180968] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   66.180970] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   66.180976] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   66.181150] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.181481] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.181491] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   66.181850] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.182221] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.182489] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.182510] [drm:drm_dp_send_link_address] link address reply: 4
>[   66.182512] [drm:drm_dp_send_link_address] port 0: input 1, pdt: 1, pn: 0, dpcd_rev: 00, mcs: 1, ddps: 1, ldps 0, sdp 0/0
>[   66.182514] [drm:drm_dp_send_link_address] port 1: input 0, pdt: 0, pn: 1, dpcd_rev: 00, mcs: 0, ddps: 0, ldps 0, sdp 0/0
>[   66.182516] [drm:drm_dp_send_link_address] port 2: input 0, pdt: 3, pn: 2, dpcd_rev: 12, mcs: 0, ddps: 1, ldps 0, sdp 1/1
>[   66.182518] [drm:drm_dp_send_link_address] port 3: input 0, pdt: 0, pn: 3, dpcd_rev: 00, mcs: 0, ddps: 0, ldps 0, sdp 0/0
>[   66.182691] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.182859] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.183191] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.183204] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   66.183206] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   66.225805] [drm:intel_connector_check_state] [CONNECTOR:32:eDP-1]
>[   66.225810] [drm:intel_connector_check_state] [CONNECTOR:61:DP-4]
>[   66.225812] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[   66.225814] [drm:check_encoder_state] [ENCODER:39:TMDS-39]
>[   66.225816] [drm:check_encoder_state] [ENCODER:41:DP MST-41]
>[   66.225818] [drm:check_encoder_state] [ENCODER:42:DP MST-42]
>[   66.225819] [drm:check_encoder_state] [ENCODER:43:DP MST-43]
>[   66.225820] [drm:check_encoder_state] [ENCODER:46:TMDS-46]
>[   66.225822] [drm:check_encoder_state] [ENCODER:48:DP MST-48]
>[   66.225823] [drm:check_encoder_state] [ENCODER:49:DP MST-49]
>[   66.225825] [drm:check_encoder_state] [ENCODER:50:DP MST-50]
>[   66.225827] [drm:check_crtc_state] [CRTC:21]
>[   66.225837] [drm:check_crtc_state] [CRTC:25]
>[   66.225839] [drm:check_shared_dpll_state] WRPLL 1
>[   66.225841] [drm:check_shared_dpll_state] WRPLL 2
>[   66.225843] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ecaa00
>[   66.225847] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ecaa00
>[   66.225924] [drm:intel_dp_destroy_mst_connector] 
>[   66.225956] [drm:drm_dp_mst_put_payload_id] putting payload 1
>[   66.225987] [drm:intel_dp_destroy_mst_connector] 
>[   66.226000] [drm:i915_hotplug_work_func] running encoder hotplug functions
>[   66.226003] [drm:i915_hotplug_work_func] Connector DP-2 (pin 6) received hotplug event.
>[   66.226005] [drm:intel_dp_detect] [CONNECTOR:47:DP-2]
>[   66.226006] [drm:i915_hotplug_work_func] Connector HDMI-A-2 (pin 6) received hotplug event.
>[   66.226008] [drm:intel_hdmi_detect] [CONNECTOR:51:HDMI-A-2]
>[   66.236186] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.236199] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   66.236200] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   66.236358] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.236369] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   66.236371] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   66.236407] [drm:drm_mode_getresources] [CONNECTOR:32:eDP-1]
>[   66.236410] [drm:drm_mode_getresources] [CONNECTOR:40:DP-1]
>[   66.236410] [drm:drm_mode_getresources] [CONNECTOR:44:HDMI-A-1]
>[   66.236411] [drm:drm_mode_getresources] [CONNECTOR:47:DP-2]
>[   66.236412] [drm:drm_mode_getresources] [CONNECTOR:51:HDMI-A-2]
>[   66.236413] [drm:drm_mode_getresources] [CONNECTOR:56:DP-3]
>[   66.236414] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[6] ENCODERS[9]
>[   66.236423] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   66.236425] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1]
>[   66.236426] [drm:intel_dp_detect] [CONNECTOR:32:eDP-1]
>[   66.236745] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   66.237066] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   66.237516] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   66.237520] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1] probed modes :
>[   66.237523] [drm:drm_mode_debug_printmodeline] Modeline 33:"2560x1440" 60 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x48 0x9
>[   66.237529] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   66.237532] [drm:drm_mode_getconnector] [CONNECTOR:40:?]
>[   66.237534] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1]
>[   66.237535] [drm:intel_dp_detect] [CONNECTOR:40:DP-1]
>[   66.237540] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1] disconnected
>[   66.237542] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   66.237543] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2]
>[   66.237544] [drm:intel_dp_detect] [CONNECTOR:47:DP-2]
>[   66.237545] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2] disconnected
>[   66.237547] [drm:drm_mode_getconnector] [CONNECTOR:56:?]
>[   66.237549] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3]
>[   66.237551] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3] status updated from 3 to 2
>[   66.237553] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3] disconnected
>[   66.237592] [drm:drm_mode_getconnector] [CONNECTOR:44:?]
>[   66.237594] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1]
>[   66.237596] [drm:intel_hdmi_detect] [CONNECTOR:44:HDMI-A-1]
>[   66.237852] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.238121] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.239614] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   66.239616] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   66.239624] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   66.239791] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.240109] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.240110] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   66.240468] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.240660] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.240815] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.241134] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.241135] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   66.241137] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   66.241368] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.242384] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   66.242386] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   66.242391] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   66.242874] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.242875] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   66.243235] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.243243] [drm:drm_dp_send_enum_path_resources] enum path resources 2: 2560 2560
>[   66.243423] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.243578] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.243894] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.243895] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   66.243896] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   66.257616] [drm:intel_hdmi_detect] Live status not up!
>[   66.257624] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1] disconnected
>[   66.257634] [drm:drm_mode_getconnector] [CONNECTOR:51:?]
>[   66.257642] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2]
>[   66.257642] [drm:intel_hdmi_detect] [CONNECTOR:51:HDMI-A-2]
>[   66.267823] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   66.267825] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   66.267984] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.267995] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   66.267997] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   66.268000] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2] disconnected
>[   66.268028] [drm:drm_mode_setcrtc] [CRTC:25]
>[   66.268032] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ec9a00
>[   66.268035] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88021e5bf800 state to ffff880222ec9a00
>[   66.268038] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800b970ff00 state to ffff880222ec9a00
>[   66.268040] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88021e5bf800
>[   66.268041] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b970ff00 to [NOCRTC]
>[   66.268043] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800b970ff00
>[   66.268044] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff880222ec9a00
>[   66.268046] [drm:drm_atomic_check_only] checking ffff880222ec9a00
>[   66.268051] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff8800b970f900 state to ffff880222ec9a00
>[   66.268053] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800b970f300 state to ffff880222ec9a00
>[   66.268057] [drm:drm_atomic_commit] commiting ffff880222ec9a00
>[   66.268061] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ec9a00
>[   66.268063] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ec9a00
>[   66.268553] [drm:drm_mode_getresources] [CONNECTOR:32:eDP-1]
>[   66.268555] [drm:drm_mode_getresources] [CONNECTOR:40:DP-1]
>[   66.268557] [drm:drm_mode_getresources] [CONNECTOR:44:HDMI-A-1]
>[   66.268558] [drm:drm_mode_getresources] [CONNECTOR:47:DP-2]
>[   66.268559] [drm:drm_mode_getresources] [CONNECTOR:51:HDMI-A-2]
>[   66.268560] [drm:drm_mode_getresources] [CONNECTOR:56:DP-3]
>[   66.268562] [drm:drm_mode_getresources] [CONNECTOR:66:DP-4]
>[   66.268563] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[7] ENCODERS[9]
>[   66.268565] [drm:drm_mode_getconnector] [CONNECTOR:66:?]
>[   66.268567] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   66.268569] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1]
>[   66.268571] [drm:intel_dp_detect] [CONNECTOR:32:eDP-1]
>[   66.268888] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   66.269197] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   66.269639] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   66.269643] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1] probed modes :
>[   66.269646] [drm:drm_mode_debug_printmodeline] Modeline 33:"2560x1440" 60 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x48 0x9
>[   66.269652] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   66.269654] [drm:drm_mode_getconnector] [CONNECTOR:40:?]
>[   66.269656] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1]
>[   66.269657] [drm:intel_dp_detect] [CONNECTOR:40:DP-1]
>[   66.269662] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1] disconnected
>[   66.269664] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   66.269666] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2]
>[   66.269667] [drm:intel_dp_detect] [CONNECTOR:47:DP-2]
>[   66.269669] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2] disconnected
>[   66.269671] [drm:drm_mode_getconnector] [CONNECTOR:56:?]
>[   66.269672] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3]
>[   66.269674] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3] disconnected
>[   66.269677] [drm:drm_mode_getconnector] [CONNECTOR:44:?]
>[   66.269678] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1]
>[   66.269680] [drm:intel_hdmi_detect] [CONNECTOR:44:HDMI-A-1]
>[   66.289702] [drm:intel_hdmi_detect] Live status not up!
>[   66.289710] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1] disconnected
>[   66.289853] [drm:drm_mode_getconnector] [CONNECTOR:51:?]
>[   66.289856] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2]
>[   66.289857] [drm:intel_hdmi_detect] [CONNECTOR:51:HDMI-A-2]
>[   66.300028] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   66.300030] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   66.300188] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.300199] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   66.300201] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   66.300203] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2] disconnected
>[   66.300363] [drm:drm_mode_getresources] [CONNECTOR:32:eDP-1]
>[   66.300365] [drm:drm_mode_getresources] [CONNECTOR:40:DP-1]
>[   66.300366] [drm:drm_mode_getresources] [CONNECTOR:44:HDMI-A-1]
>[   66.300367] [drm:drm_mode_getresources] [CONNECTOR:47:DP-2]
>[   66.300369] [drm:drm_mode_getresources] [CONNECTOR:51:HDMI-A-2]
>[   66.300370] [drm:drm_mode_getresources] [CONNECTOR:56:DP-3]
>[   66.300371] [drm:drm_mode_getresources] [CONNECTOR:66:DP-4]
>[   66.300373] [drm:drm_mode_getresources] [CONNECTOR:61:DP-5]
>[   66.300374] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[8] ENCODERS[9]
>[   66.300376] [drm:drm_mode_getconnector] [CONNECTOR:66:?]
>[   66.300380] [drm:drm_mode_getconnector] [CONNECTOR:66:?]
>[   66.300385] [drm:drm_mode_getconnector] [CONNECTOR:66:?]
>[   66.300613] [drm:drm_mode_getconnector] [CONNECTOR:61:?]
>[   66.300616] [drm:drm_mode_getconnector] [CONNECTOR:61:?]
>[   66.300620] [drm:drm_mode_getconnector] [CONNECTOR:61:?]
>[   66.300752] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   66.300754] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1]
>[   66.300756] [drm:intel_dp_detect] [CONNECTOR:32:eDP-1]
>[   66.301073] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   66.301380] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   66.301822] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   66.301827] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1] probed modes :
>[   66.301830] [drm:drm_mode_debug_printmodeline] Modeline 33:"2560x1440" 60 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x48 0x9
>[   66.301834] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   66.301837] [drm:drm_mode_getconnector] [CONNECTOR:40:?]
>[   66.301839] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1]
>[   66.301840] [drm:intel_dp_detect] [CONNECTOR:40:DP-1]
>[   66.301845] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1] disconnected
>[   66.301847] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   66.301848] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2]
>[   66.301850] [drm:intel_dp_detect] [CONNECTOR:47:DP-2]
>[   66.301851] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2] disconnected
>[   66.301853] [drm:drm_mode_getconnector] [CONNECTOR:56:?]
>[   66.301855] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3]
>[   66.301857] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3] disconnected
>[   66.301859] [drm:drm_mode_getconnector] [CONNECTOR:66:?]
>[   66.301861] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:66:DP-4]
>[   66.301863] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:66:DP-4] status updated from 3 to 1
>[   66.302167] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.303230] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   66.303233] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   66.303239] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   66.303718] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   66.304426] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.304738] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   66.304740] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   66.305034] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.306692] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   66.306694] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   66.306699] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   66.307178] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   66.308906] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.308907] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   66.308908] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   66.309931] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   66.309933] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   66.309953] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   66.310431] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   66.311842] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.312154] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   66.312156] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   66.313169] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   66.313171] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   66.313196] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   66.313676] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   66.314039] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.314394] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.314928] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.315101] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.315434] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.315448] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   66.315450] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   66.315747] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.317405] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   66.317408] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   66.317414] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   66.317588] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.317918] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.317931] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   66.318291] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.319021] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.319225] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.319396] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.319728] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.319741] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   66.319743] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   66.320722] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   66.320724] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   66.320730] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   66.320895] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.321228] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.321240] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   66.321601] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.321970] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.322532] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.322703] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.323035] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.323047] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   66.323049] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   66.324015] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   66.324017] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   66.324023] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   66.324196] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.324526] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.324536] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   66.324895] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.325266] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.325624] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.325657] [drm:drm_mode_detailed] composite sync not supported
>[   66.325718] [drm:drm_edid_to_eld] ELD monitor Pro2840m
>[   66.325720] [drm:drm_edid_to_eld] ELD size 32, SAD count 1
>[   66.325751] [drm:drm_mode_debug_printmodeline] Modeline 94:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   66.325752] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
>[   66.325755] [drm:drm_mode_debug_printmodeline] Modeline 98:"720x480i" 0 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[   66.325757] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
>[   66.325759] [drm:drm_mode_debug_printmodeline] Modeline 99:"720x576i" 0 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   66.325760] [drm:drm_mode_prune_invalid] Not using 720x576i mode: NO_INTERLACE
>[   66.325763] [drm:drm_mode_debug_printmodeline] Modeline 104:"1920x1080i" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   66.325765] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
>[   66.325767] [drm:drm_mode_debug_printmodeline] Modeline 114:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   66.325768] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
>[   66.325771] [drm:drm_mode_debug_printmodeline] Modeline 118:"720x480i" 60 13513 720 739 801 858 480 488 494 525 0x40 0x101a
>[   66.325772] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
>[   66.325778] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:66:DP-4] probed modes :
>[   66.325780] [drm:drm_mode_debug_printmodeline] Modeline 73:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x5
>[   66.325783] [drm:drm_mode_debug_printmodeline] Modeline 74:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   66.325785] [drm:drm_mode_debug_printmodeline] Modeline 110:"3840x2160" 30 296704 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   66.325788] [drm:drm_mode_debug_printmodeline] Modeline 78:"1920x2160" 60 297000 1920 2008 2052 2200 2160 2168 2178 2250 0x40 0xa
>[   66.325790] [drm:drm_mode_debug_printmodeline] Modeline 76:"2560x1600" 60 268500 2560 2608 2640 2720 1600 1603 1609 1646 0x40 0x6
>[   66.325793] [drm:drm_mode_debug_printmodeline] Modeline 77:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x6
>[   66.325795] [drm:drm_mode_debug_printmodeline] Modeline 87:"1920x1200" 60 193250 1920 2056 2256 2592 1200 1203 1209 1245 0x40 0x6
>[   66.325797] [drm:drm_mode_debug_printmodeline] Modeline 86:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0xa
>[   66.325800] [drm:drm_mode_debug_printmodeline] Modeline 93:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   66.325807] [drm:drm_mode_debug_printmodeline] Modeline 113:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   66.325810] [drm:drm_mode_debug_printmodeline] Modeline 101:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   66.325812] [drm:drm_mode_debug_printmodeline] Modeline 109:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   66.325815] [drm:drm_mode_debug_printmodeline] Modeline 122:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   66.325831] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.325835] [drm:drm_mode_debug_printmodeline] Modeline 105:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   66.325837] [drm:drm_mode_debug_printmodeline] Modeline 120:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   66.325840] [drm:drm_mode_debug_printmodeline] Modeline 84:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[   66.325842] [drm:drm_mode_debug_printmodeline] Modeline 83:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[   66.325845] [drm:drm_mode_debug_printmodeline] Modeline 81:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   66.325847] [drm:drm_mode_debug_printmodeline] Modeline 82:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[   66.325849] [drm:drm_mode_debug_printmodeline] Modeline 75:"1360x768" 60 85500 1360 1472 1536 1792 768 771 777 795 0x40 0x5
>[   66.325852] [drm:drm_mode_debug_printmodeline] Modeline 79:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6
>[   66.325854] [drm:drm_mode_debug_printmodeline] Modeline 80:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   66.325857] [drm:drm_mode_debug_printmodeline] Modeline 111:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   66.325859] [drm:drm_mode_debug_printmodeline] Modeline 103:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   66.325861] [drm:drm_mode_debug_printmodeline] Modeline 92:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   66.325865] [drm:drm_mode_debug_printmodeline] Modeline 88:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   66.325867] [drm:drm_mode_debug_printmodeline] Modeline 102:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   66.325870] [drm:drm_mode_debug_printmodeline] Modeline 116:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   66.325872] [drm:drm_mode_debug_printmodeline] Modeline 96:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   66.325874] [drm:drm_mode_debug_printmodeline] Modeline 89:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   66.325877] [drm:drm_mode_debug_printmodeline] Modeline 100:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   66.325879] [drm:drm_mode_debug_printmodeline] Modeline 90:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   66.326049] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.326403] [drm:drm_mode_getconnector] [CONNECTOR:66:?]
>[   66.326413] [drm:drm_mode_getconnector] [CONNECTOR:61:?]
>[   66.326416] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:61:DP-5]
>[   66.326418] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:61:DP-5] status updated from 3 to 2
>[   66.326422] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:61:DP-5] disconnected
>[   66.326708] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   66.326711] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   66.326778] [drm:drm_mode_getconnector] [CONNECTOR:44:?]
>[   66.326780] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1]
>[   66.326782] [drm:intel_hdmi_detect] [CONNECTOR:44:HDMI-A-1]
>[   66.346804] [drm:intel_hdmi_detect] Live status not up!
>[   66.346809] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1] disconnected
>[   66.346833] [drm:drm_mode_getconnector] [CONNECTOR:51:?]
>[   66.346835] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2]
>[   66.346837] [drm:intel_hdmi_detect] [CONNECTOR:51:HDMI-A-2]
>[   66.357007] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   66.357009] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   66.357168] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.357179] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   66.357181] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   66.357184] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2] disconnected
>[   66.357463] [drm:drm_mode_getresources] [CONNECTOR:32:eDP-1]
>[   66.357465] [drm:drm_mode_getresources] [CONNECTOR:40:DP-1]
>[   66.357467] [drm:drm_mode_getresources] [CONNECTOR:44:HDMI-A-1]
>[   66.357468] [drm:drm_mode_getresources] [CONNECTOR:47:DP-2]
>[   66.357469] [drm:drm_mode_getresources] [CONNECTOR:51:HDMI-A-2]
>[   66.357471] [drm:drm_mode_getresources] [CONNECTOR:56:DP-3]
>[   66.357472] [drm:drm_mode_getresources] [CONNECTOR:66:DP-4]
>[   66.357473] [drm:drm_mode_getresources] [CONNECTOR:61:DP-5]
>[   66.357475] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[8] ENCODERS[9]
>[   66.357477] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   66.357479] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1]
>[   66.357481] [drm:intel_dp_detect] [CONNECTOR:32:eDP-1]
>[   66.357795] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   66.358106] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   66.358548] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   66.358552] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:eDP-1] probed modes :
>[   66.358555] [drm:drm_mode_debug_printmodeline] Modeline 33:"2560x1440" 60 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x48 0x9
>[   66.358560] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   66.358563] [drm:drm_mode_getconnector] [CONNECTOR:40:?]
>[   66.358565] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1]
>[   66.358566] [drm:intel_dp_detect] [CONNECTOR:40:DP-1]
>[   66.358570] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:DP-1] disconnected
>[   66.358573] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   66.358574] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2]
>[   66.358575] [drm:intel_dp_detect] [CONNECTOR:47:DP-2]
>[   66.358577] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:DP-2] disconnected
>[   66.358579] [drm:drm_mode_getconnector] [CONNECTOR:56:?]
>[   66.358581] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3]
>[   66.358583] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:56:DP-3] disconnected
>[   66.358585] [drm:drm_mode_getconnector] [CONNECTOR:66:?]
>[   66.358586] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:66:DP-4]
>[   66.358889] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.359952] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   66.359954] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   66.359963] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   66.360130] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.360460] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.360471] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   66.360828] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.361199] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.361533] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.361547] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   66.361549] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   66.361845] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.363505] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   66.363507] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   66.363513] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   66.363687] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.364017] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.364030] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   66.364389] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.364759] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.365129] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.365332] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.365501] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.365833] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.365846] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   66.365848] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   66.366828] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   66.366830] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   66.366844] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   66.367008] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.367338] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.367348] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   66.367708] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.368078] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.368450] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.368653] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.368823] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.369154] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.369167] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   66.369168] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   66.370129] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   66.370131] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   66.370137] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   66.370311] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.370641] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.370651] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   66.371011] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.371383] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.371742] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.371947] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.372119] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.372451] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.372465] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   66.372466] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   66.372763] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.374419] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   66.374421] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   66.374428] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   66.374592] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.374924] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   66.375284] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.375653] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.376022] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.376225] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.376396] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.376727] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.376740] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   66.376742] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   66.377724] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   66.377726] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   66.377733] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   66.377898] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.378230] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.378243] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   66.378602] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.378972] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.379343] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.379546] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.379718] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.380049] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.380063] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   66.380064] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   66.381028] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   66.381030] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   66.381038] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   66.381211] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.381540] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.381551] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   66.381911] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.382282] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.382641] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.382676] [drm:drm_mode_detailed] composite sync not supported
>[   66.382735] [drm:drm_edid_to_eld] ELD monitor Pro2840m
>[   66.382737] [drm:drm_edid_to_eld] ELD size 32, SAD count 1
>[   66.382774] [drm:drm_mode_debug_printmodeline] Modeline 126:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   66.382776] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
>[   66.382779] [drm:drm_mode_debug_printmodeline] Modeline 130:"720x480i" 0 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[   66.382780] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
>[   66.382783] [drm:drm_mode_debug_printmodeline] Modeline 131:"720x576i" 0 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   66.382784] [drm:drm_mode_prune_invalid] Not using 720x576i mode: NO_INTERLACE
>[   66.382787] [drm:drm_mode_debug_printmodeline] Modeline 136:"1920x1080i" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   66.382788] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
>[   66.382791] [drm:drm_mode_debug_printmodeline] Modeline 146:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   66.382792] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE
>[   66.382795] [drm:drm_mode_debug_printmodeline] Modeline 150:"720x480i" 60 13513 720 739 801 858 480 488 494 525 0x40 0x101a
>[   66.382796] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE
>[   66.382801] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:66:DP-4] probed modes :
>[   66.382803] [drm:drm_mode_debug_printmodeline] Modeline 73:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x5
>[   66.382805] [drm:drm_mode_debug_printmodeline] Modeline 74:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   66.382808] [drm:drm_mode_debug_printmodeline] Modeline 110:"3840x2160" 30 296704 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   66.382810] [drm:drm_mode_debug_printmodeline] Modeline 78:"1920x2160" 60 297000 1920 2008 2052 2200 2160 2168 2178 2250 0x40 0xa
>[   66.382813] [drm:drm_mode_debug_printmodeline] Modeline 76:"2560x1600" 60 268500 2560 2608 2640 2720 1600 1603 1609 1646 0x40 0x6
>[   66.382815] [drm:drm_mode_debug_printmodeline] Modeline 77:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x6
>[   66.382818] [drm:drm_mode_debug_printmodeline] Modeline 87:"1920x1200" 60 193250 1920 2056 2256 2592 1200 1203 1209 1245 0x40 0x6
>[   66.382820] [drm:drm_mode_debug_printmodeline] Modeline 86:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0xa
>[   66.382823] [drm:drm_mode_debug_printmodeline] Modeline 93:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   66.382825] [drm:drm_mode_debug_printmodeline] Modeline 113:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   66.382828] [drm:drm_mode_debug_printmodeline] Modeline 101:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   66.382830] [drm:drm_mode_debug_printmodeline] Modeline 109:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   66.382843] [drm:drm_mode_debug_printmodeline] Modeline 122:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   66.382847] [drm:drm_mode_debug_printmodeline] Modeline 105:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   66.382849] [drm:drm_mode_debug_printmodeline] Modeline 120:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   66.382852] [drm:drm_mode_debug_printmodeline] Modeline 84:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[   66.382854] [drm:drm_mode_debug_printmodeline] Modeline 83:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[   66.382857] [drm:drm_mode_debug_printmodeline] Modeline 81:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   66.382859] [drm:drm_mode_debug_printmodeline] Modeline 82:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[   66.382862] [drm:drm_mode_debug_printmodeline] Modeline 75:"1360x768" 60 85500 1360 1472 1536 1792 768 771 777 795 0x40 0x5
>[   66.382864] [drm:drm_mode_debug_printmodeline] Modeline 79:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6
>[   66.382866] [drm:drm_mode_debug_printmodeline] Modeline 80:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   66.382868] [drm:drm_mode_debug_printmodeline] Modeline 111:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   66.382871] [drm:drm_mode_debug_printmodeline] Modeline 103:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   66.382873] [drm:drm_mode_debug_printmodeline] Modeline 92:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   66.382876] [drm:drm_mode_debug_printmodeline] Modeline 88:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   66.382879] [drm:drm_mode_debug_printmodeline] Modeline 102:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   66.382881] [drm:drm_mode_debug_printmodeline] Modeline 116:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   66.382884] [drm:drm_mode_debug_printmodeline] Modeline 96:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   66.382886] [drm:drm_mode_debug_printmodeline] Modeline 89:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   66.382889] [drm:drm_mode_debug_printmodeline] Modeline 100:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   66.382891] [drm:drm_mode_debug_printmodeline] Modeline 90:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   66.382900] [drm:drm_mode_getconnector] [CONNECTOR:66:?]
>[   66.382908] [drm:drm_mode_getconnector] [CONNECTOR:61:?]
>[   66.382910] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:61:DP-5]
>[   66.382912] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:61:DP-5] disconnected
>[   66.382914] [drm:drm_mode_getconnector] [CONNECTOR:44:?]
>[   66.382916] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1]
>[   66.382918] [drm:intel_hdmi_detect] [CONNECTOR:44:HDMI-A-1]
>[   66.383004] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.384547] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.384548] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   66.384549] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   66.402939] [drm:intel_hdmi_detect] Live status not up!
>[   66.402945] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:44:HDMI-A-1] disconnected
>[   66.402953] [drm:drm_mode_getconnector] [CONNECTOR:51:?]
>[   66.402955] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2]
>[   66.402956] [drm:intel_hdmi_detect] [CONNECTOR:51:HDMI-A-2]
>[   66.413129] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.413142] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   66.413143] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   66.413301] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.413313] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   66.413315] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   66.413317] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:HDMI-A-2] disconnected
>[   66.422291] [drm:drm_mode_setcrtc] [CRTC:21]
>[   66.422297] [drm:drm_mode_setcrtc] [CONNECTOR:66:DP-4]
>[   66.422301] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1e000
>[   66.422304] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b7ae5c00 state to ffff8800b9e1e000
>[   66.422306] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b970f6c0 state to ffff8800b9e1e000
>[   66.422309] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:] for CRTC state ffff8800b7ae5c00
>[   66.422311] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b970f6c0 to [CRTC:21]
>[   66.422313] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff8800b970f6c0
>[   66.424869] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:66] ffff8800346d6260 state to ffff8800b9e1e000
>[   66.424871] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff8800b9e1e000
>[   66.424873] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:32] ffff8800346d6280 state to ffff8800b9e1e000
>[   66.424876] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8800346d6280 to [NOCRTC]
>[   66.424877] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8800346d6260 to [CRTC:21]
>[   66.424879] [drm:drm_atomic_check_only] checking ffff8800b9e1e000
>[   66.424882] [drm:drm_atomic_helper_check_modeset] [CRTC:21] mode changed
>[   66.424883] [drm:update_connector_routing] Updating routing for [CONNECTOR:32:eDP-1]
>[   66.424885] [drm:update_connector_routing] Disabling [CONNECTOR:32:eDP-1]
>[   66.424886] [drm:update_connector_routing] Updating routing for [CONNECTOR:66:DP-4]
>[   66.424889] [drm:update_connector_routing] [CONNECTOR:66:DP-4] using [ENCODER:48:DP MST-48] on [CRTC:21]
>[   66.424891] [drm:drm_atomic_helper_check_modeset] [CRTC:21] needs all connectors, enable: y, active: y
>[   66.424892] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff8800b9e1e000
>[   66.424895] [drm:drm_atomic_connectors_for_crtc] State ffff8800b9e1e000 has 1 connectors for [CRTC:21]
>[   66.424898] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff8800b9e1e000
>[   66.424900] [drm:connected_sink_compute_bpp] [CONNECTOR:66:DP-4] checking for sink bpp constrains
>[   66.424901] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to EDID reported max of 24
>[   66.424907] [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[   66.424908] [drm:intel_pipe_config_compare] mismatch in cpu_transcoder (expected 3, found 0)
>[   66.424910] [drm:intel_pipe_config_compare] mismatch in lane_count (expected 4, found 2)
>[   66.424913] [drm:intel_pipe_config_compare] mismatch in dp_m_n (expected tu 64 gmch 4155856/8388608 link 461761/524288, or tu 0 gmch 0/0 link 0/0, found tu 33, gmch 12425625/8388608 link 1035468/1048576)
>[   66.424914] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hdisplay (expected 2560, found 3840)
>[   66.424916] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_htotal (expected 2720, found 4000)
>[   66.424917] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hblank_start (expected 2560, found 3840)
>[   66.424919] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hblank_end (expected 2720, found 4000)
>[   66.424921] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hsync_start (expected 2608, found 3888)
>[   66.424922] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hsync_end (expected 2640, found 3920)
>[   66.424924] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vdisplay (expected 1440, found 2160)
>[   66.424925] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vtotal (expected 1457, found 2222)
>[   66.424927] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vblank_start (expected 1440, found 2160)
>[   66.424928] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vblank_end (expected 1457, found 2222)
>[   66.424929] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vsync_start (expected 1442, found 2163)
>[   66.424931] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vsync_end (expected 1445, found 2168)
>[   66.424933] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.flags(DRM_MODE_FLAG_PVSYNC) (expected 0, found 4)
>[   66.424935] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.flags(DRM_MODE_FLAG_NVSYNC) (expected 8, found 0)
>[   66.424936] [drm:intel_pipe_config_compare] mismatch in ddi_pll_sel (expected 0x20000000, found 0x00000000)
>[   66.424938] [drm:intel_pipe_config_compare] mismatch in pipe_bpp (expected 18, found 24)
>[   66.424939] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_clock (expected 237800, found 533250)
>[   66.424941] [drm:intel_pipe_config_compare] mismatch in port_clock (expected 270000, found 540000)
>[   66.424943] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config ffff8800b7ae5c00 for pipe A
>[   66.424944] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[   66.424945] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   66.424947] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   66.424949] [drm:intel_dump_pipe_config] dp: 1, lanes: 2, gmch_m: 12425625, gmch_n: 8388608, link_m: 1035468, link_n: 1048576, tu: 33
>[   66.424950] [drm:intel_dump_pipe_config] dp: 1, lanes: 2, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   66.424951] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   66.424952] [drm:intel_dump_pipe_config] requested mode:
>[   66.424955] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x0 0x5
>[   66.424956] [drm:intel_dump_pipe_config] adjusted mode:
>[   66.424958] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x0 0x5
>[   66.424960] [drm:intel_dump_crtc_timings] crtc timings: 533250 3840 3888 3920 4000 2160 2163 2168 2222, type: 0x0 flags: 0x5
>[   66.424962] [drm:intel_dump_pipe_config] port clock: 540000
>[   66.424963] [drm:intel_dump_pipe_config] pipe src size: 3840x2160
>[   66.424965] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[   66.424966] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   66.424968] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   66.424969] [drm:intel_dump_pipe_config] ips: 0
>[   66.424970] [drm:intel_dump_pipe_config] double wide: 0
>[   66.424972] [drm:intel_dump_pipe_config] ddi_pll_sel: 0; dpll_hw_state: wrpll: 0x0
>[   66.424973] [drm:intel_dump_pipe_config] planes on this crtc
>[   66.424975] [drm:intel_dump_pipe_config] STANDARD PLANE:18 plane: 0.0 idx: 0 enabled
>[   66.424977] [drm:intel_dump_pipe_config] 	FB:55, fb = 6400x2160 format = 0x34325258
>[   66.424979] [drm:intel_dump_pipe_config] 	scaler:0 src (0, 0) 2560x1440 dst (0, 0) 2560x1440
>[   66.424981] [drm:intel_dump_pipe_config] CURSOR PLANE:20 plane: 0.1 idx: 1 disabled, scaler_id = 0
>[   66.424983] [drm:intel_dump_pipe_config] STANDARD PLANE:22 plane: 0.1 idx: 2 disabled, scaler_id = 0
>[   66.424987] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff8800356de400 state to ffff8800b9e1e000
>[   66.424990] [drm:drm_atomic_get_crtc_state] Added [CRTC:29] ffff88003567f400 state to ffff8800b9e1e000
>[   66.424993] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 55
>[   66.424995] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 1, on 1, ms 1
>[   66.424998] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b970f9c0 state to ffff8800b9e1e000
>[   66.425000] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b970f0c0 state to ffff8800b9e1e000
>[   66.425003] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021fbd7f00 state to ffff8800b9e1e000
>[   66.425005] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021fbd7d80 state to ffff8800b9e1e000
>[   66.425007] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021fbd76c0 state to ffff8800b9e1e000
>[   66.425010] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff88021fbd73c0 state to ffff8800b9e1e000
>[   66.425012] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff88022096b180 state to ffff8800b9e1e000
>[   66.425014] [drm:drm_atomic_get_plane_state] Added [PLANE:30] ffff88022096b240 state to ffff8800b9e1e000
>[   66.425016] [drm:drm_atomic_commit] commiting ffff8800b9e1e000
>[   66.461280] [drm:intel_edp_backlight_off] 
>[   66.662026] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[   66.662037] [drm:intel_disable_pipe] disabling pipe A
>[   66.676246] [drm:edp_panel_off] Turn eDP port A panel power off
>[   66.676252] [drm:wait_panel_off] Wait for panel power off time
>[   66.676266] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[   66.728549] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000008, dig 0x00000012, pins 0x00000010
>[   66.728552] [drm:intel_hpd_irq_handler] digital hpd port A - long
>[   66.728554] [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 4 - cnt: 0
>[   66.728584] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port A
>[   66.736341] [drm:wait_panel_status] Wait complete
>[   66.740369] [drm:intel_update_cdclk] Current CD clock rate: 540000 kHz
>[   66.740384] [drm:intel_mst_pre_enable_dp] 0
>[   66.740571] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.741641] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.741827] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.741838] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[   66.741840] [drm:intel_dp_set_signal_levels] Using vswing level 0
>[   66.741841] [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0
>[   66.742074] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.758696] [drm:intel_dp_start_link_train] clock recovery OK
>[   66.775479] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.777503] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[   66.777697] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.777707] [drm:drm_dp_mst_allocate_vcpi] initing vcpi for 658 33
>[   66.777874] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.778067] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.778250] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.778338] [drm:intel_enable_pipe] enabling pipe A
>[   66.778344] [drm:intel_mst_enable_dp] 1
>[   66.778553] [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR* CPU pipe A FIFO underrun
>[   66.780520] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.780531] [drm:drm_dp_update_payload_part2] payload 0 1
>[   66.780793] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.781970] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[   66.781972] [drm:intel_hpd_irq_handler] digital hpd port C - short
>[   66.781992] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short
>[   66.782160] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.782482] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.782483] [drm:intel_dp_check_mst_status] got esi 01 10 00
>[   66.782842] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.783035] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.783191] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.783513] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
>[   66.783514] [drm:intel_dp_check_mst_status] got esi2 01 00 00
>[   66.783515] [drm:intel_dp_check_mst_status] got esi 01 00 00
>[   66.811916] [drm:intel_connector_check_state] [CONNECTOR:32:eDP-1]
>[   66.811920] [drm:intel_connector_check_state] [CONNECTOR:66:DP-4]
>[   66.811922] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[   66.811925] [drm:check_encoder_state] [ENCODER:39:TMDS-39]
>[   66.811926] [drm:check_encoder_state] [ENCODER:41:DP MST-41]
>[   66.811928] [drm:check_encoder_state] [ENCODER:42:DP MST-42]
>[   66.811929] [drm:check_encoder_state] [ENCODER:43:DP MST-43]
>[   66.811930] [drm:check_encoder_state] [ENCODER:46:TMDS-46]
>[   66.811932] [drm:check_encoder_state] [ENCODER:48:DP MST-48]
>[   66.811934] [drm:check_encoder_state] [ENCODER:49:DP MST-49]
>[   66.811935] [drm:check_encoder_state] [ENCODER:50:DP MST-50]
>[   66.811938] [drm:check_crtc_state] [CRTC:21]
>[   66.811946] [drm:check_shared_dpll_state] WRPLL 1
>[   66.811948] [drm:check_shared_dpll_state] WRPLL 2
>[   66.811950] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1e000
>[   66.811954] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1e000
>[   66.811982] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=0/852
>[   66.811988] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b9e1e000
>[   66.811991] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c2400 state to ffff8800b9e1e000
>[   66.811993] [drm:drm_atomic_check_only] checking ffff8800b9e1e000
>[   66.811997] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b6c0 state to ffff8800b9e1e000
>[   66.811999] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b600 state to ffff8800b9e1e000
>[   66.812002] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b300 state to ffff8800b9e1e000
>[   66.812005] [drm:drm_atomic_commit] commiting ffff8800b9e1e000
>[   66.812017] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b9e1e000
>[   66.812019] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b9e1e000
>[   66.812272] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712d200
>[   66.812275] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b970f0c0 state to ffff8800b712d200
>[   66.812277] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91c2000 state to ffff8800b712d200
>[   66.812279] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b970f0c0 to [CRTC:21]
>[   66.812280] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff8800b970f0c0
>[   66.812282] [drm:drm_atomic_check_only] checking ffff8800b712d200
>[   66.812287] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   66.812289] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[   66.812291] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b970f9c0 state to ffff8800b712d200
>[   66.812293] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b970f6c0 state to ffff8800b712d200
>[   66.812296] [drm:drm_atomic_commit] commiting ffff8800b712d200
>[   66.812312] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712d200
>[   66.812314] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712d200
>[   66.813197] [drm:drm_mode_setcrtc] [CRTC:25]
>[   66.813202] [drm:drm_mode_setcrtc] [CONNECTOR:32:eDP-1]
>[   66.813204] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712f000
>[   66.813207] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88021f582800 state to ffff8800b712f000
>[   66.813210] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800b970f840 state to ffff8800b712f000
>[   66.813212] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:] for CRTC state ffff88021f582800
>[   66.813213] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b970f840 to [CRTC:25]
>[   66.813215] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff8800b970f840
>[   66.813217] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:32] ffff8800346d6180 state to ffff8800b712f000
>[   66.813218] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff8800b712f000
>[   66.813220] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8800346d6180 to [CRTC:25]
>[   66.813222] [drm:drm_atomic_check_only] checking ffff8800b712f000
>[   66.813224] [drm:drm_atomic_helper_check_modeset] [CRTC:25] mode changed
>[   66.813225] [drm:drm_atomic_helper_check_modeset] [CRTC:25] enable changed
>[   66.813226] [drm:update_connector_routing] Updating routing for [CONNECTOR:32:eDP-1]
>[   66.813228] [drm:update_connector_routing] [CONNECTOR:32:eDP-1] using [ENCODER:31:TMDS-31] on [CRTC:25]
>[   66.813230] [drm:drm_atomic_helper_check_modeset] [CRTC:25] active changed
>[   66.813231] [drm:drm_atomic_helper_check_modeset] [CRTC:25] needs all connectors, enable: y, active: y
>[   66.813232] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff8800b712f000
>[   66.813234] [drm:drm_atomic_connectors_for_crtc] State ffff8800b712f000 has 1 connectors for [CRTC:25]
>[   66.813236] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff8800b712f000
>[   66.813239] [drm:connected_sink_compute_bpp] [CONNECTOR:32:eDP-1] checking for sink bpp constrains
>[   66.813240] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to default limit of 24
>[   66.813243] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 270000 pixel clock 237800KHz
>[   66.813244] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[   66.813247] [drm:intel_dp_compute_config] DP link bw 0a rate select 00 lane count 4 clock 270000 bpp 18
>[   66.813248] [drm:intel_dp_compute_config] DP link bw required 428040 available 864000
>[   66.813251] [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[   66.813252] [drm:intel_pipe_config_compare] mismatch in cpu_transcoder (expected 1, found 3)
>[   66.813254] [drm:intel_pipe_config_compare] mismatch in lane_count (expected 2, found 4)
>[   66.813257] [drm:intel_pipe_config_compare] mismatch in dp_m_n (expected tu 33 gmch 12425625/8388608 link 1035468/1048576, or tu 0 gmch 0/0 link 0/0, found tu 64, gmch 4155856/8388608 link 461761/524288)
>[   66.813258] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hdisplay (expected 0, found 2560)
>[   66.813260] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_htotal (expected 0, found 2720)
>[   66.813261] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hblank_start (expected 0, found 2560)
>[   66.813263] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hblank_end (expected 0, found 2720)
>[   66.813264] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hsync_start (expected 0, found 2608)
>[   66.813266] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_hsync_end (expected 0, found 2640)
>[   66.813267] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vdisplay (expected 0, found 1440)
>[   66.813269] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vtotal (expected 0, found 1457)
>[   66.813270] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vblank_start (expected 0, found 1440)
>[   66.813271] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vblank_end (expected 0, found 1457)
>[   66.813273] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vsync_start (expected 0, found 1442)
>[   66.813274] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_vsync_end (expected 0, found 1445)
>[   66.813277] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.flags(DRM_MODE_FLAG_PHSYNC) (expected 0, found 1)
>[   66.813278] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.flags(DRM_MODE_FLAG_NVSYNC) (expected 0, found 8)
>[   66.813280] [drm:intel_pipe_config_compare] mismatch in ddi_pll_sel (expected 0x00000000, found 0x20000000)
>[   66.813281] [drm:intel_pipe_config_compare] mismatch in pipe_bpp (expected 24, found 18)
>[   66.813283] [drm:intel_pipe_config_compare] mismatch in base.adjusted_mode.crtc_clock (expected 0, found 237800)
>[   66.813284] [drm:intel_pipe_config_compare] mismatch in port_clock (expected 540000, found 270000)
>[   66.813287] [drm:intel_dump_pipe_config] [CRTC:25][modeset] config ffff88021f582800 for pipe B
>[   66.813288] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   66.813289] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[   66.813291] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   66.813293] [drm:intel_dump_pipe_config] dp: 1, lanes: 4, gmch_m: 4155856, gmch_n: 8388608, link_m: 461761, link_n: 524288, tu: 64
>[   66.813295] [drm:intel_dump_pipe_config] dp: 1, lanes: 4, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   66.813296] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   66.813297] [drm:intel_dump_pipe_config] requested mode:
>[   66.813300] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x0 0x9
>[   66.813301] [drm:intel_dump_pipe_config] adjusted mode:
>[   66.813303] [drm:drm_mode_debug_printmodeline] Modeline 0:"2560x1440" 60 237800 2560 2608 2640 2720 1440 1442 1445 1457 0x48 0x9
>[   66.813305] [drm:intel_dump_crtc_timings] crtc timings: 237800 2560 2608 2640 2720 1440 1442 1445 1457, type: 0x48 flags: 0x9
>[   66.813307] [drm:intel_dump_pipe_config] port clock: 270000
>[   66.813308] [drm:intel_dump_pipe_config] pipe src size: 2560x1440
>[   66.813309] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[   66.813311] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   66.813312] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   66.813314] [drm:intel_dump_pipe_config] ips: 0
>[   66.813315] [drm:intel_dump_pipe_config] double wide: 0
>[   66.813316] [drm:intel_dump_pipe_config] ddi_pll_sel: 536870912; dpll_hw_state: wrpll: 0x0
>[   66.813318] [drm:intel_dump_pipe_config] planes on this crtc
>[   66.813320] [drm:intel_dump_pipe_config] STANDARD PLANE:23 plane: 1.0 idx: 3 disabled, scaler_id = 0
>[   66.813321] [drm:intel_dump_pipe_config] CURSOR PLANE:24 plane: 1.2 idx: 4 disabled, scaler_id = 0
>[   66.813323] [drm:intel_dump_pipe_config] STANDARD PLANE:26 plane: 1.1 idx: 5 disabled, scaler_id = 0
>[   66.813326] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021f581c00 state to ffff8800b712f000
>[   66.813328] [drm:drm_atomic_get_crtc_state] Added [CRTC:29] ffff88021f583800 state to ffff8800b712f000
>[   66.813331] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:23] with fb 55
>[   66.813333] [drm:intel_plane_atomic_calc_changes] [PLANE:23] visible 0 -> 1, off 0, on 1, ms 1
>[   66.813336] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b970f3c0 state to ffff8800b712f000
>[   66.813338] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b970f300 state to ffff8800b712f000
>[   66.813340] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b970f900 state to ffff8800b712f000
>[   66.813343] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff8800b970ff00 state to ffff8800b712f000
>[   66.813345] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800b970fe40 state to ffff8800b712f000
>[   66.813347] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff8800b970fd80 state to ffff8800b712f000
>[   66.813349] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff8800b970f000 state to ffff8800b712f000
>[   66.813351] [drm:drm_atomic_get_plane_state] Added [PLANE:30] ffff88022096b300 state to ffff8800b712f000
>[   66.813353] [drm:drm_atomic_commit] commiting ffff8800b712f000
>[   66.813380] [drm:edp_panel_on] Turn eDP port A panel power on
>[   66.813383] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   67.277407] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[   67.277410] [drm:wait_panel_status] Wait complete
>[   67.277414] [drm:wait_panel_on] Wait for panel power on
>[   67.277417] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[   67.381561] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000008, dig 0x00000012, pins 0x00000010
>[   67.381565] [drm:intel_hpd_irq_handler] digital hpd port A - long
>[   67.381566] [drm:intel_hpd_irq_storm_detect] Received HPD interrupt on PIN 4 - cnt: 1
>[   67.381597] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port A
>[   67.429842] [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000008, dig 0x00000011, pins 0x00000010
>[   67.429845] [drm:intel_hpd_irq_handler] digital hpd port A - short
>[   67.429873] [drm:intel_dp_hpd_pulse] got hpd irq on port A - short
>[   67.489687] [drm:wait_panel_status] Wait complete
>[   67.489698] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   67.489704] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[   67.490769] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[   67.490771] [drm:intel_dp_set_signal_levels] Using vswing level 0
>[   67.490772] [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0
>[   67.491387] [drm:intel_dp_start_link_train] clock recovery OK
>[   67.492306] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[   67.492394] [drm:intel_enable_pipe] enabling pipe B
>[   67.492547] [drm:intel_edp_backlight_on] 
>[   67.492549] [drm:intel_panel_enable_backlight] pipe B
>[   67.492556] [drm:intel_panel_actually_set_backlight] set backlight PWM = 852
>[   67.495527] [drm:intel_psr_match_conditions] PSR disable by flag
>[   67.495529] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[   67.495924] [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR* CPU pipe B FIFO underrun
>[   67.545772] [drm:intel_connector_check_state] [CONNECTOR:32:eDP-1]
>[   67.545777] [drm:check_encoder_state] [ENCODER:31:TMDS-31]
>[   67.545779] [drm:check_encoder_state] [ENCODER:39:TMDS-39]
>[   67.545781] [drm:check_encoder_state] [ENCODER:41:DP MST-41]
>[   67.545783] [drm:check_encoder_state] [ENCODER:42:DP MST-42]
>[   67.545784] [drm:check_encoder_state] [ENCODER:43:DP MST-43]
>[   67.545786] [drm:check_encoder_state] [ENCODER:46:TMDS-46]
>[   67.545796] [drm:check_encoder_state] [ENCODER:48:DP MST-48]
>[   67.545798] [drm:check_encoder_state] [ENCODER:49:DP MST-49]
>[   67.545799] [drm:check_encoder_state] [ENCODER:50:DP MST-50]
>[   67.545801] [drm:check_crtc_state] [CRTC:25]
>[   67.545809] [drm:check_shared_dpll_state] WRPLL 1
>[   67.545811] [drm:check_shared_dpll_state] WRPLL 2
>[   67.545813] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712f000
>[   67.545818] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712f000
>[   67.546589] [drm:intel_dp_get_dpcd] DPCD: 12 0a c4 41 00 00 01 c0 02 00 00 00 1f 0b 00
>[   67.546893] [drm:intel_dp_get_dpcd] Detected EDP PSR Panel.
>[   67.546895] [drm:intel_dp_get_dpcd] Display Port TPS3 support: source yes, sink yes
>[   67.547186] [drm:intel_dp_print_rates] source rates: 162000, 270000, 540000
>[   67.547188] [drm:intel_dp_print_rates] sink rates: 162000, 270000
>[   67.547189] [drm:intel_dp_print_rates] common rates: 162000, 270000
>[   67.547630] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712f000
>[   67.547634] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff8800b91a5400 state to ffff8800b712f000
>[   67.547636] [drm:drm_atomic_check_only] checking ffff8800b712f000
>[   67.547640] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88022096b240 state to ffff8800b712f000
>[   67.547642] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88022096b180 state to ffff8800b712f000
>[   67.547644] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88022096b600 state to ffff8800b712f000
>[   67.547647] [drm:drm_atomic_commit] commiting ffff8800b712f000
>[   67.547670] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712f000
>[   67.547672] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712f000
>[   67.547711] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=852/852
>[   67.547713] [drm:intel_panel_actually_set_backlight] set backlight PWM = 852
>[   67.547740] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712f000
>[   67.547742] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88022096b6c0 state to ffff8800b712f000
>[   67.547744] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91a2400 state to ffff8800b712f000
>[   67.547746] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88022096b6c0 to [CRTC:21]
>[   67.547747] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff88022096b6c0
>[   67.547748] [drm:drm_atomic_check_only] checking ffff8800b712f000
>[   67.547752] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   67.547754] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   67.547756] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88022096b480 state to ffff8800b712f000
>[   67.547758] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88022096b000 state to ffff8800b712f000
>[   67.547761] [drm:drm_atomic_commit] commiting ffff8800b712f000
>[   67.547773] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712f000
>[   67.547776] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712f000
>[   67.547782] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712f000
>[   67.547783] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021fbd76c0 state to ffff8800b712f000
>[   67.547785] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff8800b91a4800 state to ffff8800b712f000
>[   67.547787] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021fbd76c0 to [CRTC:25]
>[   67.547788] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff88021fbd76c0
>[   67.547790] [drm:drm_atomic_check_only] checking ffff8800b712f000
>[   67.547792] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb 91
>[   67.547794] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 0 -> 1, off 0, on 1, ms 0
>[   67.547796] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021fbd7d80 state to ffff8800b712f000
>[   67.547798] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021fbd7f00 state to ffff8800b712f000
>[   67.547800] [drm:drm_atomic_commit] commiting ffff8800b712f000
>[   67.547813] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712f000
>[   67.547814] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712f000
>[   69.484410] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aee00
>[   69.484413] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880200fbe6c0 state to ffff8800b91aee00
>[   69.484416] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021db2d400 state to ffff8800b91aee00
>[   69.484417] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200fbe6c0 to [CRTC:21]
>[   69.484418] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff880200fbe6c0
>[   69.484419] [drm:drm_atomic_check_only] checking ffff8800b91aee00
>[   69.484423] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.484424] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.484425] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880200fbec00 state to ffff8800b91aee00
>[   69.484426] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880200fbe300 state to ffff8800b91aee00
>[   69.484429] [drm:drm_atomic_commit] commiting ffff8800b91aee00
>[   69.484447] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aee00
>[   69.484449] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aee00
>[   69.484452] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aee00
>[   69.484453] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff880200fbe540 state to ffff8800b91aee00
>[   69.484454] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88021db2c800 state to ffff8800b91aee00
>[   69.484455] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200fbe540 to [CRTC:25]
>[   69.484456] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff880200fbe540
>[   69.484457] [drm:drm_atomic_check_only] checking ffff8800b91aee00
>[   69.484458] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb 91
>[   69.484459] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 1 -> 1, off 0, on 0, ms 0
>[   69.484460] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff880200fbe3c0 state to ffff8800b91aee00
>[   69.484461] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff880200fbeb40 state to ffff8800b91aee00
>[   69.484463] [drm:drm_atomic_commit] commiting ffff8800b91aee00
>[   69.484470] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aee00
>[   69.484471] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aee00
>[   69.494337] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af600
>[   69.494341] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880200fbe780 state to ffff8800b91af600
>[   69.494343] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021db2f000 state to ffff8800b91af600
>[   69.494344] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200fbe780 to [CRTC:21]
>[   69.494345] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff880200fbe780
>[   69.494346] [drm:drm_atomic_check_only] checking ffff8800b91af600
>[   69.494349] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.494350] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.494353] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021fbd7f00 state to ffff8800b91af600
>[   69.494354] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021fbd76c0 state to ffff8800b91af600
>[   69.494356] [drm:drm_atomic_commit] commiting ffff8800b91af600
>[   69.494373] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af600
>[   69.494375] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af600
>[   69.494378] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af600
>[   69.494379] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88021fbd7d80 state to ffff8800b91af600
>[   69.494380] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88021db2d400 state to ffff8800b91af600
>[   69.494381] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021fbd7d80 to [CRTC:25]
>[   69.494382] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff88021fbd7d80
>[   69.494383] [drm:drm_atomic_check_only] checking ffff8800b91af600
>[   69.494384] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb 91
>[   69.494385] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 1 -> 1, off 0, on 0, ms 0
>[   69.494386] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff880200fbe300 state to ffff8800b91af600
>[   69.494388] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff880200fbe6c0 state to ffff8800b91af600
>[   69.494389] [drm:drm_atomic_commit] commiting ffff8800b91af600
>[   69.494396] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af600
>[   69.494397] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af600
>[   69.504299] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af200
>[   69.504302] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880200fbeb40 state to ffff8800b91af200
>[   69.504304] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021db2c800 state to ffff8800b91af200
>[   69.504305] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200fbeb40 to [CRTC:21]
>[   69.504306] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff880200fbeb40
>[   69.504307] [drm:drm_atomic_check_only] checking ffff8800b91af200
>[   69.504312] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.504313] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.504315] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880200fbe540 state to ffff8800b91af200
>[   69.504316] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880200fbe3c0 state to ffff8800b91af200
>[   69.504319] [drm:drm_atomic_commit] commiting ffff8800b91af200
>[   69.504334] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af200
>[   69.504335] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af200
>[   69.504338] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af200
>[   69.504339] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff880200fbe780 state to ffff8800b91af200
>[   69.504340] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88021db2f000 state to ffff8800b91af200
>[   69.504341] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200fbe780 to [CRTC:25]
>[   69.504342] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff880200fbe780
>[   69.504343] [drm:drm_atomic_check_only] checking ffff8800b91af200
>[   69.504344] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb 91
>[   69.504345] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 1 -> 1, off 0, on 0, ms 0
>[   69.504347] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff880200fbec00 state to ffff8800b91af200
>[   69.504349] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021fbd76c0 state to ffff8800b91af200
>[   69.504350] [drm:drm_atomic_commit] commiting ffff8800b91af200
>[   69.504358] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af200
>[   69.504359] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af200
>[   69.513232] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af000
>[   69.513236] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021fbd7d80 state to ffff8800b91af000
>[   69.513238] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021db2d400 state to ffff8800b91af000
>[   69.513239] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021fbd7d80 to [CRTC:21]
>[   69.513240] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff88021fbd7d80
>[   69.513241] [drm:drm_atomic_check_only] checking ffff8800b91af000
>[   69.513244] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.513245] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.513249] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021fbd7f00 state to ffff8800b91af000
>[   69.513250] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880200fbe6c0 state to ffff8800b91af000
>[   69.513253] [drm:drm_atomic_commit] commiting ffff8800b91af000
>[   69.513270] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af000
>[   69.513271] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af000
>[   69.513274] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af000
>[   69.513275] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff880200fbe3c0 state to ffff8800b91af000
>[   69.513276] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88021db2c800 state to ffff8800b91af000
>[   69.513277] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200fbe3c0 to [CRTC:25]
>[   69.513278] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff880200fbe3c0
>[   69.513278] [drm:drm_atomic_check_only] checking ffff8800b91af000
>[   69.513280] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb 91
>[   69.513281] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 1 -> 1, off 0, on 0, ms 0
>[   69.513282] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff880200fbeb40 state to ffff8800b91af000
>[   69.513283] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff880200fbe540 state to ffff8800b91af000
>[   69.513285] [drm:drm_atomic_commit] commiting ffff8800b91af000
>[   69.513293] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af000
>[   69.513294] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af000
>[   69.523229] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af800
>[   69.523233] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880200fbe780 state to ffff8800b91af800
>[   69.523235] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021db2f000 state to ffff8800b91af800
>[   69.523236] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200fbe780 to [CRTC:21]
>[   69.523237] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff880200fbe780
>[   69.523239] [drm:drm_atomic_check_only] checking ffff8800b91af800
>[   69.523243] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.523244] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.523246] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880200fbec00 state to ffff8800b91af800
>[   69.523247] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880200fbe300 state to ffff8800b91af800
>[   69.523250] [drm:drm_atomic_commit] commiting ffff8800b91af800
>[   69.523268] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af800
>[   69.523270] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af800
>[   69.523273] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af800
>[   69.523274] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff880200fbe6c0 state to ffff8800b91af800
>[   69.523276] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88021db2d400 state to ffff8800b91af800
>[   69.523277] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200fbe6c0 to [NOCRTC]
>[   69.523278] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880200fbe6c0
>[   69.523278] [drm:drm_atomic_check_only] checking ffff8800b91af800
>[   69.523280] [drm:intel_plane_atomic_calc_changes] [CRTC:25] has [PLANE:24] with fb -1
>[   69.523281] [drm:intel_plane_atomic_calc_changes] [PLANE:24] visible 1 -> 0, off 1, on 0, ms 0
>[   69.523282] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88021fbd7d80 state to ffff8800b91af800
>[   69.523283] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88021fbd7f00 state to ffff8800b91af800
>[   69.523285] [drm:drm_atomic_commit] commiting ffff8800b91af800
>[   69.523294] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af800
>[   69.523295] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af800
>[   69.533204] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ecbe00
>[   69.533209] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880222e63240 state to ffff880222ecbe00
>[   69.533212] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021f582c00 state to ffff880222ecbe00
>[   69.533214] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880222e63240 to [CRTC:21]
>[   69.533215] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff880222e63240
>[   69.533217] [drm:drm_atomic_check_only] checking ffff880222ecbe00
>[   69.533221] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.533223] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.533226] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880222e63180 state to ffff880222ecbe00
>[   69.533228] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880222e63c00 state to ffff880222ecbe00
>[   69.533233] [drm:drm_atomic_commit] commiting ffff880222ecbe00
>[   69.533252] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ecbe00
>[   69.533255] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ecbe00
>[   69.543195] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ac400
>[   69.543199] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021fbd73c0 state to ffff8800b91ac400
>[   69.543201] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021db2cc00 state to ffff8800b91ac400
>[   69.543202] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021fbd73c0 to [CRTC:21]
>[   69.543203] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff88021fbd73c0
>[   69.543204] [drm:drm_atomic_check_only] checking ffff8800b91ac400
>[   69.543209] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.543210] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.543212] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021fbd76c0 state to ffff8800b91ac400
>[   69.543213] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880200fbe300 state to ffff8800b91ac400
>[   69.543216] [drm:drm_atomic_commit] commiting ffff8800b91ac400
>[   69.543232] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ac400
>[   69.543234] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ac400
>[   69.552155] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ad600
>[   69.552159] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880200fbe780 state to ffff8800b91ad600
>[   69.552161] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021db2bc00 state to ffff8800b91ad600
>[   69.552162] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200fbe780 to [CRTC:21]
>[   69.552163] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff880200fbe780
>[   69.552164] [drm:drm_atomic_check_only] checking ffff8800b91ad600
>[   69.552168] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.552169] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.552171] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880200fbec00 state to ffff8800b91ad600
>[   69.552172] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880200fbe540 state to ffff8800b91ad600
>[   69.552175] [drm:drm_atomic_commit] commiting ffff8800b91ad600
>[   69.552191] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ad600
>[   69.552193] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ad600
>[   69.562138] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ad400
>[   69.562142] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880200fbe300 state to ffff8800b91ad400
>[   69.562144] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021db2cc00 state to ffff8800b91ad400
>[   69.562145] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200fbe300 to [CRTC:21]
>[   69.562146] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff880200fbe300
>[   69.562147] [drm:drm_atomic_check_only] checking ffff8800b91ad400
>[   69.562151] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.562152] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.562154] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880200fbe3c0 state to ffff8800b91ad400
>[   69.562155] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880200fbeb40 state to ffff8800b91ad400
>[   69.562159] [drm:drm_atomic_commit] commiting ffff8800b91ad400
>[   69.562175] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ad400
>[   69.562177] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ad400
>[   69.639957] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ec8e00
>[   69.639961] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880222e63b40 state to ffff880222ec8e00
>[   69.639963] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021f586400 state to ffff880222ec8e00
>[   69.639964] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880222e63b40 to [CRTC:21]
>[   69.639965] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff880222e63b40
>[   69.639966] [drm:drm_atomic_check_only] checking ffff880222ec8e00
>[   69.639970] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.639971] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.639972] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880222e63780 state to ffff880222ec8e00
>[   69.639974] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880222e63e40 state to ffff880222ec8e00
>[   69.639977] [drm:drm_atomic_commit] commiting ffff880222ec8e00
>[   69.639994] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ec8e00
>[   69.639996] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ec8e00
>[   69.648932] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ec9a00
>[   69.648936] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880222e63480 state to ffff880222ec9a00
>[   69.648938] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021f582c00 state to ffff880222ec9a00
>[   69.648939] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880222e63480 to [CRTC:21]
>[   69.648940] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff880222e63480
>[   69.648941] [drm:drm_atomic_check_only] checking ffff880222ec9a00
>[   69.648945] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.648946] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.648948] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880222e633c0 state to ffff880222ec9a00
>[   69.648949] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880222e63a80 state to ffff880222ec9a00
>[   69.648952] [drm:drm_atomic_commit] commiting ffff880222ec9a00
>[   69.648967] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ec9a00
>[   69.648969] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ec9a00
>[   69.658937] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af000
>[   69.658941] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880200fbe780 state to ffff8800b91af000
>[   69.658943] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021db2c000 state to ffff8800b91af000
>[   69.658945] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200fbe780 to [CRTC:21]
>[   69.658946] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff880200fbe780
>[   69.658947] [drm:drm_atomic_check_only] checking ffff8800b91af000
>[   69.658950] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.658951] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.658954] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880200fbec00 state to ffff8800b91af000
>[   69.658955] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880200fbeb40 state to ffff8800b91af000
>[   69.658958] [drm:drm_atomic_commit] commiting ffff8800b91af000
>[   69.658973] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af000
>[   69.658975] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af000
>[   69.668906] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ec9800
>[   69.668909] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880222e63e40 state to ffff880222ec9800
>[   69.668911] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021f586400 state to ffff880222ec9800
>[   69.668912] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880222e63e40 to [CRTC:21]
>[   69.668913] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff880222e63e40
>[   69.668914] [drm:drm_atomic_check_only] checking ffff880222ec9800
>[   69.668918] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.668919] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.668920] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880222e63b40 state to ffff880222ec9800
>[   69.668921] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880222e63780 state to ffff880222ec9800
>[   69.668924] [drm:drm_atomic_commit] commiting ffff880222ec9800
>[   69.668941] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ec9800
>[   69.668943] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ec9800
>[   69.677947] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af400
>[   69.677951] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880200fbe300 state to ffff8800b91af400
>[   69.677953] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021db2c000 state to ffff8800b91af400
>[   69.677954] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200fbe300 to [CRTC:21]
>[   69.677955] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff880200fbe300
>[   69.677956] [drm:drm_atomic_check_only] checking ffff8800b91af400
>[   69.677960] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.677961] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.677963] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880200fbe3c0 state to ffff8800b91af400
>[   69.677964] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880200fbeb40 state to ffff8800b91af400
>[   69.677967] [drm:drm_atomic_commit] commiting ffff8800b91af400
>[   69.677985] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af400
>[   69.677987] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af400
>[   69.687998] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ecb800
>[   69.688001] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880222e63d80 state to ffff880222ecb800
>[   69.688003] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021f581c00 state to ffff880222ecb800
>[   69.688005] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880222e63d80 to [CRTC:21]
>[   69.688006] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff880222e63d80
>[   69.688007] [drm:drm_atomic_check_only] checking ffff880222ecb800
>[   69.688010] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.688011] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.688013] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880222e63000 state to ffff880222ecb800
>[   69.688014] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880222e63300 state to ffff880222ecb800
>[   69.688017] [drm:drm_atomic_commit] commiting ffff880222ecb800
>[   69.688034] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ecb800
>[   69.688036] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ecb800
>[   69.698105] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae200
>[   69.698108] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880200fbe780 state to ffff8800b91ae200
>[   69.698111] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021db2cc00 state to ffff8800b91ae200
>[   69.698112] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200fbe780 to [CRTC:21]
>[   69.698113] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff880200fbe780
>[   69.698114] [drm:drm_atomic_check_only] checking ffff8800b91ae200
>[   69.698118] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.698119] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.698120] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880200fbec00 state to ffff8800b91ae200
>[   69.698122] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880200fbeb40 state to ffff8800b91ae200
>[   69.698125] [drm:drm_atomic_commit] commiting ffff8800b91ae200
>[   69.698140] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae200
>[   69.698142] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae200
>[   69.707152] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91aee00
>[   69.707155] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880200fbe300 state to ffff8800b91aee00
>[   69.707158] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021db2bc00 state to ffff8800b91aee00
>[   69.707159] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200fbe300 to [CRTC:21]
>[   69.707160] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff880200fbe300
>[   69.707161] [drm:drm_atomic_check_only] checking ffff8800b91aee00
>[   69.707165] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.707166] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.707168] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880200fbe3c0 state to ffff8800b91aee00
>[   69.707169] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021fbd73c0 state to ffff8800b91aee00
>[   69.707172] [drm:drm_atomic_commit] commiting ffff8800b91aee00
>[   69.707189] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91aee00
>[   69.707191] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91aee00
>[   69.727496] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af200
>[   69.727500] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021fbd76c0 state to ffff8800b91af200
>[   69.727502] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021db2cc00 state to ffff8800b91af200
>[   69.727503] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021fbd76c0 to [CRTC:21]
>[   69.727504] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff88021fbd76c0
>[   69.727505] [drm:drm_atomic_check_only] checking ffff8800b91af200
>[   69.727509] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.727510] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.727512] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880200fbeb40 state to ffff8800b91af200
>[   69.727513] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880200fbe780 state to ffff8800b91af200
>[   69.727516] [drm:drm_atomic_commit] commiting ffff8800b91af200
>[   69.727532] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af200
>[   69.727534] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af200
>[   69.736705] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91ae200
>[   69.736708] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880200fbe300 state to ffff8800b91ae200
>[   69.736710] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021db2bc00 state to ffff8800b91ae200
>[   69.736711] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200fbe300 to [CRTC:21]
>[   69.736712] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff880200fbe300
>[   69.736713] [drm:drm_atomic_check_only] checking ffff8800b91ae200
>[   69.736718] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.736719] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.736721] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880200fbe3c0 state to ffff8800b91ae200
>[   69.736722] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880200fbec00 state to ffff8800b91ae200
>[   69.736725] [drm:drm_atomic_commit] commiting ffff8800b91ae200
>[   69.736741] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91ae200
>[   69.736743] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91ae200
>[   69.745878] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af400
>[   69.745893] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880200fbe780 state to ffff8800b91af400
>[   69.745896] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021db2cc00 state to ffff8800b91af400
>[   69.745898] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200fbe780 to [CRTC:21]
>[   69.745899] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff880200fbe780
>[   69.745901] [drm:drm_atomic_check_only] checking ffff8800b91af400
>[   69.745906] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.745907] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.745908] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880200fbeb40 state to ffff8800b91af400
>[   69.745910] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88021fbd76c0 state to ffff8800b91af400
>[   69.745913] [drm:drm_atomic_commit] commiting ffff8800b91af400
>[   69.745928] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af400
>[   69.745930] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af400
>[   69.755944] [drm:drm_atomic_state_init] Allocated atomic state ffff880222ec8200
>[   69.755948] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880222e636c0 state to ffff880222ec8200
>[   69.755950] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021f582800 state to ffff880222ec8200
>[   69.755951] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880222e636c0 to [CRTC:21]
>[   69.755952] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff880222e636c0
>[   69.755953] [drm:drm_atomic_check_only] checking ffff880222ec8200
>[   69.755958] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.755959] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.755961] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880222e63900 state to ffff880222ec8200
>[   69.755962] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880222e63540 state to ffff880222ec8200
>[   69.755965] [drm:drm_atomic_commit] commiting ffff880222ec8200
>[   69.755980] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880222ec8200
>[   69.755982] [drm:drm_atomic_state_free] Freeing atomic state ffff880222ec8200
>[   69.766232] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af800
>[   69.766237] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88021fbd73c0 state to ffff8800b91af800
>[   69.766240] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021db2f000 state to ffff8800b91af800
>[   69.766241] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88021fbd73c0 to [CRTC:21]
>[   69.766243] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff88021fbd73c0
>[   69.766244] [drm:drm_atomic_check_only] checking ffff8800b91af800
>[   69.766249] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.766251] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.766253] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88021fbd76c0 state to ffff8800b91af800
>[   69.766255] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880200fbe780 state to ffff8800b91af800
>[   69.766259] [drm:drm_atomic_commit] commiting ffff8800b91af800
>[   69.766281] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af800
>[   69.766283] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af800
>[   69.785259] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712ce00
>[   69.785264] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b794fc00 state to ffff8800b712ce00
>[   69.785266] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91a5000 state to ffff8800b712ce00
>[   69.785268] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b794fc00 to [CRTC:21]
>[   69.785270] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff8800b794fc00
>[   69.785271] [drm:drm_atomic_check_only] checking ffff8800b712ce00
>[   69.785275] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.785277] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.785281] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b794f900 state to ffff8800b712ce00
>[   69.785283] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b794fe40 state to ffff8800b712ce00
>[   69.785287] [drm:drm_atomic_commit] commiting ffff8800b712ce00
>[   69.785305] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712ce00
>[   69.785308] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712ce00
>[   69.794259] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712c400
>[   69.794263] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b794f840 state to ffff8800b712c400
>[   69.794266] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91a0400 state to ffff8800b712c400
>[   69.794268] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b794f840 to [CRTC:21]
>[   69.794270] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff8800b794f840
>[   69.794271] [drm:drm_atomic_check_only] checking ffff8800b712c400
>[   69.794276] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.794277] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.794280] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b794ff00 state to ffff8800b712c400
>[   69.794282] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b794f180 state to ffff8800b712c400
>[   69.794285] [drm:drm_atomic_commit] commiting ffff8800b712c400
>[   69.794303] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712c400
>[   69.794305] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712c400
>[   69.804234] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712c800
>[   69.804238] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b794fe40 state to ffff8800b712c800
>[   69.804241] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91a5000 state to ffff8800b712c800
>[   69.804242] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b794fe40 to [CRTC:21]
>[   69.804244] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff8800b794fe40
>[   69.804245] [drm:drm_atomic_check_only] checking ffff8800b712c800
>[   69.804249] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.804251] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.804254] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b794fc00 state to ffff8800b712c800
>[   69.804256] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b794f900 state to ffff8800b712c800
>[   69.804260] [drm:drm_atomic_commit] commiting ffff8800b712c800
>[   69.804277] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712c800
>[   69.804280] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712c800
>[   69.814219] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712c000
>[   69.814223] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b794f180 state to ffff8800b712c000
>[   69.814226] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91a0400 state to ffff8800b712c000
>[   69.814228] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b794f180 to [CRTC:21]
>[   69.814229] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff8800b794f180
>[   69.814231] [drm:drm_atomic_check_only] checking ffff8800b712c000
>[   69.814235] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.814237] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.814240] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b794f840 state to ffff8800b712c000
>[   69.814242] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b794ff00 state to ffff8800b712c000
>[   69.814245] [drm:drm_atomic_commit] commiting ffff8800b712c000
>[   69.814263] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712c000
>[   69.814265] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712c000
>[   69.823221] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712c000
>[   69.823225] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b794f900 state to ffff8800b712c000
>[   69.823229] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91a5000 state to ffff8800b712c000
>[   69.823230] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b794f900 to [CRTC:21]
>[   69.823232] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff8800b794f900
>[   69.823235] [drm:drm_atomic_check_only] checking ffff8800b712c000
>[   69.823239] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.823241] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.823244] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b794fe40 state to ffff8800b712c000
>[   69.823246] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b794fc00 state to ffff8800b712c000
>[   69.823249] [drm:drm_atomic_commit] commiting ffff8800b712c000
>[   69.823266] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712c000
>[   69.823268] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712c000
>[   69.833237] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712c800
>[   69.833241] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b794ff00 state to ffff8800b712c800
>[   69.833244] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91a0400 state to ffff8800b712c800
>[   69.833246] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b794ff00 to [CRTC:21]
>[   69.833247] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff8800b794ff00
>[   69.833249] [drm:drm_atomic_check_only] checking ffff8800b712c800
>[   69.833253] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.833255] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.833259] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b794f180 state to ffff8800b712c800
>[   69.833261] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b794f840 state to ffff8800b712c800
>[   69.833264] [drm:drm_atomic_commit] commiting ffff8800b712c800
>[   69.833280] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712c800
>[   69.833282] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712c800
>[   69.843333] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712c400
>[   69.843338] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b794fc00 state to ffff8800b712c400
>[   69.843341] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91a5000 state to ffff8800b712c400
>[   69.843343] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b794fc00 to [CRTC:21]
>[   69.843345] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff8800b794fc00
>[   69.843346] [drm:drm_atomic_check_only] checking ffff8800b712c400
>[   69.843351] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.843352] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.843355] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b794f900 state to ffff8800b712c400
>[   69.843357] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b794fe40 state to ffff8800b712c400
>[   69.843360] [drm:drm_atomic_commit] commiting ffff8800b712c400
>[   69.843378] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712c400
>[   69.843381] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712c400
>[   69.852401] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712ce00
>[   69.852406] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b794f840 state to ffff8800b712ce00
>[   69.852408] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91a0400 state to ffff8800b712ce00
>[   69.852410] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b794f840 to [CRTC:21]
>[   69.852412] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff8800b794f840
>[   69.852413] [drm:drm_atomic_check_only] checking ffff8800b712ce00
>[   69.852417] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.852419] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.852422] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b794ff00 state to ffff8800b712ce00
>[   69.852424] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b794f180 state to ffff8800b712ce00
>[   69.852428] [drm:drm_atomic_commit] commiting ffff8800b712ce00
>[   69.852446] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712ce00
>[   69.852449] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712ce00
>[   69.891081] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712fe00
>[   69.891086] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b794fe40 state to ffff8800b712fe00
>[   69.891089] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91a7000 state to ffff8800b712fe00
>[   69.891090] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b794fe40 to [CRTC:21]
>[   69.891092] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff8800b794fe40
>[   69.891094] [drm:drm_atomic_check_only] checking ffff8800b712fe00
>[   69.891098] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.891100] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.891103] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b794fc00 state to ffff8800b712fe00
>[   69.891105] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b794f900 state to ffff8800b712fe00
>[   69.891108] [drm:drm_atomic_commit] commiting ffff8800b712fe00
>[   69.891129] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712fe00
>[   69.891131] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712fe00
>[   69.901132] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712ee00
>[   69.901136] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b794f180 state to ffff8800b712ee00
>[   69.901139] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91a7800 state to ffff8800b712ee00
>[   69.901141] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b794f180 to [CRTC:21]
>[   69.901142] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff8800b794f180
>[   69.901143] [drm:drm_atomic_check_only] checking ffff8800b712ee00
>[   69.901148] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.901149] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.901152] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b794f840 state to ffff8800b712ee00
>[   69.901154] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b794ff00 state to ffff8800b712ee00
>[   69.901158] [drm:drm_atomic_commit] commiting ffff8800b712ee00
>[   69.901174] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712ee00
>[   69.901176] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712ee00
>[   69.911473] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712f400
>[   69.911477] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b794f900 state to ffff8800b712f400
>[   69.911480] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91a7000 state to ffff8800b712f400
>[   69.911482] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b794f900 to [CRTC:21]
>[   69.911484] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff8800b794f900
>[   69.911485] [drm:drm_atomic_check_only] checking ffff8800b712f400
>[   69.911489] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.911491] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.911494] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b794fe40 state to ffff8800b712f400
>[   69.911496] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b794fc00 state to ffff8800b712f400
>[   69.911499] [drm:drm_atomic_commit] commiting ffff8800b712f400
>[   69.911517] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712f400
>[   69.911519] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712f400
>[   69.920432] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712c200
>[   69.920437] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b794f180 state to ffff8800b712c200
>[   69.920440] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91a7800 state to ffff8800b712c200
>[   69.920442] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b794f180 to [CRTC:21]
>[   69.920443] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff8800b794f180
>[   69.920445] [drm:drm_atomic_check_only] checking ffff8800b712c200
>[   69.920450] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.920451] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.920454] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b794f840 state to ffff8800b712c200
>[   69.920456] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b794f240 state to ffff8800b712c200
>[   69.920459] [drm:drm_atomic_commit] commiting ffff8800b712c200
>[   69.920476] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712c200
>[   69.920478] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712c200
>[   69.930467] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712fa00
>[   69.930472] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b794fc00 state to ffff8800b712fa00
>[   69.930475] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91a7000 state to ffff8800b712fa00
>[   69.930477] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b794fc00 to [CRTC:21]
>[   69.930478] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff8800b794fc00
>[   69.930479] [drm:drm_atomic_check_only] checking ffff8800b712fa00
>[   69.930484] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.930485] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.930488] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b794f900 state to ffff8800b712fa00
>[   69.930490] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b794fe40 state to ffff8800b712fa00
>[   69.930494] [drm:drm_atomic_commit] commiting ffff8800b712fa00
>[   69.930510] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712fa00
>[   69.930513] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712fa00
>[   69.940029] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712f400
>[   69.940033] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b794f240 state to ffff8800b712f400
>[   69.940036] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91a7800 state to ffff8800b712f400
>[   69.940038] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b794f240 to [CRTC:21]
>[   69.940039] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff8800b794f240
>[   69.940041] [drm:drm_atomic_check_only] checking ffff8800b712f400
>[   69.940046] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.940047] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.940050] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b794f180 state to ffff8800b712f400
>[   69.940052] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b794f840 state to ffff8800b712f400
>[   69.940055] [drm:drm_atomic_commit] commiting ffff8800b712f400
>[   69.940073] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712f400
>[   69.940075] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712f400
>[   69.978815] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712ee00
>[   69.978820] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b794fe40 state to ffff8800b712ee00
>[   69.978823] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91a7000 state to ffff8800b712ee00
>[   69.978824] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b794fe40 to [CRTC:21]
>[   69.978826] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff8800b794fe40
>[   69.978827] [drm:drm_atomic_check_only] checking ffff8800b712ee00
>[   69.978833] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.978835] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.978837] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b794fc00 state to ffff8800b712ee00
>[   69.978839] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b794f900 state to ffff8800b712ee00
>[   69.978843] [drm:drm_atomic_commit] commiting ffff8800b712ee00
>[   69.978861] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712ee00
>[   69.978863] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712ee00
>[   69.987867] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b91af800
>[   69.987871] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880200fbeb40 state to ffff8800b91af800
>[   69.987873] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88021db2d800 state to ffff8800b91af800
>[   69.987874] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880200fbeb40 to [CRTC:21]
>[   69.987875] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff880200fbeb40
>[   69.987876] [drm:drm_atomic_check_only] checking ffff8800b91af800
>[   69.987880] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.987881] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.987882] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880200fbec00 state to ffff8800b91af800
>[   69.987884] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880200fbe300 state to ffff8800b91af800
>[   69.987886] [drm:drm_atomic_commit] commiting ffff8800b91af800
>[   69.987903] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b91af800
>[   69.987905] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b91af800
>[   69.997845] [drm:drm_atomic_state_init] Allocated atomic state ffff8800b712fe00
>[   69.997849] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800b794f840 state to ffff8800b712fe00
>[   69.997852] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800b91a7800 state to ffff8800b712fe00
>[   69.997853] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800b794f840 to [CRTC:21]
>[   69.997855] [drm:drm_atomic_set_fb_for_plane] Set [FB:70] for plane state ffff8800b794f840
>[   69.997857] [drm:drm_atomic_check_only] checking ffff8800b712fe00
>[   69.997862] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 70
>[   69.997864] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   69.997866] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800b794f240 state to ffff8800b712fe00
>[   69.997868] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800b794f180 state to ffff8800b712fe00
>[   69.997872] [drm:drm_atomic_commit] commiting ffff8800b712fe00
>[   69.997889] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800b712fe00
>[   69.997891] [drm:drm_atomic_state_free] Freeing atomic state ffff8800b712fe00
>[   70.559408] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[   70.559414] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007

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Attachments on bug 92308: 118694 | 118695

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