Attachment 120423 Details for Bug 93264 – llvm-c0a189c.mesa-caf12bebd.run008.shader.16f00d

llvm-c0a189c.mesa-caf12bebd.run008.shader.16f00d

llvm-c0a189c.mesa-caf12bebd.run008.shader.16f00d (text/plain), 168.82 KB, created by Nicolai Hähnle on 2015-12-08 22:14:36 UTC

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Description:

Filename:

MIME Type:

Creator: Nicolai Hähnle

Created: 2015-12-08 22:14:36 UTC

Size: 168.82 KB

patch

obsolete

>SHADER KEY
>  export_16bpc = 0x3F
>  last_cbuf = 0
>  color_two_side = 0
>  alpha_func = 7
>  alpha_to_one = 0
>  poly_stipple = 0
>  clamp_color = 0
>FRAG
>DCL IN[0], FACE, CONSTANT
>DCL IN[1], GENERIC[0], PERSPECTIVE
>DCL IN[2], GENERIC[1], PERSPECTIVE
>DCL IN[3], GENERIC[2], PERSPECTIVE
>DCL IN[4], GENERIC[3], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL OUT[1], COLOR[1]
>DCL OUT[2], COLOR[2]
>DCL OUT[3], COLOR[3]
>DCL OUT[4], COLOR[4]
>DCL OUT[5], COLOR[5]
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SAMP[6]
>DCL SAMP[7]
>DCL SAMP[8]
>DCL SAMP[9]
>DCL SAMP[10]
>DCL SAMP[11]
>DCL SAMP[12]
>DCL SVIEW[0], 2D, FLOAT
>DCL SVIEW[1], 2D, FLOAT
>DCL SVIEW[2], 2D, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL SVIEW[6], 2D, FLOAT
>DCL SVIEW[7], 2D, FLOAT
>DCL SVIEW[8], 2D, FLOAT
>DCL SVIEW[9], 2D, FLOAT
>DCL SVIEW[10], 2D, FLOAT
>DCL SVIEW[11], 2D, FLOAT
>DCL SVIEW[12], 2D, FLOAT
>DCL CONST[0..2]
>DCL CONST[1][0..1]
>DCL CONST[2][0..120]
>DCL CONST[3][0..16]
>DCL TEMP[0]
>DCL TEMP[1..18], LOCAL
>IMM[0] FLT32 {    0.0000,     0.5000,    -0.5000,     0.0300}
>IMM[1] UINT32 {0, 1, 48, 32}
>IMM[2] UINT32 {16, 672, 656, 624}
>IMM[3] UINT32 {828, 2, 156, 840}
>IMM[4] INT32 {1, -1, 0, 0}
>IMM[5] FLT32 {   -0.4000,     1.5000,     3.0000,     2.0000}
>IMM[6] FLT32 {   -1.0000,     1.0000,    13.0000,     6.0000}
>IMM[7] FLT32 {    0.1000,     0.2000,    -0.0400,    -0.5500}
>IMM[8] FLT32 {    4.0000,     0.0700,     0.2800,    -0.3900}
>IMM[9] FLT32 {    3.0000,     1.0000,    -0.0550,    -0.3000}
>IMM[10] FLT32 {   -0.1000,     6.0000,     3.0000,    -0.2000}
>IMM[11] FLT32 {   -0.6500,     8.0000,     6.0000,    -0.9000}
>IMM[12] UINT32 {768, 784, 736, 752}
>IMM[13] FLT32 {    0.3300,    -0.1900,    -0.0700,     1.5708}
>IMM[14] FLT32 {    4.0000,     2.0000,    10.0000,     0.0000}
>IMM[15] FLT32 {    2.4000,     3.6000,     0.0000,     0.1500}
>IMM[16] FLT32 {  128.0000,    23.7676,     0.0000,     0.0400}
>IMM[17] FLT32 {    3.0000,     1.5000,     0.0000,     0.8000}
>IMM[18] FLT32 {   50.0000,     0.2821,    -0.4886,     0.4886}
>IMM[19] FLT32 {    0.8862,     2.0944,    -0.8000,    -0.0200}
>IMM[20] UINT32 {856, 1632, 860, 172}
>IMM[21] FLT32 {   -0.3200,   100.0000,    50.0000,     0.0000}
>IMM[22] FLT32 {    5.0000,     1.0000,     0.0000,     0.0078}
>IMM[23] FLT32 {    0.2500,     0.0000,   -64.3406,   -72.4656}
>IMM[24] FLT32 {    0.3000,     0.5900,     0.1100,     0.3333}
>IMM[25] UINT32 {176, 0, 0, 0}
>IMM[26] FLT32 {   20.3906,    60.7031,     2.4281,     0.0039}
>IMM[27] FLT32 {    0.0039,     0.0625,     0.0000,     0.5000}
>IMM[28] FLT32 {    0.0000,     0.5000,     0.0039,     0.0000}
>  0: FSGE TEMP[0], IN[0], IMM[0].xxxx
>  1: MUL TEMP[1].xyz, IN[2].zxyy, IN[1].yzxx
>  2: MAD TEMP[2].xyz, IN[2].yzxx, IN[1].zxyy, -TEMP[1].xyzz
>  3: MUL TEMP[2].xyz, TEMP[2].xyzz, IN[2].wwww
>  4: MUL TEMP[3], CONST[2][1], IN[4].yyyy
>  5: MAD TEMP[3], CONST[2][0], IN[4].xxxx, TEMP[3]
>  6: MAD TEMP[3], CONST[2][2], IN[4].zzzz, TEMP[3]
>  7: MAD TEMP[3].xyw, CONST[2][3], IN[4].wwww, TEMP[3]
>  8: RCP TEMP[4].xy, TEMP[3].wwww
>  9: MUL TEMP[3].xy, TEMP[3].xyyy, TEMP[4].xyyy
> 10: MAD TEMP[3].xy, TEMP[3].xyyy, IMM[0].yzzz, IMM[0].yyyy
> 11: MAD TEMP[3].xy, TEMP[3].xyyy, CONST[2][42].xyyy, CONST[2][41].xyyy
> 12: MOV TEMP[4].xyz, -IN[4].xyzx
> 13: DP3 TEMP[5].x, TEMP[4].xyzz, TEMP[4].xyzz
> 14: RSQ TEMP[5].x, TEMP[5].xxxx
> 15: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[5].xxxx
> 16: MUL TEMP[5].x, CONST[2][51].wwww, CONST[3][9].wwww
> 17: NOT TEMP[6].x, TEMP[0].xxxx
> 18: UIF TEMP[6].xxxx :1
> 19:   MOV TEMP[6].x, IMM[4].xxxx
> 20: ELSE :1
> 21:   MOV TEMP[6].x, IMM[4].yyyy
> 22: ENDIF
> 23: MUL TEMP[7].x, CONST[2][52].zzzz, IMM[0].wwww
> 24: MUL TEMP[8].x, CONST[2][52].zzzz, IMM[5].xxxx
> 25: MOV TEMP[7].y, TEMP[8].xxxx
> 26: MAD TEMP[7].xy, IN[3].xyyy, IMM[5].yzzz, TEMP[7].xyyy
> 27: MOV TEMP[7].xy, TEMP[7].xyyy
> 28: TEX TEMP[7].xy, TEMP[7], SAMP[12], 2D
> 29: MAD TEMP[7].xy, TEMP[7].xyyy, IMM[5].wwww, IMM[6].xxxx
> 30: MOV TEMP[8].xy, TEMP[7].xyxx
> 31: DP2 TEMP[7].x, TEMP[7].xyyy, TEMP[7].xyyy
> 32: ADD TEMP[7].x, IMM[6].yyyy, -TEMP[7].xxxx
> 33: MOV_SAT TEMP[7].x, TEMP[7].xxxx
> 34: SQRT TEMP[7].x, TEMP[7].xxxx
> 35: MOV TEMP[8].z, TEMP[7].xxxx
> 36: MOV TEMP[7].x, IMM[0].xxxx
> 37: MUL TEMP[9].x, CONST[2][52].zzzz, IMM[5].xxxx
> 38: MOV TEMP[7].y, TEMP[9].xxxx
> 39: MAD TEMP[7].xy, IN[3].xyyy, IMM[6].zwww, TEMP[7].xyyy
> 40: MOV TEMP[7].xy, TEMP[7].xyyy
> 41: TEX TEMP[7].xy, TEMP[7], SAMP[11], 2D
> 42: MAD TEMP[7].xy, TEMP[7].xyyy, IMM[5].wwww, IMM[6].xxxx
> 43: MOV TEMP[9].xy, TEMP[7].xyxx
> 44: DP2 TEMP[7].x, TEMP[7].xyyy, TEMP[7].xyyy
> 45: ADD TEMP[7].x, IMM[6].yyyy, -TEMP[7].xxxx
> 46: MOV_SAT TEMP[7].x, TEMP[7].xxxx
> 47: SQRT TEMP[7].x, TEMP[7].xxxx
> 48: MOV TEMP[9].z, TEMP[7].xxxx
> 49: MUL TEMP[7].x, CONST[2][52].zzzz, IMM[7].xxxx
> 50: MUL TEMP[10].x, CONST[2][52].zzzz, IMM[7].yyyy
> 51: MOV TEMP[7].y, TEMP[10].xxxx
> 52: MUL TEMP[10].x, CONST[2][52].zzzz, IMM[7].zzzz
> 53: MUL TEMP[11].x, CONST[2][52].zzzz, IMM[7].wwww
> 54: MOV TEMP[10].y, TEMP[11].xxxx
> 55: MAD TEMP[7].xy, IN[3].xyyy, IMM[8].xxxx, TEMP[7].xyyy
> 56: MOV TEMP[7].xy, TEMP[7].xyyy
> 57: TEX TEMP[7].x, TEMP[7], SAMP[10], 2D
> 58: MUL TEMP[7].x, TEMP[7].xxxx, IMM[8].yyyy
> 59: MAD TEMP[7].xy, IN[3].xyyy, IMM[6].zwww, TEMP[7].xxxx
> 60: ADD TEMP[7].xy, TEMP[10].xyyy, TEMP[7].xyyy
> 61: MOV TEMP[10].xy, TEMP[7].xyyy
> 62: TEX TEMP[10].xy, TEMP[10], SAMP[9], 2D
> 63: MAD TEMP[10].xy, TEMP[10].xyyy, IMM[5].wwww, IMM[6].xxxx
> 64: MOV TEMP[11].xy, TEMP[10].xyxx
> 65: DP2 TEMP[10].x, TEMP[10].xyyy, TEMP[10].xyyy
> 66: ADD TEMP[10].x, IMM[6].yyyy, -TEMP[10].xxxx
> 67: MOV_SAT TEMP[10].x, TEMP[10].xxxx
> 68: SQRT TEMP[10].x, TEMP[10].xxxx
> 69: MOV TEMP[11].z, TEMP[10].xxxx
> 70: MOV TEMP[10].xy, IN[3].zwww
> 71: TEX TEMP[10].x, TEMP[10], SAMP[7], 2D
> 72: ADD TEMP[10].x, IMM[6].yyyy, -TEMP[10].xxxx
> 73: MAD TEMP[10].x, TEMP[10].xxxx, IMM[8].zzzz, IMM[8].wwww
> 74: MUL TEMP[12].x, CONST[2][52].zzzz, IMM[7].xxxx
> 75: MUL TEMP[13].x, CONST[2][52].zzzz, IMM[7].xxxx
> 76: MOV TEMP[12].y, TEMP[13].xxxx
> 77: MAD TEMP[12].xy, IN[3].xyyy, IMM[9].xyyy, TEMP[12].xyyy
> 78: MOV TEMP[12].xy, TEMP[12].xyyy
> 79: TEX TEMP[12].x, TEMP[12], SAMP[10], 2D
> 80: MUL TEMP[12].x, TEMP[12].xxxx, IMM[7].xxxx
> 81: DP3 TEMP[13].x, IN[1].xyzz, TEMP[4].xyzz
> 82: DP3 TEMP[14].x, TEMP[2].xyzz, TEMP[4].xyzz
> 83: MOV TEMP[13].y, TEMP[14].xxxx
> 84: MUL TEMP[14].x, CONST[2][52].zzzz, IMM[9].zzzz
> 85: MUL TEMP[15].x, CONST[2][52].zzzz, IMM[9].wwww
> 86: MOV TEMP[14].y, TEMP[15].xxxx
> 87: MAD TEMP[15].x, IMM[7].yyyy, TEMP[12].xxxx, IMM[10].xxxx
> 88: MAD TEMP[12].xy, IN[3].xyyy, IMM[10].yzzz, TEMP[12].xxxx
> 89: MAD TEMP[12].xy, TEMP[13].xyyy, TEMP[15].xxxx, TEMP[12].xyyy
> 90: ADD TEMP[12].xy, TEMP[14].xyyy, TEMP[12].xyyy
> 91: MOV TEMP[13].xy, TEMP[12].xyyy
> 92: TEX TEMP[13].xy, TEMP[13], SAMP[9], 2D
> 93: MAD TEMP[13].xy, TEMP[13].xyyy, IMM[5].wwww, IMM[6].xxxx
> 94: MOV TEMP[14].xy, TEMP[13].xyxx
> 95: DP2 TEMP[13].x, TEMP[13].xyyy, TEMP[13].xyyy
> 96: ADD TEMP[13].x, IMM[6].yyyy, -TEMP[13].xxxx
> 97: MOV_SAT TEMP[13].x, TEMP[13].xxxx
> 98: SQRT TEMP[13].x, TEMP[13].xxxx
> 99: MOV TEMP[14].z, TEMP[13].xxxx
>100: MUL TEMP[13].x, CONST[2][52].zzzz, IMM[10].wwww
>101: MUL TEMP[15].x, CONST[2][52].zzzz, IMM[11].xxxx
>102: MOV TEMP[13].y, TEMP[15].xxxx
>103: MAD TEMP[13].xy, IN[3].xyyy, IMM[11].yzzz, TEMP[13].xyyy
>104: MOV TEMP[15].xy, TEMP[13].xyyy
>105: TEX TEMP[15].xy, TEMP[15], SAMP[4], 2D
>106: MAD TEMP[15].xy, TEMP[15].xyyy, IMM[5].wwww, IMM[6].xxxx
>107: MOV TEMP[16].xy, TEMP[15].xyxx
>108: DP2 TEMP[15].x, TEMP[15].xyyy, TEMP[15].xyyy
>109: ADD TEMP[15].x, IMM[6].yyyy, -TEMP[15].xxxx
>110: MOV_SAT TEMP[15].x, TEMP[15].xxxx
>111: SQRT TEMP[15].x, TEMP[15].xxxx
>112: MOV TEMP[16].z, TEMP[15].xxxx
>113: MOV TEMP[15].xy, TEMP[7].xyyy
>114: TEX TEMP[15].w, TEMP[15], SAMP[8], 2D
>115: ADD TEMP[15].x, IMM[6].yyyy, -TEMP[15].wwww
>116: ADD TEMP[15].x, TEMP[15].xxxx, TEMP[10].xxxx
>117: MOV TEMP[15].xy, TEMP[15].xxxx
>118: TEX TEMP[15].x, TEMP[15], SAMP[6], 2D
>119: MOV TEMP[7].xy, TEMP[7].xyyy
>120: TEX TEMP[7].x, TEMP[7], SAMP[5], 2D
>121: ADD TEMP[7].x, IMM[6].yyyy, -TEMP[7].xxxx
>122: ADD TEMP[7].x, TEMP[15].xxxx, -TEMP[7].xxxx
>123: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>124: LRP TEMP[7].xyz, TEMP[7].xxxx, TEMP[11].xyzz, TEMP[9].xyzz
>125: MOV TEMP[9].xy, TEMP[12].xyyy
>126: TEX TEMP[9].w, TEMP[9], SAMP[8], 2D
>127: ADD TEMP[9].x, IMM[6].yyyy, -TEMP[9].wwww
>128: ADD TEMP[9].x, TEMP[9].xxxx, TEMP[10].xxxx
>129: MOV TEMP[9].xy, TEMP[9].xxxx
>130: TEX TEMP[9].x, TEMP[9], SAMP[6], 2D
>131: MOV TEMP[10].xy, TEMP[12].xyyy
>132: TEX TEMP[10].x, TEMP[10], SAMP[5], 2D
>133: ADD TEMP[10].x, IMM[6].yyyy, -TEMP[10].xxxx
>134: ADD TEMP[9].x, TEMP[9].xxxx, -TEMP[10].xxxx
>135: MOV_SAT TEMP[9].x, TEMP[9].xxxx
>136: LRP TEMP[7].xyz, TEMP[9].xxxx, TEMP[14].xyzz, TEMP[7].xyzz
>137: MOV TEMP[9].xy, IN[3].zwww
>138: TEX TEMP[9].z, TEMP[9], SAMP[7], 2D
>139: LRP TEMP[7].xyz, TEMP[9].zzzz, TEMP[7].xyzz, TEMP[8].xyzz
>140: MOV TEMP[8].xy, IN[3].zwww
>141: TEX TEMP[8].w, TEMP[8], SAMP[7], 2D
>142: MOV TEMP[9].xy, TEMP[13].xyyy
>143: TEX TEMP[9].x, TEMP[9], SAMP[10], 2D
>144: ADD TEMP[9].x, IMM[6].yyyy, -TEMP[9].xxxx
>145: MAD TEMP[8].x, TEMP[8].wwww, IMM[11].wwww, TEMP[9].xxxx
>146: MOV TEMP[8].xy, TEMP[8].xxxx
>147: TEX TEMP[8].x, TEMP[8], SAMP[3], 2D
>148: MOV_SAT TEMP[8].x, TEMP[8].xxxx
>149: LRP TEMP[7].xyz, TEMP[8].xxxx, TEMP[16].xyzz, TEMP[7].xyzz
>150: MAD TEMP[7].xyz, TEMP[7].xyzz, CONST[2][48].wwww, CONST[2][48].xyzz
>151: I2F TEMP[6].x, TEMP[6].xxxx
>152: MUL TEMP[5].x, TEMP[5].xxxx, TEMP[6].xxxx
>153: MUL TEMP[5].xyz, TEMP[7].xyzz, TEMP[5].xxxx
>154: DP3 TEMP[6].x, TEMP[5].xyzz, TEMP[5].xyzz
>155: RSQ TEMP[6].x, TEMP[6].xxxx
>156: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[6].xxxx
>157: MUL TEMP[6].xyz, TEMP[2].xyzz, TEMP[5].yyyy
>158: MAD TEMP[6].xyz, IN[1].xyzz, TEMP[5].xxxx, TEMP[6].xyzz
>159: MAD TEMP[5].xyz, IN[2].xyzz, TEMP[5].zzzz, TEMP[6].xyzz
>160: DP3 TEMP[6].x, TEMP[5].xyzz, TEMP[5].xyzz
>161: RSQ TEMP[6].x, TEMP[6].xxxx
>162: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[6].xxxx
>163: MUL TEMP[6].x, CONST[2][52].zzzz, IMM[7].xxxx
>164: MUL TEMP[7].x, CONST[2][52].zzzz, IMM[7].xxxx
>165: MOV TEMP[6].y, TEMP[7].xxxx
>166: MAD TEMP[6].xy, IN[3].xyyy, IMM[9].xyyy, TEMP[6].xyyy
>167: MOV TEMP[6].xy, TEMP[6].xyyy
>168: TEX TEMP[6].x, TEMP[6], SAMP[10], 2D
>169: MUL TEMP[6].x, TEMP[6].xxxx, IMM[7].xxxx
>170: DP3 TEMP[7].x, IN[1].xyzz, TEMP[4].xyzz
>171: DP3 TEMP[8].x, TEMP[2].xyzz, TEMP[4].xyzz
>172: MOV TEMP[7].y, TEMP[8].xxxx
>173: MUL TEMP[8].x, CONST[2][52].zzzz, IMM[9].zzzz
>174: MUL TEMP[9].x, CONST[2][52].zzzz, IMM[9].wwww
>175: MOV TEMP[8].y, TEMP[9].xxxx
>176: MAD TEMP[9].x, IMM[7].yyyy, TEMP[6].xxxx, IMM[10].xxxx
>177: MAD TEMP[6].xy, IN[3].xyyy, IMM[10].yzzz, TEMP[6].xxxx
>178: MAD TEMP[6].xy, TEMP[7].xyyy, TEMP[9].xxxx, TEMP[6].xyyy
>179: ADD TEMP[6].xy, TEMP[8].xyyy, TEMP[6].xyyy
>180: MUL TEMP[7].x, CONST[2][52].zzzz, IMM[0].wwww
>181: MUL TEMP[8].x, CONST[2][52].zzzz, IMM[5].xxxx
>182: MOV TEMP[7].y, TEMP[8].xxxx
>183: MUL TEMP[8].x, CONST[2][52].zzzz, IMM[10].wwww
>184: MUL TEMP[9].x, CONST[2][52].zzzz, IMM[11].xxxx
>185: MOV TEMP[8].y, TEMP[9].xxxx
>186: MOV TEMP[9].xy, TEMP[6].xyyy
>187: TEX TEMP[9].w, TEMP[9], SAMP[8], 2D
>188: ADD TEMP[9].x, IMM[6].yyyy, -TEMP[9].wwww
>189: MOV TEMP[10].xy, IN[3].zwww
>190: TEX TEMP[10].x, TEMP[10], SAMP[7], 2D
>191: ADD TEMP[10].x, IMM[6].yyyy, -TEMP[10].xxxx
>192: MAD TEMP[10].x, TEMP[10].xxxx, IMM[8].zzzz, IMM[8].wwww
>193: ADD TEMP[9].x, TEMP[9].xxxx, TEMP[10].xxxx
>194: MOV TEMP[9].xy, TEMP[9].xxxx
>195: TEX TEMP[9].x, TEMP[9], SAMP[6], 2D
>196: MOV TEMP[6].xy, TEMP[6].xyyy
>197: TEX TEMP[6].x, TEMP[6], SAMP[5], 2D
>198: ADD TEMP[6].x, IMM[6].yyyy, -TEMP[6].xxxx
>199: ADD TEMP[6].x, TEMP[9].xxxx, -TEMP[6].xxxx
>200: MOV_SAT TEMP[6].x, TEMP[6].xxxx
>201: MOV TEMP[9].xy, IN[3].zwww
>202: TEX TEMP[9].z, TEMP[9], SAMP[7], 2D
>203: ADD TEMP[6].x, TEMP[6].xxxx, TEMP[9].zzzz
>204: MAD TEMP[7].xy, IN[3].xyyy, IMM[5].yzzz, TEMP[7].xyyy
>205: MOV TEMP[7].xy, TEMP[7].xyyy
>206: TEX TEMP[7].w, TEMP[7], SAMP[1], 2D
>207: ADD TEMP[6].x, TEMP[6].xxxx, TEMP[7].wwww
>208: MOV_SAT TEMP[6].x, TEMP[6].xxxx
>209: MOV TEMP[7].xy, IN[3].zwww
>210: TEX TEMP[7].w, TEMP[7], SAMP[7], 2D
>211: MAD TEMP[8].xy, IN[3].xyyy, IMM[11].yzzz, TEMP[8].xyyy
>212: MOV TEMP[8].xy, TEMP[8].xyyy
>213: TEX TEMP[8].x, TEMP[8], SAMP[10], 2D
>214: ADD TEMP[8].x, IMM[6].yyyy, -TEMP[8].xxxx
>215: MAD TEMP[7].x, TEMP[7].wwww, IMM[11].wwww, TEMP[8].xxxx
>216: MOV TEMP[7].xy, TEMP[7].xxxx
>217: TEX TEMP[7].x, TEMP[7], SAMP[3], 2D
>218: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>219: ADD TEMP[6].x, TEMP[6].xxxx, TEMP[7].xxxx
>220: FSLT TEMP[1].x, TEMP[6].xxxx, IMM[13].xxxx
>221: AND TEMP[1].x, TEMP[1].xxxx, IMM[6].yyyy
>222: KILL_IF -TEMP[1].xxxx
>223: MOV TEMP[1].x, IMM[0].xxxx
>224: MUL TEMP[6].x, CONST[2][52].zzzz, IMM[5].xxxx
>225: MOV TEMP[1].y, TEMP[6].xxxx
>226: MUL TEMP[6].x, CONST[2][52].zzzz, IMM[7].xxxx
>227: MUL TEMP[7].x, CONST[2][52].zzzz, IMM[7].yyyy
>228: MOV TEMP[6].y, TEMP[7].xxxx
>229: MUL TEMP[7].x, CONST[2][52].zzzz, IMM[7].zzzz
>230: MUL TEMP[8].x, CONST[2][52].zzzz, IMM[7].wwww
>231: MOV TEMP[7].y, TEMP[8].xxxx
>232: MAD TEMP[6].xy, IN[3].xyyy, IMM[8].xxxx, TEMP[6].xyyy
>233: MOV TEMP[6].xy, TEMP[6].xyyy
>234: TEX TEMP[6].x, TEMP[6], SAMP[10], 2D
>235: MUL TEMP[6].x, TEMP[6].xxxx, IMM[8].yyyy
>236: MAD TEMP[6].xy, IN[3].xyyy, IMM[6].zwww, TEMP[6].xxxx
>237: ADD TEMP[6].xy, TEMP[7].xyyy, TEMP[6].xyyy
>238: MOV TEMP[7].xy, IN[3].zwww
>239: TEX TEMP[7].x, TEMP[7], SAMP[7], 2D
>240: ADD TEMP[7].x, IMM[6].yyyy, -TEMP[7].xxxx
>241: MAD TEMP[7].x, TEMP[7].xxxx, IMM[8].zzzz, IMM[8].wwww
>242: MUL TEMP[8].x, CONST[2][52].zzzz, IMM[7].xxxx
>243: MUL TEMP[9].x, CONST[2][52].zzzz, IMM[7].xxxx
>244: MOV TEMP[8].y, TEMP[9].xxxx
>245: MAD TEMP[8].xy, IN[3].xyyy, IMM[9].xyyy, TEMP[8].xyyy
>246: MOV TEMP[8].xy, TEMP[8].xyyy
>247: TEX TEMP[8].x, TEMP[8], SAMP[10], 2D
>248: MUL TEMP[8].x, TEMP[8].xxxx, IMM[7].xxxx
>249: DP3 TEMP[9].x, IN[1].xyzz, TEMP[4].xyzz
>250: DP3 TEMP[10].x, TEMP[2].xyzz, TEMP[4].xyzz
>251: MOV TEMP[9].y, TEMP[10].xxxx
>252: MUL TEMP[10].x, CONST[2][52].zzzz, IMM[9].zzzz
>253: MUL TEMP[11].x, CONST[2][52].zzzz, IMM[9].wwww
>254: MOV TEMP[10].y, TEMP[11].xxxx
>255: MAD TEMP[11].x, IMM[7].yyyy, TEMP[8].xxxx, IMM[10].xxxx
>256: MAD TEMP[8].xy, IN[3].xyyy, IMM[10].yzzz, TEMP[8].xxxx
>257: MAD TEMP[8].xy, TEMP[9].xyyy, TEMP[11].xxxx, TEMP[8].xyyy
>258: ADD TEMP[8].xy, TEMP[10].xyyy, TEMP[8].xyyy
>259: MUL TEMP[9].x, CONST[2][52].zzzz, IMM[7].xxxx
>260: MUL TEMP[10].x, CONST[2][52].zzzz, IMM[13].yyyy
>261: MOV TEMP[9].y, TEMP[10].xxxx
>262: MUL TEMP[10].x, CONST[2][52].zzzz, IMM[13].zzzz
>263: MOV TEMP[10].y, IMM[0].xxxx
>264: MUL TEMP[11].x, CONST[2][52].zzzz, IMM[10].wwww
>265: MUL TEMP[12].x, CONST[2][52].zzzz, IMM[11].xxxx
>266: MOV TEMP[11].y, TEMP[12].xxxx
>267: MAD TEMP[11].xy, IN[3].xyyy, IMM[11].yzzz, TEMP[11].xyyy
>268: MAD TEMP[1].xy, IN[3].xyyy, IMM[6].zwww, TEMP[1].xyyy
>269: MOV TEMP[1].xy, TEMP[1].xyyy
>270: TEX TEMP[1].xyz, TEMP[1], SAMP[2], 2D
>271: MUL TEMP[1].xyz, IMM[14].xyyy, TEMP[1].xyzz
>272: MOV TEMP[12].xy, TEMP[6].xyyy
>273: TEX TEMP[12].x, TEMP[12], SAMP[5], 2D
>274: LRP TEMP[12].xyz, TEMP[12].xxxx, IMM[17].xyzz, IMM[16].xyzz
>275: MOV TEMP[13].xy, TEMP[6].xyyy
>276: TEX TEMP[13].xyz, TEMP[13], SAMP[8], 2D
>277: MUL TEMP[12].xyz, TEMP[12].xyzz, TEMP[13].xyzz
>278: MOV_SAT TEMP[12].xyz, TEMP[12].xyzz
>279: MUL TEMP[12].xyz, IMM[15].xyzz, TEMP[12].xyzz
>280: MOV TEMP[13].xy, TEMP[6].xyyy
>281: TEX TEMP[13].w, TEMP[13], SAMP[8], 2D
>282: ADD TEMP[13].x, IMM[6].yyyy, -TEMP[13].wwww
>283: ADD TEMP[13].x, TEMP[13].xxxx, TEMP[7].xxxx
>284: MOV TEMP[13].xy, TEMP[13].xxxx
>285: TEX TEMP[13].x, TEMP[13], SAMP[6], 2D
>286: MOV TEMP[6].xy, TEMP[6].xyyy
>287: TEX TEMP[6].x, TEMP[6], SAMP[5], 2D
>288: ADD TEMP[6].x, IMM[6].yyyy, -TEMP[6].xxxx
>289: ADD TEMP[6].x, TEMP[13].xxxx, -TEMP[6].xxxx
>290: MOV_SAT TEMP[6].x, TEMP[6].xxxx
>291: LRP TEMP[1].xyz, TEMP[6].xxxx, TEMP[12].xyzz, TEMP[1].xyzz
>292: MOV TEMP[6].xy, TEMP[8].xyyy
>293: TEX TEMP[6].xyz, TEMP[6], SAMP[8], 2D
>294: MUL TEMP[6].xyz, TEMP[6].xyzz, IMM[14].zzww
>295: MOV TEMP[12].xy, TEMP[8].xyyy
>296: TEX TEMP[12].w, TEMP[12], SAMP[8], 2D
>297: ADD TEMP[12].x, IMM[6].yyyy, -TEMP[12].wwww
>298: ADD TEMP[7].x, TEMP[12].xxxx, TEMP[7].xxxx
>299: MOV TEMP[7].xy, TEMP[7].xxxx
>300: TEX TEMP[7].x, TEMP[7], SAMP[6], 2D
>301: MOV TEMP[8].xy, TEMP[8].xyyy
>302: TEX TEMP[8].x, TEMP[8], SAMP[5], 2D
>303: ADD TEMP[8].x, IMM[6].yyyy, -TEMP[8].xxxx
>304: ADD TEMP[7].x, TEMP[7].xxxx, -TEMP[8].xxxx
>305: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>306: LRP TEMP[1].xyz, TEMP[7].xxxx, TEMP[6].xyzz, TEMP[1].xyzz
>307: MAD TEMP[6].xy, IN[3].xyyy, IMM[5].yyyy, TEMP[9].xyyy
>308: MOV TEMP[6].xy, TEMP[6].xyyy
>309: TEX TEMP[6].x, TEMP[6], SAMP[10], 2D
>310: MAD TEMP[7].xy, IN[3].xyyy, IMM[5].wwww, TEMP[10].xyyy
>311: MOV TEMP[7].xy, TEMP[7].xyyy
>312: TEX TEMP[7].x, TEMP[7], SAMP[10], 2D
>313: MUL TEMP[8].x, CONST[2][52].zzzz, IMM[13].wwww
>314: SIN TEMP[8].x, TEMP[8].xxxx
>315: MOV_SAT TEMP[8].x, TEMP[8].xxxx
>316: LRP TEMP[6].x, TEMP[8].xxxx, TEMP[7].xxxx, TEMP[6].xxxx
>317: ADD TEMP[6].x, TEMP[6].xxxx, IMM[15].wwww
>318: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[6].xxxx
>319: MOV TEMP[6].xy, TEMP[11].xyyy
>320: TEX TEMP[6].xyz, TEMP[6], SAMP[0], 2D
>321: MOV TEMP[7].xy, IN[3].zwww
>322: TEX TEMP[7].w, TEMP[7], SAMP[7], 2D
>323: MOV TEMP[8].xy, TEMP[11].xyyy
>324: TEX TEMP[8].x, TEMP[8], SAMP[10], 2D
>325: ADD TEMP[8].x, IMM[6].yyyy, -TEMP[8].xxxx
>326: MAD TEMP[7].x, TEMP[7].wwww, IMM[11].wwww, TEMP[8].xxxx
>327: MOV TEMP[7].xy, TEMP[7].xxxx
>328: TEX TEMP[7].x, TEMP[7], SAMP[3], 2D
>329: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>330: LRP TEMP[1].xyz, TEMP[7].xxxx, TEMP[6].xyzz, TEMP[1].xyzz
>331: ADD TEMP[6].xyz, IMM[6].yyyy, -CONST[1][0].xyzz
>332: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[6].xyzz
>333: MOV_SAT TEMP[1].xyz, TEMP[1].xyzz
>334: MUL TEMP[6].x, CONST[2][52].zzzz, IMM[10].wwww
>335: MUL TEMP[7].x, CONST[2][52].zzzz, IMM[11].xxxx
>336: MOV TEMP[6].y, TEMP[7].xxxx
>337: MOV TEMP[7].xy, IN[3].zwww
>338: TEX TEMP[7].w, TEMP[7], SAMP[7], 2D
>339: MAD TEMP[6].xy, IN[3].xyyy, IMM[11].yzzz, TEMP[6].xyyy
>340: MOV TEMP[6].xy, TEMP[6].xyyy
>341: TEX TEMP[6].x, TEMP[6], SAMP[10], 2D
>342: ADD TEMP[6].x, IMM[6].yyyy, -TEMP[6].xxxx
>343: MAD TEMP[6].x, TEMP[7].wwww, IMM[11].wwww, TEMP[6].xxxx
>344: MOV TEMP[6].xy, TEMP[6].xxxx
>345: TEX TEMP[6].x, TEMP[6], SAMP[3], 2D
>346: MOV_SAT TEMP[6].x, TEMP[6].xxxx
>347: LRP TEMP[6].x, TEMP[6].xxxx, IMM[5].zzzz, IMM[18].xxxx
>348: MUL TEMP[6].x, TEMP[6].xxxx, IMM[16].wwww
>349: LRP TEMP[6].x, TEMP[6].xxxx, IMM[17].wwww, IMM[7].yyyy
>350: MAD TEMP[6].x, TEMP[6].xxxx, CONST[2][49].yyyy, CONST[2][49].xxxx
>351: MAX TEMP[6].x, IMM[16].wwww, TEMP[6].xxxx
>352: MAD TEMP[7].xyz, TEMP[1].xyzz, CONST[2][46].wwww, CONST[2][46].xyzz
>353: MAD TEMP[8].xyz, IMM[16].wwww, CONST[2][47].wwww, CONST[2][47].xyzz
>354: MUL TEMP[10].x, IMM[18].zzzz, TEMP[5].yyyy
>355: MOV TEMP[9].y, TEMP[10].xxxx
>356: MUL TEMP[10].x, IMM[18].wwww, TEMP[5].zzzz
>357: MOV TEMP[9].z, TEMP[10].xxxx
>358: MUL TEMP[10].x, IMM[18].zzzz, TEMP[5].xxxx
>359: MOV TEMP[9].w, TEMP[10].xxxx
>360: MOV TEMP[10].x, IMM[19].xxxx
>361: MUL TEMP[9].xyz, TEMP[9].yzww, IMM[19].yyyy
>362: MOV TEMP[10].yzw, TEMP[9].yxyz
>363: DP4 TEMP[9].x, CONST[0], TEMP[10]
>364: DP4 TEMP[11].x, CONST[1], TEMP[10]
>365: MOV TEMP[9].y, TEMP[11].xxxx
>366: DP4 TEMP[10].x, CONST[2], TEMP[10]
>367: MOV TEMP[9].z, TEMP[10].xxxx
>368: MAX TEMP[9].xyz, IMM[0].xxxx, TEMP[9].xyzz
>369: MOV TEMP[10].xyz, TEMP[9].xyzx
>370: FSLT TEMP[11].x, IMM[0].xxxx, CONST[2][53].zzzz
>371: UIF TEMP[11].xxxx :1
>372:   MOV TEMP[10].xyz, TEMP[9].xyzx
>373: ENDIF
>374: MUL TEMP[9].xyz, TEMP[10].xyzz, CONST[2][102].xyzz
>375: MOV TEMP[10].x, IMM[0].xxxx
>376: MUL TEMP[11].x, CONST[2][52].zzzz, IMM[5].xxxx
>377: MOV TEMP[10].y, TEMP[11].xxxx
>378: MUL TEMP[11].x, CONST[2][52].zzzz, IMM[7].xxxx
>379: MUL TEMP[12].x, CONST[2][52].zzzz, IMM[7].yyyy
>380: MOV TEMP[11].y, TEMP[12].xxxx
>381: MUL TEMP[12].x, CONST[2][52].zzzz, IMM[7].zzzz
>382: MUL TEMP[13].x, CONST[2][52].zzzz, IMM[7].wwww
>383: MOV TEMP[12].y, TEMP[13].xxxx
>384: MAD TEMP[11].xy, IN[3].xyyy, IMM[8].xxxx, TEMP[11].xyyy
>385: MOV TEMP[11].xy, TEMP[11].xyyy
>386: TEX TEMP[11].x, TEMP[11], SAMP[10], 2D
>387: MUL TEMP[11].x, TEMP[11].xxxx, IMM[8].yyyy
>388: MAD TEMP[11].xy, IN[3].xyyy, IMM[6].zwww, TEMP[11].xxxx
>389: ADD TEMP[11].xy, TEMP[12].xyyy, TEMP[11].xyyy
>390: MOV TEMP[12].xy, IN[3].zwww
>391: TEX TEMP[12].x, TEMP[12], SAMP[7], 2D
>392: ADD TEMP[12].x, IMM[6].yyyy, -TEMP[12].xxxx
>393: MAD TEMP[12].x, TEMP[12].xxxx, IMM[8].zzzz, IMM[8].wwww
>394: MUL TEMP[13].x, CONST[2][52].zzzz, IMM[7].xxxx
>395: MUL TEMP[14].x, CONST[2][52].zzzz, IMM[7].xxxx
>396: MOV TEMP[13].y, TEMP[14].xxxx
>397: MAD TEMP[13].xy, IN[3].xyyy, IMM[9].xyyy, TEMP[13].xyyy
>398: MOV TEMP[13].xy, TEMP[13].xyyy
>399: TEX TEMP[13].x, TEMP[13], SAMP[10], 2D
>400: MUL TEMP[13].x, TEMP[13].xxxx, IMM[7].xxxx
>401: DP3 TEMP[14].x, IN[1].xyzz, TEMP[4].xyzz
>402: DP3 TEMP[2].x, TEMP[2].xyzz, TEMP[4].xyzz
>403: MOV TEMP[14].y, TEMP[2].xxxx
>404: MUL TEMP[2].x, CONST[2][52].zzzz, IMM[9].zzzz
>405: MUL TEMP[4].x, CONST[2][52].zzzz, IMM[9].wwww
>406: MOV TEMP[2].y, TEMP[4].xxxx
>407: MAD TEMP[4].x, IMM[7].yyyy, TEMP[13].xxxx, IMM[10].xxxx
>408: MAD TEMP[13].xy, IN[3].xyyy, IMM[10].yzzz, TEMP[13].xxxx
>409: MAD TEMP[4].xy, TEMP[14].xyyy, TEMP[4].xxxx, TEMP[13].xyyy
>410: ADD TEMP[2].xy, TEMP[2].xyyy, TEMP[4].xyyy
>411: MUL TEMP[4].x, CONST[2][52].zzzz, IMM[7].xxxx
>412: MUL TEMP[13].x, CONST[2][52].zzzz, IMM[13].yyyy
>413: MOV TEMP[4].y, TEMP[13].xxxx
>414: MUL TEMP[13].x, CONST[2][52].zzzz, IMM[13].zzzz
>415: MOV TEMP[13].y, IMM[0].xxxx
>416: MOV TEMP[14].x, IMM[0].xxxx
>417: MUL TEMP[15].x, CONST[2][52].zzzz, IMM[19].zzzz
>418: MOV TEMP[14].y, TEMP[15].xxxx
>419: MUL TEMP[15].x, CONST[2][52].zzzz, IMM[19].wwww
>420: MUL TEMP[16].x, CONST[2][52].zzzz, IMM[21].xxxx
>421: MOV TEMP[15].y, TEMP[16].xxxx
>422: MUL TEMP[16].x, CONST[2][52].zzzz, IMM[0].wwww
>423: MUL TEMP[17].x, CONST[2][52].zzzz, IMM[5].xxxx
>424: MOV TEMP[16].y, TEMP[17].xxxx
>425: MUL TEMP[17].x, CONST[2][52].zzzz, IMM[10].wwww
>426: MUL TEMP[18].x, CONST[2][52].zzzz, IMM[11].xxxx
>427: MOV TEMP[17].y, TEMP[18].xxxx
>428: MAD TEMP[17].xy, IN[3].xyyy, IMM[11].yzzz, TEMP[17].xyyy
>429: MUL TEMP[18].xyz, TEMP[9].xyzz, TEMP[7].xyzz
>430: ADD TEMP[7].xyz, TEMP[7].xyzz, TEMP[8].xyzz
>431: LRP TEMP[7].xyz, CONST[2][53].wwww, TEMP[7].xyzz, TEMP[18].xyzz
>432: MAD TEMP[8].xy, IN[3].xyyy, IMM[6].zwww, TEMP[10].xyyy
>433: MOV TEMP[8].xy, TEMP[8].xyyy
>434: TEX TEMP[8].xyz, TEMP[8], SAMP[2], 2D
>435: MUL TEMP[8].xyz, IMM[14].xyyy, TEMP[8].xyzz
>436: MOV TEMP[10].xy, TEMP[11].xyyy
>437: TEX TEMP[10].x, TEMP[10], SAMP[5], 2D
>438: LRP TEMP[10].xyz, TEMP[10].xxxx, IMM[17].xyzz, IMM[16].xyzz
>439: MOV TEMP[18].xy, TEMP[11].xyyy
>440: TEX TEMP[18].xyz, TEMP[18], SAMP[8], 2D
>441: MUL TEMP[10].xyz, TEMP[10].xyzz, TEMP[18].xyzz
>442: MOV_SAT TEMP[10].xyz, TEMP[10].xyzz
>443: MUL TEMP[10].xyz, IMM[15].xyzz, TEMP[10].xyzz
>444: MOV TEMP[18].xy, TEMP[11].xyyy
>445: TEX TEMP[18].w, TEMP[18], SAMP[8], 2D
>446: ADD TEMP[18].x, IMM[6].yyyy, -TEMP[18].wwww
>447: ADD TEMP[18].x, TEMP[18].xxxx, TEMP[12].xxxx
>448: MOV TEMP[18].xy, TEMP[18].xxxx
>449: TEX TEMP[18].x, TEMP[18], SAMP[6], 2D
>450: MOV TEMP[11].xy, TEMP[11].xyyy
>451: TEX TEMP[11].x, TEMP[11], SAMP[5], 2D
>452: ADD TEMP[11].x, IMM[6].yyyy, -TEMP[11].xxxx
>453: ADD TEMP[11].x, TEMP[18].xxxx, -TEMP[11].xxxx
>454: MOV_SAT TEMP[11].x, TEMP[11].xxxx
>455: LRP TEMP[8].xyz, TEMP[11].xxxx, TEMP[10].xyzz, TEMP[8].xyzz
>456: MOV TEMP[10].xy, TEMP[2].xyyy
>457: TEX TEMP[10].xyz, TEMP[10], SAMP[8], 2D
>458: MUL TEMP[10].xyz, TEMP[10].xyzz, IMM[14].zzww
>459: MOV TEMP[11].xy, TEMP[2].xyyy
>460: TEX TEMP[11].w, TEMP[11], SAMP[8], 2D
>461: ADD TEMP[11].x, IMM[6].yyyy, -TEMP[11].wwww
>462: ADD TEMP[11].x, TEMP[11].xxxx, TEMP[12].xxxx
>463: MOV TEMP[11].xy, TEMP[11].xxxx
>464: TEX TEMP[11].x, TEMP[11], SAMP[6], 2D
>465: MOV TEMP[2].xy, TEMP[2].xyyy
>466: TEX TEMP[2].x, TEMP[2], SAMP[5], 2D
>467: ADD TEMP[2].x, IMM[6].yyyy, -TEMP[2].xxxx
>468: ADD TEMP[2].x, TEMP[11].xxxx, -TEMP[2].xxxx
>469: MOV_SAT TEMP[2].x, TEMP[2].xxxx
>470: LRP TEMP[2].xyz, TEMP[2].xxxx, TEMP[10].xyzz, TEMP[8].xyzz
>471: MAD TEMP[4].xy, IN[3].xyyy, IMM[5].yyyy, TEMP[4].xyyy
>472: MOV TEMP[4].xy, TEMP[4].xyyy
>473: TEX TEMP[4].x, TEMP[4], SAMP[10], 2D
>474: MAD TEMP[8].xy, IN[3].xyyy, IMM[5].wwww, TEMP[13].xyyy
>475: MOV TEMP[8].xy, TEMP[8].xyyy
>476: TEX TEMP[8].x, TEMP[8], SAMP[10], 2D
>477: MUL TEMP[10].x, CONST[2][52].zzzz, IMM[13].wwww
>478: SIN TEMP[10].x, TEMP[10].xxxx
>479: MOV_SAT TEMP[10].x, TEMP[10].xxxx
>480: LRP TEMP[4].x, TEMP[10].xxxx, TEMP[8].xxxx, TEMP[4].xxxx
>481: ADD TEMP[4].x, TEMP[4].xxxx, IMM[15].wwww
>482: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[4].xxxx
>483: MAD TEMP[4].xy, IN[3].xyyy, IMM[11].yyyy, TEMP[14].xyyy
>484: MOV TEMP[4].xy, TEMP[4].xyyy
>485: TEX TEMP[4].xyz, TEMP[4], SAMP[2], 2D
>486: MUL TEMP[4].xyz, TEMP[4].xyzz, IMM[21].yzww
>487: MAD TEMP[8].xy, IN[3].xyyy, IMM[22].xyyy, TEMP[15].xyyy
>488: MOV TEMP[8].xy, TEMP[8].xyyy
>489: TEX TEMP[8].x, TEMP[8], SAMP[10], 2D
>490: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[8].xxxx
>491: MOV TEMP[8].xy, IN[3].zwww
>492: TEX TEMP[8].y, TEMP[8], SAMP[7], 2D
>493: LRP TEMP[2].xyz, TEMP[8].yyyy, TEMP[4].xyzz, TEMP[2].xyzz
>494: MAD TEMP[4].xy, IN[3].xyyy, IMM[5].yzzz, TEMP[16].xyyy
>495: MOV TEMP[4].xy, TEMP[4].xyyy
>496: TEX TEMP[4].xyz, TEMP[4], SAMP[1], 2D
>497: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[4].xyzz
>498: MOV TEMP[4].xy, TEMP[17].xyyy
>499: TEX TEMP[4].x, TEMP[4], SAMP[0], 2D
>500: ABS TEMP[4].x, TEMP[4].xxxx
>501: MAX TEMP[4].x, TEMP[4].xxxx, IMM[22].zzzz
>502: MUL TEMP[4].xyz, TEMP[4].xxxx, IMM[23].xyyy
>503: MOV TEMP[8].xy, IN[3].zwww
>504: TEX TEMP[8].w, TEMP[8], SAMP[7], 2D
>505: MOV TEMP[10].xy, TEMP[17].xyyy
>506: TEX TEMP[10].x, TEMP[10], SAMP[10], 2D
>507: ADD TEMP[10].x, IMM[6].yyyy, -TEMP[10].xxxx
>508: MAD TEMP[8].x, TEMP[8].wwww, IMM[11].wwww, TEMP[10].xxxx
>509: MOV TEMP[8].xy, TEMP[8].xxxx
>510: TEX TEMP[8].x, TEMP[8], SAMP[3], 2D
>511: MOV_SAT TEMP[8].x, TEMP[8].xxxx
>512: LRP TEMP[2].xyz, TEMP[8].xxxx, TEMP[4].xyzz, TEMP[2].xyzz
>513: ADD TEMP[2].xyz, TEMP[2].xyzz, CONST[1][0].xyzz
>514: ADD TEMP[2].xyz, TEMP[7].xyzz, TEMP[2].xyzz
>515: MOV TEMP[4].xyz, TEMP[2].xyzx
>516: DP3 TEMP[2].x, TEMP[2].xyzz, IMM[24].xyzz
>517: MOV TEMP[4].w, TEMP[2].xxxx
>518: MUL TEMP[2].xy, TEMP[3].xyyy, IMM[22].wwww
>519: FRC TEMP[2].xy, TEMP[2].xyyy
>520: MAD TEMP[2].xy, TEMP[2].xyyy, IMM[16].xxxx, IMM[23].zwww
>521: MAD TEMP[3].xyz, TEMP[5].xyzz, IMM[0].yyyy, IMM[0].yyyy
>522: F2U TEMP[5].x, CONST[3][10].wwww
>523: F2U TEMP[7].x, CONST[3][11].xxxx
>524: UMAD TEMP[5].x, TEMP[5].xxxx, IMM[3].yyyy, TEMP[7].xxxx
>525: U2F TEMP[5].x, TEMP[5].xxxx
>526: MUL TEMP[5].x, TEMP[5].xxxx, IMM[24].wwww
>527: MOV TEMP[3].w, TEMP[5].xxxx
>528: MOV TEMP[1].xyz, TEMP[1].xyzx
>529: MUL TEMP[2].xyz, TEMP[2].xyxx, TEMP[2].xyyy
>530: DP3 TEMP[2].x, TEMP[2].xyzz, IMM[26].xyzz
>531: FRC TEMP[2].x, TEMP[2].xxxx
>532: MAD TEMP[2].x, TEMP[2].xxxx, IMM[0].yyyy, IMM[0].zzzz
>533: DP3 TEMP[5].x, TEMP[9].xyzz, IMM[24].xyzz
>534: ADD TEMP[5].x, TEMP[5].xxxx, IMM[27].xxxx
>535: LG2 TEMP[5].x, TEMP[5].xxxx
>536: MAD TEMP[5].x, TEMP[5].xxxx, IMM[27].yyyy, IMM[0].yyyy
>537: MAD TEMP[2].x, TEMP[2].xxxx, IMM[26].wwww, TEMP[5].xxxx
>538: MOV TEMP[1].w, TEMP[2].xxxx
>539: MOV TEMP[2].x, TEMP[6].xxxx
>540: MOV TEMP[2].yzw, IMM[0].xxxx
>541: MOV OUT[0], TEMP[4]
>542: MOV OUT[1], TEMP[3]
>543: MOV OUT[2], IMM[28].xyxz
>544: MOV OUT[3], TEMP[1]
>545: MOV OUT[4], TEMP[2]
>546: MOV OUT[5], IMM[6].yyyy
>547: END
>; ModuleID = 'tgsi'
>
>define void @main([9 x <16 x i8>] addrspace(2)* byval, [17 x <16 x i8>] addrspace(2)* byval, [17 x <4 x i32>] addrspace(2)* byval, [34 x <8 x i32>] addrspace(2)* byval, float inreg, i32 inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, i32, float, float) #0 {
>main_body:
>  %23 = getelementptr [17 x <16 x i8>], [17 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %24 = load <16 x i8>, <16 x i8> addrspace(2)* %23, align 16, !tbaa !0
>  %25 = call float @llvm.SI.load.const(<16 x i8> %24, i32 0)
>  %26 = call float @llvm.SI.load.const(<16 x i8> %24, i32 4)
>  %27 = call float @llvm.SI.load.const(<16 x i8> %24, i32 8)
>  %28 = call float @llvm.SI.load.const(<16 x i8> %24, i32 12)
>  %29 = call float @llvm.SI.load.const(<16 x i8> %24, i32 16)
>  %30 = call float @llvm.SI.load.const(<16 x i8> %24, i32 20)
>  %31 = call float @llvm.SI.load.const(<16 x i8> %24, i32 24)
>  %32 = call float @llvm.SI.load.const(<16 x i8> %24, i32 28)
>  %33 = call float @llvm.SI.load.const(<16 x i8> %24, i32 32)
>  %34 = call float @llvm.SI.load.const(<16 x i8> %24, i32 36)
>  %35 = call float @llvm.SI.load.const(<16 x i8> %24, i32 40)
>  %36 = call float @llvm.SI.load.const(<16 x i8> %24, i32 44)
>  %37 = getelementptr [17 x <16 x i8>], [17 x <16 x i8>] addrspace(2)* %1, i64 0, i64 1
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !tbaa !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 0)
>  %40 = call float @llvm.SI.load.const(<16 x i8> %38, i32 4)
>  %41 = call float @llvm.SI.load.const(<16 x i8> %38, i32 8)
>  %42 = getelementptr [17 x <16 x i8>], [17 x <16 x i8>] addrspace(2)* %1, i64 0, i64 2
>  %43 = load <16 x i8>, <16 x i8> addrspace(2)* %42, align 16, !tbaa !0
>  %44 = call float @llvm.SI.load.const(<16 x i8> %43, i32 0)
>  %45 = call float @llvm.SI.load.const(<16 x i8> %43, i32 4)
>  %46 = call float @llvm.SI.load.const(<16 x i8> %43, i32 12)
>  %47 = call float @llvm.SI.load.const(<16 x i8> %43, i32 16)
>  %48 = call float @llvm.SI.load.const(<16 x i8> %43, i32 20)
>  %49 = call float @llvm.SI.load.const(<16 x i8> %43, i32 28)
>  %50 = call float @llvm.SI.load.const(<16 x i8> %43, i32 32)
>  %51 = call float @llvm.SI.load.const(<16 x i8> %43, i32 36)
>  %52 = call float @llvm.SI.load.const(<16 x i8> %43, i32 44)
>  %53 = call float @llvm.SI.load.const(<16 x i8> %43, i32 48)
>  %54 = call float @llvm.SI.load.const(<16 x i8> %43, i32 52)
>  %55 = call float @llvm.SI.load.const(<16 x i8> %43, i32 60)
>  %56 = call float @llvm.SI.load.const(<16 x i8> %43, i32 656)
>  %57 = call float @llvm.SI.load.const(<16 x i8> %43, i32 660)
>  %58 = call float @llvm.SI.load.const(<16 x i8> %43, i32 672)
>  %59 = call float @llvm.SI.load.const(<16 x i8> %43, i32 676)
>  %60 = call float @llvm.SI.load.const(<16 x i8> %43, i32 736)
>  %61 = call float @llvm.SI.load.const(<16 x i8> %43, i32 740)
>  %62 = call float @llvm.SI.load.const(<16 x i8> %43, i32 744)
>  %63 = call float @llvm.SI.load.const(<16 x i8> %43, i32 748)
>  %64 = call float @llvm.SI.load.const(<16 x i8> %43, i32 752)
>  %65 = call float @llvm.SI.load.const(<16 x i8> %43, i32 756)
>  %66 = call float @llvm.SI.load.const(<16 x i8> %43, i32 760)
>  %67 = call float @llvm.SI.load.const(<16 x i8> %43, i32 764)
>  %68 = call float @llvm.SI.load.const(<16 x i8> %43, i32 768)
>  %69 = call float @llvm.SI.load.const(<16 x i8> %43, i32 772)
>  %70 = call float @llvm.SI.load.const(<16 x i8> %43, i32 776)
>  %71 = call float @llvm.SI.load.const(<16 x i8> %43, i32 780)
>  %72 = call float @llvm.SI.load.const(<16 x i8> %43, i32 784)
>  %73 = call float @llvm.SI.load.const(<16 x i8> %43, i32 788)
>  %74 = call float @llvm.SI.load.const(<16 x i8> %43, i32 828)
>  %75 = call float @llvm.SI.load.const(<16 x i8> %43, i32 840)
>  %76 = call float @llvm.SI.load.const(<16 x i8> %43, i32 860)
>  %77 = call float @llvm.SI.load.const(<16 x i8> %43, i32 1632)
>  %78 = call float @llvm.SI.load.const(<16 x i8> %43, i32 1636)
>  %79 = call float @llvm.SI.load.const(<16 x i8> %43, i32 1640)
>  %80 = getelementptr [17 x <16 x i8>], [17 x <16 x i8>] addrspace(2)* %1, i64 0, i64 3
>  %81 = load <16 x i8>, <16 x i8> addrspace(2)* %80, align 16, !tbaa !0
>  %82 = call float @llvm.SI.load.const(<16 x i8> %81, i32 156)
>  %83 = call float @llvm.SI.load.const(<16 x i8> %81, i32 172)
>  %84 = call float @llvm.SI.load.const(<16 x i8> %81, i32 176)
>  %85 = getelementptr [34 x <8 x i32>], [34 x <8 x i32>] addrspace(2)* %3, i64 0, i64 0
>  %86 = load <8 x i32>, <8 x i32> addrspace(2)* %85, align 32, !tbaa !0
>  %87 = getelementptr [17 x <4 x i32>], [17 x <4 x i32>] addrspace(2)* %2, i64 0, i64 0
>  %88 = load <4 x i32>, <4 x i32> addrspace(2)* %87, align 16, !tbaa !0
>  %89 = getelementptr [34 x <8 x i32>], [34 x <8 x i32>] addrspace(2)* %3, i64 0, i64 1
>  %90 = load <8 x i32>, <8 x i32> addrspace(2)* %89, align 32, !tbaa !0
>  %91 = getelementptr [17 x <4 x i32>], [17 x <4 x i32>] addrspace(2)* %2, i64 0, i64 1
>  %92 = load <4 x i32>, <4 x i32> addrspace(2)* %91, align 16, !tbaa !0
>  %93 = getelementptr [34 x <8 x i32>], [34 x <8 x i32>] addrspace(2)* %3, i64 0, i64 2
>  %94 = load <8 x i32>, <8 x i32> addrspace(2)* %93, align 32, !tbaa !0
>  %95 = getelementptr [17 x <4 x i32>], [17 x <4 x i32>] addrspace(2)* %2, i64 0, i64 2
>  %96 = load <4 x i32>, <4 x i32> addrspace(2)* %95, align 16, !tbaa !0
>  %97 = getelementptr [34 x <8 x i32>], [34 x <8 x i32>] addrspace(2)* %3, i64 0, i64 3
>  %98 = load <8 x i32>, <8 x i32> addrspace(2)* %97, align 32, !tbaa !0
>  %99 = getelementptr [17 x <4 x i32>], [17 x <4 x i32>] addrspace(2)* %2, i64 0, i64 3
>  %100 = load <4 x i32>, <4 x i32> addrspace(2)* %99, align 16, !tbaa !0
>  %101 = getelementptr [34 x <8 x i32>], [34 x <8 x i32>] addrspace(2)* %3, i64 0, i64 4
>  %102 = load <8 x i32>, <8 x i32> addrspace(2)* %101, align 32, !tbaa !0
>  %103 = getelementptr [17 x <4 x i32>], [17 x <4 x i32>] addrspace(2)* %2, i64 0, i64 4
>  %104 = load <4 x i32>, <4 x i32> addrspace(2)* %103, align 16, !tbaa !0
>  %105 = getelementptr [34 x <8 x i32>], [34 x <8 x i32>] addrspace(2)* %3, i64 0, i64 5
>  %106 = load <8 x i32>, <8 x i32> addrspace(2)* %105, align 32, !tbaa !0
>  %107 = getelementptr [17 x <4 x i32>], [17 x <4 x i32>] addrspace(2)* %2, i64 0, i64 5
>  %108 = load <4 x i32>, <4 x i32> addrspace(2)* %107, align 16, !tbaa !0
>  %109 = getelementptr [34 x <8 x i32>], [34 x <8 x i32>] addrspace(2)* %3, i64 0, i64 6
>  %110 = load <8 x i32>, <8 x i32> addrspace(2)* %109, align 32, !tbaa !0
>  %111 = getelementptr [17 x <4 x i32>], [17 x <4 x i32>] addrspace(2)* %2, i64 0, i64 6
>  %112 = load <4 x i32>, <4 x i32> addrspace(2)* %111, align 16, !tbaa !0
>  %113 = getelementptr [34 x <8 x i32>], [34 x <8 x i32>] addrspace(2)* %3, i64 0, i64 7
>  %114 = load <8 x i32>, <8 x i32> addrspace(2)* %113, align 32, !tbaa !0
>  %115 = getelementptr [17 x <4 x i32>], [17 x <4 x i32>] addrspace(2)* %2, i64 0, i64 7
>  %116 = load <4 x i32>, <4 x i32> addrspace(2)* %115, align 16, !tbaa !0
>  %117 = getelementptr [34 x <8 x i32>], [34 x <8 x i32>] addrspace(2)* %3, i64 0, i64 8
>  %118 = load <8 x i32>, <8 x i32> addrspace(2)* %117, align 32, !tbaa !0
>  %119 = getelementptr [17 x <4 x i32>], [17 x <4 x i32>] addrspace(2)* %2, i64 0, i64 8
>  %120 = load <4 x i32>, <4 x i32> addrspace(2)* %119, align 16, !tbaa !0
>  %121 = getelementptr [34 x <8 x i32>], [34 x <8 x i32>] addrspace(2)* %3, i64 0, i64 9
>  %122 = load <8 x i32>, <8 x i32> addrspace(2)* %121, align 32, !tbaa !0
>  %123 = getelementptr [17 x <4 x i32>], [17 x <4 x i32>] addrspace(2)* %2, i64 0, i64 9
>  %124 = load <4 x i32>, <4 x i32> addrspace(2)* %123, align 16, !tbaa !0
>  %125 = getelementptr [34 x <8 x i32>], [34 x <8 x i32>] addrspace(2)* %3, i64 0, i64 10
>  %126 = load <8 x i32>, <8 x i32> addrspace(2)* %125, align 32, !tbaa !0
>  %127 = getelementptr [17 x <4 x i32>], [17 x <4 x i32>] addrspace(2)* %2, i64 0, i64 10
>  %128 = load <4 x i32>, <4 x i32> addrspace(2)* %127, align 16, !tbaa !0
>  %129 = getelementptr [34 x <8 x i32>], [34 x <8 x i32>] addrspace(2)* %3, i64 0, i64 11
>  %130 = load <8 x i32>, <8 x i32> addrspace(2)* %129, align 32, !tbaa !0
>  %131 = getelementptr [17 x <4 x i32>], [17 x <4 x i32>] addrspace(2)* %2, i64 0, i64 11
>  %132 = load <4 x i32>, <4 x i32> addrspace(2)* %131, align 16, !tbaa !0
>  %133 = getelementptr [34 x <8 x i32>], [34 x <8 x i32>] addrspace(2)* %3, i64 0, i64 12
>  %134 = load <8 x i32>, <8 x i32> addrspace(2)* %133, align 32, !tbaa !0
>  %135 = getelementptr [17 x <4 x i32>], [17 x <4 x i32>] addrspace(2)* %2, i64 0, i64 12
>  %136 = load <4 x i32>, <4 x i32> addrspace(2)* %135, align 16, !tbaa !0
>  %137 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %138 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %139 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %140 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %141 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %142 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %143 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %144 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %145 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %146 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %8)
>  %147 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %6, <2 x i32> %8)
>  %148 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %8)
>  %149 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %8)
>  %150 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %8)
>  %151 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %8)
>  %152 = fcmp ult float %19, 0.000000e+00
>  %153 = fmul float %142, %138
>  %154 = fmul float %140, %139
>  %155 = fmul float %141, %137
>  %156 = fmul float %141, %139
>  %157 = fsub float %156, %153
>  %158 = fmul float %142, %137
>  %159 = fsub float %158, %154
>  %160 = fmul float %140, %138
>  %161 = fsub float %160, %155
>  %162 = fmul float %157, %143
>  %163 = fmul float %159, %143
>  %164 = fmul float %161, %143
>  %165 = fmul float %47, %149
>  %166 = fmul float %48, %149
>  %167 = fmul float %49, %149
>  %168 = fmul float %44, %148
>  %169 = fadd float %168, %165
>  %170 = fmul float %45, %148
>  %171 = fadd float %170, %166
>  %172 = fmul float %46, %148
>  %173 = fadd float %172, %167
>  %174 = fmul float %50, %150
>  %175 = fadd float %174, %169
>  %176 = fmul float %51, %150
>  %177 = fadd float %176, %171
>  %178 = fmul float %52, %150
>  %179 = fadd float %178, %173
>  %180 = fmul float %53, %151
>  %181 = fadd float %180, %175
>  %182 = fmul float %54, %151
>  %183 = fadd float %182, %177
>  %184 = fmul float %55, %151
>  %185 = fadd float %184, %179
>  %186 = fdiv float 1.000000e+00, %185
>  %187 = fmul float %181, %186
>  %188 = fmul float %183, %186
>  %189 = fmul float %187, 5.000000e-01
>  %190 = fadd float %189, 5.000000e-01
>  %191 = fmul float %188, -5.000000e-01
>  %192 = fadd float %191, 5.000000e-01
>  %193 = fmul float %190, %58
>  %194 = fadd float %193, %56
>  %195 = fmul float %192, %59
>  %196 = fadd float %195, %57
>  %197 = fmul float %148, %148
>  %198 = fmul float %149, %149
>  %199 = fadd float %198, %197
>  %200 = fmul float %150, %150
>  %201 = fadd float %199, %200
>  %202 = call float @llvm.AMDGPU.rsq.clamped.f32(float %201)
>  %203 = fmul float %148, %202
>  %204 = fsub float -0.000000e+00, %203
>  %205 = fmul float %149, %202
>  %206 = fsub float -0.000000e+00, %205
>  %207 = fmul float %150, %202
>  %208 = fsub float -0.000000e+00, %207
>  %209 = fmul float %74, %82
>  %210 = fmul float %75, 0x3F9EB851E0000000
>  %211 = fmul float %75, 0xBFD99999A0000000
>  %212 = fmul float %144, 1.500000e+00
>  %213 = fadd float %212, %210
>  %214 = fmul float %145, 3.000000e+00
>  %215 = fadd float %214, %211
>  %216 = bitcast float %213 to i32
>  %217 = bitcast float %215 to i32
>  %218 = insertelement <2 x i32> undef, i32 %216, i32 0
>  %219 = insertelement <2 x i32> %218, i32 %217, i32 1
>  %220 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %219, <8 x i32> %134, <4 x i32> %136, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %221 = extractelement <4 x float> %220, i32 0
>  %222 = extractelement <4 x float> %220, i32 1
>  %223 = fmul float %221, 2.000000e+00
>  %224 = fadd float %223, -1.000000e+00
>  %225 = fmul float %222, 2.000000e+00
>  %226 = fadd float %225, -1.000000e+00
>  %227 = fmul float %224, %224
>  %228 = fmul float %226, %226
>  %229 = fadd float %227, %228
>  %230 = fsub float 1.000000e+00, %229
>  %231 = call float @llvm.AMDIL.clamp.(float %230, float 0.000000e+00, float 1.000000e+00)
>  %232 = call float @llvm.sqrt.f32(float %231)
>  %233 = fmul float %75, 0xBFD99999A0000000
>  %234 = fmul float %144, 1.300000e+01
>  %235 = fadd float %234, 0.000000e+00
>  %236 = fmul float %145, 6.000000e+00
>  %237 = fadd float %236, %233
>  %238 = bitcast float %235 to i32
>  %239 = bitcast float %237 to i32
>  %240 = insertelement <2 x i32> undef, i32 %238, i32 0
>  %241 = insertelement <2 x i32> %240, i32 %239, i32 1
>  %242 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %241, <8 x i32> %130, <4 x i32> %132, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %243 = extractelement <4 x float> %242, i32 0
>  %244 = extractelement <4 x float> %242, i32 1
>  %245 = fmul float %243, 2.000000e+00
>  %246 = fadd float %245, -1.000000e+00
>  %247 = fmul float %244, 2.000000e+00
>  %248 = fadd float %247, -1.000000e+00
>  %249 = fmul float %246, %246
>  %250 = fmul float %248, %248
>  %251 = fadd float %249, %250
>  %252 = fsub float 1.000000e+00, %251
>  %253 = call float @llvm.AMDIL.clamp.(float %252, float 0.000000e+00, float 1.000000e+00)
>  %254 = call float @llvm.sqrt.f32(float %253)
>  %255 = fmul float %75, 0x3FB99999A0000000
>  %256 = fmul float %75, 0x3FC99999A0000000
>  %257 = fmul float %75, 0xBFA47AE140000000
>  %258 = fmul float %75, 0xBFE19999A0000000
>  %259 = fmul float %144, 4.000000e+00
>  %260 = fadd float %259, %255
>  %261 = fmul float %145, 4.000000e+00
>  %262 = fadd float %261, %256
>  %263 = bitcast float %260 to i32
>  %264 = bitcast float %262 to i32
>  %265 = insertelement <2 x i32> undef, i32 %263, i32 0
>  %266 = insertelement <2 x i32> %265, i32 %264, i32 1
>  %267 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %266, <8 x i32> %126, <4 x i32> %128, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %268 = extractelement <4 x float> %267, i32 0
>  %269 = fmul float %268, 0x3FB1EB8520000000
>  %270 = fmul float %144, 1.300000e+01
>  %271 = fadd float %270, %269
>  %272 = fmul float %145, 6.000000e+00
>  %273 = fadd float %272, %269
>  %274 = fadd float %257, %271
>  %275 = fadd float %258, %273
>  %276 = bitcast float %274 to i32
>  %277 = bitcast float %275 to i32
>  %278 = insertelement <2 x i32> undef, i32 %276, i32 0
>  %279 = insertelement <2 x i32> %278, i32 %277, i32 1
>  %280 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %279, <8 x i32> %122, <4 x i32> %124, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %281 = extractelement <4 x float> %280, i32 0
>  %282 = extractelement <4 x float> %280, i32 1
>  %283 = fmul float %281, 2.000000e+00
>  %284 = fadd float %283, -1.000000e+00
>  %285 = fmul float %282, 2.000000e+00
>  %286 = fadd float %285, -1.000000e+00
>  %287 = fmul float %284, %284
>  %288 = fmul float %286, %286
>  %289 = fadd float %287, %288
>  %290 = fsub float 1.000000e+00, %289
>  %291 = call float @llvm.AMDIL.clamp.(float %290, float 0.000000e+00, float 1.000000e+00)
>  %292 = call float @llvm.sqrt.f32(float %291)
>  %293 = bitcast float %146 to i32
>  %294 = bitcast float %147 to i32
>  %295 = insertelement <2 x i32> undef, i32 %293, i32 0
>  %296 = insertelement <2 x i32> %295, i32 %294, i32 1
>  %297 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %296, <8 x i32> %114, <4 x i32> %116, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %298 = extractelement <4 x float> %297, i32 0
>  %299 = fsub float 1.000000e+00, %298
>  %300 = fmul float %299, 0x3FD1EB8520000000
>  %301 = fadd float %300, 0xBFD8F5C280000000
>  %302 = fmul float %75, 0x3FB99999A0000000
>  %303 = fmul float %75, 0x3FB99999A0000000
>  %304 = fmul float %144, 3.000000e+00
>  %305 = fadd float %304, %302
>  %306 = fadd float %145, %303
>  %307 = bitcast float %305 to i32
>  %308 = bitcast float %306 to i32
>  %309 = insertelement <2 x i32> undef, i32 %307, i32 0
>  %310 = insertelement <2 x i32> %309, i32 %308, i32 1
>  %311 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %310, <8 x i32> %126, <4 x i32> %128, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %312 = extractelement <4 x float> %311, i32 0
>  %313 = fmul float %312, 0x3FB99999A0000000
>  %314 = fmul float %137, %204
>  %315 = fmul float %138, %206
>  %316 = fadd float %315, %314
>  %317 = fmul float %139, %208
>  %318 = fadd float %316, %317
>  %319 = fmul float %162, %204
>  %320 = fmul float %163, %206
>  %321 = fadd float %320, %319
>  %322 = fmul float %164, %208
>  %323 = fadd float %321, %322
>  %324 = fmul float %75, 0xBFAC28F5C0000000
>  %325 = fmul float %75, 0xBFD3333340000000
>  %326 = fmul float %313, 0x3FC99999A0000000
>  %327 = fadd float %326, 0xBFB99999A0000000
>  %328 = fmul float %144, 6.000000e+00
>  %329 = fadd float %328, %313
>  %330 = fmul float %145, 3.000000e+00
>  %331 = fadd float %330, %313
>  %332 = fmul float %318, %327
>  %333 = fadd float %332, %329
>  %334 = fmul float %323, %327
>  %335 = fadd float %334, %331
>  %336 = fadd float %324, %333
>  %337 = fadd float %325, %335
>  %338 = bitcast float %336 to i32
>  %339 = bitcast float %337 to i32
>  %340 = insertelement <2 x i32> undef, i32 %338, i32 0
>  %341 = insertelement <2 x i32> %340, i32 %339, i32 1
>  %342 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %341, <8 x i32> %122, <4 x i32> %124, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %343 = extractelement <4 x float> %342, i32 0
>  %344 = extractelement <4 x float> %342, i32 1
>  %345 = fmul float %343, 2.000000e+00
>  %346 = fadd float %345, -1.000000e+00
>  %347 = fmul float %344, 2.000000e+00
>  %348 = fadd float %347, -1.000000e+00
>  %349 = fmul float %346, %346
>  %350 = fmul float %348, %348
>  %351 = fadd float %349, %350
>  %352 = fsub float 1.000000e+00, %351
>  %353 = call float @llvm.AMDIL.clamp.(float %352, float 0.000000e+00, float 1.000000e+00)
>  %354 = call float @llvm.sqrt.f32(float %353)
>  %355 = fmul float %75, 0xBFC99999A0000000
>  %356 = fmul float %75, 0xBFE4CCCCC0000000
>  %357 = fmul float %144, 8.000000e+00
>  %358 = fadd float %357, %355
>  %359 = fmul float %145, 6.000000e+00
>  %360 = fadd float %359, %356
>  %361 = bitcast float %358 to i32
>  %362 = bitcast float %360 to i32
>  %363 = insertelement <2 x i32> undef, i32 %361, i32 0
>  %364 = insertelement <2 x i32> %363, i32 %362, i32 1
>  %365 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %364, <8 x i32> %102, <4 x i32> %104, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %366 = extractelement <4 x float> %365, i32 0
>  %367 = extractelement <4 x float> %365, i32 1
>  %368 = fmul float %366, 2.000000e+00
>  %369 = fadd float %368, -1.000000e+00
>  %370 = fmul float %367, 2.000000e+00
>  %371 = fadd float %370, -1.000000e+00
>  %372 = fmul float %369, %369
>  %373 = fmul float %371, %371
>  %374 = fadd float %372, %373
>  %375 = fsub float 1.000000e+00, %374
>  %376 = call float @llvm.AMDIL.clamp.(float %375, float 0.000000e+00, float 1.000000e+00)
>  %377 = call float @llvm.sqrt.f32(float %376)
>  %378 = bitcast float %274 to i32
>  %379 = bitcast float %275 to i32
>  %380 = insertelement <2 x i32> undef, i32 %378, i32 0
>  %381 = insertelement <2 x i32> %380, i32 %379, i32 1
>  %382 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %381, <8 x i32> %118, <4 x i32> %120, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %383 = extractelement <4 x float> %382, i32 3
>  %384 = fsub float 1.000000e+00, %383
>  %385 = fadd float %384, %301
>  %386 = bitcast float %385 to i32
>  %387 = bitcast float %385 to i32
>  %388 = insertelement <2 x i32> undef, i32 %386, i32 0
>  %389 = insertelement <2 x i32> %388, i32 %387, i32 1
>  %390 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %389, <8 x i32> %110, <4 x i32> %112, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %391 = extractelement <4 x float> %390, i32 0
>  %392 = bitcast float %274 to i32
>  %393 = bitcast float %275 to i32
>  %394 = insertelement <2 x i32> undef, i32 %392, i32 0
>  %395 = insertelement <2 x i32> %394, i32 %393, i32 1
>  %396 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %395, <8 x i32> %106, <4 x i32> %108, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %397 = extractelement <4 x float> %396, i32 0
>  %398 = fsub float 1.000000e+00, %397
>  %399 = fsub float %391, %398
>  %400 = call float @llvm.AMDIL.clamp.(float %399, float 0.000000e+00, float 1.000000e+00)
>  %401 = fsub float 1.000000e+00, %400
>  %402 = fmul float %284, %400
>  %403 = fmul float %246, %401
>  %404 = fadd float %402, %403
>  %405 = fsub float 1.000000e+00, %400
>  %406 = fmul float %286, %400
>  %407 = fmul float %248, %405
>  %408 = fadd float %406, %407
>  %409 = fsub float 1.000000e+00, %400
>  %410 = fmul float %292, %400
>  %411 = fmul float %254, %409
>  %412 = fadd float %410, %411
>  %413 = bitcast float %336 to i32
>  %414 = bitcast float %337 to i32
>  %415 = insertelement <2 x i32> undef, i32 %413, i32 0
>  %416 = insertelement <2 x i32> %415, i32 %414, i32 1
>  %417 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %416, <8 x i32> %118, <4 x i32> %120, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %418 = extractelement <4 x float> %417, i32 3
>  %419 = fsub float 1.000000e+00, %418
>  %420 = fadd float %419, %301
>  %421 = bitcast float %420 to i32
>  %422 = bitcast float %420 to i32
>  %423 = insertelement <2 x i32> undef, i32 %421, i32 0
>  %424 = insertelement <2 x i32> %423, i32 %422, i32 1
>  %425 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %424, <8 x i32> %110, <4 x i32> %112, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %426 = extractelement <4 x float> %425, i32 0
>  %427 = bitcast float %336 to i32
>  %428 = bitcast float %337 to i32
>  %429 = insertelement <2 x i32> undef, i32 %427, i32 0
>  %430 = insertelement <2 x i32> %429, i32 %428, i32 1
>  %431 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %430, <8 x i32> %106, <4 x i32> %108, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %432 = extractelement <4 x float> %431, i32 0
>  %433 = fsub float 1.000000e+00, %432
>  %434 = fsub float %426, %433
>  %435 = call float @llvm.AMDIL.clamp.(float %434, float 0.000000e+00, float 1.000000e+00)
>  %436 = fsub float 1.000000e+00, %435
>  %437 = fmul float %346, %435
>  %438 = fmul float %404, %436
>  %439 = fadd float %437, %438
>  %440 = fsub float 1.000000e+00, %435
>  %441 = fmul float %348, %435
>  %442 = fmul float %408, %440
>  %443 = fadd float %441, %442
>  %444 = fsub float 1.000000e+00, %435
>  %445 = fmul float %354, %435
>  %446 = fmul float %412, %444
>  %447 = fadd float %445, %446
>  %448 = bitcast float %146 to i32
>  %449 = bitcast float %147 to i32
>  %450 = insertelement <2 x i32> undef, i32 %448, i32 0
>  %451 = insertelement <2 x i32> %450, i32 %449, i32 1
>  %452 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %451, <8 x i32> %114, <4 x i32> %116, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %453 = extractelement <4 x float> %452, i32 2
>  %454 = fsub float 1.000000e+00, %453
>  %455 = fmul float %439, %453
>  %456 = fmul float %224, %454
>  %457 = fadd float %455, %456
>  %458 = fsub float 1.000000e+00, %453
>  %459 = fmul float %443, %453
>  %460 = fmul float %226, %458
>  %461 = fadd float %459, %460
>  %462 = fsub float 1.000000e+00, %453
>  %463 = fmul float %447, %453
>  %464 = fmul float %232, %462
>  %465 = fadd float %463, %464
>  %466 = bitcast float %146 to i32
>  %467 = bitcast float %147 to i32
>  %468 = insertelement <2 x i32> undef, i32 %466, i32 0
>  %469 = insertelement <2 x i32> %468, i32 %467, i32 1
>  %470 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %469, <8 x i32> %114, <4 x i32> %116, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %471 = extractelement <4 x float> %470, i32 3
>  %472 = bitcast float %358 to i32
>  %473 = bitcast float %360 to i32
>  %474 = insertelement <2 x i32> undef, i32 %472, i32 0
>  %475 = insertelement <2 x i32> %474, i32 %473, i32 1
>  %476 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %475, <8 x i32> %126, <4 x i32> %128, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %477 = extractelement <4 x float> %476, i32 0
>  %478 = fsub float 1.000000e+00, %477
>  %479 = fmul float %471, 0xBFECCCCCC0000000
>  %480 = fadd float %479, %478
>  %481 = bitcast float %480 to i32
>  %482 = bitcast float %480 to i32
>  %483 = insertelement <2 x i32> undef, i32 %481, i32 0
>  %484 = insertelement <2 x i32> %483, i32 %482, i32 1
>  %485 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %484, <8 x i32> %98, <4 x i32> %100, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %486 = extractelement <4 x float> %485, i32 0
>  %487 = call float @llvm.AMDIL.clamp.(float %486, float 0.000000e+00, float 1.000000e+00)
>  %488 = fsub float 1.000000e+00, %487
>  %489 = fmul float %369, %487
>  %490 = fmul float %457, %488
>  %491 = fadd float %489, %490
>  %492 = fsub float 1.000000e+00, %487
>  %493 = fmul float %371, %487
>  %494 = fmul float %461, %492
>  %495 = fadd float %493, %494
>  %496 = fsub float 1.000000e+00, %487
>  %497 = fmul float %377, %487
>  %498 = fmul float %465, %496
>  %499 = fadd float %497, %498
>  %500 = fmul float %491, %71
>  %501 = fadd float %500, %68
>  %502 = fmul float %495, %71
>  %503 = fadd float %502, %69
>  %504 = fmul float %499, %71
>  %505 = fadd float %504, %70
>  %506 = select i1 %152, float 1.000000e+00, float -1.000000e+00
>  %507 = fmul float %209, %506
>  %508 = fmul float %501, %507
>  %509 = fmul float %503, %507
>  %510 = fmul float %505, %507
>  %511 = fmul float %508, %508
>  %512 = fmul float %509, %509
>  %513 = fadd float %512, %511
>  %514 = fmul float %510, %510
>  %515 = fadd float %513, %514
>  %516 = call float @llvm.AMDGPU.rsq.clamped.f32(float %515)
>  %517 = fmul float %508, %516
>  %518 = fmul float %509, %516
>  %519 = fmul float %510, %516
>  %520 = fmul float %162, %518
>  %521 = fmul float %163, %518
>  %522 = fmul float %164, %518
>  %523 = fmul float %137, %517
>  %524 = fadd float %523, %520
>  %525 = fmul float %138, %517
>  %526 = fadd float %525, %521
>  %527 = fmul float %139, %517
>  %528 = fadd float %527, %522
>  %529 = fmul float %140, %519
>  %530 = fadd float %529, %524
>  %531 = fmul float %141, %519
>  %532 = fadd float %531, %526
>  %533 = fmul float %142, %519
>  %534 = fadd float %533, %528
>  %535 = fmul float %530, %530
>  %536 = fmul float %532, %532
>  %537 = fadd float %536, %535
>  %538 = fmul float %534, %534
>  %539 = fadd float %537, %538
>  %540 = call float @llvm.AMDGPU.rsq.clamped.f32(float %539)
>  %541 = fmul float %530, %540
>  %542 = fmul float %532, %540
>  %543 = fmul float %534, %540
>  %544 = fmul float %75, 0x3FB99999A0000000
>  %545 = fmul float %75, 0x3FB99999A0000000
>  %546 = fmul float %144, 3.000000e+00
>  %547 = fadd float %546, %544
>  %548 = fadd float %145, %545
>  %549 = bitcast float %547 to i32
>  %550 = bitcast float %548 to i32
>  %551 = insertelement <2 x i32> undef, i32 %549, i32 0
>  %552 = insertelement <2 x i32> %551, i32 %550, i32 1
>  %553 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %552, <8 x i32> %126, <4 x i32> %128, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %554 = extractelement <4 x float> %553, i32 0
>  %555 = fmul float %554, 0x3FB99999A0000000
>  %556 = fmul float %137, %204
>  %557 = fmul float %138, %206
>  %558 = fadd float %557, %556
>  %559 = fmul float %139, %208
>  %560 = fadd float %558, %559
>  %561 = fmul float %162, %204
>  %562 = fmul float %163, %206
>  %563 = fadd float %562, %561
>  %564 = fmul float %164, %208
>  %565 = fadd float %563, %564
>  %566 = fmul float %75, 0xBFAC28F5C0000000
>  %567 = fmul float %75, 0xBFD3333340000000
>  %568 = fmul float %555, 0x3FC99999A0000000
>  %569 = fadd float %568, 0xBFB99999A0000000
>  %570 = fmul float %144, 6.000000e+00
>  %571 = fadd float %570, %555
>  %572 = fmul float %145, 3.000000e+00
>  %573 = fadd float %572, %555
>  %574 = fmul float %560, %569
>  %575 = fadd float %574, %571
>  %576 = fmul float %565, %569
>  %577 = fadd float %576, %573
>  %578 = fadd float %566, %575
>  %579 = fadd float %567, %577
>  %580 = fmul float %75, 0x3F9EB851E0000000
>  %581 = fmul float %75, 0xBFD99999A0000000
>  %582 = fmul float %75, 0xBFC99999A0000000
>  %583 = fmul float %75, 0xBFE4CCCCC0000000
>  %584 = bitcast float %578 to i32
>  %585 = bitcast float %579 to i32
>  %586 = insertelement <2 x i32> undef, i32 %584, i32 0
>  %587 = insertelement <2 x i32> %586, i32 %585, i32 1
>  %588 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %587, <8 x i32> %118, <4 x i32> %120, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %589 = extractelement <4 x float> %588, i32 3
>  %590 = fsub float 1.000000e+00, %589
>  %591 = bitcast float %146 to i32
>  %592 = bitcast float %147 to i32
>  %593 = insertelement <2 x i32> undef, i32 %591, i32 0
>  %594 = insertelement <2 x i32> %593, i32 %592, i32 1
>  %595 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %594, <8 x i32> %114, <4 x i32> %116, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %596 = extractelement <4 x float> %595, i32 0
>  %597 = fsub float 1.000000e+00, %596
>  %598 = fmul float %597, 0x3FD1EB8520000000
>  %599 = fadd float %598, 0xBFD8F5C280000000
>  %600 = fadd float %590, %599
>  %601 = bitcast float %600 to i32
>  %602 = bitcast float %600 to i32
>  %603 = insertelement <2 x i32> undef, i32 %601, i32 0
>  %604 = insertelement <2 x i32> %603, i32 %602, i32 1
>  %605 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %604, <8 x i32> %110, <4 x i32> %112, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %606 = extractelement <4 x float> %605, i32 0
>  %607 = bitcast float %578 to i32
>  %608 = bitcast float %579 to i32
>  %609 = insertelement <2 x i32> undef, i32 %607, i32 0
>  %610 = insertelement <2 x i32> %609, i32 %608, i32 1
>  %611 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %610, <8 x i32> %106, <4 x i32> %108, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %612 = extractelement <4 x float> %611, i32 0
>  %613 = fsub float 1.000000e+00, %612
>  %614 = fsub float %606, %613
>  %615 = call float @llvm.AMDIL.clamp.(float %614, float 0.000000e+00, float 1.000000e+00)
>  %616 = bitcast float %146 to i32
>  %617 = bitcast float %147 to i32
>  %618 = insertelement <2 x i32> undef, i32 %616, i32 0
>  %619 = insertelement <2 x i32> %618, i32 %617, i32 1
>  %620 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %619, <8 x i32> %114, <4 x i32> %116, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %621 = extractelement <4 x float> %620, i32 2
>  %622 = fadd float %615, %621
>  %623 = fmul float %144, 1.500000e+00
>  %624 = fadd float %623, %580
>  %625 = fmul float %145, 3.000000e+00
>  %626 = fadd float %625, %581
>  %627 = bitcast float %624 to i32
>  %628 = bitcast float %626 to i32
>  %629 = insertelement <2 x i32> undef, i32 %627, i32 0
>  %630 = insertelement <2 x i32> %629, i32 %628, i32 1
>  %631 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %630, <8 x i32> %90, <4 x i32> %92, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %632 = extractelement <4 x float> %631, i32 3
>  %633 = fadd float %622, %632
>  %634 = call float @llvm.AMDIL.clamp.(float %633, float 0.000000e+00, float 1.000000e+00)
>  %635 = bitcast float %146 to i32
>  %636 = bitcast float %147 to i32
>  %637 = insertelement <2 x i32> undef, i32 %635, i32 0
>  %638 = insertelement <2 x i32> %637, i32 %636, i32 1
>  %639 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %638, <8 x i32> %114, <4 x i32> %116, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %640 = extractelement <4 x float> %639, i32 3
>  %641 = fmul float %144, 8.000000e+00
>  %642 = fadd float %641, %582
>  %643 = fmul float %145, 6.000000e+00
>  %644 = fadd float %643, %583
>  %645 = bitcast float %642 to i32
>  %646 = bitcast float %644 to i32
>  %647 = insertelement <2 x i32> undef, i32 %645, i32 0
>  %648 = insertelement <2 x i32> %647, i32 %646, i32 1
>  %649 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %648, <8 x i32> %126, <4 x i32> %128, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %650 = extractelement <4 x float> %649, i32 0
>  %651 = fsub float 1.000000e+00, %650
>  %652 = fmul float %640, 0xBFECCCCCC0000000
>  %653 = fadd float %652, %651
>  %654 = bitcast float %653 to i32
>  %655 = bitcast float %653 to i32
>  %656 = insertelement <2 x i32> undef, i32 %654, i32 0
>  %657 = insertelement <2 x i32> %656, i32 %655, i32 1
>  %658 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %657, <8 x i32> %98, <4 x i32> %100, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %659 = extractelement <4 x float> %658, i32 0
>  %660 = call float @llvm.AMDIL.clamp.(float %659, float 0.000000e+00, float 1.000000e+00)
>  %661 = fadd float %634, %660
>  %662 = fcmp olt float %661, 0x3FD51EB860000000
>  %663 = select i1 %662, float -1.000000e+00, float 0.000000e+00
>  call void @llvm.AMDGPU.kill(float %663)
>  %664 = fmul float %75, 0xBFD99999A0000000
>  %665 = fmul float %75, 0x3FB99999A0000000
>  %666 = fmul float %75, 0x3FC99999A0000000
>  %667 = fmul float %75, 0xBFA47AE140000000
>  %668 = fmul float %75, 0xBFE19999A0000000
>  %669 = fmul float %144, 4.000000e+00
>  %670 = fadd float %669, %665
>  %671 = fmul float %145, 4.000000e+00
>  %672 = fadd float %671, %666
>  %673 = bitcast float %670 to i32
>  %674 = bitcast float %672 to i32
>  %675 = insertelement <2 x i32> undef, i32 %673, i32 0
>  %676 = insertelement <2 x i32> %675, i32 %674, i32 1
>  %677 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %676, <8 x i32> %126, <4 x i32> %128, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %678 = extractelement <4 x float> %677, i32 0
>  %679 = fmul float %678, 0x3FB1EB8520000000
>  %680 = fmul float %144, 1.300000e+01
>  %681 = fadd float %680, %679
>  %682 = fmul float %145, 6.000000e+00
>  %683 = fadd float %682, %679
>  %684 = fadd float %667, %681
>  %685 = fadd float %668, %683
>  %686 = bitcast float %146 to i32
>  %687 = bitcast float %147 to i32
>  %688 = insertelement <2 x i32> undef, i32 %686, i32 0
>  %689 = insertelement <2 x i32> %688, i32 %687, i32 1
>  %690 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %689, <8 x i32> %114, <4 x i32> %116, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %691 = extractelement <4 x float> %690, i32 0
>  %692 = fsub float 1.000000e+00, %691
>  %693 = fmul float %692, 0x3FD1EB8520000000
>  %694 = fadd float %693, 0xBFD8F5C280000000
>  %695 = fmul float %75, 0x3FB99999A0000000
>  %696 = fmul float %75, 0x3FB99999A0000000
>  %697 = fmul float %144, 3.000000e+00
>  %698 = fadd float %697, %695
>  %699 = fadd float %145, %696
>  %700 = bitcast float %698 to i32
>  %701 = bitcast float %699 to i32
>  %702 = insertelement <2 x i32> undef, i32 %700, i32 0
>  %703 = insertelement <2 x i32> %702, i32 %701, i32 1
>  %704 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %703, <8 x i32> %126, <4 x i32> %128, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %705 = extractelement <4 x float> %704, i32 0
>  %706 = fmul float %705, 0x3FB99999A0000000
>  %707 = fmul float %137, %204
>  %708 = fmul float %138, %206
>  %709 = fadd float %708, %707
>  %710 = fmul float %139, %208
>  %711 = fadd float %709, %710
>  %712 = fmul float %162, %204
>  %713 = fmul float %163, %206
>  %714 = fadd float %713, %712
>  %715 = fmul float %164, %208
>  %716 = fadd float %714, %715
>  %717 = fmul float %75, 0xBFAC28F5C0000000
>  %718 = fmul float %75, 0xBFD3333340000000
>  %719 = fmul float %706, 0x3FC99999A0000000
>  %720 = fadd float %719, 0xBFB99999A0000000
>  %721 = fmul float %144, 6.000000e+00
>  %722 = fadd float %721, %706
>  %723 = fmul float %145, 3.000000e+00
>  %724 = fadd float %723, %706
>  %725 = fmul float %711, %720
>  %726 = fadd float %725, %722
>  %727 = fmul float %716, %720
>  %728 = fadd float %727, %724
>  %729 = fadd float %717, %726
>  %730 = fadd float %718, %728
>  %731 = fmul float %75, 0x3FB99999A0000000
>  %732 = fmul float %75, 0xBFC851EB80000000
>  %733 = fmul float %75, 0xBFB1EB8520000000
>  %734 = fmul float %75, 0xBFC99999A0000000
>  %735 = fmul float %75, 0xBFE4CCCCC0000000
>  %736 = fmul float %144, 8.000000e+00
>  %737 = fadd float %736, %734
>  %738 = fmul float %145, 6.000000e+00
>  %739 = fadd float %738, %735
>  %740 = fmul float %144, 1.300000e+01
>  %741 = fadd float %740, 0.000000e+00
>  %742 = fmul float %145, 6.000000e+00
>  %743 = fadd float %742, %664
>  %744 = bitcast float %741 to i32
>  %745 = bitcast float %743 to i32
>  %746 = insertelement <2 x i32> undef, i32 %744, i32 0
>  %747 = insertelement <2 x i32> %746, i32 %745, i32 1
>  %748 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %747, <8 x i32> %94, <4 x i32> %96, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %749 = extractelement <4 x float> %748, i32 0
>  %750 = extractelement <4 x float> %748, i32 1
>  %751 = extractelement <4 x float> %748, i32 2
>  %752 = fmul float %749, 4.000000e+00
>  %753 = fmul float %750, 2.000000e+00
>  %754 = fmul float %751, 2.000000e+00
>  %755 = bitcast float %684 to i32
>  %756 = bitcast float %685 to i32
>  %757 = insertelement <2 x i32> undef, i32 %755, i32 0
>  %758 = insertelement <2 x i32> %757, i32 %756, i32 1
>  %759 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %758, <8 x i32> %106, <4 x i32> %108, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %760 = extractelement <4 x float> %759, i32 0
>  %761 = fsub float 1.000000e+00, %760
>  %762 = fmul float %760, 3.000000e+00
>  %763 = fmul float %761, 1.280000e+02
>  %764 = fadd float %762, %763
>  %765 = fsub float 1.000000e+00, %760
>  %766 = fmul float %760, 1.500000e+00
>  %767 = fmul float %765, 0x4037C48160000000
>  %768 = fadd float %766, %767
>  %769 = bitcast float %684 to i32
>  %770 = bitcast float %685 to i32
>  %771 = insertelement <2 x i32> undef, i32 %769, i32 0
>  %772 = insertelement <2 x i32> %771, i32 %770, i32 1
>  %773 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %772, <8 x i32> %118, <4 x i32> %120, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %774 = extractelement <4 x float> %773, i32 0
>  %775 = extractelement <4 x float> %773, i32 1
>  %776 = extractelement <4 x float> %773, i32 2
>  %777 = fmul float %764, %774
>  %778 = fmul float %768, %775
>  %779 = fmul float %776, 0.000000e+00
>  %780 = call float @llvm.AMDIL.clamp.(float %777, float 0.000000e+00, float 1.000000e+00)
>  %781 = call float @llvm.AMDIL.clamp.(float %778, float 0.000000e+00, float 1.000000e+00)
>  %782 = call float @llvm.AMDIL.clamp.(float %779, float 0.000000e+00, float 1.000000e+00)
>  %783 = fmul float %780, 0x4003333340000000
>  %784 = fmul float %781, 0x400CCCCCC0000000
>  %785 = fmul float %782, 0.000000e+00
>  %786 = bitcast float %684 to i32
>  %787 = bitcast float %685 to i32
>  %788 = insertelement <2 x i32> undef, i32 %786, i32 0
>  %789 = insertelement <2 x i32> %788, i32 %787, i32 1
>  %790 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %789, <8 x i32> %118, <4 x i32> %120, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %791 = extractelement <4 x float> %790, i32 3
>  %792 = fsub float 1.000000e+00, %791
>  %793 = fadd float %792, %694
>  %794 = bitcast float %793 to i32
>  %795 = bitcast float %793 to i32
>  %796 = insertelement <2 x i32> undef, i32 %794, i32 0
>  %797 = insertelement <2 x i32> %796, i32 %795, i32 1
>  %798 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %797, <8 x i32> %110, <4 x i32> %112, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %799 = extractelement <4 x float> %798, i32 0
>  %800 = bitcast float %684 to i32
>  %801 = bitcast float %685 to i32
>  %802 = insertelement <2 x i32> undef, i32 %800, i32 0
>  %803 = insertelement <2 x i32> %802, i32 %801, i32 1
>  %804 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %803, <8 x i32> %106, <4 x i32> %108, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %805 = extractelement <4 x float> %804, i32 0
>  %806 = fsub float 1.000000e+00, %805
>  %807 = fsub float %799, %806
>  %808 = call float @llvm.AMDIL.clamp.(float %807, float 0.000000e+00, float 1.000000e+00)
>  %809 = fsub float 1.000000e+00, %808
>  %810 = fmul float %783, %808
>  %811 = fmul float %752, %809
>  %812 = fadd float %810, %811
>  %813 = fsub float 1.000000e+00, %808
>  %814 = fmul float %784, %808
>  %815 = fmul float %753, %813
>  %816 = fadd float %814, %815
>  %817 = fsub float 1.000000e+00, %808
>  %818 = fmul float %785, %808
>  %819 = fmul float %754, %817
>  %820 = fadd float %818, %819
>  %821 = bitcast float %729 to i32
>  %822 = bitcast float %730 to i32
>  %823 = insertelement <2 x i32> undef, i32 %821, i32 0
>  %824 = insertelement <2 x i32> %823, i32 %822, i32 1
>  %825 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %824, <8 x i32> %118, <4 x i32> %120, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %826 = extractelement <4 x float> %825, i32 0
>  %827 = extractelement <4 x float> %825, i32 1
>  %828 = extractelement <4 x float> %825, i32 2
>  %829 = fmul float %826, 1.000000e+01
>  %830 = fmul float %827, 1.000000e+01
>  %831 = fmul float %828, 0.000000e+00
>  %832 = bitcast float %729 to i32
>  %833 = bitcast float %730 to i32
>  %834 = insertelement <2 x i32> undef, i32 %832, i32 0
>  %835 = insertelement <2 x i32> %834, i32 %833, i32 1
>  %836 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %835, <8 x i32> %118, <4 x i32> %120, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %837 = extractelement <4 x float> %836, i32 3
>  %838 = fsub float 1.000000e+00, %837
>  %839 = fadd float %838, %694
>  %840 = bitcast float %839 to i32
>  %841 = bitcast float %839 to i32
>  %842 = insertelement <2 x i32> undef, i32 %840, i32 0
>  %843 = insertelement <2 x i32> %842, i32 %841, i32 1
>  %844 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %843, <8 x i32> %110, <4 x i32> %112, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %845 = extractelement <4 x float> %844, i32 0
>  %846 = bitcast float %729 to i32
>  %847 = bitcast float %730 to i32
>  %848 = insertelement <2 x i32> undef, i32 %846, i32 0
>  %849 = insertelement <2 x i32> %848, i32 %847, i32 1
>  %850 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %849, <8 x i32> %106, <4 x i32> %108, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %851 = extractelement <4 x float> %850, i32 0
>  %852 = fsub float 1.000000e+00, %851
>  %853 = fsub float %845, %852
>  %854 = call float @llvm.AMDIL.clamp.(float %853, float 0.000000e+00, float 1.000000e+00)
>  %855 = fsub float 1.000000e+00, %854
>  %856 = fmul float %829, %854
>  %857 = fmul float %812, %855
>  %858 = fadd float %856, %857
>  %859 = fsub float 1.000000e+00, %854
>  %860 = fmul float %830, %854
>  %861 = fmul float %816, %859
>  %862 = fadd float %860, %861
>  %863 = fsub float 1.000000e+00, %854
>  %864 = fmul float %831, %854
>  %865 = fmul float %820, %863
>  %866 = fadd float %864, %865
>  %867 = fmul float %144, 1.500000e+00
>  %868 = fadd float %867, %731
>  %869 = fmul float %145, 1.500000e+00
>  %870 = fadd float %869, %732
>  %871 = bitcast float %868 to i32
>  %872 = bitcast float %870 to i32
>  %873 = insertelement <2 x i32> undef, i32 %871, i32 0
>  %874 = insertelement <2 x i32> %873, i32 %872, i32 1
>  %875 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %874, <8 x i32> %126, <4 x i32> %128, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %876 = extractelement <4 x float> %875, i32 0
>  %877 = fmul float %144, 2.000000e+00
>  %878 = fadd float %877, %733
>  %879 = fmul float %145, 2.000000e+00
>  %880 = fadd float %879, 0.000000e+00
>  %881 = bitcast float %878 to i32
>  %882 = bitcast float %880 to i32
>  %883 = insertelement <2 x i32> undef, i32 %881, i32 0
>  %884 = insertelement <2 x i32> %883, i32 %882, i32 1
>  %885 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %884, <8 x i32> %126, <4 x i32> %128, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %886 = extractelement <4 x float> %885, i32 0
>  %887 = fmul float %75, 0x3FF921FB00000000
>  %888 = call float @llvm.sin.f32(float %887)
>  %889 = call float @llvm.AMDIL.clamp.(float %888, float 0.000000e+00, float 1.000000e+00)
>  %890 = fsub float 1.000000e+00, %889
>  %891 = fmul float %886, %889
>  %892 = fmul float %876, %890
>  %893 = fadd float %891, %892
>  %894 = fadd float %893, 0x3FC3333340000000
>  %895 = fmul float %858, %894
>  %896 = fmul float %862, %894
>  %897 = fmul float %866, %894
>  %898 = bitcast float %737 to i32
>  %899 = bitcast float %739 to i32
>  %900 = insertelement <2 x i32> undef, i32 %898, i32 0
>  %901 = insertelement <2 x i32> %900, i32 %899, i32 1
>  %902 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %901, <8 x i32> %86, <4 x i32> %88, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %903 = extractelement <4 x float> %902, i32 0
>  %904 = extractelement <4 x float> %902, i32 1
>  %905 = extractelement <4 x float> %902, i32 2
>  %906 = bitcast float %146 to i32
>  %907 = bitcast float %147 to i32
>  %908 = insertelement <2 x i32> undef, i32 %906, i32 0
>  %909 = insertelement <2 x i32> %908, i32 %907, i32 1
>  %910 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %909, <8 x i32> %114, <4 x i32> %116, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %911 = extractelement <4 x float> %910, i32 3
>  %912 = bitcast float %737 to i32
>  %913 = bitcast float %739 to i32
>  %914 = insertelement <2 x i32> undef, i32 %912, i32 0
>  %915 = insertelement <2 x i32> %914, i32 %913, i32 1
>  %916 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %915, <8 x i32> %126, <4 x i32> %128, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %917 = extractelement <4 x float> %916, i32 0
>  %918 = fsub float 1.000000e+00, %917
>  %919 = fmul float %911, 0xBFECCCCCC0000000
>  %920 = fadd float %919, %918
>  %921 = bitcast float %920 to i32
>  %922 = bitcast float %920 to i32
>  %923 = insertelement <2 x i32> undef, i32 %921, i32 0
>  %924 = insertelement <2 x i32> %923, i32 %922, i32 1
>  %925 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %924, <8 x i32> %98, <4 x i32> %100, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %926 = extractelement <4 x float> %925, i32 0
>  %927 = call float @llvm.AMDIL.clamp.(float %926, float 0.000000e+00, float 1.000000e+00)
>  %928 = fsub float 1.000000e+00, %927
>  %929 = fmul float %903, %927
>  %930 = fmul float %895, %928
>  %931 = fadd float %929, %930
>  %932 = fsub float 1.000000e+00, %927
>  %933 = fmul float %904, %927
>  %934 = fmul float %896, %932
>  %935 = fadd float %933, %934
>  %936 = fsub float 1.000000e+00, %927
>  %937 = fmul float %905, %927
>  %938 = fmul float %897, %936
>  %939 = fadd float %937, %938
>  %940 = fsub float 1.000000e+00, %39
>  %941 = fsub float 1.000000e+00, %40
>  %942 = fsub float 1.000000e+00, %41
>  %943 = fmul float %931, %940
>  %944 = fmul float %935, %941
>  %945 = fmul float %939, %942
>  %946 = call float @llvm.AMDIL.clamp.(float %943, float 0.000000e+00, float 1.000000e+00)
>  %947 = call float @llvm.AMDIL.clamp.(float %944, float 0.000000e+00, float 1.000000e+00)
>  %948 = call float @llvm.AMDIL.clamp.(float %945, float 0.000000e+00, float 1.000000e+00)
>  %949 = fmul float %75, 0xBFC99999A0000000
>  %950 = fmul float %75, 0xBFE4CCCCC0000000
>  %951 = bitcast float %146 to i32
>  %952 = bitcast float %147 to i32
>  %953 = insertelement <2 x i32> undef, i32 %951, i32 0
>  %954 = insertelement <2 x i32> %953, i32 %952, i32 1
>  %955 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %954, <8 x i32> %114, <4 x i32> %116, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %956 = extractelement <4 x float> %955, i32 3
>  %957 = fmul float %144, 8.000000e+00
>  %958 = fadd float %957, %949
>  %959 = fmul float %145, 6.000000e+00
>  %960 = fadd float %959, %950
>  %961 = bitcast float %958 to i32
>  %962 = bitcast float %960 to i32
>  %963 = insertelement <2 x i32> undef, i32 %961, i32 0
>  %964 = insertelement <2 x i32> %963, i32 %962, i32 1
>  %965 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %964, <8 x i32> %126, <4 x i32> %128, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %966 = extractelement <4 x float> %965, i32 0
>  %967 = fsub float 1.000000e+00, %966
>  %968 = fmul float %956, 0xBFECCCCCC0000000
>  %969 = fadd float %968, %967
>  %970 = bitcast float %969 to i32
>  %971 = bitcast float %969 to i32
>  %972 = insertelement <2 x i32> undef, i32 %970, i32 0
>  %973 = insertelement <2 x i32> %972, i32 %971, i32 1
>  %974 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %973, <8 x i32> %98, <4 x i32> %100, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %975 = extractelement <4 x float> %974, i32 0
>  %976 = call float @llvm.AMDIL.clamp.(float %975, float 0.000000e+00, float 1.000000e+00)
>  %977 = fsub float 1.000000e+00, %976
>  %978 = fmul float %976, 3.000000e+00
>  %979 = fmul float %977, 5.000000e+01
>  %980 = fadd float %978, %979
>  %981 = fmul float %980, 0x3FA47AE140000000
>  %982 = fsub float 1.000000e+00, %981
>  %983 = fmul float %981, 0x3FE99999A0000000
>  %984 = fmul float %982, 0x3FC99999A0000000
>  %985 = fadd float %983, %984
>  %986 = fmul float %985, %73
>  %987 = fadd float %986, %72
>  %988 = call float @llvm.maxnum.f32(float %987, float 0x3FA47AE140000000)
>  %989 = fmul float %946, %63
>  %990 = fadd float %989, %60
>  %991 = fmul float %947, %63
>  %992 = fadd float %991, %61
>  %993 = fmul float %948, %63
>  %994 = fadd float %993, %62
>  %995 = fmul float %67, 0x3FA47AE140000000
>  %996 = fadd float %995, %64
>  %997 = fmul float %67, 0x3FA47AE140000000
>  %998 = fadd float %997, %65
>  %999 = fmul float %67, 0x3FA47AE140000000
>  %1000 = fadd float %999, %66
>  %1001 = fmul float %542, 0xBFDF454580000000
>  %1002 = fmul float %543, 0x3FDF454580000000
>  %1003 = fmul float %541, 0xBFDF454580000000
>  %1004 = fmul float %1001, 0x4000C15220000000
>  %1005 = fmul float %1002, 0x4000C15220000000
>  %1006 = fmul float %1003, 0x4000C15220000000
>  %1007 = fmul float %25, 0x3FEC5BF9C0000000
>  %1008 = fmul float %26, %1004
>  %1009 = fadd float %1007, %1008
>  %1010 = fmul float %27, %1005
>  %1011 = fadd float %1009, %1010
>  %1012 = fmul float %28, %1006
>  %1013 = fadd float %1011, %1012
>  %1014 = fmul float %29, 0x3FEC5BF9C0000000
>  %1015 = fmul float %30, %1004
>  %1016 = fadd float %1014, %1015
>  %1017 = fmul float %31, %1005
>  %1018 = fadd float %1016, %1017
>  %1019 = fmul float %32, %1006
>  %1020 = fadd float %1018, %1019
>  %1021 = fmul float %33, 0x3FEC5BF9C0000000
>  %1022 = fmul float %34, %1004
>  %1023 = fadd float %1021, %1022
>  %1024 = fmul float %35, %1005
>  %1025 = fadd float %1023, %1024
>  %1026 = fmul float %36, %1006
>  %1027 = fadd float %1025, %1026
>  %1028 = call float @llvm.maxnum.f32(float %1013, float 0.000000e+00)
>  %1029 = call float @llvm.maxnum.f32(float %1020, float 0.000000e+00)
>  %1030 = call float @llvm.maxnum.f32(float %1027, float 0.000000e+00)
>  %1031 = fmul float %1028, %77
>  %1032 = fmul float %1029, %78
>  %1033 = fmul float %1030, %79
>  %1034 = fmul float %75, 0xBFD99999A0000000
>  %1035 = fmul float %75, 0x3FB99999A0000000
>  %1036 = fmul float %75, 0x3FC99999A0000000
>  %1037 = fmul float %75, 0xBFA47AE140000000
>  %1038 = fmul float %75, 0xBFE19999A0000000
>  %1039 = fmul float %144, 4.000000e+00
>  %1040 = fadd float %1039, %1035
>  %1041 = fmul float %145, 4.000000e+00
>  %1042 = fadd float %1041, %1036
>  %1043 = bitcast float %1040 to i32
>  %1044 = bitcast float %1042 to i32
>  %1045 = insertelement <2 x i32> undef, i32 %1043, i32 0
>  %1046 = insertelement <2 x i32> %1045, i32 %1044, i32 1
>  %1047 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %1046, <8 x i32> %126, <4 x i32> %128, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %1048 = extractelement <4 x float> %1047, i32 0
>  %1049 = fmul float %1048, 0x3FB1EB8520000000
>  %1050 = fmul float %144, 1.300000e+01
>  %1051 = fadd float %1050, %1049
>  %1052 = fmul float %145, 6.000000e+00
>  %1053 = fadd float %1052, %1049
>  %1054 = fadd float %1037, %1051
>  %1055 = fadd float %1038, %1053
>  %1056 = bitcast float %146 to i32
>  %1057 = bitcast float %147 to i32
>  %1058 = insertelement <2 x i32> undef, i32 %1056, i32 0
>  %1059 = insertelement <2 x i32> %1058, i32 %1057, i32 1
>  %1060 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %1059, <8 x i32> %114, <4 x i32> %116, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %1061 = extractelement <4 x float> %1060, i32 0
>  %1062 = fsub float 1.000000e+00, %1061
>  %1063 = fmul float %1062, 0x3FD1EB8520000000
>  %1064 = fadd float %1063, 0xBFD8F5C280000000
>  %1065 = fmul float %75, 0x3FB99999A0000000
>  %1066 = fmul float %75, 0x3FB99999A0000000
>  %1067 = fmul float %144, 3.000000e+00
>  %1068 = fadd float %1067, %1065
>  %1069 = fadd float %145, %1066
>  %1070 = bitcast float %1068 to i32
>  %1071 = bitcast float %1069 to i32
>  %1072 = insertelement <2 x i32> undef, i32 %1070, i32 0
>  %1073 = insertelement <2 x i32> %1072, i32 %1071, i32 1
>  %1074 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %1073, <8 x i32> %126, <4 x i32> %128, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %1075 = extractelement <4 x float> %1074, i32 0
>  %1076 = fmul float %1075, 0x3FB99999A0000000
>  %1077 = fmul float %137, %204
>  %1078 = fmul float %138, %206
>  %1079 = fadd float %1078, %1077
>  %1080 = fmul float %139, %208
>  %1081 = fadd float %1079, %1080
>  %1082 = fmul float %162, %204
>  %1083 = fmul float %163, %206
>  %1084 = fadd float %1083, %1082
>  %1085 = fmul float %164, %208
>  %1086 = fadd float %1084, %1085
>  %1087 = fmul float %75, 0xBFAC28F5C0000000
>  %1088 = fmul float %75, 0xBFD3333340000000
>  %1089 = fmul float %1076, 0x3FC99999A0000000
>  %1090 = fadd float %1089, 0xBFB99999A0000000
>  %1091 = fmul float %144, 6.000000e+00
>  %1092 = fadd float %1091, %1076
>  %1093 = fmul float %145, 3.000000e+00
>  %1094 = fadd float %1093, %1076
>  %1095 = fmul float %1081, %1090
>  %1096 = fadd float %1095, %1092
>  %1097 = fmul float %1086, %1090
>  %1098 = fadd float %1097, %1094
>  %1099 = fadd float %1087, %1096
>  %1100 = fadd float %1088, %1098
>  %1101 = fmul float %75, 0x3FB99999A0000000
>  %1102 = fmul float %75, 0xBFC851EB80000000
>  %1103 = fmul float %75, 0xBFB1EB8520000000
>  %1104 = fmul float %75, 0xBFE99999A0000000
>  %1105 = fmul float %75, 0xBF947AE140000000
>  %1106 = fmul float %75, 0xBFD47AE140000000
>  %1107 = fmul float %75, 0x3F9EB851E0000000
>  %1108 = fmul float %75, 0xBFD99999A0000000
>  %1109 = fmul float %75, 0xBFC99999A0000000
>  %1110 = fmul float %75, 0xBFE4CCCCC0000000
>  %1111 = fmul float %144, 8.000000e+00
>  %1112 = fadd float %1111, %1109
>  %1113 = fmul float %145, 6.000000e+00
>  %1114 = fadd float %1113, %1110
>  %1115 = fmul float %1031, %990
>  %1116 = fmul float %1032, %992
>  %1117 = fmul float %1033, %994
>  %1118 = fadd float %990, %996
>  %1119 = fadd float %992, %998
>  %1120 = fadd float %994, %1000
>  %1121 = fsub float 1.000000e+00, %76
>  %1122 = fmul float %1118, %76
>  %1123 = fmul float %1115, %1121
>  %1124 = fadd float %1122, %1123
>  %1125 = fsub float 1.000000e+00, %76
>  %1126 = fmul float %1119, %76
>  %1127 = fmul float %1116, %1125
>  %1128 = fadd float %1126, %1127
>  %1129 = fsub float 1.000000e+00, %76
>  %1130 = fmul float %1120, %76
>  %1131 = fmul float %1117, %1129
>  %1132 = fadd float %1130, %1131
>  %1133 = fmul float %144, 1.300000e+01
>  %1134 = fadd float %1133, 0.000000e+00
>  %1135 = fmul float %145, 6.000000e+00
>  %1136 = fadd float %1135, %1034
>  %1137 = bitcast float %1134 to i32
>  %1138 = bitcast float %1136 to i32
>  %1139 = insertelement <2 x i32> undef, i32 %1137, i32 0
>  %1140 = insertelement <2 x i32> %1139, i32 %1138, i32 1
>  %1141 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %1140, <8 x i32> %94, <4 x i32> %96, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %1142 = extractelement <4 x float> %1141, i32 0
>  %1143 = extractelement <4 x float> %1141, i32 1
>  %1144 = extractelement <4 x float> %1141, i32 2
>  %1145 = fmul float %1142, 4.000000e+00
>  %1146 = fmul float %1143, 2.000000e+00
>  %1147 = fmul float %1144, 2.000000e+00
>  %1148 = bitcast float %1054 to i32
>  %1149 = bitcast float %1055 to i32
>  %1150 = insertelement <2 x i32> undef, i32 %1148, i32 0
>  %1151 = insertelement <2 x i32> %1150, i32 %1149, i32 1
>  %1152 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %1151, <8 x i32> %106, <4 x i32> %108, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %1153 = extractelement <4 x float> %1152, i32 0
>  %1154 = fsub float 1.000000e+00, %1153
>  %1155 = fmul float %1153, 3.000000e+00
>  %1156 = fmul float %1154, 1.280000e+02
>  %1157 = fadd float %1155, %1156
>  %1158 = fsub float 1.000000e+00, %1153
>  %1159 = fmul float %1153, 1.500000e+00
>  %1160 = fmul float %1158, 0x4037C48160000000
>  %1161 = fadd float %1159, %1160
>  %1162 = bitcast float %1054 to i32
>  %1163 = bitcast float %1055 to i32
>  %1164 = insertelement <2 x i32> undef, i32 %1162, i32 0
>  %1165 = insertelement <2 x i32> %1164, i32 %1163, i32 1
>  %1166 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %1165, <8 x i32> %118, <4 x i32> %120, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %1167 = extractelement <4 x float> %1166, i32 0
>  %1168 = extractelement <4 x float> %1166, i32 1
>  %1169 = extractelement <4 x float> %1166, i32 2
>  %1170 = fmul float %1157, %1167
>  %1171 = fmul float %1161, %1168
>  %1172 = fmul float %1169, 0.000000e+00
>  %1173 = call float @llvm.AMDIL.clamp.(float %1170, float 0.000000e+00, float 1.000000e+00)
>  %1174 = call float @llvm.AMDIL.clamp.(float %1171, float 0.000000e+00, float 1.000000e+00)
>  %1175 = call float @llvm.AMDIL.clamp.(float %1172, float 0.000000e+00, float 1.000000e+00)
>  %1176 = fmul float %1173, 0x4003333340000000
>  %1177 = fmul float %1174, 0x400CCCCCC0000000
>  %1178 = fmul float %1175, 0.000000e+00
>  %1179 = bitcast float %1054 to i32
>  %1180 = bitcast float %1055 to i32
>  %1181 = insertelement <2 x i32> undef, i32 %1179, i32 0
>  %1182 = insertelement <2 x i32> %1181, i32 %1180, i32 1
>  %1183 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %1182, <8 x i32> %118, <4 x i32> %120, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %1184 = extractelement <4 x float> %1183, i32 3
>  %1185 = fsub float 1.000000e+00, %1184
>  %1186 = fadd float %1185, %1064
>  %1187 = bitcast float %1186 to i32
>  %1188 = bitcast float %1186 to i32
>  %1189 = insertelement <2 x i32> undef, i32 %1187, i32 0
>  %1190 = insertelement <2 x i32> %1189, i32 %1188, i32 1
>  %1191 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %1190, <8 x i32> %110, <4 x i32> %112, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %1192 = extractelement <4 x float> %1191, i32 0
>  %1193 = bitcast float %1054 to i32
>  %1194 = bitcast float %1055 to i32
>  %1195 = insertelement <2 x i32> undef, i32 %1193, i32 0
>  %1196 = insertelement <2 x i32> %1195, i32 %1194, i32 1
>  %1197 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %1196, <8 x i32> %106, <4 x i32> %108, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %1198 = extractelement <4 x float> %1197, i32 0
>  %1199 = fsub float 1.000000e+00, %1198
>  %1200 = fsub float %1192, %1199
>  %1201 = call float @llvm.AMDIL.clamp.(float %1200, float 0.000000e+00, float 1.000000e+00)
>  %1202 = fsub float 1.000000e+00, %1201
>  %1203 = fmul float %1176, %1201
>  %1204 = fmul float %1145, %1202
>  %1205 = fadd float %1203, %1204
>  %1206 = fsub float 1.000000e+00, %1201
>  %1207 = fmul float %1177, %1201
>  %1208 = fmul float %1146, %1206
>  %1209 = fadd float %1207, %1208
>  %1210 = fsub float 1.000000e+00, %1201
>  %1211 = fmul float %1178, %1201
>  %1212 = fmul float %1147, %1210
>  %1213 = fadd float %1211, %1212
>  %1214 = bitcast float %1099 to i32
>  %1215 = bitcast float %1100 to i32
>  %1216 = insertelement <2 x i32> undef, i32 %1214, i32 0
>  %1217 = insertelement <2 x i32> %1216, i32 %1215, i32 1
>  %1218 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %1217, <8 x i32> %118, <4 x i32> %120, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %1219 = extractelement <4 x float> %1218, i32 0
>  %1220 = extractelement <4 x float> %1218, i32 1
>  %1221 = extractelement <4 x float> %1218, i32 2
>  %1222 = fmul float %1219, 1.000000e+01
>  %1223 = fmul float %1220, 1.000000e+01
>  %1224 = fmul float %1221, 0.000000e+00
>  %1225 = bitcast float %1099 to i32
>  %1226 = bitcast float %1100 to i32
>  %1227 = insertelement <2 x i32> undef, i32 %1225, i32 0
>  %1228 = insertelement <2 x i32> %1227, i32 %1226, i32 1
>  %1229 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %1228, <8 x i32> %118, <4 x i32> %120, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %1230 = extractelement <4 x float> %1229, i32 3
>  %1231 = fsub float 1.000000e+00, %1230
>  %1232 = fadd float %1231, %1064
>  %1233 = bitcast float %1232 to i32
>  %1234 = bitcast float %1232 to i32
>  %1235 = insertelement <2 x i32> undef, i32 %1233, i32 0
>  %1236 = insertelement <2 x i32> %1235, i32 %1234, i32 1
>  %1237 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %1236, <8 x i32> %110, <4 x i32> %112, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %1238 = extractelement <4 x float> %1237, i32 0
>  %1239 = bitcast float %1099 to i32
>  %1240 = bitcast float %1100 to i32
>  %1241 = insertelement <2 x i32> undef, i32 %1239, i32 0
>  %1242 = insertelement <2 x i32> %1241, i32 %1240, i32 1
>  %1243 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %1242, <8 x i32> %106, <4 x i32> %108, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %1244 = extractelement <4 x float> %1243, i32 0
>  %1245 = fsub float 1.000000e+00, %1244
>  %1246 = fsub float %1238, %1245
>  %1247 = call float @llvm.AMDIL.clamp.(float %1246, float 0.000000e+00, float 1.000000e+00)
>  %1248 = fsub float 1.000000e+00, %1247
>  %1249 = fmul float %1222, %1247
>  %1250 = fmul float %1205, %1248
>  %1251 = fadd float %1249, %1250
>  %1252 = fsub float 1.000000e+00, %1247
>  %1253 = fmul float %1223, %1247
>  %1254 = fmul float %1209, %1252
>  %1255 = fadd float %1253, %1254
>  %1256 = fsub float 1.000000e+00, %1247
>  %1257 = fmul float %1224, %1247
>  %1258 = fmul float %1213, %1256
>  %1259 = fadd float %1257, %1258
>  %1260 = fmul float %144, 1.500000e+00
>  %1261 = fadd float %1260, %1101
>  %1262 = fmul float %145, 1.500000e+00
>  %1263 = fadd float %1262, %1102
>  %1264 = bitcast float %1261 to i32
>  %1265 = bitcast float %1263 to i32
>  %1266 = insertelement <2 x i32> undef, i32 %1264, i32 0
>  %1267 = insertelement <2 x i32> %1266, i32 %1265, i32 1
>  %1268 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %1267, <8 x i32> %126, <4 x i32> %128, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %1269 = extractelement <4 x float> %1268, i32 0
>  %1270 = fmul float %144, 2.000000e+00
>  %1271 = fadd float %1270, %1103
>  %1272 = fmul float %145, 2.000000e+00
>  %1273 = fadd float %1272, 0.000000e+00
>  %1274 = bitcast float %1271 to i32
>  %1275 = bitcast float %1273 to i32
>  %1276 = insertelement <2 x i32> undef, i32 %1274, i32 0
>  %1277 = insertelement <2 x i32> %1276, i32 %1275, i32 1
>  %1278 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %1277, <8 x i32> %126, <4 x i32> %128, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %1279 = extractelement <4 x float> %1278, i32 0
>  %1280 = fmul float %75, 0x3FF921FB00000000
>  %1281 = call float @llvm.sin.f32(float %1280)
>  %1282 = call float @llvm.AMDIL.clamp.(float %1281, float 0.000000e+00, float 1.000000e+00)
>  %1283 = fsub float 1.000000e+00, %1282
>  %1284 = fmul float %1279, %1282
>  %1285 = fmul float %1269, %1283
>  %1286 = fadd float %1284, %1285
>  %1287 = fadd float %1286, 0x3FC3333340000000
>  %1288 = fmul float %1251, %1287
>  %1289 = fmul float %1255, %1287
>  %1290 = fmul float %1259, %1287
>  %1291 = fmul float %144, 8.000000e+00
>  %1292 = fadd float %1291, 0.000000e+00
>  %1293 = fmul float %145, 8.000000e+00
>  %1294 = fadd float %1293, %1104
>  %1295 = bitcast float %1292 to i32
>  %1296 = bitcast float %1294 to i32
>  %1297 = insertelement <2 x i32> undef, i32 %1295, i32 0
>  %1298 = insertelement <2 x i32> %1297, i32 %1296, i32 1
>  %1299 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %1298, <8 x i32> %94, <4 x i32> %96, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %1300 = extractelement <4 x float> %1299, i32 0
>  %1301 = extractelement <4 x float> %1299, i32 1
>  %1302 = extractelement <4 x float> %1299, i32 2
>  %1303 = fmul float %1300, 1.000000e+02
>  %1304 = fmul float %1301, 5.000000e+01
>  %1305 = fmul float %1302, 0.000000e+00
>  %1306 = fmul float %144, 5.000000e+00
>  %1307 = fadd float %1306, %1105
>  %1308 = fadd float %145, %1106
>  %1309 = bitcast float %1307 to i32
>  %1310 = bitcast float %1308 to i32
>  %1311 = insertelement <2 x i32> undef, i32 %1309, i32 0
>  %1312 = insertelement <2 x i32> %1311, i32 %1310, i32 1
>  %1313 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %1312, <8 x i32> %126, <4 x i32> %128, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %1314 = extractelement <4 x float> %1313, i32 0
>  %1315 = fmul float %1303, %1314
>  %1316 = fmul float %1304, %1314
>  %1317 = fmul float %1305, %1314
>  %1318 = bitcast float %146 to i32
>  %1319 = bitcast float %147 to i32
>  %1320 = insertelement <2 x i32> undef, i32 %1318, i32 0
>  %1321 = insertelement <2 x i32> %1320, i32 %1319, i32 1
>  %1322 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %1321, <8 x i32> %114, <4 x i32> %116, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %1323 = extractelement <4 x float> %1322, i32 1
>  %1324 = fsub float 1.000000e+00, %1323
>  %1325 = fmul float %1315, %1323
>  %1326 = fmul float %1288, %1324
>  %1327 = fadd float %1325, %1326
>  %1328 = fsub float 1.000000e+00, %1323
>  %1329 = fmul float %1316, %1323
>  %1330 = fmul float %1289, %1328
>  %1331 = fadd float %1329, %1330
>  %1332 = fsub float 1.000000e+00, %1323
>  %1333 = fmul float %1317, %1323
>  %1334 = fmul float %1290, %1332
>  %1335 = fadd float %1333, %1334
>  %1336 = fmul float %144, 1.500000e+00
>  %1337 = fadd float %1336, %1107
>  %1338 = fmul float %145, 3.000000e+00
>  %1339 = fadd float %1338, %1108
>  %1340 = bitcast float %1337 to i32
>  %1341 = bitcast float %1339 to i32
>  %1342 = insertelement <2 x i32> undef, i32 %1340, i32 0
>  %1343 = insertelement <2 x i32> %1342, i32 %1341, i32 1
>  %1344 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %1343, <8 x i32> %90, <4 x i32> %92, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %1345 = extractelement <4 x float> %1344, i32 0
>  %1346 = extractelement <4 x float> %1344, i32 1
>  %1347 = extractelement <4 x float> %1344, i32 2
>  %1348 = fmul float %1327, %1345
>  %1349 = fmul float %1331, %1346
>  %1350 = fmul float %1335, %1347
>  %1351 = bitcast float %1112 to i32
>  %1352 = bitcast float %1114 to i32
>  %1353 = insertelement <2 x i32> undef, i32 %1351, i32 0
>  %1354 = insertelement <2 x i32> %1353, i32 %1352, i32 1
>  %1355 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %1354, <8 x i32> %86, <4 x i32> %88, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %1356 = extractelement <4 x float> %1355, i32 0
>  %1357 = call float @llvm.fabs.f32(float %1356)
>  %1358 = call float @llvm.maxnum.f32(float %1357, float 0x3EB0C6F7A0000000)
>  %1359 = fmul float %1358, 2.500000e-01
>  %1360 = fmul float %1358, 0.000000e+00
>  %1361 = fmul float %1358, 0.000000e+00
>  %1362 = bitcast float %146 to i32
>  %1363 = bitcast float %147 to i32
>  %1364 = insertelement <2 x i32> undef, i32 %1362, i32 0
>  %1365 = insertelement <2 x i32> %1364, i32 %1363, i32 1
>  %1366 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %1365, <8 x i32> %114, <4 x i32> %116, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %1367 = extractelement <4 x float> %1366, i32 3
>  %1368 = bitcast float %1112 to i32
>  %1369 = bitcast float %1114 to i32
>  %1370 = insertelement <2 x i32> undef, i32 %1368, i32 0
>  %1371 = insertelement <2 x i32> %1370, i32 %1369, i32 1
>  %1372 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %1371, <8 x i32> %126, <4 x i32> %128, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %1373 = extractelement <4 x float> %1372, i32 0
>  %1374 = fsub float 1.000000e+00, %1373
>  %1375 = fmul float %1367, 0xBFECCCCCC0000000
>  %1376 = fadd float %1375, %1374
>  %1377 = bitcast float %1376 to i32
>  %1378 = bitcast float %1376 to i32
>  %1379 = insertelement <2 x i32> undef, i32 %1377, i32 0
>  %1380 = insertelement <2 x i32> %1379, i32 %1378, i32 1
>  %1381 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %1380, <8 x i32> %98, <4 x i32> %100, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %1382 = extractelement <4 x float> %1381, i32 0
>  %1383 = call float @llvm.AMDIL.clamp.(float %1382, float 0.000000e+00, float 1.000000e+00)
>  %1384 = fsub float 1.000000e+00, %1383
>  %1385 = fmul float %1359, %1383
>  %1386 = fmul float %1348, %1384
>  %1387 = fadd float %1385, %1386
>  %1388 = fsub float 1.000000e+00, %1383
>  %1389 = fmul float %1360, %1383
>  %1390 = fmul float %1349, %1388
>  %1391 = fadd float %1389, %1390
>  %1392 = fsub float 1.000000e+00, %1383
>  %1393 = fmul float %1361, %1383
>  %1394 = fmul float %1350, %1392
>  %1395 = fadd float %1393, %1394
>  %1396 = fadd float %1387, %39
>  %1397 = fadd float %1391, %40
>  %1398 = fadd float %1395, %41
>  %1399 = fadd float %1124, %1396
>  %1400 = fadd float %1128, %1397
>  %1401 = fadd float %1132, %1398
>  %1402 = fmul float %1399, 0x3FD3333340000000
>  %1403 = fmul float %1400, 0x3FE2E147A0000000
>  %1404 = fadd float %1403, %1402
>  %1405 = fmul float %1401, 0x3FBC28F5C0000000
>  %1406 = fadd float %1404, %1405
>  %1407 = fmul float %194, 7.812500e-03
>  %1408 = fmul float %196, 7.812500e-03
>  %1409 = call float @llvm.floor.f32(float %1407)
>  %1410 = fsub float %1407, %1409
>  %1411 = call float @llvm.floor.f32(float %1408)
>  %1412 = fsub float %1408, %1411
>  %1413 = fmul float %1410, 1.280000e+02
>  %1414 = fadd float %1413, 0xC05015CCC0000000
>  %1415 = fmul float %1412, 1.280000e+02
>  %1416 = fadd float %1415, 0xC0521DCCC0000000
>  %1417 = fmul float %541, 5.000000e-01
>  %1418 = fadd float %1417, 5.000000e-01
>  %1419 = fmul float %542, 5.000000e-01
>  %1420 = fadd float %1419, 5.000000e-01
>  %1421 = fmul float %543, 5.000000e-01
>  %1422 = fadd float %1421, 5.000000e-01
>  %1423 = fptoui float %83 to i32
>  %1424 = fptoui float %84 to i32
>  %1425 = shl i32 %1423, 1
>  %1426 = add i32 %1425, %1424
>  %1427 = uitofp i32 %1426 to float
>  %1428 = fmul float %1427, 0x3FD5555540000000
>  %1429 = fmul float %1414, %1414
>  %1430 = fmul float %1416, %1416
>  %1431 = fmul float %1414, %1416
>  %1432 = fmul float %1429, 0x4034640060000000
>  %1433 = fmul float %1430, 0x404E5A0020000000
>  %1434 = fadd float %1433, %1432
>  %1435 = fmul float %1431, 0x40036CCAC0000000
>  %1436 = fadd float %1434, %1435
>  %1437 = call float @llvm.floor.f32(float %1436)
>  %1438 = fsub float %1436, %1437
>  %1439 = fmul float %1438, 5.000000e-01
>  %1440 = fadd float %1439, -5.000000e-01
>  %1441 = fmul float %1031, 0x3FD3333340000000
>  %1442 = fmul float %1032, 0x3FE2E147A0000000
>  %1443 = fadd float %1442, %1441
>  %1444 = fmul float %1033, 0x3FBC28F5C0000000
>  %1445 = fadd float %1443, %1444
>  %1446 = fadd float %1445, 3.906250e-03
>  %1447 = call float @llvm.log2.f32(float %1446)
>  %1448 = fmul float %1447, 6.250000e-02
>  %1449 = fadd float %1448, 5.000000e-01
>  %1450 = fmul float %1440, 0x3F70101020000000
>  %1451 = fadd float %1450, %1449
>  %1452 = call i32 @llvm.SI.packf16(float %1399, float %1400)
>  %1453 = bitcast i32 %1452 to float
>  %1454 = call i32 @llvm.SI.packf16(float %1401, float %1406)
>  %1455 = bitcast i32 %1454 to float
>  %1456 = call i32 @llvm.SI.packf16(float %1418, float %1420)
>  %1457 = bitcast i32 %1456 to float
>  %1458 = call i32 @llvm.SI.packf16(float %1422, float %1428)
>  %1459 = bitcast i32 %1458 to float
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 0, i32 1, float %1453, float %1455, float %1453, float %1455)
>  %1460 = call i32 @llvm.SI.packf16(float 0.000000e+00, float 5.000000e-01)
>  %1461 = bitcast i32 %1460 to float
>  %1462 = call i32 @llvm.SI.packf16(float 0.000000e+00, float 0x3F70101020000000)
>  %1463 = bitcast i32 %1462 to float
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 1, i32 1, float %1457, float %1459, float %1457, float %1459)
>  %1464 = call i32 @llvm.SI.packf16(float %946, float %947)
>  %1465 = bitcast i32 %1464 to float
>  %1466 = call i32 @llvm.SI.packf16(float %948, float %1451)
>  %1467 = bitcast i32 %1466 to float
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 2, i32 1, float %1461, float %1463, float %1461, float %1463)
>  %1468 = call i32 @llvm.SI.packf16(float %988, float 0.000000e+00)
>  %1469 = bitcast i32 %1468 to float
>  %1470 = call i32 @llvm.SI.packf16(float 0.000000e+00, float 0.000000e+00)
>  %1471 = bitcast i32 %1470 to float
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 3, i32 1, float %1465, float %1467, float %1465, float %1467)
>  %1472 = call i32 @llvm.SI.packf16(float 1.000000e+00, float 1.000000e+00)
>  %1473 = bitcast i32 %1472 to float
>  %1474 = call i32 @llvm.SI.packf16(float 1.000000e+00, float 1.000000e+00)
>  %1475 = bitcast i32 %1474 to float
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 4, i32 1, float %1469, float %1471, float %1469, float %1471)
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 5, i32 1, float %1473, float %1475, float %1473, float %1475)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.rsq.clamped.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>declare void @llvm.AMDGPU.kill(float)
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sin.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.log2.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" "enable-no-nans-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = !{!"const", null, i32 1}
>VM start=0x16F0E7000  end=0x16F0E9000 | Buffer 8192 bytes
>
>Shader Disassembly:
>
>	s_wqm_b64 exec, exec                                                         ; BEFE077E
>	s_mov_b64 s[36:37], s[6:7]                                                   ; BEA40106
>	s_mov_b64 vcc, s[4:5]                                                        ; BEEA0104
>	s_mov_b32 m0, s10                                                            ; BEFC000A
>	s_load_dwordx4 s[48:51], s[2:3], 0x0                                         ; C00A0C01 00000000
>	s_nop 0                                                                      ; BF800000
>	s_load_dwordx4 s[4:7], s[2:3], 0x10                                          ; C00A0101 00000010
>	s_waitcnt lgkmcnt(0)                                                         ; BF8C007F
>	v_writelane_b32 v61, s4, 0                                                   ; D28A003D 00010004
>	v_writelane_b32 v61, s5, 1                                                   ; D28A003D 00010205
>	v_writelane_b32 v61, s6, 2                                                   ; D28A003D 00010406
>	v_writelane_b32 v61, s7, 3                                                   ; D28A003D 00010607
>	v_interp_p1_f32 v5, v0, 0, 0, [m0]                                           ; D4140000
>	s_load_dwordx4 s[8:11], s[2:3], 0x20                                         ; C00A0201 00000020
>	s_nop 0                                                                      ; BF800000
>	s_load_dwordx4 s[0:3], s[2:3], 0x30                                          ; C00A0001 00000030
>	s_waitcnt lgkmcnt(0)                                                         ; BF8C007F
>	v_writelane_b32 v61, s0, 12                                                  ; D28A003D 00011800
>	v_writelane_b32 v61, s1, 13                                                  ; D28A003D 00011A01
>	v_writelane_b32 v61, s2, 14                                                  ; D28A003D 00011C02
>	v_writelane_b32 v61, s3, 15                                                  ; D28A003D 00011E03
>	s_load_dwordx4 s[0:3], vcc, 0x0                                              ; C00A0035 00000000
>	s_waitcnt lgkmcnt(0)                                                         ; BF8C007F
>	v_writelane_b32 v61, s0, 4                                                   ; D28A003D 00010800
>	v_writelane_b32 v61, s1, 5                                                   ; D28A003D 00010A01
>	v_writelane_b32 v61, s2, 6                                                   ; D28A003D 00010C02
>	v_writelane_b32 v61, s3, 7                                                   ; D28A003D 00010E03
>	v_interp_p2_f32 v5, [v5], v1, 0, 0, [m0]                                     ; D4150001
>	s_load_dwordx4 s[0:3], vcc, 0x10                                             ; C00A0035 00000010
>	s_waitcnt lgkmcnt(0)                                                         ; BF8C007F
>	v_writelane_b32 v61, s0, 16                                                  ; D28A003D 00012000
>	v_writelane_b32 v61, s1, 17                                                  ; D28A003D 00012201
>	v_writelane_b32 v61, s2, 18                                                  ; D28A003D 00012402
>	v_writelane_b32 v61, s3, 19                                                  ; D28A003D 00012603
>	v_interp_p1_f32 v6, v0, 1, 0, [m0]                                           ; D4180100
>	s_load_dwordx4 s[0:3], vcc, 0x20                                             ; C00A0035 00000020
>	s_waitcnt lgkmcnt(0)                                                         ; BF8C007F
>	v_writelane_b32 v61, s0, 8                                                   ; D28A003D 00011000
>	v_writelane_b32 v61, s1, 9                                                   ; D28A003D 00011201
>	v_writelane_b32 v61, s2, 10                                                  ; D28A003D 00011402
>	v_writelane_b32 v61, s3, 11                                                  ; D28A003D 00011603
>	v_interp_p2_f32 v6, [v6], v1, 1, 0, [m0]                                     ; D4190101
>	v_interp_p1_f32 v7, v0, 2, 0, [m0]                                           ; D41C0200
>	s_load_dwordx4 s[0:3], vcc, 0x30                                             ; C00A0035 00000030
>	s_waitcnt lgkmcnt(0)                                                         ; BF8C007F
>	v_writelane_b32 v61, s0, 20                                                  ; D28A003D 00012800
>	v_writelane_b32 v61, s1, 21                                                  ; D28A003D 00012A01
>	v_writelane_b32 v61, s2, 22                                                  ; D28A003D 00012C02
>	v_writelane_b32 v61, s3, 23                                                  ; D28A003D 00012E03
>	s_load_dwordx4 s[0:3], vcc, 0x40                                             ; C00A0035 00000040
>	s_waitcnt lgkmcnt(0)                                                         ; BF8C007F
>	v_writelane_b32 v61, s0, 24                                                  ; D28A003D 00013000
>	v_writelane_b32 v61, s1, 25                                                  ; D28A003D 00013201
>	v_writelane_b32 v61, s2, 26                                                  ; D28A003D 00013402
>	v_writelane_b32 v61, s3, 27                                                  ; D28A003D 00013603
>	s_buffer_load_dword s68, s[8:11], 0x0                                        ; C0221104 00000000
>	v_interp_p2_f32 v7, [v7], v1, 2, 0, [m0]                                     ; D41D0201
>	v_interp_p1_f32 v8, v0, 0, 1, [m0]                                           ; D4200400
>	v_interp_p2_f32 v8, [v8], v1, 0, 1, [m0]                                     ; D4210401
>	v_interp_p1_f32 v9, v0, 1, 1, [m0]                                           ; D4240500
>	v_interp_p2_f32 v9, [v9], v1, 1, 1, [m0]                                     ; D4250501
>	v_interp_p1_f32 v10, v0, 2, 1, [m0]                                          ; D4280600
>	v_interp_p2_f32 v10, [v10], v1, 2, 1, [m0]                                   ; D4290601
>	v_interp_p1_f32 v11, v0, 3, 1, [m0]                                          ; D42C0700
>	v_interp_p2_f32 v11, [v11], v1, 3, 1, [m0]                                   ; D42D0701
>	v_interp_p1_f32 v3, v0, 0, 2, [m0]                                           ; D40C0800
>	v_interp_p2_f32 v3, [v3], v1, 0, 2, [m0]                                     ; D40D0801
>	v_interp_p1_f32 v4, v0, 1, 2, [m0]                                           ; D4100900
>	v_interp_p2_f32 v4, [v4], v1, 1, 2, [m0]                                     ; D4110901
>	v_interp_p1_f32 v12, v0, 2, 2, [m0]                                          ; D4300A00
>	v_interp_p2_f32 v12, [v12], v1, 2, 2, [m0]                                   ; D4310A01
>	v_interp_p1_f32 v13, v0, 3, 2, [m0]                                          ; D4340B00
>	v_interp_p2_f32 v13, [v13], v1, 3, 2, [m0]                                   ; D4350B01
>	v_interp_p1_f32 v14, v0, 0, 3, [m0]                                          ; D4380C00
>	v_interp_p2_f32 v14, [v14], v1, 0, 3, [m0]                                   ; D4390C01
>	v_interp_p1_f32 v15, v0, 1, 3, [m0]                                          ; D43C0D00
>	v_interp_p2_f32 v15, [v15], v1, 1, 3, [m0]                                   ; D43D0D01
>	v_interp_p1_f32 v16, v0, 2, 3, [m0]                                          ; D4400E00
>	v_interp_p2_f32 v16, [v16], v1, 2, 3, [m0]                                   ; D4410E01
>	s_buffer_load_dword s39, s[8:11], 0x348                                      ; C02209C4 00000348
>	v_interp_p1_f32 v17, v0, 3, 3, [m0]                                          ; D4440F00
>	v_interp_p2_f32 v17, [v17], v1, 3, 3, [m0]                                   ; D4450F01
>	v_mov_b32_e32 v1, 0xbecccccd                                                 ; 7E0202FF BECCCCCD
>	v_mov_b32_e32 v18, 0x3fc00000                                                ; 7E2402FF 3FC00000
>	s_buffer_load_dword s38, s[8:11], 0x35c                                      ; C0220984 0000035C
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s69, s[8:11], 0x660                                      ; C0221144 00000660
>	s_nop 0                                                                      ; BF800000
>	s_load_dwordx4 s[12:15], vcc, 0xc0                                           ; C00A0335 000000C0
>	s_nop 0                                                                      ; BF800000
>	s_load_dwordx8 s[28:35], s[36:37], 0x180                                     ; C00E0712 00000180
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s70, s[8:11], 0x664                                      ; C0221184 00000664
>	s_waitcnt lgkmcnt(0)                                                         ; BF8C007F
>	v_mul_f32_e32 v20, s39, v1                                                   ; 0A280227
>	v_mul_f32_e32 v19, v18, v3                                                   ; 0A260712
>	v_mov_b32_e32 v0, 0x3cf5c28f                                                 ; 7E0002FF 3CF5C28F
>	v_mac_f32_e32 v19, s39, v0                                                   ; 2C260027
>	v_mov_b32_e32 v0, 0x40400000                                                 ; 7E0002FF 40400000
>	s_load_dwordx4 s[16:19], vcc, 0xb0                                           ; C00A0435 000000B0
>	s_nop 0                                                                      ; BF800000
>	s_load_dwordx8 s[60:67], s[36:37], 0x160                                     ; C00E0F12 00000160
>	v_mac_f32_e32 v20, v0, v4                                                    ; 2C280900
>	image_sample v[21:22], 3, 0, 0, 0, 0, 0, 0, 0, v[19:20], s[28:35], s[12:15]  ; F0800300 00671513
>	v_mov_b32_e32 v23, 0x41500000                                                ; 7E2E02FF 41500000
>	v_mov_b32_e32 v24, 0x40c00000                                                ; 7E3002FF 40C00000
>	v_mad_f32 v25, v3, v23, 0                                                    ; D1C10019 02022F03
>	s_load_dwordx4 s[12:15], vcc, 0xa0                                           ; C00A0335 000000A0
>	s_waitcnt lgkmcnt(0)                                                         ; BF8C007F
>	v_writelane_b32 v61, s12, 28                                                 ; D28A003D 0001380C
>	v_writelane_b32 v61, s13, 29                                                 ; D28A003D 00013A0D
>	v_writelane_b32 v61, s14, 30                                                 ; D28A003D 00013C0E
>	v_writelane_b32 v61, s15, 31                                                 ; D28A003D 00013E0F
>	s_load_dwordx8 s[52:59], s[36:37], 0x140                                     ; C00E0D12 00000140
>	v_mul_f32_e32 v28, v24, v4                                                   ; 0A380918
>	v_mad_f32 v26, s39, v1, v28                                                  ; D1C1001A 04720227
>	image_sample v[29:30], 3, 0, 0, 0, 0, 0, 0, 0, v[25:26], s[60:67], s[16:19]  ; F0800300 008F1D19
>	v_mov_b32_e32 v27, 0x3dcccccd                                                ; 7E3602FF 3DCCCCCD
>	v_mov_b32_e32 v1, 0x3e4ccccd                                                 ; 7E0202FF 3E4CCCCD
>	v_mul_f32_e32 v31, s39, v27                                                  ; 0A3E3627
>	v_mul_f32_e32 v33, s39, v1                                                   ; 0A420227
>	v_mad_f32 v32, 4.0, v3, v31                                                  ; D1C10020 047E06F6
>	v_mac_f32_e32 v33, 4.0, v4                                                   ; 2C4208F6
>	s_waitcnt lgkmcnt(0)                                                         ; BF8C007F
>	image_sample v32, 1, 0, 0, 0, 0, 0, 0, 0, v[32:33], s[52:59], s[12:15]       ; F0800100 006D2020
>	s_mov_b32 s32, s12                                                           ; BEA0000C
>	s_mov_b32 s33, s13                                                           ; BEA1000D
>	s_mov_b32 s34, s14                                                           ; BEA2000E
>	s_mov_b32 s35, s15                                                           ; BEA3000F
>	v_mov_b32_e32 v33, 0x3d8f5c29                                                ; 7E4202FF 3D8F5C29
>	s_load_dwordx4 s[64:67], vcc, 0x90                                           ; C00A1035 00000090
>	s_nop 0                                                                      ; BF800000
>	s_load_dwordx8 s[16:23], s[36:37], 0x120                                     ; C00E0412 00000120
>	s_waitcnt vmcnt(0)                                                           ; BF8C0770
>	v_mul_f32_e32 v34, v33, v32                                                  ; 0A444121
>	s_load_dwordx4 s[12:15], vcc, 0x70                                           ; C00A0335 00000070
>	s_nop 0                                                                      ; BF800000
>	s_load_dwordx8 s[0:7], s[36:37], 0xe0                                        ; C00E0012 000000E0
>	v_mac_f32_e32 v34, v23, v3                                                   ; 2C440717
>	v_mad_f32 v35, v33, v32, v28                                                 ; D1C10023 04724121
>	v_mov_b32_e32 v23, 0xbd23d70a                                                ; 7E2E02FF BD23D70A
>	v_mac_f32_e32 v34, s39, v23                                                  ; 2C442E27
>	v_mov_b32_e32 v23, 0xbf0ccccd                                                ; 7E2E02FF BF0CCCCD
>	v_mac_f32_e32 v35, s39, v23                                                  ; 2C462E27
>	s_waitcnt lgkmcnt(0)                                                         ; BF8C007F
>	image_sample v[32:33], 3, 0, 0, 0, 0, 0, 0, 0, v[34:35], s[16:23], s[64:67]  ; F0800300 02042022
>	s_load_dwordx4 s[60:63], vcc, 0x80                                           ; C00A0F35 00000080
>	s_nop 0                                                                      ; BF800000
>	s_load_dwordx8 s[40:47], s[36:37], 0x100                                     ; C00E0A12 00000100
>	image_sample v[36:39], 15, 0, 0, 0, 0, 0, 0, 0, v[12:13], s[0:7], s[12:15]   ; F0800F00 0060240C
>	v_mul_f32_e32 v12, v6, v10                                                   ; 0A181506
>	v_mad_f32 v12, v9, v7, -v12                                                  ; D1C1000C 84320F09
>	v_mul_f32_e32 v13, v7, v8                                                    ; 0A1A1107
>	v_mad_f32 v13, v10, v5, -v13                                                 ; D1C1000D 84360B0A
>	v_mul_f32_e32 v23, v5, v9                                                    ; 0A2E1305
>	v_mad_f32 v23, v8, v6, -v23                                                  ; D1C10017 845E0D08
>	v_mul_f32_e32 v12, v11, v12                                                  ; 0A18190B
>	v_mul_f32_e32 v13, v11, v13                                                  ; 0A1A1B0B
>	v_mul_f32_e32 v11, v11, v23                                                  ; 0A162F0B
>	v_mul_f32_e32 v23, v14, v14                                                  ; 0A2E1D0E
>	v_mac_f32_e32 v23, v15, v15                                                  ; 2C2E1F0F
>	v_mac_f32_e32 v23, v16, v16                                                  ; 2C2E2110
>	v_rsq_f32_e32 v23, v23                                                       ; 7E2E4917
>	v_mad_f32 v40, v0, v3, v31                                                   ; D1C10028 047E0700
>	v_mad_f32 v41, s39, v27, v4                                                  ; D1C10029 04123627
>	image_sample v40, 1, 0, 0, 0, 0, 0, 0, 0, v[40:41], s[52:59], s[32:35]       ; F0800100 010D2828
>	v_mov_b32_e32 v41, 0x7f7fffff                                                ; 7E5202FF 7F7FFFFF
>	v_min_f32_e32 v23, v41, v23                                                  ; 142E2F29
>	v_mov_b32_e32 v42, 0xff7fffff                                                ; 7E5402FF FF7FFFFF
>	v_max_f32_e32 v23, v42, v23                                                  ; 162E2F2A
>	v_mul_f32_e32 v43, v23, v14                                                  ; 0A561D17
>	v_mul_f32_e32 v44, v23, v15                                                  ; 0A581F17
>	v_mul_f32_e32 v45, v43, v5                                                   ; 0A5A0B2B
>	v_mad_f32 v45, v6, -v44, -v45                                                ; D1C1002D C4B65906
>	v_mul_f32_e32 v43, v43, v12                                                  ; 0A56192B
>	v_mad_f32 v43, v13, -v44, -v43                                               ; D1C1002B C4AE590D
>	v_mul_f32_e32 v23, v23, v16                                                  ; 0A2E2117
>	v_mad_f32 v44, -v7, v23, v45                                                 ; D1C1002C 24B62F07
>	v_mad_f32 v23, -v11, v23, v43                                                ; D1C10017 24AE2F0B
>	s_waitcnt vmcnt(0)                                                           ; BF8C0770
>	v_mul_f32_e32 v46, v27, v40                                                  ; 0A5C511B
>	v_madak_f32_e32 v27, v46, v1, 0xbdcccccd                                     ; 3036032E BDCCCCCD
>	v_mad_f32 v45, v24, v3, v46                                                  ; D1C1002D 04BA0718
>	v_mac_f32_e32 v46, v0, v4                                                    ; 2C5C0900
>	v_mac_f32_e32 v45, v27, v44                                                  ; 2C5A591B
>	v_mac_f32_e32 v46, v27, v23                                                  ; 2C5C2F1B
>	v_mov_b32_e32 v23, 0xbd6147ae                                                ; 7E2E02FF BD6147AE
>	v_mac_f32_e32 v45, s39, v23                                                  ; 2C5A2E27
>	v_mov_b32_e32 v23, 0xbe99999a                                                ; 7E2E02FF BE99999A
>	v_mac_f32_e32 v46, s39, v23                                                  ; 2C5C2E27
>	image_sample v[23:24], 3, 0, 0, 0, 0, 0, 0, 0, v[45:46], s[16:23], s[64:67]  ; F0800300 0204172D
>	v_mov_b32_e32 v40, 0x41000000                                                ; 7E5002FF 41000000
>	s_load_dwordx8 s[0:7], s[36:37], 0x80                                        ; C00E0012 00000080
>	v_mul_f32_e32 v27, v40, v3                                                   ; 0A360728
>	v_mov_b32_e32 v43, 0xbe4ccccd                                                ; 7E5602FF BE4CCCCD
>	v_mac_f32_e32 v27, s39, v43                                                  ; 2C365627
>	v_mov_b32_e32 v43, 0xbf266666                                                ; 7E5602FF BF266666
>	v_mac_f32_e32 v28, s39, v43                                                  ; 2C385627
>	s_load_dwordx4 s[28:31], vcc, 0x50                                           ; C00A0735 00000050
>	s_nop 0                                                                      ; BF800000
>	s_load_dwordx4 s[64:67], vcc, 0x60                                           ; C00A1035 00000060
>	s_nop 0                                                                      ; BF800000
>	s_load_dwordx8 s[12:19], s[36:37], 0xc0                                      ; C00E0312 000000C0
>	s_nop 0                                                                      ; BF800000
>	s_load_dwordx8 s[20:27], s[36:37], 0xa0                                      ; C00E0512 000000A0
>	v_readlane_b32 s32, v61, 24                                                  ; D2890020 0001313D
>	v_readlane_b32 s33, v61, 25                                                  ; D2890021 0001333D
>	v_readlane_b32 s34, v61, 26                                                  ; D2890022 0001353D
>	v_readlane_b32 s35, v61, 27                                                  ; D2890023 0001373D
>	s_nop 3                                                                      ; BF800003
>	s_waitcnt lgkmcnt(0)                                                         ; BF8C007F
>	image_sample v[43:44], 3, 0, 0, 0, 0, 0, 0, 0, v[27:28], s[0:7], s[32:35]    ; F0800300 01002B1B
>	v_sub_f32_e32 v36, 1.0, v36                                                  ; 044848F2
>	v_mov_b32_e32 v47, 0xbec7ae14                                                ; 7E5E02FF BEC7AE14
>	v_madmk_f32_e32 v36, v36, v47, 0x3e8f5c29                                    ; 2E485F24 3E8F5C29
>	image_sample v[47:50], 15, 0, 0, 0, 0, 0, 0, 0, v[34:35], s[40:47], s[60:63] ; F0800F00 01EA2F22
>	s_waitcnt vmcnt(0)                                                           ; BF8C0770
>	v_sub_f32_e32 v50, 1.0, v50                                                  ; 046464F2
>	v_add_f32_e32 v50, v36, v50                                                  ; 02646524
>	v_mov_b32_e32 v51, v50                                                       ; 7E660332
>	image_sample v50, 1, 0, 0, 0, 0, 0, 0, 0, v[50:51], s[12:19], s[64:67]       ; F0800100 02033232
>	s_nop 0                                                                      ; BF800000
>	image_sample v34, 1, 0, 0, 0, 0, 0, 0, 0, v[34:35], s[20:27], s[28:31]       ; F0800100 00E52222
>	s_nop 0                                                                      ; BF800000
>	image_sample v[51:54], 15, 0, 0, 0, 0, 0, 0, 0, v[45:46], s[40:47], s[60:63] ; F0800F00 01EA332D
>	s_waitcnt vmcnt(0)                                                           ; BF8C0770
>	v_sub_f32_e32 v35, 1.0, v54                                                  ; 04466CF2
>	v_add_f32_e32 v35, v36, v35                                                  ; 02464724
>	s_load_dwordx8 s[40:47], s[36:37], 0x60                                      ; C00E0A12 00000060
>	v_mov_b32_e32 v36, v35                                                       ; 7E480323
>	s_load_dwordx8 s[0:7], s[36:37], 0x20                                        ; C00E0012 00000020
>	image_sample v35, 1, 0, 0, 0, 0, 0, 0, 0, v[35:36], s[12:19], s[64:67]       ; F0800100 02032323
>	s_nop 0                                                                      ; BF800000
>	image_sample v36, 1, 0, 0, 0, 0, 0, 0, 0, v[45:46], s[20:27], s[28:31]       ; F0800100 00E5242D
>	v_readlane_b32 s32, v61, 28                                                  ; D2890020 0001393D
>	v_readlane_b32 s33, v61, 29                                                  ; D2890021 00013B3D
>	v_readlane_b32 s34, v61, 30                                                  ; D2890022 00013D3D
>	v_readlane_b32 s35, v61, 31                                                  ; D2890023 00013F3D
>	s_nop 3                                                                      ; BF800003
>	image_sample v45, 1, 0, 0, 0, 0, 0, 0, 0, v[27:28], s[52:59], s[32:35]       ; F0800100 010D2D1B
>	s_waitcnt vmcnt(0)                                                           ; BF8C0770
>	v_sub_f32_e32 v45, 1.0, v45                                                  ; 045A5AF2
>	v_madmk_f32_e32 v45, v39, v45, 0xbf666666                                    ; 2E5A5B27 BF666666
>	s_buffer_load_dword s20, s[8:11], 0x10                                       ; C0220504 00000010
>	v_mov_b32_e32 v46, v45                                                       ; 7E5C032D
>	v_readlane_b32 s12, v61, 20                                                  ; D289000C 0001293D
>	v_readlane_b32 s13, v61, 21                                                  ; D289000D 00012B3D
>	v_readlane_b32 s14, v61, 22                                                  ; D289000E 00012D3D
>	v_readlane_b32 s15, v61, 23                                                  ; D289000F 00012F3D
>	s_nop 3                                                                      ; BF800003
>	s_waitcnt lgkmcnt(0)                                                         ; BF8C007F
>	image_sample v39, 1, 0, 0, 0, 0, 0, 0, 0, v[45:46], s[40:47], s[12:15]       ; F0800100 006A272D
>	s_load_dwordx8 s[12:19], s[36:37], 0x40                                      ; C00E0312 00000040
>	v_readlane_b32 s24, v61, 16                                                  ; D2890018 0001213D
>	v_readlane_b32 s25, v61, 17                                                  ; D2890019 0001233D
>	v_readlane_b32 s26, v61, 18                                                  ; D289001A 0001253D
>	v_readlane_b32 s27, v61, 19                                                  ; D289001B 0001273D
>	s_nop 3                                                                      ; BF800003
>	image_sample v[54:57], 15, 0, 0, 0, 0, 0, 0, 0, v[19:20], s[0:7], s[24:27]   ; F0800F00 00C03613
>	s_buffer_load_dword s0, s[8:11], 0x14                                        ; C0220004 00000014
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s1, s[8:11], 0x1c                                        ; C0220044 0000001C
>	v_readlane_b32 s4, v61, 12                                                   ; D2890004 0001193D
>	v_readlane_b32 s5, v61, 13                                                   ; D2890005 00011B3D
>	v_readlane_b32 s6, v61, 14                                                   ; D2890006 00011D3D
>	v_readlane_b32 s7, v61, 15                                                   ; D2890007 00011F3D
>	s_nop 3                                                                      ; BF800003
>	s_buffer_load_dword s2, s[4:7], 0x9c                                         ; C0220082 0000009C
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s30, s[4:7], 0xac                                        ; C0220782 000000AC
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s4, s[4:7], 0xb0                                         ; C0220102 000000B0
>	v_mul_f32_e32 v19, s20, v15                                                  ; 0A261E14
>	s_buffer_load_dword s3, s[8:11], 0x4                                         ; C02200C4 00000004
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s5, s[8:11], 0xc                                         ; C0220144 0000000C
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s6, s[8:11], 0x20                                        ; C0220184 00000020
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s7, s[8:11], 0x2c                                        ; C02201C4 0000002C
>	s_waitcnt lgkmcnt(0)                                                         ; BF8C007F
>	v_mul_f32_e32 v20, s0, v15                                                   ; 0A281E00
>	s_buffer_load_dword s0, s[8:11], 0x24                                        ; C0220004 00000024
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s20, s[8:11], 0x30                                       ; C0220504 00000030
>	v_mul_f32_e32 v15, s1, v15                                                   ; 0A1E1E01
>	v_mac_f32_e32 v19, s68, v14                                                  ; 2C261C44
>	s_buffer_load_dword s1, s[8:11], 0x3c                                        ; C0220044 0000003C
>	v_mac_f32_e32 v20, s3, v14                                                   ; 2C281C03
>	v_mac_f32_e32 v15, s5, v14                                                   ; 2C1E1C05
>	v_mac_f32_e32 v19, s6, v16                                                   ; 2C262006
>	v_mac_f32_e32 v15, s7, v16                                                   ; 2C1E2007
>	s_buffer_load_dword s3, s[8:11], 0x34                                        ; C02200C4 00000034
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s5, s[8:11], 0x290                                       ; C0220144 00000290
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s6, s[8:11], 0x294                                       ; C0220184 00000294
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s7, s[8:11], 0x2a0                                       ; C02201C4 000002A0
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s21, s[8:11], 0x300                                      ; C0220544 00000300
>	s_waitcnt lgkmcnt(0)                                                         ; BF8C007F
>	v_mac_f32_e32 v15, s1, v17                                                   ; 2C1E2201
>	s_buffer_load_dword s1, s[8:11], 0x304                                       ; C0220044 00000304
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s22, s[8:11], 0x308                                      ; C0220584 00000308
>	v_rcp_f32_e32 v14, v15                                                       ; 7E1C450F
>	v_mac_f32_e32 v20, s0, v16                                                   ; 2C282000
>	v_mac_f32_e32 v19, s20, v17                                                  ; 2C262214
>	v_mac_f32_e32 v20, s3, v17                                                   ; 2C282203
>	v_mov_b32_e32 v15, s5                                                        ; 7E1E0205
>	v_mul_f32_e32 v16, v14, v19                                                  ; 0A20270E
>	v_mad_f32 v16, 0.5, v16, 0.5                                                 ; D1C10010 03C220F0
>	v_mac_f32_e32 v15, s7, v16                                                   ; 2C1E2007
>	v_mov_b32_e32 v16, s6                                                        ; 7E200206
>	v_mov_b32_e32 v17, s21                                                       ; 7E220215
>	s_buffer_load_dword s0, s[8:11], 0x30c                                       ; C0220004 0000030C
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s28, s[8:11], 0x310                                      ; C0220704 00000310
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s5, s[8:11], 0x314                                       ; C0220144 00000314
>	s_waitcnt lgkmcnt(0)                                                         ; BF8C007F
>	v_mov_b32_e32 v19, s1                                                        ; 7E260201
>	v_mov_b32_e32 v45, s22                                                       ; 7E5A0216
>	v_add_f32_e32 v46, v21, v21                                                  ; 025C2B15
>	v_mad_f32 v21, 2.0, v21, -1.0                                                ; D1C10015 03CE2AF4
>	v_add_f32_e32 v58, v22, v22                                                  ; 02742D16
>	v_mad_f32 v22, 2.0, v22, -1.0                                                ; D1C10016 03CE2CF4
>	v_mad_f32 v22, -v22, v22, 1.0                                                ; D1C10016 23CA2D16
>	v_mad_f32 v21, -v21, v21, v22                                                ; D1C10015 245A2B15
>	v_add_f32_e32 v22, v29, v29                                                  ; 022C3B1D
>	v_mad_f32 v29, 2.0, v29, -1.0                                                ; D1C1001D 03CE3AF4
>	v_add_f32_e32 v59, v30, v30                                                  ; 02763D1E
>	v_mad_f32 v30, 2.0, v30, -1.0                                                ; D1C1001E 03CE3CF4
>	v_mad_f32 v30, -v30, v30, 1.0                                                ; D1C1001E 23CA3D1E
>	v_mad_f32 v29, -v29, v29, v30                                                ; D1C1001D 247A3B1D
>	v_mad_f32 v30, 2.0, v32, -1.0                                                ; D1C1001E 03CE40F4
>	v_mad_f32 v32, 2.0, v33, -1.0                                                ; D1C10020 03CE42F4
>	v_mad_f32 v23, 2.0, v23, -1.0                                                ; D1C10017 03CE2EF4
>	v_mad_f32 v24, 2.0, v24, -1.0                                                ; D1C10018 03CE30F4
>	v_mad_f32 v33, 2.0, v43, -1.0                                                ; D1C10021 03CE56F4
>	v_mad_f32 v43, 2.0, v44, -1.0                                                ; D1C1002B 03CE58F4
>	v_sub_f32_e32 v44, 1.0, v34                                                  ; 045844F2
>	v_subrev_f32_e32 v44, v44, v50                                               ; 0658652C
>	v_mad_f32 v50, -v32, v32, 1.0                                                ; D1C10032 23CA4120
>	v_mad_f32 v50, -v30, v30, v50                                                ; D1C10032 24CA3D1E
>	v_add_f32_e64 v44, 0, v44 clamp                                              ; D101802C 00025880
>	v_sub_f32_e32 v60, 1.0, v44                                                  ; 047858F2
>	v_mad_f32 v22, v22, v60, -v60                                                ; D1C10016 84F27916
>	v_mac_f32_e32 v22, v44, v30                                                  ; 2C2C3D2C
>	v_mad_f32 v30, v59, v60, -v60                                                ; D1C1001E 84F2793B
>	v_mac_f32_e32 v30, v44, v32                                                  ; 2C3C412C
>	v_add_f32_e64 v29, 0, v29 clamp                                              ; D101801D 00023A80
>	v_sqrt_f32_e32 v29, v29                                                      ; 7E3A4F1D
>	v_add_f32_e64 v32, 0, v50 clamp                                              ; D1018020 00026480
>	v_sqrt_f32_e32 v32, v32                                                      ; 7E404F20
>	v_mad_f32 v29, -v44, v29, v29                                                ; D1C1001D 24763B2C
>	v_mac_f32_e32 v29, v44, v32                                                  ; 2C3A412C
>	v_sub_f32_e32 v32, 1.0, v36                                                  ; 044048F2
>	v_subrev_f32_e32 v32, v32, v35                                               ; 06404720
>	v_mad_f32 v35, -v24, v24, 1.0                                                ; D1C10023 23CA3118
>	v_mad_f32 v35, -v23, v23, v35                                                ; D1C10023 248E2F17
>	v_add_f32_e64 v36, 0, v32 clamp                                              ; D1018024 00024080
>	v_mad_f32 v22, -v36, v22, v22                                                ; D1C10016 245A2D24
>	v_mac_f32_e32 v22, v36, v23                                                  ; 2C2C2F24
>	v_mad_f32 v23, -v36, v30, v30                                                ; D1C10017 247A3D24
>	v_mac_f32_e32 v23, v36, v24                                                  ; 2C2E3124
>	v_add_f32_e64 v24, 0, v35 clamp                                              ; D1018018 00024680
>	v_sqrt_f32_e32 v24, v24                                                      ; 7E304F18
>	v_mad_f32 v29, -v36, v29, v29                                                ; D1C1001D 24763B24
>	v_mac_f32_e32 v29, v36, v24                                                  ; 2C3A3124
>	v_sub_f32_e32 v24, 1.0, v38                                                  ; 04304CF2
>	v_mad_f32 v30, v46, v24, -v24                                                ; D1C1001E 8462312E
>	v_mac_f32_e32 v30, v38, v22                                                  ; 2C3C2D26
>	v_mad_f32 v22, v58, v24, -v24                                                ; D1C10016 8462313A
>	v_mac_f32_e32 v22, v38, v23                                                  ; 2C2C2F26
>	v_add_f32_e64 v21, 0, v21 clamp                                              ; D1018015 00022A80
>	v_sqrt_f32_e32 v21, v21                                                      ; 7E2A4F15
>	v_mad_f32 v21, -v38, v21, v21                                                ; D1C10015 24562B26
>	v_mac_f32_e32 v21, v38, v29                                                  ; 2C2A3B26
>	v_mad_f32 v23, -v43, v43, 1.0                                                ; D1C10017 23CA572B
>	v_mad_f32 v23, -v33, v33, v23                                                ; D1C10017 245E4321
>	s_waitcnt vmcnt(1)                                                           ; BF8C0771
>	v_add_f32_e64 v24, 0, v39 clamp                                              ; D1018018 00024E80
>	v_mad_f32 v29, -v24, v30, v30                                                ; D1C1001D 247A3D18
>	v_mac_f32_e32 v29, v24, v33                                                  ; 2C3A4318
>	s_buffer_load_dword s1, s[8:11], 0x33c                                       ; C0220044 0000033C
>	v_mad_f32 v22, -v24, v22, v22                                                ; D1C10016 245A2D18
>	v_mac_f32_e32 v22, v24, v43                                                  ; 2C2C5718
>	v_add_f32_e64 v23, 0, v23 clamp                                              ; D1018017 00022E80
>	v_sqrt_f32_e32 v23, v23                                                      ; 7E2E4F17
>	v_mad_f32 v21, -v24, v21, v21                                                ; D1C10015 24562B18
>	v_mac_f32_e32 v21, v24, v23                                                  ; 2C2A2F18
>	v_mac_f32_e32 v17, s0, v29                                                   ; 2C223A00
>	v_mac_f32_e32 v19, s0, v22                                                   ; 2C262C00
>	v_mac_f32_e32 v45, s0, v21                                                   ; 2C5A2A00
>	v_mov_b32_e32 v21, s2                                                        ; 7E2A0202
>	s_waitcnt lgkmcnt(0)                                                         ; BF8C007F
>	v_mul_f32_e32 v21, s1, v21                                                   ; 0A2A2A01
>	v_cmp_nle_f32_e32 vcc, 0, v2                                                 ; 7C980480
>	v_cndmask_b32_e64 v2, -1.0, 1.0, vcc                                         ; D1000002 01A9E4F3
>	v_mul_f32_e32 v14, v14, v20                                                  ; 0A1C290E
>	v_mul_f32_e32 v2, v2, v21                                                    ; 0A042B02
>	v_mul_f32_e32 v17, v2, v17                                                   ; 0A222302
>	v_mul_f32_e32 v19, v2, v19                                                   ; 0A262702
>	v_mul_f32_e32 v2, v2, v45                                                    ; 0A045B02
>	s_buffer_load_dword s0, s[8:11], 0x2a4                                       ; C0220004 000002A4
>	v_mad_f32 v14, -0.5, v14, 0.5                                                ; D1C1000E 03C21CF1
>	v_mul_f32_e32 v20, v17, v17                                                  ; 0A282311
>	v_mac_f32_e32 v20, v19, v19                                                  ; 2C282713
>	v_mac_f32_e32 v20, v2, v2                                                    ; 2C280502
>	v_rsq_f32_e32 v20, v20                                                       ; 7E284914
>	s_buffer_load_dword s1, s[8:11], 0x2e0                                       ; C0220044 000002E0
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s2, s[8:11], 0x2e4                                       ; C0220084 000002E4
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s3, s[8:11], 0x2e8                                       ; C02200C4 000002E8
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s6, s[8:11], 0x2ec                                       ; C0220184 000002EC
>	s_waitcnt lgkmcnt(0)                                                         ; BF8C007F
>	v_mac_f32_e32 v16, s0, v14                                                   ; 2C201C00
>	v_min_f32_e32 v14, v41, v20                                                  ; 141C2929
>	v_max_f32_e32 v14, v42, v14                                                  ; 161C1D2A
>	v_mul_f32_e32 v19, v14, v19                                                  ; 0A26270E
>	v_mul_f32_e32 v12, v19, v12                                                  ; 0A181913
>	v_mul_f32_e32 v13, v19, v13                                                  ; 0A1A1B13
>	v_mul_f32_e32 v11, v19, v11                                                  ; 0A161713
>	v_mul_f32_e32 v17, v14, v17                                                  ; 0A22230E
>	v_mac_f32_e32 v12, v17, v5                                                   ; 2C180B11
>	v_mac_f32_e32 v13, v17, v6                                                   ; 2C1A0D11
>	v_mac_f32_e32 v11, v17, v7                                                   ; 2C160F11
>	v_mul_f32_e32 v2, v14, v2                                                    ; 0A04050E
>	v_mac_f32_e32 v12, v2, v8                                                    ; 2C181102
>	v_mac_f32_e32 v13, v2, v9                                                    ; 2C1A1302
>	v_mac_f32_e32 v11, v2, v10                                                   ; 2C161502
>	v_mul_f32_e32 v2, v12, v12                                                   ; 0A04190C
>	v_mac_f32_e32 v2, v13, v13                                                   ; 2C041B0D
>	v_mac_f32_e32 v2, v11, v11                                                   ; 2C04170B
>	v_rsq_f32_e32 v2, v2                                                         ; 7E044902
>	v_add_f32_e32 v5, v38, v36                                                   ; 020A4926
>	s_waitcnt vmcnt(0)                                                           ; BF8C0770
>	v_add_f32_e32 v5, v57, v5                                                    ; 020A0B39
>	v_add_f32_e64 v5, 0, v5 clamp                                                ; D1018005 00020A80
>	v_add_f32_e32 v5, v24, v5                                                    ; 020A0B18
>	v_mov_b32_e32 v6, 0x3ea8f5c3                                                 ; 7E0C02FF 3EA8F5C3
>	v_cmp_gt_f32_e32 vcc, v6, v5                                                 ; 7C880B06
>	v_cndmask_b32_e64 v5, 0, -1.0, vcc                                           ; D1000005 01A9E680
>	v_min_f32_e32 v2, v41, v2                                                    ; 14040529
>	v_max_f32_e32 v2, v42, v2                                                    ; 1604052A
>	v_mul_f32_e32 v6, v2, v12                                                    ; 0A0C1902
>	v_mul_f32_e32 v7, v2, v13                                                    ; 0A0E1B02
>	v_mul_f32_e32 v2, v2, v11                                                    ; 0A041702
>	v_sub_f32_e32 v8, 1.0, v24                                                   ; 041030F2
>	v_cmpx_le_f32_e32 vcc, 0, v5                                                 ; 7CA60A80
>	v_mov_b32_e32 v5, 0xbe428f5c                                                 ; 7E0A02FF BE428F5C
>	v_mul_f32_e32 v32, s39, v5                                                   ; 0A400A27
>	s_load_dwordx8 s[20:27], s[36:37], 0x0                                       ; C00E0512 00000000
>	v_mac_f32_e32 v31, v18, v3                                                   ; 2C3E0712
>	v_mac_f32_e32 v32, v18, v4                                                   ; 2C400912
>	v_readlane_b32 s40, v61, 8                                                   ; D2890028 0001113D
>	v_readlane_b32 s41, v61, 9                                                   ; D2890029 0001133D
>	v_readlane_b32 s42, v61, 10                                                  ; D289002A 0001153D
>	v_readlane_b32 s43, v61, 11                                                  ; D289002B 0001173D
>	s_nop 3                                                                      ; BF800003
>	image_sample v[9:11], 7, 0, 0, 0, 0, 0, 0, 0, v[25:26], s[12:19], s[40:43]   ; F0800700 01430919
>	s_mov_b32 s56, s52                                                           ; BEB80034
>	s_mov_b32 s57, s53                                                           ; BEB90035
>	s_mov_b32 s58, s54                                                           ; BEBA0036
>	s_mov_b32 s59, s55                                                           ; BEBB0037
>	s_mov_b32 s60, s56                                                           ; BEBC0038
>	s_mov_b32 s61, s57                                                           ; BEBD0039
>	s_mov_b32 s62, s58                                                           ; BEBE003A
>	s_mov_b32 s63, s59                                                           ; BEBF003B
>	image_sample v5, 1, 0, 0, 0, 0, 0, 0, 0, v[31:32], s[56:63], s[32:35]        ; F0800100 010E051F
>	v_mov_b32_e32 v12, 0xbd8f5c29                                                ; 7E1802FF BD8F5C29
>	v_add_f32_e32 v13, v3, v3                                                    ; 021A0703
>	v_mac_f32_e32 v13, s39, v12                                                  ; 2C1A1827
>	v_mad_f32 v14, 2.0, v4, 0                                                    ; D1C1000E 020208F4
>	image_sample v12, 1, 0, 0, 0, 0, 0, 0, 0, v[13:14], s[56:63], s[32:35]       ; F0800100 010E0C0D
>	v_readlane_b32 s44, v61, 4                                                   ; D289002C 0001093D
>	v_readlane_b32 s45, v61, 5                                                   ; D289002D 00010B3D
>	v_readlane_b32 s46, v61, 6                                                   ; D289002E 00010D3D
>	v_readlane_b32 s47, v61, 7                                                   ; D289002F 00010F3D
>	s_nop 3                                                                      ; BF800003
>	s_waitcnt lgkmcnt(0)                                                         ; BF8C007F
>	image_sample v[19:21], 7, 0, 0, 0, 0, 0, 0, 0, v[27:28], s[20:27], s[44:47]  ; F0800700 0165131B
>	v_mov_b32_e32 v13, 0xbf4ccccd                                                ; 7E1A02FF BF4CCCCD
>	v_mul_f32_e32 v14, s39, v13                                                  ; 0A1C1A27
>	v_mad_f32 v13, v3, v40, 0                                                    ; D1C1000D 02025103
>	v_mac_f32_e32 v14, v40, v4                                                   ; 2C1C0928
>	image_sample v[25:27], 7, 0, 0, 0, 0, 0, 0, 0, v[13:14], s[12:19], s[40:43]  ; F0800700 0143190D
>	v_mov_b32_e32 v13, 0x41be240b                                                ; 7E1A02FF 41BE240B
>	v_mad_f32 v13, -v34, v13, v13                                                ; D1C1000D 24361B22
>	v_mac_f32_e32 v13, v18, v34                                                  ; 2C1A4512
>	v_mov_b32_e32 v14, 0x43000000                                                ; 7E1C02FF 43000000
>	v_mad_f32 v17, -v34, v14, v14                                                ; D1C10011 243A1D22
>	v_mac_f32_e32 v17, v0, v34                                                   ; 2C224500
>	v_mul_f32_e32 v17, v47, v17                                                  ; 0A22232F
>	v_mul_f32_e32 v13, v48, v13                                                  ; 0A1A1B30
>	v_mul_f32_e32 v18, 0, v49                                                    ; 0A246280
>	v_mov_b32_e32 v22, 0x41200000                                                ; 7E2C02FF 41200000
>	v_mul_f32_e32 v23, v22, v51                                                  ; 0A2E6716
>	v_mul_f32_e32 v22, v22, v52                                                  ; 0A2C6916
>	v_mul_f32_e32 v28, 0, v53                                                    ; 0A386A80
>	s_waitcnt vmcnt(4)                                                           ; BF8C0774
>	v_mul_f32_e32 v9, 4.0, v9                                                    ; 0A1212F6
>	v_add_f32_e32 v10, v10, v10                                                  ; 0214150A
>	v_add_f32_e32 v11, v11, v11                                                  ; 0216170B
>	v_add_f32_e64 v17, 0, v17 clamp                                              ; D1018011 00022280
>	v_mul_f32_e32 v17, 0x4019999a, v17                                           ; 0A2222FF 4019999A
>	v_mad_f32 v9, -v44, v9, v9                                                   ; D1C10009 2426132C
>	v_mac_f32_e32 v9, v44, v17                                                   ; 2C12232C
>	v_add_f32_e64 v13, 0, v13 clamp                                              ; D101800D 00021A80
>	v_mul_f32_e32 v13, 0x40666666, v13                                           ; 0A1A1AFF 40666666
>	v_mad_f32 v10, -v44, v10, v10                                                ; D1C1000A 242A152C
>	v_mac_f32_e32 v10, v44, v13                                                  ; 2C141B2C
>	v_add_f32_e64 v13, 0, v18 clamp                                              ; D101800D 00022480
>	v_mul_f32_e32 v13, 0, v13                                                    ; 0A1A1A80
>	v_mad_f32 v11, -v44, v11, v11                                                ; D1C1000B 242E172C
>	v_mac_f32_e32 v11, v44, v13                                                  ; 2C161B2C
>	v_mad_f32 v9, -v36, v9, v9                                                   ; D1C10009 24261324
>	v_mac_f32_e32 v9, v36, v23                                                   ; 2C122F24
>	v_mad_f32 v10, -v36, v10, v10                                                ; D1C1000A 242A1524
>	v_mov_b32_e32 v13, 0x3fc90fd8                                                ; 7E1A02FF 3FC90FD8
>	v_mul_f32_e32 v13, s39, v13                                                  ; 0A1A1A27
>	v_mul_f32_e32 v13, 0x3e22f983, v13                                           ; 0A1A1AFF 3E22F983
>	v_fract_f32_e32 v13, v13                                                     ; 7E1A370D
>	v_sin_f32_e32 v13, v13                                                       ; 7E1A530D
>	v_mac_f32_e32 v10, v36, v22                                                  ; 2C142D24
>	v_mad_f32 v11, -v36, v11, v11                                                ; D1C1000B 242E1724
>	v_mac_f32_e32 v11, v36, v28                                                  ; 2C163924
>	v_add_f32_e64 v13, 0, v13 clamp                                              ; D101800D 00021A80
>	v_sub_f32_e32 v17, 1.0, v13                                                  ; 04221AF2
>	s_waitcnt vmcnt(3)                                                           ; BF8C0773
>	v_madak_f32_e32 v5, v5, v17, 0x3e19999a                                      ; 300A2305 3E19999A
>	s_waitcnt vmcnt(2)                                                           ; BF8C0772
>	v_mac_f32_e32 v5, v13, v12                                                   ; 2C0A190D
>	v_mov_b32_e32 v12, 0x42480000                                                ; 7E1802FF 42480000
>	s_waitcnt vmcnt(0)                                                           ; BF8C0770
>	v_mul_f32_e32 v13, 0x42c80000, v25                                           ; 0A1A32FF 42C80000
>	v_mul_f32_e32 v17, v12, v26                                                  ; 0A22350C
>	v_mul_f32_e32 v18, 0, v27                                                    ; 0A243680
>	v_mov_b32_e32 v22, 0xbca3d70a                                                ; 7E2C02FF BCA3D70A
>	v_mul_f32_e32 v22, s39, v22                                                  ; 0A2C2C27
>	v_madmk_f32_e32 v3, v3, v22, 0x40a00000                                      ; 2E062D03 40A00000
>	v_mov_b32_e32 v22, 0xbea3d70a                                                ; 7E2C02FF BEA3D70A
>	v_mac_f32_e32 v4, s39, v22                                                   ; 2C082C27
>	image_sample v3, 1, 0, 0, 0, 0, 0, 0, 0, v[3:4], s[56:63], s[32:35]          ; F0800100 010E0303
>	v_mul_f32_e32 v4, v5, v9                                                     ; 0A081305
>	v_mul_f32_e32 v9, v5, v10                                                    ; 0A121505
>	v_mul_f32_e32 v5, v5, v11                                                    ; 0A0A1705
>	s_waitcnt vmcnt(0)                                                           ; BF8C0770
>	v_mul_f32_e32 v10, v3, v13                                                   ; 0A141B03
>	v_mul_f32_e32 v11, v3, v17                                                   ; 0A162303
>	v_mul_f32_e32 v3, v3, v18                                                    ; 0A062503
>	v_mad_f32 v13, -v37, v4, v4                                                  ; D1C1000D 24120925
>	v_mac_f32_e32 v13, v37, v10                                                  ; 2C1A1525
>	v_mad_f32 v10, -v37, v9, v9                                                  ; D1C1000A 24261325
>	v_mac_f32_e32 v10, v37, v11                                                  ; 2C141725
>	v_mad_f32 v11, -v37, v5, v5                                                  ; D1C1000B 24160B25
>	v_mac_f32_e32 v11, v37, v3                                                   ; 2C160725
>	s_buffer_load_dword s0, s[48:51], 0x0                                        ; C0220018 00000000
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s7, s[48:51], 0x4                                        ; C02201D8 00000004
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s12, s[48:51], 0x8                                       ; C0220318 00000008
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s13, s[48:51], 0xc                                       ; C0220358 0000000C
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s14, s[48:51], 0x10                                      ; C0220398 00000010
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s15, s[48:51], 0x14                                      ; C02203D8 00000014
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s16, s[48:51], 0x18                                      ; C0220418 00000018
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s17, s[48:51], 0x1c                                      ; C0220458 0000001C
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s18, s[48:51], 0x20                                      ; C0220498 00000020
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s19, s[48:51], 0x24                                      ; C02204D8 00000024
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s20, s[48:51], 0x28                                      ; C0220518 00000028
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s21, s[48:51], 0x2c                                      ; C0220558 0000002C
>	v_readlane_b32 s24, v61, 0                                                   ; D2890018 0001013D
>	v_readlane_b32 s25, v61, 1                                                   ; D2890019 0001033D
>	v_readlane_b32 s26, v61, 2                                                   ; D289001A 0001053D
>	v_readlane_b32 s27, v61, 3                                                   ; D289001B 0001073D
>	s_nop 3                                                                      ; BF800003
>	s_buffer_load_dword s22, s[24:27], 0x0                                       ; C022058C 00000000
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s23, s[24:27], 0x4                                       ; C02205CC 00000004
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s24, s[24:27], 0x8                                       ; C022060C 00000008
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s25, s[8:11], 0x2f0                                      ; C0220644 000002F0
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s26, s[8:11], 0x2f4                                      ; C0220684 000002F4
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s27, s[8:11], 0x2f8                                      ; C02206C4 000002F8
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s29, s[8:11], 0x2fc                                      ; C0220744 000002FC
>	s_nop 0                                                                      ; BF800000
>	s_buffer_load_dword s8, s[8:11], 0x668                                       ; C0220204 00000668
>	v_mul_f32_e32 v3, v54, v13                                                   ; 0A061B36
>	v_mul_f32_e32 v10, v55, v10                                                  ; 0A141537
>	v_mul_f32_e32 v11, v56, v11                                                  ; 0A161738
>	v_mad_f32 v4, -v24, v4, v4                                                   ; D1C10004 24120918
>	v_mac_f32_e32 v4, v24, v19                                                   ; 2C082718
>	v_mad_f32 v9, -v24, v9, v9                                                   ; D1C10009 24261318
>	v_mac_f32_e32 v9, v24, v20                                                   ; 2C122918
>	v_mad_f32 v5, -v24, v5, v5                                                   ; D1C10005 24160B18
>	v_mac_f32_e32 v5, v24, v21                                                   ; 2C0A2B18
>	v_mov_b32_e32 v13, 0xbefa2a2c                                                ; 7E1A02FF BEFA2A2C
>	v_mov_b32_e32 v17, 0x358637bd                                                ; 7E2202FF 358637BD
>	v_max_f32_e64 v17, |v19|, v17                                                ; D10B0111 00022313
>	v_mul_f32_e32 v18, v13, v7                                                   ; 0A240F0D
>	v_mov_b32_e32 v19, 0x40060a91                                                ; 7E2602FF 40060A91
>	v_mul_f32_e32 v18, v19, v18                                                  ; 0A242513
>	s_waitcnt lgkmcnt(0)                                                         ; BF8C007F
>	v_mul_f32_e32 v20, s7, v18                                                   ; 0A282407
>	v_mov_b32_e32 v21, 0x3f62dfce                                                ; 7E2A02FF 3F62DFCE
>	v_mac_f32_e32 v20, s0, v21                                                   ; 2C282A00
>	v_mul_f32_e32 v22, s15, v18                                                  ; 0A2C240F
>	v_mac_f32_e32 v22, s14, v21                                                  ; 2C2C2A0E
>	v_mul_f32_e32 v18, s19, v18                                                  ; 0A242413
>	v_mac_f32_e32 v18, s18, v21                                                  ; 2C242A12
>	v_mul_f32_e32 v21, 0x3efa2a2c, v2                                            ; 0A2A04FF 3EFA2A2C
>	v_mul_f32_e32 v13, v13, v6                                                   ; 0A1A0D0D
>	v_mul_f32_e32 v21, v19, v21                                                  ; 0A2A2B13
>	v_mul_f32_e32 v13, v19, v13                                                  ; 0A1A1B13
>	v_mov_b32_e32 v19, s1                                                        ; 7E260201
>	v_mac_f32_e32 v20, s12, v21                                                  ; 2C282A0C
>	v_mac_f32_e32 v20, s13, v13                                                  ; 2C281A0D
>	v_mac_f32_e32 v22, s16, v21                                                  ; 2C2C2A10
>	v_mac_f32_e32 v22, s17, v13                                                  ; 2C2C1A11
>	v_mac_f32_e32 v18, s20, v21                                                  ; 2C242A14
>	v_mac_f32_e32 v18, s21, v13                                                  ; 2C241A15
>	v_mad_f32 v9, -s23, v9, v9                                                   ; D1C10009 24261217
>	v_mul_f32_e32 v13, 0, v17                                                    ; 0A1A2280
>	v_mad_f32 v21, v13, v24, s23                                                 ; D1C10015 005E310D
>	v_mac_f32_e32 v21, v8, v10                                                   ; 2C2A1508
>	v_mov_b32_e32 v10, s2                                                        ; 7E140202
>	v_mad_f32 v4, -s22, v4, v4                                                   ; D1C10004 24120816
>	v_mad_f32 v3, v3, v8, s22                                                    ; D1C10003 005A1103
>	v_mad_f32 v5, -s24, v5, v5                                                   ; D1C10005 24160A18
>	v_mad_f32 v8, v11, v8, s24                                                   ; D1C10008 0062110B
>	v_mov_b32_e32 v11, s3                                                        ; 7E160203
>	v_add_f32_e64 v4, 0, v4 clamp                                                ; D1018004 00020880
>	v_add_f32_e64 v9, 0, v9 clamp                                                ; D1018009 00021280
>	v_add_f32_e64 v5, 0, v5 clamp                                                ; D1018005 00020A80
>	v_mac_f32_e32 v19, s6, v4                                                    ; 2C260806
>	v_mac_f32_e32 v10, s6, v9                                                    ; 2C141206
>	v_mac_f32_e32 v11, s6, v5                                                    ; 2C160A06
>	v_max_f32_e32 v20, 0, v20                                                    ; 16282880
>	v_mul_f32_e32 v20, s69, v20                                                  ; 0A282845
>	v_max_f32_e32 v22, 0, v22                                                    ; 162C2C80
>	v_mul_f32_e32 v22, s70, v22                                                  ; 0A2C2C46
>	v_max_f32_e32 v18, 0, v18                                                    ; 16242480
>	v_mul_f32_e32 v18, s8, v18                                                   ; 0A242408
>	v_mul_f32_e32 v17, 0x3e800000, v17                                           ; 0A2222FF 3E800000
>	v_mac_f32_e32 v3, v24, v17                                                   ; 2C062318
>	v_mul_f32_e32 v17, v19, v20                                                  ; 0A222913
>	v_mac_f32_e32 v8, v24, v13                                                   ; 2C101B18
>	v_sub_f32_e64 v13, 1.0, s38                                                  ; D102000D 00004CF2
>	v_mac_f32_e32 v3, v13, v17                                                   ; 2C06230D
>	v_mul_f32_e32 v17, v10, v22                                                  ; 0A222D0A
>	v_mac_f32_e32 v21, v13, v17                                                  ; 2C2A230D
>	v_mul_f32_e32 v17, v11, v18                                                  ; 0A22250B
>	v_mac_f32_e32 v8, v13, v17                                                   ; 2C10230D
>	v_mov_b32_e32 v13, s25                                                       ; 7E1A0219
>	v_mov_b32_e32 v17, 0x3d23d70a                                                ; 7E2202FF 3D23D70A
>	v_mac_f32_e32 v13, s29, v17                                                  ; 2C1A221D
>	v_add_f32_e32 v13, v13, v19                                                  ; 021A270D
>	v_mov_b32_e32 v19, s26                                                       ; 7E26021A
>	v_mac_f32_e32 v19, s29, v17                                                  ; 2C26221D
>	v_add_f32_e32 v10, v19, v10                                                  ; 02141513
>	v_mov_b32_e32 v19, s27                                                       ; 7E26021B
>	v_mac_f32_e32 v19, s29, v17                                                  ; 2C26221D
>	v_add_f32_e32 v11, v19, v11                                                  ; 02161713
>	v_mov_b32_e32 v19, s28                                                       ; 7E26021C
>	v_mac_f32_e32 v3, s38, v13                                                   ; 2C061A26
>	v_mac_f32_e32 v21, s38, v10                                                  ; 2C2A1426
>	v_mac_f32_e32 v8, s38, v11                                                   ; 2C101626
>	v_cvt_u32_f32_e32 v10, s30                                                   ; 7E140E1E
>	v_mad_f32 v11, -v24, v12, v12                                                ; D1C1000B 24321918
>	v_mac_f32_e32 v11, v0, v24                                                   ; 2C163100
>	v_mov_b32_e32 v0, 0x3c000000                                                 ; 7E0002FF 3C000000
>	v_mul_f32_e32 v12, v0, v15                                                   ; 0A181F00
>	v_floor_f32_e32 v12, v12                                                     ; 7E183F0C
>	v_mad_f32 v12, v15, v0, -v12                                                 ; D1C1000C 8432010F
>	v_mul_f32_e32 v13, v0, v16                                                   ; 0A1A2100
>	v_floor_f32_e32 v13, v13                                                     ; 7E1A3F0D
>	v_mad_f32 v0, v16, v0, -v13                                                  ; D1C10000 84360110
>	v_mov_b32_e32 v13, 0x3e99999a                                                ; 7E1A02FF 3E99999A
>	v_mov_b32_e32 v15, 0x3f170a3d                                                ; 7E1E02FF 3F170A3D
>	v_mul_f32_e32 v16, v13, v20                                                  ; 0A20290D
>	v_mac_f32_e32 v16, v15, v22                                                  ; 2C202D0F
>	v_mul_f32_e32 v13, v13, v3                                                   ; 0A1A070D
>	v_mac_f32_e32 v13, v15, v21                                                  ; 2C1A2B0F
>	v_mov_b32_e32 v15, 0x3de147ae                                                ; 7E1E02FF 3DE147AE
>	v_mac_f32_e32 v16, v15, v18                                                  ; 2C20250F
>	v_mac_f32_e32 v13, v15, v8                                                   ; 2C1A110F
>	v_cvt_pkrtz_f16_f32_e64 v3, v3, v21                                          ; D2960003 00022B03
>	v_cvt_pkrtz_f16_f32_e64 v8, v8, v13                                          ; D2960008 00021B08
>	exp 15, 0, 1, 0, 0, v3, v8, v3, v8                                           ; C400040F 08030803
>	s_waitcnt expcnt(0)                                                          ; BF8C070F
>	v_mul_f32_e32 v3, v17, v11                                                   ; 0A061711
>	v_mad_f32 v1, -v3, v1, v1                                                    ; D1C10001 24060303
>	v_madmk_f32_e32 v1, v3, v1, 0x3f4ccccd                                       ; 2E020303 3F4CCCCD
>	v_cvt_u32_f32_e32 v3, s4                                                     ; 7E060E04
>	v_mac_f32_e32 v19, s5, v1                                                    ; 2C260205
>	v_lshlrev_b32_e32 v1, 1, v10                                                 ; 24021481
>	v_add_i32_e32 v1, vcc, v3, v1                                                ; 32020303
>	v_mad_f32 v3, 0.5, v6, 0.5                                                   ; D1C10003 03C20CF0
>	v_cvt_f32_u32_e32 v1, v1                                                     ; 7E020D01
>	v_mad_f32 v6, 0.5, v7, 0.5                                                   ; D1C10006 03C20EF0
>	v_cvt_pkrtz_f16_f32_e64 v3, v3, v6                                           ; D2960003 00020D03
>	v_mad_f32 v2, 0.5, v2, 0.5                                                   ; D1C10002 03C204F0
>	v_mul_f32_e32 v1, 0x3eaaaaaa, v1                                             ; 0A0202FF 3EAAAAAA
>	v_cvt_pkrtz_f16_f32_e64 v1, v2, v1                                           ; D2960001 00020302
>	exp 15, 1, 1, 0, 0, v3, v1, v3, v1                                           ; C400041F 01030103
>	s_waitcnt expcnt(0)                                                          ; BF8C070F
>	v_madak_f32_e32 v1, v12, v14, 0xc280ae66                                     ; 30021D0C C280AE66
>	v_madak_f32_e32 v0, v0, v14, 0xc290ee66                                      ; 30001D00 C290EE66
>	v_mul_f32_e32 v2, v1, v1                                                     ; 0A040301
>	v_mul_f32_e32 v1, v0, v1                                                     ; 0A020300
>	v_mul_f32_e32 v0, v0, v0                                                     ; 0A000100
>	v_mul_f32_e32 v2, 0x41a32003, v2                                             ; 0A0404FF 41A32003
>	v_madmk_f32_e32 v0, v0, v2, 0x4272d001                                       ; 2E000500 4272D001
>	v_madmk_f32_e32 v0, v1, v0, 0x401b6656                                       ; 2E000101 401B6656
>	v_add_f32_e32 v1, 0x3b800000, v16                                            ; 020220FF 3B800000
>	v_log_f32_e32 v1, v1                                                         ; 7E024301
>	v_fract_f32_e32 v0, v0                                                       ; 7E003700
>	v_mad_f32 v0, 0.5, v0, -0.5                                                  ; D1C10000 03C600F0
>	v_mov_b32_e32 v2, 0x3d800000                                                 ; 7E0402FF 3D800000
>	v_mad_f32 v1, v2, v1, 0.5                                                    ; D1C10001 03C20302
>	v_mov_b32_e32 v2, 0x3b808081                                                 ; 7E0402FF 3B808081
>	v_mac_f32_e32 v1, v2, v0                                                     ; 2C020102
>	v_cvt_pkrtz_f16_f32_e64 v0, 0, 0.5                                           ; D2960000 0001E080
>	v_cvt_pkrtz_f16_f32_e64 v2, 0, v2                                            ; D2960002 00020480
>	exp 15, 2, 1, 0, 0, v0, v2, v0, v2                                           ; C400042F 02000200
>	s_waitcnt expcnt(0)                                                          ; BF8C070F
>	v_cvt_pkrtz_f16_f32_e64 v0, v4, v9                                           ; D2960000 00021304
>	v_cvt_pkrtz_f16_f32_e64 v1, v5, v1                                           ; D2960001 00020305
>	exp 15, 3, 1, 0, 0, v0, v1, v0, v1                                           ; C400043F 01000100
>	s_waitcnt expcnt(0)                                                          ; BF8C070F
>	v_max_f32_e32 v0, v17, v19                                                   ; 16002711
>	v_cvt_pkrtz_f16_f32_e64 v0, v0, 0                                            ; D2960000 00010100
>	v_cvt_pkrtz_f16_f32_e64 v1, 0, 0                                             ; D2960001 00010080
>	exp 15, 4, 1, 0, 0, v0, v1, v0, v1                                           ; C400044F 01000100
>	s_waitcnt expcnt(0)                                                          ; BF8C070F
>	v_cvt_pkrtz_f16_f32_e64 v0, 1.0, 1.0                                         ; D2960000 0001E4F2
>	exp 15, 5, 1, 1, 1, v0, v0, v0, v0                                           ; C4001C5F 00000000
>	s_endpgm                                                                     ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 80
>VGPRS: 64
>Code Size: 4408 bytes
>LDS: 0 blocks
>Scratch: 9216 bytes per wave
>********************
>VM start=0x16F00D000  end=0x16F00F000 | Buffer 8192 bytes

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Attachments on bug 93264: 120421 | 120422 | 120423 | 120424 | 120425 | 120426

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