Attachment 125979 Details for Bug 97345 – dmesg with drm.debug=0x1e log_buf_len=1M

dmesg with drm.debug=0x1e log_buf_len=1M

dmesg_debug (text/plain), 922.39 KB, created by freedesktop on 2016-08-23 14:44:56 UTC

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Creator: freedesktop

Created: 2016-08-23 14:44:56 UTC

Size: 922.39 KB

patch

obsolete

>[    0.000000] microcode: microcode updated early to revision 0x20, date = 2016-03-16
>[    0.000000] Linux version 4.7.1-1-ARCH (builduser@tobias) (gcc version 6.1.1 20160802 (GCC) ) #1 SMP PREEMPT Wed Aug 17 08:13:35 CEST 2016
>[    0.000000] Command line: BOOT_IMAGE=/@/boot/vmlinuz-linux root=UUID=c91384af-f210-48f5-ba19-d6415a1bb447 rw rootflags=subvol=@ cryptdevice=UUID=ff77589d-4601-4dd9-b0a3-e37905f85c8a:cryptroot drm.debug=0x1e log_buf_len=1M
>[    0.000000] x86/fpu: xstate_offset[2]:  576, xstate_sizes[2]:  256
>[    0.000000] x86/fpu: Supporting XSAVE feature 0x001: 'x87 floating point registers'
>[    0.000000] x86/fpu: Supporting XSAVE feature 0x002: 'SSE registers'
>[    0.000000] x86/fpu: Supporting XSAVE feature 0x004: 'AVX registers'
>[    0.000000] x86/fpu: Enabled xstate features 0x7, context size is 832 bytes, using 'standard' format.
>[    0.000000] x86/fpu: Using 'eager' FPU context switches.
>[    0.000000] e820: BIOS-provided physical RAM map:
>[    0.000000] BIOS-e820: [mem 0x0000000000000000-0x0000000000057fff] usable
>[    0.000000] BIOS-e820: [mem 0x0000000000058000-0x0000000000058fff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000000059000-0x000000000008bfff] usable
>[    0.000000] BIOS-e820: [mem 0x000000000008c000-0x00000000000bffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000000e0000-0x00000000000fffff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000000100000-0x00000000c3b17fff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000c3b18000-0x00000000c3d19fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000c3d1a000-0x00000000da14efff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000da14f000-0x00000000da3befff] type 20
>[    0.000000] BIOS-e820: [mem 0x00000000da3bf000-0x00000000dc93efff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000dc93f000-0x00000000dca9efff] ACPI NVS
>[    0.000000] BIOS-e820: [mem 0x00000000dca9f000-0x00000000dcafefff] ACPI data
>[    0.000000] BIOS-e820: [mem 0x00000000dcaff000-0x00000000dcafffff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000dcb00000-0x00000000df9fffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000f80f8000-0x00000000f80f8fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fed1c000-0x00000000fed1ffff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000100000000-0x000000041e5fffff] usable
>[    0.000000] NX (Execute Disable) protection: active
>[    0.000000] efi: EFI v2.31 by Phoenix Technologies Ltd.
>[    0.000000] efi:  ACPI=0xdcafe000  ACPI 2.0=0xdcafe014  SMBIOS=0xdc553000 
>[    0.000000] SMBIOS 2.7 present.
>[    0.000000] DMI: FUJITSU LIFEBOOK E744/FJNB26F, BIOS Version 1.20 02/03/2015
>[    0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved
>[    0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable
>[    0.000000] e820: last_pfn = 0x41e600 max_arch_pfn = 0x400000000
>[    0.000000] MTRR default type: write-back
>[    0.000000] MTRR fixed ranges enabled:
>[    0.000000]   00000-9FFFF write-back
>[    0.000000]   A0000-BFFFF uncachable
>[    0.000000]   C0000-FFFFF write-protect
>[    0.000000] MTRR variable ranges enabled:
>[    0.000000]   0 base 00E0000000 mask 7FE0000000 uncachable
>[    0.000000]   1 base 00DE000000 mask 7FFE000000 uncachable
>[    0.000000]   2 base 00DD000000 mask 7FFF000000 uncachable
>[    0.000000]   3 base 00DCC00000 mask 7FFFC00000 uncachable
>[    0.000000]   4 base 00DCB00000 mask 7FFFF00000 uncachable
>[    0.000000]   5 disabled
>[    0.000000]   6 disabled
>[    0.000000]   7 disabled
>[    0.000000]   8 disabled
>[    0.000000]   9 disabled
>[    0.000000] x86/PAT: Configuration [0-7]: WB  WC  UC- UC  WB  WC  UC- WT  
>[    0.000000] e820: last_pfn = 0xdcb00 max_arch_pfn = 0x400000000
>[    0.000000] Scanning 1 areas for low memory corruption
>[    0.000000] Base memory trampoline at [ffff880000060000] 60000 size 24576
>[    0.000000] Using GB pages for direct mapping
>[    0.000000] BRK [0x01b57000, 0x01b57fff] PGTABLE
>[    0.000000] BRK [0x01b58000, 0x01b58fff] PGTABLE
>[    0.000000] BRK [0x01b59000, 0x01b59fff] PGTABLE
>[    0.000000] BRK [0x01b5a000, 0x01b5afff] PGTABLE
>[    0.000000] BRK [0x01b5b000, 0x01b5bfff] PGTABLE
>[    0.000000] BRK [0x01b5c000, 0x01b5cfff] PGTABLE
>[    0.000000] log_buf_len: 1048576 bytes
>[    0.000000] early log buf free: 520044(99%)
>[    0.000000] RAMDISK: [mem 0x36f8d000-0x377bdfff]
>[    0.000000] ACPI: Early table checksum verification disabled
>[    0.000000] ACPI: RSDP 0x00000000DCAFE014 000024 (v02 FUJ   )
>[    0.000000] ACPI: XSDT 0x00000000DCAFE170 0000AC (v01 FUJ    PC       01140000 FUJ  00000001)
>[    0.000000] ACPI: FACP 0x00000000DCAF8000 00010C (v05 FUJ    PC       01140000 FUJ  00000001)
>[    0.000000] ACPI: DSDT 0x00000000DCAE8000 00CD76 (v02 FUJ    FJNB26F  01140000 INTL 20120711)
>[    0.000000] ACPI: FACS 0x00000000DCA9C000 000040
>[    0.000000] ACPI: SSDT 0x00000000DCAFD000 0008FF (v01 FUJ    SataAhci 00000001 INTL 20120711)
>[    0.000000] ACPI: SSDT 0x00000000DCAFC000 0002DF (v01 FUJ    BayAhci2 00000001 INTL 20120711)
>[    0.000000] ACPI: SSDT 0x00000000DCAFB000 000106 (v02 FUJ    DockSsdt 00000001 INTL 20120711)
>[    0.000000] ACPI: HPET 0x00000000DCAF7000 000038 (v01 FUJ    PC       01140000 FUJ  00000001)
>[    0.000000] ACPI: APIC 0x00000000DCAF6000 000098 (v01 FUJ    PC       01140000 FUJ  00000001)
>[    0.000000] ACPI: MCFG 0x00000000DCAF5000 00003C (v01 FUJ    PC       01140000 FUJ  00000001)
>[    0.000000] ACPI: SSDT 0x00000000DCAE7000 000539 (v01 FUJ    Cpu0Ist  01140000 INTL 20120711)
>[    0.000000] ACPI: SSDT 0x00000000DCAE6000 000B37 (v01 FUJ    CpuPm    01140000 INTL 20120711)
>[    0.000000] ACPI: UEFI 0x00000000DCAE5000 000042 (v01 FUJ    PC       01140000 FUJ  00000001)
>[    0.000000] ACPI: POAT 0x00000000DCA76000 000055 (v03 FUJ    PC       01140000 FUJ  00000001)
>[    0.000000] ACPI: ASF! 0x00000000DCAFA000 0000A5 (v32 FUJ    PC       01140000 FUJ  00000001)
>[    0.000000] ACPI: UEFI 0x00000000DCAE4000 00003E (v01 FUJ    PC       01140000 FUJ  00000001)
>[    0.000000] ACPI: FPDT 0x00000000DCAE3000 000064 (v01 FUJ    PC       01140000 FUJ  00000001)
>[    0.000000] ACPI: SLIC 0x00000000DCAE2000 000176 (v01 FUJ    PC       01140000 FUJ  00000001)
>[    0.000000] ACPI: UEFI 0x00000000DCAE1000 0001B6 (v01 FUJ    PC       01140000 FUJ  00000001)
>[    0.000000] ACPI: BGRT 0x00000000DCAE0000 000038 (v01 FUJ    PC       01140000 FUJ  00000001)
>[    0.000000] ACPI: Local APIC address 0xfee00000
>[    0.000000] No NUMA configuration found
>[    0.000000] Faking a node at [mem 0x0000000000000000-0x000000041e5fffff]
>[    0.000000] NODE_DATA(0) allocated [mem 0x41e4f9000-0x41e4fcfff]
>[    0.000000] Zone ranges:
>[    0.000000]   DMA      [mem 0x0000000000001000-0x0000000000ffffff]
>[    0.000000]   DMA32    [mem 0x0000000001000000-0x00000000ffffffff]
>[    0.000000]   Normal   [mem 0x0000000100000000-0x000000041e5fffff]
>[    0.000000] Movable zone start for each node
>[    0.000000] Early memory node ranges
>[    0.000000]   node   0: [mem 0x0000000000001000-0x0000000000057fff]
>[    0.000000]   node   0: [mem 0x0000000000059000-0x000000000008bfff]
>[    0.000000]   node   0: [mem 0x0000000000100000-0x00000000c3b17fff]
>[    0.000000]   node   0: [mem 0x00000000c3d1a000-0x00000000da14efff]
>[    0.000000]   node   0: [mem 0x00000000dcaff000-0x00000000dcafffff]
>[    0.000000]   node   0: [mem 0x0000000100000000-0x000000041e5fffff]
>[    0.000000] Initmem setup node 0 [mem 0x0000000000001000-0x000000041e5fffff]
>[    0.000000] On node 0 totalpages: 4162776
>[    0.000000]   DMA zone: 64 pages used for memmap
>[    0.000000]   DMA zone: 72 pages reserved
>[    0.000000]   DMA zone: 3978 pages, LIFO batch:0
>[    0.000000]   DMA32 zone: 13886 pages used for memmap
>[    0.000000]   DMA32 zone: 888654 pages, LIFO batch:31
>[    0.000000]   Normal zone: 51096 pages used for memmap
>[    0.000000]   Normal zone: 3270144 pages, LIFO batch:31
>[    0.000000] Reserving Intel graphics stolen memory at 0xdda00000-0xdf9fffff
>[    0.000000] ACPI: PM-Timer IO Port: 0x1808
>[    0.000000] ACPI: Local APIC address 0xfee00000
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0x00] high edge lint[0x1])
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1])
>[    0.000000] IOAPIC[0]: apic_id 2, version 32, address 0xfec00000, GSI 0-23
>[    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
>[    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level)
>[    0.000000] ACPI: IRQ0 used by override.
>[    0.000000] ACPI: IRQ9 used by override.
>[    0.000000] Using ACPI (MADT) for SMP configuration information
>[    0.000000] ACPI: HPET id: 0x8086a301 base: 0xfed00000
>[    0.000000] smpboot: Allowing 8 CPUs, 0 hotplug CPUs
>[    0.000000] PM: Registered nosave memory: [mem 0x00000000-0x00000fff]
>[    0.000000] PM: Registered nosave memory: [mem 0x00058000-0x00058fff]
>[    0.000000] PM: Registered nosave memory: [mem 0x0008c000-0x000bffff]
>[    0.000000] PM: Registered nosave memory: [mem 0x000c0000-0x000dffff]
>[    0.000000] PM: Registered nosave memory: [mem 0x000e0000-0x000fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xc3b18000-0xc3d19fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xda14f000-0xda3befff]
>[    0.000000] PM: Registered nosave memory: [mem 0xda3bf000-0xdc93efff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdc93f000-0xdca9efff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdca9f000-0xdcafefff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdcb00000-0xdf9fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdfa00000-0xf80f7fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xf80f8000-0xf80f8fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xf80f9000-0xfed1bfff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed1c000-0xfed1ffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed20000-0xffffffff]
>[    0.000000] e820: [mem 0xdfa00000-0xf80f7fff] available for PCI devices
>[    0.000000] Booting paravirtualized kernel on bare hardware
>[    0.000000] clocksource: refined-jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 6370452778343963 ns
>[    0.000000] setup_percpu: NR_CPUS:128 nr_cpumask_bits:128 nr_cpu_ids:8 nr_node_ids:1
>[    0.000000] percpu: Embedded 33 pages/cpu @ffff88041e200000 s97944 r8192 d29032 u262144
>[    0.000000] pcpu-alloc: s97944 r8192 d29032 u262144 alloc=1*2097152
>[    0.000000] pcpu-alloc: [0] 0 1 2 3 4 5 6 7 
>[    0.000000] Built 1 zonelists in Node order, mobility grouping on.  Total pages: 4097658
>[    0.000000] Policy zone: Normal
>[    0.000000] Kernel command line: BOOT_IMAGE=/@/boot/vmlinuz-linux root=UUID=c91384af-f210-48f5-ba19-d6415a1bb447 rw rootflags=subvol=@ cryptdevice=UUID=ff77589d-4601-4dd9-b0a3-e37905f85c8a:cryptroot drm.debug=0x1e log_buf_len=1M
>[    0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes)
>[    0.000000] Calgary: detecting Calgary via BIOS EBDA area
>[    0.000000] Calgary: Unable to locate Rio Grande table in EBDA - bailing!
>[    0.000000] Memory: 16094472K/16651104K available (6024K kernel code, 977K rwdata, 1836K rodata, 1240K init, 1164K bss, 556632K reserved, 0K cma-reserved)
>[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
>[    0.000000] Preemptible hierarchical RCU implementation.
>[    0.000000] 	Build-time adjustment of leaf fanout to 64.
>[    0.000000] 	RCU restricting CPUs from NR_CPUS=128 to nr_cpu_ids=8.
>[    0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=64, nr_cpu_ids=8
>[    0.000000] NR_IRQS:8448 nr_irqs:488 16
>[    0.000000] Console: colour dummy device 80x25
>[    0.000000] console [tty0] enabled
>[    0.000000] clocksource: hpet: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 133484882848 ns
>[    0.000000] hpet clockevent registered
>[    0.000000] tsc: Fast TSC calibration using PIT
>[    0.000000] tsc: Detected 2194.999 MHz processor
>[    0.000024] Calibrating delay loop (skipped), value calculated using timer frequency.. 4391.91 BogoMIPS (lpj=7316663)
>[    0.000027] pid_max: default: 32768 minimum: 301
>[    0.000033] ACPI: Core revision 20160422
>[    0.016770] ACPI: 6 ACPI AML tables successfully acquired and loaded
>
>[    0.043353] Security Framework initialized
>[    0.043357] Yama: becoming mindful.
>[    0.044251] Dentry cache hash table entries: 2097152 (order: 12, 16777216 bytes)
>[    0.047302] Inode-cache hash table entries: 1048576 (order: 11, 8388608 bytes)
>[    0.048638] Mount-cache hash table entries: 32768 (order: 6, 262144 bytes)
>[    0.048654] Mountpoint-cache hash table entries: 32768 (order: 6, 262144 bytes)
>[    0.048906] CPU: Physical Processor ID: 0
>[    0.048907] CPU: Processor Core ID: 0
>[    0.048911] ENERGY_PERF_BIAS: Set to 'normal', was 'performance'
>[    0.048912] ENERGY_PERF_BIAS: View and update with x86_energy_perf_policy(8)
>[    0.048916] mce: CPU supports 9 MCE banks
>[    0.048925] CPU0: Thermal monitoring enabled (TM1)
>[    0.048943] process: using mwait in idle threads
>[    0.048946] Last level iTLB entries: 4KB 1024, 2MB 1024, 4MB 1024
>[    0.048947] Last level dTLB entries: 4KB 1024, 2MB 1024, 4MB 1024, 1GB 4
>[    0.049300] Freeing SMP alternatives memory: 24K (ffffffff81a2c000 - ffffffff81a32000)
>[    0.056543] ftrace: allocating 23798 entries in 93 pages
>[    0.066484] smpboot: Max logical packages: 2
>[    0.066486] smpboot: APIC(0) Converting physical 0 to logical package 0
>[    0.066895] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
>[    0.099902] TSC deadline timer enabled
>[    0.099905] smpboot: CPU0: Intel(R) Core(TM) i7-4702MQ CPU @ 2.20GHz (family: 0x6, model: 0x3c, stepping: 0x3)
>[    0.099909] Performance Events: PEBS fmt2+, 16-deep LBR, Haswell events, full-width counters, Intel PMU driver.
>[    0.099929] ... version:                3
>[    0.099930] ... bit width:              48
>[    0.099931] ... generic registers:      4
>[    0.099932] ... value mask:             0000ffffffffffff
>[    0.099933] ... max period:             0000ffffffffffff
>[    0.099933] ... fixed-purpose events:   3
>[    0.099934] ... event mask:             000000070000000f
>[    0.123442] NMI watchdog: enabled on all CPUs, permanently consumes one hw-PMU counter.
>[    0.140038] x86: Booting SMP configuration:
>[    0.140040] .... node  #0, CPUs:      #1 #2 #3 #4 #5 #6 #7
>[    0.805791] x86: Booted up 1 node, 8 CPUs
>[    0.805796] smpboot: Total of 8 processors activated (35142.40 BogoMIPS)
>[    0.813805] devtmpfs: initialized
>[    0.813863] x86/mm: Memory block size: 128MB
>[    0.818060] PM: Registering ACPI NVS region [mem 0xdc93f000-0xdca9efff] (1441792 bytes)
>[    0.818137] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 6370867519511994 ns
>[    0.818179] pinctrl core: initialized pinctrl subsystem
>[    0.818220] RTC time: 14:41:28, date: 08/23/16
>[    0.818319] NET: Registered protocol family 16
>[    0.830083] cpuidle: using governor ladder
>[    0.843420] cpuidle: using governor menu
>[    0.843442] ACPI: bus type PCI registered
>[    0.843444] acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
>[    0.843501] PCI: MMCONFIG for domain 0000 [bus 00-3f] at [mem 0xf8000000-0xfbffffff] (base 0xf8000000)
>[    0.843503] PCI: not using MMCONFIG
>[    0.843504] PCI: Using configuration type 1 for base access
>[    0.843524] core: PMU erratum BJ122, BV98, HSD29 worked around, HT is on
>[    0.860185] HugeTLB registered 1 GB page size, pre-allocated 0 pages
>[    0.860187] HugeTLB registered 2 MB page size, pre-allocated 0 pages
>[    0.860398] ACPI: Added _OSI(Module Device)
>[    0.860401] ACPI: Added _OSI(Processor Device)
>[    0.860402] ACPI: Added _OSI(3.0 _SCP Extensions)
>[    0.860403] ACPI: Added _OSI(Processor Aggregator Device)
>[    0.860564] ACPI: Executed 1 blocks of module-level executable AML code
>[    0.862717] ACPI: [Firmware Bug]: BIOS _OSI(Linux) query ignored
>[    0.862861] ACPI: Dynamic OEM Table Load:
>[    0.862887] ACPI: SSDT 0xFFFF88040B9D8000 0011E5 (v02 FUJ    Win8Ssdt 00000001 INTL 20120711)
>[    0.967148] ACPI: Dynamic OEM Table Load:
>[    0.967156] ACPI: SSDT 0xFFFF88040B9CA000 000433 (v01 PmRef  Cpu0Cst  00003001 INTL 20120711)
>[    0.967863] ACPI: Dynamic OEM Table Load:
>[    0.967870] ACPI: SSDT 0xFFFF88040B9CA800 0005AA (v01 PmRef  ApIst    00003000 INTL 20120711)
>[    0.968577] ACPI: Dynamic OEM Table Load:
>[    0.968582] ACPI: SSDT 0xFFFF88040B491000 000119 (v01 PmRef  ApCst    00003000 INTL 20120711)
>[    0.970475] ACPI : EC: EC started
>[    0.970504] ACPI: Interpreter enabled
>[    0.970536] ACPI: (supports S0 S3 S4 S5)
>[    0.970538] ACPI: Using IOAPIC for interrupt routing
>[    0.970565] PCI: MMCONFIG for domain 0000 [bus 00-3f] at [mem 0xf8000000-0xfbffffff] (base 0xf8000000)
>[    0.970986] PCI: MMCONFIG at [mem 0xf8000000-0xfbffffff] reserved in ACPI motherboard resources
>[    0.970993] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
>[    0.975840] acpi LNXIOBAY:00: ACPI dock station (docks/bays count: 1)
>[    0.977161] acpi PNP0C15:00: ACPI dock station (docks/bays count: 2)
>[    0.977824] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-3e])
>[    0.977829] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI]
>[    0.977943] \_SB_.PCI0 (33DB4D5B-1FF7-401C-9657-7441C03DD766): _OSC invalid UUID
>[    0.977944] _OSC request data: 1 1f 0
>[    0.977948] acpi PNP0A08:00: _OSC failed (AE_ERROR); disabling ASPM
>[    0.978361] PCI host bridge to bus 0000:00
>[    0.978364] pci_bus 0000:00: root bus resource [io  0x0000-0x0cf7 window]
>[    0.978366] pci_bus 0000:00: root bus resource [io  0x0d00-0xffff window]
>[    0.978367] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff window]
>[    0.978369] pci_bus 0000:00: root bus resource [mem 0xdfa00000-0xfeafffff window]
>[    0.978371] pci_bus 0000:00: root bus resource [bus 00-3e]
>[    0.978378] pci 0000:00:00.0: [8086:0c04] type 00 class 0x060000
>[    0.978467] pci 0000:00:02.0: [8086:0416] type 00 class 0x030000
>[    0.978477] pci 0000:00:02.0: reg 0x10: [mem 0xf0000000-0xf03fffff 64bit]
>[    0.978483] pci 0000:00:02.0: reg 0x18: [mem 0xe0000000-0xefffffff 64bit pref]
>[    0.978488] pci 0000:00:02.0: reg 0x20: [io  0x3000-0x303f]
>[    0.978569] pci 0000:00:03.0: [8086:0c0c] type 00 class 0x040300
>[    0.978578] pci 0000:00:03.0: reg 0x10: [mem 0xf0630000-0xf0633fff 64bit]
>[    0.978685] pci 0000:00:14.0: [8086:8c31] type 00 class 0x0c0330
>[    0.978703] pci 0000:00:14.0: reg 0x10: [mem 0xf0620000-0xf062ffff 64bit]
>[    0.978764] pci 0000:00:14.0: PME# supported from D3hot D3cold
>[    0.978806] pci 0000:00:14.0: System wakeup disabled by ACPI
>[    0.978842] pci 0000:00:16.0: [8086:8c3a] type 00 class 0x078000
>[    0.978861] pci 0000:00:16.0: reg 0x10: [mem 0xf0639000-0xf063900f 64bit]
>[    0.978925] pci 0000:00:16.0: PME# supported from D0 D3hot D3cold
>[    0.978996] pci 0000:00:16.3: [8086:8c3d] type 00 class 0x070002
>[    0.979011] pci 0000:00:16.3: reg 0x10: [io  0x30b0-0x30b7]
>[    0.979020] pci 0000:00:16.3: reg 0x14: [mem 0xf0640000-0xf0640fff]
>[    0.979148] pci 0000:00:19.0: [8086:153a] type 00 class 0x020000
>[    0.979164] pci 0000:00:19.0: reg 0x10: [mem 0xf0600000-0xf061ffff]
>[    0.979172] pci 0000:00:19.0: reg 0x14: [mem 0xf063f000-0xf063ffff]
>[    0.979181] pci 0000:00:19.0: reg 0x18: [io  0x3080-0x309f]
>[    0.979240] pci 0000:00:19.0: PME# supported from D0 D3hot D3cold
>[    0.979291] pci 0000:00:19.0: System wakeup disabled by ACPI
>[    0.979328] pci 0000:00:1a.0: [8086:8c2d] type 00 class 0x0c0320
>[    0.979350] pci 0000:00:1a.0: reg 0x10: [mem 0xf063e000-0xf063e3ff]
>[    0.979435] pci 0000:00:1a.0: PME# supported from D0 D3hot D3cold
>[    0.979478] pci 0000:00:1a.0: System wakeup disabled by ACPI
>[    0.979515] pci 0000:00:1b.0: [8086:8c20] type 00 class 0x040300
>[    0.979532] pci 0000:00:1b.0: reg 0x10: [mem 0xf0634000-0xf0637fff 64bit]
>[    0.979600] pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold
>[    0.979644] pci 0000:00:1b.0: System wakeup disabled by ACPI
>[    0.979679] pci 0000:00:1c.0: [8086:8c10] type 01 class 0x060400
>[    0.979744] pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold
>[    0.979822] pci 0000:00:1c.5: [8086:8c1a] type 01 class 0x060400
>[    0.979886] pci 0000:00:1c.5: PME# supported from D0 D3hot D3cold
>[    0.979940] pci 0000:00:1c.5: System wakeup disabled by ACPI
>[    0.979977] pci 0000:00:1c.7: [8086:8c1e] type 01 class 0x060400
>[    0.980042] pci 0000:00:1c.7: PME# supported from D0 D3hot D3cold
>[    0.980118] pci 0000:00:1d.0: [8086:8c26] type 00 class 0x0c0320
>[    0.980136] pci 0000:00:1d.0: reg 0x10: [mem 0xf063d000-0xf063d3ff]
>[    0.980219] pci 0000:00:1d.0: PME# supported from D0 D3hot D3cold
>[    0.980260] pci 0000:00:1d.0: System wakeup disabled by ACPI
>[    0.980296] pci 0000:00:1f.0: [8086:8c4f] type 00 class 0x060100
>[    0.980464] pci 0000:00:1f.2: [8086:8c03] type 00 class 0x010601
>[    0.980479] pci 0000:00:1f.2: reg 0x10: [io  0x30a8-0x30af]
>[    0.980486] pci 0000:00:1f.2: reg 0x14: [io  0x30bc-0x30bf]
>[    0.980494] pci 0000:00:1f.2: reg 0x18: [io  0x30a0-0x30a7]
>[    0.980502] pci 0000:00:1f.2: reg 0x1c: [io  0x30b8-0x30bb]
>[    0.980510] pci 0000:00:1f.2: reg 0x20: [io  0x3060-0x307f]
>[    0.980518] pci 0000:00:1f.2: reg 0x24: [mem 0xf063c000-0xf063c7ff]
>[    0.980554] pci 0000:00:1f.2: PME# supported from D3hot
>[    0.980622] pci 0000:00:1f.3: [8086:8c22] type 00 class 0x0c0500
>[    0.980637] pci 0000:00:1f.3: reg 0x10: [mem 0xf0638000-0xf06380ff 64bit]
>[    0.980657] pci 0000:00:1f.3: reg 0x20: [io  0xefa0-0xefbf]
>[    0.980776] pci 0000:00:1c.0: PCI bridge to [bus 01]
>[    0.980889] pci 0000:02:00.0: [8086:08b1] type 00 class 0x028000
>[    0.980944] pci 0000:02:00.0: reg 0x10: [mem 0xf0500000-0xf0501fff 64bit]
>[    0.981183] pci 0000:02:00.0: PME# supported from D0 D3hot D3cold
>[    0.986041] pci 0000:00:1c.5: PCI bridge to [bus 02]
>[    0.986047] pci 0000:00:1c.5:   bridge window [mem 0xf0500000-0xf05fffff]
>[    0.986166] pci 0000:03:00.0: [10ec:5227] type 00 class 0xff0000
>[    0.986237] pci 0000:03:00.0: reg 0x10: [mem 0xf0400000-0xf0400fff]
>[    0.986456] pci 0000:03:00.0: supports D1 D2
>[    0.986457] pci 0000:03:00.0: PME# supported from D1 D2 D3hot D3cold
>[    0.992715] pci 0000:00:1c.7: PCI bridge to [bus 03]
>[    0.992721] pci 0000:00:1c.7:   bridge window [mem 0xf0400000-0xf04fffff]
>[    0.993480] ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 10 *11 12 14 15)
>[    0.993553] ACPI: PCI Interrupt Link [LNKB] (IRQs 3 4 5 6 10 11 12 14 15) *7
>[    0.993622] ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 5 6 10 *11 12 14 15)
>[    0.993691] ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 5 6 10 *11 12 14 15)
>[    0.993759] ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 *10 11 12 14 15)
>[    0.993828] ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.993897] ACPI: PCI Interrupt Link [LNKG] (IRQs 3 4 5 6 10 11 12 14 15) *7
>[    0.993967] ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 *10 11 12 14 15)
>[    0.994310] ACPI: Enabled 8 GPEs in block 00 to 3F
>[    0.994344] ACPI : EC: EC stopped
>[    0.994354] ACPI : EC: GPE = 0x17, I/O: command/status = 0x66, data = 0x62
>[    0.994355] ACPI : EC: EC started
>[    0.994456] vgaarb: setting as boot device: PCI:0000:00:02.0
>[    0.994458] vgaarb: device added: PCI:0000:00:02.0,decodes=io+mem,owns=io+mem,locks=none
>[    0.994461] vgaarb: loaded
>[    0.994462] vgaarb: bridge control possible 0000:00:02.0
>[    0.994538] PCI: Using ACPI for IRQ routing
>[    0.995961] PCI: pci_cache_line_size set to 64 bytes
>[    0.996043] e820: reserve RAM buffer [mem 0x00058000-0x0005ffff]
>[    0.996045] e820: reserve RAM buffer [mem 0x0008c000-0x0008ffff]
>[    0.996046] e820: reserve RAM buffer [mem 0xc3b18000-0xc3ffffff]
>[    0.996047] e820: reserve RAM buffer [mem 0xda14f000-0xdbffffff]
>[    0.996048] e820: reserve RAM buffer [mem 0xdcb00000-0xdfffffff]
>[    0.996050] e820: reserve RAM buffer [mem 0x41e600000-0x41fffffff]
>[    0.996130] NetLabel: Initializing
>[    0.996131] NetLabel:  domain hash size = 128
>[    0.996132] NetLabel:  protocols = UNLABELED CIPSOv4
>[    0.996142] NetLabel:  unlabeled traffic allowed by default
>[    0.996193] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0, 0, 0, 0, 0
>[    0.996198] hpet0: 8 comparators, 64-bit 14.318180 MHz counter
>[    0.998207] amd_nb: Cannot enumerate AMD northbridges
>[    0.998220] clocksource: Switched to clocksource hpet
>[    1.003085] VFS: Disk quotas dquot_6.6.0
>[    1.003101] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
>[    1.003166] pnp: PnP ACPI init
>[    1.003344] system 00:00: [mem 0xfed1c000-0xfed1ffff] has been reserved
>[    1.003347] system 00:00: [mem 0xfed10000-0xfed17fff] has been reserved
>[    1.003348] system 00:00: [mem 0xfed18000-0xfed18fff] has been reserved
>[    1.003350] system 00:00: [mem 0xfed19000-0xfed19fff] has been reserved
>[    1.003352] system 00:00: [mem 0xf8000000-0xfbffffff] could not be reserved
>[    1.003353] system 00:00: [mem 0xfed20000-0xfed3ffff] has been reserved
>[    1.003355] system 00:00: [mem 0xfed90000-0xfed93fff] has been reserved
>[    1.003357] system 00:00: [mem 0xfed40000-0xfed44fff] has been reserved
>[    1.003358] system 00:00: [mem 0xfed45000-0xfed8ffff] has been reserved
>[    1.003360] system 00:00: [mem 0xff000000-0xffffffff] has been reserved
>[    1.003361] system 00:00: [mem 0xfee00000-0xfeefffff] has been reserved
>[    1.003363] system 00:00: [mem 0xfef00000-0xfeffffff] has been reserved
>[    1.003364] system 00:00: [mem 0xfed08000-0xfed08fff] has been reserved
>[    1.003366] system 00:00: [mem 0xdfa10000-0xdfa1ffff] has been reserved
>[    1.003369] system 00:00: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    1.003709] system 00:01: [io  0x04d0-0x04d1] has been reserved
>[    1.003711] system 00:01: [io  0x0800-0x087f] has been reserved
>[    1.003713] system 00:01: [io  0x1640-0x164f] has been reserved
>[    1.003714] system 00:01: [io  0x1800-0x187f] has been reserved
>[    1.003716] system 00:01: [io  0x1880-0x18ff] has been reserved
>[    1.003718] system 00:01: [io  0xf800-0xf87f] has been reserved
>[    1.003719] system 00:01: [io  0xf880-0xf8ff] has been reserved
>[    1.003721] system 00:01: [io  0xfc00-0xfc7f] has been reserved
>[    1.003722] system 00:01: [io  0xfc80-0xfcff] has been reserved
>[    1.003724] system 00:01: [io  0xfd00-0xfd7f] has been reserved
>[    1.003725] system 00:01: [io  0x2000-0x2003] has been reserved
>[    1.003727] system 00:01: [io  0x2100-0x217f] has been reserved
>[    1.003728] system 00:01: [io  0x2180-0x21ff] has been reserved
>[    1.003730] system 00:01: [io  0x0604-0x0607] has been reserved
>[    1.003731] system 00:01: [io  0x0600-0x0603] has been reserved
>[    1.003734] system 00:01: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    1.003793] pnp 00:02: Plug and Play ACPI device, IDs FUJ0300 PNP0303 (active)
>[    1.003824] pnp 00:03: Plug and Play ACPI device, IDs SYN1f08 PNP0f13 (active)
>[    1.003875] pnp 00:04: Plug and Play ACPI device, IDs PNP0b00 (active)
>[    1.003995] system 00:05: [mem 0xfed00000-0xfed003ff] has been reserved
>[    1.003998] system 00:05: Plug and Play ACPI device, IDs PNP0103 PNP0c01 (active)
>[    1.004743] pnp: PnP ACPI: found 6 devices
>[    1.010890] clocksource: acpi_pm: mask: 0xffffff max_cycles: 0xffffff, max_idle_ns: 2085701024 ns
>[    1.010919] pci 0000:00:1c.0: PCI bridge to [bus 01]
>[    1.010931] pci 0000:00:1c.5: PCI bridge to [bus 02]
>[    1.010936] pci 0000:00:1c.5:   bridge window [mem 0xf0500000-0xf05fffff]
>[    1.010944] pci 0000:00:1c.7: PCI bridge to [bus 03]
>[    1.010949] pci 0000:00:1c.7:   bridge window [mem 0xf0400000-0xf04fffff]
>[    1.010958] pci_bus 0000:00: resource 4 [io  0x0000-0x0cf7 window]
>[    1.010960] pci_bus 0000:00: resource 5 [io  0x0d00-0xffff window]
>[    1.010961] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff window]
>[    1.010963] pci_bus 0000:00: resource 7 [mem 0xdfa00000-0xfeafffff window]
>[    1.010965] pci_bus 0000:02: resource 1 [mem 0xf0500000-0xf05fffff]
>[    1.010966] pci_bus 0000:03: resource 1 [mem 0xf0400000-0xf04fffff]
>[    1.010989] NET: Registered protocol family 2
>[    1.011159] TCP established hash table entries: 131072 (order: 8, 1048576 bytes)
>[    1.011339] TCP bind hash table entries: 65536 (order: 8, 1048576 bytes)
>[    1.011453] TCP: Hash tables configured (established 131072 bind 65536)
>[    1.011478] UDP hash table entries: 8192 (order: 6, 262144 bytes)
>[    1.011520] UDP-Lite hash table entries: 8192 (order: 6, 262144 bytes)
>[    1.011594] NET: Registered protocol family 1
>[    1.011605] pci 0000:00:02.0: Video device with shadowed ROM at [mem 0x000c0000-0x000dffff]
>[    1.011675] pci 0000:00:14.0: can't derive routing for PCI INT A
>[    1.011677] pci 0000:00:14.0: PCI INT A: no GSI
>[    1.011988] PCI: CLS 64 bytes, default 64
>[    1.012024] Unpacking initramfs...
>[    1.134026] Freeing initrd memory: 8388K (ffff880036f8d000 - ffff8800377be000)
>[    1.134030] PCI-DMA: Using software bounce buffering for IO (SWIOTLB)
>[    1.134033] software IO TLB [mem 0xcda87000-0xd1a87000] (64MB) mapped at [ffff8800cda87000-ffff8800d1a86fff]
>[    1.134154] Scanning for low memory corruption every 60 seconds
>[    1.134417] futex hash table entries: 2048 (order: 5, 131072 bytes)
>[    1.134799] Initialise system trusted keyrings
>[    1.134928] workingset: timestamp_bits=38 max_order=22 bucket_order=0
>[    1.136414] zbud: loaded
>[    1.136611] Key type big_key registered
>[    1.136818] Key type asymmetric registered
>[    1.136861] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 249)
>[    1.136895] io scheduler noop registered
>[    1.136896] io scheduler deadline registered
>[    1.136929] io scheduler cfq registered (default)
>[    1.137309] pci_hotplug: PCI Hot Plug PCI Core version: 0.5
>[    1.137313] pciehp: PCI Express Hot Plug Controller Driver version: 0.4
>[    1.137325] efifb: probing for efifb
>[    1.137337] efifb: framebuffer at 0xe0000000, using 5632k, total 5632k
>[    1.137339] efifb: mode is 1600x900x32, linelength=6400, pages=1
>[    1.137339] efifb: scrolling: redraw
>[    1.137341] efifb: Truecolor: size=8:8:8:8, shift=24:16:8:0
>[    1.140386] Console: switching to colour frame buffer device 200x56
>[    1.143331] fb0: EFI VGA frame buffer device
>[    1.143339] intel_idle: MWAIT substates: 0x42120
>[    1.143340] intel_idle: v0.4.1 model 0x3C
>[    1.143594] intel_idle: lapic_timer_reliable_states 0xffffffff
>[    1.143764] GHES: HEST is not enabled!
>[    1.143801] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
>[    1.164428] 0000:00:16.3: ttyS0 at I/O 0x30b0 (irq = 19, base_baud = 115200) is a 16550A
>[    1.164651] Linux agpgart interface v0.103
>[    1.165240] rtc_cmos 00:04: RTC can wake from S4
>[    1.165383] rtc_cmos 00:04: rtc core: registered rtc_cmos as rtc0
>[    1.165410] rtc_cmos 00:04: alarms up to one month, y3k, 242 bytes nvram, hpet irqs
>[    1.165418] intel_pstate: Intel P-state driver initializing
>[    1.165621] ledtrig-cpu: registered to indicate activity on CPUs
>[    1.166510] NET: Registered protocol family 10
>[    1.166991] NET: Registered protocol family 17
>[    1.167624] microcode: CPU0 sig=0x306c3, pf=0x10, revision=0x20
>[    1.167643] microcode: CPU1 sig=0x306c3, pf=0x10, revision=0x20
>[    1.167690] microcode: CPU2 sig=0x306c3, pf=0x10, revision=0x20
>[    1.167712] microcode: CPU3 sig=0x306c3, pf=0x10, revision=0x20
>[    1.167755] microcode: CPU4 sig=0x306c3, pf=0x10, revision=0x20
>[    1.167776] microcode: CPU5 sig=0x306c3, pf=0x10, revision=0x20
>[    1.167819] microcode: CPU6 sig=0x306c3, pf=0x10, revision=0x20
>[    1.167840] microcode: CPU7 sig=0x306c3, pf=0x10, revision=0x20
>[    1.167951] microcode: Microcode Update Driver: v2.01 <tigran@aivazian.fsnet.co.uk>, Peter Oruba
>[    1.168249] registered taskstats version 1
>[    1.168255] Loading compiled-in X.509 certificates
>[    1.168295] zswap: loaded using pool lzo/zbud
>[    1.232466]   Magic number: 12:358:688
>[    1.232603] rtc_cmos 00:04: setting system clock to 2016-08-23 14:41:29 UTC (1471963289)
>[    1.232660] PM: Hibernation image not present or could not be loaded.
>[    1.233708] Freeing unused kernel memory: 1240K (ffffffff818f6000 - ffffffff81a2c000)
>[    1.233709] Write protecting the kernel read-only data: 8192k
>[    1.233891] Freeing unused kernel memory: 104K (ffff8800015e6000 - ffff880001600000)
>[    1.234480] Freeing unused kernel memory: 212K (ffff8800017cb000 - ffff880001800000)
>[    1.241595] random: systemd-tmpfile urandom read with 2 bits of entropy available
>[    1.261263] i8042: PNP: PS/2 Controller [PNP0303:KBC,PNP0f13:PS2M] at 0x60,0x64 irq 1,12
>[    1.269327] i8042: Detected active multiplexing controller, rev 1.1
>[    1.272226] rtsx_pci 0000:03:00.0: rtsx_pci_acquire_irq: pcr->msi_en = 1, pci->irq = 24
>[    1.273037] serio: i8042 KBD port at 0x60,0x64 irq 1
>[    1.273095] serio: i8042 AUX0 port at 0x60,0x64 irq 12
>[    1.273135] serio: i8042 AUX1 port at 0x60,0x64 irq 12
>[    1.273175] serio: i8042 AUX2 port at 0x60,0x64 irq 12
>[    1.273210] serio: i8042 AUX3 port at 0x60,0x64 irq 12
>[    1.273421] ACPI: bus type USB registered
>[    1.273440] usbcore: registered new interface driver usbfs
>[    1.273448] usbcore: registered new interface driver hub
>[    1.273478] usbcore: registered new device driver usb
>[    1.273479] SCSI subsystem initialized
>[    1.273814] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
>[    1.274019] ehci-pci: EHCI PCI platform driver
>[    1.274126] ehci-pci 0000:00:1a.0: EHCI Host Controller
>[    1.274131] ehci-pci 0000:00:1a.0: new USB bus registered, assigned bus number 1
>[    1.274142] ehci-pci 0000:00:1a.0: debug port 2
>[    1.275480] libata version 3.00 loaded.
>[    1.277145] AVX2 version of gcm_enc/dec engaged.
>[    1.277147] AES CTR mode by8 optimization enabled
>[    1.278058] ehci-pci 0000:00:1a.0: cache line size of 64 is not supported
>[    1.278075] ehci-pci 0000:00:1a.0: irq 18, io mem 0xf063e000
>[    1.284902] ehci-pci 0000:00:1a.0: USB 2.0 started, EHCI 1.00
>[    1.285053] hub 1-0:1.0: USB hub found
>[    1.285059] hub 1-0:1.0: 3 ports detected
>[    1.285528] ehci-pci 0000:00:1d.0: EHCI Host Controller
>[    1.285533] ehci-pci 0000:00:1d.0: new USB bus registered, assigned bus number 2
>[    1.285544] ehci-pci 0000:00:1d.0: debug port 2
>[    1.289448] ehci-pci 0000:00:1d.0: cache line size of 64 is not supported
>[    1.289459] ehci-pci 0000:00:1d.0: irq 23, io mem 0xf063d000
>[    1.298250] ehci-pci 0000:00:1d.0: USB 2.0 started, EHCI 1.00
>[    1.298429] hub 2-0:1.0: USB hub found
>[    1.298434] hub 2-0:1.0: 3 ports detected
>[    1.298924] xhci_hcd 0000:00:14.0: can't derive routing for PCI INT A
>[    1.298928] xhci_hcd 0000:00:14.0: PCI INT A: no GSI
>[    1.298955] xhci_hcd 0000:00:14.0: xHCI Host Controller
>[    1.298963] xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 3
>[    1.300050] xhci_hcd 0000:00:14.0: hcc params 0x200077c1 hci version 0x100 quirks 0x00009810
>[    1.300056] xhci_hcd 0000:00:14.0: cache line size of 64 is not supported
>[    1.300288] hub 3-0:1.0: USB hub found
>[    1.300305] hub 3-0:1.0: 15 ports detected
>[    1.301473] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input0
>[    1.304988] xhci_hcd 0000:00:14.0: xHCI Host Controller
>[    1.304992] xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 4
>[    1.305190] hub 4-0:1.0: USB hub found
>[    1.305202] hub 4-0:1.0: 6 ports detected
>[    1.306833] ahci 0000:00:1f.2: version 3.0
>[    1.307004] ahci 0000:00:1f.2: SSS flag set, parallel bus scan disabled
>[    1.307029] ahci 0000:00:1f.2: AHCI 0001.0300 32 slots 6 ports 6 Gbps 0x15 impl SATA mode
>[    1.307031] ahci 0000:00:1f.2: flags: 64bit ncq ilck stag pm led clo pio slum part ems sxs apst 
>[    1.319203] scsi host0: ahci
>[    1.319395] scsi host1: ahci
>[    1.319545] scsi host2: ahci
>[    1.319701] scsi host3: ahci
>[    1.319863] scsi host4: ahci
>[    1.320017] scsi host5: ahci
>[    1.320068] ata1: SATA max UDMA/133 abar m2048@0xf063c000 port 0xf063c100 irq 26
>[    1.320070] ata2: DUMMY
>[    1.320072] ata3: SATA max UDMA/133 abar m2048@0xf063c000 port 0xf063c200 irq 26
>[    1.320073] ata4: DUMMY
>[    1.320075] ata5: SATA max UDMA/133 abar m2048@0xf063c000 port 0xf063c300 irq 26
>[    1.320076] ata6: DUMMY
>[    1.591610] usb 1-1: new high-speed USB device number 2 using ehci-pci
>[    1.604939] usb 2-1: new high-speed USB device number 2 using ehci-pci
>[    1.629172] ata1: SATA link down (SStatus 0 SControl 300)
>[    1.664943] usb 3-2: new full-speed USB device number 2 using xhci_hcd
>[    1.715638] hub 1-1:1.0: USB hub found
>[    1.715748] hub 1-1:1.0: 6 ports detected
>[    1.729290] hub 2-1:1.0: USB hub found
>[    1.729373] hub 2-1:1.0: 8 ports detected
>[    1.845129] hidraw: raw HID events driver (C) Jiri Kosina
>[    1.857349] usbcore: registered new interface driver usbhid
>[    1.857351] usbhid: USB HID core driver
>[    1.857859] input: Microsoft MicrosoftÂ® Nano Transceiver v2.0 as /devices/pci0000:00/0000:00:14.0/usb3/3-2/3-2:1.0/0003:045E:0745.0001/input/input5
>[    1.908256] hid-generic 0003:045E:0745.0001: input,hidraw0: USB HID v1.11 Keyboard [Microsoft MicrosoftÂ® Nano Transceiver v2.0] on usb-0000:00:14.0-2/input0
>[    1.908544] input: Microsoft MicrosoftÂ® Nano Transceiver v2.0 as /devices/pci0000:00/0000:00:14.0/usb3/3-2/3-2:1.1/0003:045E:0745.0002/input/input6
>[    1.938383] ata3: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
>[    1.944980] usb 4-4: new SuperSpeed USB device number 2 using xhci_hcd
>[    1.945631] ata3.00: ACPI cmd 00/00:00:00:00:00:a0 (NOP) rejected by device (Stat=0x51 Err=0x04)
>[    1.946349] ata3.00: ATAPI: TSSTcorp CDDVDW SU-208CB, FU01, max UDMA/100
>[    1.955198] ata3.00: ACPI cmd 00/00:00:00:00:00:a0 (NOP) rejected by device (Stat=0x51 Err=0x04)
>[    1.955218] ata3.00: configured for UDMA/100
>[    1.959515] hub 4-4:1.0: USB hub found
>[    1.959552] hub 4-4:1.0: 4 ports detected
>[    1.960904] scsi 2:0:0:0: CD-ROM            TSSTcorp CDDVDW SU-208CB  FU01 PQ: 0 ANSI: 5
>[    1.961677] hid-generic 0003:045E:0745.0002: input,hidraw1: USB HID v1.11 Mouse [Microsoft MicrosoftÂ® Nano Transceiver v2.0] on usb-0000:00:14.0-2/input1
>[    1.971398] input: Microsoft MicrosoftÂ® Nano Transceiver v2.0 as /devices/pci0000:00/0000:00:14.0/usb3/3-2/3-2:1.2/0003:045E:0745.0003/input/input7
>[    2.021813] hid-generic 0003:045E:0745.0003: input,hiddev0,hidraw2: USB HID v1.11 Device [Microsoft MicrosoftÂ® Nano Transceiver v2.0] on usb-0000:00:14.0-2/input2
>[    2.118258] usb 3-4: new full-speed USB device number 3 using xhci_hcd
>[    2.134920] tsc: Refined TSC clocksource calibration: 2194.917 MHz
>[    2.134923] clocksource: tsc: mask: 0xffffffffffffffff max_cycles: 0x1fa37107ca2, max_idle_ns: 440795258165 ns
>[    2.279220] ata5: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
>[    2.281241] ata5.00: ACPI cmd f5/00:00:00:00:00:a0 (SECURITY FREEZE LOCK) filtered out
>[    2.281245] ata5.00: ACPI cmd b1/c1:00:00:00:00:a0 (DEVICE CONFIGURATION OVERLAY) filtered out
>[    2.281312] ata5.00: supports DRM functions and may not be fully accessible
>[    2.287997] ata5.00: NCQ Send/Recv Log not supported
>[    2.288001] ata5.00: ATA-9: Samsung SSD 850 EVO 1TB, EMT01B6Q, max UDMA/133
>[    2.288003] ata5.00: 1953525168 sectors, multi 1: LBA48 NCQ (depth 31/32), AA
>[    2.288448] ata5.00: ACPI cmd f5/00:00:00:00:00:a0 (SECURITY FREEZE LOCK) filtered out
>[    2.288452] ata5.00: ACPI cmd b1/c1:00:00:00:00:a0 (DEVICE CONFIGURATION OVERLAY) filtered out
>[    2.288518] ata5.00: supports DRM functions and may not be fully accessible
>[    2.295159] ata5.00: NCQ Send/Recv Log not supported
>[    2.295276] ata5.00: configured for UDMA/133
>[    2.295546] scsi 4:0:0:0: Direct-Access     ATA      Samsung SSD 850  1B6Q PQ: 0 ANSI: 5
>[    2.341996] sr 2:0:0:0: [sr0] scsi3-mmc drive: 24x/24x writer dvd-ram cd/rw xa/form2 cdda tray
>[    2.341999] cdrom: Uniform CD-ROM driver Revision: 3.20
>[    2.342140] sr 2:0:0:0: Attached scsi CD-ROM sr0
>[    2.342258] sd 4:0:0:0: [sda] 1953525168 512-byte logical blocks: (1.00 TB/932 GiB)
>[    2.342294] sd 4:0:0:0: [sda] Write Protect is off
>[    2.342297] sd 4:0:0:0: [sda] Mode Sense: 00 3a 00 00
>[    2.342312] sd 4:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
>[    2.344277]  sda: sda1 sda2 sda3
>[    2.344549] sd 4:0:0:0: [sda] Attached SCSI disk
>[    2.451575] usb 3-5: new full-speed USB device number 4 using xhci_hcd
>[    2.625956] hub 3-5:1.0: USB hub found
>[    2.626068] hub 3-5:1.0: 4 ports detected
>[    2.784901] usb 3-8: new full-speed USB device number 5 using xhci_hcd
>[    3.024890] usb 3-5.2: new full-speed USB device number 6 using xhci_hcd
>[    3.134994] clocksource: Switched to clocksource tsc
>[    3.264898] usb 3-9: new full-speed USB device number 7 using xhci_hcd
>[    3.442036] hid-generic 0003:16D0:09A0.0004: hiddev0,hidraw3: USB HID v1.11 Device [SE Mooltipass] on usb-0000:00:14.0-9/input0
>[    3.443157] input: SE Mooltipass as /devices/pci0000:00/0000:00:14.0/usb3/3-9/3-9:1.1/0003:16D0:09A0.0005/input/input8
>[    3.495066] hid-generic 0003:16D0:09A0.0005: input,hidraw4: USB HID v1.11 Keyboard [SE Mooltipass] on usb-0000:00:14.0-9/input1
>[    3.654853] usb 3-10: new high-speed USB device number 8 using xhci_hcd
>[    3.829195] hub 3-10:1.0: USB hub found
>[    3.829225] hub 3-10:1.0: 4 ports detected
>[    3.988133] usb 3-12: new high-speed USB device number 9 using xhci_hcd
>[    4.228218] usb 3-10.2: new high-speed USB device number 10 using xhci_hcd
>[    4.281618] floppy0: no floppy controllers found
>[    4.310599] hub 3-10.2:1.0: USB hub found
>[    4.310925] hub 3-10.2:1.0: 4 ports detected
>[    4.322199] device-mapper: uevent: version 1.0.3
>[    4.322260] device-mapper: ioctl: 4.34.0-ioctl (2015-10-28) initialised: dm-devel@redhat.com
>[    4.391493] usb 3-10.3: new high-speed USB device number 11 using xhci_hcd
>[    4.472689] hub 3-10.3:1.0: USB hub found
>[    4.472723] hub 3-10.3:1.0: 4 ports detected
>[    4.538153] usb 3-10.4: new low-speed USB device number 12 using xhci_hcd
>[    4.631889] input: Fujitsu Technology Solutions GmbH Fujitsu Keyboard as /devices/pci0000:00/0000:00:14.0/usb3/3-10/3-10.4/3-10.4:1.0/0003:0BF8:101E.0006/input/input9
>[    4.684817] usb 3-10.2.4: new full-speed USB device number 13 using xhci_hcd
>[    4.684978] hid-generic 0003:0BF8:101E.0006: input,hidraw5: USB HID v1.10 Keyboard [Fujitsu Technology Solutions GmbH Fujitsu Keyboard] on usb-0000:00:14.0-10.4/input0
>[    4.692358] input: Fujitsu Technology Solutions GmbH Fujitsu Keyboard as /devices/pci0000:00/0000:00:14.0/usb3/3-10/3-10.4/3-10.4:1.1/0003:0BF8:101E.0007/input/input10
>[    4.745054] hid-generic 0003:0BF8:101E.0007: input,hiddev0,hidraw6: USB HID v1.10 Device [Fujitsu Technology Solutions GmbH Fujitsu Keyboard] on usb-0000:00:14.0-10.4/input1
>[    4.844810] usb 3-10.3.4: new full-speed USB device number 14 using xhci_hcd
>[   13.049262] NET: Registered protocol family 38
>[   13.357763] raid6: sse2x1   gen()  7926 MB/s
>[   13.414419] raid6: sse2x1   xor()  6182 MB/s
>[   13.471086] raid6: sse2x2   gen() 10055 MB/s
>[   13.527749] raid6: sse2x2   xor()  6750 MB/s
>[   13.584413] raid6: sse2x4   gen() 11541 MB/s
>[   13.641076] raid6: sse2x4   xor()  8170 MB/s
>[   13.697741] raid6: avx2x1   gen() 17823 MB/s
>[   13.754408] raid6: avx2x2   gen() 20823 MB/s
>[   13.811070] raid6: avx2x4   gen() 23851 MB/s
>[   13.811071] raid6: using algorithm avx2x4 gen() 23851 MB/s
>[   13.811072] raid6: using avx2x2 recovery algorithm
>[   13.811257] xor: automatically using best checksumming function:
>[   13.844403]    avx       : 25184.400 MB/sec
>[   13.847610] Btrfs loaded, crc32c=crc32c-intel
>[   13.847613] BTRFS: selftest: sectorsize: 4096  nodesize: 4096
>[   13.847614] BTRFS: selftest: sectorsize: 4096  nodesize: 8192
>[   13.847615] BTRFS: selftest: sectorsize: 4096  nodesize: 16384
>[   13.847615] BTRFS: selftest: sectorsize: 4096  nodesize: 32768
>[   13.847616] BTRFS: selftest: sectorsize: 4096  nodesize: 65536
>[   13.849706] BTRFS: device fsid c91384af-f210-48f5-ba19-d6415a1bb447 devid 1 transid 47385 /dev/dm-0
>[   13.875496] BTRFS info (device dm-0): disk space caching is enabled
>[   13.875498] BTRFS info (device dm-0): has skinny extents
>[   13.968696] BTRFS info (device dm-0): detected SSD devices, enabling SSD mode
>[   14.079881] ip_tables: (C) 2000-2006 Netfilter Core Team
>[   14.115484] systemd[1]: systemd 231 running in system mode. (+PAM -AUDIT -SELINUX -IMA -APPARMOR +SMACK -SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +SECCOMP +BLKID +ELFUTILS +KMOD +IDN)
>[   14.115633] systemd[1]: Detected architecture x86-64.
>[   14.116342] systemd[1]: Set hostname to <arch>.
>[   14.179671] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
>[   14.180045] systemd[1]: Created slice User and Session Slice.
>[   14.180183] systemd[1]: Created slice System Slice.
>[   14.180340] systemd[1]: Set up automount Arbitrary Executable File Formats File System Automount Point.
>[   14.180419] systemd[1]: Reached target Encrypted Volumes.
>[   14.180553] systemd[1]: Created slice system-getty.slice.
>[   14.180624] systemd[1]: Reached target Slices.
>[   14.180685] systemd[1]: Listening on Journal Socket (/dev/log).
>[   14.180747] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
>[   14.180795] systemd[1]: Reached target Swap.
>[   14.180842] systemd[1]: Listening on LVM2 metadata daemon socket.
>[   14.180966] systemd[1]: Created slice system-systemd\x2dfsck.slice.
>[   14.181036] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe.
>[   14.181493] systemd[1]: Listening on Process Core Dump Socket.
>[   14.181560] systemd[1]: Listening on Journal Socket.
>[   14.201220] systemd[1]: Mounting Debug File System...
>[   14.201766] systemd[1]: Starting Setup Virtual Console...
>[   14.202251] systemd[1]: Mounting Huge Pages File System...
>[   14.202764] systemd[1]: Mounting Temporary Directory...
>[   14.203329] systemd[1]: Starting Remount Root and Kernel File Systems...
>[   14.203834] systemd[1]: Mounting POSIX Message Queue File System...
>[   14.204325] systemd[1]: Starting Create list of required static device nodes for the current kernel...
>[   14.204403] systemd[1]: Reached target Remote File Systems.
>[   14.204863] systemd[1]: Starting Load Kernel Modules...
>[   14.204937] systemd[1]: Listening on Device-mapper event daemon FIFOs.
>[   14.204990] systemd[1]: Reached target Login Prompts.
>[   14.205049] systemd[1]: Listening on udev Kernel Socket.
>[   14.205113] systemd[1]: Listening on udev Control Socket.
>[   14.207882] systemd[1]: Starting Set Up Additional Binary Formats...
>[   14.220937] systemd[1]: Starting Journal Service...
>[   14.222289] systemd[1]: Mounted Debug File System.
>[   14.222365] systemd[1]: Mounted POSIX Message Queue File System.
>[   14.222477] systemd[1]: Mounted Huge Pages File System.
>[   14.222518] systemd[1]: Mounted Temporary Directory.
>[   14.222828] systemd[1]: Started Create list of required static device nodes for the current kernel.
>[   14.223033] systemd[1]: proc-sys-fs-binfmt_misc.automount: Got automount request for /proc/sys/fs/binfmt_misc, triggered by 348 (systemd-binfmt)
>[   14.223372] systemd[1]: Mounting Arbitrary Executable File Formats File System...
>[   14.224850] systemd[1]: Mounted Arbitrary Executable File Formats File System.
>[   14.225669] vboxdrv: Found 8 processor cores
>[   14.228277] systemd[1]: Started Set Up Additional Binary Formats.
>[   14.244615] vboxdrv: TSC mode is Invariant, tentative frequency 2194915678 Hz
>[   14.244618] vboxdrv: Successfully loaded version 5.1.2_OSE (interface 0x00260000)
>[   14.273340] VBoxPciLinuxInit
>[   14.308573] vboxpci: IOMMU not found (not registered)
>[   14.309579] VBoxNetAdp: Successfully started.
>[   14.310286] BTRFS info (device dm-0): disk space caching is enabled
>[   14.310582] VBoxNetFlt: Successfully started.
>[   14.311103] systemd[1]: Started Setup Virtual Console.
>[   14.311428] systemd[1]: Started Remount Root and Kernel File Systems.
>[   14.312561] systemd[1]: Started Load Kernel Modules.
>[   14.331172] systemd[1]: Mounting Configuration File System...
>[   14.332317] systemd[1]: Starting Apply Kernel Variables...
>[   14.333288] systemd[1]: Starting Load/Save Random Seed...
>[   14.334442] systemd[1]: Starting Create Static Device Nodes in /dev...
>[   14.338850] systemd[1]: Starting udev Coldplug all Devices...
>[   14.342531] systemd[1]: Mounted Configuration File System.
>[   14.344068] systemd[1]: Started Apply Kernel Variables.
>[   14.345157] systemd[1]: Started Load/Save Random Seed.
>[   14.347340] systemd[1]: Started Create Static Device Nodes in /dev.
>[   14.348569] systemd[1]: Reached target Local File Systems (Pre).
>[   14.349672] systemd[1]: Starting udev Kernel Device Manager...
>[   14.376665] systemd[1]: Started udev Coldplug all Devices.
>[   14.384858] systemd[1]: Started udev Kernel Device Manager.
>[   14.396639] ACPI: AC Adapter [AC] (on-line)
>[   14.401078] input: Fujitsu FUJ02B1 as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:0a/FUJ02B1:00/input/input11
>[   14.401085] fujitsu_laptop: ACPI: Fujitsu FUJ02B1 [FJEX] (on)
>[   14.401981] input: Fujitsu FUJ02E3 as /devices/LNXSYSTM:00/LNXSYBUS:00/FUJ02E3:00/input/input12
>[   14.401987] fujitsu_laptop: ACPI: Fujitsu FUJ02E3 [FEXT] (on)
>[   14.406784] fujitsu_laptop: BTNI: [0x1010001]
>[   14.410822] fujitsu_laptop: driver 0.6.0 successfully loaded
>[   14.410829] FUJITSU Extended Socket Network Device Driver - version 1.1 - Copyright (c) 2015 FUJITSU LIMITED
>[   14.437678] systemd[1]: Started Journal Service.
>[   14.445541] EDAC MC: Ver: 3.0.0
>[   14.446792] shpchp: Standard Hot Plug PCI Controller Driver version: 0.4
>[   14.447478] pps_core: LinuxPPS API ver. 1 registered
>[   14.447481] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
>[   14.450382] PTP clock support registered
>[   14.451215] EDAC ie31200: No ECC support
>[   14.457706] [drm] Initialized drm 1.1.0 20060810
>[   14.459429] i801_smbus 0000:00:1f.3: SMBus using PCI interrupt
>[   14.459810] e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k
>[   14.459813] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
>[   14.463718] e1000e 0000:00:19.0: Interrupt Throttling Rate (ints/sec) set to dynamic conservative mode
>[   14.470840] systemd-journald[358]: Received request to flush runtime journal from PID 1
>[   14.496072] random: nonblocking pool is initialized
>[   14.501654] media: Linux media interface: v0.10
>[   14.501991] cdc_acm 3-10.3.4:1.0: ttyACM0: USB ACM device
>[   14.502168] usbcore: registered new interface driver cdc_acm
>[   14.502170] cdc_acm: USB Abstract Control Model driver for USB modems and ISDN adapters
>[   14.508959] Linux video capture interface: v2.00
>[   14.511235] Bluetooth: Core ver 2.21
>[   14.511249] NET: Registered protocol family 31
>[   14.511250] Bluetooth: HCI device and connection manager initialized
>[   14.511253] Bluetooth: HCI socket layer initialized
>[   14.511256] Bluetooth: L2CAP socket layer initialized
>[   14.511263] Bluetooth: SCO socket layer initialized
>[   14.511352] mousedev: PS/2 mouse device common for all mice
>[   14.515456] input: PC Speaker as /devices/platform/pcspkr/input/input13
>[   14.515744] usbcore: registered new interface driver btusb
>[   14.524207] RAPL PMU: API unit is 2^-32 Joules, 4 fixed counters, 655360 ms ovfl timer
>[   14.524210] RAPL PMU: hw unit of domain pp0-core 2^-14 Joules
>[   14.524211] RAPL PMU: hw unit of domain package 2^-14 Joules
>[   14.524212] RAPL PMU: hw unit of domain dram 2^-14 Joules
>[   14.524212] RAPL PMU: hw unit of domain pp1-gpu 2^-14 Joules
>[   14.528328] ACPI: Battery Slot [CMB1] (battery present)
>[   14.528429] ACPI: Battery Slot [CMB2] (battery absent)
>[   14.528502] input: Lid Switch as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0D:00/input/input16
>[   14.528587] ACPI: Lid Switch [LID]
>[   14.528656] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input17
>[   14.528694] ACPI: Power Button [PWRB]
>[   14.528735] input: Sleep Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0E:00/input/input18
>[   14.528757] ACPI: Sleep Button [SLPB]
>[   14.528786] Bluetooth: hci0: read Intel version: 370710018002030d56
>[   14.528788] Bluetooth: hci0: Intel device is already patched. patch num: 56
>[   14.556462] e1000e 0000:00:19.0 0000:00:19.0 (uninitialized): registered PHC clock
>[   14.563096] iTCO_vendor_support: vendor-support=0
>[   14.564214] iTCO_wdt: Intel TCO WatchDog Timer Driver v1.11
>[   14.564261] iTCO_wdt: Found a Lynx Point TCO device (Version=2, TCOBASE=0x1860)
>[   14.564384] iTCO_wdt: initialized. heartbeat=30 sec (nowayout=0)
>[   14.574682] Intel(R) Wireless WiFi driver for Linux
>[   14.574683] Copyright(c) 2003- 2015 Intel Corporation
>[   14.584579] intel_rapl: Found RAPL domain package
>[   14.584583] intel_rapl: Found RAPL domain core
>[   14.584585] intel_rapl: Found RAPL domain uncore
>[   14.584587] intel_rapl: Found RAPL domain dram
>[   14.585784] usbcore: registered new interface driver snd-usb-audio
>[   14.587995] uvcvideo: Found UVC 1.00 device FJ Camera (04f2:b3b4)
>[   14.588637] ppdev: user-space parallel port driver
>[   14.592416] iwlwifi 0000:02:00.0: loaded firmware version 17.352738.0 op_mode iwlmvm
>[   14.593063] uvcvideo 3-12:1.0: Entity type for entity Extension 4 was not initialized!
>[   14.593066] uvcvideo 3-12:1.0: Entity type for entity Processing 2 was not initialized!
>[   14.593068] uvcvideo 3-12:1.0: Entity type for entity Camera 1 was not initialized!
>[   14.593147] input: FJ Camera as /devices/pci0000:00/0000:00:14.0/usb3/3-12/3-12:1.0/input/input19
>[   14.593221] usbcore: registered new interface driver uvcvideo
>[   14.593222] USB Video Class driver (1.1.1)
>[   14.624151] iwlwifi 0000:02:00.0: Detected Intel(R) Wireless N 7260, REV=0x144
>[   14.626214] iwlwifi 0000:02:00.0: L1 Enabled - LTR Enabled
>[   14.626480] iwlwifi 0000:02:00.0: L1 Enabled - LTR Enabled
>[   14.638173] e1000e 0000:00:19.0 eth0: (PCI Express:2.5GT/s:Width x1) 74:2b:62:86:d5:01
>[   14.638183] e1000e 0000:00:19.0 eth0: Intel(R) PRO/1000 Network Connection
>[   14.638230] e1000e 0000:00:19.0 eth0: MAC: 11, PHY: 12, PBA No: FFFFFF-0FF
>[   14.639293] [drm:intel_detect_pch] Found LynxPoint PCH
>[   14.639297] [drm:get_allowed_dc_mask] Allowed DC state mask 00
>[   14.639413] [drm:i915_dump_device_info] i915 device info: gen=7, pciid=0x0416 rev=0x06 flags=is_mobile,need_gfx_hws,is_haswell,has_fbc,has_hotplug,has_llc,has_ddi,has_fpga_dbg,
>[   14.639467] [drm:intel_device_info_runtime_init] slice total: 0
>[   14.639469] [drm:intel_device_info_runtime_init] subslice total: 0
>[   14.639471] [drm:intel_device_info_runtime_init] subslice per slice: 0
>[   14.639473] [drm:intel_device_info_runtime_init] EU total: 0
>[   14.639474] [drm:intel_device_info_runtime_init] EU per subslice: 0
>[   14.639476] [drm:intel_device_info_runtime_init] has slice power gating: n
>[   14.639478] [drm:intel_device_info_runtime_init] has subslice power gating: n
>[   14.639480] [drm:intel_device_info_runtime_init] has EU power gating: n
>[   14.639500] [drm:i915_gem_init_stolen] Memory reserved for graphics device: 32768K, usable: 31744K
>[   14.639502] [drm] Memory usable by graphics device = 2048M
>[   14.639504] [drm:i915_ggtt_init_hw] GMADR size = 256M
>[   14.639506] [drm:i915_ggtt_init_hw] GTT stolen size = 32M
>[   14.639507] [drm:i915_ggtt_init_hw] ppgtt mode: 1
>[   14.639510] checking generic (e0000000 580000) vs hw (e0000000 10000000)
>[   14.639512] fb: switching to inteldrmfb from EFI VGA
>[   14.639538] Console: switching to colour dummy device 80x25
>[   14.639633] [drm] Replacing VGA console driver
>[   14.639663] [drm:intel_opregion_setup] graphic opregion physical addr: 0xdca77018
>[   14.639674] [drm:intel_opregion_setup] Public ACPI methods supported
>[   14.639676] [drm:intel_opregion_setup] SWSCI supported
>[   14.639983] e1000e 0000:00:19.0 enp0s25: renamed from eth0
>[   14.646388] [drm:swsci_setup] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00200001
>[   14.646392] [drm:intel_opregion_setup] ASLE supported
>[   14.646394] [drm:intel_opregion_setup] ASLE extension supported
>[   14.646397] [drm:intel_opregion_setup] Found valid VBT in ACPI OpRegion (Mailbox #4)
>[   14.646437] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
>[   14.646438] [drm] Driver supports precise vblank timestamp query.
>[   14.646441] [drm:init_vbt_defaults] Set default to SSC at 120000 kHz
>[   14.646443] [drm:intel_bios_init] VBT signature "$VBT HASWELL        ", BDB version 177
>[   14.646446] [drm:parse_general_features] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 1 lvds_use_ssc 0 lvds_ssc_freq 120000 display_clock_mode 0 fdi_rx_polarity_inverted 0
>[   14.646448] [drm:parse_general_definitions] crt_ddc_bus_pin: 2
>[   14.647796] [drm:parse_lfp_panel_data] Panel type: 0 (OpRegion)
>[   14.647801] [drm:parse_lfp_panel_data] DRRS supported mode is static
>[   14.647804] [drm:parse_lfp_panel_data] Found panel mode in BIOS VBT tables:
>[   14.647808] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 0 70000 1366 1402 1438 1476 768 772 780 790 0x8 0xa
>[   14.647810] [drm:parse_lfp_panel_data] VBT initial LVDS value 300
>[   14.647813] [drm:parse_lfp_backlight] VBT backlight PWM modulation frequency 210 Hz, active high, min brightness 0, level 255
>[   14.647816] [drm:parse_sdvo_panel_data] Found SDVO panel mode in BIOS VBT tables:
>[   14.647819] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 0 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x8 0xa
>[   14.647821] [drm:parse_sdvo_device_mapping] No SDVO device info is found in VBT
>[   14.647824] [drm:parse_driver_features] DRRS State Enabled:0
>[   14.647827] [drm:parse_ddi_port] Port A VBT info: DP:1 HDMI:0 DVI:0 EDP:1 CRT:0
>[   14.647830] [drm:parse_ddi_port] VBT HDMI level shift for port A: 0
>[   14.647833] [drm:parse_ddi_port] Port B VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0
>[   14.647835] [drm:parse_ddi_port] VBT HDMI level shift for port B: 0
>[   14.647837] [drm:parse_ddi_port] Port C VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0
>[   14.647838] [drm:parse_ddi_port] VBT HDMI level shift for port C: 0
>[   14.647840] [drm:parse_ddi_port] Port D VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0
>[   14.647842] [drm:parse_ddi_port] VBT HDMI level shift for port D: 0
>[   14.647852] [drm:intel_dsm_pci_probe] no _DSM method for intel device
>[   14.647857] [drm:intel_power_well_enable] enabling always-on
>[   14.647859] [drm:intel_power_well_enable] enabling display
>[   14.648084] [drm:intel_print_wm_latency] Primary WM0 latency 20 (2.0 usec)
>[   14.648086] [drm:intel_print_wm_latency] Primary WM1 latency 4 (2.0 usec)
>[   14.648087] [drm:intel_print_wm_latency] Primary WM2 latency 36 (18.0 usec)
>[   14.648088] [drm:intel_print_wm_latency] Primary WM3 latency 90 (45.0 usec)
>[   14.648089] [drm:intel_print_wm_latency] Primary WM4 latency 160 (80.0 usec)
>[   14.648090] [drm:intel_print_wm_latency] Sprite WM0 latency 20 (2.0 usec)
>[   14.648091] [drm:intel_print_wm_latency] Sprite WM1 latency 4 (2.0 usec)
>[   14.648093] [drm:intel_print_wm_latency] Sprite WM2 latency 36 (18.0 usec)
>[   14.648094] [drm:intel_print_wm_latency] Sprite WM3 latency 90 (45.0 usec)
>[   14.648095] [drm:intel_print_wm_latency] Sprite WM4 latency 160 (80.0 usec)
>[   14.648096] [drm:intel_print_wm_latency] Cursor WM0 latency 20 (2.0 usec)
>[   14.648097] [drm:intel_print_wm_latency] Cursor WM1 latency 4 (2.0 usec)
>[   14.648098] [drm:intel_print_wm_latency] Cursor WM2 latency 36 (18.0 usec)
>[   14.648099] [drm:intel_print_wm_latency] Cursor WM3 latency 90 (45.0 usec)
>[   14.648100] [drm:intel_print_wm_latency] Cursor WM4 latency 160 (80.0 usec)
>[   14.648102] [drm:intel_modeset_init] 3 display pipes available.
>[   14.648114] [drm:intel_update_rawclk] rawclk rate: 125000 kHz
>[   14.648115] [drm:intel_update_cdclk] Current CD clock rate: 540000 kHz
>[   14.648116] [drm:intel_update_max_cdclk] Max CD clock rate: 540000 kHz
>[   14.648117] [drm:intel_update_max_cdclk] Max dotclock rate: 540000 kHz
>[   14.648120] vgaarb: device changed decodes: PCI:0000:00:02.0,olddecodes=io+mem,decodes=io+mem:owns=io+mem
>[   14.648470] [drm:intel_crt_reset] crt adpa set to 0xf40000
>[   14.648475] [drm:intel_dp_init_connector] Adding eDP connector on port A
>[   14.648504] [drm:intel_dp_init_panel_power_sequencer] cur t1_t3 1000 t8 0 t9 2200 t10 1000 t11_t12 8000
>[   14.648505] [drm:intel_dp_init_panel_power_sequencer] vbt t1_t3 1000 t8 10 t9 2200 t10 1000 t11_t12 7000
>[   14.648506] [drm:intel_dp_init_panel_power_sequencer] panel power up delay 100, power down delay 100, power cycle delay 800
>[   14.648507] [drm:intel_dp_init_panel_power_sequencer] backlight on delay 1, off delay 220
>[   14.648509] [drm:intel_dp_aux_init] registering DPDDC-A bus for card0-eDP-1
>[   14.648563] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   14.648571] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[   14.648965] [drm:intel_dp_get_dpcd] DPCD: 11 0a 82 41 00 00 01 80 02 00 00 00 0f 03 00
>[   14.649536] [drm:intel_dp_get_dpcd] Display Port TPS3 support: source yes, sink no
>[   14.649539] [drm:intel_dp_print_rates] source rates: 162000, 270000, 540000
>[   14.649540] [drm:intel_dp_print_rates] sink rates: 162000, 270000
>[   14.649541] [drm:intel_dp_print_rates] common rates: 162000, 270000
>[   14.649549] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x3e80001, PP_OFF 0x3e80001, PP_DIV 0x186908
>[   14.649781] [drm:drm_dp_i2c_do_msg] I2C nack (result=0, size=0
>[   14.649916] [drm:drm_dp_i2c_do_msg] I2C nack (result=0, size=0
>[   14.650147] [drm:drm_dp_i2c_do_msg] I2C nack (result=0, size=0
>[   14.650282] [drm:drm_dp_i2c_do_msg] I2C nack (result=0, size=0
>[   14.650512] [drm:drm_dp_i2c_do_msg] I2C nack (result=0, size=0
>[   14.650647] [drm:drm_dp_i2c_do_msg] I2C nack (result=0, size=0
>[   14.650879] [drm:drm_dp_i2c_do_msg] I2C nack (result=0, size=0
>[   14.651015] [drm:drm_dp_i2c_do_msg] I2C nack (result=0, size=0
>[   14.651252] [drm:drm_dp_i2c_do_msg] I2C nack (result=0, size=0
>[   14.651390] [drm:drm_dp_i2c_do_msg] I2C nack (result=0, size=0
>[   14.651397] [drm:intel_panel_setup_backlight] Connector eDP-1 backlight initialized, enabled, brightness 5022/5022
>[   14.651411] [drm:intel_dp_init_connector] Adding DP connector on port B
>[   14.651447] [drm:intel_dp_aux_init] registering DPDDC-B bus for card0-DP-1
>[   14.651495] [drm:intel_hdmi_init_connector] Adding HDMI connector on port B
>[   14.651521] [drm:intel_dp_init_connector] Adding DP connector on port C
>[   14.651542] [drm:intel_dp_aux_init] registering DPDDC-C bus for card0-DP-2
>[   14.651584] [drm:intel_hdmi_init_connector] Adding HDMI connector on port C
>[   14.651609] [drm:intel_dp_init_connector] Adding DP connector on port D
>[   14.651627] [drm:intel_dp_aux_init] registering DPDDC-D bus for card0-DP-3
>[   14.651663] [drm:intel_hdmi_init_connector] Adding HDMI connector on port D
>[   14.654234] snd_hda_codec_realtek hdaudioC2D0: ALC282: SKU not ready 0x909701f0
>[   14.654680] snd_hda_codec_realtek hdaudioC2D0: autoconfig for ALC282: line_outs=1 (0x21/0x0/0x0/0x0/0x0) type:line
>[   14.654682] snd_hda_codec_realtek hdaudioC2D0:    speaker_outs=1 (0x14/0x0/0x0/0x0/0x0)
>[   14.654683] snd_hda_codec_realtek hdaudioC2D0:    hp_outs=1 (0x1b/0x0/0x0/0x0/0x0)
>[   14.654685] snd_hda_codec_realtek hdaudioC2D0:    mono: mono_out=0x0
>[   14.654686] snd_hda_codec_realtek hdaudioC2D0:    inputs:
>[   14.654687] snd_hda_codec_realtek hdaudioC2D0:      Mic=0x18
>[   14.654688] snd_hda_codec_realtek hdaudioC2D0:      Dock Mic=0x1a
>[   14.654690] snd_hda_codec_realtek hdaudioC2D0:      Internal Mic=0x12
>[   14.665876] input: HDA Digital PCBeep as /devices/pci0000:00/0000:00:1b.0/sound/card2/input20
>[   14.666720] input: HDA Intel PCH Mic as /devices/pci0000:00/0000:00:1b.0/sound/card2/input21
>[   14.666803] input: HDA Intel PCH Dock Mic as /devices/pci0000:00/0000:00:1b.0/sound/card2/input22
>[   14.666890] input: HDA Intel PCH Headphone as /devices/pci0000:00/0000:00:1b.0/sound/card2/input23
>[   14.666981] input: HDA Intel PCH Dock Headphone as /devices/pci0000:00/0000:00:1b.0/sound/card2/input24
>[   14.709736] [drm:intel_modeset_readout_hw_state] [CRTC:26] hw state readout: enabled
>[   14.709741] [drm:intel_modeset_readout_hw_state] [CRTC:30] hw state readout: disabled
>[   14.709743] [drm:intel_modeset_readout_hw_state] [CRTC:34] hw state readout: disabled
>[   14.709746] [drm:intel_modeset_readout_hw_state] WRPLL 1 hw state readout: crtc_mask 0x00000000, on 0
>[   14.709747] [drm:intel_modeset_readout_hw_state] WRPLL 2 hw state readout: crtc_mask 0x00000000, on 0
>[   14.709749] [drm:intel_modeset_readout_hw_state] SPLL hw state readout: crtc_mask 0x00000000, on 0
>[   14.709750] [drm:intel_modeset_readout_hw_state] LCPLL 810 hw state readout: crtc_mask 0x00000000, on 1
>[   14.709752] [drm:intel_modeset_readout_hw_state] LCPLL 1350 hw state readout: crtc_mask 0x00000001, on 1
>[   14.709753] [drm:intel_modeset_readout_hw_state] LCPLL 2700 hw state readout: crtc_mask 0x00000000, on 1
>[   14.709756] [drm:intel_modeset_readout_hw_state] [ENCODER:37:DAC-37] hw state readout: disabled, pipe A
>[   14.709760] [drm:intel_modeset_readout_hw_state] [ENCODER:38:TMDS-38] hw state readout: enabled, pipe A
>[   14.709761] [drm:intel_modeset_readout_hw_state] [ENCODER:44:TMDS-44] hw state readout: disabled, pipe A
>[   14.709763] [drm:intel_modeset_readout_hw_state] [ENCODER:46:DP MST-46] hw state readout: disabled, pipe A
>[   14.709764] [drm:intel_modeset_readout_hw_state] [ENCODER:47:DP MST-47] hw state readout: disabled, pipe B
>[   14.709766] [drm:intel_modeset_readout_hw_state] [ENCODER:48:DP MST-48] hw state readout: disabled, pipe C
>[   14.709767] [drm:intel_modeset_readout_hw_state] [ENCODER:51:TMDS-51] hw state readout: disabled, pipe A
>[   14.709769] [drm:intel_modeset_readout_hw_state] [ENCODER:53:DP MST-53] hw state readout: disabled, pipe A
>[   14.709770] [drm:intel_modeset_readout_hw_state] [ENCODER:54:DP MST-54] hw state readout: disabled, pipe B
>[   14.709771] [drm:intel_modeset_readout_hw_state] [ENCODER:55:DP MST-55] hw state readout: disabled, pipe C
>[   14.709773] [drm:intel_modeset_readout_hw_state] [ENCODER:57:TMDS-57] hw state readout: disabled, pipe A
>[   14.709774] [drm:intel_modeset_readout_hw_state] [ENCODER:59:DP MST-59] hw state readout: disabled, pipe A
>[   14.709775] [drm:intel_modeset_readout_hw_state] [ENCODER:60:DP MST-60] hw state readout: disabled, pipe B
>[   14.709777] [drm:intel_modeset_readout_hw_state] [ENCODER:61:DP MST-61] hw state readout: disabled, pipe C
>[   14.709779] [drm:intel_modeset_readout_hw_state] [CONNECTOR:39:eDP-1] hw state readout: enabled
>[   14.709781] [drm:intel_modeset_readout_hw_state] [CONNECTOR:36:VGA-1] hw state readout: disabled
>[   14.709783] [drm:intel_modeset_readout_hw_state] [CONNECTOR:45:DP-1] hw state readout: disabled
>[   14.709784] [drm:intel_modeset_readout_hw_state] [CONNECTOR:49:HDMI-A-1] hw state readout: disabled
>[   14.709786] [drm:intel_modeset_readout_hw_state] [CONNECTOR:52:DP-2] hw state readout: disabled
>[   14.709788] [drm:intel_modeset_readout_hw_state] [CONNECTOR:56:HDMI-A-2] hw state readout: disabled
>[   14.709789] [drm:intel_modeset_readout_hw_state] [CONNECTOR:58:DP-3] hw state readout: disabled
>[   14.709791] [drm:intel_modeset_readout_hw_state] [CONNECTOR:62:HDMI-A-3] hw state readout: disabled
>[   14.709796] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1600x900] for CRTC state ffff880403e6b800
>[   14.709803] [drm:intel_dump_pipe_config] [CRTC:26][setup_hw_state] config ffff880403e6b800 for pipe A
>[   14.709804] [drm:intel_dump_pipe_config] cpu_transcoder: EDP
>[   14.709806] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 0
>[   14.709807] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   14.709809] [drm:intel_dump_pipe_config] dp: 1, lanes: 2, gmch_m: 3767883, gmch_n: 8388608, link_m: 209326, link_n: 524288, tu: 64
>[   14.709811] [drm:intel_dump_pipe_config] dp: 1, lanes: 2, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   14.709812] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   14.709813] [drm:intel_dump_pipe_config] requested mode:
>[   14.709815] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x900" 60 107799 1600 1648 1680 1920 900 903 908 936 0x40 0xa
>[   14.709816] [drm:intel_dump_pipe_config] adjusted mode:
>[   14.709818] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x900" 60 107799 1600 1648 1680 1920 900 903 908 936 0x40 0xa
>[   14.709820] [drm:intel_dump_crtc_timings] crtc timings: 107799 1600 1648 1680 1920 900 903 908 936, type: 0x40 flags: 0xa
>[   14.709821] [drm:intel_dump_pipe_config] port clock: 270000
>[   14.709822] [drm:intel_dump_pipe_config] pipe src size: 1600x900
>[   14.709824] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[   14.709825] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   14.709826] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x06400384, enabled
>[   14.709827] [drm:intel_dump_pipe_config] ips: 0
>[   14.709828] [drm:intel_dump_pipe_config] double wide: 0
>[   14.709830] [drm:intel_dump_pipe_config] ddi_pll_sel: 0x20000000; dpll_hw_state: wrpll: 0x0 spll: 0x0
>[   14.709831] [drm:intel_dump_pipe_config] planes on this crtc
>[   14.709832] [drm:intel_dump_pipe_config] STANDARD PLANE:23 plane: 0.0 idx: 0 disabled, scaler_id = 0
>[   14.709834] [drm:intel_dump_pipe_config] CURSOR PLANE:25 plane: 0.1 idx: 1 disabled, scaler_id = 0
>[   14.709835] [drm:intel_dump_pipe_config] STANDARD PLANE:27 plane: 0.1 idx: 2 disabled, scaler_id = 0
>[   14.709837] [drm:intel_dump_pipe_config] [CRTC:30][setup_hw_state] config ffff880403e6f000 for pipe B
>[   14.709838] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   14.709839] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0
>[   14.709841] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   14.709842] [drm:intel_dump_pipe_config] dp: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   14.709843] [drm:intel_dump_pipe_config] dp: 0, lanes: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   14.709844] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   14.709845] [drm:intel_dump_pipe_config] requested mode:
>[   14.709847] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[   14.709848] [drm:intel_dump_pipe_config] adjusted mode:
>[   14.709850] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[   14.709851] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[   14.709852] [drm:intel_dump_pipe_config] port clock: 0
>[   14.709853] [drm:intel_dump_pipe_config] pipe src size: 0x0
>[   14.709855] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[   14.709856] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   14.709857] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   14.709858] [drm:intel_dump_pipe_config] ips: 0
>[   14.709859] [drm:intel_dump_pipe_config] double wide: 0
>[   14.709860] [drm:intel_dump_pipe_config] ddi_pll_sel: 0x0; dpll_hw_state: wrpll: 0x0 spll: 0x0
>[   14.709861] [drm:intel_dump_pipe_config] planes on this crtc
>[   14.709863] [drm:intel_dump_pipe_config] STANDARD PLANE:28 plane: 1.0 idx: 3 disabled, scaler_id = 0
>[   14.709864] [drm:intel_dump_pipe_config] CURSOR PLANE:29 plane: 1.2 idx: 4 disabled, scaler_id = 0
>[   14.709865] [drm:intel_dump_pipe_config] STANDARD PLANE:31 plane: 1.1 idx: 5 disabled, scaler_id = 0
>[   14.709867] [drm:intel_dump_pipe_config] [CRTC:34][setup_hw_state] config ffff880403e69800 for pipe C
>[   14.709868] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[   14.709869] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0
>[   14.709870] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   14.709872] [drm:intel_dump_pipe_config] dp: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   14.709873] [drm:intel_dump_pipe_config] dp: 0, lanes: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   14.709874] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   14.709875] [drm:intel_dump_pipe_config] requested mode:
>[   14.709877] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[   14.709877] [drm:intel_dump_pipe_config] adjusted mode:
>[   14.709879] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[   14.709881] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[   14.709882] [drm:intel_dump_pipe_config] port clock: 0
>[   14.709883] [drm:intel_dump_pipe_config] pipe src size: 0x0
>[   14.709884] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[   14.709885] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   14.709886] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   14.709887] [drm:intel_dump_pipe_config] ips: 0
>[   14.709888] [drm:intel_dump_pipe_config] double wide: 0
>[   14.709889] [drm:intel_dump_pipe_config] ddi_pll_sel: 0x0; dpll_hw_state: wrpll: 0x0 spll: 0x0
>[   14.709890] [drm:intel_dump_pipe_config] planes on this crtc
>[   14.709891] [drm:intel_dump_pipe_config] STANDARD PLANE:32 plane: 2.0 idx: 6 disabled, scaler_id = 0
>[   14.709893] [drm:intel_dump_pipe_config] CURSOR PLANE:33 plane: 2.3 idx: 7 disabled, scaler_id = 0
>[   14.709894] [drm:intel_dump_pipe_config] STANDARD PLANE:35 plane: 2.1 idx: 8 disabled, scaler_id = 0
>[   14.709896] [drm:intel_modeset_setup_hw_state] LCPLL 810 enabled but not in use, disabling
>[   14.709897] [drm:intel_modeset_setup_hw_state] LCPLL 2700 enabled but not in use, disabling
>[   14.709906] [drm:ironlake_get_initial_plane_config] pipe A with fb: size=1600x900@32, offset=0, pitch 6400, size 0x57e400
>[   14.709908] [drm:i915_gem_object_create_stolen_for_preallocated] creating preallocated stolen object: stolen_offset=0, gtt_offset=0, size=57f000
>[   14.709912] [drm:i915_pages_create_for_stolen] offset=0x0, size=5763072
>[   14.709915] [drm:intel_alloc_initial_plane_obj] initial plane fb obj ffff8800d90d0000
>[   14.709918] [drm:drm_atomic_state_init] Allocated atomic state ffff88040aa0a400
>[   14.709921] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d9594000 state to ffff88040aa0a400
>[   14.709922] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d9595800 state to ffff88040aa0a400
>[   14.709924] [drm:drm_atomic_get_crtc_state] Added [CRTC:34:crtc-2] ffff8800d9596000 state to ffff88040aa0a400
>[   14.709926] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane-0] ffff880036e9e300 state to ffff88040aa0a400
>[   14.709927] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff880036e9e780 state to ffff88040aa0a400
>[   14.709929] [drm:drm_atomic_get_plane_state] Added [PLANE:27:plane-2] ffff880036e9e840 state to ffff88040aa0a400
>[   14.709931] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane-3] ffff880036e9e900 state to ffff88040aa0a400
>[   14.709932] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff880036e9e9c0 state to ffff88040aa0a400
>[   14.709933] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane-5] ffff880036e9ea80 state to ffff88040aa0a400
>[   14.709935] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane-6] ffff880036e9eb40 state to ffff88040aa0a400
>[   14.709936] [drm:drm_atomic_get_plane_state] Added [PLANE:33:plane-7] ffff880036e9ec00 state to ffff88040aa0a400
>[   14.709938] [drm:drm_atomic_get_plane_state] Added [PLANE:35:plane-8] ffff880036e9ecc0 state to ffff88040aa0a400
>[   14.709940] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff88040a92af20 state to ffff88040aa0a400
>[   14.709942] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:36] ffff88040a92a3e0 state to ffff88040aa0a400
>[   14.709943] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:45] ffff88040a92a180 state to ffff88040aa0a400
>[   14.709944] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:49] ffff88040a92a560 state to ffff88040aa0a400
>[   14.709946] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:52] ffff88040a92a000 state to ffff88040aa0a400
>[   14.709948] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:56] ffff880036e91000 state to ffff88040aa0a400
>[   14.709949] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:58] ffff880036e91020 state to ffff88040aa0a400
>[   14.709951] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:62] ffff880036e91040 state to ffff88040aa0a400
>[   14.709953] [drm:update_connector_routing] Updating routing for [CONNECTOR:36:VGA-1]
>[   14.709954] [drm:update_connector_routing] Disabling [CONNECTOR:36:VGA-1]
>[   14.709956] [drm:update_connector_routing] Updating routing for [CONNECTOR:39:eDP-1]
>[   14.709957] [drm:update_connector_routing] [CONNECTOR:39:eDP-1] keeps [ENCODER:38:TMDS-38], now on [CRTC:26:crtc-0]
>[   14.709958] [drm:update_connector_routing] Updating routing for [CONNECTOR:45:DP-1]
>[   14.709959] [drm:update_connector_routing] Disabling [CONNECTOR:45:DP-1]
>[   14.709961] [drm:update_connector_routing] Updating routing for [CONNECTOR:49:HDMI-A-1]
>[   14.709962] [drm:update_connector_routing] Disabling [CONNECTOR:49:HDMI-A-1]
>[   14.709963] [drm:update_connector_routing] Updating routing for [CONNECTOR:52:DP-2]
>[   14.709964] [drm:update_connector_routing] Disabling [CONNECTOR:52:DP-2]
>[   14.709965] [drm:update_connector_routing] Updating routing for [CONNECTOR:56:HDMI-A-2]
>[   14.709966] [drm:update_connector_routing] Disabling [CONNECTOR:56:HDMI-A-2]
>[   14.709967] [drm:update_connector_routing] Updating routing for [CONNECTOR:58:DP-3]
>[   14.709968] [drm:update_connector_routing] Disabling [CONNECTOR:58:DP-3]
>[   14.709969] [drm:update_connector_routing] Updating routing for [CONNECTOR:62:HDMI-A-3]
>[   14.709970] [drm:update_connector_routing] Disabling [CONNECTOR:62:HDMI-A-3]
>[   14.709973] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:23] with fb 64
>[   14.709975] [drm:intel_plane_atomic_calc_changes] [PLANE:23] visible 1 -> 1, off 0, on 0, ms 0
>[   14.709984] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040aa0a400
>[   14.709987] [drm:drm_atomic_state_free] Freeing atomic state ffff88040aa0a400
>[   14.710050] [drm:i915_gem_setup_global_gtt] reserving preallocated space: 0 + 57f000
>[   14.710051] [drm:i915_gem_setup_global_gtt] clearing unused GTT space: [57f000, 7ffff000]
>[   14.711876] [drm:gen6_ppgtt_init] Allocated pde space (2M) at GTT entry: 7fdf0
>[   14.712513] [drm:i915_gem_context_init] HW context support initialized
>[   14.712519] [drm:init_status_page] render ring hws offset: 0x00590000
>[   14.712561] [drm:intel_init_pipe_control] render ring pipe control offset: 0x005b1000
>[   14.712567] [drm:init_status_page] bsd ring hws offset: 0x005b2000
>[   14.712609] [drm:init_status_page] blitter ring hws offset: 0x005d3000
>[   14.712640] [drm:init_status_page] video enhancement ring hws offset: 0x005f4000
>[   14.714492] [drm:intel_update_cdclk] Current CD clock rate: 540000 kHz
>[   14.714563] [drm:intel_backlight_device_register] Connector eDP-1 backlight sysfs interface registered
>[   14.714569] [drm:intel_fbdev_init_bios] found possible fb from plane A
>[   14.714571] [drm:intel_fbdev_init_bios] pipe B not active or no fb, skipping
>[   14.714572] [drm:intel_fbdev_init_bios] pipe C not active or no fb, skipping
>[   14.714573] [drm:intel_fbdev_init_bios] checking plane A for BIOS fb
>[   14.714575] [drm:intel_fbdev_init_bios] pipe A area: 1600x900, bpp: 32, size: 5760000
>[   14.714576] [drm:intel_fbdev_init_bios] fb big enough for plane A (5763072 >= 5760000)
>[   14.714577] [drm:intel_fbdev_init_bios] pipe B not active, skipping
>[   14.714578] [drm:intel_fbdev_init_bios] pipe C not active, skipping
>[   14.714579] [drm:intel_fbdev_init_bios] using BIOS fb for initial console
>[   14.714607] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1]
>[   14.714610] [drm:intel_dp_detect] [CONNECTOR:39:eDP-1]
>[   14.714651] [drm:intel_didl_outputs] 7 outputs detected
>[   14.714920] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[   14.715220] ACPI: Video Device [GFX0] (multi-head: yes  rom: no  post: no)
>[   14.715221] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   14.715465] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:00/input/input25
>[   14.715644] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1] status updated from unknown to connected
>[   14.715649] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1] probed modes :
>[   14.715652] [drm:drm_mode_debug_printmodeline] Modeline 65:"1366x768" 60 70000 1366 1402 1438 1476 768 772 780 790 0x8 0xa
>[   14.715654] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1]
>[   14.715655] [drm:intel_crt_detect] [CONNECTOR:36:VGA-1] force=1
>[   14.715659] [drm:intel_ironlake_crt_detect_hotplug] trigger hotplug detect cycle: adpa=0xf40000
>[   14.724185] [drm:intel_ironlake_crt_detect_hotplug] ironlake hotplug adpa=0xf40000, result 0
>[   14.724188] [drm:intel_crt_detect] CRT not detected via hotplug
>[   14.724351] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   14.724352] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK on first message, retry
>[   14.724528] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   14.724532] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   14.724533] [drm:intel_crt_get_edid] CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   14.724535] [drm:intel_gmbus_force_bit] enabling bit-banging on i915 gmbus vga. force bit now 1
>[   14.725270] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   14.725272] [drm:intel_gmbus_force_bit] disabling bit-banging on i915 gmbus vga. force bit now 0
>[   14.725273] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found]
>[   14.725275] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1] status updated from unknown to disconnected
>[   14.725278] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1] disconnected
>[   14.725280] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1]
>[   14.725282] [drm:intel_dp_detect] [CONNECTOR:45:DP-1]
>[   14.725285] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1] status updated from unknown to disconnected
>[   14.725286] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1] disconnected
>[   14.725288] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1]
>[   14.725289] [drm:intel_hdmi_detect] [CONNECTOR:49:HDMI-A-1]
>[   14.831051] [drm:intel_hdmi_detect] HDMI live status down
>[   14.831057] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1] status updated from unknown to disconnected
>[   14.831059] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1] disconnected
>[   14.831061] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2]
>[   14.831063] [drm:intel_dp_detect] [CONNECTOR:52:DP-2]
>[   14.833157] ieee80211 phy0: Selected rate control algorithm 'iwl-mvm-rs'
>[   14.834017] iwlwifi 0000:02:00.0 wlp2s0: renamed from wlan0
>[   14.836418] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.841814] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.847127] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.852501] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.857960] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.863339] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.868721] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.874075] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.879429] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.884766] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.890098] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.896165] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.901813] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.907103] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.912409] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.917876] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.924314] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.929656] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.935492] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.940855] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.946631] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.951996] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.957353] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.962812] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.968728] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.974065] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.979407] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.984763] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.990120] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   14.995504] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.000859] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.006760] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.006763] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   15.006767] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2] status updated from unknown to disconnected
>[   15.006769] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2] disconnected
>[   15.006771] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2]
>[   15.006772] [drm:intel_hdmi_detect] [CONNECTOR:56:HDMI-A-2]
>[   15.035235] [drm:intel_hdmi_dp_dual_mode_detect] DP dual mode adaptor (type 1 HDMI) detected (max TMDS clock: 165000 kHz)
>[   15.035240] [drm:drm_detect_monitor_audio] Monitor has basic audio support
>[   15.035242] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2] status updated from unknown to connected
>[   15.035301] [drm:drm_edid_to_eld] ELD monitor M230HDL
>[   15.035303] [drm:parse_hdmi_vsdb] HDMI: DVI dual 0, max TMDS clock 0, latency present 0 0, video latency 0 0, audio latency 0 0
>[   15.035305] [drm:drm_edid_to_eld] ELD size 32, SAD count 1
>[   15.035329] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2] probed modes :
>[   15.035332] [drm:drm_mode_debug_printmodeline] Modeline 67:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0xa
>[   15.035334] [drm:drm_mode_debug_printmodeline] Modeline 98:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   15.035336] [drm:drm_mode_debug_printmodeline] Modeline 107:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   15.035338] [drm:drm_mode_debug_printmodeline] Modeline 96:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   15.035340] [drm:drm_mode_debug_printmodeline] Modeline 106:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   15.035342] [drm:drm_mode_debug_printmodeline] Modeline 99:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   15.035344] [drm:drm_mode_debug_printmodeline] Modeline 69:"1920x1080" 50 148350 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   15.035346] [drm:drm_mode_debug_printmodeline] Modeline 70:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   15.035347] [drm:drm_mode_debug_printmodeline] Modeline 74:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   15.035349] [drm:drm_mode_debug_printmodeline] Modeline 83:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   15.035351] [drm:drm_mode_debug_printmodeline] Modeline 75:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   15.035353] [drm:drm_mode_debug_printmodeline] Modeline 73:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[   15.035355] [drm:drm_mode_debug_printmodeline] Modeline 68:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   15.035357] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   15.035359] [drm:drm_mode_debug_printmodeline] Modeline 71:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   15.035360] [drm:drm_mode_debug_printmodeline] Modeline 84:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   15.035362] [drm:drm_mode_debug_printmodeline] Modeline 85:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   15.035364] [drm:drm_mode_debug_printmodeline] Modeline 86:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   15.035366] [drm:drm_mode_debug_printmodeline] Modeline 87:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   15.035368] [drm:drm_mode_debug_printmodeline] Modeline 88:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   15.035369] [drm:drm_mode_debug_printmodeline] Modeline 76:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   15.035371] [drm:drm_mode_debug_printmodeline] Modeline 77:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[   15.035373] [drm:drm_mode_debug_printmodeline] Modeline 72:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   15.035375] [drm:drm_mode_debug_printmodeline] Modeline 92:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   15.035377] [drm:drm_mode_debug_printmodeline] Modeline 103:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   15.035378] [drm:drm_mode_debug_printmodeline] Modeline 90:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   15.035380] [drm:drm_mode_debug_printmodeline] Modeline 78:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   15.035382] [drm:drm_mode_debug_printmodeline] Modeline 79:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   15.035384] [drm:drm_mode_debug_printmodeline] Modeline 80:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   15.035386] [drm:drm_mode_debug_printmodeline] Modeline 101:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   15.035387] [drm:drm_mode_debug_printmodeline] Modeline 81:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   15.035389] [drm:drm_mode_debug_printmodeline] Modeline 82:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   15.035391] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3]
>[   15.035393] [drm:intel_dp_detect] [CONNECTOR:58:DP-3]
>[   15.035402] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3] status updated from unknown to disconnected
>[   15.035403] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3] disconnected
>[   15.035404] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3]
>[   15.035405] [drm:intel_hdmi_detect] [CONNECTOR:62:HDMI-A-3]
>[   15.105169] IPv6: ADDRCONF(NETDEV_UP): enp0s25: link is not ready
>[   15.141076] [drm:intel_hdmi_detect] HDMI live status down
>[   15.141082] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3] status updated from unknown to disconnected
>[   15.141084] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3] disconnected
>[   15.141089] [drm:drm_setup_crtcs] 
>[   15.141091] [drm:drm_enable_connectors] connector 39 enabled? yes
>[   15.141092] [drm:drm_enable_connectors] connector 36 enabled? no
>[   15.141093] [drm:drm_enable_connectors] connector 45 enabled? no
>[   15.141094] [drm:drm_enable_connectors] connector 49 enabled? no
>[   15.141096] [drm:drm_enable_connectors] connector 52 enabled? no
>[   15.141097] [drm:drm_enable_connectors] connector 56 enabled? yes
>[   15.141098] [drm:drm_enable_connectors] connector 58 enabled? no
>[   15.141099] [drm:drm_enable_connectors] connector 62 enabled? no
>[   15.141102] [drm:intel_fb_initial_config] looking for cmdline mode on connector eDP-1
>[   15.141103] [drm:intel_fb_initial_config] looking for preferred mode on connector eDP-1 0
>[   15.141105] [drm:intel_fb_initial_config] connector eDP-1 on pipe A [CRTC:26]: 1366x768
>[   15.141107] [drm:intel_fb_initial_config] connector VGA-1 not enabled, skipping
>[   15.141108] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping
>[   15.141109] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping
>[   15.141110] [drm:intel_fb_initial_config] connector DP-2 not enabled, skipping
>[   15.141112] [drm:intel_fb_initial_config] connector HDMI-A-2 has no encoder or crtc, skipping
>[   15.141113] [drm:intel_fb_initial_config] connector DP-3 not enabled, skipping
>[   15.141114] [drm:intel_fb_initial_config] connector HDMI-A-3 not enabled, skipping
>[   15.141115] [drm:intel_fb_initial_config] fallback: Not all outputs enabled
>[   15.141116] [drm:intel_fb_initial_config] Enabled: 1, detected: 2
>[   15.141168] snd_hda_intel 0000:00:03.0: bound 0000:00:02.0 (ops i915_audio_component_bind_ops [i915])
>[   15.141169] [drm:intel_fb_initial_config] Not using firmware configuration
>[   15.141171] [drm:drm_target_preferred] looking for cmdline mode on connector 39
>[   15.141173] [drm:drm_target_preferred] looking for preferred mode on connector 39 0
>[   15.141174] [drm:drm_target_preferred] found mode 1366x768
>[   15.141175] [drm:drm_target_preferred] looking for cmdline mode on connector 56
>[   15.141176] [drm:drm_target_preferred] looking for preferred mode on connector 56 0
>[   15.141178] [drm:drm_target_preferred] found mode 1920x1080
>[   15.141179] [drm:drm_setup_crtcs] picking CRTCs for 8192x8192 config
>[   15.141182] [drm:drm_setup_crtcs] desired mode 1366x768 set on crtc 26 (0,0)
>[   15.141185] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 30 (0,0)
>[   15.141187] [drm] Initialized i915 1.6.0 20160425 for 0000:00:02.0 on minor 0
>[   15.141190] [drm:intelfb_create] re-using BIOS fb
>[   15.141195] [drm:i915_gem_open] 
>[   15.141220] [drm:intelfb_create] allocated 1600x900 fb: 0x00000000, bo ffff8800d90d0000
>[   15.141261] [drm:drm_atomic_state_init] Allocated atomic state ffff880409649c00
>[   15.141264] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane-0] ffff88040ad31a80 state to ffff880409649c00
>[   15.141266] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d96bf800 state to ffff880409649c00
>[   15.141268] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff88040ad31300 state to ffff880409649c00
>[   15.141269] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88040ad31300 to [NOCRTC]
>[   15.141271] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88040ad31300
>[   15.141272] [drm:drm_atomic_get_plane_state] Added [PLANE:27:plane-2] ffff88040ad31cc0 state to ffff880409649c00
>[   15.141273] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88040ad31cc0 to [NOCRTC]
>[   15.141274] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88040ad31cc0
>[   15.141276] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane-3] ffff88040ad31240 state to ffff880409649c00
>[   15.141278] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff88040ad31e40 state to ffff880409649c00
>[   15.141279] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88040ad31e40 to [NOCRTC]
>[   15.141280] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88040ad31e40
>[   15.141282] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane-5] ffff8804017dc0c0 state to ffff880409649c00
>[   15.141283] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804017dc0c0 to [NOCRTC]
>[   15.141285] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8804017dc0c0
>[   15.141288] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane-6] ffff8804017dcf00 state to ffff880409649c00
>[   15.141290] [drm:drm_atomic_get_plane_state] Added [PLANE:33:plane-7] ffff8804017dcd80 state to ffff880409649c00
>[   15.141292] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804017dcd80 to [NOCRTC]
>[   15.141294] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8804017dcd80
>[   15.141297] [drm:drm_atomic_get_plane_state] Added [PLANE:35:plane-8] ffff8804017dce40 state to ffff880409649c00
>[   15.141299] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804017dce40 to [NOCRTC]
>[   15.141301] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8804017dce40
>[   15.141305] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1366x768] for CRTC state ffff8800d96bf800
>[   15.141307] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88040ad31a80 to [CRTC:26:crtc-0]
>[   15.141310] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff88040ad31a80
>[   15.141315] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:26:crtc-0] to ffff880409649c00
>[   15.141316] fbcon: inteldrmfb (fb0) is primary device
>[   15.141317] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff8804031ce2a0 state to ffff880409649c00
>[   15.141318] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8804031ce2a0 to [NOCRTC]
>[   15.141320] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8804031ce2a0 to [CRTC:26:crtc-0]
>[   15.141322] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d96bf000 state to ffff880409649c00
>[   15.141324] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff8800d96bf000
>[   15.141325] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88040ad31240 to [CRTC:30:crtc-1]
>[   15.141326] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff88040ad31240
>[   15.141327] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff880409649c00
>[   15.141329] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:56] ffff8804031ce2c0 state to ffff880409649c00
>[   15.141330] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8804031ce2c0 to [CRTC:30:crtc-1]
>[   15.141332] [drm:drm_atomic_get_crtc_state] Added [CRTC:34:crtc-2] ffff8800d96be800 state to ffff880409649c00
>[   15.141333] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff8800d96be800
>[   15.141334] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804017dcf00 to [NOCRTC]
>[   15.141335] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8804017dcf00
>[   15.141336] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:34:crtc-2] to ffff880409649c00
>[   15.141337] [drm:drm_atomic_check_only] checking ffff880409649c00
>[   15.141340] [drm:drm_atomic_plane_check] Invalid source coordinates 1920.000000x1080.000000+0.000000+0.000000
>[   15.141341] [drm:drm_atomic_check_only] [PLANE:28:plane-3] atomic core check failed
>[   15.141343] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880409649c00
>[   15.141347] [drm:drm_atomic_state_free] Freeing atomic state ffff880409649c00
>[   15.141349] [drm:drm_fb_helper_hotplug_event] 
>[   15.141350] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1]
>[   15.141352] [drm:intel_dp_detect] [CONNECTOR:39:eDP-1]
>[   15.141688] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[   15.142006] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   15.142359] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1] probed modes :
>[   15.142362] [drm:drm_mode_debug_printmodeline] Modeline 65:"1366x768" 60 70000 1366 1402 1438 1476 768 772 780 790 0x8 0xa
>[   15.142364] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1]
>[   15.142366] [drm:intel_crt_detect] [CONNECTOR:36:VGA-1] force=1
>[   15.142374] [drm:intel_ironlake_crt_detect_hotplug] ironlake hotplug adpa=0xf40000, result 0
>[   15.142375] [drm:intel_crt_detect] CRT not detected via hotplug
>[   15.142547] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   15.142548] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK on first message, retry
>[   15.142718] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   15.142719] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   15.142720] [drm:intel_crt_get_edid] CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   15.142722] [drm:intel_gmbus_force_bit] enabling bit-banging on i915 gmbus vga. force bit now 1
>[   15.143723] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   15.143724] [drm:intel_gmbus_force_bit] disabling bit-banging on i915 gmbus vga. force bit now 0
>[   15.143724] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found]
>[   15.143725] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1] disconnected
>[   15.143726] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1]
>[   15.143727] [drm:intel_dp_detect] [CONNECTOR:45:DP-1]
>[   15.143735] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1] disconnected
>[   15.143735] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1]
>[   15.143736] [drm:intel_hdmi_detect] [CONNECTOR:49:HDMI-A-1]
>[   15.247758] [drm:intel_hdmi_detect] HDMI live status down
>[   15.247762] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1] disconnected
>[   15.247764] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2]
>[   15.247765] [drm:intel_dp_detect] [CONNECTOR:52:DP-2]
>[   15.253168] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.258540] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.264241] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.269688] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.275057] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.280705] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.286512] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.291875] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.297675] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.303497] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.308865] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.311204] IPv6: ADDRCONF(NETDEV_UP): enp0s25: link is not ready
>[   15.314670] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.318136] IPv6: ADDRCONF(NETDEV_UP): wlp2s0: link is not ready
>[   15.320244] iwlwifi 0000:02:00.0: L1 Enabled - LTR Enabled
>[   15.320506] iwlwifi 0000:02:00.0: L1 Enabled - LTR Enabled
>[   15.320540] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.325914] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.331698] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.337506] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.342862] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.348221] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.353598] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.358963] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.364559] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.369920] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.375534] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.381063] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.386423] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.391971] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.397570] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.402931] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.408385] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.414064] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.419431] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.424802] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   15.424804] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   15.424806] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2] disconnected
>[   15.424808] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2]
>[   15.424811] [drm:intel_hdmi_detect] [CONNECTOR:56:HDMI-A-2]
>[   15.453213] [drm:intel_hdmi_dp_dual_mode_detect] DP dual mode adaptor (type 1 HDMI) detected (max TMDS clock: 165000 kHz)
>[   15.453215] [drm:drm_detect_monitor_audio] Monitor has basic audio support
>[   15.453293] [drm:drm_edid_to_eld] ELD monitor M230HDL
>[   15.453296] [drm:parse_hdmi_vsdb] HDMI: DVI dual 0, max TMDS clock 0, latency present 0 0, video latency 0 0, audio latency 0 0
>[   15.453297] [drm:drm_edid_to_eld] ELD size 32, SAD count 1
>[   15.453334] [drm:drm_mode_debug_printmodeline] Modeline 67:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0xa
>[   15.453335] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: VIRTUAL_X
>[   15.453338] [drm:drm_mode_debug_printmodeline] Modeline 98:"1920x1080" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   15.453339] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: VIRTUAL_X
>[   15.453342] [drm:drm_mode_debug_printmodeline] Modeline 107:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   15.453343] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: VIRTUAL_X
>[   15.453345] [drm:drm_mode_debug_printmodeline] Modeline 96:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   15.453346] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: VIRTUAL_X
>[   15.453349] [drm:drm_mode_debug_printmodeline] Modeline 106:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   15.453349] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: VIRTUAL_X
>[   15.453352] [drm:drm_mode_debug_printmodeline] Modeline 99:"1920x1080" 0 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   15.453353] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: VIRTUAL_X
>[   15.453355] [drm:drm_mode_debug_printmodeline] Modeline 69:"1920x1080" 50 148350 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   15.453356] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: VIRTUAL_X
>[   15.453359] [drm:drm_mode_debug_printmodeline] Modeline 70:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   15.453359] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: VIRTUAL_X
>[   15.453362] [drm:drm_mode_debug_printmodeline] Modeline 74:"1680x1050" 0 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   15.453363] [drm:drm_mode_prune_invalid] Not using 1680x1050 mode: VIRTUAL_X
>[   15.453365] [drm:drm_mode_debug_printmodeline] Modeline 83:"1280x1024" 0 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   15.453366] [drm:drm_mode_prune_invalid] Not using 1280x1024 mode: VIRTUAL_Y
>[   15.453368] [drm:drm_mode_debug_printmodeline] Modeline 75:"1280x1024" 0 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   15.453369] [drm:drm_mode_prune_invalid] Not using 1280x1024 mode: VIRTUAL_Y
>[   15.453373] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2] probed modes :
>[   15.453375] [drm:drm_mode_debug_printmodeline] Modeline 73:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[   15.453377] [drm:drm_mode_debug_printmodeline] Modeline 68:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   15.453379] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   15.453381] [drm:drm_mode_debug_printmodeline] Modeline 71:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   15.453383] [drm:drm_mode_debug_printmodeline] Modeline 84:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   15.453385] [drm:drm_mode_debug_printmodeline] Modeline 85:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   15.453388] [drm:drm_mode_debug_printmodeline] Modeline 86:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   15.453390] [drm:drm_mode_debug_printmodeline] Modeline 87:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   15.453393] [drm:drm_mode_debug_printmodeline] Modeline 88:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   15.453395] [drm:drm_mode_debug_printmodeline] Modeline 76:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   15.453397] [drm:drm_mode_debug_printmodeline] Modeline 77:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[   15.453400] [drm:drm_mode_debug_printmodeline] Modeline 72:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   15.453402] [drm:drm_mode_debug_printmodeline] Modeline 92:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   15.453404] [drm:drm_mode_debug_printmodeline] Modeline 103:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   15.453407] [drm:drm_mode_debug_printmodeline] Modeline 90:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   15.453409] [drm:drm_mode_debug_printmodeline] Modeline 78:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   15.453412] [drm:drm_mode_debug_printmodeline] Modeline 79:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   15.453414] [drm:drm_mode_debug_printmodeline] Modeline 80:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   15.453416] [drm:drm_mode_debug_printmodeline] Modeline 101:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   15.453419] [drm:drm_mode_debug_printmodeline] Modeline 81:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   15.453421] [drm:drm_mode_debug_printmodeline] Modeline 82:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   15.453423] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3]
>[   15.453424] [drm:intel_dp_detect] [CONNECTOR:58:DP-3]
>[   15.453436] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3] disconnected
>[   15.453437] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3]
>[   15.453438] [drm:intel_hdmi_detect] [CONNECTOR:62:HDMI-A-3]
>[   15.513917] iwlwifi 0000:02:00.0: L1 Enabled - LTR Enabled
>[   15.514203] iwlwifi 0000:02:00.0: L1 Enabled - LTR Enabled
>[   15.529611] IPv6: ADDRCONF(NETDEV_UP): wlp2s0: link is not ready
>[   15.557726] [drm:intel_hdmi_detect] HDMI live status down
>[   15.557729] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3] disconnected
>[   15.557735] [drm:drm_setup_crtcs] 
>[   15.557736] [drm:drm_enable_connectors] connector 39 enabled? yes
>[   15.557737] [drm:drm_enable_connectors] connector 36 enabled? no
>[   15.557738] [drm:drm_enable_connectors] connector 45 enabled? no
>[   15.557738] [drm:drm_enable_connectors] connector 49 enabled? no
>[   15.557739] [drm:drm_enable_connectors] connector 52 enabled? no
>[   15.557739] [drm:drm_enable_connectors] connector 56 enabled? yes
>[   15.557740] [drm:drm_enable_connectors] connector 58 enabled? no
>[   15.557740] [drm:drm_enable_connectors] connector 62 enabled? no
>[   15.557742] [drm:intel_fb_initial_config] looking for cmdline mode on connector eDP-1
>[   15.557743] [drm:intel_fb_initial_config] looking for preferred mode on connector eDP-1 0
>[   15.557745] [drm:intel_fb_initial_config] connector eDP-1 on pipe A [CRTC:26]: 1366x768
>[   15.557745] [drm:intel_fb_initial_config] connector VGA-1 not enabled, skipping
>[   15.557746] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping
>[   15.557747] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping
>[   15.557747] [drm:intel_fb_initial_config] connector DP-2 not enabled, skipping
>[   15.557748] [drm:intel_fb_initial_config] connector HDMI-A-2 has no encoder or crtc, skipping
>[   15.557748] [drm:intel_fb_initial_config] connector DP-3 not enabled, skipping
>[   15.557749] [drm:intel_fb_initial_config] connector HDMI-A-3 not enabled, skipping
>[   15.557749] [drm:intel_fb_initial_config] fallback: Not all outputs enabled
>[   15.557750] [drm:intel_fb_initial_config] Enabled: 1, detected: 2
>[   15.557750] [drm:intel_fb_initial_config] Not using firmware configuration
>[   15.557751] [drm:drm_target_preferred] looking for cmdline mode on connector 39
>[   15.557752] [drm:drm_target_preferred] looking for preferred mode on connector 39 0
>[   15.557753] [drm:drm_target_preferred] found mode 1366x768
>[   15.557753] [drm:drm_target_preferred] looking for cmdline mode on connector 56
>[   15.557754] [drm:drm_target_preferred] looking for preferred mode on connector 56 0
>[   15.557756] [drm:drm_target_preferred] found mode 1152x864
>[   15.557756] [drm:drm_setup_crtcs] picking CRTCs for 8192x8192 config
>[   15.557759] [drm:drm_setup_crtcs] desired mode 1366x768 set on crtc 26 (0,0)
>[   15.557762] [drm:drm_setup_crtcs] desired mode 1152x864 set on crtc 30 (0,0)
>[   15.557766] [drm:drm_atomic_state_init] Allocated atomic state ffff88003712f400
>[   15.557768] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane-0] ffff8800cd557d80 state to ffff88003712f400
>[   15.557771] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8804052b6800 state to ffff88003712f400
>[   15.557772] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd557e40 state to ffff88003712f400
>[   15.557773] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd557e40 to [NOCRTC]
>[   15.557773] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800cd557e40
>[   15.557775] [drm:drm_atomic_get_plane_state] Added [PLANE:27:plane-2] ffff8800cd557900 state to ffff88003712f400
>[   15.557775] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd557900 to [NOCRTC]
>[   15.557776] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800cd557900
>[   15.557777] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane-3] ffff8800cd5579c0 state to ffff88003712f400
>[   15.557778] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd557a80 state to ffff88003712f400
>[   15.557778] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd557a80 to [NOCRTC]
>[   15.557779] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800cd557a80
>[   15.557780] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane-5] ffff8800cd557cc0 state to ffff88003712f400
>[   15.557780] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd557cc0 to [NOCRTC]
>[   15.557781] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800cd557cc0
>[   15.557782] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane-6] ffff8800cd557c00 state to ffff88003712f400
>[   15.557783] [drm:drm_atomic_get_plane_state] Added [PLANE:33:plane-7] ffff8800cd5573c0 state to ffff88003712f400
>[   15.557784] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd5573c0 to [NOCRTC]
>[   15.557784] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800cd5573c0
>[   15.557785] [drm:drm_atomic_get_plane_state] Added [PLANE:35:plane-8] ffff8800cd557000 state to ffff88003712f400
>[   15.557786] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd557000 to [NOCRTC]
>[   15.557786] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800cd557000
>[   15.557788] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1366x768] for CRTC state ffff8804052b6800
>[   15.557789] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd557d80 to [CRTC:26:crtc-0]
>[   15.557790] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800cd557d80
>[   15.557791] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:26:crtc-0] to ffff88003712f400
>[   15.557792] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff8804048c5b40 state to ffff88003712f400
>[   15.557793] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8804048c5b40 to [NOCRTC]
>[   15.557794] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8804048c5b40 to [CRTC:26:crtc-0]
>[   15.557795] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8804052b7000 state to ffff88003712f400
>[   15.557798] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1152x864] for CRTC state ffff8804052b7000
>[   15.557799] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd5579c0 to [CRTC:30:crtc-1]
>[   15.557799] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800cd5579c0
>[   15.557800] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff88003712f400
>[   15.557801] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:56] ffff8804048c5b60 state to ffff88003712f400
>[   15.557802] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8804048c5b60 to [CRTC:30:crtc-1]
>[   15.557803] [drm:drm_atomic_get_crtc_state] Added [CRTC:34:crtc-2] ffff8804052b7800 state to ffff88003712f400
>[   15.557804] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff8804052b7800
>[   15.557804] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd557c00 to [NOCRTC]
>[   15.557805] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800cd557c00
>[   15.557805] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:34:crtc-2] to ffff88003712f400
>[   15.557806] [drm:drm_atomic_check_only] checking ffff88003712f400
>[   15.557808] [drm:drm_atomic_helper_check_modeset] [CRTC:26:crtc-0] mode changed
>[   15.557809] [drm:drm_atomic_helper_check_modeset] [CRTC:30:crtc-1] mode changed
>[   15.557809] [drm:drm_atomic_helper_check_modeset] [CRTC:30:crtc-1] enable changed
>[   15.557812] [drm:update_connector_routing] Updating routing for [CONNECTOR:39:eDP-1]
>[   15.557813] [drm:update_connector_routing] [CONNECTOR:39:eDP-1] keeps [ENCODER:38:TMDS-38], now on [CRTC:26:crtc-0]
>[   15.557813] [drm:update_connector_routing] Updating routing for [CONNECTOR:56:HDMI-A-2]
>[   15.557815] [drm:update_connector_routing] [CONNECTOR:56:HDMI-A-2] using [ENCODER:51:TMDS-51] on [CRTC:30:crtc-1]
>[   15.557815] [drm:drm_atomic_helper_check_modeset] [CRTC:26:crtc-0] needs all connectors, enable: y, active: y
>[   15.557816] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:26:crtc-0] to ffff88003712f400
>[   15.557817] [drm:drm_atomic_helper_check_modeset] [CRTC:30:crtc-1] active changed
>[   15.557818] [drm:drm_atomic_helper_check_modeset] [CRTC:30:crtc-1] needs all connectors, enable: y, active: y
>[   15.557819] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff88003712f400
>[   15.557820] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:26:crtc-0] to ffff88003712f400
>[   15.557822] [drm:connected_sink_compute_bpp] [CONNECTOR:39:eDP-1] checking for sink bpp constrains
>[   15.557823] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to default limit of 18
>[   15.557825] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 70000KHz
>[   15.557827] [drm:intel_dp_compute_config] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[   15.557828] [drm:intel_dp_compute_config] DP link bw required 126000 available 432000
>[   15.557829] [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[   15.557831] [drm:intel_dump_pipe_config] [CRTC:26][modeset] config ffff8804052b6800 for pipe A
>[   15.557831] [drm:intel_dump_pipe_config] cpu_transcoder: EDP
>[   15.557832] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[   15.557833] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   15.557834] [drm:intel_dump_pipe_config] dp: 1, lanes: 2, gmch_m: 2446677, gmch_n: 8388608, link_m: 135926, link_n: 524288, tu: 64
>[   15.557835] [drm:intel_dump_pipe_config] dp: 1, lanes: 2, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   15.557836] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   15.557836] [drm:intel_dump_pipe_config] requested mode:
>[   15.557838] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 70000 1366 1402 1438 1476 768 772 780 790 0x8 0xa
>[   15.557838] [drm:intel_dump_pipe_config] adjusted mode:
>[   15.557840] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 0 70000 1366 1402 1438 1476 768 772 780 790 0x8 0xa
>[   15.557841] [drm:intel_dump_crtc_timings] crtc timings: 70000 1366 1402 1438 1476 768 772 780 790, type: 0x8 flags: 0xa
>[   15.557842] [drm:intel_dump_pipe_config] port clock: 270000
>[   15.557842] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[   15.557843] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[   15.557844] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   15.557844] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   15.557845] [drm:intel_dump_pipe_config] ips: 0
>[   15.557845] [drm:intel_dump_pipe_config] double wide: 0
>[   15.557846] [drm:intel_dump_pipe_config] ddi_pll_sel: 0x20000000; dpll_hw_state: wrpll: 0x0 spll: 0x0
>[   15.557846] [drm:intel_dump_pipe_config] planes on this crtc
>[   15.557848] [drm:intel_dump_pipe_config] STANDARD PLANE:23 plane: 0.0 idx: 0 enabled
>[   15.557850] [drm:intel_dump_pipe_config] 	FB:64, fb = 1600x900 format = 0x34325258
>[   15.557850] [drm:intel_dump_pipe_config] 	scaler:0 src (0, 0) 1600x900 dst (0, 0) 1600x900
>[   15.557851] [drm:intel_dump_pipe_config] CURSOR PLANE:25 plane: 0.1 idx: 1 disabled, scaler_id = 0
>[   15.557852] [drm:intel_dump_pipe_config] STANDARD PLANE:27 plane: 0.1 idx: 2 disabled, scaler_id = 0
>[   15.557853] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff88003712f400
>[   15.557854] [drm:connected_sink_compute_bpp] [CONNECTOR:56:HDMI-A-2] checking for sink bpp constrains
>[   15.557854] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to EDID reported max of 24
>[   15.557858] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[   15.557859] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[   15.557860] [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[   15.557861] [drm:intel_dump_pipe_config] [CRTC:30][modeset] config ffff8804052b7000 for pipe B
>[   15.557861] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   15.557862] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   15.557863] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   15.557864] [drm:intel_dump_pipe_config] dp: 0, lanes: 4, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   15.557864] [drm:intel_dump_pipe_config] dp: 0, lanes: 4, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   15.557865] [drm:intel_dump_pipe_config] audio: 1, infoframes: 1
>[   15.557865] [drm:intel_dump_pipe_config] requested mode:
>[   15.557867] [drm:drm_mode_debug_printmodeline] Modeline 0:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[   15.557867] [drm:intel_dump_pipe_config] adjusted mode:
>[   15.557868] [drm:drm_mode_debug_printmodeline] Modeline 0:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[   15.557870] [drm:intel_dump_crtc_timings] crtc timings: 108000 1152 1216 1344 1600 864 865 868 900, type: 0x40 flags: 0x5
>[   15.557870] [drm:intel_dump_pipe_config] port clock: 108000
>[   15.557871] [drm:intel_dump_pipe_config] pipe src size: 1152x864
>[   15.557871] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[   15.557872] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   15.557873] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   15.557873] [drm:intel_dump_pipe_config] ips: 0
>[   15.557874] [drm:intel_dump_pipe_config] double wide: 0
>[   15.557874] [drm:intel_dump_pipe_config] ddi_pll_sel: 0x0; dpll_hw_state: wrpll: 0x0 spll: 0x0
>[   15.557875] [drm:intel_dump_pipe_config] planes on this crtc
>[   15.557876] [drm:intel_dump_pipe_config] STANDARD PLANE:28 plane: 1.0 idx: 3 disabled, scaler_id = 0
>[   15.557876] [drm:intel_dump_pipe_config] CURSOR PLANE:29 plane: 1.2 idx: 4 disabled, scaler_id = 0
>[   15.557877] [drm:intel_dump_pipe_config] STANDARD PLANE:31 plane: 1.1 idx: 5 disabled, scaler_id = 0
>[   15.557880] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:23] with fb 64
>[   15.557881] [drm:intel_plane_atomic_calc_changes] [PLANE:23] visible 1 -> 1, off 1, on 1, ms 1
>[   15.557882] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:28] with fb 64
>[   15.557883] [drm:intel_plane_atomic_calc_changes] [PLANE:28] visible 0 -> 1, off 0, on 1, ms 1
>[   15.557885] [drm:intel_reference_shared_dpll] using LCPLL 1350 for pipe A
>[   15.559091] [drm:intel_find_shared_dpll] CRTC:30 allocated WRPLL 1
>[   15.559092] [drm:intel_reference_shared_dpll] using WRPLL 1 for pipe B
>[   15.559098] [drm:drm_atomic_commit] commiting ffff88003712f400
>[   15.569394] [drm:intel_edp_backlight_off] 
>[   15.625809] IPv6: ADDRCONF(NETDEV_UP): wlp2s0: link is not ready
>[   15.719593] psmouse serio2: synaptics: queried max coordinates: x [..5680], y [..4730]
>[   15.791053] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[   15.791062] [drm:lpt_disable_backlight] cpu backlight was enabled, disabling
>[   15.791070] [drm:intel_disable_pipe] disabling pipe A
>[   15.803682] [drm:edp_panel_off] Turn eDP port A panel power off
>[   15.803686] [drm:wait_panel_off] Wait for panel power off time
>[   15.803689] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[   15.811640] psmouse serio2: synaptics: queried min coordinates: x [1354..], y [1280..]
>[   15.904363] [drm:wait_panel_status] Wait complete
>[   15.904371] [drm:intel_disable_shared_dpll] disable LCPLL 1350 (active 1, on? 1) for crtc 26
>[   15.904372] [drm:intel_disable_shared_dpll] disabling LCPLL 1350
>[   15.904380] [drm:verify_encoder_state] [ENCODER:37:DAC-37]
>[   15.904383] [drm:verify_encoder_state] [ENCODER:38:TMDS-38]
>[   15.904383] [drm:verify_encoder_state] [ENCODER:44:TMDS-44]
>[   15.904384] [drm:verify_encoder_state] [ENCODER:46:DP MST-46]
>[   15.904385] [drm:verify_encoder_state] [ENCODER:47:DP MST-47]
>[   15.904386] [drm:verify_encoder_state] [ENCODER:48:DP MST-48]
>[   15.904387] [drm:verify_encoder_state] [ENCODER:51:TMDS-51]
>[   15.904387] [drm:verify_encoder_state] [ENCODER:53:DP MST-53]
>[   15.904388] [drm:verify_encoder_state] [ENCODER:54:DP MST-54]
>[   15.904388] [drm:verify_encoder_state] [ENCODER:55:DP MST-55]
>[   15.904389] [drm:verify_encoder_state] [ENCODER:57:TMDS-57]
>[   15.904390] [drm:verify_encoder_state] [ENCODER:59:DP MST-59]
>[   15.904390] [drm:verify_encoder_state] [ENCODER:60:DP MST-60]
>[   15.904391] [drm:verify_encoder_state] [ENCODER:61:DP MST-61]
>[   15.904392] [drm:intel_connector_verify_state] [CONNECTOR:36:VGA-1]
>[   15.904393] [drm:intel_connector_verify_state] [CONNECTOR:45:DP-1]
>[   15.904394] [drm:intel_connector_verify_state] [CONNECTOR:49:HDMI-A-1]
>[   15.904395] [drm:intel_connector_verify_state] [CONNECTOR:52:DP-2]
>[   15.904396] [drm:intel_connector_verify_state] [CONNECTOR:58:DP-3]
>[   15.904397] [drm:intel_connector_verify_state] [CONNECTOR:62:HDMI-A-3]
>[   15.904399] [drm:verify_single_dpll_state] WRPLL 1
>[   15.904400] [drm:verify_single_dpll_state] WRPLL 2
>[   15.904401] [drm:verify_single_dpll_state] SPLL
>[   15.904402] [drm:verify_single_dpll_state] LCPLL 810
>[   15.904402] [drm:verify_single_dpll_state] LCPLL 1350
>[   15.904403] [drm:verify_single_dpll_state] LCPLL 2700
>[   15.904404] [drm:intel_enable_shared_dpll] enable LCPLL 1350 (active 1, on? 0) for crtc 26
>[   15.904404] [drm:intel_enable_shared_dpll] enabling LCPLL 1350
>[   15.904413] [drm:edp_panel_on] Turn eDP port A panel power on
>[   15.904420] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   15.996734] psmouse serio2: synaptics: Touchpad model: 1, fw: 8.1, id: 0x1e2b1, caps: 0xd001a3/0x940300/0x126800/0x0, board id: 2720, fw id: 1450125
>[   15.996742] psmouse serio2: synaptics: serio: Synaptics pass-through port at isa0060/serio2/input0
>[   16.123280] input: SynPS/2 Synaptics TouchPad as /devices/platform/i8042/serio2/input/input15
>[   16.339852] [drm:intel_print_rc6_info] Enabling RC6 states: RC6 on
>[   16.343055] [drm:gen6_enable_rps] Overclocking supported. Max: 1150MHz, Overclock max: 1150MHz
>[   16.607755] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control abcd0000
>[   16.668086] [drm:wait_panel_status] Wait complete
>[   16.668098] [drm:wait_panel_on] Wait for panel power on
>[   16.668105] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[   16.781153] [drm:wait_panel_status] Wait complete
>[   16.781166] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   16.781174] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[   16.782300] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[   16.782302] [drm:intel_dp_set_signal_levels] Using vswing level 0
>[   16.782303] [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0
>[   16.782933] [drm:intel_dp_link_training_clock_recovery] clock recovery OK
>[   16.783855] [drm:intel_dp_link_training_channel_equalization] Channel EQ done. DP Training successful
>[   16.783917] [drm:intel_enable_pipe] enabling pipe A
>[   16.784083] [drm:intel_edp_backlight_on] 
>[   16.784085] [drm:intel_panel_enable_backlight] pipe A
>[   16.784096] [drm:intel_panel_actually_set_backlight] set backlight PWM = 5022
>[   16.787682] [drm:intel_psr_enable] PSR not supported by this panel
>[   16.787683] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[   16.787700] [drm:intel_enable_shared_dpll] enable WRPLL 1 (active 2, on? 0) for crtc 30
>[   16.787701] [drm:intel_enable_shared_dpll] enabling WRPLL 1
>[   16.787804] [drm:intel_enable_pipe] enabling pipe B
>[   16.788168] [drm:intel_audio_codec_enable] ELD on [CONNECTOR:56:HDMI-A-2], [ENCODER:51:TMDS-51]
>[   16.788170] [drm:hsw_audio_codec_enable] Enable audio codec on pipe B, 32 bytes ELD
>[   16.788175] [drm:audio_config_hdmi_pixel_clock] HDMI audio pixel clock setting for 108000 not found, falling back to defaults
>[   16.788176] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[   16.801444] e1000e: enp0s25 NIC Link is Up 100 Mbps Full Duplex, Flow Control: Rx/Tx
>[   16.801447] e1000e 0000:00:19.0 enp0s25: 10/100 speed: disabling TSO
>[   16.801484] IPv6: ADDRCONF(NETDEV_CHANGE): enp0s25: link becomes ready
>[   16.834038] [drm:intel_connector_verify_state] [CONNECTOR:39:eDP-1]
>[   16.834045] [drm:verify_crtc_state] [CRTC:26]
>[   16.834058] [drm:verify_single_dpll_state] LCPLL 1350
>[   16.834062] [drm:intel_connector_verify_state] [CONNECTOR:56:HDMI-A-2]
>[   16.834064] [drm:verify_crtc_state] [CRTC:30]
>[   16.834072] [drm:verify_single_dpll_state] WRPLL 1
>[   16.834078] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88003712f400
>[   16.834083] [drm:drm_atomic_state_free] Freeing atomic state ffff88003712f400
>[   16.834103] [drm:drm_atomic_state_init] Allocated atomic state ffff88040144ec00
>[   16.834106] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane-0] ffff880400879240 state to ffff88040144ec00
>[   16.834108] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff880400987800 state to ffff88040144ec00
>[   16.834109] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff880400879300 state to ffff88040144ec00
>[   16.834110] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880400879300 to [NOCRTC]
>[   16.834111] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880400879300
>[   16.834112] [drm:drm_atomic_get_plane_state] Added [PLANE:27:plane-2] ffff8804008793c0 state to ffff88040144ec00
>[   16.834112] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804008793c0 to [NOCRTC]
>[   16.834113] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8804008793c0
>[   16.834114] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane-3] ffff880400879480 state to ffff88040144ec00
>[   16.834115] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400987000 state to ffff88040144ec00
>[   16.834116] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff880400879540 state to ffff88040144ec00
>[   16.834117] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880400879540 to [NOCRTC]
>[   16.834117] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880400879540
>[   16.834118] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane-5] ffff880400879600 state to ffff88040144ec00
>[   16.834119] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880400879600 to [NOCRTC]
>[   16.834119] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880400879600
>[   16.834120] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane-6] ffff8804008796c0 state to ffff88040144ec00
>[   16.834121] [drm:drm_atomic_get_plane_state] Added [PLANE:33:plane-7] ffff880400879780 state to ffff88040144ec00
>[   16.834122] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880400879780 to [NOCRTC]
>[   16.834122] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880400879780
>[   16.834123] [drm:drm_atomic_get_plane_state] Added [PLANE:35:plane-8] ffff880400879840 state to ffff88040144ec00
>[   16.834124] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880400879840 to [NOCRTC]
>[   16.834124] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880400879840
>[   16.834127] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1366x768] for CRTC state ffff880400987800
>[   16.834128] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880400879240 to [CRTC:26:crtc-0]
>[   16.834129] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff880400879240
>[   16.834130] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:26:crtc-0] to ffff88040144ec00
>[   16.834132] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff8804016322a0 state to ffff88040144ec00
>[   16.834133] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8804016322a0 to [NOCRTC]
>[   16.834134] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8804016322a0 to [CRTC:26:crtc-0]
>[   16.834135] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1152x864] for CRTC state ffff880400987000
>[   16.834136] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880400879480 to [CRTC:30:crtc-1]
>[   16.834137] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff880400879480
>[   16.834137] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff88040144ec00
>[   16.834138] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:56] ffff8804016322c0 state to ffff88040144ec00
>[   16.834139] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8804016322c0 to [NOCRTC]
>[   16.834140] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8804016322c0 to [CRTC:30:crtc-1]
>[   16.834141] [drm:drm_atomic_get_crtc_state] Added [CRTC:34:crtc-2] ffff880400986800 state to ffff88040144ec00
>[   16.834142] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff880400986800
>[   16.834142] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804008796c0 to [NOCRTC]
>[   16.834143] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8804008796c0
>[   16.834144] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:34:crtc-2] to ffff88040144ec00
>[   16.834145] [drm:drm_atomic_check_only] checking ffff88040144ec00
>[   16.834148] [drm:update_connector_routing] Updating routing for [CONNECTOR:39:eDP-1]
>[   16.834149] [drm:update_connector_routing] [CONNECTOR:39:eDP-1] keeps [ENCODER:38:TMDS-38], now on [CRTC:26:crtc-0]
>[   16.834150] [drm:update_connector_routing] Updating routing for [CONNECTOR:56:HDMI-A-2]
>[   16.834151] [drm:update_connector_routing] [CONNECTOR:56:HDMI-A-2] keeps [ENCODER:51:TMDS-51], now on [CRTC:30:crtc-1]
>[   16.834154] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:23] with fb 64
>[   16.834155] [drm:intel_plane_atomic_calc_changes] [PLANE:23] visible 1 -> 1, off 0, on 0, ms 0
>[   16.834156] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:28] with fb 64
>[   16.834157] [drm:intel_plane_atomic_calc_changes] [PLANE:28] visible 1 -> 1, off 0, on 0, ms 0
>[   16.834163] [drm:drm_atomic_commit] commiting ffff88040144ec00
>[   16.834182] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040144ec00
>[   16.834185] [drm:drm_atomic_state_free] Freeing atomic state ffff88040144ec00
>[   16.834236] Console: switching to colour frame buffer device 200x56
>[   16.834246] [drm:drm_atomic_state_init] Allocated atomic state ffff88040144ec00
>[   16.834250] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff880400986000 state to ffff88040144ec00
>[   16.834251] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane-0] ffff880400879a80 state to ffff88040144ec00
>[   16.834252] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1366x768] for CRTC state ffff880400986000
>[   16.834253] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880400879a80 to [CRTC:26:crtc-0]
>[   16.834254] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff880400879a80
>[   16.834255] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:26:crtc-0] to ffff88040144ec00
>[   16.834256] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff8804016322e0 state to ffff88040144ec00
>[   16.834256] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8804016322e0 to [NOCRTC]
>[   16.834257] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8804016322e0 to [CRTC:26:crtc-0]
>[   16.834258] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400985800 state to ffff88040144ec00
>[   16.834259] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane-3] ffff880400879c00 state to ffff88040144ec00
>[   16.834260] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1152x864] for CRTC state ffff880400985800
>[   16.834261] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880400879c00 to [CRTC:30:crtc-1]
>[   16.834262] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff880400879c00
>[   16.834262] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff88040144ec00
>[   16.834263] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:56] ffff880401632300 state to ffff88040144ec00
>[   16.834264] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880401632300 to [NOCRTC]
>[   16.834265] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880401632300 to [CRTC:30:crtc-1]
>[   16.834266] [drm:drm_atomic_get_crtc_state] Added [CRTC:34:crtc-2] ffff880400985000 state to ffff88040144ec00
>[   16.834267] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane-6] ffff880400879d80 state to ffff88040144ec00
>[   16.834267] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff880400985000
>[   16.834268] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880400879d80 to [NOCRTC]
>[   16.834268] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880400879d80
>[   16.834269] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:34:crtc-2] to ffff88040144ec00
>[   16.834270] [drm:drm_atomic_check_only] checking ffff88040144ec00
>[   16.834271] [drm:update_connector_routing] Updating routing for [CONNECTOR:39:eDP-1]
>[   16.834272] [drm:update_connector_routing] [CONNECTOR:39:eDP-1] keeps [ENCODER:38:TMDS-38], now on [CRTC:26:crtc-0]
>[   16.834273] [drm:update_connector_routing] Updating routing for [CONNECTOR:56:HDMI-A-2]
>[   16.834274] [drm:update_connector_routing] [CONNECTOR:56:HDMI-A-2] keeps [ENCODER:51:TMDS-51], now on [CRTC:30:crtc-1]
>[   16.834275] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:23] with fb 64
>[   16.834276] [drm:intel_plane_atomic_calc_changes] [PLANE:23] visible 1 -> 1, off 0, on 0, ms 0
>[   16.834276] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:28] with fb 64
>[   16.834277] [drm:intel_plane_atomic_calc_changes] [PLANE:28] visible 1 -> 1, off 0, on 0, ms 0
>[   16.834281] [drm:drm_atomic_commit] commiting ffff88040144ec00
>[   16.834300] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040144ec00
>[   16.834302] [drm:drm_atomic_state_free] Freeing atomic state ffff88040144ec00
>[   16.837331] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device
>[   16.870574] input: HDA Intel HDMI HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:03.0/sound/card1/input29
>[   16.870655] input: HDA Intel HDMI HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:03.0/sound/card1/input30
>[   16.870725] input: HDA Intel HDMI HDMI/DP,pcm=8 as /devices/pci0000:00/0000:00:03.0/sound/card1/input31
>[   16.876184] [drm:i915_gem_open] 
>[   16.876223] [drm:drm_atomic_state_init] Allocated atomic state ffff8804016a3800
>[   16.876226] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane-0] ffff8804052353c0 state to ffff8804016a3800
>[   16.876229] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff88040169d800 state to ffff8804016a3800
>[   16.876230] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8804052356c0 state to ffff8804016a3800
>[   16.876231] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804052356c0 to [NOCRTC]
>[   16.876232] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8804052356c0
>[   16.876234] [drm:drm_atomic_get_plane_state] Added [PLANE:27:plane-2] ffff880405235540 state to ffff8804016a3800
>[   16.876235] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880405235540 to [NOCRTC]
>[   16.876236] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880405235540
>[   16.876237] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane-3] ffff880405235a80 state to ffff8804016a3800
>[   16.876239] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff88040169e000 state to ffff8804016a3800
>[   16.876241] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8804052359c0 state to ffff8804016a3800
>[   16.876242] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804052359c0 to [NOCRTC]
>[   16.876243] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8804052359c0
>[   16.876244] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane-5] ffff880405235900 state to ffff8804016a3800
>[   16.876245] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880405235900 to [NOCRTC]
>[   16.876246] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880405235900
>[   16.876247] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane-6] ffff880405235240 state to ffff8804016a3800
>[   16.876250] [drm:drm_atomic_get_plane_state] Added [PLANE:33:plane-7] ffff8803fe8fb000 state to ffff8804016a3800
>[   16.876251] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fe8fb000 to [NOCRTC]
>[   16.876252] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8803fe8fb000
>[   16.876253] [drm:drm_atomic_get_plane_state] Added [PLANE:35:plane-8] ffff8803fe8fb0c0 state to ffff8804016a3800
>[   16.876254] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fe8fb0c0 to [NOCRTC]
>[   16.876255] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8803fe8fb0c0
>[   16.876258] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1366x768] for CRTC state ffff88040169d800
>[   16.876259] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804052353c0 to [CRTC:26:crtc-0]
>[   16.876260] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8804052353c0
>[   16.876262] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:26:crtc-0] to ffff8804016a3800
>[   16.876264] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff88040498bf60 state to ffff8804016a3800
>[   16.876266] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88040498bf60 to [NOCRTC]
>[   16.876267] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88040498bf60 to [CRTC:26:crtc-0]
>[   16.876269] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1152x864] for CRTC state ffff88040169e000
>[   16.876270] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880405235a80 to [CRTC:30:crtc-1]
>[   16.876271] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff880405235a80
>[   16.876272] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff8804016a3800
>[   16.876274] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:56] ffff88040498bf80 state to ffff8804016a3800
>[   16.876275] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88040498bf80 to [NOCRTC]
>[   16.876276] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88040498bf80 to [CRTC:30:crtc-1]
>[   16.876278] [drm:drm_atomic_get_crtc_state] Added [CRTC:34:crtc-2] ffff88040169e800 state to ffff8804016a3800
>[   16.876279] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88040169e800
>[   16.876280] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880405235240 to [NOCRTC]
>[   16.876281] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880405235240
>[   16.876282] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:34:crtc-2] to ffff8804016a3800
>[   16.876283] [drm:drm_atomic_check_only] checking ffff8804016a3800
>[   16.876287] [drm:update_connector_routing] Updating routing for [CONNECTOR:39:eDP-1]
>[   16.876289] [drm:update_connector_routing] [CONNECTOR:39:eDP-1] keeps [ENCODER:38:TMDS-38], now on [CRTC:26:crtc-0]
>[   16.876290] [drm:update_connector_routing] Updating routing for [CONNECTOR:56:HDMI-A-2]
>[   16.876291] [drm:update_connector_routing] [CONNECTOR:56:HDMI-A-2] keeps [ENCODER:51:TMDS-51], now on [CRTC:30:crtc-1]
>[   16.876295] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:23] with fb 64
>[   16.876296] [drm:intel_plane_atomic_calc_changes] [PLANE:23] visible 1 -> 1, off 0, on 0, ms 0
>[   16.876297] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:28] with fb 64
>[   16.876299] [drm:intel_plane_atomic_calc_changes] [PLANE:28] visible 1 -> 1, off 0, on 0, ms 0
>[   16.876305] [drm:drm_atomic_commit] commiting ffff8804016a3800
>[   16.876327] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8804016a3800
>[   16.876330] [drm:drm_atomic_state_free] Freeing atomic state ffff8804016a3800
>[   16.896062] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=5022/5022
>[   16.896067] [drm:intel_panel_actually_set_backlight] set backlight PWM = 5022
>[   16.898064] [drm:drm_atomic_state_init] Allocated atomic state ffff8804016a5400
>[   16.898068] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff88040169f000 state to ffff8804016a5400
>[   16.898069] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane-0] ffff8803fe8fbc00 state to ffff8804016a5400
>[   16.898072] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1366x768] for CRTC state ffff88040169f000
>[   16.898073] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fe8fbc00 to [CRTC:26:crtc-0]
>[   16.898074] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8803fe8fbc00
>[   16.898075] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:26:crtc-0] to ffff8804016a5400
>[   16.898076] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff88040498bca0 state to ffff8804016a5400
>[   16.898078] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88040498bca0 to [NOCRTC]
>[   16.898078] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88040498bca0 to [CRTC:26:crtc-0]
>[   16.898080] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff88040169f800 state to ffff8804016a5400
>[   16.898081] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane-3] ffff8803fe8fbd80 state to ffff8804016a5400
>[   16.898082] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1152x864] for CRTC state ffff88040169f800
>[   16.898082] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fe8fbd80 to [CRTC:30:crtc-1]
>[   16.898083] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8803fe8fbd80
>[   16.898084] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff8804016a5400
>[   16.898085] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:56] ffff88040498bbc0 state to ffff8804016a5400
>[   16.898085] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88040498bbc0 to [NOCRTC]
>[   16.898086] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88040498bbc0 to [CRTC:30:crtc-1]
>[   16.898087] [drm:drm_atomic_get_crtc_state] Added [CRTC:34:crtc-2] ffff88040169a000 state to ffff8804016a5400
>[   16.898088] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane-6] ffff8803fe8fbf00 state to ffff8804016a5400
>[   16.898089] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88040169a000
>[   16.898089] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fe8fbf00 to [NOCRTC]
>[   16.898090] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8803fe8fbf00
>[   16.898090] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:34:crtc-2] to ffff8804016a5400
>[   16.898091] [drm:drm_atomic_check_only] checking ffff8804016a5400
>[   16.898095] [drm:update_connector_routing] Updating routing for [CONNECTOR:39:eDP-1]
>[   16.898096] [drm:update_connector_routing] [CONNECTOR:39:eDP-1] keeps [ENCODER:38:TMDS-38], now on [CRTC:26:crtc-0]
>[   16.898097] [drm:update_connector_routing] Updating routing for [CONNECTOR:56:HDMI-A-2]
>[   16.898098] [drm:update_connector_routing] [CONNECTOR:56:HDMI-A-2] keeps [ENCODER:51:TMDS-51], now on [CRTC:30:crtc-1]
>[   16.898100] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:23] with fb 64
>[   16.898101] [drm:intel_plane_atomic_calc_changes] [PLANE:23] visible 1 -> 1, off 0, on 0, ms 0
>[   16.898102] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:28] with fb 64
>[   16.898103] [drm:intel_plane_atomic_calc_changes] [PLANE:28] visible 1 -> 1, off 0, on 0, ms 0
>[   16.898109] [drm:drm_atomic_commit] commiting ffff8804016a5400
>[   16.898130] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8804016a5400
>[   16.898132] [drm:drm_atomic_state_free] Freeing atomic state ffff8804016a5400
>[   16.900698] [drm:i915_gem_open] 
>[   16.900725] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fea5d800
>[   16.900727] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane-0] ffff880400b17180 state to ffff8803fea5d800
>[   16.900729] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8804059b1000 state to ffff8803fea5d800
>[   16.900731] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff880400b179c0 state to ffff8803fea5d800
>[   16.900732] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880400b179c0 to [NOCRTC]
>[   16.900733] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880400b179c0
>[   16.900734] [drm:drm_atomic_get_plane_state] Added [PLANE:27:plane-2] ffff880400b176c0 state to ffff8803fea5d800
>[   16.900735] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880400b176c0 to [NOCRTC]
>[   16.900736] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880400b176c0
>[   16.900737] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane-3] ffff880400b17000 state to ffff8803fea5d800
>[   16.900739] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8804059b3000 state to ffff8803fea5d800
>[   16.900740] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff880400b17e40 state to ffff8803fea5d800
>[   16.900741] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880400b17e40 to [NOCRTC]
>[   16.900742] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880400b17e40
>[   16.900743] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane-5] ffff880400b17d80 state to ffff8803fea5d800
>[   16.900744] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880400b17d80 to [NOCRTC]
>[   16.900745] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880400b17d80
>[   16.900746] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane-6] ffff880400b17b40 state to ffff8803fea5d800
>[   16.900748] [drm:drm_atomic_get_plane_state] Added [PLANE:33:plane-7] ffff880400b17780 state to ffff8803fea5d800
>[   16.900749] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880400b17780 to [NOCRTC]
>[   16.900750] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880400b17780
>[   16.900751] [drm:drm_atomic_get_plane_state] Added [PLANE:35:plane-8] ffff880400b17540 state to ffff8803fea5d800
>[   16.900752] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880400b17540 to [NOCRTC]
>[   16.900753] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880400b17540
>[   16.900755] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1366x768] for CRTC state ffff8804059b1000
>[   16.900756] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880400b17180 to [CRTC:26:crtc-0]
>[   16.900757] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff880400b17180
>[   16.900758] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:26:crtc-0] to ffff8803fea5d800
>[   16.900760] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff880400ac5400 state to ffff8803fea5d800
>[   16.900761] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880400ac5400 to [NOCRTC]
>[   16.900762] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880400ac5400 to [CRTC:26:crtc-0]
>[   16.900764] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1152x864] for CRTC state ffff8804059b3000
>[   16.900765] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880400b17000 to [CRTC:30:crtc-1]
>[   16.900766] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff880400b17000
>[   16.900767] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff8803fea5d800
>[   16.900768] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:56] ffff880400ac5420 state to ffff8803fea5d800
>[   16.900769] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880400ac5420 to [NOCRTC]
>[   16.900770] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880400ac5420 to [CRTC:30:crtc-1]
>[   16.900772] [drm:drm_atomic_get_crtc_state] Added [CRTC:34:crtc-2] ffff8804059b3800 state to ffff8803fea5d800
>[   16.900773] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff8804059b3800
>[   16.900774] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880400b17b40 to [NOCRTC]
>[   16.900775] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880400b17b40
>[   16.900776] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:34:crtc-2] to ffff8803fea5d800
>[   16.900777] [drm:drm_atomic_check_only] checking ffff8803fea5d800
>[   16.900779] [drm:update_connector_routing] Updating routing for [CONNECTOR:39:eDP-1]
>[   16.900781] [drm:update_connector_routing] [CONNECTOR:39:eDP-1] keeps [ENCODER:38:TMDS-38], now on [CRTC:26:crtc-0]
>[   16.900782] [drm:update_connector_routing] Updating routing for [CONNECTOR:56:HDMI-A-2]
>[   16.900783] [drm:update_connector_routing] [CONNECTOR:56:HDMI-A-2] keeps [ENCODER:51:TMDS-51], now on [CRTC:30:crtc-1]
>[   16.900786] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:23] with fb 64
>[   16.900787] [drm:intel_plane_atomic_calc_changes] [PLANE:23] visible 1 -> 1, off 0, on 0, ms 0
>[   16.900788] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:28] with fb 64
>[   16.900789] [drm:intel_plane_atomic_calc_changes] [PLANE:28] visible 1 -> 1, off 0, on 0, ms 0
>[   16.900795] [drm:drm_atomic_commit] commiting ffff8803fea5d800
>[   16.900810] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fea5d800
>[   16.900813] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fea5d800
>[   16.900873] [drm:i915_gem_open] 
>[   16.900887] [drm:drm_mode_addfb2] [FB:69]
>[   16.943521] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   16.944214] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1]
>[   16.944217] [drm:intel_dp_detect] [CONNECTOR:39:eDP-1]
>[   16.944545] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[   16.944858] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   16.945195] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1] probed modes :
>[   16.945198] [drm:drm_mode_debug_printmodeline] Modeline 65:"1366x768" 60 70000 1366 1402 1438 1476 768 772 780 790 0x8 0xa
>[   16.945293] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1]
>[   16.945295] [drm:intel_crt_detect] [CONNECTOR:36:VGA-1] force=1
>[   16.945304] [drm:intel_ironlake_crt_detect_hotplug] ironlake hotplug adpa=0xf40000, result 0
>[   16.945305] [drm:intel_crt_detect] CRT not detected via hotplug
>[   16.945471] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   16.945474] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK on first message, retry
>[   16.945642] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   16.945645] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   16.945646] [drm:intel_crt_get_edid] CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   16.945648] [drm:intel_gmbus_force_bit] enabling bit-banging on i915 gmbus vga. force bit now 1
>[   16.946684] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   16.946686] [drm:intel_gmbus_force_bit] disabling bit-banging on i915 gmbus vga. force bit now 0
>[   16.946687] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found]
>[   16.946688] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1] disconnected
>[   16.946739] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1]
>[   16.946740] [drm:intel_dp_detect] [CONNECTOR:45:DP-1]
>[   16.946747] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1] disconnected
>[   16.946774] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1]
>[   16.946776] [drm:intel_hdmi_detect] [CONNECTOR:49:HDMI-A-1]
>[   17.051001] [drm:intel_hdmi_detect] HDMI live status down
>[   17.051005] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1] disconnected
>[   17.051064] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2]
>[   17.051065] [drm:intel_dp_detect] [CONNECTOR:52:DP-2]
>[   17.056451] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.061833] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.067206] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.072582] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.077954] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.083325] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.088695] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.094067] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.099443] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.104828] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.110198] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.115570] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.120942] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.126323] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.131693] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.137068] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.142441] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.147818] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.153180] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.158546] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.163916] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.169288] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.174660] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.180022] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.185396] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.190767] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.196185] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.201553] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.206919] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.212288] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.217645] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.223002] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.223005] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   17.223008] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2] disconnected
>[   17.223064] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2]
>[   17.223066] [drm:intel_hdmi_detect] [CONNECTOR:56:HDMI-A-2]
>[   17.251590] [drm:intel_hdmi_dp_dual_mode_detect] DP dual mode adaptor (type 1 HDMI) detected (max TMDS clock: 165000 kHz)
>[   17.251595] [drm:drm_detect_monitor_audio] Monitor has basic audio support
>[   17.251657] [drm:drm_edid_to_eld] ELD monitor M230HDL
>[   17.251659] [drm:parse_hdmi_vsdb] HDMI: DVI dual 0, max TMDS clock 0, latency present 0 0, video latency 0 0, audio latency 0 0
>[   17.251661] [drm:drm_edid_to_eld] ELD size 32, SAD count 1
>[   17.251690] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2] probed modes :
>[   17.251693] [drm:drm_mode_debug_printmodeline] Modeline 70:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0xa
>[   17.251695] [drm:drm_mode_debug_printmodeline] Modeline 122:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   17.251697] [drm:drm_mode_debug_printmodeline] Modeline 131:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   17.251699] [drm:drm_mode_debug_printmodeline] Modeline 120:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   17.251701] [drm:drm_mode_debug_printmodeline] Modeline 130:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   17.251703] [drm:drm_mode_debug_printmodeline] Modeline 123:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   17.251704] [drm:drm_mode_debug_printmodeline] Modeline 83:"1920x1080" 50 148350 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   17.251706] [drm:drm_mode_debug_printmodeline] Modeline 89:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   17.251708] [drm:drm_mode_debug_printmodeline] Modeline 95:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   17.251710] [drm:drm_mode_debug_printmodeline] Modeline 107:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   17.251712] [drm:drm_mode_debug_printmodeline] Modeline 96:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   17.251714] [drm:drm_mode_debug_printmodeline] Modeline 73:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[   17.251716] [drm:drm_mode_debug_printmodeline] Modeline 68:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   17.251718] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   17.251719] [drm:drm_mode_debug_printmodeline] Modeline 71:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   17.251721] [drm:drm_mode_debug_printmodeline] Modeline 84:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   17.251723] [drm:drm_mode_debug_printmodeline] Modeline 85:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   17.251725] [drm:drm_mode_debug_printmodeline] Modeline 86:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   17.251727] [drm:drm_mode_debug_printmodeline] Modeline 87:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   17.251728] [drm:drm_mode_debug_printmodeline] Modeline 88:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   17.251730] [drm:drm_mode_debug_printmodeline] Modeline 76:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   17.251732] [drm:drm_mode_debug_printmodeline] Modeline 77:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[   17.251734] [drm:drm_mode_debug_printmodeline] Modeline 72:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   17.251736] [drm:drm_mode_debug_printmodeline] Modeline 92:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   17.251738] [drm:drm_mode_debug_printmodeline] Modeline 103:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   17.251739] [drm:drm_mode_debug_printmodeline] Modeline 90:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   17.251741] [drm:drm_mode_debug_printmodeline] Modeline 78:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   17.251743] [drm:drm_mode_debug_printmodeline] Modeline 79:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   17.251745] [drm:drm_mode_debug_printmodeline] Modeline 80:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   17.251746] [drm:drm_mode_debug_printmodeline] Modeline 101:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   17.251748] [drm:drm_mode_debug_printmodeline] Modeline 81:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   17.251750] [drm:drm_mode_debug_printmodeline] Modeline 82:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   17.251853] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3]
>[   17.251855] [drm:intel_dp_detect] [CONNECTOR:58:DP-3]
>[   17.251864] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3] disconnected
>[   17.251896] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3]
>[   17.251897] [drm:intel_hdmi_detect] [CONNECTOR:62:HDMI-A-3]
>[   17.357694] [drm:intel_hdmi_detect] HDMI live status down
>[   17.357700] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3] disconnected
>[   17.357829] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1]
>[   17.357832] [drm:intel_dp_detect] [CONNECTOR:39:eDP-1]
>[   17.358163] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[   17.358476] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   17.358813] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1] probed modes :
>[   17.358816] [drm:drm_mode_debug_printmodeline] Modeline 65:"1366x768" 60 70000 1366 1402 1438 1476 768 772 780 790 0x8 0xa
>[   17.359099] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1]
>[   17.359101] [drm:intel_crt_detect] [CONNECTOR:36:VGA-1] force=1
>[   17.359109] [drm:intel_ironlake_crt_detect_hotplug] ironlake hotplug adpa=0xf40000, result 0
>[   17.359110] [drm:intel_crt_detect] CRT not detected via hotplug
>[   17.359315] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   17.359316] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK on first message, retry
>[   17.359513] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   17.359515] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   17.359516] [drm:intel_crt_get_edid] CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   17.359518] [drm:intel_gmbus_force_bit] enabling bit-banging on i915 gmbus vga. force bit now 1
>[   17.360543] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   17.360544] [drm:intel_gmbus_force_bit] disabling bit-banging on i915 gmbus vga. force bit now 0
>[   17.360545] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found]
>[   17.360547] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1] disconnected
>[   17.360566] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1]
>[   17.360568] [drm:intel_dp_detect] [CONNECTOR:45:DP-1]
>[   17.360575] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1] disconnected
>[   17.360585] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1]
>[   17.360586] [drm:intel_hdmi_detect] [CONNECTOR:49:HDMI-A-1]
>[   17.464328] [drm:intel_hdmi_detect] HDMI live status down
>[   17.464334] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1] disconnected
>[   17.464392] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2]
>[   17.464394] [drm:intel_dp_detect] [CONNECTOR:52:DP-2]
>[   17.467630] floppy0: no floppy controllers found
>[   17.469804] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.475187] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.480555] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.485922] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.491292] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.496660] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.502357] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.507715] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.513085] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.518442] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.523805] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.529185] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.534556] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.539927] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.545298] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.550660] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.556025] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.561389] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.566757] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.572130] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.577500] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.582868] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.588239] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.593610] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.598977] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.604348] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.609718] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.615093] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.620472] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.625839] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.631209] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.636582] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   17.636585] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   17.636588] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2] disconnected
>[   17.636633] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2]
>[   17.636636] [drm:intel_hdmi_detect] [CONNECTOR:56:HDMI-A-2]
>[   17.665084] [drm:intel_hdmi_dp_dual_mode_detect] DP dual mode adaptor (type 1 HDMI) detected (max TMDS clock: 165000 kHz)
>[   17.665088] [drm:drm_detect_monitor_audio] Monitor has basic audio support
>[   17.665150] [drm:drm_edid_to_eld] ELD monitor M230HDL
>[   17.665152] [drm:parse_hdmi_vsdb] HDMI: DVI dual 0, max TMDS clock 0, latency present 0 0, video latency 0 0, audio latency 0 0
>[   17.665153] [drm:drm_edid_to_eld] ELD size 32, SAD count 1
>[   17.665186] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2] probed modes :
>[   17.665189] [drm:drm_mode_debug_printmodeline] Modeline 70:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0xa
>[   17.665191] [drm:drm_mode_debug_printmodeline] Modeline 122:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   17.665193] [drm:drm_mode_debug_printmodeline] Modeline 131:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   17.665195] [drm:drm_mode_debug_printmodeline] Modeline 120:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   17.665197] [drm:drm_mode_debug_printmodeline] Modeline 130:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   17.665198] [drm:drm_mode_debug_printmodeline] Modeline 123:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   17.665200] [drm:drm_mode_debug_printmodeline] Modeline 83:"1920x1080" 50 148350 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   17.665202] [drm:drm_mode_debug_printmodeline] Modeline 89:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   17.665204] [drm:drm_mode_debug_printmodeline] Modeline 95:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   17.665206] [drm:drm_mode_debug_printmodeline] Modeline 107:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   17.665208] [drm:drm_mode_debug_printmodeline] Modeline 96:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   17.665210] [drm:drm_mode_debug_printmodeline] Modeline 73:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[   17.665211] [drm:drm_mode_debug_printmodeline] Modeline 68:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   17.665213] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   17.665215] [drm:drm_mode_debug_printmodeline] Modeline 71:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   17.665217] [drm:drm_mode_debug_printmodeline] Modeline 84:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   17.665219] [drm:drm_mode_debug_printmodeline] Modeline 85:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   17.665220] [drm:drm_mode_debug_printmodeline] Modeline 86:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   17.665222] [drm:drm_mode_debug_printmodeline] Modeline 87:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   17.665224] [drm:drm_mode_debug_printmodeline] Modeline 88:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   17.665226] [drm:drm_mode_debug_printmodeline] Modeline 76:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   17.665228] [drm:drm_mode_debug_printmodeline] Modeline 77:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[   17.665229] [drm:drm_mode_debug_printmodeline] Modeline 72:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   17.665231] [drm:drm_mode_debug_printmodeline] Modeline 92:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   17.665233] [drm:drm_mode_debug_printmodeline] Modeline 103:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   17.665235] [drm:drm_mode_debug_printmodeline] Modeline 90:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   17.665237] [drm:drm_mode_debug_printmodeline] Modeline 78:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   17.665238] [drm:drm_mode_debug_printmodeline] Modeline 79:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   17.665240] [drm:drm_mode_debug_printmodeline] Modeline 80:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   17.665242] [drm:drm_mode_debug_printmodeline] Modeline 101:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   17.665244] [drm:drm_mode_debug_printmodeline] Modeline 81:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   17.665246] [drm:drm_mode_debug_printmodeline] Modeline 82:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   17.666114] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3]
>[   17.666116] [drm:intel_dp_detect] [CONNECTOR:58:DP-3]
>[   17.666126] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3] disconnected
>[   17.666136] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3]
>[   17.666137] [drm:intel_hdmi_detect] [CONNECTOR:62:HDMI-A-3]
>[   17.771013] [drm:intel_hdmi_detect] HDMI live status down
>[   17.771019] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3] disconnected
>[   17.833561] [drm:drm_atomic_state_init] Allocated atomic state ffff88040173b000
>[   17.833566] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f2800 state to ffff88040173b000
>[   17.833568] [drm:drm_atomic_check_only] checking ffff88040173b000
>[   17.833570] [drm:drm_atomic_helper_check_modeset] [CRTC:30:crtc-1] needs all connectors, enable: y, active: y
>[   17.833571] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff88040173b000
>[   17.833573] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:56] ffff8804008814a0 state to ffff88040173b000
>[   17.833575] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane-3] ffff8804015df540 state to ffff88040173b000
>[   17.833577] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff88040173b000
>[   17.833579] [drm:connected_sink_compute_bpp] [CONNECTOR:56:HDMI-A-2] checking for sink bpp constrains
>[   17.833580] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to EDID reported max of 24
>[   17.833584] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[   17.833585] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[   17.833586] [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[   17.833588] [drm:intel_dump_pipe_config] [CRTC:30][modeset] config ffff8800d93f2800 for pipe B
>[   17.833589] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   17.833590] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   17.833591] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   17.833592] [drm:intel_dump_pipe_config] dp: 0, lanes: 4, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   17.833593] [drm:intel_dump_pipe_config] dp: 0, lanes: 4, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   17.833594] [drm:intel_dump_pipe_config] audio: 1, infoframes: 1
>[   17.833595] [drm:intel_dump_pipe_config] requested mode:
>[   17.833596] [drm:drm_mode_debug_printmodeline] Modeline 0:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[   17.833597] [drm:intel_dump_pipe_config] adjusted mode:
>[   17.833599] [drm:drm_mode_debug_printmodeline] Modeline 0:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[   17.833600] [drm:intel_dump_crtc_timings] crtc timings: 108000 1152 1216 1344 1600 864 865 868 900, type: 0x40 flags: 0x5
>[   17.833601] [drm:intel_dump_pipe_config] port clock: 108000
>[   17.833601] [drm:intel_dump_pipe_config] pipe src size: 1152x864
>[   17.833602] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[   17.833603] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   17.833604] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   17.833605] [drm:intel_dump_pipe_config] ips: 0
>[   17.833606] [drm:intel_dump_pipe_config] double wide: 0
>[   17.833607] [drm:intel_dump_pipe_config] ddi_pll_sel: 0x80000000; dpll_hw_state: wrpll: 0xb018080f spll: 0x0
>[   17.833608] [drm:intel_dump_pipe_config] planes on this crtc
>[   17.833609] [drm:intel_dump_pipe_config] STANDARD PLANE:28 plane: 1.0 idx: 3 enabled
>[   17.833610] [drm:intel_dump_pipe_config] 	FB:64, fb = 1600x900 format = 0x34325258
>[   17.833612] [drm:intel_dump_pipe_config] 	scaler:0 src (0, 0) 1152x864 dst (0, 0) 1152x864
>[   17.833613] [drm:intel_dump_pipe_config] CURSOR PLANE:29 plane: 1.2 idx: 4 disabled, scaler_id = 0
>[   17.833614] [drm:intel_dump_pipe_config] STANDARD PLANE:31 plane: 1.1 idx: 5 disabled, scaler_id = 0
>[   17.833617] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f3000 state to ffff88040173b000
>[   17.833618] [drm:drm_atomic_get_crtc_state] Added [CRTC:34:crtc-2] ffff8800d93f3800 state to ffff88040173b000
>[   17.833620] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:28] with fb 64
>[   17.833621] [drm:intel_plane_atomic_calc_changes] [PLANE:28] visible 1 -> 1, off 1, on 1, ms 1
>[   17.834368] [drm:intel_find_shared_dpll] CRTC:30 allocated WRPLL 1
>[   17.834369] [drm:intel_reference_shared_dpll] using WRPLL 1 for pipe B
>[   17.834372] [drm:drm_atomic_commit] commiting ffff88040173b000
>[   17.841590] [drm:hsw_audio_codec_disable] Disable audio codec on pipe B
>[   17.841605] [drm:intel_disable_pipe] disabling pipe B
>[   17.856137] [drm:intel_disable_shared_dpll] disable WRPLL 1 (active 2, on? 1) for crtc 30
>[   17.856142] [drm:intel_disable_shared_dpll] disabling WRPLL 1
>[   17.856148] [drm:verify_encoder_state] [ENCODER:37:DAC-37]
>[   17.856151] [drm:verify_encoder_state] [ENCODER:38:TMDS-38]
>[   17.856152] [drm:verify_encoder_state] [ENCODER:44:TMDS-44]
>[   17.856154] [drm:verify_encoder_state] [ENCODER:46:DP MST-46]
>[   17.856155] [drm:verify_encoder_state] [ENCODER:47:DP MST-47]
>[   17.856156] [drm:verify_encoder_state] [ENCODER:48:DP MST-48]
>[   17.856157] [drm:verify_encoder_state] [ENCODER:51:TMDS-51]
>[   17.856158] [drm:verify_encoder_state] [ENCODER:53:DP MST-53]
>[   17.856160] [drm:verify_encoder_state] [ENCODER:54:DP MST-54]
>[   17.856161] [drm:verify_encoder_state] [ENCODER:55:DP MST-55]
>[   17.856162] [drm:verify_encoder_state] [ENCODER:57:TMDS-57]
>[   17.856163] [drm:verify_encoder_state] [ENCODER:59:DP MST-59]
>[   17.856164] [drm:verify_encoder_state] [ENCODER:60:DP MST-60]
>[   17.856165] [drm:verify_encoder_state] [ENCODER:61:DP MST-61]
>[   17.856167] [drm:intel_connector_verify_state] [CONNECTOR:36:VGA-1]
>[   17.856169] [drm:intel_connector_verify_state] [CONNECTOR:45:DP-1]
>[   17.856170] [drm:intel_connector_verify_state] [CONNECTOR:49:HDMI-A-1]
>[   17.856172] [drm:intel_connector_verify_state] [CONNECTOR:52:DP-2]
>[   17.856173] [drm:intel_connector_verify_state] [CONNECTOR:58:DP-3]
>[   17.856175] [drm:intel_connector_verify_state] [CONNECTOR:62:HDMI-A-3]
>[   17.856177] [drm:verify_single_dpll_state] WRPLL 1
>[   17.856178] [drm:verify_single_dpll_state] WRPLL 2
>[   17.856180] [drm:verify_single_dpll_state] SPLL
>[   17.856181] [drm:verify_single_dpll_state] LCPLL 810
>[   17.856182] [drm:verify_single_dpll_state] LCPLL 1350
>[   17.856183] [drm:verify_single_dpll_state] LCPLL 2700
>[   17.856187] [drm:intel_enable_shared_dpll] enable WRPLL 1 (active 2, on? 0) for crtc 30
>[   17.856188] [drm:intel_enable_shared_dpll] enabling WRPLL 1
>[   17.856268] [drm:intel_enable_pipe] enabling pipe B
>[   17.856273] [drm:intel_audio_codec_enable] ELD on [CONNECTOR:56:HDMI-A-2], [ENCODER:51:TMDS-51]
>[   17.856275] [drm:hsw_audio_codec_enable] Enable audio codec on pipe B, 32 bytes ELD
>[   17.856279] [drm:audio_config_hdmi_pixel_clock] HDMI audio pixel clock setting for 108000 not found, falling back to defaults
>[   17.856281] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[   17.896402] [drm:intel_connector_verify_state] [CONNECTOR:56:HDMI-A-2]
>[   17.896410] [drm:verify_crtc_state] [CRTC:30]
>[   17.896421] [drm:verify_single_dpll_state] WRPLL 1
>[   17.896427] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040173b000
>[   17.896431] [drm:drm_atomic_state_free] Freeing atomic state ffff88040173b000
>[   17.896714] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fea5e400
>[   17.896719] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8804059b3800 state to ffff8803fea5e400
>[   17.896721] [drm:drm_atomic_check_only] checking ffff8803fea5e400
>[   17.896727] [drm:drm_atomic_commit] commiting ffff8803fea5e400
>[   17.896775] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fea5e400
>[   17.896777] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fea5e400
>[   17.896787] [drm:drm_mode_addfb2] [FB:91]
>[   17.896790] [drm:drm_mode_setcrtc] [CRTC:26:crtc-0]
>[   17.896793] [drm:drm_mode_setcrtc] [CONNECTOR:39:eDP-1]
>[   17.896795] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fea5e400
>[   17.896797] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8804059b3000 state to ffff8803fea5e400
>[   17.896799] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane-0] ffff880409d170c0 state to ffff8803fea5e400
>[   17.896801] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:] for CRTC state ffff8804059b3000
>[   17.896802] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880409d170c0 to [CRTC:26:crtc-0]
>[   17.896804] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff880409d170c0
>[   17.896805] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:26:crtc-0] to ffff8803fea5e400
>[   17.896807] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff880400ac5440 state to ffff8803fea5e400
>[   17.896809] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880400ac5440 to [NOCRTC]
>[   17.896811] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880400ac5440 to [CRTC:26:crtc-0]
>[   17.896812] [drm:drm_atomic_check_only] checking ffff8803fea5e400
>[   17.896815] [drm:update_connector_routing] Updating routing for [CONNECTOR:39:eDP-1]
>[   17.896817] [drm:update_connector_routing] [CONNECTOR:39:eDP-1] keeps [ENCODER:38:TMDS-38], now on [CRTC:26:crtc-0]
>[   17.896820] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:23] with fb 91
>[   17.896822] [drm:intel_plane_atomic_calc_changes] [PLANE:23] visible 1 -> 1, off 0, on 0, ms 0
>[   17.896825] [drm:drm_atomic_commit] commiting ffff8803fea5e400
>[   17.916839] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fea5e400
>[   17.916846] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fea5e400
>[   17.916865] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fea5e400
>[   17.916868] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8804059b3800 state to ffff8803fea5e400
>[   17.916869] [drm:drm_atomic_check_only] checking ffff8803fea5e400
>[   17.916874] [drm:drm_atomic_commit] commiting ffff8803fea5e400
>[   17.916879] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fea5e400
>[   17.916880] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fea5e400
>[   17.916892] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fea5e400
>[   17.916896] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8804059b3000 state to ffff8803fea5e400
>[   17.916897] [drm:drm_atomic_check_only] checking ffff8803fea5e400
>[   17.916900] [drm:drm_atomic_commit] commiting ffff8803fea5e400
>[   17.916947] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fea5e400
>[   17.916949] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fea5e400
>[   17.916952] [drm:drm_mode_setcrtc] [CRTC:30:crtc-1]
>[   17.916956] [drm:drm_mode_setcrtc] [CONNECTOR:56:HDMI-A-2]
>[   17.916957] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fea5e400
>[   17.916959] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8804059b1000 state to ffff8803fea5e400
>[   17.916961] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane-3] ffff880409d17180 state to ffff8803fea5e400
>[   17.916964] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:] for CRTC state ffff8804059b1000
>[   17.916965] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880409d17180 to [CRTC:30:crtc-1]
>[   17.916967] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff880409d17180
>[   17.916968] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff8803fea5e400
>[   17.916971] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:56] ffff880400ac5400 state to ffff8803fea5e400
>[   17.916972] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880400ac5400 to [NOCRTC]
>[   17.916974] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880400ac5400 to [CRTC:30:crtc-1]
>[   17.916975] [drm:drm_atomic_check_only] checking ffff8803fea5e400
>[   17.916977] [drm:drm_atomic_helper_check_modeset] [CRTC:30:crtc-1] mode changed
>[   17.916980] [drm:update_connector_routing] Updating routing for [CONNECTOR:56:HDMI-A-2]
>[   17.916981] [drm:update_connector_routing] [CONNECTOR:56:HDMI-A-2] keeps [ENCODER:51:TMDS-51], now on [CRTC:30:crtc-1]
>[   17.916983] [drm:drm_atomic_helper_check_modeset] [CRTC:30:crtc-1] needs all connectors, enable: y, active: y
>[   17.916984] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff8803fea5e400
>[   17.916987] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff8803fea5e400
>[   17.916989] [drm:connected_sink_compute_bpp] [CONNECTOR:56:HDMI-A-2] checking for sink bpp constrains
>[   17.916990] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to EDID reported max of 24
>[   17.916996] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[   17.916997] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[   17.916999] [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[   17.917001] [drm:intel_dump_pipe_config] [CRTC:30][modeset] config ffff8804059b1000 for pipe B
>[   17.917002] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   17.917004] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   17.917005] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   17.917007] [drm:intel_dump_pipe_config] dp: 0, lanes: 4, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   17.917008] [drm:intel_dump_pipe_config] dp: 0, lanes: 4, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   17.917009] [drm:intel_dump_pipe_config] audio: 1, infoframes: 1
>[   17.917010] [drm:intel_dump_pipe_config] requested mode:
>[   17.917013] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0xa
>[   17.917014] [drm:intel_dump_pipe_config] adjusted mode:
>[   17.917016] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0xa
>[   17.917018] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x0 flags: 0xa
>[   17.917019] [drm:intel_dump_pipe_config] port clock: 148500
>[   17.917020] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   17.917021] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[   17.917022] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   17.917024] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   17.917025] [drm:intel_dump_pipe_config] ips: 0
>[   17.917026] [drm:intel_dump_pipe_config] double wide: 0
>[   17.917027] [drm:intel_dump_pipe_config] ddi_pll_sel: 0x80000000; dpll_hw_state: wrpll: 0xb018080f spll: 0x0
>[   17.917028] [drm:intel_dump_pipe_config] planes on this crtc
>[   17.917030] [drm:intel_dump_pipe_config] STANDARD PLANE:28 plane: 1.0 idx: 3 enabled
>[   17.917032] [drm:intel_dump_pipe_config] 	FB:64, fb = 1600x900 format = 0x34325258
>[   17.917034] [drm:intel_dump_pipe_config] 	scaler:0 src (0, 0) 1152x864 dst (0, 0) 1152x864
>[   17.917035] [drm:intel_dump_pipe_config] CURSOR PLANE:29 plane: 1.2 idx: 4 disabled, scaler_id = 0
>[   17.917037] [drm:intel_dump_pipe_config] STANDARD PLANE:31 plane: 1.1 idx: 5 disabled, scaler_id = 0
>[   17.917040] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8804059b6000 state to ffff8803fea5e400
>[   17.917042] [drm:drm_atomic_get_crtc_state] Added [CRTC:34:crtc-2] ffff8800cd6e1000 state to ffff8803fea5e400
>[   17.917045] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:28] with fb 91
>[   17.917046] [drm:intel_plane_atomic_calc_changes] [PLANE:28] visible 1 -> 1, off 1, on 1, ms 1
>[   17.918118] [drm:intel_find_shared_dpll] CRTC:30 allocated WRPLL 1
>[   17.918119] [drm:intel_reference_shared_dpll] using WRPLL 1 for pipe B
>[   17.918123] [drm:drm_atomic_commit] commiting ffff8803fea5e400
>[   17.923050] [drm:hsw_audio_codec_disable] Disable audio codec on pipe B
>[   17.923065] [drm:intel_disable_pipe] disabling pipe B
>[   17.936789] [drm:intel_disable_shared_dpll] disable WRPLL 1 (active 2, on? 1) for crtc 30
>[   17.936794] [drm:intel_disable_shared_dpll] disabling WRPLL 1
>[   17.936801] [drm:verify_encoder_state] [ENCODER:37:DAC-37]
>[   17.936804] [drm:verify_encoder_state] [ENCODER:38:TMDS-38]
>[   17.936805] [drm:verify_encoder_state] [ENCODER:44:TMDS-44]
>[   17.936807] [drm:verify_encoder_state] [ENCODER:46:DP MST-46]
>[   17.936808] [drm:verify_encoder_state] [ENCODER:47:DP MST-47]
>[   17.936809] [drm:verify_encoder_state] [ENCODER:48:DP MST-48]
>[   17.936810] [drm:verify_encoder_state] [ENCODER:51:TMDS-51]
>[   17.936812] [drm:verify_encoder_state] [ENCODER:53:DP MST-53]
>[   17.936813] [drm:verify_encoder_state] [ENCODER:54:DP MST-54]
>[   17.936814] [drm:verify_encoder_state] [ENCODER:55:DP MST-55]
>[   17.936815] [drm:verify_encoder_state] [ENCODER:57:TMDS-57]
>[   17.936817] [drm:verify_encoder_state] [ENCODER:59:DP MST-59]
>[   17.936818] [drm:verify_encoder_state] [ENCODER:60:DP MST-60]
>[   17.936819] [drm:verify_encoder_state] [ENCODER:61:DP MST-61]
>[   17.936820] [drm:intel_connector_verify_state] [CONNECTOR:36:VGA-1]
>[   17.936822] [drm:intel_connector_verify_state] [CONNECTOR:45:DP-1]
>[   17.936824] [drm:intel_connector_verify_state] [CONNECTOR:49:HDMI-A-1]
>[   17.936825] [drm:intel_connector_verify_state] [CONNECTOR:52:DP-2]
>[   17.936827] [drm:intel_connector_verify_state] [CONNECTOR:58:DP-3]
>[   17.936828] [drm:intel_connector_verify_state] [CONNECTOR:62:HDMI-A-3]
>[   17.936830] [drm:verify_single_dpll_state] WRPLL 1
>[   17.936831] [drm:verify_single_dpll_state] WRPLL 2
>[   17.936833] [drm:verify_single_dpll_state] SPLL
>[   17.936835] [drm:verify_single_dpll_state] LCPLL 810
>[   17.936836] [drm:verify_single_dpll_state] LCPLL 1350
>[   17.936837] [drm:verify_single_dpll_state] LCPLL 2700
>[   17.936840] [drm:intel_enable_shared_dpll] enable WRPLL 1 (active 2, on? 0) for crtc 30
>[   17.936841] [drm:intel_enable_shared_dpll] enabling WRPLL 1
>[   17.936921] [drm:intel_enable_pipe] enabling pipe B
>[   17.936927] [drm:intel_audio_codec_enable] ELD on [CONNECTOR:56:HDMI-A-2], [ENCODER:51:TMDS-51]
>[   17.936929] [drm:hsw_audio_codec_enable] Enable audio codec on pipe B, 32 bytes ELD
>[   17.936933] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 148500 (0x00090000)
>[   17.970390] [drm:intel_connector_verify_state] [CONNECTOR:56:HDMI-A-2]
>[   17.970399] [drm:verify_crtc_state] [CRTC:30]
>[   17.970410] [drm:verify_single_dpll_state] WRPLL 1
>[   17.970416] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fea5e400
>[   17.970419] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fea5e400
>[   17.970436] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fea5e400
>[   17.970439] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800cd6e2000 state to ffff8803fea5e400
>[   17.970440] [drm:drm_atomic_check_only] checking ffff8803fea5e400
>[   17.970445] [drm:drm_atomic_commit] commiting ffff8803fea5e400
>[   17.970449] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fea5e400
>[   17.970451] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fea5e400
>[   17.970456] [drm:drm_mode_setcrtc] [CRTC:34:crtc-2]
>[   17.970457] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fea5e400
>[   17.970459] [drm:drm_atomic_get_crtc_state] Added [CRTC:34:crtc-2] ffff8800cd6e0000 state to ffff8803fea5e400
>[   17.970462] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane-6] ffff880409d17540 state to ffff8803fea5e400
>[   17.970463] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff8800cd6e0000
>[   17.970464] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880409d17540 to [NOCRTC]
>[   17.970466] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880409d17540
>[   17.970467] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:34:crtc-2] to ffff8803fea5e400
>[   17.970469] [drm:drm_atomic_check_only] checking ffff8803fea5e400
>[   17.970471] [drm:drm_atomic_commit] commiting ffff8803fea5e400
>[   17.970474] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fea5e400
>[   17.970476] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fea5e400
>[   17.978076] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fea5e400
>[   17.978080] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800cd6e1000 state to ffff8803fea5e400
>[   17.978082] [drm:drm_atomic_check_only] checking ffff8803fea5e400
>[   17.978085] [drm:drm_atomic_commit] commiting ffff8803fea5e400
>[   17.978128] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fea5e400
>[   17.978129] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fea5e400
>[   17.978132] [drm:drm_mode_setcrtc] [CRTC:26:crtc-0]
>[   17.978135] [drm:drm_mode_setcrtc] [CONNECTOR:39:eDP-1]
>[   17.978136] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fea5e400
>[   17.978137] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800cd6e1800 state to ffff8803fea5e400
>[   17.978139] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane-0] ffff880409d179c0 state to ffff8803fea5e400
>[   17.978140] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:] for CRTC state ffff8800cd6e1800
>[   17.978141] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880409d179c0 to [CRTC:26:crtc-0]
>[   17.978142] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff880409d179c0
>[   17.978144] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:26:crtc-0] to ffff8803fea5e400
>[   17.978145] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff880400ac5460 state to ffff8803fea5e400
>[   17.978147] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880400ac5460 to [NOCRTC]
>[   17.978148] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880400ac5460 to [CRTC:26:crtc-0]
>[   17.978149] [drm:drm_atomic_check_only] checking ffff8803fea5e400
>[   17.978151] [drm:update_connector_routing] Updating routing for [CONNECTOR:39:eDP-1]
>[   17.978152] [drm:update_connector_routing] [CONNECTOR:39:eDP-1] keeps [ENCODER:38:TMDS-38], now on [CRTC:26:crtc-0]
>[   17.978155] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:23] with fb 91
>[   17.978157] [drm:intel_plane_atomic_calc_changes] [PLANE:23] visible 1 -> 1, off 0, on 0, ms 0
>[   17.978159] [drm:drm_atomic_commit] commiting ffff8803fea5e400
>[   17.978176] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fea5e400
>[   17.978177] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fea5e400
>[   17.978181] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fea5e400
>[   17.978182] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800cd6e1000 state to ffff8803fea5e400
>[   17.978183] [drm:drm_atomic_check_only] checking ffff8803fea5e400
>[   17.978184] [drm:drm_atomic_commit] commiting ffff8803fea5e400
>[   17.978186] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fea5e400
>[   17.978187] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fea5e400
>[   17.978190] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fea5e400
>[   17.978192] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800cd6e1800 state to ffff8803fea5e400
>[   17.978193] [drm:drm_atomic_check_only] checking ffff8803fea5e400
>[   17.978194] [drm:drm_atomic_commit] commiting ffff8803fea5e400
>[   17.978232] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fea5e400
>[   17.978233] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fea5e400
>[   17.978235] [drm:drm_mode_setcrtc] [CRTC:30:crtc-1]
>[   17.978236] [drm:drm_mode_setcrtc] [CONNECTOR:56:HDMI-A-2]
>[   17.978237] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fea5e400
>[   17.978238] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800cd6e2000 state to ffff8803fea5e400
>[   17.978239] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane-3] ffff880409d170c0 state to ffff8803fea5e400
>[   17.978240] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:] for CRTC state ffff8800cd6e2000
>[   17.978241] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880409d170c0 to [CRTC:30:crtc-1]
>[   17.978242] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff880409d170c0
>[   17.978243] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff8803fea5e400
>[   17.978244] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:56] ffff880400ac5440 state to ffff8803fea5e400
>[   17.978245] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880400ac5440 to [NOCRTC]
>[   17.978246] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880400ac5440 to [CRTC:30:crtc-1]
>[   17.978247] [drm:drm_atomic_check_only] checking ffff8803fea5e400
>[   17.978248] [drm:update_connector_routing] Updating routing for [CONNECTOR:56:HDMI-A-2]
>[   17.978249] [drm:update_connector_routing] [CONNECTOR:56:HDMI-A-2] keeps [ENCODER:51:TMDS-51], now on [CRTC:30:crtc-1]
>[   17.978251] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:28] with fb 91
>[   17.978252] [drm:intel_plane_atomic_calc_changes] [PLANE:28] visible 1 -> 1, off 0, on 0, ms 0
>[   17.978253] [drm:drm_atomic_commit] commiting ffff8803fea5e400
>[   17.978259] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fea5e400
>[   17.978260] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fea5e400
>[   17.978262] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fea5e400
>[   17.978263] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800cd6e1800 state to ffff8803fea5e400
>[   17.978264] [drm:drm_atomic_check_only] checking ffff8803fea5e400
>[   17.978265] [drm:drm_atomic_commit] commiting ffff8803fea5e400
>[   17.978267] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fea5e400
>[   17.978268] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fea5e400
>[   17.978270] [drm:drm_mode_setcrtc] [CRTC:34:crtc-2]
>[   17.978270] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fea5e400
>[   17.978272] [drm:drm_atomic_get_crtc_state] Added [CRTC:34:crtc-2] ffff8800cd6e2000 state to ffff8803fea5e400
>[   17.978273] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane-6] ffff880409d17180 state to ffff8803fea5e400
>[   17.978274] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff8800cd6e2000
>[   17.978274] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880409d17180 to [NOCRTC]
>[   17.978275] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880409d17180
>[   17.978276] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:34:crtc-2] to ffff8803fea5e400
>[   17.978277] [drm:drm_atomic_check_only] checking ffff8803fea5e400
>[   17.978279] [drm:drm_atomic_commit] commiting ffff8803fea5e400
>[   17.978281] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fea5e400
>[   17.978281] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fea5e400
>[   18.380536] [drm:drm_atomic_state_init] Allocated atomic state ffff880401449400
>[   18.380542] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff88040b8f1000 state to ffff880401449400
>[   18.380544] [drm:drm_atomic_check_only] checking ffff880401449400
>[   18.380550] [drm:drm_atomic_commit] commiting ffff880401449400
>[   18.380554] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401449400
>[   18.380556] [drm:drm_atomic_state_free] Freeing atomic state ffff880401449400
>[   18.380560] [drm:drm_atomic_state_init] Allocated atomic state ffff880401449400
>[   18.380562] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800cd6e1000 state to ffff880401449400
>[   18.380564] [drm:drm_atomic_check_only] checking ffff880401449400
>[   18.380566] [drm:drm_atomic_commit] commiting ffff880401449400
>[   18.380569] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401449400
>[   18.380570] [drm:drm_atomic_state_free] Freeing atomic state ffff880401449400
>[   18.521167] [drm:i915_gem_open] 
>[   18.585562] fuse init (API version 7.25)
>[   18.688971] [drm:drm_atomic_state_init] Allocated atomic state ffff880401449000
>[   18.688975] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff880400879780 state to ffff880401449000
>[   18.688977] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe955800 state to ffff880401449000
>[   18.688979] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880400879780 to [CRTC:26:crtc-0]
>[   18.688980] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff880400879780
>[   18.688981] [drm:drm_atomic_check_only] checking ffff880401449000
>[   18.688985] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   18.688986] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 0 -> 1, off 0, on 1, ms 0
>[   18.688990] [drm:drm_atomic_commit] commiting ffff880401449000
>[   18.689073] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401449000
>[   18.689075] [drm:drm_atomic_state_free] Freeing atomic state ffff880401449000
>[   18.689079] [drm:drm_atomic_state_init] Allocated atomic state ffff880401449000
>[   18.689080] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff880400879600 state to ffff880401449000
>[   18.689081] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe956000 state to ffff880401449000
>[   18.689082] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880400879600 to [NOCRTC]
>[   18.689083] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880400879600
>[   18.689084] [drm:drm_atomic_check_only] checking ffff880401449000
>[   18.689085] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb -1
>[   18.689086] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 0, off 1, on 0, ms 0
>[   18.689088] [drm:drm_atomic_commit] commiting ffff880401449000
>[   18.689094] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401449000
>[   18.689095] [drm:drm_atomic_state_free] Freeing atomic state ffff880401449000
>[   18.689487] [drm:drm_atomic_state_init] Allocated atomic state ffff880401449000
>[   18.689488] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff880400879780 state to ffff880401449000
>[   18.689490] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff880401449000
>[   18.689491] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880400879780 to [CRTC:30:crtc-1]
>[   18.689492] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff880400879780
>[   18.689493] [drm:drm_atomic_check_only] checking ffff880401449000
>[   18.689494] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 94
>[   18.689495] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 0 -> 1, off 0, on 1, ms 0
>[   18.689498] [drm:drm_atomic_commit] commiting ffff880401449000
>[   18.689587] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401449000
>[   18.689588] [drm:drm_atomic_state_free] Freeing atomic state ffff880401449000
>[   21.360885] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[   21.360898] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[   24.446900] [drm:i915_gem_open] 
>[   24.451998] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1]
>[   24.452003] [drm:intel_dp_detect] [CONNECTOR:39:eDP-1]
>[   24.452015] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   24.452024] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[   24.452348] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[   24.452662] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   24.453003] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1] probed modes :
>[   24.453007] [drm:drm_mode_debug_printmodeline] Modeline 65:"1366x768" 60 70000 1366 1402 1438 1476 768 772 780 790 0x8 0xa
>[   24.453185] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1]
>[   24.453187] [drm:intel_crt_detect] [CONNECTOR:36:VGA-1] force=1
>[   24.453197] [drm:intel_ironlake_crt_detect_hotplug] ironlake hotplug adpa=0xf40000, result 0
>[   24.453198] [drm:intel_crt_detect] CRT not detected via hotplug
>[   24.453368] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   24.453370] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK on first message, retry
>[   24.453537] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   24.453539] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   24.453541] [drm:intel_crt_get_edid] CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   24.453543] [drm:intel_gmbus_force_bit] enabling bit-banging on i915 gmbus vga. force bit now 1
>[   24.454559] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   24.454562] [drm:intel_gmbus_force_bit] disabling bit-banging on i915 gmbus vga. force bit now 0
>[   24.454564] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found]
>[   24.454566] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1] disconnected
>[   24.454579] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1]
>[   24.454580] [drm:intel_dp_detect] [CONNECTOR:45:DP-1]
>[   24.454589] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1] disconnected
>[   24.454596] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1]
>[   24.454598] [drm:intel_hdmi_detect] [CONNECTOR:49:HDMI-A-1]
>[   24.461077] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   24.560690] [drm:intel_hdmi_detect] HDMI live status down
>[   24.560697] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1] disconnected
>[   24.560720] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2]
>[   24.560722] [drm:intel_dp_detect] [CONNECTOR:52:DP-2]
>[   24.566055] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.571481] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.577368] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.583666] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.589059] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.594445] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.599825] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.605196] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.610562] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.615934] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.621288] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.626611] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.631944] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.637300] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.642644] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.647999] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.653322] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.658655] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.663988] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.669335] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.674663] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.679995] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.685306] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.690633] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.695962] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.701306] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.706654] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.711983] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.717311] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.722687] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.728038] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.733376] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.733380] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   24.733384] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2] disconnected
>[   24.733409] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2]
>[   24.733413] [drm:intel_hdmi_detect] [CONNECTOR:56:HDMI-A-2]
>[   24.761501] [drm:intel_hdmi_dp_dual_mode_detect] DP dual mode adaptor (type 1 HDMI) detected (max TMDS clock: 165000 kHz)
>[   24.761506] [drm:drm_detect_monitor_audio] Monitor has basic audio support
>[   24.761595] [drm:drm_edid_to_eld] ELD monitor M230HDL
>[   24.761598] [drm:parse_hdmi_vsdb] HDMI: DVI dual 0, max TMDS clock 0, latency present 0 0, video latency 0 0, audio latency 0 0
>[   24.761600] [drm:drm_edid_to_eld] ELD size 32, SAD count 1
>[   24.761645] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2] probed modes :
>[   24.761650] [drm:drm_mode_debug_printmodeline] Modeline 70:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0xa
>[   24.761654] [drm:drm_mode_debug_printmodeline] Modeline 122:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   24.761658] [drm:drm_mode_debug_printmodeline] Modeline 131:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   24.761661] [drm:drm_mode_debug_printmodeline] Modeline 120:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   24.761665] [drm:drm_mode_debug_printmodeline] Modeline 130:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   24.761668] [drm:drm_mode_debug_printmodeline] Modeline 123:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   24.761672] [drm:drm_mode_debug_printmodeline] Modeline 83:"1920x1080" 50 148350 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   24.761676] [drm:drm_mode_debug_printmodeline] Modeline 89:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   24.761679] [drm:drm_mode_debug_printmodeline] Modeline 95:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   24.761683] [drm:drm_mode_debug_printmodeline] Modeline 107:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   24.761687] [drm:drm_mode_debug_printmodeline] Modeline 96:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   24.761690] [drm:drm_mode_debug_printmodeline] Modeline 73:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[   24.761694] [drm:drm_mode_debug_printmodeline] Modeline 68:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   24.761698] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   24.761701] [drm:drm_mode_debug_printmodeline] Modeline 71:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   24.761705] [drm:drm_mode_debug_printmodeline] Modeline 84:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   24.761708] [drm:drm_mode_debug_printmodeline] Modeline 85:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   24.761712] [drm:drm_mode_debug_printmodeline] Modeline 86:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   24.761715] [drm:drm_mode_debug_printmodeline] Modeline 87:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   24.761719] [drm:drm_mode_debug_printmodeline] Modeline 88:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   24.761722] [drm:drm_mode_debug_printmodeline] Modeline 76:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   24.761726] [drm:drm_mode_debug_printmodeline] Modeline 77:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[   24.761730] [drm:drm_mode_debug_printmodeline] Modeline 72:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   24.761733] [drm:drm_mode_debug_printmodeline] Modeline 92:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   24.761737] [drm:drm_mode_debug_printmodeline] Modeline 103:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   24.761740] [drm:drm_mode_debug_printmodeline] Modeline 90:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   24.761743] [drm:drm_mode_debug_printmodeline] Modeline 78:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   24.761747] [drm:drm_mode_debug_printmodeline] Modeline 79:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   24.761750] [drm:drm_mode_debug_printmodeline] Modeline 80:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   24.761754] [drm:drm_mode_debug_printmodeline] Modeline 101:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   24.761758] [drm:drm_mode_debug_printmodeline] Modeline 81:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   24.761761] [drm:drm_mode_debug_printmodeline] Modeline 82:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   24.761925] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3]
>[   24.761928] [drm:intel_dp_detect] [CONNECTOR:58:DP-3]
>[   24.761939] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3] disconnected
>[   24.761946] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3]
>[   24.761948] [drm:intel_hdmi_detect] [CONNECTOR:62:HDMI-A-3]
>[   24.867370] [drm:intel_hdmi_detect] HDMI live status down
>[   24.867376] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3] disconnected
>[   24.869874] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1]
>[   24.869879] [drm:intel_dp_detect] [CONNECTOR:39:eDP-1]
>[   24.870220] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[   24.870542] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   24.870901] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1] probed modes :
>[   24.870907] [drm:drm_mode_debug_printmodeline] Modeline 65:"1366x768" 60 70000 1366 1402 1438 1476 768 772 780 790 0x8 0xa
>[   24.871073] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1]
>[   24.871077] [drm:intel_crt_detect] [CONNECTOR:36:VGA-1] force=1
>[   24.871086] [drm:intel_ironlake_crt_detect_hotplug] ironlake hotplug adpa=0xf40000, result 0
>[   24.871088] [drm:intel_crt_detect] CRT not detected via hotplug
>[   24.871259] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   24.871262] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK on first message, retry
>[   24.871434] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   24.871438] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   24.871439] [drm:intel_crt_get_edid] CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   24.871441] [drm:intel_gmbus_force_bit] enabling bit-banging on i915 gmbus vga. force bit now 1
>[   24.872361] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   24.872364] [drm:intel_gmbus_force_bit] disabling bit-banging on i915 gmbus vga. force bit now 0
>[   24.872366] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found]
>[   24.872368] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1] disconnected
>[   24.872380] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1]
>[   24.872381] [drm:intel_dp_detect] [CONNECTOR:45:DP-1]
>[   24.872390] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1] disconnected
>[   24.872397] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1]
>[   24.872398] [drm:intel_hdmi_detect] [CONNECTOR:49:HDMI-A-1]
>[   24.970014] [drm:i915_audio_component_sync_audio_rate] no valid port B
>[   24.974102] [drm:i915_audio_component_sync_audio_rate] no valid port B
>[   24.975224] [drm:i915_audio_component_sync_audio_rate] no valid port B
>[   24.980693] [drm:intel_hdmi_detect] HDMI live status down
>[   24.980709] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1] disconnected
>[   24.980730] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2]
>[   24.980731] [drm:intel_dp_detect] [CONNECTOR:52:DP-2]
>[   24.980792] [drm:i915_audio_component_sync_audio_rate] no valid port B
>[   24.981932] [drm:i915_audio_component_sync_audio_rate] no valid port B
>[   24.986108] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.987428] [drm:i915_audio_component_sync_audio_rate] no valid port B
>[   24.988599] [drm:i915_audio_component_sync_audio_rate] pipe B connects port C
>[   24.991478] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.994098] [drm:i915_audio_component_sync_audio_rate] pipe B connects port C
>[   24.996849] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   24.996974] [drm:i915_audio_component_sync_audio_rate] no valid port D
>[   24.997512] [drm:i915_audio_component_sync_audio_rate] no valid port D
>[   24.998720] [drm:i915_audio_component_sync_audio_rate] no valid port D
>[   25.002205] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.004092] [drm:i915_audio_component_sync_audio_rate] no valid port D
>[   25.005349] [drm:i915_audio_component_sync_audio_rate] no valid port D
>[   25.007576] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.010763] [drm:i915_audio_component_sync_audio_rate] no valid port D
>[   25.012947] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.018328] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.023705] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.029072] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.034435] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.039842] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.045197] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.050530] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.055886] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.061241] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.066590] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.071955] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.077296] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.082643] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.087963] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.093304] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.098677] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.104040] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.109380] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.114704] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.120058] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.125432] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.130781] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.136138] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.141502] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.146872] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.152244] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.152247] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   25.152251] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2] disconnected
>[   25.152289] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2]
>[   25.152292] [drm:intel_hdmi_detect] [CONNECTOR:56:HDMI-A-2]
>[   25.180702] [drm:intel_hdmi_dp_dual_mode_detect] DP dual mode adaptor (type 1 HDMI) detected (max TMDS clock: 165000 kHz)
>[   25.180707] [drm:drm_detect_monitor_audio] Monitor has basic audio support
>[   25.180770] [drm:drm_edid_to_eld] ELD monitor M230HDL
>[   25.180772] [drm:parse_hdmi_vsdb] HDMI: DVI dual 0, max TMDS clock 0, latency present 0 0, video latency 0 0, audio latency 0 0
>[   25.180773] [drm:drm_edid_to_eld] ELD size 32, SAD count 1
>[   25.180806] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2] probed modes :
>[   25.180808] [drm:drm_mode_debug_printmodeline] Modeline 70:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0xa
>[   25.180810] [drm:drm_mode_debug_printmodeline] Modeline 122:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   25.180812] [drm:drm_mode_debug_printmodeline] Modeline 131:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   25.180814] [drm:drm_mode_debug_printmodeline] Modeline 120:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   25.180816] [drm:drm_mode_debug_printmodeline] Modeline 130:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   25.180818] [drm:drm_mode_debug_printmodeline] Modeline 123:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   25.180820] [drm:drm_mode_debug_printmodeline] Modeline 83:"1920x1080" 50 148350 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   25.180822] [drm:drm_mode_debug_printmodeline] Modeline 89:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   25.180823] [drm:drm_mode_debug_printmodeline] Modeline 95:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   25.180825] [drm:drm_mode_debug_printmodeline] Modeline 107:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   25.180827] [drm:drm_mode_debug_printmodeline] Modeline 96:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   25.180829] [drm:drm_mode_debug_printmodeline] Modeline 73:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[   25.180831] [drm:drm_mode_debug_printmodeline] Modeline 68:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   25.180833] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   25.180835] [drm:drm_mode_debug_printmodeline] Modeline 71:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   25.180836] [drm:drm_mode_debug_printmodeline] Modeline 84:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   25.180838] [drm:drm_mode_debug_printmodeline] Modeline 85:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   25.180840] [drm:drm_mode_debug_printmodeline] Modeline 86:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   25.180842] [drm:drm_mode_debug_printmodeline] Modeline 87:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   25.180844] [drm:drm_mode_debug_printmodeline] Modeline 88:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   25.180845] [drm:drm_mode_debug_printmodeline] Modeline 76:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   25.180847] [drm:drm_mode_debug_printmodeline] Modeline 77:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[   25.180849] [drm:drm_mode_debug_printmodeline] Modeline 72:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   25.180851] [drm:drm_mode_debug_printmodeline] Modeline 92:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   25.180853] [drm:drm_mode_debug_printmodeline] Modeline 103:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   25.180854] [drm:drm_mode_debug_printmodeline] Modeline 90:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   25.180856] [drm:drm_mode_debug_printmodeline] Modeline 78:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   25.180858] [drm:drm_mode_debug_printmodeline] Modeline 79:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   25.180860] [drm:drm_mode_debug_printmodeline] Modeline 80:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   25.180861] [drm:drm_mode_debug_printmodeline] Modeline 101:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   25.180863] [drm:drm_mode_debug_printmodeline] Modeline 81:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   25.180865] [drm:drm_mode_debug_printmodeline] Modeline 82:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   25.180988] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3]
>[   25.180990] [drm:intel_dp_detect] [CONNECTOR:58:DP-3]
>[   25.180999] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3] disconnected
>[   25.181004] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3]
>[   25.181005] [drm:intel_hdmi_detect] [CONNECTOR:62:HDMI-A-3]
>[   25.287360] [drm:intel_hdmi_detect] HDMI live status down
>[   25.287367] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3] disconnected
>[   25.290609] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1]
>[   25.290613] [drm:intel_dp_detect] [CONNECTOR:39:eDP-1]
>[   25.290954] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[   25.291267] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   25.291605] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1] probed modes :
>[   25.291608] [drm:drm_mode_debug_printmodeline] Modeline 65:"1366x768" 60 70000 1366 1402 1438 1476 768 772 780 790 0x8 0xa
>[   25.291715] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1]
>[   25.291716] [drm:intel_crt_detect] [CONNECTOR:36:VGA-1] force=1
>[   25.291724] [drm:intel_ironlake_crt_detect_hotplug] ironlake hotplug adpa=0xf40000, result 0
>[   25.291725] [drm:intel_crt_detect] CRT not detected via hotplug
>[   25.291885] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   25.291886] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK on first message, retry
>[   25.292042] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   25.292043] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   25.292044] [drm:intel_crt_get_edid] CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   25.292046] [drm:intel_gmbus_force_bit] enabling bit-banging on i915 gmbus vga. force bit now 1
>[   25.292980] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   25.292982] [drm:intel_gmbus_force_bit] disabling bit-banging on i915 gmbus vga. force bit now 0
>[   25.292983] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found]
>[   25.292984] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1] disconnected
>[   25.292989] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1]
>[   25.292990] [drm:intel_dp_detect] [CONNECTOR:45:DP-1]
>[   25.292993] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1] disconnected
>[   25.292997] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1]
>[   25.292998] [drm:intel_hdmi_detect] [CONNECTOR:49:HDMI-A-1]
>[   25.397357] [drm:intel_hdmi_detect] HDMI live status down
>[   25.397365] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1] disconnected
>[   25.397393] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2]
>[   25.397394] [drm:intel_dp_detect] [CONNECTOR:52:DP-2]
>[   25.402779] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.408155] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.413526] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.418900] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.424271] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.429637] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.435017] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.440375] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.445735] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.451089] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.456451] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.461813] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.467166] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.472533] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.477895] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.483256] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.488620] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.493988] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.499348] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.504723] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.510082] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.515459] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.520825] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.526188] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.531554] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.536924] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.542290] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.547653] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.553013] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.558370] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.563727] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.569084] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.569086] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   25.569088] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2] disconnected
>[   25.569115] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2]
>[   25.569118] [drm:intel_hdmi_detect] [CONNECTOR:56:HDMI-A-2]
>[   25.597551] [drm:intel_hdmi_dp_dual_mode_detect] DP dual mode adaptor (type 1 HDMI) detected (max TMDS clock: 165000 kHz)
>[   25.597555] [drm:drm_detect_monitor_audio] Monitor has basic audio support
>[   25.597617] [drm:drm_edid_to_eld] ELD monitor M230HDL
>[   25.597620] [drm:parse_hdmi_vsdb] HDMI: DVI dual 0, max TMDS clock 0, latency present 0 0, video latency 0 0, audio latency 0 0
>[   25.597621] [drm:drm_edid_to_eld] ELD size 32, SAD count 1
>[   25.597653] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2] probed modes :
>[   25.597656] [drm:drm_mode_debug_printmodeline] Modeline 70:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0xa
>[   25.597659] [drm:drm_mode_debug_printmodeline] Modeline 122:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   25.597660] [drm:drm_mode_debug_printmodeline] Modeline 131:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   25.597662] [drm:drm_mode_debug_printmodeline] Modeline 120:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   25.597664] [drm:drm_mode_debug_printmodeline] Modeline 130:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   25.597666] [drm:drm_mode_debug_printmodeline] Modeline 123:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   25.597668] [drm:drm_mode_debug_printmodeline] Modeline 83:"1920x1080" 50 148350 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   25.597670] [drm:drm_mode_debug_printmodeline] Modeline 89:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   25.597672] [drm:drm_mode_debug_printmodeline] Modeline 95:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   25.597673] [drm:drm_mode_debug_printmodeline] Modeline 107:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   25.597675] [drm:drm_mode_debug_printmodeline] Modeline 96:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   25.597677] [drm:drm_mode_debug_printmodeline] Modeline 73:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[   25.597679] [drm:drm_mode_debug_printmodeline] Modeline 68:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   25.597681] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   25.597683] [drm:drm_mode_debug_printmodeline] Modeline 71:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   25.597685] [drm:drm_mode_debug_printmodeline] Modeline 84:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   25.597686] [drm:drm_mode_debug_printmodeline] Modeline 85:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   25.597688] [drm:drm_mode_debug_printmodeline] Modeline 86:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   25.597690] [drm:drm_mode_debug_printmodeline] Modeline 87:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   25.597692] [drm:drm_mode_debug_printmodeline] Modeline 88:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   25.597694] [drm:drm_mode_debug_printmodeline] Modeline 76:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   25.597695] [drm:drm_mode_debug_printmodeline] Modeline 77:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[   25.597697] [drm:drm_mode_debug_printmodeline] Modeline 72:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   25.597699] [drm:drm_mode_debug_printmodeline] Modeline 92:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   25.597701] [drm:drm_mode_debug_printmodeline] Modeline 103:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   25.597703] [drm:drm_mode_debug_printmodeline] Modeline 90:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   25.597704] [drm:drm_mode_debug_printmodeline] Modeline 78:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   25.597706] [drm:drm_mode_debug_printmodeline] Modeline 79:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   25.597708] [drm:drm_mode_debug_printmodeline] Modeline 80:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   25.597710] [drm:drm_mode_debug_printmodeline] Modeline 101:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   25.597712] [drm:drm_mode_debug_printmodeline] Modeline 81:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   25.597713] [drm:drm_mode_debug_printmodeline] Modeline 82:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   25.597830] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3]
>[   25.597832] [drm:intel_dp_detect] [CONNECTOR:58:DP-3]
>[   25.597842] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3] disconnected
>[   25.597847] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3]
>[   25.597848] [drm:intel_hdmi_detect] [CONNECTOR:62:HDMI-A-3]
>[   25.704045] [drm:intel_hdmi_detect] HDMI live status down
>[   25.704052] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3] disconnected
>[   25.726702] [drm:drm_atomic_state_init] Allocated atomic state ffff880409e5a400
>[   25.726711] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d96bf800 state to ffff880409e5a400
>[   25.726714] [drm:drm_atomic_check_only] checking ffff880409e5a400
>[   25.726718] [drm:drm_atomic_helper_check_modeset] [CRTC:30:crtc-1] active changed
>[   25.726720] [drm:drm_atomic_helper_check_modeset] [CRTC:30:crtc-1] needs all connectors, enable: y, active: n
>[   25.726723] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff880409e5a400
>[   25.726726] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:56] ffff8804031ce480 state to ffff880409e5a400
>[   25.726730] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane-3] ffff8804017dccc0 state to ffff880409e5a400
>[   25.726733] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8804017dc0c0 state to ffff880409e5a400
>[   25.726736] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff880409e5a400
>[   25.726740] [drm:connected_sink_compute_bpp] [CONNECTOR:56:HDMI-A-2] checking for sink bpp constrains
>[   25.726742] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to EDID reported max of 24
>[   25.726750] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[   25.726752] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[   25.726755] [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[   25.726758] [drm:intel_dump_pipe_config] [CRTC:30][modeset] config ffff8800d96bf800 for pipe B
>[   25.726760] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   25.726762] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   25.726765] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   25.726768] [drm:intel_dump_pipe_config] dp: 0, lanes: 4, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   25.726770] [drm:intel_dump_pipe_config] dp: 0, lanes: 4, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   25.726772] [drm:intel_dump_pipe_config] audio: 1, infoframes: 1
>[   25.726774] [drm:intel_dump_pipe_config] requested mode:
>[   25.726778] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0xa
>[   25.726780] [drm:intel_dump_pipe_config] adjusted mode:
>[   25.726783] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0xa
>[   25.726787] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x0 flags: 0xa
>[   25.726789] [drm:intel_dump_pipe_config] port clock: 148500
>[   25.726791] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   25.726793] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[   25.726795] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   25.726797] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   25.726799] [drm:intel_dump_pipe_config] ips: 0
>[   25.726801] [drm:intel_dump_pipe_config] double wide: 0
>[   25.726803] [drm:intel_dump_pipe_config] ddi_pll_sel: 0x80000000; dpll_hw_state: wrpll: 0xb0210614 spll: 0x0
>[   25.726805] [drm:intel_dump_pipe_config] planes on this crtc
>[   25.726808] [drm:intel_dump_pipe_config] STANDARD PLANE:28 plane: 1.0 idx: 3 enabled
>[   25.726811] [drm:intel_dump_pipe_config] 	FB:91, fb = 3286x1080 format = 0x34325258
>[   25.726814] [drm:intel_dump_pipe_config] 	scaler:0 src (1366, 0) 1920x1080 dst (0, 0) 1920x1080
>[   25.726816] [drm:intel_dump_pipe_config] CURSOR PLANE:29 plane: 1.2 idx: 4 enabled
>[   25.726818] [drm:intel_dump_pipe_config] 	FB:94, fb = 256x256 format = 0x34325241
>[   25.726821] [drm:intel_dump_pipe_config] 	scaler:0 src (0, 0) 256x256 dst (273, 536) 256x256
>[   25.726824] [drm:intel_dump_pipe_config] STANDARD PLANE:31 plane: 1.1 idx: 5 disabled, scaler_id = 0
>[   25.726830] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:28] with fb 91
>[   25.726833] [drm:intel_plane_atomic_calc_changes] [PLANE:28] visible 1 -> 0, off 1, on 0, ms 1
>[   25.726836] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 94
>[   25.726838] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 0, off 1, on 0, ms 1
>[   25.728765] [drm:intel_find_shared_dpll] CRTC:30 allocated WRPLL 1
>[   25.728769] [drm:intel_reference_shared_dpll] using WRPLL 1 for pipe B
>[   25.728777] [drm:drm_atomic_commit] commiting ffff880409e5a400
>[   25.736696] [drm:hsw_audio_codec_disable] Disable audio codec on pipe B
>[   25.736714] [drm:intel_disable_pipe] disabling pipe B
>[   25.753976] [drm:intel_disable_shared_dpll] disable WRPLL 1 (active 2, on? 1) for crtc 30
>[   25.753982] [drm:intel_disable_shared_dpll] disabling WRPLL 1
>[   25.753989] [drm:verify_encoder_state] [ENCODER:37:DAC-37]
>[   25.753993] [drm:verify_encoder_state] [ENCODER:38:TMDS-38]
>[   25.753995] [drm:verify_encoder_state] [ENCODER:44:TMDS-44]
>[   25.753998] [drm:verify_encoder_state] [ENCODER:46:DP MST-46]
>[   25.754000] [drm:verify_encoder_state] [ENCODER:47:DP MST-47]
>[   25.754001] [drm:verify_encoder_state] [ENCODER:48:DP MST-48]
>[   25.754003] [drm:verify_encoder_state] [ENCODER:51:TMDS-51]
>[   25.754005] [drm:verify_encoder_state] [ENCODER:53:DP MST-53]
>[   25.754007] [drm:verify_encoder_state] [ENCODER:54:DP MST-54]
>[   25.754009] [drm:verify_encoder_state] [ENCODER:55:DP MST-55]
>[   25.754010] [drm:verify_encoder_state] [ENCODER:57:TMDS-57]
>[   25.754013] [drm:verify_encoder_state] [ENCODER:59:DP MST-59]
>[   25.754014] [drm:verify_encoder_state] [ENCODER:60:DP MST-60]
>[   25.754016] [drm:verify_encoder_state] [ENCODER:61:DP MST-61]
>[   25.754018] [drm:intel_connector_verify_state] [CONNECTOR:36:VGA-1]
>[   25.754020] [drm:intel_connector_verify_state] [CONNECTOR:45:DP-1]
>[   25.754023] [drm:intel_connector_verify_state] [CONNECTOR:49:HDMI-A-1]
>[   25.754025] [drm:intel_connector_verify_state] [CONNECTOR:52:DP-2]
>[   25.754027] [drm:intel_connector_verify_state] [CONNECTOR:58:DP-3]
>[   25.754030] [drm:intel_connector_verify_state] [CONNECTOR:62:HDMI-A-3]
>[   25.754032] [drm:verify_single_dpll_state] WRPLL 1
>[   25.754034] [drm:verify_single_dpll_state] WRPLL 2
>[   25.754036] [drm:verify_single_dpll_state] SPLL
>[   25.754038] [drm:verify_single_dpll_state] LCPLL 810
>[   25.754040] [drm:verify_single_dpll_state] LCPLL 1350
>[   25.754041] [drm:verify_single_dpll_state] LCPLL 2700
>[   25.754048] [drm:intel_connector_verify_state] [CONNECTOR:56:HDMI-A-2]
>[   25.754051] [drm:verify_crtc_state] [CRTC:30]
>[   25.754055] [drm:verify_single_dpll_state] WRPLL 1
>[   25.754061] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880409e5a400
>[   25.754065] [drm:drm_atomic_state_free] Freeing atomic state ffff880409e5a400
>[   25.754874] [drm:drm_atomic_state_init] Allocated atomic state ffff880409e5a400
>[   25.754879] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8804017dce40 state to ffff880409e5a400
>[   25.754882] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d96bf000 state to ffff880409e5a400
>[   25.754885] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804017dce40 to [CRTC:26:crtc-0]
>[   25.754887] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8804017dce40
>[   25.754889] [drm:drm_atomic_check_only] checking ffff880409e5a400
>[   25.754894] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 75
>[   25.754897] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 0 -> 1, off 0, on 1, ms 0
>[   25.754903] [drm:drm_atomic_commit] commiting ffff880409e5a400
>[   25.754920] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880409e5a400
>[   25.754923] [drm:drm_atomic_state_free] Freeing atomic state ffff880409e5a400
>[   25.754988] [drm:drm_atomic_state_init] Allocated atomic state ffff880409e5a400
>[   25.754991] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8804017dcf00 state to ffff880409e5a400
>[   25.754993] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d96be800 state to ffff880409e5a400
>[   25.754995] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804017dcf00 to [CRTC:26:crtc-0]
>[   25.754997] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8804017dcf00
>[   25.754999] [drm:drm_atomic_check_only] checking ffff880409e5a400
>[   25.755002] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 75
>[   25.755004] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   25.755008] [drm:drm_atomic_commit] commiting ffff880409e5a400
>[   25.755016] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880409e5a400
>[   25.755019] [drm:drm_atomic_state_free] Freeing atomic state ffff880409e5a400
>[   25.755033] [drm:drm_atomic_state_init] Allocated atomic state ffff880409e5a400
>[   25.755035] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8804017dce40 state to ffff880409e5a400
>[   25.755037] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d96bf000 state to ffff880409e5a400
>[   25.755039] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804017dce40 to [CRTC:26:crtc-0]
>[   25.755041] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8804017dce40
>[   25.755043] [drm:drm_atomic_check_only] checking ffff880409e5a400
>[   25.755045] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 75
>[   25.755047] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   25.755050] [drm:drm_atomic_commit] commiting ffff880409e5a400
>[   25.755057] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880409e5a400
>[   25.755059] [drm:drm_atomic_state_free] Freeing atomic state ffff880409e5a400
>[   25.755070] [drm:drm_atomic_state_init] Allocated atomic state ffff880409e5a400
>[   25.755072] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8804017dcf00 state to ffff880409e5a400
>[   25.755074] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d96be800 state to ffff880409e5a400
>[   25.755076] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804017dcf00 to [CRTC:26:crtc-0]
>[   25.755078] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8804017dcf00
>[   25.755080] [drm:drm_atomic_check_only] checking ffff880409e5a400
>[   25.755082] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 75
>[   25.755084] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   25.755087] [drm:drm_atomic_commit] commiting ffff880409e5a400
>[   25.755095] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880409e5a400
>[   25.755096] [drm:drm_atomic_state_free] Freeing atomic state ffff880409e5a400
>[   25.755108] [drm:drm_atomic_state_init] Allocated atomic state ffff880409e5a400
>[   25.755110] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8804017dce40 state to ffff880409e5a400
>[   25.755112] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d96bf000 state to ffff880409e5a400
>[   25.755114] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804017dce40 to [CRTC:26:crtc-0]
>[   25.755116] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8804017dce40
>[   25.755118] [drm:drm_atomic_check_only] checking ffff880409e5a400
>[   25.755120] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 75
>[   25.755122] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   25.755125] [drm:drm_atomic_commit] commiting ffff880409e5a400
>[   25.755132] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880409e5a400
>[   25.755134] [drm:drm_atomic_state_free] Freeing atomic state ffff880409e5a400
>[   25.755485] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ef001000
>[   25.755489] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8804017dcf00 state to ffff8803ef001000
>[   25.755491] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d96be800 state to ffff8803ef001000
>[   25.755493] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804017dcf00 to [NOCRTC]
>[   25.755495] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8804017dcf00
>[   25.755497] [drm:drm_atomic_check_only] checking ffff8803ef001000
>[   25.755500] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb -1
>[   25.755502] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 0, off 1, on 0, ms 0
>[   25.755506] [drm:drm_atomic_commit] commiting ffff8803ef001000
>[   25.755518] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ef001000
>[   25.755520] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ef001000
>[   25.755592] [drm:drm_mode_addfb2] [FB:75]
>[   25.755667] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ef001000
>[   25.755671] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d96bf000 state to ffff8803ef001000
>[   25.755673] [drm:drm_atomic_check_only] checking ffff8803ef001000
>[   25.755678] [drm:drm_atomic_commit] commiting ffff8803ef001000
>[   25.755723] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ef001000
>[   25.755725] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ef001000
>[   25.755730] [drm:drm_mode_setcrtc] [CRTC:26:crtc-0]
>[   25.755734] [drm:drm_mode_setcrtc] [CONNECTOR:39:eDP-1]
>[   25.755736] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ef001000
>[   25.755738] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d96be800 state to ffff8803ef001000
>[   25.755741] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane-0] ffff8804017dce40 state to ffff8803ef001000
>[   25.755744] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:] for CRTC state ffff8800d96be800
>[   25.755746] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804017dce40 to [CRTC:26:crtc-0]
>[   25.755748] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8804017dce40
>[   25.755750] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:26:crtc-0] to ffff8803ef001000
>[   25.755754] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff8804031ce4a0 state to ffff8803ef001000
>[   25.755756] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8804031ce4a0 to [NOCRTC]
>[   25.755758] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8804031ce4a0 to [CRTC:26:crtc-0]
>[   25.755760] [drm:drm_atomic_check_only] checking ffff8803ef001000
>[   25.755763] [drm:update_connector_routing] Updating routing for [CONNECTOR:39:eDP-1]
>[   25.755766] [drm:update_connector_routing] [CONNECTOR:39:eDP-1] keeps [ENCODER:38:TMDS-38], now on [CRTC:26:crtc-0]
>[   25.755769] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:23] with fb 75
>[   25.755771] [drm:intel_plane_atomic_calc_changes] [PLANE:23] visible 1 -> 1, off 0, on 0, ms 0
>[   25.755775] [drm:drm_atomic_commit] commiting ffff8803ef001000
>[   25.762291] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ef001000
>[   25.762299] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ef001000
>[   25.762322] [drm:drm_atomic_state_init] Allocated atomic state ffff8800cd638400
>[   25.762326] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8804052b1800 state to ffff8800cd638400
>[   25.762328] [drm:drm_atomic_check_only] checking ffff8800cd638400
>[   25.762335] [drm:drm_atomic_commit] commiting ffff8800cd638400
>[   25.762340] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800cd638400
>[   25.762342] [drm:drm_atomic_state_free] Freeing atomic state ffff8800cd638400
>[   25.762356] [drm:drm_atomic_state_init] Allocated atomic state ffff8800cd638400
>[   25.762359] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8804052b7800 state to ffff8800cd638400
>[   25.762362] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane-3] ffff88040af90840 state to ffff8800cd638400
>[   25.762364] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff8804052b7800
>[   25.762366] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88040af90840 to [NOCRTC]
>[   25.762368] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88040af90840
>[   25.762370] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff8800cd638400
>[   25.762374] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:56] ffff8804048c5f80 state to ffff8800cd638400
>[   25.762376] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8804048c5f80 to [NOCRTC]
>[   25.762378] [drm:drm_atomic_check_only] checking ffff8800cd638400
>[   25.762380] [drm:drm_atomic_helper_check_modeset] [CRTC:30:crtc-1] mode changed
>[   25.762382] [drm:drm_atomic_helper_check_modeset] [CRTC:30:crtc-1] enable changed
>[   25.762384] [drm:update_connector_routing] Updating routing for [CONNECTOR:56:HDMI-A-2]
>[   25.762386] [drm:update_connector_routing] Disabling [CONNECTOR:56:HDMI-A-2]
>[   25.762389] [drm:drm_atomic_helper_check_modeset] [CRTC:30:crtc-1] needs all connectors, enable: n, active: n
>[   25.762391] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff8800cd638400
>[   25.762394] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff88040af90900 state to ffff8800cd638400
>[   25.762401] [drm:drm_atomic_commit] commiting ffff8800cd638400
>[   25.762409] [drm:verify_encoder_state] [ENCODER:37:DAC-37]
>[   25.762412] [drm:verify_encoder_state] [ENCODER:38:TMDS-38]
>[   25.762414] [drm:verify_encoder_state] [ENCODER:44:TMDS-44]
>[   25.762417] [drm:verify_encoder_state] [ENCODER:46:DP MST-46]
>[   25.762418] [drm:verify_encoder_state] [ENCODER:47:DP MST-47]
>[   25.762420] [drm:verify_encoder_state] [ENCODER:48:DP MST-48]
>[   25.762422] [drm:verify_encoder_state] [ENCODER:51:TMDS-51]
>[   25.762424] [drm:verify_encoder_state] [ENCODER:53:DP MST-53]
>[   25.762426] [drm:verify_encoder_state] [ENCODER:54:DP MST-54]
>[   25.762427] [drm:verify_encoder_state] [ENCODER:55:DP MST-55]
>[   25.762429] [drm:verify_encoder_state] [ENCODER:57:TMDS-57]
>[   25.762431] [drm:verify_encoder_state] [ENCODER:59:DP MST-59]
>[   25.762433] [drm:verify_encoder_state] [ENCODER:60:DP MST-60]
>[   25.762435] [drm:verify_encoder_state] [ENCODER:61:DP MST-61]
>[   25.762437] [drm:intel_connector_verify_state] [CONNECTOR:36:VGA-1]
>[   25.762439] [drm:intel_connector_verify_state] [CONNECTOR:45:DP-1]
>[   25.762442] [drm:intel_connector_verify_state] [CONNECTOR:49:HDMI-A-1]
>[   25.762444] [drm:intel_connector_verify_state] [CONNECTOR:52:DP-2]
>[   25.762446] [drm:intel_connector_verify_state] [CONNECTOR:56:HDMI-A-2]
>[   25.762449] [drm:intel_connector_verify_state] [CONNECTOR:58:DP-3]
>[   25.762451] [drm:intel_connector_verify_state] [CONNECTOR:62:HDMI-A-3]
>[   25.762453] [drm:verify_single_dpll_state] WRPLL 1
>[   25.762455] [drm:verify_single_dpll_state] WRPLL 2
>[   25.762457] [drm:verify_single_dpll_state] SPLL
>[   25.762459] [drm:verify_single_dpll_state] LCPLL 810
>[   25.762460] [drm:verify_single_dpll_state] LCPLL 1350
>[   25.762462] [drm:verify_single_dpll_state] LCPLL 2700
>[   25.762464] [drm:verify_crtc_state] [CRTC:30]
>[   25.762469] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800cd638400
>[   25.762471] [drm:drm_atomic_state_free] Freeing atomic state ffff8800cd638400
>[   25.763266] [drm:drm_atomic_state_init] Allocated atomic state ffff8800cd638400
>[   25.763270] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff88040af909c0 state to ffff8800cd638400
>[   25.763275] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f1b58000 state to ffff8800cd638400
>[   25.763277] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88040af909c0 to [CRTC:26:crtc-0]
>[   25.763279] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff88040af909c0
>[   25.763281] [drm:drm_atomic_check_only] checking ffff8800cd638400
>[   25.763286] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 91
>[   25.763288] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 0 -> 1, off 0, on 1, ms 0
>[   25.763293] [drm:drm_atomic_commit] commiting ffff8800cd638400
>[   25.763306] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800cd638400
>[   25.763309] [drm:drm_atomic_state_free] Freeing atomic state ffff8800cd638400
>[   25.763618] [drm:drm_atomic_state_init] Allocated atomic state ffff8800cd638400
>[   25.763621] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff88040af90540 state to ffff8800cd638400
>[   25.763624] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f1b58800 state to ffff8800cd638400
>[   25.763627] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88040af90540 to [CRTC:26:crtc-0]
>[   25.763629] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff88040af90540
>[   25.763631] [drm:drm_atomic_check_only] checking ffff8800cd638400
>[   25.763635] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 91
>[   25.763637] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   25.763641] [drm:drm_atomic_commit] commiting ffff8800cd638400
>[   25.763652] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800cd638400
>[   25.763655] [drm:drm_atomic_state_free] Freeing atomic state ffff8800cd638400
>[   25.763731] [drm:drm_atomic_state_init] Allocated atomic state ffff8800cd639400
>[   25.763735] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f1b58000 state to ffff8800cd639400
>[   25.763738] [drm:drm_atomic_check_only] checking ffff8800cd639400
>[   25.763742] [drm:drm_atomic_commit] commiting ffff8800cd639400
>[   25.763747] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800cd639400
>[   25.763749] [drm:drm_atomic_state_free] Freeing atomic state ffff8800cd639400
>[   25.763754] [drm:drm_mode_setcrtc] [CRTC:30:crtc-1]
>[   25.763758] [drm:drm_mode_setcrtc] [CONNECTOR:56:HDMI-A-2]
>[   25.763760] [drm:drm_atomic_state_init] Allocated atomic state ffff8800cd639400
>[   25.763763] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f1b59000 state to ffff8800cd639400
>[   25.763766] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane-3] ffff88040af909c0 state to ffff8800cd639400
>[   25.763768] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:] for CRTC state ffff8803f1b59000
>[   25.763771] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88040af909c0 to [CRTC:30:crtc-1]
>[   25.763772] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff88040af909c0
>[   25.763775] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff8800cd639400
>[   25.763778] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:56] ffff8804048c5b60 state to ffff8800cd639400
>[   25.763780] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8804048c5b60 to [CRTC:30:crtc-1]
>[   25.763782] [drm:drm_atomic_check_only] checking ffff8800cd639400
>[   25.763784] [drm:drm_atomic_helper_check_modeset] [CRTC:30:crtc-1] mode changed
>[   25.763786] [drm:drm_atomic_helper_check_modeset] [CRTC:30:crtc-1] enable changed
>[   25.763789] [drm:update_connector_routing] Updating routing for [CONNECTOR:56:HDMI-A-2]
>[   25.763792] [drm:update_connector_routing] [CONNECTOR:56:HDMI-A-2] using [ENCODER:51:TMDS-51] on [CRTC:30:crtc-1]
>[   25.763794] [drm:drm_atomic_helper_check_modeset] [CRTC:30:crtc-1] active changed
>[   25.763796] [drm:drm_atomic_helper_check_modeset] [CRTC:30:crtc-1] needs all connectors, enable: y, active: y
>[   25.763798] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff8800cd639400
>[   25.763801] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff88040af90b40 state to ffff8800cd639400
>[   25.763804] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff8800cd639400
>[   25.763807] [drm:connected_sink_compute_bpp] [CONNECTOR:56:HDMI-A-2] checking for sink bpp constrains
>[   25.763809] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to EDID reported max of 24
>[   25.763816] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[   25.763817] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[   25.763820] [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[   25.763823] [drm:intel_dump_pipe_config] [CRTC:30][modeset] config ffff8803f1b59000 for pipe B
>[   25.763825] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   25.763827] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   25.763829] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   25.763832] [drm:intel_dump_pipe_config] dp: 0, lanes: 4, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   25.763835] [drm:intel_dump_pipe_config] dp: 0, lanes: 4, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   25.763836] [drm:intel_dump_pipe_config] audio: 1, infoframes: 1
>[   25.763838] [drm:intel_dump_pipe_config] requested mode:
>[   25.763841] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0xa
>[   25.763843] [drm:intel_dump_pipe_config] adjusted mode:
>[   25.763846] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0xa
>[   25.763849] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x0 flags: 0xa
>[   25.763851] [drm:intel_dump_pipe_config] port clock: 148500
>[   25.763853] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   25.763855] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[   25.763857] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   25.763859] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   25.763861] [drm:intel_dump_pipe_config] ips: 0
>[   25.763862] [drm:intel_dump_pipe_config] double wide: 0
>[   25.763864] [drm:intel_dump_pipe_config] ddi_pll_sel: 0x80000000; dpll_hw_state: wrpll: 0xb0210614 spll: 0x0
>[   25.763866] [drm:intel_dump_pipe_config] planes on this crtc
>[   25.763868] [drm:intel_dump_pipe_config] STANDARD PLANE:28 plane: 1.0 idx: 3 disabled, scaler_id = 0
>[   25.763871] [drm:intel_dump_pipe_config] CURSOR PLANE:29 plane: 1.2 idx: 4 enabled
>[   25.763873] [drm:intel_dump_pipe_config] 	FB:94, fb = 256x256 format = 0x34325241
>[   25.763876] [drm:intel_dump_pipe_config] 	scaler:0 src (0, 0) 4294967023x4294966760 dst (273, 536) 4294967023x4294966760
>[   25.763879] [drm:intel_dump_pipe_config] STANDARD PLANE:31 plane: 1.1 idx: 5 disabled, scaler_id = 0
>[   25.763883] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f1b59800 state to ffff8800cd639400
>[   25.763885] [drm:drm_atomic_get_crtc_state] Added [CRTC:34:crtc-2] ffff8803f1b5a000 state to ffff8800cd639400
>[   25.763888] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:28] with fb 75
>[   25.763891] [drm:intel_plane_atomic_calc_changes] [PLANE:28] visible 0 -> 1, off 0, on 1, ms 1
>[   25.763893] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 94
>[   25.763895] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 0 -> 1, off 0, on 1, ms 1
>[   25.765656] [drm:intel_find_shared_dpll] CRTC:30 allocated WRPLL 1
>[   25.765658] [drm:intel_reference_shared_dpll] using WRPLL 1 for pipe B
>[   25.765667] [drm:drm_atomic_commit] commiting ffff8800cd639400
>[   25.766018] [drm:verify_encoder_state] [ENCODER:37:DAC-37]
>[   25.766022] [drm:verify_encoder_state] [ENCODER:38:TMDS-38]
>[   25.766024] [drm:verify_encoder_state] [ENCODER:44:TMDS-44]
>[   25.766026] [drm:verify_encoder_state] [ENCODER:46:DP MST-46]
>[   25.766029] [drm:verify_encoder_state] [ENCODER:47:DP MST-47]
>[   25.766031] [drm:verify_encoder_state] [ENCODER:48:DP MST-48]
>[   25.766033] [drm:verify_encoder_state] [ENCODER:51:TMDS-51]
>[   25.766034] [drm:verify_encoder_state] [ENCODER:53:DP MST-53]
>[   25.766037] [drm:verify_encoder_state] [ENCODER:54:DP MST-54]
>[   25.766039] [drm:verify_encoder_state] [ENCODER:55:DP MST-55]
>[   25.766041] [drm:verify_encoder_state] [ENCODER:57:TMDS-57]
>[   25.766044] [drm:verify_encoder_state] [ENCODER:59:DP MST-59]
>[   25.766046] [drm:verify_encoder_state] [ENCODER:60:DP MST-60]
>[   25.766047] [drm:verify_encoder_state] [ENCODER:61:DP MST-61]
>[   25.766050] [drm:intel_connector_verify_state] [CONNECTOR:36:VGA-1]
>[   25.766052] [drm:intel_connector_verify_state] [CONNECTOR:45:DP-1]
>[   25.766055] [drm:intel_connector_verify_state] [CONNECTOR:49:HDMI-A-1]
>[   25.766057] [drm:intel_connector_verify_state] [CONNECTOR:52:DP-2]
>[   25.766061] [drm:intel_connector_verify_state] [CONNECTOR:58:DP-3]
>[   25.766063] [drm:intel_connector_verify_state] [CONNECTOR:62:HDMI-A-3]
>[   25.766066] [drm:verify_single_dpll_state] WRPLL 1
>[   25.766068] [drm:verify_single_dpll_state] WRPLL 2
>[   25.766070] [drm:verify_single_dpll_state] SPLL
>[   25.766072] [drm:verify_single_dpll_state] LCPLL 810
>[   25.766074] [drm:verify_single_dpll_state] LCPLL 1350
>[   25.766075] [drm:verify_single_dpll_state] LCPLL 2700
>[   25.766080] [drm:intel_enable_shared_dpll] enable WRPLL 1 (active 2, on? 0) for crtc 30
>[   25.766082] [drm:intel_enable_shared_dpll] enabling WRPLL 1
>[   25.766166] [drm:intel_enable_pipe] enabling pipe B
>[   25.766174] [drm:intel_audio_codec_enable] ELD on [CONNECTOR:56:HDMI-A-2], [ENCODER:51:TMDS-51]
>[   25.766177] [drm:hsw_audio_codec_enable] Enable audio codec on pipe B, 32 bytes ELD
>[   25.766182] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 148500 (0x00090000)
>[   25.812307] [drm:intel_connector_verify_state] [CONNECTOR:56:HDMI-A-2]
>[   25.812314] [drm:verify_crtc_state] [CRTC:30]
>[   25.812326] [drm:verify_single_dpll_state] WRPLL 1
>[   25.812330] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800cd639400
>[   25.812334] [drm:drm_atomic_state_free] Freeing atomic state ffff8800cd639400
>[   25.812355] [drm:drm_atomic_state_init] Allocated atomic state ffff8800cd639400
>[   25.812358] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f1b58000 state to ffff8800cd639400
>[   25.812360] [drm:drm_atomic_check_only] checking ffff8800cd639400
>[   25.812365] [drm:drm_atomic_commit] commiting ffff8800cd639400
>[   25.812369] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800cd639400
>[   25.812371] [drm:drm_atomic_state_free] Freeing atomic state ffff8800cd639400
>[   25.812815] [drm:drm_atomic_state_init] Allocated atomic state ffff8800cd639400
>[   25.812818] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff88040af90900 state to ffff8800cd639400
>[   25.812820] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f1b59000 state to ffff8800cd639400
>[   25.812821] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88040af90900 to [CRTC:26:crtc-0]
>[   25.812823] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff88040af90900
>[   25.812824] [drm:drm_atomic_check_only] checking ffff8800cd639400
>[   25.812827] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   25.812829] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   25.812833] [drm:drm_atomic_commit] commiting ffff8800cd639400
>[   25.812843] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800cd639400
>[   25.812845] [drm:drm_atomic_state_free] Freeing atomic state ffff8800cd639400
>[   25.813424] [drm:drm_atomic_state_init] Allocated atomic state ffff8800cd639400
>[   25.813427] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff88040af90540 state to ffff8800cd639400
>[   25.813429] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f1b59800 state to ffff8800cd639400
>[   25.813430] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88040af90540 to [CRTC:30:crtc-1]
>[   25.813431] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff88040af90540
>[   25.813433] [drm:drm_atomic_check_only] checking ffff8800cd639400
>[   25.813435] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   25.813436] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   25.813440] [drm:drm_atomic_commit] commiting ffff8800cd639400
>[   25.813449] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800cd639400
>[   25.813450] [drm:drm_atomic_state_free] Freeing atomic state ffff8800cd639400
>[   25.813454] [drm:drm_atomic_state_init] Allocated atomic state ffff8800cd639400
>[   25.813456] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff88040af90b40 state to ffff8800cd639400
>[   25.813457] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f1b58000 state to ffff8800cd639400
>[   25.813458] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88040af90b40 to [CRTC:26:crtc-0]
>[   25.813459] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff88040af90b40
>[   25.813460] [drm:drm_atomic_check_only] checking ffff8800cd639400
>[   25.813462] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   25.813463] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   25.813465] [drm:drm_atomic_commit] commiting ffff8800cd639400
>[   25.813471] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800cd639400
>[   25.813472] [drm:drm_atomic_state_free] Freeing atomic state ffff8800cd639400
>[   25.813475] [drm:drm_atomic_state_init] Allocated atomic state ffff8800cd639400
>[   25.813476] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff88040af90900 state to ffff8800cd639400
>[   25.813477] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f1b59000 state to ffff8800cd639400
>[   25.813478] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88040af90900 to [CRTC:30:crtc-1]
>[   25.813479] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff88040af90900
>[   25.813480] [drm:drm_atomic_check_only] checking ffff8800cd639400
>[   25.813482] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   25.813483] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   25.813485] [drm:drm_atomic_commit] commiting ffff8800cd639400
>[   25.813490] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800cd639400
>[   25.813491] [drm:drm_atomic_state_free] Freeing atomic state ffff8800cd639400
>[   25.814011] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1]
>[   25.814013] [drm:intel_dp_detect] [CONNECTOR:39:eDP-1]
>[   25.814336] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[   25.814642] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   25.814980] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1] probed modes :
>[   25.814983] [drm:drm_mode_debug_printmodeline] Modeline 65:"1366x768" 60 70000 1366 1402 1438 1476 768 772 780 790 0x8 0xa
>[   25.815091] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1]
>[   25.815094] [drm:intel_crt_detect] [CONNECTOR:36:VGA-1] force=1
>[   25.815101] [drm:intel_ironlake_crt_detect_hotplug] ironlake hotplug adpa=0xf40000, result 0
>[   25.815102] [drm:intel_crt_detect] CRT not detected via hotplug
>[   25.815277] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   25.815278] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK on first message, retry
>[   25.815455] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   25.815456] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   25.815457] [drm:intel_crt_get_edid] CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   25.815458] [drm:intel_gmbus_force_bit] enabling bit-banging on i915 gmbus vga. force bit now 1
>[   25.816318] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   25.816319] [drm:intel_gmbus_force_bit] disabling bit-banging on i915 gmbus vga. force bit now 0
>[   25.816320] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found]
>[   25.816321] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1] disconnected
>[   25.816326] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1]
>[   25.816327] [drm:intel_dp_detect] [CONNECTOR:45:DP-1]
>[   25.816336] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1] disconnected
>[   25.816338] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1]
>[   25.816339] [drm:intel_hdmi_detect] [CONNECTOR:49:HDMI-A-1]
>[   25.920708] [drm:intel_hdmi_detect] HDMI live status down
>[   25.920713] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1] disconnected
>[   25.920739] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2]
>[   25.920740] [drm:intel_dp_detect] [CONNECTOR:52:DP-2]
>[   25.926115] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.931483] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.936840] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.942201] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.947556] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.952916] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.958284] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.963646] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.969007] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.974357] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.979707] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.985058] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.990415] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   25.995773] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.001158] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.006540] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.011916] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.017291] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.022665] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.028039] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.033414] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.038774] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.044147] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.049522] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.054888] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.060259] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.065631] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.071007] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.076377] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.081761] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.087134] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.092514] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.092518] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   26.092521] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2] disconnected
>[   26.092552] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2]
>[   26.092555] [drm:intel_hdmi_detect] [CONNECTOR:56:HDMI-A-2]
>[   26.120964] [drm:intel_hdmi_dp_dual_mode_detect] DP dual mode adaptor (type 1 HDMI) detected (max TMDS clock: 165000 kHz)
>[   26.120967] [drm:drm_detect_monitor_audio] Monitor has basic audio support
>[   26.121027] [drm:drm_edid_to_eld] ELD monitor M230HDL
>[   26.121029] [drm:parse_hdmi_vsdb] HDMI: DVI dual 0, max TMDS clock 0, latency present 0 0, video latency 0 0, audio latency 0 0
>[   26.121030] [drm:drm_edid_to_eld] ELD size 32, SAD count 1
>[   26.121060] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2] probed modes :
>[   26.121062] [drm:drm_mode_debug_printmodeline] Modeline 70:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0xa
>[   26.121064] [drm:drm_mode_debug_printmodeline] Modeline 122:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   26.121066] [drm:drm_mode_debug_printmodeline] Modeline 131:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   26.121068] [drm:drm_mode_debug_printmodeline] Modeline 120:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   26.121070] [drm:drm_mode_debug_printmodeline] Modeline 130:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   26.121072] [drm:drm_mode_debug_printmodeline] Modeline 123:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   26.121074] [drm:drm_mode_debug_printmodeline] Modeline 83:"1920x1080" 50 148350 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   26.121076] [drm:drm_mode_debug_printmodeline] Modeline 89:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   26.121078] [drm:drm_mode_debug_printmodeline] Modeline 95:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   26.121079] [drm:drm_mode_debug_printmodeline] Modeline 107:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   26.121081] [drm:drm_mode_debug_printmodeline] Modeline 96:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   26.121083] [drm:drm_mode_debug_printmodeline] Modeline 73:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[   26.121085] [drm:drm_mode_debug_printmodeline] Modeline 68:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   26.121087] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   26.121089] [drm:drm_mode_debug_printmodeline] Modeline 71:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   26.121090] [drm:drm_mode_debug_printmodeline] Modeline 84:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   26.121092] [drm:drm_mode_debug_printmodeline] Modeline 85:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   26.121094] [drm:drm_mode_debug_printmodeline] Modeline 86:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   26.121096] [drm:drm_mode_debug_printmodeline] Modeline 87:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   26.121098] [drm:drm_mode_debug_printmodeline] Modeline 88:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   26.121099] [drm:drm_mode_debug_printmodeline] Modeline 76:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   26.121101] [drm:drm_mode_debug_printmodeline] Modeline 77:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[   26.121103] [drm:drm_mode_debug_printmodeline] Modeline 72:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   26.121105] [drm:drm_mode_debug_printmodeline] Modeline 92:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   26.121107] [drm:drm_mode_debug_printmodeline] Modeline 103:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   26.121108] [drm:drm_mode_debug_printmodeline] Modeline 90:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   26.121110] [drm:drm_mode_debug_printmodeline] Modeline 78:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   26.121112] [drm:drm_mode_debug_printmodeline] Modeline 79:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   26.121114] [drm:drm_mode_debug_printmodeline] Modeline 80:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   26.121116] [drm:drm_mode_debug_printmodeline] Modeline 101:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   26.121117] [drm:drm_mode_debug_printmodeline] Modeline 81:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   26.121119] [drm:drm_mode_debug_printmodeline] Modeline 82:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   26.121222] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3]
>[   26.121224] [drm:intel_dp_detect] [CONNECTOR:58:DP-3]
>[   26.121232] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3] disconnected
>[   26.121236] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3]
>[   26.121238] [drm:intel_hdmi_detect] [CONNECTOR:62:HDMI-A-3]
>[   26.227314] [drm:intel_hdmi_detect] HDMI live status down
>[   26.227320] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3] disconnected
>[   26.227481] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1]
>[   26.227483] [drm:intel_dp_detect] [CONNECTOR:39:eDP-1]
>[   26.227813] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[   26.228127] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   26.228480] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1] probed modes :
>[   26.228485] [drm:drm_mode_debug_printmodeline] Modeline 65:"1366x768" 60 70000 1366 1402 1438 1476 768 772 780 790 0x8 0xa
>[   26.228615] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1]
>[   26.228617] [drm:intel_crt_detect] [CONNECTOR:36:VGA-1] force=1
>[   26.228624] [drm:intel_ironlake_crt_detect_hotplug] ironlake hotplug adpa=0xf40000, result 0
>[   26.228625] [drm:intel_crt_detect] CRT not detected via hotplug
>[   26.228838] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   26.228840] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK on first message, retry
>[   26.229045] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   26.229048] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   26.229050] [drm:intel_crt_get_edid] CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   26.229052] [drm:intel_gmbus_force_bit] enabling bit-banging on i915 gmbus vga. force bit now 1
>[   26.230052] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   26.230053] [drm:intel_gmbus_force_bit] disabling bit-banging on i915 gmbus vga. force bit now 0
>[   26.230054] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found]
>[   26.230056] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1] disconnected
>[   26.230064] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1]
>[   26.230066] [drm:intel_dp_detect] [CONNECTOR:45:DP-1]
>[   26.230069] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1] disconnected
>[   26.230073] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1]
>[   26.230075] [drm:intel_hdmi_detect] [CONNECTOR:49:HDMI-A-1]
>[   26.334005] [drm:intel_hdmi_detect] HDMI live status down
>[   26.334011] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1] disconnected
>[   26.334036] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2]
>[   26.334037] [drm:intel_dp_detect] [CONNECTOR:52:DP-2]
>[   26.339435] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.344827] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.350208] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.355601] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.360973] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.366363] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.371736] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.377124] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.382495] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.387868] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.393231] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.398606] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.403980] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.409339] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.414707] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.420073] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.425432] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.430803] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.436179] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.441541] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.446907] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.452286] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.457655] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.463032] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.468395] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.473752] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.479115] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.484483] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.489854] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.495220] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.500591] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.505970] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.505974] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   26.505976] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2] disconnected
>[   26.506005] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2]
>[   26.506008] [drm:intel_hdmi_detect] [CONNECTOR:56:HDMI-A-2]
>[   26.534439] [drm:intel_hdmi_dp_dual_mode_detect] DP dual mode adaptor (type 1 HDMI) detected (max TMDS clock: 165000 kHz)
>[   26.534443] [drm:drm_detect_monitor_audio] Monitor has basic audio support
>[   26.534507] [drm:drm_edid_to_eld] ELD monitor M230HDL
>[   26.534509] [drm:parse_hdmi_vsdb] HDMI: DVI dual 0, max TMDS clock 0, latency present 0 0, video latency 0 0, audio latency 0 0
>[   26.534510] [drm:drm_edid_to_eld] ELD size 32, SAD count 1
>[   26.534543] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2] probed modes :
>[   26.534546] [drm:drm_mode_debug_printmodeline] Modeline 70:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0xa
>[   26.534548] [drm:drm_mode_debug_printmodeline] Modeline 122:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   26.534550] [drm:drm_mode_debug_printmodeline] Modeline 131:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   26.534552] [drm:drm_mode_debug_printmodeline] Modeline 120:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   26.534553] [drm:drm_mode_debug_printmodeline] Modeline 130:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   26.534555] [drm:drm_mode_debug_printmodeline] Modeline 123:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   26.534557] [drm:drm_mode_debug_printmodeline] Modeline 83:"1920x1080" 50 148350 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   26.534559] [drm:drm_mode_debug_printmodeline] Modeline 89:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   26.534561] [drm:drm_mode_debug_printmodeline] Modeline 95:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   26.534563] [drm:drm_mode_debug_printmodeline] Modeline 107:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   26.534564] [drm:drm_mode_debug_printmodeline] Modeline 96:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   26.534566] [drm:drm_mode_debug_printmodeline] Modeline 73:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[   26.534568] [drm:drm_mode_debug_printmodeline] Modeline 68:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   26.534570] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   26.534572] [drm:drm_mode_debug_printmodeline] Modeline 71:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   26.534574] [drm:drm_mode_debug_printmodeline] Modeline 84:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   26.534575] [drm:drm_mode_debug_printmodeline] Modeline 85:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   26.534577] [drm:drm_mode_debug_printmodeline] Modeline 86:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   26.534579] [drm:drm_mode_debug_printmodeline] Modeline 87:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   26.534581] [drm:drm_mode_debug_printmodeline] Modeline 88:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   26.534583] [drm:drm_mode_debug_printmodeline] Modeline 76:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   26.534585] [drm:drm_mode_debug_printmodeline] Modeline 77:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[   26.534586] [drm:drm_mode_debug_printmodeline] Modeline 72:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   26.534588] [drm:drm_mode_debug_printmodeline] Modeline 92:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   26.534590] [drm:drm_mode_debug_printmodeline] Modeline 103:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   26.534592] [drm:drm_mode_debug_printmodeline] Modeline 90:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   26.534594] [drm:drm_mode_debug_printmodeline] Modeline 78:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   26.534595] [drm:drm_mode_debug_printmodeline] Modeline 79:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   26.534597] [drm:drm_mode_debug_printmodeline] Modeline 80:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   26.534599] [drm:drm_mode_debug_printmodeline] Modeline 101:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   26.534601] [drm:drm_mode_debug_printmodeline] Modeline 81:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   26.534602] [drm:drm_mode_debug_printmodeline] Modeline 82:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   26.534725] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3]
>[   26.534727] [drm:intel_dp_detect] [CONNECTOR:58:DP-3]
>[   26.534738] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3] disconnected
>[   26.534743] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3]
>[   26.534745] [drm:intel_hdmi_detect] [CONNECTOR:62:HDMI-A-3]
>[   26.640653] [drm:intel_hdmi_detect] HDMI live status down
>[   26.640659] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3] disconnected
>[   26.640794] [drm:drm_atomic_state_init] Allocated atomic state ffff880401738800
>[   26.640799] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803f19436c0 state to ffff880401738800
>[   26.640801] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e7800 state to ffff880401738800
>[   26.640803] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803f19436c0 to [CRTC:26:crtc-0]
>[   26.640805] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803f19436c0
>[   26.640806] [drm:drm_atomic_check_only] checking ffff880401738800
>[   26.640812] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   26.640814] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   26.640819] [drm:drm_atomic_commit] commiting ffff880401738800
>[   26.640835] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401738800
>[   26.640837] [drm:drm_atomic_state_free] Freeing atomic state ffff880401738800
>[   26.640841] [drm:drm_atomic_state_init] Allocated atomic state ffff880401738800
>[   26.640843] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803f1943780 state to ffff880401738800
>[   26.640845] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e6800 state to ffff880401738800
>[   26.640846] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803f1943780 to [CRTC:30:crtc-1]
>[   26.640847] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803f1943780
>[   26.640848] [drm:drm_atomic_check_only] checking ffff880401738800
>[   26.640851] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   26.640852] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   26.640854] [drm:drm_atomic_commit] commiting ffff880401738800
>[   26.640861] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401738800
>[   26.640863] [drm:drm_atomic_state_free] Freeing atomic state ffff880401738800
>[   26.640882] [drm:drm_atomic_state_init] Allocated atomic state ffff880401738800
>[   26.640883] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803f1943480 state to ffff880401738800
>[   26.640885] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e7000 state to ffff880401738800
>[   26.640886] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803f1943480 to [CRTC:26:crtc-0]
>[   26.640888] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803f1943480
>[   26.640889] [drm:drm_atomic_check_only] checking ffff880401738800
>[   26.640890] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   26.640891] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   26.640894] [drm:drm_atomic_commit] commiting ffff880401738800
>[   26.640900] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401738800
>[   26.640901] [drm:drm_atomic_state_free] Freeing atomic state ffff880401738800
>[   26.640904] [drm:drm_atomic_state_init] Allocated atomic state ffff880401738800
>[   26.640905] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803f19436c0 state to ffff880401738800
>[   26.640907] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e7800 state to ffff880401738800
>[   26.640908] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803f19436c0 to [CRTC:30:crtc-1]
>[   26.640909] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803f19436c0
>[   26.640910] [drm:drm_atomic_check_only] checking ffff880401738800
>[   26.640912] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   26.640913] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   26.640915] [drm:drm_atomic_commit] commiting ffff880401738800
>[   26.640921] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401738800
>[   26.640922] [drm:drm_atomic_state_free] Freeing atomic state ffff880401738800
>[   26.640928] [drm:drm_atomic_state_init] Allocated atomic state ffff880401738800
>[   26.640930] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803f1943780 state to ffff880401738800
>[   26.640931] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e6800 state to ffff880401738800
>[   26.640932] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803f1943780 to [CRTC:26:crtc-0]
>[   26.640933] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803f1943780
>[   26.640934] [drm:drm_atomic_check_only] checking ffff880401738800
>[   26.640936] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   26.640937] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   26.640939] [drm:drm_atomic_commit] commiting ffff880401738800
>[   26.640945] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401738800
>[   26.640946] [drm:drm_atomic_state_free] Freeing atomic state ffff880401738800
>[   26.640948] [drm:drm_atomic_state_init] Allocated atomic state ffff880401738800
>[   26.640950] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803f1943480 state to ffff880401738800
>[   26.640951] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e7000 state to ffff880401738800
>[   26.640953] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803f1943480 to [CRTC:30:crtc-1]
>[   26.640954] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803f1943480
>[   26.640955] [drm:drm_atomic_check_only] checking ffff880401738800
>[   26.640956] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   26.640957] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   26.640959] [drm:drm_atomic_commit] commiting ffff880401738800
>[   26.640964] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401738800
>[   26.640966] [drm:drm_atomic_state_free] Freeing atomic state ffff880401738800
>[   26.640972] [drm:drm_atomic_state_init] Allocated atomic state ffff880401738800
>[   26.640974] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803f19436c0 state to ffff880401738800
>[   26.640975] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e7800 state to ffff880401738800
>[   26.640976] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803f19436c0 to [CRTC:26:crtc-0]
>[   26.640977] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803f19436c0
>[   26.640978] [drm:drm_atomic_check_only] checking ffff880401738800
>[   26.640980] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   26.640981] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   26.640983] [drm:drm_atomic_commit] commiting ffff880401738800
>[   26.640989] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401738800
>[   26.640990] [drm:drm_atomic_state_free] Freeing atomic state ffff880401738800
>[   26.640992] [drm:drm_atomic_state_init] Allocated atomic state ffff880401738800
>[   26.640994] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803f1943780 state to ffff880401738800
>[   26.640995] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e6800 state to ffff880401738800
>[   26.640996] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803f1943780 to [CRTC:30:crtc-1]
>[   26.640997] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803f1943780
>[   26.640998] [drm:drm_atomic_check_only] checking ffff880401738800
>[   26.641000] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   26.641001] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   26.641003] [drm:drm_atomic_commit] commiting ffff880401738800
>[   26.641008] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401738800
>[   26.641009] [drm:drm_atomic_state_free] Freeing atomic state ffff880401738800
>[   26.641015] [drm:drm_atomic_state_init] Allocated atomic state ffff880401738800
>[   26.641017] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803f1943480 state to ffff880401738800
>[   26.641018] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e7000 state to ffff880401738800
>[   26.641019] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803f1943480 to [CRTC:26:crtc-0]
>[   26.641020] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803f1943480
>[   26.641021] [drm:drm_atomic_check_only] checking ffff880401738800
>[   26.641023] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   26.641024] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   26.641026] [drm:drm_atomic_commit] commiting ffff880401738800
>[   26.641031] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401738800
>[   26.641033] [drm:drm_atomic_state_free] Freeing atomic state ffff880401738800
>[   26.641035] [drm:drm_atomic_state_init] Allocated atomic state ffff880401738800
>[   26.641036] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803f19436c0 state to ffff880401738800
>[   26.641038] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e7800 state to ffff880401738800
>[   26.641039] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803f19436c0 to [CRTC:30:crtc-1]
>[   26.641040] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803f19436c0
>[   26.641041] [drm:drm_atomic_check_only] checking ffff880401738800
>[   26.641043] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   26.641044] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   26.641045] [drm:drm_atomic_commit] commiting ffff880401738800
>[   26.641051] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401738800
>[   26.641052] [drm:drm_atomic_state_free] Freeing atomic state ffff880401738800
>[   26.641059] [drm:drm_atomic_state_init] Allocated atomic state ffff880401738800
>[   26.641060] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803f1943780 state to ffff880401738800
>[   26.641062] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e6800 state to ffff880401738800
>[   26.641063] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803f1943780 to [CRTC:26:crtc-0]
>[   26.641064] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803f1943780
>[   26.641065] [drm:drm_atomic_check_only] checking ffff880401738800
>[   26.641066] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   26.641068] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   26.641069] [drm:drm_atomic_commit] commiting ffff880401738800
>[   26.641075] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401738800
>[   26.641076] [drm:drm_atomic_state_free] Freeing atomic state ffff880401738800
>[   26.641079] [drm:drm_atomic_state_init] Allocated atomic state ffff880401738800
>[   26.641080] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803f1943480 state to ffff880401738800
>[   26.641081] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e7000 state to ffff880401738800
>[   26.641083] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803f1943480 to [CRTC:30:crtc-1]
>[   26.641084] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803f1943480
>[   26.641085] [drm:drm_atomic_check_only] checking ffff880401738800
>[   26.641086] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   26.641087] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   26.641089] [drm:drm_atomic_commit] commiting ffff880401738800
>[   26.641095] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401738800
>[   26.641096] [drm:drm_atomic_state_free] Freeing atomic state ffff880401738800
>[   26.641101] [drm:drm_atomic_state_init] Allocated atomic state ffff880401738800
>[   26.641103] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803f19436c0 state to ffff880401738800
>[   26.641104] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e7800 state to ffff880401738800
>[   26.641105] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803f19436c0 to [CRTC:26:crtc-0]
>[   26.641107] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803f19436c0
>[   26.641108] [drm:drm_atomic_check_only] checking ffff880401738800
>[   26.641109] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   26.641110] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   26.641112] [drm:drm_atomic_commit] commiting ffff880401738800
>[   26.641118] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401738800
>[   26.641119] [drm:drm_atomic_state_free] Freeing atomic state ffff880401738800
>[   26.641121] [drm:drm_atomic_state_init] Allocated atomic state ffff880401738800
>[   26.641122] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803f1943780 state to ffff880401738800
>[   26.641124] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e6800 state to ffff880401738800
>[   26.641125] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803f1943780 to [CRTC:30:crtc-1]
>[   26.641126] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803f1943780
>[   26.641127] [drm:drm_atomic_check_only] checking ffff880401738800
>[   26.641129] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   26.641130] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   26.641132] [drm:drm_atomic_commit] commiting ffff880401738800
>[   26.641137] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401738800
>[   26.641138] [drm:drm_atomic_state_free] Freeing atomic state ffff880401738800
>[   26.641215] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1]
>[   26.641217] [drm:intel_dp_detect] [CONNECTOR:39:eDP-1]
>[   26.641547] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[   26.641861] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   26.642196] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1] probed modes :
>[   26.642199] [drm:drm_mode_debug_printmodeline] Modeline 65:"1366x768" 60 70000 1366 1402 1438 1476 768 772 780 790 0x8 0xa
>[   26.642306] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1]
>[   26.642308] [drm:intel_crt_detect] [CONNECTOR:36:VGA-1] force=1
>[   26.642310] [drm:intel_ironlake_crt_detect_hotplug] ironlake hotplug adpa=0xf40000, result 0
>[   26.642311] [drm:intel_crt_detect] CRT not detected via hotplug
>[   26.642505] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   26.642506] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK on first message, retry
>[   26.642708] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   26.642710] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   26.642711] [drm:intel_crt_get_edid] CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   26.642712] [drm:intel_gmbus_force_bit] enabling bit-banging on i915 gmbus vga. force bit now 1
>[   26.643706] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   26.643707] [drm:intel_gmbus_force_bit] disabling bit-banging on i915 gmbus vga. force bit now 0
>[   26.643708] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found]
>[   26.643710] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1] disconnected
>[   26.643716] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1]
>[   26.643717] [drm:intel_dp_detect] [CONNECTOR:45:DP-1]
>[   26.643725] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1] disconnected
>[   26.643728] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1]
>[   26.643729] [drm:intel_hdmi_detect] [CONNECTOR:49:HDMI-A-1]
>[   26.747349] [drm:intel_hdmi_detect] HDMI live status down
>[   26.747354] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1] disconnected
>[   26.747379] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2]
>[   26.747381] [drm:intel_dp_detect] [CONNECTOR:52:DP-2]
>[   26.752766] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.758147] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.763523] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.768892] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.774266] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.779635] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.785011] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.790383] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.795759] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.801131] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.806496] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.811867] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.817240] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.822624] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.827997] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.833368] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.838741] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.844118] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.849476] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.854851] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.860223] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.865600] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.870968] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.876338] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.881712] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.887080] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.892455] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.897833] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.903204] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.908583] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.913960] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.919323] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   26.919327] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   26.919329] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2] disconnected
>[   26.919357] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2]
>[   26.919360] [drm:intel_hdmi_detect] [CONNECTOR:56:HDMI-A-2]
>[   26.947809] [drm:intel_hdmi_dp_dual_mode_detect] DP dual mode adaptor (type 1 HDMI) detected (max TMDS clock: 165000 kHz)
>[   26.947814] [drm:drm_detect_monitor_audio] Monitor has basic audio support
>[   26.947877] [drm:drm_edid_to_eld] ELD monitor M230HDL
>[   26.947879] [drm:parse_hdmi_vsdb] HDMI: DVI dual 0, max TMDS clock 0, latency present 0 0, video latency 0 0, audio latency 0 0
>[   26.947880] [drm:drm_edid_to_eld] ELD size 32, SAD count 1
>[   26.947913] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2] probed modes :
>[   26.947916] [drm:drm_mode_debug_printmodeline] Modeline 70:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0xa
>[   26.947918] [drm:drm_mode_debug_printmodeline] Modeline 122:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   26.947919] [drm:drm_mode_debug_printmodeline] Modeline 131:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   26.947921] [drm:drm_mode_debug_printmodeline] Modeline 120:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   26.947923] [drm:drm_mode_debug_printmodeline] Modeline 130:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   26.947925] [drm:drm_mode_debug_printmodeline] Modeline 123:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   26.947927] [drm:drm_mode_debug_printmodeline] Modeline 83:"1920x1080" 50 148350 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   26.947929] [drm:drm_mode_debug_printmodeline] Modeline 89:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   26.947931] [drm:drm_mode_debug_printmodeline] Modeline 95:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   26.947933] [drm:drm_mode_debug_printmodeline] Modeline 107:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   26.947934] [drm:drm_mode_debug_printmodeline] Modeline 96:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   26.947936] [drm:drm_mode_debug_printmodeline] Modeline 73:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[   26.947938] [drm:drm_mode_debug_printmodeline] Modeline 68:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   26.947940] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   26.947942] [drm:drm_mode_debug_printmodeline] Modeline 71:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   26.947944] [drm:drm_mode_debug_printmodeline] Modeline 84:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   26.947945] [drm:drm_mode_debug_printmodeline] Modeline 85:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   26.947947] [drm:drm_mode_debug_printmodeline] Modeline 86:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   26.947949] [drm:drm_mode_debug_printmodeline] Modeline 87:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   26.947951] [drm:drm_mode_debug_printmodeline] Modeline 88:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   26.947953] [drm:drm_mode_debug_printmodeline] Modeline 76:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   26.947954] [drm:drm_mode_debug_printmodeline] Modeline 77:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[   26.947956] [drm:drm_mode_debug_printmodeline] Modeline 72:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   26.947958] [drm:drm_mode_debug_printmodeline] Modeline 92:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   26.947960] [drm:drm_mode_debug_printmodeline] Modeline 103:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   26.947962] [drm:drm_mode_debug_printmodeline] Modeline 90:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   26.947963] [drm:drm_mode_debug_printmodeline] Modeline 78:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   26.947965] [drm:drm_mode_debug_printmodeline] Modeline 79:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   26.947967] [drm:drm_mode_debug_printmodeline] Modeline 80:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   26.947969] [drm:drm_mode_debug_printmodeline] Modeline 101:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   26.947971] [drm:drm_mode_debug_printmodeline] Modeline 81:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   26.947972] [drm:drm_mode_debug_printmodeline] Modeline 82:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   26.948094] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3]
>[   26.948097] [drm:intel_dp_detect] [CONNECTOR:58:DP-3]
>[   26.948106] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3] disconnected
>[   26.948111] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3]
>[   26.948112] [drm:intel_hdmi_detect] [CONNECTOR:62:HDMI-A-3]
>[   27.053995] [drm:intel_hdmi_detect] HDMI live status down
>[   27.054001] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3] disconnected
>[   27.054152] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1]
>[   27.054154] [drm:intel_dp_detect] [CONNECTOR:39:eDP-1]
>[   27.054497] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[   27.054814] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   27.055157] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1] probed modes :
>[   27.055159] [drm:drm_mode_debug_printmodeline] Modeline 65:"1366x768" 60 70000 1366 1402 1438 1476 768 772 780 790 0x8 0xa
>[   27.055285] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1]
>[   27.055286] [drm:intel_crt_detect] [CONNECTOR:36:VGA-1] force=1
>[   27.055294] [drm:intel_ironlake_crt_detect_hotplug] ironlake hotplug adpa=0xf40000, result 0
>[   27.055295] [drm:intel_crt_detect] CRT not detected via hotplug
>[   27.055492] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   27.055493] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK on first message, retry
>[   27.055693] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   27.055694] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   27.055696] [drm:intel_crt_get_edid] CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   27.055697] [drm:intel_gmbus_force_bit] enabling bit-banging on i915 gmbus vga. force bit now 1
>[   27.056687] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   27.056688] [drm:intel_gmbus_force_bit] disabling bit-banging on i915 gmbus vga. force bit now 0
>[   27.056689] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found]
>[   27.056690] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1] disconnected
>[   27.056695] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1]
>[   27.056696] [drm:intel_dp_detect] [CONNECTOR:45:DP-1]
>[   27.056704] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1] disconnected
>[   27.056707] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1]
>[   27.056708] [drm:intel_hdmi_detect] [CONNECTOR:49:HDMI-A-1]
>[   27.160660] [drm:intel_hdmi_detect] HDMI live status down
>[   27.160666] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1] disconnected
>[   27.160691] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2]
>[   27.160692] [drm:intel_dp_detect] [CONNECTOR:52:DP-2]
>[   27.166061] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.171414] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.176773] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.182144] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.187512] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.192871] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.198240] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.203605] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.208968] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.214321] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.219682] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.225035] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.230392] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.235743] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.241113] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.246481] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.251856] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.257222] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.262606] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.267974] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.273333] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.278700] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.284075] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.289442] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.294809] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.300175] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.305548] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.310911] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.316299] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.321664] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.327016] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.332385] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.332388] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   27.332391] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2] disconnected
>[   27.332420] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2]
>[   27.332422] [drm:intel_hdmi_detect] [CONNECTOR:56:HDMI-A-2]
>[   27.360774] [drm:intel_hdmi_dp_dual_mode_detect] DP dual mode adaptor (type 1 HDMI) detected (max TMDS clock: 165000 kHz)
>[   27.360777] [drm:drm_detect_monitor_audio] Monitor has basic audio support
>[   27.360838] [drm:drm_edid_to_eld] ELD monitor M230HDL
>[   27.360840] [drm:parse_hdmi_vsdb] HDMI: DVI dual 0, max TMDS clock 0, latency present 0 0, video latency 0 0, audio latency 0 0
>[   27.360842] [drm:drm_edid_to_eld] ELD size 32, SAD count 1
>[   27.360874] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2] probed modes :
>[   27.360876] [drm:drm_mode_debug_printmodeline] Modeline 70:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0xa
>[   27.360879] [drm:drm_mode_debug_printmodeline] Modeline 122:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   27.360880] [drm:drm_mode_debug_printmodeline] Modeline 131:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   27.360882] [drm:drm_mode_debug_printmodeline] Modeline 120:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   27.360884] [drm:drm_mode_debug_printmodeline] Modeline 130:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   27.360886] [drm:drm_mode_debug_printmodeline] Modeline 123:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   27.360888] [drm:drm_mode_debug_printmodeline] Modeline 83:"1920x1080" 50 148350 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   27.360890] [drm:drm_mode_debug_printmodeline] Modeline 89:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   27.360892] [drm:drm_mode_debug_printmodeline] Modeline 95:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   27.360893] [drm:drm_mode_debug_printmodeline] Modeline 107:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   27.360895] [drm:drm_mode_debug_printmodeline] Modeline 96:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   27.360897] [drm:drm_mode_debug_printmodeline] Modeline 73:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[   27.360899] [drm:drm_mode_debug_printmodeline] Modeline 68:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   27.360901] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   27.360903] [drm:drm_mode_debug_printmodeline] Modeline 71:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   27.360905] [drm:drm_mode_debug_printmodeline] Modeline 84:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   27.360906] [drm:drm_mode_debug_printmodeline] Modeline 85:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   27.360908] [drm:drm_mode_debug_printmodeline] Modeline 86:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   27.360910] [drm:drm_mode_debug_printmodeline] Modeline 87:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   27.360912] [drm:drm_mode_debug_printmodeline] Modeline 88:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   27.360914] [drm:drm_mode_debug_printmodeline] Modeline 76:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   27.360915] [drm:drm_mode_debug_printmodeline] Modeline 77:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[   27.360917] [drm:drm_mode_debug_printmodeline] Modeline 72:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   27.360919] [drm:drm_mode_debug_printmodeline] Modeline 92:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   27.360921] [drm:drm_mode_debug_printmodeline] Modeline 103:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   27.360923] [drm:drm_mode_debug_printmodeline] Modeline 90:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   27.360924] [drm:drm_mode_debug_printmodeline] Modeline 78:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   27.360926] [drm:drm_mode_debug_printmodeline] Modeline 79:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   27.360928] [drm:drm_mode_debug_printmodeline] Modeline 80:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   27.360930] [drm:drm_mode_debug_printmodeline] Modeline 101:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   27.360931] [drm:drm_mode_debug_printmodeline] Modeline 81:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   27.360933] [drm:drm_mode_debug_printmodeline] Modeline 82:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   27.361052] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3]
>[   27.361054] [drm:intel_dp_detect] [CONNECTOR:58:DP-3]
>[   27.361062] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3] disconnected
>[   27.361067] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3]
>[   27.361069] [drm:intel_hdmi_detect] [CONNECTOR:62:HDMI-A-3]
>[   27.470624] [drm:intel_hdmi_detect] HDMI live status down
>[   27.470630] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3] disconnected
>[   27.470777] [drm:drm_atomic_state_init] Allocated atomic state ffff880401738800
>[   27.470781] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ef39a000 state to ffff880401738800
>[   27.470784] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e7000 state to ffff880401738800
>[   27.470786] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a000 to [CRTC:26:crtc-0]
>[   27.470788] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39a000
>[   27.470789] [drm:drm_atomic_check_only] checking ffff880401738800
>[   27.470794] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   27.470795] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   27.470801] [drm:drm_atomic_commit] commiting ffff880401738800
>[   27.470817] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401738800
>[   27.470820] [drm:drm_atomic_state_free] Freeing atomic state ffff880401738800
>[   27.470823] [drm:drm_atomic_state_init] Allocated atomic state ffff880401738800
>[   27.470825] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a900 state to ffff880401738800
>[   27.470827] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e7800 state to ffff880401738800
>[   27.470828] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a900 to [CRTC:30:crtc-1]
>[   27.470830] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ef39a900
>[   27.470831] [drm:drm_atomic_check_only] checking ffff880401738800
>[   27.470833] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   27.470834] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   27.470837] [drm:drm_atomic_commit] commiting ffff880401738800
>[   27.470843] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401738800
>[   27.470845] [drm:drm_atomic_state_free] Freeing atomic state ffff880401738800
>[   27.470857] [drm:drm_atomic_state_init] Allocated atomic state ffff880401738800
>[   27.470858] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ef39a9c0 state to ffff880401738800
>[   27.470860] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e6800 state to ffff880401738800
>[   27.470861] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a9c0 to [CRTC:26:crtc-0]
>[   27.470862] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39a9c0
>[   27.470863] [drm:drm_atomic_check_only] checking ffff880401738800
>[   27.470865] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   27.470866] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   27.470868] [drm:drm_atomic_commit] commiting ffff880401738800
>[   27.470875] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401738800
>[   27.470876] [drm:drm_atomic_state_free] Freeing atomic state ffff880401738800
>[   27.470878] [drm:drm_atomic_state_init] Allocated atomic state ffff880401738800
>[   27.470880] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a000 state to ffff880401738800
>[   27.470881] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e7000 state to ffff880401738800
>[   27.470883] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a000 to [CRTC:30:crtc-1]
>[   27.470884] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ef39a000
>[   27.470885] [drm:drm_atomic_check_only] checking ffff880401738800
>[   27.470886] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   27.470887] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   27.470889] [drm:drm_atomic_commit] commiting ffff880401738800
>[   27.470895] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401738800
>[   27.470896] [drm:drm_atomic_state_free] Freeing atomic state ffff880401738800
>[   27.475613] [drm:drm_atomic_state_init] Allocated atomic state ffff88040173b000
>[   27.475618] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e0000 state to ffff88040173b000
>[   27.475620] [drm:drm_atomic_check_only] checking ffff88040173b000
>[   27.475622] [drm:drm_atomic_helper_check_modeset] [CRTC:30:crtc-1] needs all connectors, enable: y, active: y
>[   27.475624] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff88040173b000
>[   27.475627] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:56] ffff880400ac5b60 state to ffff88040173b000
>[   27.475629] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane-3] ffff8803ef39a900 state to ffff88040173b000
>[   27.475631] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39aa80 state to ffff88040173b000
>[   27.475633] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff88040173b000
>[   27.475636] [drm:connected_sink_compute_bpp] [CONNECTOR:56:HDMI-A-2] checking for sink bpp constrains
>[   27.475637] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to EDID reported max of 24
>[   27.475642] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[   27.475644] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[   27.475645] [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[   27.475647] [drm:intel_dump_pipe_config] [CRTC:30][modeset] config ffff8803f27e0000 for pipe B
>[   27.475649] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   27.475650] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   27.475651] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   27.475653] [drm:intel_dump_pipe_config] dp: 0, lanes: 4, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   27.475654] [drm:intel_dump_pipe_config] dp: 0, lanes: 4, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   27.475655] [drm:intel_dump_pipe_config] audio: 0, infoframes: 1
>[   27.475656] [drm:intel_dump_pipe_config] requested mode:
>[   27.475658] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0xa
>[   27.475659] [drm:intel_dump_pipe_config] adjusted mode:
>[   27.475661] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0xa
>[   27.475663] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x0 flags: 0xa
>[   27.475664] [drm:intel_dump_pipe_config] port clock: 148500
>[   27.475665] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   27.475666] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[   27.475668] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   27.475669] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   27.475670] [drm:intel_dump_pipe_config] ips: 0
>[   27.475671] [drm:intel_dump_pipe_config] double wide: 0
>[   27.475672] [drm:intel_dump_pipe_config] ddi_pll_sel: 0x80000000; dpll_hw_state: wrpll: 0xb0210614 spll: 0x0
>[   27.475673] [drm:intel_dump_pipe_config] planes on this crtc
>[   27.475675] [drm:intel_dump_pipe_config] STANDARD PLANE:28 plane: 1.0 idx: 3 enabled
>[   27.475677] [drm:intel_dump_pipe_config] 	FB:75, fb = 1920x1080 format = 0x34325258
>[   27.475678] [drm:intel_dump_pipe_config] 	scaler:0 src (0, 0) 1920x1080 dst (0, 0) 1920x1080
>[   27.475680] [drm:intel_dump_pipe_config] CURSOR PLANE:29 plane: 1.2 idx: 4 enabled
>[   27.475681] [drm:intel_dump_pipe_config] 	FB:91, fb = 256x256 format = 0x34325241
>[   27.475683] [drm:intel_dump_pipe_config] 	scaler:0 src (0, 0) 256x256 dst (1353, 539) 256x256
>[   27.475684] [drm:intel_dump_pipe_config] STANDARD PLANE:31 plane: 1.1 idx: 5 disabled, scaler_id = 0
>[   27.475688] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e0800 state to ffff88040173b000
>[   27.475689] [drm:drm_atomic_get_crtc_state] Added [CRTC:34:crtc-2] ffff8803f27e2000 state to ffff88040173b000
>[   27.475692] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:28] with fb 75
>[   27.475694] [drm:intel_plane_atomic_calc_changes] [PLANE:28] visible 1 -> 1, off 1, on 1, ms 1
>[   27.475695] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   27.475697] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 1, on 1, ms 1
>[   27.476704] [drm:intel_find_shared_dpll] CRTC:30 allocated WRPLL 1
>[   27.476705] [drm:intel_reference_shared_dpll] using WRPLL 1 for pipe B
>[   27.476710] [drm:drm_atomic_commit] commiting ffff88040173b000
>[   27.478878] [drm:hsw_audio_codec_disable] Disable audio codec on pipe B
>[   27.478894] [drm:intel_disable_pipe] disabling pipe B
>[   27.495998] [drm:intel_disable_shared_dpll] disable WRPLL 1 (active 2, on? 1) for crtc 30
>[   27.496003] [drm:intel_disable_shared_dpll] disabling WRPLL 1
>[   27.496010] [drm:verify_encoder_state] [ENCODER:37:DAC-37]
>[   27.496013] [drm:verify_encoder_state] [ENCODER:38:TMDS-38]
>[   27.496014] [drm:verify_encoder_state] [ENCODER:44:TMDS-44]
>[   27.496016] [drm:verify_encoder_state] [ENCODER:46:DP MST-46]
>[   27.496018] [drm:verify_encoder_state] [ENCODER:47:DP MST-47]
>[   27.496019] [drm:verify_encoder_state] [ENCODER:48:DP MST-48]
>[   27.496020] [drm:verify_encoder_state] [ENCODER:51:TMDS-51]
>[   27.496021] [drm:verify_encoder_state] [ENCODER:53:DP MST-53]
>[   27.496022] [drm:verify_encoder_state] [ENCODER:54:DP MST-54]
>[   27.496023] [drm:verify_encoder_state] [ENCODER:55:DP MST-55]
>[   27.496024] [drm:verify_encoder_state] [ENCODER:57:TMDS-57]
>[   27.496026] [drm:verify_encoder_state] [ENCODER:59:DP MST-59]
>[   27.496027] [drm:verify_encoder_state] [ENCODER:60:DP MST-60]
>[   27.496028] [drm:verify_encoder_state] [ENCODER:61:DP MST-61]
>[   27.496029] [drm:intel_connector_verify_state] [CONNECTOR:36:VGA-1]
>[   27.496031] [drm:intel_connector_verify_state] [CONNECTOR:45:DP-1]
>[   27.496033] [drm:intel_connector_verify_state] [CONNECTOR:49:HDMI-A-1]
>[   27.496034] [drm:intel_connector_verify_state] [CONNECTOR:52:DP-2]
>[   27.496036] [drm:intel_connector_verify_state] [CONNECTOR:58:DP-3]
>[   27.496038] [drm:intel_connector_verify_state] [CONNECTOR:62:HDMI-A-3]
>[   27.496039] [drm:verify_single_dpll_state] WRPLL 1
>[   27.496041] [drm:verify_single_dpll_state] WRPLL 2
>[   27.496042] [drm:verify_single_dpll_state] SPLL
>[   27.496044] [drm:verify_single_dpll_state] LCPLL 810
>[   27.496045] [drm:verify_single_dpll_state] LCPLL 1350
>[   27.496046] [drm:verify_single_dpll_state] LCPLL 2700
>[   27.496050] [drm:intel_enable_shared_dpll] enable WRPLL 1 (active 2, on? 0) for crtc 30
>[   27.496051] [drm:intel_enable_shared_dpll] enabling WRPLL 1
>[   27.496132] [drm:intel_enable_pipe] enabling pipe B
>[   27.529577] [drm:intel_connector_verify_state] [CONNECTOR:56:HDMI-A-2]
>[   27.529585] [drm:verify_crtc_state] [CRTC:30]
>[   27.529596] [drm:verify_single_dpll_state] WRPLL 1
>[   27.529603] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040173b000
>[   27.529608] [drm:drm_atomic_state_free] Freeing atomic state ffff88040173b000
>[   27.604966] [drm:drm_atomic_state_init] Allocated atomic state ffff8800d7ad6400
>[   27.604973] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff88040af90240 state to ffff8800d7ad6400
>[   27.604977] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f1b5d800 state to ffff8800d7ad6400
>[   27.604979] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88040af90240 to [CRTC:26:crtc-0]
>[   27.604982] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff88040af90240
>[   27.604984] [drm:drm_atomic_check_only] checking ffff8800d7ad6400
>[   27.604990] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   27.604992] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   27.604998] [drm:drm_atomic_commit] commiting ffff8800d7ad6400
>[   27.605020] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800d7ad6400
>[   27.605023] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d7ad6400
>[   27.605636] [drm:drm_atomic_state_init] Allocated atomic state ffff8800d7ad6400
>[   27.605640] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff88040af90180 state to ffff8800d7ad6400
>[   27.605643] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f1b5e000 state to ffff8800d7ad6400
>[   27.605645] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88040af90180 to [CRTC:30:crtc-1]
>[   27.605647] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff88040af90180
>[   27.605648] [drm:drm_atomic_check_only] checking ffff8800d7ad6400
>[   27.605652] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   27.605655] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   27.605659] [drm:drm_atomic_commit] commiting ffff8800d7ad6400
>[   27.605671] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800d7ad6400
>[   27.605674] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d7ad6400
>[   27.605680] [drm:drm_atomic_state_init] Allocated atomic state ffff8800d7ad6400
>[   27.605682] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff88040af90480 state to ffff8800d7ad6400
>[   27.605685] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f1b5e800 state to ffff8800d7ad6400
>[   27.605687] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88040af90480 to [CRTC:26:crtc-0]
>[   27.605688] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff88040af90480
>[   27.605690] [drm:drm_atomic_check_only] checking ffff8800d7ad6400
>[   27.605693] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   27.605695] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   27.605698] [drm:drm_atomic_commit] commiting ffff8800d7ad6400
>[   27.605707] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800d7ad6400
>[   27.605709] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d7ad6400
>[   27.605713] [drm:drm_atomic_state_init] Allocated atomic state ffff8800d7ad6400
>[   27.605715] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff88040af90240 state to ffff8800d7ad6400
>[   27.605717] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f1b5d800 state to ffff8800d7ad6400
>[   27.605719] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88040af90240 to [CRTC:30:crtc-1]
>[   27.605721] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff88040af90240
>[   27.605722] [drm:drm_atomic_check_only] checking ffff8800d7ad6400
>[   27.605725] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   27.605727] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   27.605730] [drm:drm_atomic_commit] commiting ffff8800d7ad6400
>[   27.605738] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800d7ad6400
>[   27.605740] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d7ad6400
>[   27.612798] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1]
>[   27.612801] [drm:intel_dp_detect] [CONNECTOR:39:eDP-1]
>[   27.613137] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[   27.613455] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   27.613792] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1] probed modes :
>[   27.613798] [drm:drm_mode_debug_printmodeline] Modeline 65:"1366x768" 60 70000 1366 1402 1438 1476 768 772 780 790 0x8 0xa
>[   27.613935] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1]
>[   27.613938] [drm:intel_crt_detect] [CONNECTOR:36:VGA-1] force=1
>[   27.613947] [drm:intel_ironlake_crt_detect_hotplug] ironlake hotplug adpa=0xf40000, result 0
>[   27.613948] [drm:intel_crt_detect] CRT not detected via hotplug
>[   27.614614] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   27.614616] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK on first message, retry
>[   27.614792] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   27.614796] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   27.614797] [drm:intel_crt_get_edid] CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   27.614800] [drm:intel_gmbus_force_bit] enabling bit-banging on i915 gmbus vga. force bit now 1
>[   27.615782] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   27.615785] [drm:intel_gmbus_force_bit] disabling bit-banging on i915 gmbus vga. force bit now 0
>[   27.615786] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found]
>[   27.615788] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1] disconnected
>[   27.615799] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1]
>[   27.615800] [drm:intel_dp_detect] [CONNECTOR:45:DP-1]
>[   27.615808] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1] disconnected
>[   27.615811] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1]
>[   27.615812] [drm:intel_hdmi_detect] [CONNECTOR:49:HDMI-A-1]
>[   27.723906] [drm:intel_hdmi_detect] HDMI live status down
>[   27.723912] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1] disconnected
>[   27.723938] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2]
>[   27.723940] [drm:intel_dp_detect] [CONNECTOR:52:DP-2]
>[   27.729311] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.734686] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.740059] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.745426] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.750793] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.756170] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.761538] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.766901] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.772265] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.777624] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.782994] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.788369] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.793734] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.799106] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.804480] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.809848] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.815205] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.820569] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.825927] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.831288] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.836647] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.841994] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.847355] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.852722] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.858095] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.863460] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.868840] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.874217] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.879581] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.884940] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.890311] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.895685] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   27.895688] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   27.895691] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2] disconnected
>[   27.895723] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2]
>[   27.895735] [drm:intel_hdmi_detect] [CONNECTOR:56:HDMI-A-2]
>[   27.924046] [drm:intel_hdmi_dp_dual_mode_detect] DP dual mode adaptor (type 1 HDMI) detected (max TMDS clock: 165000 kHz)
>[   27.924049] [drm:drm_detect_monitor_audio] Monitor has basic audio support
>[   27.924096] [drm:drm_edid_to_eld] ELD monitor M230HDL
>[   27.924098] [drm:parse_hdmi_vsdb] HDMI: DVI dual 0, max TMDS clock 0, latency present 0 0, video latency 0 0, audio latency 0 0
>[   27.924099] [drm:drm_edid_to_eld] ELD size 32, SAD count 1
>[   27.924121] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2] probed modes :
>[   27.924123] [drm:drm_mode_debug_printmodeline] Modeline 70:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0xa
>[   27.924125] [drm:drm_mode_debug_printmodeline] Modeline 122:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   27.924126] [drm:drm_mode_debug_printmodeline] Modeline 131:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   27.924128] [drm:drm_mode_debug_printmodeline] Modeline 120:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   27.924129] [drm:drm_mode_debug_printmodeline] Modeline 130:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   27.924131] [drm:drm_mode_debug_printmodeline] Modeline 123:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   27.924132] [drm:drm_mode_debug_printmodeline] Modeline 83:"1920x1080" 50 148350 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   27.924133] [drm:drm_mode_debug_printmodeline] Modeline 89:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   27.924135] [drm:drm_mode_debug_printmodeline] Modeline 95:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   27.924136] [drm:drm_mode_debug_printmodeline] Modeline 107:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   27.924138] [drm:drm_mode_debug_printmodeline] Modeline 96:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   27.924139] [drm:drm_mode_debug_printmodeline] Modeline 73:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[   27.924141] [drm:drm_mode_debug_printmodeline] Modeline 68:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   27.924142] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   27.924143] [drm:drm_mode_debug_printmodeline] Modeline 71:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   27.924145] [drm:drm_mode_debug_printmodeline] Modeline 84:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   27.924146] [drm:drm_mode_debug_printmodeline] Modeline 85:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   27.924147] [drm:drm_mode_debug_printmodeline] Modeline 86:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   27.924149] [drm:drm_mode_debug_printmodeline] Modeline 87:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   27.924150] [drm:drm_mode_debug_printmodeline] Modeline 88:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   27.924151] [drm:drm_mode_debug_printmodeline] Modeline 76:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   27.924153] [drm:drm_mode_debug_printmodeline] Modeline 77:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[   27.924154] [drm:drm_mode_debug_printmodeline] Modeline 72:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   27.924156] [drm:drm_mode_debug_printmodeline] Modeline 92:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   27.924157] [drm:drm_mode_debug_printmodeline] Modeline 103:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   27.924158] [drm:drm_mode_debug_printmodeline] Modeline 90:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   27.924160] [drm:drm_mode_debug_printmodeline] Modeline 78:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   27.924161] [drm:drm_mode_debug_printmodeline] Modeline 79:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   27.924162] [drm:drm_mode_debug_printmodeline] Modeline 80:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   27.924164] [drm:drm_mode_debug_printmodeline] Modeline 101:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   27.924165] [drm:drm_mode_debug_printmodeline] Modeline 81:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   27.924166] [drm:drm_mode_debug_printmodeline] Modeline 82:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   27.924247] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3]
>[   27.924248] [drm:intel_dp_detect] [CONNECTOR:58:DP-3]
>[   27.924256] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3] disconnected
>[   27.924259] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3]
>[   27.924260] [drm:intel_hdmi_detect] [CONNECTOR:62:HDMI-A-3]
>[   28.030602] [drm:intel_hdmi_detect] HDMI live status down
>[   28.030609] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3] disconnected
>[   28.030735] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca90000
>[   28.030738] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ef39ae40 state to ffff8803fca90000
>[   28.030741] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e5000 state to ffff8803fca90000
>[   28.030743] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39ae40 to [CRTC:26:crtc-0]
>[   28.030744] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8803ef39ae40
>[   28.030746] [drm:drm_atomic_check_only] checking ffff8803fca90000
>[   28.030751] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   28.030753] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   28.030758] [drm:drm_atomic_commit] commiting ffff8803fca90000
>[   28.030774] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca90000
>[   28.030776] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca90000
>[   28.030780] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca90000
>[   28.030782] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39af00 state to ffff8803fca90000
>[   28.030784] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e7800 state to ffff8803fca90000
>[   28.030785] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39af00 to [CRTC:30:crtc-1]
>[   28.030786] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39af00
>[   28.030788] [drm:drm_atomic_check_only] checking ffff8803fca90000
>[   28.030790] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   28.030791] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   28.030793] [drm:drm_atomic_commit] commiting ffff8803fca90000
>[   28.030800] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca90000
>[   28.030802] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca90000
>[   28.031294] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1]
>[   28.031297] [drm:intel_dp_detect] [CONNECTOR:39:eDP-1]
>[   28.031625] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[   28.031938] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   28.032296] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1] probed modes :
>[   28.032299] [drm:drm_mode_debug_printmodeline] Modeline 65:"1366x768" 60 70000 1366 1402 1438 1476 768 772 780 790 0x8 0xa
>[   28.032405] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1]
>[   28.032406] [drm:intel_crt_detect] [CONNECTOR:36:VGA-1] force=1
>[   28.032414] [drm:intel_ironlake_crt_detect_hotplug] ironlake hotplug adpa=0xf40000, result 0
>[   28.032414] [drm:intel_crt_detect] CRT not detected via hotplug
>[   28.032587] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   28.032588] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK on first message, retry
>[   28.032757] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   28.032758] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   28.032759] [drm:intel_crt_get_edid] CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   28.032760] [drm:intel_gmbus_force_bit] enabling bit-banging on i915 gmbus vga. force bit now 1
>[   28.033760] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   28.033762] [drm:intel_gmbus_force_bit] disabling bit-banging on i915 gmbus vga. force bit now 0
>[   28.033763] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found]
>[   28.033764] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1] disconnected
>[   28.033770] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1]
>[   28.033771] [drm:intel_dp_detect] [CONNECTOR:45:DP-1]
>[   28.033774] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1] disconnected
>[   28.033778] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1]
>[   28.033779] [drm:intel_hdmi_detect] [CONNECTOR:49:HDMI-A-1]
>[   28.137254] [drm:intel_hdmi_detect] HDMI live status down
>[   28.137262] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1] disconnected
>[   28.137292] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2]
>[   28.137294] [drm:intel_dp_detect] [CONNECTOR:52:DP-2]
>[   28.142675] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.148048] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.153420] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.158795] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.164159] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.169527] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.174910] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.180276] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.185651] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.191015] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.196357] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.201714] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.207079] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.212446] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.217807] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.223162] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.228537] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.233906] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.239271] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.244631] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.249982] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.255347] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.260702] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.266059] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.271425] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.276783] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.282142] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.287507] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.292858] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.298227] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.303594] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.308963] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.308966] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   28.308968] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2] disconnected
>[   28.308995] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2]
>[   28.308998] [drm:intel_hdmi_detect] [CONNECTOR:56:HDMI-A-2]
>[   28.337392] [drm:intel_hdmi_dp_dual_mode_detect] DP dual mode adaptor (type 1 HDMI) detected (max TMDS clock: 165000 kHz)
>[   28.337396] [drm:drm_detect_monitor_audio] Monitor has basic audio support
>[   28.337458] [drm:drm_edid_to_eld] ELD monitor M230HDL
>[   28.337460] [drm:parse_hdmi_vsdb] HDMI: DVI dual 0, max TMDS clock 0, latency present 0 0, video latency 0 0, audio latency 0 0
>[   28.337462] [drm:drm_edid_to_eld] ELD size 32, SAD count 1
>[   28.337493] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2] probed modes :
>[   28.337496] [drm:drm_mode_debug_printmodeline] Modeline 70:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0xa
>[   28.337498] [drm:drm_mode_debug_printmodeline] Modeline 122:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   28.337500] [drm:drm_mode_debug_printmodeline] Modeline 131:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   28.337502] [drm:drm_mode_debug_printmodeline] Modeline 120:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   28.337504] [drm:drm_mode_debug_printmodeline] Modeline 130:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   28.337506] [drm:drm_mode_debug_printmodeline] Modeline 123:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   28.337508] [drm:drm_mode_debug_printmodeline] Modeline 83:"1920x1080" 50 148350 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   28.337510] [drm:drm_mode_debug_printmodeline] Modeline 89:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   28.337512] [drm:drm_mode_debug_printmodeline] Modeline 95:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   28.337513] [drm:drm_mode_debug_printmodeline] Modeline 107:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   28.337515] [drm:drm_mode_debug_printmodeline] Modeline 96:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   28.337517] [drm:drm_mode_debug_printmodeline] Modeline 73:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[   28.337519] [drm:drm_mode_debug_printmodeline] Modeline 68:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   28.337521] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   28.337523] [drm:drm_mode_debug_printmodeline] Modeline 71:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   28.337524] [drm:drm_mode_debug_printmodeline] Modeline 84:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   28.337526] [drm:drm_mode_debug_printmodeline] Modeline 85:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   28.337528] [drm:drm_mode_debug_printmodeline] Modeline 86:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   28.337530] [drm:drm_mode_debug_printmodeline] Modeline 87:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   28.337532] [drm:drm_mode_debug_printmodeline] Modeline 88:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   28.337534] [drm:drm_mode_debug_printmodeline] Modeline 76:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   28.337535] [drm:drm_mode_debug_printmodeline] Modeline 77:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[   28.337537] [drm:drm_mode_debug_printmodeline] Modeline 72:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   28.337539] [drm:drm_mode_debug_printmodeline] Modeline 92:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   28.337541] [drm:drm_mode_debug_printmodeline] Modeline 103:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   28.337543] [drm:drm_mode_debug_printmodeline] Modeline 90:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   28.337544] [drm:drm_mode_debug_printmodeline] Modeline 78:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   28.337546] [drm:drm_mode_debug_printmodeline] Modeline 79:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   28.337548] [drm:drm_mode_debug_printmodeline] Modeline 80:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   28.337550] [drm:drm_mode_debug_printmodeline] Modeline 101:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   28.337551] [drm:drm_mode_debug_printmodeline] Modeline 81:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   28.337553] [drm:drm_mode_debug_printmodeline] Modeline 82:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   28.337677] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3]
>[   28.337678] [drm:intel_dp_detect] [CONNECTOR:58:DP-3]
>[   28.337688] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3] disconnected
>[   28.337693] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3]
>[   28.337694] [drm:intel_hdmi_detect] [CONNECTOR:62:HDMI-A-3]
>[   28.443923] [drm:intel_hdmi_detect] HDMI live status down
>[   28.443930] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3] disconnected
>[   28.444156] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1]
>[   28.444158] [drm:intel_dp_detect] [CONNECTOR:39:eDP-1]
>[   28.444489] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[   28.444807] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   28.445159] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1] probed modes :
>[   28.445162] [drm:drm_mode_debug_printmodeline] Modeline 65:"1366x768" 60 70000 1366 1402 1438 1476 768 772 780 790 0x8 0xa
>[   28.445281] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1]
>[   28.445283] [drm:intel_crt_detect] [CONNECTOR:36:VGA-1] force=1
>[   28.445292] [drm:intel_ironlake_crt_detect_hotplug] ironlake hotplug adpa=0xf40000, result 0
>[   28.445293] [drm:intel_crt_detect] CRT not detected via hotplug
>[   28.445471] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   28.445473] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK on first message, retry
>[   28.445651] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   28.445653] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   28.445655] [drm:intel_crt_get_edid] CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   28.445656] [drm:intel_gmbus_force_bit] enabling bit-banging on i915 gmbus vga. force bit now 1
>[   28.446654] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   28.446656] [drm:intel_gmbus_force_bit] disabling bit-banging on i915 gmbus vga. force bit now 0
>[   28.446657] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found]
>[   28.446658] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1] disconnected
>[   28.446665] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1]
>[   28.446666] [drm:intel_dp_detect] [CONNECTOR:45:DP-1]
>[   28.446674] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1] disconnected
>[   28.446678] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1]
>[   28.446679] [drm:intel_hdmi_detect] [CONNECTOR:49:HDMI-A-1]
>[   28.550583] [drm:intel_hdmi_detect] HDMI live status down
>[   28.550589] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1] disconnected
>[   28.550613] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2]
>[   28.550615] [drm:intel_dp_detect] [CONNECTOR:52:DP-2]
>[   28.555992] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.561362] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.566716] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.572093] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.577460] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.582828] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.588198] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.593563] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.598933] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.604305] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.609675] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.615040] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.620397] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.625773] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.631144] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.636519] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.641893] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.647259] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.652626] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.657975] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.663346] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.668727] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.674100] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.679473] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.684848] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.690220] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.695610] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.700948] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.706303] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.711678] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.717046] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.722421] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.722427] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   28.722431] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2] disconnected
>[   28.722475] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2]
>[   28.722478] [drm:intel_hdmi_detect] [CONNECTOR:56:HDMI-A-2]
>[   28.750856] [drm:intel_hdmi_dp_dual_mode_detect] DP dual mode adaptor (type 1 HDMI) detected (max TMDS clock: 165000 kHz)
>[   28.750860] [drm:drm_detect_monitor_audio] Monitor has basic audio support
>[   28.750922] [drm:drm_edid_to_eld] ELD monitor M230HDL
>[   28.750924] [drm:parse_hdmi_vsdb] HDMI: DVI dual 0, max TMDS clock 0, latency present 0 0, video latency 0 0, audio latency 0 0
>[   28.750925] [drm:drm_edid_to_eld] ELD size 32, SAD count 1
>[   28.750957] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2] probed modes :
>[   28.750960] [drm:drm_mode_debug_printmodeline] Modeline 70:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0xa
>[   28.750962] [drm:drm_mode_debug_printmodeline] Modeline 122:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   28.750963] [drm:drm_mode_debug_printmodeline] Modeline 131:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   28.750965] [drm:drm_mode_debug_printmodeline] Modeline 120:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   28.750967] [drm:drm_mode_debug_printmodeline] Modeline 130:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   28.750969] [drm:drm_mode_debug_printmodeline] Modeline 123:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   28.750971] [drm:drm_mode_debug_printmodeline] Modeline 83:"1920x1080" 50 148350 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   28.750973] [drm:drm_mode_debug_printmodeline] Modeline 89:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   28.750975] [drm:drm_mode_debug_printmodeline] Modeline 95:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   28.750977] [drm:drm_mode_debug_printmodeline] Modeline 107:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   28.750978] [drm:drm_mode_debug_printmodeline] Modeline 96:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   28.750980] [drm:drm_mode_debug_printmodeline] Modeline 73:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[   28.750982] [drm:drm_mode_debug_printmodeline] Modeline 68:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   28.750984] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   28.750986] [drm:drm_mode_debug_printmodeline] Modeline 71:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   28.750988] [drm:drm_mode_debug_printmodeline] Modeline 84:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   28.750989] [drm:drm_mode_debug_printmodeline] Modeline 85:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   28.750991] [drm:drm_mode_debug_printmodeline] Modeline 86:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   28.750993] [drm:drm_mode_debug_printmodeline] Modeline 87:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   28.750995] [drm:drm_mode_debug_printmodeline] Modeline 88:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   28.750997] [drm:drm_mode_debug_printmodeline] Modeline 76:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   28.750998] [drm:drm_mode_debug_printmodeline] Modeline 77:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[   28.751000] [drm:drm_mode_debug_printmodeline] Modeline 72:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   28.751002] [drm:drm_mode_debug_printmodeline] Modeline 92:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   28.751004] [drm:drm_mode_debug_printmodeline] Modeline 103:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   28.751006] [drm:drm_mode_debug_printmodeline] Modeline 90:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   28.751007] [drm:drm_mode_debug_printmodeline] Modeline 78:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   28.751009] [drm:drm_mode_debug_printmodeline] Modeline 79:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   28.751011] [drm:drm_mode_debug_printmodeline] Modeline 80:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   28.751013] [drm:drm_mode_debug_printmodeline] Modeline 101:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   28.751015] [drm:drm_mode_debug_printmodeline] Modeline 81:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   28.751016] [drm:drm_mode_debug_printmodeline] Modeline 82:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   28.751136] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3]
>[   28.751138] [drm:intel_dp_detect] [CONNECTOR:58:DP-3]
>[   28.751147] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3] disconnected
>[   28.751151] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3]
>[   28.751153] [drm:intel_hdmi_detect] [CONNECTOR:62:HDMI-A-3]
>[   28.857268] [drm:intel_hdmi_detect] HDMI live status down
>[   28.857274] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3] disconnected
>[   28.857653] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1]
>[   28.857656] [drm:intel_dp_detect] [CONNECTOR:39:eDP-1]
>[   28.857983] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[   28.858298] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   28.858639] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:39:eDP-1] probed modes :
>[   28.858642] [drm:drm_mode_debug_printmodeline] Modeline 65:"1366x768" 60 70000 1366 1402 1438 1476 768 772 780 790 0x8 0xa
>[   28.858760] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1]
>[   28.858762] [drm:intel_crt_detect] [CONNECTOR:36:VGA-1] force=1
>[   28.858769] [drm:intel_ironlake_crt_detect_hotplug] ironlake hotplug adpa=0xf40000, result 0
>[   28.858770] [drm:intel_crt_detect] CRT not detected via hotplug
>[   28.858974] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   28.858975] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK on first message, retry
>[   28.859168] [drm:do_gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 w(1)
>[   28.859170] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   28.859171] [drm:intel_crt_get_edid] CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   28.859172] [drm:intel_gmbus_force_bit] enabling bit-banging on i915 gmbus vga. force bit now 1
>[   28.860159] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   28.860160] [drm:intel_gmbus_force_bit] disabling bit-banging on i915 gmbus vga. force bit now 0
>[   28.860161] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found]
>[   28.860162] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:36:VGA-1] disconnected
>[   28.860169] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1]
>[   28.860170] [drm:intel_dp_detect] [CONNECTOR:45:DP-1]
>[   28.860172] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:45:DP-1] disconnected
>[   28.860176] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1]
>[   28.860177] [drm:intel_hdmi_detect] [CONNECTOR:49:HDMI-A-1]
>[   28.963903] [drm:intel_hdmi_detect] HDMI live status down
>[   28.963909] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:49:HDMI-A-1] disconnected
>[   28.963934] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2]
>[   28.963935] [drm:intel_dp_detect] [CONNECTOR:52:DP-2]
>[   28.969325] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.974686] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.980059] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.985432] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.990806] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   28.996162] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.001537] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.006904] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.012265] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.017626] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.022984] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.028349] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.033717] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.039089] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.044449] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.049822] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.055191] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.060556] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.065917] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.071286] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.076649] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.082011] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.087379] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.092734] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.098100] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.103459] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.108831] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.114203] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.119570] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.124943] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.130312] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.135676] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450048
>[   29.135679] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   29.135682] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:52:DP-2] disconnected
>[   29.135709] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2]
>[   29.135712] [drm:intel_hdmi_detect] [CONNECTOR:56:HDMI-A-2]
>[   29.164110] [drm:intel_hdmi_dp_dual_mode_detect] DP dual mode adaptor (type 1 HDMI) detected (max TMDS clock: 165000 kHz)
>[   29.164114] [drm:drm_detect_monitor_audio] Monitor has basic audio support
>[   29.164176] [drm:drm_edid_to_eld] ELD monitor M230HDL
>[   29.164178] [drm:parse_hdmi_vsdb] HDMI: DVI dual 0, max TMDS clock 0, latency present 0 0, video latency 0 0, audio latency 0 0
>[   29.164180] [drm:drm_edid_to_eld] ELD size 32, SAD count 1
>[   29.164212] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:HDMI-A-2] probed modes :
>[   29.164215] [drm:drm_mode_debug_printmodeline] Modeline 70:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0xa
>[   29.164217] [drm:drm_mode_debug_printmodeline] Modeline 122:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   29.164219] [drm:drm_mode_debug_printmodeline] Modeline 131:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   29.164221] [drm:drm_mode_debug_printmodeline] Modeline 120:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   29.164224] [drm:drm_mode_debug_printmodeline] Modeline 130:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   29.164227] [drm:drm_mode_debug_printmodeline] Modeline 123:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   29.164230] [drm:drm_mode_debug_printmodeline] Modeline 83:"1920x1080" 50 148350 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   29.164232] [drm:drm_mode_debug_printmodeline] Modeline 89:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   29.164234] [drm:drm_mode_debug_printmodeline] Modeline 95:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   29.164236] [drm:drm_mode_debug_printmodeline] Modeline 107:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   29.164237] [drm:drm_mode_debug_printmodeline] Modeline 96:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   29.164239] [drm:drm_mode_debug_printmodeline] Modeline 73:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[   29.164241] [drm:drm_mode_debug_printmodeline] Modeline 68:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   29.164243] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   29.164245] [drm:drm_mode_debug_printmodeline] Modeline 71:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   29.164247] [drm:drm_mode_debug_printmodeline] Modeline 84:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   29.164248] [drm:drm_mode_debug_printmodeline] Modeline 85:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   29.164250] [drm:drm_mode_debug_printmodeline] Modeline 86:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   29.164252] [drm:drm_mode_debug_printmodeline] Modeline 87:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   29.164254] [drm:drm_mode_debug_printmodeline] Modeline 88:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   29.164256] [drm:drm_mode_debug_printmodeline] Modeline 76:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   29.164257] [drm:drm_mode_debug_printmodeline] Modeline 77:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[   29.164259] [drm:drm_mode_debug_printmodeline] Modeline 72:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   29.164261] [drm:drm_mode_debug_printmodeline] Modeline 92:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   29.164263] [drm:drm_mode_debug_printmodeline] Modeline 103:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   29.164265] [drm:drm_mode_debug_printmodeline] Modeline 90:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   29.164267] [drm:drm_mode_debug_printmodeline] Modeline 78:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   29.164268] [drm:drm_mode_debug_printmodeline] Modeline 79:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   29.164270] [drm:drm_mode_debug_printmodeline] Modeline 80:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   29.164272] [drm:drm_mode_debug_printmodeline] Modeline 101:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   29.164274] [drm:drm_mode_debug_printmodeline] Modeline 81:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   29.164275] [drm:drm_mode_debug_printmodeline] Modeline 82:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   29.164397] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3]
>[   29.164399] [drm:intel_dp_detect] [CONNECTOR:58:DP-3]
>[   29.164409] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:58:DP-3] disconnected
>[   29.164414] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3]
>[   29.164415] [drm:intel_hdmi_detect] [CONNECTOR:62:HDMI-A-3]
>[   29.270558] [drm:intel_hdmi_detect] HDMI live status down
>[   29.270564] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:62:HDMI-A-3] disconnected
>[   29.270689] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca91400
>[   29.270693] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ef39aa80 state to ffff8803fca91400
>[   29.270696] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e5800 state to ffff8803fca91400
>[   29.270698] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39aa80 to [CRTC:26:crtc-0]
>[   29.270699] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8803ef39aa80
>[   29.270701] [drm:drm_atomic_check_only] checking ffff8803fca91400
>[   29.270706] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   29.270707] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   29.270713] [drm:drm_atomic_commit] commiting ffff8803fca91400
>[   29.270729] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca91400
>[   29.270731] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca91400
>[   29.270734] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca91400
>[   29.270736] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39ae40 state to ffff8803fca91400
>[   29.270738] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e5000 state to ffff8803fca91400
>[   29.270740] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39ae40 to [CRTC:30:crtc-1]
>[   29.270741] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39ae40
>[   29.270742] [drm:drm_atomic_check_only] checking ffff8803fca91400
>[   29.270744] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   29.270745] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   29.270748] [drm:drm_atomic_commit] commiting ffff8803fca91400
>[   29.270755] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca91400
>[   29.270756] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca91400
>[   29.366716] [drm:drm_mode_addfb2] [FB:91]
>[   29.403987] [drm:drm_mode_addfb2] [FB:75]
>[   29.413239] [drm:drm_mode_addfb2] [FB:91]
>[   29.429546] [drm:drm_mode_addfb2] [FB:106]
>[   29.454857] [drm:drm_mode_addfb2] [FB:75]
>[   29.462811] [drm:drm_mode_addfb2] [FB:91]
>[   29.479479] [drm:drm_mode_addfb2] [FB:106]
>[   29.496156] [drm:drm_mode_addfb2] [FB:75]
>[   29.512848] [drm:drm_mode_addfb2] [FB:91]
>[   29.529489] [drm:drm_mode_addfb2] [FB:106]
>[   29.546172] [drm:drm_mode_addfb2] [FB:75]
>[   29.562126] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ecac7c00
>[   29.562132] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a57800 state to ffff8803ecac7c00
>[   29.562134] [drm:drm_atomic_check_only] checking ffff8803ecac7c00
>[   29.562136] [drm:drm_atomic_helper_check_modeset] [CRTC:30:crtc-1] needs all connectors, enable: y, active: y
>[   29.562138] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff8803ecac7c00
>[   29.562141] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:56] ffff8803fa91cf80 state to ffff8803ecac7c00
>[   29.562144] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane-3] ffff8803fea3ba80 state to ffff8803ecac7c00
>[   29.562145] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b540 state to ffff8803ecac7c00
>[   29.562148] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:30:crtc-1] to ffff8803ecac7c00
>[   29.562150] [drm:connected_sink_compute_bpp] [CONNECTOR:56:HDMI-A-2] checking for sink bpp constrains
>[   29.562151] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to EDID reported max of 24
>[   29.562154] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[   29.562155] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[   29.562157] [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[   29.562159] [drm:intel_dump_pipe_config] [CRTC:30][modeset] config ffff880400a57800 for pipe B
>[   29.562160] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   29.562162] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   29.562163] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   29.562165] [drm:intel_dump_pipe_config] dp: 0, lanes: 4, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   29.562166] [drm:intel_dump_pipe_config] dp: 0, lanes: 4, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   29.562167] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   29.562168] [drm:intel_dump_pipe_config] requested mode:
>[   29.562171] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0xa
>[   29.562172] [drm:intel_dump_pipe_config] adjusted mode:
>[   29.562174] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0xa
>[   29.562176] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x0 flags: 0xa
>[   29.562177] [drm:intel_dump_pipe_config] port clock: 148500
>[   29.562178] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   29.562179] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[   29.562181] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   29.562182] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   29.562183] [drm:intel_dump_pipe_config] ips: 0
>[   29.562184] [drm:intel_dump_pipe_config] double wide: 0
>[   29.562185] [drm:intel_dump_pipe_config] ddi_pll_sel: 0x80000000; dpll_hw_state: wrpll: 0xb0210614 spll: 0x0
>[   29.562186] [drm:intel_dump_pipe_config] planes on this crtc
>[   29.562188] [drm:intel_dump_pipe_config] STANDARD PLANE:28 plane: 1.0 idx: 3 enabled
>[   29.562190] [drm:intel_dump_pipe_config] 	FB:75, fb = 1920x1080 format = 0x34325258
>[   29.562191] [drm:intel_dump_pipe_config] 	scaler:0 src (0, 0) 1920x1080 dst (0, 0) 1920x1080
>[   29.562193] [drm:intel_dump_pipe_config] CURSOR PLANE:29 plane: 1.2 idx: 4 enabled
>[   29.562194] [drm:intel_dump_pipe_config] 	FB:99, fb = 256x256 format = 0x34325241
>[   29.562196] [drm:intel_dump_pipe_config] 	scaler:0 src (0, 0) 256x256 dst (1352, 540) 256x256
>[   29.562198] [drm:intel_dump_pipe_config] STANDARD PLANE:31 plane: 1.1 idx: 5 disabled, scaler_id = 0
>[   29.562201] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff880400a50000 state to ffff8803ecac7c00
>[   29.562203] [drm:drm_atomic_get_crtc_state] Added [CRTC:34:crtc-2] ffff880400a55800 state to ffff8803ecac7c00
>[   29.562206] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:28] with fb 75
>[   29.562207] [drm:intel_plane_atomic_calc_changes] [PLANE:28] visible 1 -> 1, off 1, on 1, ms 1
>[   29.562209] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   29.562211] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 1, on 1, ms 1
>[   29.563262] [drm:intel_find_shared_dpll] CRTC:30 allocated WRPLL 1
>[   29.563264] [drm:intel_reference_shared_dpll] using WRPLL 1 for pipe B
>[   29.563268] [drm:drm_atomic_commit] commiting ffff8803ecac7c00
>[   29.579446] [drm:intel_disable_pipe] disabling pipe B
>[   29.596692] [drm:intel_disable_shared_dpll] disable WRPLL 1 (active 2, on? 1) for crtc 30
>[   29.596696] [drm:intel_disable_shared_dpll] disabling WRPLL 1
>[   29.596702] [drm:verify_encoder_state] [ENCODER:37:DAC-37]
>[   29.596705] [drm:verify_encoder_state] [ENCODER:38:TMDS-38]
>[   29.596706] [drm:verify_encoder_state] [ENCODER:44:TMDS-44]
>[   29.596708] [drm:verify_encoder_state] [ENCODER:46:DP MST-46]
>[   29.596709] [drm:verify_encoder_state] [ENCODER:47:DP MST-47]
>[   29.596710] [drm:verify_encoder_state] [ENCODER:48:DP MST-48]
>[   29.596711] [drm:verify_encoder_state] [ENCODER:51:TMDS-51]
>[   29.596712] [drm:verify_encoder_state] [ENCODER:53:DP MST-53]
>[   29.596713] [drm:verify_encoder_state] [ENCODER:54:DP MST-54]
>[   29.596714] [drm:verify_encoder_state] [ENCODER:55:DP MST-55]
>[   29.596715] [drm:verify_encoder_state] [ENCODER:57:TMDS-57]
>[   29.596716] [drm:verify_encoder_state] [ENCODER:59:DP MST-59]
>[   29.596717] [drm:verify_encoder_state] [ENCODER:60:DP MST-60]
>[   29.596718] [drm:verify_encoder_state] [ENCODER:61:DP MST-61]
>[   29.596719] [drm:intel_connector_verify_state] [CONNECTOR:36:VGA-1]
>[   29.596721] [drm:intel_connector_verify_state] [CONNECTOR:45:DP-1]
>[   29.596722] [drm:intel_connector_verify_state] [CONNECTOR:49:HDMI-A-1]
>[   29.596724] [drm:intel_connector_verify_state] [CONNECTOR:52:DP-2]
>[   29.596725] [drm:intel_connector_verify_state] [CONNECTOR:58:DP-3]
>[   29.596727] [drm:intel_connector_verify_state] [CONNECTOR:62:HDMI-A-3]
>[   29.596728] [drm:verify_single_dpll_state] WRPLL 1
>[   29.596729] [drm:verify_single_dpll_state] WRPLL 2
>[   29.596731] [drm:verify_single_dpll_state] SPLL
>[   29.596732] [drm:verify_single_dpll_state] LCPLL 810
>[   29.596733] [drm:verify_single_dpll_state] LCPLL 1350
>[   29.596734] [drm:verify_single_dpll_state] LCPLL 2700
>[   29.596738] [drm:intel_enable_shared_dpll] enable WRPLL 1 (active 2, on? 0) for crtc 30
>[   29.596738] [drm:intel_enable_shared_dpll] enabling WRPLL 1
>[   29.596805] [drm:intel_enable_pipe] enabling pipe B
>[   29.630216] [drm:intel_connector_verify_state] [CONNECTOR:56:HDMI-A-2]
>[   29.630222] [drm:verify_crtc_state] [CRTC:30]
>[   29.630233] [drm:verify_single_dpll_state] WRPLL 1
>[   29.630238] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ecac7c00
>[   29.630242] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ecac7c00
>[   29.630516] [drm:drm_mode_addfb2] [FB:91]
>[   29.646932] [drm:drm_mode_addfb2] [FB:106]
>[   29.663560] [drm:drm_mode_addfb2] [FB:75]
>[   29.680235] [drm:drm_mode_addfb2] [FB:91]
>[   29.696868] [drm:drm_mode_addfb2] [FB:106]
>[   29.713538] [drm:drm_mode_addfb2] [FB:75]
>[   29.731980] [drm:drm_mode_addfb2] [FB:91]
>[   29.747085] [drm:drm_mode_addfb2] [FB:75]
>[   29.763593] [drm:drm_mode_addfb2] [FB:106]
>[   29.780239] [drm:drm_mode_addfb2] [FB:91]
>[   29.796896] [drm:drm_mode_addfb2] [FB:75]
>[   29.813562] [drm:drm_mode_addfb2] [FB:106]
>[   29.830237] [drm:drm_mode_addfb2] [FB:91]
>[   29.846910] [drm:drm_mode_addfb2] [FB:75]
>[   29.863579] [drm:drm_mode_addfb2] [FB:106]
>[   29.880242] [drm:drm_mode_addfb2] [FB:91]
>[   29.896916] [drm:drm_mode_addfb2] [FB:75]
>[   29.913578] [drm:drm_mode_addfb2] [FB:106]
>[   29.930246] [drm:drm_mode_addfb2] [FB:91]
>[   29.946910] [drm:drm_mode_addfb2] [FB:75]
>[   29.963575] [drm:drm_mode_addfb2] [FB:106]
>[   29.980240] [drm:drm_mode_addfb2] [FB:91]
>[   29.996901] [drm:drm_mode_addfb2] [FB:75]
>[   30.013567] [drm:drm_mode_addfb2] [FB:106]
>[   30.045888] [drm:drm_mode_addfb2] [FB:75]
>[   30.296375] [drm:drm_mode_addfb2] [FB:91]
>[   30.545982] [drm:drm_mode_addfb2] [FB:75]
>[   30.795940] [drm:drm_mode_addfb2] [FB:91]
>[   31.047912] [drm:drm_mode_addfb2] [FB:75]
>[   31.295993] [drm:drm_mode_addfb2] [FB:91]
>[   31.308251] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96000
>[   31.308255] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ef39a6c0 state to ffff8803fca96000
>[   31.308258] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e2800 state to ffff8803fca96000
>[   31.308259] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a6c0 to [CRTC:26:crtc-0]
>[   31.308261] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8803ef39a6c0
>[   31.308263] [drm:drm_atomic_check_only] checking ffff8803fca96000
>[   31.308267] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.308269] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.308273] [drm:drm_atomic_commit] commiting ffff8803fca96000
>[   31.308284] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96000
>[   31.308286] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96000
>[   31.308290] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96000
>[   31.308291] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39aa80 state to ffff8803fca96000
>[   31.308293] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e4000 state to ffff8803fca96000
>[   31.308295] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39aa80 to [CRTC:30:crtc-1]
>[   31.308296] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39aa80
>[   31.308297] [drm:drm_atomic_check_only] checking ffff8803fca96000
>[   31.308299] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.308300] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.308303] [drm:drm_atomic_commit] commiting ffff8803fca96000
>[   31.308308] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96000
>[   31.308309] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96000
>[   31.356340] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.356346] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76ac00 state to ffff8803ea4b3800
>[   31.356349] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe957800 state to ffff8803ea4b3800
>[   31.356351] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ac00 to [CRTC:26:crtc-0]
>[   31.356352] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76ac00
>[   31.356353] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.356359] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.356360] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.356366] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.356382] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.356385] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.356389] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.356391] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a6c0 state to ffff8803ea4b3800
>[   31.356393] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe954000 state to ffff8803ea4b3800
>[   31.356394] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a6c0 to [CRTC:30:crtc-1]
>[   31.356395] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a6c0
>[   31.356396] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.356398] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.356400] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.356402] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.356409] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.356410] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.380339] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.380344] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a000 state to ffff8803ea4b3800
>[   31.380347] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.380349] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:26:crtc-0]
>[   31.380350] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a000
>[   31.380352] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.380356] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.380358] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.380363] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.380380] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.380382] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.380386] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.380388] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76ac00 state to ffff8803ea4b3800
>[   31.380390] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe957800 state to ffff8803ea4b3800
>[   31.380391] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ac00 to [CRTC:30:crtc-1]
>[   31.380392] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76ac00
>[   31.380393] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.380396] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.380397] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.380399] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.380406] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.380408] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.396337] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.396343] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a6c0 state to ffff8803ea4b3800
>[   31.396346] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe954000 state to ffff8803ea4b3800
>[   31.396348] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a6c0 to [CRTC:26:crtc-0]
>[   31.396349] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a6c0
>[   31.396350] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.396356] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.396358] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.396363] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.396380] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.396382] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.396386] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.396388] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b3800
>[   31.396390] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.396391] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   31.396392] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a000
>[   31.396393] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.396395] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.396397] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.396399] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.396406] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.396407] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.420338] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.420345] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76ac00 state to ffff8803ea4b3800
>[   31.420348] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe957800 state to ffff8803ea4b3800
>[   31.420350] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ac00 to [CRTC:26:crtc-0]
>[   31.420351] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76ac00
>[   31.420352] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.420358] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.420359] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.420364] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.420382] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.420384] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.420388] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.420390] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a6c0 state to ffff8803ea4b3800
>[   31.420392] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe954000 state to ffff8803ea4b3800
>[   31.420393] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a6c0 to [CRTC:30:crtc-1]
>[   31.420395] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a6c0
>[   31.420396] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.420398] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.420399] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.420401] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.420427] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.420429] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.452336] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.452341] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a000 state to ffff8803ea4b3800
>[   31.452345] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.452346] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:26:crtc-0]
>[   31.452348] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a000
>[   31.452349] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.452354] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.452356] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.452361] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.452379] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.452381] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.452385] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.452387] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76ac00 state to ffff8803ea4b3800
>[   31.452389] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe957800 state to ffff8803ea4b3800
>[   31.452390] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ac00 to [CRTC:30:crtc-1]
>[   31.452392] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76ac00
>[   31.452393] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.452395] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.452396] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.452398] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.452405] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.452407] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.460333] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.460339] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a6c0 state to ffff8803ea4b3800
>[   31.460343] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe954000 state to ffff8803ea4b3800
>[   31.460344] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a6c0 to [CRTC:26:crtc-0]
>[   31.460346] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a6c0
>[   31.460347] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.460352] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.460354] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.460359] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.460377] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.460379] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.460383] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.460385] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b3800
>[   31.460387] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.460388] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   31.460389] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a000
>[   31.460390] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.460392] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.460394] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.460396] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.460403] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.460404] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.508331] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.508337] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76ac00 state to ffff8803ea4b3800
>[   31.508340] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe957800 state to ffff8803ea4b3800
>[   31.508342] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ac00 to [CRTC:26:crtc-0]
>[   31.508343] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76ac00
>[   31.508345] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.508350] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.508352] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.508357] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.508374] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.508376] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.508380] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.508381] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a6c0 state to ffff8803ea4b3800
>[   31.508384] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe954000 state to ffff8803ea4b3800
>[   31.508385] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a6c0 to [CRTC:30:crtc-1]
>[   31.508386] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a6c0
>[   31.508387] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.508389] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.508391] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.508393] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.508400] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.508401] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.517334] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.517339] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a000 state to ffff8803ea4b3800
>[   31.517343] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.517345] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:26:crtc-0]
>[   31.517346] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a000
>[   31.517348] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.517353] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.517354] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.517360] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.517377] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.517379] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.517383] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.517385] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76ac00 state to ffff8803ea4b3800
>[   31.517387] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe957800 state to ffff8803ea4b3800
>[   31.517389] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ac00 to [CRTC:30:crtc-1]
>[   31.517390] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76ac00
>[   31.517391] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.517393] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.517394] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.517396] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.517403] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.517405] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.532333] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.532339] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a6c0 state to ffff8803ea4b3800
>[   31.532343] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe954000 state to ffff8803ea4b3800
>[   31.532344] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a6c0 to [CRTC:26:crtc-0]
>[   31.532346] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a6c0
>[   31.532347] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.532353] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.532354] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.532360] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.532377] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.532380] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.532384] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.532386] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b3800
>[   31.532388] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.532389] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   31.532391] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a000
>[   31.532392] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.532394] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.532395] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.532397] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.532404] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.532406] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.540333] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.540338] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76ab40 state to ffff8803ea4b3800
>[   31.540342] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe957800 state to ffff8803ea4b3800
>[   31.540343] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ab40 to [CRTC:26:crtc-0]
>[   31.540345] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76ab40
>[   31.540346] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.540352] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.540353] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.540359] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.540376] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.540378] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.540383] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.540385] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a6c0 state to ffff8803ea4b3800
>[   31.540387] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe954000 state to ffff8803ea4b3800
>[   31.540388] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a6c0 to [CRTC:30:crtc-1]
>[   31.540389] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a6c0
>[   31.540391] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.540392] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.540394] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.540396] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.540422] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.540424] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.545944] [drm:drm_mode_addfb2] [FB:75]
>[   31.548228] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87cc00
>[   31.548233] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800d94fd840 state to ffff8803ec87cc00
>[   31.548236] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f3000 state to ffff8803ec87cc00
>[   31.548237] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d94fd840 to [CRTC:26:crtc-0]
>[   31.548239] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800d94fd840
>[   31.548240] [drm:drm_atomic_check_only] checking ffff8803ec87cc00
>[   31.548245] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.548246] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.548252] [drm:drm_atomic_commit] commiting ffff8803ec87cc00
>[   31.548262] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87cc00
>[   31.548264] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87cc00
>[   31.548268] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87cc00
>[   31.548270] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800d94fdc00 state to ffff8803ec87cc00
>[   31.548272] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f1800 state to ffff8803ec87cc00
>[   31.548273] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d94fdc00 to [CRTC:30:crtc-1]
>[   31.548274] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800d94fdc00
>[   31.548275] [drm:drm_atomic_check_only] checking ffff8803ec87cc00
>[   31.548277] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.548279] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.548281] [drm:drm_atomic_commit] commiting ffff8803ec87cc00
>[   31.548286] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87cc00
>[   31.548287] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87cc00
>[   31.556330] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87cc00
>[   31.556336] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800d94fd180 state to ffff8803ec87cc00
>[   31.556340] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f3800 state to ffff8803ec87cc00
>[   31.556341] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d94fd180 to [CRTC:26:crtc-0]
>[   31.556343] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800d94fd180
>[   31.556344] [drm:drm_atomic_check_only] checking ffff8803ec87cc00
>[   31.556349] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.556351] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.556356] [drm:drm_atomic_commit] commiting ffff8803ec87cc00
>[   31.556370] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87cc00
>[   31.556372] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87cc00
>[   31.556376] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87cc00
>[   31.556378] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800d94fd840 state to ffff8803ec87cc00
>[   31.556380] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f3000 state to ffff8803ec87cc00
>[   31.556381] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d94fd840 to [CRTC:30:crtc-1]
>[   31.556382] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800d94fd840
>[   31.556383] [drm:drm_atomic_check_only] checking ffff8803ec87cc00
>[   31.556385] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.556387] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.556389] [drm:drm_atomic_commit] commiting ffff8803ec87cc00
>[   31.556395] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87cc00
>[   31.556396] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87cc00
>[   31.564332] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.564337] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a000 state to ffff8803ea4b3800
>[   31.564341] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.564342] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:26:crtc-0]
>[   31.564344] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a000
>[   31.564345] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.564351] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.564352] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.564358] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.564375] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.564377] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.564382] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.564383] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   31.564386] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950800 state to ffff8803ea4b3800
>[   31.564387] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   31.564388] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76aa80
>[   31.564389] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.564391] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.564393] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.564395] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.564402] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.564403] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.572333] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.572339] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a840 state to ffff8803ea4b3800
>[   31.572342] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe952000 state to ffff8803ea4b3800
>[   31.572344] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a840 to [CRTC:26:crtc-0]
>[   31.572345] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a840
>[   31.572347] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.572352] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.572354] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.572359] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.572376] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.572378] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.572382] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.572384] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b3800
>[   31.572386] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.572387] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   31.572388] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a000
>[   31.572390] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.572391] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.572393] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.572395] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.572402] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.572404] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.580329] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.580334] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   31.580338] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe950800 state to ffff8803ea4b3800
>[   31.580339] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:26:crtc-0]
>[   31.580341] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76aa80
>[   31.580342] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.580347] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.580349] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.580354] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.580371] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.580373] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.580377] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.580379] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a840 state to ffff8803ea4b3800
>[   31.580381] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe952000 state to ffff8803ea4b3800
>[   31.580382] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a840 to [CRTC:30:crtc-1]
>[   31.580383] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a840
>[   31.580384] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.580386] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.580388] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.580390] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.580397] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.580399] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.588333] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.588339] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a000 state to ffff8803ea4b3800
>[   31.588342] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.588343] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:26:crtc-0]
>[   31.588345] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a000
>[   31.588347] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.588351] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.588353] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.588358] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.588375] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.588377] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.588381] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.588383] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   31.588385] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950800 state to ffff8803ea4b3800
>[   31.588386] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   31.588388] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76aa80
>[   31.588389] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.588391] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.588392] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.588394] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.588401] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.588402] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.596330] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.596335] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a840 state to ffff8803ea4b3800
>[   31.596339] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe952000 state to ffff8803ea4b3800
>[   31.596341] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a840 to [CRTC:26:crtc-0]
>[   31.596342] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a840
>[   31.596344] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.596349] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.596351] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.596356] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.596373] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.596375] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.596379] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.596381] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b3800
>[   31.596383] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.596385] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   31.596386] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a000
>[   31.596387] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.596389] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.596390] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.596393] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.596399] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.596401] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.604330] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.604336] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   31.604339] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe950800 state to ffff8803ea4b3800
>[   31.604341] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:26:crtc-0]
>[   31.604343] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76aa80
>[   31.604344] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.604350] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.604351] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.604357] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.604374] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.604376] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.604380] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.604382] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a840 state to ffff8803ea4b3800
>[   31.604384] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe952000 state to ffff8803ea4b3800
>[   31.604385] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a840 to [CRTC:30:crtc-1]
>[   31.604386] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a840
>[   31.604387] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.604389] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.604391] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.604393] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.604400] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.604402] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.612330] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.612335] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a000 state to ffff8803ea4b3800
>[   31.612339] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.612340] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:26:crtc-0]
>[   31.612342] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a000
>[   31.612343] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.612349] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.612350] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.612355] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.612373] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.612375] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.612379] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.612381] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   31.612383] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950800 state to ffff8803ea4b3800
>[   31.612384] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   31.612386] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76aa80
>[   31.612387] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.612389] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.612390] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.612392] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.612399] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.612400] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.620330] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.620335] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a840 state to ffff8803ea4b3800
>[   31.620339] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe952000 state to ffff8803ea4b3800
>[   31.620340] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a840 to [CRTC:26:crtc-0]
>[   31.620342] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a840
>[   31.620343] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.620348] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.620350] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.620355] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.620372] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.620374] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.620378] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.620380] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b3800
>[   31.620382] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.620384] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   31.620385] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a000
>[   31.620386] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.620388] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.620389] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.620392] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.620418] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.620419] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.628329] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.628334] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   31.628337] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe950800 state to ffff8803ea4b3800
>[   31.628339] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:26:crtc-0]
>[   31.628340] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76aa80
>[   31.628342] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.628347] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.628348] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.628354] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.628371] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.628373] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.628376] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.628378] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a840 state to ffff8803ea4b3800
>[   31.628380] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe952000 state to ffff8803ea4b3800
>[   31.628382] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a840 to [CRTC:30:crtc-1]
>[   31.628383] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a840
>[   31.628384] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.628386] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.628387] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.628389] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.628396] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.628398] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.636329] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.636334] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a000 state to ffff8803ea4b3800
>[   31.636337] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.636339] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:26:crtc-0]
>[   31.636341] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a000
>[   31.636342] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.636347] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.636349] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.636354] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.636371] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.636373] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.636377] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.636379] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   31.636381] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950800 state to ffff8803ea4b3800
>[   31.636382] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   31.636383] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76aa80
>[   31.636384] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.636386] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.636388] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.636390] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.636397] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.636398] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.644329] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.644335] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a840 state to ffff8803ea4b3800
>[   31.644338] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe952000 state to ffff8803ea4b3800
>[   31.644340] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a840 to [CRTC:26:crtc-0]
>[   31.644341] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a840
>[   31.644343] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.644348] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.644349] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.644355] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.644372] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.644374] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.644378] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.644380] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b3800
>[   31.644382] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.644384] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   31.644385] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a000
>[   31.644386] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.644388] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.644389] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.644391] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.644398] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.644399] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.652330] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.652335] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   31.652339] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe950800 state to ffff8803ea4b3800
>[   31.652340] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:26:crtc-0]
>[   31.652342] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76aa80
>[   31.652343] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.652348] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.652350] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.652355] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.652372] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.652374] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.652378] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.652380] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a840 state to ffff8803ea4b3800
>[   31.652382] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe952000 state to ffff8803ea4b3800
>[   31.652383] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a840 to [CRTC:30:crtc-1]
>[   31.652384] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a840
>[   31.652385] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.652387] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.652389] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.652391] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.652398] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.652399] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.660326] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.660332] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a000 state to ffff8803ea4b3800
>[   31.660335] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.660337] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:26:crtc-0]
>[   31.660338] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a000
>[   31.660340] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.660345] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.660346] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.660351] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.660369] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.660371] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.660375] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.660377] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   31.660379] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950800 state to ffff8803ea4b3800
>[   31.660380] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   31.660382] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76aa80
>[   31.660383] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.660385] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.660386] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.660388] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.660396] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.660397] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.668329] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.668335] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a840 state to ffff8803ea4b3800
>[   31.668338] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe952000 state to ffff8803ea4b3800
>[   31.668340] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a840 to [CRTC:26:crtc-0]
>[   31.668341] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a840
>[   31.668343] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.668348] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.668349] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.668355] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.668372] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.668374] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.668378] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.668380] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b3800
>[   31.668382] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.668383] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   31.668385] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a000
>[   31.668386] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.668388] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.668389] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.668391] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.668398] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.668400] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.676326] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.676332] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   31.676335] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe950800 state to ffff8803ea4b3800
>[   31.676337] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:26:crtc-0]
>[   31.676339] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76aa80
>[   31.676340] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.676346] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.676347] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.676352] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.676369] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.676371] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.676375] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.676377] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a840 state to ffff8803ea4b3800
>[   31.676379] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe952000 state to ffff8803ea4b3800
>[   31.676381] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a840 to [CRTC:30:crtc-1]
>[   31.676382] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a840
>[   31.676383] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.676385] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.676386] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.676389] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.676395] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.676397] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.684327] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.684332] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a000 state to ffff8803ea4b3800
>[   31.684336] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.684337] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:26:crtc-0]
>[   31.684339] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a000
>[   31.684340] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.684346] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.684348] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.684353] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.684370] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.684372] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.684376] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.684378] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   31.684380] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950800 state to ffff8803ea4b3800
>[   31.684381] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   31.684382] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76aa80
>[   31.684383] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.684385] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.684386] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.684389] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.684396] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.684397] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.692327] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.692332] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a840 state to ffff8803ea4b3800
>[   31.692336] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe952000 state to ffff8803ea4b3800
>[   31.692337] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a840 to [CRTC:26:crtc-0]
>[   31.692339] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a840
>[   31.692340] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.692346] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.692347] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.692352] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.692369] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.692371] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.692375] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.692376] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b3800
>[   31.692379] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.692380] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   31.692381] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a000
>[   31.692382] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.692384] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.692386] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.692388] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.692395] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.692396] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.764327] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.764332] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   31.764335] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe950800 state to ffff8803ea4b3800
>[   31.764337] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:26:crtc-0]
>[   31.764338] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76aa80
>[   31.764339] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.764345] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.764346] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.764351] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.764369] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.764371] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.764375] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.764377] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a840 state to ffff8803ea4b3800
>[   31.764379] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe952000 state to ffff8803ea4b3800
>[   31.764380] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a840 to [CRTC:30:crtc-1]
>[   31.764382] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a840
>[   31.764383] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.764385] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.764386] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.764388] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.764395] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.764397] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.772323] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.772328] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a000 state to ffff8803ea4b3800
>[   31.772332] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.772333] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:26:crtc-0]
>[   31.772335] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a000
>[   31.772336] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.772342] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.772344] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.772349] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.772366] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.772368] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.772372] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.772374] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   31.772377] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950800 state to ffff8803ea4b3800
>[   31.772378] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   31.772379] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76aa80
>[   31.772380] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.772382] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.772383] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.772386] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.772393] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.772394] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.780320] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.780326] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a840 state to ffff8803ea4b3800
>[   31.780329] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe952000 state to ffff8803ea4b3800
>[   31.780331] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a840 to [CRTC:26:crtc-0]
>[   31.780333] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a840
>[   31.780334] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.780339] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.780340] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.780346] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.780363] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.780365] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.780369] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.780370] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b3800
>[   31.780372] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.780374] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   31.780375] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a000
>[   31.780376] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.780378] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.780379] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.780382] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.780389] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.780390] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.788323] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.788329] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   31.788332] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe950800 state to ffff8803ea4b3800
>[   31.788333] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:26:crtc-0]
>[   31.788335] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76aa80
>[   31.788336] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.788342] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.788343] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.788348] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.788366] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.788368] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.788371] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.788373] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a840 state to ffff8803ea4b3800
>[   31.788375] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe952000 state to ffff8803ea4b3800
>[   31.788377] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a840 to [CRTC:30:crtc-1]
>[   31.788378] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a840
>[   31.788379] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.788381] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.788382] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.788385] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.788391] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.788393] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.795895] [drm:drm_mode_addfb2] [FB:91]
>[   31.796222] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87cc00
>[   31.796226] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800d94fdc00 state to ffff8803ec87cc00
>[   31.796229] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f1800 state to ffff8803ec87cc00
>[   31.796231] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d94fdc00 to [CRTC:26:crtc-0]
>[   31.796233] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800d94fdc00
>[   31.796234] [drm:drm_atomic_check_only] checking ffff8803ec87cc00
>[   31.796242] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.796243] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.796249] [drm:drm_atomic_commit] commiting ffff8803ec87cc00
>[   31.796260] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87cc00
>[   31.796262] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87cc00
>[   31.796266] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87cc00
>[   31.796268] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800d94fd600 state to ffff8803ec87cc00
>[   31.796270] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f2800 state to ffff8803ec87cc00
>[   31.796271] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d94fd600 to [CRTC:30:crtc-1]
>[   31.796273] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800d94fd600
>[   31.796274] [drm:drm_atomic_check_only] checking ffff8803ec87cc00
>[   31.796276] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.796278] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.796280] [drm:drm_atomic_commit] commiting ffff8803ec87cc00
>[   31.796285] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87cc00
>[   31.796286] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87cc00
>[   31.804319] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87cc00
>[   31.804325] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800d94fd000 state to ffff8803ec87cc00
>[   31.804328] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f4000 state to ffff8803ec87cc00
>[   31.804330] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d94fd000 to [CRTC:26:crtc-0]
>[   31.804331] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800d94fd000
>[   31.804333] [drm:drm_atomic_check_only] checking ffff8803ec87cc00
>[   31.804338] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.804339] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.804345] [drm:drm_atomic_commit] commiting ffff8803ec87cc00
>[   31.804359] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87cc00
>[   31.804361] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87cc00
>[   31.804365] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87cc00
>[   31.804366] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800d94fdc00 state to ffff8803ec87cc00
>[   31.804368] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f1800 state to ffff8803ec87cc00
>[   31.804370] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d94fdc00 to [CRTC:30:crtc-1]
>[   31.804371] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800d94fdc00
>[   31.804372] [drm:drm_atomic_check_only] checking ffff8803ec87cc00
>[   31.804374] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.804375] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.804378] [drm:drm_atomic_commit] commiting ffff8803ec87cc00
>[   31.804383] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87cc00
>[   31.804384] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87cc00
>[   31.812320] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.812326] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   31.812329] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.812330] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:26:crtc-0]
>[   31.812332] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a3c0
>[   31.812333] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.812339] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.812340] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.812345] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.812362] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.812365] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.812368] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.812370] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a300 state to ffff8803ea4b3800
>[   31.812372] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953800 state to ffff8803ea4b3800
>[   31.812374] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a300 to [CRTC:30:crtc-1]
>[   31.812375] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a300
>[   31.812376] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.812378] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.812379] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.812382] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.812387] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.812388] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.820324] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.820330] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a900 state to ffff8803ea4b3800
>[   31.820333] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe956800 state to ffff8803ea4b3800
>[   31.820335] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:26:crtc-0]
>[   31.820336] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a900
>[   31.820338] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.820343] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.820344] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.820349] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.820367] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.820369] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.820373] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.820375] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   31.820377] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.820379] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   31.820380] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a3c0
>[   31.820381] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.820383] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.820384] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.820387] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.820412] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.820413] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.828322] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.828327] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a300 state to ffff8803ea4b3800
>[   31.828330] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953800 state to ffff8803ea4b3800
>[   31.828331] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a300 to [CRTC:26:crtc-0]
>[   31.828333] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a300
>[   31.828334] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.828340] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.828341] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.828347] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.828364] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.828366] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.828370] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.828372] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a900 state to ffff8803ea4b3800
>[   31.828374] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b3800
>[   31.828375] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:30:crtc-1]
>[   31.828376] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a900
>[   31.828377] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.828379] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.828381] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.828383] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.828390] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.828391] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.836324] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.836329] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   31.836333] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.836334] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:26:crtc-0]
>[   31.836336] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a3c0
>[   31.836337] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.836342] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.836344] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.836349] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.836366] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.836368] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.836373] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.836374] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a300 state to ffff8803ea4b3800
>[   31.836377] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953800 state to ffff8803ea4b3800
>[   31.836378] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a300 to [CRTC:30:crtc-1]
>[   31.836379] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a300
>[   31.836380] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.836382] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.836384] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.836386] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.836393] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.836394] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.844322] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.844328] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a900 state to ffff8803ea4b3800
>[   31.844331] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe956800 state to ffff8803ea4b3800
>[   31.844333] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:26:crtc-0]
>[   31.844334] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a900
>[   31.844336] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.844341] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.844343] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.844348] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.844366] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.844368] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.844372] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.844373] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   31.844375] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.844377] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   31.844378] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a3c0
>[   31.844379] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.844381] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.844382] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.844385] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.844392] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.844393] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.852323] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.852329] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a300 state to ffff8803ea4b3800
>[   31.852332] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953800 state to ffff8803ea4b3800
>[   31.852334] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a300 to [CRTC:26:crtc-0]
>[   31.852335] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a300
>[   31.852337] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.852342] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.852344] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.852349] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.852367] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.852369] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.852373] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.852374] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a900 state to ffff8803ea4b3800
>[   31.852377] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b3800
>[   31.852378] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:30:crtc-1]
>[   31.852379] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a900
>[   31.852380] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.852382] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.852384] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.852386] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.852393] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.852394] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.860320] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.860325] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   31.860328] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.860330] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:26:crtc-0]
>[   31.860331] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a3c0
>[   31.860333] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.860338] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.860340] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.860345] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.860362] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.860364] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.860368] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.860370] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a300 state to ffff8803ea4b3800
>[   31.860372] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953800 state to ffff8803ea4b3800
>[   31.860373] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a300 to [CRTC:30:crtc-1]
>[   31.860375] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a300
>[   31.860376] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.860377] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.860379] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.860381] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.860388] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.860389] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.868321] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.868326] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a900 state to ffff8803ea4b3800
>[   31.868330] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe956800 state to ffff8803ea4b3800
>[   31.868331] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:26:crtc-0]
>[   31.868333] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a900
>[   31.868334] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.868340] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.868341] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.868347] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.868364] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.868366] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.868370] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.868372] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   31.868374] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.868376] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   31.868377] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a3c0
>[   31.868378] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.868380] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.868381] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.868383] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.868391] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.868392] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.876322] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.876327] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a300 state to ffff8803ea4b3800
>[   31.876331] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953800 state to ffff8803ea4b3800
>[   31.876332] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a300 to [CRTC:26:crtc-0]
>[   31.876334] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a300
>[   31.876335] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.876341] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.876342] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.876348] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.876365] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.876367] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.876371] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.876373] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a900 state to ffff8803ea4b3800
>[   31.876375] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b3800
>[   31.876376] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:30:crtc-1]
>[   31.876377] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a900
>[   31.876378] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.876380] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.876382] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.876384] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.876391] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.876392] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.884321] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.884326] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   31.884329] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.884331] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:26:crtc-0]
>[   31.884332] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a3c0
>[   31.884333] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.884338] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.884340] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.884345] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.884362] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.884364] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.884368] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.884370] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a300 state to ffff8803ea4b3800
>[   31.884373] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953800 state to ffff8803ea4b3800
>[   31.884374] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a300 to [CRTC:30:crtc-1]
>[   31.884375] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a300
>[   31.884376] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.884378] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.884380] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.884382] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.884389] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.884391] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.892318] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.892323] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a900 state to ffff8803ea4b3800
>[   31.892327] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe956800 state to ffff8803ea4b3800
>[   31.892328] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:26:crtc-0]
>[   31.892330] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a900
>[   31.892331] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.892336] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.892338] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.892343] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.892360] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.892362] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.892366] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.892368] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   31.892370] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.892371] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   31.892372] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a3c0
>[   31.892373] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.892375] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.892377] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.892379] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.892386] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.892387] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.900320] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.900326] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a300 state to ffff8803ea4b3800
>[   31.900329] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953800 state to ffff8803ea4b3800
>[   31.900330] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a300 to [CRTC:26:crtc-0]
>[   31.900332] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a300
>[   31.900333] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.900339] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.900341] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.900346] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.900363] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.900365] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.900369] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.900371] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a900 state to ffff8803ea4b3800
>[   31.900373] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b3800
>[   31.900374] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:30:crtc-1]
>[   31.900375] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a900
>[   31.900376] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.900378] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.900380] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.900382] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.900411] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.900412] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.908318] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.908323] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   31.908326] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.908328] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:26:crtc-0]
>[   31.908330] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a3c0
>[   31.908331] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.908336] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.908338] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.908343] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.908360] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.908362] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.908367] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.908368] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a300 state to ffff8803ea4b3800
>[   31.908370] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953800 state to ffff8803ea4b3800
>[   31.908372] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a300 to [CRTC:30:crtc-1]
>[   31.908373] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a300
>[   31.908374] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.908376] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.908377] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.908380] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.908386] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.908388] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.916321] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.916327] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a900 state to ffff8803ea4b3800
>[   31.916330] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe956800 state to ffff8803ea4b3800
>[   31.916332] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:26:crtc-0]
>[   31.916333] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a900
>[   31.916335] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.916340] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.916342] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.916347] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.916365] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.916367] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.916371] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.916373] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   31.916375] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.916376] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   31.916377] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a3c0
>[   31.916378] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.916380] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.916382] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.916384] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.916391] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.916392] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.924318] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.924324] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a300 state to ffff8803ea4b3800
>[   31.924327] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953800 state to ffff8803ea4b3800
>[   31.924328] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a300 to [CRTC:26:crtc-0]
>[   31.924330] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a300
>[   31.924331] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.924337] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.924338] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.924343] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.924361] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.924363] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.924366] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.924368] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a900 state to ffff8803ea4b3800
>[   31.924370] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b3800
>[   31.924372] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:30:crtc-1]
>[   31.924373] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a900
>[   31.924374] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.924376] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.924377] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.924379] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.924387] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.924388] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.932320] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.932326] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   31.932329] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.932330] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:26:crtc-0]
>[   31.932332] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a3c0
>[   31.932333] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.932338] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.932340] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.932345] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.932361] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.932363] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.932367] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.932369] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a300 state to ffff8803ea4b3800
>[   31.932371] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953800 state to ffff8803ea4b3800
>[   31.932372] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a300 to [CRTC:30:crtc-1]
>[   31.932374] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a300
>[   31.932375] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.932377] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.932378] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.932380] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.932387] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.932389] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.940319] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.940325] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a900 state to ffff8803ea4b3800
>[   31.940329] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe956800 state to ffff8803ea4b3800
>[   31.940330] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:26:crtc-0]
>[   31.940332] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a900
>[   31.940333] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.940339] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   31.940340] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   31.940345] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.940363] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.940365] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.940369] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.940370] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   31.940373] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.940374] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   31.940375] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a3c0
>[   31.940376] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.940378] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.940380] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.940382] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.940410] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.940411] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.948316] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.948322] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a300 state to ffff8803ea4b3800
>[   31.948325] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953800 state to ffff8803ea4b3800
>[   31.948326] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a300 to [NOCRTC]
>[   31.948328] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800cd76a300
>[   31.948330] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.948334] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb -1
>[   31.948336] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 0, off 1, on 0, ms 0
>[   31.948341] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.948357] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.948359] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.948365] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.948366] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a900 state to ffff8803ea4b3800
>[   31.948369] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b3800
>[   31.948370] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:30:crtc-1]
>[   31.948371] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a900
>[   31.948372] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.948375] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.948376] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.948379] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.948388] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.948389] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.956319] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.956325] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   31.956328] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.956330] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   31.956331] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a3c0
>[   31.956333] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.956338] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.956340] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.956345] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.956361] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.956364] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.964319] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.964325] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a900 state to ffff8803ea4b3800
>[   31.964328] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b3800
>[   31.964330] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:30:crtc-1]
>[   31.964331] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a900
>[   31.964333] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.964338] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.964340] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.964345] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.964362] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.964364] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.972317] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.972322] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   31.972326] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.972327] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   31.972329] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a3c0
>[   31.972330] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.972335] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.972338] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.972343] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.972360] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.972362] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.980316] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.980321] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a900 state to ffff8803ea4b3800
>[   31.980325] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b3800
>[   31.980327] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:30:crtc-1]
>[   31.980328] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a900
>[   31.980329] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.980335] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.980336] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.980342] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.980359] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.980361] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.988316] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.988322] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   31.988325] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   31.988327] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   31.988329] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a3c0
>[   31.988330] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.988336] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.988337] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.988343] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.988361] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.988363] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   31.996318] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   31.996323] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a900 state to ffff8803ea4b3800
>[   31.996327] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b3800
>[   31.996329] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:30:crtc-1]
>[   31.996330] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a900
>[   31.996332] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   31.996337] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   31.996338] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   31.996343] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   31.996361] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   31.996363] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.004317] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.004323] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   32.004326] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   32.004328] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   32.004329] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a3c0
>[   32.004331] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.004336] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.004338] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.004343] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.004361] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.004363] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.012318] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.012323] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a900 state to ffff8803ea4b3800
>[   32.012326] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b3800
>[   32.012328] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:30:crtc-1]
>[   32.012330] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a900
>[   32.012331] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.012336] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.012338] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.012343] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.012361] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.012363] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.020315] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.020320] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   32.020324] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   32.020326] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   32.020328] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a3c0
>[   32.020329] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.020335] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.020336] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.020342] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.020359] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.020362] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.028317] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.028323] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a900 state to ffff8803ea4b3800
>[   32.028326] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b3800
>[   32.028328] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:30:crtc-1]
>[   32.028329] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a900
>[   32.028330] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.028335] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.028337] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.028342] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.028360] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.028362] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.036317] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.036322] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   32.036325] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   32.036327] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   32.036329] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a3c0
>[   32.036330] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.036336] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.036338] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.036343] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.036360] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.036362] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.045218] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.045224] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76af00 state to ffff8803ea4b3800
>[   32.045227] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b3800
>[   32.045229] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76af00 to [CRTC:30:crtc-1]
>[   32.045230] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76af00
>[   32.045231] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.045236] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.045238] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.045243] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.045260] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.045262] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.045947] [drm:drm_mode_addfb2] [FB:75]
>[   32.052314] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.052320] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   32.052324] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   32.052325] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   32.052327] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a3c0
>[   32.052328] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.052334] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.052335] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.052341] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.052355] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.052357] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.060309] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.060315] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76af00 state to ffff8803ea4b3800
>[   32.060318] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b3800
>[   32.060320] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76af00 to [CRTC:30:crtc-1]
>[   32.060321] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76af00
>[   32.060323] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.060328] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.060330] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.060335] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.060349] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.060351] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.068316] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.068322] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   32.068326] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   32.068327] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   32.068329] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a3c0
>[   32.068330] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.068335] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.068337] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.068342] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.068359] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.068362] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.076313] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.076319] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76af00 state to ffff8803ea4b3800
>[   32.076323] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b3800
>[   32.076324] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76af00 to [CRTC:30:crtc-1]
>[   32.076326] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76af00
>[   32.076327] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.076332] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.076334] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.076339] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.076356] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.076358] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.084315] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.084321] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   32.084324] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   32.084326] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   32.084327] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a3c0
>[   32.084329] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.084334] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.084336] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.084341] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.084358] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.084360] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.092311] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.092317] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76af00 state to ffff8803ea4b3800
>[   32.092320] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b3800
>[   32.092322] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76af00 to [CRTC:30:crtc-1]
>[   32.092323] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76af00
>[   32.092325] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.092330] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.092332] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.092337] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.092354] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.092356] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.100312] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.100318] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   32.100321] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   32.100323] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   32.100325] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a3c0
>[   32.100326] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.100331] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.100333] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.100339] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.100356] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.100358] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.108312] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.108318] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76af00 state to ffff8803ea4b3800
>[   32.108321] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b3800
>[   32.108323] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76af00 to [CRTC:30:crtc-1]
>[   32.108325] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76af00
>[   32.108326] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.108332] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.108333] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.108339] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.108357] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.108359] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.116313] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.116319] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   32.116322] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   32.116324] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   32.116325] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a3c0
>[   32.116327] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.116332] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.116334] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.116339] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.116356] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.116358] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.124310] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.124316] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76af00 state to ffff8803ea4b3800
>[   32.124319] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b3800
>[   32.124320] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76af00 to [CRTC:30:crtc-1]
>[   32.124322] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76af00
>[   32.124323] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.124329] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.124330] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.124336] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.124353] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.124355] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.132313] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.132319] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   32.132322] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   32.132324] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   32.132325] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a3c0
>[   32.132327] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.132332] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.132333] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.132339] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.132356] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.132358] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.140312] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.140318] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76af00 state to ffff8803ea4b3800
>[   32.140322] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b3800
>[   32.140324] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76af00 to [CRTC:30:crtc-1]
>[   32.140325] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76af00
>[   32.140327] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.140332] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.140334] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.140339] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.140357] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.140359] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.148313] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.148319] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   32.148322] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   32.148324] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   32.148325] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a3c0
>[   32.148327] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.148332] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.148334] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.148339] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.148357] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.148359] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.156312] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.156318] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76af00 state to ffff8803ea4b3800
>[   32.156321] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b3800
>[   32.156323] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76af00 to [CRTC:30:crtc-1]
>[   32.156324] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76af00
>[   32.156326] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.156331] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.156333] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.156338] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.156356] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.156357] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.165312] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.165318] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   32.165321] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   32.165323] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   32.165324] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a3c0
>[   32.165326] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.165331] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.165333] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.165338] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.165355] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.165357] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.172310] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.172317] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76af00 state to ffff8803ea4b3800
>[   32.172320] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b3800
>[   32.172322] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76af00 to [CRTC:30:crtc-1]
>[   32.172323] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76af00
>[   32.172325] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.172330] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.172332] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.172337] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.172354] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.172356] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.179292] [drm:drm_mode_addfb2] [FB:91]
>[   32.180232] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87cc00
>[   32.180238] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800d94fd600 state to ffff8803ec87cc00
>[   32.180243] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f2800 state to ffff8803ec87cc00
>[   32.180245] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d94fd600 to [CRTC:30:crtc-1]
>[   32.180247] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800d94fd600
>[   32.180249] [drm:drm_atomic_check_only] checking ffff8803ec87cc00
>[   32.180256] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.180258] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.180265] [drm:drm_atomic_commit] commiting ffff8803ec87cc00
>[   32.180279] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87cc00
>[   32.180282] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87cc00
>[   32.188179] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87cc00
>[   32.188181] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800d94fd6c0 state to ffff8803ec87cc00
>[   32.188183] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f5800 state to ffff8803ec87cc00
>[   32.188184] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d94fd6c0 to [CRTC:30:crtc-1]
>[   32.188185] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800d94fd6c0
>[   32.188186] [drm:drm_atomic_check_only] checking ffff8803ec87cc00
>[   32.188188] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.188189] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.188192] [drm:drm_atomic_commit] commiting ffff8803ec87cc00
>[   32.188198] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87cc00
>[   32.188199] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87cc00
>[   32.196176] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ecac2000
>[   32.196180] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b9c0 state to ffff8803ecac2000
>[   32.196184] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a51800 state to ffff8803ecac2000
>[   32.196186] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b9c0 to [CRTC:30:crtc-1]
>[   32.196187] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b9c0
>[   32.196188] [drm:drm_atomic_check_only] checking ffff8803ecac2000
>[   32.196192] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.196194] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.196198] [drm:drm_atomic_commit] commiting ffff8803ecac2000
>[   32.196207] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ecac2000
>[   32.196209] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ecac2000
>[   32.196789] [drm:drm_mode_addfb2] [FB:94]
>[   32.204311] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ecac2000
>[   32.204317] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3bcc0 state to ffff8803ecac2000
>[   32.204321] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a57800 state to ffff8803ecac2000
>[   32.204322] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3bcc0 to [CRTC:30:crtc-1]
>[   32.204324] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3bcc0
>[   32.204325] [drm:drm_atomic_check_only] checking ffff8803ecac2000
>[   32.204330] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.204332] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.204338] [drm:drm_atomic_commit] commiting ffff8803ecac2000
>[   32.204352] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ecac2000
>[   32.204354] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ecac2000
>[   32.212241] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96800
>[   32.212247] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a900 state to ffff8803fca96800
>[   32.212250] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e3000 state to ffff8803fca96800
>[   32.212252] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a900 to [CRTC:30:crtc-1]
>[   32.212253] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39a900
>[   32.212255] [drm:drm_atomic_check_only] checking ffff8803fca96800
>[   32.212260] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.212262] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.212267] [drm:drm_atomic_commit] commiting ffff8803fca96800
>[   32.212281] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96800
>[   32.212283] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96800
>[   32.213510] [drm:drm_mode_addfb2] [FB:75]
>[   32.220307] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.220312] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   32.220316] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   32.220318] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   32.220319] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a3c0
>[   32.220321] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.220326] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.220328] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.220333] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.220347] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.220349] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.228306] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.228312] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a0c0 state to ffff8803ea4b3800
>[   32.228315] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3800
>[   32.228317] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a0c0 to [CRTC:30:crtc-1]
>[   32.228318] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a0c0
>[   32.228320] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.228325] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.228327] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.228332] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.228346] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.228348] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.230154] [drm:drm_mode_addfb2] [FB:91]
>[   32.236307] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.236314] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   32.236317] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   32.236319] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   32.236320] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a3c0
>[   32.236322] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.236327] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.236329] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.236334] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.236348] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.236350] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.244306] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.244312] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a0c0 state to ffff8803ea4b3800
>[   32.244315] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3800
>[   32.244317] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a0c0 to [CRTC:30:crtc-1]
>[   32.244319] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a0c0
>[   32.244320] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.244326] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.244327] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.244333] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.244347] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.244349] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.246823] [drm:drm_mode_addfb2] [FB:94]
>[   32.252238] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.252243] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   32.252246] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   32.252248] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   32.252249] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a3c0
>[   32.252250] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.252255] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.252257] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.252262] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.252272] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.252274] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.260303] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.260309] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a0c0 state to ffff8803ea4b3800
>[   32.260312] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3800
>[   32.260314] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a0c0 to [CRTC:30:crtc-1]
>[   32.260315] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a0c0
>[   32.260317] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.260322] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.260323] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.260328] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.260342] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.260344] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.263490] [drm:drm_mode_addfb2] [FB:75]
>[   32.268291] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.268296] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b3800
>[   32.268299] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   32.268301] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   32.268302] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a3c0
>[   32.268304] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.268310] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.268312] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.268318] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.268329] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.268330] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.280147] [drm:drm_mode_addfb2] [FB:91]
>[   32.296806] [drm:drm_mode_addfb2] [FB:94]
>[   32.313475] [drm:drm_mode_addfb2] [FB:75]
>[   32.316197] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96800
>[   32.316202] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a600 state to ffff8803fca96800
>[   32.316205] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e1000 state to ffff8803fca96800
>[   32.316207] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a600 to [CRTC:30:crtc-1]
>[   32.316208] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39a600
>[   32.316210] [drm:drm_atomic_check_only] checking ffff8803fca96800
>[   32.316214] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.316216] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.316221] [drm:drm_atomic_commit] commiting ffff8803fca96800
>[   32.316231] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96800
>[   32.316233] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96800
>[   32.330142] [drm:drm_mode_addfb2] [FB:91]
>[   32.346804] [drm:drm_mode_addfb2] [FB:94]
>[   32.363475] [drm:drm_mode_addfb2] [FB:75]
>[   32.388301] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ecac2000
>[   32.388307] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b9c0 state to ffff8803ecac2000
>[   32.388310] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a51800 state to ffff8803ecac2000
>[   32.388312] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b9c0 to [CRTC:30:crtc-1]
>[   32.388314] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b9c0
>[   32.388315] [drm:drm_atomic_check_only] checking ffff8803ecac2000
>[   32.388321] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.388322] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.388328] [drm:drm_atomic_commit] commiting ffff8803ecac2000
>[   32.388345] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ecac2000
>[   32.388347] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ecac2000
>[   32.397300] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ecac2000
>[   32.397306] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b600 state to ffff8803ecac2000
>[   32.397309] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a50000 state to ffff8803ecac2000
>[   32.397311] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b600 to [CRTC:30:crtc-1]
>[   32.397312] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b600
>[   32.397314] [drm:drm_atomic_check_only] checking ffff8803ecac2000
>[   32.397319] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.397321] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.397326] [drm:drm_atomic_commit] commiting ffff8803ecac2000
>[   32.397343] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ecac2000
>[   32.397345] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ecac2000
>[   32.405299] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ecac2000
>[   32.405305] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b9c0 state to ffff8803ecac2000
>[   32.405308] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a51800 state to ffff8803ecac2000
>[   32.405310] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b9c0 to [CRTC:30:crtc-1]
>[   32.405312] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b9c0
>[   32.405313] [drm:drm_atomic_check_only] checking ffff8803ecac2000
>[   32.405318] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.405320] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.405325] [drm:drm_atomic_commit] commiting ffff8803ecac2000
>[   32.405342] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ecac2000
>[   32.405344] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ecac2000
>[   32.412302] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ecac2000
>[   32.412308] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b600 state to ffff8803ecac2000
>[   32.412311] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a50000 state to ffff8803ecac2000
>[   32.412313] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b600 to [CRTC:30:crtc-1]
>[   32.412314] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b600
>[   32.412316] [drm:drm_atomic_check_only] checking ffff8803ecac2000
>[   32.412321] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.412322] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.412328] [drm:drm_atomic_commit] commiting ffff8803ecac2000
>[   32.412345] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ecac2000
>[   32.412347] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ecac2000
>[   32.420299] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ecac2000
>[   32.420305] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b9c0 state to ffff8803ecac2000
>[   32.420308] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a51800 state to ffff8803ecac2000
>[   32.420310] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b9c0 to [CRTC:30:crtc-1]
>[   32.420311] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b9c0
>[   32.420313] [drm:drm_atomic_check_only] checking ffff8803ecac2000
>[   32.420318] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.420320] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.420325] [drm:drm_atomic_commit] commiting ffff8803ecac2000
>[   32.420343] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ecac2000
>[   32.420345] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ecac2000
>[   32.428298] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ecac2000
>[   32.428304] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b600 state to ffff8803ecac2000
>[   32.428307] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a50000 state to ffff8803ecac2000
>[   32.428309] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b600 to [CRTC:30:crtc-1]
>[   32.428310] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b600
>[   32.428312] [drm:drm_atomic_check_only] checking ffff8803ecac2000
>[   32.428317] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.428319] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.428325] [drm:drm_atomic_commit] commiting ffff8803ecac2000
>[   32.428341] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ecac2000
>[   32.428343] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ecac2000
>[   32.436300] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ecac2000
>[   32.436306] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b9c0 state to ffff8803ecac2000
>[   32.436310] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a51800 state to ffff8803ecac2000
>[   32.436311] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b9c0 to [CRTC:30:crtc-1]
>[   32.436313] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b9c0
>[   32.436314] [drm:drm_atomic_check_only] checking ffff8803ecac2000
>[   32.436320] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.436321] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.436327] [drm:drm_atomic_commit] commiting ffff8803ecac2000
>[   32.436344] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ecac2000
>[   32.436346] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ecac2000
>[   32.444301] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ecac2000
>[   32.444306] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b600 state to ffff8803ecac2000
>[   32.444310] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a50000 state to ffff8803ecac2000
>[   32.444311] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b600 to [CRTC:30:crtc-1]
>[   32.444313] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b600
>[   32.444314] [drm:drm_atomic_check_only] checking ffff8803ecac2000
>[   32.444320] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.444321] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.444326] [drm:drm_atomic_commit] commiting ffff8803ecac2000
>[   32.444343] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ecac2000
>[   32.444345] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ecac2000
>[   32.452297] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ecac2000
>[   32.452302] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b9c0 state to ffff8803ecac2000
>[   32.452306] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a51800 state to ffff8803ecac2000
>[   32.452308] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b9c0 to [CRTC:30:crtc-1]
>[   32.452309] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b9c0
>[   32.452311] [drm:drm_atomic_check_only] checking ffff8803ecac2000
>[   32.452316] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.452317] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.452323] [drm:drm_atomic_commit] commiting ffff8803ecac2000
>[   32.452340] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ecac2000
>[   32.452342] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ecac2000
>[   32.460302] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ecac2000
>[   32.460307] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b600 state to ffff8803ecac2000
>[   32.460311] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a50000 state to ffff8803ecac2000
>[   32.460312] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b600 to [CRTC:30:crtc-1]
>[   32.460314] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b600
>[   32.460315] [drm:drm_atomic_check_only] checking ffff8803ecac2000
>[   32.460320] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.460322] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.460327] [drm:drm_atomic_commit] commiting ffff8803ecac2000
>[   32.460345] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ecac2000
>[   32.460347] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ecac2000
>[   32.476301] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ecac2000
>[   32.476307] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b9c0 state to ffff8803ecac2000
>[   32.476310] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a51800 state to ffff8803ecac2000
>[   32.476312] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b9c0 to [CRTC:30:crtc-1]
>[   32.476313] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b9c0
>[   32.476315] [drm:drm_atomic_check_only] checking ffff8803ecac2000
>[   32.476320] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.476322] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.476327] [drm:drm_atomic_commit] commiting ffff8803ecac2000
>[   32.476345] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ecac2000
>[   32.476347] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ecac2000
>[   32.484298] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ecac2000
>[   32.484304] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b600 state to ffff8803ecac2000
>[   32.484307] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a50000 state to ffff8803ecac2000
>[   32.484309] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b600 to [CRTC:30:crtc-1]
>[   32.484310] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b600
>[   32.484312] [drm:drm_atomic_check_only] checking ffff8803ecac2000
>[   32.484317] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.484319] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.484324] [drm:drm_atomic_commit] commiting ffff8803ecac2000
>[   32.484342] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ecac2000
>[   32.484344] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ecac2000
>[   32.492301] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ecac2000
>[   32.492307] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b9c0 state to ffff8803ecac2000
>[   32.492310] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a51800 state to ffff8803ecac2000
>[   32.492312] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b9c0 to [CRTC:30:crtc-1]
>[   32.492313] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b9c0
>[   32.492315] [drm:drm_atomic_check_only] checking ffff8803ecac2000
>[   32.492320] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.492321] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.492327] [drm:drm_atomic_commit] commiting ffff8803ecac2000
>[   32.492345] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ecac2000
>[   32.492347] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ecac2000
>[   32.500301] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ecac2000
>[   32.500306] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b600 state to ffff8803ecac2000
>[   32.500309] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a50000 state to ffff8803ecac2000
>[   32.500311] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b600 to [CRTC:30:crtc-1]
>[   32.500312] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b600
>[   32.500314] [drm:drm_atomic_check_only] checking ffff8803ecac2000
>[   32.500319] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.500321] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.500326] [drm:drm_atomic_commit] commiting ffff8803ecac2000
>[   32.500344] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ecac2000
>[   32.500346] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ecac2000
>[   32.508301] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ecac2000
>[   32.508307] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b9c0 state to ffff8803ecac2000
>[   32.508310] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a51800 state to ffff8803ecac2000
>[   32.508311] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b9c0 to [CRTC:30:crtc-1]
>[   32.508313] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b9c0
>[   32.508314] [drm:drm_atomic_check_only] checking ffff8803ecac2000
>[   32.508320] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.508321] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.508326] [drm:drm_atomic_commit] commiting ffff8803ecac2000
>[   32.508344] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ecac2000
>[   32.508346] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ecac2000
>[   32.517305] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ecac2000
>[   32.517311] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b600 state to ffff8803ecac2000
>[   32.517314] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a50000 state to ffff8803ecac2000
>[   32.517316] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b600 to [CRTC:30:crtc-1]
>[   32.517317] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b600
>[   32.517319] [drm:drm_atomic_check_only] checking ffff8803ecac2000
>[   32.517324] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.517325] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.517331] [drm:drm_atomic_commit] commiting ffff8803ecac2000
>[   32.517348] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ecac2000
>[   32.517350] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ecac2000
>[   32.524299] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ecac2000
>[   32.524305] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b9c0 state to ffff8803ecac2000
>[   32.524309] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a51800 state to ffff8803ecac2000
>[   32.524310] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b9c0 to [CRTC:30:crtc-1]
>[   32.524312] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b9c0
>[   32.524313] [drm:drm_atomic_check_only] checking ffff8803ecac2000
>[   32.524319] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.524320] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.524325] [drm:drm_atomic_commit] commiting ffff8803ecac2000
>[   32.524343] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ecac2000
>[   32.524345] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ecac2000
>[   32.532298] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ecac2000
>[   32.532304] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b600 state to ffff8803ecac2000
>[   32.532307] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a50000 state to ffff8803ecac2000
>[   32.532309] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b600 to [CRTC:30:crtc-1]
>[   32.532310] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b600
>[   32.532312] [drm:drm_atomic_check_only] checking ffff8803ecac2000
>[   32.532317] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.532319] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.532324] [drm:drm_atomic_commit] commiting ffff8803ecac2000
>[   32.532342] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ecac2000
>[   32.532344] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ecac2000
>[   32.540298] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ecac2000
>[   32.540304] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b9c0 state to ffff8803ecac2000
>[   32.540307] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a51800 state to ffff8803ecac2000
>[   32.540309] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b9c0 to [CRTC:30:crtc-1]
>[   32.540310] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b9c0
>[   32.540312] [drm:drm_atomic_check_only] checking ffff8803ecac2000
>[   32.540317] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.540318] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.540323] [drm:drm_atomic_commit] commiting ffff8803ecac2000
>[   32.540341] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ecac2000
>[   32.540343] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ecac2000
>[   32.545749] [drm:drm_mode_addfb2] [FB:91]
>[   32.548189] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96800
>[   32.548193] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39ac00 state to ffff8803fca96800
>[   32.548196] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e6000 state to ffff8803fca96800
>[   32.548198] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39ac00 to [CRTC:30:crtc-1]
>[   32.548199] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39ac00
>[   32.548201] [drm:drm_atomic_check_only] checking ffff8803fca96800
>[   32.548205] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.548207] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.548212] [drm:drm_atomic_commit] commiting ffff8803fca96800
>[   32.548222] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96800
>[   32.548224] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96800
>[   32.556296] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.556301] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a900 state to ffff8803ea4b3800
>[   32.556305] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3800
>[   32.556306] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:30:crtc-1]
>[   32.556308] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a900
>[   32.556310] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.556315] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.556316] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.556322] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.556336] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.556338] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.604296] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.604302] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   32.604305] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950000 state to ffff8803ea4b3800
>[   32.604307] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   32.604308] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76aa80
>[   32.604309] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.604315] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.604317] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.604322] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.604339] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.604341] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.613294] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.613299] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a900 state to ffff8803ea4b3800
>[   32.613302] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3800
>[   32.613304] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:30:crtc-1]
>[   32.613306] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a900
>[   32.613307] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.613312] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.613314] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.613319] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.613451] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.613453] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.621291] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.621297] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   32.621300] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950000 state to ffff8803ea4b3800
>[   32.621302] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   32.621303] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76aa80
>[   32.621305] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.621310] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.621312] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.621317] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.621334] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.621336] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.629291] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.629296] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a900 state to ffff8803ea4b3800
>[   32.629300] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3800
>[   32.629302] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:30:crtc-1]
>[   32.629303] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a900
>[   32.629304] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.629310] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.629311] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.629316] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.629334] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.629336] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.644292] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.644298] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   32.644302] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950000 state to ffff8803ea4b3800
>[   32.644304] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   32.644305] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76aa80
>[   32.644307] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.644312] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.644313] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.644319] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.644336] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.644338] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.700289] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.700295] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a900 state to ffff8803ea4b3800
>[   32.700298] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3800
>[   32.700300] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:30:crtc-1]
>[   32.700301] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a900
>[   32.700303] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.700308] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.700309] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.700315] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.700333] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.700335] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.708290] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.708295] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   32.708299] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950000 state to ffff8803ea4b3800
>[   32.708300] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   32.708302] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76aa80
>[   32.708303] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.708309] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.708310] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.708317] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.708333] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.708335] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.716290] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.716295] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a900 state to ffff8803ea4b3800
>[   32.716299] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3800
>[   32.716300] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:30:crtc-1]
>[   32.716302] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a900
>[   32.716303] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.716309] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.716310] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.716316] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.716334] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.716336] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.724290] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.724296] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   32.724299] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950000 state to ffff8803ea4b3800
>[   32.724301] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   32.724303] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76aa80
>[   32.724304] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.724309] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.724311] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.724316] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.724334] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.724336] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.732290] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.732295] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a900 state to ffff8803ea4b3800
>[   32.732299] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3800
>[   32.732300] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:30:crtc-1]
>[   32.732302] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a900
>[   32.732303] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.732308] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.732311] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.732316] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.732333] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.732335] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.740287] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.740293] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   32.740296] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950000 state to ffff8803ea4b3800
>[   32.740298] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   32.740299] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76aa80
>[   32.740301] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.740306] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.740307] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.740312] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.740330] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.740331] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.748290] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.748296] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a900 state to ffff8803ea4b3800
>[   32.748299] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3800
>[   32.748301] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:30:crtc-1]
>[   32.748302] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a900
>[   32.748304] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.748309] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.748311] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.748316] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.748333] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.748335] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.756290] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.756296] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   32.756299] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950000 state to ffff8803ea4b3800
>[   32.756301] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   32.756302] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76aa80
>[   32.756304] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.756309] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.756311] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.756316] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.756333] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.756335] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.765289] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.765294] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a900 state to ffff8803ea4b3800
>[   32.765298] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3800
>[   32.765300] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:30:crtc-1]
>[   32.765301] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a900
>[   32.765303] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.765307] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.765309] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.765315] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.765332] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.765334] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.772288] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.772293] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   32.772297] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950000 state to ffff8803ea4b3800
>[   32.772299] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   32.772300] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76aa80
>[   32.772302] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.772307] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.772309] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.772314] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.772331] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.772333] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.780285] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.780291] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a900 state to ffff8803ea4b3800
>[   32.780294] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3800
>[   32.780296] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:30:crtc-1]
>[   32.780297] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a900
>[   32.780299] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.780304] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.780306] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.780311] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.780328] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.780329] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.788286] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.788292] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   32.788295] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950000 state to ffff8803ea4b3800
>[   32.788296] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   32.788298] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76aa80
>[   32.788299] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.788305] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.788307] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.788312] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.788329] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.788331] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.792913] [drm:drm_mode_addfb2] [FB:75]
>[   32.796184] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87cc00
>[   32.796188] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800d94fd600 state to ffff8803ec87cc00
>[   32.796191] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f2800 state to ffff8803ec87cc00
>[   32.796193] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d94fd600 to [CRTC:30:crtc-1]
>[   32.796195] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800d94fd600
>[   32.796196] [drm:drm_atomic_check_only] checking ffff8803ec87cc00
>[   32.796200] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.796202] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.796207] [drm:drm_atomic_commit] commiting ffff8803ec87cc00
>[   32.796217] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87cc00
>[   32.796219] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87cc00
>[   32.804283] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87cc00
>[   32.804289] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800d94fd900 state to ffff8803ec87cc00
>[   32.804292] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f7000 state to ffff8803ec87cc00
>[   32.804294] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d94fd900 to [CRTC:30:crtc-1]
>[   32.804295] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800d94fd900
>[   32.804297] [drm:drm_atomic_check_only] checking ffff8803ec87cc00
>[   32.804302] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.804304] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.804309] [drm:drm_atomic_commit] commiting ffff8803ec87cc00
>[   32.804326] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87cc00
>[   32.804328] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87cc00
>[   32.812287] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.812292] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b3800
>[   32.812296] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3800
>[   32.812298] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   32.812299] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a000
>[   32.812301] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.812306] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.812307] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.812313] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.812330] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.812333] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.820287] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.820293] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a6c0 state to ffff8803ea4b3800
>[   32.820297] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950000 state to ffff8803ea4b3800
>[   32.820298] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a6c0 to [CRTC:30:crtc-1]
>[   32.820300] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a6c0
>[   32.820301] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.820307] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.820309] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.820314] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.820331] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.820333] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.836285] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.836290] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b3800
>[   32.836294] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3800
>[   32.836295] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   32.836297] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a000
>[   32.836299] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.836304] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.836306] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.836312] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.836329] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.836331] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.844286] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.844292] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a6c0 state to ffff8803ea4b3800
>[   32.844295] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950000 state to ffff8803ea4b3800
>[   32.844297] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a6c0 to [CRTC:30:crtc-1]
>[   32.844298] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a6c0
>[   32.844300] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.844305] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.844307] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.844312] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.844330] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.844332] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.852286] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.852292] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b3800
>[   32.852295] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3800
>[   32.852297] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   32.852298] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a000
>[   32.852300] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.852305] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.852307] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.852312] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.852329] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.852331] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.860284] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.860289] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a6c0 state to ffff8803ea4b3800
>[   32.860293] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950000 state to ffff8803ea4b3800
>[   32.860295] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a6c0 to [CRTC:30:crtc-1]
>[   32.860296] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a6c0
>[   32.860298] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.860303] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.860305] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.860310] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.860327] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.860329] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.867119] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[   32.867133] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[   32.932281] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.932287] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b3800
>[   32.932290] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3800
>[   32.932292] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   32.932294] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a000
>[   32.932295] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.932301] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.932302] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.932308] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.932326] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.932328] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.941279] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.941284] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a6c0 state to ffff8803ea4b3800
>[   32.941288] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950000 state to ffff8803ea4b3800
>[   32.941290] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a6c0 to [CRTC:30:crtc-1]
>[   32.941291] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a6c0
>[   32.941292] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.941298] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.941299] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.941305] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.941322] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.941324] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.949279] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.949285] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b3800
>[   32.949288] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3800
>[   32.949290] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   32.949291] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a000
>[   32.949293] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.949298] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.949300] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.949305] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.949322] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.949324] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.956279] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.956285] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a6c0 state to ffff8803ea4b3800
>[   32.956288] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950000 state to ffff8803ea4b3800
>[   32.956290] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a6c0 to [CRTC:30:crtc-1]
>[   32.956291] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a6c0
>[   32.956293] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.956298] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.956299] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.956305] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.956322] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.956324] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.964283] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.964288] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b3800
>[   32.964292] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3800
>[   32.964294] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   32.964295] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a000
>[   32.964297] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.964302] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.964303] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.964308] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.964326] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.964327] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.972279] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   32.972284] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76ac00 state to ffff8803ea4b3800
>[   32.972288] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950000 state to ffff8803ea4b3800
>[   32.972289] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ac00 to [CRTC:30:crtc-1]
>[   32.972291] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76ac00
>[   32.972292] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   32.972298] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   32.972299] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   32.972305] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   32.972322] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   32.972324] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   32.976572] [drm:drm_mode_addfb2] [FB:91]
>[   32.995941] [drm:drm_mode_addfb2] [FB:75]
>[   33.013456] [drm:drm_mode_addfb2] [FB:94]
>[   33.030106] [drm:drm_mode_addfb2] [FB:91]
>[   33.046779] [drm:drm_mode_addfb2] [FB:75]
>[   33.063449] [drm:drm_mode_addfb2] [FB:94]
>[   33.068275] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   33.068280] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a0c0 state to ffff8803ea4b3800
>[   33.068283] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3800
>[   33.068285] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a0c0 to [CRTC:30:crtc-1]
>[   33.068287] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a0c0
>[   33.068288] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   33.068293] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   33.068295] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.068300] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   33.068314] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   33.068316] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   33.076272] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   33.076278] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76ac00 state to ffff8803ea4b3800
>[   33.076281] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950000 state to ffff8803ea4b3800
>[   33.076283] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ac00 to [CRTC:30:crtc-1]
>[   33.076284] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76ac00
>[   33.076286] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   33.076291] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   33.076293] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.076298] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   33.076312] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   33.076314] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   33.080102] [drm:drm_mode_addfb2] [FB:91]
>[   33.084276] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   33.084282] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a0c0 state to ffff8803ea4b3800
>[   33.084285] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3800
>[   33.084286] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a0c0 to [CRTC:30:crtc-1]
>[   33.084288] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a0c0
>[   33.084289] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   33.084295] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   33.084297] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.084302] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   33.084316] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   33.084318] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   33.092273] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   33.092279] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76ac00 state to ffff8803ea4b3800
>[   33.092282] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950000 state to ffff8803ea4b3800
>[   33.092284] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ac00 to [CRTC:30:crtc-1]
>[   33.092285] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76ac00
>[   33.092287] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   33.092292] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   33.092294] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.092300] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   33.092314] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   33.092316] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   33.096771] [drm:drm_mode_addfb2] [FB:75]
>[   33.108243] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96800
>[   33.108249] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a6c0 state to ffff8803fca96800
>[   33.108253] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e6000 state to ffff8803fca96800
>[   33.108254] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a6c0 to [CRTC:30:crtc-1]
>[   33.108256] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39a6c0
>[   33.108257] [drm:drm_atomic_check_only] checking ffff8803fca96800
>[   33.108262] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   33.108263] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.108269] [drm:drm_atomic_commit] commiting ffff8803fca96800
>[   33.108281] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96800
>[   33.108283] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96800
>[   33.113455] [drm:drm_mode_addfb2] [FB:94]
>[   33.116630] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96800
>[   33.116634] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a300 state to ffff8803fca96800
>[   33.116637] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e1000 state to ffff8803fca96800
>[   33.116639] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a300 to [CRTC:30:crtc-1]
>[   33.116641] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39a300
>[   33.116642] [drm:drm_atomic_check_only] checking ffff8803fca96800
>[   33.116647] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   33.116649] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.116654] [drm:drm_atomic_commit] commiting ffff8803fca96800
>[   33.116664] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96800
>[   33.116665] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96800
>[   33.124276] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   33.124282] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a0c0 state to ffff8803ea4b3800
>[   33.124286] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3800
>[   33.124287] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a0c0 to [CRTC:30:crtc-1]
>[   33.124289] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a0c0
>[   33.124290] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   33.124296] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   33.124297] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.124303] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   33.124317] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   33.124319] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   33.130122] [drm:drm_mode_addfb2] [FB:91]
>[   33.133775] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96800
>[   33.133780] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a180 state to ffff8803fca96800
>[   33.133783] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e6000 state to ffff8803fca96800
>[   33.133785] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a180 to [CRTC:30:crtc-1]
>[   33.133787] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39a180
>[   33.133788] [drm:drm_atomic_check_only] checking ffff8803fca96800
>[   33.133793] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   33.133795] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.133799] [drm:drm_atomic_commit] commiting ffff8803fca96800
>[   33.133809] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96800
>[   33.133811] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96800
>[   33.140148] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96800
>[   33.140151] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39ae40 state to ffff8803fca96800
>[   33.140153] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e3000 state to ffff8803fca96800
>[   33.140154] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39ae40 to [CRTC:30:crtc-1]
>[   33.140155] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39ae40
>[   33.140155] [drm:drm_atomic_check_only] checking ffff8803fca96800
>[   33.140158] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   33.140159] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.140162] [drm:drm_atomic_commit] commiting ffff8803fca96800
>[   33.140168] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96800
>[   33.140169] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96800
>[   33.146762] [drm:drm_mode_addfb2] [FB:75]
>[   33.148145] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96800
>[   33.148148] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a180 state to ffff8803fca96800
>[   33.148150] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e6000 state to ffff8803fca96800
>[   33.148151] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a180 to [CRTC:30:crtc-1]
>[   33.148152] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39a180
>[   33.148153] [drm:drm_atomic_check_only] checking ffff8803fca96800
>[   33.148155] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   33.148156] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.148159] [drm:drm_atomic_commit] commiting ffff8803fca96800
>[   33.148166] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96800
>[   33.148167] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96800
>[   33.157276] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   33.157281] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a180 state to ffff8803ea4b3800
>[   33.157285] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   33.157286] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a180 to [CRTC:30:crtc-1]
>[   33.157288] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a180
>[   33.157289] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   33.157294] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   33.157296] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.157301] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   33.157316] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   33.157318] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   33.163452] [drm:drm_mode_addfb2] [FB:94]
>[   33.165167] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96800
>[   33.165171] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a240 state to ffff8803fca96800
>[   33.165175] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e3000 state to ffff8803fca96800
>[   33.165176] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a240 to [CRTC:30:crtc-1]
>[   33.165178] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39a240
>[   33.165179] [drm:drm_atomic_check_only] checking ffff8803fca96800
>[   33.165184] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   33.165185] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.165190] [drm:drm_atomic_commit] commiting ffff8803fca96800
>[   33.165200] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96800
>[   33.165202] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96800
>[   33.172137] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96800
>[   33.172141] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a6c0 state to ffff8803fca96800
>[   33.172143] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e1800 state to ffff8803fca96800
>[   33.172145] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a6c0 to [CRTC:30:crtc-1]
>[   33.172146] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39a6c0
>[   33.172147] [drm:drm_atomic_check_only] checking ffff8803fca96800
>[   33.172150] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   33.172151] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.172155] [drm:drm_atomic_commit] commiting ffff8803fca96800
>[   33.172163] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96800
>[   33.172165] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96800
>[   33.180078] [drm:drm_mode_addfb2] [FB:91]
>[   33.188143] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   33.188147] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a240 state to ffff8803ea4b3800
>[   33.188150] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b3800
>[   33.188151] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a240 to [CRTC:30:crtc-1]
>[   33.188153] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a240
>[   33.188154] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   33.188158] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   33.188160] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.188164] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   33.188173] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   33.188174] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   33.196139] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   33.196143] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a180 state to ffff8803ea4b3800
>[   33.196145] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe952000 state to ffff8803ea4b3800
>[   33.196147] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a180 to [CRTC:30:crtc-1]
>[   33.196148] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a180
>[   33.196150] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   33.196154] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   33.196155] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.196160] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   33.196169] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   33.196171] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   33.196745] [drm:drm_mode_addfb2] [FB:75]
>[   33.213412] [drm:drm_mode_addfb2] [FB:94]
>[   33.230123] [drm:drm_mode_addfb2] [FB:91]
>[   33.246763] [drm:drm_mode_addfb2] [FB:75]
>[   33.263402] [drm:drm_mode_addfb2] [FB:94]
>[   33.280064] [drm:drm_mode_addfb2] [FB:91]
>[   33.296740] [drm:drm_mode_addfb2] [FB:75]
>[   33.313402] [drm:drm_mode_addfb2] [FB:94]
>[   33.326443] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca94c00
>[   33.326449] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a3c0 state to ffff8803fca94c00
>[   33.326452] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e3000 state to ffff8803fca94c00
>[   33.326454] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a3c0 to [CRTC:30:crtc-1]
>[   33.326455] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ef39a3c0
>[   33.326457] [drm:drm_atomic_check_only] checking ffff8803fca94c00
>[   33.326461] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   33.326462] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.326468] [drm:drm_atomic_commit] commiting ffff8803fca94c00
>[   33.326481] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca94c00
>[   33.326483] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca94c00
>[   33.326488] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca94c00
>[   33.326490] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a300 state to ffff8803fca94c00
>[   33.326491] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e4000 state to ffff8803fca94c00
>[   33.326492] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a300 to [CRTC:30:crtc-1]
>[   33.326493] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ef39a300
>[   33.326494] [drm:drm_atomic_check_only] checking ffff8803fca94c00
>[   33.326496] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   33.326497] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.326499] [drm:drm_atomic_commit] commiting ffff8803fca94c00
>[   33.326503] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca94c00
>[   33.326504] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca94c00
>[   33.330126] [drm:drm_mode_addfb2] [FB:99]
>[   33.342985] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87c400
>[   33.342990] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800d94fd600 state to ffff8803ec87c400
>[   33.342992] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f2800 state to ffff8803ec87c400
>[   33.342994] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d94fd600 to [CRTC:30:crtc-1]
>[   33.342995] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800d94fd600
>[   33.342996] [drm:drm_atomic_check_only] checking ffff8803ec87c400
>[   33.343000] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.343001] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.343005] [drm:drm_atomic_commit] commiting ffff8803ec87c400
>[   33.343015] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87c400
>[   33.343017] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87c400
>[   33.343021] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87c400
>[   33.343022] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800d94fd840 state to ffff8803ec87c400
>[   33.343023] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f7000 state to ffff8803ec87c400
>[   33.343024] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d94fd840 to [CRTC:30:crtc-1]
>[   33.343025] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800d94fd840
>[   33.343026] [drm:drm_atomic_check_only] checking ffff8803ec87c400
>[   33.343027] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.343028] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.343030] [drm:drm_atomic_commit] commiting ffff8803ec87c400
>[   33.343032] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87c400
>[   33.343034] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87c400
>[   33.346765] [drm:drm_mode_addfb2] [FB:91]
>[   33.359639] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b1c00
>[   33.359644] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a240 state to ffff8803ea4b1c00
>[   33.359647] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe954000 state to ffff8803ea4b1c00
>[   33.359648] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a240 to [CRTC:30:crtc-1]
>[   33.359649] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a240
>[   33.359650] [drm:drm_atomic_check_only] checking ffff8803ea4b1c00
>[   33.359654] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 94
>[   33.359656] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.359661] [drm:drm_atomic_commit] commiting ffff8803ea4b1c00
>[   33.359671] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b1c00
>[   33.359672] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b1c00
>[   33.359677] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b1c00
>[   33.359678] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a900 state to ffff8803ea4b1c00
>[   33.359679] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe957800 state to ffff8803ea4b1c00
>[   33.359680] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:30:crtc-1]
>[   33.359681] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a900
>[   33.359682] [drm:drm_atomic_check_only] checking ffff8803ea4b1c00
>[   33.359683] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 94
>[   33.359684] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.359686] [drm:drm_atomic_commit] commiting ffff8803ea4b1c00
>[   33.359689] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b1c00
>[   33.359690] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b1c00
>[   33.363442] [drm:drm_mode_addfb2] [FB:75]
>[   33.375310] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca94400
>[   33.375316] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a900 state to ffff8803fca94400
>[   33.375319] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e6800 state to ffff8803fca94400
>[   33.375320] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a900 to [CRTC:30:crtc-1]
>[   33.375322] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39a900
>[   33.375323] [drm:drm_atomic_check_only] checking ffff8803fca94400
>[   33.375327] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   33.375329] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.375334] [drm:drm_atomic_commit] commiting ffff8803fca94400
>[   33.375345] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca94400
>[   33.375347] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca94400
>[   33.375352] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca94400
>[   33.375353] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39ab40 state to ffff8803fca94400
>[   33.375355] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e5800 state to ffff8803fca94400
>[   33.375356] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39ab40 to [CRTC:30:crtc-1]
>[   33.375358] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39ab40
>[   33.375359] [drm:drm_atomic_check_only] checking ffff8803fca94400
>[   33.375360] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   33.375362] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.375363] [drm:drm_atomic_commit] commiting ffff8803fca94400
>[   33.375368] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca94400
>[   33.375369] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca94400
>[   33.380073] [drm:drm_mode_addfb2] [FB:94]
>[   33.391479] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b1800
>[   33.391484] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b1800
>[   33.391487] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe954000 state to ffff8803ea4b1800
>[   33.391488] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   33.391489] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8800cd76aa80
>[   33.391490] [drm:drm_atomic_check_only] checking ffff8803ea4b1800
>[   33.391494] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   33.391495] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.391499] [drm:drm_atomic_commit] commiting ffff8803ea4b1800
>[   33.391509] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b1800
>[   33.391510] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b1800
>[   33.391515] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b1800
>[   33.391516] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a240 state to ffff8803ea4b1800
>[   33.391517] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe955000 state to ffff8803ea4b1800
>[   33.391518] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a240 to [CRTC:30:crtc-1]
>[   33.391519] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8800cd76a240
>[   33.391520] [drm:drm_atomic_check_only] checking ffff8803ea4b1800
>[   33.391521] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   33.391522] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.391524] [drm:drm_atomic_commit] commiting ffff8803ea4b1800
>[   33.391527] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b1800
>[   33.391528] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b1800
>[   33.396755] [drm:drm_mode_addfb2] [FB:99]
>[   33.408072] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca94400
>[   33.408078] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39acc0 state to ffff8803fca94400
>[   33.408081] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e5000 state to ffff8803fca94400
>[   33.408083] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39acc0 to [CRTC:30:crtc-1]
>[   33.408085] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39acc0
>[   33.408087] [drm:drm_atomic_check_only] checking ffff8803fca94400
>[   33.408102] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.408104] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.408110] [drm:drm_atomic_commit] commiting ffff8803fca94400
>[   33.408134] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca94400
>[   33.408137] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca94400
>[   33.408142] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca94400
>[   33.408144] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39af00 state to ffff8803fca94400
>[   33.408146] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e2000 state to ffff8803fca94400
>[   33.408148] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39af00 to [CRTC:30:crtc-1]
>[   33.408149] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39af00
>[   33.408151] [drm:drm_atomic_check_only] checking ffff8803fca94400
>[   33.408153] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.408155] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.408157] [drm:drm_atomic_commit] commiting ffff8803fca94400
>[   33.408162] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca94400
>[   33.408164] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca94400
>[   33.413429] [drm:drm_mode_addfb2] [FB:91]
>[   33.423230] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0400
>[   33.423235] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76ac00 state to ffff8803ea4b0400
>[   33.423238] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe954000 state to ffff8803ea4b0400
>[   33.423239] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ac00 to [CRTC:30:crtc-1]
>[   33.423241] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76ac00
>[   33.423242] [drm:drm_atomic_check_only] checking ffff8803ea4b0400
>[   33.423246] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 94
>[   33.423248] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.423252] [drm:drm_atomic_commit] commiting ffff8803ea4b0400
>[   33.423264] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0400
>[   33.423266] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0400
>[   33.423271] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0400
>[   33.423273] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a240 state to ffff8803ea4b0400
>[   33.423275] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe955000 state to ffff8803ea4b0400
>[   33.423276] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a240 to [CRTC:30:crtc-1]
>[   33.423277] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a240
>[   33.423278] [drm:drm_atomic_check_only] checking ffff8803ea4b0400
>[   33.423280] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 94
>[   33.423281] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.423283] [drm:drm_atomic_commit] commiting ffff8803ea4b0400
>[   33.423287] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0400
>[   33.423288] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0400
>[   33.432449] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0000
>[   33.432454] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76ac00 state to ffff8803ea4b0000
>[   33.432456] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b0000
>[   33.432458] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ac00 to [CRTC:30:crtc-1]
>[   33.432459] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76ac00
>[   33.432461] [drm:drm_atomic_check_only] checking ffff8803ea4b0000
>[   33.432464] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.432466] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.432470] [drm:drm_atomic_commit] commiting ffff8803ea4b0000
>[   33.432484] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0000
>[   33.432486] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0000
>[   33.432490] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0000
>[   33.432491] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a240 state to ffff8803ea4b0000
>[   33.432493] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe955000 state to ffff8803ea4b0000
>[   33.432494] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a240 to [CRTC:30:crtc-1]
>[   33.432495] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76a240
>[   33.432496] [drm:drm_atomic_check_only] checking ffff8803ea4b0000
>[   33.432497] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.432499] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.432500] [drm:drm_atomic_commit] commiting ffff8803ea4b0000
>[   33.432517] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0000
>[   33.432518] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0000
>[   33.453941] [drm:drm_mode_addfb2] [FB:94]
>[   33.485116] [drm:drm_mode_addfb2] [FB:91]
>[   33.496738] [drm:drm_mode_addfb2] [FB:99]
>[   33.500636] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca94400
>[   33.500644] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39acc0 state to ffff8803fca94400
>[   33.500649] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e0000 state to ffff8803fca94400
>[   33.500650] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39acc0 to [CRTC:30:crtc-1]
>[   33.500652] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39acc0
>[   33.500654] [drm:drm_atomic_check_only] checking ffff8803fca94400
>[   33.500662] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.500663] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.500672] [drm:drm_atomic_commit] commiting ffff8803fca94400
>[   33.500686] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca94400
>[   33.500689] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca94400
>[   33.508125] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca94400
>[   33.508129] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a840 state to ffff8803fca94400
>[   33.508131] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e7000 state to ffff8803fca94400
>[   33.508133] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a840 to [CRTC:30:crtc-1]
>[   33.508134] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39a840
>[   33.508135] [drm:drm_atomic_check_only] checking ffff8803fca94400
>[   33.508139] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.508140] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.508144] [drm:drm_atomic_commit] commiting ffff8803fca94400
>[   33.508153] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca94400
>[   33.508154] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca94400
>[   33.513416] [drm:drm_mode_addfb2] [FB:94]
>[   33.517015] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b5800
>[   33.517020] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76ac00 state to ffff8803ea4b5800
>[   33.517023] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b5800
>[   33.517025] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ac00 to [CRTC:30:crtc-1]
>[   33.517026] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76ac00
>[   33.517027] [drm:drm_atomic_check_only] checking ffff8803ea4b5800
>[   33.517034] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.517035] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.517041] [drm:drm_atomic_commit] commiting ffff8803ea4b5800
>[   33.517051] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b5800
>[   33.517053] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b5800
>[   33.524136] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b5800
>[   33.524140] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a180 state to ffff8803ea4b5800
>[   33.524143] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b5800
>[   33.524145] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a180 to [CRTC:30:crtc-1]
>[   33.524146] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76a180
>[   33.524147] [drm:drm_atomic_check_only] checking ffff8803ea4b5800
>[   33.524150] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.524152] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.524156] [drm:drm_atomic_commit] commiting ffff8803ea4b5800
>[   33.524165] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b5800
>[   33.524167] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b5800
>[   33.530122] [drm:drm_mode_addfb2] [FB:91]
>[   33.533394] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca94400
>[   33.533399] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39acc0 state to ffff8803fca94400
>[   33.533401] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e0000 state to ffff8803fca94400
>[   33.533403] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39acc0 to [CRTC:30:crtc-1]
>[   33.533404] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39acc0
>[   33.533405] [drm:drm_atomic_check_only] checking ffff8803fca94400
>[   33.533410] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.533412] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.533416] [drm:drm_atomic_commit] commiting ffff8803fca94400
>[   33.533425] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca94400
>[   33.533427] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca94400
>[   33.540115] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca94400
>[   33.540118] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39af00 state to ffff8803fca94400
>[   33.540121] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e7000 state to ffff8803fca94400
>[   33.540122] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39af00 to [CRTC:30:crtc-1]
>[   33.540124] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39af00
>[   33.540125] [drm:drm_atomic_check_only] checking ffff8803fca94400
>[   33.540128] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.540129] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.540133] [drm:drm_atomic_commit] commiting ffff8803fca94400
>[   33.540141] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca94400
>[   33.540143] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca94400
>[   33.546755] [drm:drm_mode_addfb2] [FB:99]
>[   33.549953] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca94400
>[   33.549958] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39acc0 state to ffff8803fca94400
>[   33.549961] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e0000 state to ffff8803fca94400
>[   33.549962] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39acc0 to [CRTC:30:crtc-1]
>[   33.549964] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39acc0
>[   33.549965] [drm:drm_atomic_check_only] checking ffff8803fca94400
>[   33.549971] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.549972] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.549976] [drm:drm_atomic_commit] commiting ffff8803fca94400
>[   33.549986] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca94400
>[   33.549987] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca94400
>[   33.557128] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca94400
>[   33.557132] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39af00 state to ffff8803fca94400
>[   33.557134] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e7000 state to ffff8803fca94400
>[   33.557136] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39af00 to [CRTC:30:crtc-1]
>[   33.557137] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39af00
>[   33.557138] [drm:drm_atomic_check_only] checking ffff8803fca94400
>[   33.557142] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.557143] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.557148] [drm:drm_atomic_commit] commiting ffff8803fca94400
>[   33.557157] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca94400
>[   33.557159] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca94400
>[   33.563403] [drm:drm_mode_addfb2] [FB:94]
>[   33.564115] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca94400
>[   33.564118] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39acc0 state to ffff8803fca94400
>[   33.564120] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e0000 state to ffff8803fca94400
>[   33.564122] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39acc0 to [CRTC:30:crtc-1]
>[   33.564123] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39acc0
>[   33.564125] [drm:drm_atomic_check_only] checking ffff8803fca94400
>[   33.564128] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.564129] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.564133] [drm:drm_atomic_commit] commiting ffff8803fca94400
>[   33.564142] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca94400
>[   33.564145] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca94400
>[   33.572143] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b5800
>[   33.572146] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b5800
>[   33.572149] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b5800
>[   33.572150] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   33.572151] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76a000
>[   33.572152] [drm:drm_atomic_check_only] checking ffff8803ea4b5800
>[   33.572156] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.572157] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.572161] [drm:drm_atomic_commit] commiting ffff8803ea4b5800
>[   33.572170] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b5800
>[   33.572171] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b5800
>[   33.580070] [drm:drm_mode_addfb2] [FB:91]
>[   33.580143] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca94400
>[   33.580146] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39af00 state to ffff8803fca94400
>[   33.580148] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e7000 state to ffff8803fca94400
>[   33.580149] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39af00 to [CRTC:30:crtc-1]
>[   33.580151] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39af00
>[   33.580152] [drm:drm_atomic_check_only] checking ffff8803fca94400
>[   33.580155] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.580156] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.580160] [drm:drm_atomic_commit] commiting ffff8803fca94400
>[   33.580167] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca94400
>[   33.580169] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca94400
>[   33.588115] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca94400
>[   33.588119] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a000 state to ffff8803fca94400
>[   33.588123] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e5000 state to ffff8803fca94400
>[   33.588125] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a000 to [CRTC:30:crtc-1]
>[   33.588127] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39a000
>[   33.588129] [drm:drm_atomic_check_only] checking ffff8803fca94400
>[   33.588134] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.588136] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.588140] [drm:drm_atomic_commit] commiting ffff8803fca94400
>[   33.588148] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca94400
>[   33.588150] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca94400
>[   33.596122] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca94400
>[   33.596126] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39af00 state to ffff8803fca94400
>[   33.596128] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e7000 state to ffff8803fca94400
>[   33.596129] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39af00 to [CRTC:30:crtc-1]
>[   33.596130] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39af00
>[   33.596132] [drm:drm_atomic_check_only] checking ffff8803fca94400
>[   33.596135] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.596136] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.596139] [drm:drm_atomic_commit] commiting ffff8803fca94400
>[   33.596147] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca94400
>[   33.596149] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca94400
>[   33.596744] [drm:drm_mode_addfb2] [FB:99]
>[   33.604131] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec879000
>[   33.604135] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800d94fdcc0 state to ffff8803ec879000
>[   33.604138] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f2800 state to ffff8803ec879000
>[   33.604139] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d94fdcc0 to [CRTC:30:crtc-1]
>[   33.604141] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800d94fdcc0
>[   33.604142] [drm:drm_atomic_check_only] checking ffff8803ec879000
>[   33.604146] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.604147] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.604151] [drm:drm_atomic_commit] commiting ffff8803ec879000
>[   33.604162] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec879000
>[   33.604164] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec879000
>[   33.613137] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec879000
>[   33.613141] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800d94fd9c0 state to ffff8803ec879000
>[   33.613143] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f5800 state to ffff8803ec879000
>[   33.613145] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d94fd9c0 to [CRTC:30:crtc-1]
>[   33.613146] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800d94fd9c0
>[   33.613147] [drm:drm_atomic_check_only] checking ffff8803ec879000
>[   33.613151] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.613152] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.613156] [drm:drm_atomic_commit] commiting ffff8803ec879000
>[   33.613164] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec879000
>[   33.613166] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec879000
>[   33.613394] [drm:drm_mode_addfb2] [FB:94]
>[   33.621167] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca94400
>[   33.621171] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a000 state to ffff8803fca94400
>[   33.621174] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e5000 state to ffff8803fca94400
>[   33.621176] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a000 to [CRTC:30:crtc-1]
>[   33.621177] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39a000
>[   33.621178] [drm:drm_atomic_check_only] checking ffff8803fca94400
>[   33.621182] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.621184] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.621189] [drm:drm_atomic_commit] commiting ffff8803fca94400
>[   33.621199] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca94400
>[   33.621201] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca94400
>[   33.628180] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca94400
>[   33.628184] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a780 state to ffff8803fca94400
>[   33.628186] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e2000 state to ffff8803fca94400
>[   33.628188] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a780 to [CRTC:30:crtc-1]
>[   33.628189] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39a780
>[   33.628190] [drm:drm_atomic_check_only] checking ffff8803fca94400
>[   33.628193] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.628195] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.628199] [drm:drm_atomic_commit] commiting ffff8803fca94400
>[   33.628207] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca94400
>[   33.628209] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca94400
>[   33.630111] [drm:drm_mode_addfb2] [FB:91]
>[   33.636165] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec879000
>[   33.636169] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800d94fdcc0 state to ffff8803ec879000
>[   33.636171] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f2800 state to ffff8803ec879000
>[   33.636173] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d94fdcc0 to [CRTC:30:crtc-1]
>[   33.636174] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800d94fdcc0
>[   33.636176] [drm:drm_atomic_check_only] checking ffff8803ec879000
>[   33.636179] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.636180] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.636185] [drm:drm_atomic_commit] commiting ffff8803ec879000
>[   33.636194] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec879000
>[   33.636196] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec879000
>[   33.644134] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b5800
>[   33.644138] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b5800
>[   33.644140] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950000 state to ffff8803ea4b5800
>[   33.644141] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   33.644143] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76aa80
>[   33.644144] [drm:drm_atomic_check_only] checking ffff8803ea4b5800
>[   33.644147] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.644149] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.644152] [drm:drm_atomic_commit] commiting ffff8803ea4b5800
>[   33.644161] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b5800
>[   33.644163] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b5800
>[   33.646748] [drm:drm_mode_addfb2] [FB:99]
>[   33.660164] [drm:drm_atomic_state_init] Allocated atomic state ffff8800d7ad6000
>[   33.660169] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800d2dd1180 state to ffff8800d7ad6000
>[   33.660172] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f1b5a800 state to ffff8800d7ad6000
>[   33.660174] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d2dd1180 to [CRTC:30:crtc-1]
>[   33.660176] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800d2dd1180
>[   33.660177] [drm:drm_atomic_check_only] checking ffff8800d7ad6000
>[   33.660182] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.660183] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.660188] [drm:drm_atomic_commit] commiting ffff8800d7ad6000
>[   33.660199] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800d7ad6000
>[   33.660201] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d7ad6000
>[   33.663421] [drm:drm_mode_addfb2] [FB:94]
>[   33.669985] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b7c00
>[   33.669990] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b7c00
>[   33.669993] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950000 state to ffff8803ea4b7c00
>[   33.669995] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   33.669997] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76a000
>[   33.669998] [drm:drm_atomic_check_only] checking ffff8803ea4b7c00
>[   33.670003] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.670005] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.670010] [drm:drm_atomic_commit] commiting ffff8803ea4b7c00
>[   33.670020] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b7c00
>[   33.670022] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b7c00
>[   33.676137] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96400
>[   33.676142] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39aa80 state to ffff8803fca96400
>[   33.676144] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e4800 state to ffff8803fca96400
>[   33.676146] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39aa80 to [CRTC:30:crtc-1]
>[   33.676147] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39aa80
>[   33.676149] [drm:drm_atomic_check_only] checking ffff8803fca96400
>[   33.676153] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.676154] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.676159] [drm:drm_atomic_commit] commiting ffff8803fca96400
>[   33.676168] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96400
>[   33.676170] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96400
>[   33.680096] [drm:drm_mode_addfb2] [FB:91]
>[   33.684126] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ecac3000
>[   33.684130] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b540 state to ffff8803ecac3000
>[   33.684133] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a53000 state to ffff8803ecac3000
>[   33.684135] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b540 to [CRTC:30:crtc-1]
>[   33.684136] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803fea3b540
>[   33.684137] [drm:drm_atomic_check_only] checking ffff8803ecac3000
>[   33.684141] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.684143] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.684147] [drm:drm_atomic_commit] commiting ffff8803ecac3000
>[   33.684156] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ecac3000
>[   33.684158] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ecac3000
>[   33.692165] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b7c00
>[   33.692169] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a840 state to ffff8803ea4b7c00
>[   33.692171] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b7c00
>[   33.692173] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a840 to [CRTC:30:crtc-1]
>[   33.692174] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76a840
>[   33.692176] [drm:drm_atomic_check_only] checking ffff8803ea4b7c00
>[   33.692179] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.692181] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.692185] [drm:drm_atomic_commit] commiting ffff8803ea4b7c00
>[   33.692194] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b7c00
>[   33.692196] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b7c00
>[   33.696764] [drm:drm_mode_addfb2] [FB:99]
>[   33.700128] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec879000
>[   33.700132] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800d94fdd80 state to ffff8803ec879000
>[   33.700135] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f4000 state to ffff8803ec879000
>[   33.700136] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d94fdd80 to [CRTC:30:crtc-1]
>[   33.700138] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800d94fdd80
>[   33.700139] [drm:drm_atomic_check_only] checking ffff8803ec879000
>[   33.700142] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.700143] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.700147] [drm:drm_atomic_commit] commiting ffff8803ec879000
>[   33.700156] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec879000
>[   33.700158] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec879000
>[   33.708163] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b7c00
>[   33.708167] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a0c0 state to ffff8803ea4b7c00
>[   33.708169] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b7c00
>[   33.708171] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a0c0 to [CRTC:30:crtc-1]
>[   33.708172] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76a0c0
>[   33.708173] [drm:drm_atomic_check_only] checking ffff8803ea4b7c00
>[   33.708177] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.708178] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.708182] [drm:drm_atomic_commit] commiting ffff8803ea4b7c00
>[   33.708191] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b7c00
>[   33.708193] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b7c00
>[   33.713443] [drm:drm_mode_addfb2] [FB:94]
>[   33.716114] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b7c00
>[   33.716117] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a540 state to ffff8803ea4b7c00
>[   33.716120] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe955000 state to ffff8803ea4b7c00
>[   33.716121] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a540 to [CRTC:30:crtc-1]
>[   33.716122] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76a540
>[   33.716124] [drm:drm_atomic_check_only] checking ffff8803ea4b7c00
>[   33.716127] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.716128] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.716132] [drm:drm_atomic_commit] commiting ffff8803ea4b7c00
>[   33.716140] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b7c00
>[   33.716142] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b7c00
>[   33.725157] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b7c00
>[   33.725161] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a0c0 state to ffff8803ea4b7c00
>[   33.725163] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b7c00
>[   33.725165] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a0c0 to [CRTC:30:crtc-1]
>[   33.725166] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76a0c0
>[   33.725168] [drm:drm_atomic_check_only] checking ffff8803ea4b7c00
>[   33.725171] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.725172] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.725176] [drm:drm_atomic_commit] commiting ffff8803ea4b7c00
>[   33.725185] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b7c00
>[   33.725187] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b7c00
>[   33.730104] [drm:drm_mode_addfb2] [FB:91]
>[   33.733117] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b7c00
>[   33.733120] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a540 state to ffff8803ea4b7c00
>[   33.733123] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe955000 state to ffff8803ea4b7c00
>[   33.733124] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a540 to [CRTC:30:crtc-1]
>[   33.733126] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76a540
>[   33.733127] [drm:drm_atomic_check_only] checking ffff8803ea4b7c00
>[   33.733130] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.733131] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.733135] [drm:drm_atomic_commit] commiting ffff8803ea4b7c00
>[   33.733143] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b7c00
>[   33.733145] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b7c00
>[   33.740127] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96400
>[   33.740131] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a0c0 state to ffff8803fca96400
>[   33.740134] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e3800 state to ffff8803fca96400
>[   33.740135] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a0c0 to [CRTC:30:crtc-1]
>[   33.740137] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39a0c0
>[   33.740138] [drm:drm_atomic_check_only] checking ffff8803fca96400
>[   33.740141] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.740143] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.740146] [drm:drm_atomic_commit] commiting ffff8803fca96400
>[   33.740155] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96400
>[   33.740157] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96400
>[   33.746764] [drm:drm_mode_addfb2] [FB:99]
>[   33.748122] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b7c00
>[   33.748126] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a0c0 state to ffff8803ea4b7c00
>[   33.748129] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b7c00
>[   33.748130] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a0c0 to [CRTC:30:crtc-1]
>[   33.748132] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76a0c0
>[   33.748133] [drm:drm_atomic_check_only] checking ffff8803ea4b7c00
>[   33.748136] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.748138] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.748142] [drm:drm_atomic_commit] commiting ffff8803ea4b7c00
>[   33.748151] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b7c00
>[   33.748152] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b7c00
>[   33.756157] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b7c00
>[   33.756161] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76ab40 state to ffff8803ea4b7c00
>[   33.756164] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe952000 state to ffff8803ea4b7c00
>[   33.756165] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ab40 to [CRTC:30:crtc-1]
>[   33.756166] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76ab40
>[   33.756168] [drm:drm_atomic_check_only] checking ffff8803ea4b7c00
>[   33.756171] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.756173] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.756177] [drm:drm_atomic_commit] commiting ffff8803ea4b7c00
>[   33.756185] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b7c00
>[   33.756187] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b7c00
>[   33.763430] [drm:drm_mode_addfb2] [FB:94]
>[   33.764115] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b7c00
>[   33.764119] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a0c0 state to ffff8803ea4b7c00
>[   33.764121] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b7c00
>[   33.764123] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a0c0 to [CRTC:30:crtc-1]
>[   33.764124] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76a0c0
>[   33.764125] [drm:drm_atomic_check_only] checking ffff8803ea4b7c00
>[   33.764128] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.764130] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.764134] [drm:drm_atomic_commit] commiting ffff8803ea4b7c00
>[   33.764142] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b7c00
>[   33.764144] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b7c00
>[   33.772158] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b7c00
>[   33.772161] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76ab40 state to ffff8803ea4b7c00
>[   33.772164] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe952000 state to ffff8803ea4b7c00
>[   33.772165] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ab40 to [CRTC:30:crtc-1]
>[   33.772167] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76ab40
>[   33.772168] [drm:drm_atomic_check_only] checking ffff8803ea4b7c00
>[   33.772171] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.772172] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.772176] [drm:drm_atomic_commit] commiting ffff8803ea4b7c00
>[   33.772185] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b7c00
>[   33.772187] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b7c00
>[   33.780108] [drm:drm_mode_addfb2] [FB:91]
>[   33.780172] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96400
>[   33.780174] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a0c0 state to ffff8803fca96400
>[   33.780176] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e7800 state to ffff8803fca96400
>[   33.780178] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a0c0 to [CRTC:30:crtc-1]
>[   33.780179] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39a0c0
>[   33.780180] [drm:drm_atomic_check_only] checking ffff8803fca96400
>[   33.780183] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.780185] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.780189] [drm:drm_atomic_commit] commiting ffff8803fca96400
>[   33.780196] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96400
>[   33.780198] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96400
>[   33.789127] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96400
>[   33.789130] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39aa80 state to ffff8803fca96400
>[   33.789133] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e0800 state to ffff8803fca96400
>[   33.789134] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39aa80 to [CRTC:30:crtc-1]
>[   33.789136] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39aa80
>[   33.789137] [drm:drm_atomic_check_only] checking ffff8803fca96400
>[   33.789140] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.789142] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.789146] [drm:drm_atomic_commit] commiting ffff8803fca96400
>[   33.789155] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96400
>[   33.789156] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96400
>[   33.796768] [drm:drm_mode_addfb2] [FB:99]
>[   33.797108] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96400
>[   33.797111] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a300 state to ffff8803fca96400
>[   33.797114] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e7800 state to ffff8803fca96400
>[   33.797115] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a300 to [CRTC:30:crtc-1]
>[   33.797117] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39a300
>[   33.797118] [drm:drm_atomic_check_only] checking ffff8803fca96400
>[   33.797121] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.797123] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.797127] [drm:drm_atomic_commit] commiting ffff8803fca96400
>[   33.797135] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96400
>[   33.797137] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96400
>[   33.804120] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96400
>[   33.804124] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39aa80 state to ffff8803fca96400
>[   33.804126] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e0800 state to ffff8803fca96400
>[   33.804128] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39aa80 to [CRTC:30:crtc-1]
>[   33.804129] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39aa80
>[   33.804130] [drm:drm_atomic_check_only] checking ffff8803fca96400
>[   33.804133] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.804135] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.804139] [drm:drm_atomic_commit] commiting ffff8803fca96400
>[   33.804148] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96400
>[   33.804149] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96400
>[   33.812115] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96400
>[   33.812118] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a300 state to ffff8803fca96400
>[   33.812121] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e7800 state to ffff8803fca96400
>[   33.812122] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a300 to [CRTC:30:crtc-1]
>[   33.812124] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39a300
>[   33.812125] [drm:drm_atomic_check_only] checking ffff8803fca96400
>[   33.812128] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.812129] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.812133] [drm:drm_atomic_commit] commiting ffff8803fca96400
>[   33.812142] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96400
>[   33.812143] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96400
>[   33.813407] [drm:drm_mode_addfb2] [FB:94]
>[   33.820125] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96400
>[   33.820128] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39aa80 state to ffff8803fca96400
>[   33.820131] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e0800 state to ffff8803fca96400
>[   33.820132] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39aa80 to [CRTC:30:crtc-1]
>[   33.820134] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39aa80
>[   33.820135] [drm:drm_atomic_check_only] checking ffff8803fca96400
>[   33.820138] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.820140] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.820144] [drm:drm_atomic_commit] commiting ffff8803fca96400
>[   33.820152] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96400
>[   33.820154] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96400
>[   33.828157] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b7c00
>[   33.828161] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a0c0 state to ffff8803ea4b7c00
>[   33.828163] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b7c00
>[   33.828165] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a0c0 to [CRTC:30:crtc-1]
>[   33.828166] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76a0c0
>[   33.828167] [drm:drm_atomic_check_only] checking ffff8803ea4b7c00
>[   33.828170] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.828172] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.828175] [drm:drm_atomic_commit] commiting ffff8803ea4b7c00
>[   33.828184] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b7c00
>[   33.828185] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b7c00
>[   33.830095] [drm:drm_mode_addfb2] [FB:91]
>[   33.836155] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b7c00
>[   33.836159] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a240 state to ffff8803ea4b7c00
>[   33.836161] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b7c00
>[   33.836163] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a240 to [CRTC:30:crtc-1]
>[   33.836164] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76a240
>[   33.836165] [drm:drm_atomic_check_only] checking ffff8803ea4b7c00
>[   33.836169] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.836170] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.836174] [drm:drm_atomic_commit] commiting ffff8803ea4b7c00
>[   33.836183] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b7c00
>[   33.836184] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b7c00
>[   33.845151] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b7c00
>[   33.845155] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a0c0 state to ffff8803ea4b7c00
>[   33.845157] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b7c00
>[   33.845159] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a0c0 to [CRTC:30:crtc-1]
>[   33.845160] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76a0c0
>[   33.845161] [drm:drm_atomic_check_only] checking ffff8803ea4b7c00
>[   33.845164] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.845166] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.845169] [drm:drm_atomic_commit] commiting ffff8803ea4b7c00
>[   33.845178] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b7c00
>[   33.845179] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b7c00
>[   33.846760] [drm:drm_mode_addfb2] [FB:99]
>[   33.853154] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b7c00
>[   33.853158] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a240 state to ffff8803ea4b7c00
>[   33.853160] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b7c00
>[   33.853162] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a240 to [CRTC:30:crtc-1]
>[   33.853163] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76a240
>[   33.853164] [drm:drm_atomic_check_only] checking ffff8803ea4b7c00
>[   33.853168] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.853169] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.853173] [drm:drm_atomic_commit] commiting ffff8803ea4b7c00
>[   33.853182] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b7c00
>[   33.853183] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b7c00
>[   33.860154] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b7c00
>[   33.860158] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a0c0 state to ffff8803ea4b7c00
>[   33.860160] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b7c00
>[   33.860162] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a0c0 to [CRTC:30:crtc-1]
>[   33.860163] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76a0c0
>[   33.860164] [drm:drm_atomic_check_only] checking ffff8803ea4b7c00
>[   33.860167] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.860169] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.860173] [drm:drm_atomic_commit] commiting ffff8803ea4b7c00
>[   33.860181] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b7c00
>[   33.860183] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b7c00
>[   33.863430] [drm:drm_mode_addfb2] [FB:94]
>[   33.868122] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96400
>[   33.868126] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a300 state to ffff8803fca96400
>[   33.868128] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e7800 state to ffff8803fca96400
>[   33.868130] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a300 to [CRTC:30:crtc-1]
>[   33.868131] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39a300
>[   33.868132] [drm:drm_atomic_check_only] checking ffff8803fca96400
>[   33.868136] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.868137] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.868141] [drm:drm_atomic_commit] commiting ffff8803fca96400
>[   33.868150] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96400
>[   33.868152] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96400
>[   33.876153] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b7c00
>[   33.876157] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a240 state to ffff8803ea4b7c00
>[   33.876159] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956800 state to ffff8803ea4b7c00
>[   33.876161] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a240 to [CRTC:30:crtc-1]
>[   33.876162] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76a240
>[   33.876164] [drm:drm_atomic_check_only] checking ffff8803ea4b7c00
>[   33.876167] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.876168] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.876172] [drm:drm_atomic_commit] commiting ffff8803ea4b7c00
>[   33.876180] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b7c00
>[   33.876182] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b7c00
>[   33.880098] [drm:drm_mode_addfb2] [FB:91]
>[   33.884122] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96400
>[   33.884126] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39acc0 state to ffff8803fca96400
>[   33.884128] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e2800 state to ffff8803fca96400
>[   33.884130] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39acc0 to [CRTC:30:crtc-1]
>[   33.884131] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39acc0
>[   33.884132] [drm:drm_atomic_check_only] checking ffff8803fca96400
>[   33.884136] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.884137] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.884141] [drm:drm_atomic_commit] commiting ffff8803fca96400
>[   33.884150] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96400
>[   33.884151] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96400
>[   33.892153] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b7c00
>[   33.892156] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b7c00
>[   33.892159] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950800 state to ffff8803ea4b7c00
>[   33.892160] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   33.892162] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76aa80
>[   33.892163] [drm:drm_atomic_check_only] checking ffff8803ea4b7c00
>[   33.892166] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.892168] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.892171] [drm:drm_atomic_commit] commiting ffff8803ea4b7c00
>[   33.892180] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b7c00
>[   33.892182] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b7c00
>[   33.896763] [drm:drm_mode_addfb2] [FB:99]
>[   33.900581] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96400
>[   33.900585] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a840 state to ffff8803fca96400
>[   33.900588] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e4000 state to ffff8803fca96400
>[   33.900589] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a840 to [CRTC:30:crtc-1]
>[   33.900591] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39a840
>[   33.900592] [drm:drm_atomic_check_only] checking ffff8803fca96400
>[   33.900595] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.900597] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.900601] [drm:drm_atomic_commit] commiting ffff8803fca96400
>[   33.900609] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96400
>[   33.900611] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96400
>[   33.909154] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b7c00
>[   33.909158] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a900 state to ffff8803ea4b7c00
>[   33.909161] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe957800 state to ffff8803ea4b7c00
>[   33.909162] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a900 to [CRTC:30:crtc-1]
>[   33.909163] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76a900
>[   33.909165] [drm:drm_atomic_check_only] checking ffff8803ea4b7c00
>[   33.909168] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.909169] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.909173] [drm:drm_atomic_commit] commiting ffff8803ea4b7c00
>[   33.909182] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b7c00
>[   33.909183] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b7c00
>[   33.913429] [drm:drm_mode_addfb2] [FB:94]
>[   33.917307] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96400
>[   33.917312] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a900 state to ffff8803fca96400
>[   33.917314] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e3000 state to ffff8803fca96400
>[   33.917316] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a900 to [CRTC:30:crtc-1]
>[   33.917317] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39a900
>[   33.917318] [drm:drm_atomic_check_only] checking ffff8803fca96400
>[   33.917322] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.917323] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.917327] [drm:drm_atomic_commit] commiting ffff8803fca96400
>[   33.917335] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96400
>[   33.917337] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96400
>[   33.924153] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b7c00
>[   33.924157] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a180 state to ffff8803ea4b7c00
>[   33.924160] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe954000 state to ffff8803ea4b7c00
>[   33.924161] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a180 to [CRTC:30:crtc-1]
>[   33.924163] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76a180
>[   33.924164] [drm:drm_atomic_check_only] checking ffff8803ea4b7c00
>[   33.924167] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.924169] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.924172] [drm:drm_atomic_commit] commiting ffff8803ea4b7c00
>[   33.924181] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b7c00
>[   33.924183] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b7c00
>[   33.930078] [drm:drm_mode_addfb2] [FB:91]
>[   33.932108] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96400
>[   33.932112] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39ab40 state to ffff8803fca96400
>[   33.932115] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e1800 state to ffff8803fca96400
>[   33.932116] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39ab40 to [CRTC:30:crtc-1]
>[   33.932117] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39ab40
>[   33.932119] [drm:drm_atomic_check_only] checking ffff8803fca96400
>[   33.932122] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.932123] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.932128] [drm:drm_atomic_commit] commiting ffff8803fca96400
>[   33.932136] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96400
>[   33.932138] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96400
>[   33.940141] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96400
>[   33.940145] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a300 state to ffff8803fca96400
>[   33.940147] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e6000 state to ffff8803fca96400
>[   33.940149] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a300 to [CRTC:30:crtc-1]
>[   33.940150] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39a300
>[   33.940151] [drm:drm_atomic_check_only] checking ffff8803fca96400
>[   33.940155] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.940156] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.940160] [drm:drm_atomic_commit] commiting ffff8803fca96400
>[   33.940168] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96400
>[   33.940170] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96400
>[   33.948262] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96400
>[   33.948266] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39ab40 state to ffff8803fca96400
>[   33.948269] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e1800 state to ffff8803fca96400
>[   33.948270] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39ab40 to [CRTC:30:crtc-1]
>[   33.948271] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39ab40
>[   33.948273] [drm:drm_atomic_check_only] checking ffff8803fca96400
>[   33.948276] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.948277] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.948281] [drm:drm_atomic_commit] commiting ffff8803fca96400
>[   33.948291] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96400
>[   33.948293] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96400
>[   33.948321] [drm:drm_mode_addfb2] [FB:99]
>[   33.956139] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca96400
>[   33.956143] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a300 state to ffff8803fca96400
>[   33.956145] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e6000 state to ffff8803fca96400
>[   33.956147] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a300 to [CRTC:30:crtc-1]
>[   33.956148] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39a300
>[   33.956149] [drm:drm_atomic_check_only] checking ffff8803fca96400
>[   33.956153] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.956154] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.956158] [drm:drm_atomic_commit] commiting ffff8803fca96400
>[   33.956167] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca96400
>[   33.956169] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca96400
>[   33.963428] [drm:drm_mode_addfb2] [FB:94]
>[   33.980042] [drm:drm_mode_addfb2] [FB:91]
>[   33.980091] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca94c00
>[   33.980094] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39ab40 state to ffff8803fca94c00
>[   33.980097] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e1800 state to ffff8803fca94c00
>[   33.980098] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39ab40 to [CRTC:30:crtc-1]
>[   33.980100] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39ab40
>[   33.980101] [drm:drm_atomic_check_only] checking ffff8803fca94c00
>[   33.980104] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   33.980106] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   33.980109] [drm:drm_atomic_commit] commiting ffff8803fca94c00
>[   33.980117] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca94c00
>[   33.980118] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca94c00
>[   34.045477] [drm:drm_mode_addfb2] [FB:94]
>[   34.296126] [drm:drm_mode_addfb2] [FB:91]
>[   34.546645] [drm:drm_mode_addfb2] [FB:94]
>[   34.645817] [drm:drm_mode_addfb2] [FB:91]
>[   34.797252] [drm:drm_mode_addfb2] [FB:94]
>[   34.848422] [drm:drm_mode_addfb2] [FB:91]
>[   34.945832] [drm:drm_mode_addfb2] [FB:94]
>[   35.048525] [drm:drm_mode_addfb2] [FB:91]
>[   35.112365] [drm:drm_mode_addfb2] [FB:94]
>[   35.265088] [drm:drm_mode_addfb2] [FB:91]
>[   35.298371] [drm:drm_mode_addfb2] [FB:94]
>[   35.562571] [drm:drm_mode_addfb2] [FB:91]
>[   35.813143] [drm:drm_mode_addfb2] [FB:94]
>[   35.878687] [drm:drm_mode_addfb2] [FB:91]
>[   35.896700] [drm:drm_mode_addfb2] [FB:99]
>[   35.928493] [drm:drm_mode_addfb2] [FB:91]
>[   35.962283] [drm:drm_mode_addfb2] [FB:94]
>[   35.980012] [drm:drm_mode_addfb2] [FB:99]
>[   36.009428] [drm:drm_mode_addfb2] [FB:91]
>[   36.045261] [drm:drm_mode_addfb2] [FB:94]
>[   36.063354] [drm:drm_mode_addfb2] [FB:99]
>[   36.080012] [drm:drm_mode_addfb2] [FB:91]
>[   36.111928] [drm:drm_mode_addfb2] [FB:94]
>[   36.145208] [drm:drm_mode_addfb2] [FB:91]
>[   36.163305] [drm:drm_mode_addfb2] [FB:99]
>[   36.192444] [drm:drm_mode_addfb2] [FB:91]
>[   36.228501] [drm:drm_mode_addfb2] [FB:94]
>[   36.261832] [drm:drm_mode_addfb2] [FB:91]
>[   36.295519] [drm:drm_mode_addfb2] [FB:94]
>[   36.313342] [drm:drm_mode_addfb2] [FB:99]
>[   36.329966] [drm:drm_mode_addfb2] [FB:91]
>[   36.346722] [drm:drm_mode_addfb2] [FB:94]
>[   36.377737] [drm:drm_mode_addfb2] [FB:91]
>[   36.412178] [drm:drm_mode_addfb2] [FB:94]
>[   36.445293] [drm:drm_mode_addfb2] [FB:91]
>[   36.478513] [drm:drm_mode_addfb2] [FB:94]
>[   36.511840] [drm:drm_mode_addfb2] [FB:91]
>[   36.531264] [drm:drm_mode_addfb2] [FB:94]
>[   36.549043] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   36.549047] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a600 state to ffff8803fca95000
>[   36.549050] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e1000 state to ffff8803fca95000
>[   36.549052] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a600 to [CRTC:30:crtc-1]
>[   36.549054] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39a600
>[   36.549055] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   36.549059] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   36.549061] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.549066] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   36.549079] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   36.549080] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   36.557051] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   36.557055] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a9c0 state to ffff8803fca95000
>[   36.557057] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e1800 state to ffff8803fca95000
>[   36.557059] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a9c0 to [CRTC:30:crtc-1]
>[   36.557060] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39a9c0
>[   36.557061] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   36.557064] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   36.557066] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.557070] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   36.557080] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   36.557082] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   36.562394] [drm:drm_mode_addfb2] [FB:91]
>[   36.565062] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   36.565069] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628780 state to ffff8803ec87a400
>[   36.565075] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f3800 state to ffff8803ec87a400
>[   36.565078] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628780 to [CRTC:30:crtc-1]
>[   36.565079] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ea628780
>[   36.565081] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   36.565090] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   36.565091] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.565099] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   36.565115] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   36.565117] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   36.573084] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fcba6000
>[   36.573088] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800d4f279c0 state to ffff8803fcba6000
>[   36.573091] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d4dcd000 state to ffff8803fcba6000
>[   36.573093] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d4f279c0 to [CRTC:30:crtc-1]
>[   36.573094] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800d4f279c0
>[   36.573095] [drm:drm_atomic_check_only] checking ffff8803fcba6000
>[   36.573100] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   36.573102] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.573107] [drm:drm_atomic_commit] commiting ffff8803fcba6000
>[   36.573119] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fcba6000
>[   36.573121] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fcba6000
>[   36.580086] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   36.580091] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a600 state to ffff8803fca95000
>[   36.580094] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e1000 state to ffff8803fca95000
>[   36.580095] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a600 to [CRTC:30:crtc-1]
>[   36.580097] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39a600
>[   36.580098] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   36.580103] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   36.580104] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.580109] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   36.580123] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   36.580125] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   36.580180] [drm:drm_mode_addfb2] [FB:99]
>[   36.588152] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   36.588158] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a180 state to ffff8803ea4b0800
>[   36.588161] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b0800
>[   36.588163] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a180 to [CRTC:30:crtc-1]
>[   36.588164] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76a180
>[   36.588166] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   36.588171] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   36.588173] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.588178] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   36.588192] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   36.588194] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   36.596632] [drm:drm_mode_addfb2] [FB:94]
>[   36.597030] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   36.597034] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea6280c0 state to ffff8803ec87a400
>[   36.597037] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f3000 state to ffff8803ec87a400
>[   36.597039] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea6280c0 to [CRTC:30:crtc-1]
>[   36.597040] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ea6280c0
>[   36.597041] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   36.597046] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   36.597047] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.597051] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   36.597061] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   36.597063] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   36.605014] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   36.605018] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628180 state to ffff8803ec87a400
>[   36.605020] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f4000 state to ffff8803ec87a400
>[   36.605022] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628180 to [CRTC:30:crtc-1]
>[   36.605023] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ea628180
>[   36.605024] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   36.605027] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   36.605029] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.605033] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   36.605041] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   36.605043] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   36.613018] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   36.613022] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea6280c0 state to ffff8803ec87a400
>[   36.613024] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f3000 state to ffff8803ec87a400
>[   36.613026] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea6280c0 to [CRTC:30:crtc-1]
>[   36.613027] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ea6280c0
>[   36.613028] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   36.613031] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   36.613033] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.613037] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   36.613045] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   36.613047] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   36.621054] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   36.621058] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628180 state to ffff8803ec87a400
>[   36.621061] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f4000 state to ffff8803ec87a400
>[   36.621063] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628180 to [CRTC:30:crtc-1]
>[   36.621065] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ea628180
>[   36.621066] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   36.621071] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   36.621073] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.621078] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   36.621096] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   36.621098] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   36.628709] [drm:drm_mode_addfb2] [FB:91]
>[   36.629021] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   36.629027] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a840 state to ffff8803ea4b0800
>[   36.629030] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe952000 state to ffff8803ea4b0800
>[   36.629032] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a840 to [CRTC:30:crtc-1]
>[   36.629034] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76a840
>[   36.629036] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   36.629053] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   36.629054] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.629058] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   36.629067] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   36.629069] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   36.637017] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   36.637021] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a540 state to ffff8803ea4b0800
>[   36.637024] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe955000 state to ffff8803ea4b0800
>[   36.637025] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a540 to [CRTC:30:crtc-1]
>[   36.637026] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76a540
>[   36.637028] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   36.637031] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   36.637032] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.637036] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   36.637044] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   36.637046] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   36.644017] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   36.644022] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a600 state to ffff8803fca95000
>[   36.644024] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e6000 state to ffff8803fca95000
>[   36.644026] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a600 to [CRTC:30:crtc-1]
>[   36.644027] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39a600
>[   36.644028] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   36.644031] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   36.644033] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.644036] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   36.644045] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   36.644047] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   36.652063] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   36.652068] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a9c0 state to ffff8803fca95000
>[   36.652071] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e1000 state to ffff8803fca95000
>[   36.652072] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a9c0 to [CRTC:30:crtc-1]
>[   36.652073] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ef39a9c0
>[   36.652074] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   36.652079] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   36.652080] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.652084] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   36.652099] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   36.652101] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   36.661028] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   36.661032] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628240 state to ffff8803ec87a400
>[   36.661035] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f3000 state to ffff8803ec87a400
>[   36.661036] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628240 to [CRTC:30:crtc-1]
>[   36.661037] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ea628240
>[   36.661039] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   36.661042] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   36.661043] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.661047] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   36.661059] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   36.661061] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   36.661958] [drm:drm_mode_addfb2] [FB:94]
>[   36.668997] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   36.669000] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea6283c0 state to ffff8803ec87a400
>[   36.669002] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f1800 state to ffff8803ec87a400
>[   36.669004] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea6283c0 to [CRTC:30:crtc-1]
>[   36.669005] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ea6283c0
>[   36.669007] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   36.669010] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   36.669011] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.669015] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   36.669023] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   36.669025] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   36.677150] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   36.677156] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a840 state to ffff8803ea4b0800
>[   36.677159] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe952000 state to ffff8803ea4b0800
>[   36.677161] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a840 to [CRTC:30:crtc-1]
>[   36.677162] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8800cd76a840
>[   36.677164] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   36.677169] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   36.677171] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.677176] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   36.677190] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   36.677193] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   36.685030] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   36.685036] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628240 state to ffff8803ec87a400
>[   36.685039] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f3000 state to ffff8803ec87a400
>[   36.685041] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628240 to [CRTC:30:crtc-1]
>[   36.685042] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ea628240
>[   36.685043] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   36.685048] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   36.685050] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.685055] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   36.685068] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   36.685070] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   36.693026] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   36.693030] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ea628480 state to ffff8803ec87a400
>[   36.693033] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f2800 state to ffff8803ec87a400
>[   36.693034] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628480 to [CRTC:26:crtc-0]
>[   36.693035] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ea628480
>[   36.693037] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   36.693040] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 91
>[   36.693041] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 0 -> 1, off 0, on 1, ms 0
>[   36.693045] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   36.693057] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   36.693059] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   36.693062] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   36.693064] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628540 state to ffff8803ec87a400
>[   36.693065] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f5800 state to ffff8803ec87a400
>[   36.693067] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628540 to [CRTC:30:crtc-1]
>[   36.693068] [drm:drm_atomic_set_fb_for_plane] Set [FB:75] for plane state ffff8803ea628540
>[   36.693069] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   36.693071] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 75
>[   36.693072] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.693075] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   36.693081] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   36.693083] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   36.694023] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   36.694027] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803fea3b0c0 state to ffff8803e3890800
>[   36.694029] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff880400a51800 state to ffff8803e3890800
>[   36.694031] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b0c0 to [CRTC:26:crtc-0]
>[   36.694032] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b0c0
>[   36.694033] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   36.694036] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   36.694038] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   36.694042] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   36.694052] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   36.694054] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   36.694431] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   36.694433] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b000 state to ffff8803e3890800
>[   36.694435] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a57800 state to ffff8803e3890800
>[   36.694436] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b000 to [CRTC:30:crtc-1]
>[   36.694437] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803fea3b000
>[   36.694438] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   36.694441] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   36.694442] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.694445] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   36.694452] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   36.694454] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   36.694457] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   36.694459] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803fea3bf00 state to ffff8803e3890800
>[   36.694461] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff880400a50000 state to ffff8803e3890800
>[   36.694462] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3bf00 to [CRTC:26:crtc-0]
>[   36.694463] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3bf00
>[   36.694464] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   36.694466] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   36.694467] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   36.694469] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   36.694476] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   36.694477] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   36.694480] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   36.694481] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b0c0 state to ffff8803e3890800
>[   36.694483] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a51800 state to ffff8803e3890800
>[   36.694484] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b0c0 to [CRTC:30:crtc-1]
>[   36.694485] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803fea3b0c0
>[   36.694486] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   36.694487] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   36.694489] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.694491] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   36.694496] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   36.694498] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   36.695306] [drm:drm_mode_addfb2] [FB:75]
>[   36.701026] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   36.701030] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ef39ad80 state to ffff8803fca95000
>[   36.701033] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e6000 state to ffff8803fca95000
>[   36.701034] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39ad80 to [CRTC:26:crtc-0]
>[   36.701036] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39ad80
>[   36.701037] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   36.701040] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   36.701042] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   36.701046] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   36.701055] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   36.701056] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   36.701060] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   36.701062] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39acc0 state to ffff8803fca95000
>[   36.701063] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e1800 state to ffff8803fca95000
>[   36.701065] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39acc0 to [CRTC:30:crtc-1]
>[   36.701066] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ef39acc0
>[   36.701067] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   36.701069] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   36.701070] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.701073] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   36.701077] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   36.701078] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   36.708147] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   36.708153] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803fea3b000 state to ffff8803e3890800
>[   36.708156] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff880400a57800 state to ffff8803e3890800
>[   36.708157] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b000 to [CRTC:26:crtc-0]
>[   36.708159] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b000
>[   36.708160] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   36.708166] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   36.708167] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   36.708172] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   36.708190] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   36.708192] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   36.708196] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   36.708198] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b600 state to ffff8803e3890800
>[   36.708200] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a52800 state to ffff8803e3890800
>[   36.708201] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b600 to [CRTC:30:crtc-1]
>[   36.708202] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803fea3b600
>[   36.708203] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   36.708205] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   36.708207] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.708209] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   36.708214] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   36.708216] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   36.717014] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   36.717018] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ea628240 state to ffff8803ec87a400
>[   36.717020] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f3000 state to ffff8803ec87a400
>[   36.717022] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628240 to [CRTC:26:crtc-0]
>[   36.717023] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ea628240
>[   36.717025] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   36.717028] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   36.717029] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   36.717033] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   36.717045] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   36.717047] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   36.717050] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   36.717052] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628600 state to ffff8803ec87a400
>[   36.717054] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f2000 state to ffff8803ec87a400
>[   36.717055] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628600 to [CRTC:30:crtc-1]
>[   36.717056] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ea628600
>[   36.717057] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   36.717060] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   36.717061] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.717063] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   36.717070] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   36.717072] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   36.724997] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   36.725000] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ea6286c0 state to ffff8803ec87a400
>[   36.725002] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f7000 state to ffff8803ec87a400
>[   36.725004] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea6286c0 to [CRTC:26:crtc-0]
>[   36.725005] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ea6286c0
>[   36.725006] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   36.725009] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   36.725010] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   36.725014] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   36.725024] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   36.725025] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   36.725028] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   36.725030] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628240 state to ffff8803ec87a400
>[   36.725031] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f3000 state to ffff8803ec87a400
>[   36.725033] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628240 to [CRTC:30:crtc-1]
>[   36.725034] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ea628240
>[   36.725035] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   36.725037] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   36.725038] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.725040] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   36.725047] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   36.725048] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   36.728911] [drm:drm_mode_addfb2] [FB:94]
>[   36.733021] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   36.733025] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803fea3b480 state to ffff8803e3890800
>[   36.733027] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff880400a55000 state to ffff8803e3890800
>[   36.733028] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b480 to [CRTC:26:crtc-0]
>[   36.733030] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b480
>[   36.733031] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   36.733034] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   36.733036] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   36.733039] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   36.733048] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   36.733050] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   36.733053] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   36.733054] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b180 state to ffff8803e3890800
>[   36.733056] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a57000 state to ffff8803e3890800
>[   36.733058] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b180 to [CRTC:30:crtc-1]
>[   36.733059] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803fea3b180
>[   36.733060] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   36.733062] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   36.733063] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.733065] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   36.733070] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   36.733071] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   36.741144] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   36.741149] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76ab40 state to ffff8803ea4b0800
>[   36.741153] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953000 state to ffff8803ea4b0800
>[   36.741154] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ab40 to [CRTC:26:crtc-0]
>[   36.741156] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76ab40
>[   36.741157] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   36.741163] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   36.741164] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   36.741170] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   36.741187] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   36.741189] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   36.741194] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   36.741195] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a0c0 state to ffff8803ea4b0800
>[   36.741198] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950000 state to ffff8803ea4b0800
>[   36.741199] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a0c0 to [CRTC:30:crtc-1]
>[   36.741200] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8800cd76a0c0
>[   36.741201] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   36.741203] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   36.741204] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.741207] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   36.741212] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   36.741213] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   36.746629] [drm:drm_mode_addfb2] [FB:106]
>[   36.749008] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   36.749012] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ea628600 state to ffff8803ec87a400
>[   36.749015] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f2000 state to ffff8803ec87a400
>[   36.749017] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628600 to [CRTC:26:crtc-0]
>[   36.749018] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ea628600
>[   36.749019] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   36.749022] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   36.749024] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   36.749028] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   36.749036] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   36.749038] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   36.749042] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   36.749044] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628840 state to ffff8803ec87a400
>[   36.749046] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f3000 state to ffff8803ec87a400
>[   36.749047] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628840 to [CRTC:30:crtc-1]
>[   36.749048] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ea628840
>[   36.749049] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   36.749052] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   36.749053] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.749056] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   36.749060] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   36.749062] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   36.757012] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   36.757016] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ea628900 state to ffff8803ec87a400
>[   36.757018] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f7000 state to ffff8803ec87a400
>[   36.757020] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628900 to [CRTC:26:crtc-0]
>[   36.757021] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ea628900
>[   36.757022] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   36.757026] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   36.757027] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   36.757031] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   36.757042] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   36.757043] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   36.757047] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   36.757048] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628600 state to ffff8803ec87a400
>[   36.757050] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f2000 state to ffff8803ec87a400
>[   36.757051] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628600 to [CRTC:30:crtc-1]
>[   36.757052] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ea628600
>[   36.757053] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   36.757055] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   36.757057] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.757059] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   36.757064] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   36.757065] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   36.764146] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   36.764151] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ea628840 state to ffff8803ec87a400
>[   36.764155] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f3000 state to ffff8803ec87a400
>[   36.764156] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628840 to [CRTC:26:crtc-0]
>[   36.764158] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ea628840
>[   36.764160] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   36.764165] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   36.764166] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   36.764171] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   36.764189] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   36.764191] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   36.764195] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   36.764196] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628900 state to ffff8803ec87a400
>[   36.764199] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f7000 state to ffff8803ec87a400
>[   36.764200] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628900 to [CRTC:30:crtc-1]
>[   36.764201] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ea628900
>[   36.764202] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   36.764204] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   36.764206] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.764208] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   36.764215] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   36.764216] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   36.772145] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   36.772151] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ea628600 state to ffff8803ec87a400
>[   36.772154] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f2000 state to ffff8803ec87a400
>[   36.772155] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628600 to [CRTC:26:crtc-0]
>[   36.772157] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ea628600
>[   36.772158] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   36.772163] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   36.772165] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   36.772171] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   36.772188] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   36.772190] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   36.772193] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   36.772195] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628840 state to ffff8803ec87a400
>[   36.772197] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f3000 state to ffff8803ec87a400
>[   36.772199] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628840 to [CRTC:30:crtc-1]
>[   36.772200] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ea628840
>[   36.772201] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   36.772203] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   36.772204] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.772207] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   36.772214] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   36.772215] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   36.777388] [drm:drm_mode_addfb2] [FB:75]
>[   36.781010] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ef006000
>[   36.781013] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8804017dcf00 state to ffff8803ef006000
>[   36.781016] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d96bc000 state to ffff8803ef006000
>[   36.781017] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804017dcf00 to [CRTC:26:crtc-0]
>[   36.781019] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8804017dcf00
>[   36.781020] [drm:drm_atomic_check_only] checking ffff8803ef006000
>[   36.781023] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   36.781025] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   36.781029] [drm:drm_atomic_commit] commiting ffff8803ef006000
>[   36.781037] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ef006000
>[   36.781039] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ef006000
>[   36.781042] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ef006000
>[   36.781044] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8804017dc240 state to ffff8803ef006000
>[   36.781046] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d96bf800 state to ffff8803ef006000
>[   36.781047] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804017dc240 to [CRTC:30:crtc-1]
>[   36.781048] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8804017dc240
>[   36.781049] [drm:drm_atomic_check_only] checking ffff8803ef006000
>[   36.781052] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   36.781053] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.781055] [drm:drm_atomic_commit] commiting ffff8803ef006000
>[   36.781063] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ef006000
>[   36.781064] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ef006000
>[   36.788998] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ef006000
>[   36.789001] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8804017dcc00 state to ffff8803ef006000
>[   36.789003] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d96be800 state to ffff8803ef006000
>[   36.789004] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804017dcc00 to [CRTC:26:crtc-0]
>[   36.789005] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8804017dcc00
>[   36.789007] [drm:drm_atomic_check_only] checking ffff8803ef006000
>[   36.789009] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   36.789011] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   36.789014] [drm:drm_atomic_commit] commiting ffff8803ef006000
>[   36.789021] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ef006000
>[   36.789023] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ef006000
>[   36.789026] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ef006000
>[   36.789027] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8804017dcf00 state to ffff8803ef006000
>[   36.789029] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d96bc000 state to ffff8803ef006000
>[   36.789030] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804017dcf00 to [CRTC:30:crtc-1]
>[   36.789031] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8804017dcf00
>[   36.789032] [drm:drm_atomic_check_only] checking ffff8803ef006000
>[   36.789034] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   36.789035] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.789037] [drm:drm_atomic_commit] commiting ffff8803ef006000
>[   36.789044] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ef006000
>[   36.789045] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ef006000
>[   36.797020] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   36.797024] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ef39a540 state to ffff8803fca95000
>[   36.797026] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e5000 state to ffff8803fca95000
>[   36.797028] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a540 to [CRTC:26:crtc-0]
>[   36.797029] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39a540
>[   36.797030] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   36.797033] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   36.797035] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   36.797039] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   36.797050] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   36.797052] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   36.797055] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   36.797057] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39ac00 state to ffff8803fca95000
>[   36.797058] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e5800 state to ffff8803fca95000
>[   36.797060] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39ac00 to [CRTC:30:crtc-1]
>[   36.797061] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ef39ac00
>[   36.797062] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   36.797064] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   36.797065] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.797067] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   36.797074] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   36.797075] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   36.805008] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   36.805011] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a240 state to ffff8803ea4b0800
>[   36.805013] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe950000 state to ffff8803ea4b0800
>[   36.805014] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a240 to [CRTC:26:crtc-0]
>[   36.805015] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a240
>[   36.805016] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   36.805019] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   36.805020] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   36.805023] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   36.805031] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   36.805033] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   36.805035] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   36.805037] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76af00 state to ffff8803ea4b0800
>[   36.805038] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b0800
>[   36.805039] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76af00 to [CRTC:30:crtc-1]
>[   36.805040] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8800cd76af00
>[   36.805041] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   36.805042] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   36.805043] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.805045] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   36.805050] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   36.805051] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   36.811950] [drm:drm_mode_addfb2] [FB:94]
>[   36.812996] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fcba6000
>[   36.812999] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800d4f27cc0 state to ffff8803fcba6000
>[   36.813001] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d4dcf800 state to ffff8803fcba6000
>[   36.813003] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d4f27cc0 to [CRTC:26:crtc-0]
>[   36.813004] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800d4f27cc0
>[   36.813005] [drm:drm_atomic_check_only] checking ffff8803fcba6000
>[   36.813009] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   36.813011] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   36.813014] [drm:drm_atomic_commit] commiting ffff8803fcba6000
>[   36.813022] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fcba6000
>[   36.813024] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fcba6000
>[   36.813027] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fcba6000
>[   36.813029] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800d4f27d80 state to ffff8803fcba6000
>[   36.813031] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d4dcb800 state to ffff8803fcba6000
>[   36.813032] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d4f27d80 to [CRTC:30:crtc-1]
>[   36.813033] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8800d4f27d80
>[   36.813034] [drm:drm_atomic_check_only] checking ffff8803fcba6000
>[   36.813037] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   36.813038] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   36.813040] [drm:drm_atomic_commit] commiting ffff8803fcba6000
>[   36.813046] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fcba6000
>[   36.813047] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fcba6000
>[   36.845397] [drm:drm_mode_addfb2] [FB:75]
>[   36.878645] [drm:drm_mode_addfb2] [FB:94]
>[   36.911931] [drm:drm_mode_addfb2] [FB:75]
>[   36.931002] [drm:drm_mode_addfb2] [FB:94]
>[   36.961685] [drm:drm_mode_addfb2] [FB:75]
>[   36.992503] [drm:drm_mode_addfb2] [FB:94]
>[   37.028577] [drm:drm_mode_addfb2] [FB:75]
>[   37.044027] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.044032] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ea628900 state to ffff8803ec87a400
>[   37.044035] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f7000 state to ffff8803ec87a400
>[   37.044037] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628900 to [CRTC:26:crtc-0]
>[   37.044038] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ea628900
>[   37.044040] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.044044] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.044046] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.044051] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.044064] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.044066] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.044070] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.044071] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628cc0 state to ffff8803ec87a400
>[   37.044073] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f5800 state to ffff8803ec87a400
>[   37.044075] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628cc0 to [CRTC:30:crtc-1]
>[   37.044076] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ea628cc0
>[   37.044077] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.044079] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.044080] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.044083] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.044087] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.044089] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.052005] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.052008] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a240 state to ffff8803ea4b0800
>[   37.052010] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953800 state to ffff8803ea4b0800
>[   37.052012] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a240 to [CRTC:26:crtc-0]
>[   37.052013] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a240
>[   37.052014] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.052016] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.052018] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.052021] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.052030] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.052032] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.052035] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.052037] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76ac00 state to ffff8803ea4b0800
>[   37.052038] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe952000 state to ffff8803ea4b0800
>[   37.052039] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ac00 to [CRTC:30:crtc-1]
>[   37.052040] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8800cd76ac00
>[   37.052041] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.052043] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.052044] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.052046] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.052052] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.052053] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.061009] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.061013] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a6c0 state to ffff8803ea4b0800
>[   37.061015] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe955000 state to ffff8803ea4b0800
>[   37.061017] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a6c0 to [CRTC:26:crtc-0]
>[   37.061018] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a6c0
>[   37.061019] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.061023] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.061024] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.061028] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.061040] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.061041] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.061045] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.061046] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a240 state to ffff8803ea4b0800
>[   37.061048] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953800 state to ffff8803ea4b0800
>[   37.061049] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a240 to [CRTC:30:crtc-1]
>[   37.061051] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8800cd76a240
>[   37.061052] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.061053] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.061055] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.061057] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.061064] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.061065] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.062117] [drm:drm_mode_addfb2] [FB:94]
>[   37.069007] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.069011] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76ac00 state to ffff8803ea4b0800
>[   37.069013] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe952000 state to ffff8803ea4b0800
>[   37.069014] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ac00 to [CRTC:26:crtc-0]
>[   37.069016] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76ac00
>[   37.069017] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.069020] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.069022] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.069026] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.069034] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.069036] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.069039] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.069041] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a6c0 state to ffff8803ea4b0800
>[   37.069043] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe955000 state to ffff8803ea4b0800
>[   37.069044] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a6c0 to [CRTC:30:crtc-1]
>[   37.069045] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8800cd76a6c0
>[   37.069046] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.069048] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.069049] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.069052] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.069056] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.069058] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.077133] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   37.077138] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803fea3b840 state to ffff8803e3890800
>[   37.077142] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff880400a53000 state to ffff8803e3890800
>[   37.077143] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b840 to [CRTC:26:crtc-0]
>[   37.077145] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b840
>[   37.077147] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   37.077152] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.077154] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.077159] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   37.077176] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   37.077178] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   37.077182] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   37.077184] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3be40 state to ffff8803e3890800
>[   37.077186] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a54800 state to ffff8803e3890800
>[   37.077188] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3be40 to [CRTC:30:crtc-1]
>[   37.077189] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803fea3be40
>[   37.077190] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   37.077192] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.077193] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.077196] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   37.077200] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   37.077202] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   37.085026] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.085031] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ef39af00 state to ffff8803fca95000
>[   37.085034] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e3000 state to ffff8803fca95000
>[   37.085036] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39af00 to [CRTC:26:crtc-0]
>[   37.085037] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39af00
>[   37.085039] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.085043] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.085045] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.085050] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.085063] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.085065] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.085069] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.085071] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a000 state to ffff8803fca95000
>[   37.085073] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e4000 state to ffff8803fca95000
>[   37.085075] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a000 to [CRTC:30:crtc-1]
>[   37.085076] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ef39a000
>[   37.085077] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.085079] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.085080] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.085082] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.085089] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.085091] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.093004] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.093008] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ef39aa80 state to ffff8803fca95000
>[   37.093010] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e2800 state to ffff8803fca95000
>[   37.093012] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39aa80 to [CRTC:26:crtc-0]
>[   37.093013] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39aa80
>[   37.093014] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.093017] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.093019] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.093023] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.093034] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.093035] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.093039] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.093040] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39af00 state to ffff8803fca95000
>[   37.093042] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e3000 state to ffff8803fca95000
>[   37.093043] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39af00 to [CRTC:30:crtc-1]
>[   37.093044] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ef39af00
>[   37.093046] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.093047] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.093049] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.093051] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.093057] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.093059] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.095534] [drm:drm_mode_addfb2] [FB:75]
>[   37.101006] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.101009] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ef39a000 state to ffff8803fca95000
>[   37.101012] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e4000 state to ffff8803fca95000
>[   37.101013] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a000 to [CRTC:26:crtc-0]
>[   37.101014] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39a000
>[   37.101016] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.101019] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.101020] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.101024] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.101033] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.101035] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.101038] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.101039] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39aa80 state to ffff8803fca95000
>[   37.101041] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e2800 state to ffff8803fca95000
>[   37.101042] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39aa80 to [CRTC:30:crtc-1]
>[   37.101044] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ef39aa80
>[   37.101045] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.101046] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.101048] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.101050] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.101055] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.101056] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.108000] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.108003] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a240 state to ffff8803ea4b0800
>[   37.108006] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953800 state to ffff8803ea4b0800
>[   37.108008] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a240 to [CRTC:26:crtc-0]
>[   37.108009] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a240
>[   37.108010] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.108013] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.108015] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.108018] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.108029] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.108031] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.108034] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.108036] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76ab40 state to ffff8803ea4b0800
>[   37.108037] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b0800
>[   37.108039] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ab40 to [CRTC:30:crtc-1]
>[   37.108040] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8800cd76ab40
>[   37.108041] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.108043] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.108044] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.108047] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.108051] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.108052] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.114776] [drm:drm_mode_addfb2] [FB:94]
>[   37.124994] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.124998] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a000 state to ffff8803ea4b0800
>[   37.125001] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe950800 state to ffff8803ea4b0800
>[   37.125002] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:26:crtc-0]
>[   37.125003] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a000
>[   37.125005] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.125008] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.125010] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.125014] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.125025] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.125027] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.125031] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.125032] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a240 state to ffff8803ea4b0800
>[   37.125034] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953800 state to ffff8803ea4b0800
>[   37.125035] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a240 to [CRTC:30:crtc-1]
>[   37.125037] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8800cd76a240
>[   37.125038] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.125040] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.125041] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.125043] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.125048] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.125049] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.133130] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.133136] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76ab40 state to ffff8803ea4b0800
>[   37.133139] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe956000 state to ffff8803ea4b0800
>[   37.133141] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ab40 to [CRTC:26:crtc-0]
>[   37.133142] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76ab40
>[   37.133143] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.133148] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.133150] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.133155] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.133172] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.133174] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.133178] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.133180] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b0800
>[   37.133182] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950800 state to ffff8803ea4b0800
>[   37.133183] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   37.133185] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8800cd76a000
>[   37.133186] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.133188] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.133189] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.133191] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.133198] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.133199] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.141061] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.141066] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a240 state to ffff8803ea4b0800
>[   37.141069] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953800 state to ffff8803ea4b0800
>[   37.141071] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a240 to [CRTC:26:crtc-0]
>[   37.141072] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a240
>[   37.141074] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.141079] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.141081] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.141086] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.141103] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.141106] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.141110] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.141112] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76ab40 state to ffff8803ea4b0800
>[   37.141114] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b0800
>[   37.141116] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ab40 to [CRTC:30:crtc-1]
>[   37.141117] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8800cd76ab40
>[   37.141118] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.141120] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.141122] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.141124] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.141131] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.141133] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.145534] [drm:drm_mode_addfb2] [FB:75]
>[   37.148995] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.148998] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ef39a3c0 state to ffff8803fca95000
>[   37.149001] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e3000 state to ffff8803fca95000
>[   37.149002] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a3c0 to [CRTC:26:crtc-0]
>[   37.149004] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39a3c0
>[   37.149005] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.149008] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.149010] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.149014] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.149022] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.149023] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.149027] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.149029] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39ae40 state to ffff8803fca95000
>[   37.149030] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e7800 state to ffff8803fca95000
>[   37.149032] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39ae40 to [CRTC:30:crtc-1]
>[   37.149033] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ef39ae40
>[   37.149034] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.149036] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.149037] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.149040] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.149045] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.149046] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.156002] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.156006] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a000 state to ffff8803ea4b0800
>[   37.156008] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe950800 state to ffff8803ea4b0800
>[   37.156010] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:26:crtc-0]
>[   37.156011] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a000
>[   37.156012] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.156015] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.156017] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.156021] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.156031] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.156033] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.156036] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.156038] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a840 state to ffff8803ea4b0800
>[   37.156040] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe957800 state to ffff8803ea4b0800
>[   37.156041] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a840 to [CRTC:30:crtc-1]
>[   37.156042] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8800cd76a840
>[   37.156044] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.156045] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.156047] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.156049] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.156054] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.156055] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.164008] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   37.164012] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803fea3bc00 state to ffff8803e3890800
>[   37.164014] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff880400a54800 state to ffff8803e3890800
>[   37.164016] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3bc00 to [CRTC:26:crtc-0]
>[   37.164017] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3bc00
>[   37.164018] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   37.164021] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.164023] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.164027] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   37.164038] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   37.164039] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   37.164043] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   37.164044] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b6c0 state to ffff8803e3890800
>[   37.164046] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a53000 state to ffff8803e3890800
>[   37.164048] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b6c0 to [CRTC:30:crtc-1]
>[   37.164049] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803fea3b6c0
>[   37.164050] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   37.164052] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.164053] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.164055] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   37.164062] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   37.164063] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   37.173000] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   37.173002] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803fea3b300 state to ffff8803e3890800
>[   37.173004] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff880400a57000 state to ffff8803e3890800
>[   37.173005] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b300 to [CRTC:26:crtc-0]
>[   37.173006] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b300
>[   37.173007] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   37.173010] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.173011] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.173014] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   37.173022] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   37.173023] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   37.173026] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   37.173027] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3bc00 state to ffff8803e3890800
>[   37.173028] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a54800 state to ffff8803e3890800
>[   37.173029] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3bc00 to [CRTC:30:crtc-1]
>[   37.173030] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803fea3bc00
>[   37.173031] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   37.173032] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.173033] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.173035] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   37.173040] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   37.173041] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   37.176223] [drm:drm_mode_addfb2] [FB:94]
>[   37.181002] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.181006] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ef39a6c0 state to ffff8803fca95000
>[   37.181008] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e0800 state to ffff8803fca95000
>[   37.181010] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a6c0 to [CRTC:26:crtc-0]
>[   37.181011] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39a6c0
>[   37.181012] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.181016] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.181017] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.181021] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.181029] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.181031] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.181035] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.181036] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a180 state to ffff8803fca95000
>[   37.181038] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e3800 state to ffff8803fca95000
>[   37.181039] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a180 to [CRTC:30:crtc-1]
>[   37.181041] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ef39a180
>[   37.181042] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.181044] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.181045] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.181047] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.181055] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.181056] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.188993] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.188997] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ef39ae40 state to ffff8803fca95000
>[   37.188999] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e4800 state to ffff8803fca95000
>[   37.189001] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39ae40 to [CRTC:26:crtc-0]
>[   37.189002] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39ae40
>[   37.189003] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.189006] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.189008] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.189011] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.189137] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.189139] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.189144] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.189146] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a6c0 state to ffff8803fca95000
>[   37.189147] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e0800 state to ffff8803fca95000
>[   37.189149] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a6c0 to [CRTC:30:crtc-1]
>[   37.189150] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ef39a6c0
>[   37.189151] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.189153] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.189155] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.189157] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.189164] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.189166] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.197129] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.197134] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a180 state to ffff8803ea4b0800
>[   37.197138] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe954000 state to ffff8803ea4b0800
>[   37.197139] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a180 to [CRTC:26:crtc-0]
>[   37.197141] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a180
>[   37.197142] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.197147] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.197149] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.197154] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.197171] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.197173] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.197177] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.197179] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a540 state to ffff8803ea4b0800
>[   37.197181] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe952800 state to ffff8803ea4b0800
>[   37.197182] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a540 to [CRTC:30:crtc-1]
>[   37.197183] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8800cd76a540
>[   37.197184] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.197186] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.197188] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.197190] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.197197] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.197199] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.206028] [drm:drm_atomic_state_init] Allocated atomic state ffff8800d7ad1c00
>[   37.206033] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800d2dd1f00 state to ffff8800d7ad1c00
>[   37.206036] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f1b58000 state to ffff8800d7ad1c00
>[   37.206038] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d2dd1f00 to [CRTC:26:crtc-0]
>[   37.206039] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800d2dd1f00
>[   37.206041] [drm:drm_atomic_check_only] checking ffff8800d7ad1c00
>[   37.206046] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.206047] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.206052] [drm:drm_atomic_commit] commiting ffff8800d7ad1c00
>[   37.206066] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800d7ad1c00
>[   37.206068] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d7ad1c00
>[   37.206072] [drm:drm_atomic_state_init] Allocated atomic state ffff8800d7ad1c00
>[   37.206074] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800d2dd1d80 state to ffff8800d7ad1c00
>[   37.206076] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f1b59000 state to ffff8800d7ad1c00
>[   37.206077] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d2dd1d80 to [CRTC:30:crtc-1]
>[   37.206078] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8800d2dd1d80
>[   37.206079] [drm:drm_atomic_check_only] checking ffff8800d7ad1c00
>[   37.206082] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.206083] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.206085] [drm:drm_atomic_commit] commiting ffff8800d7ad1c00
>[   37.206092] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800d7ad1c00
>[   37.206094] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d7ad1c00
>[   37.211945] [drm:drm_mode_addfb2] [FB:75]
>[   37.212992] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.212996] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a300 state to ffff8803ea4b0800
>[   37.212999] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe952800 state to ffff8803ea4b0800
>[   37.213000] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a300 to [CRTC:26:crtc-0]
>[   37.213001] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a300
>[   37.213003] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.213006] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.213008] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.213012] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.213020] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.213022] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.213025] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.213027] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b0800
>[   37.213029] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe954000 state to ffff8803ea4b0800
>[   37.213030] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   37.213032] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8800cd76a000
>[   37.213033] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.213035] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.213036] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.213039] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.213044] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.213045] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.219981] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.219984] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76ab40 state to ffff8803ea4b0800
>[   37.219986] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe957800 state to ffff8803ea4b0800
>[   37.219987] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ab40 to [CRTC:26:crtc-0]
>[   37.219988] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76ab40
>[   37.219989] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.219992] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.219993] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.219997] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.220003] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.220005] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.220008] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.220009] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a300 state to ffff8803ea4b0800
>[   37.220011] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe952800 state to ffff8803ea4b0800
>[   37.220012] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a300 to [CRTC:30:crtc-1]
>[   37.220013] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8800cd76a300
>[   37.220014] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.220016] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.220017] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.220019] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.220023] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.220025] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.229128] [drm:drm_atomic_state_init] Allocated atomic state ffff8800d7ad1c00
>[   37.229134] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800d2dd1b40 state to ffff8800d7ad1c00
>[   37.229137] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f1b5a000 state to ffff8800d7ad1c00
>[   37.229138] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d2dd1b40 to [CRTC:26:crtc-0]
>[   37.229140] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800d2dd1b40
>[   37.229141] [drm:drm_atomic_check_only] checking ffff8800d7ad1c00
>[   37.229147] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.229148] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.229153] [drm:drm_atomic_commit] commiting ffff8800d7ad1c00
>[   37.229171] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800d7ad1c00
>[   37.229173] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d7ad1c00
>[   37.229178] [drm:drm_atomic_state_init] Allocated atomic state ffff8800d7ad1c00
>[   37.229179] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800d2dd1c00 state to ffff8800d7ad1c00
>[   37.229182] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f1b59800 state to ffff8800d7ad1c00
>[   37.229183] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800d2dd1c00 to [CRTC:30:crtc-1]
>[   37.229184] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8800d2dd1c00
>[   37.229185] [drm:drm_atomic_check_only] checking ffff8800d7ad1c00
>[   37.229187] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.229189] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.229191] [drm:drm_atomic_commit] commiting ffff8800d7ad1c00
>[   37.229196] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800d7ad1c00
>[   37.229198] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d7ad1c00
>[   37.237029] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.237035] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ea628e40 state to ffff8803ec87a400
>[   37.237038] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f2800 state to ffff8803ec87a400
>[   37.237039] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628e40 to [CRTC:26:crtc-0]
>[   37.237041] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ea628e40
>[   37.237042] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.237047] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.237049] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.237054] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.237069] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.237071] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.237075] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.237077] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628f00 state to ffff8803ec87a400
>[   37.237079] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f1800 state to ffff8803ec87a400
>[   37.237081] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628f00 to [CRTC:30:crtc-1]
>[   37.237082] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ea628f00
>[   37.237083] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.237085] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.237086] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.237089] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.237096] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.237097] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.244998] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.245002] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ea628d80 state to ffff8803ec87a400
>[   37.245005] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f4000 state to ffff8803ec87a400
>[   37.245006] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628d80 to [CRTC:26:crtc-0]
>[   37.245008] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ea628d80
>[   37.245009] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.245012] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.245013] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.245017] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.245028] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.245030] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.245033] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.245034] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628e40 state to ffff8803ec87a400
>[   37.245036] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f2800 state to ffff8803ec87a400
>[   37.245038] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628e40 to [CRTC:30:crtc-1]
>[   37.245039] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ea628e40
>[   37.245040] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.245042] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.245043] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.245046] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.245052] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.245054] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.245400] [drm:drm_mode_addfb2] [FB:94]
>[   37.252976] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.252979] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ea628f00 state to ffff8803ec87a400
>[   37.252981] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f1800 state to ffff8803ec87a400
>[   37.252982] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628f00 to [CRTC:26:crtc-0]
>[   37.252984] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ea628f00
>[   37.252985] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.252988] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.252989] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.252993] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.253000] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.253001] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.253004] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.253006] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628d80 state to ffff8803ec87a400
>[   37.253007] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f4000 state to ffff8803ec87a400
>[   37.253009] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628d80 to [CRTC:30:crtc-1]
>[   37.253010] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ea628d80
>[   37.253011] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.253013] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.253014] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.253016] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.253021] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.253022] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.261123] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.261129] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a000 state to ffff8803ea4b0800
>[   37.261132] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe954000 state to ffff8803ea4b0800
>[   37.261134] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:26:crtc-0]
>[   37.261135] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a000
>[   37.261137] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.261142] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.261143] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.261149] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.261166] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.261168] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.261172] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.261174] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a3c0 state to ffff8803ea4b0800
>[   37.261176] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950800 state to ffff8803ea4b0800
>[   37.261177] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:30:crtc-1]
>[   37.261178] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8800cd76a3c0
>[   37.261180] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.261181] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.261183] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.261185] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.261190] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.261191] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.269021] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.269026] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ea628e40 state to ffff8803ec87a400
>[   37.269029] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f2800 state to ffff8803ec87a400
>[   37.269030] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628e40 to [CRTC:26:crtc-0]
>[   37.269032] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ea628e40
>[   37.269033] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.269038] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.269040] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.269045] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.269058] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.269060] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.269064] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.269065] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628cc0 state to ffff8803ec87a400
>[   37.269068] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f3800 state to ffff8803ec87a400
>[   37.269069] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628cc0 to [CRTC:30:crtc-1]
>[   37.269070] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ea628cc0
>[   37.269071] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.269073] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.269074] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.269077] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.269083] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.269085] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.276997] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.277001] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ea628900 state to ffff8803ec87a400
>[   37.277004] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f4000 state to ffff8803ec87a400
>[   37.277005] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628900 to [CRTC:26:crtc-0]
>[   37.277007] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ea628900
>[   37.277008] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.277011] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.277012] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.277016] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.277027] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.277029] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.277032] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.277033] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628e40 state to ffff8803ec87a400
>[   37.277035] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f2800 state to ffff8803ec87a400
>[   37.277036] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628e40 to [CRTC:30:crtc-1]
>[   37.277037] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ea628e40
>[   37.277039] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.277040] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.277042] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.277044] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.277051] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.277052] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.278603] [drm:drm_mode_addfb2] [FB:75]
>[   37.283983] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   37.283987] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803fea3b6c0 state to ffff8803e3890800
>[   37.283989] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff880400a53000 state to ffff8803e3890800
>[   37.283991] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b6c0 to [CRTC:26:crtc-0]
>[   37.283992] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b6c0
>[   37.283993] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   37.283996] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.283998] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.284002] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   37.284009] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   37.284011] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   37.284015] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   37.284016] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b3c0 state to ffff8803e3890800
>[   37.284018] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a55000 state to ffff8803e3890800
>[   37.284020] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b3c0 to [CRTC:30:crtc-1]
>[   37.284021] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803fea3b3c0
>[   37.284022] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   37.284024] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.284025] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.284027] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   37.284032] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   37.284034] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   37.293124] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.293129] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a0c0 state to ffff8803ea4b0800
>[   37.293133] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe956000 state to ffff8803ea4b0800
>[   37.293135] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a0c0 to [CRTC:26:crtc-0]
>[   37.293136] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a0c0
>[   37.293138] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.293143] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.293144] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.293150] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.293167] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.293169] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.293173] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.293175] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a6c0 state to ffff8803ea4b0800
>[   37.293177] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953800 state to ffff8803ea4b0800
>[   37.293178] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a6c0 to [CRTC:30:crtc-1]
>[   37.293180] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8800cd76a6c0
>[   37.293181] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.293183] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.293184] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.293186] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.293191] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.293192] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.301039] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.301043] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76ac00 state to ffff8803ea4b0800
>[   37.301045] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe955000 state to ffff8803ea4b0800
>[   37.301047] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ac00 to [CRTC:26:crtc-0]
>[   37.301048] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76ac00
>[   37.301049] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.301052] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.301054] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.301058] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.301068] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.301070] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.301073] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.301075] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a0c0 state to ffff8803ea4b0800
>[   37.301077] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b0800
>[   37.301078] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a0c0 to [CRTC:30:crtc-1]
>[   37.301079] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8800cd76a0c0
>[   37.301080] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.301082] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.301084] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.301086] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.301093] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.301094] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.309126] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.309131] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76af00 state to ffff8803ea4b0800
>[   37.309135] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953800 state to ffff8803ea4b0800
>[   37.309136] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76af00 to [CRTC:26:crtc-0]
>[   37.309138] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76af00
>[   37.309139] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.309144] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.309146] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.309152] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.309169] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.309171] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.309175] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.309177] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76ac00 state to ffff8803ea4b0800
>[   37.309179] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe955000 state to ffff8803ea4b0800
>[   37.309180] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ac00 to [CRTC:30:crtc-1]
>[   37.309181] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8800cd76ac00
>[   37.309182] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.309184] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.309186] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.309188] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.309195] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.309196] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.312466] [drm:drm_mode_addfb2] [FB:94]
>[   37.317016] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.317021] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a0c0 state to ffff8803ea4b0800
>[   37.317023] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe956000 state to ffff8803ea4b0800
>[   37.317025] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a0c0 to [CRTC:26:crtc-0]
>[   37.317027] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a0c0
>[   37.317028] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.317033] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.317035] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.317040] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.317050] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.317052] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.317055] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.317057] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76af00 state to ffff8803ea4b0800
>[   37.317059] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953800 state to ffff8803ea4b0800
>[   37.317061] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76af00 to [CRTC:30:crtc-1]
>[   37.317062] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8800cd76af00
>[   37.317063] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.317065] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.317066] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.317068] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.317073] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.317074] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.325053] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.325059] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ea628cc0 state to ffff8803ec87a400
>[   37.325065] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f3800 state to ffff8803ec87a400
>[   37.325068] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628cc0 to [CRTC:26:crtc-0]
>[   37.325071] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ea628cc0
>[   37.325073] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.325080] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 99
>[   37.325083] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.325091] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.325113] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.325116] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.325122] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.325125] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628a80 state to ffff8803ec87a400
>[   37.325129] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f1800 state to ffff8803ec87a400
>[   37.325132] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628a80 to [CRTC:30:crtc-1]
>[   37.325134] [drm:drm_atomic_set_fb_for_plane] Set [FB:91] for plane state ffff8803ea628a80
>[   37.325136] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.325139] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 91
>[   37.325142] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.325146] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.325153] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.325156] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.329580] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.329584] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ef39aa80 state to ffff8803fca95000
>[   37.329586] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e3800 state to ffff8803fca95000
>[   37.329588] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39aa80 to [CRTC:26:crtc-0]
>[   37.329589] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8803ef39aa80
>[   37.329590] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.329593] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 106
>[   37.329595] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.329599] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.329609] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.329611] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.329988] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.329990] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a000 state to ffff8803fca95000
>[   37.329992] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e2000 state to ffff8803fca95000
>[   37.329993] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a000 to [CRTC:30:crtc-1]
>[   37.329994] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39a000
>[   37.329995] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.329997] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   37.329999] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.330001] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.330009] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.330010] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.330014] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.330015] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ef39a780 state to ffff8803fca95000
>[   37.330017] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e7000 state to ffff8803fca95000
>[   37.330018] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a780 to [CRTC:26:crtc-0]
>[   37.330019] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8803ef39a780
>[   37.330020] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.330022] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 106
>[   37.330023] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.330025] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.330031] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.330033] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.330035] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.330037] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39aa80 state to ffff8803fca95000
>[   37.330038] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e3800 state to ffff8803fca95000
>[   37.330040] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39aa80 to [CRTC:30:crtc-1]
>[   37.330041] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39aa80
>[   37.330042] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.330043] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   37.330044] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.330046] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.330052] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.330053] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.330808] [drm:drm_mode_addfb2] [FB:75]
>[   37.332977] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   37.332980] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803fea3b540 state to ffff8803e3890800
>[   37.332982] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff880400a52800 state to ffff8803e3890800
>[   37.332984] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b540 to [CRTC:26:crtc-0]
>[   37.332985] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8803fea3b540
>[   37.332986] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   37.332990] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 106
>[   37.332991] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.332995] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   37.333003] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   37.333005] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   37.333008] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   37.333010] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3bcc0 state to ffff8803e3890800
>[   37.333012] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a57800 state to ffff8803e3890800
>[   37.333013] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3bcc0 to [CRTC:30:crtc-1]
>[   37.333014] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3bcc0
>[   37.333015] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   37.333017] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   37.333019] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.333021] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   37.333026] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   37.333027] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   37.339997] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.340001] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ef39a000 state to ffff8803fca95000
>[   37.340003] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e2000 state to ffff8803fca95000
>[   37.340004] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a000 to [CRTC:26:crtc-0]
>[   37.340006] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8803ef39a000
>[   37.340007] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.340010] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 106
>[   37.340012] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.340015] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.340026] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.340028] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.340031] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.340033] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a240 state to ffff8803fca95000
>[   37.340035] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e0000 state to ffff8803fca95000
>[   37.340036] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a240 to [CRTC:30:crtc-1]
>[   37.340037] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39a240
>[   37.340038] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.340040] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   37.340042] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.340044] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.340048] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.340050] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.348977] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.348981] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ea628840 state to ffff8803ec87a400
>[   37.348983] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f5800 state to ffff8803ec87a400
>[   37.348985] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628840 to [CRTC:26:crtc-0]
>[   37.348986] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8803ea628840
>[   37.348987] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.348991] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 106
>[   37.348992] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.348996] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.349007] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.349008] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.349012] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.349013] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628240 state to ffff8803ec87a400
>[   37.349015] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f7000 state to ffff8803ec87a400
>[   37.349016] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628240 to [CRTC:30:crtc-1]
>[   37.349018] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ea628240
>[   37.349019] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.349021] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   37.349022] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.349024] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.349031] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.349032] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.356972] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.356976] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ea6286c0 state to ffff8803ec87a400
>[   37.356978] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f3000 state to ffff8803ec87a400
>[   37.356980] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea6286c0 to [CRTC:26:crtc-0]
>[   37.356982] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8803ea6286c0
>[   37.356983] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.356987] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 106
>[   37.356989] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.356992] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.357002] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.357004] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.357008] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.357010] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628840 state to ffff8803ec87a400
>[   37.357012] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f5800 state to ffff8803ec87a400
>[   37.357014] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628840 to [CRTC:30:crtc-1]
>[   37.357016] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ea628840
>[   37.357017] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.357019] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   37.357021] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.357024] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.357031] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.357032] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.359928] [drm:drm_mode_addfb2] [FB:91]
>[   37.364988] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.364991] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ea628240 state to ffff8803ec87a400
>[   37.364994] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f7000 state to ffff8803ec87a400
>[   37.364995] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628240 to [CRTC:26:crtc-0]
>[   37.364997] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8803ea628240
>[   37.364998] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.365001] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 106
>[   37.365003] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.365006] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.365014] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.365016] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.365020] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.365021] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea6286c0 state to ffff8803ec87a400
>[   37.365023] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f3000 state to ffff8803ec87a400
>[   37.365025] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea6286c0 to [CRTC:30:crtc-1]
>[   37.365026] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ea6286c0
>[   37.365027] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.365029] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   37.365030] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.365032] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.365039] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.365041] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.388030] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   37.388034] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803fea3b780 state to ffff8803e3890800
>[   37.388037] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff880400a51800 state to ffff8803e3890800
>[   37.388038] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b780 to [CRTC:26:crtc-0]
>[   37.388039] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8803fea3b780
>[   37.388040] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   37.388045] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 106
>[   37.388046] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.388050] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   37.388065] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   37.388066] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   37.388070] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   37.388071] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b480 state to ffff8803e3890800
>[   37.388073] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a50000 state to ffff8803e3890800
>[   37.388074] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b480 to [CRTC:30:crtc-1]
>[   37.388075] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b480
>[   37.388075] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   37.388077] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   37.388078] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.388080] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   37.388085] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   37.388086] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   37.395284] [drm:drm_mode_addfb2] [FB:75]
>[   37.421684] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.421689] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ea628480 state to ffff8803ec87a400
>[   37.421692] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f5800 state to ffff8803ec87a400
>[   37.421694] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628480 to [CRTC:26:crtc-0]
>[   37.421695] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8803ea628480
>[   37.421697] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.421701] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 106
>[   37.421703] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.421708] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.421723] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.421725] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.421728] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.421730] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea6283c0 state to ffff8803ec87a400
>[   37.421732] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f2000 state to ffff8803ec87a400
>[   37.421734] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea6283c0 to [CRTC:30:crtc-1]
>[   37.421735] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ea6283c0
>[   37.421736] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.421738] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   37.421739] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.421742] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.421749] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.421750] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.428013] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.428016] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ea628180 state to ffff8803ec87a400
>[   37.428018] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f3000 state to ffff8803ec87a400
>[   37.428019] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628180 to [CRTC:26:crtc-0]
>[   37.428021] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8803ea628180
>[   37.428022] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.428024] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 106
>[   37.428026] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.428029] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.428039] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.428040] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.428043] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.428045] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628480 state to ffff8803ec87a400
>[   37.428047] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f5800 state to ffff8803ec87a400
>[   37.428048] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628480 to [CRTC:30:crtc-1]
>[   37.428049] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ea628480
>[   37.428050] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.428052] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   37.428053] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.428055] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.428062] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.428063] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.428948] [drm:drm_mode_addfb2] [FB:91]
>[   37.436996] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   37.437000] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803fea3b600 state to ffff8803e3890800
>[   37.437003] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff880400a50000 state to ffff8803e3890800
>[   37.437004] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b600 to [CRTC:26:crtc-0]
>[   37.437006] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8803fea3b600
>[   37.437007] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   37.437011] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 106
>[   37.437012] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.437016] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   37.437025] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   37.437026] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   37.437030] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   37.437031] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b900 state to ffff8803e3890800
>[   37.437033] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a51800 state to ffff8803e3890800
>[   37.437035] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b900 to [CRTC:30:crtc-1]
>[   37.437036] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b900
>[   37.437037] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   37.437039] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   37.437040] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.437042] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   37.437047] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   37.437048] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   37.453019] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   37.453023] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803fea3b0c0 state to ffff8803e3890800
>[   37.453027] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff880400a57800 state to ffff8803e3890800
>[   37.453029] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b0c0 to [CRTC:26:crtc-0]
>[   37.453030] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8803fea3b0c0
>[   37.453031] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   37.453036] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 106
>[   37.453038] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.453043] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   37.453058] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   37.453060] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   37.453063] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   37.453065] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b600 state to ffff8803e3890800
>[   37.453067] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a50000 state to ffff8803e3890800
>[   37.453069] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b600 to [CRTC:30:crtc-1]
>[   37.453070] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3b600
>[   37.453071] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   37.453073] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   37.453074] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.453077] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   37.453084] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   37.453085] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   37.462059] [drm:drm_mode_addfb2] [FB:75]
>[   37.495142] [drm:drm_mode_addfb2] [FB:91]
>[   37.513401] [drm:drm_mode_addfb2] [FB:75]
>[   37.544135] [drm:drm_mode_addfb2] [FB:91]
>[   37.562533] [drm:drm_mode_addfb2] [FB:75]
>[   37.579912] [drm:drm_mode_addfb2] [FB:94]
>[   37.589005] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.589009] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ef39a300 state to ffff8803fca95000
>[   37.589012] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e0000 state to ffff8803fca95000
>[   37.589014] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a300 to [CRTC:26:crtc-0]
>[   37.589016] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8803ef39a300
>[   37.589017] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.589022] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 106
>[   37.589024] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.589029] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.589041] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.589043] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.589047] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.589049] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39acc0 state to ffff8803fca95000
>[   37.589051] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e2000 state to ffff8803fca95000
>[   37.589052] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39acc0 to [CRTC:30:crtc-1]
>[   37.589053] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39acc0
>[   37.589054] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.589056] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   37.589058] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.589060] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.589065] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.589066] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.604997] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.605001] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ea628000 state to ffff8803ec87a400
>[   37.605004] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f2000 state to ffff8803ec87a400
>[   37.605005] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628000 to [CRTC:26:crtc-0]
>[   37.605007] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8803ea628000
>[   37.605008] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.605012] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 106
>[   37.605013] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.605018] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.605029] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.605031] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.605035] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.605037] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628300 state to ffff8803ec87a400
>[   37.605039] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f7000 state to ffff8803ec87a400
>[   37.605040] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628300 to [CRTC:30:crtc-1]
>[   37.605041] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ea628300
>[   37.605042] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.605045] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   37.605046] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.605048] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.605055] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.605057] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.612424] [drm:drm_mode_addfb2] [FB:75]
>[   37.612996] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.613000] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ea628780 state to ffff8803ec87a400
>[   37.613003] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f1800 state to ffff8803ec87a400
>[   37.613005] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628780 to [CRTC:26:crtc-0]
>[   37.613007] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8803ea628780
>[   37.613008] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.613014] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 106
>[   37.613015] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.613021] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.613031] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.613034] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.613038] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87a400
>[   37.613039] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628000 state to ffff8803ec87a400
>[   37.613042] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f2000 state to ffff8803ec87a400
>[   37.613043] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628000 to [CRTC:30:crtc-1]
>[   37.613044] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ea628000
>[   37.613045] [drm:drm_atomic_check_only] checking ffff8803ec87a400
>[   37.613047] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   37.613049] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.613051] [drm:drm_atomic_commit] commiting ffff8803ec87a400
>[   37.613056] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87a400
>[   37.613058] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87a400
>[   37.621015] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   37.621019] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803fea3b9c0 state to ffff8803e3890800
>[   37.621021] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff880400a51800 state to ffff8803e3890800
>[   37.621023] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b9c0 to [CRTC:26:crtc-0]
>[   37.621024] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8803fea3b9c0
>[   37.621025] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   37.621029] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 106
>[   37.621030] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.621034] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   37.621042] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   37.621044] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   37.621048] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   37.621050] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3bf00 state to ffff8803e3890800
>[   37.621051] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a52800 state to ffff8803e3890800
>[   37.621053] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3bf00 to [CRTC:30:crtc-1]
>[   37.621054] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803fea3bf00
>[   37.621055] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   37.621057] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   37.621058] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.621061] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   37.621065] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   37.621066] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   37.629104] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.629109] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a000 state to ffff8803ea4b0800
>[   37.629113] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe955000 state to ffff8803ea4b0800
>[   37.629115] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:26:crtc-0]
>[   37.629116] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76a000
>[   37.629118] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.629123] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 106
>[   37.629125] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.629130] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.629147] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.629149] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.629154] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.629155] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a240 state to ffff8803ea4b0800
>[   37.629158] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe952000 state to ffff8803ea4b0800
>[   37.629159] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a240 to [CRTC:30:crtc-1]
>[   37.629160] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76a240
>[   37.629161] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.629163] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   37.629165] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.629167] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.629172] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.629174] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.637038] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.637044] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ef39ad80 state to ffff8803fca95000
>[   37.637047] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e3800 state to ffff8803fca95000
>[   37.637049] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39ad80 to [CRTC:26:crtc-0]
>[   37.637050] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8803ef39ad80
>[   37.637052] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.637057] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 106
>[   37.637058] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.637063] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.637080] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.637082] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.637087] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.637089] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39ab40 state to ffff8803fca95000
>[   37.637091] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e7000 state to ffff8803fca95000
>[   37.637092] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39ab40 to [CRTC:30:crtc-1]
>[   37.637093] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39ab40
>[   37.637094] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.637096] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   37.637098] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.637100] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.637108] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.637109] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.645003] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.645008] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ef39a9c0 state to ffff8803fca95000
>[   37.645011] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e0800 state to ffff8803fca95000
>[   37.645012] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a9c0 to [CRTC:26:crtc-0]
>[   37.645014] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8803ef39a9c0
>[   37.645015] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.645021] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 106
>[   37.645023] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.645028] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.645045] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.645047] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.645051] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.645052] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39ad80 state to ffff8803fca95000
>[   37.645055] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e3800 state to ffff8803fca95000
>[   37.645056] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39ad80 to [CRTC:30:crtc-1]
>[   37.645057] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39ad80
>[   37.645058] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.645060] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   37.645061] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.645064] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.645071] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.645072] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.645868] [drm:drm_mode_addfb2] [FB:91]
>[   37.652982] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.652986] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ef39ab40 state to ffff8803fca95000
>[   37.652988] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803f27e7000 state to ffff8803fca95000
>[   37.652990] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39ab40 to [CRTC:26:crtc-0]
>[   37.652991] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8803ef39ab40
>[   37.652992] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.652996] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 106
>[   37.652997] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.653001] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.653009] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.653011] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.653014] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fca95000
>[   37.653015] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ef39a9c0 state to ffff8803fca95000
>[   37.653017] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803f27e0800 state to ffff8803fca95000
>[   37.653019] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ef39a9c0 to [CRTC:30:crtc-1]
>[   37.653020] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8803ef39a9c0
>[   37.653021] [drm:drm_atomic_check_only] checking ffff8803fca95000
>[   37.653023] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   37.653024] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.653026] [drm:drm_atomic_commit] commiting ffff8803fca95000
>[   37.653031] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fca95000
>[   37.653032] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fca95000
>[   37.660110] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.660116] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a840 state to ffff8803ea4b0800
>[   37.660119] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953000 state to ffff8803ea4b0800
>[   37.660121] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a840 to [CRTC:26:crtc-0]
>[   37.660122] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76a840
>[   37.660124] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.660129] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 106
>[   37.660131] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   37.660136] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.660153] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.660155] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.660159] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b0800
>[   37.660160] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76ab40 state to ffff8803ea4b0800
>[   37.660163] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950000 state to ffff8803ea4b0800
>[   37.660164] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ab40 to [CRTC:30:crtc-1]
>[   37.660165] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff8800cd76ab40
>[   37.660166] [drm:drm_atomic_check_only] checking ffff8803ea4b0800
>[   37.660168] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 99
>[   37.660170] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   37.660191] [drm:drm_atomic_commit] commiting ffff8803ea4b0800
>[   37.660196] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b0800
>[   37.660198] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b0800
>[   37.678583] [drm:drm_mode_addfb2] [FB:75]
>[   37.811929] [drm:drm_mode_addfb2] [FB:91]
>[   38.065808] [drm:drm_mode_addfb2] [FB:75]
>[   38.074272] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   38.074278] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a180 state to ffff8803ea4b3800
>[   38.074281] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953800 state to ffff8803ea4b3800
>[   38.074282] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a180 to [CRTC:26:crtc-0]
>[   38.074284] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a180
>[   38.074285] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   38.074290] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.074291] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.074297] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   38.074310] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   38.074312] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   38.074688] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   38.074690] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a840 state to ffff8803ea4b3800
>[   38.074693] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3800
>[   38.074694] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a840 to [CRTC:30:crtc-1]
>[   38.074695] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76a840
>[   38.074696] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   38.074699] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.074700] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.074703] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   38.074708] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   38.074709] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   38.074713] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   38.074715] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76ab40 state to ffff8803ea4b3800
>[   38.074716] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe950000 state to ffff8803ea4b3800
>[   38.074718] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ab40 to [CRTC:26:crtc-0]
>[   38.074719] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76ab40
>[   38.074720] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   38.074721] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.074723] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.074725] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   38.074731] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   38.074732] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   38.074734] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   38.074736] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a180 state to ffff8803ea4b3800
>[   38.074737] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953800 state to ffff8803ea4b3800
>[   38.074739] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a180 to [CRTC:30:crtc-1]
>[   38.074740] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76a180
>[   38.074741] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   38.074742] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.074743] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.074745] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   38.074749] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   38.074750] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   38.093420] [drm:drm_mode_addfb2] [FB:91]
>[   38.113244] [drm:drm_mode_addfb2] [FB:99]
>[   38.278846] [drm:drm_mode_addfb2] [FB:75]
>[   38.296583] [drm:drm_mode_addfb2] [FB:91]
>[   38.313248] [drm:drm_mode_addfb2] [FB:99]
>[   38.329917] [drm:drm_mode_addfb2] [FB:75]
>[   38.346558] [drm:drm_mode_addfb2] [FB:91]
>[   38.363242] [drm:drm_mode_addfb2] [FB:99]
>[   38.379909] [drm:drm_mode_addfb2] [FB:75]
>[   38.396553] [drm:drm_mode_addfb2] [FB:91]
>[   38.413241] [drm:drm_mode_addfb2] [FB:99]
>[   38.429904] [drm:drm_mode_addfb2] [FB:75]
>[   38.437083] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.437088] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a0c0 state to ffff8803ea4b3c00
>[   38.437092] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953000 state to ffff8803ea4b3c00
>[   38.437093] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a0c0 to [CRTC:26:crtc-0]
>[   38.437095] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a0c0
>[   38.437096] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.437101] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.437103] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.437108] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.437123] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.437125] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.437128] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.437130] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76ab40 state to ffff8803ea4b3c00
>[   38.437132] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950000 state to ffff8803ea4b3c00
>[   38.437134] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ab40 to [CRTC:30:crtc-1]
>[   38.437135] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76ab40
>[   38.437136] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.437138] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.437139] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.437142] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.437146] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.437148] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.446571] [drm:drm_mode_addfb2] [FB:91]
>[   38.453078] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.453083] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a180 state to ffff8803ea4b3c00
>[   38.453086] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953800 state to ffff8803ea4b3c00
>[   38.453088] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a180 to [CRTC:26:crtc-0]
>[   38.453090] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a180
>[   38.453091] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.453097] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.453098] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.453104] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.453117] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.453120] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.453124] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.453125] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a0c0 state to ffff8803ea4b3c00
>[   38.453128] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3c00
>[   38.453129] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a0c0 to [CRTC:30:crtc-1]
>[   38.453130] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76a0c0
>[   38.453131] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.453133] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.453135] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.453137] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.453142] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.453143] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.463239] [drm:drm_mode_addfb2] [FB:99]
>[   38.479904] [drm:drm_mode_addfb2] [FB:75]
>[   38.496571] [drm:drm_mode_addfb2] [FB:91]
>[   38.513237] [drm:drm_mode_addfb2] [FB:99]
>[   38.525078] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.525084] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76ab40 state to ffff8803ea4b3c00
>[   38.525087] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe950000 state to ffff8803ea4b3c00
>[   38.525089] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76ab40 to [CRTC:26:crtc-0]
>[   38.525090] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76ab40
>[   38.525092] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.525098] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.525099] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.525105] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.525122] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.525124] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.525129] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.525130] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a180 state to ffff8803ea4b3c00
>[   38.525133] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953800 state to ffff8803ea4b3c00
>[   38.525134] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a180 to [CRTC:30:crtc-1]
>[   38.525136] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76a180
>[   38.525137] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.525139] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.525140] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.525142] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.525147] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.525149] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.529901] [drm:drm_mode_addfb2] [FB:75]
>[   38.532978] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   38.532983] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803fea3b0c0 state to ffff8803e3890800
>[   38.532986] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff880400a52800 state to ffff8803e3890800
>[   38.532988] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b0c0 to [CRTC:26:crtc-0]
>[   38.532989] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8803fea3b0c0
>[   38.532991] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   38.532995] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.532997] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.533002] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   38.533012] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   38.533014] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   38.533018] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   38.533020] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b000 state to ffff8803e3890800
>[   38.533022] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a51800 state to ffff8803e3890800
>[   38.533023] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b000 to [CRTC:30:crtc-1]
>[   38.533025] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8803fea3b000
>[   38.533026] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   38.533028] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.533029] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.533031] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   38.533036] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   38.533038] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   38.541081] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   38.541087] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803fea3b180 state to ffff8803e3890800
>[   38.541090] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff880400a50000 state to ffff8803e3890800
>[   38.541092] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b180 to [CRTC:26:crtc-0]
>[   38.541093] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8803fea3b180
>[   38.541095] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   38.541100] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.541102] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.541107] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   38.541124] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   38.541126] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   38.541130] [drm:drm_atomic_state_init] Allocated atomic state ffff8803e3890800
>[   38.541132] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803fea3b0c0 state to ffff8803e3890800
>[   38.541134] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff880400a52800 state to ffff8803e3890800
>[   38.541135] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fea3b0c0 to [CRTC:30:crtc-1]
>[   38.541137] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8803fea3b0c0
>[   38.541138] [drm:drm_atomic_check_only] checking ffff8803e3890800
>[   38.541140] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.541141] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.541143] [drm:drm_atomic_commit] commiting ffff8803e3890800
>[   38.541148] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803e3890800
>[   38.541150] [drm:drm_atomic_state_free] Freeing atomic state ffff8803e3890800
>[   38.546682] [drm:drm_mode_addfb2] [FB:91]
>[   38.549073] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.549079] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a6c0 state to ffff8803ea4b3c00
>[   38.549082] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe953000 state to ffff8803ea4b3c00
>[   38.549084] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a6c0 to [CRTC:26:crtc-0]
>[   38.549085] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a6c0
>[   38.549087] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.549092] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.549093] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.549098] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.549112] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.549114] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.549118] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.549120] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3c00
>[   38.549122] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3c00
>[   38.549124] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   38.549125] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76aa80
>[   38.549126] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.549128] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.549129] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.549132] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.549137] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.549138] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.557004] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.557009] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a3c0 state to ffff8803ea4b3c00
>[   38.557012] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe950800 state to ffff8803ea4b3c00
>[   38.557014] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a3c0 to [CRTC:26:crtc-0]
>[   38.557015] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a3c0
>[   38.557017] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.557022] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.557024] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.557029] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.557046] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.557048] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.557052] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.557053] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a6c0 state to ffff8803ea4b3c00
>[   38.557055] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe953000 state to ffff8803ea4b3c00
>[   38.557057] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a6c0 to [CRTC:30:crtc-1]
>[   38.557058] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76a6c0
>[   38.557059] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.557061] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.557062] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.557065] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.557070] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.557071] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.563237] [drm:drm_mode_addfb2] [FB:99]
>[   38.564960] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87b400
>[   38.564965] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8803ea6283c0 state to ffff8803ec87b400
>[   38.564968] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8800d93f7000 state to ffff8803ec87b400
>[   38.564970] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea6283c0 to [CRTC:26:crtc-0]
>[   38.564971] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8803ea6283c0
>[   38.564973] [drm:drm_atomic_check_only] checking ffff8803ec87b400
>[   38.564978] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.564979] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.564984] [drm:drm_atomic_commit] commiting ffff8803ec87b400
>[   38.564994] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87b400
>[   38.564996] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87b400
>[   38.565000] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ec87b400
>[   38.565001] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8803ea628480 state to ffff8803ec87b400
>[   38.565003] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8800d93f3800 state to ffff8803ec87b400
>[   38.565005] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea628480 to [CRTC:30:crtc-1]
>[   38.565006] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8803ea628480
>[   38.565007] [drm:drm_atomic_check_only] checking ffff8803ec87b400
>[   38.565009] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.565010] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.565013] [drm:drm_atomic_commit] commiting ffff8803ec87b400
>[   38.565018] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ec87b400
>[   38.565019] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ec87b400
>[   38.573074] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.573080] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76aa80 state to ffff8803ea4b3c00
>[   38.573083] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe956000 state to ffff8803ea4b3c00
>[   38.573084] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:26:crtc-0]
>[   38.573086] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76aa80
>[   38.573087] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.573093] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.573095] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.573100] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.573117] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.573119] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.573123] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.573125] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b3c00
>[   38.573127] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe954000 state to ffff8803ea4b3c00
>[   38.573128] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   38.573130] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76a000
>[   38.573131] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.573133] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.573134] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.573136] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.573141] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.573143] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.581077] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.581083] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a540 state to ffff8803ea4b3c00
>[   38.581086] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe952800 state to ffff8803ea4b3c00
>[   38.581088] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a540 to [CRTC:26:crtc-0]
>[   38.581089] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a540
>[   38.581091] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.581096] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.581098] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.581103] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.581120] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.581122] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.581126] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.581128] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3c00
>[   38.581130] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3c00
>[   38.581131] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   38.581133] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76aa80
>[   38.581134] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.581136] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.581137] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.581139] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.581146] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.581147] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.589075] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.589080] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a000 state to ffff8803ea4b3c00
>[   38.589083] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe954000 state to ffff8803ea4b3c00
>[   38.589085] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:26:crtc-0]
>[   38.589086] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a000
>[   38.589088] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.589093] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.589095] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.589100] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.589118] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.589120] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.589124] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.589125] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a540 state to ffff8803ea4b3c00
>[   38.589127] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe952800 state to ffff8803ea4b3c00
>[   38.589129] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a540 to [CRTC:30:crtc-1]
>[   38.589130] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76a540
>[   38.589131] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.589133] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.589134] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.589137] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.589144] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.589145] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.597073] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.597078] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76aa80 state to ffff8803ea4b3c00
>[   38.597082] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe956000 state to ffff8803ea4b3c00
>[   38.597083] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:26:crtc-0]
>[   38.597085] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76aa80
>[   38.597086] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.597091] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.597093] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.597098] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.597114] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.597117] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.597121] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.597123] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b3c00
>[   38.597125] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe954000 state to ffff8803ea4b3c00
>[   38.597126] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   38.597127] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76a000
>[   38.597128] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.597130] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.597132] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.597134] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.597141] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.597142] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.605076] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.605082] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a540 state to ffff8803ea4b3c00
>[   38.605085] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe952800 state to ffff8803ea4b3c00
>[   38.605086] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a540 to [CRTC:26:crtc-0]
>[   38.605088] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a540
>[   38.605089] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.605094] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.605096] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.605101] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.605118] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.605120] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.605124] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.605126] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3c00
>[   38.605128] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3c00
>[   38.605129] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   38.605130] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76aa80
>[   38.605131] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.605133] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.605135] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.605137] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.605144] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.605145] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.613075] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.613080] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a000 state to ffff8803ea4b3c00
>[   38.613083] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe954000 state to ffff8803ea4b3c00
>[   38.613085] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:26:crtc-0]
>[   38.613086] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a000
>[   38.613088] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.613093] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.613095] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.613100] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.613117] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.613120] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.613123] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.613125] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a540 state to ffff8803ea4b3c00
>[   38.613127] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe952800 state to ffff8803ea4b3c00
>[   38.613128] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a540 to [CRTC:30:crtc-1]
>[   38.613130] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76a540
>[   38.613131] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.613133] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.613134] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.613136] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.613224] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.613226] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.621076] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.621082] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76aa80 state to ffff8803ea4b3c00
>[   38.621085] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe956000 state to ffff8803ea4b3c00
>[   38.621087] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:26:crtc-0]
>[   38.621089] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76aa80
>[   38.621091] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.621096] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.621097] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.621102] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.621119] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.621121] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.621125] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.621127] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b3c00
>[   38.621129] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe954000 state to ffff8803ea4b3c00
>[   38.621131] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   38.621132] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76a000
>[   38.621133] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.621135] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.621136] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.621139] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.621145] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.621147] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.629076] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.629082] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a540 state to ffff8803ea4b3c00
>[   38.629085] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe952800 state to ffff8803ea4b3c00
>[   38.629087] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a540 to [CRTC:26:crtc-0]
>[   38.629088] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a540
>[   38.629090] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.629095] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.629096] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.629102] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.629119] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.629121] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.629125] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.629126] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3c00
>[   38.629129] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3c00
>[   38.629130] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   38.629131] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76aa80
>[   38.629132] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.629134] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.629136] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.629138] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.629145] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.629146] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.637074] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.637079] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a000 state to ffff8803ea4b3c00
>[   38.637082] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe954000 state to ffff8803ea4b3c00
>[   38.637084] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:26:crtc-0]
>[   38.637086] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a000
>[   38.637087] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.637092] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.637094] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.637099] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.637116] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.637118] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.637122] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.637124] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a540 state to ffff8803ea4b3c00
>[   38.637126] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe952800 state to ffff8803ea4b3c00
>[   38.637127] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a540 to [CRTC:30:crtc-1]
>[   38.637129] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76a540
>[   38.637130] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.637132] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.637133] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.637135] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.637143] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.637144] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.645079] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.645084] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76aa80 state to ffff8803ea4b3c00
>[   38.645088] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe956000 state to ffff8803ea4b3c00
>[   38.645089] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:26:crtc-0]
>[   38.645091] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76aa80
>[   38.645092] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.645097] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.645099] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.645105] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.645122] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.645124] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.645128] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.645130] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b3c00
>[   38.645132] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe954000 state to ffff8803ea4b3c00
>[   38.645133] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   38.645134] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76a000
>[   38.645135] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.645137] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.645139] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.645141] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.645147] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.645149] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.653073] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.653078] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a540 state to ffff8803ea4b3c00
>[   38.653081] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe952800 state to ffff8803ea4b3c00
>[   38.653083] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a540 to [CRTC:26:crtc-0]
>[   38.653085] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a540
>[   38.653086] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.653091] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.653093] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.653098] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.653115] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.653117] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.653121] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.653123] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3c00
>[   38.653125] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3c00
>[   38.653126] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   38.653127] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76aa80
>[   38.653128] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.653130] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.653132] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.653134] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.653141] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.653143] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.661073] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.661079] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a000 state to ffff8803ea4b3c00
>[   38.661082] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe954000 state to ffff8803ea4b3c00
>[   38.661084] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:26:crtc-0]
>[   38.661085] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a000
>[   38.661087] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.661092] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.661094] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.661099] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.661116] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.661118] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.661122] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.661124] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a540 state to ffff8803ea4b3c00
>[   38.661126] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe952800 state to ffff8803ea4b3c00
>[   38.661128] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a540 to [CRTC:30:crtc-1]
>[   38.661129] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76a540
>[   38.661130] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.661132] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.661133] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.661135] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.661142] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.661144] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.669074] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.669079] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76aa80 state to ffff8803ea4b3c00
>[   38.669083] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe956000 state to ffff8803ea4b3c00
>[   38.669085] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:26:crtc-0]
>[   38.669086] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76aa80
>[   38.669088] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.669093] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.669094] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.669100] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.669117] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.669119] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.669122] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.669124] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b3c00
>[   38.669126] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe954000 state to ffff8803ea4b3c00
>[   38.669128] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   38.669129] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76a000
>[   38.669130] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.669132] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.669133] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.669136] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.669142] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.669144] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.677075] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.677080] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a540 state to ffff8803ea4b3c00
>[   38.677083] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe952800 state to ffff8803ea4b3c00
>[   38.677085] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a540 to [CRTC:26:crtc-0]
>[   38.677086] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a540
>[   38.677088] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.677093] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.677094] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.677100] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.677117] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.677119] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.677123] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.677125] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3c00
>[   38.677127] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe956000 state to ffff8803ea4b3c00
>[   38.677128] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   38.677129] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76aa80
>[   38.677130] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.677132] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.677134] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.677136] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.677143] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.677144] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.685074] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.685079] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a000 state to ffff8803ea4b3c00
>[   38.685083] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe954000 state to ffff8803ea4b3c00
>[   38.685084] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:26:crtc-0]
>[   38.685086] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a000
>[   38.685087] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.685092] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.685094] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.685100] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.685116] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.685119] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.685123] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.685125] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a540 state to ffff8803ea4b3c00
>[   38.685127] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe952800 state to ffff8803ea4b3c00
>[   38.685128] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a540 to [CRTC:30:crtc-1]
>[   38.685129] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76a540
>[   38.685130] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.685132] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.685134] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.685136] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.685143] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.685144] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.693070] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.693076] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76aa80 state to ffff8803ea4b3c00
>[   38.693079] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe950800 state to ffff8803ea4b3c00
>[   38.693080] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:26:crtc-0]
>[   38.693082] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76aa80
>[   38.693083] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.693088] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.693090] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.693095] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.693112] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.693114] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.693118] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.693120] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b3c00
>[   38.693123] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe954000 state to ffff8803ea4b3c00
>[   38.693124] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   38.693125] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76a000
>[   38.693126] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.693128] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.693129] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.693132] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.693139] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.693140] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.695659] [drm:drm_mode_addfb2] [FB:75]
>[   38.700969] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.700973] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a540 state to ffff8803ea4b3c00
>[   38.700976] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe952800 state to ffff8803ea4b3c00
>[   38.700978] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a540 to [CRTC:26:crtc-0]
>[   38.700979] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a540
>[   38.700981] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.700985] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.700987] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.700992] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.701002] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.701004] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.701008] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.701009] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3c00
>[   38.701011] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950800 state to ffff8803ea4b3c00
>[   38.701013] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   38.701014] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76aa80
>[   38.701015] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.701017] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.701018] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.701021] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.701025] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.701027] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.725072] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.725078] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a000 state to ffff8803ea4b3c00
>[   38.725081] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe954000 state to ffff8803ea4b3c00
>[   38.725083] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:26:crtc-0]
>[   38.725084] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a000
>[   38.725086] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.725091] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   38.725093] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   38.725098] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.725115] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.725117] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.725121] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3c00
>[   38.725123] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a540 state to ffff8803ea4b3c00
>[   38.725125] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe952800 state to ffff8803ea4b3c00
>[   38.725126] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a540 to [CRTC:30:crtc-1]
>[   38.725128] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76a540
>[   38.725129] [drm:drm_atomic_check_only] checking ffff8803ea4b3c00
>[   38.725131] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   38.725132] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   38.725134] [drm:drm_atomic_commit] commiting ffff8803ea4b3c00
>[   38.725141] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3c00
>[   38.725142] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3c00
>[   38.745704] [drm:drm_mode_addfb2] [FB:91]
>[   38.793080] [drm:drm_mode_addfb2] [FB:75]
>[   38.813245] [drm:drm_mode_addfb2] [FB:99]
>[   38.844120] [drm:drm_mode_addfb2] [FB:75]
>[   38.894774] [drm:drm_mode_addfb2] [FB:91]
>[   38.945801] [drm:drm_mode_addfb2] [FB:75]
>[   38.999488] [drm:drm_mode_addfb2] [FB:91]
>[   39.063267] [drm:drm_mode_addfb2] [FB:75]
>[   39.085118] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3000
>[   39.085127] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76aa80 state to ffff8803ea4b3000
>[   39.085132] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe950000 state to ffff8803ea4b3000
>[   39.085135] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:26:crtc-0]
>[   39.085138] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76aa80
>[   39.085140] [drm:drm_atomic_check_only] checking ffff8803ea4b3000
>[   39.085148] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   39.085151] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   39.085160] [drm:drm_atomic_commit] commiting ffff8803ea4b3000
>[   39.085187] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3000
>[   39.085191] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3000
>[   39.085198] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3000
>[   39.085202] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b3000
>[   39.085205] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe954000 state to ffff8803ea4b3000
>[   39.085208] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   39.085210] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76a000
>[   39.085212] [drm:drm_atomic_check_only] checking ffff8803ea4b3000
>[   39.085216] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   39.085218] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   39.085223] [drm:drm_atomic_commit] commiting ffff8803ea4b3000
>[   39.085235] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3000
>[   39.085237] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3000
>[   39.109108] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3000
>[   39.109116] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a540 state to ffff8803ea4b3000
>[   39.109122] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff88040b89b000 state to ffff8803ea4b3000
>[   39.109125] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a540 to [CRTC:26:crtc-0]
>[   39.109127] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a540
>[   39.109129] [drm:drm_atomic_check_only] checking ffff8803ea4b3000
>[   39.109137] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   39.109140] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   39.109148] [drm:drm_atomic_commit] commiting ffff8803ea4b3000
>[   39.109174] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3000
>[   39.109178] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3000
>[   39.109185] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3000
>[   39.109188] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3000
>[   39.109192] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff88040b89a800 state to ffff8803ea4b3000
>[   39.109194] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   39.109196] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76aa80
>[   39.109198] [drm:drm_atomic_check_only] checking ffff8803ea4b3000
>[   39.109202] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   39.109204] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   39.109208] [drm:drm_atomic_commit] commiting ffff8803ea4b3000
>[   39.109220] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3000
>[   39.109222] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3000
>[   39.112402] [drm:drm_mode_addfb2] [FB:91]
>[   39.162340] [drm:drm_mode_addfb2] [FB:75]
>[   39.212359] [drm:drm_mode_addfb2] [FB:91]
>[   39.262333] [drm:drm_mode_addfb2] [FB:75]
>[   39.312406] [drm:drm_mode_addfb2] [FB:91]
>[   39.362322] [drm:drm_mode_addfb2] [FB:75]
>[   39.364931] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3400
>[   39.364935] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a000 state to ffff8803ea4b3400
>[   39.364939] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe954000 state to ffff8803ea4b3400
>[   39.364941] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:26:crtc-0]
>[   39.364943] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a000
>[   39.364944] [drm:drm_atomic_check_only] checking ffff8803ea4b3400
>[   39.364949] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   39.364950] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   39.364956] [drm:drm_atomic_commit] commiting ffff8803ea4b3400
>[   39.364966] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3400
>[   39.364968] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3400
>[   39.364972] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3400
>[   39.364973] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a540 state to ffff8803ea4b3400
>[   39.364976] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950000 state to ffff8803ea4b3400
>[   39.364977] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a540 to [CRTC:30:crtc-1]
>[   39.364978] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76a540
>[   39.364979] [drm:drm_atomic_check_only] checking ffff8803ea4b3400
>[   39.364981] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   39.364983] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   39.364985] [drm:drm_atomic_commit] commiting ffff8803ea4b3400
>[   39.364990] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3400
>[   39.364992] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3400
>[   39.373046] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3400
>[   39.373052] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76aa80 state to ffff8803ea4b3400
>[   39.373056] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff88040b89a800 state to ffff8803ea4b3400
>[   39.373058] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:26:crtc-0]
>[   39.373059] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76aa80
>[   39.373061] [drm:drm_atomic_check_only] checking ffff8803ea4b3400
>[   39.373066] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   39.373068] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   39.373073] [drm:drm_atomic_commit] commiting ffff8803ea4b3400
>[   39.373090] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3400
>[   39.373092] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3400
>[   39.373096] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3400
>[   39.373098] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a000 state to ffff8803ea4b3400
>[   39.373100] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff88040b89b000 state to ffff8803ea4b3400
>[   39.373102] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a000 to [CRTC:30:crtc-1]
>[   39.373103] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76a000
>[   39.373104] [drm:drm_atomic_check_only] checking ffff8803ea4b3400
>[   39.373106] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   39.373107] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   39.373110] [drm:drm_atomic_commit] commiting ffff8803ea4b3400
>[   39.373114] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3400
>[   39.373116] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3400
>[   39.389045] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3400
>[   39.389051] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a540 state to ffff8803ea4b3400
>[   39.389054] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe950000 state to ffff8803ea4b3400
>[   39.389056] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a540 to [CRTC:26:crtc-0]
>[   39.389058] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a540
>[   39.389059] [drm:drm_atomic_check_only] checking ffff8803ea4b3400
>[   39.389064] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   39.389066] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   39.389071] [drm:drm_atomic_commit] commiting ffff8803ea4b3400
>[   39.389088] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3400
>[   39.389090] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3400
>[   39.389094] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3400
>[   39.389096] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3400
>[   39.389098] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe954000 state to ffff8803ea4b3400
>[   39.389099] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   39.389100] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76aa80
>[   39.389101] [drm:drm_atomic_check_only] checking ffff8803ea4b3400
>[   39.389103] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   39.389105] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   39.389107] [drm:drm_atomic_commit] commiting ffff8803ea4b3400
>[   39.389114] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3400
>[   39.389115] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3400
>[   39.412343] [drm:drm_mode_addfb2] [FB:91]
>[   39.462332] [drm:drm_mode_addfb2] [FB:75]
>[   39.528574] [drm:drm_mode_addfb2] [FB:91]
>[   39.546542] [drm:drm_mode_addfb2] [FB:99]
>[   39.563202] [drm:drm_mode_addfb2] [FB:75]
>[   39.579855] [drm:drm_mode_addfb2] [FB:91]
>[   39.596514] [drm:drm_mode_addfb2] [FB:99]
>[   39.613178] [drm:drm_mode_addfb2] [FB:75]
>[   39.629830] [drm:drm_mode_addfb2] [FB:91]
>[   39.646500] [drm:drm_mode_addfb2] [FB:99]
>[   39.663163] [drm:drm_mode_addfb2] [FB:75]
>[   39.679975] [drm:drm_mode_addfb2] [FB:91]
>[   39.696628] [drm:drm_mode_addfb2] [FB:99]
>[   39.812407] [drm:drm_mode_addfb2] [FB:75]
>[   40.062213] [drm:drm_mode_addfb2] [FB:91]
>[   40.277016] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   40.277021] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a840 state to ffff8803ea4b3800
>[   40.277025] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff88040b89a800 state to ffff8803ea4b3800
>[   40.277026] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a840 to [CRTC:26:crtc-0]
>[   40.277028] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a840
>[   40.277029] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   40.277035] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   40.277036] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   40.277041] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   40.277059] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   40.277061] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   40.277065] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   40.277067] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a540 state to ffff8803ea4b3800
>[   40.277069] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe950000 state to ffff8803ea4b3800
>[   40.277071] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a540 to [CRTC:30:crtc-1]
>[   40.277072] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76a540
>[   40.277073] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   40.277075] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   40.277076] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   40.277078] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   40.277085] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   40.277087] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   40.285013] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   40.285018] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   40.285021] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe954000 state to ffff8803ea4b3800
>[   40.285023] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:26:crtc-0]
>[   40.285025] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76aa80
>[   40.285026] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   40.285031] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   40.285033] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   40.285038] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   40.285055] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   40.285057] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   40.285061] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   40.285063] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76a840 state to ffff8803ea4b3800
>[   40.285065] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe955000 state to ffff8803ea4b3800
>[   40.285066] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a840 to [CRTC:30:crtc-1]
>[   40.285068] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76a840
>[   40.285069] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   40.285071] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   40.285072] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   40.285074] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   40.285081] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   40.285083] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   40.293016] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   40.293021] [drm:drm_atomic_get_plane_state] Added [PLANE:25:plane-1] ffff8800cd76a540 state to ffff8803ea4b3800
>[   40.293024] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:crtc-0] ffff8803fe950000 state to ffff8803ea4b3800
>[   40.293026] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76a540 to [CRTC:26:crtc-0]
>[   40.293027] [drm:drm_atomic_set_fb_for_plane] Set [FB:94] for plane state ffff8800cd76a540
>[   40.293029] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   40.293034] [drm:intel_plane_atomic_calc_changes] [CRTC:26] has [PLANE:25] with fb 94
>[   40.293035] [drm:intel_plane_atomic_calc_changes] [PLANE:25] visible 1 -> 1, off 0, on 0, ms 0
>[   40.293041] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   40.293057] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   40.293060] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   40.293063] [drm:drm_atomic_state_init] Allocated atomic state ffff8803ea4b3800
>[   40.293065] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane-4] ffff8800cd76aa80 state to ffff8803ea4b3800
>[   40.293067] [drm:drm_atomic_get_crtc_state] Added [CRTC:30:crtc-1] ffff8803fe954000 state to ffff8803ea4b3800
>[   40.293069] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800cd76aa80 to [CRTC:30:crtc-1]
>[   40.293070] [drm:drm_atomic_set_fb_for_plane] Set [FB:106] for plane state ffff8800cd76aa80
>[   40.293071] [drm:drm_atomic_check_only] checking ffff8803ea4b3800
>[   40.293073] [drm:intel_plane_atomic_calc_changes] [CRTC:30] has [PLANE:29] with fb 106
>[   40.293074] [drm:intel_plane_atomic_calc_changes] [PLANE:29] visible 1 -> 1, off 0, on 0, ms 0
>[   40.293076] [drm:drm_atomic_commit] commiting ffff8803ea4b3800
>[   40.293083] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803ea4b3800
>[   40.293084] [drm:drm_atomic_state_free] Freeing atomic state ffff8803ea4b3800
>[   40.312321] [drm:drm_mode_addfb2] [FB:75]
>[   40.559590] [drm:drm_mode_addfb2] [FB:91]
>[   40.810035] [drm:drm_mode_addfb2] [FB:75]
>[   40.945605] [drm:drm_mode_addfb2] [FB:91]
>[   41.060839] [drm:drm_mode_addfb2] [FB:75]
>[   41.311023] [drm:drm_mode_addfb2] [FB:91]
>[   41.561788] [drm:drm_mode_addfb2] [FB:75]
>[   41.812358] [drm:drm_mode_addfb2] [FB:91]
>[   41.960069] [drm:drm_mode_addfb2] [FB:75]
>[   42.064280] [drm:drm_mode_addfb2] [FB:91]
>[   42.314446] [drm:drm_mode_addfb2] [FB:75]
>[   42.329790] [drm:drm_mode_addfb2] [FB:99]
>[   42.579834] [drm:drm_mode_addfb2] [FB:75]
>[   42.828954] [drm:drm_mode_addfb2] [FB:91]
>[   43.078932] [drm:drm_mode_addfb2] [FB:75]
>[   43.329270] [drm:drm_mode_addfb2] [FB:91]
>[   43.579487] [drm:drm_mode_addfb2] [FB:75]
>[   43.829735] [drm:drm_mode_addfb2] [FB:91]
>[   44.079481] [drm:drm_mode_addfb2] [FB:75]
>[   44.329862] [drm:drm_mode_addfb2] [FB:91]
>[   44.430115] [drm:drm_mode_addfb2] [FB:75]
>[   44.579953] [drm:drm_mode_addfb2] [FB:91]
>[   44.829233] [drm:drm_mode_addfb2] [FB:75]
>[   45.079958] [drm:drm_mode_addfb2] [FB:91]
>[   45.328855] [drm:drm_mode_addfb2] [FB:75]
>[   45.346335] [drm:drm_mode_addfb2] [FB:99]
>[   45.528024] [drm:drm_mode_addfb2] [FB:75]
>[   45.579339] [drm:drm_mode_addfb2] [FB:91]
>[   45.828836] [drm:drm_mode_addfb2] [FB:75]
>[   46.078775] [drm:drm_mode_addfb2] [FB:91]
>[   46.325647] [drm:drm_mode_addfb2] [FB:75]
>[   46.576269] [drm:drm_mode_addfb2] [FB:91]
>[   46.826878] [drm:drm_mode_addfb2] [FB:75]
>[   46.995424] [drm:drm_mode_addfb2] [FB:91]
>[   47.077463] [drm:drm_mode_addfb2] [FB:75]
>[   47.328441] [drm:drm_mode_addfb2] [FB:91]
>[   47.395293] [drm:drm_mode_addfb2] [FB:75]
>[   47.578596] [drm:drm_mode_addfb2] [FB:91]
>[   47.829111] [drm:drm_mode_addfb2] [FB:75]
>[   48.080004] [drm:drm_mode_addfb2] [FB:91]
>[   48.263240] [drm:drm_mode_addfb2] [FB:75]
>[   48.331508] [drm:drm_mode_addfb2] [FB:91]
>[   48.446293] [drm:drm_mode_addfb2] [FB:75]
>[   48.596542] [drm:drm_mode_addfb2] [FB:91]
>[   48.846591] [drm:drm_mode_addfb2] [FB:75]
>[   49.096515] [drm:drm_mode_addfb2] [FB:91]
>[   49.345054] [drm:drm_mode_addfb2] [FB:75]
>[   49.595322] [drm:drm_mode_addfb2] [FB:91]
>[   49.845574] [drm:drm_mode_addfb2] [FB:75]
>[   50.095550] [drm:drm_mode_addfb2] [FB:91]
>[   50.345485] [drm:drm_mode_addfb2] [FB:75]
>[   50.595412] [drm:drm_mode_addfb2] [FB:91]
>[   50.845525] [drm:drm_mode_addfb2] [FB:75]
>[   51.095505] [drm:drm_mode_addfb2] [FB:91]
>[   51.345277] [drm:drm_mode_addfb2] [FB:75]
>[   51.495554] [drm:drm_mode_addfb2] [FB:91]
>[   51.595366] [drm:drm_mode_addfb2] [FB:75]
>[   51.759598] [drm:drm_mode_addfb2] [FB:91]
>[   51.845288] [drm:drm_mode_addfb2] [FB:75]
>[   51.978503] [drm:drm_mode_addfb2] [FB:91]
>[   52.095271] [drm:drm_mode_addfb2] [FB:75]
>[   52.161892] [drm:drm_mode_addfb2] [FB:91]
>[   52.345188] [drm:drm_mode_addfb2] [FB:75]
>[   52.595222] [drm:drm_mode_addfb2] [FB:91]
>[   52.845004] [drm:drm_mode_addfb2] [FB:75]
>[   53.094104] [drm:drm_mode_addfb2] [FB:91]
>[   53.312565] [drm:drm_mode_addfb2] [FB:75]
>[   53.344237] [drm:drm_mode_addfb2] [FB:91]
>[   53.594542] [drm:drm_mode_addfb2] [FB:75]
>[   53.846037] [drm:drm_mode_addfb2] [FB:91]
>[   54.096315] [drm:drm_mode_addfb2] [FB:75]
>[   54.345893] [drm:drm_mode_addfb2] [FB:91]
>[   54.596689] [drm:drm_mode_addfb2] [FB:75]
>[   54.828412] [drm:drm_mode_addfb2] [FB:91]
>[   54.847084] [drm:drm_mode_addfb2] [FB:75]
>[   55.028577] [drm:drm_mode_addfb2] [FB:91]
>[   55.095480] [drm:drm_mode_addfb2] [FB:75]
>[   55.112612] [drm:drm_mode_addfb2] [FB:99]
>[   55.263399] [drm:drm_mode_addfb2] [FB:75]
>[   55.361768] [drm:drm_mode_addfb2] [FB:91]
>[   55.428317] [drm:drm_mode_addfb2] [FB:75]
>[   55.611771] [drm:drm_mode_addfb2] [FB:91]
>[   55.861796] [drm:drm_mode_addfb2] [FB:75]
>[   56.111737] [drm:drm_mode_addfb2] [FB:91]
>[   56.263355] [drm:drm_mode_addfb2] [FB:75]
>[   56.361734] [drm:drm_mode_addfb2] [FB:91]
>[   56.463389] [drm:drm_mode_addfb2] [FB:75]
>[   56.612910] [drm:drm_mode_addfb2] [FB:91]
>[   56.678272] [drm:drm_mode_addfb2] [FB:75]
>[   56.846198] [drm:drm_mode_addfb2] [FB:91]
>[   56.862741] [drm:drm_mode_addfb2] [FB:75]
>[   56.945468] [drm:drm_mode_addfb2] [FB:91]
>[   57.075949] [drm:drm_mode_addfb2] [FB:75]
>[   57.094612] [drm:drm_mode_addfb2] [FB:91]
>[   57.112578] [drm:drm_mode_addfb2] [FB:99]

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Attachments on bug 97345: 125979

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