Attachment 128476 Details for Bug 97375 – dmesg with drm.debug=0x1e

dmesg with drm.debug=0x1e

dmesg.txt (text/plain), 189.73 KB, created by M. G. on 2016-12-14 21:20:25 UTC

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Creator: M. G.

Created: 2016-12-14 21:20:25 UTC

Size: 189.73 KB

patch

obsolete

>[42790.627686] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019aa66400
>[42790.627709] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff880275bb00c0 state to ffff88019aa66400
>[42790.627730] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ede0000 state to ffff88019aa66400
>[42790.627748] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff880275bb00c0 to [NOCRTC]
>[42790.627769] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff880275bb00c0
>[42790.627786] [drm:drm_atomic_check_only [drm]] checking ffff88019aa66400
>[42790.627811] [drm:drm_atomic_commit [drm]] commiting ffff88019aa66400
>[42790.627843] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019aa66400
>[42790.627862] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019aa66400
>[42790.627900] [drm:drm_mode_setcrtc [drm]] [CRTC:33:pipe A]
>[42790.627925] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:57:HDMI-A-1]
>[42790.627944] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019aa66400
>[42790.627963] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88022a16f000 state to ffff88019aa66400
>[42790.627981] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:25:primary A] ffff8802483a6600 state to ffff88019aa66400
>[42790.628001] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:] for CRTC state ffff88022a16f000
>[42790.628019] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8802483a6600 to [CRTC:33:pipe A]
>[42790.628036] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:77] for plane state ffff8802483a6600
>[42790.628054] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:33:pipe A] to ffff88019aa66400
>[42790.628075] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:57] ffff88022a37dbc0 state to ffff88019aa66400
>[42790.628093] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff88022a37dbc0 to [NOCRTC]
>[42790.628111] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff88022a37dbc0 to [CRTC:33:pipe A]
>[42790.628128] [drm:drm_atomic_check_only [drm]] checking ffff88019aa66400
>[42790.628144] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:57:HDMI-A-1]
>[42790.628154] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:57:HDMI-A-1] keeps [ENCODER:56:HDMI B], now on [CRTC:33:pipe A]
>[42790.628162] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:33:pipe A] active changed
>[42790.628171] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:33:pipe A] needs all connectors, enable: y, active: y
>[42790.628191] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:33:pipe A] to ffff88019aa66400
>[42790.628212] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:33:pipe A] to ffff88019aa66400
>[42790.628275] [drm:intel_atomic_check [i915]] [CONNECTOR:57:HDMI-A-1] checking for sink bpp constrains
>[42790.628332] [drm:intel_atomic_check [i915]] clamping display bpp (was 30) to default limit of 24
>[42790.628375] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
>[42790.628418] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpc to 24 for HDMI
>[42790.628475] [drm:intel_atomic_check [i915]] hw max bpp: 30, pipe bpp: 24, dithering: 0
>[42790.628516] [drm:intel_dump_pipe_config [i915]] [CRTC:33:pipe A][modeset]
>[42790.628548] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 24, dithering: 0
>[42790.628579] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[42790.628610] [drm:intel_dump_pipe_config [i915]] requested mode:
>[42790.628623] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x0 0x9
>[42790.628654] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[42790.628667] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x0 0x9
>[42790.628700] [drm:intel_dump_pipe_config [i915]] crtc timings: 154000 1920 1968 2000 2080 1200 1203 1209 1235, type: 0x0 flags: 0x9
>[42790.628732] [drm:intel_dump_pipe_config [i915]] port clock: 154000, pipe src size: 1920x1200
>[42790.628764] [drm:intel_dump_pipe_config [i915]] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[42790.628795] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[42790.628827] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: dpll: 0xb0002000, dpll_md: 0x0, fp0: 0x0, fp1: 0x0
>[42790.628858] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[42790.628891] [drm:intel_dump_pipe_config [i915]] [PLANE:25:primary A] FB:72, fb = 1920x1200 format = XR24 little-endian (0x34325258)
>[42790.628923] [drm:intel_dump_pipe_config [i915]] [PLANE:27:sprite A] disabled, scaler_id = 0
>[42790.628954] [drm:intel_dump_pipe_config [i915]] [PLANE:29:sprite B] disabled, scaler_id = 0
>[42790.628986] [drm:intel_dump_pipe_config [i915]] [PLANE:31:cursor A] disabled, scaler_id = 0
>[42790.629001] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe B] ffff88011ee59000 state to ffff88019aa66400
>[42790.629014] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe C] ffff88024af29800 state to ffff88019aa66400
>[42790.629051] [drm:intel_atomic_check [i915]] New cdclk calculated to be atomic 266667, actual 266667
>[42790.629085] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:25:primary A] with fb 77
>[42790.629117] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:25:primary A] visible 0 -> 1, off 0, on 1, ms 1
>[42790.629136] [drm:drm_atomic_commit [drm]] commiting ffff88019aa66400
>[42790.629178] [drm:intel_power_well_enable [i915]] enabling always-on
>[42790.629209] [drm:intel_power_well_enable [i915]] enabling display
>[42790.631658] [drm:i915_redisable_vga_power_on [i915]] Something enabled VGA plane, disabling it
>[42790.632031] [drm:intel_power_well_enable [i915]] enabling dpio-common-bc
>[42790.641324] [drm:chv_dpio_cmn_power_well_enable [i915]] Enabled DPIO PHY0 (PHY_CONTROL=0x050007fd)
>[42790.645282] [drm:intel_update_cdclk [i915]] Current CD clock rate: 266667 kHz
>[42790.645320] [drm:intel_atomic_commit_tail [i915]] [ENCODER:52:DP B]
>[42790.645428] [drm:intel_atomic_commit_tail [i915]] [ENCODER:56:HDMI B]
>[42790.645506] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP C]
>[42790.645539] [drm:intel_atomic_commit_tail [i915]] [ENCODER:65:DP D]
>[42790.645570] [drm:intel_atomic_commit_tail [i915]] [ENCODER:67:HDMI D]
>[42790.645614] [drm:chv_phy_powergate_lanes [i915]] Power gating DPIO PHY0 CH0 lanes 0x0 (PHY_CONTROL=0x0d0007fd)
>[42790.702653] [drm:vlv_pipe_set_fifo_size [i915]] Pipe A FIFO split 511 / 511 / 511
>[42790.702707] [drm:vlv_update_wm [i915]] Setting FIFO watermarks - A: plane=391, cursor=63, sprite0=0, sprite1=0, SR: plane=0, cursor=0 level=1 cxsr=0
>[42790.702754] [drm:intel_enable_pipe [i915]] enabling pipe A
>[42790.719928] [drm:verify_connector_state.isra.61 [i915]] [CONNECTOR:57:HDMI-A-1]
>[42790.719990] [drm:intel_atomic_commit_tail [i915]] [CRTC:33:pipe A]
>[42790.727149] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019aa66400
>[42790.727178] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019aa66400
>[42790.727264] [drm:intel_dp_detect [i915]] [CONNECTOR:60:eDP-1]
>[42790.727311] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source no, sink no
>[42790.727356] [drm:intel_dp_print_rates [i915]] source rates: 162000, 270000
>[42790.727400] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[42790.727443] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[42790.727493] [drm:edp_panel_vdd_on [i915]] Turning eDP port C VDD on
>[42790.727538] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[42790.727590] [drm:vlv_power_sequencer_pipe [i915]] picked pipe A power sequencer for port C
>[42790.727623] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x86400001, PP_OFF 0x1f40001, PP_DIV 0x270f08
>[42790.727653] [drm:vlv_power_sequencer_pipe [i915]] kicking pipe A power sequencer for port C
>[42790.727690] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 08000001 control abcd0000
>[42791.271776] [drm:wait_panel_status [i915]] Wait complete
>[42791.271814] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[42791.271845] [drm:edp_panel_vdd_on [i915]] eDP port C panel power wasn't enabled
>[42791.368280] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00100000, dig 0x00100000, pins 0x00000040
>[42791.368314] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - long
>[42791.368344] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 6 - cnt: 0
>[42791.368381] [drm:intel_set_cpu_fifo_underrun_reporting [i915]] *ERROR* pipe A underrun
>[42791.368411] [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR* CPU pipe A FIFO underrun
>[42791.368817] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port C
>[42791.443117] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-00-00(NS) dev-ID  HW-rev 0.0 SW-rev 0.0
>[42791.443487] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:60:eDP-1] status updated from connected to connected
>[42791.443517] [drm:intel_dp_detect [i915]] [CONNECTOR:53:DP-1]
>[42791.446003] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.448488] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.450975] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.453673] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.456163] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.458649] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.461137] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.463642] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.466129] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.468612] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.471149] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.473639] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.476129] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.478615] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.481122] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.483610] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.486095] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.488624] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.491111] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.493611] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.496140] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.498616] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.501093] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.503640] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.506119] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.508594] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.511091] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.513616] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.516096] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.518573] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.521102] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.523590] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.523602] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[42791.523611] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:53:DP-1] status updated from disconnected to disconnected
>[42791.523640] [drm:intel_hdmi_detect [i915]] [CONNECTOR:57:HDMI-A-1]
>[42791.536404] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[42791.536440] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[42791.536684] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[42791.536694] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[42791.536706] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:57:HDMI-A-1] status updated from connected to connected
>[42791.536736] [drm:intel_dp_detect [i915]] [CONNECTOR:66:DP-2]
>[42791.536767] [drm:intel_power_well_enable [i915]] enabling dpio-common-d
>[42791.538931] [drm:chv_dpio_cmn_power_well_enable [i915]] Enabled DPIO PHY1 (PHY_CONTROL=0x0d0007ff)
>[42791.543644] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.546161] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.548660] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.551142] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.553658] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.556137] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.558613] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.561107] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.563596] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.566074] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.568598] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.571074] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.573557] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.576034] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.578521] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.581001] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.583563] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.586041] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.588518] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.590993] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.593533] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.596014] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.598490] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.600968] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.603582] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.606061] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.608552] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.611130] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.613711] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.616223] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.618733] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.621215] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42791.621227] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[42791.621259] [drm:intel_power_well_disable [i915]] disabling dpio-common-d
>[42791.623035] [drm:chv_dpio_cmn_power_well_disable [i915]] Disabled DPIO PHY1 (PHY_CONTROL=0x0d0007fd)
>[42791.623062] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:66:DP-2] status updated from disconnected to disconnected
>[42791.623098] [drm:intel_hdmi_detect [i915]] [CONNECTOR:68:HDMI-A-2]
>[42791.623299] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus panel] NAK for addr: 0050 w(1)
>[42791.623327] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus panel] NAK on first message, retry
>[42791.623517] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus panel] NAK for addr: 0050 w(1)
>[42791.623533] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus panel
>[42791.623742] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus panel] NAK for addr: 0040 w(1)
>[42791.623776] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus panel] NAK on first message, retry
>[42791.624073] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus panel] NAK for addr: 0040 w(1)
>[42791.624081] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[42791.624088] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:68:HDMI-A-2] status updated from disconnected to disconnected
>[42791.624120] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801235e2000
>[42791.624135] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88012b16e800 state to ffff8801235e2000
>[42791.624147] [drm:drm_atomic_check_only [drm]] checking ffff8801235e2000
>[42791.624164] [drm:drm_atomic_commit [drm]] commiting ffff8801235e2000
>[42791.628483] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801235e2000
>[42791.628498] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801235e2000
>[42791.628643] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801235e2000
>[42791.628658] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff8802483a66c0 state to ffff8801235e2000
>[42791.628671] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88022a16f000 state to ffff8801235e2000
>[42791.628683] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8802483a66c0 to [CRTC:33:pipe A]
>[42791.628694] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff8802483a66c0
>[42791.628706] [drm:drm_atomic_check_only [drm]] checking ffff8801235e2000
>[42791.628754] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42791.628785] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 0 -> 1, off 0, on 1, ms 0
>[42791.628798] [drm:drm_atomic_commit [drm]] commiting ffff8801235e2000
>[42791.628847] [drm:vlv_pipe_set_fifo_size [i915]] Pipe A FIFO split 511 / 511 / 511
>[42791.628890] [drm:vlv_update_wm [i915]] Setting FIFO watermarks - A: plane=391, cursor=0, sprite0=0, sprite1=0, SR: plane=1415, cursor=0 level=1 cxsr=1
>[42791.628921] [drm:_intel_set_memory_cxsr [i915]] memory self-refresh is enabled (was disabled)
>[42791.628960] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801235e2000
>[42791.628973] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801235e2000
>[42791.681442] [drm:drm_mode_addfb2 [drm]] [FB:75]
>[42791.825884] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff880273ae8000
>[42791.825917] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024ada6800 state to ffff880273ae8000
>[42791.825937] [drm:drm_atomic_check_only [drm]] checking ffff880273ae8000
>[42791.825961] [drm:drm_atomic_commit [drm]] commiting ffff880273ae8000
>[42791.828986] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff880273ae8000
>[42791.829066] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff880273ae8000
>[42792.731214] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801235e2400
>[42792.731230] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82480 state to ffff8801235e2400
>[42792.731245] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff880276719000 state to ffff8801235e2400
>[42792.731256] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82480 to [CRTC:33:pipe A]
>[42792.731268] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82480
>[42792.731279] [drm:drm_atomic_check_only [drm]] checking ffff8801235e2400
>[42792.731324] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42792.731362] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42792.731376] [drm:drm_atomic_commit [drm]] commiting ffff8801235e2400
>[42792.731420] [drm:vlv_pipe_set_fifo_size [i915]] Pipe A FIFO split 511 / 511 / 511
>[42792.731486] [drm:vlv_pipe_set_fifo_size [i915]] Pipe A FIFO split 511 / 511 / 511
>[42792.731504] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801235e2400
>[42792.731517] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801235e2400
>[42792.747219] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801235e2400
>[42792.747235] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff8802483a66c0 state to ffff8801235e2400
>[42792.747249] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024af5a000 state to ffff8801235e2400
>[42792.747261] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8802483a66c0 to [CRTC:33:pipe A]
>[42792.747272] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff8802483a66c0
>[42792.747284] [drm:drm_atomic_check_only [drm]] checking ffff8801235e2400
>[42792.747328] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42792.747365] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42792.747379] [drm:drm_atomic_commit [drm]] commiting ffff8801235e2400
>[42792.747422] [drm:vlv_pipe_set_fifo_size [i915]] Pipe A FIFO split 511 / 511 / 511
>[42792.747486] [drm:vlv_pipe_set_fifo_size [i915]] Pipe A FIFO split 511 / 511 / 511
>[42792.747504] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801235e2400
>[42792.747516] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801235e2400
>[42792.763317] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801235e2400
>[42792.763333] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82480 state to ffff8801235e2400
>[42792.763347] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff880276719000 state to ffff8801235e2400
>[42792.763359] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82480 to [CRTC:33:pipe A]
>[42792.763370] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82480
>[42792.763381] [drm:drm_atomic_check_only [drm]] checking ffff8801235e2400
>[42792.763425] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42792.763462] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42792.763475] [drm:drm_atomic_commit [drm]] commiting ffff8801235e2400
>[42792.763519] [drm:vlv_pipe_set_fifo_size [i915]] Pipe A FIFO split 511 / 511 / 511
>[42792.763583] [drm:vlv_pipe_set_fifo_size [i915]] Pipe A FIFO split 511 / 511 / 511
>[42792.763601] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801235e2400
>[42792.763614] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801235e2400
>[42792.763782] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801235e2400
>[42792.763795] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff8802483a66c0 state to ffff8801235e2400
>[42792.763815] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024af5a000 state to ffff8801235e2400
>[42792.763827] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8802483a66c0 to [CRTC:33:pipe A]
>[42792.763838] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff8802483a66c0
>[42792.763849] [drm:drm_atomic_check_only [drm]] checking ffff8801235e2400
>[42792.763888] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42792.763920] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42792.763933] [drm:drm_atomic_commit [drm]] commiting ffff8801235e2400
>[42792.763977] [drm:vlv_pipe_set_fifo_size [i915]] Pipe A FIFO split 511 / 511 / 511
>[42792.764033] [drm:vlv_pipe_set_fifo_size [i915]] Pipe A FIFO split 511 / 511 / 511
>[42792.764051] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801235e2400
>[42792.764071] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801235e2400
>[42792.779209] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801235e2400
>[42792.779225] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82240 state to ffff8801235e2400
>[42792.779240] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff880276719000 state to ffff8801235e2400
>[42792.779251] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82240 to [CRTC:33:pipe A]
>[42792.779263] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82240
>[42792.779274] [drm:drm_atomic_check_only [drm]] checking ffff8801235e2400
>[42792.779319] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42792.779355] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42792.779369] [drm:drm_atomic_commit [drm]] commiting ffff8801235e2400
>[42792.779414] [drm:vlv_pipe_set_fifo_size [i915]] Pipe A FIFO split 511 / 511 / 511
>[42792.779478] [drm:vlv_pipe_set_fifo_size [i915]] Pipe A FIFO split 511 / 511 / 511
>[42792.779495] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801235e2400
>[42792.779508] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801235e2400
>[42792.781039] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801235e2400
>[42792.781065] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff8802483a66c0 state to ffff8801235e2400
>[42792.781080] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024af5a000 state to ffff8801235e2400
>[42792.781092] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8802483a66c0 to [CRTC:33:pipe A]
>[42792.781103] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff8802483a66c0
>[42792.781115] [drm:drm_atomic_check_only [drm]] checking ffff8801235e2400
>[42792.781159] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42792.781190] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42792.781210] [drm:drm_atomic_commit [drm]] commiting ffff8801235e2400
>[42792.781254] [drm:vlv_pipe_set_fifo_size [i915]] Pipe A FIFO split 511 / 511 / 511
>[42792.781314] [drm:vlv_pipe_set_fifo_size [i915]] Pipe A FIFO split 511 / 511 / 511
>[42792.781337] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801235e2400
>[42792.781350] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801235e2400
>[42792.795239] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801235e2400
>[42792.795254] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82240 state to ffff8801235e2400
>[42792.795269] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff880276719000 state to ffff8801235e2400
>[42792.795281] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82240 to [CRTC:33:pipe A]
>[42792.795293] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82240
>[42792.795304] [drm:drm_atomic_check_only [drm]] checking ffff8801235e2400
>[42792.795355] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42792.795386] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42792.795400] [drm:drm_atomic_commit [drm]] commiting ffff8801235e2400
>[42792.795443] [drm:vlv_pipe_set_fifo_size [i915]] Pipe A FIFO split 511 / 511 / 511
>[42792.795507] [drm:vlv_pipe_set_fifo_size [i915]] Pipe A FIFO split 511 / 511 / 511
>[42792.795524] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801235e2400
>[42792.795537] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801235e2400
>[42792.797063] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801235e2400
>[42792.797089] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff8802483a66c0 state to ffff8801235e2400
>[42792.797104] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024af5a000 state to ffff8801235e2400
>[42792.797115] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8802483a66c0 to [CRTC:33:pipe A]
>[42792.797127] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff8802483a66c0
>[42792.797138] [drm:drm_atomic_check_only [drm]] checking ffff8801235e2400
>[42792.797183] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42792.797220] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42792.797233] [drm:drm_atomic_commit [drm]] commiting ffff8801235e2400
>[42792.797283] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801235e2400
>[42792.797296] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801235e2400
>[42792.811284] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801235e2400
>[42792.811300] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82240 state to ffff8801235e2400
>[42792.811320] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff880276719000 state to ffff8801235e2400
>[42792.811332] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82240 to [CRTC:33:pipe A]
>[42792.811343] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82240
>[42792.811355] [drm:drm_atomic_check_only [drm]] checking ffff8801235e2400
>[42792.811399] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42792.811431] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42792.811449] [drm:drm_atomic_commit [drm]] commiting ffff8801235e2400
>[42792.811499] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801235e2400
>[42792.811512] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801235e2400
>[42792.813109] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801235e2400
>[42792.813127] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff8802483a66c0 state to ffff8801235e2400
>[42792.813144] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024af5a000 state to ffff8801235e2400
>[42792.813156] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8802483a66c0 to [CRTC:33:pipe A]
>[42792.813167] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff8802483a66c0
>[42792.813179] [drm:drm_atomic_check_only [drm]] checking ffff8801235e2400
>[42792.813229] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42792.813262] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42792.813277] [drm:drm_atomic_commit [drm]] commiting ffff8801235e2400
>[42792.813332] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801235e2400
>[42792.813348] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801235e2400
>[42792.827368] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801235e2400
>[42792.827384] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82240 state to ffff8801235e2400
>[42792.827399] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88022a245800 state to ffff8801235e2400
>[42792.827411] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82240 to [CRTC:33:pipe A]
>[42792.827422] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82240
>[42792.827438] [drm:drm_atomic_check_only [drm]] checking ffff8801235e2400
>[42792.827482] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42792.827514] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42792.827527] [drm:drm_atomic_commit [drm]] commiting ffff8801235e2400
>[42792.827624] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801235e2400
>[42792.827637] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801235e2400
>[42792.829265] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801235e2400
>[42792.829282] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff8802483a66c0 state to ffff8801235e2400
>[42792.829296] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024af5a000 state to ffff8801235e2400
>[42792.829317] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8802483a66c0 to [CRTC:33:pipe A]
>[42792.829384] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff8802483a66c0
>[42792.829396] [drm:drm_atomic_check_only [drm]] checking ffff8801235e2400
>[42792.829442] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42792.829480] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42792.829494] [drm:drm_atomic_commit [drm]] commiting ffff8801235e2400
>[42792.829804] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801235e2400
>[42792.829821] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801235e2400
>[42792.851195] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801235e2400
>[42792.851210] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82240 state to ffff8801235e2400
>[42792.851225] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88012b216800 state to ffff8801235e2400
>[42792.851237] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82240 to [CRTC:33:pipe A]
>[42792.851249] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82240
>[42792.851260] [drm:drm_atomic_check_only [drm]] checking ffff8801235e2400
>[42792.851304] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42792.851340] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42792.851354] [drm:drm_atomic_commit [drm]] commiting ffff8801235e2400
>[42792.851403] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801235e2400
>[42792.851416] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801235e2400
>[42792.853018] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801235e2400
>[42792.853035] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff8802483a66c0 state to ffff8801235e2400
>[42792.853049] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024af5a000 state to ffff8801235e2400
>[42792.853069] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8802483a66c0 to [CRTC:33:pipe A]
>[42792.853081] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff8802483a66c0
>[42792.853092] [drm:drm_atomic_check_only [drm]] checking ffff8801235e2400
>[42792.853137] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42792.853169] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42792.853187] [drm:drm_atomic_commit [drm]] commiting ffff8801235e2400
>[42792.853235] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801235e2400
>[42792.853248] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801235e2400
>[42792.867257] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801235e2400
>[42792.867272] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82240 state to ffff8801235e2400
>[42792.867287] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88012b216800 state to ffff8801235e2400
>[42792.867299] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82240 to [CRTC:33:pipe A]
>[42792.867316] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82240
>[42792.867327] [drm:drm_atomic_check_only [drm]] checking ffff8801235e2400
>[42792.867372] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42792.867404] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42792.867417] [drm:drm_atomic_commit [drm]] commiting ffff8801235e2400
>[42792.867473] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801235e2400
>[42792.867486] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801235e2400
>[42792.883198] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801235e2400
>[42792.883213] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff8802483a66c0 state to ffff8801235e2400
>[42792.883228] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024af5a000 state to ffff8801235e2400
>[42792.883239] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8802483a66c0 to [CRTC:33:pipe A]
>[42792.883251] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff8802483a66c0
>[42792.883262] [drm:drm_atomic_check_only [drm]] checking ffff8801235e2400
>[42792.883307] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42792.883343] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42792.883357] [drm:drm_atomic_commit [drm]] commiting ffff8801235e2400
>[42792.883407] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801235e2400
>[42792.883420] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801235e2400
>[42792.899238] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801235e2400
>[42792.899254] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82240 state to ffff8801235e2400
>[42792.899268] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88012b216800 state to ffff8801235e2400
>[42792.899280] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82240 to [CRTC:33:pipe A]
>[42792.899292] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82240
>[42792.899308] [drm:drm_atomic_check_only [drm]] checking ffff8801235e2400
>[42792.899353] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42792.899384] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42792.899398] [drm:drm_atomic_commit [drm]] commiting ffff8801235e2400
>[42792.899453] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801235e2400
>[42792.899466] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801235e2400
>[42792.900994] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801235e2400
>[42792.901011] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff8802483a66c0 state to ffff8801235e2400
>[42792.901025] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024af5a000 state to ffff8801235e2400
>[42792.901037] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8802483a66c0 to [CRTC:33:pipe A]
>[42792.901048] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff8802483a66c0
>[42792.901068] [drm:drm_atomic_check_only [drm]] checking ffff8801235e2400
>[42792.901111] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42792.901143] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42792.901156] [drm:drm_atomic_commit [drm]] commiting ffff8801235e2400
>[42792.901211] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801235e2400
>[42792.901223] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801235e2400
>[42792.915205] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801235e2400
>[42792.915220] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82240 state to ffff8801235e2400
>[42792.915235] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88012b216800 state to ffff8801235e2400
>[42792.915247] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82240 to [CRTC:33:pipe A]
>[42792.915258] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82240
>[42792.915270] [drm:drm_atomic_check_only [drm]] checking ffff8801235e2400
>[42792.915314] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42792.915351] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42792.915365] [drm:drm_atomic_commit [drm]] commiting ffff8801235e2400
>[42792.915415] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801235e2400
>[42792.915434] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801235e2400
>[42793.059248] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801235e2400
>[42793.059263] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff8802483a66c0 state to ffff8801235e2400
>[42793.059278] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024af8c000 state to ffff8801235e2400
>[42793.059289] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8802483a66c0 to [CRTC:33:pipe A]
>[42793.059306] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff8802483a66c0
>[42793.059318] [drm:drm_atomic_check_only [drm]] checking ffff8801235e2400
>[42793.059363] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.059394] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.059408] [drm:drm_atomic_commit [drm]] commiting ffff8801235e2400
>[42793.059463] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801235e2400
>[42793.059475] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801235e2400
>[42793.075280] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801235e2400
>[42793.075296] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82240 state to ffff8801235e2400
>[42793.075316] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88019ab7d000 state to ffff8801235e2400
>[42793.075328] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82240 to [CRTC:33:pipe A]
>[42793.075339] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82240
>[42793.075350] [drm:drm_atomic_check_only [drm]] checking ffff8801235e2400
>[42793.075395] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.075426] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.075445] [drm:drm_atomic_commit [drm]] commiting ffff8801235e2400
>[42793.075495] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801235e2400
>[42793.075509] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801235e2400
>[42793.091319] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801235e2400
>[42793.091358] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff8802483a66c0 state to ffff8801235e2400
>[42793.091373] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024af8c000 state to ffff8801235e2400
>[42793.091384] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8802483a66c0 to [CRTC:33:pipe A]
>[42793.091396] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff8802483a66c0
>[42793.091407] [drm:drm_atomic_check_only [drm]] checking ffff8801235e2400
>[42793.091456] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.091487] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.091501] [drm:drm_atomic_commit [drm]] commiting ffff8801235e2400
>[42793.091551] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801235e2400
>[42793.091569] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801235e2400
>[42793.107183] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898400
>[42793.107206] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82480 state to ffff88019a898400
>[42793.107221] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff880132f0b000 state to ffff88019a898400
>[42793.107233] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82480 to [CRTC:33:pipe A]
>[42793.107245] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82480
>[42793.107256] [drm:drm_atomic_check_only [drm]] checking ffff88019a898400
>[42793.107300] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.107336] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.107350] [drm:drm_atomic_commit [drm]] commiting ffff88019a898400
>[42793.107386] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898400
>[42793.107399] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898400
>[42793.123189] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff880275980c00
>[42793.123212] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82840 state to ffff880275980c00
>[42793.123227] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff880275a52000 state to ffff880275980c00
>[42793.123238] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82840 to [CRTC:33:pipe A]
>[42793.123250] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82840
>[42793.123261] [drm:drm_atomic_check_only [drm]] checking ffff880275980c00
>[42793.123306] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.123342] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.123356] [drm:drm_atomic_commit [drm]] commiting ffff880275980c00
>[42793.123392] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff880275980c00
>[42793.123405] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff880275980c00
>[42793.139161] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff880275980c00
>[42793.139177] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82480 state to ffff880275980c00
>[42793.139198] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff880132f0b000 state to ffff880275980c00
>[42793.139210] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82480 to [CRTC:33:pipe A]
>[42793.139221] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82480
>[42793.139232] [drm:drm_atomic_check_only [drm]] checking ffff880275980c00
>[42793.139276] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.139308] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.139325] [drm:drm_atomic_commit [drm]] commiting ffff880275980c00
>[42793.139370] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff880275980c00
>[42793.139383] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff880275980c00
>[42793.142262] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff880275980c00
>[42793.142279] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82840 state to ffff880275980c00
>[42793.142293] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff880275a52000 state to ffff880275980c00
>[42793.142311] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82840 to [CRTC:33:pipe A]
>[42793.142323] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82840
>[42793.142356] [drm:drm_atomic_check_only [drm]] checking ffff880275980c00
>[42793.142403] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.142435] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.142455] [drm:drm_atomic_commit [drm]] commiting ffff880275980c00
>[42793.142507] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff880275980c00
>[42793.142528] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff880275980c00
>[42793.155237] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff880275980c00
>[42793.155253] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82480 state to ffff880275980c00
>[42793.155268] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff880132f0b000 state to ffff880275980c00
>[42793.155279] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82480 to [CRTC:33:pipe A]
>[42793.155291] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82480
>[42793.155302] [drm:drm_atomic_check_only [drm]] checking ffff880275980c00
>[42793.155352] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.155384] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.155398] [drm:drm_atomic_commit [drm]] commiting ffff880275980c00
>[42793.155454] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff880275980c00
>[42793.155468] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff880275980c00
>[42793.171237] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff880275980c00
>[42793.171253] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82840 state to ffff880275980c00
>[42793.171268] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff880275a52000 state to ffff880275980c00
>[42793.171280] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82840 to [CRTC:33:pipe A]
>[42793.171292] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82840
>[42793.171303] [drm:drm_atomic_check_only [drm]] checking ffff880275980c00
>[42793.171353] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.171385] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.171398] [drm:drm_atomic_commit [drm]] commiting ffff880275980c00
>[42793.171455] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff880275980c00
>[42793.171469] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff880275980c00
>[42793.187253] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff880275980c00
>[42793.187270] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82480 state to ffff880275980c00
>[42793.187285] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024ae1f800 state to ffff880275980c00
>[42793.187297] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82480 to [CRTC:33:pipe A]
>[42793.187309] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82480
>[42793.187328] [drm:drm_atomic_check_only [drm]] checking ffff880275980c00
>[42793.187376] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.187408] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.187423] [drm:drm_atomic_commit [drm]] commiting ffff880275980c00
>[42793.187482] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff880275980c00
>[42793.187496] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff880275980c00
>[42793.203220] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.203236] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82d80 state to ffff8801289a1400
>[42793.203251] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88012b172800 state to ffff8801289a1400
>[42793.203263] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82d80 to [CRTC:33:pipe A]
>[42793.203275] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82d80
>[42793.203286] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.203332] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.203364] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.203377] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.203428] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.203441] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.214777] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.214794] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82480 state to ffff8801289a1400
>[42793.214809] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024ae1f800 state to ffff8801289a1400
>[42793.214821] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82480 to [CRTC:33:pipe A]
>[42793.214832] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82480
>[42793.214843] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.214888] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.214919] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.214933] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.214986] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.214999] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.219288] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.219303] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82d80 state to ffff8801289a1400
>[42793.219318] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88012b172800 state to ffff8801289a1400
>[42793.219330] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82d80 to [CRTC:33:pipe A]
>[42793.219341] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82d80
>[42793.219353] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.219397] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.219428] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.219442] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.219493] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.219506] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.235441] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.235457] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82480 state to ffff8801289a1400
>[42793.235472] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024af8c000 state to ffff8801289a1400
>[42793.235484] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82480 to [CRTC:33:pipe A]
>[42793.235495] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82480
>[42793.235507] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.235551] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.235583] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.235596] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.235649] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.235662] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.246418] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.246435] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff880275b13d80 state to ffff8801289a1400
>[42793.246450] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff880132d72800 state to ffff8801289a1400
>[42793.246462] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff880275b13d80 to [CRTC:33:pipe A]
>[42793.246474] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff880275b13d80
>[42793.246485] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.246529] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.246561] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.246574] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.246622] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.246635] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.259205] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.259221] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82d80 state to ffff8801289a1400
>[42793.259236] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024af8c000 state to ffff8801289a1400
>[42793.259248] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82d80 to [CRTC:33:pipe A]
>[42793.259259] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82d80
>[42793.259271] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.259315] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.259347] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.259360] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.259410] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.259423] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.276702] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.276718] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82480 state to ffff8801289a1400
>[42793.276734] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff880132d72800 state to ffff8801289a1400
>[42793.276746] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82480 to [CRTC:33:pipe A]
>[42793.276757] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82480
>[42793.276769] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.276814] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.276845] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.276859] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.276897] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.276910] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.443195] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.443212] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff8802625cbcc0 state to ffff8801289a1400
>[42793.443227] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024ac9d000 state to ffff8801289a1400
>[42793.443238] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8802625cbcc0 to [CRTC:33:pipe A]
>[42793.443250] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff8802625cbcc0
>[42793.443261] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.443305] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.443337] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.443351] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.443403] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.443416] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.467384] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.467399] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82480 state to ffff8801289a1400
>[42793.467414] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff880132d72800 state to ffff8801289a1400
>[42793.467426] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82480 to [CRTC:33:pipe A]
>[42793.467437] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82480
>[42793.467449] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.467495] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.467526] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.467540] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.467592] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.467605] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.483341] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.483356] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff8802625cbcc0 state to ffff8801289a1400
>[42793.483371] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024ac9d000 state to ffff8801289a1400
>[42793.483382] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8802625cbcc0 to [CRTC:33:pipe A]
>[42793.483394] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff8802625cbcc0
>[42793.483405] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.483450] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.483481] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.483495] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.483546] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.483560] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.485640] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.485656] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82480 state to ffff8801289a1400
>[42793.485670] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff880132d72800 state to ffff8801289a1400
>[42793.485682] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82480 to [CRTC:33:pipe A]
>[42793.485694] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82480
>[42793.485705] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.485750] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.485781] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.485795] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.485846] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.485859] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.499219] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.499235] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff8802625cbcc0 state to ffff8801289a1400
>[42793.499250] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024ac9d000 state to ffff8801289a1400
>[42793.499262] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8802625cbcc0 to [CRTC:33:pipe A]
>[42793.499274] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff8802625cbcc0
>[42793.499285] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.499330] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.499362] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.499375] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.499427] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.499440] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.513799] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.513815] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82480 state to ffff8801289a1400
>[42793.513830] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff880132d72800 state to ffff8801289a1400
>[42793.513842] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82480 to [CRTC:33:pipe A]
>[42793.513853] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82480
>[42793.513865] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.513910] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.513941] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.513955] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.514005] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.514018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.515158] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.515173] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff8802625cbcc0 state to ffff8801289a1400
>[42793.515187] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024ac9d000 state to ffff8801289a1400
>[42793.515199] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8802625cbcc0 to [CRTC:33:pipe A]
>[42793.515210] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff8802625cbcc0
>[42793.515222] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.515266] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.515297] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.515311] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.515358] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.515371] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.531210] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.531227] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82480 state to ffff8801289a1400
>[42793.531242] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff880123651000 state to ffff8801289a1400
>[42793.531254] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82480 to [CRTC:33:pipe A]
>[42793.531265] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82480
>[42793.531277] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.531322] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.531353] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.531367] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.531417] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.531430] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.547189] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.547206] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88022a1be180 state to ffff8801289a1400
>[42793.547221] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024ac9d000 state to ffff8801289a1400
>[42793.547233] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88022a1be180 to [CRTC:33:pipe A]
>[42793.547245] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88022a1be180
>[42793.547256] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.547308] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.547340] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.547354] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.547391] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.547404] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.563216] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.563232] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82480 state to ffff8801289a1400
>[42793.563247] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88012fd7b000 state to ffff8801289a1400
>[42793.563259] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82480 to [CRTC:33:pipe A]
>[42793.563271] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82480
>[42793.563282] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.563327] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.563358] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.563373] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.563418] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.563431] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.571887] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.571904] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88022a1be180 state to ffff8801289a1400
>[42793.571919] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024ac9d000 state to ffff8801289a1400
>[42793.571930] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88022a1be180 to [CRTC:33:pipe A]
>[42793.571942] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88022a1be180
>[42793.571953] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.571998] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.572030] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.572043] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.572095] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.572108] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.579323] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.579338] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82480 state to ffff8801289a1400
>[42793.579353] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88012fd7b000 state to ffff8801289a1400
>[42793.579365] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82480 to [CRTC:33:pipe A]
>[42793.579377] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82480
>[42793.579388] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.579433] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.579464] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.579478] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.579530] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.579543] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.581112] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.581128] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88022a1be180 state to ffff8801289a1400
>[42793.581143] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024ac9d000 state to ffff8801289a1400
>[42793.581155] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88022a1be180 to [CRTC:33:pipe A]
>[42793.581166] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88022a1be180
>[42793.581178] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.581222] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.581253] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.581267] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.581319] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.581333] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.595363] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.595379] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82480 state to ffff8801289a1400
>[42793.595394] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88012fd7b000 state to ffff8801289a1400
>[42793.595405] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82480 to [CRTC:33:pipe A]
>[42793.595417] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82480
>[42793.595428] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.595473] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.595505] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.595519] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.595573] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.595586] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.611324] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.611339] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88022a1be180 state to ffff8801289a1400
>[42793.611354] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024ac9d000 state to ffff8801289a1400
>[42793.611366] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88022a1be180 to [CRTC:33:pipe A]
>[42793.611378] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88022a1be180
>[42793.611389] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.611434] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.611465] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.611479] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.611531] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.611545] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.627395] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.627411] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82480 state to ffff8801289a1400
>[42793.627426] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011c2d4800 state to ffff8801289a1400
>[42793.627438] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82480 to [CRTC:33:pipe A]
>[42793.627449] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82480
>[42793.627461] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.627506] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.627537] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.627551] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.627604] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.627617] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.629240] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.629256] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88022a1be180 state to ffff8801289a1400
>[42793.629271] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024ac9d000 state to ffff8801289a1400
>[42793.629283] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88022a1be180 to [CRTC:33:pipe A]
>[42793.629294] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88022a1be180
>[42793.629306] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.629350] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.629381] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.629395] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.629675] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.629688] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.643271] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8802767e9400
>[42793.643287] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82d80 state to ffff8802767e9400
>[42793.643302] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ecb2800 state to ffff8802767e9400
>[42793.643321] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82d80 to [CRTC:33:pipe A]
>[42793.643332] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82d80
>[42793.643344] [drm:drm_atomic_check_only [drm]] checking ffff8802767e9400
>[42793.643394] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.643426] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.643445] [drm:drm_atomic_commit [drm]] commiting ffff8802767e9400
>[42793.643498] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8802767e9400
>[42793.643512] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8802767e9400
>[42793.646405] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8802767e9400
>[42793.646421] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88022a1be180 state to ffff8802767e9400
>[42793.646441] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024ac9d000 state to ffff8802767e9400
>[42793.646452] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88022a1be180 to [CRTC:33:pipe A]
>[42793.646464] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88022a1be180
>[42793.646475] [drm:drm_atomic_check_only [drm]] checking ffff8802767e9400
>[42793.646520] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.646552] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.646570] [drm:drm_atomic_commit [drm]] commiting ffff8802767e9400
>[42793.646617] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8802767e9400
>[42793.646630] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8802767e9400
>[42793.667159] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8802767e9400
>[42793.667182] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82240 state to ffff8802767e9400
>[42793.667196] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ecb2800 state to ffff8802767e9400
>[42793.667208] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82240 to [CRTC:33:pipe A]
>[42793.667219] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82240
>[42793.667230] [drm:drm_atomic_check_only [drm]] checking ffff8802767e9400
>[42793.667274] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.667306] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.667324] [drm:drm_atomic_commit [drm]] commiting ffff8802767e9400
>[42793.667358] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8802767e9400
>[42793.667371] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8802767e9400
>[42793.669410] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8802767e9400
>[42793.669426] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88022a1be180 state to ffff8802767e9400
>[42793.669451] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024ac9d000 state to ffff8802767e9400
>[42793.669463] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88022a1be180 to [CRTC:33:pipe A]
>[42793.669475] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88022a1be180
>[42793.669486] [drm:drm_atomic_check_only [drm]] checking ffff8802767e9400
>[42793.669530] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.669562] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.669580] [drm:drm_atomic_commit [drm]] commiting ffff8802767e9400
>[42793.669617] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8802767e9400
>[42793.669630] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8802767e9400
>[42793.683252] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8802767e9400
>[42793.683269] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82d80 state to ffff8802767e9400
>[42793.683284] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ecb2800 state to ffff8802767e9400
>[42793.683296] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82d80 to [CRTC:33:pipe A]
>[42793.683314] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82d80
>[42793.683325] [drm:drm_atomic_check_only [drm]] checking ffff8802767e9400
>[42793.683371] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.683403] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.683417] [drm:drm_atomic_commit [drm]] commiting ffff8802767e9400
>[42793.683475] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8802767e9400
>[42793.683489] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8802767e9400
>[42793.699196] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.699212] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88022a1be180 state to ffff8801289a1400
>[42793.699227] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024ac9d000 state to ffff8801289a1400
>[42793.699239] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88022a1be180 to [CRTC:33:pipe A]
>[42793.699250] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88022a1be180
>[42793.699262] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.699308] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.699347] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.699361] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.699416] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.699436] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.703979] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8801289a1400
>[42793.703996] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82d80 state to ffff8801289a1400
>[42793.704011] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ecb2800 state to ffff8801289a1400
>[42793.704022] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82d80 to [CRTC:33:pipe A]
>[42793.704034] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82d80
>[42793.704045] [drm:drm_atomic_check_only [drm]] checking ffff8801289a1400
>[42793.704096] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.704127] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.704141] [drm:drm_atomic_commit [drm]] commiting ffff8801289a1400
>[42793.704197] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8801289a1400
>[42793.704210] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8801289a1400
>[42793.715262] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8802765f2800
>[42793.715279] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88022a1be180 state to ffff8802765f2800
>[42793.715294] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024ac9d000 state to ffff8802765f2800
>[42793.715313] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88022a1be180 to [CRTC:33:pipe A]
>[42793.715324] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88022a1be180
>[42793.715336] [drm:drm_atomic_check_only [drm]] checking ffff8802765f2800
>[42793.715382] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.715414] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.715433] [drm:drm_atomic_commit [drm]] commiting ffff8802765f2800
>[42793.715486] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8802765f2800
>[42793.715500] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8802765f2800
>[42793.731225] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42793.731242] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82240 state to ffff88019a898000
>[42793.731257] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ecb2800 state to ffff88019a898000
>[42793.731269] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82240 to [CRTC:33:pipe A]
>[42793.731280] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82240
>[42793.731292] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42793.731363] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.731395] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.731408] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42793.731453] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42793.731467] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42793.733772] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42793.733788] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88022a1be180 state to ffff88019a898000
>[42793.733802] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024ac9d000 state to ffff88019a898000
>[42793.733822] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88022a1be180 to [CRTC:33:pipe A]
>[42793.733834] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88022a1be180
>[42793.733845] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42793.733889] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.733921] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.733939] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42793.733974] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42793.733987] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42793.747162] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42793.747184] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82d80 state to ffff88019a898000
>[42793.747199] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ecb2800 state to ffff88019a898000
>[42793.747211] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82d80 to [CRTC:33:pipe A]
>[42793.747222] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82d80
>[42793.747234] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42793.747277] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.747309] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.747328] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42793.747369] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42793.747382] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42793.763169] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42793.763184] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88022a1be180 state to ffff88019a898000
>[42793.763205] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024ac9d000 state to ffff88019a898000
>[42793.763217] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88022a1be180 to [CRTC:33:pipe A]
>[42793.763228] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88022a1be180
>[42793.763240] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42793.763285] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.763317] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.763335] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42793.763386] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42793.763398] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42793.819258] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42793.819274] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82d80 state to ffff88019a898000
>[42793.819288] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ecb2800 state to ffff88019a898000
>[42793.819300] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82d80 to [CRTC:33:pipe A]
>[42793.819317] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82d80
>[42793.819328] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42793.819372] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.819404] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.819418] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42793.819471] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42793.819484] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42793.835216] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42793.835232] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88022a1be180 state to ffff88019a898000
>[42793.835246] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff8801234f2800 state to ffff88019a898000
>[42793.835258] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88022a1be180 to [CRTC:33:pipe A]
>[42793.835269] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88022a1be180
>[42793.835281] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42793.835331] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.835362] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.835376] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42793.835426] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42793.835444] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42793.851320] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42793.851335] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82d80 state to ffff88019a898000
>[42793.851350] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ecb2800 state to ffff88019a898000
>[42793.851362] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82d80 to [CRTC:33:pipe A]
>[42793.851373] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82d80
>[42793.851384] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42793.851429] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.851466] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.851480] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42793.851529] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42793.851542] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42793.867160] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42793.867174] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88022a1be180 state to ffff88019a898000
>[42793.867195] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff8801234f2800 state to ffff88019a898000
>[42793.867206] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88022a1be180 to [CRTC:33:pipe A]
>[42793.867218] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88022a1be180
>[42793.867229] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42793.867274] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.867305] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.867323] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42793.867371] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42793.867384] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42793.868744] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42793.868758] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82d80 state to ffff88019a898000
>[42793.868770] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ecb2800 state to ffff88019a898000
>[42793.868782] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82d80 to [CRTC:33:pipe A]
>[42793.868793] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82d80
>[42793.868809] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42793.868847] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.868879] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.868891] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42793.868927] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42793.868945] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42793.883214] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42793.883229] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88022a1be180 state to ffff88019a898000
>[42793.883243] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff8801234f2800 state to ffff88019a898000
>[42793.883255] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88022a1be180 to [CRTC:33:pipe A]
>[42793.883266] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88022a1be180
>[42793.883277] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42793.883321] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.883358] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.883372] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42793.883418] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42793.883436] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42793.899227] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42793.899241] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82d80 state to ffff88019a898000
>[42793.899255] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ecb2800 state to ffff88019a898000
>[42793.899267] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82d80 to [CRTC:33:pipe A]
>[42793.899279] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82d80
>[42793.899290] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42793.899339] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.899370] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.899383] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42793.899427] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42793.899445] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42793.915250] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42793.915264] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88022a1be180 state to ffff88019a898000
>[42793.915278] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff8801234f2800 state to ffff88019a898000
>[42793.915290] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88022a1be180 to [CRTC:33:pipe A]
>[42793.915306] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88022a1be180
>[42793.915318] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42793.915362] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.915393] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.915406] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42793.915454] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42793.915467] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42793.916959] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42793.916973] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82d80 state to ffff88019a898000
>[42793.916986] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ecb2800 state to ffff88019a898000
>[42793.916998] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82d80 to [CRTC:33:pipe A]
>[42793.917009] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82d80
>[42793.917020] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42793.917118] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.917169] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.917186] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42793.917222] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42793.917235] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42793.931259] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42793.931274] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88022a1be180 state to ffff88019a898000
>[42793.931288] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff8801234f2800 state to ffff88019a898000
>[42793.931306] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88022a1be180 to [CRTC:33:pipe A]
>[42793.931317] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88022a1be180
>[42793.931329] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42793.931373] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.931405] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.931418] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42793.931469] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42793.931482] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42793.947222] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42793.947237] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82d80 state to ffff88019a898000
>[42793.947251] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ecb2800 state to ffff88019a898000
>[42793.947263] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82d80 to [CRTC:33:pipe A]
>[42793.947274] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82d80
>[42793.947286] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42793.947337] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.947369] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.947382] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42793.947436] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42793.947449] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42793.954614] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42793.954629] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88022a1be180 state to ffff88019a898000
>[42793.954643] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff8801234f2800 state to ffff88019a898000
>[42793.954655] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88022a1be180 to [CRTC:33:pipe A]
>[42793.954666] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88022a1be180
>[42793.954683] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42793.954727] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.954758] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.954771] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42793.954820] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42793.954833] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42793.971234] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42793.971249] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82d80 state to ffff88019a898000
>[42793.971264] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ecb2800 state to ffff88019a898000
>[42793.971276] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82d80 to [CRTC:33:pipe A]
>[42793.971287] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82d80
>[42793.971304] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42793.971349] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.971380] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.971394] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42793.971448] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42793.971461] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42793.987222] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42793.987237] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88022a1be180 state to ffff88019a898000
>[42793.987252] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff8801234f2800 state to ffff88019a898000
>[42793.987263] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88022a1be180 to [CRTC:33:pipe A]
>[42793.987275] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88022a1be180
>[42793.987286] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42793.987337] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.987369] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.987382] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42793.987434] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42793.987447] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42793.989065] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42793.989078] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82d80 state to ffff88019a898000
>[42793.989091] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ecb2800 state to ffff88019a898000
>[42793.989103] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82d80 to [CRTC:33:pipe A]
>[42793.989114] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82d80
>[42793.989125] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42793.989164] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42793.989200] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42793.989213] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42793.989247] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42793.989259] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42794.003316] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42794.003336] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88022a1be180 state to ffff88019a898000
>[42794.003351] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff8801234f2800 state to ffff88019a898000
>[42794.003362] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88022a1be180 to [CRTC:33:pipe A]
>[42794.003374] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88022a1be180
>[42794.003385] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42794.003430] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42794.003467] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42794.003480] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42794.003530] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42794.003542] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42794.019214] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42794.019229] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82d80 state to ffff88019a898000
>[42794.019243] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ecb2800 state to ffff88019a898000
>[42794.019255] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82d80 to [CRTC:33:pipe A]
>[42794.019267] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82d80
>[42794.019278] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42794.019328] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42794.019360] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42794.019374] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42794.019426] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42794.019439] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42794.035248] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42794.035263] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88022a1be180 state to ffff88019a898000
>[42794.035278] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff8801234f2800 state to ffff88019a898000
>[42794.035290] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88022a1be180 to [CRTC:33:pipe A]
>[42794.035306] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88022a1be180
>[42794.035318] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42794.035363] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42794.035395] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42794.035408] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42794.035464] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42794.035477] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42794.051230] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42794.051245] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82d80 state to ffff88019a898000
>[42794.051260] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ecb2800 state to ffff88019a898000
>[42794.051272] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82d80 to [CRTC:33:pipe A]
>[42794.051283] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82d80
>[42794.051295] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42794.051345] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42794.051377] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42794.051390] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42794.051444] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42794.051457] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42794.067190] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42794.067205] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88022a1be180 state to ffff88019a898000
>[42794.067219] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff8801234f2800 state to ffff88019a898000
>[42794.067231] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88022a1be180 to [CRTC:33:pipe A]
>[42794.067243] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88022a1be180
>[42794.067254] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42794.067298] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42794.067335] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42794.067349] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42794.067397] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42794.067410] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42794.069085] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42794.069098] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82d80 state to ffff88019a898000
>[42794.069111] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ecb2800 state to ffff88019a898000
>[42794.069123] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82d80 to [CRTC:33:pipe A]
>[42794.069134] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82d80
>[42794.069145] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42794.069183] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42794.069220] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42794.069232] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42794.069267] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42794.069280] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42794.083270] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42794.083286] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88022a1be180 state to ffff88019a898000
>[42794.083306] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff8801234f2800 state to ffff88019a898000
>[42794.083317] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88022a1be180 to [CRTC:33:pipe A]
>[42794.083329] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88022a1be180
>[42794.083340] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42794.083386] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42794.083418] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42794.083436] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42794.083485] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42794.083498] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42794.086159] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42794.086182] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82d80 state to ffff88019a898000
>[42794.086263] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ecb2800 state to ffff88019a898000
>[42794.086313] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82d80 to [CRTC:33:pipe A]
>[42794.086329] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82d80
>[42794.086341] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42794.086383] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42794.086414] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42794.086432] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42794.086470] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42794.086483] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42794.099209] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898000
>[42794.099225] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88022a1be180 state to ffff88019a898000
>[42794.099239] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff8801234f2800 state to ffff88019a898000
>[42794.099250] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88022a1be180 to [CRTC:33:pipe A]
>[42794.099262] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88022a1be180
>[42794.099273] [drm:drm_atomic_check_only [drm]] checking ffff88019a898000
>[42794.099318] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42794.099354] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42794.099368] [drm:drm_atomic_commit [drm]] commiting ffff88019a898000
>[42794.099415] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898000
>[42794.099433] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898000
>[42794.115308] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff880273ae8000
>[42794.115329] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82d80 state to ffff880273ae8000
>[42794.115344] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ecb2800 state to ffff880273ae8000
>[42794.115355] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82d80 to [CRTC:33:pipe A]
>[42794.115367] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82d80
>[42794.115378] [drm:drm_atomic_check_only [drm]] checking ffff880273ae8000
>[42794.115423] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42794.115459] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42794.115473] [drm:drm_atomic_commit [drm]] commiting ffff880273ae8000
>[42794.115520] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff880273ae8000
>[42794.115533] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff880273ae8000
>[42794.131262] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff880273b58800
>[42794.131277] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88022a1be180 state to ffff880273b58800
>[42794.131292] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff8801234f2800 state to ffff880273b58800
>[42794.131309] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88022a1be180 to [CRTC:33:pipe A]
>[42794.131321] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88022a1be180
>[42794.131332] [drm:drm_atomic_check_only [drm]] checking ffff880273b58800
>[42794.131378] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42794.131410] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42794.131423] [drm:drm_atomic_commit [drm]] commiting ffff880273b58800
>[42794.131476] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff880273b58800
>[42794.131488] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff880273b58800
>[42794.141112] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8802738d3800
>[42794.141128] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82240 state to ffff8802738d3800
>[42794.141142] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ecb2800 state to ffff8802738d3800
>[42794.141154] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82240 to [CRTC:33:pipe A]
>[42794.141165] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82240
>[42794.141177] [drm:drm_atomic_check_only [drm]] checking ffff8802738d3800
>[42794.141226] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42794.141262] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42794.141275] [drm:drm_atomic_commit [drm]] commiting ffff8802738d3800
>[42794.141313] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8802738d3800
>[42794.141326] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8802738d3800
>[42794.147294] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff880273b58c00
>[42794.147315] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82d80 state to ffff880273b58c00
>[42794.147329] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff8801234f2800 state to ffff880273b58c00
>[42794.147341] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82d80 to [CRTC:33:pipe A]
>[42794.147352] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82d80
>[42794.147364] [drm:drm_atomic_check_only [drm]] checking ffff880273b58c00
>[42794.147407] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42794.147439] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42794.147457] [drm:drm_atomic_commit [drm]] commiting ffff880273b58c00
>[42794.147496] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff880273b58c00
>[42794.147509] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff880273b58c00
>[42794.171229] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff880273b58c00
>[42794.171244] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82240 state to ffff880273b58c00
>[42794.171258] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ecb2800 state to ffff880273b58c00
>[42794.171270] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82240 to [CRTC:33:pipe A]
>[42794.171281] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82240
>[42794.171293] [drm:drm_atomic_check_only [drm]] checking ffff880273b58c00
>[42794.171343] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42794.171374] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42794.171388] [drm:drm_atomic_commit [drm]] commiting ffff880273b58c00
>[42794.171437] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff880273b58c00
>[42794.171450] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff880273b58c00
>[42794.187243] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff880273b58c00
>[42794.187258] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82d80 state to ffff880273b58c00
>[42794.187272] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024ac52800 state to ffff880273b58c00
>[42794.187284] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82d80 to [CRTC:33:pipe A]
>[42794.187295] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82d80
>[42794.187312] [drm:drm_atomic_check_only [drm]] checking ffff880273b58c00
>[42794.187357] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42794.187389] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42794.187402] [drm:drm_atomic_commit [drm]] commiting ffff880273b58c00
>[42794.187457] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff880273b58c00
>[42794.187470] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff880273b58c00
>[42794.203242] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8802738d3800
>[42794.203258] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82240 state to ffff8802738d3800
>[42794.203272] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ecb2800 state to ffff8802738d3800
>[42794.203284] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82240 to [CRTC:33:pipe A]
>[42794.203295] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for plane state ffff88011ef82240
>[42794.203312] [drm:drm_atomic_check_only [drm]] checking ffff8802738d3800
>[42794.203357] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42794.203389] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42794.203402] [drm:drm_atomic_commit [drm]] commiting ffff8802738d3800
>[42794.203457] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8802738d3800
>[42794.203470] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8802738d3800
>[42795.482536] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port C VDD off
>[42795.482587] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0000
>[42795.583009] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00100000, dig 0x00100000, pins 0x00000040
>[42795.583043] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - long
>[42795.583073] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 6 - cnt: 0
>[42795.583180] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port C
>[42796.830015] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88024ae52400
>[42796.830046] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88022a328000 state to ffff88024ae52400
>[42796.830066] [drm:drm_atomic_check_only [drm]] checking ffff88024ae52400
>[42796.830091] [drm:drm_atomic_commit [drm]] commiting ffff88024ae52400
>[42796.832882] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88024ae52400
>[42796.832908] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88024ae52400
>[42798.866906] [drm:drm_mode_setcrtc [drm]] [CRTC:33:pipe A]
>[42798.866923] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff880273b58c00
>[42798.866938] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff8801237dc800 state to ffff880273b58c00
>[42798.866951] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:25:primary A] ffff88012fd1e480 state to ffff880273b58c00
>[42798.866963] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for CRTC state ffff8801237dc800
>[42798.866975] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88012fd1e480 to [NOCRTC]
>[42798.866986] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff88012fd1e480
>[42798.866997] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:33:pipe A] to ffff880273b58c00
>[42798.867011] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:57] ffff880132cff120 state to ffff880273b58c00
>[42798.867023] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff880132cff120 to [NOCRTC]
>[42798.867035] [drm:drm_atomic_check_only [drm]] checking ffff880273b58c00
>[42798.867045] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:33:pipe A] mode changed
>[42798.867051] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:33:pipe A] enable changed
>[42798.867057] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:57:HDMI-A-1]
>[42798.867063] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:57:HDMI-A-1]
>[42798.867068] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:33:pipe A] active changed
>[42798.867075] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:33:pipe A] needs all connectors, enable: n, active: n
>[42798.867088] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:33:pipe A] to ffff880273b58c00
>[42798.867101] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff8802765976c0 state to ffff880273b58c00
>[42798.867118] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe B] ffff880273b8f000 state to ffff880273b58c00
>[42798.867132] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe C] ffff880275a52800 state to ffff880273b58c00
>[42798.867175] [drm:intel_atomic_check [i915]] New cdclk calculated to be atomic 200000, actual 200000
>[42798.867209] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:25:primary A] with fb -1
>[42798.867241] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:25:primary A] visible 1 -> 0, off 1, on 0, ms 1
>[42798.867274] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 69
>[42798.867306] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 0, off 1, on 0, ms 1
>[42798.867320] [drm:drm_atomic_commit [drm]] commiting ffff880273b58c00
>[42798.867373] [drm:_intel_set_memory_cxsr [i915]] memory self-refresh is disabled (was enabled)
>[42798.867871] [drm:intel_disable_pipe [i915]] disabling pipe A
>[42798.910128] [drm:chv_phy_powergate_lanes [i915]] Power gating DPIO PHY0 CH0 lanes 0x0 (PHY_CONTROL=0x050007fd)
>[42798.912194] [drm:vlv_pipe_set_fifo_size [i915]] Pipe A FIFO split 511 / 511 / 511
>[42798.912234] [drm:vlv_update_wm [i915]] Setting FIFO watermarks - A: plane=0, cursor=0, sprite0=0, sprite1=0, SR: plane=0, cursor=0 level=1 cxsr=0
>[42798.914385] [drm:intel_update_cdclk [i915]] Current CD clock rate: 200000 kHz
>[42798.914421] [drm:intel_atomic_commit_tail [i915]] [ENCODER:52:DP B]
>[42798.914455] [drm:intel_atomic_commit_tail [i915]] [ENCODER:56:HDMI B]
>[42798.914489] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP C]
>[42798.914522] [drm:intel_atomic_commit_tail [i915]] [ENCODER:65:DP D]
>[42798.914554] [drm:intel_atomic_commit_tail [i915]] [ENCODER:67:HDMI D]
>[42798.914586] [drm:verify_connector_state.isra.61 [i915]] [CONNECTOR:57:HDMI-A-1]
>[42798.914624] [drm:intel_power_well_disable [i915]] disabling dpio-common-bc
>[42798.914670] [drm:chv_dpio_cmn_power_well_disable [i915]] Disabled DPIO PHY0 (PHY_CONTROL=0x050007fc)
>[42798.914714] [drm:intel_power_well_disable [i915]] disabling display
>[42798.916981] [drm:intel_atomic_commit_tail [i915]] [CRTC:33:pipe A]
>[42798.917038] [drm:intel_power_well_disable [i915]] disabling always-on
>[42798.917069] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff880273b58c00
>[42798.917094] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff880273b58c00
>[42798.917175] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff880273b58c00
>[42798.917196] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82240 state to ffff880273b58c00
>[42798.917215] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024af29800 state to ffff880273b58c00
>[42798.917232] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82240 to [NOCRTC]
>[42798.917249] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff88011ef82240
>[42798.917266] [drm:drm_atomic_check_only [drm]] checking ffff880273b58c00
>[42798.917300] [drm:drm_atomic_commit [drm]] commiting ffff880273b58c00
>[42798.917330] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff880273b58c00
>[42798.917348] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff880273b58c00
>[42798.919880] [drm:drm_mode_addfb2 [drm]] [FB:69]
>[42798.937049] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:60:eDP-1]
>[42798.937086] [drm:intel_dp_detect [i915]] [CONNECTOR:60:eDP-1]
>[42798.937120] [drm:intel_power_well_enable [i915]] enabling always-on
>[42798.937152] [drm:intel_power_well_enable [i915]] enabling display
>[42798.939427] [drm:i915_redisable_vga_power_on [i915]] Something enabled VGA plane, disabling it
>[42798.939768] [drm:intel_power_well_enable [i915]] enabling dpio-common-bc
>[42798.948204] [drm:chv_dpio_cmn_power_well_enable [i915]] Enabled DPIO PHY0 (PHY_CONTROL=0x050007fd)
>[42798.950320] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source no, sink no
>[42798.950351] [drm:intel_dp_print_rates [i915]] source rates: 162000, 270000
>[42798.950381] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[42798.950410] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[42798.950444] [drm:edp_panel_vdd_on [i915]] Turning eDP port C VDD on
>[42798.950473] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[42798.950504] [drm:vlv_power_sequencer_pipe [i915]] picked pipe A power sequencer for port C
>[42798.950537] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x86400001, PP_OFF 0x1f40001, PP_DIV 0x270f08
>[42798.950568] [drm:vlv_power_sequencer_pipe [i915]] kicking pipe A power sequencer for port C
>[42798.950600] [drm:chv_phy_powergate_ch [i915]] Power gating DPIO PHY0 CH0 (DPIO_PHY_CONTROL=0x0d0007fd)
>[42798.984163] [drm:chv_phy_powergate_ch [i915]] Power gating DPIO PHY0 CH0 (DPIO_PHY_CONTROL=0x050007fd)
>[42798.984221] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 08000001 control abcd0000
>[42799.688841] [drm:wait_panel_status [i915]] Wait complete
>[42799.688895] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[42799.688942] [drm:edp_panel_vdd_on [i915]] eDP port C panel power wasn't enabled
>[42799.785302] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00100000, dig 0x00100000, pins 0x00000040
>[42799.785336] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - long
>[42799.785410] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 6 - cnt: 0
>[42799.785530] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port C
>[42799.862969] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-00-00(NS) dev-ID  HW-rev 0.0 SW-rev 0.0
>[42799.863417] [drm:drm_edid_to_eld [drm]] ELD: no CEA Extension found
>[42799.863429] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:60:eDP-1] probed modes :
>[42799.863444] [drm:drm_mode_debug_printmodeline [drm]] Modeline 61:"1366x768" 60 76300 1366 1404 1426 1592 768 771 777 798 0x48 0xa
>[42799.863792] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:53:DP-1]
>[42799.863823] [drm:intel_dp_detect [i915]] [CONNECTOR:53:DP-1]
>[42799.866300] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.868779] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.871258] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.873744] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.876221] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.878697] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.881176] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.883658] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.886136] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.888616] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.891091] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.893571] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.896057] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.898532] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.901007] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.903486] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.905965] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.908441] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.910917] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.913397] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.915873] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.918348] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.920833] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.923312] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.925793] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.928274] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.930756] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.933251] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.935730] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.938211] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.940689] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.943180] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.943192] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[42799.943199] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:53:DP-1] disconnected
>[42799.943237] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:66:DP-2]
>[42799.943267] [drm:intel_dp_detect [i915]] [CONNECTOR:66:DP-2]
>[42799.943298] [drm:intel_power_well_enable [i915]] enabling dpio-common-d
>[42799.949860] [drm:chv_dpio_cmn_power_well_enable [i915]] Enabled DPIO PHY1 (PHY_CONTROL=0x050007ff)
>[42799.954823] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.957301] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.959781] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.962261] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.964736] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.967215] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.969694] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.972170] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.974646] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.977126] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.979600] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.982077] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.984586] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.987063] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.989541] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.992020] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.994499] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.996975] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42799.999453] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.001931] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.004409] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.006884] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.009365] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.011841] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.014317] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.016797] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.019278] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.021754] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.024234] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.026718] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.029194] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.031672] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.031684] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[42800.031715] [drm:intel_power_well_disable [i915]] disabling dpio-common-d
>[42800.033893] [drm:chv_dpio_cmn_power_well_disable [i915]] Disabled DPIO PHY1 (PHY_CONTROL=0x050007fd)
>[42800.033919] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:66:DP-2] disconnected
>[42800.034048] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:68:HDMI-A-2]
>[42800.034079] [drm:intel_hdmi_detect [i915]] [CONNECTOR:68:HDMI-A-2]
>[42800.034359] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus panel] NAK for addr: 0050 w(1)
>[42800.034388] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus panel] NAK on first message, retry
>[42800.034658] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus panel] NAK for addr: 0050 w(1)
>[42800.034675] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus panel
>[42800.034921] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus panel] NAK for addr: 0040 w(1)
>[42800.034950] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus panel] NAK on first message, retry
>[42800.035203] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus panel] NAK for addr: 0040 w(1)
>[42800.035212] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[42800.035219] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:68:HDMI-A-2] disconnected
>[42800.040054] [drm:intel_dp_detect [i915]] [CONNECTOR:60:eDP-1]
>[42800.040089] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source no, sink no
>[42800.040120] [drm:intel_dp_print_rates [i915]] source rates: 162000, 270000
>[42800.040149] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[42800.040178] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[42800.041888] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-00-00(NS) dev-ID  HW-rev 0.0 SW-rev 0.0
>[42800.042251] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:60:eDP-1] status updated from connected to connected
>[42800.042285] [drm:intel_dp_detect [i915]] [CONNECTOR:53:DP-1]
>[42800.044786] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.047301] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.049815] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.052342] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.054925] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.056427] [drm:drm_mode_addfb2 [drm]] [FB:73]
>[42800.057875] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.060940] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.063817] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.066338] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.068816] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.071301] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.073855] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.076342] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.078816] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.081299] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.084489] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.086968] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.089451] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.091929] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.094414] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.096895] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.099372] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.101845] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.104334] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.106818] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.109308] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.111795] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.114274] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.116754] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.119241] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.121736] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.124223] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.124236] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[42800.124245] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:53:DP-1] status updated from disconnected to disconnected
>[42800.124274] [drm:intel_hdmi_detect [i915]] [CONNECTOR:57:HDMI-A-1]
>[42800.137309] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[42800.137344] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[42800.137524] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[42800.137532] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[42800.137547] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:57:HDMI-A-1] status updated from connected to connected
>[42800.137576] [drm:intel_dp_detect [i915]] [CONNECTOR:66:DP-2]
>[42800.137608] [drm:intel_power_well_enable [i915]] enabling dpio-common-d
>[42800.145731] [drm:chv_dpio_cmn_power_well_enable [i915]] Enabled DPIO PHY1 (PHY_CONTROL=0x050007ff)
>[42800.150241] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.152725] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.155202] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.157679] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.160160] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.162696] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.165171] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.167647] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.170122] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.172599] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.175077] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.177553] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.180029] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.182507] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.184983] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.187513] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.189992] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.192473] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.194948] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.197420] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.199895] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.202371] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.204846] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.207322] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.209796] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.212274] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.214749] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.217225] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.219702] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.222206] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.224685] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.227161] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42800.227173] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[42800.227204] [drm:intel_power_well_disable [i915]] disabling dpio-common-d
>[42800.229265] [drm:chv_dpio_cmn_power_well_disable [i915]] Disabled DPIO PHY1 (PHY_CONTROL=0x050007fd)
>[42800.229288] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:66:DP-2] status updated from disconnected to disconnected
>[42800.229319] [drm:intel_hdmi_detect [i915]] [CONNECTOR:68:HDMI-A-2]
>[42800.229528] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus panel] NAK for addr: 0050 w(1)
>[42800.229556] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus panel] NAK on first message, retry
>[42800.229751] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus panel] NAK for addr: 0050 w(1)
>[42800.229767] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus panel
>[42800.229960] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus panel] NAK for addr: 0040 w(1)
>[42800.229995] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus panel] NAK on first message, retry
>[42800.230172] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus panel] NAK for addr: 0040 w(1)
>[42800.230180] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[42800.230189] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:68:HDMI-A-2] status updated from disconnected to disconnected
>[42800.230296] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898800
>[42800.230324] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88022a245800 state to ffff88019a898800
>[42800.230337] [drm:drm_atomic_check_only [drm]] checking ffff88019a898800
>[42800.230354] [drm:drm_atomic_commit [drm]] commiting ffff88019a898800
>[42800.230376] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898800
>[42800.230390] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898800
>[42800.230525] [drm:drm_mode_addfb2 [drm]] [FB:62]
>[42800.230777] [drm:drm_mode_setcrtc [drm]] [CRTC:33:pipe A]
>[42800.230794] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:60:eDP-1]
>[42800.230806] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898800
>[42800.230825] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024af29800 state to ffff88019a898800
>[42800.230838] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:25:primary A] ffff880276531cc0 state to ffff88019a898800
>[42800.230852] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:] for CRTC state ffff88024af29800
>[42800.230864] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff880276531cc0 to [CRTC:33:pipe A]
>[42800.230876] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:73] for plane state ffff880276531cc0
>[42800.230887] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:33:pipe A] to ffff88019a898800
>[42800.230902] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:60] ffff8801029c8500 state to ffff88019a898800
>[42800.230913] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff8801029c8500 to [CRTC:33:pipe A]
>[42800.230925] [drm:drm_atomic_check_only [drm]] checking ffff88019a898800
>[42800.230940] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:33:pipe A] mode changed
>[42800.230946] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:33:pipe A] enable changed
>[42800.230954] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:60:eDP-1]
>[42800.230961] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:60:eDP-1] using [ENCODER:59:DP C] on [CRTC:33:pipe A]
>[42800.230967] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:33:pipe A] active changed
>[42800.230973] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:33:pipe A] needs all connectors, enable: y, active: y
>[42800.230986] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:33:pipe A] to ffff88019a898800
>[42800.231000] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:33:pipe A] to ffff88019a898800
>[42800.231051] [drm:intel_atomic_check [i915]] [CONNECTOR:60:eDP-1] checking for sink bpp constrains
>[42800.231158] [drm:intel_atomic_check [i915]] clamping display bpp (was 30) to EDID reported max of 18
>[42800.231192] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 1 max bw 270000 pixel clock 76300KHz
>[42800.231227] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 1 clock 270000 bpp 18
>[42800.231256] [drm:intel_dp_compute_config [i915]] DP link bw required 171675 available 270000
>[42800.231295] [drm:intel_atomic_check [i915]] hw max bpp: 30, pipe bpp: 18, dithering: 1
>[42800.231332] [drm:intel_dump_pipe_config [i915]] [CRTC:33:pipe A][modeset]
>[42800.231364] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 18, dithering: 1
>[42800.231396] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 1; gmch_m: 2666878, gmch_n: 4194304, link_m: 148159, link_n: 524288, tu: 64
>[42800.231428] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[42800.231463] [drm:intel_dump_pipe_config [i915]] requested mode:
>[42800.231476] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 76300 1366 1404 1426 1592 768 771 777 798 0x0 0xa
>[42800.231507] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[42800.231521] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1366x768" 60 76300 1366 1404 1426 1592 768 771 777 798 0x48 0xa
>[42800.231553] [drm:intel_dump_pipe_config [i915]] crtc timings: 76300 1366 1404 1426 1592 768 771 777 798, type: 0x48 flags: 0xa
>[42800.231589] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1366x768
>[42800.231621] [drm:intel_dump_pipe_config [i915]] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[42800.231652] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[42800.231684] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: dpll: 0xb0002000, dpll_md: 0x0, fp0: 0x0, fp1: 0x0
>[42800.231720] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[42800.231751] [drm:intel_dump_pipe_config [i915]] [PLANE:25:primary A] disabled, scaler_id = 0
>[42800.231783] [drm:intel_dump_pipe_config [i915]] [PLANE:27:sprite A] disabled, scaler_id = 0
>[42800.231815] [drm:intel_dump_pipe_config [i915]] [PLANE:29:sprite B] disabled, scaler_id = 0
>[42800.231851] [drm:intel_dump_pipe_config [i915]] [PLANE:31:cursor A] disabled, scaler_id = 0
>[42800.231867] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe B] ffff880275a52000 state to ffff88019a898800
>[42800.231880] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe C] ffff88022a301000 state to ffff88019a898800
>[42800.231918] [drm:intel_atomic_check [i915]] New cdclk calculated to be atomic 266667, actual 266667
>[42800.231954] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:25:primary A] with fb 73
>[42800.231990] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:25:primary A] visible 0 -> 1, off 0, on 1, ms 1
>[42800.232004] [drm:drm_atomic_commit [drm]] commiting ffff88019a898800
>[42800.238135] [drm:intel_update_cdclk [i915]] Current CD clock rate: 266667 kHz
>[42800.238171] [drm:intel_atomic_commit_tail [i915]] [ENCODER:52:DP B]
>[42800.238206] [drm:intel_atomic_commit_tail [i915]] [ENCODER:56:HDMI B]
>[42800.238240] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP C]
>[42800.238271] [drm:intel_atomic_commit_tail [i915]] [ENCODER:65:DP D]
>[42800.238302] [drm:intel_atomic_commit_tail [i915]] [ENCODER:67:HDMI D]
>[42800.238344] [drm:chv_phy_powergate_lanes [i915]] Power gating DPIO PHY0 CH1 lanes 0xe (PHY_CONTROL=0x150707fd)
>[42800.309492] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[42800.309528] [drm:edp_panel_on [i915]] Turn eDP port C panel power on
>[42800.309558] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[42800.309592] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control abcd0008
>[42800.309622] [drm:wait_panel_status [i915]] Wait complete
>[42800.309653] [drm:edp_panel_on [i915]] Wait for panel power on
>[42800.309686] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control abcd000b
>[42800.430118] [drm:wait_panel_status [i915]] Wait complete
>[42800.430152] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port C VDD off
>[42800.430185] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0003
>[42800.430227] [drm:edp_panel_vdd_on [i915]] Turning eDP port C VDD on
>[42800.430260] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[42800.440400] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[42800.440429] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[42800.440459] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[42800.441101] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[42800.441130] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[42800.442071] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[42800.442387] [drm:vlv_pipe_set_fifo_size [i915]] Pipe A FIFO split 511 / 511 / 511
>[42800.442424] [drm:vlv_update_wm [i915]] Setting FIFO watermarks - A: plane=425, cursor=63, sprite0=0, sprite1=0, SR: plane=0, cursor=0 level=1 cxsr=0
>[42800.442455] [drm:intel_enable_pipe [i915]] enabling pipe A
>[42800.442497] [drm:intel_edp_backlight_on [i915]] 
>[42800.442528] [drm:intel_panel_enable_backlight [i915]] pipe A
>[42800.442557] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 1562
>[42800.472145] [drm:intel_psr_enable [i915]] PSR not supported by this panel
>[42800.475862] [drm:verify_connector_state.isra.61 [i915]] [CONNECTOR:60:eDP-1]
>[42800.475903] [drm:intel_atomic_commit_tail [i915]] [CRTC:33:pipe A]
>[42800.486065] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898800
>[42800.486083] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898800
>[42800.486140] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88019a898800
>[42800.486154] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff880275a52800 state to ffff88019a898800
>[42800.486166] [drm:drm_atomic_check_only [drm]] checking ffff88019a898800
>[42800.486182] [drm:drm_atomic_commit [drm]] commiting ffff88019a898800
>[42800.492491] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88019a898800
>[42800.492506] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88019a898800
>[42800.492647] [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=1562/1562
>[42800.492676] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 1562
>[42800.493215] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88024ac89000
>[42800.493231] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88012fd1e480 state to ffff88024ac89000
>[42800.493245] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88024af29800 state to ffff88024ac89000
>[42800.493257] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88012fd1e480 to [CRTC:33:pipe A]
>[42800.493269] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:76] for plane state ffff88012fd1e480
>[42800.493281] [drm:drm_atomic_check_only [drm]] checking ffff88024ac89000
>[42800.493326] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 76
>[42800.493363] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 0 -> 1, off 0, on 1, ms 0
>[42800.493377] [drm:drm_atomic_commit [drm]] commiting ffff88024ac89000
>[42800.493564] [drm:vlv_pipe_set_fifo_size [i915]] Pipe A FIFO split 511 / 511 / 511
>[42800.493603] [drm:vlv_update_wm [i915]] Setting FIFO watermarks - A: plane=425, cursor=0, sprite0=0, sprite1=0, SR: plane=1449, cursor=0 level=1 cxsr=1
>[42800.493635] [drm:_intel_set_memory_cxsr [i915]] memory self-refresh is enabled (was disabled)
>[42800.493682] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88024ac89000
>[42800.493696] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88024ac89000
>[42800.493736] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88024ac89000
>[42800.493750] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82240 state to ffff88024ac89000
>[42800.493763] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff880275a52800 state to ffff88024ac89000
>[42800.493775] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82240 to [CRTC:33:pipe A]
>[42800.493786] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:76] for plane state ffff88011ef82240
>[42800.493798] [drm:drm_atomic_check_only [drm]] checking ffff88024ac89000
>[42800.493836] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 76
>[42800.493868] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42800.493880] [drm:drm_atomic_commit [drm]] commiting ffff88024ac89000
>[42800.493913] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88024ac89000
>[42800.493926] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88024ac89000
>[42800.513732] iwlwifi 0000:02:00.0: RF_KILL bit toggled to enable radio.
>[42800.543298] [drm:drm_mode_addfb2 [drm]] [FB:69]
>[42800.549280] [drm:drm_mode_addfb2 [drm]] [FB:84]
>[42800.571441] [drm:drm_mode_addfb2 [drm]] [FB:85]
>[42801.833437] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8802764e9400
>[42801.833458] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88022a38b000 state to ffff8802764e9400
>[42801.833471] [drm:drm_atomic_check_only [drm]] checking ffff8802764e9400
>[42801.833494] [drm:drm_atomic_commit [drm]] commiting ffff8802764e9400
>[42801.841226] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8802764e9400
>[42801.841252] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8802764e9400
>[42802.688230] [drm:drm_mode_setcrtc [drm]] [CRTC:33:pipe A]
>[42802.688247] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8802764e9400
>[42802.688262] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88012fef6800 state to ffff8802764e9400
>[42802.688275] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:25:primary A] ffff8802759199c0 state to ffff8802764e9400
>[42802.688287] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for CRTC state ffff88012fef6800
>[42802.688299] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8802759199c0 to [NOCRTC]
>[42802.688310] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8802759199c0
>[42802.688322] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:33:pipe A] to ffff8802764e9400
>[42802.688335] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:60] ffff88024ac817e0 state to ffff8802764e9400
>[42802.688348] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff88024ac817e0 to [NOCRTC]
>[42802.688360] [drm:drm_atomic_check_only [drm]] checking ffff8802764e9400
>[42802.688370] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:33:pipe A] mode changed
>[42802.688375] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:33:pipe A] enable changed
>[42802.688382] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:60:eDP-1]
>[42802.688387] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:60:eDP-1]
>[42802.688393] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:33:pipe A] active changed
>[42802.688399] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:33:pipe A] needs all connectors, enable: n, active: n
>[42802.688413] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:33:pipe A] to ffff8802764e9400
>[42802.688426] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff8802759196c0 state to ffff8802764e9400
>[42802.688443] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe B] ffff880123552800 state to ffff8802764e9400
>[42802.688456] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe C] ffff8801237dc800 state to ffff8802764e9400
>[42802.688500] [drm:intel_atomic_check [i915]] New cdclk calculated to be atomic 200000, actual 200000
>[42802.688533] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:25:primary A] with fb -1
>[42802.688565] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:25:primary A] visible 1 -> 0, off 1, on 0, ms 1
>[42802.688599] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 76
>[42802.688630] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 0, off 1, on 0, ms 1
>[42802.688644] [drm:drm_atomic_commit [drm]] commiting ffff8802764e9400
>[42802.688698] [drm:_intel_set_memory_cxsr [i915]] memory self-refresh is disabled (was enabled)
>[42802.690386] [drm:intel_edp_backlight_off [i915]] 
>[42802.962476] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[42802.962711] [drm:intel_edp_panel_off [i915]] Turn eDP port C panel power off
>[42802.962758] [drm:intel_edp_panel_off [i915]] Wait for panel power off time
>[42802.962809] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status 80000008 control abcd0000
>[42803.001625] [drm:wait_panel_status [i915]] Wait complete
>[42803.001694] [drm:intel_disable_pipe [i915]] disabling pipe A
>[42803.002703] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00100000, dig 0x00100000, pins 0x00000040
>[42803.002738] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - long
>[42803.002768] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 6 - cnt: 0
>[42803.002955] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port C
>[42803.008634] [drm:intel_dp_link_down [i915]] 
>[42803.076991] [drm:chv_phy_powergate_lanes [i915]] Power gating DPIO PHY0 CH1 lanes 0x0 (PHY_CONTROL=0x050007fd)
>[42803.079438] [drm:vlv_pipe_set_fifo_size [i915]] Pipe A FIFO split 511 / 511 / 511
>[42803.079493] [drm:vlv_update_wm [i915]] Setting FIFO watermarks - A: plane=0, cursor=0, sprite0=0, sprite1=0, SR: plane=0, cursor=0 level=1 cxsr=0
>[42803.081911] [drm:intel_update_cdclk [i915]] Current CD clock rate: 200000 kHz
>[42803.081968] [drm:intel_atomic_commit_tail [i915]] [ENCODER:52:DP B]
>[42803.082023] [drm:intel_atomic_commit_tail [i915]] [ENCODER:56:HDMI B]
>[42803.082113] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP C]
>[42803.082162] [drm:intel_atomic_commit_tail [i915]] [ENCODER:65:DP D]
>[42803.082210] [drm:intel_atomic_commit_tail [i915]] [ENCODER:67:HDMI D]
>[42803.082260] [drm:verify_connector_state.isra.61 [i915]] [CONNECTOR:60:eDP-1]
>[42803.082319] [drm:intel_power_well_disable [i915]] disabling dpio-common-bc
>[42803.084720] [drm:chv_dpio_cmn_power_well_disable [i915]] Disabled DPIO PHY0 (PHY_CONTROL=0x050007fc)
>[42803.084792] [drm:intel_power_well_disable [i915]] disabling display
>[42803.087330] [drm:intel_atomic_commit_tail [i915]] [CRTC:33:pipe A]
>[42803.087388] [drm:intel_power_well_disable [i915]] disabling always-on
>[42803.087420] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8802764e9400
>[42803.087445] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8802764e9400
>[42803.087595] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8802764e9400
>[42803.087618] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82240 state to ffff8802764e9400
>[42803.087638] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88022a301000 state to ffff8802764e9400
>[42803.087656] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82240 to [NOCRTC]
>[42803.087672] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff88011ef82240
>[42803.087690] [drm:drm_atomic_check_only [drm]] checking ffff8802764e9400
>[42803.087714] [drm:drm_atomic_commit [drm]] commiting ffff8802764e9400
>[42803.087743] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8802764e9400
>[42803.087762] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8802764e9400
>[42803.091592] [drm:drm_mode_addfb2 [drm]] [FB:72]
>[42803.155807] [drm:drm_mode_addfb2 [drm]] [FB:62]
>[42803.167547] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88022a388000
>[42803.167587] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88012f2eb800 state to ffff88022a388000
>[42803.167601] [drm:drm_atomic_check_only [drm]] checking ffff88022a388000
>[42803.167624] [drm:drm_atomic_commit [drm]] commiting ffff88022a388000
>[42803.167657] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88022a388000
>[42803.167691] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88022a388000
>[42803.167887] [drm:drm_mode_addfb2 [drm]] [FB:73]
>[42803.168043] [drm:drm_mode_setcrtc [drm]] [CRTC:33:pipe A]
>[42803.168068] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:57:HDMI-A-1]
>[42803.168082] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88022a388000
>[42803.168099] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88022a301000 state to ffff88022a388000
>[42803.168115] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:25:primary A] ffff880123779180 state to ffff88022a388000
>[42803.168130] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:] for CRTC state ffff88022a301000
>[42803.168142] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff880123779180 to [CRTC:33:pipe A]
>[42803.168155] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:62] for plane state ffff880123779180
>[42803.168167] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:33:pipe A] to ffff88022a388000
>[42803.168190] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:57] ffff88024acc6c40 state to ffff88022a388000
>[42803.168202] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff88024acc6c40 to [CRTC:33:pipe A]
>[42803.168215] [drm:drm_atomic_check_only [drm]] checking ffff88022a388000
>[42803.168238] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:33:pipe A] mode changed
>[42803.168244] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:33:pipe A] enable changed
>[42803.168251] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:57:HDMI-A-1]
>[42803.168258] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:57:HDMI-A-1] using [ENCODER:56:HDMI B] on [CRTC:33:pipe A]
>[42803.168264] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:33:pipe A] active changed
>[42803.168270] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:33:pipe A] needs all connectors, enable: y, active: y
>[42803.168284] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:33:pipe A] to ffff88022a388000
>[42803.168299] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:33:pipe A] to ffff88022a388000
>[42803.168403] [drm:intel_atomic_check [i915]] [CONNECTOR:57:HDMI-A-1] checking for sink bpp constrains
>[42803.168441] [drm:intel_atomic_check [i915]] clamping display bpp (was 30) to default limit of 24
>[42803.168480] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
>[42803.168510] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpc to 24 for HDMI
>[42803.168549] [drm:intel_atomic_check [i915]] hw max bpp: 30, pipe bpp: 24, dithering: 0
>[42803.168590] [drm:intel_dump_pipe_config [i915]] [CRTC:33:pipe A][modeset]
>[42803.168623] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 24, dithering: 0
>[42803.168656] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[42803.168688] [drm:intel_dump_pipe_config [i915]] requested mode:
>[42803.168717] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x0 0x9
>[42803.168750] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[42803.168763] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x0 0x9
>[42803.168798] [drm:intel_dump_pipe_config [i915]] crtc timings: 154000 1920 1968 2000 2080 1200 1203 1209 1235, type: 0x0 flags: 0x9
>[42803.168836] [drm:intel_dump_pipe_config [i915]] port clock: 154000, pipe src size: 1920x1200
>[42803.168869] [drm:intel_dump_pipe_config [i915]] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[42803.168902] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[42803.168936] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: dpll: 0xb0002000, dpll_md: 0x0, fp0: 0x0, fp1: 0x0
>[42803.168975] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[42803.169009] [drm:intel_dump_pipe_config [i915]] [PLANE:25:primary A] disabled, scaler_id = 0
>[42803.169044] [drm:intel_dump_pipe_config [i915]] [PLANE:27:sprite A] disabled, scaler_id = 0
>[42803.169079] [drm:intel_dump_pipe_config [i915]] [PLANE:29:sprite B] disabled, scaler_id = 0
>[42803.169117] [drm:intel_dump_pipe_config [i915]] [PLANE:31:cursor A] disabled, scaler_id = 0
>[42803.169151] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe B] ffff88022a328000 state to ffff88022a388000
>[42803.169169] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe C] ffff88024af5a800 state to ffff88022a388000
>[42803.169213] [drm:intel_atomic_check [i915]] New cdclk calculated to be atomic 266667, actual 266667
>[42803.169268] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:25:primary A] with fb 62
>[42803.169303] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:25:primary A] visible 0 -> 1, off 0, on 1, ms 1
>[42803.169348] [drm:drm_atomic_commit [drm]] commiting ffff88022a388000
>[42803.171317] [drm:intel_power_well_enable [i915]] enabling always-on
>[42803.171371] [drm:intel_power_well_enable [i915]] enabling display
>[42803.173533] [drm:i915_redisable_vga_power_on [i915]] Something enabled VGA plane, disabling it
>[42803.173913] [drm:intel_power_well_enable [i915]] enabling dpio-common-bc
>[42803.184446] [drm:chv_dpio_cmn_power_well_enable [i915]] Enabled DPIO PHY0 (PHY_CONTROL=0x050007fd)
>[42803.188640] [drm:intel_update_cdclk [i915]] Current CD clock rate: 266667 kHz
>[42803.188681] [drm:intel_atomic_commit_tail [i915]] [ENCODER:52:DP B]
>[42803.188742] [drm:intel_atomic_commit_tail [i915]] [ENCODER:56:HDMI B]
>[42803.188774] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP C]
>[42803.188807] [drm:intel_atomic_commit_tail [i915]] [ENCODER:65:DP D]
>[42803.188846] [drm:intel_atomic_commit_tail [i915]] [ENCODER:67:HDMI D]
>[42803.188891] [drm:chv_phy_powergate_lanes [i915]] Power gating DPIO PHY0 CH0 lanes 0x0 (PHY_CONTROL=0x0d0007fd)
>[42803.349998] [drm:vlv_pipe_set_fifo_size [i915]] Pipe A FIFO split 511 / 511 / 511
>[42803.350053] [drm:vlv_update_wm [i915]] Setting FIFO watermarks - A: plane=391, cursor=63, sprite0=0, sprite1=0, SR: plane=0, cursor=0 level=1 cxsr=0
>[42803.350100] [drm:intel_enable_pipe [i915]] enabling pipe A
>[42803.366890] [drm:verify_connector_state.isra.61 [i915]] [CONNECTOR:57:HDMI-A-1]
>[42803.366942] [drm:intel_atomic_commit_tail [i915]] [CRTC:33:pipe A]
>[42803.369154] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88022a388000
>[42803.369172] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88022a388000
>[42803.369232] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88022a388000
>[42803.369247] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff8801237dc800 state to ffff88022a388000
>[42803.369259] [drm:drm_atomic_check_only [drm]] checking ffff88022a388000
>[42803.369275] [drm:drm_atomic_commit [drm]] commiting ffff88022a388000
>[42803.383598] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88022a388000
>[42803.383618] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88022a388000
>[42803.383699] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88022a388000
>[42803.383713] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff8802759199c0 state to ffff88022a388000
>[42803.383727] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88022a301000 state to ffff88022a388000
>[42803.383738] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8802759199c0 to [CRTC:33:pipe A]
>[42803.383750] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:76] for plane state ffff8802759199c0
>[42803.383761] [drm:drm_atomic_check_only [drm]] checking ffff88022a388000
>[42803.383805] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 76
>[42803.383842] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 0 -> 1, off 0, on 1, ms 0
>[42803.383856] [drm:drm_atomic_commit [drm]] commiting ffff88022a388000
>[42803.383905] [drm:vlv_pipe_set_fifo_size [i915]] Pipe A FIFO split 511 / 511 / 511
>[42803.383941] [drm:vlv_update_wm [i915]] Setting FIFO watermarks - A: plane=391, cursor=0, sprite0=0, sprite1=0, SR: plane=1415, cursor=0 level=1 cxsr=1
>[42803.383977] [drm:_intel_set_memory_cxsr [i915]] memory self-refresh is enabled (was disabled)
>[42803.384012] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88022a388000
>[42803.384033] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88022a388000
>[42803.384067] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88022a388000
>[42803.384080] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82240 state to ffff88022a388000
>[42803.384092] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff8801237dc800 state to ffff88022a388000
>[42803.384104] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82240 to [CRTC:33:pipe A]
>[42803.384115] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:76] for plane state ffff88011ef82240
>[42803.384127] [drm:drm_atomic_check_only [drm]] checking ffff88022a388000
>[42803.384160] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 76
>[42803.384192] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42803.384204] [drm:drm_atomic_commit [drm]] commiting ffff88022a388000
>[42803.384424] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88022a388000
>[42803.384442] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88022a388000
>[42803.385105] [drm:intel_dp_detect [i915]] [CONNECTOR:60:eDP-1]
>[42803.385139] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source no, sink no
>[42803.385169] [drm:intel_dp_print_rates [i915]] source rates: 162000, 270000
>[42803.385209] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[42803.385239] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[42803.385278] [drm:edp_panel_vdd_on [i915]] Turning eDP port C VDD on
>[42803.385307] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[42803.399213] iwlwifi 0000:02:00.0: RF_KILL bit toggled to disable radio.
>[42803.473774] [drm:drm_mode_addfb2 [drm]] [FB:84]
>[42803.782055] [drm:vlv_power_sequencer_pipe [i915]] picked pipe A power sequencer for port C
>[42803.782097] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x86400001, PP_OFF 0x1f40001, PP_DIV 0x270f08
>[42803.782128] [drm:vlv_power_sequencer_pipe [i915]] kicking pipe A power sequencer for port C
>[42803.782165] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control abcd0000
>[42803.782196] [drm:wait_panel_status [i915]] Wait complete
>[42803.782233] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[42803.782263] [drm:edp_panel_vdd_on [i915]] eDP port C panel power wasn't enabled
>[42803.878840] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00100000, dig 0x00100000, pins 0x00000040
>[42803.878874] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - long
>[42803.878904] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 6 - cnt: 1
>[42803.879476] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port C
>[42803.962600] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-00-00(NS) dev-ID  HW-rev 0.0 SW-rev 0.0
>[42803.962963] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:60:eDP-1] status updated from connected to connected
>[42803.962994] [drm:intel_dp_detect [i915]] [CONNECTOR:53:DP-1]
>[42803.965465] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42803.967941] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42803.970421] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42803.972900] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42803.975372] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42803.977845] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42803.980319] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42803.982803] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42803.985290] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42803.987767] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42803.990237] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42803.992718] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42803.995193] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42803.997678] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.000158] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.002632] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.005104] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.007639] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.010123] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.012599] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.015072] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.017612] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.020086] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.022568] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.025088] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.027560] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.030039] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.032515] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.034987] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.037462] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.039937] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.042423] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.042439] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[42804.042448] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:53:DP-1] status updated from disconnected to disconnected
>[42804.042478] [drm:intel_hdmi_detect [i915]] [CONNECTOR:57:HDMI-A-1]
>[42804.055292] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[42804.055361] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[42804.055701] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[42804.055753] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[42804.055792] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:57:HDMI-A-1] status updated from connected to connected
>[42804.055841] [drm:intel_dp_detect [i915]] [CONNECTOR:66:DP-2]
>[42804.055873] [drm:intel_power_well_enable [i915]] enabling dpio-common-d
>[42804.063556] [drm:chv_dpio_cmn_power_well_enable [i915]] Enabled DPIO PHY1 (PHY_CONTROL=0x0d0007ff)
>[42804.068082] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.070559] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.073096] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.075571] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.078052] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.080533] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.083010] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.085481] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.087958] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.090434] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.092917] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.095396] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.097867] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.100342] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.102819] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.105300] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.107774] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.110247] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.112725] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.115204] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.117677] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.120157] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.122634] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.125106] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.127633] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.130103] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.132582] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.135060] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.137580] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.140057] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.142542] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.145028] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x71450064
>[42804.145042] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[42804.145081] [drm:intel_power_well_disable [i915]] disabling dpio-common-d
>[42804.147222] [drm:chv_dpio_cmn_power_well_disable [i915]] Disabled DPIO PHY1 (PHY_CONTROL=0x0d0007fd)
>[42804.147251] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:66:DP-2] status updated from disconnected to disconnected
>[42804.147280] [drm:intel_hdmi_detect [i915]] [CONNECTOR:68:HDMI-A-2]
>[42804.147601] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus panel] NAK for addr: 0050 w(1)
>[42804.147634] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus panel] NAK on first message, retry
>[42804.147888] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus panel] NAK for addr: 0050 w(1)
>[42804.147920] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus panel
>[42804.148244] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus panel] NAK for addr: 0040 w(1)
>[42804.148316] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus panel] NAK on first message, retry
>[42804.148569] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus panel] NAK for addr: 0040 w(1)
>[42804.148584] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[42804.148591] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:68:HDMI-A-2] status updated from disconnected to disconnected
>[42805.683415] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88011611c800
>[42805.683431] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff8802691a5000 state to ffff88011611c800
>[42805.683451] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ede0800 state to ffff88011611c800
>[42805.683463] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8802691a5000 to [CRTC:33:pipe A]
>[42805.683474] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:76] for plane state ffff8802691a5000
>[42805.683486] [drm:drm_atomic_check_only [drm]] checking ffff88011611c800
>[42805.683532] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 76
>[42805.683564] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42805.683583] [drm:drm_atomic_commit [drm]] commiting ffff88011611c800
>[42805.683809] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88011611c800
>[42805.683828] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88011611c800
>[42805.699331] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88011611c800
>[42805.699347] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff88011ef82240 state to ffff88011611c800
>[42805.699362] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88019ab71800 state to ffff88011611c800
>[42805.699374] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88011ef82240 to [CRTC:33:pipe A]
>[42805.699385] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:76] for plane state ffff88011ef82240
>[42805.699396] [drm:drm_atomic_check_only [drm]] checking ffff88011611c800
>[42805.699443] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 76
>[42805.699479] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42805.699493] [drm:drm_atomic_commit [drm]] commiting ffff88011611c800
>[42805.699544] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88011611c800
>[42805.699562] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88011611c800
>[42805.699714] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88011611c800
>[42805.699727] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff8802691a5000 state to ffff88011611c800
>[42805.699740] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ede0800 state to ffff88011611c800
>[42805.699752] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8802691a5000 to [CRTC:33:pipe A]
>[42805.699763] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:76] for plane state ffff8802691a5000
>[42805.699774] [drm:drm_atomic_check_only [drm]] checking ffff88011611c800
>[42805.699809] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 76
>[42805.699840] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42805.699852] [drm:drm_atomic_commit [drm]] commiting ffff88011611c800
>[42805.699920] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88011611c800
>[42805.699937] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88011611c800
>[42805.715269] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88011611c800
>[42805.715288] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:cursor A] ffff8802759199c0 state to ffff88011611c800
>[42805.715312] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:33:pipe A] ffff88011ef08000 state to ffff88011611c800
>[42805.715323] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8802759199c0 to [CRTC:33:pipe A]
>[42805.715335] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:76] for plane state ffff8802759199c0
>[42805.715347] [drm:drm_atomic_check_only [drm]] checking ffff88011611c800
>[42805.715443] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:33:pipe A] has [PLANE:31:cursor A] with fb 76
>[42805.715482] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[42805.715499] [drm:drm_atomic_commit [drm]] commiting ffff88011611c800

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Attachments on bug 97375: 126112 | 128476 | 132020

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