Attachment 130790 Details for Bug 100465 – ddebug_dumps_HD7770_kernel_agd5f-drm-next-4.12_ring_stalled

ddebug_dumps_HD7770_kernel_agd5f-drm-next-4.12_ring_stalled

glretrace_19147_00000000 (text/plain), 45.25 KB, created by Julien Isorce on 2017-04-10 22:29:15 UTC

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Creator: Julien Isorce

Created: 2017-04-10 22:29:15 UTC

Size: 45.25 KB

patch

obsolete

>Command: /usr/bin/glretrace /chattel/jisorce/thrash.trace -b 
>Driver vendor: X.Org
>Device vendor: AMD
>Device name: AMD CAPE VERDE (DRM 2.50.0 / 4.11.0-rc4+, LLVM 5.0.0)
>
>Draw call sequence # = 48827
>HW reached sequence # = 48826
>Elapsed time = 10004 ms
>
>[1;33mdraw_info: [0m{indexed = 0, mode = quads, start = 0, count = 4, start_instance = 0, instance_count = 1, vertices_per_patch = 3, index_bias = 0, min_index = 0, max_index = 3, primitive_restart = 0, restart_index = 0, count_from_stream_output = NULL, indirect = NULL, indirect_offset = 0, }
>
>[1;33mvertex_buffer 0: [0m{stride = 16, buffer_offset = 38592, buffer = 0x016e72a0, user_buffer = NULL, }
>  buffer: {target = buffer, format = PIPE_FORMAT_R8_UNORM, width0 = 65536, height0 = 1, depth0 = 1, array_size = 1, last_level = 0, nr_samples = 0, usage = 3, bind = 16, flags = 0, }
>[1;33mnum vertex elements[0m = 2
>  [1;33mvertex_element 0: [0m{src_offset = 8, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32_FLOAT, }
>  [1;33mvertex_element 1: [0m{src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32_FLOAT, }
>[1;33mnum stream output targets[0m = 0
>
>[1;32mbegin shader: VERTEX[0m
>[1;33mshader_state: [0m{tokens = "
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], TEXCOORD[0]
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV OUT[1], IN[1]
>  5: END
>", }
>[1;33mconstant_buffer 0: [0m{buffer = NULL, buffer_offset = 0, buffer_size = 64, user_buffer = 0x01de6a60, }
>[1;32mend shader: VERTEX[0m
>
>[1;33mviewport_state 0: [0m{scale = {2880, -540, 0.5, }, translate = {2880, 540, 0.5, }, }
>[1;33mrasterizer_state: [0m{flatshade = 0, light_twoside = 0, clamp_vertex_color = 1, clamp_fragment_color = 0, front_ccw = 1, cull_face = 0, fill_front = 0, fill_back = 0, offset_point = 0, offset_line = 0, offset_tri = 0, scissor = 0, poly_smooth = 0, poly_stipple_enable = 0, point_smooth = 0, sprite_coord_enable = 0, sprite_coord_mode = 0, point_quad_rasterization = 0, point_tri_clip = 0, point_size_per_vertex = 0, multisample = 0, line_smooth = 0, line_stipple_enable = 0, line_stipple_factor = 0, line_stipple_pattern = 65535, line_last_pixel = 0, flatshade_first = 0, half_pixel_center = 1, bottom_edge_rule = 1, rasterizer_discard = 0, depth_clip = 1, clip_halfz = 0, clip_plane_enable = 0, line_width = 1, point_size = 1, offset_units = 0, offset_scale = 0, offset_clamp = 0, }
>
>[1;32mbegin shader: FRAGMENT[0m
>[1;33mshader_state: [0m{tokens = "
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], TEXCOORD[0], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SVIEW[0], 2D, FLOAT
>DCL CONST[1..4]
>DCL TEMP[0], LOCAL
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: MOV TEMP[0].w, IN[0].wwww
>  2: TXP TEMP[0], TEMP[0], SAMP[0], 2D
>  3: MUL OUT[0], TEMP[0], CONST[4]
>  4: END
>", }
>[1;33mconstant_buffer 0: [0m{buffer = NULL, buffer_offset = 0, buffer_size = 80, user_buffer = 0x01de6ab0, }
>[1;33msampler_state 0: [0m{wrap_s = clamp_to_edge, wrap_t = clamp_to_edge, wrap_r = repeat, min_img_filter = linear, min_mip_filter = linear, mag_img_filter = linear, compare_mode = 0, compare_func = never, normalized_coords = 1, max_anisotropy = 0, seamless_cube_map = 0, lod_bias = 0, min_lod = 0, max_lod = 1000, border_color.f = {0, 0, 0, 0, }, }
>[1;33msampler_view 0: [0m{target = 2d, format = PIPE_FORMAT_R8G8B8A8_UNORM, texture = 0x01cfa5c0, u.tex.first_layer = 0, u.tex.last_layer = 0, u.tex.last_level = 4, u.tex.last_level = 4, swizzle_r = 0, swizzle_g = 1, swizzle_b = 2, swizzle_a = 3, }
>  texture: {target = 2d, format = PIPE_FORMAT_R8G8B8A8_UNORM, width0 = 5401, height0 = 20, depth0 = 1, array_size = 1, last_level = 12, nr_samples = 0, usage = 0, bind = 10, flags = 4, }
>[1;32mend shader: FRAGMENT[0m
>
>[1;33mdepth_stencil_alpha_state: [0m{depth = {enabled = 0, }, stencil = {{enabled = 0, }, {enabled = 0, }, }, alpha = {enabled = 0, }, }
>[1;33mstencil_ref: [0m{ref_value = {0, 0, }, }
>[1;33mblend_state: [0m{dither = 1, alpha_to_coverage = 0, alpha_to_one = 0, logicop_enable = 0, independent_blend_enable = 0, rt = {{blend_enable = 0, colormask = 15, }, }, }
>[1;33mblend_color: [0m{color = {0, 0, 0, 0, }, }
>[1;33mmin_samples[0m = 1
>[1;33msample_mask[0m = 0xffffffff
>
>[1;33mframebuffer_state: [0m{width = 5760, height = 1080, samples = 0, layers = 0, nr_cbufs = 1, cbufs = {0x01c99f80, NULL, NULL, NULL, NULL, NULL, NULL, NULL, }, zsbuf = 0x01777640, }
>  [1;33mcbufs[0]:[0m
>    [1;33msurface: [0m{format = PIPE_FORMAT_B8G8R8A8_UNORM, width = 5760, height = 1080, texture = 0x01775d80, u.tex.level = 0, u.tex.first_layer = 0, u.tex.last_layer = 0, }
>    [1;33mresource: [0m{target = 2d, format = PIPE_FORMAT_B8G8R8A8_UNORM, width0 = 5760, height0 = 1080, depth0 = 1, array_size = 1, last_level = 0, nr_samples = 0, usage = 0, bind = 1572874, flags = 0, }
>  [1;33mzsbuf:[0m
>    [1;33msurface: [0m{format = PIPE_FORMAT_Z24_UNORM_S8_UINT, width = 5760, height = 1080, texture = 0x01776730, u.tex.level = 0, u.tex.first_layer = 0, u.tex.last_layer = 0, }
>    [1;33mresource: [0m{target = 2d, format = PIPE_FORMAT_Z24_UNORM_S8_UINT, width0 = 5760, height0 = 1080, depth0 = 1, array_size = 1, last_level = 0, nr_samples = 0, usage = 0, bind = 1, flags = 0, }
>
>
>
>*****************************************************************************
>Driver-specific state:
>
>SHADER KEY
>  part.vs.prolog.instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  part.vs.epilog.export_prim_id = 0
>  as_es = 0
>  as_ls = 0
>  mono.vs.fix_fetch = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  opt.hw_vs.kill_outputs = 0x0
>  opt.hw_vs.kill_outputs2 = 0x0
>  opt.hw_vs.clip_disable = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                   ; C0820B00
>	s_load_dwordx4 s[8:11], s[10:11], 0x4                  ; C0840B04
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                     ; C0800300
>	s_waitcnt lgkmcnt(0)                                   ; BF8C007F
>	buffer_load_format_xyzw v[6:9], v4, s[4:7], 0 idxen    ; E00C2000 80010604
>	buffer_load_format_xyzw v[10:13], v5, s[8:11], 0 idxen ; E00C2000 80020A05
>	s_buffer_load_dword s4, s[0:3], 0x0                    ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                    ; C2028101
>	s_buffer_load_dword s6, s[0:3], 0x2                    ; C2030102
>	s_buffer_load_dword s7, s[0:3], 0x3                    ; C2038103
>	s_buffer_load_dword s8, s[0:3], 0x4                    ; C2040104
>	s_buffer_load_dword s9, s[0:3], 0x5                    ; C2048105
>	s_buffer_load_dword s10, s[0:3], 0x6                   ; C2050106
>	s_buffer_load_dword s11, s[0:3], 0x7                   ; C2058107
>	s_buffer_load_dword s12, s[0:3], 0x8                   ; C2060108
>	s_buffer_load_dword s13, s[0:3], 0x9                   ; C2068109
>	s_buffer_load_dword s14, s[0:3], 0xa                   ; C207010A
>	s_buffer_load_dword s15, s[0:3], 0xb                   ; C207810B
>	s_buffer_load_dword s16, s[0:3], 0xc                   ; C208010C
>	s_buffer_load_dword s17, s[0:3], 0xd                   ; C208810D
>	s_buffer_load_dword s18, s[0:3], 0xe                   ; C209010E
>	s_buffer_load_dword s0, s[0:3], 0xf                    ; C200010F
>	s_waitcnt vmcnt(1) lgkmcnt(0)                          ; BF8C0071
>	v_mul_f32_e32 v0, s4, v6                               ; 10000C04
>	v_mul_f32_e32 v1, s5, v6                               ; 10020C05
>	v_mul_f32_e32 v3, s6, v6                               ; 10060C06
>	v_mul_f32_e32 v4, s7, v6                               ; 10080C07
>	v_mac_f32_e32 v0, s8, v7                               ; 3E000E08
>	v_mac_f32_e32 v1, s9, v7                               ; 3E020E09
>	v_mac_f32_e32 v3, s10, v7                              ; 3E060E0A
>	v_mac_f32_e32 v4, s11, v7                              ; 3E080E0B
>	v_mac_f32_e32 v0, s12, v8                              ; 3E00100C
>	v_mac_f32_e32 v1, s13, v8                              ; 3E02100D
>	v_mac_f32_e32 v3, s14, v8                              ; 3E06100E
>	v_mac_f32_e32 v4, s15, v8                              ; 3E08100F
>	s_waitcnt vmcnt(0)                                     ; BF8C0F70
>	exp param0 v10, v11, v12, v13                          ; F800020F 0D0C0B0A
>	v_mac_f32_e32 v0, s16, v9                              ; 3E001210
>	v_mac_f32_e32 v1, s17, v9                              ; 3E021211
>	v_mac_f32_e32 v3, s18, v9                              ; 3E061212
>	v_mac_f32_e32 v4, s0, v9                               ; 3E081200
>	exp pos0 v0, v1, v3, v4 done                           ; F80008CF 04030100
>	s_waitcnt expcnt(0)                                    ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Private memory VGPRs: 0
>Code Size: 200 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  part.ps.prolog.color_two_side = 0
>  part.ps.prolog.flatshade_colors = 0
>  part.ps.prolog.poly_stipple = 0
>  part.ps.prolog.force_persp_sample_interp = 0
>  part.ps.prolog.force_linear_sample_interp = 0
>  part.ps.prolog.force_persp_center_interp = 0
>  part.ps.prolog.force_linear_center_interp = 0
>  part.ps.prolog.bc_optimize_for_persp = 0
>  part.ps.prolog.bc_optimize_for_linear = 0
>  part.ps.epilog.spi_shader_col_format = 0x4
>  part.ps.epilog.color_is_int8 = 0x0
>  part.ps.epilog.color_is_int10 = 0x0
>  part.ps.epilog.last_cbuf = 0
>  part.ps.epilog.alpha_func = 7
>  part.ps.epilog.alpha_to_one = 0
>  part.ps.epilog.poly_line_smoothing = 0
>  part.ps.epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[0:1], exec                                  ; BE80047E
>	s_wqm_b64 exec, exec                                    ; BEFE0A7E
>	s_mov_b32 m0, s11                                       ; BEFC030B
>	v_interp_p1_f32 v0, v2, attr0.x                         ; C8000002
>	v_interp_p1_f32 v1, v2, attr0.y                         ; C8040102
>	v_interp_p1_f32 v2, v2, attr0.w                         ; C8080302
>	v_interp_p2_f32 v0, v3, attr0.x                         ; C8010003
>	v_interp_p2_f32 v1, v3, attr0.y                         ; C8050103
>	v_interp_p2_f32 v2, v3, attr0.w                         ; C8090303
>	v_mov_b32_e32 v3, 0x6f800000                            ; 7E0602FF 6F800000
>	v_cmp_lt_f32_e64 vcc, v3, |v2|                          ; D002026A 00020503
>	v_mov_b32_e32 v3, 0x2f800000                            ; 7E0602FF 2F800000
>	v_cndmask_b32_e32 v3, 1.0, v3, vcc                      ; 000606F2
>	v_mul_f32_e32 v2, v3, v2                                ; 10040503
>	v_rcp_f32_e32 v2, v2                                    ; 7E045502
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                    ; C0C60500
>	s_load_dwordx4 s[4:7], s[4:5], 0xc                      ; C082050C
>	v_mul_f32_e32 v0, v2, v0                                ; 10000102
>	v_mul_f32_e32 v1, v2, v1                                ; 10020302
>	v_mul_f32_e32 v0, v0, v3                                ; 10000700
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_and_b32 s4, s4, s19                                   ; 87041304
>	v_mul_f32_e32 v1, v1, v3                                ; 10020701
>	s_and_b64 exec, exec, s[0:1]                            ; 87FE007E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	image_sample v[0:3], v[0:1], s[12:19], s[4:7] dmask:0xf ; F0800F00 00230000
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_buffer_load_dword s4, s[0:3], 0x10                    ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                    ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                    ; C2030112
>	s_buffer_load_dword s0, s[0:3], 0x13                    ; C2000113
>	s_waitcnt vmcnt(0) lgkmcnt(0)                           ; BF8C0070
>	v_mul_f32_e32 v0, s4, v0                                ; 10000004
>	v_mul_f32_e32 v1, s5, v1                                ; 10020205
>	v_mul_f32_e32 v2, s6, v2                                ; 10040406
>	v_mul_f32_e32 v3, s0, v3                                ; 10060600
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1    ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3    ; 5E020702
>	exp mrt0 v0, v0, v1, v1 done compr vm ; F8001C0F 00000100
>	s_endpgm                              ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Private memory VGPRs: 0
>Code Size: 180 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>[1;32mRW buffers slot 0 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0
>                             STRIDE = 0
>                             CACHE_SWIZZLE = 0
>                             SWIZZLE_ENABLE = 0
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_0
>                             DST_SEL_Y = SQ_SEL_0
>                             DST_SEL_Z = SQ_SEL_0
>                             DST_SEL_W = SQ_SEL_0
>                             NUM_FORMAT = BUF_NUM_FORMAT_UNORM
>                             DATA_FORMAT = BUF_DATA_FORMAT_INVALID
>                             ELEMENT_SIZE = 0
>                             INDEX_STRIDE = 0
>                             ADD_TID_ENABLE = 0
>                             ATC = 0
>                             HASH_ENABLE = 0
>                             HEAP = 0
>                             MTYPE = 0
>                             TYPE = SQ_RSRC_BUF
>                             USER_VM_ENABLE = 0
>                             USER_VM_MODE = 0
>                             NV = 0
>
>[1;32mRW buffers slot 1 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0
>                             STRIDE = 0
>                             CACHE_SWIZZLE = 0
>                             SWIZZLE_ENABLE = 0
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_0
>                             DST_SEL_Y = SQ_SEL_0
>                             DST_SEL_Z = SQ_SEL_0
>                             DST_SEL_W = SQ_SEL_0
>                             NUM_FORMAT = BUF_NUM_FORMAT_UNORM
>                             DATA_FORMAT = BUF_DATA_FORMAT_INVALID
>                             ELEMENT_SIZE = 0
>                             INDEX_STRIDE = 0
>                             ADD_TID_ENABLE = 0
>                             ATC = 0
>                             HASH_ENABLE = 0
>                             HEAP = 0
>                             MTYPE = 0
>                             TYPE = SQ_RSRC_BUF
>                             USER_VM_ENABLE = 0
>                             USER_VM_MODE = 0
>                             NV = 0
>
>[1;32mRW buffers slot 2 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0
>                             STRIDE = 0
>                             CACHE_SWIZZLE = 0
>                             SWIZZLE_ENABLE = 0
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_0
>                             DST_SEL_Y = SQ_SEL_0
>                             DST_SEL_Z = SQ_SEL_0
>                             DST_SEL_W = SQ_SEL_0
>                             NUM_FORMAT = BUF_NUM_FORMAT_UNORM
>                             DATA_FORMAT = BUF_DATA_FORMAT_INVALID
>                             ELEMENT_SIZE = 0
>                             INDEX_STRIDE = 0
>                             ADD_TID_ENABLE = 0
>                             ATC = 0
>                             HASH_ENABLE = 0
>                             HEAP = 0
>                             MTYPE = 0
>                             TYPE = SQ_RSRC_BUF
>                             USER_VM_ENABLE = 0
>                             USER_VM_MODE = 0
>                             NV = 0
>
>[1;32mRW buffers slot 3 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0
>                             STRIDE = 0
>                             CACHE_SWIZZLE = 0
>                             SWIZZLE_ENABLE = 0
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_0
>                             DST_SEL_Y = SQ_SEL_0
>                             DST_SEL_Z = SQ_SEL_0
>                             DST_SEL_W = SQ_SEL_0
>                             NUM_FORMAT = BUF_NUM_FORMAT_UNORM
>                             DATA_FORMAT = BUF_DATA_FORMAT_INVALID
>                             ELEMENT_SIZE = 0
>                             INDEX_STRIDE = 0
>                             ADD_TID_ENABLE = 0
>                             ATC = 0
>                             HASH_ENABLE = 0
>                             HEAP = 0
>                             MTYPE = 0
>                             TYPE = SQ_RSRC_BUF
>                             USER_VM_ENABLE = 0
>                             USER_VM_MODE = 0
>                             NV = 0
>
>[1;32mRW buffers slot 4 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0
>                             STRIDE = 0
>                             CACHE_SWIZZLE = 0
>                             SWIZZLE_ENABLE = 0
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_0
>                             DST_SEL_Y = SQ_SEL_0
>                             DST_SEL_Z = SQ_SEL_0
>                             DST_SEL_W = SQ_SEL_0
>                             NUM_FORMAT = BUF_NUM_FORMAT_UNORM
>                             DATA_FORMAT = BUF_DATA_FORMAT_INVALID
>                             ELEMENT_SIZE = 0
>                             INDEX_STRIDE = 0
>                             ADD_TID_ENABLE = 0
>                             ATC = 0
>                             HASH_ENABLE = 0
>                             HEAP = 0
>                             MTYPE = 0
>                             TYPE = SQ_RSRC_BUF
>                             USER_VM_ENABLE = 0
>                             USER_VM_MODE = 0
>                             NV = 0
>
>[1;32mRW buffers slot 5 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0
>                             STRIDE = 0
>                             CACHE_SWIZZLE = 0
>                             SWIZZLE_ENABLE = 0
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_0
>                             DST_SEL_Y = SQ_SEL_0
>                             DST_SEL_Z = SQ_SEL_0
>                             DST_SEL_W = SQ_SEL_0
>                             NUM_FORMAT = BUF_NUM_FORMAT_UNORM
>                             DATA_FORMAT = BUF_DATA_FORMAT_INVALID
>                             ELEMENT_SIZE = 0
>                             INDEX_STRIDE = 0
>                             ADD_TID_ENABLE = 0
>                             ATC = 0
>                             HASH_ENABLE = 0
>                             HEAP = 0
>                             MTYPE = 0
>                             TYPE = SQ_RSRC_BUF
>                             USER_VM_ENABLE = 0
>                             USER_VM_MODE = 0
>                             NV = 0
>
>[1;32mRW buffers slot 6 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0
>                             STRIDE = 0
>                             CACHE_SWIZZLE = 0
>                             SWIZZLE_ENABLE = 0
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_0
>                             DST_SEL_Y = SQ_SEL_0
>                             DST_SEL_Z = SQ_SEL_0
>                             DST_SEL_W = SQ_SEL_0
>                             NUM_FORMAT = BUF_NUM_FORMAT_UNORM
>                             DATA_FORMAT = BUF_DATA_FORMAT_INVALID
>                             ELEMENT_SIZE = 0
>                             INDEX_STRIDE = 0
>                             ADD_TID_ENABLE = 0
>                             ATC = 0
>                             HASH_ENABLE = 0
>                             HEAP = 0
>                             MTYPE = 0
>                             TYPE = SQ_RSRC_BUF
>                             USER_VM_ENABLE = 0
>                             USER_VM_MODE = 0
>                             NV = 0
>
>[1;32mRW buffers slot 7 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0
>                             STRIDE = 0
>                             CACHE_SWIZZLE = 0
>                             SWIZZLE_ENABLE = 0
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_0
>                             DST_SEL_Y = SQ_SEL_0
>                             DST_SEL_Z = SQ_SEL_0
>                             DST_SEL_W = SQ_SEL_0
>                             NUM_FORMAT = BUF_NUM_FORMAT_UNORM
>                             DATA_FORMAT = BUF_DATA_FORMAT_INVALID
>                             ELEMENT_SIZE = 0
>                             INDEX_STRIDE = 0
>                             ADD_TID_ENABLE = 0
>                             ATC = 0
>                             HASH_ENABLE = 0
>                             HEAP = 0
>                             MTYPE = 0
>                             TYPE = SQ_RSRC_BUF
>                             USER_VM_ENABLE = 0
>                             USER_VM_MODE = 0
>                             NV = 0
>
>[1;32mRW buffers slot 8 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0
>                             STRIDE = 0
>                             CACHE_SWIZZLE = 0
>                             SWIZZLE_ENABLE = 0
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_0
>                             DST_SEL_Y = SQ_SEL_0
>                             DST_SEL_Z = SQ_SEL_0
>                             DST_SEL_W = SQ_SEL_0
>                             NUM_FORMAT = BUF_NUM_FORMAT_UNORM
>                             DATA_FORMAT = BUF_DATA_FORMAT_INVALID
>                             ELEMENT_SIZE = 0
>                             INDEX_STRIDE = 0
>                             ADD_TID_ENABLE = 0
>                             ATC = 0
>                             HASH_ENABLE = 0
>                             HEAP = 0
>                             MTYPE = 0
>                             TYPE = SQ_RSRC_BUF
>                             USER_VM_ENABLE = 0
>                             USER_VM_MODE = 0
>                             NV = 0
>
>[1;32mRW buffers slot 9 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0x079a9d60
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0
>                             STRIDE = 0
>                             CACHE_SWIZZLE = 0
>                             SWIZZLE_ENABLE = 0
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 32 (0x00000020)
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_X
>                             DST_SEL_Y = SQ_SEL_Y
>                             DST_SEL_Z = SQ_SEL_Z
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_32
>                             ELEMENT_SIZE = 0
>                             INDEX_STRIDE = 0
>                             ADD_TID_ENABLE = 0
>                             ATC = 0
>                             HASH_ENABLE = 0
>                             HEAP = 0
>                             MTYPE = 0
>                             TYPE = SQ_RSRC_BUF
>                             USER_VM_ENABLE = 0
>                             USER_VM_MODE = 0
>                             NV = 0
>
>[1;32mRW buffers slot 10 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0
>                             STRIDE = 0
>                             CACHE_SWIZZLE = 0
>                             SWIZZLE_ENABLE = 0
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_0
>                             DST_SEL_Y = SQ_SEL_0
>                             DST_SEL_Z = SQ_SEL_0
>                             DST_SEL_W = SQ_SEL_0
>                             NUM_FORMAT = BUF_NUM_FORMAT_UNORM
>                             DATA_FORMAT = BUF_DATA_FORMAT_INVALID
>                             ELEMENT_SIZE = 0
>                             INDEX_STRIDE = 0
>                             ADD_TID_ENABLE = 0
>                             ATC = 0
>                             HASH_ENABLE = 0
>                             HEAP = 0
>                             MTYPE = 0
>                             TYPE = SQ_RSRC_BUF
>                             USER_VM_ENABLE = 0
>                             USER_VM_MODE = 0
>                             NV = 0
>
>[1;32mRW buffers slot 11 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0x079a9c40
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0
>                             STRIDE = 0
>                             CACHE_SWIZZLE = 0
>                             SWIZZLE_ENABLE = 0
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 128 (0x00000080)
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_X
>                             DST_SEL_Y = SQ_SEL_Y
>                             DST_SEL_Z = SQ_SEL_Z
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_32
>                             ELEMENT_SIZE = 0
>                             INDEX_STRIDE = 0
>                             ADD_TID_ENABLE = 0
>                             ATC = 0
>                             HASH_ENABLE = 0
>                             HEAP = 0
>                             MTYPE = 0
>                             TYPE = SQ_RSRC_BUF
>                             USER_VM_ENABLE = 0
>                             USER_VM_MODE = 0
>                             NV = 0
>
>[1;32mRW buffers slot 12 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0x008e8000
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0
>                             STRIDE = 0
>                             CACHE_SWIZZLE = 0
>                             SWIZZLE_ENABLE = 0
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 8
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_X
>                             DST_SEL_Y = SQ_SEL_Y
>                             DST_SEL_Z = SQ_SEL_Z
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_32
>                             ELEMENT_SIZE = 0
>                             INDEX_STRIDE = 0
>                             ADD_TID_ENABLE = 0
>                             ATC = 0
>                             HASH_ENABLE = 0
>                             HEAP = 0
>                             MTYPE = 0
>                             TYPE = SQ_RSRC_BUF
>                             USER_VM_ENABLE = 0
>                             USER_VM_MODE = 0
>                             NV = 0
>
>[1;32mVS - Vertex buffer slot 0 (CPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0
>                             STRIDE = 0
>                             CACHE_SWIZZLE = 0
>                             SWIZZLE_ENABLE = 0
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_0
>                             DST_SEL_Y = SQ_SEL_0
>                             DST_SEL_Z = SQ_SEL_0
>                             DST_SEL_W = SQ_SEL_0
>                             NUM_FORMAT = BUF_NUM_FORMAT_UNORM
>                             DATA_FORMAT = BUF_DATA_FORMAT_INVALID
>                             ELEMENT_SIZE = 0
>                             INDEX_STRIDE = 0
>                             ADD_TID_ENABLE = 0
>                             ATC = 0
>                             HASH_ENABLE = 0
>                             HEAP = 0
>                             MTYPE = 0
>                             TYPE = SQ_RSRC_BUF
>                             USER_VM_ENABLE = 0
>                             USER_VM_MODE = 0
>                             NV = 0
>
>[1;32mVS - Vertex buffer slot 1 (CPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0
>                             STRIDE = 0
>                             CACHE_SWIZZLE = 0
>                             SWIZZLE_ENABLE = 0
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_0
>                             DST_SEL_Y = SQ_SEL_0
>                             DST_SEL_Z = SQ_SEL_0
>                             DST_SEL_W = SQ_SEL_0
>                             NUM_FORMAT = BUF_NUM_FORMAT_UNORM
>                             DATA_FORMAT = BUF_DATA_FORMAT_INVALID
>                             ELEMENT_SIZE = 0
>                             INDEX_STRIDE = 0
>                             ADD_TID_ENABLE = 0
>                             ATC = 0
>                             HASH_ENABLE = 0
>                             HEAP = 0
>                             MTYPE = 0
>                             TYPE = SQ_RSRC_BUF
>                             USER_VM_ENABLE = 0
>                             USER_VM_MODE = 0
>                             NV = 0
>
>[1;32mVS - Constant buffer slot 0 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0x93a3c9c0
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0
>                             STRIDE = 0
>                             CACHE_SWIZZLE = 0
>                             SWIZZLE_ENABLE = 0
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 64 (0x00000040)
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_X
>                             DST_SEL_Y = SQ_SEL_Y
>                             DST_SEL_Z = SQ_SEL_Z
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_32
>                             ELEMENT_SIZE = 0
>                             INDEX_STRIDE = 0
>                             ADD_TID_ENABLE = 0
>                             ATC = 0
>                             HASH_ENABLE = 0
>                             HEAP = 0
>                             MTYPE = 0
>                             TYPE = SQ_RSRC_BUF
>                             USER_VM_ENABLE = 0
>                             USER_VM_MODE = 0
>                             NV = 0
>
>[1;32mPS - Constant buffer slot 0 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0x93a3ca00
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0
>                             STRIDE = 0
>                             CACHE_SWIZZLE = 0
>                             SWIZZLE_ENABLE = 0
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 80 (0x00000050)
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_X
>                             DST_SEL_Y = SQ_SEL_Y
>                             DST_SEL_Z = SQ_SEL_Z
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_32
>                             ELEMENT_SIZE = 0
>                             INDEX_STRIDE = 0
>                             ADD_TID_ENABLE = 0
>                             ATC = 0
>                             HASH_ENABLE = 0
>                             HEAP = 0
>                             MTYPE = 0
>                             TYPE = SQ_RSRC_BUF
>                             USER_VM_ENABLE = 0
>                             USER_VM_MODE = 0
>                             NV = 0
>
>[1;32mPS - Sampler slot 0 (GPU list):[0m
>        [1;33mSQ_IMG_RSRC_WORD0[0m <- 0x008c98c0
>        [1;33mSQ_IMG_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0
>                             MIN_LOD = 0
>                             DATA_FORMAT_GFX6 = IMG_DATA_FORMAT_8_8_8_8
>                             NUM_FORMAT_GFX6 = IMG_NUM_FORMAT_UNORM
>                             MTYPE = 0
>                             DATA_FORMAT_GFX9 = IMG_DATA_FORMAT_8_8_8_8
>                             NUM_FORMAT_GFX9 = IMG_NUM_FORMAT_UNORM
>                             NUM_FORMAT_FMASK = IMG_FMASK_8_2_1
>                             NUM_FORMAT_ASTC_2D = IMG_ASTC_2D_4x4
>                             NUM_FORMAT_ASTC_3D = IMG_ASTC_3D_3x3x3
>                             NV = 0
>                             META_DIRECT = 0
>        [1;33mSQ_IMG_RSRC_WORD2[0m <- WIDTH = 5400 (0x1518)
>                             HEIGHT = 19 (0x013)
>                             PERF_MOD = 4
>                             INTERLACED = 0
>        [1;33mSQ_IMG_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_X
>                             DST_SEL_Y = SQ_SEL_Y
>                             DST_SEL_Z = SQ_SEL_Z
>                             DST_SEL_W = SQ_SEL_W
>                             BASE_LEVEL = 0
>                             LAST_LEVEL = 4
>                             TILING_INDEX = 13 (0xd)
>                             POW2_PAD = 1
>                             MTYPE = 0
>                             ATC = 0
>                             TYPE = SQ_RSRC_IMG_2D
>                             SW_MODE = 13 (0xd)
>        [1;33mSQ_IMG_RSRC_WORD4[0m <- DEPTH = 0
>                             PITCH_GFX6 = 8191 (0x1fff)
>                             PITCH_GFX9 = 8191 (0x1fff)
>                             BC_SWIZZLE = BC_SWIZZLE_XYZW
>        [1;33mSQ_IMG_RSRC_WORD5[0m <- BASE_ARRAY = 0
>                             LAST_ARRAY = 0
>                             ARRAY_PITCH = 0
>                             META_DATA_ADDRESS = 0
>                             META_LINEAR = 0
>                             META_PIPE_ALIGNED = 0
>                             META_RB_ALIGNED = 0
>                             MAX_MIP = 0
>        [1;33mSQ_IMG_RSRC_WORD6[0m <- MIN_LOD_WARN = 0
>                             COUNTER_BANK_ID = 0
>                             LOD_HDW_CNT_EN = 0
>                             COMPRESSION_EN = 0
>                             ALPHA_IS_ON_MSB = 0
>                             COLOR_TRANSFORM = 0
>                             LOST_ALPHA_BITS = 0
>                             LOST_COLOR_BITS = 0
>        [1;33mSQ_IMG_RSRC_WORD7[0m <- 0xffffffff
>[1;36m    Buffer:[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0x03ffe000
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0
>                             STRIDE = 0
>                             CACHE_SWIZZLE = 0
>                             SWIZZLE_ENABLE = 0
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>                             USER_VM_ENABLE = 1
>                             USER_VM_MODE = 1
>                             NV = 1
>[1;36m    FMASK:[0m
>        [1;33mSQ_IMG_RSRC_WORD0[0m <- 0
>        [1;33mSQ_IMG_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0
>                             MIN_LOD = 0
>                             DATA_FORMAT_GFX6 = IMG_DATA_FORMAT_INVALID
>                             NUM_FORMAT_GFX6 = IMG_NUM_FORMAT_UNORM
>                             MTYPE = 0
>                             DATA_FORMAT_GFX9 = IMG_DATA_FORMAT_INVALID
>                             NUM_FORMAT_GFX9 = IMG_NUM_FORMAT_UNORM
>                             NUM_FORMAT_FMASK = IMG_FMASK_8_2_1
>                             NUM_FORMAT_ASTC_2D = IMG_ASTC_2D_4x4
>                             NUM_FORMAT_ASTC_3D = IMG_ASTC_3D_3x3x3
>                             NV = 0
>                             META_DIRECT = 0
>        [1;33mSQ_IMG_RSRC_WORD2[0m <- WIDTH = 0
>                             HEIGHT = 0
>                             PERF_MOD = 0
>                             INTERLACED = 0
>        [1;33mSQ_IMG_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_0
>                             DST_SEL_Y = SQ_SEL_0
>                             DST_SEL_Z = SQ_SEL_0
>                             DST_SEL_W = SQ_SEL_1
>                             BASE_LEVEL = 0
>                             LAST_LEVEL = 0
>                             TILING_INDEX = 0
>                             POW2_PAD = 0
>                             MTYPE = 0
>                             ATC = 0
>                             TYPE = SQ_RSRC_IMG_1D
>                             SW_MODE = 0
>        [1;33mSQ_IMG_RSRC_WORD4[0m <- DEPTH = 18 (0x012)
>                             PITCH_GFX6 = 0
>                             PITCH_GFX9 = 32768 (0x8000)
>                             BC_SWIZZLE = BC_SWIZZLE_XYZW
>        [1;33mSQ_IMG_RSRC_WORD5[0m <- BASE_ARRAY = 0
>                             LAST_ARRAY = 1920 (0x780)
>                             ARRAY_PITCH = 0
>                             META_DATA_ADDRESS = 120 (0x78)
>                             META_LINEAR = 0
>                             META_PIPE_ALIGNED = 0
>                             META_RB_ALIGNED = 0
>                             MAX_MIP = 0
>        [1;33mSQ_IMG_RSRC_WORD6[0m <- MIN_LOD_WARN = 0
>                             COUNTER_BANK_ID = 0
>                             LOD_HDW_CNT_EN = 1
>                             COMPRESSION_EN = 0
>                             ALPHA_IS_ON_MSB = 1
>                             COLOR_TRANSFORM = 0
>                             LOST_ALPHA_BITS = 8
>                             LOST_COLOR_BITS = 7
>        [1;33mSQ_IMG_RSRC_WORD7[0m <- 0
>[1;36m    Sampler state:[0m
>        [1;33mSQ_IMG_SAMP_WORD0[0m <- CLAMP_X = SQ_TEX_CLAMP_LAST_TEXEL
>                             CLAMP_Y = SQ_TEX_CLAMP_LAST_TEXEL
>                             CLAMP_Z = SQ_TEX_WRAP
>                             MAX_ANISO_RATIO = 0
>                             DEPTH_COMPARE_FUNC = SQ_TEX_DEPTH_COMPARE_NEVER
>                             FORCE_UNNORMALIZED = 0
>                             ANISO_THRESHOLD = 0
>                             MC_COORD_TRUNC = 0
>                             FORCE_DEGAMMA = 0
>                             ANISO_BIAS = 0
>                             TRUNC_COORD = 0
>                             DISABLE_CUBE_WRAP = 1
>                             FILTER_MODE = 0
>                             COMPAT_MODE = 0
>        [1;33mSQ_IMG_SAMP_WORD1[0m <- MIN_LOD = 0
>                             MAX_LOD = 3840 (0xf00)
>                             PERF_MIP = 0
>                             PERF_Z = 0
>        [1;33mSQ_IMG_SAMP_WORD2[0m <- LOD_BIAS = 0
>                             LOD_BIAS_SEC = 0
>                             XY_MAG_FILTER = SQ_TEX_XY_FILTER_BILINEAR
>                             XY_MIN_FILTER = SQ_TEX_XY_FILTER_BILINEAR
>                             Z_FILTER = SQ_TEX_Z_FILTER_NONE
>                             MIP_FILTER = SQ_TEX_Z_FILTER_LINEAR
>                             MIP_POINT_PRECLAMP = 1
>                             DISABLE_LSB_CEIL = 1
>                             FILTER_PREC_FIX = 1
>                             ANISO_OVERRIDE = 0
>                             BLEND_ZERO_PRT = 1
>        [1;33mSQ_IMG_SAMP_WORD3[0m <- BORDER_COLOR_PTR = 0
>                             BORDER_COLOR_TYPE = SQ_TEX_BORDER_COLOR_TRANS_BLACK
>                             SKIP_DEGAMMA = 0
>
>
>Memory-mapped registers:
>        [1;33mGRBM_STATUS[0m <- ME0PIPE0_CMDFIFO_AVAIL = 8
>                       SRBM_RQ_PENDING = 1
>                       ME0PIPE0_CF_RQ_PENDING = 0
>                       ME0PIPE0_PF_RQ_PENDING = 0
>                       GDS_DMA_RQ_PENDING = 0
>                       DB_CLEAN = 0
>                       CB_CLEAN = 0
>                       TA_BUSY = 1
>                       GDS_BUSY = 0
>                       WD_BUSY_NO_DMA = 0
>                       VGT_BUSY = 1
>                       IA_BUSY_NO_DMA = 0
>                       IA_BUSY = 0
>                       SX_BUSY = 1
>                       WD_BUSY = 0
>                       SPI_BUSY = 1
>                       BCI_BUSY = 1
>                       SC_BUSY = 1
>                       PA_BUSY = 1
>                       DB_BUSY = 1
>                       CP_COHERENCY_BUSY = 0
>                       CP_BUSY = 1
>                       CB_BUSY = 1
>                       GUI_ACTIVE = 1
>                       RSMU_RQ_PENDING = 1
>
>
>Last 60 lines of dmesg:
>
>[   20.788043]  drm_helper_crtc_in_use+0x88/0x90 [drm_kms_helper]
>[   20.788052]  __drm_helper_disable_unused_functions+0x8e/0xe0 [drm_kms_helper]
>[   20.788055]  drm_crtc_helper_set_config+0xde/0x990 [drm_kms_helper]
>[   20.788058]  ? __radix_tree_delete+0x8d/0xb0
>[   20.788074]  radeon_crtc_set_config+0x4a/0x110 [radeon]
>[   20.788082]  __drm_mode_set_config_internal+0x65/0x110 [drm]
>[   20.788092]  drm_mode_setcrtc+0x4d6/0x620 [drm]
>[   20.788098]  ? drm_modeset_lock+0x31/0xd0 [drm]
>[   20.788106]  drm_ioctl+0x20d/0x4b0 [drm]
>[   20.788113]  ? drm_mode_getcrtc+0x180/0x180 [drm]
>[   20.788126]  radeon_drm_ioctl+0x4c/0x80 [radeon]
>[   20.788129]  do_vfs_ioctl+0xa1/0x5e0
>[   20.788134]  ? SyS_futex+0x81/0x180
>[   20.788135]  SyS_ioctl+0x79/0x90
>[   20.788138]  entry_SYSCALL_64_fastpath+0x1e/0xad
>[   20.788140] RIP: 0033:0x7f45c11e6357
>[   20.788142] RSP: 002b:00007fff0bc2b438 EFLAGS: 00000246 ORIG_RAX: 0000000000000010
>[   20.788143] RAX: ffffffffffffffda RBX: 0000000000000060 RCX: 00007f45c11e6357
>[   20.788143] RDX: 00007fff0bc2b470 RSI: 00000000c06864a2 RDI: 000000000000000b
>[   20.788144] RBP: 00007fff0bc2a770 R08: 0000000000000000 R09: 0000000000000000
>[   20.788144] R10: 0000000000000000 R11: 0000000000000246 R12: 0000558530bb5f80
>[   20.788145] R13: 00005585309b2420 R14: 0000000000000000 R15: 0000558530b16e90
>[   20.788147] ---[ end trace 321410a3bc5555eb ]---
>[   20.788160] ------------[ cut here ]------------
>[   20.788164] WARNING: CPU: 0 PID: 2716 at drivers/gpu/drm/drm_crtc_helper.c:138 drm_helper_crtc_in_use+0x88/0x90 [drm_kms_helper]
>[   20.788164] Modules linked in: xt_comment xt_multiport xt_tcpudp nf_conntrack_ipv4 nf_defrag_ipv4 xt_conntrack nf_conntrack iptable_filter ip_tables ip6table_filter ip6_tables x_tables iTCO_wdt iTCO_vendor_support binfmt_misc intel_rapl sb_edac edac_core x86_pkg_temp_thermal intel_powerclamp coretemp kvm_intel snd_hda_codec_realtek kvm snd_hda_codec_generic snd_hda_codec_hdmi snd_hda_intel snd_hda_codec dcdbas snd_hda_core irqbypass dell_smm_hwmon snd_hwdep snd_pcm intel_cstate intel_rapl_perf snd_timer serio_raw snd mei_me mei soundcore ib_iser nfsd input_leds lpc_ich shpchp rdma_cm mac_hid iw_cm ib_cm auth_rpcgss ib_core nfs_acl lockd grace configfs sunrpc iscsi_tcp libiscsi_tcp libiscsi scsi_transport_iscsi autofs4 btrfs raid10 raid456 async_raid6_recov async_memcpy async_pq async_xor async_tx
>[   20.788194]  xor raid6_pq libcrc32c raid1 raid0 multipath linear hid_generic usbhid hid amdkfd amd_iommu_v2 radeon i2c_algo_bit ttm drm_kms_helper syscopyarea sysfillrect sysimgblt fb_sys_fops drm crct10dif_pclmul crc32_pclmul ghash_clmulni_intel pcbc isci e1000e aesni_intel psmouse libsas aes_x86_64 crypto_simd glue_helper e1000 cryptd ptp ahci libahci pps_core scsi_transport_sas
>[   20.788209] CPU: 0 PID: 2716 Comm: Xorg Tainted: G        W       4.11.0-rc4+ #1
>[   20.788212] Hardware name: Dell Inc. Precision T5600/0Y56T3, BIOS A14 09/29/2014
>[   20.788212] Call Trace:
>[   20.788215]  dump_stack+0x63/0x90
>[   20.788218]  __warn+0xcb/0xf0
>[   20.788220]  warn_slowpath_null+0x1d/0x20
>[   20.788223]  drm_helper_crtc_in_use+0x88/0x90 [drm_kms_helper]
>[   20.788227]  __drm_helper_disable_unused_functions+0x8e/0xe0 [drm_kms_helper]
>[   20.788232]  drm_crtc_helper_set_config+0xde/0x990 [drm_kms_helper]
>[   20.788237]  ? __radix_tree_delete+0x8d/0xb0
>[   20.788250]  radeon_crtc_set_config+0x4a/0x110 [radeon]
>[   20.788258]  __drm_mode_set_config_internal+0x65/0x110 [drm]
>[   20.788268]  drm_mode_setcrtc+0x4d6/0x620 [drm]
>[   20.788275]  ? drm_modeset_lock+0x31/0xd0 [drm]
>[   20.788282]  drm_ioctl+0x20d/0x4b0 [drm]
>[   20.788290]  ? drm_mode_getcrtc+0x180/0x180 [drm]
>[   20.788303]  radeon_drm_ioctl+0x4c/0x80 [radeon]
>[   20.788306]  do_vfs_ioctl+0xa1/0x5e0
>[   20.788311]  ? SyS_futex+0x81/0x180
>[   20.788312]  SyS_ioctl+0x79/0x90
>[   20.788314]  entry_SYSCALL_64_fastpath+0x1e/0xad
>[   20.788317] RIP: 0033:0x7f45c11e6357
>[   20.788321] RSP: 002b:00007fff0bc2b438 EFLAGS: 00000246 ORIG_RAX: 0000000000000010
>[   20.788322] RAX: ffffffffffffffda RBX: 0000000000000060 RCX: 00007f45c11e6357
>[   20.788323] RDX: 00007fff0bc2b470 RSI: 00000000c06864a2 RDI: 000000000000000b
>[   20.788323] RBP: 00007fff0bc2a770 R08: 0000000000000000 R09: 0000000000000000
>[   20.788324] R10: 0000000000000000 R11: 0000000000000246 R12: 0000558530bb5f80
>[   20.788325] R13: 00005585309b2420 R14: 0000000000000000 R15: 0000558530b16e90
>[   20.788327] ---[ end trace 321410a3bc5555ec ]---
>[   22.715702] input: PS/2 Generic Mouse as /devices/platform/i8042/serio1/input/input4
>[11896.720460] EXT4-fs (sda1): mounted filesystem with ordered data mode. Opts: (null)
>[12639.436590] radeon 0000:09:00.0: ring 0 stalled for more than 10420msec
>[12639.436599] radeon 0000:09:00.0: GPU lockup (current fence id 0x00000000002c738c last fence id 0x00000000002c738d on ring 0)

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Attachments on bug 100465: 130563 | 130564 | 130569 | 130787 | 130788 | 130789 | 130790

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