Attachment 131703 Details for Bug 101167 – dmesg from when we fail the test

dmesg from when we fail the test

dmesg-during(1).log (text/x-log), 857.56 KB, created by Marta Löfstedt on 2017-06-05 06:16:54 UTC

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Creator: Marta Löfstedt

Created: 2017-06-05 06:16:54 UTC

Size: 857.56 KB

patch

obsolete

>[   96.498642] Console: switching to colour dummy device 80x25
>[   96.498901] [IGT] core_auth: executing
>[   96.515928] [IGT] core_auth: starting subtest basic-auth
>[   96.516581] [IGT] core_auth: exiting, ret=0
>[   96.540271] Console: switching to colour frame buffer device 240x67
>[   96.715852] Console: switching to colour dummy device 80x25
>[   96.716134] [IGT] core_prop_blob: executing
>[   96.729998] [IGT] core_prop_blob: starting subtest basic
>[   96.730235] [IGT] core_prop_blob: exiting, ret=0
>[   96.790082] Console: switching to colour frame buffer device 240x67
>[   96.991358] Console: switching to colour dummy device 80x25
>[   96.991511] [IGT] drv_getparams_basic: executing
>[   97.013481] [IGT] drv_getparams_basic: starting subtest basic-eu-total
>[   97.013646] [IGT] drv_getparams_basic: exiting, ret=0
>[   97.056705] Console: switching to colour frame buffer device 240x67
>[   97.296894] Console: switching to colour dummy device 80x25
>[   97.297344] [IGT] drv_getparams_basic: executing
>[   97.314935] [IGT] drv_getparams_basic: starting subtest basic-subslice-total
>[   97.315185] [IGT] drv_getparams_basic: exiting, ret=0
>[   97.356461] Console: switching to colour frame buffer device 240x67
>[   97.535820] Console: switching to colour dummy device 80x25
>[   97.536003] [IGT] drv_hangman: executing
>[   97.557838] [IGT] drv_hangman: starting subtest error-state-basic
>[   97.558289] [drm:error_state_write [i915]] Resetting error state
>[   97.566129] [drm] GPU HANG: ecode 9:0:0xfffffffe, reason: Manually setting wedged to 1, action: reset
>[   97.566152] [drm] GPU hangs can indicate a bug anywhere in the entire gfx stack, including userspace.
>[   97.566161] [drm] Please file a _new_ bug report on bugs.freedesktop.org against DRI -> DRM/Intel
>[   97.566167] [drm] drm/i915 developers can then reassign to the right component if it's not a kernel issue.
>[   97.566174] [drm] The gpu crash dump is required to analyze gpu hangs, so please always attach it.
>[   97.566179] [drm] GPU crash dump saved to /sys/class/drm/card0/error
>[   97.567845] [drm:i915_reset_and_wakeup [i915]] resetting chip
>[   97.568334] drm/i915: Resetting chip after gpu hang
>[   97.570931] [drm] RC6 on
>[   97.571458] [drm:gen8_init_common_ring [i915]] Execlists enabled for rcs0
>[   97.571554] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 14
>[   97.571740] [drm:gen8_init_common_ring [i915]] Execlists enabled for bcs0
>[   97.571922] [drm:gen8_init_common_ring [i915]] Execlists enabled for vcs0
>[   97.572287] [drm:gen8_init_common_ring [i915]] Execlists enabled for vecs0
>[   97.578345] [drm:error_state_write [i915]] Resetting error state
>[   97.578945] [IGT] drv_hangman: exiting, ret=0
>[   97.606227] Console: switching to colour frame buffer device 240x67
>[   97.790547] Console: switching to colour dummy device 80x25
>[   97.790779] [IGT] gem_basic: executing
>[   97.812315] [IGT] gem_basic: starting subtest bad-close
>[   97.812423] [IGT] gem_basic: exiting, ret=0
>[   97.822847] Console: switching to colour frame buffer device 240x67
>[   98.015318] Console: switching to colour dummy device 80x25
>[   98.015636] [IGT] gem_basic: executing
>[   98.028888] [IGT] gem_basic: starting subtest create-close
>[   98.029241] [IGT] gem_basic: exiting, ret=0
>[   98.056367] Console: switching to colour frame buffer device 240x67
>[   98.239205] Console: switching to colour dummy device 80x25
>[   98.239488] [IGT] gem_basic: executing
>[   98.252879] [IGT] gem_basic: starting subtest create-fd-close
>[   98.253729] [IGT] gem_basic: exiting, ret=0
>[   98.306420] Console: switching to colour frame buffer device 240x67
>[   98.509419] Console: switching to colour dummy device 80x25
>[   98.509617] [IGT] gem_busy: executing
>[   98.533932] [IGT] gem_busy: starting subtest basic-busy-default
>[   98.554694] [IGT] gem_busy: exiting, ret=0
>[   98.606215] Console: switching to colour frame buffer device 240x67
>[   98.814596] Console: switching to colour dummy device 80x25
>[   98.814759] [IGT] gem_busy: executing
>[   98.841998] [IGT] gem_busy: starting subtest basic-hang-default
>[  117.735979] [drm] GPU HANG: ecode 9:0:0xe757fefe, in gem_busy [1574], reason: Hang on rcs0, action: reset
>[  117.736445] [drm:i915_reset_and_wakeup [i915]] resetting chip
>[  117.736577] drm/i915: Resetting chip after gpu hang
>[  117.737676] [drm:i915_gem_reset [i915]] context gem_busy[1574]/0 marked guilty (score 10) banned? no
>[  117.737735] [drm:i915_gem_reset [i915]] resetting rcs0 to restart from tail of request 0x158
>[  117.737891] [drm] RC6 on
>[  117.738258] [drm:gen8_init_common_ring [i915]] Execlists enabled for rcs0
>[  117.738284] [drm:gen8_init_common_ring [i915]] Restarting rcs0:0 from 0x158
>[  117.738325] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 14
>[  117.738441] [drm:gen8_init_common_ring [i915]] Execlists enabled for bcs0
>[  117.738501] [drm:gen8_init_common_ring [i915]] Execlists enabled for vcs0
>[  117.738560] [drm:gen8_init_common_ring [i915]] Execlists enabled for vecs0
>[  117.739372] [IGT] gem_busy: exiting, ret=0
>[  117.782680] Console: switching to colour frame buffer device 240x67
>[  117.987517] Console: switching to colour dummy device 80x25
>[  117.987649] [IGT] gem_close_race: executing
>[  118.011683] [IGT] gem_close_race: starting subtest basic-process
>[  118.019651] [IGT] gem_close_race: exiting, ret=0
>[  118.066300] Console: switching to colour frame buffer device 240x67
>[  118.265358] Console: switching to colour dummy device 80x25
>[  118.265525] [IGT] gem_close_race: executing
>[  118.289247] [IGT] gem_close_race: starting subtest basic-threads
>[  119.366336] [IGT] gem_close_race: exiting, ret=0
>[  119.415492] Console: switching to colour frame buffer device 240x67
>[  119.640003] Console: switching to colour dummy device 80x25
>[  119.640316] [IGT] gem_cpu_reloc: executing
>[  119.665609] [IGT] gem_cpu_reloc: starting subtest basic
>[  119.679510] [IGT] gem_cpu_reloc: exiting, ret=0
>[  119.732505] Console: switching to colour frame buffer device 240x67
>[  119.929043] Console: switching to colour dummy device 80x25
>[  119.929159] [IGT] gem_cs_tlb: executing
>[  119.950287] [IGT] gem_cs_tlb: starting subtest basic-default
>[  121.031682] [IGT] gem_cs_tlb: exiting, ret=0
>[  121.081623] Console: switching to colour frame buffer device 240x67
>[  121.213647] Console: switching to colour dummy device 80x25
>[  121.213760] [IGT] gem_ctx_basic: executing
>[  123.681713] [IGT] gem_ctx_basic: exiting, ret=0
>[  123.730650] Console: switching to colour frame buffer device 240x67
>[  123.912869] Console: switching to colour dummy device 80x25
>[  123.913003] [IGT] gem_ctx_create: executing
>[  123.934282] [IGT] gem_ctx_create: starting subtest basic
>[  123.935783] [IGT] gem_ctx_create: exiting, ret=0
>[  123.980581] Console: switching to colour frame buffer device 240x67
>[  124.104102] Console: switching to colour dummy device 80x25
>[  124.104201] [IGT] gem_ctx_create: executing
>[  124.128783] [IGT] gem_ctx_create: starting subtest basic-files
>[  130.316652] [IGT] gem_ctx_create: exiting, ret=0
>[  130.361780] Console: switching to colour frame buffer device 240x67
>[  130.540822] Console: switching to colour dummy device 80x25
>[  130.541279] [IGT] gem_ctx_exec: executing
>[  130.566597] [IGT] gem_ctx_exec: starting subtest basic
>[  130.568835] [IGT] gem_ctx_exec: exiting, ret=0
>[  130.595357] Console: switching to colour frame buffer device 240x67
>[  130.792498] Console: switching to colour dummy device 80x25
>[  130.792819] [IGT] gem_ctx_param: executing
>[  130.817574] [IGT] gem_ctx_param: starting subtest basic
>[  130.817923] [IGT] gem_ctx_param: exiting, ret=0
>[  130.862140] Console: switching to colour frame buffer device 240x67
>[  131.032814] Console: switching to colour dummy device 80x25
>[  131.033322] [IGT] gem_ctx_param: executing
>[  131.062426] [IGT] gem_ctx_param: starting subtest basic-default
>[  131.062730] [IGT] gem_ctx_param: exiting, ret=0
>[  131.111838] Console: switching to colour frame buffer device 240x67
>[  131.311112] Console: switching to colour dummy device 80x25
>[  131.311310] [IGT] gem_ctx_switch: executing
>[  131.327535] [IGT] gem_ctx_switch: starting subtest basic-default
>[  136.802816] [IGT] gem_ctx_switch: exiting, ret=0
>[  136.859670] Console: switching to colour frame buffer device 240x67
>[  137.047336] Console: switching to colour dummy device 80x25
>[  137.047662] [IGT] gem_ctx_switch: executing
>[  137.067636] [IGT] gem_ctx_switch: starting subtest basic-default-heavy
>[  153.281814] [IGT] gem_ctx_switch: exiting, ret=0
>[  153.337427] Console: switching to colour frame buffer device 240x67
>[  153.482792] Console: switching to colour dummy device 80x25
>[  153.483186] [IGT] gem_exec_basic: executing
>[  153.510777] [IGT] gem_exec_basic: starting subtest basic-blt
>[  153.513987] [IGT] gem_exec_basic: exiting, ret=0
>[  153.570920] Console: switching to colour frame buffer device 240x67
>[  153.779845] Console: switching to colour dummy device 80x25
>[  153.780344] [IGT] gem_exec_basic: executing
>[  153.807839] [IGT] gem_exec_basic: starting subtest basic-bsd
>[  153.811164] [IGT] gem_exec_basic: exiting, ret=0
>[  153.854207] Console: switching to colour frame buffer device 240x67
>[  154.052777] Console: switching to colour dummy device 80x25
>[  154.053197] [IGT] gem_exec_basic: executing
>[  154.069463] [IGT] gem_exec_basic: starting subtest basic-bsd1
>[  154.072521] [IGT] gem_exec_basic: exiting, ret=77
>[  154.120873] Console: switching to colour frame buffer device 240x67
>[  154.315179] Console: switching to colour dummy device 80x25
>[  154.315387] [IGT] gem_exec_basic: executing
>[  154.330381] [IGT] gem_exec_basic: starting subtest basic-bsd2
>[  154.333455] [IGT] gem_exec_basic: exiting, ret=77
>[  154.387452] Console: switching to colour frame buffer device 240x67
>[  154.587282] Console: switching to colour dummy device 80x25
>[  154.587463] [IGT] gem_exec_basic: executing
>[  154.603410] [IGT] gem_exec_basic: starting subtest basic-default
>[  154.606722] [IGT] gem_exec_basic: exiting, ret=0
>[  154.653888] Console: switching to colour frame buffer device 240x67
>[  154.817164] Console: switching to colour dummy device 80x25
>[  154.817420] [IGT] gem_exec_basic: executing
>[  154.845337] [IGT] gem_exec_basic: starting subtest basic-render
>[  154.849038] [IGT] gem_exec_basic: exiting, ret=0
>[  154.903948] Console: switching to colour frame buffer device 240x67
>[  155.088390] Console: switching to colour dummy device 80x25
>[  155.088627] [IGT] gem_exec_basic: executing
>[  155.108512] [IGT] gem_exec_basic: starting subtest basic-vebox
>[  155.111898] [IGT] gem_exec_basic: exiting, ret=0
>[  155.170493] Console: switching to colour frame buffer device 240x67
>[  155.341227] Console: switching to colour dummy device 80x25
>[  155.341549] [IGT] gem_exec_basic: executing
>[  155.369182] [IGT] gem_exec_basic: starting subtest gtt-blt
>[  155.374127] [IGT] gem_exec_basic: exiting, ret=0
>[  155.420438] Console: switching to colour frame buffer device 240x67
>[  155.593155] Console: switching to colour dummy device 80x25
>[  155.593465] [IGT] gem_exec_basic: executing
>[  155.613428] [IGT] gem_exec_basic: starting subtest gtt-bsd
>[  155.616930] [IGT] gem_exec_basic: exiting, ret=0
>[  155.670389] Console: switching to colour frame buffer device 240x67
>[  155.855860] Console: switching to colour dummy device 80x25
>[  155.856019] [IGT] gem_exec_basic: executing
>[  155.882084] [IGT] gem_exec_basic: starting subtest gtt-bsd1
>[  155.883067] [IGT] gem_exec_basic: exiting, ret=77
>[  155.936824] Console: switching to colour frame buffer device 240x67
>[  156.092453] Console: switching to colour dummy device 80x25
>[  156.092614] [IGT] gem_exec_basic: executing
>[  156.121021] [IGT] gem_exec_basic: starting subtest gtt-bsd2
>[  156.124142] [IGT] gem_exec_basic: exiting, ret=77
>[  156.170238] Console: switching to colour frame buffer device 240x67
>[  156.400480] Console: switching to colour dummy device 80x25
>[  156.400867] [IGT] gem_exec_basic: executing
>[  156.428034] [IGT] gem_exec_basic: starting subtest gtt-default
>[  156.431581] [IGT] gem_exec_basic: exiting, ret=0
>[  156.486722] Console: switching to colour frame buffer device 240x67
>[  156.692608] Console: switching to colour dummy device 80x25
>[  156.692751] [IGT] gem_exec_basic: executing
>[  156.716885] [IGT] gem_exec_basic: starting subtest gtt-render
>[  156.723071] [IGT] gem_exec_basic: exiting, ret=0
>[  156.769997] Console: switching to colour frame buffer device 240x67
>[  156.975434] Console: switching to colour dummy device 80x25
>[  156.975730] [IGT] gem_exec_basic: executing
>[  157.003028] [IGT] gem_exec_basic: starting subtest gtt-vebox
>[  157.006512] [IGT] gem_exec_basic: exiting, ret=0
>[  157.053123] Console: switching to colour frame buffer device 240x67
>[  157.210097] Console: switching to colour dummy device 80x25
>[  157.210216] [IGT] gem_exec_basic: executing
>[  157.232023] [IGT] gem_exec_basic: starting subtest readonly-blt
>[  157.233221] [IGT] gem_exec_basic: exiting, ret=0
>[  157.286361] Console: switching to colour frame buffer device 240x67
>[  157.435747] Console: switching to colour dummy device 80x25
>[  157.435908] [IGT] gem_exec_basic: executing
>[  157.459917] [IGT] gem_exec_basic: starting subtest readonly-bsd
>[  157.463315] [IGT] gem_exec_basic: exiting, ret=0
>[  157.519629] Console: switching to colour frame buffer device 240x67
>[  157.714510] Console: switching to colour dummy device 80x25
>[  157.714818] [IGT] gem_exec_basic: executing
>[  157.741904] [IGT] gem_exec_basic: starting subtest readonly-bsd1
>[  157.745066] [IGT] gem_exec_basic: exiting, ret=77
>[  157.786204] Console: switching to colour frame buffer device 240x67
>[  157.990423] Console: switching to colour dummy device 80x25
>[  157.990638] [IGT] gem_exec_basic: executing
>[  158.015028] [IGT] gem_exec_basic: starting subtest readonly-bsd2
>[  158.018111] [IGT] gem_exec_basic: exiting, ret=77
>[  158.069519] Console: switching to colour frame buffer device 240x67
>[  158.266620] Console: switching to colour dummy device 80x25
>[  158.266791] [IGT] gem_exec_basic: executing
>[  158.291017] [IGT] gem_exec_basic: starting subtest readonly-default
>[  158.294398] [IGT] gem_exec_basic: exiting, ret=0
>[  158.336171] Console: switching to colour frame buffer device 240x67
>[  158.525562] Console: switching to colour dummy device 80x25
>[  158.525724] [IGT] gem_exec_basic: executing
>[  158.553899] [IGT] gem_exec_basic: starting subtest readonly-render
>[  158.557317] [IGT] gem_exec_basic: exiting, ret=0
>[  158.602551] Console: switching to colour frame buffer device 240x67
>[  158.764335] Console: switching to colour dummy device 80x25
>[  158.764516] [IGT] gem_exec_basic: executing
>[  158.780507] [IGT] gem_exec_basic: starting subtest readonly-vebox
>[  158.783776] [IGT] gem_exec_basic: exiting, ret=0
>[  158.835940] Console: switching to colour frame buffer device 240x67
>[  159.036922] Console: switching to colour dummy device 80x25
>[  159.037176] [IGT] gem_exec_create: executing
>[  159.053641] [IGT] gem_exec_create: starting subtest basic
>[  164.171173] [IGT] gem_exec_create: exiting, ret=0
>[  164.217399] Console: switching to colour frame buffer device 240x67
>[  164.403708] Console: switching to colour dummy device 80x25
>[  164.404126] [IGT] gem_exec_fence: executing
>[  164.420568] [IGT] gem_exec_fence: starting subtest basic-busy-default
>[  164.475823] [IGT] gem_exec_fence: exiting, ret=0
>[  164.534059] Console: switching to colour frame buffer device 240x67
>[  164.720052] Console: switching to colour dummy device 80x25
>[  164.720153] [IGT] gem_exec_fence: executing
>[  164.743906] [IGT] gem_exec_fence: starting subtest basic-wait-default
>[  164.798926] [IGT] gem_exec_fence: exiting, ret=0
>[  164.850442] Console: switching to colour frame buffer device 240x67
>[  165.070091] Console: switching to colour dummy device 80x25
>[  165.070352] [IGT] gem_exec_fence: executing
>[  165.098191] [IGT] gem_exec_fence: starting subtest basic-await-default
>[  166.139829] [IGT] gem_exec_fence: exiting, ret=0
>[  166.183368] Console: switching to colour frame buffer device 240x67
>[  166.360854] Console: switching to colour dummy device 80x25
>[  166.361317] [IGT] gem_exec_fence: executing
>[  166.387554] [IGT] gem_exec_fence: starting subtest await-hang-default
>[  170.725540] [drm:missed_breadcrumb [i915]] rcs0 missed breadcrumb at intel_breadcrumbs_hangcheck+0x5c/0x80 [i915], irq posted? yes, current seqno=2356b, last=2356e
>[  175.083417] [drm] GPU HANG: ecode 9:0:0xe7577efe, in gem_exec_fence [1753], reason: Hang on rcs0, action: reset
>[  175.083602] [drm:i915_reset_and_wakeup [i915]] resetting chip
>[  175.083657] drm/i915: Resetting chip after gpu hang
>[  175.083869] [drm:i915_gem_reset [i915]] context gem_exec_fence[1753]/0 marked guilty (score 10) banned? no
>[  175.083905] [drm:i915_gem_reset [i915]] resetting rcs0 to restart from tail of request 0x2356c
>[  175.084041] [drm] RC6 on
>[  175.084288] [drm:gen8_init_common_ring [i915]] Execlists enabled for rcs0
>[  175.084307] [drm:gen8_init_common_ring [i915]] Restarting rcs0:0 from 0x2356e
>[  175.084336] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 14
>[  175.084388] [drm:gen8_init_common_ring [i915]] Execlists enabled for bcs0
>[  175.084455] [drm:gen8_init_common_ring [i915]] Execlists enabled for vcs0
>[  175.084510] [drm:gen8_init_common_ring [i915]] Execlists enabled for vecs0
>[  175.091771] [IGT] gem_exec_fence: exiting, ret=0
>[  175.146921] Console: switching to colour frame buffer device 240x67
>[  175.343615] Console: switching to colour dummy device 80x25
>[  175.343931] [IGT] gem_exec_fence: executing
>[  175.372137] [IGT] gem_exec_fence: starting subtest nb-await-default
>[  176.398481] [IGT] gem_exec_fence: exiting, ret=0
>[  176.446481] Console: switching to colour frame buffer device 240x67
>[  176.607531] Console: switching to colour dummy device 80x25
>[  176.607660] [IGT] gem_exec_flush: executing
>[  176.632416] [IGT] gem_exec_flush: starting subtest basic-batch-kernel-default-cmd
>[  176.636625] [IGT] gem_exec_flush: exiting, ret=77
>[  176.696497] Console: switching to colour frame buffer device 240x67
>[  176.880557] Console: switching to colour dummy device 80x25
>[  176.880758] [IGT] gem_exec_flush: executing
>[  176.905183] [IGT] gem_exec_flush: starting subtest basic-batch-kernel-default-uc
>[  182.541297] [IGT] gem_exec_flush: exiting, ret=0
>[  182.594168] Console: switching to colour frame buffer device 240x67
>[  182.785379] Console: switching to colour dummy device 80x25
>[  182.785715] [IGT] gem_exec_flush: executing
>[  182.813242] [IGT] gem_exec_flush: starting subtest basic-batch-kernel-default-wb
>[  188.286189] [IGT] gem_exec_flush: exiting, ret=0
>[  188.342453] Console: switching to colour frame buffer device 240x67
>[  188.537689] Console: switching to colour dummy device 80x25
>[  188.538073] [IGT] gem_exec_flush: executing
>[  188.560553] [IGT] gem_exec_flush: starting subtest basic-uc-pro-default
>[  193.969893] [IGT] gem_exec_flush: exiting, ret=0
>[  194.023894] Console: switching to colour frame buffer device 240x67
>[  194.221170] Console: switching to colour dummy device 80x25
>[  194.221503] [IGT] gem_exec_flush: executing
>[  194.249339] [IGT] gem_exec_flush: starting subtest basic-uc-prw-default
>[  199.656367] [IGT] gem_exec_flush: exiting, ret=0
>[  199.705316] Console: switching to colour frame buffer device 240x67
>[  199.899245] Console: switching to colour dummy device 80x25
>[  199.899558] [IGT] gem_exec_flush: executing
>[  199.927435] [IGT] gem_exec_flush: starting subtest basic-uc-ro-default
>[  205.335469] [IGT] gem_exec_flush: exiting, ret=0
>[  205.386376] Console: switching to colour frame buffer device 240x67
>[  205.556618] Console: switching to colour dummy device 80x25
>[  205.556946] [IGT] gem_exec_flush: executing
>[  205.584059] [IGT] gem_exec_flush: starting subtest basic-uc-rw-default
>[  210.986382] [IGT] gem_exec_flush: exiting, ret=0
>[  211.034785] Console: switching to colour frame buffer device 240x67
>[  211.235934] Console: switching to colour dummy device 80x25
>[  211.236368] [IGT] gem_exec_flush: executing
>[  211.264235] [IGT] gem_exec_flush: starting subtest basic-uc-set-default
>[  216.667570] [IGT] gem_exec_flush: exiting, ret=0
>[  216.716236] Console: switching to colour frame buffer device 240x67
>[  216.938312] Console: switching to colour dummy device 80x25
>[  216.938627] [IGT] gem_exec_flush: executing
>[  216.966260] [IGT] gem_exec_flush: starting subtest basic-wb-pro-default
>[  222.367361] [IGT] gem_exec_flush: exiting, ret=0
>[  222.414275] Console: switching to colour frame buffer device 240x67
>[  222.617789] Console: switching to colour dummy device 80x25
>[  222.618188] [IGT] gem_exec_flush: executing
>[  222.638762] [IGT] gem_exec_flush: starting subtest basic-wb-prw-default
>[  228.039986] [IGT] gem_exec_flush: exiting, ret=0
>[  228.095735] Console: switching to colour frame buffer device 240x67
>[  228.300900] Console: switching to colour dummy device 80x25
>[  228.301302] [IGT] gem_exec_flush: executing
>[  228.325550] [IGT] gem_exec_flush: starting subtest basic-wb-ro-before-default
>[  233.740069] [IGT] gem_exec_flush: exiting, ret=0
>[  233.793443] Console: switching to colour frame buffer device 240x67
>[  233.994858] Console: switching to colour dummy device 80x25
>[  233.995312] [IGT] gem_exec_flush: executing
>[  234.023052] [IGT] gem_exec_flush: starting subtest basic-wb-ro-default
>[  239.423756] [IGT] gem_exec_flush: exiting, ret=0
>[  239.474940] Console: switching to colour frame buffer device 240x67
>[  239.652634] Console: switching to colour dummy device 80x25
>[  239.652940] [IGT] gem_exec_flush: executing
>[  239.681093] [IGT] gem_exec_flush: starting subtest basic-wb-rw-before-default
>[  245.085936] [IGT] gem_exec_flush: exiting, ret=0
>[  245.139939] Console: switching to colour frame buffer device 240x67
>[  245.339560] Console: switching to colour dummy device 80x25
>[  245.339868] [IGT] gem_exec_flush: executing
>[  245.359592] [IGT] gem_exec_flush: starting subtest basic-wb-rw-default
>[  250.760711] [IGT] gem_exec_flush: exiting, ret=0
>[  250.804648] Console: switching to colour frame buffer device 240x67
>[  251.001018] Console: switching to colour dummy device 80x25
>[  251.001348] [IGT] gem_exec_flush: executing
>[  251.029133] [IGT] gem_exec_flush: starting subtest basic-wb-set-default
>[  256.437738] [IGT] gem_exec_flush: exiting, ret=0
>[  256.486131] Console: switching to colour frame buffer device 240x67
>[  256.685180] Console: switching to colour dummy device 80x25
>[  256.685519] [IGT] gem_exec_gttfill: executing
>[  256.705506] [IGT] gem_exec_gttfill: starting subtest basic
>[  256.706659] gem_exec_gttfil (1947): drop_caches: 4
>[  262.366352] [IGT] gem_exec_gttfill: exiting, ret=0
>[  262.417336] Console: switching to colour frame buffer device 240x67
>[  262.704577] Console: switching to colour dummy device 80x25
>[  262.704901] [IGT] gem_exec_nop: executing
>[  262.733055] [IGT] gem_exec_nop: starting subtest basic-parallel
>[  272.005123] [IGT] gem_exec_nop: exiting, ret=0
>[  272.047265] Console: switching to colour frame buffer device 240x67
>[  272.239770] Console: switching to colour dummy device 80x25
>[  272.240190] [IGT] gem_exec_nop: executing
>[  272.264408] [IGT] gem_exec_nop: starting subtest basic-series
>[  281.510262] [IGT] gem_exec_nop: exiting, ret=0
>[  281.561161] Console: switching to colour frame buffer device 240x67
>[  281.762912] Console: switching to colour dummy device 80x25
>[  281.763387] [IGT] gem_exec_parallel: executing
>[  281.795093] [IGT] gem_exec_parallel: starting subtest basic
>[  282.636268] [IGT] gem_exec_parallel: exiting, ret=0
>[  282.693691] Console: switching to colour frame buffer device 240x67
>[  282.908582] Console: switching to colour dummy device 80x25
>[  282.908890] [IGT] gem_exec_parse: executing
>[  282.934594] [IGT] gem_exec_parse: exiting, ret=77
>[  282.960511] Console: switching to colour frame buffer device 240x67
>[  283.154036] Console: switching to colour dummy device 80x25
>[  283.154248] [IGT] gem_exec_parse: executing
>[  283.171862] [IGT] gem_exec_parse: exiting, ret=77
>[  283.210453] Console: switching to colour frame buffer device 240x67
>[  283.672428] Console: switching to colour dummy device 80x25
>[  283.672753] [IGT] gem_exec_reloc: executing
>[  283.685557] [IGT] gem_exec_reloc: starting subtest basic-cpu
>[  283.686884] [IGT] gem_exec_reloc: exiting, ret=0
>[  283.743582] Console: switching to colour frame buffer device 240x67
>[  283.917775] Console: switching to colour dummy device 80x25
>[  283.917941] [IGT] gem_exec_reloc: executing
>[  283.939521] [IGT] gem_exec_reloc: starting subtest basic-gtt
>[  283.943733] [IGT] gem_exec_reloc: exiting, ret=0
>[  283.993635] Console: switching to colour frame buffer device 240x67
>[  284.203453] Console: switching to colour dummy device 80x25
>[  284.203770] [IGT] gem_exec_reloc: executing
>[  284.232303] [IGT] gem_exec_reloc: starting subtest basic-cpu-gtt
>[  284.234845] [IGT] gem_exec_reloc: exiting, ret=0
>[  284.276858] Console: switching to colour frame buffer device 240x67
>[  284.478258] Console: switching to colour dummy device 80x25
>[  284.478353] [IGT] gem_exec_reloc: executing
>[  284.488305] [IGT] gem_exec_reloc: starting subtest basic-gtt-cpu
>[  284.489869] [IGT] gem_exec_reloc: exiting, ret=0
>[  284.543165] Console: switching to colour frame buffer device 240x67
>[  284.717765] Console: switching to colour dummy device 80x25
>[  284.718072] [IGT] gem_exec_reloc: executing
>[  284.732071] [IGT] gem_exec_reloc: starting subtest basic-cpu-read
>[  284.735867] [IGT] gem_exec_reloc: exiting, ret=0
>[  284.793399] Console: switching to colour frame buffer device 240x67
>[  285.011726] Console: switching to colour dummy device 80x25
>[  285.012149] [IGT] gem_exec_reloc: executing
>[  285.037530] [IGT] gem_exec_reloc: starting subtest basic-gtt-read
>[  285.041626] [IGT] gem_exec_reloc: exiting, ret=0
>[  285.093318] Console: switching to colour frame buffer device 240x67
>[  285.285506] Console: switching to colour dummy device 80x25
>[  285.285670] [IGT] gem_exec_reloc: executing
>[  285.307331] [IGT] gem_exec_reloc: starting subtest basic-write-cpu
>[  285.309900] [IGT] gem_exec_reloc: exiting, ret=0
>[  285.343138] Console: switching to colour frame buffer device 240x67
>[  285.541848] Console: switching to colour dummy device 80x25
>[  285.542060] [IGT] gem_exec_reloc: executing
>[  285.567625] [IGT] gem_exec_reloc: starting subtest basic-write-gtt
>[  285.571257] [IGT] gem_exec_reloc: exiting, ret=0
>[  285.626431] Console: switching to colour frame buffer device 240x67
>[  285.820717] Console: switching to colour dummy device 80x25
>[  285.821170] [IGT] gem_exec_reloc: executing
>[  285.846553] [IGT] gem_exec_reloc: starting subtest basic-write-read
>[  285.849551] [IGT] gem_exec_reloc: exiting, ret=0
>[  285.892856] Console: switching to colour frame buffer device 240x67
>[  286.097029] Console: switching to colour dummy device 80x25
>[  286.097391] [IGT] gem_exec_reloc: executing
>[  286.122532] [IGT] gem_exec_reloc: starting subtest basic-cpu-noreloc
>[  286.126104] [IGT] gem_exec_reloc: exiting, ret=0
>[  286.176132] Console: switching to colour frame buffer device 240x67
>[  286.340450] Console: switching to colour dummy device 80x25
>[  286.340770] [IGT] gem_exec_reloc: executing
>[  286.365717] [IGT] gem_exec_reloc: starting subtest basic-gtt-noreloc
>[  286.369425] [IGT] gem_exec_reloc: exiting, ret=0
>[  286.426201] Console: switching to colour frame buffer device 240x67
>[  286.639609] Console: switching to colour dummy device 80x25
>[  286.639769] [IGT] gem_exec_reloc: executing
>[  286.661429] [IGT] gem_exec_reloc: starting subtest basic-cpu-gtt-noreloc
>[  286.665065] [IGT] gem_exec_reloc: exiting, ret=0
>[  286.726090] Console: switching to colour frame buffer device 240x67
>[  286.965674] Console: switching to colour dummy device 80x25
>[  286.965876] [IGT] gem_exec_reloc: executing
>[  286.987546] [IGT] gem_exec_reloc: starting subtest basic-gtt-cpu-noreloc
>[  286.991170] [IGT] gem_exec_reloc: exiting, ret=0
>[  287.042597] Console: switching to colour frame buffer device 240x67
>[  287.247346] Console: switching to colour dummy device 80x25
>[  287.247666] [IGT] gem_exec_reloc: executing
>[  287.260315] [IGT] gem_exec_reloc: starting subtest basic-cpu-read-noreloc
>[  287.261524] [IGT] gem_exec_reloc: exiting, ret=0
>[  287.309111] Console: switching to colour frame buffer device 240x67
>[  287.473580] Console: switching to colour dummy device 80x25
>[  287.473673] [IGT] gem_exec_reloc: executing
>[  287.489288] [IGT] gem_exec_reloc: starting subtest basic-gtt-read-noreloc
>[  287.490472] [IGT] gem_exec_reloc: exiting, ret=0
>[  287.542344] Console: switching to colour frame buffer device 240x67
>[  287.739852] Console: switching to colour dummy device 80x25
>[  287.740114] [IGT] gem_exec_reloc: executing
>[  287.754062] [IGT] gem_exec_reloc: starting subtest basic-write-cpu-noreloc
>[  287.757207] [IGT] gem_exec_reloc: exiting, ret=0
>[  287.809045] Console: switching to colour frame buffer device 240x67
>[  288.023028] Console: switching to colour dummy device 80x25
>[  288.023341] [IGT] gem_exec_reloc: executing
>[  288.048544] [IGT] gem_exec_reloc: starting subtest basic-write-gtt-noreloc
>[  288.052017] [IGT] gem_exec_reloc: exiting, ret=0
>[  288.108792] Console: switching to colour frame buffer device 240x67
>[  288.301201] Console: switching to colour dummy device 80x25
>[  288.301313] [IGT] gem_exec_reloc: executing
>[  288.310335] [IGT] gem_exec_reloc: starting subtest basic-write-read-noreloc
>[  288.311522] [IGT] gem_exec_reloc: exiting, ret=0
>[  288.358909] Console: switching to colour frame buffer device 240x67
>[  288.523320] Console: switching to colour dummy device 80x25
>[  288.523607] [IGT] gem_exec_reloc: executing
>[  288.541055] [IGT] gem_exec_reloc: starting subtest basic-cpu-active
>[  288.654847] [IGT] gem_exec_reloc: exiting, ret=0
>[  288.708766] Console: switching to colour frame buffer device 240x67
>[  288.911437] Console: switching to colour dummy device 80x25
>[  288.911750] [IGT] gem_exec_reloc: executing
>[  288.936653] [IGT] gem_exec_reloc: starting subtest basic-gtt-active
>[  289.050506] [IGT] gem_exec_reloc: exiting, ret=0
>[  289.108464] Console: switching to colour frame buffer device 240x67
>[  289.292908] Console: switching to colour dummy device 80x25
>[  289.293334] [IGT] gem_exec_reloc: executing
>[  289.318668] [IGT] gem_exec_reloc: starting subtest basic-cpu-gtt-active
>[  289.432866] [IGT] gem_exec_reloc: exiting, ret=0
>[  289.475207] Console: switching to colour frame buffer device 240x67
>[  289.668015] Console: switching to colour dummy device 80x25
>[  289.668325] [IGT] gem_exec_reloc: executing
>[  289.693478] [IGT] gem_exec_reloc: starting subtest basic-gtt-cpu-active
>[  289.807503] [IGT] gem_exec_reloc: exiting, ret=0
>[  289.858411] Console: switching to colour frame buffer device 240x67
>[  290.033434] Console: switching to colour dummy device 80x25
>[  290.033594] [IGT] gem_exec_reloc: executing
>[  290.061544] [IGT] gem_exec_reloc: starting subtest basic-cpu-read-active
>[  290.175140] [IGT] gem_exec_reloc: exiting, ret=0
>[  290.224866] Console: switching to colour frame buffer device 240x67
>[  290.449296] Console: switching to colour dummy device 80x25
>[  290.449494] [IGT] gem_exec_reloc: executing
>[  290.462948] [IGT] gem_exec_reloc: starting subtest basic-gtt-read-active
>[  290.576671] [IGT] gem_exec_reloc: exiting, ret=0
>[  290.624592] Console: switching to colour frame buffer device 240x67
>[  290.812626] Console: switching to colour dummy device 80x25
>[  290.812783] [IGT] gem_exec_reloc: executing
>[  290.834588] [IGT] gem_exec_reloc: starting subtest basic-write-cpu-active
>[  290.947289] [IGT] gem_exec_reloc: exiting, ret=0
>[  290.991175] Console: switching to colour frame buffer device 240x67
>[  291.171144] Console: switching to colour dummy device 80x25
>[  291.171333] [IGT] gem_exec_reloc: executing
>[  291.185101] [IGT] gem_exec_reloc: starting subtest basic-write-gtt-active
>[  291.299134] [IGT] gem_exec_reloc: exiting, ret=0
>[  291.341101] Console: switching to colour frame buffer device 240x67
>[  291.504314] Console: switching to colour dummy device 80x25
>[  291.504631] [IGT] gem_exec_reloc: executing
>[  291.529588] [IGT] gem_exec_reloc: starting subtest basic-write-read-active
>[  291.642141] [IGT] gem_exec_reloc: exiting, ret=0
>[  291.690925] Console: switching to colour frame buffer device 240x67
>[  291.875710] Console: switching to colour dummy device 80x25
>[  291.875807] [IGT] gem_exec_reloc: executing
>[  291.899183] [IGT] gem_exec_reloc: starting subtest basic-softpin
>[  291.901549] [IGT] gem_exec_reloc: exiting, ret=0
>[  291.940746] Console: switching to colour frame buffer device 240x67
>[  292.200784] Console: switching to colour dummy device 80x25
>[  292.201033] [IGT] gem_exec_store: executing
>[  292.225017] [IGT] gem_exec_store: starting subtest basic-all
>[  292.263064] [IGT] gem_exec_store: exiting, ret=0
>[  292.307398] Console: switching to colour frame buffer device 240x67
>[  292.466321] Console: switching to colour dummy device 80x25
>[  292.466433] [IGT] gem_exec_store: executing
>[  292.476536] [IGT] gem_exec_store: starting subtest basic-blt
>[  292.527557] [IGT] gem_exec_store: exiting, ret=0
>[  292.573922] Console: switching to colour frame buffer device 240x67
>[  292.783168] Console: switching to colour dummy device 80x25
>[  292.783294] [IGT] gem_exec_store: executing
>[  292.807012] [IGT] gem_exec_store: starting subtest basic-bsd
>[  292.848229] [IGT] gem_exec_store: exiting, ret=0
>[  292.907306] Console: switching to colour frame buffer device 240x67
>[  293.107941] Console: switching to colour dummy device 80x25
>[  293.108201] [IGT] gem_exec_store: executing
>[  293.132113] [IGT] gem_exec_store: starting subtest basic-bsd1
>[  293.135104] [IGT] gem_exec_store: exiting, ret=77
>[  293.190389] Console: switching to colour frame buffer device 240x67
>[  293.402255] Console: switching to colour dummy device 80x25
>[  293.402566] [IGT] gem_exec_store: executing
>[  293.430053] [IGT] gem_exec_store: starting subtest basic-bsd2
>[  293.433154] [IGT] gem_exec_store: exiting, ret=77
>[  293.490317] Console: switching to colour frame buffer device 240x67
>[  293.665315] Console: switching to colour dummy device 80x25
>[  293.665477] [IGT] gem_exec_store: executing
>[  293.689551] [IGT] gem_exec_store: starting subtest basic-default
>[  293.730399] [IGT] gem_exec_store: exiting, ret=0
>[  293.773507] Console: switching to colour frame buffer device 240x67
>[  293.982458] Console: switching to colour dummy device 80x25
>[  293.982651] [IGT] gem_exec_store: executing
>[  294.007040] [IGT] gem_exec_store: starting subtest basic-render
>[  294.048387] [IGT] gem_exec_store: exiting, ret=0
>[  294.106740] Console: switching to colour frame buffer device 240x67
>[  294.330222] Console: switching to colour dummy device 80x25
>[  294.330440] [IGT] gem_exec_store: executing
>[  294.350151] [IGT] gem_exec_store: starting subtest basic-vebox
>[  294.386931] [IGT] gem_exec_store: exiting, ret=0
>[  294.440005] Console: switching to colour frame buffer device 240x67
>[  294.670111] Console: switching to colour dummy device 80x25
>[  294.670417] [IGT] gem_exec_suspend: executing
>[  294.688413] [IGT] gem_exec_suspend: starting subtest basic
>[  294.829953] [IGT] gem_exec_suspend: exiting, ret=0
>[  294.873196] Console: switching to colour frame buffer device 240x67
>[  295.043501] Console: switching to colour dummy device 80x25
>[  295.043674] [IGT] gem_exec_suspend: executing
>[  295.067850] [IGT] gem_exec_suspend: starting subtest basic-S3
>[  295.862483] PM: Syncing filesystems ... done.
>[  295.870225] PM: Preparing system for sleep (mem)
>[  295.885359] Freezing user space processes ... (elapsed 0.002 seconds) done.
>[  295.887569] OOM killer disabled.
>[  295.887575] Freezing remaining freezable tasks ... (elapsed 0.002 seconds) done.
>[  295.889704] PM: Suspending system (mem)
>[  295.890103] Suspending console(s) (use no_console_suspend to debug)
>[  295.894753] sd 2:0:0:0: [sda] Synchronizing SCSI cache
>[  295.896244] sd 2:0:0:0: [sda] Stopping disk
>[  295.907213] [drm:intel_power_well_enable [i915]] enabling DC off
>[  295.907631] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  295.907698] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  295.907700] ACPI : EC: event blocked
>[  295.907751] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  295.907946] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  295.907998] [drm:skl_set_power_well [i915]] Enabling DDI B IO power well
>[  295.908070] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>[  295.908121] [drm:skl_set_power_well [i915]] Enabling DDI C IO power well
>[  295.908168] [drm:intel_power_well_enable [i915]] enabling DDI D IO power well
>[  295.908217] [drm:skl_set_power_well [i915]] Enabling DDI D IO power well
>[  295.925112] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  295.926210] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  296.132348] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  296.132619] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  296.139204] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  296.139339] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  296.140303] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  296.140413] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  296.140533] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000000
>[  296.191356] [drm:wait_panel_status [i915]] Wait complete
>[  296.191520] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  296.191780] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  296.191900] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  296.192115] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  296.192193] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  296.192259] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  296.192322] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  296.192384] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  296.192451] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  296.192525] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  296.192593] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  296.192665] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  296.192722] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  296.192797] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  296.192854] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  296.192924] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  296.192985] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  296.193204] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  297.451318] PM: suspend of devices complete after 1558.711 msecs
>[  297.455807] [drm:intel_power_well_disable [i915]] disabling DDI D IO power well
>[  297.455891] [drm:skl_set_power_well [i915]] Disabling DDI D IO power well
>[  297.455950] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well
>[  297.456040] [drm:skl_set_power_well [i915]] Disabling DDI C IO power well
>[  297.456094] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[  297.456148] [drm:skl_set_power_well [i915]] Disabling DDI B IO power well
>[  297.456202] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  297.456256] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  297.456308] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  297.456435] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  297.456485] [drm:intel_power_well_disable [i915]] disabling DC off
>[  297.456502] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  297.456517] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  297.456933] [drm:intel_power_well_disable [i915]] disabling always-on
>[  297.456951] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  297.457435] [drm:intel_update_cdclk [i915]] Current CD clock rate: 24000 kHz, VCO: 0 kHz, ref: 24000 kHz
>[  297.457452] [drm:intel_power_well_disable [i915]] disabling MISC IO power well
>[  297.457472] [drm:skl_set_power_well [i915]] Disabling MISC IO power well
>[  297.457491] [drm:skl_set_power_well [i915]] Clearing auxiliary requests for MISC IO power well forced on by DMC
>[  297.457509] [drm:intel_power_well_disable [i915]] disabling power well 1
>[  297.457530] [drm:skl_set_power_well [i915]] Clearing auxiliary requests for power well 1 forced on by DMC
>[  297.469154] PM: late suspend of devices complete after 17.823 msecs
>[  297.474372] ACPI : EC: interrupt blocked
>[  297.481001] r8169 0000:0e:00.0: System wakeup enabled by ACPI
>[  297.482226] xhci_hcd 0000:00:14.0: System wakeup enabled by ACPI
>[  297.645478] PM: noirq suspend of devices complete after 176.312 msecs
>[  297.646290] ACPI: Preparing to enter system sleep state S3
>[  297.657840] ACPI : EC: EC stopped
>[  297.657849] PM: Saving platform NVS memory
>[  297.658680] Disabling non-boot CPUs ...
>[  297.683030] smpboot: CPU 1 is now offline
>[  297.705218] smpboot: CPU 2 is now offline
>[  297.722695] smpboot: CPU 3 is now offline
>[  297.737881] Broke affinity for irq 124
>[  297.737898] Broke affinity for irq 126
>[  297.739851] smpboot: CPU 4 is now offline
>[  297.757516] Broke affinity for irq 124
>[  297.757530] Broke affinity for irq 126
>[  297.757537] Broke affinity for irq 127
>[  297.757546] Broke affinity for irq 129
>[  297.758671] smpboot: CPU 5 is now offline
>[  297.778353] Broke affinity for irq 123
>[  297.778363] Broke affinity for irq 124
>[  297.778375] Broke affinity for irq 126
>[  297.778383] Broke affinity for irq 127
>[  297.778392] Broke affinity for irq 129
>[  297.778400] Broke affinity for irq 130
>[  297.779550] smpboot: CPU 6 is now offline
>[  297.792244] Broke affinity for irq 1
>[  297.792257] Broke affinity for irq 8
>[  297.792265] Broke affinity for irq 9
>[  297.792274] Broke affinity for irq 12
>[  297.792290] Broke affinity for irq 122
>[  297.792298] Broke affinity for irq 123
>[  297.792305] Broke affinity for irq 124
>[  297.792313] Broke affinity for irq 125
>[  297.792321] Broke affinity for irq 126
>[  297.792328] Broke affinity for irq 127
>[  297.792337] Broke affinity for irq 129
>[  297.792345] Broke affinity for irq 130
>[  297.793512] smpboot: CPU 7 is now offline
>[  297.799466] ACPI: Low-level resume complete
>[  297.799644] ACPI : EC: EC started
>[  297.799646] PM: Restoring platform NVS memory
>[  297.800802] Suspended for 13.989 seconds
>[  297.801359] Enabling non-boot CPUs ...
>[  297.801565] x86: Booting SMP configuration:
>[  297.801571] smpboot: Booting Node 0 Processor 1 APIC 0x2
>[  297.803506]  cache: parent cpu1 should not be sleeping
>[  297.804238] CPU1 is up
>[  297.804286] smpboot: Booting Node 0 Processor 2 APIC 0x4
>[  297.805601]  cache: parent cpu2 should not be sleeping
>[  297.806300] CPU2 is up
>[  297.806348] smpboot: Booting Node 0 Processor 3 APIC 0x6
>[  297.807647]  cache: parent cpu3 should not be sleeping
>[  297.808402] CPU3 is up
>[  297.808468] smpboot: Booting Node 0 Processor 4 APIC 0x1
>[  297.809832]  cache: parent cpu4 should not be sleeping
>[  297.810628] CPU4 is up
>[  297.810682] smpboot: Booting Node 0 Processor 5 APIC 0x3
>[  297.811988]  cache: parent cpu5 should not be sleeping
>[  297.812826] CPU5 is up
>[  297.812876] smpboot: Booting Node 0 Processor 6 APIC 0x5
>[  297.814203]  cache: parent cpu6 should not be sleeping
>[  297.815109] CPU6 is up
>[  297.815180] smpboot: Booting Node 0 Processor 7 APIC 0x7
>[  297.816501]  cache: parent cpu7 should not be sleeping
>[  297.817483] CPU7 is up
>[  297.823625] ACPI: Waking up from system sleep state S3
>[  297.894289] ACPI : button: The lid device is not compliant to SW_LID.
>[  297.896879] pcieport 0000:00:1c.0: Intel SPT PCH root port ACS workaround enabled
>[  297.897220] ACPI : EC: interrupt unblocked
>[  297.908362] pcieport 0000:00:1c.2: Intel SPT PCH root port ACS workaround enabled
>[  297.908365] pcieport 0000:00:1c.1: Intel SPT PCH root port ACS workaround enabled
>[  297.931510] xhci_hcd 0000:00:14.0: System wakeup disabled by ACPI
>[  297.991744] PM: noirq resume of devices complete after 95.380 msecs
>[  297.992240] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  297.992302] [drm:intel_power_well_enable [i915]] enabling power well 1
>[  297.992335] [drm:skl_set_power_well [i915]] Enabling power well 1
>[  297.992359] [drm:intel_power_well_enable [i915]] enabling MISC IO power well
>[  297.992388] [drm:skl_set_power_well [i915]] Enabling MISC IO power well
>[  297.992415] [drm:skl_init_cdclk [i915]] Sanitizing cdclk programmed by pre-os
>[  297.994117] [drm:intel_update_cdclk [i915]] Current CD clock rate: 337500 kHz, VCO: 8100000 kHz, ref: 24000 kHz
>[  298.004641] [drm:intel_power_well_enable [i915]] enabling always-on
>[  298.004656] [drm:intel_power_well_enable [i915]] enabling DC off
>[  298.004674] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  298.004742] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  298.004767] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  298.004841] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  298.004865] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  298.004880] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  298.004904] [drm:skl_set_power_well [i915]] Enabling DDI B IO power well
>[  298.004919] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>[  298.004944] [drm:skl_set_power_well [i915]] Enabling DDI C IO power well
>[  298.004959] [drm:intel_power_well_enable [i915]] enabling DDI D IO power well
>[  298.004983] [drm:skl_set_power_well [i915]] Enabling DDI D IO power well
>[  298.007448] PM: early resume of devices complete after 15.618 msecs
>[  298.007711] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x77f6e018
>[  298.007747] [drm:intel_opregion_setup [i915]] Public ACPI methods supported
>[  298.007766] [drm:intel_opregion_setup [i915]] SWSCI supported
>[  298.007919] ACPI : EC: event unblocked
>[  298.010998] hpet1: lost 3880 rtc interrupts
>[  298.011455] rtc_cmos 00:04: System wakeup disabled by ACPI
>[  298.011837] sd 2:0:0:0: [sda] Starting disk
>[  298.012454] r8169 0000:0e:00.0: System wakeup disabled by ACPI
>[  298.019100] [drm:intel_opregion_setup [i915]] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00300483
>[  298.019120] [drm:intel_opregion_setup [i915]] ASLE supported
>[  298.019138] [drm:intel_opregion_setup [i915]] ASLE extension supported
>[  298.019158] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (Mailbox #4)
>[  298.019400] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x4af05
>[  298.019816] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 9.2
>[  298.050095] r8169 0000:0e:00.0 enp14s0: link down
>[  298.328976] ata3: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
>[  298.329031] ata1: SATA link down (SStatus 4 SControl 300)
>[  298.329117] ata2: SATA link down (SStatus 4 SControl 300)
>[  298.329150] ata4: SATA link down (SStatus 4 SControl 300)
>[  298.381626] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 362 ms
>[  298.382222] [drm:drm_dp_i2c_do_msg] native defer
>[  298.384193] [drm:drm_dp_i2c_do_msg] native defer
>[  298.385666] [drm:drm_dp_i2c_do_msg] native defer
>[  298.387114] [drm:drm_dp_i2c_do_msg] native defer
>[  298.388628] [drm:drm_dp_i2c_do_msg] native defer
>[  298.389643] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  298.390312] [drm:gen8_init_common_ring [i915]] Execlists enabled for rcs0
>[  298.390430] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 14
>[  298.390619] [drm:gen8_init_common_ring [i915]] Execlists enabled for bcs0
>[  298.390805] [drm:gen8_init_common_ring [i915]] Execlists enabled for vcs0
>[  298.390988] [drm:gen8_init_common_ring [i915]] Execlists enabled for vecs0
>[  298.391173] [drm:intel_update_cdclk [i915]] Current CD clock rate: 337500 kHz, VCO: 8100000 kHz, ref: 24000 kHz
>[  298.391444] [drm:intel_set_plane_visible [i915]] pipe A active planes 0x0
>[  298.391512] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:32:pipe A] hw state readout: disabled
>[  298.391587] [drm:intel_set_plane_visible [i915]] pipe B active planes 0x0
>[  298.391651] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:39:pipe B] hw state readout: disabled
>[  298.391723] [drm:intel_set_plane_visible [i915]] pipe C active planes 0x0
>[  298.391786] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:46:pipe C] hw state readout: disabled
>[  298.391855] [drm:intel_modeset_setup_hw_state [i915]] DPLL 0 hw state readout: crtc_mask 0x00000000, on 1
>[  298.391919] [drm:intel_modeset_setup_hw_state [i915]] DPLL 1 hw state readout: crtc_mask 0x00000000, on 0
>[  298.391981] [drm:intel_modeset_setup_hw_state [i915]] DPLL 2 hw state readout: crtc_mask 0x00000000, on 0
>[  298.392043] [drm:intel_modeset_setup_hw_state [i915]] DPLL 3 hw state readout: crtc_mask 0x00000000, on 0
>[  298.392137] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:47:DDI A] hw state readout: disabled, pipe A
>[  298.392199] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:55:DDI B] hw state readout: disabled, pipe A
>[  298.392254] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:57:DP-MST A] hw state readout: disabled, pipe A
>[  298.392309] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:58:DP-MST B] hw state readout: disabled, pipe B
>[  298.392362] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:59:DP-MST C] hw state readout: disabled, pipe C
>[  298.392468] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:48:eDP-1] hw state readout: disabled
>[  298.392543] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:56:DP-1] hw state readout: disabled
>[  298.392622] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][setup_hw_state]
>[  298.392683] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0
>[  298.392740] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  298.392816] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  298.392826] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  298.392876] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  298.392885] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  298.392935] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  298.392985] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  298.393034] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: 0
>[  298.393083] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  298.393168] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  298.393225] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  298.393275] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  298.393324] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  298.393372] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  298.393420] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  298.393473] [drm:intel_dump_pipe_config [i915]] [CRTC:39:pipe B][setup_hw_state]
>[  298.393520] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0
>[  298.393567] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  298.393612] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  298.393621] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  298.393666] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  298.393674] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  298.393721] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  298.393768] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  298.393815] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: 0
>[  298.393862] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  298.393908] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  298.393964] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  298.394011] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  298.394059] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 1B] disabled, scaler_id = -1
>[  298.394131] [drm:intel_dump_pipe_config [i915]] [PLANE:35:plane 2B] disabled, scaler_id = -1
>[  298.394178] [drm:intel_dump_pipe_config [i915]] [PLANE:37:cursor B] disabled, scaler_id = -1
>[  298.394228] [drm:intel_dump_pipe_config [i915]] [CRTC:46:pipe C][setup_hw_state]
>[  298.394274] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0
>[  298.394319] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  298.394365] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  298.394373] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  298.394418] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  298.394426] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  298.394472] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  298.394519] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  298.394564] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: 0
>[  298.394610] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  298.394654] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  298.394710] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  298.394758] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  298.394804] [drm:intel_dump_pipe_config [i915]] [PLANE:40:plane 1C] disabled, scaler_id = -1
>[  298.394850] [drm:intel_dump_pipe_config [i915]] [PLANE:42:plane 2C] disabled, scaler_id = -1
>[  298.394896] [drm:intel_dump_pipe_config [i915]] [PLANE:44:cursor C] disabled, scaler_id = -1
>[  298.394955] [drm:intel_modeset_setup_hw_state [i915]] DPLL 0 enabled but not in use, disabling
>[  298.395182] [drm:intel_power_well_disable [i915]] disabling DDI D IO power well
>[  298.395275] [drm:skl_set_power_well [i915]] Disabling DDI D IO power well
>[  298.395325] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well
>[  298.395373] [drm:skl_set_power_well [i915]] Disabling DDI C IO power well
>[  298.395420] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[  298.395467] [drm:skl_set_power_well [i915]] Disabling DDI B IO power well
>[  298.395513] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  298.395560] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  298.395606] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  298.395736] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  298.395782] [drm:intel_power_well_disable [i915]] disabling DC off
>[  298.395831] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  298.395874] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  298.396347] [drm:intel_power_well_disable [i915]] disabling always-on
>[  298.396465] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  298.396525] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  298.396589] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  298.396648] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  298.396704] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  298.396763] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  298.396820] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  298.396874] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  298.396927] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  298.396978] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  298.397028] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  298.397037] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  298.397087] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  298.397120] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  298.397171] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  298.397220] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  298.397268] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  298.397316] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  298.397362] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  298.397418] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  298.397466] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  298.397514] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  298.397561] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  298.397607] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  298.397663] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  298.397727] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  298.397782] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  298.397836] [drm:skl_update_scaler [i915]] scaler_user index 1.31: Staged freeing scaler id 0 scaler_users = 0x0
>[  298.397886] [drm:skl_update_scaler [i915]] scaler_user index 2.31: Staged freeing scaler id 0 scaler_users = 0x0
>[  298.398086] [drm:intel_power_well_enable [i915]] enabling always-on
>[  298.398158] [drm:intel_power_well_enable [i915]] enabling DC off
>[  298.398455] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  298.398545] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  298.398600] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  298.398654] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  298.398707] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  298.398758] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  298.398812] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:56:DP-1]
>[  298.398867] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  298.398926] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  298.398982] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  298.399036] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  298.399125] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  298.399181] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  298.399316] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  298.399381] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  298.399491] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  298.399554] [drm:wait_panel_status [i915]] Wait complete
>[  298.399630] [drm:edp_panel_on [i915]] Wait for panel power on
>[  298.399736] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  298.535722] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  298.535801] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  298.535871] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  298.536049] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  298.600834] [drm:wait_panel_status [i915]] Wait complete
>[  298.600902] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  298.600957] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  298.601067] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  298.601233] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  298.602726] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  298.602789] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  298.602847] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  298.602906] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  298.603871] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  298.603929] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  298.605194] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  298.605255] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  298.606807] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  298.606883] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  298.606905] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  298.606978] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  298.808527] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  298.808626] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  298.808767] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  298.808834] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  298.823778] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  298.823870] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  298.824002] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  298.824085] [drm:intel_atomic_commit_tail [i915]] [CRTC:39:pipe B]
>[  298.824225] [drm:intel_atomic_commit_tail [i915]] [CRTC:46:pipe C]
>[  298.824712] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  298.824816] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  298.824889] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  298.824954] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  298.825019] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  298.825567] [drm:intel_opregion_register [i915]] 2 outputs detected
>[  298.831235] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  298.832031] [drm:drm_helper_hpd_irq_event] [CONNECTOR:48:eDP-1] status updated from connected to connected
>[  298.832059] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  298.832103] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  298.832137] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  298.832435] PM: resume of devices complete after 824.982 msecs
>[  298.832561] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  298.832591] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  298.833040] [drm:drm_dp_i2c_do_msg] native defer
>[  298.833768] PM: Finishing wakeup.
>[  298.833772] OOM killer enabled.
>[  298.833774] Restarting tasks ... 
>[  298.834331] [drm:drm_dp_i2c_do_msg] native defer
>[  298.836591] done.
>[  298.838007] [drm] RC6 on
>[  298.847701] [drm:drm_dp_i2c_do_msg] native defer
>[  298.848927] [drm:drm_dp_i2c_do_msg] native defer
>[  298.850212] [drm:drm_dp_i2c_do_msg] native defer
>[  298.851129] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  298.851630] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  298.851990] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  298.852047] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  298.852083] [drm:drm_helper_hpd_irq_event] [CONNECTOR:56:DP-1] status updated from disconnected to disconnected
>[  299.468182] [IGT] gem_exec_suspend: exiting, ret=0
>[  299.523741] Console: switching to colour frame buffer device 240x67
>[  300.423393] r8169 0000:0e:00.0 enp14s0: link up
>[  301.044492] ata3.00: configured for UDMA/100
>[  301.313681] Console: switching to colour dummy device 80x25
>[  301.313992] [IGT] gem_exec_suspend: executing
>[  301.342323] [IGT] gem_exec_suspend: starting subtest basic-S4-devices
>[  301.352418] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[  301.352749] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000007
>[  301.352916] [drm:intel_power_well_disable [i915]] disabling DC off
>[  301.352989] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  301.353072] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  302.085411] PM: Syncing filesystems ... 
>[  302.198273] PM: done.
>[  302.198284] Freezing user space processes ... (elapsed 0.002 seconds) done.
>[  302.200675] OOM killer disabled.
>[  302.201230] PM: Marking nosave pages: [mem 0x00000000-0x00000fff]
>[  302.201253] PM: Marking nosave pages: [mem 0x00058000-0x00058fff]
>[  302.201260] PM: Marking nosave pages: [mem 0x00086000-0x000fffff]
>[  302.201271] PM: Marking nosave pages: [mem 0x6ec0c000-0x6ec56fff]
>[  302.201281] PM: Marking nosave pages: [mem 0x6ed09000-0x6f608fff]
>[  302.201375] PM: Marking nosave pages: [mem 0x75c1e000-0x77ffdfff]
>[  302.201732] PM: Marking nosave pages: [mem 0x77fff000-0xffffffff]
>[  302.204285] PM: Basic memory bitmaps created
>[  302.213277] PM: Preallocating image memory... done (allocated 175037 pages)
>[  302.388324] PM: Allocated 700148 kbytes in 0.17 seconds (4118.51 MB/s)
>[  302.388325] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
>[  302.390679] Suspending console(s) (use no_console_suspend to debug)
>[  302.394324] [drm:intel_power_well_enable [i915]] enabling DC off
>[  302.394344] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  302.394386] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  302.394403] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  302.394432] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  302.394448] [drm:skl_set_power_well [i915]] Enabling DDI B IO power well
>[  302.394461] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>[  302.394475] [drm:skl_set_power_well [i915]] Enabling DDI C IO power well
>[  302.394488] [drm:intel_power_well_enable [i915]] enabling DDI D IO power well
>[  302.394502] [drm:skl_set_power_well [i915]] Enabling DDI D IO power well
>[  302.395267] ACPI : EC: event blocked
>[  302.411594] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  302.411797] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  302.616276] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  302.616407] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  302.622880] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  302.623004] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  302.623444] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  302.623539] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  302.623660] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000000
>[  302.674536] [drm:wait_panel_status [i915]] Wait complete
>[  302.674634] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  302.674717] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  302.674794] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  302.674921] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  302.674997] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  302.675064] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  302.675189] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  302.675254] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  302.675322] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  302.675396] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  302.675465] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  302.675531] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  302.675597] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  302.675704] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  302.675800] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  302.675868] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  302.675933] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  302.676081] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  302.682237] PM: freeze of devices complete after 291.533 msecs
>[  302.682244] PM: hibernation debug: Waiting for 5 seconds.
>[  307.827816] usb usb1: root hub lost power or was reset
>[  307.827823] usb usb2: root hub lost power or was reset
>[  307.828574] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x77f6e018
>[  307.828615] [drm:intel_opregion_setup [i915]] Public ACPI methods supported
>[  307.828651] [drm:intel_opregion_setup [i915]] SWSCI supported
>[  307.828836] ACPI : EC: event unblocked
>[  307.833533] rtc_cmos 00:04: System wakeup disabled by ACPI
>[  307.836215] [drm:intel_opregion_setup [i915]] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00300483
>[  307.836252] [drm:intel_opregion_setup [i915]] ASLE supported
>[  307.836270] [drm:intel_opregion_setup [i915]] ASLE extension supported
>[  307.836288] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (Mailbox #4)
>[  307.836522] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x4af05
>[  307.836908] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  307.836968] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  307.837406] [drm:drm_dp_i2c_do_msg] native defer
>[  307.838192] sd 2:0:0:0: [sda] Starting disk
>[  307.838709] [drm:drm_dp_i2c_do_msg] native defer
>[  307.839963] [drm:drm_dp_i2c_do_msg] native defer
>[  307.841183] [drm:drm_dp_i2c_do_msg] native defer
>[  307.842416] [drm:drm_dp_i2c_do_msg] native defer
>[  307.843241] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  307.843328] [drm:gen8_init_common_ring [i915]] Execlists enabled for rcs0
>[  307.843356] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 14
>[  307.843426] [drm:gen8_init_common_ring [i915]] Execlists enabled for bcs0
>[  307.843479] [drm:gen8_init_common_ring [i915]] Execlists enabled for vcs0
>[  307.843530] [drm:gen8_init_common_ring [i915]] Execlists enabled for vecs0
>[  307.843594] [drm:intel_update_cdclk [i915]] Current CD clock rate: 337500 kHz, VCO: 8100000 kHz, ref: 24000 kHz
>[  307.843696] [drm:intel_set_plane_visible [i915]] pipe A active planes 0x0
>[  307.843714] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:32:pipe A] hw state readout: disabled
>[  307.843736] [drm:intel_set_plane_visible [i915]] pipe B active planes 0x0
>[  307.843754] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:39:pipe B] hw state readout: disabled
>[  307.843774] [drm:intel_set_plane_visible [i915]] pipe C active planes 0x0
>[  307.843827] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:46:pipe C] hw state readout: disabled
>[  307.843865] [drm:intel_modeset_setup_hw_state [i915]] DPLL 0 hw state readout: crtc_mask 0x00000000, on 1
>[  307.843884] [drm:intel_modeset_setup_hw_state [i915]] DPLL 1 hw state readout: crtc_mask 0x00000000, on 0
>[  307.843902] [drm:intel_modeset_setup_hw_state [i915]] DPLL 2 hw state readout: crtc_mask 0x00000000, on 0
>[  307.843936] [drm:intel_modeset_setup_hw_state [i915]] DPLL 3 hw state readout: crtc_mask 0x00000000, on 0
>[  307.843954] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:47:DDI A] hw state readout: disabled, pipe A
>[  307.843971] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:55:DDI B] hw state readout: disabled, pipe A
>[  307.843987] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:57:DP-MST A] hw state readout: disabled, pipe A
>[  307.844002] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:58:DP-MST B] hw state readout: disabled, pipe B
>[  307.844018] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:59:DP-MST C] hw state readout: disabled, pipe C
>[  307.844037] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:48:eDP-1] hw state readout: disabled
>[  307.844055] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:56:DP-1] hw state readout: disabled
>[  307.844127] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][setup_hw_state]
>[  307.844151] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0
>[  307.844169] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  307.844185] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  307.844188] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  307.844220] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  307.844223] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  307.844238] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  307.844253] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  307.844268] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: 0
>[  307.844283] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  307.844298] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  307.844316] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  307.844332] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  307.844347] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  307.844363] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  307.844378] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  307.844395] [drm:intel_dump_pipe_config [i915]] [CRTC:39:pipe B][setup_hw_state]
>[  307.844409] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0
>[  307.844424] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  307.844438] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  307.844440] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  307.844455] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  307.844457] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  307.844472] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  307.844487] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  307.844501] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: 0
>[  307.844515] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  307.844529] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  307.844547] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  307.844562] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  307.844577] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 1B] disabled, scaler_id = -1
>[  307.844591] [drm:intel_dump_pipe_config [i915]] [PLANE:35:plane 2B] disabled, scaler_id = -1
>[  307.844605] [drm:intel_dump_pipe_config [i915]] [PLANE:37:cursor B] disabled, scaler_id = -1
>[  307.844621] [drm:intel_dump_pipe_config [i915]] [CRTC:46:pipe C][setup_hw_state]
>[  307.844636] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0
>[  307.844650] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  307.844664] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  307.844667] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  307.844681] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  307.844683] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  307.844697] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  307.844712] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  307.844726] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: 0
>[  307.844740] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  307.844754] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  307.844772] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  307.844786] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  307.844801] [drm:intel_dump_pipe_config [i915]] [PLANE:40:plane 1C] disabled, scaler_id = -1
>[  307.844815] [drm:intel_dump_pipe_config [i915]] [PLANE:42:plane 2C] disabled, scaler_id = -1
>[  307.844830] [drm:intel_dump_pipe_config [i915]] [PLANE:44:cursor C] disabled, scaler_id = -1
>[  307.844848] [drm:intel_modeset_setup_hw_state [i915]] DPLL 0 enabled but not in use, disabling
>[  307.844912] [drm:intel_power_well_disable [i915]] disabling DDI D IO power well
>[  307.844928] [drm:skl_set_power_well [i915]] Disabling DDI D IO power well
>[  307.844944] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well
>[  307.844960] [drm:skl_set_power_well [i915]] Disabling DDI C IO power well
>[  307.844992] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[  307.845007] [drm:skl_set_power_well [i915]] Disabling DDI B IO power well
>[  307.845041] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  307.845056] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  307.845081] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  307.845103] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  307.845118] [drm:intel_power_well_disable [i915]] disabling DC off
>[  307.845133] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  307.845147] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  307.845602] [drm:intel_power_well_disable [i915]] disabling always-on
>[  307.845657] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  307.845674] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  307.845695] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  307.845713] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  307.845731] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  307.845749] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  307.845767] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  307.845783] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  307.845800] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  307.845816] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  307.845832] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  307.845835] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  307.845850] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  307.845852] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  307.845868] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  307.845883] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  307.845898] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  307.845913] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  307.845963] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  307.845981] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  307.845996] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  307.846030] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  307.846045] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  307.846065] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  307.846083] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  307.846104] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  307.846122] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  307.846172] [drm:intel_power_well_enable [i915]] enabling always-on
>[  307.846186] [drm:intel_power_well_enable [i915]] enabling DC off
>[  307.846457] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  307.846486] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  307.846503] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  307.846520] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  307.846536] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  307.846552] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  307.846568] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:56:DP-1]
>[  307.846585] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  307.846604] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  307.846621] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  307.846638] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  307.846658] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  307.846676] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  307.846714] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  307.846738] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  307.846807] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  307.846831] [drm:wait_panel_status [i915]] Wait complete
>[  307.846869] [drm:edp_panel_on [i915]] Wait for panel power on
>[  307.846936] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 0000000a control 00000003
>[  307.866872] r8169 0000:0e:00.0 enp14s0: link down
>[  307.982908] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  307.982962] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  307.983011] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  307.983152] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  308.048951] [drm:wait_panel_status [i915]] Wait complete
>[  308.049000] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  308.049041] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  308.049162] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  308.049257] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  308.050632] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  308.050683] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  308.050727] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  308.050772] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  308.051652] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  308.051698] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  308.052917] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  308.052969] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  308.054362] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  308.054436] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  308.054485] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  308.054587] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  308.159030] ata4: SATA link down (SStatus 4 SControl 300)
>[  308.159091] ata3: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
>[  308.159125] ata2: SATA link down (SStatus 4 SControl 300)
>[  308.159178] ata1: SATA link down (SStatus 4 SControl 300)
>[  308.256192] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  308.256250] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  308.256321] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  308.256374] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  308.263138] ata3.00: configured for UDMA/100
>[  308.271228] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  308.271302] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  308.271409] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  308.271475] [drm:intel_atomic_commit_tail [i915]] [CRTC:39:pipe B]
>[  308.271535] [drm:intel_atomic_commit_tail [i915]] [CRTC:46:pipe C]
>[  308.271817] [drm:intel_opregion_register [i915]] 2 outputs detected
>[  308.271956] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  308.272016] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  308.272075] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  308.272161] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  308.272214] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  308.277122] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  308.277888] [drm:drm_helper_hpd_irq_event] [CONNECTOR:48:eDP-1] status updated from connected to connected
>[  308.277913] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  308.277929] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  308.277947] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  308.278167] PM: restore of devices complete after 450.907 msecs
>[  308.278360] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  308.278387] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  308.278823] [drm:drm_dp_i2c_do_msg] native defer
>[  308.279899] PM: Image restored successfully.
>[  308.280081] [drm:drm_dp_i2c_do_msg] native defer
>[  308.280109] PM: Basic memory bitmaps freed
>[  308.280112] OOM killer enabled.
>[  308.280114] Restarting tasks ... 
>[  308.281386] [drm:drm_dp_i2c_do_msg] native defer
>[  308.282838] [drm:drm_dp_i2c_do_msg] native defer
>[  308.283107] done.
>[  308.283473] [drm] RC6 on
>[  308.284333] [drm:drm_dp_i2c_do_msg] native defer
>[  308.285201] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  308.285744] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  308.286125] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  308.286166] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  308.286178] [drm:drm_helper_hpd_irq_event] [CONNECTOR:56:DP-1] status updated from disconnected to disconnected
>[  308.911724] [IGT] gem_exec_suspend: exiting, ret=0
>[  308.954568] Console: switching to colour frame buffer device 240x67
>[  309.330259] Console: switching to colour dummy device 80x25
>[  309.330546] [IGT] gem_flink_basic: executing
>[  309.355594] [IGT] gem_flink_basic: starting subtest bad-flink
>[  309.355755] [IGT] gem_flink_basic: exiting, ret=0
>[  309.387809] Console: switching to colour frame buffer device 240x67
>[  309.581643] Console: switching to colour dummy device 80x25
>[  309.581826] [IGT] gem_flink_basic: executing
>[  309.603561] [IGT] gem_flink_basic: starting subtest bad-open
>[  309.603724] [IGT] gem_flink_basic: exiting, ret=0
>[  309.637745] Console: switching to colour frame buffer device 240x67
>[  309.774754] Console: switching to colour dummy device 80x25
>[  309.775147] [IGT] gem_flink_basic: executing
>[  309.800563] [IGT] gem_flink_basic: starting subtest basic
>[  309.800808] [IGT] gem_flink_basic: exiting, ret=0
>[  309.820930] Console: switching to colour frame buffer device 240x67
>[  310.020910] Console: switching to colour dummy device 80x25
>[  310.021307] [IGT] gem_flink_basic: executing
>[  310.046599] [IGT] gem_flink_basic: starting subtest double-flink
>[  310.046836] [IGT] gem_flink_basic: exiting, ret=0
>[  310.070962] Console: switching to colour frame buffer device 240x67
>[  310.188121] r8169 0000:0e:00.0 enp14s0: link up
>[  310.286039] Console: switching to colour dummy device 80x25
>[  310.286389] [IGT] gem_flink_basic: executing
>[  310.310689] [IGT] gem_flink_basic: starting subtest flink-lifetime
>[  310.311567] [IGT] gem_flink_basic: exiting, ret=0
>[  310.337516] Console: switching to colour frame buffer device 240x67
>[  310.492146] Console: switching to colour dummy device 80x25
>[  310.492252] [IGT] gem_linear_blits: executing
>[  310.504430] [IGT] gem_linear_blits: starting subtest basic
>[  310.513754] [IGT] gem_linear_blits: exiting, ret=0
>[  310.554180] Console: switching to colour frame buffer device 240x67
>[  310.778837] Console: switching to colour dummy device 80x25
>[  310.779270] [IGT] gem_mmap: executing
>[  310.804750] [IGT] gem_mmap: starting subtest basic
>[  310.805459] [IGT] gem_mmap: exiting, ret=0
>[  310.824353] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[  310.824471] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000007
>[  310.824531] [drm:intel_power_well_disable [i915]] disabling DC off
>[  310.824594] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  310.824650] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  310.854001] Console: switching to colour frame buffer device 240x67
>[  311.062785] Console: switching to colour dummy device 80x25
>[  311.063175] [IGT] gem_mmap: executing
>[  311.081035] [IGT] gem_mmap: starting subtest basic-small-bo
>[  311.282515] [IGT] gem_mmap: exiting, ret=0
>[  311.337317] Console: switching to colour frame buffer device 240x67
>[  311.645124] Console: switching to colour dummy device 80x25
>[  311.645459] [IGT] gem_mmap_gtt: executing
>[  311.670671] [IGT] gem_mmap_gtt: starting subtest basic
>[  311.671333] [IGT] gem_mmap_gtt: exiting, ret=0
>[  311.703713] Console: switching to colour frame buffer device 240x67
>[  311.889674] Console: switching to colour dummy device 80x25
>[  311.889981] [IGT] gem_mmap_gtt: executing
>[  311.914574] [IGT] gem_mmap_gtt: starting subtest basic-copy
>[  312.108998] [IGT] gem_mmap_gtt: exiting, ret=0
>[  312.170396] Console: switching to colour frame buffer device 240x67
>[  312.381683] Console: switching to colour dummy device 80x25
>[  312.381917] [IGT] gem_mmap_gtt: executing
>[  312.396021] [IGT] gem_mmap_gtt: starting subtest basic-read
>[  312.445101] [IGT] gem_mmap_gtt: exiting, ret=0
>[  312.503546] Console: switching to colour frame buffer device 240x67
>[  312.704196] Console: switching to colour dummy device 80x25
>[  312.704505] [IGT] gem_mmap_gtt: executing
>[  312.729583] [IGT] gem_mmap_gtt: starting subtest basic-read-no-prefault
>[  312.729846] Setting dangerous option prefault_disable - tainting kernel
>[  312.773496] Setting dangerous option prefault_disable - tainting kernel
>[  312.773610] [IGT] gem_mmap_gtt: exiting, ret=0
>[  312.773684] Setting dangerous option prefault_disable - tainting kernel
>[  312.820175] Console: switching to colour frame buffer device 240x67
>[  313.053623] Console: switching to colour dummy device 80x25
>[  313.053785] [IGT] gem_mmap_gtt: executing
>[  313.075582] [IGT] gem_mmap_gtt: starting subtest basic-read-write
>[  313.100906] [IGT] gem_mmap_gtt: exiting, ret=0
>[  313.153241] Console: switching to colour frame buffer device 240x67
>[  313.326432] Console: switching to colour dummy device 80x25
>[  313.326565] [IGT] gem_mmap_gtt: executing
>[  313.348573] [IGT] gem_mmap_gtt: starting subtest basic-read-write-distinct
>[  313.374419] [IGT] gem_mmap_gtt: exiting, ret=0
>[  313.436486] Console: switching to colour frame buffer device 240x67
>[  313.729176] Console: switching to colour dummy device 80x25
>[  313.729509] [IGT] gem_mmap_gtt: executing
>[  313.766141] [IGT] gem_mmap_gtt: starting subtest basic-short
>[  313.804196] [IGT] gem_mmap_gtt: exiting, ret=0
>[  313.852654] Console: switching to colour frame buffer device 240x67
>[  314.093796] Console: switching to colour dummy device 80x25
>[  314.094284] [IGT] gem_mmap_gtt: executing
>[  314.119657] [IGT] gem_mmap_gtt: starting subtest basic-small-bo
>[  314.217529] [IGT] gem_mmap_gtt: exiting, ret=0
>[  314.302496] Console: switching to colour frame buffer device 240x67
>[  314.577634] Console: switching to colour dummy device 80x25
>[  314.577951] [IGT] gem_mmap_gtt: executing
>[  314.594036] [IGT] gem_mmap_gtt: starting subtest basic-small-bo-tiledX
>[  314.688759] [IGT] gem_mmap_gtt: exiting, ret=0
>[  314.785976] Console: switching to colour frame buffer device 240x67
>[  315.048999] Console: switching to colour dummy device 80x25
>[  315.049481] [IGT] gem_mmap_gtt: executing
>[  315.066090] [IGT] gem_mmap_gtt: starting subtest basic-small-bo-tiledY
>[  315.162429] [IGT] gem_mmap_gtt: exiting, ret=0
>[  315.235729] Console: switching to colour frame buffer device 240x67
>[  315.517798] Console: switching to colour dummy device 80x25
>[  315.517997] [IGT] gem_mmap_gtt: executing
>[  315.532099] [IGT] gem_mmap_gtt: starting subtest basic-small-copy
>[  315.795441] [IGT] gem_mmap_gtt: exiting, ret=0
>[  315.835441] Console: switching to colour frame buffer device 240x67
>[  316.116716] Console: switching to colour dummy device 80x25
>[  316.117035] [IGT] gem_mmap_gtt: executing
>[  316.142696] [IGT] gem_mmap_gtt: starting subtest basic-small-copy-XY
>[  316.529407] [IGT] gem_mmap_gtt: exiting, ret=0
>[  316.568503] Console: switching to colour frame buffer device 240x67
>[  316.831692] Console: switching to colour dummy device 80x25
>[  316.832010] [IGT] gem_mmap_gtt: executing
>[  316.856578] [IGT] gem_mmap_gtt: starting subtest basic-wc
>[  317.486306] [IGT] gem_mmap_gtt: exiting, ret=0
>[  317.535046] Console: switching to colour frame buffer device 240x67
>[  317.771966] Console: switching to colour dummy device 80x25
>[  317.772141] [IGT] gem_mmap_gtt: executing
>[  317.793404] [IGT] gem_mmap_gtt: starting subtest basic-write
>[  317.879416] [IGT] gem_mmap_gtt: exiting, ret=0
>[  317.934600] Console: switching to colour frame buffer device 240x67
>[  318.152287] Console: switching to colour dummy device 80x25
>[  318.152626] [IGT] gem_mmap_gtt: executing
>[  318.165709] [IGT] gem_mmap_gtt: starting subtest basic-write-cpu-read-gtt
>[  318.320690] [IGT] gem_mmap_gtt: exiting, ret=0
>[  318.368145] Console: switching to colour frame buffer device 240x67
>[  318.589463] Console: switching to colour dummy device 80x25
>[  318.589771] [IGT] gem_mmap_gtt: executing
>[  318.607016] [IGT] gem_mmap_gtt: starting subtest basic-write-gtt
>[  318.722295] [IGT] gem_mmap_gtt: exiting, ret=0
>[  318.767872] Console: switching to colour frame buffer device 240x67
>[  318.925229] Console: switching to colour dummy device 80x25
>[  318.925426] [IGT] gem_mmap_gtt: executing
>[  318.939100] [IGT] gem_mmap_gtt: starting subtest basic-write-gtt-no-prefault
>[  318.939338] Setting dangerous option prefault_disable - tainting kernel
>[  319.052749] Setting dangerous option prefault_disable - tainting kernel
>[  319.052921] [IGT] gem_mmap_gtt: exiting, ret=0
>[  319.052978] Setting dangerous option prefault_disable - tainting kernel
>[  319.100921] Console: switching to colour frame buffer device 240x67
>[  319.245517] Console: switching to colour dummy device 80x25
>[  319.245835] [IGT] gem_mmap_gtt: executing
>[  319.274566] [IGT] gem_mmap_gtt: starting subtest basic-write-no-prefault
>[  319.274710] Setting dangerous option prefault_disable - tainting kernel
>[  319.381198] Setting dangerous option prefault_disable - tainting kernel
>[  319.381322] [IGT] gem_mmap_gtt: exiting, ret=0
>[  319.381378] Setting dangerous option prefault_disable - tainting kernel
>[  319.450788] Console: switching to colour frame buffer device 240x67
>[  319.653173] Console: switching to colour dummy device 80x25
>[  319.653386] [IGT] gem_mmap_gtt: executing
>[  319.667046] [IGT] gem_mmap_gtt: starting subtest basic-write-read
>[  319.692470] [IGT] gem_mmap_gtt: exiting, ret=0
>[  319.750964] Console: switching to colour frame buffer device 240x67
>[  319.968455] Console: switching to colour dummy device 80x25
>[  319.968781] [IGT] gem_mmap_gtt: executing
>[  319.997601] [IGT] gem_mmap_gtt: starting subtest basic-write-read-distinct
>[  320.022318] [IGT] gem_mmap_gtt: exiting, ret=0
>[  320.083998] Console: switching to colour frame buffer device 240x67
>[  320.240890] Console: switching to colour dummy device 80x25
>[  320.241006] [IGT] gem_pread: executing
>[  320.252563] [IGT] gem_pread: starting subtest basic
>[  320.988197] [IGT] gem_pread: exiting, ret=0
>[  321.033769] Console: switching to colour frame buffer device 240x67
>[  321.210584] Console: switching to colour dummy device 80x25
>[  321.210882] [IGT] gem_pwrite: executing
>[  321.235846] [IGT] gem_pwrite: starting subtest basic
>[  321.961753] [IGT] gem_pwrite: exiting, ret=0
>[  322.016711] Console: switching to colour frame buffer device 240x67
>[  322.183974] Console: switching to colour dummy device 80x25
>[  322.184346] [IGT] gem_render_linear_blits: executing
>[  322.202103] [IGT] gem_render_linear_blits: starting subtest basic
>[  322.224924] [IGT] gem_render_linear_blits: exiting, ret=0
>[  322.266809] Console: switching to colour frame buffer device 240x67
>[  322.498973] Console: switching to colour dummy device 80x25
>[  322.499437] [IGT] gem_render_tiled_blits: executing
>[  322.518117] [IGT] gem_render_tiled_blits: starting subtest basic
>[  322.540223] [IGT] gem_render_tiled_blits: exiting, ret=0
>[  322.566640] Console: switching to colour frame buffer device 240x67
>[  322.782971] Console: switching to colour dummy device 80x25
>[  322.783461] [IGT] gem_ringfill: executing
>[  322.840741] [drm] Initialized vgem 1.0.0 20120112 for virtual device on minor 1
>[  322.841644] [drm:vgem_gem_dumb_create [vgem]] Created object of size 1
>[  322.865927] [IGT] gem_ringfill: starting subtest basic-default
>[  322.924704] [IGT] gem_ringfill: exiting, ret=0
>[  322.983251] Console: switching to colour frame buffer device 240x67
>[  323.237231] Console: switching to colour dummy device 80x25
>[  323.237383] [IGT] gem_ringfill: executing
>[  323.261690] [drm:vgem_gem_dumb_create [vgem]] Created object of size 1
>[  323.274533] [IGT] gem_ringfill: starting subtest basic-default-interruptible
>[  324.405775] [IGT] gem_ringfill: exiting, ret=0
>[  324.466026] Console: switching to colour frame buffer device 240x67
>[  324.632190] Console: switching to colour dummy device 80x25
>[  324.632499] [IGT] gem_ringfill: executing
>[  324.660663] [drm:vgem_gem_dumb_create [vgem]] Created object of size 1
>[  324.672723] [IGT] gem_ringfill: starting subtest basic-default-forked
>[  324.735548] [IGT] gem_ringfill: exiting, ret=0
>[  324.782565] Console: switching to colour frame buffer device 240x67
>[  324.988403] Console: switching to colour dummy device 80x25
>[  324.988511] [IGT] gem_ringfill: executing
>[  325.002157] [drm:vgem_gem_dumb_create [vgem]] Created object of size 1
>[  325.014419] [IGT] gem_ringfill: starting subtest basic-default-fd
>[  325.088465] [IGT] gem_ringfill: exiting, ret=0
>[  325.132523] Console: switching to colour frame buffer device 240x67
>[  325.341314] Console: switching to colour dummy device 80x25
>[  325.341463] [IGT] gem_ringfill: executing
>[  325.365674] [drm:vgem_gem_dumb_create [vgem]] Created object of size 1
>[  325.377789] [IGT] gem_ringfill: starting subtest basic-default-hang
>[  329.704814] [drm:missed_breadcrumb [i915]] rcs0 missed breadcrumb at intel_breadcrumbs_hangcheck+0x5c/0x80 [i915], irq posted? yes, current seqno=2c7a32, last=2c7aaf
>[  333.743723] [drm] GPU HANG: ecode 9:0:0xe757fffe, in gem_ringfill [3468], reason: Hang on rcs0, action: reset
>[  333.743920] [drm:i915_reset_and_wakeup [i915]] resetting chip
>[  333.744313] drm/i915: Resetting chip after gpu hang
>[  333.745385] [drm:i915_gem_reset [i915]] context gem_ringfill[3468]/0 marked guilty (score 10) banned? no
>[  333.745406] [drm:i915_gem_reset [i915]] resetting rcs0 to restart from tail of request 0x2c7a33
>[  333.745485] [drm] RC6 on
>[  333.745759] [drm:gen8_init_common_ring [i915]] Execlists enabled for rcs0
>[  333.745778] [drm:gen8_init_common_ring [i915]] Restarting rcs0:0 from 0x2c7aaf
>[  333.745805] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 14
>[  333.745855] [drm:gen8_init_common_ring [i915]] Execlists enabled for bcs0
>[  333.745903] [drm:gen8_init_common_ring [i915]] Execlists enabled for vcs0
>[  333.745948] [drm:gen8_init_common_ring [i915]] Execlists enabled for vecs0
>[  336.171331] [IGT] gem_ringfill: exiting, ret=0
>[  336.212102] Console: switching to colour frame buffer device 240x67
>[  336.406357] Console: switching to colour dummy device 80x25
>[  336.406665] [IGT] gem_sync: executing
>[  336.434669] [IGT] gem_sync: starting subtest basic-all
>[  341.487831] [IGT] gem_sync: exiting, ret=0
>[  341.543537] Console: switching to colour frame buffer device 240x67
>[  341.734914] Console: switching to colour dummy device 80x25
>[  341.735221] [IGT] gem_sync: executing
>[  341.752084] [IGT] gem_sync: starting subtest basic-each
>[  346.833669] [IGT] gem_sync: exiting, ret=0
>[  346.875152] Console: switching to colour frame buffer device 240x67
>[  347.089543] Console: switching to colour dummy device 80x25
>[  347.089854] [IGT] gem_sync: executing
>[  347.117513] [IGT] gem_sync: starting subtest basic-many-each
>[  352.632576] [IGT] gem_sync: exiting, ret=0
>[  352.672946] Console: switching to colour frame buffer device 240x67
>[  352.866386] Console: switching to colour dummy device 80x25
>[  352.866704] [IGT] gem_sync: executing
>[  352.898636] [IGT] gem_sync: starting subtest basic-store-all
>[  358.476321] [IGT] gem_sync: exiting, ret=0
>[  358.521180] Console: switching to colour frame buffer device 240x67
>[  358.713044] Console: switching to colour dummy device 80x25
>[  358.713412] [IGT] gem_sync: executing
>[  358.741536] [IGT] gem_sync: starting subtest basic-store-each
>[  364.032928] [IGT] gem_sync: exiting, ret=0
>[  364.085975] Console: switching to colour frame buffer device 240x67
>[  364.531294] Console: switching to colour dummy device 80x25
>[  364.531599] [IGT] gem_tiled_blits: executing
>[  364.549273] [IGT] gem_tiled_blits: starting subtest basic
>[  364.565338] [IGT] gem_tiled_blits: exiting, ret=0
>[  364.619181] Console: switching to colour frame buffer device 240x67
>[  364.791937] Console: switching to colour dummy device 80x25
>[  364.792193] [IGT] gem_tiled_fence_blits: executing
>[  364.821687] [IGT] gem_tiled_fence_blits: starting subtest basic
>[  364.836972] [IGT] gem_tiled_fence_blits: exiting, ret=0
>[  364.885772] Console: switching to colour frame buffer device 240x67
>[  365.116433] Console: switching to colour dummy device 80x25
>[  365.116799] [IGT] gem_tiled_pread_basic: executing
>[  365.240907] [IGT] gem_tiled_pread_basic: exiting, ret=0
>[  365.285562] Console: switching to colour frame buffer device 240x67
>[  365.551822] Console: switching to colour dummy device 80x25
>[  365.552260] [IGT] gem_wait: executing
>[  365.574825] [IGT] gem_wait: starting subtest basic-busy-all
>[  366.102024] [IGT] gem_wait: exiting, ret=0
>[  366.151944] Console: switching to colour frame buffer device 240x67
>[  366.312811] Console: switching to colour dummy device 80x25
>[  366.313195] [IGT] gem_wait: executing
>[  366.331746] [IGT] gem_wait: starting subtest basic-wait-all
>[  367.368226] [IGT] gem_wait: exiting, ret=0
>[  367.418235] Console: switching to colour frame buffer device 240x67
>[  367.575674] Console: switching to colour dummy device 80x25
>[  367.575989] [IGT] gem_wait: executing
>[  367.605291] [IGT] gem_wait: starting subtest basic-await-all
>[  367.623467] [drm:vgem_gem_dumb_create [vgem]] Created object of size 1
>[  368.647634] [IGT] gem_wait: exiting, ret=0
>[  368.701130] Console: switching to colour frame buffer device 240x67
>[  368.871308] Console: switching to colour dummy device 80x25
>[  368.871570] [IGT] gem_workarounds: executing
>[  368.896776] [IGT] gem_workarounds: starting subtest basic-read
>[  368.920608] [IGT] gem_workarounds: exiting, ret=0
>[  368.967809] Console: switching to colour frame buffer device 240x67
>[  369.327812] Console: switching to colour dummy device 80x25
>[  369.328219] [IGT] kms_addfb_basic: executing
>[  369.346034] [drm:drm_mode_addfb2] [FB:60]
>[  369.346700] [IGT] kms_addfb_basic: starting subtest addfb25-bad-modifier
>[  369.346848] [drm:intel_framebuffer_init [i915]] Unsupported fb modifier 0xffffffffffffffff!
>[  369.346866] [drm:drm_internal_framebuffer_create] could not create framebuffer
>[  369.353577] [drm:drm_mode_addfb2] [FB:60]
>[  369.353641] [IGT] kms_addfb_basic: exiting, ret=0
>[  369.400917] Console: switching to colour frame buffer device 240x67
>[  369.590126] Console: switching to colour dummy device 80x25
>[  369.590439] [IGT] kms_addfb_basic: executing
>[  369.608140] [drm:drm_mode_addfb2] [FB:62]
>[  369.608572] [IGT] kms_addfb_basic: starting subtest addfb25-framebuffer-vs-set-tiling
>[  369.608633] [drm:drm_mode_addfb2] [FB:62]
>[  369.622642] [drm:drm_mode_addfb2] [FB:62]
>[  369.622842] [IGT] kms_addfb_basic: exiting, ret=0
>[  369.667472] Console: switching to colour frame buffer device 240x67
>[  369.875430] Console: switching to colour dummy device 80x25
>[  369.875580] [IGT] kms_addfb_basic: executing
>[  369.897635] [drm:drm_mode_addfb2] [FB:60]
>[  369.898137] [IGT] kms_addfb_basic: starting subtest addfb25-modifier-no-flag
>[  369.898218] [drm:drm_internal_framebuffer_create] bad fb modifier 72057594037927937 for plane 0
>[  369.911910] [drm:drm_mode_addfb2] [FB:60]
>[  369.912145] [IGT] kms_addfb_basic: exiting, ret=0
>[  369.950785] Console: switching to colour frame buffer device 240x67
>[  370.162873] Console: switching to colour dummy device 80x25
>[  370.163276] [IGT] kms_addfb_basic: executing
>[  370.188660] [drm:drm_mode_addfb2] [FB:62]
>[  370.189147] [IGT] kms_addfb_basic: starting subtest addfb25-X-tiled
>[  370.189225] [drm:drm_mode_addfb2] [FB:62]
>[  370.203112] [drm:drm_mode_addfb2] [FB:62]
>[  370.203307] [IGT] kms_addfb_basic: exiting, ret=0
>[  370.250477] Console: switching to colour frame buffer device 240x67
>[  370.445278] Console: switching to colour dummy device 80x25
>[  370.445392] [IGT] kms_addfb_basic: executing
>[  370.467518] [drm:drm_mode_addfb2] [FB:60]
>[  370.467834] [IGT] kms_addfb_basic: starting subtest addfb25-X-tiled-mismatch
>[  370.467980] [drm:intel_framebuffer_init [i915]] tiling_mode doesn't match fb modifier
>[  370.467993] [drm:drm_internal_framebuffer_create] could not create framebuffer
>[  370.480722] [drm:drm_mode_addfb2] [FB:60]
>[  370.480899] [IGT] kms_addfb_basic: exiting, ret=0
>[  370.517339] Console: switching to colour frame buffer device 240x67
>[  370.736597] Console: switching to colour dummy device 80x25
>[  370.736912] [IGT] kms_addfb_basic: executing
>[  370.761660] [drm:drm_mode_addfb2] [FB:62]
>[  370.762349] [IGT] kms_addfb_basic: starting subtest addfb25-Yf-tiled
>[  370.762416] [drm:drm_mode_addfb2] [FB:62]
>[  370.775780] [drm:drm_mode_addfb2] [FB:62]
>[  370.775988] [IGT] kms_addfb_basic: exiting, ret=0
>[  370.833897] Console: switching to colour frame buffer device 240x67
>[  371.018312] Console: switching to colour dummy device 80x25
>[  371.018629] [IGT] kms_addfb_basic: executing
>[  371.047649] [drm:drm_mode_addfb2] [FB:60]
>[  371.048281] [IGT] kms_addfb_basic: starting subtest addfb25-Y-tiled
>[  371.048350] [drm:drm_mode_addfb2] [FB:60]
>[  371.061667] [drm:drm_mode_addfb2] [FB:60]
>[  371.061873] [IGT] kms_addfb_basic: exiting, ret=0
>[  371.116943] Console: switching to colour frame buffer device 240x67
>[  371.333218] Console: switching to colour dummy device 80x25
>[  371.333337] [IGT] kms_addfb_basic: executing
>[  371.354677] [drm:drm_mode_addfb2] [FB:62]
>[  371.355021] [IGT] kms_addfb_basic: starting subtest addfb25-Y-tiled-small
>[  371.355202] [drm:intel_framebuffer_init [i915]] fb too big for bo (need 4194304 bytes, have 4190208 bytes)
>[  371.355216] [drm:drm_internal_framebuffer_create] could not create framebuffer
>[  371.365211] [drm:drm_mode_addfb2] [FB:62]
>[  371.365378] [IGT] kms_addfb_basic: exiting, ret=0
>[  371.416900] Console: switching to colour frame buffer device 240x67
>[  371.611270] Console: switching to colour dummy device 80x25
>[  371.611586] [IGT] kms_addfb_basic: executing
>[  371.636560] [drm:drm_mode_addfb2] [FB:60]
>[  371.636765] [IGT] kms_addfb_basic: starting subtest bad-pitch-0
>[  371.636813] [drm:drm_internal_framebuffer_create] bad pitch 0 for plane 0
>[  371.650914] [drm:drm_mode_addfb2] [FB:60]
>[  371.651171] [IGT] kms_addfb_basic: exiting, ret=0
>[  371.700234] Console: switching to colour frame buffer device 240x67
>[  371.921281] Console: switching to colour dummy device 80x25
>[  371.921418] [IGT] kms_addfb_basic: executing
>[  371.942687] [drm:drm_mode_addfb2] [FB:62]
>[  371.942896] [IGT] kms_addfb_basic: starting subtest bad-pitch-1024
>[  371.942944] [drm:drm_internal_framebuffer_create] bad pitch 1024 for plane 0
>[  371.956971] [drm:drm_mode_addfb2] [FB:62]
>[  371.957245] [IGT] kms_addfb_basic: exiting, ret=0
>[  372.000153] Console: switching to colour frame buffer device 240x67
>[  372.260925] Console: switching to colour dummy device 80x25
>[  372.261339] [IGT] kms_addfb_basic: executing
>[  372.286841] [drm:drm_mode_addfb2] [FB:60]
>[  372.287172] [IGT] kms_addfb_basic: starting subtest bad-pitch-128
>[  372.287250] [drm:drm_internal_framebuffer_create] bad pitch 128 for plane 0
>[  372.301329] [drm:drm_mode_addfb2] [FB:60]
>[  372.301504] [IGT] kms_addfb_basic: exiting, ret=0
>[  372.349919] Console: switching to colour frame buffer device 240x67
>[  372.544729] Console: switching to colour dummy device 80x25
>[  372.545041] [IGT] kms_addfb_basic: executing
>[  372.569636] [drm:drm_mode_addfb2] [FB:62]
>[  372.569845] [IGT] kms_addfb_basic: starting subtest bad-pitch-256
>[  372.569895] [drm:drm_internal_framebuffer_create] bad pitch 256 for plane 0
>[  372.583859] [drm:drm_mode_addfb2] [FB:62]
>[  372.584310] [IGT] kms_addfb_basic: exiting, ret=0
>[  372.633300] Console: switching to colour frame buffer device 240x67
>[  372.831359] Console: switching to colour dummy device 80x25
>[  372.831678] [IGT] kms_addfb_basic: executing
>[  372.856962] [drm:drm_mode_addfb2] [FB:60]
>[  372.857284] [IGT] kms_addfb_basic: starting subtest bad-pitch-32
>[  372.857340] [drm:drm_internal_framebuffer_create] bad pitch 32 for plane 0
>[  372.871314] [drm:drm_mode_addfb2] [FB:60]
>[  372.871494] [IGT] kms_addfb_basic: exiting, ret=0
>[  372.916488] Console: switching to colour frame buffer device 240x67
>[  373.162758] Console: switching to colour dummy device 80x25
>[  373.163149] [IGT] kms_addfb_basic: executing
>[  373.188765] [drm:drm_mode_addfb2] [FB:62]
>[  373.188972] [IGT] kms_addfb_basic: starting subtest bad-pitch-63
>[  373.189021] [drm:drm_internal_framebuffer_create] bad pitch 63 for plane 0
>[  373.202532] [drm:drm_mode_addfb2] [FB:62]
>[  373.202711] [IGT] kms_addfb_basic: exiting, ret=0
>[  373.249525] Console: switching to colour frame buffer device 240x67
>[  373.458572] Console: switching to colour dummy device 80x25
>[  373.458699] [IGT] kms_addfb_basic: executing
>[  373.480690] [drm:drm_mode_addfb2] [FB:60]
>[  373.480882] [IGT] kms_addfb_basic: starting subtest bad-pitch-65536
>[  373.481009] [drm:intel_framebuffer_init [i915]] linear pitch (65536) must be at most 32768
>[  373.481024] [drm:drm_internal_framebuffer_create] could not create framebuffer
>[  373.494893] [drm:drm_mode_addfb2] [FB:60]
>[  373.495130] [IGT] kms_addfb_basic: exiting, ret=0
>[  373.532805] Console: switching to colour frame buffer device 240x67
>[  373.716225] Console: switching to colour dummy device 80x25
>[  373.716370] [IGT] kms_addfb_basic: executing
>[  373.745859] [drm:drm_mode_addfb2] [FB:62]
>[  373.746242] [IGT] kms_addfb_basic: starting subtest bad-pitch-999
>[  373.746298] [drm:drm_internal_framebuffer_create] bad pitch 999 for plane 0
>[  373.760121] [drm:drm_mode_addfb2] [FB:62]
>[  373.760298] [IGT] kms_addfb_basic: exiting, ret=0
>[  373.816194] Console: switching to colour frame buffer device 240x67
>[  374.051447] Console: switching to colour dummy device 80x25
>[  374.051768] [IGT] kms_addfb_basic: executing
>[  374.076765] [drm:drm_mode_addfb2] [FB:60]
>[  374.076970] [IGT] kms_addfb_basic: starting subtest basic
>[  374.077030] [drm:drm_mode_addfb2] [FB:60]
>[  374.091011] [drm:drm_mode_addfb2] [FB:60]
>[  374.091252] [IGT] kms_addfb_basic: exiting, ret=0
>[  374.132658] Console: switching to colour frame buffer device 240x67
>[  374.366014] Console: switching to colour dummy device 80x25
>[  374.366506] [IGT] kms_addfb_basic: executing
>[  374.384180] [drm:drm_mode_addfb2] [FB:62]
>[  374.398371] [IGT] kms_addfb_basic: starting subtest basic-X-tiled
>[  374.398450] [drm:drm_mode_addfb2] [FB:62]
>[  374.398626] [drm:drm_mode_addfb2] [FB:62]
>[  374.398797] [IGT] kms_addfb_basic: exiting, ret=0
>[  374.449315] Console: switching to colour frame buffer device 240x67
>[  374.655332] Console: switching to colour dummy device 80x25
>[  374.655645] [IGT] kms_addfb_basic: executing
>[  374.684677] [drm:drm_mode_addfb2] [FB:60]
>[  374.698517] [IGT] kms_addfb_basic: starting subtest basic-Y-tiled
>[  374.698700] [drm:intel_framebuffer_init [i915]] No Y tiling for legacy addfb
>[  374.698721] [drm:drm_internal_framebuffer_create] could not create framebuffer
>[  374.698883] [drm:drm_mode_addfb2] [FB:60]
>[  374.699042] [IGT] kms_addfb_basic: exiting, ret=0
>[  374.749041] Console: switching to colour frame buffer device 240x67
>[  374.948428] Console: switching to colour dummy device 80x25
>[  374.948742] [IGT] kms_addfb_basic: executing
>[  374.973664] [drm:drm_mode_addfb2] [FB:62]
>[  374.973985] [IGT] kms_addfb_basic: starting subtest bo-too-small
>[  374.974133] [drm:intel_framebuffer_init [i915]] fb too big for bo (need 4198400 bytes, have 4190208 bytes)
>[  374.974235] [drm:drm_internal_framebuffer_create] could not create framebuffer
>[  374.988321] [drm:drm_mode_addfb2] [FB:62]
>[  374.988529] [IGT] kms_addfb_basic: exiting, ret=0
>[  375.032222] Console: switching to colour frame buffer device 240x67
>[  375.292574] Console: switching to colour dummy device 80x25
>[  375.292660] [IGT] kms_addfb_basic: executing
>[  375.302501] [drm:drm_mode_addfb2] [FB:60]
>[  375.302617] [IGT] kms_addfb_basic: starting subtest bo-too-small-due-to-tiling
>[  375.302675] [drm:intel_framebuffer_init [i915]] fb too big for bo (need 4194304 bytes, have 4190208 bytes)
>[  375.302681] [drm:drm_internal_framebuffer_create] could not create framebuffer
>[  375.307134] [drm:drm_mode_addfb2] [FB:60]
>[  375.307205] [IGT] kms_addfb_basic: exiting, ret=0
>[  375.348522] Console: switching to colour frame buffer device 240x67
>[  375.508135] Console: switching to colour dummy device 80x25
>[  375.508454] [IGT] kms_addfb_basic: executing
>[  375.533729] [drm:drm_mode_addfb2] [FB:62]
>[  375.533882] [IGT] kms_addfb_basic: starting subtest clobberred-modifier
>[  375.533957] [drm:drm_mode_addfb2] [FB:62]
>[  375.548304] [drm:drm_mode_addfb2] [FB:62]
>[  375.548480] [IGT] kms_addfb_basic: exiting, ret=0
>[  375.598708] Console: switching to colour frame buffer device 240x67
>[  375.836283] Console: switching to colour dummy device 80x25
>[  375.836614] [IGT] kms_addfb_basic: executing
>[  375.861635] [drm:drm_mode_addfb2] [FB:60]
>[  375.875862] [IGT] kms_addfb_basic: starting subtest framebuffer-vs-set-tiling
>[  375.875964] [drm:drm_mode_addfb2] [FB:60]
>[  375.876260] [drm:drm_mode_addfb2] [FB:60]
>[  375.876471] [IGT] kms_addfb_basic: exiting, ret=0
>[  375.915368] Console: switching to colour frame buffer device 240x67
>[  376.111653] Console: switching to colour dummy device 80x25
>[  376.111960] [IGT] kms_addfb_basic: executing
>[  376.136632] [drm:drm_mode_addfb2] [FB:62]
>[  376.150775] [drm:drm_mode_addfb2] [FB:62]
>[  376.150882] [IGT] kms_addfb_basic: starting subtest invalid-get-prop
>[  376.151507] [IGT] kms_addfb_basic: exiting, ret=0
>[  376.198555] Console: switching to colour frame buffer device 240x67
>[  376.398375] Console: switching to colour dummy device 80x25
>[  376.398693] [IGT] kms_addfb_basic: executing
>[  376.411441] [drm:drm_mode_addfb2] [FB:60]
>[  376.416052] [drm:drm_mode_addfb2] [FB:60]
>[  376.416108] [IGT] kms_addfb_basic: starting subtest invalid-get-prop-any
>[  376.416219] [IGT] kms_addfb_basic: exiting, ret=0
>[  376.465333] Console: switching to colour frame buffer device 240x67
>[  376.689442] Console: switching to colour dummy device 80x25
>[  376.689606] [IGT] kms_addfb_basic: executing
>[  376.711813] [drm:drm_mode_addfb2] [FB:62]
>[  376.725921] [drm:drm_mode_addfb2] [FB:62]
>[  376.726028] [IGT] kms_addfb_basic: starting subtest invalid-set-prop
>[  376.726482] [IGT] kms_addfb_basic: exiting, ret=0
>[  376.765115] Console: switching to colour frame buffer device 240x67
>[  376.901105] Console: switching to colour dummy device 80x25
>[  376.901416] [IGT] kms_addfb_basic: executing
>[  376.919170] [drm:drm_mode_addfb2] [FB:60]
>[  376.932832] [drm:drm_mode_addfb2] [FB:60]
>[  376.932942] [IGT] kms_addfb_basic: starting subtest invalid-set-prop-any
>[  376.933394] [IGT] kms_addfb_basic: exiting, ret=0
>[  376.981757] Console: switching to colour frame buffer device 240x67
>[  377.181365] Console: switching to colour dummy device 80x25
>[  377.181716] [IGT] kms_addfb_basic: executing
>[  377.206755] [drm:drm_mode_addfb2] [FB:62]
>[  377.206970] [IGT] kms_addfb_basic: starting subtest no-handle
>[  377.207022] [drm:drm_internal_framebuffer_create] no buffer object handle for plane 0
>[  377.221282] [drm:drm_mode_addfb2] [FB:62]
>[  377.221457] [IGT] kms_addfb_basic: exiting, ret=0
>[  377.264885] Console: switching to colour frame buffer device 240x67
>[  377.474904] Console: switching to colour dummy device 80x25
>[  377.475296] [IGT] kms_addfb_basic: executing
>[  377.500632] [drm:drm_mode_addfb2] [FB:60]
>[  377.500956] [IGT] kms_addfb_basic: starting subtest size-max
>[  377.501015] [drm:drm_mode_addfb2] [FB:60]
>[  377.501046] [drm:drm_mode_addfb2] [FB:60]
>[  377.501141] [drm:drm_mode_addfb2] [FB:60]
>[  377.515175] [drm:drm_mode_addfb2] [FB:60]
>[  377.515353] [IGT] kms_addfb_basic: exiting, ret=0
>[  377.564852] Console: switching to colour frame buffer device 240x67
>[  377.766684] Console: switching to colour dummy device 80x25
>[  377.766986] [IGT] kms_addfb_basic: executing
>[  377.791695] [drm:drm_mode_addfb2] [FB:62]
>[  377.792034] [IGT] kms_addfb_basic: starting subtest small-bo
>[  377.792195] [drm:drm_mode_addfb2] [FB:62]
>[  377.799285] [drm:drm_mode_addfb2] [FB:62]
>[  377.799345] [IGT] kms_addfb_basic: exiting, ret=0
>[  377.848178] Console: switching to colour frame buffer device 240x67
>[  378.112949] Console: switching to colour dummy device 80x25
>[  378.113434] [IGT] kms_addfb_basic: executing
>[  378.138677] [drm:drm_mode_addfb2] [FB:60]
>[  378.152851] [IGT] kms_addfb_basic: starting subtest tile-pitch-mismatch
>[  378.153008] [drm:intel_framebuffer_init [i915]] pitch (2048) must match tiling stride (4096)
>[  378.153027] [drm:drm_internal_framebuffer_create] could not create framebuffer
>[  378.153390] [drm:drm_mode_addfb2] [FB:60]
>[  378.153616] [IGT] kms_addfb_basic: exiting, ret=0
>[  378.198016] Console: switching to colour frame buffer device 240x67
>[  378.393621] Console: switching to colour dummy device 80x25
>[  378.393931] [IGT] kms_addfb_basic: executing
>[  378.417646] [drm:drm_mode_addfb2] [FB:62]
>[  378.417978] [IGT] kms_addfb_basic: starting subtest too-high
>[  378.418113] [drm:intel_framebuffer_init [i915]] fb too big for bo (need 4198400 bytes, have 4194304 bytes)
>[  378.418212] [drm:drm_internal_framebuffer_create] could not create framebuffer
>[  378.418323] [drm:intel_framebuffer_init [i915]] fb too big for bo (need 4198400 bytes, have 4194304 bytes)
>[  378.418346] [drm:drm_internal_framebuffer_create] could not create framebuffer
>[  378.418442] [drm:intel_framebuffer_init [i915]] fb too big for bo (need 4198400 bytes, have 4194304 bytes)
>[  378.418463] [drm:drm_internal_framebuffer_create] could not create framebuffer
>[  378.432547] [drm:drm_mode_addfb2] [FB:62]
>[  378.432724] [IGT] kms_addfb_basic: exiting, ret=0
>[  378.481168] Console: switching to colour frame buffer device 240x67
>[  378.692190] Console: switching to colour dummy device 80x25
>[  378.692507] [IGT] kms_addfb_basic: executing
>[  378.710191] [drm:drm_mode_addfb2] [FB:60]
>[  378.710527] [IGT] kms_addfb_basic: starting subtest too-wide
>[  378.710577] [drm:drm_internal_framebuffer_create] bad pitch 4096 for plane 0
>[  378.710586] [drm:drm_internal_framebuffer_create] bad pitch 2048 for plane 0
>[  378.710595] [drm:drm_internal_framebuffer_create] bad pitch 2048 for plane 0
>[  378.724759] [drm:drm_mode_addfb2] [FB:60]
>[  378.724938] [IGT] kms_addfb_basic: exiting, ret=0
>[  378.781012] Console: switching to colour frame buffer device 240x67
>[  379.020222] Console: switching to colour dummy device 80x25
>[  379.020532] [IGT] kms_addfb_basic: executing
>[  379.045637] [drm:drm_mode_addfb2] [FB:62]
>[  379.045745] [IGT] kms_addfb_basic: starting subtest unused-handle
>[  379.045801] [drm:drm_internal_framebuffer_create] buffer object handle for unused plane 1
>[  379.060104] [drm:drm_mode_addfb2] [FB:62]
>[  379.060284] [IGT] kms_addfb_basic: exiting, ret=0
>[  379.114270] Console: switching to colour frame buffer device 240x67
>[  379.329745] Console: switching to colour dummy device 80x25
>[  379.329829] [IGT] kms_addfb_basic: executing
>[  379.351339] [drm:drm_mode_addfb2] [FB:60]
>[  379.351383] [IGT] kms_addfb_basic: starting subtest unused-modifier
>[  379.351406] [drm:drm_internal_framebuffer_create] non-zero modifier for unused plane 1
>[  379.357741] [drm:drm_mode_addfb2] [FB:60]
>[  379.357842] [IGT] kms_addfb_basic: exiting, ret=0
>[  379.414180] Console: switching to colour frame buffer device 240x67
>[  379.604561] Console: switching to colour dummy device 80x25
>[  379.604871] [IGT] kms_addfb_basic: executing
>[  379.629658] [drm:drm_mode_addfb2] [FB:62]
>[  379.629770] [IGT] kms_addfb_basic: starting subtest unused-offsets
>[  379.629828] [drm:drm_internal_framebuffer_create] non-zero offset for unused plane 1
>[  379.644286] [drm:drm_mode_addfb2] [FB:62]
>[  379.644467] [IGT] kms_addfb_basic: exiting, ret=0
>[  379.697420] Console: switching to colour frame buffer device 240x67
>[  379.932421] Console: switching to colour dummy device 80x25
>[  379.932562] [IGT] kms_addfb_basic: executing
>[  379.954651] [drm:drm_mode_addfb2] [FB:60]
>[  379.954760] [IGT] kms_addfb_basic: starting subtest unused-pitches
>[  379.954817] [drm:drm_internal_framebuffer_create] non-zero pitch for unused plane 1
>[  379.969024] [drm:drm_mode_addfb2] [FB:60]
>[  379.969338] [IGT] kms_addfb_basic: exiting, ret=0
>[  380.014129] Console: switching to colour frame buffer device 240x67
>[  380.213919] Console: switching to colour dummy device 80x25
>[  380.214366] [IGT] kms_busy: executing
>[  380.248208] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  380.248330] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  380.248469] [drm:intel_power_well_enable [i915]] enabling DC off
>[  380.248592] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  380.248687] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  380.248762] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  380.248832] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  380.248898] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  380.249073] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  380.249307] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000f
>[  380.250788] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  380.252096] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  380.252128] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] probed modes :
>[  380.252157] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  380.252927] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  380.252998] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  380.253071] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  380.253220] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  380.253313] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  380.253408] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  380.253496] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  380.253573] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  380.253658] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  380.253727] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  380.253805] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  380.253821] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  380.253896] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  380.253911] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  380.253993] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  380.254061] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  380.254194] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  380.254264] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  380.254342] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  380.254433] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  380.254500] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  380.254579] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] FB:61, fb = 1920x1080 format = XR24 little-endian (0x34325258)
>[  380.254648] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+1920+1080 dst 0x0+1920+1080
>[  380.254722] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  380.254787] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  380.254871] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  380.254961] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  380.255033] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  380.256514] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  380.464448] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  380.464736] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  380.480854] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  380.480997] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  380.481296] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000000
>[  380.532097] [drm:wait_panel_status [i915]] Wait complete
>[  380.532266] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  380.532330] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  380.532458] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  380.532636] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  380.532782] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  380.532891] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  380.532973] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  380.533048] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  380.533232] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  380.533325] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  380.533490] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  380.533609] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  380.533727] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  380.533810] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  380.533872] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  380.533944] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  380.534009] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  380.534073] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  380.534185] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  380.534259] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  380.534374] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  380.534445] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  380.984566] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  380.984663] [drm:wait_panel_status [i915]] Wait complete
>[  380.984768] [drm:edp_panel_on [i915]] Wait for panel power on
>[  380.984898] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  381.120924] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  381.121017] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  381.121098] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  381.121291] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  381.185541] [drm:wait_panel_status [i915]] Wait complete
>[  381.185617] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  381.185680] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  381.185800] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  381.185920] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  381.187472] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  381.187545] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  381.187610] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  381.187676] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  381.188902] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  381.188976] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  381.190287] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  381.190358] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  381.191974] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  381.192223] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  381.192301] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  381.192427] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  381.392506] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  381.392649] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  381.392811] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  381.392892] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  381.393264] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  381.393371] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  381.393513] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  381.409013] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  381.409104] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  381.409276] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  381.409364] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  381.410088] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  381.410241] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  381.410771] [drm:drm_dp_i2c_do_msg] native defer
>[  381.412876] [drm:drm_dp_i2c_do_msg] native defer
>[  381.414305] [drm:drm_dp_i2c_do_msg] native defer
>[  381.415742] [drm:drm_dp_i2c_do_msg] native defer
>[  381.417125] [drm:drm_dp_i2c_do_msg] native defer
>[  381.418237] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  381.418881] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  381.419456] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  381.419573] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  381.419592] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  381.420234] [IGT] kms_busy: starting subtest basic-flip-default-A
>[  381.426240] [drm:drm_mode_addfb2] [FB:63]
>[  381.579591] [drm:drm_mode_setcrtc] [CRTC:32:pipe A]
>[  381.579628] [drm:drm_mode_setcrtc] [CONNECTOR:48:eDP-1]
>[  381.608667] [drm:drm_mode_setcrtc] [CRTC:39:pipe B]
>[  381.608818] [drm:drm_mode_setcrtc] [CRTC:46:pipe C]
>[  381.612630] [drm:drm_mode_addfb2] [FB:60]
>[  382.260397] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  382.260860] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  382.261219] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  382.464435] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  382.464799] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  382.477282] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  382.477422] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  382.477553] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000000
>[  382.528393] [drm:wait_panel_status [i915]] Wait complete
>[  382.528536] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  382.528664] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  382.528782] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  382.528968] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  382.529094] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  382.529380] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  382.529478] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  382.529552] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  382.529633] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  382.529692] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  382.529771] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  382.529834] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  382.529905] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  382.529981] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  382.530069] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  382.530176] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  382.530267] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  382.530353] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  382.530437] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  382.531340] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  382.531430] [drm:intel_power_well_disable [i915]] disabling DC off
>[  382.531490] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  382.531543] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  382.531992] [drm:intel_power_well_disable [i915]] disabling always-on
>[  382.533417] [IGT] kms_busy: exiting, ret=0
>[  382.558599] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  382.558685] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  382.558761] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  382.558830] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  382.558896] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  382.558966] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  382.559035] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  382.559099] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  382.559200] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  382.559261] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  382.559319] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  382.559331] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  382.559389] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  382.559398] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  382.559457] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  382.559514] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  382.559570] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  382.559627] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  382.559682] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  382.559749] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  382.559805] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  382.559861] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  382.559915] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  382.559970] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  382.560036] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  382.560110] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  382.560202] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  382.560460] [drm:intel_power_well_enable [i915]] enabling always-on
>[  382.560536] [drm:intel_power_well_enable [i915]] enabling DC off
>[  382.560862] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  382.560968] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  382.561032] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  382.561095] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  382.561190] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  382.561250] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  382.561312] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  382.561381] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  382.561447] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  382.561510] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  382.561610] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  382.561683] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  382.561857] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  382.562009] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  382.984490] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 08000001 control 00000000
>[  382.986724] [drm:wait_panel_status [i915]] Wait complete
>[  382.986823] [drm:edp_panel_on [i915]] Wait for panel power on
>[  382.986949] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  383.122952] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  383.123030] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  383.123100] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  383.123234] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  383.188043] [drm:wait_panel_status [i915]] Wait complete
>[  383.188179] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  383.188239] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  383.188472] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  383.188600] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  383.190849] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  383.190920] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  383.190981] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  383.191044] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  383.192190] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  383.192254] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  383.193588] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  383.193654] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  383.194530] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  383.194563] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  383.194585] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  383.194667] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  383.392289] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  383.392377] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  383.392548] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  383.392634] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  383.394729] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  383.394808] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  383.394936] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  383.395389] Console: switching to colour frame buffer device 240x67
>[  383.663668] Console: switching to colour dummy device 80x25
>[  383.663979] [IGT] kms_busy: executing
>[  383.696723] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  383.696815] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  383.696894] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  383.696969] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  383.697038] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  383.697104] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  383.697854] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  383.699021] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  383.699041] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] probed modes :
>[  383.699053] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  383.699647] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  383.699719] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  383.699773] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  383.699848] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  383.700532] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  383.700613] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  383.701170] [drm:drm_dp_i2c_do_msg] native defer
>[  383.702707] [drm:drm_dp_i2c_do_msg] native defer
>[  383.704120] [drm:drm_dp_i2c_do_msg] native defer
>[  383.705685] [drm:drm_dp_i2c_do_msg] native defer
>[  383.707153] [drm:drm_dp_i2c_do_msg] native defer
>[  383.708280] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  383.708926] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  383.709469] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  383.709548] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  383.709566] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  383.710428] [IGT] kms_busy: starting subtest basic-flip-default-B
>[  383.723651] [drm:drm_mode_addfb2] [FB:62]
>[  383.770627] [drm:drm_mode_setcrtc] [CRTC:32:pipe A]
>[  383.770695] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  383.770768] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  383.976264] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  383.976414] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  383.979025] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  383.979274] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  383.979415] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000000
>[  384.030100] [drm:wait_panel_status [i915]] Wait complete
>[  384.030231] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  384.030295] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  384.030385] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  384.030468] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  384.030546] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  384.030695] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  384.030773] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  384.030840] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  384.030906] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  384.030970] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  384.031038] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  384.031180] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  384.031261] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  384.031337] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  384.031424] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  384.031500] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  384.031570] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  384.031678] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  384.031760] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  384.031911] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  384.031987] [drm:intel_power_well_disable [i915]] disabling DC off
>[  384.032050] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  384.032152] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  384.032614] [drm:intel_power_well_disable [i915]] disabling always-on
>[  384.033718] [drm:drm_mode_setcrtc] [CRTC:39:pipe B]
>[  384.033789] [drm:drm_mode_setcrtc] [CONNECTOR:48:eDP-1]
>[  384.033970] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  384.034041] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  384.034118] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  384.034248] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  384.034327] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  384.034408] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  384.034484] [drm:intel_dump_pipe_config [i915]] [CRTC:39:pipe B][modeset]
>[  384.034556] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  384.034627] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  384.034693] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  384.034760] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  384.034776] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  384.034838] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  384.034855] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  384.034922] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  384.034983] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  384.035044] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  384.035101] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  384.035197] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  384.035271] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  384.035336] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  384.035402] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 1B] disabled, scaler_id = -1
>[  384.035467] [drm:intel_dump_pipe_config [i915]] [PLANE:35:plane 2B] disabled, scaler_id = -1
>[  384.035529] [drm:intel_dump_pipe_config [i915]] [PLANE:37:cursor B] disabled, scaler_id = -1
>[  384.035601] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  384.035682] [drm:intel_find_shared_dpll [i915]] [CRTC:39:pipe B] allocated DPLL 0
>[  384.035767] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe B
>[  384.036167] [drm:intel_power_well_enable [i915]] enabling always-on
>[  384.036186] [drm:intel_power_well_enable [i915]] enabling DC off
>[  384.036453] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  384.036478] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  384.036497] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  384.036544] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  384.036570] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  384.036592] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  384.036612] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  384.036631] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  384.036652] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  384.036674] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  384.036695] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  384.036715] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  384.036740] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 2, on? 0) for crtc 39
>[  384.036761] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  384.036828] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  384.036857] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  384.488434] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  384.488532] [drm:wait_panel_status [i915]] Wait complete
>[  384.488635] [drm:edp_panel_on [i915]] Wait for panel power on
>[  384.488763] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  384.624766] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  384.624860] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  384.624942] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  384.625185] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  384.690732] [drm:wait_panel_status [i915]] Wait complete
>[  384.690809] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  384.690871] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  384.690990] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  384.691110] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  384.692777] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  384.692848] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  384.692913] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  384.692978] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  384.693967] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  384.694036] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  384.695432] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  384.695500] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  384.696319] [drm:intel_enable_pipe [i915]] enabling pipe B
>[  384.696378] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  384.696400] [drm:intel_panel_enable_backlight [i915]] pipe B
>[  384.696475] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  384.896359] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  384.896449] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  384.913304] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  384.913397] [drm:intel_atomic_commit_tail [i915]] [CRTC:39:pipe B]
>[  384.913528] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  384.929912] [drm:drm_mode_setcrtc] [CRTC:46:pipe C]
>[  384.943303] [drm:drm_mode_addfb2] [FB:63]
>[  385.614559] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  385.614992] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  385.615271] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  385.824378] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  385.824512] [drm:intel_disable_pipe [i915]] disabling pipe B
>[  385.831568] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  385.831669] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  385.831792] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000000
>[  385.882572] [drm:wait_panel_status [i915]] Wait complete
>[  385.882642] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  385.882705] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  385.882800] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 2, on? 1) for crtc 39
>[  385.882881] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  385.883002] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  385.883078] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  385.883221] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  385.883295] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  385.883363] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  385.883434] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  385.883515] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  385.883607] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  385.883702] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  385.883794] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  385.883939] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  385.884036] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  385.884127] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  385.884290] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  385.884338] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  385.884578] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  385.884730] [drm:intel_atomic_commit_tail [i915]] [CRTC:39:pipe B]
>[  385.884799] [drm:intel_power_well_disable [i915]] disabling DC off
>[  385.884857] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  385.884909] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  385.885882] [drm:intel_power_well_disable [i915]] disabling always-on
>[  385.887518] [IGT] kms_busy: exiting, ret=0
>[  385.910751] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  385.910775] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  385.910799] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  385.910822] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  385.910844] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  385.910866] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  385.910887] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  385.910908] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  385.910929] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  385.910948] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  385.910967] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  385.910971] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  385.910990] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  385.910993] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  385.911012] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  385.911030] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  385.911048] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  385.911066] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  385.911099] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  385.911121] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  385.911139] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  385.911158] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  385.911176] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  385.911194] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  385.911215] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  385.911240] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  385.911261] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  385.911332] [drm:intel_power_well_enable [i915]] enabling always-on
>[  385.911349] [drm:intel_power_well_enable [i915]] enabling DC off
>[  385.911617] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  385.911652] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  385.911673] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  385.911693] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  385.911713] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  385.911732] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  385.911752] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  385.911775] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  385.911796] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  385.911816] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  385.911840] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  385.911861] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  385.911904] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  385.911932] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  386.336462] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  386.336556] [drm:wait_panel_status [i915]] Wait complete
>[  386.336655] [drm:edp_panel_on [i915]] Wait for panel power on
>[  386.336782] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  386.472759] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  386.472838] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  386.472908] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  386.473043] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  386.537267] [drm:wait_panel_status [i915]] Wait complete
>[  386.537340] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  386.537399] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  386.537522] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  386.537639] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  386.539219] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  386.539288] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  386.539352] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  386.539417] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  386.540503] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  386.540567] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  386.541904] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  386.541973] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  386.543223] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  386.543273] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  386.543294] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  386.543368] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  386.744367] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  386.744443] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  386.744538] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  386.744606] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  386.760208] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  386.760299] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  386.760438] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  386.760862] Console: switching to colour frame buffer device 240x67
>[  386.926643] Console: switching to colour dummy device 80x25
>[  386.926958] [IGT] kms_busy: executing
>[  386.960154] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  386.960244] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  386.960326] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  386.960399] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  386.960467] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  386.960533] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  386.961305] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  386.962526] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  386.962548] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] probed modes :
>[  386.962560] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  386.963182] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  386.963262] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  386.963321] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  386.963401] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  386.963997] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  386.964073] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  386.964648] [drm:drm_dp_i2c_do_msg] native defer
>[  386.966051] [drm:drm_dp_i2c_do_msg] native defer
>[  386.967692] [drm:drm_dp_i2c_do_msg] native defer
>[  386.969117] [drm:drm_dp_i2c_do_msg] native defer
>[  386.970665] [drm:drm_dp_i2c_do_msg] native defer
>[  386.971686] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  386.972384] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  386.972906] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  386.972985] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  386.973004] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  386.974231] [IGT] kms_busy: starting subtest basic-flip-default-C
>[  386.987368] [drm:drm_mode_addfb2] [FB:60]
>[  387.035102] [drm:drm_mode_setcrtc] [CRTC:32:pipe A]
>[  387.035178] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  387.035250] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  387.240333] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  387.240433] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  387.245112] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  387.245232] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  387.245342] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000000
>[  387.295959] [drm:wait_panel_status [i915]] Wait complete
>[  387.296030] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  387.296094] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  387.296271] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  387.296370] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  387.296475] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  387.296659] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  387.296749] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  387.296815] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  387.296877] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  387.296939] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  387.297003] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  387.297074] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  387.297195] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  387.297265] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  387.297330] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  387.297447] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  387.297528] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  387.297625] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  387.297698] [drm:intel_power_well_disable [i915]] disabling DC off
>[  387.297778] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  387.297828] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  387.297879] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  387.297986] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  387.298435] [drm:intel_power_well_disable [i915]] disabling always-on
>[  387.299956] [drm:drm_mode_setcrtc] [CRTC:39:pipe B]
>[  387.301496] [drm:drm_mode_setcrtc] [CRTC:46:pipe C]
>[  387.301567] [drm:drm_mode_setcrtc] [CONNECTOR:48:eDP-1]
>[  387.301749] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  387.301821] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  387.301895] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  387.301964] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  387.302028] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  387.302095] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  387.302221] [drm:intel_dump_pipe_config [i915]] [CRTC:46:pipe C][modeset]
>[  387.302293] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  387.302360] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  387.302423] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  387.302485] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  387.302504] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  387.302561] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  387.302575] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  387.302644] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  387.302734] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  387.302819] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1
>[  387.302905] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  387.302989] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  387.303084] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  387.303250] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  387.303320] [drm:intel_dump_pipe_config [i915]] [PLANE:40:plane 1C] disabled, scaler_id = -1
>[  387.303382] [drm:intel_dump_pipe_config [i915]] [PLANE:42:plane 2C] disabled, scaler_id = -1
>[  387.303446] [drm:intel_dump_pipe_config [i915]] [PLANE:44:cursor C] disabled, scaler_id = -1
>[  387.303541] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  387.303643] [drm:intel_find_shared_dpll [i915]] [CRTC:46:pipe C] allocated DPLL 0
>[  387.303737] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe C
>[  387.304966] [drm:intel_power_well_enable [i915]] enabling always-on
>[  387.305019] [drm:intel_power_well_enable [i915]] enabling DC off
>[  387.305380] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  387.305864] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  387.305949] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  387.306246] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  387.306324] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  387.306398] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  387.306486] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  387.306578] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  387.306665] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  387.306735] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  387.306801] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  387.306865] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  387.306940] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 4, on? 0) for crtc 46
>[  387.307007] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  387.307167] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  387.307249] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  387.752484] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  387.752582] [drm:wait_panel_status [i915]] Wait complete
>[  387.752683] [drm:edp_panel_on [i915]] Wait for panel power on
>[  387.752812] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  387.888709] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  387.888792] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  387.888865] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  387.889047] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  387.954720] [drm:wait_panel_status [i915]] Wait complete
>[  387.954819] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  387.954889] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  387.955021] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  387.955267] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  387.956895] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  387.956968] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  387.957034] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  387.957100] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  387.958284] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  387.958359] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  387.959772] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  387.959850] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  387.961592] [drm:intel_enable_pipe [i915]] enabling pipe C
>[  387.961714] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  387.961782] [drm:intel_panel_enable_backlight [i915]] pipe C
>[  387.961904] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  388.160360] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  388.160451] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  388.161887] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  388.161991] [drm:intel_atomic_commit_tail [i915]] [CRTC:46:pipe C]
>[  388.162221] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  388.186353] [drm:drm_mode_addfb2] [FB:63]
>[  388.846492] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  388.846926] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  388.847194] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  389.056373] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  389.056521] [drm:intel_disable_pipe [i915]] disabling pipe C
>[  389.063596] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  389.063702] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  389.063834] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000000
>[  389.114034] [drm:wait_panel_status [i915]] Wait complete
>[  389.114245] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  389.114349] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  389.114486] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 4, on? 1) for crtc 46
>[  389.114602] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  389.114788] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  389.114898] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  389.114980] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  389.115070] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  389.115216] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  389.115318] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  389.115424] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  389.115525] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  389.115628] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  389.115726] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  389.115859] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  389.115961] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  389.116048] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  389.116130] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  389.116302] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  389.116359] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  389.116487] [drm:intel_atomic_commit_tail [i915]] [CRTC:46:pipe C]
>[  389.116573] [drm:intel_power_well_disable [i915]] disabling DC off
>[  389.116654] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  389.116728] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  389.117265] [drm:intel_power_well_disable [i915]] disabling always-on
>[  389.118522] [IGT] kms_busy: exiting, ret=0
>[  389.138750] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  389.138782] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  389.138814] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  389.138845] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  389.138872] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  389.138902] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  389.138931] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  389.138959] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  389.138987] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  389.139013] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  389.139038] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  389.139043] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  389.139068] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  389.139095] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  389.139122] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  389.139147] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  389.139172] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  389.139196] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  389.139221] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  389.139249] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  389.139274] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  389.139298] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  389.139322] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  389.139346] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  389.139374] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  389.139406] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  389.139435] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  389.139521] [drm:intel_power_well_enable [i915]] enabling always-on
>[  389.139543] [drm:intel_power_well_enable [i915]] enabling DC off
>[  389.139816] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  389.139861] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  389.139889] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  389.139915] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  389.139941] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  389.139966] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  389.139993] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  389.140023] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  389.140051] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  389.140093] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  389.140126] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  389.140154] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  389.140208] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  389.140244] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  389.568467] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  389.568561] [drm:wait_panel_status [i915]] Wait complete
>[  389.568662] [drm:edp_panel_on [i915]] Wait for panel power on
>[  389.568791] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  389.704757] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  389.704834] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  389.704902] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  389.705035] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  389.769251] [drm:wait_panel_status [i915]] Wait complete
>[  389.769324] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  389.769385] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  389.769509] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  389.769625] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  389.771198] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  389.771262] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  389.771323] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  389.771385] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  389.772447] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  389.772509] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  389.773838] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  389.773904] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  389.775187] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  389.775236] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  389.775258] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  389.775331] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  389.976346] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  389.976433] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  389.976539] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  389.976614] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  389.992230] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  389.992322] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  389.992460] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  389.992891] Console: switching to colour frame buffer device 240x67
>[  390.208638] Console: switching to colour dummy device 80x25
>[  390.208952] [IGT] kms_cursor_legacy: executing
>[  390.241858] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  390.241947] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  390.242023] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  390.242094] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  390.242250] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  390.242350] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  390.243085] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  390.244281] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  390.244305] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] probed modes :
>[  390.244316] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  390.244843] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  390.244933] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  390.244988] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  390.245066] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  390.245741] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  390.245818] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  390.246327] [drm:drm_dp_i2c_do_msg] native defer
>[  390.247879] [drm:drm_dp_i2c_do_msg] native defer
>[  390.249293] [drm:drm_dp_i2c_do_msg] native defer
>[  390.250786] [drm:drm_dp_i2c_do_msg] native defer
>[  390.252203] [drm:drm_dp_i2c_do_msg] native defer
>[  390.253250] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  390.253904] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  390.254568] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  390.254648] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  390.254668] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  390.255412] [IGT] kms_cursor_legacy: starting subtest basic-busy-flip-before-cursor-atomic
>[  390.256022] [drm:drm_mode_addfb2] [FB:62]
>[  390.307990] [drm:drm_mode_addfb2] [FB:64]
>[  391.176398] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  391.176847] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  391.177099] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  391.384331] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  391.384479] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  391.393728] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  391.393836] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  391.393966] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000000
>[  391.444736] [drm:wait_panel_status [i915]] Wait complete
>[  391.444807] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  391.444871] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  391.444959] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  391.445039] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  391.445220] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  391.445354] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  391.445433] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  391.445502] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  391.445573] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  391.445638] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  391.445709] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  391.445783] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  391.445851] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  391.445919] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  391.445986] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  391.446071] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  391.446142] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  391.446210] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  391.446346] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  391.446508] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  391.446592] [drm:intel_power_well_disable [i915]] disabling DC off
>[  391.446651] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  391.446704] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  391.447238] [drm:intel_power_well_disable [i915]] disabling always-on
>[  391.448705] [IGT] kms_cursor_legacy: exiting, ret=0
>[  391.470855] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  391.470892] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  391.470930] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  391.470965] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  391.470998] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  391.471032] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  391.471066] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  391.471131] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  391.471163] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  391.471193] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  391.471222] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  391.471228] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  391.471257] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  391.471262] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  391.471291] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  391.471320] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  391.471348] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  391.471376] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  391.471402] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  391.471435] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  391.471463] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  391.471491] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  391.471518] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  391.471546] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  391.471579] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  391.471616] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  391.471649] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  391.471770] [drm:intel_power_well_enable [i915]] enabling always-on
>[  391.471801] [drm:intel_power_well_enable [i915]] enabling DC off
>[  391.472103] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  391.472167] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  391.472206] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  391.472242] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  391.472277] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  391.472312] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  391.472350] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  391.472391] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  391.472430] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  391.472468] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  391.472513] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  391.472551] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  391.472626] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  391.472672] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  391.896441] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  391.896526] [drm:wait_panel_status [i915]] Wait complete
>[  391.896617] [drm:edp_panel_on [i915]] Wait for panel power on
>[  391.896736] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  392.032723] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  392.032800] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  392.032871] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  392.033002] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  392.097269] [drm:wait_panel_status [i915]] Wait complete
>[  392.097342] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  392.097401] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  392.097525] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  392.097642] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  392.099221] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  392.099292] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  392.099354] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  392.099418] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  392.100505] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  392.100568] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  392.101898] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  392.101967] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  392.103207] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  392.103267] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  392.103289] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  392.103363] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  392.304327] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  392.304403] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  392.304497] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  392.304563] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  392.320205] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  392.320296] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  392.320434] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  392.320864] Console: switching to colour frame buffer device 240x67
>[  392.497810] Console: switching to colour dummy device 80x25
>[  392.498237] [IGT] kms_cursor_legacy: executing
>[  392.531768] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  392.531889] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  392.531971] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  392.532046] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  392.532203] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  392.532282] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  392.532988] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  392.534164] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  392.534185] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] probed modes :
>[  392.534197] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  392.534644] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  392.534718] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  392.534773] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  392.534849] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  392.535521] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  392.535603] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  392.536176] [drm:drm_dp_i2c_do_msg] native defer
>[  392.537696] [drm:drm_dp_i2c_do_msg] native defer
>[  392.539140] [drm:drm_dp_i2c_do_msg] native defer
>[  392.540680] [drm:drm_dp_i2c_do_msg] native defer
>[  392.542123] [drm:drm_dp_i2c_do_msg] native defer
>[  392.543224] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  392.543866] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  392.544444] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  392.544522] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  392.544541] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  392.545249] [IGT] kms_cursor_legacy: starting subtest basic-busy-flip-before-cursor-legacy
>[  392.545933] [drm:drm_mode_addfb2] [FB:60]
>[  392.605510] [drm:drm_mode_addfb2] [FB:64]
>[  393.470806] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  393.471041] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  393.680410] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  393.680558] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  393.687574] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  393.687680] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  393.687811] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000000
>[  393.738739] [drm:wait_panel_status [i915]] Wait complete
>[  393.738810] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  393.738874] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  393.738964] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  393.739046] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  393.739327] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  393.739458] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  393.739536] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  393.739606] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  393.739674] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  393.739737] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  393.739804] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  393.739891] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  393.739959] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  393.740025] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  393.740189] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  393.740255] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  393.740333] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  393.740413] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  393.740491] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  393.740649] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  393.740722] [drm:intel_power_well_disable [i915]] disabling DC off
>[  393.740780] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  393.740832] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  393.741381] [drm:intel_power_well_disable [i915]] disabling always-on
>[  393.742326] [IGT] kms_cursor_legacy: exiting, ret=0
>[  393.764190] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  393.764235] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  393.764282] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  393.764325] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  393.764363] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  393.764404] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  393.764445] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  393.764483] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  393.764521] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  393.764556] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  393.764590] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  393.764597] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  393.764632] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  393.764637] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  393.764672] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  393.764706] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  393.764740] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  393.764773] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  393.764805] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  393.764845] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  393.764878] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  393.764912] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  393.764946] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  393.764980] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  393.765019] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  393.765063] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  393.765124] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  393.765253] [drm:intel_power_well_enable [i915]] enabling always-on
>[  393.765284] [drm:intel_power_well_enable [i915]] enabling DC off
>[  393.765565] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  393.765628] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  393.765666] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  393.765702] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  393.765738] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  393.765773] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  393.765811] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  393.765852] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  393.765891] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  393.765929] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  393.765974] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  393.766013] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  393.766099] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  393.766181] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  394.192468] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 08000001 control 00000000
>[  394.197006] [drm:wait_panel_status [i915]] Wait complete
>[  394.197114] [drm:edp_panel_on [i915]] Wait for panel power on
>[  394.197298] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  394.333205] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  394.333282] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  394.333352] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  394.333483] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  394.397682] [drm:wait_panel_status [i915]] Wait complete
>[  394.397755] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  394.397815] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  394.397937] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  394.398053] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  394.399738] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  394.399808] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  394.399871] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  394.399936] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  394.400967] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  394.401031] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  394.402431] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  394.402499] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  394.404008] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  394.404042] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  394.404063] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  394.404148] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  394.600259] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  394.600322] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  394.600406] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  394.600466] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  394.604236] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  394.604315] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  394.604443] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  394.604867] Console: switching to colour frame buffer device 240x67
>[  394.806126] Console: switching to colour dummy device 80x25
>[  394.806272] [IGT] kms_cursor_legacy: executing
>[  394.835829] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  394.835921] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  394.836001] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  394.836073] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  394.836232] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  394.836315] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  394.837026] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  394.838227] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  394.838247] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] probed modes :
>[  394.838258] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  394.838721] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  394.838793] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  394.838849] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  394.838919] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  394.839557] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  394.839639] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  394.840184] [drm:drm_dp_i2c_do_msg] native defer
>[  394.841688] [drm:drm_dp_i2c_do_msg] native defer
>[  394.843119] [drm:drm_dp_i2c_do_msg] native defer
>[  394.844677] [drm:drm_dp_i2c_do_msg] native defer
>[  394.846098] [drm:drm_dp_i2c_do_msg] native defer
>[  394.847107] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  394.847812] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  394.848383] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  394.848461] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  394.848480] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  394.849192] [IGT] kms_cursor_legacy: starting subtest basic-flip-after-cursor-atomic
>[  394.849901] [drm:drm_mode_addfb2] [FB:62]
>[  394.903029] [drm:drm_mode_addfb2] [FB:64]
>[  395.771776] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  395.772022] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  395.976322] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  395.976471] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  395.987828] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  395.987937] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  395.988067] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000000
>[  396.038862] [drm:wait_panel_status [i915]] Wait complete
>[  396.038939] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  396.039011] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  396.039109] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  396.039324] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  396.039417] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  396.039565] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  396.039653] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  396.039735] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  396.039812] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  396.039885] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  396.039961] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  396.040044] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  396.040185] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  396.040273] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  396.040355] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  396.040473] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  396.040591] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  396.040670] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  396.040763] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  396.040880] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  396.040958] [drm:intel_power_well_disable [i915]] disabling DC off
>[  396.041021] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  396.041077] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  396.041571] [drm:intel_power_well_disable [i915]] disabling always-on
>[  396.042159] [IGT] kms_cursor_legacy: exiting, ret=0
>[  396.063940] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  396.063985] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  396.064032] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  396.064074] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  396.064143] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  396.064186] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  396.064227] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  396.064267] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  396.064305] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  396.064342] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  396.064378] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  396.064385] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  396.064419] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  396.064424] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  396.064461] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  396.064495] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  396.064529] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  396.064562] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  396.064596] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  396.064636] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  396.064670] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  396.064705] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  396.064738] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  396.064771] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  396.064812] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  396.064857] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  396.064895] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  396.065024] [drm:intel_power_well_enable [i915]] enabling always-on
>[  396.065055] [drm:intel_power_well_enable [i915]] enabling DC off
>[  396.065357] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  396.065421] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  396.065461] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  396.065497] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  396.065533] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  396.065569] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  396.065606] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  396.065648] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  396.065687] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  396.065725] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  396.065770] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  396.065809] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  396.065885] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  396.065932] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  396.496464] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 08000001 control 00000000
>[  396.498795] [drm:wait_panel_status [i915]] Wait complete
>[  396.498894] [drm:edp_panel_on [i915]] Wait for panel power on
>[  396.499018] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  396.634989] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  396.635067] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  396.635137] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  396.635276] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  396.700209] [drm:wait_panel_status [i915]] Wait complete
>[  396.700282] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  396.700342] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  396.700467] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  396.700586] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  396.702113] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  396.702210] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  396.702271] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  396.702333] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  396.703370] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  396.703433] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  396.704762] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  396.704829] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  396.706166] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  396.706222] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  396.706244] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  396.706317] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  396.904255] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  396.904318] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  396.904402] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  396.904463] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  396.906385] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  396.906463] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  396.906591] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  396.907009] Console: switching to colour frame buffer device 240x67
>[  397.132016] Console: switching to colour dummy device 80x25
>[  397.132485] [IGT] kms_cursor_legacy: executing
>[  397.165901] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  397.165987] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  397.166065] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  397.166204] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  397.166281] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  397.166350] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  397.167035] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  397.168216] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  397.168237] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] probed modes :
>[  397.168248] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  397.168787] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  397.168861] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  397.168916] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  397.168986] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  397.169658] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  397.169735] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  397.170246] [drm:drm_dp_i2c_do_msg] native defer
>[  397.171733] [drm:drm_dp_i2c_do_msg] native defer
>[  397.173196] [drm:drm_dp_i2c_do_msg] native defer
>[  397.174695] [drm:drm_dp_i2c_do_msg] native defer
>[  397.176113] [drm:drm_dp_i2c_do_msg] native defer
>[  397.177213] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  397.177862] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  397.178440] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  397.178519] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  397.178537] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  397.179172] [IGT] kms_cursor_legacy: starting subtest basic-flip-after-cursor-legacy
>[  397.179846] [drm:drm_mode_addfb2] [FB:60]
>[  397.229340] [drm:drm_mode_addfb2] [FB:64]
>[  398.090999] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  398.091582] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  398.091811] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  398.296276] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  398.296405] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  398.307450] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  398.307546] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  398.307668] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000000
>[  398.358517] [drm:wait_panel_status [i915]] Wait complete
>[  398.358587] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  398.358651] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  398.358741] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  398.358824] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  398.358900] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  398.359022] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  398.359098] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  398.359268] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  398.359345] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  398.359422] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  398.359499] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  398.359578] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  398.359653] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  398.359725] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  398.359811] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  398.359889] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  398.359958] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  398.360056] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  398.360160] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  398.360303] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  398.360376] [drm:intel_power_well_disable [i915]] disabling DC off
>[  398.360434] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  398.360486] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  398.360933] [drm:intel_power_well_disable [i915]] disabling always-on
>[  398.361516] [IGT] kms_cursor_legacy: exiting, ret=0
>[  398.383655] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  398.383683] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  398.383713] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  398.383739] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  398.383764] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  398.383789] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  398.383815] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  398.383839] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  398.383863] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  398.383885] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  398.383907] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  398.383912] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  398.383934] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  398.383937] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  398.383960] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  398.383982] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  398.384003] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  398.384024] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  398.384044] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  398.384069] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  398.384114] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  398.384136] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  398.384156] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  398.384177] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  398.384202] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  398.384230] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  398.384255] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  398.384331] [drm:intel_power_well_enable [i915]] enabling always-on
>[  398.384350] [drm:intel_power_well_enable [i915]] enabling DC off
>[  398.384610] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  398.384650] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  398.384674] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  398.384696] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  398.384718] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  398.384740] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  398.384763] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  398.384789] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  398.384813] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  398.384837] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  398.384865] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  398.384889] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  398.384937] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  398.384969] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  398.816468] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  398.816563] [drm:wait_panel_status [i915]] Wait complete
>[  398.816661] [drm:edp_panel_on [i915]] Wait for panel power on
>[  398.816789] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  398.952750] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  398.952828] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  398.952898] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  398.953033] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  399.018093] [drm:wait_panel_status [i915]] Wait complete
>[  399.018234] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  399.018299] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  399.018422] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  399.018539] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  399.020110] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  399.020225] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  399.020290] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  399.020353] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  399.021464] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  399.021528] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  399.022858] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  399.022926] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  399.024181] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  399.024226] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  399.024247] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  399.024321] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  399.224257] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  399.224320] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  399.224403] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  399.224463] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  399.241050] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  399.241174] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  399.241302] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  399.241722] Console: switching to colour frame buffer device 240x67
>[  399.425531] Console: switching to colour dummy device 80x25
>[  399.425852] [IGT] kms_cursor_legacy: executing
>[  399.458642] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  399.458763] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  399.458845] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  399.458918] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  399.458988] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  399.459054] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  399.459806] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  399.460986] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  399.461006] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] probed modes :
>[  399.461017] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  399.461603] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  399.461676] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  399.461731] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  399.461804] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  399.462445] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  399.462521] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  399.463023] [drm:drm_dp_i2c_do_msg] native defer
>[  399.464434] [drm:drm_dp_i2c_do_msg] native defer
>[  399.465961] [drm:drm_dp_i2c_do_msg] native defer
>[  399.467384] [drm:drm_dp_i2c_do_msg] native defer
>[  399.468908] [drm:drm_dp_i2c_do_msg] native defer
>[  399.469889] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  399.470628] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  399.471276] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  399.471357] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  399.471377] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  399.471980] [IGT] kms_cursor_legacy: starting subtest basic-flip-after-cursor-varying-size
>[  399.472729] [drm:drm_mode_addfb2] [FB:62]
>[  399.534595] [drm:drm_mode_addfb2] [FB:64]
>[  399.534690] [drm:drm_mode_addfb2] [FB:65]
>[  400.392435] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  400.392915] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  400.393285] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  400.600331] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  400.600480] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  400.607575] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  400.607682] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  400.607812] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000000
>[  400.658624] [drm:wait_panel_status [i915]] Wait complete
>[  400.658693] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  400.658757] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  400.658849] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  400.658931] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  400.659010] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  400.659234] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  400.659315] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  400.659393] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  400.659464] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  400.659534] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  400.659607] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  400.659684] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  400.659753] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  400.659824] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  400.659890] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  400.659975] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  400.660046] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  400.660115] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  400.660283] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  400.660356] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  400.660446] [drm:intel_power_well_disable [i915]] disabling DC off
>[  400.660533] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  400.660599] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  400.661083] [drm:intel_power_well_disable [i915]] disabling always-on
>[  400.662021] [IGT] kms_cursor_legacy: exiting, ret=0
>[  400.689658] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  400.689685] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  400.689715] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  400.689742] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  400.689766] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  400.689792] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  400.689817] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  400.689841] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  400.689865] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  400.689888] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  400.689909] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  400.689914] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  400.689936] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  400.689940] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  400.689962] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  400.689984] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  400.690006] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  400.690026] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  400.690047] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  400.690072] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  400.690125] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  400.690147] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  400.690168] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  400.690189] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  400.690214] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  400.690242] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  400.690267] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  400.690352] [drm:intel_power_well_enable [i915]] enabling always-on
>[  400.690372] [drm:intel_power_well_enable [i915]] enabling DC off
>[  400.690632] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  400.690673] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  400.690697] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  400.690719] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  400.690741] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  400.690763] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  400.690786] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  400.690812] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  400.690837] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  400.690860] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  400.690889] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  400.690912] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  400.690962] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  400.690993] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  401.112412] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 08000001 control 00000000
>[  401.116948] [drm:wait_panel_status [i915]] Wait complete
>[  401.117049] [drm:edp_panel_on [i915]] Wait for panel power on
>[  401.117225] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  401.253130] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  401.253209] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  401.253279] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  401.253419] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  401.318402] [drm:wait_panel_status [i915]] Wait complete
>[  401.318475] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  401.318535] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  401.318659] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  401.318775] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  401.320416] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  401.320482] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  401.320542] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  401.320604] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  401.321636] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  401.321699] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  401.323031] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  401.323099] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  401.324270] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  401.324308] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  401.324330] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  401.324403] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  401.520405] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  401.520482] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  401.520577] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  401.520645] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  401.524574] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  401.524665] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  401.524802] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  401.525286] Console: switching to colour frame buffer device 240x67
>[  401.710746] Console: switching to colour dummy device 80x25
>[  401.711143] [IGT] kms_cursor_legacy: executing
>[  401.737247] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  401.737341] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  401.737423] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  401.737498] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  401.737568] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  401.737635] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  401.738383] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  401.739542] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  401.739565] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] probed modes :
>[  401.739576] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  401.740198] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  401.740276] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  401.740338] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  401.740416] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  401.741006] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  401.741082] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  401.741648] [drm:drm_dp_i2c_do_msg] native defer
>[  401.743022] [drm:drm_dp_i2c_do_msg] native defer
>[  401.744479] [drm:drm_dp_i2c_do_msg] native defer
>[  401.746000] [drm:drm_dp_i2c_do_msg] native defer
>[  401.747482] [drm:drm_dp_i2c_do_msg] native defer
>[  401.748576] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  401.749264] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  401.749781] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  401.749859] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  401.749878] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  401.750670] [IGT] kms_cursor_legacy: starting subtest basic-flip-before-cursor-atomic
>[  401.751312] [drm:drm_mode_addfb2] [FB:60]
>[  401.807091] [drm:drm_mode_addfb2] [FB:64]
>[  402.675729] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  402.676265] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  402.676514] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  402.880478] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  402.880625] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  402.891809] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  402.891908] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  402.892031] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000000
>[  402.943101] [drm:wait_panel_status [i915]] Wait complete
>[  402.943249] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  402.943321] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  402.943419] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  402.943512] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  402.943598] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  402.943733] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  402.943818] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  402.943893] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  402.943967] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  402.944038] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  402.944130] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  402.944211] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  402.944287] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  402.944486] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  402.944577] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  402.944672] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  402.944756] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  402.944835] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  402.944911] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  402.945046] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  402.945179] [drm:intel_power_well_disable [i915]] disabling DC off
>[  402.945260] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  402.945325] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  402.945799] [drm:intel_power_well_disable [i915]] disabling always-on
>[  402.946349] [IGT] kms_cursor_legacy: exiting, ret=0
>[  402.969053] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  402.969180] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  402.969227] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  402.969270] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  402.969309] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  402.969352] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  402.969393] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  402.969431] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  402.969470] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  402.969506] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  402.969542] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  402.969549] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  402.969584] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  402.969589] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  402.969625] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  402.969659] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  402.969693] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  402.969726] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  402.969759] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  402.969800] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  402.969833] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  402.969867] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  402.969900] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  402.969933] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  402.969973] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  402.970018] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  402.970057] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  402.970199] [drm:intel_power_well_enable [i915]] enabling always-on
>[  402.970231] [drm:intel_power_well_enable [i915]] enabling DC off
>[  402.970502] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  402.970565] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  402.970604] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  402.970641] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  402.970678] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  402.970713] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  402.970750] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  402.970792] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  402.970831] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  402.970869] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  402.970915] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  402.970954] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  402.971029] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  402.971076] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  403.400470] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 08000001 control 00000000
>[  403.418260] [drm:wait_panel_status [i915]] Wait complete
>[  403.418360] [drm:edp_panel_on [i915]] Wait for panel power on
>[  403.418484] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  403.554450] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  403.554529] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  403.554599] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  403.554737] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  403.618938] [drm:wait_panel_status [i915]] Wait complete
>[  403.619013] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  403.619073] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  403.619268] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  403.619386] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  403.620974] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  403.621043] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  403.621105] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  403.621205] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  403.622249] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  403.622312] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  403.623689] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  403.623756] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  403.625125] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  403.625179] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  403.625201] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  403.625274] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  403.824265] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  403.824328] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  403.824412] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  403.824473] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  403.825342] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  403.825423] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  403.825551] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  403.825972] Console: switching to colour frame buffer device 240x67
>[  403.998325] Console: switching to colour dummy device 80x25
>[  403.998507] [IGT] kms_cursor_legacy: executing
>[  404.019346] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  404.019439] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  404.019529] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  404.019604] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  404.019675] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  404.019743] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  404.020537] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  404.021764] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  404.021784] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] probed modes :
>[  404.021795] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  404.022384] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  404.022459] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  404.022516] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  404.022587] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  404.023247] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  404.023322] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  404.023834] [drm:drm_dp_i2c_do_msg] native defer
>[  404.025222] [drm:drm_dp_i2c_do_msg] native defer
>[  404.026701] [drm:drm_dp_i2c_do_msg] native defer
>[  404.028153] [drm:drm_dp_i2c_do_msg] native defer
>[  404.029665] [drm:drm_dp_i2c_do_msg] native defer
>[  404.030585] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  404.031335] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  404.031857] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  404.031935] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  404.031955] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  404.032784] [IGT] kms_cursor_legacy: starting subtest basic-flip-before-cursor-legacy
>[  404.033527] [drm:drm_mode_addfb2] [FB:62]
>[  404.094956] [drm:drm_mode_addfb2] [FB:64]
>[  404.959767] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  404.960420] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  404.960679] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  405.168404] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  405.168555] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  405.175621] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  405.175742] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  405.175864] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000000
>[  405.226618] [drm:wait_panel_status [i915]] Wait complete
>[  405.226689] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  405.226771] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  405.226869] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  405.226961] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  405.227047] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  405.227302] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  405.227392] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  405.227474] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  405.227560] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  405.227634] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  405.227713] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  405.227796] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  405.227873] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  405.227966] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  405.228046] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  405.228122] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  405.228302] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  405.228373] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  405.228450] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  405.228589] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  405.228675] [drm:intel_power_well_disable [i915]] disabling DC off
>[  405.228758] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  405.228815] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  405.229341] [drm:intel_power_well_disable [i915]] disabling always-on
>[  405.230386] [IGT] kms_cursor_legacy: exiting, ret=0
>[  405.251793] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  405.251837] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  405.251882] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  405.251925] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  405.251964] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  405.252006] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  405.252047] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  405.252086] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  405.252153] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  405.252190] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  405.252225] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  405.252232] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  405.252267] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  405.252272] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  405.252308] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  405.252342] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  405.252376] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  405.252410] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  405.252444] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  405.252484] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  405.252518] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  405.252552] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  405.252584] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  405.252617] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  405.252657] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  405.252701] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  405.252740] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  405.252858] [drm:intel_power_well_enable [i915]] enabling always-on
>[  405.252890] [drm:intel_power_well_enable [i915]] enabling DC off
>[  405.253183] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  405.253246] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  405.253285] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  405.253322] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  405.253359] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  405.253395] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  405.253431] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  405.253472] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  405.253511] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  405.253550] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  405.253595] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  405.253634] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  405.253709] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  405.253756] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  405.680475] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 08000001 control 00000000
>[  405.719506] [drm:wait_panel_status [i915]] Wait complete
>[  405.719614] [drm:edp_panel_on [i915]] Wait for panel power on
>[  405.719761] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  405.855696] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  405.855782] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  405.855860] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  405.856007] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  405.920534] [drm:wait_panel_status [i915]] Wait complete
>[  405.920616] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  405.920684] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  405.920822] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  405.920949] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  405.922593] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  405.922670] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  405.922758] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  405.922822] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  405.923864] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  405.923929] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  405.925266] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  405.925337] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  405.926973] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  405.927028] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  405.927049] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  405.927136] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  406.128360] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  406.128437] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  406.128532] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  406.128599] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  406.143968] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  406.144071] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  406.144306] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  406.144798] Console: switching to colour frame buffer device 240x67
>[  406.332312] Console: switching to colour dummy device 80x25
>[  406.332628] [IGT] kms_cursor_legacy: executing
>[  406.369766] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  406.369855] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  406.369934] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  406.370008] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  406.370077] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  406.370212] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  406.370947] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  406.372167] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  406.372189] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] probed modes :
>[  406.372200] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  406.372670] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  406.372747] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  406.372804] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  406.372874] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  406.373549] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  406.373651] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  406.374208] [drm:drm_dp_i2c_do_msg] native defer
>[  406.375709] [drm:drm_dp_i2c_do_msg] native defer
>[  406.377120] [drm:drm_dp_i2c_do_msg] native defer
>[  406.378654] [drm:drm_dp_i2c_do_msg] native defer
>[  406.380054] [drm:drm_dp_i2c_do_msg] native defer
>[  406.381100] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  406.381820] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  406.382403] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  406.382482] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  406.382501] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  406.383225] [IGT] kms_cursor_legacy: starting subtest basic-flip-before-cursor-varying-size
>[  406.383911] [drm:drm_mode_addfb2] [FB:60]
>[  406.445301] [drm:drm_mode_addfb2] [FB:64]
>[  406.445394] [drm:drm_mode_addfb2] [FB:65]
>[  407.311386] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  407.311634] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  407.520326] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  407.520474] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  407.527499] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  407.527605] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  407.527735] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000000
>[  407.578065] [drm:wait_panel_status [i915]] Wait complete
>[  407.578209] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  407.578281] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  407.578380] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  407.578472] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  407.578562] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  407.578698] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  407.578783] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  407.578859] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  407.578933] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  407.579004] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  407.579079] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  407.579236] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  407.579323] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  407.579404] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  407.579479] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  407.579618] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  407.579720] [drm:intel_power_well_disable [i915]] disabling DC off
>[  407.579805] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  407.579880] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  407.579982] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  407.580033] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  407.580104] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  407.580281] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  407.580514] [drm:intel_power_well_disable [i915]] disabling always-on
>[  407.581492] [IGT] kms_cursor_legacy: exiting, ret=0
>[  407.603663] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  407.603695] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  407.603729] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  407.603759] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  407.603787] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  407.603816] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  407.603846] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  407.603874] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  407.603900] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  407.603927] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  407.603952] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  407.603957] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  407.603982] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  407.603985] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  407.604011] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  407.604036] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  407.604060] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  407.604105] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  407.604128] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  407.604157] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  407.604182] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  407.604206] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  407.604230] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  407.604254] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  407.604282] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  407.604315] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  407.604343] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  407.604428] [drm:intel_power_well_enable [i915]] enabling always-on
>[  407.604451] [drm:intel_power_well_enable [i915]] enabling DC off
>[  407.604712] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  407.604758] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  407.604785] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  407.604812] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  407.604837] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  407.604862] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  407.604888] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  407.604918] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  407.604945] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  407.604972] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  407.605004] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  407.605032] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  407.605102] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  407.605137] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  408.032462] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  408.032547] [drm:wait_panel_status [i915]] Wait complete
>[  408.032638] [drm:edp_panel_on [i915]] Wait for panel power on
>[  408.032756] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  408.168736] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  408.168815] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  408.168885] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  408.169018] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  408.233255] [drm:wait_panel_status [i915]] Wait complete
>[  408.233329] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  408.233388] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  408.233510] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  408.233627] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  408.235217] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  408.235287] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  408.235350] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  408.235413] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  408.236496] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  408.236561] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  408.237889] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  408.237955] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  408.239187] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  408.239228] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  408.239250] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  408.239324] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  408.440370] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  408.440454] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  408.440561] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  408.440637] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  408.456240] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  408.456344] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  408.456499] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  408.456976] Console: switching to colour frame buffer device 240x67
>[  408.639071] Console: switching to colour dummy device 80x25
>[  408.639205] [IGT] kms_flip: executing
>[  408.651616] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  408.651660] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  408.651691] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  408.651719] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  408.651761] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  408.651789] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  408.652333] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  408.653176] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  408.653186] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] probed modes :
>[  408.653191] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  408.653210] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  408.653246] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  408.653270] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  408.653296] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  408.653692] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  408.653729] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  408.654191] [drm:drm_dp_i2c_do_msg] native defer
>[  408.655504] [drm:drm_dp_i2c_do_msg] native defer
>[  408.656840] [drm:drm_dp_i2c_do_msg] native defer
>[  408.658118] [drm:drm_dp_i2c_do_msg] native defer
>[  408.659431] [drm:drm_dp_i2c_do_msg] native defer
>[  408.660348] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  408.660836] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  408.661206] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  408.661241] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  408.661250] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  408.661515] [IGT] kms_flip: starting subtest basic-flip-vs-dpms
>[  408.661768] [drm:drm_mode_addfb2] [FB:62]
>[  408.661807] [drm:drm_mode_addfb2] [FB:64]
>[  408.719770] [drm:drm_mode_setcrtc] [CRTC:32:pipe A]
>[  408.719844] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  408.719917] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  408.928345] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  408.928445] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  408.939727] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  408.939826] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  408.939948] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000000
>[  408.990817] [drm:wait_panel_status [i915]] Wait complete
>[  408.990887] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  408.990952] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  408.991041] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  408.991226] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  408.991312] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  408.991448] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  408.991531] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  408.991601] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  408.991670] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  408.991739] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  408.991810] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  408.991884] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  408.991954] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  408.992041] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  408.992113] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  408.992181] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  408.992318] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  408.992403] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  408.992476] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  408.992602] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  408.992678] [drm:intel_power_well_disable [i915]] disabling DC off
>[  408.992742] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  408.992799] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  408.993309] [drm:intel_power_well_disable [i915]] disabling always-on
>[  408.993806] [drm:drm_mode_setcrtc] [CRTC:39:pipe B]
>[  408.994353] [drm:drm_mode_setcrtc] [CRTC:46:pipe C]
>[  408.994814] [drm:drm_mode_setcrtc] [CRTC:32:pipe A]
>[  408.994881] [drm:drm_mode_setcrtc] [CONNECTOR:48:eDP-1]
>[  408.995046] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  408.995170] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  408.995254] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  408.995333] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  408.995405] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  408.995480] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  408.995554] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  408.995627] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  408.995697] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  408.995760] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  408.995824] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  408.995836] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  408.995896] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  408.995907] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  408.995968] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  408.996029] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  408.996090] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  408.996191] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  408.996258] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  408.996333] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  408.996400] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  408.996466] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  408.996530] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  408.996595] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  408.996671] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  408.996750] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  408.996820] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  408.997973] [drm:intel_power_well_enable [i915]] enabling always-on
>[  408.998028] [drm:intel_power_well_enable [i915]] enabling DC off
>[  408.998385] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  408.998868] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  408.998938] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  408.999005] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  408.999068] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  408.999181] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  408.999258] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  408.999337] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  408.999408] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  408.999476] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  408.999558] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  408.999629] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  408.999746] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  408.999825] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  409.448522] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  409.448621] [drm:wait_panel_status [i915]] Wait complete
>[  409.448723] [drm:edp_panel_on [i915]] Wait for panel power on
>[  409.448853] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  409.584794] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  409.584885] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  409.584967] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  409.585250] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  409.649068] [drm:wait_panel_status [i915]] Wait complete
>[  409.649250] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  409.649320] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  409.649452] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  409.649583] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  409.651197] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  409.651276] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  409.651347] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  409.651420] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  409.652570] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  409.652645] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  409.653963] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  409.654034] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  409.655167] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  409.655212] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  409.655234] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  409.655309] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  409.856327] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  409.856408] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  409.856507] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  409.856578] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  409.872124] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  409.872280] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  409.872409] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  409.905880] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  409.905960] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  409.906040] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  409.906112] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  409.906285] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  409.906367] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  409.906462] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  409.906544] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  409.906635] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  409.906695] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  409.906775] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  409.906791] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  409.906852] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  409.906865] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  409.906928] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  409.906991] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  409.907055] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  409.907190] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  409.907269] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  409.907357] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  409.907436] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  409.907516] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] FB:62, fb = 1920x1080 format = XR24 little-endian (0x34325258)
>[  409.907613] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+1920+1080 dst 0x0+1920+1080
>[  409.907688] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  409.907766] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  409.907832] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  409.907902] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  409.907966] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  409.922720] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  410.128323] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  410.128472] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  410.139856] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  410.139964] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  410.140094] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000000
>[  410.191034] [drm:wait_panel_status [i915]] Wait complete
>[  410.191262] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  410.191350] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  410.191452] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  410.191544] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  410.191629] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  410.191766] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  410.191844] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  410.191918] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  410.191991] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  410.192059] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  410.192215] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  410.192308] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  410.192393] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  410.192541] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  410.192657] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  410.192735] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  410.192808] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  410.192879] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  410.192982] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  410.193064] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  410.193232] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  410.193350] [drm:intel_power_well_disable [i915]] disabling DC off
>[  410.193418] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  410.193477] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  410.193933] [drm:intel_power_well_disable [i915]] disabling always-on
>[  410.194679] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  410.194755] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  410.194835] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  410.194910] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  410.194980] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  410.195055] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  410.195220] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  410.195308] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  410.195394] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  410.195492] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  410.195566] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  410.195582] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  410.195647] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  410.195659] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  410.195738] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  410.195793] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  410.195849] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  410.195904] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  410.195958] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  410.196023] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  410.196079] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  410.196199] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] FB:62, fb = 1920x1080 format = XR24 little-endian (0x34325258)
>[  410.196269] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+1920+1080 dst 0x0+1920+1080
>[  410.196338] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  410.196405] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  410.196481] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  410.196565] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  410.196642] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  410.196898] [drm:intel_power_well_enable [i915]] enabling always-on
>[  410.196950] [drm:intel_power_well_enable [i915]] enabling DC off
>[  410.197319] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  410.197803] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  410.197869] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  410.197930] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  410.197990] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  410.198048] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  410.198188] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  410.198290] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  410.198356] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  410.198420] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  410.198495] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  410.198560] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  410.198673] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  410.198746] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  410.648464] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 08000001 control 00000000
>[  410.650795] [drm:wait_panel_status [i915]] Wait complete
>[  410.650908] [drm:edp_panel_on [i915]] Wait for panel power on
>[  410.651044] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  410.786894] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  410.786977] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  410.787050] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  410.787216] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  410.852075] [drm:wait_panel_status [i915]] Wait complete
>[  410.852261] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  410.852331] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  410.852466] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  410.852596] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  410.854222] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  410.854301] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  410.854372] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  410.854445] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  410.855604] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  410.855682] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  410.856978] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  410.857049] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  410.858181] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  410.858227] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  410.858250] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  410.858324] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  411.056263] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  411.056332] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  411.056418] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  411.056483] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  411.056689] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  411.056768] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  411.056886] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  411.058873] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  411.058952] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  411.059031] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  411.059104] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  411.059252] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  411.059334] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  411.059413] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  411.059487] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  411.059558] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  411.059620] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  411.059686] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  411.059702] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  411.059763] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  411.059778] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  411.059842] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  411.059903] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  411.059964] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  411.060023] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  411.060084] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  411.060195] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  411.060262] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  411.060330] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] FB:64, fb = 1920x1080 format = XR24 little-endian (0x34325258)
>[  411.060393] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+1920+1080 dst 0x0+1920+1080
>[  411.060454] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  411.060512] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  411.060585] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  411.060659] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  411.060729] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  411.075399] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  411.280325] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  411.280475] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  411.293913] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  411.294021] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  411.294244] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000000
>[  411.345004] [drm:wait_panel_status [i915]] Wait complete
>[  411.345083] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  411.345269] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  411.345381] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  411.345484] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  411.345574] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  411.345715] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  411.345797] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  411.345880] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  411.345956] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  411.346030] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  411.346106] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  411.346240] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  411.346332] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  411.346413] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  411.346493] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  411.346627] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  411.346709] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  411.346800] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  411.346913] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  411.346993] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  411.347073] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  411.347199] [drm:intel_power_well_disable [i915]] disabling DC off
>[  411.347272] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  411.347335] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  411.347785] [drm:intel_power_well_disable [i915]] disabling always-on
>[  411.348501] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  411.348575] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  411.348655] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  411.348746] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  411.348809] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  411.348874] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  411.348940] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  411.349002] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  411.349062] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  411.349178] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  411.349241] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  411.349261] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  411.349318] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  411.349333] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  411.349394] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  411.349457] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  411.349520] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  411.349581] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  411.349638] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  411.349704] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  411.349762] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  411.349827] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] FB:64, fb = 1920x1080 format = XR24 little-endian (0x34325258)
>[  411.349885] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+1920+1080 dst 0x0+1920+1080
>[  411.349943] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  411.349997] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  411.350066] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  411.350178] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  411.350253] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  411.350464] [drm:intel_power_well_enable [i915]] enabling always-on
>[  411.350517] [drm:intel_power_well_enable [i915]] enabling DC off
>[  411.350811] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  411.350871] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  411.350892] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  411.350912] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  411.350932] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  411.350951] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  411.350972] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  411.350994] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  411.351015] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  411.351036] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  411.351060] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  411.351096] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  411.351137] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  411.351168] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  411.800405] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  411.800493] [drm:wait_panel_status [i915]] Wait complete
>[  411.800586] [drm:edp_panel_on [i915]] Wait for panel power on
>[  411.800706] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  411.936652] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  411.936745] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  411.936827] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  411.937067] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  412.000875] [drm:wait_panel_status [i915]] Wait complete
>[  412.000961] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  412.001030] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  412.001332] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  412.001483] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  412.003073] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  412.003207] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  412.003281] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  412.003353] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  412.004377] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  412.004455] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  412.005774] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  412.005798] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  412.006545] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  412.006593] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  412.006615] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  412.006690] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  412.208363] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  412.208453] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  412.208560] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  412.208637] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  412.208882] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  412.208978] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  412.209115] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  412.223966] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  412.224054] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  412.224249] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  412.224347] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  412.224429] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  412.224511] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  412.224597] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  412.224677] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  412.224752] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  412.224825] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  412.224898] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  412.224914] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  412.224985] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  412.224998] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  412.225068] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  412.225185] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  412.225260] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  412.225332] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  412.225401] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  412.225484] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  412.225556] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  412.225629] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] FB:62, fb = 1920x1080 format = XR24 little-endian (0x34325258)
>[  412.225699] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+1920+1080 dst 0x0+1920+1080
>[  412.225764] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  412.225834] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  412.225914] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  412.225998] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  412.226075] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  412.240384] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  412.448325] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  412.448475] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  412.457661] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  412.457768] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  412.457899] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000000
>[  412.508622] [drm:wait_panel_status [i915]] Wait complete
>[  412.508700] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  412.508772] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  412.508872] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  412.508965] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  412.509052] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  412.509312] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  412.509395] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  412.509471] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  412.509549] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  412.509621] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  412.509699] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  412.509780] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  412.509858] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  412.509933] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  412.510025] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  412.510106] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  412.510183] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  412.510355] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  412.510497] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  412.510615] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  412.510715] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  412.510793] [drm:intel_power_well_disable [i915]] disabling DC off
>[  412.510861] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  412.510919] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  412.511458] [drm:intel_power_well_disable [i915]] disabling always-on
>[  412.512563] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  412.512639] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  412.512719] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  412.512806] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  412.512868] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  412.512935] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  412.513000] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  412.513062] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  412.513204] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  412.513278] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  412.513349] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  412.513370] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  412.513440] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  412.513459] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  412.513527] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  412.513611] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  412.513682] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  412.513751] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  412.513830] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  412.513899] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  412.513955] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  412.514015] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] FB:62, fb = 1920x1080 format = XR24 little-endian (0x34325258)
>[  412.514071] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+1920+1080 dst 0x0+1920+1080
>[  412.514186] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  412.514255] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  412.514336] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  412.514438] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  412.514504] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  412.514750] [drm:intel_power_well_enable [i915]] enabling always-on
>[  412.514803] [drm:intel_power_well_enable [i915]] enabling DC off
>[  412.515161] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  412.515657] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  412.515722] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  412.515784] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  412.515844] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  412.515902] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  412.515964] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  412.516031] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  412.516094] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  412.516242] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  412.516352] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  412.516416] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  412.516532] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  412.516604] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  412.960395] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 08000001 control 00000000
>[  413.002275] [drm:wait_panel_status [i915]] Wait complete
>[  413.002378] [drm:edp_panel_on [i915]] Wait for panel power on
>[  413.002504] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  413.138436] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  413.138531] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  413.138611] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  413.138804] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  413.175929] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  413.176022] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  413.176104] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 2
>[  413.176342] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  413.202746] [drm:wait_panel_status [i915]] Wait complete
>[  413.202831] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  413.202901] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  413.203033] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  413.203329] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  413.211959] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.220475] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.228968] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.237459] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.245949] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.254439] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.262930] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.271433] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.279922] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.288413] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.296902] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.305391] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.313883] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.322374] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.330864] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.339354] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.347842] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.356331] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.364832] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.373324] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.381812] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.390303] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.398791] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.407281] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.415770] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.424262] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.432750] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.441239] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.449728] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.458217] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.466705] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.475194] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.475208] [drm:drm_dp_dpcd_access] Too many retries, giving up. First error: -110
>[  413.486768] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.495262] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.503755] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.512245] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.520735] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.529226] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.537730] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.546220] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.554708] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.563198] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.571688] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.580178] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.588666] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.597156] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.605646] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.614149] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.622640] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.631130] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.639621] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.648114] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.656612] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.665119] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.673629] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.682120] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.690610] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.699101] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.707590] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.716080] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.724572] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.733063] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.741569] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.750060] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.750087] [drm:drm_dp_dpcd_access] Too many retries, giving up. First error: -110
>[  413.761763] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.770259] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.778750] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.787240] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.795729] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.804220] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.812710] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.821202] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.829690] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.838190] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.846687] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.855183] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.863678] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.872174] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.880667] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.889167] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.897667] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.906163] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.914657] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.923154] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.931647] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.940143] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.948637] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.957132] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.965634] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.974132] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.982627] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.991118] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  413.999609] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.008100] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.016590] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.025084] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.025098] [drm:drm_dp_dpcd_access] Too many retries, giving up. First error: -110
>[  414.028272] [drm:intel_dp_sink_dpms [i915]] failed to enable sink power state
>[  414.037454] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.045989] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.054523] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.063056] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.071606] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.080139] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.088671] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.097202] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.105732] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.114264] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.122796] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.131328] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.139873] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.148405] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.156937] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.165470] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.174001] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.182534] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.191066] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.199612] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.208143] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.216673] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.225205] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.233736] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.242266] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.250797] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.259328] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.267872] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.276404] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.284936] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.293469] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.302001] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.302014] [drm:drm_dp_dpcd_access] Too many retries, giving up. First error: -110
>[  414.310537] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.319070] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.327615] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.336147] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.344677] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.353208] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.361738] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.370270] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.378800] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.387332] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.395863] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.404397] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.412929] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.421461] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.430006] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.438614] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.447145] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.455675] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.464207] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.472738] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.481269] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.489800] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.498330] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.506862] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.515395] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.523927] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.532459] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.540990] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.549521] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.558051] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.566595] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.575127] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.575140] [drm:drm_dp_dpcd_access] Too many retries, giving up. First error: -110
>[  414.575164] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  414.575183] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  414.575201] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  414.575232] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  414.583794] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.592365] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.600935] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.609506] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.618091] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.626662] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.635233] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.643802] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.652373] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.660946] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.669519] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.678090] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.686661] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.695232] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.703803] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.712374] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.720946] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.729518] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.738102] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.746672] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.755242] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.763813] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.772385] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.780958] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.789529] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.798114] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.806685] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.815256] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.823826] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.832397] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.840969] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.849541] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.849553] [drm:drm_dp_dpcd_access] Too many retries, giving up. First error: -110
>[  414.849575] [drm:intel_dp_start_link_train [i915]] *ERROR* failed to enable link training
>[  414.849596] [drm:intel_dp_start_link_train [i915]] Link Training failed at link rate = 270000, lane count = 2
>[  414.849687] [drm:intel_dp_modeset_retry_work_fn [i915]] [CONNECTOR:48:eDP-1]
>[  414.858239] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.866729] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.875222] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.883713] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.892204] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.900694] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.909185] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.917675] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.926168] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.934673] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.943164] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.951655] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.960146] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.968637] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.977128] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.985618] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  414.994110] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.002600] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.011091] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.019581] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.028086] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.036577] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.045068] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.053573] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.062087] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.070579] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.079070] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.087574] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.096065] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.104570] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.113088] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.121579] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.121591] [drm:drm_dp_dpcd_access] Too many retries, giving up. First error: -110
>[  415.122147] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  415.122197] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  415.122219] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  415.122306] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  415.122364] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  415.122382] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  415.122404] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  415.122421] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  415.122483] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  415.122504] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  415.122538] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  415.139751] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  415.139779] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  415.139806] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 162000 pixel clock 138700KHz
>[  415.139826] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 2 clock 162000 bpp 18
>[  415.139843] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 324000
>[  415.139863] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  415.139882] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  415.139900] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  415.139918] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 504991, gmch_n: 524288, link_m: 56110, link_n: 65536, tu: 64
>[  415.139934] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  415.139951] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  415.139956] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  415.139973] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  415.139976] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  415.139992] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  415.140008] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1080, pixel rate 138700
>[  415.140023] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  415.140038] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  415.140054] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  415.140157] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  415.140195] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  415.140213] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] FB:64, fb = 1920x1080 format = XR24 little-endian (0x34325258)
>[  415.140231] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+1920+1080 dst 0x0+1920+1080
>[  415.140248] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  415.140264] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  415.140286] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  415.140308] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  415.140328] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  415.155765] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  415.360319] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  415.360455] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  415.382374] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.391166] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.399945] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.408718] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.417497] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.426269] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.435050] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.443895] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.452673] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.461456] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.470235] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.478996] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.487942] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.496732] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.505446] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.514068] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.522659] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.531194] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.539706] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.548206] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.556698] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.565193] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.573685] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.582180] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.590673] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.599168] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.607660] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.616155] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.624649] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.633145] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.641638] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.650147] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  415.650160] [drm:drm_dp_dpcd_access] Too many retries, giving up. First error: -110
>[  415.650181] [drm:intel_dp_sink_dpms [i915]] failed to disable sink power state
>[  415.650211] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  415.650262] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  415.650330] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000000
>[  415.702559] [drm:wait_panel_status [i915]] Wait complete
>[  415.702590] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  415.702617] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  415.702655] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  415.702690] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  415.702723] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  415.702779] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  415.702808] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  415.702836] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  415.702862] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  415.702888] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  415.702916] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  415.702945] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  415.702972] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  415.703000] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  415.703044] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  415.703075] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  415.703154] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  415.703190] [drm:intel_power_well_disable [i915]] disabling DC off
>[  415.703221] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  415.703247] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  415.703670] [drm:intel_power_well_disable [i915]] disabling always-on
>[  415.703922] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  415.703951] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  415.703981] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 162000 pixel clock 138700KHz
>[  415.704010] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 2 clock 162000 bpp 18
>[  415.704038] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 324000
>[  415.704066] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  415.704121] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  415.704149] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  415.704178] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 504991, gmch_n: 524288, link_m: 56110, link_n: 65536, tu: 64
>[  415.704206] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  415.704231] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  415.704239] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  415.704264] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  415.704270] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  415.704296] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  415.704323] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1080, pixel rate 138700
>[  415.704347] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  415.704374] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  415.704398] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  415.704427] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x5, cfgcr1: 0x0, cfgcr2: 0x0
>[  415.704453] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  415.704479] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] FB:64, fb = 1920x1080 format = XR24 little-endian (0x34325258)
>[  415.704504] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+1920+1080 dst 0x0+1920+1080
>[  415.704528] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  415.704552] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  415.704580] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  415.704612] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  415.704640] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  415.704733] [drm:intel_power_well_enable [i915]] enabling always-on
>[  415.704756] [drm:intel_power_well_enable [i915]] enabling DC off
>[  415.705030] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  415.705072] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  415.705121] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  415.705148] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  415.705178] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  415.705205] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  415.705233] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  415.705263] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  415.705291] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  415.705320] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  415.705352] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  415.705380] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  415.705433] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  415.705468] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  416.152331] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  416.152418] [drm:wait_panel_status [i915]] Wait complete
>[  416.152511] [drm:edp_panel_on [i915]] Wait for panel power on
>[  416.152632] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  416.288602] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  416.288686] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  416.288757] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  416.288925] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  416.353400] [drm:wait_panel_status [i915]] Wait complete
>[  416.353477] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  416.353539] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  416.353660] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  416.353780] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  416.355417] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  416.355489] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  416.355553] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  416.355619] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  416.356646] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  416.356719] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  416.358070] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  416.358199] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 162000, Lane count = 2
>[  416.359877] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  416.359980] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  416.360047] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  416.360221] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  416.560369] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  416.560449] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  416.560545] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  416.560615] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  416.560835] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  416.560920] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  416.561043] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  416.577290] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  416.577368] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  416.577446] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 162000 pixel clock 138700KHz
>[  416.577519] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 2 clock 162000 bpp 18
>[  416.577588] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 324000
>[  416.577660] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  416.577730] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  416.577797] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  416.577862] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 504991, gmch_n: 524288, link_m: 56110, link_n: 65536, tu: 64
>[  416.577925] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  416.577987] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  416.578001] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  416.578060] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  416.578134] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  416.578197] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  416.578269] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1080, pixel rate 138700
>[  416.578334] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  416.578394] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  416.578456] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  416.578531] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x5, cfgcr1: 0x0, cfgcr2: 0x0
>[  416.578594] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  416.578661] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] FB:62, fb = 1920x1080 format = XR24 little-endian (0x34325258)
>[  416.578724] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+1920+1080 dst 0x0+1920+1080
>[  416.578796] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  416.578855] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  416.578929] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  416.579004] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  416.579071] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  416.593656] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  416.800331] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  416.800468] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  416.811721] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  416.811820] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  416.811943] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000000
>[  416.862808] [drm:wait_panel_status [i915]] Wait complete
>[  416.862879] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  416.862943] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  416.863033] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  416.863115] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  416.863334] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  416.863516] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  416.863594] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  416.863685] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  416.863758] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  416.863837] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  416.863910] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  416.863999] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  416.864093] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  416.864153] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  416.864231] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  416.864306] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  416.864381] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  416.864457] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  416.864548] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  416.864633] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  416.864727] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  416.864824] [drm:intel_power_well_disable [i915]] disabling DC off
>[  416.864906] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  416.864983] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  416.865507] [drm:intel_power_well_disable [i915]] disabling always-on
>[  416.866902] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  416.867788] [drm:intel_power_well_enable [i915]] enabling always-on
>[  416.867890] [drm:intel_power_well_enable [i915]] enabling DC off
>[  416.868297] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  416.868767] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  416.868876] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  416.868953] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  416.869040] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  416.869116] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  416.869270] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  416.869373] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  416.869464] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  416.869553] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  416.869642] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  416.870298] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  416.870386] [drm:intel_power_well_disable [i915]] disabling DC off
>[  416.870446] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  416.870498] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  416.870947] [drm:intel_power_well_disable [i915]] disabling always-on
>[  416.871541] [drm:drm_mode_addfb2] [FB:62]
>[  416.871667] [drm:drm_mode_addfb2] [FB:63]
>[  416.902715] [drm:drm_mode_setcrtc] [CRTC:32:pipe A]
>[  416.903039] [drm:drm_mode_setcrtc] [CRTC:39:pipe B]
>[  416.903548] [drm:drm_mode_setcrtc] [CRTC:46:pipe C]
>[  416.903611] [drm:drm_mode_setcrtc] [CRTC:39:pipe B]
>[  416.903637] [drm:drm_mode_setcrtc] [CONNECTOR:48:eDP-1]
>[  416.903714] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  416.903733] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  416.903755] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 162000 pixel clock 138700KHz
>[  416.903786] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 2 clock 162000 bpp 18
>[  416.903802] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 324000
>[  416.903820] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  416.903837] [drm:intel_dump_pipe_config [i915]] [CRTC:39:pipe B][modeset]
>[  416.903853] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  416.903869] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 504991, gmch_n: 524288, link_m: 56110, link_n: 65536, tu: 64
>[  416.903884] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  416.903899] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  416.903902] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  416.903917] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  416.903919] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  416.903934] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  416.903949] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1080, pixel rate 138700
>[  416.903963] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  416.903977] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  416.903992] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  416.904009] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  416.904023] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  416.904037] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 1B] disabled, scaler_id = -1
>[  416.904051] [drm:intel_dump_pipe_config [i915]] [PLANE:35:plane 2B] disabled, scaler_id = -1
>[  416.904143] [drm:intel_dump_pipe_config [i915]] [PLANE:37:cursor B] disabled, scaler_id = -1
>[  416.904193] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  416.904218] [drm:intel_find_shared_dpll [i915]] [CRTC:39:pipe B] allocated DPLL 0
>[  416.904238] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe B
>[  416.904594] [drm:intel_power_well_enable [i915]] enabling always-on
>[  416.904608] [drm:intel_power_well_enable [i915]] enabling DC off
>[  416.904887] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  416.904907] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  416.904923] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  416.904984] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  416.905014] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  416.905030] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  416.905046] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  416.905060] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  416.905131] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  416.905180] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  416.905202] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  416.905221] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  416.905244] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 2, on? 0) for crtc 39
>[  416.905263] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  416.905302] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  416.905328] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  417.320462] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 08000001 control 00000000
>[  417.353526] [drm:wait_panel_status [i915]] Wait complete
>[  417.353629] [drm:edp_panel_on [i915]] Wait for panel power on
>[  417.353754] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  417.489676] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  417.489758] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  417.489831] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  417.490011] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  417.522645] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  417.522729] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  417.522802] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  417.522980] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  417.554219] [drm:wait_panel_status [i915]] Wait complete
>[  417.554296] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  417.554357] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  417.554475] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  417.554596] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  417.563219] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.571722] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.580221] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.588713] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.597204] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.605694] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.614184] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.622674] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.631166] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.639656] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.648147] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.656636] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.665132] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.673622] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.682113] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.690604] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.699095] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.707585] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.716088] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.724578] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.733069] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.741573] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.750063] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.758567] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.767060] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.775564] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.784056] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.792561] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.801051] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.809556] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.818047] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.826565] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.826578] [drm:drm_dp_dpcd_access] Too many retries, giving up. First error: -110
>[  417.837634] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.846131] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.854623] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.863115] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.871606] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.880099] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.888590] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.897083] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.905573] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.914065] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.922571] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.931062] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.939568] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.948059] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.956563] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.965054] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.973559] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.982050] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.990557] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  417.999049] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.007583] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.016088] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.024578] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.033069] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.041574] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.050064] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.058569] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.067060] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.075564] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.084056] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.092562] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.101055] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.101082] [drm:drm_dp_dpcd_access] Too many retries, giving up. First error: -110
>[  418.112781] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.121277] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.129772] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.138264] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.146755] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.155247] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.163736] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.172228] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.180717] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.189209] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.197700] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.206193] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.214684] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.223175] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.231665] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.240156] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.248645] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.257151] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.265641] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.274146] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.282636] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.291128] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.299619] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.308109] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.316601] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.325091] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.333594] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.342084] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.350573] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.359064] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.367570] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.376062] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.376090] [drm:drm_dp_dpcd_access] Too many retries, giving up. First error: -110
>[  418.379273] [drm:intel_dp_sink_dpms [i915]] failed to enable sink power state
>[  418.388453] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.396987] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.405518] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.414049] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.422596] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.431129] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.439673] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.448203] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.456733] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.465278] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.473807] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.482338] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.490869] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.499399] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.507929] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.516475] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.525006] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.533537] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.542070] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.550614] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.559145] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.567675] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.576205] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.584735] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.593265] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.601794] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.610324] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.618872] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.627403] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.635935] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.644480] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.653027] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.653087] [drm:drm_dp_dpcd_access] Too many retries, giving up. First error: -110
>[  418.661636] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.670169] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.678699] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.687232] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.695763] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.704293] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.712824] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.721367] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.729898] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.738431] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.746962] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.755495] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.764025] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.772586] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.781116] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.789645] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.798177] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.806707] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.815238] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.823783] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.832315] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.840845] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.849376] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.857908] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.866439] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.874970] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.883502] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.892032] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.900591] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.909122] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.917652] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.926182] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.926194] [drm:drm_dp_dpcd_access] Too many retries, giving up. First error: -110
>[  418.926217] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  418.926236] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  418.926265] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  418.926282] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  418.934862] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.943433] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.952003] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.960572] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.969143] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.977711] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.986283] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  418.994852] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.003423] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.011994] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.020564] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.029133] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.037703] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.046273] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.054843] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.063427] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.071997] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.080568] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.089138] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.097707] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.106277] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.114845] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.123415] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.131985] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.140555] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.149124] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.157692] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.166262] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.174831] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.183401] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.191972] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.200543] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.200555] [drm:drm_dp_dpcd_access] Too many retries, giving up. First error: -110
>[  419.200576] [drm:intel_dp_start_link_train [i915]] *ERROR* failed to enable link training
>[  419.200597] [drm:intel_dp_start_link_train [i915]] Link Training failed at link rate = 162000, lane count = 2
>[  419.200637] [drm:intel_dp_modeset_retry_work_fn [i915]] [CONNECTOR:48:eDP-1]
>[  419.209141] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.217631] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.226121] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.234611] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.243101] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.251590] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.260081] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.268570] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.277061] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.285567] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.294059] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.302565] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.311056] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.319560] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.328051] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.336556] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.345047] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.353567] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.362057] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.370557] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.379049] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.387559] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.396051] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.404558] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.413050] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.421554] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.430044] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.438569] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.447060] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.455564] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.464068] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.472572] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.472584] [drm:drm_dp_dpcd_access] Too many retries, giving up. First error: -110
>[  419.473056] [drm:intel_enable_pipe [i915]] enabling pipe B
>[  419.473176] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  419.473209] [drm:intel_panel_enable_backlight [i915]] pipe B
>[  419.473311] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  419.473378] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  419.473395] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  419.490002] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  419.490028] [drm:intel_atomic_commit_tail [i915]] [CRTC:39:pipe B]
>[  419.490065] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  419.523545] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  419.523568] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  419.523590] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 1 max bw 270000 pixel clock 138700KHz
>[  419.523610] [drm:intel_atomic_check [i915]] Encoder config failure
>[  419.523630] [drm:intel_dump_pipe_config [i915]] [CRTC:39:pipe B][failed]
>[  419.523649] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 0
>[  419.523668] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 0; gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  419.523686] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  419.523703] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  419.523708] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  419.523725] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  419.523728] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  419.523746] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  419.523763] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 1920x1080, pixel rate 0
>[  419.523780] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  419.523797] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  419.523813] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  419.523833] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x5, cfgcr1: 0x0, cfgcr2: 0x0
>[  419.523850] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  419.523868] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 1B] FB:62, fb = 1920x1080 format = XR24 little-endian (0x34325258)
>[  419.523884] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+1920+1080 dst 0x0+1920+1080
>[  419.523901] [drm:intel_dump_pipe_config [i915]] [PLANE:35:plane 2B] disabled, scaler_id = -1
>[  419.523917] [drm:intel_dump_pipe_config [i915]] [PLANE:37:cursor B] disabled, scaler_id = -1
>[  419.530341] [IGT] kms_flip: exiting, ret=99
>[  419.571510] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  419.571583] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  419.571658] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 1 max bw 270000 pixel clock 138700KHz
>[  419.571726] [drm:intel_atomic_check [i915]] Encoder config failure
>[  419.571794] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][failed]
>[  419.571859] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 0
>[  419.571922] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 0; gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  419.571982] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  419.572040] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  419.572052] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  419.572159] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  419.572168] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  419.572228] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  419.572285] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 1920x1080, pixel rate 0
>[  419.572342] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  419.572399] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  419.572454] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  419.572520] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x5, cfgcr1: 0x0, cfgcr2: 0x0
>[  419.572576] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  419.572632] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  419.572687] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  419.572741] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  419.573146] Console: switching to colour frame buffer device 240x67
>[  419.590601] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  419.592104] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  419.800455] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  419.800806] [drm:intel_disable_pipe [i915]] disabling pipe B
>[  419.816559] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.825374] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.834201] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.842969] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.851907] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.860681] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.869446] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.878217] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.886981] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.895831] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.904604] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.913376] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.922197] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.930965] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.939736] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.948344] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.956905] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.965434] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.973942] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.982440] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.990932] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  419.999426] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  420.007920] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  420.016414] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  420.024908] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  420.033401] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  420.041894] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  420.050387] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  420.058880] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  420.067372] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  420.075865] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  420.084358] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[  420.084378] [drm:drm_dp_dpcd_access] Too many retries, giving up. First error: -110
>[  420.084404] [drm:intel_dp_sink_dpms [i915]] failed to disable sink power state
>[  420.084487] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  420.084534] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  420.084603] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000000
>[  420.136817] [drm:wait_panel_status [i915]] Wait complete
>[  420.136884] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  420.136934] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  420.136990] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 2, on? 1) for crtc 39
>[  420.137039] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  420.137154] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  420.137188] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  420.137217] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  420.137250] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  420.137285] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  420.137321] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  420.137362] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  420.137400] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  420.137430] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  420.137454] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  420.137502] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  420.137573] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  420.137893] [drm:intel_atomic_commit_tail [i915]] [CRTC:39:pipe B]
>[  420.137926] [drm:intel_power_well_disable [i915]] disabling DC off
>[  420.137949] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  420.137969] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  420.138432] [drm:intel_power_well_disable [i915]] disabling always-on
>[  420.138811] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  420.138848] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  420.138877] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 1 max bw 270000 pixel clock 138700KHz
>[  420.138903] [drm:intel_atomic_check [i915]] Encoder config failure
>[  420.138929] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][failed]
>[  420.138953] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 0
>[  420.138977] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 0; gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  420.138999] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  420.139021] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  420.139027] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  420.139048] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  420.139052] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  420.139129] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  420.139164] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 1920x1080, pixel rate 0
>[  420.139198] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  420.139230] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  420.139262] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  420.139299] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x5, cfgcr1: 0x0, cfgcr2: 0x0
>[  420.139331] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  420.139362] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  420.139392] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  420.139423] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  420.139531] [drm:drm_fb_helper_hotplug_event] 
>[  420.139548] [drm:drm_setup_crtcs] 
>[  420.139560] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  420.139606] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  420.139667] [drm:intel_power_well_enable [i915]] enabling always-on
>[  420.139743] [drm:intel_power_well_enable [i915]] enabling DC off
>[  420.140041] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  420.140122] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  420.140170] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  420.140210] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  420.140248] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  420.140369] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  420.140426] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  420.592492] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  420.592580] [drm:wait_panel_status [i915]] Wait complete
>[  420.592691] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000008
>[  420.592768] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled
>[  420.728683] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  420.728767] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  420.728841] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  420.729012] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  420.801126] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  420.802539] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  420.802562] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  420.802571] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  420.802592] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  420.802675] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  420.802731] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  420.802805] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  420.803625] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  420.803713] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  420.804282] [drm:drm_dp_i2c_do_msg] native defer
>[  420.806413] [drm:drm_dp_i2c_do_msg] native defer
>[  420.807952] [drm:drm_dp_i2c_do_msg] native defer
>[  420.809431] [drm:drm_dp_i2c_do_msg] native defer
>[  420.810961] [drm:drm_dp_i2c_do_msg] native defer
>[  420.811988] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  420.812684] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  420.813275] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  420.813462] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  420.813485] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  420.813495] [drm:drm_setup_crtcs] No connectors reported connected with modes
>[  420.813534] [drm:drm_setup_crtcs] connector 48 enabled? yes
>[  420.813541] [drm:drm_setup_crtcs] connector 56 enabled? no
>[  420.813621] [drm:intel_fb_initial_config [i915]] Not using firmware configuration
>[  420.813638] [drm:drm_setup_crtcs] looking for cmdline mode on connector 48
>[  420.813645] [drm:drm_setup_crtcs] looking for preferred mode on connector 48 0
>[  420.813652] [drm:drm_setup_crtcs] found mode none
>[  420.813659] [drm:drm_setup_crtcs] picking CRTCs for 1920x1080 config
>[  420.959562] Console: switching to colour dummy device 80x25
>[  420.959657] [IGT] kms_flip: executing
>[  420.974331] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  420.974426] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  420.974509] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  420.974584] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  420.974651] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  420.974719] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  420.975498] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  420.976746] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  420.976760] [drm:drm_mode_debug_printmodeline] Modeline 50:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  420.976768] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  420.976814] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  420.976885] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  420.976939] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  420.977012] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  420.977666] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  420.977742] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  420.978276] [drm:drm_dp_i2c_do_msg] native defer
>[  420.979758] [drm:drm_dp_i2c_do_msg] native defer
>[  420.981142] [drm:drm_dp_i2c_do_msg] native defer
>[  420.982705] [drm:drm_dp_i2c_do_msg] native defer
>[  420.984115] [drm:drm_dp_i2c_do_msg] native defer
>[  420.985134] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  420.985843] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  420.986408] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  420.986486] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  420.986505] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  420.987181] [IGT] kms_flip: starting subtest basic-flip-vs-modeset
>[  420.995313] [IGT] kms_flip: exiting, ret=77
>[  421.019850] Console: switching to colour frame buffer device 240x67
>[  421.154631] Console: switching to colour dummy device 80x25
>[  421.154750] [IGT] kms_flip: executing
>[  421.169104] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  421.169181] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  421.169243] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  421.169299] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  421.169351] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  421.169402] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  421.170037] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  421.171163] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  421.171173] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  421.171179] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  421.171215] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  421.171270] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  421.171311] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  421.171354] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  421.171867] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  421.171926] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  421.172433] [drm:drm_dp_i2c_do_msg] native defer
>[  421.173893] [drm:drm_dp_i2c_do_msg] native defer
>[  421.175301] [drm:drm_dp_i2c_do_msg] native defer
>[  421.176711] [drm:drm_dp_i2c_do_msg] native defer
>[  421.178048] [drm:drm_dp_i2c_do_msg] native defer
>[  421.179039] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  421.179706] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  421.180204] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  421.180267] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  421.180282] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  421.180777] [IGT] kms_flip: starting subtest basic-flip-vs-wf_vblank
>[  421.186613] [IGT] kms_flip: exiting, ret=77
>[  421.213720] Console: switching to colour frame buffer device 240x67
>[  421.396091] Console: switching to colour dummy device 80x25
>[  421.396229] [IGT] kms_flip: executing
>[  421.412258] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  421.412379] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  421.412456] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  421.412526] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  421.412591] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  421.412654] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  421.413432] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  421.414719] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  421.414733] [drm:drm_mode_debug_printmodeline] Modeline 50:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  421.414741] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  421.414792] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  421.414868] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  421.414924] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  421.415000] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  421.415652] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  421.415729] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  421.416243] [drm:drm_dp_i2c_do_msg] native defer
>[  421.417743] [drm:drm_dp_i2c_do_msg] native defer
>[  421.419139] [drm:drm_dp_i2c_do_msg] native defer
>[  421.420669] [drm:drm_dp_i2c_do_msg] native defer
>[  421.422022] [drm:drm_dp_i2c_do_msg] native defer
>[  421.422928] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  421.423560] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  421.424058] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  421.424193] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  421.424221] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  421.424823] [IGT] kms_flip: starting subtest basic-plain-flip
>[  421.432930] [IGT] kms_flip: exiting, ret=77
>[  421.456796] Console: switching to colour frame buffer device 240x67
>[  421.907732] Console: switching to colour dummy device 80x25
>[  421.907823] [IGT] kms_force_connector_basic: executing
>[  421.923542] [IGT] kms_force_connector_basic: exiting, ret=77
>[  421.944158] Console: switching to colour frame buffer device 240x67
>[  422.062606] Console: switching to colour dummy device 80x25
>[  422.062704] [IGT] kms_force_connector_basic: executing
>[  422.075188] [IGT] kms_force_connector_basic: exiting, ret=77
>[  422.099637] Console: switching to colour frame buffer device 240x67
>[  422.251535] Console: switching to colour dummy device 80x25
>[  422.251630] [IGT] kms_force_connector_basic: executing
>[  422.263720] [IGT] kms_force_connector_basic: exiting, ret=77
>[  422.292739] Console: switching to colour frame buffer device 240x67
>[  422.448256] Console: switching to colour dummy device 80x25
>[  422.448394] [IGT] kms_force_connector_basic: executing
>[  422.469693] [IGT] kms_force_connector_basic: exiting, ret=77
>[  422.486786] Console: switching to colour frame buffer device 240x67
>[  422.673168] Console: switching to colour dummy device 80x25
>[  422.673303] [IGT] kms_frontbuffer_tracking: executing
>[  422.688614] [IGT] kms_frontbuffer_tracking: exiting, ret=77
>[  422.708802] Console: switching to colour frame buffer device 240x67
>[  422.954525] Console: switching to colour dummy device 80x25
>[  422.954849] [IGT] kms_pipe_crc_basic: executing
>[  422.979953] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  422.980051] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  422.980213] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  422.980298] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  422.980373] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  422.980445] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  422.981234] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  422.982486] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  422.982500] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  422.982508] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  422.982556] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  422.982628] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  422.982682] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  422.982752] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  422.983445] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  422.983554] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  422.984139] [drm:drm_dp_i2c_do_msg] native defer
>[  422.985616] [drm:drm_dp_i2c_do_msg] native defer
>[  422.987024] [drm:drm_dp_i2c_do_msg] native defer
>[  422.988476] [drm:drm_dp_i2c_do_msg] native defer
>[  422.990034] [drm:drm_dp_i2c_do_msg] native defer
>[  422.991063] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  422.991739] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  422.992285] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  422.992370] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  422.992392] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  422.997861] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  422.997882] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  422.997901] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  422.997919] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  422.997935] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  422.997951] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  422.998455] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  422.999283] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  422.999287] [drm:drm_mode_debug_printmodeline] Modeline 50:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  422.999289] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  422.999430] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  422.999449] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  422.999464] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  422.999480] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  422.999851] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  422.999877] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  423.000312] [drm:drm_dp_i2c_do_msg] native defer
>[  423.001592] [drm:drm_dp_i2c_do_msg] native defer
>[  423.002761] [drm:drm_dp_i2c_do_msg] native defer
>[  423.004025] [drm:drm_dp_i2c_do_msg] native defer
>[  423.005319] [drm:drm_dp_i2c_do_msg] native defer
>[  423.006177] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  423.006630] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  423.006967] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  423.006991] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  423.006997] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  423.007243] [IGT] kms_pipe_crc_basic: starting subtest bad-nb-words-1
>[  423.007332] [drm:display_crc_ctl_write [i915]] tokenize failed, a command is 3 words
>[  423.007393] [IGT] kms_pipe_crc_basic: exiting, ret=0
>[  423.017945] Console: switching to colour frame buffer device 240x67
>[  423.244108] Console: switching to colour dummy device 80x25
>[  423.244427] [IGT] kms_pipe_crc_basic: executing
>[  423.273916] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  423.274013] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  423.274094] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  423.274273] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  423.274352] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  423.274424] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  423.275226] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  423.276474] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  423.276487] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  423.276495] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  423.276543] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  423.276614] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  423.276668] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  423.276741] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  423.277427] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  423.277505] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  423.278010] [drm:drm_dp_i2c_do_msg] native defer
>[  423.279469] [drm:drm_dp_i2c_do_msg] native defer
>[  423.281009] [drm:drm_dp_i2c_do_msg] native defer
>[  423.282478] [drm:drm_dp_i2c_do_msg] native defer
>[  423.283961] [drm:drm_dp_i2c_do_msg] native defer
>[  423.284992] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  423.285642] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  423.286195] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  423.286274] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  423.286295] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  423.294906] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  423.294985] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  423.295057] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  423.295181] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  423.295256] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  423.295323] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  423.296093] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  423.297307] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  423.297321] [drm:drm_mode_debug_printmodeline] Modeline 50:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  423.297329] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  423.297886] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  423.297963] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  423.298018] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  423.298076] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  423.298748] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  423.298825] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  423.299338] [drm:drm_dp_i2c_do_msg] native defer
>[  423.300893] [drm:drm_dp_i2c_do_msg] native defer
>[  423.302369] [drm:drm_dp_i2c_do_msg] native defer
>[  423.303883] [drm:drm_dp_i2c_do_msg] native defer
>[  423.305304] [drm:drm_dp_i2c_do_msg] native defer
>[  423.306311] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  423.306953] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  423.307465] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  423.307543] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  423.307562] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  423.308348] [IGT] kms_pipe_crc_basic: starting subtest bad-nb-words-3
>[  423.308514] [drm:display_crc_ctl_write [i915]] too many words, allowed <= 3
>[  423.308567] [drm:display_crc_ctl_write [i915]] tokenize failed, a command is 3 words
>[  423.308741] [IGT] kms_pipe_crc_basic: exiting, ret=0
>[  423.327790] Console: switching to colour frame buffer device 240x67
>[  423.554299] Console: switching to colour dummy device 80x25
>[  423.554492] [IGT] kms_pipe_crc_basic: executing
>[  423.568308] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  423.568403] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  423.568483] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  423.568557] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  423.568626] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  423.568693] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  423.569930] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  423.571154] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  423.571172] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  423.571180] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  423.571229] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  423.571304] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  423.571361] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  423.571438] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  423.572014] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  423.572090] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  423.572680] [drm:drm_dp_i2c_do_msg] native defer
>[  423.574111] [drm:drm_dp_i2c_do_msg] native defer
>[  423.575669] [drm:drm_dp_i2c_do_msg] native defer
>[  423.577123] [drm:drm_dp_i2c_do_msg] native defer
>[  423.578661] [drm:drm_dp_i2c_do_msg] native defer
>[  423.579628] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  423.580298] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  423.580811] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  423.580890] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  423.580909] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  423.589692] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  423.589769] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  423.589845] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  423.589914] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  423.589979] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  423.590038] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  423.590857] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  423.592185] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  423.592201] [drm:drm_mode_debug_printmodeline] Modeline 50:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  423.592209] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  423.592700] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  423.592780] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  423.592835] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  423.592910] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  423.593555] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  423.593657] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  423.594232] [drm:drm_dp_i2c_do_msg] native defer
>[  423.595744] [drm:drm_dp_i2c_do_msg] native defer
>[  423.597202] [drm:drm_dp_i2c_do_msg] native defer
>[  423.598741] [drm:drm_dp_i2c_do_msg] native defer
>[  423.600126] [drm:drm_dp_i2c_do_msg] native defer
>[  423.601243] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  423.601886] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  423.602465] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  423.602544] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  423.602563] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  423.603424] [IGT] kms_pipe_crc_basic: starting subtest bad-pipe
>[  423.603588] [drm:display_crc_ctl_write [i915]] unknown pipe D
>[  423.603787] [IGT] kms_pipe_crc_basic: exiting, ret=0
>[  423.622845] Console: switching to colour frame buffer device 240x67
>[  423.820669] Console: switching to colour dummy device 80x25
>[  423.820984] [IGT] kms_pipe_crc_basic: executing
>[  423.836202] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  423.836292] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  423.836371] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  423.836445] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  423.836514] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  423.836582] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  423.837377] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  423.838548] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  423.838562] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  423.838570] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  423.838620] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  423.838695] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  423.838750] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  423.838823] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  423.839493] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  423.839593] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  423.840168] [drm:drm_dp_i2c_do_msg] native defer
>[  423.841689] [drm:drm_dp_i2c_do_msg] native defer
>[  423.843113] [drm:drm_dp_i2c_do_msg] native defer
>[  423.844627] [drm:drm_dp_i2c_do_msg] native defer
>[  423.846005] [drm:drm_dp_i2c_do_msg] native defer
>[  423.847015] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  423.847660] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  423.848222] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  423.848301] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  423.848322] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  423.856970] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  423.857047] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  423.857175] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  423.857253] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  423.857320] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  423.857383] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  423.858078] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  423.859411] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  423.859425] [drm:drm_mode_debug_printmodeline] Modeline 50:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  423.859432] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  423.859913] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  423.859965] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  423.860003] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  423.860050] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  423.860577] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  423.860631] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  423.861142] [drm:drm_dp_i2c_do_msg] native defer
>[  423.862477] [drm:drm_dp_i2c_do_msg] native defer
>[  423.863864] [drm:drm_dp_i2c_do_msg] native defer
>[  423.865226] [drm:drm_dp_i2c_do_msg] native defer
>[  423.866610] [drm:drm_dp_i2c_do_msg] native defer
>[  423.867440] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  423.867994] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  423.868422] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  423.868477] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  423.868491] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  423.869026] [IGT] kms_pipe_crc_basic: starting subtest bad-source
>[  423.869312] [drm:intel_crtc_set_crc_source [i915]] unknown source foo
>[  423.869436] [IGT] kms_pipe_crc_basic: exiting, ret=0
>[  423.880938] Console: switching to colour frame buffer device 240x67
>[  424.084668] Console: switching to colour dummy device 80x25
>[  424.084827] [IGT] kms_pipe_crc_basic: executing
>[  424.113714] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  424.113807] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  424.113888] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  424.113962] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  424.114031] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  424.114098] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  424.114899] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  424.116193] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  424.116209] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  424.116217] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  424.116268] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  424.116348] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  424.116403] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  424.116480] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  424.117114] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  424.117246] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  424.117778] [drm:drm_dp_i2c_do_msg] native defer
>[  424.119167] [drm:drm_dp_i2c_do_msg] native defer
>[  424.120701] [drm:drm_dp_i2c_do_msg] native defer
>[  424.122123] [drm:drm_dp_i2c_do_msg] native defer
>[  424.123654] [drm:drm_dp_i2c_do_msg] native defer
>[  424.124648] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  424.125327] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  424.125841] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  424.125920] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  424.125939] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  424.134618] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  424.134698] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  424.134772] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  424.134842] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  424.134907] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  424.134969] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  424.135721] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  424.136928] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  424.136944] [drm:drm_mode_debug_printmodeline] Modeline 50:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  424.136952] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  424.137570] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  424.137651] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  424.137707] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  424.137780] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  424.138448] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  424.138527] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  424.139031] [drm:drm_dp_i2c_do_msg] native defer
>[  424.140511] [drm:drm_dp_i2c_do_msg] native defer
>[  424.141979] [drm:drm_dp_i2c_do_msg] native defer
>[  424.143451] [drm:drm_dp_i2c_do_msg] native defer
>[  424.144953] [drm:drm_dp_i2c_do_msg] native defer
>[  424.145977] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  424.146675] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  424.147249] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  424.147332] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  424.147352] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  424.148052] [IGT] kms_pipe_crc_basic: starting subtest hang-read-crc-pipe-A
>[  424.172767] [IGT] kms_pipe_crc_basic: exiting, ret=99
>[  424.190865] Console: switching to colour frame buffer device 240x67
>[  424.416838] Console: switching to colour dummy device 80x25
>[  424.417149] [IGT] kms_pipe_crc_basic: executing
>[  424.431223] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  424.431321] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  424.431400] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  424.431474] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  424.431540] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  424.431607] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  424.432391] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  424.433568] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  424.433583] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  424.433591] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  424.433643] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  424.433717] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  424.433771] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  424.433844] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  424.434502] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  424.434586] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  424.435194] [drm:drm_dp_i2c_do_msg] native defer
>[  424.436733] [drm:drm_dp_i2c_do_msg] native defer
>[  424.438138] [drm:drm_dp_i2c_do_msg] native defer
>[  424.439691] [drm:drm_dp_i2c_do_msg] native defer
>[  424.441104] [drm:drm_dp_i2c_do_msg] native defer
>[  424.442120] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  424.442846] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  424.443435] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  424.443514] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  424.443534] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  424.452135] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  424.452212] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  424.452285] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  424.452355] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  424.452420] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  424.452480] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  424.453233] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  424.454465] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  424.454480] [drm:drm_mode_debug_printmodeline] Modeline 50:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  424.454489] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  424.455042] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  424.455120] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  424.455279] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  424.455345] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  424.455904] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  424.455981] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  424.456486] [drm:drm_dp_i2c_do_msg] native defer
>[  424.457959] [drm:drm_dp_i2c_do_msg] native defer
>[  424.459398] [drm:drm_dp_i2c_do_msg] native defer
>[  424.460910] [drm:drm_dp_i2c_do_msg] native defer
>[  424.462345] [drm:drm_dp_i2c_do_msg] native defer
>[  424.463422] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  424.464072] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  424.464638] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  424.464717] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  424.464736] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  424.465515] [IGT] kms_pipe_crc_basic: starting subtest hang-read-crc-pipe-B
>[  424.468738] [IGT] kms_pipe_crc_basic: exiting, ret=99
>[  424.488819] Console: switching to colour frame buffer device 240x67
>[  424.721855] Console: switching to colour dummy device 80x25
>[  424.722251] [IGT] kms_pipe_crc_basic: executing
>[  424.738222] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  424.738318] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  424.738397] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  424.738472] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  424.738541] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  424.738608] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  424.739368] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  424.740582] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  424.740598] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  424.740606] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  424.740657] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  424.740735] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  424.740791] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  424.740865] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  424.741482] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  424.741564] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  424.742164] [drm:drm_dp_i2c_do_msg] native defer
>[  424.743705] [drm:drm_dp_i2c_do_msg] native defer
>[  424.745126] [drm:drm_dp_i2c_do_msg] native defer
>[  424.746674] [drm:drm_dp_i2c_do_msg] native defer
>[  424.748033] [drm:drm_dp_i2c_do_msg] native defer
>[  424.749043] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  424.749754] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  424.750259] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  424.750338] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  424.750357] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  424.758856] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  424.758934] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  424.759007] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  424.759078] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  424.759198] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  424.759272] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  424.759969] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  424.761204] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  424.761219] [drm:drm_mode_debug_printmodeline] Modeline 50:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  424.761227] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  424.761755] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  424.761837] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  424.761893] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  424.761963] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  424.762586] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  424.762665] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  424.763210] [drm:drm_dp_i2c_do_msg] native defer
>[  424.764735] [drm:drm_dp_i2c_do_msg] native defer
>[  424.766145] [drm:drm_dp_i2c_do_msg] native defer
>[  424.767684] [drm:drm_dp_i2c_do_msg] native defer
>[  424.769053] [drm:drm_dp_i2c_do_msg] native defer
>[  424.770116] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  424.770830] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  424.771412] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  424.771491] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  424.771510] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  424.772391] [IGT] kms_pipe_crc_basic: starting subtest hang-read-crc-pipe-C
>[  424.775389] [IGT] kms_pipe_crc_basic: exiting, ret=99
>[  424.790906] Console: switching to colour frame buffer device 240x67
>[  425.006336] Console: switching to colour dummy device 80x25
>[  425.006474] [IGT] kms_pipe_crc_basic: executing
>[  425.027708] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  425.027818] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  425.027894] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  425.027966] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  425.028031] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  425.028092] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  425.028887] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  425.030166] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  425.030181] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  425.030190] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  425.030240] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  425.030323] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  425.030379] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  425.030454] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  425.031039] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  425.031192] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 1 ms
>[  425.031707] [drm:drm_dp_i2c_do_msg] native defer
>[  425.033123] [drm:drm_dp_i2c_do_msg] native defer
>[  425.034683] [drm:drm_dp_i2c_do_msg] native defer
>[  425.036117] [drm:drm_dp_i2c_do_msg] native defer
>[  425.037663] [drm:drm_dp_i2c_do_msg] native defer
>[  425.038617] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  425.039301] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  425.039819] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  425.039898] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  425.039918] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  425.048633] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  425.048709] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  425.048782] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  425.048852] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  425.048916] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  425.048977] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  425.049745] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  425.051099] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  425.051115] [drm:drm_mode_debug_printmodeline] Modeline 50:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  425.051123] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  425.051581] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  425.051658] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  425.051714] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  425.051790] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  425.052456] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  425.052536] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  425.053040] [drm:drm_dp_i2c_do_msg] native defer
>[  425.054602] [drm:drm_dp_i2c_do_msg] native defer
>[  425.055994] [drm:drm_dp_i2c_do_msg] native defer
>[  425.057464] [drm:drm_dp_i2c_do_msg] native defer
>[  425.058947] [drm:drm_dp_i2c_do_msg] native defer
>[  425.059970] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  425.060626] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  425.061192] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  425.061272] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  425.061292] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  425.062048] [IGT] kms_pipe_crc_basic: starting subtest nonblocking-crc-pipe-A
>[  425.065410] [IGT] kms_pipe_crc_basic: exiting, ret=99
>[  425.081765] Console: switching to colour frame buffer device 240x67
>[  425.286433] Console: switching to colour dummy device 80x25
>[  425.286533] [IGT] kms_pipe_crc_basic: executing
>[  425.296512] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  425.296546] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  425.296571] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  425.296593] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  425.296613] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  425.296633] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  425.297145] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  425.297943] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  425.297947] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  425.297949] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  425.297966] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  425.297989] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  425.298005] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  425.298023] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  425.298419] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  425.298446] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  425.298881] [drm:drm_dp_i2c_do_msg] native defer
>[  425.300173] [drm:drm_dp_i2c_do_msg] native defer
>[  425.301461] [drm:drm_dp_i2c_do_msg] native defer
>[  425.302788] [drm:drm_dp_i2c_do_msg] native defer
>[  425.304051] [drm:drm_dp_i2c_do_msg] native defer
>[  425.304904] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  425.305375] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  425.305710] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  425.305735] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  425.305740] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  425.308237] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  425.308261] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  425.308283] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  425.308303] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  425.308322] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  425.308341] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  425.308826] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  425.309620] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  425.309625] [drm:drm_mode_debug_printmodeline] Modeline 50:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  425.309627] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  425.309783] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  425.309805] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  425.309821] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  425.309839] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  425.310213] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  425.310242] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  425.310679] [drm:drm_dp_i2c_do_msg] native defer
>[  425.311896] [drm:drm_dp_i2c_do_msg] native defer
>[  425.313187] [drm:drm_dp_i2c_do_msg] native defer
>[  425.314463] [drm:drm_dp_i2c_do_msg] native defer
>[  425.315781] [drm:drm_dp_i2c_do_msg] native defer
>[  425.316624] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  425.317075] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  425.317435] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  425.317461] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  425.317467] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  425.317676] [IGT] kms_pipe_crc_basic: starting subtest nonblocking-crc-pipe-A-frame-sequence
>[  425.318751] [IGT] kms_pipe_crc_basic: exiting, ret=99
>[  425.329721] Console: switching to colour frame buffer device 240x67
>[  425.513188] Console: switching to colour dummy device 80x25
>[  425.513412] [IGT] kms_pipe_crc_basic: executing
>[  425.542901] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  425.542993] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  425.543075] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  425.543255] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  425.543335] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  425.543406] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  425.544206] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  425.545443] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  425.545457] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  425.545465] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  425.545512] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  425.545582] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  425.545637] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  425.545704] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  425.546326] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  425.546407] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  425.546920] [drm:drm_dp_i2c_do_msg] native defer
>[  425.548380] [drm:drm_dp_i2c_do_msg] native defer
>[  425.549902] [drm:drm_dp_i2c_do_msg] native defer
>[  425.551362] [drm:drm_dp_i2c_do_msg] native defer
>[  425.552883] [drm:drm_dp_i2c_do_msg] native defer
>[  425.553844] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  425.554577] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  425.555086] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  425.555224] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  425.555255] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  425.563861] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  425.563937] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  425.564009] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  425.564077] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  425.564198] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  425.564274] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  425.565045] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  425.566288] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  425.566302] [drm:drm_mode_debug_printmodeline] Modeline 50:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  425.566310] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  425.566855] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  425.566930] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  425.566985] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  425.567059] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  425.567733] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  425.567812] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  425.568331] [drm:drm_dp_i2c_do_msg] native defer
>[  425.569901] [drm:drm_dp_i2c_do_msg] native defer
>[  425.571338] [drm:drm_dp_i2c_do_msg] native defer
>[  425.572898] [drm:drm_dp_i2c_do_msg] native defer
>[  425.574311] [drm:drm_dp_i2c_do_msg] native defer
>[  425.575332] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  425.575985] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  425.576526] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  425.576605] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  425.576624] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  425.577476] [IGT] kms_pipe_crc_basic: starting subtest nonblocking-crc-pipe-B
>[  425.580774] [IGT] kms_pipe_crc_basic: exiting, ret=99
>[  425.596817] Console: switching to colour frame buffer device 240x67
>[  425.814877] Console: switching to colour dummy device 80x25
>[  425.815013] [IGT] kms_pipe_crc_basic: executing
>[  425.836880] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  425.836984] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  425.837066] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  425.837219] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  425.837302] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  425.837376] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  425.838087] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  425.839301] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  425.839315] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  425.839323] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  425.839372] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  425.839443] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  425.839498] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  425.839556] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  425.840103] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  425.840239] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  425.840776] [drm:drm_dp_i2c_do_msg] native defer
>[  425.842138] [drm:drm_dp_i2c_do_msg] native defer
>[  425.843636] [drm:drm_dp_i2c_do_msg] native defer
>[  425.845034] [drm:drm_dp_i2c_do_msg] native defer
>[  425.846485] [drm:drm_dp_i2c_do_msg] native defer
>[  425.847514] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  425.848240] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  425.848756] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  425.848835] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  425.848854] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  425.857409] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  425.857493] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  425.857565] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  425.857634] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  425.857698] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  425.857759] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  425.858551] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  425.859756] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  425.859769] [drm:drm_mode_debug_printmodeline] Modeline 50:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  425.859777] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  425.860463] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  425.860539] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  425.860594] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  425.860670] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  425.861289] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  425.861374] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  425.861884] [drm:drm_dp_i2c_do_msg] native defer
>[  425.863313] [drm:drm_dp_i2c_do_msg] native defer
>[  425.864874] [drm:drm_dp_i2c_do_msg] native defer
>[  425.866314] [drm:drm_dp_i2c_do_msg] native defer
>[  425.867895] [drm:drm_dp_i2c_do_msg] native defer
>[  425.868878] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  425.869591] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  425.870092] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  425.870262] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  425.870289] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  425.871198] [IGT] kms_pipe_crc_basic: starting subtest nonblocking-crc-pipe-B-frame-sequence
>[  425.874364] [IGT] kms_pipe_crc_basic: exiting, ret=99
>[  425.898009] Console: switching to colour frame buffer device 240x67
>[  426.064269] Console: switching to colour dummy device 80x25
>[  426.064360] [IGT] kms_pipe_crc_basic: executing
>[  426.074888] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  426.074938] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  426.074981] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  426.075020] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  426.075057] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  426.075141] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  426.075719] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  426.076686] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  426.076695] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  426.076699] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  426.076728] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  426.076772] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  426.076804] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  426.076846] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  426.077369] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  426.077415] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  426.077879] [drm:drm_dp_i2c_do_msg] native defer
>[  426.079163] [drm:drm_dp_i2c_do_msg] native defer
>[  426.080497] [drm:drm_dp_i2c_do_msg] native defer
>[  426.081815] [drm:drm_dp_i2c_do_msg] native defer
>[  426.083087] [drm:drm_dp_i2c_do_msg] native defer
>[  426.083969] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  426.084481] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  426.084851] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  426.084882] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  426.084889] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  426.088086] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  426.088115] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  426.088143] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  426.088169] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  426.088193] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  426.088216] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  426.088726] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  426.089588] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  426.089593] [drm:drm_mode_debug_printmodeline] Modeline 50:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  426.089596] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  426.089767] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  426.089796] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  426.089817] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  426.089839] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  426.090237] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  426.090270] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  426.090716] [drm:drm_dp_i2c_do_msg] native defer
>[  426.091947] [drm:drm_dp_i2c_do_msg] native defer
>[  426.093252] [drm:drm_dp_i2c_do_msg] native defer
>[  426.094555] [drm:drm_dp_i2c_do_msg] native defer
>[  426.095812] [drm:drm_dp_i2c_do_msg] native defer
>[  426.096629] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  426.097123] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  426.097483] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  426.097514] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  426.097521] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  426.097806] [IGT] kms_pipe_crc_basic: starting subtest nonblocking-crc-pipe-C
>[  426.099045] [IGT] kms_pipe_crc_basic: exiting, ret=99
>[  426.112793] Console: switching to colour frame buffer device 240x67
>[  426.310858] Console: switching to colour dummy device 80x25
>[  426.311159] [IGT] kms_pipe_crc_basic: executing
>[  426.325221] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  426.325316] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  426.325395] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  426.325469] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  426.325538] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  426.325605] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  426.326389] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  426.327676] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  426.327692] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  426.327700] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  426.327751] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  426.327830] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  426.327885] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  426.327962] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  426.328565] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  426.328644] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  426.329190] [drm:drm_dp_i2c_do_msg] native defer
>[  426.330694] [drm:drm_dp_i2c_do_msg] native defer
>[  426.332141] [drm:drm_dp_i2c_do_msg] native defer
>[  426.333661] [drm:drm_dp_i2c_do_msg] native defer
>[  426.335015] [drm:drm_dp_i2c_do_msg] native defer
>[  426.336026] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  426.336751] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  426.337291] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  426.337373] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  426.337393] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  426.345978] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  426.346057] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  426.346189] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  426.346268] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  426.346339] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  426.346403] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  426.347204] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  426.348418] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  426.348432] [drm:drm_mode_debug_printmodeline] Modeline 50:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  426.348440] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  426.348978] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  426.349053] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  426.349166] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  426.349237] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  426.349789] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  426.349866] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  426.350370] [drm:drm_dp_i2c_do_msg] native defer
>[  426.351864] [drm:drm_dp_i2c_do_msg] native defer
>[  426.353262] [drm:drm_dp_i2c_do_msg] native defer
>[  426.354696] [drm:drm_dp_i2c_do_msg] native defer
>[  426.356054] [drm:drm_dp_i2c_do_msg] native defer
>[  426.357098] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  426.357810] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  426.358388] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  426.358467] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  426.358486] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  426.359314] [IGT] kms_pipe_crc_basic: starting subtest nonblocking-crc-pipe-C-frame-sequence
>[  426.362522] [IGT] kms_pipe_crc_basic: exiting, ret=99
>[  426.377859] Console: switching to colour frame buffer device 240x67
>[  426.597927] Console: switching to colour dummy device 80x25
>[  426.598039] [IGT] kms_pipe_crc_basic: executing
>[  426.625836] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  426.625929] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  426.626008] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  426.626083] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  426.626278] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  426.626357] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  426.627106] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  426.628453] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  426.628467] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  426.628474] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  426.628521] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  426.628594] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  426.628649] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  426.628723] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  426.629317] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  426.629416] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  426.629940] [drm:drm_dp_i2c_do_msg] native defer
>[  426.631398] [drm:drm_dp_i2c_do_msg] native defer
>[  426.632913] [drm:drm_dp_i2c_do_msg] native defer
>[  426.634362] [drm:drm_dp_i2c_do_msg] native defer
>[  426.635878] [drm:drm_dp_i2c_do_msg] native defer
>[  426.636854] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  426.637568] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  426.638078] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  426.638250] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  426.638281] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  426.647003] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  426.647082] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  426.647256] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  426.647357] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  426.647433] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  426.647517] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  426.648314] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  426.649571] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  426.649587] [drm:drm_mode_debug_printmodeline] Modeline 50:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  426.649595] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  426.650241] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  426.650332] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  426.650391] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  426.650448] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  426.651012] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  426.651088] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  426.651663] [drm:drm_dp_i2c_do_msg] native defer
>[  426.653123] [drm:drm_dp_i2c_do_msg] native defer
>[  426.654666] [drm:drm_dp_i2c_do_msg] native defer
>[  426.656142] [drm:drm_dp_i2c_do_msg] native defer
>[  426.657678] [drm:drm_dp_i2c_do_msg] native defer
>[  426.658671] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  426.659318] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  426.659819] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  426.659897] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  426.659916] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  426.660692] [IGT] kms_pipe_crc_basic: starting subtest read-crc-pipe-A
>[  426.663864] [IGT] kms_pipe_crc_basic: exiting, ret=99
>[  426.679857] Console: switching to colour frame buffer device 240x67
>[  426.988538] Console: switching to colour dummy device 80x25
>[  426.988647] [IGT] kms_pipe_crc_basic: executing
>[  427.010803] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  427.010873] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  427.010935] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  427.010992] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  427.011043] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  427.011093] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  427.011846] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  427.012952] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  427.012962] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  427.012968] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  427.013005] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  427.013059] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  427.013175] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  427.013240] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  427.013758] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  427.013817] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  427.014298] [drm:drm_dp_i2c_do_msg] native defer
>[  427.015772] [drm:drm_dp_i2c_do_msg] native defer
>[  427.017147] [drm:drm_dp_i2c_do_msg] native defer
>[  427.018674] [drm:drm_dp_i2c_do_msg] native defer
>[  427.020133] [drm:drm_dp_i2c_do_msg] native defer
>[  427.021253] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  427.021889] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  427.022485] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  427.022566] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  427.022585] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  427.031391] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  427.031471] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  427.031544] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  427.031614] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  427.031678] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  427.031741] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  427.032573] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  427.033824] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  427.033839] [drm:drm_mode_debug_printmodeline] Modeline 50:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  427.033847] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  427.034460] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  427.034540] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  427.034596] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  427.034665] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  427.035266] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  427.035344] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  427.035849] [drm:drm_dp_i2c_do_msg] native defer
>[  427.037325] [drm:drm_dp_i2c_do_msg] native defer
>[  427.038888] [drm:drm_dp_i2c_do_msg] native defer
>[  427.040306] [drm:drm_dp_i2c_do_msg] native defer
>[  427.041781] [drm:drm_dp_i2c_do_msg] native defer
>[  427.042717] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  427.043363] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  427.043862] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  427.043940] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  427.043959] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  427.044851] [IGT] kms_pipe_crc_basic: starting subtest read-crc-pipe-A-frame-sequence
>[  427.048114] [IGT] kms_pipe_crc_basic: exiting, ret=99
>[  427.064877] Console: switching to colour frame buffer device 240x67
>[  427.268778] Console: switching to colour dummy device 80x25
>[  427.268919] [IGT] kms_pipe_crc_basic: executing
>[  427.290765] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  427.290859] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  427.290940] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  427.291013] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  427.291080] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  427.291275] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  427.292015] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  427.293293] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  427.293307] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  427.293315] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  427.293361] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  427.293436] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  427.293490] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  427.293567] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  427.294239] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  427.294336] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  427.294861] [drm:drm_dp_i2c_do_msg] native defer
>[  427.296269] [drm:drm_dp_i2c_do_msg] native defer
>[  427.297765] [drm:drm_dp_i2c_do_msg] native defer
>[  427.299134] [drm:drm_dp_i2c_do_msg] native defer
>[  427.300663] [drm:drm_dp_i2c_do_msg] native defer
>[  427.301615] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  427.302295] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  427.302809] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  427.302888] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  427.302907] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  427.311489] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  427.311567] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  427.311641] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  427.311710] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  427.311775] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  427.311838] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  427.312605] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  427.313764] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  427.313777] [drm:drm_mode_debug_printmodeline] Modeline 50:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  427.313785] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  427.314276] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  427.314350] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  427.314405] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  427.314463] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  427.315023] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  427.315098] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  427.315658] [drm:drm_dp_i2c_do_msg] native defer
>[  427.317036] [drm:drm_dp_i2c_do_msg] native defer
>[  427.318466] [drm:drm_dp_i2c_do_msg] native defer
>[  427.319950] [drm:drm_dp_i2c_do_msg] native defer
>[  427.321430] [drm:drm_dp_i2c_do_msg] native defer
>[  427.322502] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  427.323215] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  427.323718] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  427.323796] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  427.323814] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  427.324617] [IGT] kms_pipe_crc_basic: starting subtest read-crc-pipe-B
>[  427.327825] [IGT] kms_pipe_crc_basic: exiting, ret=99
>[  427.343846] Console: switching to colour frame buffer device 240x67
>[  427.551687] Console: switching to colour dummy device 80x25
>[  427.552000] [IGT] kms_pipe_crc_basic: executing
>[  427.577877] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  427.577969] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  427.578052] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  427.578206] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  427.578290] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  427.578363] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  427.579075] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  427.580263] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  427.580277] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  427.580284] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  427.580333] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  427.580406] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  427.580460] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  427.580534] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  427.581103] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  427.581236] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  427.581745] [drm:drm_dp_i2c_do_msg] native defer
>[  427.583116] [drm:drm_dp_i2c_do_msg] native defer
>[  427.584638] [drm:drm_dp_i2c_do_msg] native defer
>[  427.586147] [drm:drm_dp_i2c_do_msg] native defer
>[  427.587691] [drm:drm_dp_i2c_do_msg] native defer
>[  427.588616] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  427.589289] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  427.589838] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  427.589919] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  427.589938] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  427.598670] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  427.598751] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  427.598825] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  427.598894] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  427.598959] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  427.599022] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  427.599774] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  427.600965] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  427.600979] [drm:drm_mode_debug_printmodeline] Modeline 50:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  427.600987] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  427.601590] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  427.601663] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  427.601718] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  427.601793] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  427.602446] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  427.602523] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  427.603025] [drm:drm_dp_i2c_do_msg] native defer
>[  427.604428] [drm:drm_dp_i2c_do_msg] native defer
>[  427.606013] [drm:drm_dp_i2c_do_msg] native defer
>[  427.607431] [drm:drm_dp_i2c_do_msg] native defer
>[  427.608956] [drm:drm_dp_i2c_do_msg] native defer
>[  427.609981] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  427.610634] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  427.611202] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  427.611281] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  427.611302] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  427.612021] [IGT] kms_pipe_crc_basic: starting subtest read-crc-pipe-B-frame-sequence
>[  427.615102] [IGT] kms_pipe_crc_basic: exiting, ret=99
>[  427.631013] Console: switching to colour frame buffer device 240x67
>[  427.830388] Console: switching to colour dummy device 80x25
>[  427.830528] [IGT] kms_pipe_crc_basic: executing
>[  427.852830] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  427.852932] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  427.853012] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  427.853085] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  427.853248] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  427.853324] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  427.854079] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  427.855428] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  427.855442] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  427.855450] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  427.855498] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  427.855571] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  427.855625] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  427.855698] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  427.856320] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  427.856403] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  427.856913] [drm:drm_dp_i2c_do_msg] native defer
>[  427.858386] [drm:drm_dp_i2c_do_msg] native defer
>[  427.859903] [drm:drm_dp_i2c_do_msg] native defer
>[  427.861323] [drm:drm_dp_i2c_do_msg] native defer
>[  427.862862] [drm:drm_dp_i2c_do_msg] native defer
>[  427.863860] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  427.864592] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  427.865111] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  427.865242] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  427.865262] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  427.873795] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  427.873881] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  427.873955] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  427.874025] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  427.874090] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  427.874211] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  427.874914] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  427.876193] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  427.876209] [drm:drm_mode_debug_printmodeline] Modeline 50:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  427.876217] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  427.876766] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  427.876844] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  427.876899] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  427.876956] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  427.877648] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  427.877727] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  427.878242] [drm:drm_dp_i2c_do_msg] native defer
>[  427.879666] [drm:drm_dp_i2c_do_msg] native defer
>[  427.881122] [drm:drm_dp_i2c_do_msg] native defer
>[  427.882689] [drm:drm_dp_i2c_do_msg] native defer
>[  427.884131] [drm:drm_dp_i2c_do_msg] native defer
>[  427.885219] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  427.885865] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  427.886444] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  427.886522] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  427.886541] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  427.887306] [IGT] kms_pipe_crc_basic: starting subtest read-crc-pipe-C
>[  427.890710] [IGT] kms_pipe_crc_basic: exiting, ret=99
>[  427.907777] Console: switching to colour frame buffer device 240x67
>[  428.136726] Console: switching to colour dummy device 80x25
>[  428.136948] [IGT] kms_pipe_crc_basic: executing
>[  428.151216] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  428.151308] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  428.151387] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  428.151461] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  428.151529] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  428.151596] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  428.152406] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  428.153673] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  428.153689] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  428.153697] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  428.153748] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  428.153842] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  428.153897] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  428.153970] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  428.154570] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  428.154651] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  428.155187] [drm:drm_dp_i2c_do_msg] native defer
>[  428.156687] [drm:drm_dp_i2c_do_msg] native defer
>[  428.158050] [drm:drm_dp_i2c_do_msg] native defer
>[  428.159636] [drm:drm_dp_i2c_do_msg] native defer
>[  428.161044] [drm:drm_dp_i2c_do_msg] native defer
>[  428.162113] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  428.162820] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  428.163397] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  428.163476] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  428.163496] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  428.172118] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  428.172196] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  428.172269] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  428.172338] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  428.172404] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  428.172468] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  428.173255] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  428.174475] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  428.174488] [drm:drm_mode_debug_printmodeline] Modeline 50:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  428.174496] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  428.175017] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  428.175088] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  428.175217] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  428.175279] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  428.175851] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  428.175927] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  428.176431] [drm:drm_dp_i2c_do_msg] native defer
>[  428.177900] [drm:drm_dp_i2c_do_msg] native defer
>[  428.179330] [drm:drm_dp_i2c_do_msg] native defer
>[  428.180853] [drm:drm_dp_i2c_do_msg] native defer
>[  428.182329] [drm:drm_dp_i2c_do_msg] native defer
>[  428.183415] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  428.184054] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  428.184608] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  428.184686] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  428.184705] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  428.185545] [IGT] kms_pipe_crc_basic: starting subtest read-crc-pipe-C-frame-sequence
>[  428.188678] [IGT] kms_pipe_crc_basic: exiting, ret=99
>[  428.203926] Console: switching to colour frame buffer device 240x67
>[  428.432787] Console: switching to colour dummy device 80x25
>[  428.433208] [IGT] kms_pipe_crc_basic: executing
>[  428.458739] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  428.458837] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  428.458918] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  428.458993] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  428.459062] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  428.459215] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  428.459981] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  428.461174] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  428.461189] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  428.461196] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  428.461243] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  428.461316] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  428.461370] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  428.461441] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  428.462009] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  428.462085] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  428.462669] [drm:drm_dp_i2c_do_msg] native defer
>[  428.464028] [drm:drm_dp_i2c_do_msg] native defer
>[  428.465481] [drm:drm_dp_i2c_do_msg] native defer
>[  428.466999] [drm:drm_dp_i2c_do_msg] native defer
>[  428.468473] [drm:drm_dp_i2c_do_msg] native defer
>[  428.469546] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  428.470256] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  428.470771] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  428.470850] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  428.470869] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  428.479533] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  428.479610] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  428.479684] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  428.479753] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  428.479817] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  428.479879] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  428.480670] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  428.481867] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  428.481883] [drm:drm_mode_debug_printmodeline] Modeline 50:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  428.481891] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH
>[  428.482430] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  428.482526] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  428.482583] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  428.482641] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  428.483234] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  428.483313] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  428.483813] [drm:drm_dp_i2c_do_msg] native defer
>[  428.485266] [drm:drm_dp_i2c_do_msg] native defer
>[  428.486741] [drm:drm_dp_i2c_do_msg] native defer
>[  428.488146] [drm:drm_dp_i2c_do_msg] native defer
>[  428.489691] [drm:drm_dp_i2c_do_msg] native defer
>[  428.490648] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  428.491302] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  428.491810] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  428.491888] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  428.491907] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  428.492723] [IGT] kms_pipe_crc_basic: starting subtest suspend-read-crc-pipe-A
>[  428.658243] PM: Syncing filesystems ... done.
>[  428.665846] PM: Preparing system for sleep (mem)
>[  428.674109] Freezing user space processes ... (elapsed 0.002 seconds) done.
>[  428.676364] OOM killer disabled.
>[  428.676370] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
>[  428.678336] PM: Suspending system (mem)
>[  428.678578] Suspending console(s) (use no_console_suspend to debug)
>[  428.682617] sd 2:0:0:0: [sda] Synchronizing SCSI cache
>[  428.682859] sd 2:0:0:0: [sda] Stopping disk
>[  428.692024] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  428.692106] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  428.692276] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  428.692328] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  428.692375] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  428.692425] [drm:skl_set_power_well [i915]] Enabling DDI B IO power well
>[  428.692472] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>[  428.692522] [drm:skl_set_power_well [i915]] Enabling DDI C IO power well
>[  428.692568] [drm:intel_power_well_enable [i915]] enabling DDI D IO power well
>[  428.692618] [drm:skl_set_power_well [i915]] Enabling DDI D IO power well
>[  428.693163] ACPI : EC: event blocked
>[  428.697967] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[  428.698091] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000000
>[  430.041837] PM: suspend of devices complete after 1360.889 msecs
>[  430.046042] [drm:intel_power_well_disable [i915]] disabling DDI D IO power well
>[  430.046137] [drm:skl_set_power_well [i915]] Disabling DDI D IO power well
>[  430.046196] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well
>[  430.046252] [drm:skl_set_power_well [i915]] Disabling DDI C IO power well
>[  430.046308] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[  430.046362] [drm:skl_set_power_well [i915]] Disabling DDI B IO power well
>[  430.046417] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  430.046471] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  430.046524] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  430.046595] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  430.046648] [drm:intel_power_well_disable [i915]] disabling DC off
>[  430.046704] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  430.046755] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  430.047196] [drm:intel_power_well_disable [i915]] disabling always-on
>[  430.047210] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  430.047346] [drm:intel_update_cdclk [i915]] Current CD clock rate: 24000 kHz, VCO: 0 kHz, ref: 24000 kHz
>[  430.047359] [drm:intel_power_well_disable [i915]] disabling MISC IO power well
>[  430.047376] [drm:skl_set_power_well [i915]] Disabling MISC IO power well
>[  430.047392] [drm:skl_set_power_well [i915]] Clearing auxiliary requests for MISC IO power well forced on by DMC
>[  430.047407] [drm:intel_power_well_disable [i915]] disabling power well 1
>[  430.047426] [drm:skl_set_power_well [i915]] Clearing auxiliary requests for power well 1 forced on by DMC
>[  430.059307] PM: late suspend of devices complete after 17.460 msecs
>[  430.060817] ACPI : EC: interrupt blocked
>[  430.069074] r8169 0000:0e:00.0: System wakeup enabled by ACPI
>[  430.069302] xhci_hcd 0000:00:14.0: System wakeup enabled by ACPI
>[  430.233198] PM: noirq suspend of devices complete after 173.883 msecs
>[  430.233945] ACPI: Preparing to enter system sleep state S3
>[  430.244439] ACPI : EC: EC stopped
>[  430.244445] PM: Saving platform NVS memory
>[  430.325495] Disabling non-boot CPUs ...
>[  430.340799] smpboot: CPU 1 is now offline
>[  430.364102] smpboot: CPU 2 is now offline
>[  430.383931] smpboot: CPU 3 is now offline
>[  430.402894] Broke affinity for irq 124
>[  430.402911] Broke affinity for irq 126
>[  430.404905] smpboot: CPU 4 is now offline
>[  430.423555] Broke affinity for irq 124
>[  430.423569] Broke affinity for irq 126
>[  430.423577] Broke affinity for irq 127
>[  430.423585] Broke affinity for irq 129
>[  430.424709] smpboot: CPU 5 is now offline
>[  430.437422] Broke affinity for irq 123
>[  430.437432] Broke affinity for irq 124
>[  430.437445] Broke affinity for irq 126
>[  430.437453] Broke affinity for irq 127
>[  430.437461] Broke affinity for irq 129
>[  430.437470] Broke affinity for irq 130
>[  430.438621] smpboot: CPU 6 is now offline
>[  430.450382] Broke affinity for irq 1
>[  430.450394] Broke affinity for irq 8
>[  430.450403] Broke affinity for irq 9
>[  430.450412] Broke affinity for irq 12
>[  430.450428] Broke affinity for irq 122
>[  430.450436] Broke affinity for irq 123
>[  430.450444] Broke affinity for irq 124
>[  430.450451] Broke affinity for irq 125
>[  430.450459] Broke affinity for irq 126
>[  430.450467] Broke affinity for irq 127
>[  430.450475] Broke affinity for irq 129
>[  430.450484] Broke affinity for irq 130
>[  430.451603] smpboot: CPU 7 is now offline
>[  430.456514] ACPI: Low-level resume complete
>[  430.456693] ACPI : EC: EC started
>[  430.456695] PM: Restoring platform NVS memory
>[  430.462333] Suspended for 14.347 seconds
>[  430.462404] Enabling non-boot CPUs ...
>[  430.462478] x86: Booting SMP configuration:
>[  430.462480] smpboot: Booting Node 0 Processor 1 APIC 0x2
>[  430.464079]  cache: parent cpu1 should not be sleeping
>[  430.464818] CPU1 is up
>[  430.464865] smpboot: Booting Node 0 Processor 2 APIC 0x4
>[  430.466228]  cache: parent cpu2 should not be sleeping
>[  430.466986] CPU2 is up
>[  430.467034] smpboot: Booting Node 0 Processor 3 APIC 0x6
>[  430.468280]  cache: parent cpu3 should not be sleeping
>[  430.469069] CPU3 is up
>[  430.469115] smpboot: Booting Node 0 Processor 4 APIC 0x1
>[  430.470435]  cache: parent cpu4 should not be sleeping
>[  430.471266] CPU4 is up
>[  430.471322] smpboot: Booting Node 0 Processor 5 APIC 0x3
>[  430.472563]  cache: parent cpu5 should not be sleeping
>[  430.473511] CPU5 is up
>[  430.473581] smpboot: Booting Node 0 Processor 6 APIC 0x5
>[  430.474963]  cache: parent cpu6 should not be sleeping
>[  430.475861] CPU6 is up
>[  430.475909] smpboot: Booting Node 0 Processor 7 APIC 0x7
>[  430.477230]  cache: parent cpu7 should not be sleeping
>[  430.478388] CPU7 is up
>[  430.522977] ACPI: Waking up from system sleep state S3
>[  430.595989] pcieport 0000:00:1c.0: Intel SPT PCH root port ACS workaround enabled
>[  430.596863] ACPI : EC: interrupt unblocked
>[  430.607839] pcieport 0000:00:1c.2: Intel SPT PCH root port ACS workaround enabled
>[  430.607845] pcieport 0000:00:1c.1: Intel SPT PCH root port ACS workaround enabled
>[  430.630555] xhci_hcd 0000:00:14.0: System wakeup disabled by ACPI
>[  430.691918] PM: noirq resume of devices complete after 96.256 msecs
>[  430.692115] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  430.692188] [drm:intel_power_well_enable [i915]] enabling power well 1
>[  430.692231] [drm:skl_set_power_well [i915]] Enabling power well 1
>[  430.692260] [drm:intel_power_well_enable [i915]] enabling MISC IO power well
>[  430.692294] [drm:skl_set_power_well [i915]] Enabling MISC IO power well
>[  430.692330] [drm:skl_init_cdclk [i915]] Sanitizing cdclk programmed by pre-os
>[  430.694106] [drm:intel_update_cdclk [i915]] Current CD clock rate: 337500 kHz, VCO: 8100000 kHz, ref: 24000 kHz
>[  430.704640] [drm:intel_power_well_enable [i915]] enabling always-on
>[  430.704655] [drm:intel_power_well_enable [i915]] enabling DC off
>[  430.704673] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  430.704741] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  430.704766] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  430.704835] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  430.704859] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  430.704874] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  430.704899] [drm:skl_set_power_well [i915]] Enabling DDI B IO power well
>[  430.704913] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>[  430.704938] [drm:skl_set_power_well [i915]] Enabling DDI C IO power well
>[  430.704953] [drm:intel_power_well_enable [i915]] enabling DDI D IO power well
>[  430.704977] [drm:skl_set_power_well [i915]] Enabling DDI D IO power well
>[  430.706770] hpet1: lost 3004 rtc interrupts
>[  430.707423] PM: early resume of devices complete after 15.460 msecs
>[  430.707685] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x77f6e018
>[  430.707697] r8169 0000:0e:00.0: System wakeup disabled by ACPI
>[  430.707734] [drm:intel_opregion_setup [i915]] Public ACPI methods supported
>[  430.707758] [drm:intel_opregion_setup [i915]] SWSCI supported
>[  430.708072] sd 2:0:0:0: [sda] Starting disk
>[  430.708175] ACPI : EC: event unblocked
>[  430.711768] rtc_cmos 00:04: System wakeup disabled by ACPI
>[  430.716677] [drm:intel_opregion_setup [i915]] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00300483
>[  430.716698] [drm:intel_opregion_setup [i915]] ASLE supported
>[  430.716716] [drm:intel_opregion_setup [i915]] ASLE extension supported
>[  430.716735] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (Mailbox #4)
>[  430.716969] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x4af05
>[  430.717327] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 0.8
>[  430.745546] r8169 0000:0e:00.0 enp14s0: link down
>[  431.025127] ata4: SATA link down (SStatus 4 SControl 300)
>[  431.025163] ata2: SATA link down (SStatus 4 SControl 300)
>[  431.025199] ata3: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
>[  431.025256] ata1: SATA link down (SStatus 4 SControl 300)
>[  431.081941] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 365 ms
>[  431.082507] [drm:drm_dp_i2c_do_msg] native defer
>[  431.083903] [drm:drm_dp_i2c_do_msg] native defer
>[  431.085362] [drm:drm_dp_i2c_do_msg] native defer
>[  431.086829] [drm:drm_dp_i2c_do_msg] native defer
>[  431.088265] [drm:drm_dp_i2c_do_msg] native defer
>[  431.089184] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  431.089639] [drm:gen8_init_common_ring [i915]] Execlists enabled for rcs0
>[  431.089769] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 14
>[  431.089959] [drm:gen8_init_common_ring [i915]] Execlists enabled for bcs0
>[  431.090146] [drm:gen8_init_common_ring [i915]] Execlists enabled for vcs0
>[  431.090327] [drm:gen8_init_common_ring [i915]] Execlists enabled for vecs0
>[  431.090488] [drm:intel_update_cdclk [i915]] Current CD clock rate: 337500 kHz, VCO: 8100000 kHz, ref: 24000 kHz
>[  431.090719] [drm:intel_set_plane_visible [i915]] pipe A active planes 0x0
>[  431.090787] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:32:pipe A] hw state readout: disabled
>[  431.090860] [drm:intel_set_plane_visible [i915]] pipe B active planes 0x0
>[  431.090925] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:39:pipe B] hw state readout: disabled
>[  431.090996] [drm:intel_set_plane_visible [i915]] pipe C active planes 0x0
>[  431.091060] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:46:pipe C] hw state readout: disabled
>[  431.091128] [drm:intel_modeset_setup_hw_state [i915]] DPLL 0 hw state readout: crtc_mask 0x00000000, on 1
>[  431.091192] [drm:intel_modeset_setup_hw_state [i915]] DPLL 1 hw state readout: crtc_mask 0x00000000, on 0
>[  431.091255] [drm:intel_modeset_setup_hw_state [i915]] DPLL 2 hw state readout: crtc_mask 0x00000000, on 0
>[  431.091317] [drm:intel_modeset_setup_hw_state [i915]] DPLL 3 hw state readout: crtc_mask 0x00000000, on 0
>[  431.091380] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:47:DDI A] hw state readout: disabled, pipe A
>[  431.091441] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:55:DDI B] hw state readout: disabled, pipe A
>[  431.091496] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:57:DP-MST A] hw state readout: disabled, pipe A
>[  431.091551] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:58:DP-MST B] hw state readout: disabled, pipe B
>[  431.091605] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:59:DP-MST C] hw state readout: disabled, pipe C
>[  431.091711] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:48:eDP-1] hw state readout: disabled
>[  431.091776] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:56:DP-1] hw state readout: disabled
>[  431.091855] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][setup_hw_state]
>[  431.091915] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0
>[  431.091973] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  431.092029] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  431.092040] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  431.092094] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  431.092104] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  431.092161] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  431.092216] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  431.092270] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: 0
>[  431.092324] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  431.092379] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  431.092442] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  431.092508] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  431.092556] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  431.092603] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  431.092676] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  431.092728] [drm:intel_dump_pipe_config [i915]] [CRTC:39:pipe B][setup_hw_state]
>[  431.092775] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0
>[  431.092821] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  431.092865] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  431.092874] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  431.092918] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  431.092926] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  431.092973] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  431.093019] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  431.093065] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: 0
>[  431.093110] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  431.093155] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  431.093210] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  431.093259] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  431.093307] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 1B] disabled, scaler_id = -1
>[  431.093353] [drm:intel_dump_pipe_config [i915]] [PLANE:35:plane 2B] disabled, scaler_id = -1
>[  431.093399] [drm:intel_dump_pipe_config [i915]] [PLANE:37:cursor B] disabled, scaler_id = -1
>[  431.093449] [drm:intel_dump_pipe_config [i915]] [CRTC:46:pipe C][setup_hw_state]
>[  431.093495] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0
>[  431.093540] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  431.093586] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  431.093594] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  431.093662] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  431.093670] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  431.093716] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  431.093760] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  431.093804] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: 0
>[  431.093850] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  431.093893] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  431.093949] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  431.093995] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  431.094042] [drm:intel_dump_pipe_config [i915]] [PLANE:40:plane 1C] disabled, scaler_id = -1
>[  431.094088] [drm:intel_dump_pipe_config [i915]] [PLANE:42:plane 2C] disabled, scaler_id = -1
>[  431.094134] [drm:intel_dump_pipe_config [i915]] [PLANE:44:cursor C] disabled, scaler_id = -1
>[  431.094194] [drm:intel_modeset_setup_hw_state [i915]] DPLL 0 enabled but not in use, disabling
>[  431.094364] [drm:intel_power_well_disable [i915]] disabling DDI D IO power well
>[  431.094415] [drm:skl_set_power_well [i915]] Disabling DDI D IO power well
>[  431.094464] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well
>[  431.094512] [drm:skl_set_power_well [i915]] Disabling DDI C IO power well
>[  431.094559] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[  431.094606] [drm:skl_set_power_well [i915]] Disabling DDI B IO power well
>[  431.094678] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  431.094724] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  431.094770] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  431.094834] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  431.094880] [drm:intel_power_well_disable [i915]] disabling DC off
>[  431.094928] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  431.094970] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  431.095410] [drm:intel_power_well_disable [i915]] disabling always-on
>[  431.095504] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  431.095688] [drm:intel_power_well_enable [i915]] enabling always-on
>[  431.095731] [drm:intel_power_well_enable [i915]] enabling DC off
>[  431.096013] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  431.096095] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  431.096152] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  431.096207] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  431.096260] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  431.096312] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  431.096367] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  431.096429] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:56:DP-1]
>[  431.096484] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  431.096542] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  431.096598] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  431.096678] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  431.096740] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  431.096803] [drm:intel_atomic_commit_tail [i915]] [CRTC:39:pipe B]
>[  431.096860] [drm:intel_atomic_commit_tail [i915]] [CRTC:46:pipe C]
>[  431.096913] [drm:intel_power_well_disable [i915]] disabling DC off
>[  431.096964] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  431.097008] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  431.097450] [drm:intel_power_well_disable [i915]] disabling always-on
>[  431.097791] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  431.097838] [drm:intel_power_well_enable [i915]] enabling always-on
>[  431.097882] [drm:intel_power_well_enable [i915]] enabling DC off
>[  431.098166] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  431.098244] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  431.098304] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  431.098360] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  431.098415] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  431.098533] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  431.098605] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  431.098753] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  431.098816] [drm:wait_panel_status [i915]] Wait complete
>[  431.098905] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000008
>[  431.098964] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled
>[  431.099040] [drm:intel_opregion_register [i915]] 2 outputs detected
>[  431.107215] PM: resume of devices complete after 399.786 msecs
>[  431.110281] PM: Finishing wakeup.
>[  431.110287] OOM killer enabled.
>[  431.110292] Restarting tasks ... done.
>[  431.235058] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  431.235141] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  431.235216] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  431.235388] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  431.305569] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  431.307243] [drm:drm_helper_hpd_irq_event] [CONNECTOR:48:eDP-1] status updated from connected to connected
>[  431.307342] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  431.307400] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  431.307472] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  431.308338] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  431.308417] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  431.308937] [drm:drm_dp_i2c_do_msg] native defer
>[  431.310409] [drm:drm_dp_i2c_do_msg] native defer
>[  431.311848] [drm:drm_dp_i2c_do_msg] native defer
>[  431.313314] [drm:drm_dp_i2c_do_msg] native defer
>[  431.314711] [drm:drm_dp_i2c_do_msg] native defer
>[  431.315805] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  431.316489] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  431.317041] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  431.317125] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  431.317158] [drm:drm_helper_hpd_irq_event] [CONNECTOR:56:DP-1] status updated from disconnected to disconnected
>[  431.320704] [IGT] kms_pipe_crc_basic: exiting, ret=99
>[  431.322844] [drm] RC6 on
>[  431.337416] Console: switching to colour frame buffer device 240x67
>[  433.073923] r8169 0000:0e:00.0 enp14s0: link up
>[  433.739735] ata3.00: configured for UDMA/100
>[  433.840790] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[  433.840908] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000000
>[  433.840995] [drm:intel_power_well_disable [i915]] disabling DC off
>[  433.841059] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  433.841114] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  433.842080] [drm:intel_power_well_disable [i915]] disabling always-on
>[  433.843238] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  433.843322] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  433.843395] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  433.843798] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  434.005290] Console: switching to colour dummy device 80x25
>[  434.005660] [IGT] kms_pipe_crc_basic: executing
>[  434.036250] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  434.036343] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  434.036405] [drm:intel_power_well_enable [i915]] enabling always-on
>[  434.036461] [drm:intel_power_well_enable [i915]] enabling DC off
>[  434.036854] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  434.037303] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  434.037375] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  434.037441] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  434.037504] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  434.037587] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  434.037745] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  434.344973] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  434.345060] [drm:wait_panel_status [i915]] Wait complete
>[  434.345168] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000008
>[  434.345242] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled
>[  434.480934] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  434.481023] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  434.481097] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  434.481336] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  434.553611] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  434.554866] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  434.554882] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] probed modes :
>[  434.554893] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  434.554944] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  434.555022] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  434.555078] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  434.555153] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  434.555797] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  434.555886] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  434.556394] [drm:drm_dp_i2c_do_msg] native defer
>[  434.557827] [drm:drm_dp_i2c_do_msg] native defer
>[  434.559285] [drm:drm_dp_i2c_do_msg] native defer
>[  434.560659] [drm:drm_dp_i2c_do_msg] native defer
>[  434.562220] [drm:drm_dp_i2c_do_msg] native defer
>[  434.563240] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  434.563924] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  434.564443] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  434.564522] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  434.564541] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  434.569900] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  434.569924] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  434.569945] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  434.569967] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  434.569986] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  434.570005] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  434.570525] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  434.571341] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  434.571347] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] probed modes :
>[  434.571350] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  434.571488] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  434.571512] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  434.571528] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  434.571550] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  434.571933] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  434.571960] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  434.572394] [drm:drm_dp_i2c_do_msg] native defer
>[  434.573666] [drm:drm_dp_i2c_do_msg] native defer
>[  434.574933] [drm:drm_dp_i2c_do_msg] native defer
>[  434.576215] [drm:drm_dp_i2c_do_msg] native defer
>[  434.577421] [drm:drm_dp_i2c_do_msg] native defer
>[  434.578250] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  434.578709] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  434.579042] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  434.579066] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  434.579071] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  434.579295] [IGT] kms_pipe_crc_basic: starting subtest suspend-read-crc-pipe-B
>[  434.859310] PM: Syncing filesystems ... done.
>[  434.879282] PM: Preparing system for sleep (mem)
>[  434.880481] Freezing user space processes ... (elapsed 0.002 seconds) done.
>[  434.882834] OOM killer disabled.
>[  434.882840] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
>[  434.884863] PM: Suspending system (mem)
>[  434.885104] Suspending console(s) (use no_console_suspend to debug)
>[  434.889098] sd 2:0:0:0: [sda] Synchronizing SCSI cache
>[  434.898551] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  434.898639] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  434.898670] sd 2:0:0:0: [sda] Stopping disk
>[  434.898802] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  434.898884] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  434.898960] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  434.899038] [drm:skl_set_power_well [i915]] Enabling DDI B IO power well
>[  434.899112] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>[  434.899190] [drm:skl_set_power_well [i915]] Enabling DDI C IO power well
>[  434.899264] [drm:intel_power_well_enable [i915]] enabling DDI D IO power well
>[  434.899342] [drm:skl_set_power_well [i915]] Enabling DDI D IO power well
>[  434.900789] ACPI : EC: event blocked
>[  434.902525] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[  434.902635] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000000
>[  435.764952] PM: suspend of devices complete after 877.558 msecs
>[  435.767114] [drm:intel_power_well_disable [i915]] disabling DDI D IO power well
>[  435.767150] [drm:skl_set_power_well [i915]] Disabling DDI D IO power well
>[  435.767181] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well
>[  435.767211] [drm:skl_set_power_well [i915]] Disabling DDI C IO power well
>[  435.767240] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[  435.767269] [drm:skl_set_power_well [i915]] Disabling DDI B IO power well
>[  435.767298] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  435.767326] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  435.767355] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  435.767394] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  435.767423] [drm:intel_power_well_disable [i915]] disabling DC off
>[  435.767452] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  435.767479] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  435.767921] [drm:intel_power_well_disable [i915]] disabling always-on
>[  435.767950] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  435.768130] [drm:intel_update_cdclk [i915]] Current CD clock rate: 24000 kHz, VCO: 0 kHz, ref: 24000 kHz
>[  435.768157] [drm:intel_power_well_disable [i915]] disabling MISC IO power well
>[  435.768188] [drm:skl_set_power_well [i915]] Disabling MISC IO power well
>[  435.768219] [drm:skl_set_power_well [i915]] Clearing auxiliary requests for MISC IO power well forced on by DMC
>[  435.768248] [drm:intel_power_well_disable [i915]] disabling power well 1
>[  435.768282] [drm:skl_set_power_well [i915]] Clearing auxiliary requests for power well 1 forced on by DMC
>[  435.779935] PM: late suspend of devices complete after 14.974 msecs
>[  435.785043] ACPI : EC: interrupt blocked
>[  435.792158] r8169 0000:0e:00.0: System wakeup enabled by ACPI
>[  435.792653] xhci_hcd 0000:00:14.0: System wakeup enabled by ACPI
>[  435.953689] PM: noirq suspend of devices complete after 173.740 msecs
>[  435.954435] ACPI: Preparing to enter system sleep state S3
>[  435.964931] ACPI : EC: EC stopped
>[  435.964937] PM: Saving platform NVS memory
>[  435.965680] Disabling non-boot CPUs ...
>[  435.982789] smpboot: CPU 1 is now offline
>[  436.000523] smpboot: CPU 2 is now offline
>[  436.020388] smpboot: CPU 3 is now offline
>[  436.039826] Broke affinity for irq 124
>[  436.039842] Broke affinity for irq 126
>[  436.041020] smpboot: CPU 4 is now offline
>[  436.063078] Broke affinity for irq 124
>[  436.063092] Broke affinity for irq 126
>[  436.063101] Broke affinity for irq 127
>[  436.063109] Broke affinity for irq 129
>[  436.064320] smpboot: CPU 5 is now offline
>[  436.084899] Broke affinity for irq 123
>[  436.084908] Broke affinity for irq 124
>[  436.084921] Broke affinity for irq 126
>[  436.084929] Broke affinity for irq 127
>[  436.084937] Broke affinity for irq 129
>[  436.084946] Broke affinity for irq 130
>[  436.086128] smpboot: CPU 6 is now offline
>[  436.099719] Broke affinity for irq 1
>[  436.099731] Broke affinity for irq 8
>[  436.099740] Broke affinity for irq 9
>[  436.099749] Broke affinity for irq 12
>[  436.099765] Broke affinity for irq 122
>[  436.099773] Broke affinity for irq 123
>[  436.099781] Broke affinity for irq 124
>[  436.099788] Broke affinity for irq 125
>[  436.099796] Broke affinity for irq 126
>[  436.099804] Broke affinity for irq 127
>[  436.099812] Broke affinity for irq 129
>[  436.099820] Broke affinity for irq 130
>[  436.100972] smpboot: CPU 7 is now offline
>[  436.105218] ACPI: Low-level resume complete
>[  436.105397] ACPI : EC: EC started
>[  436.105399] PM: Restoring platform NVS memory
>[  436.106498] Suspended for 15.359 seconds
>[  436.106567] Enabling non-boot CPUs ...
>[  436.106703] x86: Booting SMP configuration:
>[  436.106706] smpboot: Booting Node 0 Processor 1 APIC 0x2
>[  436.108148]  cache: parent cpu1 should not be sleeping
>[  436.108890] CPU1 is up
>[  436.108939] smpboot: Booting Node 0 Processor 2 APIC 0x4
>[  436.110261]  cache: parent cpu2 should not be sleeping
>[  436.110967] CPU2 is up
>[  436.111015] smpboot: Booting Node 0 Processor 3 APIC 0x6
>[  436.112439]  cache: parent cpu3 should not be sleeping
>[  436.113173] CPU3 is up
>[  436.113221] smpboot: Booting Node 0 Processor 4 APIC 0x1
>[  436.114572]  cache: parent cpu4 should not be sleeping
>[  436.115370] CPU4 is up
>[  436.115418] smpboot: Booting Node 0 Processor 5 APIC 0x3
>[  436.116755]  cache: parent cpu5 should not be sleeping
>[  436.117562] CPU5 is up
>[  436.117630] smpboot: Booting Node 0 Processor 6 APIC 0x5
>[  436.119012]  cache: parent cpu6 should not be sleeping
>[  436.119891] CPU6 is up
>[  436.119941] smpboot: Booting Node 0 Processor 7 APIC 0x7
>[  436.121343]  cache: parent cpu7 should not be sleeping
>[  436.122262] CPU7 is up
>[  436.128118] ACPI: Waking up from system sleep state S3
>[  436.201625] pcieport 0000:00:1c.0: Intel SPT PCH root port ACS workaround enabled
>[  436.202534] ACPI : EC: interrupt unblocked
>[  436.212950] pcieport 0000:00:1c.2: Intel SPT PCH root port ACS workaround enabled
>[  436.212972] pcieport 0000:00:1c.1: Intel SPT PCH root port ACS workaround enabled
>[  436.235999] xhci_hcd 0000:00:14.0: System wakeup disabled by ACPI
>[  436.296364] PM: noirq resume of devices complete after 95.095 msecs
>[  436.296659] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  436.296695] [drm:intel_power_well_enable [i915]] enabling power well 1
>[  436.296724] [drm:skl_set_power_well [i915]] Enabling power well 1
>[  436.296748] [drm:intel_power_well_enable [i915]] enabling MISC IO power well
>[  436.296772] [drm:skl_set_power_well [i915]] Enabling MISC IO power well
>[  436.296802] [drm:skl_init_cdclk [i915]] Sanitizing cdclk programmed by pre-os
>[  436.298719] [drm:intel_update_cdclk [i915]] Current CD clock rate: 337500 kHz, VCO: 8100000 kHz, ref: 24000 kHz
>[  436.299574] [drm:intel_power_well_enable [i915]] enabling always-on
>[  436.299590] [drm:intel_power_well_enable [i915]] enabling DC off
>[  436.299606] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  436.299641] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  436.299657] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  436.299687] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  436.299703] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  436.299718] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  436.299733] [drm:skl_set_power_well [i915]] Enabling DDI B IO power well
>[  436.299748] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>[  436.299763] [drm:skl_set_power_well [i915]] Enabling DDI C IO power well
>[  436.299777] [drm:intel_power_well_enable [i915]] enabling DDI D IO power well
>[  436.299793] [drm:skl_set_power_well [i915]] Enabling DDI D IO power well
>[  436.302189] PM: early resume of devices complete after 5.659 msecs
>[  436.302470] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x77f6e018
>[  436.302501] r8169 0000:0e:00.0: System wakeup disabled by ACPI
>[  436.302528] [drm:intel_opregion_setup [i915]] Public ACPI methods supported
>[  436.302547] [drm:intel_opregion_setup [i915]] SWSCI supported
>[  436.305146] ACPI : EC: event unblocked
>[  436.307735] [drm:intel_opregion_setup [i915]] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00300483
>[  436.307756] [drm:intel_opregion_setup [i915]] ASLE supported
>[  436.307775] [drm:intel_opregion_setup [i915]] ASLE extension supported
>[  436.307793] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (Mailbox #4)
>[  436.308029] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x4af05
>[  436.308385] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  436.309772] rtc_cmos 00:04: System wakeup disabled by ACPI
>[  436.312585] sd 2:0:0:0: [sda] Starting disk
>[  436.340453] r8169 0000:0e:00.0 enp14s0: link down
>[  436.629474] ata4: SATA link down (SStatus 4 SControl 300)
>[  436.629509] ata3: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
>[  436.629565] ata1: SATA link down (SStatus 4 SControl 300)
>[  436.629597] ata2: SATA link down (SStatus 4 SControl 300)
>[  436.702428] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 394 ms
>[  436.703000] [drm:drm_dp_i2c_do_msg] native defer
>[  436.704464] [drm:drm_dp_i2c_do_msg] native defer
>[  436.705934] [drm:drm_dp_i2c_do_msg] native defer
>[  436.707395] [drm:drm_dp_i2c_do_msg] native defer
>[  436.708777] [drm:drm_dp_i2c_do_msg] native defer
>[  436.709794] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  436.710248] [drm:gen8_init_common_ring [i915]] Execlists enabled for rcs0
>[  436.710344] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 14
>[  436.710532] [drm:gen8_init_common_ring [i915]] Execlists enabled for bcs0
>[  436.710778] [drm:gen8_init_common_ring [i915]] Execlists enabled for vcs0
>[  436.710960] [drm:gen8_init_common_ring [i915]] Execlists enabled for vecs0
>[  436.711121] [drm:intel_update_cdclk [i915]] Current CD clock rate: 337500 kHz, VCO: 8100000 kHz, ref: 24000 kHz
>[  436.711326] [drm:intel_set_plane_visible [i915]] pipe A active planes 0x0
>[  436.711394] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:32:pipe A] hw state readout: disabled
>[  436.711468] [drm:intel_set_plane_visible [i915]] pipe B active planes 0x0
>[  436.711533] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:39:pipe B] hw state readout: disabled
>[  436.711605] [drm:intel_set_plane_visible [i915]] pipe C active planes 0x0
>[  436.711701] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:46:pipe C] hw state readout: disabled
>[  436.711771] [drm:intel_modeset_setup_hw_state [i915]] DPLL 0 hw state readout: crtc_mask 0x00000000, on 1
>[  436.711836] [drm:intel_modeset_setup_hw_state [i915]] DPLL 1 hw state readout: crtc_mask 0x00000000, on 0
>[  436.711899] [drm:intel_modeset_setup_hw_state [i915]] DPLL 2 hw state readout: crtc_mask 0x00000000, on 0
>[  436.711961] [drm:intel_modeset_setup_hw_state [i915]] DPLL 3 hw state readout: crtc_mask 0x00000000, on 0
>[  436.712025] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:47:DDI A] hw state readout: disabled, pipe A
>[  436.712086] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:55:DDI B] hw state readout: disabled, pipe A
>[  436.712142] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:57:DP-MST A] hw state readout: disabled, pipe A
>[  436.712197] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:58:DP-MST B] hw state readout: disabled, pipe B
>[  436.712251] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:59:DP-MST C] hw state readout: disabled, pipe C
>[  436.712319] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:48:eDP-1] hw state readout: disabled
>[  436.712384] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:56:DP-1] hw state readout: disabled
>[  436.712464] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][setup_hw_state]
>[  436.712525] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0
>[  436.712583] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  436.712660] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  436.712731] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  436.712789] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  436.712799] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  436.712857] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  436.712913] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  436.712969] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: 0
>[  436.713024] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  436.713077] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  436.713140] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  436.713194] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  436.713260] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  436.713308] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  436.713356] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  436.713409] [drm:intel_dump_pipe_config [i915]] [CRTC:39:pipe B][setup_hw_state]
>[  436.713456] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0
>[  436.713503] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  436.713548] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  436.713556] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  436.713602] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  436.713634] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  436.713683] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  436.713730] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  436.713776] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: 0
>[  436.713821] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  436.713866] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  436.713922] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  436.713970] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  436.714018] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 1B] disabled, scaler_id = -1
>[  436.714066] [drm:intel_dump_pipe_config [i915]] [PLANE:35:plane 2B] disabled, scaler_id = -1
>[  436.714113] [drm:intel_dump_pipe_config [i915]] [PLANE:37:cursor B] disabled, scaler_id = -1
>[  436.714163] [drm:intel_dump_pipe_config [i915]] [CRTC:46:pipe C][setup_hw_state]
>[  436.714209] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0
>[  436.714255] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  436.714301] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  436.714308] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  436.714353] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  436.714361] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  436.714407] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  436.714452] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  436.714497] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: 0
>[  436.714543] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  436.714588] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  436.714643] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  436.714714] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  436.714760] [drm:intel_dump_pipe_config [i915]] [PLANE:40:plane 1C] disabled, scaler_id = -1
>[  436.714807] [drm:intel_dump_pipe_config [i915]] [PLANE:42:plane 2C] disabled, scaler_id = -1
>[  436.714853] [drm:intel_dump_pipe_config [i915]] [PLANE:44:cursor C] disabled, scaler_id = -1
>[  436.714912] [drm:intel_modeset_setup_hw_state [i915]] DPLL 0 enabled but not in use, disabling
>[  436.715085] [drm:intel_power_well_disable [i915]] disabling DDI D IO power well
>[  436.715136] [drm:skl_set_power_well [i915]] Disabling DDI D IO power well
>[  436.715185] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well
>[  436.715232] [drm:skl_set_power_well [i915]] Disabling DDI C IO power well
>[  436.715279] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[  436.715327] [drm:skl_set_power_well [i915]] Disabling DDI B IO power well
>[  436.715374] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  436.715420] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  436.715466] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  436.715531] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  436.715577] [drm:intel_power_well_disable [i915]] disabling DC off
>[  436.715626] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  436.715695] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  436.716128] [drm:intel_power_well_disable [i915]] disabling always-on
>[  436.716224] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  436.716381] [drm:intel_power_well_enable [i915]] enabling always-on
>[  436.716422] [drm:intel_power_well_enable [i915]] enabling DC off
>[  436.716760] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  436.717236] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  436.717294] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  436.717350] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  436.717404] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  436.717457] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  436.717513] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  436.717575] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:56:DP-1]
>[  436.717631] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  436.717716] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  436.717771] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  436.717825] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  436.717887] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  436.717950] [drm:intel_atomic_commit_tail [i915]] [CRTC:39:pipe B]
>[  436.718007] [drm:intel_atomic_commit_tail [i915]] [CRTC:46:pipe C]
>[  436.718061] [drm:intel_power_well_disable [i915]] disabling DC off
>[  436.718112] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  436.718156] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  436.718599] [drm:intel_power_well_disable [i915]] disabling always-on
>[  436.718937] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  436.718984] [drm:intel_power_well_enable [i915]] enabling always-on
>[  436.719027] [drm:intel_power_well_enable [i915]] enabling DC off
>[  436.719312] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  436.719387] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  436.719448] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  436.719503] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  436.719558] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  436.719632] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  436.719723] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  436.719832] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  436.719893] [drm:wait_panel_status [i915]] Wait complete
>[  436.719982] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000008
>[  436.720040] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled
>[  436.720113] [drm:intel_opregion_register [i915]] 2 outputs detected
>[  436.727493] PM: resume of devices complete after 425.297 msecs
>[  436.730785] PM: Finishing wakeup.
>[  436.730797] OOM killer enabled.
>[  436.730804] Restarting tasks ... done.
>[  436.855896] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  436.855982] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  436.856054] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  436.856209] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  436.925578] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  436.926907] [drm:drm_helper_hpd_irq_event] [CONNECTOR:48:eDP-1] status updated from connected to connected
>[  436.926993] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  436.927052] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  436.927128] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  436.927787] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  436.927867] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  436.928382] [drm:drm_dp_i2c_do_msg] native defer
>[  436.929781] [drm:drm_dp_i2c_do_msg] native defer
>[  436.931356] [drm:drm_dp_i2c_do_msg] native defer
>[  436.933525] [drm:drm_dp_i2c_do_msg] native defer
>[  436.934932] [drm:drm_dp_i2c_do_msg] native defer
>[  436.935991] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  436.936671] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  436.937275] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  436.937357] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  436.937378] [drm:drm_helper_hpd_irq_event] [CONNECTOR:56:DP-1] status updated from disconnected to disconnected
>[  436.938493] [drm:drm_mode_addfb2] [FB:50]
>[  436.954233] [drm:drm_mode_setcrtc] [CRTC:32:pipe A]
>[  436.955009] [drm:drm_mode_setcrtc] [CRTC:39:pipe B]
>[  436.955105] [drm:drm_mode_setcrtc] [CONNECTOR:48:eDP-1]
>[  436.955286] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  436.955358] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  436.955432] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  436.955501] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  436.955564] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  436.955631] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  436.955759] [drm:intel_dump_pipe_config [i915]] [CRTC:39:pipe B][modeset]
>[  436.955831] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  436.955898] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  436.955960] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  436.956024] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  436.956038] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  436.956107] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  436.956123] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  436.956214] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  436.956303] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  436.956389] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  436.956473] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  436.956553] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  436.956648] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x5, cfgcr1: 0x0, cfgcr2: 0x0
>[  436.956797] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  436.956889] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 1B] disabled, scaler_id = -1
>[  436.956979] [drm:intel_dump_pipe_config [i915]] [PLANE:35:plane 2B] disabled, scaler_id = -1
>[  436.957046] [drm:intel_dump_pipe_config [i915]] [PLANE:37:cursor B] disabled, scaler_id = -1
>[  436.957144] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  436.957244] [drm:intel_find_shared_dpll [i915]] [CRTC:39:pipe B] allocated DPLL 0
>[  436.957342] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe B
>[  436.958759] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  436.958836] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  436.958975] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  436.959048] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  436.959114] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  436.959177] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  436.959238] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  436.959303] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  436.959372] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  436.959438] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  436.959501] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  436.959574] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 2, on? 0) for crtc 39
>[  436.959641] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  436.959884] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  436.959981] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  436.960139] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000008
>[  436.960230] [drm:wait_panel_status [i915]] Wait complete
>[  436.960334] [drm:edp_panel_on [i915]] Wait for panel power on
>[  436.960477] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 0000000b
>[  437.162389] [drm:wait_panel_status [i915]] Wait complete
>[  437.162466] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  437.162528] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  437.164277] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  437.164349] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  437.164414] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  437.164480] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  437.165523] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  437.165597] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  437.167051] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  437.167124] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  437.168919] [drm:intel_enable_pipe [i915]] enabling pipe B
>[  437.169020] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  437.169088] [drm:intel_panel_enable_backlight [i915]] pipe B
>[  437.169209] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  437.364863] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  437.364943] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  437.369182] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  437.369275] [drm:intel_atomic_commit_tail [i915]] [CRTC:39:pipe B]
>[  437.369404] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  437.385699] [drm:drm_mode_setcrtc] [CRTC:46:pipe C]
>[  437.452785] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  437.453004] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  437.660863] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  437.661193] [drm:intel_disable_pipe [i915]] disabling pipe B
>[  437.670858] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  437.670987] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  437.671112] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000000
>[  437.721505] [drm:wait_panel_status [i915]] Wait complete
>[  437.721614] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  437.721786] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  437.721964] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 2, on? 1) for crtc 39
>[  437.722165] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  437.722334] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  437.722410] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  437.722476] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  437.722538] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  437.722600] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  437.722777] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  437.722860] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  437.722939] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  437.723034] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  437.723127] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  437.723316] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  437.723386] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  437.723454] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  437.723543] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  437.723628] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  437.723923] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  437.724021] [drm:intel_atomic_commit_tail [i915]] [CRTC:39:pipe B]
>[  437.724087] [drm:intel_power_well_disable [i915]] disabling DC off
>[  437.724146] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  437.724198] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  437.724638] [drm:intel_power_well_disable [i915]] disabling always-on
>[  437.726468] [drm:drm_mode_addfb2] [FB:50]
>[  437.735305] [drm:drm_mode_setcrtc] [CRTC:39:pipe B]
>[  437.735331] [drm:drm_mode_setcrtc] [CONNECTOR:48:eDP-1]
>[  437.735397] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  437.735419] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  437.735442] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  437.735463] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  437.735482] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  437.735502] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  437.735523] [drm:intel_dump_pipe_config [i915]] [CRTC:39:pipe B][modeset]
>[  437.735542] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  437.735561] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  437.735578] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  437.735596] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  437.735599] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  437.735642] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  437.735646] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  437.735666] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  437.735683] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  437.735702] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  437.735719] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  437.735737] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  437.735758] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  437.735775] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  437.735792] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 1B] disabled, scaler_id = -1
>[  437.735811] [drm:intel_dump_pipe_config [i915]] [PLANE:35:plane 2B] disabled, scaler_id = -1
>[  437.735829] [drm:intel_dump_pipe_config [i915]] [PLANE:37:cursor B] disabled, scaler_id = -1
>[  437.735850] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  437.735873] [drm:intel_find_shared_dpll [i915]] [CRTC:39:pipe B] allocated DPLL 0
>[  437.735892] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe B
>[  437.736548] [drm:intel_power_well_enable [i915]] enabling always-on
>[  437.736567] [drm:intel_power_well_enable [i915]] enabling DC off
>[  437.736861] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  437.736898] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  437.736923] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  437.736976] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  437.736999] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  437.737020] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  437.737039] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  437.737058] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  437.737079] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  437.737101] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  437.737121] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  437.737141] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  437.737165] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 2, on? 0) for crtc 39
>[  437.737185] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  437.737224] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  437.737264] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  438.172989] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 08000001 control 00000000
>[  438.197163] [drm:wait_panel_status [i915]] Wait complete
>[  438.197267] [drm:edp_panel_on [i915]] Wait for panel power on
>[  438.197392] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  438.333118] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  438.333200] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  438.333272] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  438.333447] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  438.398764] [drm:wait_panel_status [i915]] Wait complete
>[  438.398841] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  438.398904] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  438.399023] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  438.399143] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  438.400722] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  438.400836] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  438.400905] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  438.400973] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  438.402051] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  438.402119] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  438.403404] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  438.403474] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  438.405181] [drm:intel_enable_pipe [i915]] enabling pipe B
>[  438.405285] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  438.405355] [drm:intel_panel_enable_backlight [i915]] pipe B
>[  438.405479] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  438.604904] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  438.604984] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  438.605410] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  438.605503] [drm:intel_atomic_commit_tail [i915]] [CRTC:39:pipe B]
>[  438.605633] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  438.674159] r8169 0000:0e:00.0 enp14s0: link up
>[  438.689032] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  438.689232] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  438.773085] [drm] RC6 on
>[  438.892826] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  438.892962] [drm:intel_disable_pipe [i915]] disabling pipe B
>[  438.906044] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  438.906142] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  438.906266] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000000
>[  438.958097] [drm:wait_panel_status [i915]] Wait complete
>[  438.958165] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  438.958230] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  438.958326] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 2, on? 1) for crtc 39
>[  438.958411] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  438.958488] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  438.958559] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  438.958738] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  438.958811] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  438.958951] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  438.959060] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  438.959155] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  438.959243] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  438.959307] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  438.959372] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  438.959443] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  438.959510] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  438.959576] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  438.959639] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  438.959767] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  438.959852] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  438.959982] [drm:intel_atomic_commit_tail [i915]] [CRTC:39:pipe B]
>[  438.960083] [drm:intel_power_well_disable [i915]] disabling DC off
>[  438.960175] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  438.960257] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  438.961217] [drm:intel_power_well_disable [i915]] disabling always-on
>[  438.962801] [IGT] kms_pipe_crc_basic: exiting, ret=0
>[  439.006151] Console: switching to colour frame buffer device 240x67
>[  439.333762] ata3.00: configured for UDMA/100
>[  439.498876] Console: switching to colour dummy device 80x25
>[  439.499186] [IGT] kms_pipe_crc_basic: executing
>[  439.512047] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  439.512083] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  439.512103] [drm:intel_power_well_enable [i915]] enabling always-on
>[  439.512121] [drm:intel_power_well_enable [i915]] enabling DC off
>[  439.512378] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  439.512408] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  439.512432] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  439.512453] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  439.512473] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  439.512505] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  439.512532] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  439.512605] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  439.512660] [drm:wait_panel_status [i915]] Wait complete
>[  439.512721] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000008
>[  439.512756] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled
>[  439.648570] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  439.648651] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  439.648724] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  439.648889] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  439.717484] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  439.718761] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  439.718782] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] probed modes :
>[  439.718794] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  439.718838] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  439.718914] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  439.718970] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  439.719044] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  439.719612] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  439.719807] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  439.720330] [drm:drm_dp_i2c_do_msg] native defer
>[  439.721732] [drm:drm_dp_i2c_do_msg] native defer
>[  439.723248] [drm:drm_dp_i2c_do_msg] native defer
>[  439.724687] [drm:drm_dp_i2c_do_msg] native defer
>[  439.726265] [drm:drm_dp_i2c_do_msg] native defer
>[  439.727259] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  439.727939] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  439.728450] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  439.728530] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  439.728548] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  439.737341] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  439.737420] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  439.737495] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  439.737564] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  439.737628] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  439.737748] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  439.738454] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  439.739726] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  439.739748] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] probed modes :
>[  439.739760] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  439.740267] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  439.740344] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  439.740399] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  439.740470] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  439.741124] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  439.741205] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  439.741733] [drm:drm_dp_i2c_do_msg] native defer
>[  439.743204] [drm:drm_dp_i2c_do_msg] native defer
>[  439.744682] [drm:drm_dp_i2c_do_msg] native defer
>[  439.746203] [drm:drm_dp_i2c_do_msg] native defer
>[  439.747602] [drm:drm_dp_i2c_do_msg] native defer
>[  439.748646] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  439.749363] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  439.749945] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  439.750024] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  439.750043] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  439.750851] [IGT] kms_pipe_crc_basic: starting subtest suspend-read-crc-pipe-C
>[  439.865302] PM: Syncing filesystems ... done.
>[  439.884528] PM: Preparing system for sleep (mem)
>[  439.885754] Freezing user space processes ... (elapsed 0.002 seconds) done.
>[  439.888276] OOM killer disabled.
>[  439.888282] Freezing remaining freezable tasks ... (elapsed 0.002 seconds) done.
>[  439.890476] PM: Suspending system (mem)
>[  439.890792] Suspending console(s) (use no_console_suspend to debug)
>[  439.894903] sd 2:0:0:0: [sda] Synchronizing SCSI cache
>[  439.901523] sd 2:0:0:0: [sda] Stopping disk
>[  439.904362] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  439.904441] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  439.904522] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  439.904574] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  439.904622] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  439.904708] [drm:skl_set_power_well [i915]] Enabling DDI B IO power well
>[  439.904754] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>[  439.904804] [drm:skl_set_power_well [i915]] Enabling DDI C IO power well
>[  439.904850] [drm:intel_power_well_enable [i915]] enabling DDI D IO power well
>[  439.904898] [drm:skl_set_power_well [i915]] Enabling DDI D IO power well
>[  439.905746] ACPI : EC: event blocked
>[  439.908045] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[  439.908155] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000000
>[  440.812365] PM: suspend of devices complete after 919.214 msecs
>[  440.817034] [drm:intel_power_well_disable [i915]] disabling DDI D IO power well
>[  440.817100] [drm:skl_set_power_well [i915]] Disabling DDI D IO power well
>[  440.817160] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well
>[  440.817216] [drm:skl_set_power_well [i915]] Disabling DDI C IO power well
>[  440.817281] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[  440.817298] [drm:skl_set_power_well [i915]] Disabling DDI B IO power well
>[  440.817314] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  440.817331] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  440.817347] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  440.817372] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  440.817388] [drm:intel_power_well_disable [i915]] disabling DC off
>[  440.817406] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  440.817421] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  440.817838] [drm:intel_power_well_disable [i915]] disabling always-on
>[  440.817854] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  440.818051] [drm:intel_update_cdclk [i915]] Current CD clock rate: 24000 kHz, VCO: 0 kHz, ref: 24000 kHz
>[  440.818067] [drm:intel_power_well_disable [i915]] disabling MISC IO power well
>[  440.818086] [drm:skl_set_power_well [i915]] Disabling MISC IO power well
>[  440.818105] [drm:skl_set_power_well [i915]] Clearing auxiliary requests for MISC IO power well forced on by DMC
>[  440.818122] [drm:intel_power_well_disable [i915]] disabling power well 1
>[  440.818143] [drm:skl_set_power_well [i915]] Clearing auxiliary requests for power well 1 forced on by DMC
>[  440.829828] PM: late suspend of devices complete after 17.450 msecs
>[  440.834659] ACPI : EC: interrupt blocked
>[  440.842066] r8169 0000:0e:00.0: System wakeup enabled by ACPI
>[  440.842509] xhci_hcd 0000:00:14.0: System wakeup enabled by ACPI
>[  441.005585] PM: noirq suspend of devices complete after 175.747 msecs
>[  441.006375] ACPI: Preparing to enter system sleep state S3
>[  441.016815] ACPI : EC: EC stopped
>[  441.016821] PM: Saving platform NVS memory
>[  441.017597] Disabling non-boot CPUs ...
>[  441.036764] smpboot: CPU 1 is now offline
>[  441.053527] smpboot: CPU 2 is now offline
>[  441.073847] smpboot: CPU 3 is now offline
>[  441.088370] Broke affinity for irq 124
>[  441.088386] Broke affinity for irq 126
>[  441.090388] smpboot: CPU 4 is now offline
>[  441.103978] Broke affinity for irq 124
>[  441.103992] Broke affinity for irq 126
>[  441.104000] Broke affinity for irq 127
>[  441.104008] Broke affinity for irq 129
>[  441.105144] smpboot: CPU 5 is now offline
>[  441.120478] Broke affinity for irq 123
>[  441.120487] Broke affinity for irq 124
>[  441.120500] Broke affinity for irq 126
>[  441.120508] Broke affinity for irq 127
>[  441.120516] Broke affinity for irq 129
>[  441.120524] Broke affinity for irq 130
>[  441.121649] smpboot: CPU 6 is now offline
>[  441.129981] Broke affinity for irq 1
>[  441.129993] Broke affinity for irq 8
>[  441.130002] Broke affinity for irq 9
>[  441.130011] Broke affinity for irq 12
>[  441.130027] Broke affinity for irq 122
>[  441.130034] Broke affinity for irq 123
>[  441.130042] Broke affinity for irq 124
>[  441.130050] Broke affinity for irq 125
>[  441.130057] Broke affinity for irq 126
>[  441.130065] Broke affinity for irq 127
>[  441.130074] Broke affinity for irq 129
>[  441.130082] Broke affinity for irq 130
>[  441.131340] smpboot: CPU 7 is now offline
>[  441.135254] ACPI: Low-level resume complete
>[  441.135433] ACPI : EC: EC started
>[  441.135434] PM: Restoring platform NVS memory
>[  441.136532] Suspended for 14.973 seconds
>[  441.136603] Enabling non-boot CPUs ...
>[  441.136755] x86: Booting SMP configuration:
>[  441.136757] smpboot: Booting Node 0 Processor 1 APIC 0x2
>[  441.138217]  cache: parent cpu1 should not be sleeping
>[  441.138959] CPU1 is up
>[  441.139033] smpboot: Booting Node 0 Processor 2 APIC 0x4
>[  441.140362]  cache: parent cpu2 should not be sleeping
>[  441.141062] CPU2 is up
>[  441.141111] smpboot: Booting Node 0 Processor 3 APIC 0x6
>[  441.142416]  cache: parent cpu3 should not be sleeping
>[  441.143167] CPU3 is up
>[  441.143216] smpboot: Booting Node 0 Processor 4 APIC 0x1
>[  441.144532]  cache: parent cpu4 should not be sleeping
>[  441.145328] CPU4 is up
>[  441.145376] smpboot: Booting Node 0 Processor 5 APIC 0x3
>[  441.146670]  cache: parent cpu5 should not be sleeping
>[  441.147476] CPU5 is up
>[  441.147527] smpboot: Booting Node 0 Processor 6 APIC 0x5
>[  441.148870]  cache: parent cpu6 should not be sleeping
>[  441.149735] CPU6 is up
>[  441.149783] smpboot: Booting Node 0 Processor 7 APIC 0x7
>[  441.151084]  cache: parent cpu7 should not be sleeping
>[  441.152034] CPU7 is up
>[  441.157929] ACPI: Waking up from system sleep state S3
>[  441.230508] pcieport 0000:00:1c.0: Intel SPT PCH root port ACS workaround enabled
>[  441.230982] ACPI : EC: interrupt unblocked
>[  441.241872] pcieport 0000:00:1c.2: Intel SPT PCH root port ACS workaround enabled
>[  441.241890] pcieport 0000:00:1c.1: Intel SPT PCH root port ACS workaround enabled
>[  441.263807] xhci_hcd 0000:00:14.0: System wakeup disabled by ACPI
>[  441.319504] PM: noirq resume of devices complete after 89.331 msecs
>[  441.319895] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  441.319921] [drm:intel_power_well_enable [i915]] enabling power well 1
>[  441.319941] [drm:skl_set_power_well [i915]] Enabling power well 1
>[  441.319957] [drm:intel_power_well_enable [i915]] enabling MISC IO power well
>[  441.319974] [drm:skl_set_power_well [i915]] Enabling MISC IO power well
>[  441.319998] [drm:skl_init_cdclk [i915]] Sanitizing cdclk programmed by pre-os
>[  441.321716] [drm:intel_update_cdclk [i915]] Current CD clock rate: 337500 kHz, VCO: 8100000 kHz, ref: 24000 kHz
>[  441.322536] [drm:intel_power_well_enable [i915]] enabling always-on
>[  441.322550] [drm:intel_power_well_enable [i915]] enabling DC off
>[  441.322565] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  441.322584] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  441.322598] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  441.322631] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  441.322646] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  441.322660] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  441.322674] [drm:skl_set_power_well [i915]] Enabling DDI B IO power well
>[  441.322688] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>[  441.322702] [drm:skl_set_power_well [i915]] Enabling DDI C IO power well
>[  441.322715] [drm:intel_power_well_enable [i915]] enabling DDI D IO power well
>[  441.322729] [drm:skl_set_power_well [i915]] Enabling DDI D IO power well
>[  441.325135] PM: early resume of devices complete after 5.570 msecs
>[  441.325583] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x77f6e018
>[  441.325656] r8169 0000:0e:00.0: System wakeup disabled by ACPI
>[  441.325730] [drm:intel_opregion_setup [i915]] Public ACPI methods supported
>[  441.325789] [drm:intel_opregion_setup [i915]] SWSCI supported
>[  441.326651] sd 2:0:0:0: [sda] Starting disk
>[  441.326696] ACPI : EC: event unblocked
>[  441.333141] rtc_cmos 00:04: System wakeup disabled by ACPI
>[  441.339840] [drm:intel_opregion_setup [i915]] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00300483
>[  441.339867] [drm:intel_opregion_setup [i915]] ASLE supported
>[  441.339890] [drm:intel_opregion_setup [i915]] ASLE extension supported
>[  441.339913] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (Mailbox #4)
>[  441.340163] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x4af05
>[  441.340541] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 0.2
>[  441.363430] r8169 0000:0e:00.0 enp14s0: link down
>[  441.641680] ata2: SATA link down (SStatus 4 SControl 300)
>[  441.641713] ata4: SATA link down (SStatus 4 SControl 300)
>[  441.641745] ata1: SATA link down (SStatus 4 SControl 300)
>[  441.649483] ata3: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
>[  441.735054] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 395 ms
>[  441.735679] [drm:drm_dp_i2c_do_msg] native defer
>[  441.737192] [drm:drm_dp_i2c_do_msg] native defer
>[  441.738607] [drm:drm_dp_i2c_do_msg] native defer
>[  441.740160] [drm:drm_dp_i2c_do_msg] native defer
>[  441.741675] [drm:drm_dp_i2c_do_msg] native defer
>[  441.742741] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  441.743204] [drm:gen8_init_common_ring [i915]] Execlists enabled for rcs0
>[  441.743299] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 14
>[  441.743488] [drm:gen8_init_common_ring [i915]] Execlists enabled for bcs0
>[  441.743701] [drm:gen8_init_common_ring [i915]] Execlists enabled for vcs0
>[  441.743884] [drm:gen8_init_common_ring [i915]] Execlists enabled for vecs0
>[  441.744047] [drm:intel_update_cdclk [i915]] Current CD clock rate: 337500 kHz, VCO: 8100000 kHz, ref: 24000 kHz
>[  441.744248] [drm:intel_set_plane_visible [i915]] pipe A active planes 0x0
>[  441.744315] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:32:pipe A] hw state readout: disabled
>[  441.744390] [drm:intel_set_plane_visible [i915]] pipe B active planes 0x0
>[  441.744453] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:39:pipe B] hw state readout: disabled
>[  441.744524] [drm:intel_set_plane_visible [i915]] pipe C active planes 0x0
>[  441.744589] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:46:pipe C] hw state readout: disabled
>[  441.744659] [drm:intel_modeset_setup_hw_state [i915]] DPLL 0 hw state readout: crtc_mask 0x00000000, on 1
>[  441.744755] [drm:intel_modeset_setup_hw_state [i915]] DPLL 1 hw state readout: crtc_mask 0x00000000, on 0
>[  441.744819] [drm:intel_modeset_setup_hw_state [i915]] DPLL 2 hw state readout: crtc_mask 0x00000000, on 0
>[  441.744883] [drm:intel_modeset_setup_hw_state [i915]] DPLL 3 hw state readout: crtc_mask 0x00000000, on 0
>[  441.744947] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:47:DDI A] hw state readout: disabled, pipe A
>[  441.745009] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:55:DDI B] hw state readout: disabled, pipe A
>[  441.745066] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:57:DP-MST A] hw state readout: disabled, pipe A
>[  441.745122] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:58:DP-MST B] hw state readout: disabled, pipe B
>[  441.745177] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:59:DP-MST C] hw state readout: disabled, pipe C
>[  441.745244] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:48:eDP-1] hw state readout: disabled
>[  441.745311] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:56:DP-1] hw state readout: disabled
>[  441.745391] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][setup_hw_state]
>[  441.745451] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0
>[  441.745509] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  441.745566] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  441.745577] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  441.745632] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  441.745681] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  441.745740] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  441.745796] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  441.745851] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: 0
>[  441.745905] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  441.745957] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  441.746020] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  441.746075] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  441.746128] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  441.746180] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  441.746230] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  441.746287] [drm:intel_dump_pipe_config [i915]] [CRTC:39:pipe B][setup_hw_state]
>[  441.746339] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0
>[  441.746390] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  441.746441] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  441.746450] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  441.746500] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  441.746509] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  441.746562] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  441.746615] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  441.746694] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: 0
>[  441.746746] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  441.746796] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  441.746859] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  441.746913] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  441.746966] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 1B] disabled, scaler_id = -1
>[  441.747019] [drm:intel_dump_pipe_config [i915]] [PLANE:35:plane 2B] disabled, scaler_id = -1
>[  441.747070] [drm:intel_dump_pipe_config [i915]] [PLANE:37:cursor B] disabled, scaler_id = -1
>[  441.747126] [drm:intel_dump_pipe_config [i915]] [CRTC:46:pipe C][setup_hw_state]
>[  441.747178] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0
>[  441.747228] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  441.747279] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  441.747288] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  441.747338] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  441.747347] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  441.747399] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  441.747449] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  441.747500] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: 0
>[  441.747550] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  441.747601] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  441.747663] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  441.747751] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  441.747798] [drm:intel_dump_pipe_config [i915]] [PLANE:40:plane 1C] disabled, scaler_id = -1
>[  441.747844] [drm:intel_dump_pipe_config [i915]] [PLANE:42:plane 2C] disabled, scaler_id = -1
>[  441.747890] [drm:intel_dump_pipe_config [i915]] [PLANE:44:cursor C] disabled, scaler_id = -1
>[  441.747949] [drm:intel_modeset_setup_hw_state [i915]] DPLL 0 enabled but not in use, disabling
>[  441.748120] [drm:intel_power_well_disable [i915]] disabling DDI D IO power well
>[  441.748170] [drm:skl_set_power_well [i915]] Disabling DDI D IO power well
>[  441.748219] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well
>[  441.748266] [drm:skl_set_power_well [i915]] Disabling DDI C IO power well
>[  441.748313] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[  441.748359] [drm:skl_set_power_well [i915]] Disabling DDI B IO power well
>[  441.748406] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  441.748452] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  441.748498] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  441.748563] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  441.748609] [drm:intel_power_well_disable [i915]] disabling DC off
>[  441.748683] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  441.748726] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  441.749158] [drm:intel_power_well_disable [i915]] disabling always-on
>[  441.749253] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  441.749412] [drm:intel_power_well_enable [i915]] enabling always-on
>[  441.749454] [drm:intel_power_well_enable [i915]] enabling DC off
>[  441.749762] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  441.749845] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  441.749901] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  441.749955] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  441.750009] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  441.750060] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  441.750116] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  441.750178] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:56:DP-1]
>[  441.750232] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  441.750288] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  441.750344] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  441.750397] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  441.750460] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  441.750522] [drm:intel_atomic_commit_tail [i915]] [CRTC:39:pipe B]
>[  441.750579] [drm:intel_atomic_commit_tail [i915]] [CRTC:46:pipe C]
>[  441.750631] [drm:intel_power_well_disable [i915]] disabling DC off
>[  441.750708] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  441.750752] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  441.751187] [drm:intel_power_well_disable [i915]] disabling always-on
>[  441.751502] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  441.751549] [drm:intel_power_well_enable [i915]] enabling always-on
>[  441.751593] [drm:intel_power_well_enable [i915]] enabling DC off
>[  441.751900] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  441.751978] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  441.752038] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  441.752094] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  441.752147] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  441.752220] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  441.752280] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  441.752387] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  441.752448] [drm:wait_panel_status [i915]] Wait complete
>[  441.752537] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000008
>[  441.752596] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled
>[  441.752694] [drm:intel_opregion_register [i915]] 2 outputs detected
>[  441.758338] PM: resume of devices complete after 433.195 msecs
>[  441.760943] PM: Finishing wakeup.
>[  441.760950] OOM killer enabled.
>[  441.760955] Restarting tasks ... done.
>[  441.888430] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  441.888512] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  441.888586] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  441.888750] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  441.961583] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  441.963021] [drm:drm_helper_hpd_irq_event] [CONNECTOR:48:eDP-1] status updated from connected to connected
>[  441.963105] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  441.963164] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  441.963241] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  441.964102] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  441.964182] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  441.964924] [drm:drm_dp_i2c_do_msg] native defer
>[  441.966451] [drm:drm_dp_i2c_do_msg] native defer
>[  441.967915] [drm:drm_dp_i2c_do_msg] native defer
>[  441.969438] [drm:drm_dp_i2c_do_msg] native defer
>[  441.970850] [drm:drm_dp_i2c_do_msg] native defer
>[  441.971862] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  441.972520] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  441.973175] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  441.973259] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  441.973281] [drm:drm_helper_hpd_irq_event] [CONNECTOR:56:DP-1] status updated from disconnected to disconnected
>[  441.974099] [drm:drm_mode_addfb2] [FB:50]
>[  441.989989] [drm:drm_mode_setcrtc] [CRTC:32:pipe A]
>[  441.990460] [drm:drm_mode_setcrtc] [CRTC:39:pipe B]
>[  441.991111] [drm:drm_mode_setcrtc] [CRTC:46:pipe C]
>[  441.991177] [drm:drm_mode_setcrtc] [CONNECTOR:48:eDP-1]
>[  441.991349] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  441.991421] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  441.991493] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  441.991562] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  441.991626] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  441.991778] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  441.991876] [drm:intel_dump_pipe_config [i915]] [CRTC:46:pipe C][modeset]
>[  441.991952] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  441.992039] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  441.992110] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  441.992188] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  441.992205] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  441.992280] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  441.992295] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  441.992373] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  441.992440] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  441.992515] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1
>[  441.992580] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  441.992661] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  441.992806] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  441.992876] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  441.992956] [drm:intel_dump_pipe_config [i915]] [PLANE:40:plane 1C] disabled, scaler_id = -1
>[  441.993041] [drm:intel_dump_pipe_config [i915]] [PLANE:42:plane 2C] disabled, scaler_id = -1
>[  441.993109] [drm:intel_dump_pipe_config [i915]] [PLANE:44:cursor C] disabled, scaler_id = -1
>[  441.993195] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  441.993285] [drm:intel_find_shared_dpll [i915]] [CRTC:46:pipe C] allocated DPLL 0
>[  441.993357] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe C
>[  441.994648] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  441.994797] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  441.994930] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  441.994997] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  441.995061] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  441.995121] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  441.995180] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  441.995243] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  441.995312] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  441.995376] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  441.995438] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  441.995512] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 4, on? 0) for crtc 46
>[  441.995576] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  441.995788] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  441.995887] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  441.996037] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000008
>[  441.996127] [drm:wait_panel_status [i915]] Wait complete
>[  441.996229] [drm:edp_panel_on [i915]] Wait for panel power on
>[  441.996359] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 0000000b
>[  442.196979] [drm:wait_panel_status [i915]] Wait complete
>[  442.197055] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  442.197117] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  442.198677] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  442.198793] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  442.198859] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  442.198925] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  442.199952] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  442.200028] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  442.201340] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  442.201413] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  442.203131] [drm:intel_enable_pipe [i915]] enabling pipe C
>[  442.203248] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  442.203315] [drm:intel_panel_enable_backlight [i915]] pipe C
>[  442.203436] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  442.400915] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  442.400994] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  442.403454] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  442.403550] [drm:intel_atomic_commit_tail [i915]] [CRTC:46:pipe C]
>[  442.403766] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  442.487098] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  442.487313] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  442.688928] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  442.689067] [drm:intel_disable_pipe [i915]] disabling pipe C
>[  442.704830] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  442.704929] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  442.705053] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000000
>[  442.755490] [drm:wait_panel_status [i915]] Wait complete
>[  442.755561] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  442.755627] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  442.755819] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 4, on? 1) for crtc 46
>[  442.755908] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  442.756047] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  442.756129] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  442.756199] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  442.756269] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  442.756335] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  442.756406] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  442.756482] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  442.756553] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  442.756621] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  442.756738] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  442.756839] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  442.756921] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  442.757015] [drm:intel_atomic_commit_tail [i915]] [CRTC:46:pipe C]
>[  442.757082] [drm:intel_power_well_disable [i915]] disabling DC off
>[  442.757167] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  442.757241] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  442.757310] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  442.757403] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  442.757496] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  442.757552] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  442.758060] [drm:intel_power_well_disable [i915]] disabling always-on
>[  442.759832] [drm:drm_mode_addfb2] [FB:50]
>[  442.769057] [drm:drm_mode_setcrtc] [CRTC:46:pipe C]
>[  442.769084] [drm:drm_mode_setcrtc] [CONNECTOR:48:eDP-1]
>[  442.769153] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  442.769177] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  442.769202] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  442.769226] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  442.769247] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  442.769271] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  442.769293] [drm:intel_dump_pipe_config [i915]] [CRTC:46:pipe C][modeset]
>[  442.769315] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  442.769336] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  442.769356] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  442.769376] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  442.769380] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  442.769399] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  442.769403] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  442.769423] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  442.769442] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  442.769461] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1
>[  442.769480] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  442.769498] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  442.769520] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  442.769539] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  442.769558] [drm:intel_dump_pipe_config [i915]] [PLANE:40:plane 1C] disabled, scaler_id = -1
>[  442.769577] [drm:intel_dump_pipe_config [i915]] [PLANE:42:plane 2C] disabled, scaler_id = -1
>[  442.769595] [drm:intel_dump_pipe_config [i915]] [PLANE:44:cursor C] disabled, scaler_id = -1
>[  442.769617] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  442.769663] [drm:intel_find_shared_dpll [i915]] [CRTC:46:pipe C] allocated DPLL 0
>[  442.769686] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe C
>[  442.770096] [drm:intel_power_well_enable [i915]] enabling always-on
>[  442.770116] [drm:intel_power_well_enable [i915]] enabling DC off
>[  442.770375] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  442.770401] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  442.770421] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  442.770472] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  442.770494] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  442.770515] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  442.770535] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  442.770555] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  442.770575] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  442.770598] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  442.770619] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  442.770679] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  442.770715] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 4, on? 0) for crtc 46
>[  442.770743] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  442.770785] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  442.770813] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  443.208994] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 08000001 control 00000000
>[  443.233048] [drm:wait_panel_status [i915]] Wait complete
>[  443.233153] [drm:edp_panel_on [i915]] Wait for panel power on
>[  443.233278] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  443.369140] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  443.369223] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  443.369313] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  443.369520] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  443.435079] [drm:wait_panel_status [i915]] Wait complete
>[  443.435155] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  443.435218] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  443.435337] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  443.435456] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  443.437094] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  443.437165] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  443.437231] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  443.437297] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  443.438366] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  443.438437] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  443.439820] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  443.439893] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  443.441727] [drm:intel_enable_pipe [i915]] enabling pipe C
>[  443.441823] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  443.441891] [drm:intel_panel_enable_backlight [i915]] pipe C
>[  443.442011] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  443.640908] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  443.640988] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  443.642016] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  443.642111] [drm:intel_atomic_commit_tail [i915]] [CRTC:46:pipe C]
>[  443.642242] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  443.725765] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  443.725980] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  443.769128] [drm] RC6 on
>[  443.915448] r8169 0000:0e:00.0 enp14s0: link up
>[  443.928773] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  443.928838] [drm:intel_disable_pipe [i915]] disabling pipe C
>[  443.942969] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  443.943023] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  443.943105] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000000
>[  443.994849] [drm:wait_panel_status [i915]] Wait complete
>[  443.994918] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  443.994983] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  443.995077] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 4, on? 1) for crtc 46
>[  443.995158] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  443.995286] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  443.995365] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  443.995424] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  443.995491] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  443.995565] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  443.995636] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  443.995780] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  443.995851] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  443.995928] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  443.996003] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  443.996082] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  443.996159] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  443.996230] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  443.996299] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  443.996398] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  443.996480] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  443.996573] [drm:intel_atomic_commit_tail [i915]] [CRTC:46:pipe C]
>[  443.996640] [drm:intel_power_well_disable [i915]] disabling DC off
>[  443.996749] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  443.996811] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  443.997268] [drm:intel_power_well_disable [i915]] disabling always-on
>[  443.998479] [IGT] kms_pipe_crc_basic: exiting, ret=0
>[  444.025734] Console: switching to colour frame buffer device 240x67
>[  444.348419] ata3.00: configured for UDMA/100
>[  444.482854] Console: switching to colour dummy device 80x25
>[  444.482946] [IGT] kms_setmode: executing
>[  444.494080] [IGT] kms_setmode: starting subtest basic-clone-single-crtc
>[  444.494168] [IGT] kms_setmode: exiting, ret=0
>[  444.515132] Console: switching to colour frame buffer device 240x67
>[  444.751330] Console: switching to colour dummy device 80x25
>[  444.751721] [IGT] kms_sink_crc_basic: executing
>[  444.785375] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  444.785466] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  444.785529] [drm:intel_power_well_enable [i915]] enabling always-on
>[  444.785584] [drm:intel_power_well_enable [i915]] enabling DC off
>[  444.785948] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  444.786401] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  444.786476] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  444.786545] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  444.786611] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  444.786748] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  444.786828] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  444.786956] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  444.787029] [drm:wait_panel_status [i915]] Wait complete
>[  444.787130] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000008
>[  444.787201] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled
>[  444.923034] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  444.923127] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  444.923209] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  444.923401] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  444.993590] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  444.994843] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  444.994864] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] probed modes :
>[  444.994876] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  444.995462] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  444.995566] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  444.995631] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  444.995770] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  444.996348] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  444.996424] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  444.996929] [drm:drm_dp_i2c_do_msg] native defer
>[  444.998408] [drm:drm_dp_i2c_do_msg] native defer
>[  444.999842] [drm:drm_dp_i2c_do_msg] native defer
>[  445.001316] [drm:drm_dp_i2c_do_msg] native defer
>[  445.002724] [drm:drm_dp_i2c_do_msg] native defer
>[  445.003800] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  445.004447] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  445.005034] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  445.005116] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  445.005136] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  445.018830] [drm:drm_mode_addfb2] [FB:60]
>[  445.034432] [drm:drm_mode_addfb2] [FB:62]
>[  445.036833] [drm:drm_mode_setcrtc] [CRTC:32:pipe A]
>[  445.036887] [drm:drm_mode_setcrtc] [CONNECTOR:48:eDP-1]
>[  445.037024] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  445.037075] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  445.037126] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  445.037174] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  445.037219] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  445.037266] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  445.037312] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  445.037355] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  445.037397] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  445.037437] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  445.037477] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  445.037485] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  445.037524] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  445.037531] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  445.037571] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  445.037610] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  445.037709] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  445.037770] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  445.037816] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  445.037881] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x5, cfgcr1: 0x0, cfgcr2: 0x0
>[  445.037928] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  445.037982] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  445.038028] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  445.038082] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  445.038134] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  445.038197] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  445.038248] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  445.039121] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  445.039157] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  445.039191] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  445.039223] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  445.039254] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  445.039287] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  445.039324] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  445.039358] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  445.039392] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  445.039431] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  445.039466] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  445.039530] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  445.039571] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  445.039706] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000008
>[  445.039762] [drm:wait_panel_status [i915]] Wait complete
>[  445.039827] [drm:edp_panel_on [i915]] Wait for panel power on
>[  445.039923] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 0000000b
>[  445.241811] [drm:wait_panel_status [i915]] Wait complete
>[  445.241887] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  445.241950] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  445.243467] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  445.243537] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  445.243603] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  445.243735] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  445.244793] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  445.244859] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  445.246216] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  445.246293] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  445.247243] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  445.247280] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  445.247297] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  445.247367] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  445.448915] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  445.449005] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  445.449112] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  445.449189] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  445.464251] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  445.464346] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  445.464475] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  445.480821] [drm:drm_mode_setcrtc] [CRTC:39:pipe B]
>[  445.481345] [drm:drm_mode_setcrtc] [CRTC:46:pipe C]
>[  445.531337] [drm:drm_mode_setcrtc] [CRTC:32:pipe A]
>[  445.531412] [drm:drm_mode_setcrtc] [CONNECTOR:48:eDP-1]
>[  445.531595] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  445.531670] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  445.531843] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  445.531919] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  445.531990] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  445.532066] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  445.532138] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  445.532202] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  445.532272] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  445.532335] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  445.532394] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  445.532406] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  445.532463] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  445.532474] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  445.532532] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  445.532587] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  445.532644] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  445.532743] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  445.532804] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  445.532875] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  445.532935] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  445.533002] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] FB:60, fb = 1920x1080 format = XR24 little-endian (0x34325258)
>[  445.533062] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+1920+1080 dst 0x0+1920+1080
>[  445.533122] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  445.533181] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  445.533250] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  445.533322] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  445.533392] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  445.534573] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  445.736976] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  445.737127] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  445.748496] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  445.748605] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  445.748832] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000000
>[  445.799389] [drm:wait_panel_status [i915]] Wait complete
>[  445.799459] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  445.799524] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  445.799615] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  445.799857] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  445.799954] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  445.800053] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  445.800141] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  445.800227] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  445.800307] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  445.800382] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  445.800459] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  445.800542] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  445.800620] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  445.800761] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  445.800824] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  445.800902] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  445.800971] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  445.801037] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  445.801113] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  445.801244] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  445.801328] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  445.801429] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  446.256758] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  446.256790] [drm:wait_panel_status [i915]] Wait complete
>[  446.256833] [drm:edp_panel_on [i915]] Wait for panel power on
>[  446.256905] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 0000000a control 00000003
>[  446.392868] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  446.392951] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  446.393025] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  446.393195] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  446.457811] [drm:wait_panel_status [i915]] Wait complete
>[  446.457897] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  446.457967] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  446.458100] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  446.458230] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  446.459844] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  446.459916] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  446.459981] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  446.460047] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  446.461116] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  446.461185] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  446.462491] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  446.462562] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  446.464290] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  446.464384] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  446.464452] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  446.464572] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  446.664821] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  446.664894] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  446.664981] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  446.665047] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  446.681401] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  446.681512] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  446.681642] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  446.748415] [IGT] kms_sink_crc_basic: exiting, ret=0
>[  446.762292] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  446.762385] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  446.969026] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  446.969383] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  446.983071] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  446.983167] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  446.983289] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000000
>[  447.034071] [drm:wait_panel_status [i915]] Wait complete
>[  447.034172] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  447.034235] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  447.034327] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  447.034436] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  447.034537] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  447.034668] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  447.034816] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  447.034883] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  447.034948] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  447.035009] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  447.035075] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  447.035148] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  447.035216] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  447.035282] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  447.035346] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  447.035404] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  447.035483] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  447.035553] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  447.035731] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  447.036126] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  447.036204] [drm:intel_power_well_disable [i915]] disabling DC off
>[  447.036266] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  447.036320] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  447.036822] [drm:intel_power_well_disable [i915]] disabling always-on
>[  447.037584] Console: switching to colour frame buffer device 240x67
>[  447.191223] Console: switching to colour dummy device 80x25
>[  447.191380] [IGT] pm_backlight: executing
>[  447.191904] [IGT] pm_backlight: starting subtest basic-brightness
>[  447.192035] [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=0/7143
>[  447.192606] [drm:intel_backlight_device_get_brightness [i915]] get backlight PWM = 0
>[  447.192767] [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=7143/7143
>[  447.193114] [drm:intel_backlight_device_get_brightness [i915]] get backlight PWM = 0
>[  447.195353] [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=7143/7143
>[  447.195514] [IGT] pm_backlight: exiting, ret=99
>[  447.196791] Console: switching to colour frame buffer device 240x67
>[  447.396849] Console: switching to colour dummy device 80x25
>[  447.396936] [IGT] pm_rpm: executing
>[  447.410227] [drm:drm_mode_addfb2] [FB:60]
>[  448.450607] [drm:intel_runtime_suspend [i915]] Suspending device
>[  448.452290] [IGT] pm_rpm: starting subtest basic-pci-d3-state
>[  448.452354] [drm:drm_mode_setcrtc] [CRTC:32:pipe A]
>[  448.452940] [drm:drm_mode_setcrtc] [CRTC:39:pipe B]
>[  448.453394] [drm:drm_mode_setcrtc] [CRTC:46:pipe C]
>[  448.456885] [drm:intel_runtime_suspend [i915]] Device suspended
>[  448.559297] [drm:drm_mode_setcrtc] [CRTC:32:pipe A]
>[  448.559322] [drm:drm_mode_setcrtc] [CONNECTOR:48:eDP-1]
>[  448.559389] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  448.559413] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  448.559437] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  448.559459] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  448.559479] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  448.559502] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  448.559523] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  448.559543] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  448.559563] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  448.559582] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  448.559600] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  448.559604] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  448.559622] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  448.559649] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  448.559668] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  448.559686] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  448.559705] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  448.559725] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  448.559745] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  448.559767] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  448.559787] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  448.559806] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  448.559825] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  448.559844] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  448.559867] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  448.559892] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  448.559913] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  448.571922] [drm:intel_runtime_resume [i915]] Resuming device
>[  448.575407] [drm:intel_runtime_resume [i915]] Device resumed
>[  448.576111] [drm:intel_runtime_suspend [i915]] Suspending device
>[  448.578553] [drm:intel_runtime_suspend [i915]] Device suspended
>[  448.602018] [drm:intel_runtime_resume [i915]] Resuming device
>[  448.607689] [drm:intel_runtime_resume [i915]] Device resumed
>[  448.607758] [drm:intel_power_well_enable [i915]] enabling always-on
>[  448.607815] [drm:intel_power_well_enable [i915]] enabling DC off
>[  448.608113] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  448.608227] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  448.608300] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  448.608369] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  448.608434] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  448.608499] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  448.608566] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  448.608638] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  448.608775] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  448.608851] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  448.608937] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  448.609013] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  448.609140] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  448.609220] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  448.609344] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  448.609422] [drm:wait_panel_status [i915]] Wait complete
>[  448.609510] [drm:edp_panel_on [i915]] Wait for panel power on
>[  448.609630] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  448.746912] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  448.747005] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  448.747086] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  448.747278] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  448.811077] [drm:wait_panel_status [i915]] Wait complete
>[  448.811163] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  448.811232] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  448.811366] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  448.811495] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  448.813097] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  448.813171] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  448.813237] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  448.813305] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  448.814341] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  448.814408] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  448.815848] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  448.815926] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  448.817667] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  448.817822] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  448.817890] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  448.818010] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  449.016909] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  449.016989] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  449.017085] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  449.017155] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  449.018058] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  449.018187] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  449.018329] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  449.018599] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  449.018769] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  449.018848] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  449.018925] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  449.018992] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  449.019818] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  449.021053] [drm:drm_helper_hpd_irq_event] [CONNECTOR:48:eDP-1] status updated from connected to connected
>[  449.021144] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  449.021202] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  449.021276] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  449.022025] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  449.022115] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  449.022721] [drm:drm_dp_i2c_do_msg] native defer
>[  449.024101] [drm:drm_dp_i2c_do_msg] native defer
>[  449.025252] [drm:drm_dp_i2c_do_msg] native defer
>[  449.026466] [drm:drm_dp_i2c_do_msg] native defer
>[  449.027778] [drm:drm_dp_i2c_do_msg] native defer
>[  449.028698] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  449.029184] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  449.029547] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  449.029579] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  449.029592] [drm:drm_helper_hpd_irq_event] [CONNECTOR:56:DP-1] status updated from disconnected to disconnected
>[  449.029627] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  449.029696] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  449.029726] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  449.029753] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  449.029777] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  449.030279] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  449.031114] [drm:drm_helper_hpd_irq_event] [CONNECTOR:48:eDP-1] status updated from connected to connected
>[  449.031405] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  449.031514] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  449.232837] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  449.232969] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  449.235504] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  449.235603] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  449.235797] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000000
>[  449.286687] [drm:wait_panel_status [i915]] Wait complete
>[  449.286820] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  449.286884] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  449.287030] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  449.287185] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  449.287266] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  449.287392] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  449.287470] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  449.287538] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  449.287604] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  449.287738] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  449.287818] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  449.287907] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  449.287972] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  449.288040] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  449.288118] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  449.288209] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  449.288278] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  449.288367] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  449.288457] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  449.288626] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  449.288785] [drm:intel_power_well_disable [i915]] disabling DC off
>[  449.288880] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  449.288963] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  449.289451] [drm:intel_power_well_disable [i915]] disabling always-on
>[  449.290537] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  449.290597] [drm:intel_power_well_enable [i915]] enabling always-on
>[  449.290648] [drm:intel_power_well_enable [i915]] enabling DC off
>[  449.291022] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  449.291135] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  449.291223] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  449.291708] [IGT] pm_rpm: exiting, ret=0
>[  449.291893] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  449.292003] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  449.292524] [drm:drm_dp_i2c_do_msg] native defer
>[  449.293993] [drm:drm_dp_i2c_do_msg] native defer
>[  449.295686] [drm:drm_dp_i2c_do_msg] native defer
>[  449.297174] [drm:drm_dp_i2c_do_msg] native defer
>[  449.298413] [drm:drm_dp_i2c_do_msg] native defer
>[  449.299294] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  449.299760] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  449.300104] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  449.300131] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  449.300148] [drm:intel_power_well_disable [i915]] disabling DC off
>[  449.300166] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  449.300182] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  449.300590] [drm:intel_power_well_disable [i915]] disabling always-on
>[  449.300594] [drm:drm_helper_hpd_irq_event] [CONNECTOR:56:DP-1] status updated from disconnected to disconnected
>[  449.322103] Console: switching to colour frame buffer device 240x67
>[  449.401821] [drm:intel_runtime_suspend [i915]] Suspending device
>[  449.404799] [drm:intel_runtime_suspend [i915]] Device suspended
>[  449.448213] Console: switching to colour dummy device 80x25
>[  449.448334] [IGT] pm_rpm: executing
>[  449.459789] [drm:intel_runtime_resume [i915]] Resuming device
>[  449.464599] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  449.464733] [drm:intel_runtime_resume [i915]] Device resumed
>[  449.465044] [drm:intel_power_well_enable [i915]] enabling always-on
>[  449.465071] [drm:intel_power_well_enable [i915]] enabling DC off
>[  449.465338] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  449.465385] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  449.465423] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  449.465456] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  449.465488] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  449.465535] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  449.465585] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  449.736894] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  449.736983] [drm:wait_panel_status [i915]] Wait complete
>[  449.737094] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000008
>[  449.737171] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled
>[  449.872984] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  449.873077] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  449.873162] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  449.873358] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  449.945654] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  449.947043] [drm:drm_helper_hpd_irq_event] [CONNECTOR:48:eDP-1] status updated from connected to connected
>[  449.947137] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  449.947201] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  449.947285] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  449.948067] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  449.948173] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  449.948736] [drm:drm_dp_i2c_do_msg] native defer
>[  449.950269] [drm:drm_dp_i2c_do_msg] native defer
>[  449.951760] [drm:drm_dp_i2c_do_msg] native defer
>[  449.953302] [drm:drm_dp_i2c_do_msg] native defer
>[  449.954773] [drm:drm_dp_i2c_do_msg] native defer
>[  449.955850] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  449.956538] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  449.957096] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  449.957180] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  449.957202] [drm:drm_helper_hpd_irq_event] [CONNECTOR:56:DP-1] status updated from disconnected to disconnected
>[  449.958053] [drm:drm_mode_addfb2] [FB:60]
>[  451.000760] [IGT] pm_rpm: starting subtest basic-rte
>[  451.000835] [drm:drm_mode_setcrtc] [CRTC:32:pipe A]
>[  451.001142] [drm:drm_mode_setcrtc] [CRTC:39:pipe B]
>[  451.001375] [drm:drm_mode_setcrtc] [CRTC:46:pipe C]
>[  452.472975] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[  452.473094] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000000
>[  452.473156] [drm:intel_power_well_disable [i915]] disabling DC off
>[  452.473219] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  452.473275] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  452.473796] [drm:intel_power_well_disable [i915]] disabling always-on
>[  452.474050] [drm:intel_runtime_suspend [i915]] Suspending device
>[  452.481721] [drm:intel_runtime_suspend [i915]] Device suspended
>[  452.506033] [drm:drm_mode_setcrtc] [CRTC:32:pipe A]
>[  452.506121] [drm:drm_mode_setcrtc] [CONNECTOR:48:eDP-1]
>[  452.506320] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  452.506394] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  452.506473] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  452.506545] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  452.506610] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  452.506831] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  452.506931] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  452.507028] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  452.507119] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  452.507208] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  452.507292] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  452.507314] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  452.507393] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  452.507411] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  452.507490] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  452.507572] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  452.507656] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  452.507804] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  452.507880] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  452.507974] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[  452.508058] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  452.508146] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  452.508226] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  452.508310] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  452.508407] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  452.508505] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  452.508593] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  452.521092] [drm:intel_runtime_resume [i915]] Resuming device
>[  452.529342] [drm:intel_runtime_resume [i915]] Device resumed
>[  452.530438] [drm:intel_runtime_suspend [i915]] Suspending device
>[  452.537738] [drm:intel_runtime_suspend [i915]] Device suspended
>[  452.562077] [drm:intel_runtime_resume [i915]] Resuming device
>[  452.570278] [drm:intel_runtime_resume [i915]] Device resumed
>[  452.570346] [drm:intel_power_well_enable [i915]] enabling always-on
>[  452.570403] [drm:intel_power_well_enable [i915]] enabling DC off
>[  452.570769] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  452.571275] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  452.571374] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  452.571470] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  452.571559] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  452.571620] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  452.571740] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  452.571824] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  452.571891] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  452.571964] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  452.572073] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  452.572169] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  452.572316] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  452.572390] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  452.977017] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  452.977105] [drm:wait_panel_status [i915]] Wait complete
>[  452.977198] [drm:edp_panel_on [i915]] Wait for panel power on
>[  452.977317] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[  453.113168] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  453.113272] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  453.113343] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  453.113496] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  453.179308] [drm:wait_panel_status [i915]] Wait complete
>[  453.179384] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  453.179446] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  453.179566] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  453.179792] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  453.181315] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  453.181385] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  453.181448] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  453.181513] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  453.182556] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  453.182629] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  453.184078] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  453.184155] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  453.185918] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  453.186020] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  453.186087] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  453.186211] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  453.384918] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  453.385009] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  453.385116] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  453.385196] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  453.386198] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  453.386305] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  453.386450] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  453.386914] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  453.387034] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  453.387150] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  453.387251] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  453.387357] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  453.388328] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  453.389703] [drm:drm_helper_hpd_irq_event] [CONNECTOR:48:eDP-1] status updated from connected to connected
>[  453.389809] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  453.389875] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  453.389975] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  453.390585] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  453.390683] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  453.391285] [drm:drm_dp_i2c_do_msg] native defer
>[  453.392683] [drm:drm_dp_i2c_do_msg] native defer
>[  453.394288] [drm:drm_dp_i2c_do_msg] native defer
>[  453.395681] [drm:drm_dp_i2c_do_msg] native defer
>[  453.397294] [drm:drm_dp_i2c_do_msg] native defer
>[  453.398266] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  453.398932] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  453.399450] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  453.399532] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  453.399564] [drm:drm_helper_hpd_irq_event] [CONNECTOR:56:DP-1] status updated from disconnected to disconnected
>[  453.399820] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  453.400047] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  453.608756] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  453.608879] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  453.619521] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  453.619615] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  453.619804] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000000
>[  453.671158] [drm:wait_panel_status [i915]] Wait complete
>[  453.671217] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  453.671276] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  453.671358] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  453.671436] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  453.671510] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  453.671630] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  453.671779] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  453.671854] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  453.671927] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  453.672028] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  453.672090] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  453.672154] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  453.672250] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  453.672315] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  453.672396] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  453.672485] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  453.672588] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  453.672685] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  453.672834] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  453.673000] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  453.673107] [drm:intel_power_well_disable [i915]] disabling DC off
>[  453.673170] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  453.673225] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  453.673728] [drm:intel_power_well_disable [i915]] disabling always-on
>[  453.674409] [drm:intel_runtime_suspend [i915]] Suspending device
>[  453.674566] [IGT] pm_rpm: exiting, ret=0
>[  453.675179] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  453.682195] [drm:intel_runtime_suspend [i915]] Device suspended
>[  453.706114] [drm:intel_runtime_resume [i915]] Resuming device
>[  453.714300] [drm:intel_runtime_resume [i915]] Device resumed
>[  453.714797] [drm:intel_power_well_enable [i915]] enabling always-on
>[  453.714868] [drm:intel_power_well_enable [i915]] enabling DC off
>[  453.715192] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  453.715333] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  453.715441] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  453.715532] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  453.715598] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  453.715745] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  453.715824] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  454.129003] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  454.129095] [drm:wait_panel_status [i915]] Wait complete
>[  454.129206] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000008
>[  454.129283] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled
>[  454.267046] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  454.267128] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  454.267203] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  454.267376] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  454.337656] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  454.339036] [drm:drm_helper_hpd_irq_event] [CONNECTOR:48:eDP-1] status updated from connected to connected
>[  454.339118] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  454.339176] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  454.339247] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  454.339929] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  454.340030] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  454.340563] [drm:drm_dp_i2c_do_msg] native defer
>[  454.342080] [drm:drm_dp_i2c_do_msg] native defer
>[  454.343731] [drm:drm_dp_i2c_do_msg] native defer
>[  454.345424] [drm:drm_dp_i2c_do_msg] native defer
>[  454.346894] [drm:drm_dp_i2c_do_msg] native defer
>[  454.348005] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  454.348669] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  454.349271] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  454.349353] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  454.349375] [drm:drm_helper_hpd_irq_event] [CONNECTOR:56:DP-1] status updated from disconnected to disconnected
>[  454.349479] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  454.349552] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  454.349623] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  454.349765] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  454.349857] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  454.350611] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  454.351911] [drm:drm_helper_hpd_irq_event] [CONNECTOR:48:eDP-1] status updated from connected to connected
>[  454.351986] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  454.352043] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  454.352118] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  454.352802] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  454.352895] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  454.353338] [drm:drm_dp_i2c_do_msg] native defer
>[  454.354633] [drm:drm_dp_i2c_do_msg] native defer
>[  454.355932] [drm:drm_dp_i2c_do_msg] native defer
>[  454.357241] [drm:drm_dp_i2c_do_msg] native defer
>[  454.358462] [drm:drm_dp_i2c_do_msg] native defer
>[  454.359333] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  454.359798] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  454.360142] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  454.360168] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  454.360175] [drm:drm_helper_hpd_irq_event] [CONNECTOR:56:DP-1] status updated from disconnected to disconnected
>[  454.360846] Console: switching to colour frame buffer device 240x67
>[  454.791923] Console: switching to colour dummy device 80x25
>[  454.792232] [IGT] pm_rps: executing
>[  454.809958] [IGT] pm_rps: starting subtest basic-api
>[  454.812167] [IGT] pm_rps: exiting, ret=0
>[  454.833603] Console: switching to colour frame buffer device 240x67
>[  455.027985] Console: switching to colour dummy device 80x25
>[  455.028117] [IGT] prime_busy: executing
>[  455.156134] [IGT] prime_busy: starting subtest basic-after-default
>[  456.282061] [IGT] prime_busy: exiting, ret=0
>[  456.300334] Console: switching to colour frame buffer device 240x67
>[  456.531793] Console: switching to colour dummy device 80x25
>[  456.532105] [IGT] prime_busy: executing
>[  456.567209] [IGT] prime_busy: starting subtest basic-before-default
>[  456.888828] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[  456.888945] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000000
>[  456.889008] [drm:intel_power_well_disable [i915]] disabling DC off
>[  456.889072] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  456.889127] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  456.889200] [drm:intel_power_well_disable [i915]] disabling always-on
>[  456.891151] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  456.891232] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  456.891304] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  456.891469] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  457.683063] [IGT] prime_busy: exiting, ret=0
>[  457.706264] Console: switching to colour frame buffer device 240x67
>[  457.793605] [drm:intel_runtime_suspend [i915]] Suspending device
>[  457.796343] [drm:intel_runtime_suspend [i915]] Device suspended
>[  457.883937] Console: switching to colour dummy device 80x25
>[  457.884033] [IGT] prime_busy: executing
>[  457.895751] [drm:intel_runtime_resume [i915]] Resuming device
>[  457.898722] [drm:intel_runtime_resume [i915]] Device resumed
>[  457.900786] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  457.900803] [drm:intel_power_well_enable [i915]] enabling always-on
>[  457.900818] [drm:intel_power_well_enable [i915]] enabling DC off
>[  457.901157] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  457.901199] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  457.901224] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  457.901243] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  457.901260] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  457.901289] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  457.901313] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  457.901384] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  457.901407] [drm:wait_panel_status [i915]] Wait complete
>[  457.901460] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000008
>[  457.901498] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled
>[  458.037252] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  458.037332] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  458.037401] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  458.037549] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  458.038362] [IGT] prime_busy: starting subtest basic-wait-after-default
>[  458.105558] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  458.107325] [drm:drm_helper_hpd_irq_event] [CONNECTOR:48:eDP-1] status updated from connected to connected
>[  458.107409] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  458.107490] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  458.107595] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  458.108452] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  458.108531] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  458.109052] [drm:drm_dp_i2c_do_msg] native defer
>[  458.110538] [drm:drm_dp_i2c_do_msg] native defer
>[  458.111920] [drm:drm_dp_i2c_do_msg] native defer
>[  458.113435] [drm:drm_dp_i2c_do_msg] native defer
>[  458.114872] [drm:drm_dp_i2c_do_msg] native defer
>[  458.115979] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  458.116632] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  458.117236] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  458.117319] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  458.117340] [drm:drm_helper_hpd_irq_event] [CONNECTOR:56:DP-1] status updated from disconnected to disconnected
>[  459.058070] [IGT] prime_busy: exiting, ret=0
>[  459.076341] Console: switching to colour frame buffer device 240x67
>[  459.266889] Console: switching to colour dummy device 80x25
>[  459.267006] [IGT] prime_busy: executing
>[  459.344134] [IGT] prime_busy: starting subtest basic-wait-before-default
>[  460.406049] [IGT] prime_busy: exiting, ret=0
>[  460.428277] Console: switching to colour frame buffer device 240x67
>[  460.664752] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[  460.664813] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000000
>[  460.664831] [drm:intel_power_well_disable [i915]] disabling DC off
>[  460.664851] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  460.664867] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  460.665277] [drm:intel_power_well_disable [i915]] disabling always-on
>[  460.665297] [drm:intel_runtime_suspend [i915]] Suspending device
>[  460.667872] [drm:intel_runtime_suspend [i915]] Device suspended
>[  460.721744] Console: switching to colour dummy device 80x25
>[  460.722008] [IGT] prime_self_import: executing
>[  460.722277] [IGT] prime_self_import: starting subtest basic-llseek-bad
>[  460.734012] [drm:intel_runtime_resume [i915]] Resuming device
>[  460.741913] [drm:intel_runtime_resume [i915]] Device resumed
>[  460.748206] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  460.748271] [drm:intel_power_well_enable [i915]] enabling always-on
>[  460.748329] [drm:intel_power_well_enable [i915]] enabling DC off
>[  460.748456] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  460.748555] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  460.748631] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  460.748772] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  460.748850] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  460.748952] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  460.749054] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  460.767450] [IGT] prime_self_import: exiting, ret=0
>[  461.169010] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  461.169101] [drm:wait_panel_status [i915]] Wait complete
>[  461.169214] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000008
>[  461.169292] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled
>[  461.305114] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  461.305209] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  461.305292] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  461.305482] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  461.377612] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  461.378830] [drm:drm_helper_hpd_irq_event] [CONNECTOR:48:eDP-1] status updated from connected to connected
>[  461.378945] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  461.379031] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  461.379118] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  461.379771] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  461.379867] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  461.380407] [drm:drm_dp_i2c_do_msg] native defer
>[  461.381856] [drm:drm_dp_i2c_do_msg] native defer
>[  461.383463] [drm:drm_dp_i2c_do_msg] native defer
>[  461.384931] [drm:drm_dp_i2c_do_msg] native defer
>[  461.386482] [drm:drm_dp_i2c_do_msg] native defer
>[  461.387463] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  461.388250] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  461.388859] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  461.388980] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  461.389002] [drm:drm_helper_hpd_irq_event] [CONNECTOR:56:DP-1] status updated from disconnected to disconnected
>[  461.391236] Console: switching to colour frame buffer device 240x67
>[  461.532132] Console: switching to colour dummy device 80x25
>[  461.532268] [IGT] prime_self_import: executing
>[  461.532411] [IGT] prime_self_import: starting subtest basic-llseek-size
>[  461.555498] [IGT] prime_self_import: exiting, ret=0
>[  461.583897] Console: switching to colour frame buffer device 240x67
>[  461.785596] Console: switching to colour dummy device 80x25
>[  461.785958] [IGT] prime_self_import: executing
>[  461.786263] [IGT] prime_self_import: starting subtest basic-with_fd_dup
>[  461.835674] [IGT] prime_self_import: exiting, ret=0
>[  461.862156] Console: switching to colour frame buffer device 240x67
>[  462.069907] Console: switching to colour dummy device 80x25
>[  462.070021] [IGT] prime_self_import: executing
>[  462.070140] [IGT] prime_self_import: starting subtest basic-with_one_bo
>[  462.117744] [IGT] prime_self_import: exiting, ret=0
>[  462.130442] Console: switching to colour frame buffer device 240x67
>[  462.304176] Console: switching to colour dummy device 80x25
>[  462.304300] [IGT] prime_self_import: executing
>[  462.304426] [IGT] prime_self_import: starting subtest basic-with_one_bo_two_files
>[  462.326492] [IGT] prime_self_import: exiting, ret=0
>[  462.356029] Console: switching to colour frame buffer device 240x67
>[  462.565572] Console: switching to colour dummy device 80x25
>[  462.565755] [IGT] prime_self_import: executing
>[  462.565875] [IGT] prime_self_import: starting subtest basic-with_two_bos
>[  462.611318] [IGT] prime_self_import: exiting, ret=0
>[  462.638072] Console: switching to colour frame buffer device 240x67
>[  462.839057] Console: switching to colour dummy device 80x25
>[  462.839154] [IGT] prime_vgem: executing
>[  462.864979] [IGT] prime_vgem: starting subtest basic-busy-default
>[  462.876898] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4096
>[  462.878675] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4
>[  462.878891] [IGT] prime_vgem: exiting, ret=0
>[  462.903896] Console: switching to colour frame buffer device 240x67
>[  463.073544] Console: switching to colour dummy device 80x25
>[  463.074025] [IGT] prime_vgem: executing
>[  463.103356] [IGT] prime_vgem: starting subtest basic-fence-flip
>[  463.103460] [drm:vgem_gem_dumb_create [vgem]] Created object of size 3145728
>[  463.109565] [drm:drm_mode_addfb2] [FB:60]
>[  463.109687] [drm:vgem_gem_dumb_create [vgem]] Created object of size 3145728
>[  463.115779] [drm:drm_mode_addfb2] [FB:62]
>[  463.115865] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  463.115950] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  463.116024] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  463.116095] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  463.116160] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  463.116223] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  463.116975] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  463.118235] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  463.118256] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] probed modes :
>[  463.118268] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  463.118303] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  463.118379] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  463.118433] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  463.118508] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  463.119152] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  463.119250] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  463.119766] [drm:drm_dp_i2c_do_msg] native defer
>[  463.121291] [drm:drm_dp_i2c_do_msg] native defer
>[  463.122702] [drm:drm_dp_i2c_do_msg] native defer
>[  463.124240] [drm:drm_dp_i2c_do_msg] native defer
>[  463.125681] [drm:drm_dp_i2c_do_msg] native defer
>[  463.126768] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  463.127416] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  463.127998] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  463.128077] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  463.128096] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  463.128230] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4
>[  463.128548] [IGT] prime_vgem: exiting, ret=77
>[  463.155844] Console: switching to colour frame buffer device 240x67
>[  463.370973] Console: switching to colour dummy device 80x25
>[  463.371298] [IGT] prime_vgem: executing
>[  463.400332] [IGT] prime_vgem: starting subtest basic-fence-mmap
>[  463.400523] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4194304
>[  463.425125] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4
>[  463.425362] [IGT] prime_vgem: exiting, ret=0
>[  463.453923] Console: switching to colour frame buffer device 240x67
>[  463.660000] Console: switching to colour dummy device 80x25
>[  463.660098] [IGT] prime_vgem: executing
>[  463.671111] [IGT] prime_vgem: starting subtest basic-fence-read
>[  463.671182] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4194304
>[  463.691117] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4
>[  463.691247] [IGT] prime_vgem: exiting, ret=0
>[  463.719942] Console: switching to colour frame buffer device 240x67
>[  463.913872] Console: switching to colour dummy device 80x25
>[  463.913986] [IGT] prime_vgem: executing
>[  463.935962] [IGT] prime_vgem: starting subtest basic-fence-wait-default
>[  463.947986] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4096
>[  464.951873] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4
>[  464.952178] [IGT] prime_vgem: exiting, ret=0
>[  465.039996] Console: switching to colour frame buffer device 240x67
>[  465.262386] Console: switching to colour dummy device 80x25
>[  465.262508] [IGT] prime_vgem: executing
>[  465.276256] [IGT] prime_vgem: starting subtest basic-gtt
>[  465.276307] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4194304
>[  465.295595] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4
>[  465.295836] [IGT] prime_vgem: exiting, ret=0
>[  465.321281] Console: switching to colour frame buffer device 240x67
>[  465.516007] Console: switching to colour dummy device 80x25
>[  465.516326] [IGT] prime_vgem: executing
>[  465.545366] [IGT] prime_vgem: starting subtest basic-read
>[  465.545468] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4194304
>[  465.555756] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4
>[  465.555819] [IGT] prime_vgem: exiting, ret=0
>[  465.577608] Console: switching to colour frame buffer device 240x67
>[  465.657786] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[  465.657867] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000000
>[  465.657901] [drm:intel_power_well_disable [i915]] disabling DC off
>[  465.657934] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  465.657964] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  465.658386] [drm:intel_power_well_disable [i915]] disabling always-on
>[  465.660312] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  465.660359] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  465.660400] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  465.660829] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  465.665617] [drm:intel_runtime_suspend [i915]] Suspending device
>[  465.670559] [drm:intel_runtime_suspend [i915]] Device suspended
>[  465.769036] Console: switching to colour dummy device 80x25
>[  465.769161] [IGT] prime_vgem: executing
>[  465.782838] [drm:intel_runtime_resume [i915]] Resuming device
>[  465.789677] [drm:intel_runtime_resume [i915]] Device resumed
>[  465.796522] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  465.796583] [drm:intel_power_well_enable [i915]] enabling always-on
>[  465.796654] [drm:intel_power_well_enable [i915]] enabling DC off
>[  465.797062] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  465.797165] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  465.797237] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  465.797304] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  465.797367] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  465.797451] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  465.797522] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  465.814304] [IGT] prime_vgem: starting subtest basic-sync-default
>[  465.829939] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4096
>[  465.831490] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4
>[  465.831764] [IGT] prime_vgem: exiting, ret=0
>[  466.161021] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  466.161122] [drm:wait_panel_status [i915]] Wait complete
>[  466.161244] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000008
>[  466.161330] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled
>[  466.297142] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  466.297235] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  466.297316] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  466.297503] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  466.369659] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  466.371048] [drm:drm_helper_hpd_irq_event] [CONNECTOR:48:eDP-1] status updated from connected to connected
>[  466.371132] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  466.371189] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  466.371269] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  466.371903] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  466.371992] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  466.372526] [drm:drm_dp_i2c_do_msg] native defer
>[  466.374033] [drm:drm_dp_i2c_do_msg] native defer
>[  466.375547] [drm:drm_dp_i2c_do_msg] native defer
>[  466.377040] [drm:drm_dp_i2c_do_msg] native defer
>[  466.378604] [drm:drm_dp_i2c_do_msg] native defer
>[  466.379665] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  466.380415] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  466.381022] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  466.381116] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  466.381139] [drm:drm_helper_hpd_irq_event] [CONNECTOR:56:DP-1] status updated from disconnected to disconnected
>[  466.383312] Console: switching to colour frame buffer device 240x67
>[  466.600480] Console: switching to colour dummy device 80x25
>[  466.600806] [IGT] prime_vgem: executing
>[  466.618859] [IGT] prime_vgem: starting subtest basic-wait-default
>[  466.641927] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4096
>[  466.643850] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4
>[  466.644065] [IGT] prime_vgem: exiting, ret=0
>[  466.660510] Console: switching to colour frame buffer device 240x67
>[  466.855014] Console: switching to colour dummy device 80x25
>[  466.855098] [IGT] prime_vgem: executing
>[  466.880897] [IGT] prime_vgem: starting subtest basic-write
>[  466.880932] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4194304
>[  466.890927] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4
>[  466.891012] [IGT] prime_vgem: exiting, ret=0
>[  466.917768] Console: switching to colour frame buffer device 240x67
>[  467.130115] Console: switching to colour dummy device 80x25
>[  467.130247] [IGT] vgem_basic: executing
>[  467.131896] [IGT] vgem_basic: starting subtest create
>[  467.131949] [drm:vgem_gem_dumb_create [vgem]] Created object of size 1
>[  467.132000] [drm:vgem_gem_dumb_create [vgem]] Created object of size 1048576
>[  467.132043] [drm:vgem_gem_dumb_create [vgem]] Created object of size 2147483648
>[  467.132159] [IGT] vgem_basic: exiting, ret=0
>[  467.132941] Console: switching to colour frame buffer device 240x67
>[  467.330438] Console: switching to colour dummy device 80x25
>[  467.330912] [IGT] vgem_basic: executing
>[  467.334829] [IGT] vgem_basic: starting subtest debugfs
>[  467.335745] [IGT] vgem_basic: exiting, ret=0
>[  467.337371] Console: switching to colour frame buffer device 240x67
>[  467.531193] Console: switching to colour dummy device 80x25
>[  467.531501] [IGT] vgem_basic: executing
>[  467.535457] [IGT] vgem_basic: starting subtest dmabuf-export
>[  467.560104] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4096
>[  467.560488] [IGT] vgem_basic: exiting, ret=0
>[  467.589704] Console: switching to colour frame buffer device 240x67
>[  467.801378] Console: switching to colour dummy device 80x25
>[  467.801496] [IGT] vgem_basic: executing
>[  467.803133] [IGT] vgem_basic: starting subtest dmabuf-fence
>[  467.803179] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4096
>[  467.803346] [IGT] vgem_basic: exiting, ret=0
>[  467.803998] Console: switching to colour frame buffer device 240x67
>[  467.955936] Console: switching to colour dummy device 80x25
>[  467.956095] [IGT] vgem_basic: executing
>[  467.958170] [IGT] vgem_basic: starting subtest dmabuf-fence-before
>[  467.958233] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4096
>[  467.958381] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4096
>[  467.958552] [IGT] vgem_basic: exiting, ret=0
>[  467.959427] Console: switching to colour frame buffer device 240x67
>[  468.156853] Console: switching to colour dummy device 80x25
>[  468.157006] [IGT] vgem_basic: executing
>[  468.158833] [IGT] vgem_basic: starting subtest dmabuf-mmap
>[  468.158885] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4194304
>[  468.159189] [IGT] vgem_basic: exiting, ret=0
>[  468.159940] Console: switching to colour frame buffer device 240x67
>[  468.351749] Console: switching to colour dummy device 80x25
>[  468.351908] [IGT] vgem_basic: executing
>[  468.353746] [IGT] vgem_basic: starting subtest mmap
>[  468.353801] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4194304
>[  468.353971] [IGT] vgem_basic: exiting, ret=0
>[  468.354679] Console: switching to colour frame buffer device 240x67
>[  468.545894] Console: switching to colour dummy device 80x25
>[  468.546206] [IGT] vgem_basic: executing
>[  468.549943] [IGT] vgem_basic: starting subtest second-client
>[  468.550588] [IGT] vgem_basic: exiting, ret=0
>[  468.551123] Console: switching to colour frame buffer device 240x67
>[  468.734749] Console: switching to colour dummy device 80x25
>[  468.734891] [IGT] vgem_basic: executing
>[  468.736463] [IGT] vgem_basic: starting subtest sysfs
>[  468.737038] [IGT] vgem_basic: exiting, ret=0
>[  468.737730] Console: switching to colour frame buffer device 240x67
>[  468.920844] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[  468.920964] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000000
>[  468.921026] [drm:intel_power_well_disable [i915]] disabling DC off
>[  468.921092] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  468.921148] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  468.921604] [drm:intel_power_well_disable [i915]] disabling always-on
>[  468.921781] [drm:intel_runtime_suspend [i915]] Suspending device
>[  468.929399] [drm:intel_runtime_suspend [i915]] Device suspended
>[  468.931459] Console: switching to colour dummy device 80x25
>[  468.931926] [IGT] vgem_basic: executing
>[  468.932236] [IGT] vgem_basic: starting subtest unload
>[  468.962842] [drm] Initialized vgem 1.0.0 20120112 for virtual device on minor 1
>[  468.964255] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4096
>[  468.995421] [drm] Initialized vgem 1.0.0 20120112 for virtual device on minor 1
>[  468.996961] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4096
>[  469.034485] [drm] Initialized vgem 1.0.0 20120112 for virtual device on minor 1
>[  469.035386] [drm:vgem_gem_dumb_create [vgem]] Created object of size 4096
>[  469.058563] [drm] Initialized vgem 1.0.0 20120112 for virtual device on minor 1
>[  469.059804] [IGT] vgem_basic: exiting, ret=0
>[  469.061501] Console: switching to colour frame buffer device 240x67
>[  469.277208] Console: switching to colour dummy device 80x25
>[  469.277380] [IGT] drv_module_reload: executing
>[  469.278497] [IGT] drv_module_reload: starting subtest basic-reload
>[  469.408020] [drm:intel_runtime_resume [i915]] Resuming device
>[  469.414054] [drm:intel_runtime_resume [i915]] Device resumed
>[  469.414115] [drm:intel_power_well_enable [i915]] enabling always-on
>[  469.414158] [drm:intel_power_well_enable [i915]] enabling DC off
>[  469.414488] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  469.414521] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  469.414547] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  469.414720] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  469.414759] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  469.414796] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  469.414826] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  469.414862] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  469.414908] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  469.414949] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  469.420113] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  469.420155] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  469.420188] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  469.420214] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  469.420239] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  469.420264] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  469.420288] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[  469.420313] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[  469.420337] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[  469.421625] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  469.421747] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  469.423770] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  469.423811] [drm:wait_panel_status [i915]] Wait complete
>[  469.423881] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000008
>[  469.423919] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled
>[  469.559726] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  469.559807] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  469.559880] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  469.560057] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  469.633510] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  469.634764] [drm:drm_helper_hpd_irq_event] [CONNECTOR:48:eDP-1] status updated from connected to connected
>[  469.634848] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  469.634907] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  469.634967] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  469.635562] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  469.635638] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  469.636247] [drm:drm_dp_i2c_do_msg] native defer
>[  469.637699] [drm:drm_dp_i2c_do_msg] native defer
>[  469.639287] [drm:drm_dp_i2c_do_msg] native defer
>[  469.640715] [drm:drm_dp_i2c_do_msg] native defer
>[  469.642285] [drm:drm_dp_i2c_do_msg] native defer
>[  469.643245] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  469.643931] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  469.644471] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  469.644564] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  469.644588] [drm:drm_helper_hpd_irq_event] [CONNECTOR:56:DP-1] status updated from disconnected to disconnected
>[  469.701997] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  469.702064] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  469.702273] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  469.702333] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  469.702388] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  469.702445] [drm:skl_set_power_well [i915]] Enabling DDI B IO power well
>[  469.702497] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>[  469.702553] [drm:skl_set_power_well [i915]] Enabling DDI C IO power well
>[  469.702603] [drm:intel_power_well_enable [i915]] enabling DDI D IO power well
>[  469.702747] [drm:skl_set_power_well [i915]] Enabling DDI D IO power well
>[  469.778738] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[  469.778850] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000000
>[  470.438624] [drm:i915_driver_load [i915]] Found SunrisePoint PCH
>[  470.438683] [drm:intel_power_domains_init [i915]] Allowed DC state mask 03
>[  470.440094] [drm:intel_device_info_dump [i915]] i915 device info: platform=SKYLAKE gen=9 pciid=0x191b rev=0x06
>[  470.440128] [drm:intel_device_info_dump [i915]] i915 device info: is_mobile: no
>[  470.440160] [drm:intel_device_info_dump [i915]] i915 device info: is_lp: no
>[  470.440189] [drm:intel_device_info_dump [i915]] i915 device info: is_alpha_support: no
>[  470.440217] [drm:intel_device_info_dump [i915]] i915 device info: has_64bit_reloc: yes
>[  470.440244] [drm:intel_device_info_dump [i915]] i915 device info: has_aliasing_ppgtt: yes
>[  470.440271] [drm:intel_device_info_dump [i915]] i915 device info: has_csr: yes
>[  470.440297] [drm:intel_device_info_dump [i915]] i915 device info: has_ddi: yes
>[  470.440324] [drm:intel_device_info_dump [i915]] i915 device info: has_decoupled_mmio: no
>[  470.440349] [drm:intel_device_info_dump [i915]] i915 device info: has_dp_mst: yes
>[  470.440375] [drm:intel_device_info_dump [i915]] i915 device info: has_fbc: yes
>[  470.440400] [drm:intel_device_info_dump [i915]] i915 device info: has_fpga_dbg: yes
>[  470.440424] [drm:intel_device_info_dump [i915]] i915 device info: has_full_ppgtt: yes
>[  470.440449] [drm:intel_device_info_dump [i915]] i915 device info: has_full_48bit_ppgtt: yes
>[  470.440473] [drm:intel_device_info_dump [i915]] i915 device info: has_gmbus_irq: yes
>[  470.440498] [drm:intel_device_info_dump [i915]] i915 device info: has_gmch_display: no
>[  470.440522] [drm:intel_device_info_dump [i915]] i915 device info: has_guc: yes
>[  470.440547] [drm:intel_device_info_dump [i915]] i915 device info: has_hotplug: yes
>[  470.440571] [drm:intel_device_info_dump [i915]] i915 device info: has_l3_dpf: no
>[  470.440595] [drm:intel_device_info_dump [i915]] i915 device info: has_llc: yes
>[  470.440619] [drm:intel_device_info_dump [i915]] i915 device info: has_logical_ring_contexts: yes
>[  470.440678] [drm:intel_device_info_dump [i915]] i915 device info: has_overlay: no
>[  470.440712] [drm:intel_device_info_dump [i915]] i915 device info: has_pipe_cxsr: no
>[  470.440743] [drm:intel_device_info_dump [i915]] i915 device info: has_pooled_eu: no
>[  470.440774] [drm:intel_device_info_dump [i915]] i915 device info: has_psr: yes
>[  470.440805] [drm:intel_device_info_dump [i915]] i915 device info: has_rc6: yes
>[  470.440837] [drm:intel_device_info_dump [i915]] i915 device info: has_rc6p: no
>[  470.440868] [drm:intel_device_info_dump [i915]] i915 device info: has_resource_streamer: yes
>[  470.440899] [drm:intel_device_info_dump [i915]] i915 device info: has_runtime_pm: yes
>[  470.440929] [drm:intel_device_info_dump [i915]] i915 device info: has_snoop: no
>[  470.440959] [drm:intel_device_info_dump [i915]] i915 device info: unfenced_needs_alignment: no
>[  470.440990] [drm:intel_device_info_dump [i915]] i915 device info: cursor_needs_physical: no
>[  470.441020] [drm:intel_device_info_dump [i915]] i915 device info: hws_needs_physical: no
>[  470.441050] [drm:intel_device_info_dump [i915]] i915 device info: overlay_needs_physical: no
>[  470.441080] [drm:intel_device_info_dump [i915]] i915 device info: supports_tv: no
>[  470.443746] [drm:intel_device_info_runtime_init [i915]] slice mask: 0001
>[  470.443788] [drm:intel_device_info_runtime_init [i915]] slice total: 1
>[  470.443827] [drm:intel_device_info_runtime_init [i915]] subslice total: 3
>[  470.443863] [drm:intel_device_info_runtime_init [i915]] subslice mask 0007
>[  470.443898] [drm:intel_device_info_runtime_init [i915]] subslice per slice: 3
>[  470.443932] [drm:intel_device_info_runtime_init [i915]] EU total: 24
>[  470.443966] [drm:intel_device_info_runtime_init [i915]] EU per subslice: 8
>[  470.443999] [drm:intel_device_info_runtime_init [i915]] has slice power gating: n
>[  470.444032] [drm:intel_device_info_runtime_init [i915]] has subslice power gating: n
>[  470.444064] [drm:intel_device_info_runtime_init [i915]] has EU power gating: y
>[  470.444102] [drm:i915_driver_load [i915]] ppgtt mode: 3
>[  470.444139] [drm:i915_driver_load [i915]] use GPU semaphores? no
>[  470.444195] [drm] Memory usable by graphics device = 4096M
>[  470.444238] [drm:i915_ggtt_probe_hw [i915]] GMADR size = 256M
>[  470.444279] [drm:i915_ggtt_probe_hw [i915]] GTT stolen size = 64M
>[  470.444291] [drm] Replacing VGA console driver
>[  470.444588] [drm:i915_gem_init_stolen [i915]] Memory reserved for graphics device: 65536K, usable: 64512K
>[  470.444812] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x77f6e018
>[  470.444899] [drm:intel_opregion_setup [i915]] Public ACPI methods supported
>[  470.444935] [drm:intel_opregion_setup [i915]] SWSCI supported
>[  470.451180] [drm:intel_opregion_setup [i915]] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00300483
>[  470.451210] [drm:intel_opregion_setup [i915]] ASLE supported
>[  470.451235] [drm:intel_opregion_setup [i915]] ASLE extension supported
>[  470.451259] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (Mailbox #4)
>[  470.451418] [drm:intel_gvt_init [i915]] GVT-g is disabled by kernel params
>[  470.451425] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
>[  470.451426] [drm] Driver supports precise vblank timestamp query.
>[  470.451455] [drm:intel_bios_init [i915]] Set default to SSC at 120000 kHz
>[  470.451481] [drm:intel_bios_init [i915]] VBT signature "$VBT SKYLAKE        ", BDB version 197
>[  470.451506] [drm:intel_bios_init [i915]] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 0 lvds_use_ssc 0 lvds_ssc_freq 120000 display_clock_mode 0 fdi_rx_polarity_inverted 0
>[  470.451529] [drm:intel_bios_init [i915]] crt_ddc_bus_pin: 2
>[  470.454928] [drm:intel_opregion_get_panel_type [i915]] Ignoring OpRegion panel type (0)
>[  470.454958] [drm:intel_bios_init [i915]] Panel type: 7 (VBT)
>[  470.454983] [drm:intel_bios_init [i915]] DRRS supported mode is static
>[  470.455010] [drm:intel_bios_init [i915]] Found panel mode in BIOS VBT tables:
>[  470.455015] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 0 85500 1366 1436 1580 1792 768 769 773 798 0x8 0xa
>[  470.455037] [drm:intel_bios_init [i915]] VBT initial LVDS value 300
>[  470.455058] [drm:intel_bios_init [i915]] VBT backlight PWM modulation frequency 210 Hz, active high, min brightness 0, level 255, controller 0
>[  470.455078] [drm:intel_bios_init [i915]] Unsupported child device size for SDVO mapping.
>[  470.455101] [drm:intel_bios_init [i915]] DRRS State Enabled:0
>[  470.455120] [drm:intel_bios_init [i915]] VBT has unknown eDP link rate value 2
>[  470.455139] [drm:intel_bios_init [i915]] Port A VBT info: DP:1 HDMI:0 DVI:0 EDP:1 CRT:0
>[  470.455158] [drm:intel_bios_init [i915]] VBT HDMI level shift for port A: 0
>[  470.455177] [drm:intel_bios_init [i915]] Port B VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0
>[  470.455195] [drm:intel_bios_init [i915]] VBT HDMI level shift for port B: 7
>[  470.455450] [drm:intel_dsm_detect [i915]] no _DSM method for intel device
>[  470.455487] [drm:intel_update_rawclk [i915]] rawclk rate: 24000 kHz
>[  470.455512] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  470.455589] [drm:intel_power_well_enable [i915]] enabling power well 1
>[  470.455625] [drm:intel_power_well_enable [i915]] enabling MISC IO power well
>[  470.455709] [drm:skl_init_cdclk [i915]] Sanitizing cdclk programmed by pre-os
>[  470.457769] [drm:intel_update_max_cdclk [i915]] Max CD clock rate: 675000 kHz
>[  470.457796] [drm:intel_update_max_cdclk [i915]] Max dotclock rate: 675000 kHz
>[  470.457824] [drm:intel_update_cdclk [i915]] Current CD clock rate: 337500 kHz, VCO: 8100000 kHz, ref: 24000 kHz
>[  470.457861] [drm:intel_power_well_enable [i915]] enabling always-on
>[  470.457883] [drm:intel_power_well_enable [i915]] enabling DC off
>[  470.457904] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  470.457928] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  470.457948] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  470.457966] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  470.457985] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>[  470.458003] [drm:intel_power_well_enable [i915]] enabling DDI D IO power well
>[  470.458034] [drm:intel_csr_ucode_init [i915]] Loading i915/skl_dmc_ver1_26.bin
>[  470.459845] [drm:intel_fbc_init [i915]] Sanitized enable_fbc value: 1
>[  470.459885] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM0 latency 2 (2.0 usec)
>[  470.459914] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM1 latency 19 (19.0 usec)
>[  470.459942] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM2 latency 28 (28.0 usec)
>[  470.459969] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM3 latency 32 (32.0 usec)
>[  470.459995] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM4 latency 63 (63.0 usec)
>[  470.460020] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM5 latency 77 (77.0 usec)
>[  470.460046] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM6 latency 83 (83.0 usec)
>[  470.460070] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM7 latency 99 (99.0 usec)
>[  470.460109] [drm:intel_modeset_init [i915]] 3 display pipes available.
>[  470.460454] [drm:intel_update_cdclk [i915]] Current CD clock rate: 337500 kHz, VCO: 8100000 kHz, ref: 24000 kHz
>[  470.460838] [drm:intel_dp_init_connector [i915]] Adding eDP connector on port A
>[  470.460886] [drm:intel_dp_init_connector [i915]] using AUX A for port A (VBT)
>[  470.461052] [drm:intel_pps_dump_state [i915]] cur t1_t3 2000 t8 1 t9 1 t10 500 t11_t12 5000
>[  470.461094] [drm:intel_pps_dump_state [i915]] vbt t1_t3 2000 t8 2000 t9 2000 t10 500 t11_t12 5000
>[  470.461127] [drm:intel_dp_init_panel_power_sequencer [i915]] panel power up delay 200, power down delay 50, power cycle delay 500
>[  470.461179] [drm:intel_dp_init_panel_power_sequencer [i915]] backlight on delay 200, off delay 200
>[  470.461271] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x4af05
>[  470.461358] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  470.461406] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  470.462906] [drm] Finished loading DMC firmware i915/skl_dmc_ver1_26.bin (v1.26)
>[  470.968968] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  470.969086] [drm:wait_panel_status [i915]] Wait complete
>[  470.969221] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000008
>[  470.969319] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled
>[  471.178009] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 0a c2 41 00 00 01 c0 02 00 00 00 1f 0b 00
>[  471.178844] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  471.179526] [drm:intel_dp_init_connector [i915]] Detected EDP PSR Panel.
>[  471.180224] [drm:intel_dp_init_connector [i915]] EDP DPCD : 02 b7 f6
>[  471.184015] [drm:drm_dp_i2c_do_msg] native defer
>[  471.185999] [drm:drm_dp_i2c_do_msg] native defer
>[  471.187875] [drm:drm_dp_i2c_do_msg] native defer
>[  471.189731] [drm:drm_dp_i2c_do_msg] native defer
>[  471.191587] [drm:drm_dp_i2c_do_msg] native defer
>[  471.193450] [drm:drm_dp_i2c_do_msg] native defer
>[  471.194703] [drm:drm_dp_i2c_do_msg] native defer
>[  471.196396] [drm:drm_dp_i2c_do_msg] native defer
>[  471.197551] [drm:drm_dp_i2c_do_msg] native defer
>[  471.199195] [drm:drm_dp_i2c_do_msg] native defer
>[  471.200904] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  471.201049] [drm:intel_dp_init_connector [i915]] VBT doesn't support DRRS
>[  471.201276] [drm:intel_panel_setup_backlight [i915]] Connector eDP-1 backlight initialized, disabled, brightness 0/7143
>[  471.201506] [drm:intel_ddi_init [i915]] VBT says port B has lspcon
>[  471.201647] [drm:intel_dp_init_connector [i915]] Adding DP connector on port B
>[  471.201863] [drm:intel_dp_init_connector [i915]] using AUX B for port B (VBT)
>[  471.202576] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  471.203086] [drm:drm_dp_i2c_do_msg] native defer
>[  471.204548] [drm:drm_dp_i2c_do_msg] native defer
>[  471.206022] [drm:drm_dp_i2c_do_msg] native defer
>[  471.207532] [drm:drm_dp_i2c_do_msg] native defer
>[  471.209189] [drm:drm_dp_i2c_do_msg] native defer
>[  471.210188] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[  471.210774] [drm:drm_dp_i2c_do_msg] native defer
>[  471.212269] [drm:drm_dp_i2c_do_msg] native defer
>[  471.213674] [drm:drm_dp_i2c_do_msg] native defer
>[  471.215213] [drm:drm_dp_i2c_do_msg] native defer
>[  471.216675] [drm:drm_dp_i2c_do_msg] native defer
>[  471.217613] [drm:drm_dp_dual_mode_detect] DP dual mode adaptor ID: a8 (err 0)
>[  471.217813] [drm:lspcon_init [i915]] LSPCON detected
>[  471.218335] [drm:drm_dp_i2c_do_msg] native defer
>[  471.219710] [drm:drm_dp_i2c_do_msg] native defer
>[  471.221240] [drm:drm_dp_i2c_do_msg] native defer
>[  471.222663] [drm:drm_dp_i2c_do_msg] native defer
>[  471.224202] [drm:drm_dp_i2c_do_msg] native defer
>[  471.225199] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  471.225888] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  471.226515] [drm:intel_dp_read_desc [i915]] DP branch: OUI 00-60-ad(NS) dev-ID MC2800 HW-rev 2.1 SW-rev 1.29
>[  471.226611] [drm:lspcon_init [i915]] Success: LSPCON init
>[  471.226780] [drm:intel_ddi_init [i915]] LSPCON init success on port B
>[  471.227045] [drm:intel_set_plane_visible [i915]] pipe A active planes 0x0
>[  471.227158] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:32:pipe A] hw state readout: disabled
>[  471.227285] [drm:intel_set_plane_visible [i915]] pipe B active planes 0x0
>[  471.227385] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:39:pipe B] hw state readout: disabled
>[  471.227504] [drm:intel_set_plane_visible [i915]] pipe C active planes 0x0
>[  471.227600] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:46:pipe C] hw state readout: disabled
>[  471.227770] [drm:intel_modeset_setup_hw_state [i915]] DPLL 0 hw state readout: crtc_mask 0x00000000, on 1
>[  471.227881] [drm:intel_modeset_setup_hw_state [i915]] DPLL 1 hw state readout: crtc_mask 0x00000000, on 0
>[  471.227992] [drm:intel_modeset_setup_hw_state [i915]] DPLL 2 hw state readout: crtc_mask 0x00000000, on 0
>[  471.228093] [drm:intel_modeset_setup_hw_state [i915]] DPLL 3 hw state readout: crtc_mask 0x00000000, on 0
>[  471.228194] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:47:DDI A] hw state readout: disabled, pipe A
>[  471.228293] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:55:DDI B] hw state readout: disabled, pipe A
>[  471.228375] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:57:DP-MST A] hw state readout: disabled, pipe A
>[  471.228464] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:58:DP-MST B] hw state readout: disabled, pipe B
>[  471.228544] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:59:DP-MST C] hw state readout: disabled, pipe C
>[  471.228748] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:48:eDP-1] hw state readout: disabled
>[  471.228860] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:56:DP-1] hw state readout: disabled
>[  471.228989] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][setup_hw_state]
>[  471.229079] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0
>[  471.229175] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  471.229257] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  471.229276] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  471.229363] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  471.229378] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  471.229468] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  471.229546] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  471.229634] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: 0
>[  471.229786] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  471.229870] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  471.229982] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  471.230067] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  471.230160] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  471.230240] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  471.230329] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  471.230424] [drm:intel_dump_pipe_config [i915]] [CRTC:39:pipe B][setup_hw_state]
>[  471.230500] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0
>[  471.230585] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  471.230663] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  471.230737] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  471.230818] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  471.230839] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  471.230921] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  471.230998] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  471.231083] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: 0
>[  471.231158] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  471.231241] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  471.231340] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  471.231427] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  471.231518] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 1B] disabled, scaler_id = -1
>[  471.231593] [drm:intel_dump_pipe_config [i915]] [PLANE:35:plane 2B] disabled, scaler_id = -1
>[  471.231684] [drm:intel_dump_pipe_config [i915]] [PLANE:37:cursor B] disabled, scaler_id = -1
>[  471.231840] [drm:intel_dump_pipe_config [i915]] [CRTC:46:pipe C][setup_hw_state]
>[  471.231919] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0
>[  471.231979] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  471.232032] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  471.232047] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  471.232102] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  471.232114] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  471.232172] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  471.232235] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  471.232287] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: 0
>[  471.232344] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  471.232396] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  471.232469] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  471.232521] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  471.232579] [drm:intel_dump_pipe_config [i915]] [PLANE:40:plane 1C] disabled, scaler_id = -1
>[  471.232633] [drm:intel_dump_pipe_config [i915]] [PLANE:42:plane 2C] disabled, scaler_id = -1
>[  471.232727] [drm:intel_dump_pipe_config [i915]] [PLANE:44:cursor C] disabled, scaler_id = -1
>[  471.232804] [drm:intel_modeset_setup_hw_state [i915]] DPLL 0 enabled but not in use, disabling
>[  471.233051] [drm:intel_power_well_disable [i915]] disabling DDI D IO power well
>[  471.233168] [drm:skl_set_power_well [i915]] Disabling DDI D IO power well
>[  471.233242] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well
>[  471.233310] [drm:skl_set_power_well [i915]] Disabling DDI C IO power well
>[  471.233379] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[  471.233445] [drm:skl_set_power_well [i915]] Disabling DDI B IO power well
>[  471.233511] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  471.233578] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  471.233649] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  471.233827] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  471.233995] [drm:i915_gem_init_ggtt [i915]] clearing unused GTT space: [1000, 100000000]
>[  471.234156] [drm:i915_gem_context_init [i915]] logical context support initialized
>[  471.234751] [drm:intel_engine_create_scratch [i915]] rcs0 pipe control offset: 0xfffff000
>[  471.237415] [drm:gen8_init_common_ring [i915]] Execlists enabled for rcs0
>[  471.237484] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 14
>[  471.237592] [drm:gen8_init_common_ring [i915]] Execlists enabled for bcs0
>[  471.237752] [drm:gen8_init_common_ring [i915]] Execlists enabled for vcs0
>[  471.237895] [drm:gen8_init_common_ring [i915]] Execlists enabled for vecs0
>[  471.238442] [drm:intel_fbdev_init [i915]] pipe A not active or no fb, skipping
>[  471.238494] [drm:intel_fbdev_init [i915]] pipe B not active or no fb, skipping
>[  471.238542] [drm:intel_fbdev_init [i915]] pipe C not active or no fb, skipping
>[  471.238587] [drm:intel_fbdev_init [i915]] no active fbs found, not using BIOS config
>[  471.241878] [drm:intel_backlight_device_register [i915]] Connector eDP-1 backlight sysfs interface registered
>[  471.241986] [drm:intel_dp_connector_register [i915]] registering DPDDC-A bus for card0-eDP-1
>[  471.243131] [drm:intel_dp_connector_register [i915]] registering DPDDC-B bus for card0-DP-1
>[  471.243823] [drm] Initialized i915 1.6.0 20170515 for 0000:00:02.0 on minor 0
>[  471.244883] [drm:intel_opregion_register [i915]] 2 outputs detected
>[  471.245096] [Firmware Bug]: ACPI(PEGP) defines _DOD but not _DOS
>[  471.245283] ACPI: Video Device [PEGP] (multi-head: yes  rom: yes  post: no)
>[  471.245546] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:00/LNXVIDEO:00/input/input38
>[  471.258757] ACPI: Video Device [GFX0] (multi-head: yes  rom: no  post: no)
>[  471.261039] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:01/input/input39
>[  471.261820] [drm] DRM_I915_DEBUG enabled
>[  471.261823] [drm] DRM_I915_DEBUG_GEM enabled
>[  471.261831] [drm:drm_setup_crtcs] 
>[  471.261839] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  471.261897] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  471.261957] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  471.261997] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  471.262034] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  471.262067] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  471.262892] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  471.263824] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] status updated from unknown to connected
>[  471.263880] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  471.263891] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] probed modes :
>[  471.263897] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  471.263902] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  471.263946] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  471.263992] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  471.264045] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  471.264478] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  471.264518] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  471.264972] [drm:drm_dp_i2c_do_msg] native defer
>[  471.266208] [drm:drm_dp_i2c_do_msg] native defer
>[  471.267424] [drm:drm_dp_i2c_do_msg] native defer
>[  471.268680] [drm:drm_dp_i2c_do_msg] native defer
>[  471.269940] [drm:drm_dp_i2c_do_msg] native defer
>[  471.270753] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  471.271244] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  471.271633] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  471.271727] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  471.271737] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] status updated from unknown to disconnected
>[  471.271742] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  471.271760] [drm:drm_setup_crtcs] connector 48 enabled? yes
>[  471.271764] [drm:drm_setup_crtcs] connector 56 enabled? no
>[  471.271809] [drm:intel_fb_initial_config [i915]] Not using firmware configuration
>[  471.271818] [drm:drm_setup_crtcs] looking for cmdline mode on connector 48
>[  471.271821] [drm:drm_setup_crtcs] looking for preferred mode on connector 48 0
>[  471.271825] [drm:drm_setup_crtcs] found mode 1920x1080
>[  471.271829] [drm:drm_setup_crtcs] picking CRTCs for 8192x8192 config
>[  471.271841] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 32 (0,0)
>[  471.271897] [drm:intelfb_create [i915]] no BIOS fb, allocating a new one
>[  471.273011] [drm:intelfb_create [i915]] allocated 1920x1080 fb: 0x00040000
>[  471.273503] fbcon: inteldrmfb (fb0) is primary device
>[  471.274140] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  471.274169] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  471.274197] [drm:skl_update_scaler [i915]] scaler_user index 0.31: Staged freeing scaler id 0 scaler_users = 0x0
>[  471.274225] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  471.274251] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  471.274275] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  471.274301] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  471.274328] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  471.274351] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  471.274374] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  471.274395] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  471.274415] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  471.274419] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  471.274438] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  471.274441] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  471.274460] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  471.274480] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  471.274499] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  471.274518] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  471.274536] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  471.274560] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  471.274580] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  471.274599] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  471.274642] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  471.274686] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  471.274710] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  471.274739] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  471.274777] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  471.275028] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  471.275051] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  471.275073] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  471.275094] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  471.275114] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  471.275136] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  471.275164] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  471.275186] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  471.275208] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  471.275265] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  471.275314] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  471.275453] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  471.275490] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  471.275570] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000008
>[  471.275599] [drm:wait_panel_status [i915]] Wait complete
>[  471.275694] [drm:edp_panel_on [i915]] Wait for panel power on
>[  471.275767] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 0000000b
>[  471.477381] [drm:wait_panel_status [i915]] Wait complete
>[  471.477513] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  471.477624] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  471.480161] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  471.480262] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  471.480350] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  471.480436] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  471.481550] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  471.481641] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  471.483133] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  471.483226] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  471.485484] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  471.485660] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  471.485794] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  471.485983] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  471.680984] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  471.681098] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  471.681287] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  471.681390] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  471.685909] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  471.686022] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  471.686183] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  471.686285] [drm:intel_enable_sagv [i915]] Enabling the SAGV
>[  471.686811] Console: switching to colour frame buffer device 240x67
>[  471.709640] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device
>[  471.805905] snd_hda_intel 0000:00:1f.3: bound 0000:00:02.0 (ops i915_audio_component_bind_ops [i915])
>[  471.813597] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  471.813694] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  471.820309] [drm] RC6 on
>[  471.835741] snd_hda_codec_generic hdaudioC0D0: autoconfig for Generic: line_outs=1 (0x17/0x0/0x0/0x0/0x0) type:speaker
>[  471.835748] snd_hda_codec_generic hdaudioC0D0:    speaker_outs=0 (0x0/0x0/0x0/0x0/0x0)
>[  471.835750] snd_hda_codec_generic hdaudioC0D0:    hp_outs=1 (0x16/0x0/0x0/0x0/0x0)
>[  471.835752] snd_hda_codec_generic hdaudioC0D0:    mono: mono_out=0x0
>[  471.835754] snd_hda_codec_generic hdaudioC0D0:    inputs:
>[  471.835756] snd_hda_codec_generic hdaudioC0D0:      Internal Mic=0x1a
>[  471.835758] snd_hda_codec_generic hdaudioC0D0:      Mic=0x19
>[  471.843714] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  471.843744] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  471.843765] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  471.843784] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  471.843804] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  471.843822] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  471.843840] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[  471.843858] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[  471.843875] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[  471.847250] input: HDA Intel PCH Mic as /devices/pci0000:00/0000:00:1f.3/sound/card0/input40
>[  471.848326] input: HDA Intel PCH Headphone as /devices/pci0000:00/0000:00:1f.3/sound/card0/input41
>[  471.849043] input: HDA Intel PCH HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input42
>[  471.849973] input: HDA Intel PCH HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input43
>[  471.850519] input: HDA Intel PCH HDMI/DP,pcm=8 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input44
>[  471.851163] input: HDA Intel PCH HDMI/DP,pcm=9 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input45
>[  471.851695] input: HDA Intel PCH HDMI/DP,pcm=10 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input46
>[  471.858820] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  471.858862] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  472.069256] [IGT] drv_module_reload: exiting, ret=0
>[  472.334990] Console: switching to colour dummy device 80x25
>[  472.335334] [IGT] drv_module_reload: executing
>[  472.336520] [IGT] drv_module_reload: starting subtest basic-no-display
>[  472.426615] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  472.426709] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  472.432578] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  472.432631] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  472.432736] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  472.432768] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  472.432800] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  472.432830] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  472.432859] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[  472.432887] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[  472.432916] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[  472.433783] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  472.433912] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  472.473893] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  472.474078] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  472.681011] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  472.681326] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  472.686965] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  472.687096] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  472.687222] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000000
>[  472.738338] [drm:wait_panel_status [i915]] Wait complete
>[  472.738442] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  472.738540] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  472.738665] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  472.739036] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  472.739175] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  472.739338] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  472.739390] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  472.739485] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  472.739555] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  472.739647] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  472.739740] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  472.739831] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  472.739936] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  472.740020] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  472.740088] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  472.740181] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  472.740251] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  472.740314] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  472.740381] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  472.740538] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  472.740611] [drm:intel_power_well_disable [i915]] disabling DC off
>[  472.740749] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  472.740805] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  472.741256] [drm:intel_power_well_disable [i915]] disabling always-on
>[  472.758076] [drm:intel_power_well_enable [i915]] enabling always-on
>[  472.758135] [drm:intel_power_well_enable [i915]] enabling DC off
>[  472.758522] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  472.758590] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  472.758660] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  472.758898] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  472.758954] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  472.759004] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  472.759054] [drm:skl_set_power_well [i915]] Enabling DDI B IO power well
>[  472.759103] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>[  472.759154] [drm:skl_set_power_well [i915]] Enabling DDI C IO power well
>[  472.759202] [drm:intel_power_well_enable [i915]] enabling DDI D IO power well
>[  472.759252] [drm:skl_set_power_well [i915]] Enabling DDI D IO power well
>[  472.943314] [drm:i915_driver_load [i915]] Found SunrisePoint PCH
>[  472.943359] [drm:intel_power_domains_init [i915]] Allowed DC state mask 03
>[  472.944294] [drm:intel_device_info_dump [i915]] i915 device info: platform=SKYLAKE gen=9 pciid=0x191b rev=0x06
>[  472.944316] [drm:intel_device_info_dump [i915]] i915 device info: is_mobile: no
>[  472.944336] [drm:intel_device_info_dump [i915]] i915 device info: is_lp: no
>[  472.944355] [drm:intel_device_info_dump [i915]] i915 device info: is_alpha_support: no
>[  472.944373] [drm:intel_device_info_dump [i915]] i915 device info: has_64bit_reloc: yes
>[  472.944412] [drm:intel_device_info_dump [i915]] i915 device info: has_aliasing_ppgtt: yes
>[  472.944430] [drm:intel_device_info_dump [i915]] i915 device info: has_csr: yes
>[  472.944448] [drm:intel_device_info_dump [i915]] i915 device info: has_ddi: yes
>[  472.944483] [drm:intel_device_info_dump [i915]] i915 device info: has_decoupled_mmio: no
>[  472.944500] [drm:intel_device_info_dump [i915]] i915 device info: has_dp_mst: yes
>[  472.944518] [drm:intel_device_info_dump [i915]] i915 device info: has_fbc: yes
>[  472.944535] [drm:intel_device_info_dump [i915]] i915 device info: has_fpga_dbg: yes
>[  472.944553] [drm:intel_device_info_dump [i915]] i915 device info: has_full_ppgtt: yes
>[  472.944569] [drm:intel_device_info_dump [i915]] i915 device info: has_full_48bit_ppgtt: yes
>[  472.944586] [drm:intel_device_info_dump [i915]] i915 device info: has_gmbus_irq: yes
>[  472.944603] [drm:intel_device_info_dump [i915]] i915 device info: has_gmch_display: no
>[  472.944620] [drm:intel_device_info_dump [i915]] i915 device info: has_guc: yes
>[  472.944686] [drm:intel_device_info_dump [i915]] i915 device info: has_hotplug: yes
>[  472.944709] [drm:intel_device_info_dump [i915]] i915 device info: has_l3_dpf: no
>[  472.944736] [drm:intel_device_info_dump [i915]] i915 device info: has_llc: yes
>[  472.944762] [drm:intel_device_info_dump [i915]] i915 device info: has_logical_ring_contexts: yes
>[  472.944789] [drm:intel_device_info_dump [i915]] i915 device info: has_overlay: no
>[  472.944815] [drm:intel_device_info_dump [i915]] i915 device info: has_pipe_cxsr: no
>[  472.944841] [drm:intel_device_info_dump [i915]] i915 device info: has_pooled_eu: no
>[  472.944867] [drm:intel_device_info_dump [i915]] i915 device info: has_psr: yes
>[  472.944893] [drm:intel_device_info_dump [i915]] i915 device info: has_rc6: yes
>[  472.944918] [drm:intel_device_info_dump [i915]] i915 device info: has_rc6p: no
>[  472.944943] [drm:intel_device_info_dump [i915]] i915 device info: has_resource_streamer: yes
>[  472.944967] [drm:intel_device_info_dump [i915]] i915 device info: has_runtime_pm: yes
>[  472.944993] [drm:intel_device_info_dump [i915]] i915 device info: has_snoop: no
>[  472.945019] [drm:intel_device_info_dump [i915]] i915 device info: unfenced_needs_alignment: no
>[  472.945043] [drm:intel_device_info_dump [i915]] i915 device info: cursor_needs_physical: no
>[  472.945068] [drm:intel_device_info_dump [i915]] i915 device info: hws_needs_physical: no
>[  472.945092] [drm:intel_device_info_dump [i915]] i915 device info: overlay_needs_physical: no
>[  472.945117] [drm:intel_device_info_dump [i915]] i915 device info: supports_tv: no
>[  472.947725] [drm] Display disabled (module parameter)
>[  472.947761] [drm:intel_device_info_runtime_init [i915]] slice mask: 0001
>[  472.947784] [drm:intel_device_info_runtime_init [i915]] slice total: 1
>[  472.947806] [drm:intel_device_info_runtime_init [i915]] subslice total: 3
>[  472.947826] [drm:intel_device_info_runtime_init [i915]] subslice mask 0007
>[  472.947862] [drm:intel_device_info_runtime_init [i915]] subslice per slice: 3
>[  472.947882] [drm:intel_device_info_runtime_init [i915]] EU total: 24
>[  472.947899] [drm:intel_device_info_runtime_init [i915]] EU per subslice: 8
>[  472.947917] [drm:intel_device_info_runtime_init [i915]] has slice power gating: n
>[  472.947934] [drm:intel_device_info_runtime_init [i915]] has subslice power gating: n
>[  472.947951] [drm:intel_device_info_runtime_init [i915]] has EU power gating: y
>[  472.947971] [drm:i915_driver_load [i915]] ppgtt mode: 3
>[  472.947990] [drm:i915_driver_load [i915]] use GPU semaphores? no
>[  472.948028] [drm] Memory usable by graphics device = 4096M
>[  472.948053] [drm:i915_ggtt_probe_hw [i915]] GMADR size = 256M
>[  472.948076] [drm:i915_ggtt_probe_hw [i915]] GTT stolen size = 64M
>[  472.948082] [drm] Replacing VGA console driver
>[  472.948267] [drm:i915_gem_init_stolen [i915]] Memory reserved for graphics device: 65536K, usable: 64512K
>[  472.948505] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x77f6e018
>[  472.948568] [drm:intel_opregion_setup [i915]] Public ACPI methods supported
>[  472.948604] [drm:intel_opregion_setup [i915]] SWSCI supported
>[  472.955893] [drm:intel_opregion_setup [i915]] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00300483
>[  472.955919] [drm:intel_opregion_setup [i915]] ASLE supported
>[  472.955942] [drm:intel_opregion_setup [i915]] ASLE extension supported
>[  472.955981] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (Mailbox #4)
>[  472.956140] [drm:intel_gvt_init [i915]] GVT-g is disabled by kernel params
>[  472.956168] [drm:intel_bios_init [i915]] Set default to SSC at 120000 kHz
>[  472.956193] [drm:intel_bios_init [i915]] VBT signature "$VBT SKYLAKE        ", BDB version 197
>[  472.956216] [drm:intel_bios_init [i915]] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 0 lvds_use_ssc 0 lvds_ssc_freq 120000 display_clock_mode 0 fdi_rx_polarity_inverted 0
>[  472.956237] [drm:intel_bios_init [i915]] crt_ddc_bus_pin: 2
>[  472.958362] [drm:intel_opregion_get_panel_type [i915]] Ignoring OpRegion panel type (0)
>[  472.958393] [drm:intel_bios_init [i915]] Panel type: 7 (VBT)
>[  472.958420] [drm:intel_bios_init [i915]] DRRS supported mode is static
>[  472.958449] [drm:intel_bios_init [i915]] Found panel mode in BIOS VBT tables:
>[  472.958453] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 0 85500 1366 1436 1580 1792 768 769 773 798 0x8 0xa
>[  472.958476] [drm:intel_bios_init [i915]] VBT initial LVDS value 300
>[  472.958499] [drm:intel_bios_init [i915]] VBT backlight PWM modulation frequency 210 Hz, active high, min brightness 0, level 255, controller 0
>[  472.958520] [drm:intel_bios_init [i915]] Unsupported child device size for SDVO mapping.
>[  472.958544] [drm:intel_bios_init [i915]] DRRS State Enabled:0
>[  472.958565] [drm:intel_bios_init [i915]] VBT has unknown eDP link rate value 2
>[  472.958585] [drm:intel_bios_init [i915]] Port A VBT info: DP:1 HDMI:0 DVI:0 EDP:1 CRT:0
>[  472.958605] [drm:intel_bios_init [i915]] VBT HDMI level shift for port A: 0
>[  472.958655] [drm:intel_bios_init [i915]] Port B VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0
>[  472.958734] [drm:intel_bios_init [i915]] VBT HDMI level shift for port B: 7
>[  472.959057] [drm:intel_dsm_detect [i915]] no _DSM method for intel device
>[  472.959094] [drm:intel_update_rawclk [i915]] rawclk rate: 24000 kHz
>[  472.959120] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  472.959195] [drm:intel_power_well_enable [i915]] enabling power well 1
>[  472.959227] [drm:intel_power_well_enable [i915]] enabling MISC IO power well
>[  472.959256] [drm:skl_init_cdclk [i915]] Sanitizing cdclk programmed by pre-os
>[  472.961862] [drm:intel_update_max_cdclk [i915]] Max CD clock rate: 675000 kHz
>[  472.961891] [drm:intel_update_max_cdclk [i915]] Max dotclock rate: 675000 kHz
>[  472.961927] [drm:intel_update_cdclk [i915]] Current CD clock rate: 337500 kHz, VCO: 8100000 kHz, ref: 24000 kHz
>[  472.961965] [drm:intel_power_well_enable [i915]] enabling always-on
>[  472.961988] [drm:intel_power_well_enable [i915]] enabling DC off
>[  472.962010] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  472.962036] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  472.962057] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  472.962077] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  472.962097] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>[  472.962116] [drm:intel_power_well_enable [i915]] enabling DDI D IO power well
>[  472.962149] [drm:intel_csr_ucode_init [i915]] Loading i915/skl_dmc_ver1_26.bin
>[  472.963555] [drm] Finished loading DMC firmware i915/skl_dmc_ver1_26.bin (v1.26)
>[  472.964122] [drm:intel_fbc_init [i915]] Sanitized enable_fbc value: 1
>[  472.964162] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM0 latency 2 (2.0 usec)
>[  472.964192] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM1 latency 19 (19.0 usec)
>[  472.964219] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM2 latency 28 (28.0 usec)
>[  472.964245] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM3 latency 32 (32.0 usec)
>[  472.964271] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM4 latency 63 (63.0 usec)
>[  472.964297] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM5 latency 77 (77.0 usec)
>[  472.964323] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM6 latency 83 (83.0 usec)
>[  472.964348] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM7 latency 99 (99.0 usec)
>[  472.964407] [drm:i915_gem_init_ggtt [i915]] clearing unused GTT space: [1000, 100000000]
>[  472.964481] [drm:i915_gem_context_init [i915]] logical context support initialized
>[  472.964826] [drm:intel_engine_create_scratch [i915]] rcs0 pipe control offset: 0xfffff000
>[  472.966326] [drm:gen8_init_common_ring [i915]] Execlists enabled for rcs0
>[  472.966380] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 14
>[  472.966457] [drm:gen8_init_common_ring [i915]] Execlists enabled for bcs0
>[  472.966552] [drm:gen8_init_common_ring [i915]] Execlists enabled for vcs0
>[  472.966608] [drm:gen8_init_common_ring [i915]] Execlists enabled for vecs0
>[  472.967758] [drm] Initialized i915 1.6.0 20170515 for 0000:00:02.0 on minor 0
>[  472.968872] [drm] DRM_I915_DEBUG enabled
>[  472.968875] [drm] DRM_I915_DEBUG_GEM enabled
>[  472.974998] [IGT] drv_module_reload: exiting, ret=0
>[  472.977309] snd_hda_intel 0000:00:1f.3: failed to add i915 component master (-19)
>[  472.991768] snd_hda_codec_generic hdaudioC0D0: autoconfig for Generic: line_outs=1 (0x17/0x0/0x0/0x0/0x0) type:speaker
>[  472.991778] snd_hda_codec_generic hdaudioC0D0:    speaker_outs=0 (0x0/0x0/0x0/0x0/0x0)
>[  472.991781] snd_hda_codec_generic hdaudioC0D0:    hp_outs=1 (0x16/0x0/0x0/0x0/0x0)
>[  472.991785] snd_hda_codec_generic hdaudioC0D0:    mono: mono_out=0x0
>[  472.991788] snd_hda_codec_generic hdaudioC0D0:    inputs:
>[  472.991792] snd_hda_codec_generic hdaudioC0D0:      Internal Mic=0x1a
>[  472.991795] snd_hda_codec_generic hdaudioC0D0:      Mic=0x19
>[  472.995948] snd_hda_codec_hdmi hdaudioC0D2: No i915 binding for Intel HDMI/DP codec
>[  472.998848] snd_hda_codec_hdmi hdaudioC0D2: No i915 binding for Intel HDMI/DP codec
>[  473.006672] input: HDA Intel PCH Mic as /devices/pci0000:00/0000:00:1f.3/sound/card0/input47
>[  473.007947] input: HDA Intel PCH Headphone as /devices/pci0000:00/0000:00:1f.3/sound/card0/input48
>[  473.008468] input: HDA Intel PCH HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input49
>[  473.130340] [IGT] drv_module_reload: executing
>[  473.131001] [IGT] drv_module_reload: starting subtest basic-reload-inject
>[  474.182185] Setting dangerous option inject_load_failure - tainting kernel
>[  474.192919] [drm:i915_driver_load [i915]] Found SunrisePoint PCH
>[  474.192947] [drm:intel_power_domains_init [i915]] Allowed DC state mask 03
>[  474.194011] [drm:intel_device_info_dump [i915]] i915 device info: platform=SKYLAKE gen=9 pciid=0x191b rev=0x06
>[  474.194051] [drm:intel_device_info_dump [i915]] i915 device info: is_mobile: no
>[  474.194071] [drm:intel_device_info_dump [i915]] i915 device info: is_lp: no
>[  474.194128] [drm:intel_device_info_dump [i915]] i915 device info: is_alpha_support: no
>[  474.194147] [drm:intel_device_info_dump [i915]] i915 device info: has_64bit_reloc: yes
>[  474.194164] [drm:intel_device_info_dump [i915]] i915 device info: has_aliasing_ppgtt: yes
>[  474.194182] [drm:intel_device_info_dump [i915]] i915 device info: has_csr: yes
>[  474.194200] [drm:intel_device_info_dump [i915]] i915 device info: has_ddi: yes
>[  474.194217] [drm:intel_device_info_dump [i915]] i915 device info: has_decoupled_mmio: no
>[  474.194234] [drm:intel_device_info_dump [i915]] i915 device info: has_dp_mst: yes
>[  474.194251] [drm:intel_device_info_dump [i915]] i915 device info: has_fbc: yes
>[  474.194268] [drm:intel_device_info_dump [i915]] i915 device info: has_fpga_dbg: yes
>[  474.194284] [drm:intel_device_info_dump [i915]] i915 device info: has_full_ppgtt: yes
>[  474.194301] [drm:intel_device_info_dump [i915]] i915 device info: has_full_48bit_ppgtt: yes
>[  474.194317] [drm:intel_device_info_dump [i915]] i915 device info: has_gmbus_irq: yes
>[  474.194333] [drm:intel_device_info_dump [i915]] i915 device info: has_gmch_display: no
>[  474.194349] [drm:intel_device_info_dump [i915]] i915 device info: has_guc: yes
>[  474.194365] [drm:intel_device_info_dump [i915]] i915 device info: has_hotplug: yes
>[  474.194381] [drm:intel_device_info_dump [i915]] i915 device info: has_l3_dpf: no
>[  474.194397] [drm:intel_device_info_dump [i915]] i915 device info: has_llc: yes
>[  474.194413] [drm:intel_device_info_dump [i915]] i915 device info: has_logical_ring_contexts: yes
>[  474.194428] [drm:intel_device_info_dump [i915]] i915 device info: has_overlay: no
>[  474.194444] [drm:intel_device_info_dump [i915]] i915 device info: has_pipe_cxsr: no
>[  474.194460] [drm:intel_device_info_dump [i915]] i915 device info: has_pooled_eu: no
>[  474.194476] [drm:intel_device_info_dump [i915]] i915 device info: has_psr: yes
>[  474.194492] [drm:intel_device_info_dump [i915]] i915 device info: has_rc6: yes
>[  474.194508] [drm:intel_device_info_dump [i915]] i915 device info: has_rc6p: no
>[  474.194523] [drm:intel_device_info_dump [i915]] i915 device info: has_resource_streamer: yes
>[  474.194539] [drm:intel_device_info_dump [i915]] i915 device info: has_runtime_pm: yes
>[  474.194554] [drm:intel_device_info_dump [i915]] i915 device info: has_snoop: no
>[  474.194570] [drm:intel_device_info_dump [i915]] i915 device info: unfenced_needs_alignment: no
>[  474.194585] [drm:intel_device_info_dump [i915]] i915 device info: cursor_needs_physical: no
>[  474.194601] [drm:intel_device_info_dump [i915]] i915 device info: hws_needs_physical: no
>[  474.194616] [drm:intel_device_info_dump [i915]] i915 device info: overlay_needs_physical: no
>[  474.194683] [drm:intel_device_info_dump [i915]] i915 device info: supports_tv: no
>[  474.197323] [drm:intel_device_info_runtime_init [i915]] slice mask: 0001
>[  474.197347] [drm:intel_device_info_runtime_init [i915]] slice total: 1
>[  474.197368] [drm:intel_device_info_runtime_init [i915]] subslice total: 3
>[  474.197389] [drm:intel_device_info_runtime_init [i915]] subslice mask 0007
>[  474.197425] [drm:intel_device_info_runtime_init [i915]] subslice per slice: 3
>[  474.197443] [drm:intel_device_info_runtime_init [i915]] EU total: 24
>[  474.197461] [drm:intel_device_info_runtime_init [i915]] EU per subslice: 8
>[  474.197478] [drm:intel_device_info_runtime_init [i915]] has slice power gating: n
>[  474.197495] [drm:intel_device_info_runtime_init [i915]] has subslice power gating: n
>[  474.197512] [drm:intel_device_info_runtime_init [i915]] has EU power gating: y
>[  474.197533] [drm:i915_driver_load [i915]] ppgtt mode: 3
>[  474.197552] [drm:i915_driver_load [i915]] use GPU semaphores? no
>[  474.197593] [drm] Memory usable by graphics device = 4096M
>[  474.197619] [drm:i915_ggtt_probe_hw [i915]] GMADR size = 256M
>[  474.197707] [drm:i915_ggtt_probe_hw [i915]] GTT stolen size = 64M
>[  474.197717] [drm] Replacing VGA console driver
>[  474.197878] [drm:i915_gem_init_stolen [i915]] Memory reserved for graphics device: 65536K, usable: 64512K
>[  474.198036] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x77f6e018
>[  474.198081] [drm:intel_opregion_setup [i915]] Public ACPI methods supported
>[  474.198105] [drm:intel_opregion_setup [i915]] SWSCI supported
>[  474.204403] [drm:intel_opregion_setup [i915]] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00300483
>[  474.204432] [drm:intel_opregion_setup [i915]] ASLE supported
>[  474.204457] [drm:intel_opregion_setup [i915]] ASLE extension supported
>[  474.204480] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (Mailbox #4)
>[  474.204693] [drm:intel_gvt_init [i915]] GVT-g is disabled by kernel params
>[  474.204704] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
>[  474.204706] [drm] Driver supports precise vblank timestamp query.
>[  474.204758] [drm:intel_bios_init [i915]] Set default to SSC at 120000 kHz
>[  474.204796] [drm:intel_bios_init [i915]] VBT signature "$VBT SKYLAKE        ", BDB version 197
>[  474.204833] [drm:intel_bios_init [i915]] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 0 lvds_use_ssc 0 lvds_ssc_freq 120000 display_clock_mode 0 fdi_rx_polarity_inverted 0
>[  474.204882] [drm:intel_bios_init [i915]] crt_ddc_bus_pin: 2
>[  474.207006] [drm:intel_opregion_get_panel_type [i915]] Ignoring OpRegion panel type (0)
>[  474.207037] [drm:intel_bios_init [i915]] Panel type: 7 (VBT)
>[  474.207063] [drm:intel_bios_init [i915]] DRRS supported mode is static
>[  474.207092] [drm:intel_bios_init [i915]] Found panel mode in BIOS VBT tables:
>[  474.207096] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 0 85500 1366 1436 1580 1792 768 769 773 798 0x8 0xa
>[  474.207120] [drm:intel_bios_init [i915]] VBT initial LVDS value 300
>[  474.207142] [drm:intel_bios_init [i915]] VBT backlight PWM modulation frequency 210 Hz, active high, min brightness 0, level 255, controller 0
>[  474.207164] [drm:intel_bios_init [i915]] Unsupported child device size for SDVO mapping.
>[  474.207187] [drm:intel_bios_init [i915]] DRRS State Enabled:0
>[  474.207207] [drm:intel_bios_init [i915]] VBT has unknown eDP link rate value 2
>[  474.207227] [drm:intel_bios_init [i915]] Port A VBT info: DP:1 HDMI:0 DVI:0 EDP:1 CRT:0
>[  474.207247] [drm:intel_bios_init [i915]] VBT HDMI level shift for port A: 0
>[  474.207266] [drm:intel_bios_init [i915]] Port B VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0
>[  474.207285] [drm:intel_bios_init [i915]] VBT HDMI level shift for port B: 7
>[  474.207540] [drm:intel_dsm_detect [i915]] no _DSM method for intel device
>[  474.207578] [drm:intel_update_rawclk [i915]] rawclk rate: 24000 kHz
>[  474.207604] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  474.207750] [drm:intel_power_well_enable [i915]] enabling power well 1
>[  474.207785] [drm:intel_power_well_enable [i915]] enabling MISC IO power well
>[  474.207815] [drm:skl_init_cdclk [i915]] Sanitizing cdclk programmed by pre-os
>[  474.210415] [drm:intel_update_max_cdclk [i915]] Max CD clock rate: 675000 kHz
>[  474.210444] [drm:intel_update_max_cdclk [i915]] Max dotclock rate: 675000 kHz
>[  474.210474] [drm:intel_update_cdclk [i915]] Current CD clock rate: 337500 kHz, VCO: 8100000 kHz, ref: 24000 kHz
>[  474.210513] [drm:intel_power_well_enable [i915]] enabling always-on
>[  474.210536] [drm:intel_power_well_enable [i915]] enabling DC off
>[  474.210558] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  474.210583] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  474.210604] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  474.210657] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  474.210757] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>[  474.210788] [drm:intel_power_well_enable [i915]] enabling DDI D IO power well
>[  474.210851] [drm:intel_csr_ucode_init [i915]] Loading i915/skl_dmc_ver1_26.bin
>[  474.212306] [drm] Finished loading DMC firmware i915/skl_dmc_ver1_26.bin (v1.26)
>[  474.213200] [drm:intel_fbc_init [i915]] Sanitized enable_fbc value: 1
>[  474.213229] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM0 latency 2 (2.0 usec)
>[  474.213252] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM1 latency 19 (19.0 usec)
>[  474.213273] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM2 latency 28 (28.0 usec)
>[  474.213292] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM3 latency 32 (32.0 usec)
>[  474.213310] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM4 latency 63 (63.0 usec)
>[  474.213328] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM5 latency 77 (77.0 usec)
>[  474.213346] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM6 latency 83 (83.0 usec)
>[  474.213363] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM7 latency 99 (99.0 usec)
>[  474.213393] [drm:intel_modeset_init [i915]] 3 display pipes available.
>[  474.213619] [drm:intel_update_cdclk [i915]] Current CD clock rate: 337500 kHz, VCO: 8100000 kHz, ref: 24000 kHz
>[  474.214021] [drm:intel_dp_init_connector [i915]] Adding eDP connector on port A
>[  474.214053] [drm:intel_dp_init_connector [i915]] using AUX A for port A (VBT)
>[  474.214169] [drm:intel_pps_dump_state [i915]] cur t1_t3 2000 t8 1 t9 1 t10 500 t11_t12 5000
>[  474.214200] [drm:intel_pps_dump_state [i915]] vbt t1_t3 2000 t8 2000 t9 2000 t10 500 t11_t12 5000
>[  474.214224] [drm:intel_dp_init_panel_power_sequencer [i915]] panel power up delay 200, power down delay 50, power cycle delay 500
>[  474.214245] [drm:intel_dp_init_panel_power_sequencer [i915]] backlight on delay 200, off delay 200
>[  474.214312] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x4af05
>[  474.214376] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  474.214410] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  474.720968] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  474.721085] [drm:wait_panel_status [i915]] Wait complete
>[  474.721218] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000008
>[  474.721315] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled
>[  474.930045] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 0a c2 41 00 00 01 c0 02 00 00 00 1f 0b 00
>[  474.930851] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  474.931459] [drm:intel_dp_init_connector [i915]] Detected EDP PSR Panel.
>[  474.932163] [drm:intel_dp_init_connector [i915]] EDP DPCD : 02 b7 f6
>[  474.935547] [drm:drm_dp_i2c_do_msg] native defer
>[  474.936705] [drm:drm_dp_i2c_do_msg] native defer
>[  474.938152] [drm:drm_dp_i2c_do_msg] native defer
>[  474.939208] [drm:drm_dp_i2c_do_msg] native defer
>[  474.940572] [drm:drm_dp_i2c_do_msg] native defer
>[  474.941701] [drm:drm_dp_i2c_do_msg] native defer
>[  474.943144] [drm:drm_dp_i2c_do_msg] native defer
>[  474.944177] [drm:drm_dp_i2c_do_msg] native defer
>[  474.945546] [drm:drm_dp_i2c_do_msg] native defer
>[  474.946676] [drm:drm_dp_i2c_do_msg] native defer
>[  474.948135] [drm:drm_dp_i2c_do_msg] native defer
>[  474.949190] [drm:drm_dp_i2c_do_msg] native defer
>[  474.950567] [drm:drm_dp_i2c_do_msg] native defer
>[  474.951701] [drm:drm_dp_i2c_do_msg] native defer
>[  474.953166] [drm:drm_dp_i2c_do_msg] native defer
>[  474.954234] [drm:drm_dp_i2c_do_msg] native defer
>[  474.955383] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  474.955435] [drm:intel_dp_init_connector [i915]] VBT doesn't support DRRS
>[  474.955548] [drm:intel_panel_setup_backlight [i915]] Connector eDP-1 backlight initialized, disabled, brightness 0/7143
>[  474.955642] [drm:intel_ddi_init [i915]] VBT says port B has lspcon
>[  474.955726] [drm:intel_dp_init_connector [i915]] Adding DP connector on port B
>[  474.955770] [drm:intel_dp_init_connector [i915]] using AUX B for port B (VBT)
>[  474.956192] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  474.956651] [drm:drm_dp_i2c_do_msg] native defer
>[  474.957951] [drm:drm_dp_i2c_do_msg] native defer
>[  474.959253] [drm:drm_dp_i2c_do_msg] native defer
>[  474.960482] [drm:drm_dp_i2c_do_msg] native defer
>[  474.961889] [drm:drm_dp_i2c_do_msg] native defer
>[  474.962686] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[  474.963133] [drm:drm_dp_i2c_do_msg] native defer
>[  474.964373] [drm:drm_dp_i2c_do_msg] native defer
>[  474.965669] [drm:drm_dp_i2c_do_msg] native defer
>[  474.966964] [drm:drm_dp_i2c_do_msg] native defer
>[  474.968279] [drm:drm_dp_i2c_do_msg] native defer
>[  474.969061] [drm:drm_dp_dual_mode_detect] DP dual mode adaptor ID: a8 (err 0)
>[  474.969106] [drm:lspcon_init [i915]] LSPCON detected
>[  474.969553] [drm:drm_dp_i2c_do_msg] native defer
>[  474.970861] [drm:drm_dp_i2c_do_msg] native defer
>[  474.972166] [drm:drm_dp_i2c_do_msg] native defer
>[  474.973396] [drm:drm_dp_i2c_do_msg] native defer
>[  474.974684] [drm:drm_dp_i2c_do_msg] native defer
>[  474.975566] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  474.976062] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  474.976528] [drm:intel_dp_read_desc [i915]] DP branch: OUI 00-60-ad(NS) dev-ID MC2800 HW-rev 2.1 SW-rev 1.29
>[  474.976565] [drm:lspcon_init [i915]] Success: LSPCON init
>[  474.976601] [drm:intel_ddi_init [i915]] LSPCON init success on port B
>[  474.976720] [drm:intel_set_plane_visible [i915]] pipe A active planes 0x0
>[  474.976760] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:32:pipe A] hw state readout: disabled
>[  474.976802] [drm:intel_set_plane_visible [i915]] pipe B active planes 0x0
>[  474.976838] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:39:pipe B] hw state readout: disabled
>[  474.976877] [drm:intel_set_plane_visible [i915]] pipe C active planes 0x0
>[  474.976911] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:46:pipe C] hw state readout: disabled
>[  474.976946] [drm:intel_modeset_setup_hw_state [i915]] DPLL 0 hw state readout: crtc_mask 0x00000000, on 1
>[  474.976980] [drm:intel_modeset_setup_hw_state [i915]] DPLL 1 hw state readout: crtc_mask 0x00000000, on 0
>[  474.977011] [drm:intel_modeset_setup_hw_state [i915]] DPLL 2 hw state readout: crtc_mask 0x00000000, on 0
>[  474.977042] [drm:intel_modeset_setup_hw_state [i915]] DPLL 3 hw state readout: crtc_mask 0x00000000, on 0
>[  474.977073] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:47:DDI A] hw state readout: disabled, pipe A
>[  474.977102] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:55:DDI B] hw state readout: disabled, pipe A
>[  474.977130] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:57:DP-MST A] hw state readout: disabled, pipe A
>[  474.977157] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:58:DP-MST B] hw state readout: disabled, pipe B
>[  474.977184] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:59:DP-MST C] hw state readout: disabled, pipe C
>[  474.977226] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:48:eDP-1] hw state readout: disabled
>[  474.977258] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:56:DP-1] hw state readout: disabled
>[  474.977298] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][setup_hw_state]
>[  474.977330] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0
>[  474.977360] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  474.977390] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  474.977396] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  474.977424] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  474.977429] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  474.977457] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  474.977485] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  474.977513] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: 0
>[  474.977541] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  474.977568] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  474.977603] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  474.977631] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  474.977677] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  474.977708] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  474.977737] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  474.977767] [drm:intel_dump_pipe_config [i915]] [CRTC:39:pipe B][setup_hw_state]
>[  474.977795] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0
>[  474.977822] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  474.977850] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  474.977856] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  474.977883] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  474.977889] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  474.977916] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  474.977942] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  474.977969] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: 0
>[  474.977996] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  474.978023] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  474.978058] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  474.978087] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  474.978116] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 1B] disabled, scaler_id = -1
>[  474.978144] [drm:intel_dump_pipe_config [i915]] [PLANE:35:plane 2B] disabled, scaler_id = -1
>[  474.978171] [drm:intel_dump_pipe_config [i915]] [PLANE:37:cursor B] disabled, scaler_id = -1
>[  474.978200] [drm:intel_dump_pipe_config [i915]] [CRTC:46:pipe C][setup_hw_state]
>[  474.978227] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0
>[  474.978253] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  474.978280] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  474.978286] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  474.978312] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  474.978318] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  474.978344] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  474.978370] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  474.978395] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: 0
>[  474.978420] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  474.978447] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  474.978482] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  474.978511] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  474.978538] [drm:intel_dump_pipe_config [i915]] [PLANE:40:plane 1C] disabled, scaler_id = -1
>[  474.978565] [drm:intel_dump_pipe_config [i915]] [PLANE:42:plane 2C] disabled, scaler_id = -1
>[  474.978591] [drm:intel_dump_pipe_config [i915]] [PLANE:44:cursor C] disabled, scaler_id = -1
>[  474.978624] [drm:intel_modeset_setup_hw_state [i915]] DPLL 0 enabled but not in use, disabling
>[  474.978748] [drm:intel_power_well_disable [i915]] disabling DDI D IO power well
>[  474.978796] [drm:skl_set_power_well [i915]] Disabling DDI D IO power well
>[  474.978829] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well
>[  474.978860] [drm:skl_set_power_well [i915]] Disabling DDI C IO power well
>[  474.978891] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[  474.978920] [drm:skl_set_power_well [i915]] Disabling DDI B IO power well
>[  474.978949] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  474.978977] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  474.979005] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  474.979056] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  474.979131] [drm:i915_gem_init_ggtt [i915]] clearing unused GTT space: [1000, 100000000]
>[  474.979201] [drm:i915_gem_context_init [i915]] logical context support initialized
>[  474.979424] [drm:intel_engine_create_scratch [i915]] rcs0 pipe control offset: 0xfffff000
>[  474.981444] [drm:gen8_init_common_ring [i915]] Execlists enabled for rcs0
>[  474.981496] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 14
>[  474.981578] [drm:gen8_init_common_ring [i915]] Execlists enabled for bcs0
>[  474.981688] [drm:gen8_init_common_ring [i915]] Execlists enabled for vcs0
>[  474.981767] [drm:gen8_init_common_ring [i915]] Execlists enabled for vecs0
>[  474.982188] [drm:intel_fbdev_init [i915]] pipe A not active or no fb, skipping
>[  474.982228] [drm:intel_fbdev_init [i915]] pipe B not active or no fb, skipping
>[  474.982264] [drm:intel_fbdev_init [i915]] pipe C not active or no fb, skipping
>[  474.982299] [drm:intel_fbdev_init [i915]] no active fbs found, not using BIOS config
>[  474.983724] [drm:intel_backlight_device_register [i915]] Connector eDP-1 backlight sysfs interface registered
>[  474.983805] [drm:intel_dp_connector_register [i915]] registering DPDDC-A bus for card0-eDP-1
>[  474.984520] [drm:intel_dp_connector_register [i915]] registering DPDDC-B bus for card0-DP-1
>[  474.984973] [drm] Initialized i915 1.6.0 20170515 for 0000:00:02.0 on minor 0
>[  474.985943] [drm:intel_opregion_register [i915]] 2 outputs detected
>[  474.986129] [Firmware Bug]: ACPI(PEGP) defines _DOD but not _DOS
>[  474.986293] ACPI: Video Device [PEGP] (multi-head: yes  rom: yes  post: no)
>[  474.986525] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:00/LNXVIDEO:00/input/input50
>[  475.000310] ACPI: Video Device [GFX0] (multi-head: yes  rom: no  post: no)
>[  475.002060] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:01/input/input51
>[  475.002465] [drm] DRM_I915_DEBUG enabled
>[  475.002467] [drm] DRM_I915_DEBUG_GEM enabled
>[  475.002473] [drm:drm_setup_crtcs] 
>[  475.002481] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  475.002551] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  475.002632] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  475.002957] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  475.002996] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  475.003032] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  475.003966] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  475.004825] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] status updated from unknown to connected
>[  475.004863] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  475.004874] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] probed modes :
>[  475.004880] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  475.004903] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  475.004950] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  475.004998] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  475.005052] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  475.005490] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  475.005545] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  475.005986] [drm:drm_dp_i2c_do_msg] native defer
>[  475.007334] [drm:drm_dp_i2c_do_msg] native defer
>[  475.008562] [drm:drm_dp_i2c_do_msg] native defer
>[  475.009790] [drm:drm_dp_i2c_do_msg] native defer
>[  475.011036] [drm:drm_dp_i2c_do_msg] native defer
>[  475.011996] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  475.012474] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  475.013092] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  475.013150] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  475.013160] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] status updated from unknown to disconnected
>[  475.013164] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  475.013182] [drm:drm_setup_crtcs] connector 48 enabled? yes
>[  475.013185] [drm:drm_setup_crtcs] connector 56 enabled? no
>[  475.013229] [drm:intel_fb_initial_config [i915]] Not using firmware configuration
>[  475.013237] [drm:drm_setup_crtcs] looking for cmdline mode on connector 48
>[  475.013241] [drm:drm_setup_crtcs] looking for preferred mode on connector 48 0
>[  475.013244] [drm:drm_setup_crtcs] found mode 1920x1080
>[  475.013247] [drm:drm_setup_crtcs] picking CRTCs for 8192x8192 config
>[  475.013260] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 32 (0,0)
>[  475.013313] [drm:intelfb_create [i915]] no BIOS fb, allocating a new one
>[  475.014334] [drm:intelfb_create [i915]] allocated 1920x1080 fb: 0x00040000
>[  475.014799] fbcon: inteldrmfb (fb0) is primary device
>[  475.015365] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  475.015404] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  475.015442] [drm:skl_update_scaler [i915]] scaler_user index 0.31: Staged freeing scaler id 0 scaler_users = 0x0
>[  475.015480] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  475.015517] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  475.015550] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  475.015588] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  475.015640] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  475.015706] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  475.015733] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  475.015755] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  475.015777] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  475.015780] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  475.015801] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  475.015804] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  475.015824] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  475.015845] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  475.015864] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  475.015884] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  475.015903] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  475.015929] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  475.015950] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  475.015969] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  475.015988] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  475.016024] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  475.016047] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  475.016075] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  475.016098] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  475.016268] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  475.016291] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  475.016351] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  475.016371] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  475.016392] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  475.016414] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  475.016459] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  475.016519] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  475.016540] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  475.016599] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  475.016705] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  475.016823] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  475.016893] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  475.016985] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000008
>[  475.017026] [drm:wait_panel_status [i915]] Wait complete
>[  475.017079] [drm:edp_panel_on [i915]] Wait for panel power on
>[  475.017161] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 0000000b
>[  475.218133] [drm:wait_panel_status [i915]] Wait complete
>[  475.218261] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  475.218372] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  475.220613] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  475.220744] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  475.220831] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  475.220918] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  475.222034] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  475.222121] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  475.223496] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  475.223584] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  475.225848] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  475.226024] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  475.226120] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  475.226304] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  475.424981] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  475.425093] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  475.425240] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  475.425340] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  475.426238] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  475.426350] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  475.426512] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  475.426614] [drm:intel_enable_sagv [i915]] Enabling the SAGV
>[  475.427108] Console: switching to colour frame buffer device 240x67
>[  475.449658] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device
>[  475.459938] snd_hda_intel 0000:00:1f.3: bound 0000:00:02.0 (ops i915_audio_component_bind_ops [i915])
>[  475.460847] Console: switching to colour dummy device 80x25
>[  475.462523] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  475.462550] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  475.484450] snd_hda_codec_generic hdaudioC0D0: autoconfig for Generic: line_outs=1 (0x17/0x0/0x0/0x0/0x0) type:speaker
>[  475.484458] snd_hda_codec_generic hdaudioC0D0:    speaker_outs=0 (0x0/0x0/0x0/0x0/0x0)
>[  475.484460] snd_hda_codec_generic hdaudioC0D0:    hp_outs=1 (0x16/0x0/0x0/0x0/0x0)
>[  475.484462] snd_hda_codec_generic hdaudioC0D0:    mono: mono_out=0x0
>[  475.484464] snd_hda_codec_generic hdaudioC0D0:    inputs:
>[  475.484466] snd_hda_codec_generic hdaudioC0D0:      Internal Mic=0x1a
>[  475.484468] snd_hda_codec_generic hdaudioC0D0:      Mic=0x19
>[  475.492779] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  475.492810] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  475.492832] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  475.492853] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  475.492873] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  475.492892] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  475.492911] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[  475.492930] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[  475.492948] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[  475.496430] input: HDA Intel PCH Mic as /devices/pci0000:00/0000:00:1f.3/sound/card0/input52
>[  475.497319] input: HDA Intel PCH Headphone as /devices/pci0000:00/0000:00:1f.3/sound/card0/input53
>[  475.497903] input: HDA Intel PCH HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input54
>[  475.498256] input: HDA Intel PCH HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input55
>[  475.498596] input: HDA Intel PCH HDMI/DP,pcm=8 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input56
>[  475.499012] input: HDA Intel PCH HDMI/DP,pcm=9 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input57
>[  475.499369] input: HDA Intel PCH HDMI/DP,pcm=10 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input58
>[  475.506733] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  475.506792] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  475.567490] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  475.567537] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  475.574024] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  475.574060] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  475.574085] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  475.574111] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  475.574138] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  475.574166] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  475.574192] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[  475.574218] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[  475.574245] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[  475.574625] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  475.574718] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  475.603779] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  475.603885] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  475.808720] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  475.808805] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  475.811399] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  475.811448] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  475.811518] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000000
>[  475.861598] [drm:wait_panel_status [i915]] Wait complete
>[  475.861677] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  475.861717] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  475.861779] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  475.861923] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  475.861976] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  475.862037] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  475.862066] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  475.862092] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  475.862117] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  475.862141] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  475.862166] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  475.862194] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  475.862221] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  475.862246] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  475.862271] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  475.862314] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  475.862341] [drm:intel_power_well_disable [i915]] disabling DC off
>[  475.862365] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  475.862386] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  475.862828] [drm:intel_power_well_disable [i915]] disabling always-on
>[  475.863964] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  475.864013] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  475.864060] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  475.864206] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  475.871308] [drm:intel_power_well_enable [i915]] enabling always-on
>[  475.871335] [drm:intel_power_well_enable [i915]] enabling DC off
>[  475.871362] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  475.871393] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  475.871419] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  475.871487] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  475.871512] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  475.871535] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  475.871560] [drm:skl_set_power_well [i915]] Enabling DDI B IO power well
>[  475.871583] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>[  475.871607] [drm:skl_set_power_well [i915]] Enabling DDI C IO power well
>[  475.871667] [drm:intel_power_well_enable [i915]] enabling DDI D IO power well
>[  475.871693] [drm:skl_set_power_well [i915]] Enabling DDI D IO power well
>[  476.041190] Setting dangerous option inject_load_failure - tainting kernel
>[  476.052383] [drm] Injecting failure at checkpoint 1 [i915_driver_init_early:811]
>[  476.052417] i915 0000:00:02.0: [drm:i915_driver_load [i915]] Device initialization failed (-19)
>[  476.059981] snd_hda_intel 0000:00:1f.3: failed to add i915 component master (-19)
>[  476.073202] snd_hda_codec_generic hdaudioC0D0: autoconfig for Generic: line_outs=1 (0x17/0x0/0x0/0x0/0x0) type:speaker
>[  476.073209] snd_hda_codec_generic hdaudioC0D0:    speaker_outs=0 (0x0/0x0/0x0/0x0/0x0)
>[  476.073211] snd_hda_codec_generic hdaudioC0D0:    hp_outs=1 (0x16/0x0/0x0/0x0/0x0)
>[  476.073213] snd_hda_codec_generic hdaudioC0D0:    mono: mono_out=0x0
>[  476.073215] snd_hda_codec_generic hdaudioC0D0:    inputs:
>[  476.073217] snd_hda_codec_generic hdaudioC0D0:      Internal Mic=0x1a
>[  476.073219] snd_hda_codec_generic hdaudioC0D0:      Mic=0x19
>[  476.076807] snd_hda_codec_hdmi hdaudioC0D2: No i915 binding for Intel HDMI/DP codec
>[  476.079607] snd_hda_codec_hdmi hdaudioC0D2: No i915 binding for Intel HDMI/DP codec
>[  476.086784] input: HDA Intel PCH Mic as /devices/pci0000:00/0000:00:1f.3/sound/card0/input59
>[  476.088042] input: HDA Intel PCH Headphone as /devices/pci0000:00/0000:00:1f.3/sound/card0/input60
>[  476.088541] input: HDA Intel PCH HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input61
>[  476.200431] Setting dangerous option inject_load_failure - tainting kernel
>[  476.211330] [drm:i915_driver_load [i915]] Found SunrisePoint PCH
>[  476.211359] [drm:intel_power_domains_init [i915]] Allowed DC state mask 03
>[  476.212213] [drm:intel_device_info_dump [i915]] i915 device info: platform=SKYLAKE gen=9 pciid=0x191b rev=0x06
>[  476.212235] [drm:intel_device_info_dump [i915]] i915 device info: is_mobile: no
>[  476.212255] [drm:intel_device_info_dump [i915]] i915 device info: is_lp: no
>[  476.212274] [drm:intel_device_info_dump [i915]] i915 device info: is_alpha_support: no
>[  476.212293] [drm:intel_device_info_dump [i915]] i915 device info: has_64bit_reloc: yes
>[  476.212311] [drm:intel_device_info_dump [i915]] i915 device info: has_aliasing_ppgtt: yes
>[  476.212330] [drm:intel_device_info_dump [i915]] i915 device info: has_csr: yes
>[  476.212347] [drm:intel_device_info_dump [i915]] i915 device info: has_ddi: yes
>[  476.212366] [drm:intel_device_info_dump [i915]] i915 device info: has_decoupled_mmio: no
>[  476.212392] [drm:intel_device_info_dump [i915]] i915 device info: has_dp_mst: yes
>[  476.212418] [drm:intel_device_info_dump [i915]] i915 device info: has_fbc: yes
>[  476.212443] [drm:intel_device_info_dump [i915]] i915 device info: has_fpga_dbg: yes
>[  476.212467] [drm:intel_device_info_dump [i915]] i915 device info: has_full_ppgtt: yes
>[  476.212492] [drm:intel_device_info_dump [i915]] i915 device info: has_full_48bit_ppgtt: yes
>[  476.212517] [drm:intel_device_info_dump [i915]] i915 device info: has_gmbus_irq: yes
>[  476.212542] [drm:intel_device_info_dump [i915]] i915 device info: has_gmch_display: no
>[  476.212566] [drm:intel_device_info_dump [i915]] i915 device info: has_guc: yes
>[  476.212592] [drm:intel_device_info_dump [i915]] i915 device info: has_hotplug: yes
>[  476.212616] [drm:intel_device_info_dump [i915]] i915 device info: has_l3_dpf: no
>[  476.212711] [drm:intel_device_info_dump [i915]] i915 device info: has_llc: yes
>[  476.212739] [drm:intel_device_info_dump [i915]] i915 device info: has_logical_ring_contexts: yes
>[  476.212766] [drm:intel_device_info_dump [i915]] i915 device info: has_overlay: no
>[  476.212793] [drm:intel_device_info_dump [i915]] i915 device info: has_pipe_cxsr: no
>[  476.212820] [drm:intel_device_info_dump [i915]] i915 device info: has_pooled_eu: no
>[  476.212846] [drm:intel_device_info_dump [i915]] i915 device info: has_psr: yes
>[  476.212872] [drm:intel_device_info_dump [i915]] i915 device info: has_rc6: yes
>[  476.212899] [drm:intel_device_info_dump [i915]] i915 device info: has_rc6p: no
>[  476.212924] [drm:intel_device_info_dump [i915]] i915 device info: has_resource_streamer: yes
>[  476.212952] [drm:intel_device_info_dump [i915]] i915 device info: has_runtime_pm: yes
>[  476.212977] [drm:intel_device_info_dump [i915]] i915 device info: has_snoop: no
>[  476.213002] [drm:intel_device_info_dump [i915]] i915 device info: unfenced_needs_alignment: no
>[  476.213027] [drm:intel_device_info_dump [i915]] i915 device info: cursor_needs_physical: no
>[  476.213052] [drm:intel_device_info_dump [i915]] i915 device info: hws_needs_physical: no
>[  476.213095] [drm:intel_device_info_dump [i915]] i915 device info: overlay_needs_physical: no
>[  476.213137] [drm:intel_device_info_dump [i915]] i915 device info: supports_tv: no
>[  476.213142] [drm] Injecting failure at checkpoint 2 [i915_driver_init_mmio:941]
>[  476.249843] i915 0000:00:02.0: [drm:i915_driver_load [i915]] Device initialization failed (-19)
>[  476.263427] snd_hda_intel 0000:00:1f.3: failed to add i915 component master (-19)
>[  476.276804] snd_hda_codec_generic hdaudioC0D0: autoconfig for Generic: line_outs=1 (0x17/0x0/0x0/0x0/0x0) type:speaker
>[  476.276811] snd_hda_codec_generic hdaudioC0D0:    speaker_outs=0 (0x0/0x0/0x0/0x0/0x0)
>[  476.276814] snd_hda_codec_generic hdaudioC0D0:    hp_outs=1 (0x16/0x0/0x0/0x0/0x0)
>[  476.276816] snd_hda_codec_generic hdaudioC0D0:    mono: mono_out=0x0
>[  476.276817] snd_hda_codec_generic hdaudioC0D0:    inputs:
>[  476.276820] snd_hda_codec_generic hdaudioC0D0:      Internal Mic=0x1a
>[  476.276822] snd_hda_codec_generic hdaudioC0D0:      Mic=0x19
>[  476.280329] snd_hda_codec_hdmi hdaudioC0D2: No i915 binding for Intel HDMI/DP codec
>[  476.283232] snd_hda_codec_hdmi hdaudioC0D2: No i915 binding for Intel HDMI/DP codec
>[  476.290694] input: HDA Intel PCH Mic as /devices/pci0000:00/0000:00:1f.3/sound/card0/input62
>[  476.291517] input: HDA Intel PCH Headphone as /devices/pci0000:00/0000:00:1f.3/sound/card0/input63
>[  476.292253] input: HDA Intel PCH HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input64
>[  476.400328] Setting dangerous option inject_load_failure - tainting kernel
>[  476.411664] [drm:i915_driver_load [i915]] Found SunrisePoint PCH
>[  476.411694] [drm:intel_power_domains_init [i915]] Allowed DC state mask 03
>[  476.413092] [drm:intel_device_info_dump [i915]] i915 device info: platform=SKYLAKE gen=9 pciid=0x191b rev=0x06
>[  476.413123] [drm:intel_device_info_dump [i915]] i915 device info: is_mobile: no
>[  476.413152] [drm:intel_device_info_dump [i915]] i915 device info: is_lp: no
>[  476.413180] [drm:intel_device_info_dump [i915]] i915 device info: is_alpha_support: no
>[  476.413207] [drm:intel_device_info_dump [i915]] i915 device info: has_64bit_reloc: yes
>[  476.413233] [drm:intel_device_info_dump [i915]] i915 device info: has_aliasing_ppgtt: yes
>[  476.413259] [drm:intel_device_info_dump [i915]] i915 device info: has_csr: yes
>[  476.413283] [drm:intel_device_info_dump [i915]] i915 device info: has_ddi: yes
>[  476.413308] [drm:intel_device_info_dump [i915]] i915 device info: has_decoupled_mmio: no
>[  476.413332] [drm:intel_device_info_dump [i915]] i915 device info: has_dp_mst: yes
>[  476.413357] [drm:intel_device_info_dump [i915]] i915 device info: has_fbc: yes
>[  476.413381] [drm:intel_device_info_dump [i915]] i915 device info: has_fpga_dbg: yes
>[  476.413406] [drm:intel_device_info_dump [i915]] i915 device info: has_full_ppgtt: yes
>[  476.413430] [drm:intel_device_info_dump [i915]] i915 device info: has_full_48bit_ppgtt: yes
>[  476.413454] [drm:intel_device_info_dump [i915]] i915 device info: has_gmbus_irq: yes
>[  476.413477] [drm:intel_device_info_dump [i915]] i915 device info: has_gmch_display: no
>[  476.413501] [drm:intel_device_info_dump [i915]] i915 device info: has_guc: yes
>[  476.413525] [drm:intel_device_info_dump [i915]] i915 device info: has_hotplug: yes
>[  476.413548] [drm:intel_device_info_dump [i915]] i915 device info: has_l3_dpf: no
>[  476.413572] [drm:intel_device_info_dump [i915]] i915 device info: has_llc: yes
>[  476.413596] [drm:intel_device_info_dump [i915]] i915 device info: has_logical_ring_contexts: yes
>[  476.413619] [drm:intel_device_info_dump [i915]] i915 device info: has_overlay: no
>[  476.413710] [drm:intel_device_info_dump [i915]] i915 device info: has_pipe_cxsr: no
>[  476.413736] [drm:intel_device_info_dump [i915]] i915 device info: has_pooled_eu: no
>[  476.413763] [drm:intel_device_info_dump [i915]] i915 device info: has_psr: yes
>[  476.413790] [drm:intel_device_info_dump [i915]] i915 device info: has_rc6: yes
>[  476.413816] [drm:intel_device_info_dump [i915]] i915 device info: has_rc6p: no
>[  476.413842] [drm:intel_device_info_dump [i915]] i915 device info: has_resource_streamer: yes
>[  476.413868] [drm:intel_device_info_dump [i915]] i915 device info: has_runtime_pm: yes
>[  476.413893] [drm:intel_device_info_dump [i915]] i915 device info: has_snoop: no
>[  476.413919] [drm:intel_device_info_dump [i915]] i915 device info: unfenced_needs_alignment: no
>[  476.413944] [drm:intel_device_info_dump [i915]] i915 device info: cursor_needs_physical: no
>[  476.413970] [drm:intel_device_info_dump [i915]] i915 device info: hws_needs_physical: no
>[  476.413994] [drm:intel_device_info_dump [i915]] i915 device info: overlay_needs_physical: no
>[  476.414019] [drm:intel_device_info_dump [i915]] i915 device info: supports_tv: no
>[  476.416651] [drm] Injecting failure at checkpoint 3 [i915_driver_init_hw:1014]
>[  476.451936] i915 0000:00:02.0: [drm:i915_driver_load [i915]] Device initialization failed (-19)
>[  476.456226] [IGT] drv_module_reload: exiting, ret=0
>[  476.460819] snd_hda_intel 0000:00:1f.3: failed to add i915 component master (-19)
>[  476.473996] snd_hda_codec_generic hdaudioC0D0: autoconfig for Generic: line_outs=1 (0x17/0x0/0x0/0x0/0x0) type:speaker
>[  476.474003] snd_hda_codec_generic hdaudioC0D0:    speaker_outs=0 (0x0/0x0/0x0/0x0/0x0)
>[  476.474005] snd_hda_codec_generic hdaudioC0D0:    hp_outs=1 (0x16/0x0/0x0/0x0/0x0)
>[  476.474008] snd_hda_codec_generic hdaudioC0D0:    mono: mono_out=0x0
>[  476.474009] snd_hda_codec_generic hdaudioC0D0:    inputs:
>[  476.474012] snd_hda_codec_generic hdaudioC0D0:      Internal Mic=0x1a
>[  476.474014] snd_hda_codec_generic hdaudioC0D0:      Mic=0x19
>[  476.477344] snd_hda_codec_hdmi hdaudioC0D2: No i915 binding for Intel HDMI/DP codec
>[  476.479874] snd_hda_codec_hdmi hdaudioC0D2: No i915 binding for Intel HDMI/DP codec
>[  476.485719] input: HDA Intel PCH Mic as /devices/pci0000:00/0000:00:1f.3/sound/card0/input65
>[  476.486932] input: HDA Intel PCH Headphone as /devices/pci0000:00/0000:00:1f.3/sound/card0/input66
>[  476.487538] input: HDA Intel PCH HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input67
>[  476.869069] [IGT] drv_module_reload: executing
>[  476.870351] [IGT] drv_module_reload: starting subtest basic-reload-final
>[  476.986420] [drm:i915_driver_load [i915]] Found SunrisePoint PCH
>[  476.986465] [drm:intel_power_domains_init [i915]] Allowed DC state mask 03
>[  476.987345] [drm:intel_device_info_dump [i915]] i915 device info: platform=SKYLAKE gen=9 pciid=0x191b rev=0x06
>[  476.987368] [drm:intel_device_info_dump [i915]] i915 device info: is_mobile: no
>[  476.987388] [drm:intel_device_info_dump [i915]] i915 device info: is_lp: no
>[  476.987407] [drm:intel_device_info_dump [i915]] i915 device info: is_alpha_support: no
>[  476.987442] [drm:intel_device_info_dump [i915]] i915 device info: has_64bit_reloc: yes
>[  476.987460] [drm:intel_device_info_dump [i915]] i915 device info: has_aliasing_ppgtt: yes
>[  476.987478] [drm:intel_device_info_dump [i915]] i915 device info: has_csr: yes
>[  476.987495] [drm:intel_device_info_dump [i915]] i915 device info: has_ddi: yes
>[  476.987512] [drm:intel_device_info_dump [i915]] i915 device info: has_decoupled_mmio: no
>[  476.987529] [drm:intel_device_info_dump [i915]] i915 device info: has_dp_mst: yes
>[  476.987546] [drm:intel_device_info_dump [i915]] i915 device info: has_fbc: yes
>[  476.987563] [drm:intel_device_info_dump [i915]] i915 device info: has_fpga_dbg: yes
>[  476.987579] [drm:intel_device_info_dump [i915]] i915 device info: has_full_ppgtt: yes
>[  476.987595] [drm:intel_device_info_dump [i915]] i915 device info: has_full_48bit_ppgtt: yes
>[  476.987611] [drm:intel_device_info_dump [i915]] i915 device info: has_gmbus_irq: yes
>[  476.987671] [drm:intel_device_info_dump [i915]] i915 device info: has_gmch_display: no
>[  476.987708] [drm:intel_device_info_dump [i915]] i915 device info: has_guc: yes
>[  476.987727] [drm:intel_device_info_dump [i915]] i915 device info: has_hotplug: yes
>[  476.987745] [drm:intel_device_info_dump [i915]] i915 device info: has_l3_dpf: no
>[  476.987763] [drm:intel_device_info_dump [i915]] i915 device info: has_llc: yes
>[  476.987781] [drm:intel_device_info_dump [i915]] i915 device info: has_logical_ring_contexts: yes
>[  476.987799] [drm:intel_device_info_dump [i915]] i915 device info: has_overlay: no
>[  476.987817] [drm:intel_device_info_dump [i915]] i915 device info: has_pipe_cxsr: no
>[  476.987835] [drm:intel_device_info_dump [i915]] i915 device info: has_pooled_eu: no
>[  476.987853] [drm:intel_device_info_dump [i915]] i915 device info: has_psr: yes
>[  476.987871] [drm:intel_device_info_dump [i915]] i915 device info: has_rc6: yes
>[  476.987889] [drm:intel_device_info_dump [i915]] i915 device info: has_rc6p: no
>[  476.987907] [drm:intel_device_info_dump [i915]] i915 device info: has_resource_streamer: yes
>[  476.987924] [drm:intel_device_info_dump [i915]] i915 device info: has_runtime_pm: yes
>[  476.987942] [drm:intel_device_info_dump [i915]] i915 device info: has_snoop: no
>[  476.987959] [drm:intel_device_info_dump [i915]] i915 device info: unfenced_needs_alignment: no
>[  476.987975] [drm:intel_device_info_dump [i915]] i915 device info: cursor_needs_physical: no
>[  476.987992] [drm:intel_device_info_dump [i915]] i915 device info: hws_needs_physical: no
>[  476.988007] [drm:intel_device_info_dump [i915]] i915 device info: overlay_needs_physical: no
>[  476.988024] [drm:intel_device_info_dump [i915]] i915 device info: supports_tv: no
>[  476.990672] [drm:intel_device_info_runtime_init [i915]] slice mask: 0001
>[  476.990696] [drm:intel_device_info_runtime_init [i915]] slice total: 1
>[  476.990726] [drm:intel_device_info_runtime_init [i915]] subslice total: 3
>[  476.990767] [drm:intel_device_info_runtime_init [i915]] subslice mask 0007
>[  476.990805] [drm:intel_device_info_runtime_init [i915]] subslice per slice: 3
>[  476.990824] [drm:intel_device_info_runtime_init [i915]] EU total: 24
>[  476.990842] [drm:intel_device_info_runtime_init [i915]] EU per subslice: 8
>[  476.990859] [drm:intel_device_info_runtime_init [i915]] has slice power gating: n
>[  476.990894] [drm:intel_device_info_runtime_init [i915]] has subslice power gating: n
>[  476.990911] [drm:intel_device_info_runtime_init [i915]] has EU power gating: y
>[  476.990932] [drm:i915_driver_load [i915]] ppgtt mode: 3
>[  476.990953] [drm:i915_driver_load [i915]] use GPU semaphores? no
>[  476.990999] [drm] Memory usable by graphics device = 4096M
>[  476.991024] [drm:i915_ggtt_probe_hw [i915]] GMADR size = 256M
>[  476.991065] [drm:i915_ggtt_probe_hw [i915]] GTT stolen size = 64M
>[  476.991071] [drm] Replacing VGA console driver
>[  476.991217] [drm:i915_gem_init_stolen [i915]] Memory reserved for graphics device: 65536K, usable: 64512K
>[  476.991335] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x77f6e018
>[  476.991382] [drm:intel_opregion_setup [i915]] Public ACPI methods supported
>[  476.991405] [drm:intel_opregion_setup [i915]] SWSCI supported
>[  476.996904] [drm:intel_opregion_setup [i915]] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00300483
>[  476.996933] [drm:intel_opregion_setup [i915]] ASLE supported
>[  476.996958] [drm:intel_opregion_setup [i915]] ASLE extension supported
>[  476.996981] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (Mailbox #4)
>[  476.997138] [drm:intel_gvt_init [i915]] GVT-g is disabled by kernel params
>[  476.997144] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
>[  476.997146] [drm] Driver supports precise vblank timestamp query.
>[  476.997174] [drm:intel_bios_init [i915]] Set default to SSC at 120000 kHz
>[  476.997200] [drm:intel_bios_init [i915]] VBT signature "$VBT SKYLAKE        ", BDB version 197
>[  476.997224] [drm:intel_bios_init [i915]] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 0 lvds_use_ssc 0 lvds_ssc_freq 120000 display_clock_mode 0 fdi_rx_polarity_inverted 0
>[  476.997246] [drm:intel_bios_init [i915]] crt_ddc_bus_pin: 2
>[  476.999371] [drm:intel_opregion_get_panel_type [i915]] Ignoring OpRegion panel type (0)
>[  476.999401] [drm:intel_bios_init [i915]] Panel type: 7 (VBT)
>[  476.999427] [drm:intel_bios_init [i915]] DRRS supported mode is static
>[  476.999456] [drm:intel_bios_init [i915]] Found panel mode in BIOS VBT tables:
>[  476.999461] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 0 85500 1366 1436 1580 1792 768 769 773 798 0x8 0xa
>[  476.999483] [drm:intel_bios_init [i915]] VBT initial LVDS value 300
>[  476.999506] [drm:intel_bios_init [i915]] VBT backlight PWM modulation frequency 210 Hz, active high, min brightness 0, level 255, controller 0
>[  476.999526] [drm:intel_bios_init [i915]] Unsupported child device size for SDVO mapping.
>[  476.999549] [drm:intel_bios_init [i915]] DRRS State Enabled:0
>[  476.999569] [drm:intel_bios_init [i915]] VBT has unknown eDP link rate value 2
>[  476.999589] [drm:intel_bios_init [i915]] Port A VBT info: DP:1 HDMI:0 DVI:0 EDP:1 CRT:0
>[  476.999608] [drm:intel_bios_init [i915]] VBT HDMI level shift for port A: 0
>[  476.999680] [drm:intel_bios_init [i915]] Port B VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0
>[  476.999737] [drm:intel_bios_init [i915]] VBT HDMI level shift for port B: 7
>[  477.000054] [drm:intel_dsm_detect [i915]] no _DSM method for intel device
>[  477.000091] [drm:intel_update_rawclk [i915]] rawclk rate: 24000 kHz
>[  477.000116] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  477.000228] [drm:intel_power_well_enable [i915]] enabling power well 1
>[  477.000258] [drm:intel_power_well_enable [i915]] enabling MISC IO power well
>[  477.000285] [drm:skl_init_cdclk [i915]] Sanitizing cdclk programmed by pre-os
>[  477.002907] [drm:intel_update_max_cdclk [i915]] Max CD clock rate: 675000 kHz
>[  477.002934] [drm:intel_update_max_cdclk [i915]] Max dotclock rate: 675000 kHz
>[  477.002963] [drm:intel_update_cdclk [i915]] Current CD clock rate: 337500 kHz, VCO: 8100000 kHz, ref: 24000 kHz
>[  477.003000] [drm:intel_power_well_enable [i915]] enabling always-on
>[  477.003022] [drm:intel_power_well_enable [i915]] enabling DC off
>[  477.003043] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  477.003067] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  477.003086] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  477.003105] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  477.003123] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>[  477.003142] [drm:intel_power_well_enable [i915]] enabling DDI D IO power well
>[  477.003173] [drm:intel_csr_ucode_init [i915]] Loading i915/skl_dmc_ver1_26.bin
>[  477.004564] [drm] Finished loading DMC firmware i915/skl_dmc_ver1_26.bin (v1.26)
>[  477.005152] [drm:intel_fbc_init [i915]] Sanitized enable_fbc value: 1
>[  477.005182] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM0 latency 2 (2.0 usec)
>[  477.005204] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM1 latency 19 (19.0 usec)
>[  477.005224] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM2 latency 28 (28.0 usec)
>[  477.005243] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM3 latency 32 (32.0 usec)
>[  477.005262] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM4 latency 63 (63.0 usec)
>[  477.005280] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM5 latency 77 (77.0 usec)
>[  477.005297] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM6 latency 83 (83.0 usec)
>[  477.005315] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM7 latency 99 (99.0 usec)
>[  477.005344] [drm:intel_modeset_init [i915]] 3 display pipes available.
>[  477.005576] [drm:intel_update_cdclk [i915]] Current CD clock rate: 337500 kHz, VCO: 8100000 kHz, ref: 24000 kHz
>[  477.005938] [drm:intel_dp_init_connector [i915]] Adding eDP connector on port A
>[  477.005971] [drm:intel_dp_init_connector [i915]] using AUX A for port A (VBT)
>[  477.006108] [drm:intel_pps_dump_state [i915]] cur t1_t3 2000 t8 1 t9 1 t10 500 t11_t12 5000
>[  477.006138] [drm:intel_pps_dump_state [i915]] vbt t1_t3 2000 t8 2000 t9 2000 t10 500 t11_t12 5000
>[  477.006161] [drm:intel_dp_init_panel_power_sequencer [i915]] panel power up delay 200, power down delay 50, power cycle delay 500
>[  477.006183] [drm:intel_dp_init_panel_power_sequencer [i915]] backlight on delay 200, off delay 200
>[  477.006250] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x4af05
>[  477.006314] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  477.006348] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  477.512974] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  477.513092] [drm:wait_panel_status [i915]] Wait complete
>[  477.513228] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000008
>[  477.513325] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled
>[  477.722043] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 0a c2 41 00 00 01 c0 02 00 00 00 1f 0b 00
>[  477.722857] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  477.723479] [drm:intel_dp_init_connector [i915]] Detected EDP PSR Panel.
>[  477.724168] [drm:intel_dp_init_connector [i915]] EDP DPCD : 02 b7 f6
>[  477.728037] [drm:drm_dp_i2c_do_msg] native defer
>[  477.729374] [drm:drm_dp_i2c_do_msg] native defer
>[  477.730969] [drm:drm_dp_i2c_do_msg] native defer
>[  477.732836] [drm:drm_dp_i2c_do_msg] native defer
>[  477.734699] [drm:drm_dp_i2c_do_msg] native defer
>[  477.736557] [drm:drm_dp_i2c_do_msg] native defer
>[  477.738421] [drm:drm_dp_i2c_do_msg] native defer
>[  477.740271] [drm:drm_dp_i2c_do_msg] native defer
>[  477.741478] [drm:drm_dp_i2c_do_msg] native defer
>[  477.743035] [drm:drm_dp_i2c_do_msg] native defer
>[  477.744738] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  477.744869] [drm:intel_dp_init_connector [i915]] VBT doesn't support DRRS
>[  477.745099] [drm:intel_panel_setup_backlight [i915]] Connector eDP-1 backlight initialized, disabled, brightness 0/7143
>[  477.745334] [drm:intel_ddi_init [i915]] VBT says port B has lspcon
>[  477.745473] [drm:intel_dp_init_connector [i915]] Adding DP connector on port B
>[  477.745577] [drm:intel_dp_init_connector [i915]] using AUX B for port B (VBT)
>[  477.746288] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  477.746830] [drm:drm_dp_i2c_do_msg] native defer
>[  477.748325] [drm:drm_dp_i2c_do_msg] native defer
>[  477.749727] [drm:drm_dp_i2c_do_msg] native defer
>[  477.751247] [drm:drm_dp_i2c_do_msg] native defer
>[  477.752790] [drm:drm_dp_i2c_do_msg] native defer
>[  477.753769] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[  477.754306] [drm:drm_dp_i2c_do_msg] native defer
>[  477.755685] [drm:drm_dp_i2c_do_msg] native defer
>[  477.757225] [drm:drm_dp_i2c_do_msg] native defer
>[  477.758667] [drm:drm_dp_i2c_do_msg] native defer
>[  477.760216] [drm:drm_dp_i2c_do_msg] native defer
>[  477.761157] [drm:drm_dp_dual_mode_detect] DP dual mode adaptor ID: a8 (err 0)
>[  477.761276] [drm:lspcon_init [i915]] LSPCON detected
>[  477.761820] [drm:drm_dp_i2c_do_msg] native defer
>[  477.763327] [drm:drm_dp_i2c_do_msg] native defer
>[  477.764703] [drm:drm_dp_i2c_do_msg] native defer
>[  477.766258] [drm:drm_dp_i2c_do_msg] native defer
>[  477.767690] [drm:drm_dp_i2c_do_msg] native defer
>[  477.768835] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  477.769559] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  477.770241] [drm:intel_dp_read_desc [i915]] DP branch: OUI 00-60-ad(NS) dev-ID MC2800 HW-rev 2.1 SW-rev 1.29
>[  477.770343] [drm:lspcon_init [i915]] Success: LSPCON init
>[  477.770443] [drm:intel_ddi_init [i915]] LSPCON init success on port B
>[  477.770666] [drm:intel_set_plane_visible [i915]] pipe A active planes 0x0
>[  477.770831] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:32:pipe A] hw state readout: disabled
>[  477.770962] [drm:intel_set_plane_visible [i915]] pipe B active planes 0x0
>[  477.771094] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:39:pipe B] hw state readout: disabled
>[  477.771229] [drm:intel_set_plane_visible [i915]] pipe C active planes 0x0
>[  477.771318] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:46:pipe C] hw state readout: disabled
>[  477.771410] [drm:intel_modeset_setup_hw_state [i915]] DPLL 0 hw state readout: crtc_mask 0x00000000, on 1
>[  477.771498] [drm:intel_modeset_setup_hw_state [i915]] DPLL 1 hw state readout: crtc_mask 0x00000000, on 0
>[  477.771581] [drm:intel_modeset_setup_hw_state [i915]] DPLL 2 hw state readout: crtc_mask 0x00000000, on 0
>[  477.771662] [drm:intel_modeset_setup_hw_state [i915]] DPLL 3 hw state readout: crtc_mask 0x00000000, on 0
>[  477.771792] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:47:DDI A] hw state readout: disabled, pipe A
>[  477.771881] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:55:DDI B] hw state readout: disabled, pipe A
>[  477.771957] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:57:DP-MST A] hw state readout: disabled, pipe A
>[  477.772036] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:58:DP-MST B] hw state readout: disabled, pipe B
>[  477.772111] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:59:DP-MST C] hw state readout: disabled, pipe C
>[  477.772253] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:48:eDP-1] hw state readout: disabled
>[  477.772378] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:56:DP-1] hw state readout: disabled
>[  477.772521] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][setup_hw_state]
>[  477.772605] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0
>[  477.772731] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  477.772817] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  477.772835] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  477.772921] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  477.772940] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  477.773046] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  477.773151] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  477.773256] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: 0
>[  477.773354] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  477.773425] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  477.773515] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  477.773588] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  477.773658] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  477.773774] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  477.773852] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  477.773928] [drm:intel_dump_pipe_config [i915]] [CRTC:39:pipe B][setup_hw_state]
>[  477.774003] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0
>[  477.774075] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  477.774150] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  477.774168] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  477.774262] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  477.774282] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  477.774378] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  477.774468] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  477.774533] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: 0
>[  477.774597] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  477.774660] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  477.774792] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  477.774874] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  477.774951] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 1B] disabled, scaler_id = -1
>[  477.775021] [drm:intel_dump_pipe_config [i915]] [PLANE:35:plane 2B] disabled, scaler_id = -1
>[  477.775091] [drm:intel_dump_pipe_config [i915]] [PLANE:37:cursor B] disabled, scaler_id = -1
>[  477.775177] [drm:intel_dump_pipe_config [i915]] [CRTC:46:pipe C][setup_hw_state]
>[  477.775273] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0
>[  477.775369] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  477.775463] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  477.775483] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  477.775572] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  477.775585] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  477.775651] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  477.775763] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  477.775839] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: 0
>[  477.775906] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  477.775974] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  477.776064] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  477.776148] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  477.776249] [drm:intel_dump_pipe_config [i915]] [PLANE:40:plane 1C] disabled, scaler_id = -1
>[  477.776345] [drm:intel_dump_pipe_config [i915]] [PLANE:42:plane 2C] disabled, scaler_id = -1
>[  477.776443] [drm:intel_dump_pipe_config [i915]] [PLANE:44:cursor C] disabled, scaler_id = -1
>[  477.776556] [drm:intel_modeset_setup_hw_state [i915]] DPLL 0 enabled but not in use, disabling
>[  477.776876] [drm:intel_power_well_disable [i915]] disabling DDI D IO power well
>[  477.777059] [drm:skl_set_power_well [i915]] Disabling DDI D IO power well
>[  477.777144] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well
>[  477.777222] [drm:skl_set_power_well [i915]] Disabling DDI C IO power well
>[  477.777298] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[  477.777373] [drm:skl_set_power_well [i915]] Disabling DDI B IO power well
>[  477.777446] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  477.777518] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  477.777588] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  477.777768] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  477.778010] [drm:i915_gem_init_ggtt [i915]] clearing unused GTT space: [1000, 100000000]
>[  477.778226] [drm:i915_gem_context_init [i915]] logical context support initialized
>[  477.778885] [drm:intel_engine_create_scratch [i915]] rcs0 pipe control offset: 0xfffff000
>[  477.783123] [drm:gen8_init_common_ring [i915]] Execlists enabled for rcs0
>[  477.783250] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 14
>[  477.783448] [drm:gen8_init_common_ring [i915]] Execlists enabled for bcs0
>[  477.783637] [drm:gen8_init_common_ring [i915]] Execlists enabled for vcs0
>[  477.783905] [drm:gen8_init_common_ring [i915]] Execlists enabled for vecs0
>[  477.785112] [drm:intel_fbdev_init [i915]] pipe A not active or no fb, skipping
>[  477.785251] [drm:intel_fbdev_init [i915]] pipe B not active or no fb, skipping
>[  477.785344] [drm:intel_fbdev_init [i915]] pipe C not active or no fb, skipping
>[  477.785431] [drm:intel_fbdev_init [i915]] no active fbs found, not using BIOS config
>[  477.788353] [drm:intel_backlight_device_register [i915]] Connector eDP-1 backlight sysfs interface registered
>[  477.788494] [drm:intel_dp_connector_register [i915]] registering DPDDC-A bus for card0-eDP-1
>[  477.789657] [drm:intel_dp_connector_register [i915]] registering DPDDC-B bus for card0-DP-1
>[  477.790431] [drm] Initialized i915 1.6.0 20170515 for 0000:00:02.0 on minor 0
>[  477.792103] [drm:intel_opregion_register [i915]] 2 outputs detected
>[  477.792342] [Firmware Bug]: ACPI(PEGP) defines _DOD but not _DOS
>[  477.792553] ACPI: Video Device [PEGP] (multi-head: yes  rom: yes  post: no)
>[  477.792983] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:00/LNXVIDEO:00/input/input68
>[  477.807957] ACPI: Video Device [GFX0] (multi-head: yes  rom: no  post: no)
>[  477.810091] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:01/input/input69
>[  477.810653] [drm] DRM_I915_DEBUG enabled
>[  477.810657] [drm] DRM_I915_DEBUG_GEM enabled
>[  477.810666] [drm:drm_setup_crtcs] 
>[  477.810676] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  477.810741] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  477.810818] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  477.810868] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  477.810902] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  477.810933] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  477.814994] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  477.815821] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] status updated from unknown to connected
>[  477.815851] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  477.815859] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] probed modes :
>[  477.815863] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  477.815867] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  477.815908] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  477.815945] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  477.815984] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  477.816389] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  477.816427] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  477.816879] [drm:drm_dp_i2c_do_msg] native defer
>[  477.818126] [drm:drm_dp_i2c_do_msg] native defer
>[  477.819299] [drm:drm_dp_i2c_do_msg] native defer
>[  477.820575] [drm:drm_dp_i2c_do_msg] native defer
>[  477.821801] [drm:drm_dp_i2c_do_msg] native defer
>[  477.822623] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  477.823156] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  477.823499] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  477.823540] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  477.823564] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] status updated from unknown to disconnected
>[  477.823567] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  477.823579] [drm:drm_setup_crtcs] connector 48 enabled? yes
>[  477.823582] [drm:drm_setup_crtcs] connector 56 enabled? no
>[  477.823615] [drm:intel_fb_initial_config [i915]] Not using firmware configuration
>[  477.823648] [drm:drm_setup_crtcs] looking for cmdline mode on connector 48
>[  477.823653] [drm:drm_setup_crtcs] looking for preferred mode on connector 48 0
>[  477.823657] [drm:drm_setup_crtcs] found mode 1920x1080
>[  477.823660] [drm:drm_setup_crtcs] picking CRTCs for 8192x8192 config
>[  477.823687] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 32 (0,0)
>[  477.823726] [drm:intelfb_create [i915]] no BIOS fb, allocating a new one
>[  477.824643] [drm:intelfb_create [i915]] allocated 1920x1080 fb: 0x00040000
>[  477.825050] fbcon: inteldrmfb (fb0) is primary device
>[  477.825447] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  477.825476] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  477.825505] [drm:skl_update_scaler [i915]] scaler_user index 0.31: Staged freeing scaler id 0 scaler_users = 0x0
>[  477.825535] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  477.825561] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  477.825585] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  477.825614] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  477.825669] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  477.825695] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  477.825720] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  477.825743] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  477.825766] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  477.825769] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  477.825791] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  477.825795] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  477.825816] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  477.825837] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  477.825858] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  477.825878] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  477.825898] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  477.825924] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  477.825946] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  477.825966] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  477.825986] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  477.826005] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  477.826030] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  477.826059] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  477.826084] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  477.826350] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  477.826377] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  477.826402] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  477.826426] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  477.826449] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  477.826473] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  477.826505] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  477.826539] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  477.826564] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  477.826628] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  477.826666] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  477.826773] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  477.826810] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  477.826905] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000008
>[  477.826934] [drm:wait_panel_status [i915]] Wait complete
>[  477.826976] [drm:edp_panel_on [i915]] Wait for panel power on
>[  477.827049] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 0000000a control 0000000b
>[  478.028683] [drm:wait_panel_status [i915]] Wait complete
>[  478.028880] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  478.028993] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  478.031393] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  478.031493] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  478.031581] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  478.031667] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  478.032817] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  478.032908] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  478.034332] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  478.034423] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  478.036665] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  478.036879] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  478.036975] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  478.037162] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  478.233055] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  478.233181] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  478.233341] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  478.233452] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  478.237187] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  478.237311] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  478.237483] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  478.237591] [drm:intel_enable_sagv [i915]] Enabling the SAGV
>[  478.238129] Console: switching to colour frame buffer device 240x67
>[  478.265733] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device
>[  478.283038] snd_hda_intel 0000:00:1f.3: bound 0000:00:02.0 (ops i915_audio_component_bind_ops [i915])
>[  478.290244] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  478.290271] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  478.308099] [drm] RC6 on
>[  478.313063] snd_hda_codec_generic hdaudioC0D0: autoconfig for Generic: line_outs=1 (0x17/0x0/0x0/0x0/0x0) type:speaker
>[  478.313070] snd_hda_codec_generic hdaudioC0D0:    speaker_outs=0 (0x0/0x0/0x0/0x0/0x0)
>[  478.313073] snd_hda_codec_generic hdaudioC0D0:    hp_outs=1 (0x16/0x0/0x0/0x0/0x0)
>[  478.313074] snd_hda_codec_generic hdaudioC0D0:    mono: mono_out=0x0
>[  478.313076] snd_hda_codec_generic hdaudioC0D0:    inputs:
>[  478.313078] snd_hda_codec_generic hdaudioC0D0:      Internal Mic=0x1a
>[  478.313080] snd_hda_codec_generic hdaudioC0D0:      Mic=0x19
>[  478.321344] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  478.321374] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  478.321394] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  478.321413] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  478.321432] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  478.321450] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  478.321468] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[  478.321485] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[  478.321502] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[  478.325059] input: HDA Intel PCH Mic as /devices/pci0000:00/0000:00:1f.3/sound/card0/input70
>[  478.325931] input: HDA Intel PCH Headphone as /devices/pci0000:00/0000:00:1f.3/sound/card0/input71
>[  478.326746] input: HDA Intel PCH HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input72
>[  478.327152] input: HDA Intel PCH HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input73
>[  478.327552] input: HDA Intel PCH HDMI/DP,pcm=8 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input74
>[  478.328034] input: HDA Intel PCH HDMI/DP,pcm=9 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input75
>[  478.328570] input: HDA Intel PCH HDMI/DP,pcm=10 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input76
>[  478.334671] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  478.334719] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  478.553871] [IGT] drv_module_reload: exiting, ret=0
>[  478.777116] Console: switching to colour dummy device 80x25
>[  478.777441] [IGT] gvt_basic: executing
>[  478.899430] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  478.899478] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  478.904916] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  478.904984] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  478.905032] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  478.905079] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  478.905126] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  478.905172] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  478.905216] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[  478.905261] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[  478.905305] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[  478.906527] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  478.906956] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  478.940878] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  478.941040] [drm:intel_edp_backlight_off.part.23 [i915]] 
>[  479.144874] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  479.145094] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  479.154893] [drm:intel_edp_panel_off.part.21 [i915]] Turn eDP port A panel power off
>[  479.155023] [drm:intel_edp_panel_off.part.21 [i915]] Wait for panel power off time
>[  479.155146] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000000
>[  479.206232] [drm:wait_panel_status [i915]] Wait complete
>[  479.206335] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  479.206432] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  479.206555] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  479.206998] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 32
>[  479.207194] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[  479.207305] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  479.207426] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  479.207516] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[  479.207877] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  479.207956] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  479.208048] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  479.208137] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  479.208210] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  479.208291] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  479.208367] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  479.208460] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  479.208549] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  479.208643] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  479.208784] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  479.208942] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  479.209040] [drm:intel_power_well_disable [i915]] disabling DC off
>[  479.209128] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[  479.209205] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[  479.209741] [drm:intel_power_well_disable [i915]] disabling always-on
>[  479.223263] [drm:intel_power_well_enable [i915]] enabling always-on
>[  479.223281] [drm:intel_power_well_enable [i915]] enabling DC off
>[  479.223299] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[  479.223321] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  479.223338] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  479.223387] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  479.223405] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  479.223421] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  479.223437] [drm:skl_set_power_well [i915]] Enabling DDI B IO power well
>[  479.223453] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>[  479.223469] [drm:skl_set_power_well [i915]] Enabling DDI C IO power well
>[  479.223485] [drm:intel_power_well_enable [i915]] enabling DDI D IO power well
>[  479.223501] [drm:skl_set_power_well [i915]] Enabling DDI D IO power well
>[  479.367857] [drm:i915_driver_load [i915]] Found SunrisePoint PCH
>[  479.367886] [drm:intel_power_domains_init [i915]] Allowed DC state mask 03
>[  479.368893] [drm:intel_device_info_dump [i915]] i915 device info: platform=SKYLAKE gen=9 pciid=0x191b rev=0x06
>[  479.368933] [drm:intel_device_info_dump [i915]] i915 device info: is_mobile: no
>[  479.368954] [drm:intel_device_info_dump [i915]] i915 device info: is_lp: no
>[  479.368973] [drm:intel_device_info_dump [i915]] i915 device info: is_alpha_support: no
>[  479.369013] [drm:intel_device_info_dump [i915]] i915 device info: has_64bit_reloc: yes
>[  479.369032] [drm:intel_device_info_dump [i915]] i915 device info: has_aliasing_ppgtt: yes
>[  479.369051] [drm:intel_device_info_dump [i915]] i915 device info: has_csr: yes
>[  479.369069] [drm:intel_device_info_dump [i915]] i915 device info: has_ddi: yes
>[  479.369087] [drm:intel_device_info_dump [i915]] i915 device info: has_decoupled_mmio: no
>[  479.369104] [drm:intel_device_info_dump [i915]] i915 device info: has_dp_mst: yes
>[  479.369122] [drm:intel_device_info_dump [i915]] i915 device info: has_fbc: yes
>[  479.369140] [drm:intel_device_info_dump [i915]] i915 device info: has_fpga_dbg: yes
>[  479.369157] [drm:intel_device_info_dump [i915]] i915 device info: has_full_ppgtt: yes
>[  479.369175] [drm:intel_device_info_dump [i915]] i915 device info: has_full_48bit_ppgtt: yes
>[  479.369192] [drm:intel_device_info_dump [i915]] i915 device info: has_gmbus_irq: yes
>[  479.369209] [drm:intel_device_info_dump [i915]] i915 device info: has_gmch_display: no
>[  479.369226] [drm:intel_device_info_dump [i915]] i915 device info: has_guc: yes
>[  479.369243] [drm:intel_device_info_dump [i915]] i915 device info: has_hotplug: yes
>[  479.369260] [drm:intel_device_info_dump [i915]] i915 device info: has_l3_dpf: no
>[  479.369276] [drm:intel_device_info_dump [i915]] i915 device info: has_llc: yes
>[  479.369293] [drm:intel_device_info_dump [i915]] i915 device info: has_logical_ring_contexts: yes
>[  479.369309] [drm:intel_device_info_dump [i915]] i915 device info: has_overlay: no
>[  479.369325] [drm:intel_device_info_dump [i915]] i915 device info: has_pipe_cxsr: no
>[  479.369342] [drm:intel_device_info_dump [i915]] i915 device info: has_pooled_eu: no
>[  479.369359] [drm:intel_device_info_dump [i915]] i915 device info: has_psr: yes
>[  479.369375] [drm:intel_device_info_dump [i915]] i915 device info: has_rc6: yes
>[  479.369392] [drm:intel_device_info_dump [i915]] i915 device info: has_rc6p: no
>[  479.369408] [drm:intel_device_info_dump [i915]] i915 device info: has_resource_streamer: yes
>[  479.369424] [drm:intel_device_info_dump [i915]] i915 device info: has_runtime_pm: yes
>[  479.369441] [drm:intel_device_info_dump [i915]] i915 device info: has_snoop: no
>[  479.369457] [drm:intel_device_info_dump [i915]] i915 device info: unfenced_needs_alignment: no
>[  479.369473] [drm:intel_device_info_dump [i915]] i915 device info: cursor_needs_physical: no
>[  479.369489] [drm:intel_device_info_dump [i915]] i915 device info: hws_needs_physical: no
>[  479.369505] [drm:intel_device_info_dump [i915]] i915 device info: overlay_needs_physical: no
>[  479.369521] [drm:intel_device_info_dump [i915]] i915 device info: supports_tv: no
>[  479.372186] [drm:intel_device_info_runtime_init [i915]] slice mask: 0001
>[  479.372218] [drm:intel_device_info_runtime_init [i915]] slice total: 1
>[  479.372248] [drm:intel_device_info_runtime_init [i915]] subslice total: 3
>[  479.372297] [drm:intel_device_info_runtime_init [i915]] subslice mask 0007
>[  479.372325] [drm:intel_device_info_runtime_init [i915]] subslice per slice: 3
>[  479.372385] [drm:intel_device_info_runtime_init [i915]] EU total: 24
>[  479.372411] [drm:intel_device_info_runtime_init [i915]] EU per subslice: 8
>[  479.372469] [drm:intel_device_info_runtime_init [i915]] has slice power gating: n
>[  479.372493] [drm:intel_device_info_runtime_init [i915]] has subslice power gating: n
>[  479.372518] [drm:intel_device_info_runtime_init [i915]] has EU power gating: y
>[  479.372546] [drm:i915_driver_load [i915]] ppgtt mode: 3
>[  479.372574] [drm:i915_driver_load [i915]] use GPU semaphores? no
>[  479.372725] [drm] Memory usable by graphics device = 4096M
>[  479.372781] [drm:i915_ggtt_probe_hw [i915]] GMADR size = 256M
>[  479.372816] [drm:i915_ggtt_probe_hw [i915]] GTT stolen size = 64M
>[  479.372827] [drm] Replacing VGA console driver
>[  479.373152] [drm:i915_gem_init_stolen [i915]] Memory reserved for graphics device: 65536K, usable: 64512K
>[  479.373341] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x77f6e018
>[  479.373392] [drm:intel_opregion_setup [i915]] Public ACPI methods supported
>[  479.373417] [drm:intel_opregion_setup [i915]] SWSCI supported
>[  479.379787] [drm:intel_opregion_setup [i915]] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00300483
>[  479.379815] [drm:intel_opregion_setup [i915]] ASLE supported
>[  479.379839] [drm:intel_opregion_setup [i915]] ASLE extension supported
>[  479.379862] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (Mailbox #4)
>[  479.380033] [drm:intel_gvt_init [i915]] Not in host or MPT modules not found
>[  479.380040] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
>[  479.380041] [drm] Driver supports precise vblank timestamp query.
>[  479.380068] [drm:intel_bios_init [i915]] Set default to SSC at 120000 kHz
>[  479.380092] [drm:intel_bios_init [i915]] VBT signature "$VBT SKYLAKE        ", BDB version 197
>[  479.380114] [drm:intel_bios_init [i915]] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 0 lvds_use_ssc 0 lvds_ssc_freq 120000 display_clock_mode 0 fdi_rx_polarity_inverted 0
>[  479.380135] [drm:intel_bios_init [i915]] crt_ddc_bus_pin: 2
>[  479.382262] [drm:intel_opregion_get_panel_type [i915]] Ignoring OpRegion panel type (0)
>[  479.382291] [drm:intel_bios_init [i915]] Panel type: 7 (VBT)
>[  479.382316] [drm:intel_bios_init [i915]] DRRS supported mode is static
>[  479.382343] [drm:intel_bios_init [i915]] Found panel mode in BIOS VBT tables:
>[  479.382347] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 0 85500 1366 1436 1580 1792 768 769 773 798 0x8 0xa
>[  479.382369] [drm:intel_bios_init [i915]] VBT initial LVDS value 300
>[  479.382391] [drm:intel_bios_init [i915]] VBT backlight PWM modulation frequency 210 Hz, active high, min brightness 0, level 255, controller 0
>[  479.382411] [drm:intel_bios_init [i915]] Unsupported child device size for SDVO mapping.
>[  479.382434] [drm:intel_bios_init [i915]] DRRS State Enabled:0
>[  479.382453] [drm:intel_bios_init [i915]] VBT has unknown eDP link rate value 2
>[  479.382473] [drm:intel_bios_init [i915]] Port A VBT info: DP:1 HDMI:0 DVI:0 EDP:1 CRT:0
>[  479.382492] [drm:intel_bios_init [i915]] VBT HDMI level shift for port A: 0
>[  479.382511] [drm:intel_bios_init [i915]] Port B VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0
>[  479.382529] [drm:intel_bios_init [i915]] VBT HDMI level shift for port B: 7
>[  479.382875] [drm:intel_dsm_detect [i915]] no _DSM method for intel device
>[  479.382931] [drm:intel_update_rawclk [i915]] rawclk rate: 24000 kHz
>[  479.382956] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  479.383033] [drm:intel_power_well_enable [i915]] enabling power well 1
>[  479.383081] [drm:intel_power_well_enable [i915]] enabling MISC IO power well
>[  479.383108] [drm:skl_init_cdclk [i915]] Sanitizing cdclk programmed by pre-os
>[  479.385661] [drm:intel_update_max_cdclk [i915]] Max CD clock rate: 675000 kHz
>[  479.385730] [drm:intel_update_max_cdclk [i915]] Max dotclock rate: 675000 kHz
>[  479.385769] [drm:intel_update_cdclk [i915]] Current CD clock rate: 337500 kHz, VCO: 8100000 kHz, ref: 24000 kHz
>[  479.385807] [drm:intel_power_well_enable [i915]] enabling always-on
>[  479.385846] [drm:intel_power_well_enable [i915]] enabling DC off
>[  479.385867] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  479.385891] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  479.385926] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  479.385944] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  479.385979] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>[  479.385997] [drm:intel_power_well_enable [i915]] enabling DDI D IO power well
>[  479.386028] [drm:intel_csr_ucode_init [i915]] Loading i915/skl_dmc_ver1_26.bin
>[  479.387368] [drm] Finished loading DMC firmware i915/skl_dmc_ver1_26.bin (v1.26)
>[  479.388000] [drm:intel_fbc_init [i915]] Sanitized enable_fbc value: 1
>[  479.388031] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM0 latency 2 (2.0 usec)
>[  479.388054] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM1 latency 19 (19.0 usec)
>[  479.388075] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM2 latency 28 (28.0 usec)
>[  479.388094] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM3 latency 32 (32.0 usec)
>[  479.388113] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM4 latency 63 (63.0 usec)
>[  479.388132] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM5 latency 77 (77.0 usec)
>[  479.388151] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM6 latency 83 (83.0 usec)
>[  479.388169] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM7 latency 99 (99.0 usec)
>[  479.388199] [drm:intel_modeset_init [i915]] 3 display pipes available.
>[  479.388432] [drm:intel_update_cdclk [i915]] Current CD clock rate: 337500 kHz, VCO: 8100000 kHz, ref: 24000 kHz
>[  479.388793] [drm:intel_dp_init_connector [i915]] Adding eDP connector on port A
>[  479.388827] [drm:intel_dp_init_connector [i915]] using AUX A for port A (VBT)
>[  479.388952] [drm:intel_pps_dump_state [i915]] cur t1_t3 2000 t8 1 t9 1 t10 500 t11_t12 5000
>[  479.388995] [drm:intel_pps_dump_state [i915]] vbt t1_t3 2000 t8 2000 t9 2000 t10 500 t11_t12 5000
>[  479.389029] [drm:intel_dp_init_panel_power_sequencer [i915]] panel power up delay 200, power down delay 50, power cycle delay 500
>[  479.389060] [drm:intel_dp_init_panel_power_sequencer [i915]] backlight on delay 200, off delay 200
>[  479.389136] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x4af05
>[  479.389229] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  479.389279] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  479.897039] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  479.897158] [drm:wait_panel_status [i915]] Wait complete
>[  479.897294] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000008
>[  479.897392] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled
>[  480.106149] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 0a c2 41 00 00 01 c0 02 00 00 00 1f 0b 00
>[  480.106899] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  480.107545] [drm:intel_dp_init_connector [i915]] Detected EDP PSR Panel.
>[  480.108239] [drm:intel_dp_init_connector [i915]] EDP DPCD : 02 b7 f6
>[  480.111629] [drm:drm_dp_i2c_do_msg] native defer
>[  480.112756] [drm:drm_dp_i2c_do_msg] native defer
>[  480.114194] [drm:drm_dp_i2c_do_msg] native defer
>[  480.115247] [drm:drm_dp_i2c_do_msg] native defer
>[  480.116607] [drm:drm_dp_i2c_do_msg] native defer
>[  480.117746] [drm:drm_dp_i2c_do_msg] native defer
>[  480.119188] [drm:drm_dp_i2c_do_msg] native defer
>[  480.120247] [drm:drm_dp_i2c_do_msg] native defer
>[  480.121632] [drm:drm_dp_i2c_do_msg] native defer
>[  480.122761] [drm:drm_dp_i2c_do_msg] native defer
>[  480.124210] [drm:drm_dp_i2c_do_msg] native defer
>[  480.125269] [drm:drm_dp_i2c_do_msg] native defer
>[  480.126648] [drm:drm_dp_i2c_do_msg] native defer
>[  480.127778] [drm:drm_dp_i2c_do_msg] native defer
>[  480.129227] [drm:drm_dp_i2c_do_msg] native defer
>[  480.130285] [drm:drm_dp_i2c_do_msg] native defer
>[  480.131428] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  480.131475] [drm:intel_dp_init_connector [i915]] VBT doesn't support DRRS
>[  480.131579] [drm:intel_panel_setup_backlight [i915]] Connector eDP-1 backlight initialized, disabled, brightness 0/7143
>[  480.131692] [drm:intel_ddi_init [i915]] VBT says port B has lspcon
>[  480.131756] [drm:intel_dp_init_connector [i915]] Adding DP connector on port B
>[  480.131808] [drm:intel_dp_init_connector [i915]] using AUX B for port B (VBT)
>[  480.132202] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  480.132670] [drm:drm_dp_i2c_do_msg] native defer
>[  480.133974] [drm:drm_dp_i2c_do_msg] native defer
>[  480.135288] [drm:drm_dp_i2c_do_msg] native defer
>[  480.136507] [drm:drm_dp_i2c_do_msg] native defer
>[  480.137925] [drm:drm_dp_i2c_do_msg] native defer
>[  480.138795] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[  480.139234] [drm:drm_dp_i2c_do_msg] native defer
>[  480.140452] [drm:drm_dp_i2c_do_msg] native defer
>[  480.141708] [drm:drm_dp_i2c_do_msg] native defer
>[  480.142992] [drm:drm_dp_i2c_do_msg] native defer
>[  480.144306] [drm:drm_dp_i2c_do_msg] native defer
>[  480.145094] [drm:drm_dp_dual_mode_detect] DP dual mode adaptor ID: a8 (err 0)
>[  480.145134] [drm:lspcon_init [i915]] LSPCON detected
>[  480.145572] [drm:drm_dp_i2c_do_msg] native defer
>[  480.146851] [drm:drm_dp_i2c_do_msg] native defer
>[  480.148140] [drm:drm_dp_i2c_do_msg] native defer
>[  480.149308] [drm:drm_dp_i2c_do_msg] native defer
>[  480.150584] [drm:drm_dp_i2c_do_msg] native defer
>[  480.151459] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  480.151960] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  480.152409] [drm:intel_dp_read_desc [i915]] DP branch: OUI 00-60-ad(NS) dev-ID MC2800 HW-rev 2.1 SW-rev 1.29
>[  480.152442] [drm:lspcon_init [i915]] Success: LSPCON init
>[  480.152474] [drm:intel_ddi_init [i915]] LSPCON init success on port B
>[  480.152554] [drm:intel_set_plane_visible [i915]] pipe A active planes 0x0
>[  480.152588] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:32:pipe A] hw state readout: disabled
>[  480.152624] [drm:intel_set_plane_visible [i915]] pipe B active planes 0x0
>[  480.152679] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:39:pipe B] hw state readout: disabled
>[  480.152713] [drm:intel_set_plane_visible [i915]] pipe C active planes 0x0
>[  480.152746] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:46:pipe C] hw state readout: disabled
>[  480.152780] [drm:intel_modeset_setup_hw_state [i915]] DPLL 0 hw state readout: crtc_mask 0x00000000, on 1
>[  480.152810] [drm:intel_modeset_setup_hw_state [i915]] DPLL 1 hw state readout: crtc_mask 0x00000000, on 0
>[  480.152838] [drm:intel_modeset_setup_hw_state [i915]] DPLL 2 hw state readout: crtc_mask 0x00000000, on 0
>[  480.152865] [drm:intel_modeset_setup_hw_state [i915]] DPLL 3 hw state readout: crtc_mask 0x00000000, on 0
>[  480.152893] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:47:DDI A] hw state readout: disabled, pipe A
>[  480.152919] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:55:DDI B] hw state readout: disabled, pipe A
>[  480.152944] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:57:DP-MST A] hw state readout: disabled, pipe A
>[  480.152968] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:58:DP-MST B] hw state readout: disabled, pipe B
>[  480.152992] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:59:DP-MST C] hw state readout: disabled, pipe C
>[  480.153029] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:48:eDP-1] hw state readout: disabled
>[  480.153056] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:56:DP-1] hw state readout: disabled
>[  480.153093] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][setup_hw_state]
>[  480.153121] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0
>[  480.153148] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  480.153174] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  480.153179] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  480.153204] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  480.153208] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  480.153233] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  480.153258] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  480.153282] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: 0
>[  480.153306] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  480.153329] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  480.153360] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  480.153385] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  480.153410] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  480.153434] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  480.153457] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  480.153482] [drm:intel_dump_pipe_config [i915]] [CRTC:39:pipe B][setup_hw_state]
>[  480.153506] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0
>[  480.153529] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  480.153552] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  480.153556] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  480.153578] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  480.153582] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  480.153605] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  480.153628] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  480.153667] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: 0
>[  480.153692] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  480.153716] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  480.153747] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  480.153772] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  480.153797] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 1B] disabled, scaler_id = -1
>[  480.153821] [drm:intel_dump_pipe_config [i915]] [PLANE:35:plane 2B] disabled, scaler_id = -1
>[  480.153846] [drm:intel_dump_pipe_config [i915]] [PLANE:37:cursor B] disabled, scaler_id = -1
>[  480.153870] [drm:intel_dump_pipe_config [i915]] [CRTC:46:pipe C][setup_hw_state]
>[  480.153895] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0
>[  480.153918] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  480.153940] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  480.153945] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  480.153967] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  480.153973] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  480.153995] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  480.154018] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  480.154042] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: 0
>[  480.154064] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  480.154086] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  480.154117] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  480.154141] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  480.154165] [drm:intel_dump_pipe_config [i915]] [PLANE:40:plane 1C] disabled, scaler_id = -1
>[  480.154189] [drm:intel_dump_pipe_config [i915]] [PLANE:42:plane 2C] disabled, scaler_id = -1
>[  480.154212] [drm:intel_dump_pipe_config [i915]] [PLANE:44:cursor C] disabled, scaler_id = -1
>[  480.154242] [drm:intel_modeset_setup_hw_state [i915]] DPLL 0 enabled but not in use, disabling
>[  480.154333] [drm:intel_power_well_disable [i915]] disabling DDI D IO power well
>[  480.154376] [drm:skl_set_power_well [i915]] Disabling DDI D IO power well
>[  480.154406] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well
>[  480.154435] [drm:skl_set_power_well [i915]] Disabling DDI C IO power well
>[  480.154462] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[  480.154488] [drm:skl_set_power_well [i915]] Disabling DDI B IO power well
>[  480.154514] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[  480.154539] [drm:skl_set_power_well [i915]] Disabling DDI A/E IO power well
>[  480.154564] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  480.154610] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  480.154697] [drm:i915_gem_init_ggtt [i915]] clearing unused GTT space: [1000, 100000000]
>[  480.154761] [drm:i915_gem_context_init [i915]] logical context support initialized
>[  480.154969] [drm:intel_engine_create_scratch [i915]] rcs0 pipe control offset: 0xfffff000
>[  480.156847] [drm:gen8_init_common_ring [i915]] Execlists enabled for rcs0
>[  480.156893] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 14
>[  480.156965] [drm:gen8_init_common_ring [i915]] Execlists enabled for bcs0
>[  480.157035] [drm:gen8_init_common_ring [i915]] Execlists enabled for vcs0
>[  480.157104] [drm:gen8_init_common_ring [i915]] Execlists enabled for vecs0
>[  480.157466] [drm:intel_fbdev_init [i915]] pipe A not active or no fb, skipping
>[  480.157502] [drm:intel_fbdev_init [i915]] pipe B not active or no fb, skipping
>[  480.157534] [drm:intel_fbdev_init [i915]] pipe C not active or no fb, skipping
>[  480.157565] [drm:intel_fbdev_init [i915]] no active fbs found, not using BIOS config
>[  480.158740] [drm:intel_backlight_device_register [i915]] Connector eDP-1 backlight sysfs interface registered
>[  480.158809] [drm:intel_dp_connector_register [i915]] registering DPDDC-A bus for card0-eDP-1
>[  480.159360] [drm:intel_dp_connector_register [i915]] registering DPDDC-B bus for card0-DP-1
>[  480.159742] [drm] Initialized i915 1.6.0 20170515 for 0000:00:02.0 on minor 0
>[  480.160546] [drm:intel_opregion_register [i915]] 2 outputs detected
>[  480.160768] [Firmware Bug]: ACPI(PEGP) defines _DOD but not _DOS
>[  480.160922] ACPI: Video Device [PEGP] (multi-head: yes  rom: yes  post: no)
>[  480.161140] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:00/LNXVIDEO:00/input/input77
>[  480.174630] ACPI: Video Device [GFX0] (multi-head: yes  rom: no  post: no)
>[  480.177526] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:01/input/input78
>[  480.178240] [drm] DRM_I915_DEBUG enabled
>[  480.178242] [drm] DRM_I915_DEBUG_GEM enabled
>[  480.178268] [drm:drm_setup_crtcs] 
>[  480.178293] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1]
>[  480.178348] [drm:intel_dp_detect [i915]] [CONNECTOR:48:eDP-1]
>[  480.178448] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[  480.178487] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[  480.178522] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  480.178572] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  480.179749] [drm:intel_dp_read_desc [i915]] DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0
>[  480.180601] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] status updated from unknown to connected
>[  480.180716] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  480.180727] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:48:eDP-1] probed modes :
>[  480.180732] [drm:drm_mode_debug_printmodeline] Modeline 49:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  480.180738] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1]
>[  480.180797] [drm:intel_dp_detect [i915]] [CONNECTOR:56:DP-1]
>[  480.180833] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  480.180868] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  480.181288] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
>[  480.181325] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
>[  480.181764] [drm:drm_dp_i2c_do_msg] native defer
>[  480.183002] [drm:drm_dp_i2c_do_msg] native defer
>[  480.184323] [drm:drm_dp_i2c_do_msg] native defer
>[  480.185545] [drm:drm_dp_i2c_do_msg] native defer
>[  480.186772] [drm:drm_dp_i2c_do_msg] native defer
>[  480.187583] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
>[  480.188069] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
>[  480.188437] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  480.188480] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  480.188505] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] status updated from unknown to disconnected
>[  480.188508] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:56:DP-1] disconnected
>[  480.188520] [drm:drm_setup_crtcs] connector 48 enabled? yes
>[  480.188523] [drm:drm_setup_crtcs] connector 56 enabled? no
>[  480.188555] [drm:intel_fb_initial_config [i915]] Not using firmware configuration
>[  480.188561] [drm:drm_setup_crtcs] looking for cmdline mode on connector 48
>[  480.188563] [drm:drm_setup_crtcs] looking for preferred mode on connector 48 0
>[  480.188565] [drm:drm_setup_crtcs] found mode 1920x1080
>[  480.188567] [drm:drm_setup_crtcs] picking CRTCs for 8192x8192 config
>[  480.188575] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 32 (0,0)
>[  480.188612] [drm:intelfb_create [i915]] no BIOS fb, allocating a new one
>[  480.189583] [drm:intelfb_create [i915]] allocated 1920x1080 fb: 0x00040000
>[  480.190004] fbcon: inteldrmfb (fb0) is primary device
>[  480.190514] [drm:intel_atomic_check [i915]] [CONNECTOR:48:eDP-1] checking for sink bpp constrains
>[  480.190552] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 18
>[  480.190589] [drm:skl_update_scaler [i915]] scaler_user index 0.31: Staged freeing scaler id 0 scaler_users = 0x0
>[  480.190661] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 138700KHz
>[  480.190746] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 18
>[  480.190779] [drm:intel_dp_compute_config [i915]] DP link bw required 312075 available 540000
>[  480.190815] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[  480.190852] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[  480.190885] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 18, dithering: 1
>[  480.190917] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 605989, gmch_n: 1048576, link_m: 67332, link_n: 131072, tu: 64
>[  480.190947] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  480.190976] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  480.190981] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  480.191009] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  480.191013] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[  480.191042] [drm:intel_dump_pipe_config [i915]] crtc timings: 138700 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9
>[  480.191070] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 138700
>[  480.191097] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  480.191124] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  480.191151] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  480.191185] [drm:skl_dump_hw_state [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[  480.191213] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  480.191241] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[  480.191268] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[  480.191294] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] disabled, scaler_id = -1
>[  480.191325] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  480.191362] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated DPLL 0
>[  480.191394] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[  480.191747] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DDI A]
>[  480.191783] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DDI B]
>[  480.191816] [drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DP-MST A]
>[  480.191863] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DP-MST B]
>[  480.191888] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DP-MST C]
>[  480.191911] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  480.191941] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 1
>[  480.191963] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 2
>[  480.191985] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 3
>[  480.192042] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 32
>[  480.192069] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[  480.192143] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  480.192179] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  480.192258] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000008
>[  480.192287] [drm:wait_panel_status [i915]] Wait complete
>[  480.192329] [drm:edp_panel_on [i915]] Wait for panel power on
>[  480.192401] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 0000000b
>[  480.392911] [drm:wait_panel_status [i915]] Wait complete
>[  480.393042] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[  480.393153] [drm:skl_set_power_well [i915]] Enabling DDI A/E IO power well
>[  480.395454] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  480.395550] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  480.395638] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  480.395758] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  480.396874] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  480.396957] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  480.398358] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  480.398445] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  480.400657] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  480.400863] [drm:intel_edp_backlight_on.part.22 [i915]] 
>[  480.400961] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  480.401145] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 7143
>[  480.600989] [drm:intel_psr_enable [i915]] PSR disable by flag
>[  480.601098] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  480.601245] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  480.601347] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  480.617787] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:48:eDP-1]
>[  480.617900] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[  480.618062] [drm:verify_single_dpll_state.isra.76 [i915]] DPLL 0
>[  480.618164] [drm:intel_enable_sagv [i915]] Enabling the SAGV
>[  480.618661] Console: switching to colour frame buffer device 240x67
>[  480.641472] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device
>[  480.650945] snd_hda_intel 0000:00:1f.3: bound 0000:00:02.0 (ops i915_audio_component_bind_ops [i915])
>[  480.654139] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  480.654173] [drm:skl_set_power_well [i915]] Enabling power well 2
>[  480.667604] [IGT] gvt_basic: exiting, ret=77
>[  480.679440] snd_hda_codec_generic hdaudioC0D0: autoconfig for Generic: line_outs=1 (0x17/0x0/0x0/0x0/0x0) type:speaker
>[  480.679448] snd_hda_codec_generic hdaudioC0D0:    speaker_outs=0 (0x0/0x0/0x0/0x0/0x0)
>[  480.679450] snd_hda_codec_generic hdaudioC0D0:    hp_outs=1 (0x16/0x0/0x0/0x0/0x0)
>[  480.679452] snd_hda_codec_generic hdaudioC0D0:    mono: mono_out=0x0
>[  480.679453] snd_hda_codec_generic hdaudioC0D0:    inputs:
>[  480.679456] snd_hda_codec_generic hdaudioC0D0:      Internal Mic=0x1a
>[  480.679457] snd_hda_codec_generic hdaudioC0D0:      Mic=0x19
>[  480.687915] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  480.687946] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  480.687967] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  480.687987] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  480.688005] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  480.688023] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  480.688041] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[  480.688058] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[  480.688075] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[  480.691892] input: HDA Intel PCH Mic as /devices/pci0000:00/0000:00:1f.3/sound/card0/input79
>[  480.693004] input: HDA Intel PCH Headphone as /devices/pci0000:00/0000:00:1f.3/sound/card0/input80
>[  480.693467] input: HDA Intel PCH HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input81
>[  480.693985] input: HDA Intel PCH HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input82
>[  480.694864] input: HDA Intel PCH HDMI/DP,pcm=8 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input83
>[  480.695287] input: HDA Intel PCH HDMI/DP,pcm=9 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input84
>[  480.695767] input: HDA Intel PCH HDMI/DP,pcm=10 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input85
>[  480.702711] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  480.702764] [drm:skl_set_power_well [i915]] Disabling power well 2
>[  481.786596] [drm] RC6 on

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