Attachment 132349 Details for Bug 101649 – kern.log

kern.log

kern.log (text/plain), 527.32 KB, created by Humberto Israel Perez Rodriguez on 2017-06-29 15:45:41 UTC

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Creator: Humberto Israel Perez Rodriguez

Created: 2017-06-29 15:45:41 UTC

Size: 527.32 KB

patch

obsolete

>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Linux version 4.12.0-rc7-drm-tip-ww26-commit-85a692e+ (gfx@bifrost) (gcc version 5.4.0 20160609 (Ubuntu 5.4.0-6ubuntu1~16.04.4) ) #1 SMP PREEMPT Wed Jun 28 09:33:37 CDT 2017
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Command line: BOOT_IMAGE=/boot/vmlinuz-4.12.0-rc7-drm-tip-ww26-commit-85a692e+ root=UUID=2a8388ef-fcb0-4ae0-964a-bd124748729c ro quiet drm.debug=0x1e i915.alpha_support=1 resume=/dev/sda3 fastboot i915.enable_guc_loading=2 i915.enable_guc_submission=2 log_buf_len=1M
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] x86/fpu: Supporting XSAVE feature 0x001: 'x87 floating point registers'
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] x86/fpu: Supporting XSAVE feature 0x002: 'SSE registers'
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] x86/fpu: Supporting XSAVE feature 0x008: 'MPX bounds registers'
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] x86/fpu: Supporting XSAVE feature 0x010: 'MPX CSR'
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] x86/fpu: xstate_offset[3]:  576, xstate_sizes[3]:   64
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] x86/fpu: xstate_offset[4]:  640, xstate_sizes[4]:   64
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] x86/fpu: Enabled xstate features 0x1b, context size is 704 bytes, using 'compacted' format.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] e820: BIOS-provided physical RAM map:
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x0000000000000000-0x0000000000057fff] usable
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x0000000000058000-0x0000000000059fff] reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x000000000005a000-0x000000000009dfff] usable
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x000000000009e000-0x00000000000fffff] reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x0000000000100000-0x000000000fffffff] usable
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x0000000010000000-0x0000000012151fff] reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x0000000012152000-0x0000000076cbcfff] usable
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x0000000076cbd000-0x0000000076efcfff] reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x0000000076efd000-0x0000000076fecfff] type 20
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x0000000076fed000-0x00000000799ecfff] reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x00000000799ed000-0x0000000079a4cfff] ACPI NVS
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x0000000079a4d000-0x0000000079a8cfff] ACPI data
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x0000000079a8d000-0x000000007abfffff] usable
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x000000007ac00000-0x000000007fffffff] reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x00000000a121a000-0x00000000a121afff] reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x00000000e0000000-0x00000000e3ffffff] reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x00000000fed01000-0x00000000fed01fff] reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x0000000100000000-0x000000017fffffff] usable
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] NX (Execute Disable) protection: active
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] efi: EFI v2.60 by EDK II
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] efi:  SMBIOS=0x76ef9000  SMBIOS 3.0=0x76ef7000  ACPI=0x79a8c000  ACPI 2.0=0x79a8c014  ESRT=0x799ac000 
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] SMBIOS 3.1.1 present.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] DMI: Intel Corp. Geminilake/GLK RVP1 DDR4 (05), BIOS GELKRVPA.X64.0050.B51.1706021357 06/02/2017
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] tsc: Using PIT calibration value
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] e820: last_pfn = 0x180000 max_arch_pfn = 0x400000000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] MTRR default type: uncachable
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] MTRR fixed ranges enabled:
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   00000-9FFFF write-back
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   A0000-BFFFF uncachable
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   C0000-FFFFF write-protect
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] MTRR variable ranges enabled:
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   0 base 00FF800000 mask 7FFF800000 write-combining
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   1 base 0000000000 mask 7F80000000 write-back
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   2 base 007B000000 mask 7FFF000000 uncachable
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   3 base 007C000000 mask 7FFC000000 uncachable
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   4 base 0100000000 mask 7F80000000 write-back
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   5 disabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   6 disabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   7 disabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   8 disabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   9 disabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] x86/PAT: Configuration [0-7]: WB  WC  UC- UC  WB  WC  UC- WT  
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] e820: last_pfn = 0x7ac00 max_arch_pfn = 0x400000000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] esrt: ESRT header is not in the memory map.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Base memory trampoline at [ffff880000098000] 98000 size 24576
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Using GB pages for direct mapping
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BRK [0x056c2000, 0x056c2fff] PGTABLE
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BRK [0x056c3000, 0x056c3fff] PGTABLE
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BRK [0x056c4000, 0x056c4fff] PGTABLE
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BRK [0x056c5000, 0x056c5fff] PGTABLE
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BRK [0x056c6000, 0x056c6fff] PGTABLE
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BRK [0x056c7000, 0x056c7fff] PGTABLE
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] log_buf_len: 1048576 bytes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] early log buf free: 257608(98%)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Secure boot could not be determined
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] RAMDISK: [mem 0x36960000-0x374a7fff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: Early table checksum verification disabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: RSDP 0x0000000079A8C014 000024 (v02 INTEL )
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: XSDT 0x0000000079A5A188 0000FC (v01 INTEL  EDK2     00000003 BRXT 01000013)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: FACP 0x0000000079A84000 00010C (v05 INTEL  EDK2     00000003 BRXT 0100000D)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: DSDT 0x0000000079A6B000 011491 (v02 INTEL  EDK2     00000003 BRXT 0100000D)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: FACS 0x0000000079A3A000 000040
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: UEFI 0x0000000079A43000 000042 (v01 INTEL  EDK2     00000002 BRXT 01000013)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749891.6681] NetworkManager (version 1.2.4) is starting...
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749891.6689] Read config: /etc/NetworkManager/NetworkManager.conf (etc: default-wifi-powersave-on.conf)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749891.6883] manager[0x556d83efc1a0]: monitoring kernel firmware directory '/lib/firmware'.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749891.6885] monitoring ifupdown state file '/run/network/ifstate'.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749891.6998] dns-mgr[0x556d83ef4940]: init: dns=dnsmasq, rc-manager=resolvconf, plugin=dnsmasq
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: SSDT 0x0000000079A8A000 0003E9 (v02 INTEL  Tpm2Tabl 00001000 INTL 20160527)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: TPM2 0x0000000079A89000 000034 (v04                 00000000      00000000)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: BDAT 0x0000000079A88000 000030 (v02                 00000000      00000000)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: HPET 0x0000000079A83000 000038 (v01 INTEL  EDK2     00000003 BRXT 0100000D)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: LPIT 0x0000000079A82000 00005C (v01 INTEL  EDK2     00000003 BRXT 0100000D)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: APIC 0x0000000079A81000 000084 (v03 INTEL  EDK2     00000003 BRXT 0100000D)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: MCFG 0x0000000079A80000 00003C (v01 INTEL  EDK2     00000003 BRXT 0100000D)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: NPKT 0x0000000079A7F000 000065 (v01 INTEL  EDK2     00000003 BRXT 0100000D)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: PRAM 0x0000000079A7E000 000030 (v01 INTEL  EDK2     00000003 BRXT 0100000D)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: WSMT 0x0000000079A7D000 000028 (v01 INTEL  EDK2     00000003 BRXT 0100000D)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: SSDT 0x0000000079A67000 003EA7 (v02 INTEL  DptfTab  00000003 BRXT 0100000D)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: SSDT 0x0000000079A61000 0059F0 (v02 INTEL  RVPRtd3  00000003 BRXT 0100000D)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: SSDT 0x0000000079A5F000 0010B3 (v02 INTEL  UsbCTabl 00000003 BRXT 0100000D)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: SSDT 0x0000000079A5D000 001524 (v01 Intel_ Platform 00001000 INTL 20160527)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: SSDT 0x0000000079A5C000 0000B1 (v01 Intel_ ADebTabl 00001000 INTL 20160527)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: SSDT 0x0000000079A5B000 0003F7 (v02 PmRef  Cpu0Ist  00003000 INTL 20160527)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: SSDT 0x0000000079A8B000 000775 (v02 CpuRef CpuSsdt  00003000 INTL 20160527)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: SSDT 0x0000000079A59000 000388 (v02 PmRef  Cpu0Tst  00003000 INTL 20160527)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: SSDT 0x0000000079A58000 0001E6 (v02 PmRef  ApTst    00003000 INTL 20160527)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: SSDT 0x0000000079A55000 002939 (v02 SaSsdt SaSsdt   00003000 INTL 20160527)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: FPDT 0x0000000079A54000 000044 (v01 INTEL  EDK2     00000002 BRXT 01000013)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: DBGP 0x0000000079A86000 000034 (v01 INTEL  EDK2     00000003 BRXT 0100000D)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: DBG2 0x0000000079A87000 000072 (v00 INTEL  EDK2     00000003 BRXT 0100000D)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: WDAT 0x0000000079A85000 000104 (v01                 00000000      00000000)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: NHLT 0x0000000079A52000 001A50 (v00 INTEL  EDK2     00000002 BRXT 01000013)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: Local APIC address 0xfee00000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Zone ranges:
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   DMA      [mem 0x0000000000001000-0x0000000000ffffff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   DMA32    [mem 0x0000000001000000-0x00000000ffffffff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   Normal   [mem 0x0000000100000000-0x000000017fffffff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Movable zone start for each node
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Early memory node ranges
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   node   0: [mem 0x0000000000001000-0x0000000000057fff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   node   0: [mem 0x000000000005a000-0x000000000009dfff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   node   0: [mem 0x0000000000100000-0x000000000fffffff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   node   0: [mem 0x0000000012152000-0x0000000076cbcfff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   node   0: [mem 0x0000000079a8d000-0x000000007abfffff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   node   0: [mem 0x0000000100000000-0x000000017fffffff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Initmem setup node 0 [mem 0x0000000000001000-0x000000017fffffff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] On node 0 totalpages: 1006713
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   DMA zone: 64 pages used for memmap
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   DMA zone: 23 pages reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   DMA zone: 3995 pages, LIFO batch:0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   DMA32 zone: 7476 pages used for memmap
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   DMA32 zone: 478430 pages, LIFO batch:31
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   Normal zone: 8192 pages used for memmap
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   Normal zone: 524288 pages, LIFO batch:31
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Reserving Intel graphics memory at 0x000000007c000000-0x000000007fffffff
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: PM-Timer IO Port: 0x408
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: Local APIC address 0xfee00000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: LAPIC_NMI (acpi_id[0x01] high level lint[0x1])
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: LAPIC_NMI (acpi_id[0x02] high level lint[0x1])
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: LAPIC_NMI (acpi_id[0x03] high level lint[0x1])
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: LAPIC_NMI (acpi_id[0x04] high level lint[0x1])
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] IOAPIC[0]: apic_id 1, version 32, address 0xfec00000, GSI 0-119
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.4640] init!
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.4651] guessed connection type (enp1s0) = 802-3-ethernet
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: IRQ0 used by override.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: IRQ9 used by override.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Using ACPI (MADT) for SMP configuration information
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: HPET id: 0x8086a701 base: 0xfed00000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] smpboot: Allowing 4 CPUs, 0 hotplug CPUs
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0x00000000-0x00000fff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.4653] update_connection_setting_from_if_block: name:enp1s0, type:802-3-ethernet, id:Ifupdown (enp1s0), uuid: d4f520cc-fe82-d7ba-f35b-8e9bb7ffe98b
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.4703] addresses count: 1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.4704] adding enp1s0 to connections
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.4705] adding iface enp1s0 to eni_ifaces
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.4705] autoconnect
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.4706] management mode: unmanaged
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.4724] devices added (path: /sys/devices/pci0000:00/0000:00:13.0/0000:01:00.0/net/enp1s0, iface: enp1s0)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.4727] locking wired connection setting
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.4728] devices added (path: /sys/devices/virtual/net/lo, iface: lo)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.4728] device added (path: /sys/devices/virtual/net/lo, iface: lo): no ifupdown configuration found.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.4729] end _init.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.4729] settings: loaded plugin ifupdown: (C) 2008 Canonical Ltd.  To report bugs please use the NetworkManager mailing list. (/usr/lib/x86_64-linux-gnu/NetworkManager/libnm-settings-plugin-ifupdown.so)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.4731] settings: loaded plugin keyfile: (c) 2007 - 2015 Red Hat, Inc.  To report bugs please use the NetworkManager mailing list.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.4735] SettingsPlugin-Ofono: init!
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <warn>  [1498749892.4737] SettingsPlugin-Ofono: file doesn't exist: /var/lib/ofono
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.4737] SettingsPlugin-Ofono: end _init.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.4738] settings: loaded plugin ofono: (C) 2013-2016 Canonical Ltd.  To report bugs please use the NetworkManager mailing list. (/usr/lib/x86_64-linux-gnu/NetworkManager/libnm-settings-plugin-ofono.so)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.4738] (-2081348320) ... get_connections.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.4739] (-2081348320) ... get_connections (managed=false): return empty list.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.4791] SettingsPlugin-Ofono: (-2081348000) ... get_connections.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.4791] SettingsPlugin-Ofono: (-2081348000) connections count: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.4792] get unmanaged devices count: 1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6004] settings: hostname: using hostnamed
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6005] settings: hostname changed from (none) to "GLK-2-GLKRVP1DDR405"
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6009] Using DHCP client 'dhclient'
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6010] manager: WiFi enabled by radio killswitch; enabled by state file
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6011] manager: WWAN enabled by radio killswitch; enabled by state file
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6012] manager: Networking is enabled by state file
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6013] Loaded device plugin: NMVxlanFactory (internal)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6013] Loaded device plugin: NMVlanFactory (internal)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6014] Loaded device plugin: NMVethFactory (internal)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6015] Loaded device plugin: NMTunFactory (internal)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6016] Loaded device plugin: NMMacvlanFactory (internal)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6017] Loaded device plugin: NMIPTunnelFactory (internal)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6017] Loaded device plugin: NMInfinibandFactory (internal)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6018] Loaded device plugin: NMEthernetFactory (internal)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6019] Loaded device plugin: NMBridgeFactory (internal)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6019] Loaded device plugin: NMBondFactory (internal)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6043] Loaded device plugin: NMWwanFactory (/usr/lib/x86_64-linux-gnu/NetworkManager/libnm-device-plugin-wwan.so)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6117] Loaded device plugin: NMAtmManager (/usr/lib/x86_64-linux-gnu/NetworkManager/libnm-device-plugin-adsl.so)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6126] Loaded device plugin: NMWifiFactory (/usr/lib/x86_64-linux-gnu/NetworkManager/libnm-device-plugin-wifi.so)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6202] Loaded device plugin: NMBluezManager (/usr/lib/x86_64-linux-gnu/NetworkManager/libnm-device-plugin-bluetooth.so)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: nm_device_get_device_type: assertion 'NM_IS_DEVICE (self)' failed
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6228] device (lo): link connected
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6241] manager: (lo): new Generic device (/org/freedesktop/NetworkManager/Devices/0)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6273] manager: (enp1s0): new Ethernet device (/org/freedesktop/NetworkManager/Devices/1)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6290] manager: startup complete
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6292] manager: NetworkManager state is now CONNECTED_GLOBAL
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6358] urfkill disappeared from the bus
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6408] ofono is now available
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <warn>  [1498749892.6424] failed to enumerate oFono devices: GDBus.Error:org.freedesktop.DBus.Error.ServiceUnknown: The name org.ofono was not provided by any .service files
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749892.6438] ModemManager available in the bus
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 NetworkManager[738]: <info>  [1498749894.8482] device (enp1s0): link connected
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 content-hub-pee[1121]: Error parsing manifest for package 'com.ubuntu.gallery': com.ubuntu.gallery does not exist in any database for user gfx
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 content-hub-pee[1121]: Unable to get snap information for 'com.ubuntu.gallery': Status code is: 404
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 content-hub-pee[1121]: Error parsing manifest for package 'com.ubuntu.gallery': com.ubuntu.gallery does not exist in any database for user gfx
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 content-hub-pee[1121]: Unable to get snap information for 'com.ubuntu.gallery': Status code is: 404
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 click[1098]: hooks.vala:1216: User-level hook push-helper failed: Hook command '/usr/lib/ubuntu-push-client/click-hook-wrapper' failed: Child process exited with code 1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0x00058000-0x00059fff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0x0009e000-0x000fffff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0x10000000-0x12151fff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0x76cbd000-0x76efcfff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0x76efd000-0x76fecfff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0x76fed000-0x799ecfff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0x799ed000-0x79a4cfff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0x79a4d000-0x79a8cfff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0x7ac00000-0x7fffffff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0x80000000-0xa1219fff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0xa121a000-0xa121afff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0xa121b000-0xdfffffff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0xe0000000-0xe3ffffff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0xe4000000-0xfed00fff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0xfed01000-0xfed01fff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0xfed02000-0xffffffff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] e820: [mem 0xa121b000-0xdfffffff] available for PCI devices
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] clocksource: refined-jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1910969940391419 ns
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] setup_percpu: NR_CPUS:16 nr_cpumask_bits:16 nr_cpu_ids:4 nr_node_ids:1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] percpu: Embedded 37 pages/cpu @ffff88017fc00000 s114376 r8192 d28984 u524288
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] pcpu-alloc: s114376 r8192 d28984 u524288 alloc=1*2097152
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] pcpu-alloc: [0] 0 1 2 3 
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 990958
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Kernel command line: BOOT_IMAGE=/boot/vmlinuz-4.12.0-rc7-drm-tip-ww26-commit-85a692e+ root=UUID=2a8388ef-fcb0-4ae0-964a-bd124748729c ro quiet drm.debug=0x1e i915.alpha_support=1 resume=/dev/sda3 fastboot i915.enable_guc_loading=2 i915.enable_guc_submission=2 log_buf_len=1M
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Memory: 3793728K/4026852K available (8673K kernel code, 1378K rwdata, 3444K rodata, 1200K init, 22640K bss, 233124K reserved, 0K cma-reserved)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Running RCU self tests
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Preemptible hierarchical RCU implementation.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] 	RCU lockdep checking is enabled.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] 	RCU restricting CPUs from NR_CPUS=16 to nr_cpu_ids=4.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] kmemleak: Kernel memory leak detector disabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] NR_IRQS:4352 nr_irqs:1024 16
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Console: colour dummy device 80x25
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] console [tty0] enabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ... MAX_LOCKDEP_SUBCLASSES:  8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ... MAX_LOCK_DEPTH:          48
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ... MAX_LOCKDEP_KEYS:        8191
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ... CLASSHASH_SIZE:          4096
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ... MAX_LOCKDEP_ENTRIES:     32768
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ... MAX_LOCKDEP_CHAINS:      65536
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ... CHAINHASH_SIZE:          32768
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]  memory used by lock dependency info: 8159 kB
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]  per task-struct memory footprint: 1920 bytes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] kmemleak: Early log buffer exceeded (2878), please increase DEBUG_KMEMLEAK_EARLY_LOG_SIZE
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] clocksource: hpet: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 99544814920 ns
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] hpet clockevent registered
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.002000] tsc: PIT calibration matches HPET. 1 loops
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.002000] tsc: Detected 1094.586 MHz processor
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.002000] Calibrating delay loop (skipped), value calculated using timer frequency.. 2188.80 BogoMIPS (lpj=1094400)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.002000] pid_max: default: 32768 minimum: 301
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.002000] ACPI: Core revision 20170303
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.256034] random: fast init done
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.416704] ACPI Error: Invalid type (RegionField) for target of Scope operator [SSP2] (Cannot override) (20170303/dswload-273)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.416790] ACPI Exception: AE_AML_OPERAND_TYPE, During name lookup/catalog (20170303/psobject-241)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.418307] ACPI Exception: AE_AML_OPERAND_TYPE, (SSDT: RVPRtd3) while loading table (20170303/tbxfload-228)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.493536] ACPI Error: 1 table load failures, 11 successful (20170303/tbxfload-246)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.494796] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.494804] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.496843] CPU: Physical Processor ID: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.496848] CPU: Processor Core ID: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.496871] mce: CPU supports 7 MCE banks
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.496965] CPU0: Thermal monitoring enabled (TM1)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.497086] process: using mwait in idle threads
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.497093] Last level iTLB entries: 4KB 0, 2MB 0, 4MB 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.497097] Last level dTLB entries: 4KB 0, 2MB 0, 4MB 0, 1GB 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.497718] Freeing SMP alternatives memory: 32K
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.511889] smpboot: Max logical packages: 1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.513420] x2apic: IRQ remapping doesn't support X2APIC mode
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.519000] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.528311] TSC deadline timer enabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.528332] smpboot: CPU0: Genuine Intel(R) CPU @ 1.10GHz (family: 0x6, model: 0x7a, stepping: 0x0)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.530254] mce: [Hardware Error]: Machine check events logged
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.530269] mce: [Hardware Error]: CPU 0: Machine Check: 0 Bank 4: a600000000020408
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.530321] mce: [Hardware Error]: TSC 0 ADDR fef4c9a0 
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.530366] mce: [Hardware Error]: PROCESSOR 0:706a0 TIME 1498749876 SOCKET 0 APIC 0 microcode 1c
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.532101] Performance Events: PEBS fmt3+, generic architected perfmon, full-width counters, Intel PMU driver.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.532137] ... version:                4
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.532141] ... bit width:              48
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.532145] ... generic registers:      4
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.532150] ... value mask:             0000ffffffffffff
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.532154] ... max period:             00007fffffffffff
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.532158] ... fixed-purpose events:   3
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.532162] ... event mask:             000000070000000f
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.540813] NMI watchdog: enabled on all CPUs, permanently consumes one hw-PMU counter.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.542025] smp: Bringing up secondary CPUs ...
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.550224] x86: Booting SMP configuration:
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.550239] .... node  #0, CPUs:      #1 #2 #3
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.749280] smp: Brought up 1 node, 4 CPUs
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.749280] smpboot: Total of 4 processors activated (8844.85 BogoMIPS)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.750807] sched_clock: Marking stable (750000000, 0)->(761164039, -11164039)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.752526] devtmpfs: initialized
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.755464] PM: Registering ACPI NVS region [mem 0x799ed000-0x79a4cfff] (393216 bytes)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.757195] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275000 ns
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.757211] futex hash table entries: 1024 (order: 5, 131072 bytes)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.757727] xor: measuring software checksum speed
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.767189]    prefetch64-sse:  5676.000 MB/sec
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.777300]    generic_sse:  4856.000 MB/sec
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.777306] xor: using function: prefetch64-sse (5676.000 MB/sec)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.777336] pinctrl core: initialized pinctrl subsystem
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.783819] NET: Registered protocol family 16
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.787165] cpuidle: using governor menu
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.787179] PCCT header not found.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.787675] ACPI: bus type PCI registered
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.788402] PCI: MMCONFIG for domain 0000 [bus 00-3f] at [mem 0xe0000000-0xe3ffffff] (base 0xe0000000)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.788526] PCI: MMCONFIG at [mem 0xe0000000-0xe3ffffff] reserved in E820
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.788569] PCI: Using configuration type 1 for base access
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.818853] HugeTLB registered 2 MB page size, pre-allocated 0 pages
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.838240] raid6: sse2x1   gen()  2527 MB/s
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.855413] raid6: sse2x1   xor()  1697 MB/s
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.872658] raid6: sse2x2   gen()  3015 MB/s
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.889869] raid6: sse2x2   xor()  1998 MB/s
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.907058] raid6: sse2x4   gen()  3480 MB/s
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.924229] raid6: sse2x4   xor()  1833 MB/s
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.924235] raid6: using algorithm sse2x4 gen() 3480 MB/s
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.924239] raid6: .... xor() 1833 MB/s, rmw enabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.924245] raid6: using ssse3x2 recovery algorithm
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.924710] ACPI: Added _OSI(Module Device)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.924717] ACPI: Added _OSI(Processor Device)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.924723] ACPI: Added _OSI(3.0 _SCP Extensions)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.924728] ACPI: Added _OSI(Processor Aggregator Device)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    0.935181] ACPI: Executed 15 blocks of module-level executable AML code
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    1.213385] ACPI: Dynamic OEM Table Load:
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    1.213457] ACPI: SSDT 0xFFFF88017A530358 0001A5 (v02 PmRef  Cpu0Cst  00003001 INTL 20160527)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    1.215340] ACPI: Executed 1 blocks of module-level executable AML code
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    1.224435] ACPI: Dynamic OEM Table Load:
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    1.224500] ACPI: SSDT 0xFFFF88017A533858 0001E6 (v02 PmRef  ApIst    00003000 INTL 20160527)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    1.227948] ACPI: Executed 1 blocks of module-level executable AML code
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    1.229935] ACPI: Dynamic OEM Table Load:
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    1.229998] ACPI: SSDT 0xFFFF88017A43C6F8 0000C9 (v02 PmRef  ApCst    00003000 INTL 20160527)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    1.231503] ACPI: Executed 1 blocks of module-level executable AML code
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    1.280473] ACPI : EC: EC started
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    1.280485] ACPI : EC: interrupt blocked
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    1.451175] ACPI: \_SB_.PCI0.LPCB.H_EC: Used as first EC
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    1.451196] ACPI: \_SB_.PCI0.LPCB.H_EC: GPE=0x25, EC_CMD/EC_SC=0x66, EC_DATA=0x62
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    1.451216] ACPI: \_SB_.PCI0.LPCB.H_EC: Used as boot DSDT EC to handle transactions
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    1.451226] ACPI: Interpreter enabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    1.451532] ACPI: (supports S0 S3 S4 S5)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    1.451538] ACPI: Using IOAPIC for interrupt routing
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    1.452071] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    1.551157] ACPI: Power Resource [PXP] (on)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.307257] ACPI: Power Resource [FN00] (on)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.352505] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff])
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.352547] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.375153] acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug PME AER PCIeCapability]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.375204] acpi PNP0A08:00: [Firmware Info]: MMCONFIG for domain 0000 [bus 00-3f] only partially covers this bridge
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.377568] PCI host bridge to bus 0000:00
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.377584] pci_bus 0000:00: root bus resource [io  0x0070-0x0077]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.377598] pci_bus 0000:00: root bus resource [io  0x0000-0x006f window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.377610] pci_bus 0000:00: root bus resource [io  0x0078-0x0cf7 window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.377622] pci_bus 0000:00: root bus resource [io  0x0d00-0xffff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.377634] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.377645] pci_bus 0000:00: root bus resource [mem 0x000c0000-0x000dffff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.377656] pci_bus 0000:00: root bus resource [mem 0x000e0000-0x000fffff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.377668] pci_bus 0000:00: root bus resource [mem 0x7c000001-0x7fffffff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.377679] pci_bus 0000:00: root bus resource [mem 0x80000000-0xbfffffff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.377690] pci_bus 0000:00: root bus resource [mem 0xe0000000-0xefffffff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.377701] pci_bus 0000:00: root bus resource [mem 0xfea00000-0xfeafffff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.377712] pci_bus 0000:00: root bus resource [mem 0xfed00000-0xfed003ff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.377723] pci_bus 0000:00: root bus resource [mem 0xfed01000-0xfed01fff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.377734] pci_bus 0000:00: root bus resource [mem 0xfed03000-0xfed03fff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.377745] pci_bus 0000:00: root bus resource [mem 0xfed06000-0xfed06fff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.377768] pci_bus 0000:00: root bus resource [mem 0xfed08000-0xfed09fff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.377780] pci_bus 0000:00: root bus resource [mem 0xfed80000-0xfedbffff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.377792] pci_bus 0000:00: root bus resource [mem 0xfed1c000-0xfed1cfff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.377804] pci_bus 0000:00: root bus resource [mem 0xfee00000-0xfeefffff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.377817] pci_bus 0000:00: root bus resource [bus 00-ff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.377912] pci 0000:00:00.0: [8086:31f0] type 00 class 0x060000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.383603] pci 0000:00:00.1: [8086:318c] type 00 class 0x118000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.383686] pci 0000:00:00.1: reg 0x10: [mem 0x80000000-0x80007fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.389118] pci 0000:00:00.3: [8086:3190] type 00 class 0x088000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.389175] pci 0000:00:00.3: reg 0x10: [mem 0xa1218000-0xa1218fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.394432] pci 0000:00:02.0: [8086:3184] type 00 class 0x030000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.394475] pci 0000:00:02.0: reg 0x10: [mem 0xa0000000-0xa0ffffff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.394502] pci 0000:00:02.0: reg 0x18: [mem 0x90000000-0x9fffffff 64bit pref]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.394521] pci 0000:00:02.0: reg 0x20: [io  0x2000-0x203f]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.400624] pci 0000:00:0e.0: [8086:3198] type 00 class 0x040100
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.400688] pci 0000:00:0e.0: reg 0x10: [mem 0xa1210000-0xa1213fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.400775] pci 0000:00:0e.0: reg 0x20: [mem 0xa1000000-0xa10fffff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.401055] pci 0000:00:0e.0: PME# supported from D0 D3hot D3cold
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.410921] pci 0000:00:0e.0: System wakeup disabled by ACPI
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.411488] pci 0000:00:0f.0: [8086:319a] type 00 class 0x078000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.411568] pci 0000:00:0f.0: reg 0x10: [mem 0xa1219000-0xa1219fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.411906] pci 0000:00:0f.0: PME# supported from D3hot
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.417012] pci 0000:00:11.0: [8086:31a2] type 00 class 0x005007
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.417092] pci 0000:00:11.0: reg 0x10: [mem 0xa1214000-0xa1215fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.417144] pci 0000:00:11.0: reg 0x18: [mem 0xa121c000-0xa121cfff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.423089] pci 0000:00:12.0: [8086:31e3] type 00 class 0x010601
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.423141] pci 0000:00:12.0: reg 0x10: [mem 0xa1216000-0xa1217fff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.423168] pci 0000:00:12.0: reg 0x14: [mem 0xa1241000-0xa12410ff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.423195] pci 0000:00:12.0: reg 0x18: [io  0x2080-0x2087]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.423222] pci 0000:00:12.0: reg 0x1c: [io  0x2088-0x208b]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.423249] pci 0000:00:12.0: reg 0x20: [io  0x2060-0x207f]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.423276] pci 0000:00:12.0: reg 0x24: [mem 0xa123f000-0xa123f7ff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.423504] pci 0000:00:12.0: PME# supported from D3hot
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.428764] pci 0000:00:13.0: [8086:31da] type 01 class 0x060400
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.429071] pci 0000:00:13.0: PME# supported from D0 D3hot D3cold
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.433969] pci 0000:00:13.0: System wakeup disabled by ACPI
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.434555] pci 0000:00:15.0: [8086:31a8] type 00 class 0x0c0330
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.434622] pci 0000:00:15.0: reg 0x10: [mem 0xa1200000-0xa120ffff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.434938] pci 0000:00:15.0: PME# supported from D3hot D3cold
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.440029] pci 0000:00:15.0: System wakeup disabled by ACPI
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.440595] pci 0000:00:16.0: [8086:31ac] type 00 class 0x118000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.440683] pci 0000:00:16.0: reg 0x10: [mem 0xa121d000-0xa121dfff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.440727] pci 0000:00:16.0: reg 0x18: [mem 0xa121e000-0xa121efff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.446150] pci 0000:00:16.1: [8086:31ae] type 00 class 0x118000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.446217] pci 0000:00:16.1: reg 0x10: [mem 0xa121f000-0xa121ffff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.446261] pci 0000:00:16.1: reg 0x18: [mem 0xa1220000-0xa1220fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.451676] pci 0000:00:16.2: [8086:31b0] type 00 class 0x118000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.451743] pci 0000:00:16.2: reg 0x10: [mem 0xa1221000-0xa1221fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.451786] pci 0000:00:16.2: reg 0x18: [mem 0xa1222000-0xa1222fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.457318] pci 0000:00:16.3: [8086:31b2] type 00 class 0x118000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.457385] pci 0000:00:16.3: reg 0x10: [mem 0xa1223000-0xa1223fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.457428] pci 0000:00:16.3: reg 0x18: [mem 0xa1224000-0xa1224fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.462928] pci 0000:00:17.0: [8086:31b4] type 00 class 0x118000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.462995] pci 0000:00:17.0: reg 0x10: [mem 0xa1225000-0xa1225fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.463077] pci 0000:00:17.0: reg 0x18: [mem 0xa1226000-0xa1226fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.468523] pci 0000:00:17.1: [8086:31b6] type 00 class 0x118000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.468590] pci 0000:00:17.1: reg 0x10: [mem 0xa1227000-0xa1227fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.468633] pci 0000:00:17.1: reg 0x18: [mem 0xa1228000-0xa1228fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.474116] pci 0000:00:17.2: [8086:31b8] type 00 class 0x118000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.474183] pci 0000:00:17.2: reg 0x10: [mem 0xa1229000-0xa1229fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.474227] pci 0000:00:17.2: reg 0x18: [mem 0xa122a000-0xa122afff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.479734] pci 0000:00:17.3: [8086:31ba] type 00 class 0x118000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.479801] pci 0000:00:17.3: reg 0x10: [mem 0xa122b000-0xa122bfff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.479844] pci 0000:00:17.3: reg 0x18: [mem 0xa122c000-0xa122cfff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.485300] pci 0000:00:18.0: [8086:31bc] type 00 class 0x118000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.485366] pci 0000:00:18.0: reg 0x10: [mem 0xa122d000-0xa122dfff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.485416] pci 0000:00:18.0: reg 0x18: [mem 0xa122e000-0xa122efff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.490884] pci 0000:00:18.1: [8086:31be] type 00 class 0x118000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.490951] pci 0000:00:18.1: reg 0x10: [mem 0xa122f000-0xa122ffff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.490994] pci 0000:00:18.1: reg 0x18: [mem 0xa1230000-0xa1230fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.496447] pci 0000:00:18.3: [8086:31ee] type 00 class 0x118000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.496515] pci 0000:00:18.3: reg 0x10: [mem 0xa1231000-0xa1231fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.496558] pci 0000:00:18.3: reg 0x18: [mem 0xa1232000-0xa1232fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.502020] pci 0000:00:19.0: [8086:31c2] type 00 class 0x118000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.502102] pci 0000:00:19.0: reg 0x10: [mem 0xa1233000-0xa1233fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.502146] pci 0000:00:19.0: reg 0x18: [mem 0xa1234000-0xa1234fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.507577] pci 0000:00:19.1: [8086:31c4] type 00 class 0x118000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.507643] pci 0000:00:19.1: reg 0x10: [mem 0xa1235000-0xa1235fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.507686] pci 0000:00:19.1: reg 0x18: [mem 0xa1236000-0xa1236fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.513148] pci 0000:00:19.2: [8086:31c6] type 00 class 0x118000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.513216] pci 0000:00:19.2: reg 0x10: [mem 0xa1237000-0xa1237fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.513259] pci 0000:00:19.2: reg 0x18: [mem 0xa1238000-0xa1238fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.518770] pci 0000:00:1b.0: [8086:31ca] type 00 class 0x080501
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.518838] pci 0000:00:1b.0: reg 0x10: [mem 0xa1239000-0xa1239fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.518882] pci 0000:00:1b.0: reg 0x18: [mem 0xa123a000-0xa123afff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.525062] pci 0000:00:1c.0: [8086:31cc] type 00 class 0x080501
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.525129] pci 0000:00:1c.0: reg 0x10: [mem 0xa123b000-0xa123bfff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.525173] pci 0000:00:1c.0: reg 0x18: [mem 0xa123c000-0xa123cfff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.531300] pci 0000:00:1e.0: [8086:31d0] type 00 class 0x080501
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.531387] pci 0000:00:1e.0: reg 0x10: [mem 0xa123d000-0xa123dfff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.531430] pci 0000:00:1e.0: reg 0x18: [mem 0xa123e000-0xa123efff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.536909] pci 0000:00:1f.0: [8086:3197] type 00 class 0x060100
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.542502] pci 0000:00:1f.1: [8086:31d4] type 00 class 0x0c0500
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.542622] pci 0000:00:1f.1: reg 0x10: [mem 0xa1240000-0xa12400ff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.542745] pci 0000:00:1f.1: reg 0x20: [io  0x2040-0x205f]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.548360] pci 0000:01:00.0: [10ec:8168] type 00 class 0x020000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.548432] pci 0000:01:00.0: reg 0x10: [io  0x1000-0x10ff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.548494] pci 0000:01:00.0: reg 0x18: [mem 0xa1104000-0xa1104fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.548534] pci 0000:01:00.0: reg 0x20: [mem 0xa1100000-0xa1103fff 64bit]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.548575] pci 0000:01:00.0: can't set Max Payload Size to 256; if necessary, use "pci=pcie_bus_safe" and report a bug
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.548913] pci 0000:01:00.0: supports D1 D2
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.548919] pci 0000:01:00.0: PME# supported from D0 D1 D2 D3hot D3cold
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.549428] pci 0000:01:00.0: System wakeup disabled by ACPI
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.552818] pci 0000:00:13.0: PCI bridge to [bus 01]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.552830] pci 0000:00:13.0:   bridge window [io  0x1000-0x1fff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.552841] pci 0000:00:13.0:   bridge window [mem 0xa1100000-0xa11fffff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.552875] pci_bus 0000:00: on NUMA node 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.676464] ACPI: PCI Interrupt Link [LNKA] (IRQs *3 4 5 6 10 11 12 14 15)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.678546] ACPI: PCI Interrupt Link [LNKB] (IRQs 3 *4 5 6 10 11 12 14 15)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.680611] ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 *5 6 10 11 12 14 15)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.682676] ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 5 *6 10 11 12 14 15)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.684735] ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 10 11 12 14 15) *7
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.686812] ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 10 11 12 14 15) *9
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.688867] ACPI: PCI Interrupt Link [LNKG] (IRQs 3 4 5 6 *10 11 12 14 15)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.690928] ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 10 *11 12 14 15)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.711878] ACPI: Enabled 3 GPEs in block 00 to 7F
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.713506] ACPI : EC: interrupt unblocked
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.713537] ACPI : EC: event unblocked
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.713576] ACPI: \_SB_.PCI0.LPCB.H_EC: GPE=0x25, EC_CMD/EC_SC=0x66, EC_DATA=0x62
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.713599] ACPI: \_SB_.PCI0.LPCB.H_EC: Used as boot DSDT EC to handle transactions and events
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.715585] pci 0000:00:02.0: vgaarb: setting as boot VGA device
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.715596] pci 0000:00:02.0: vgaarb: VGA device added: decodes=io+mem,owns=io+mem,locks=none
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.715638] pci 0000:00:02.0: vgaarb: bridge control possible
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.715643] vgaarb: loaded
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.717393] SCSI subsystem initialized
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.717983] libata version 3.00 loaded.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.718365] ACPI: bus type USB registered
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.718698] usbcore: registered new interface driver usbfs
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.718846] usbcore: registered new interface driver hub
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.719086] usbcore: registered new device driver usb
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.720173] Registered efivars operations
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.732389] Advanced Linux Sound Architecture Driver Initialized.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.732549] PCI: Using ACPI for IRQ routing
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.742057] PCI: pci_cache_line_size set to 64 bytes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.742392] e820: reserve RAM buffer [mem 0x00058000-0x0005ffff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.742422] e820: reserve RAM buffer [mem 0x0009e000-0x0009ffff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.742438] e820: reserve RAM buffer [mem 0x76cbd000-0x77ffffff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.742454] e820: reserve RAM buffer [mem 0x7ac00000-0x7bffffff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.744918] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0, 0, 0, 0, 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.744958] hpet0: 8 comparators, 64-bit 19.200000 MHz counter
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.747231] clocksource: Switched to clocksource hpet
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.974690] pnp: PnP ACPI init
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.977279] system 00:00: [io  0x06a4] has been reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.977303] system 00:00: [io  0x06a0] has been reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.977344] system 00:00: Plug and Play ACPI device, IDs PNP0c02 (active)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.983228] pnp 00:01: disabling [io  0x164e-0x164f] because it overlaps 0000:00:13.0 BAR 7 [io  0x1000-0x1fff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.983707] system 00:01: [io  0x0680-0x069f] has been reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.983727] system 00:01: [io  0x0400-0x047f] has been reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.983746] system 00:01: [io  0x0500-0x05fe] has been reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.983764] system 00:01: [io  0x0600-0x061f] has been reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.983782] system 00:01: Plug and Play ACPI device, IDs PNP0c02 (active)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    2.985156] pnp 00:02: Plug and Play ACPI device, IDs PNP0303 (active)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.076937] system 00:03: [mem 0xe0000000-0xefffffff] could not be reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.076957] system 00:03: [mem 0xfea00000-0xfeafffff] has been reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.076978] system 00:03: [mem 0xfed01000-0xfed01fff] has been reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.077008] system 00:03: [mem 0xfed03000-0xfed03fff] has been reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.077027] system 00:03: [mem 0xfed06000-0xfed06fff] has been reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.077046] system 00:03: [mem 0xfed08000-0xfed09fff] has been reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.077065] system 00:03: [mem 0xfed80000-0xfedbffff] has been reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.077083] system 00:03: [mem 0xfed1c000-0xfed1cfff] has been reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.077101] system 00:03: [mem 0xfee00000-0xfeefffff] has been reserved
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.077119] system 00:03: Plug and Play ACPI device, IDs PNP0c02 (active)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.084451] pnp 00:04: Plug and Play ACPI device, IDs PNP0b00 (active)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.094575] pnp: PnP ACPI: found 5 devices
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.132994] clocksource: acpi_pm: mask: 0xffffff max_cycles: 0xffffff, max_idle_ns: 2085701024 ns
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.133045] pci 0000:00:13.0: PCI bridge to [bus 01]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.133055] pci 0000:00:13.0:   bridge window [io  0x1000-0x1fff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.133070] pci 0000:00:13.0:   bridge window [mem 0xa1100000-0xa11fffff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.133095] pci_bus 0000:00: resource 4 [io  0x0070-0x0077]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.133102] pci_bus 0000:00: resource 5 [io  0x0000-0x006f window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.133108] pci_bus 0000:00: resource 6 [io  0x0078-0x0cf7 window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.133114] pci_bus 0000:00: resource 7 [io  0x0d00-0xffff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.133120] pci_bus 0000:00: resource 8 [mem 0x000a0000-0x000bffff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.133125] pci_bus 0000:00: resource 9 [mem 0x000c0000-0x000dffff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.133131] pci_bus 0000:00: resource 10 [mem 0x000e0000-0x000fffff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.133137] pci_bus 0000:00: resource 11 [mem 0x7c000001-0x7fffffff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.133143] pci_bus 0000:00: resource 12 [mem 0x80000000-0xbfffffff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.133149] pci_bus 0000:00: resource 13 [mem 0xe0000000-0xefffffff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.133155] pci_bus 0000:00: resource 14 [mem 0xfea00000-0xfeafffff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.133161] pci_bus 0000:00: resource 15 [mem 0xfed00000-0xfed003ff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.133220] pci_bus 0000:00: resource 16 [mem 0xfed01000-0xfed01fff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.133226] pci_bus 0000:00: resource 17 [mem 0xfed03000-0xfed03fff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.133232] pci_bus 0000:00: resource 18 [mem 0xfed06000-0xfed06fff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.133238] pci_bus 0000:00: resource 19 [mem 0xfed08000-0xfed09fff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.133244] pci_bus 0000:00: resource 20 [mem 0xfed80000-0xfedbffff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.133250] pci_bus 0000:00: resource 21 [mem 0xfed1c000-0xfed1cfff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.133256] pci_bus 0000:00: resource 22 [mem 0xfee00000-0xfeefffff window]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.133262] pci_bus 0000:01: resource 0 [io  0x1000-0x1fff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.133268] pci_bus 0000:01: resource 1 [mem 0xa1100000-0xa11fffff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.137721] NET: Registered protocol family 2
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.139540] TCP established hash table entries: 32768 (order: 6, 262144 bytes)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.139691] TCP bind hash table entries: 32768 (order: 9, 2097152 bytes)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.144814] TCP: Hash tables configured (established 32768 bind 32768)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.145283] UDP hash table entries: 2048 (order: 6, 327680 bytes)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.145998] UDP-Lite hash table entries: 2048 (order: 6, 327680 bytes)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.147672] NET: Registered protocol family 1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.147781] pci 0000:00:02.0: Video device with shadowed ROM at [mem 0x000c0000-0x000dffff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.153928] PCI: CLS 64 bytes, default 64
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.154891] Unpacking initramfs...
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.764002] Freeing initrd memory: 11552K
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.764015] PCI-DMA: Using software bounce buffering for IO (SWIOTLB)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.764024] software IO TLB [mem 0x6ec00000-0x72c00000] (64MB) mapped at [ffff88006ec00000-ffff880072bfffff]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.764365] clocksource: tsc: mask: 0xffffffffffffffff max_cycles: 0xfc66f4fc7c, max_idle_ns: 440795224246 ns
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.778248] workingset: timestamp_bits=46 max_order=20 bucket_order=0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.827330] ntfs: driver 2.1.32 [Flags: R/O].
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.864464] NET: Registered protocol family 38
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.864986] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 250)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.865010] io scheduler noop registered
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.865849] io scheduler cfq registered (default)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.865855] io scheduler mq-deadline registered
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.865861] io scheduler kyber registered
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.865865] start plist test
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.870399] end plist test
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    3.877920] pcieport 0000:00:13.0: Signaling PME with IRQ 120
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    4.801848] clocksource: Switched to clocksource tsc
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.217264] uvesafb: Getting VBE info block failed (eax=0x4f00, err=1)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.217326] uvesafb: vbe_init() failed with -22
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.217428] uvesafb: probe of uvesafb.0 failed with error -22
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.217655] intel_idle: MWAIT substates: 0x11242020
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.217661] intel_idle: v0.4.1 model 0x7A
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.221494] intel_idle: lapic_timer_reliable_states 0xffffffff
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.223025] ACPI: AC Adapter [ADP1] (off-line)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.231520] input: Lid Switch as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:01/PNP0C09:00/PNP0C0D:00/input/input0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.240438] ACPI: Lid Switch [LID0]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.241155] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.241246] ACPI: Power Button [PWRB]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.290096] (NULL device *): hwmon_device_register() is deprecated. Please convert the driver to use hwmon_device_register_with_info().
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.340240] thermal LNXTHERM:00: registered as thermal_zone0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.340250] ACPI: Thermal Zone [TZ01] (29 C)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.341207] GHES: HEST is not enabled!
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.341980] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.344774] ACPI: Battery Slot [BAT0] (battery present)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.345528] ACPI: Battery Slot [BAT1] (battery absent)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.364375] serial8250: ttyS0 at I/O 0x3f8 (irq = 4, base_baud = 115200) is a 16550A
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.370661] Non-volatile memory driver v1.3
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.371685] Linux agpgart interface v0.103
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.377075] loop: module loaded
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.378822] ahci 0000:00:12.0: version 3.0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.392358] ahci 0000:00:12.0: AHCI 0001.0301 32 slots 1 ports 6 Gbps 0x1 impl SATA mode
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.392372] ahci 0000:00:12.0: flags: 64bit ncq sntf pm clo only pmp pio slum part deso sadm sds apst 
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.395793] scsi host0: ahci
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.397226] ata1: SATA max UDMA/133 abar m2048@0xa123f000 port 0xa123f100 irq 121
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.397784] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.397838] ehci-pci: EHCI PCI platform driver
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.398001] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.398030] ohci-pci: OHCI PCI platform driver
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.398162] uhci_hcd: USB Universal Host Controller Interface driver
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.401903] xhci_hcd 0000:00:15.0: xHCI Host Controller
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.402113] xhci_hcd 0000:00:15.0: new USB bus registered, assigned bus number 1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.403731] xhci_hcd 0000:00:15.0: hcc params 0x200077c1 hci version 0x100 quirks 0x00009810
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.403752] xhci_hcd 0000:00:15.0: cache line size of 64 is not supported
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.405088] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.405103] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.405109] usb usb1: Product: xHCI Host Controller
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.405115] usb usb1: Manufacturer: Linux 4.12.0-rc7-drm-tip-ww26-commit-85a692e+ xhci-hcd
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.405120] usb usb1: SerialNumber: 0000:00:15.0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.407611] hub 1-0:1.0: USB hub found
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.407898] hub 1-0:1.0: 9 ports detected
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.459440] xhci_hcd 0000:00:15.0: xHCI Host Controller
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.459507] xhci_hcd 0000:00:15.0: new USB bus registered, assigned bus number 2
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.460412] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.460423] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.460429] usb usb2: Product: xHCI Host Controller
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.460434] usb usb2: Manufacturer: Linux 4.12.0-rc7-drm-tip-ww26-commit-85a692e+ xhci-hcd
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.460440] usb usb2: SerialNumber: 0000:00:15.0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.462572] hub 2-0:1.0: USB hub found
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.462831] hub 2-0:1.0: 7 ports detected
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.503277] usbcore: registered new interface driver usb-storage
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.503856] i8042: PNP: PS/2 Controller [PNP0303:PS2K] at 0x60,0x64 irq 1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.503861] i8042: PNP: PS/2 appears to have AUX port disabled, if this is incorrect please boot with i8042.nopnp
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.504566] i8042: Warning: Keylock active
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.504761] serio: i8042 KBD port at 0x60,0x64 irq 1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.506259] mousedev: PS/2 mouse device common for all mice
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.508682] rtc_cmos 00:04: RTC can wake from S4
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.509870] rtc_cmos 00:04: rtc core: registered rtc_cmos as rtc0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.510008] rtc_cmos 00:04: alarms up to one month, y3k, 242 bytes nvram, hpet irqs
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.511458] softdog: initialized. soft_noboot=0 soft_margin=60 sec soft_panic=0 (nowayout=0)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.512943] device-mapper: uevent: version 1.0.3
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.514447] device-mapper: ioctl: 4.35.0-ioctl (2016-06-23) initialised: dm-devel@redhat.com
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.514460] intel_pstate: Intel P-state driver initializing
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.519770] EFI Variables Facility v0.08 2004-May-17
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.537534] hidraw: raw HID events driver (C) Jiri Kosina
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.538193] usbcore: registered new interface driver usbhid
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.538195] usbhid: USB HID core driver
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.538610] intel_rapl: Found RAPL domain package
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.538614] intel_rapl: Found RAPL domain core
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.538618] intel_rapl: Found RAPL domain uncore
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.538622] intel_rapl: Found RAPL domain dram
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.540703] Initializing XFRM netlink socket
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.542115] NET: Registered protocol family 10
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.544063] Segment Routing with IPv6
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.544113] mip6: Mobile IPv6
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.544130] NET: Registered protocol family 17
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.544151] NET: Registered protocol family 15
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.545670] SSE version of gcm_enc/dec engaged.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.609759] alg: No test for pcbc(aes) (pcbc-aes-aesni)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.611313] registered taskstats version 1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.616421] Btrfs loaded, crc32c=crc32c-generic
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.625607] rtc_cmos 00:04: setting system clock to 2017-06-29 15:24:46 UTC (1498749886)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.626076] PM: Checking hibernation image partition /dev/sda3
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.737342] atkbd serio0: Failed to deactivate keyboard on isa0060/serio0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.865275] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.879985] ata1.00: ATA-9: INTEL SSDSC2BW080A4, DC32, max UDMA/133
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.879990] ata1.00: 156301488 sectors, multi 16: LBA48 NCQ (depth 31/32), AA
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.906340] ata1.00: configured for UDMA/133
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.908335] scsi 0:0:0:0: Direct-Access     ATA      INTEL SSDSC2BW08 DC32 PQ: 0 ANSI: 5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.912253] sd 0:0:0:0: Attached scsi generic sg0 type 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.912580] sd 0:0:0:0: [sda] 156301488 512-byte logical blocks: (80.0 GB/74.5 GiB)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.912766] sd 0:0:0:0: [sda] Write Protect is off
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.912773] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.913111] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.919024]  sda: sda1 sda2 sda3
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [    9.921761] sd 0:0:0:0: [sda] Attached SCSI disk
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.113481] atkbd serio0: Failed to enable keyboard on isa0060/serio0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.114099] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input2
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.116203] PM: Hibernation image partition 8:3 present
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.116209] PM: Looking for hibernation image.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.118776] PM: Image not found (code -22)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.118784] PM: Hibernation image not present or could not be loaded.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.118872] ALSA device list:
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.118877]   No soundcards found.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.123857] Freeing unused kernel memory: 1200K
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.123863] Write protecting the kernel read-only data: 14336k
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.126557] Freeing unused kernel memory: 1544K
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.129344] Freeing unused kernel memory: 652K
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.557920] Setting dangerous option alpha_support - tainting kernel
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.557931] Setting dangerous option enable_guc_loading - tainting kernel
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.557935] Setting dangerous option enable_guc_submission - tainting kernel
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.559620] r8169 Gigabit Ethernet driver 2.3LK-NAPI loaded
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.565912] sdhci: Secure Digital Host Controller Interface driver
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.565916] sdhci: Copyright(c) Pierre Ossman
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.575068] r8169 0000:01:00.0 eth0: RTL8168h/8111h at 0xffffc90000059000, 90:49:fa:02:ae:70, XID 14100880 IRQ 123
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.575074] r8169 0000:01:00.0 eth0: jumbo features [frames: 9200 bytes, tx checksumming: ko]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.582566] [drm:i915_driver_load [i915]] No PCH found.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.582630] [drm:intel_power_domains_init [i915]] Allowed DC state mask 09
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.593115] [drm:intel_device_info_dump [i915]] i915 device info: platform=GEMINILAKE gen=9 pciid=0x3184 rev=0x01
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.593173] [drm:intel_device_info_dump [i915]] i915 device info: is_mobile: no
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.593369] [drm:intel_device_info_dump [i915]] i915 device info: is_lp: yes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.593422] [drm:intel_device_info_dump [i915]] i915 device info: is_alpha_support: no
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.593474] [drm:intel_device_info_dump [i915]] i915 device info: has_64bit_reloc: yes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.593525] [drm:intel_device_info_dump [i915]] i915 device info: has_aliasing_ppgtt: yes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.593577] [drm:intel_device_info_dump [i915]] i915 device info: has_csr: yes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.593628] [drm:intel_device_info_dump [i915]] i915 device info: has_ddi: yes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.593679] [drm:intel_device_info_dump [i915]] i915 device info: has_dp_mst: yes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.593730] [drm:intel_device_info_dump [i915]] i915 device info: has_reset_engine: yes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.593781] [drm:intel_device_info_dump [i915]] i915 device info: has_fbc: yes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.593832] [drm:intel_device_info_dump [i915]] i915 device info: has_fpga_dbg: yes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.593882] [drm:intel_device_info_dump [i915]] i915 device info: has_full_ppgtt: yes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.593932] [drm:intel_device_info_dump [i915]] i915 device info: has_full_48bit_ppgtt: yes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.593982] [drm:intel_device_info_dump [i915]] i915 device info: has_gmbus_irq: yes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.594033] [drm:intel_device_info_dump [i915]] i915 device info: has_gmch_display: no
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.594083] [drm:intel_device_info_dump [i915]] i915 device info: has_guc: yes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.594133] [drm:intel_device_info_dump [i915]] i915 device info: has_guc_ct: no
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.594183] [drm:intel_device_info_dump [i915]] i915 device info: has_hotplug: yes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.594461] [drm:intel_device_info_dump [i915]] i915 device info: has_l3_dpf: no
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.594512] [drm:intel_device_info_dump [i915]] i915 device info: has_llc: no
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.594562] [drm:intel_device_info_dump [i915]] i915 device info: has_logical_ring_contexts: yes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.594612] [drm:intel_device_info_dump [i915]] i915 device info: has_overlay: no
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.594662] [drm:intel_device_info_dump [i915]] i915 device info: has_pipe_cxsr: no
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.594712] [drm:intel_device_info_dump [i915]] i915 device info: has_pooled_eu: no
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.594762] [drm:intel_device_info_dump [i915]] i915 device info: has_psr: no
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.594812] [drm:intel_device_info_dump [i915]] i915 device info: has_rc6: yes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.594861] [drm:intel_device_info_dump [i915]] i915 device info: has_rc6p: no
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.594910] [drm:intel_device_info_dump [i915]] i915 device info: has_resource_streamer: yes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.594960] [drm:intel_device_info_dump [i915]] i915 device info: has_runtime_pm: yes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.595009] [drm:intel_device_info_dump [i915]] i915 device info: has_snoop: no
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.595059] [drm:intel_device_info_dump [i915]] i915 device info: unfenced_needs_alignment: no
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.595109] [drm:intel_device_info_dump [i915]] i915 device info: cursor_needs_physical: no
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.595158] [drm:intel_device_info_dump [i915]] i915 device info: hws_needs_physical: no
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.595468] [drm:intel_device_info_dump [i915]] i915 device info: overlay_needs_physical: no
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.595518] [drm:intel_device_info_dump [i915]] i915 device info: supports_tv: no
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.598526] [drm:intel_device_info_runtime_init [i915]] slice mask: 0001
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.598582] [drm:intel_device_info_runtime_init [i915]] slice total: 1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.598635] [drm:intel_device_info_runtime_init [i915]] subslice total: 3
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.598688] [drm:intel_device_info_runtime_init [i915]] subslice mask 0007
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.598739] [drm:intel_device_info_runtime_init [i915]] subslice per slice: 3
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.598790] [drm:intel_device_info_runtime_init [i915]] EU total: 18
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.598841] [drm:intel_device_info_runtime_init [i915]] EU per subslice: 6
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.598891] [drm:intel_device_info_runtime_init [i915]] has slice power gating: n
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.598942] [drm:intel_device_info_runtime_init [i915]] has subslice power gating: y
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.598992] [drm:intel_device_info_runtime_init [i915]] has EU power gating: y
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.599045] [drm:i915_driver_load [i915]] ppgtt mode: 3
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.599096] [drm:i915_driver_load [i915]] use GPU semaphores? no
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.599153] [drm] Memory usable by graphics device = 4078M
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.599210] [drm:i915_ggtt_probe_hw [i915]] GMADR size = 256M
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.599288] [drm:i915_ggtt_probe_hw [i915]] GTT stolen size = 64M
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.599319] [drm] Replacing VGA console driver
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.599465] [drm:i915_gem_init_stolen [i915]] Memory reserved for graphics device: 65536K, usable: 57344K
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.599532] [drm:sanitize_rc6_option [i915]] BIOS enabled RC states: HW_CTRL off HW_RC6 off SW_TARGET_STATE 4
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.599709] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x79a35018
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.599804] [drm:intel_opregion_setup [i915]] Public ACPI methods supported
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.599864] [drm:intel_opregion_setup [i915]] ASLE supported
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.599943] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.600296] [drm:intel_gvt_init [i915]] GVT-g is disabled by kernel params
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.600310] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.600313] [drm] Driver supports precise vblank timestamp query.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.600373] [drm:intel_bios_init [i915]] Set default to SSC at 100000 kHz
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.600434] [drm:intel_bios_init [i915]] VBT signature "$VBT GEMINILAKE     ", BDB version 210
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.600493] [drm:intel_bios_init [i915]] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 0 lvds_use_ssc 0 lvds_ssc_freq 120000 display_clock_mode 0 fdi_rx_polarity_inverted 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.600551] [drm:intel_bios_init [i915]] crt_ddc_bus_pin: 2
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.600612] [drm:intel_opregion_get_panel_type [i915]] Failed to get panel details from OpRegion (-19)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.600671] [drm:intel_bios_init [i915]] Panel type: 2 (VBT)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.600728] [drm:intel_bios_init [i915]] DRRS supported mode is seamless
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.600791] [drm:intel_bios_init [i915]] Found panel mode in BIOS VBT tables:
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.600800] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 0 65000 1024 1048 1184 1344 768 771 777 806 0x8 0xa
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.600857] [drm:intel_bios_init [i915]] VBT initial LVDS value 300
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.600915] [drm:intel_bios_init [i915]] VBT backlight PWM modulation frequency 200 Hz, active high, min brightness 0, level 180, controller 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.600971] [drm:intel_bios_init [i915]] Unsupported child device size for SDVO mapping.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.601028] [drm:intel_bios_init [i915]] Expected child device config size for VBT version 210 not known; assuming 38
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.601088] [drm:intel_bios_init [i915]] DRRS State Enabled:1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.601146] [drm:intel_bios_init [i915]] Port A VBT info: DP:1 HDMI:0 DVI:0 EDP:1 CRT:0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.601202] [drm:intel_bios_init [i915]] VBT HDMI level shift for port A: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.601274] [drm:intel_bios_init [i915]] Port B VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.601329] [drm:intel_bios_init [i915]] VBT HDMI level shift for port B: 8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.601384] [drm:intel_bios_init [i915]] Port C VBT info: DP:0 HDMI:1 DVI:1 EDP:0 CRT:0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.601439] [drm:intel_bios_init [i915]] VBT HDMI level shift for port C: 8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.602260] [drm:intel_dsm_detect [i915]] no _DSM method for intel device
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.602448] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.602666] [drm:intel_power_well_enable [i915]] enabling power well 1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.602950] [drm:intel_update_cdclk [i915]] Current CD clock rate: 316800 kHz, VCO: 633600 kHz, ref: 19200 kHz
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.603120] [drm:intel_power_well_enable [i915]] enabling always-on
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.603424] [drm:intel_power_well_enable [i915]] enabling DC off
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.603531] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.603593] [drm:intel_power_well_enable [i915]] enabling power well 2
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.603750] [drm:intel_power_well_enable [i915]] enabling dpio-common-a
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.604555] [drm:intel_power_well_enable [i915]] enabling dpio-common-b
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.604780] [drm:_bxt_ddi_phy_init [i915]] DDI PHY 0 already enabled, won't reprogram it
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.604946] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.605344] [drm:intel_power_well_enable [i915]] enabling AUX A
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.605456] [drm:skl_set_power_well [i915]] Enabling AUX A
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.605510] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.605566] [drm:intel_power_well_enable [i915]] enabling AUX C
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.605621] [drm:skl_set_power_well [i915]] Enabling AUX C
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.605731] [drm:intel_csr_ucode_init [i915]] Loading i915/glk_dmc_ver1_04.bin
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.607574] [drm] Finished loading DMC firmware i915/glk_dmc_ver1_04.bin (v1.4)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.608495] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001a18 hp_port:38
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.615535] [drm:intel_fbc_init [i915]] Sanitized enable_fbc value: 1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.615612] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM0 latency 7 (7.0 usec)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.615666] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM1 latency 7 (7.0 usec)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.615720] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM2 latency 8 (8.0 usec)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.615772] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM3 latency 22 (22.0 usec)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.615824] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM4 latency 22 (22.0 usec)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.615875] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM5 latency 22 (22.0 usec)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.615926] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM6 latency 22 (22.0 usec)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.615978] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM7 latency 22 (22.0 usec)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.616039] [drm:intel_modeset_init [i915]] 3 display pipes available.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.616796] [drm:intel_update_cdclk [i915]] Current CD clock rate: 316800 kHz, VCO: 633600 kHz, ref: 19200 kHz
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.616869] [drm:intel_update_max_cdclk [i915]] Max CD clock rate: 316800 kHz
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.616928] [drm:intel_update_max_cdclk [i915]] Max dotclock rate: 627264 kHz
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.616944] i915 0000:00:02.0: vgaarb: changed VGA decodes: olddecodes=io+mem,decodes=io+mem:owns=io+mem
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.617351] [drm:intel_ddi_init [i915]] BXT BIOS forgot to set DDI_A_4_LANES for port A; fixing
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.617424] [drm:intel_dp_init_connector [i915]] Adding eDP connector on port A
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.617510] [drm:intel_dp_init_connector [i915]] using AUX A for port A (VBT)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.617615] [drm:intel_pps_dump_state [i915]] cur t1_t3 0 t8 0 t9 0 t10 500 t11_t12 6000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.617679] [drm:intel_pps_dump_state [i915]] vbt t1_t3 2000 t8 10 t9 2000 t10 500 t11_t12 6000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.617737] [drm:intel_dp_init_panel_power_sequencer [i915]] panel power up delay 200, power down delay 50, power cycle delay 600
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.617794] [drm:intel_dp_init_panel_power_sequencer [i915]] backlight on delay 1, off delay 200
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.617857] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.617915] [drm:intel_edp_panel_vdd_sanitize [i915]] VDD left on by BIOS, adjusting state tracking
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.618647] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 82 41 00 00 01 80 02 00 00 00 0f 0b 00
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.619063] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.620755] [drm:intel_dp_init_connector [i915]] Detected EDP PSR Panel.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.621146] [drm:intel_dp_init_connector [i915]] EDP DPCD : 02 fb e7
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.624591] r8169 0000:01:00.0 enp1s0: renamed from eth0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.625497] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.625677] [drm:intel_dp_init_connector [i915]] Downclock mode is not found. DRRS not supported
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.625737] [drm:intel_dp_aux_init_backlight_funcs [i915]] AUX Backlight Control Supported!
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.626547] [drm:intel_panel_setup_backlight [i915]] Connector eDP-1 backlight initialized, enabled, brightness 65472/65535
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.626730] [drm:intel_dp_init_connector [i915]] Adding DP connector on port B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.626801] [drm:intel_dp_init_connector [i915]] using AUX B for port B (VBT)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.626921] [drm:intel_hdmi_init_connector [i915]] Adding HDMI connector on port B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.626985] [drm:intel_hdmi_init_connector [i915]] Using DDC pin 0x1 for port B (VBT)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.627086] [drm:intel_hdmi_init_connector [i915]] Adding HDMI connector on port C
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.627148] [drm:intel_hdmi_init_connector [i915]] Using DDC pin 0x2 for port C (VBT)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.627203] [drm:intel_dsi_init [i915]] 
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.627548] [drm:intel_set_plane_visible [i915]] pipe A active planes 0x1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.627615] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:36:pipe A] hw state readout: enabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.627683] [drm:intel_set_plane_visible [i915]] pipe B active planes 0x0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.627743] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:47:pipe B] hw state readout: disabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.627809] [drm:intel_set_plane_visible [i915]] pipe C active planes 0x0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.627867] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:58:pipe C] hw state readout: disabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.627927] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL A hw state readout: crtc_mask 0x00000000, on 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.628007] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL B hw state readout: crtc_mask 0x00000001, on 1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.628066] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.628125] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:59:DDI A] hw state readout: disabled, pipe A
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.628238] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:67:DDI B] hw state readout: enabled, pipe A
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.628294] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:69:DP-MST A] hw state readout: disabled, pipe A
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.628349] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:70:DP-MST B] hw state readout: disabled, pipe B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.628405] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:71:DP-MST C] hw state readout: disabled, pipe C
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.628462] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:74:DDI C] hw state readout: disabled, pipe A
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.628546] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:60:eDP-1] hw state readout: disabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.628611] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:68:DP-1] hw state readout: enabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.628673] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:72:HDMI-A-1] hw state readout: disabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.628732] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:75:HDMI-A-2] hw state readout: disabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.628763] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff8801759c4a88
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.628831] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.629000] [drm:intel_dump_pipe_config [i915]] [CRTC:36:pipe A][setup_hw_state]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.629058] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 24, dithering: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.629115] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.629170] [drm:intel_dump_pipe_config [i915]] requested mode:
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.629193] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 109 270000 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.629249] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.629254] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 109 270000 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.629311] [drm:intel_dump_pipe_config [i915]] crtc timings: 270000 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x40 flags: 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.629366] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 270000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.629422] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.629477] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.629532] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.629590] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.629644] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.629699] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.629753] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.629807] [drm:intel_dump_pipe_config [i915]] [PLANE:30:plane 3A] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.629861] [drm:intel_dump_pipe_config [i915]] [PLANE:32:plane 4A] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.629915] [drm:intel_dump_pipe_config [i915]] [PLANE:34:cursor A] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.629971] [drm:intel_dump_pipe_config [i915]] [CRTC:47:pipe B][setup_hw_state]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.630025] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.630078] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.630131] [drm:intel_dump_pipe_config [i915]] requested mode:
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.630136] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.630189] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.630430] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.630486] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.630541] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.630597] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.630652] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.630707] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.630764] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.630819] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.630874] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 1B] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.630928] [drm:intel_dump_pipe_config [i915]] [PLANE:39:plane 2B] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.630982] [drm:intel_dump_pipe_config [i915]] [PLANE:41:plane 3B] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.631037] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 4B] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.631091] [drm:intel_dump_pipe_config [i915]] [PLANE:45:cursor B] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.631149] [drm:intel_dump_pipe_config [i915]] [CRTC:58:pipe C][setup_hw_state]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.631202] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.631276] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.631329] [drm:intel_dump_pipe_config [i915]] requested mode:
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.631334] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.631387] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.631392] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.631446] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.631500] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.631554] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.631609] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.633299] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.633365] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.633424] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.633485] [drm:intel_dump_pipe_config [i915]] [PLANE:48:plane 1C] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.633543] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 2C] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.633600] [drm:intel_dump_pipe_config [i915]] [PLANE:52:plane 3C] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.633657] [drm:intel_dump_pipe_config [i915]] [PLANE:54:plane 4C] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.633714] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor C] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.633920] [drm:intel_power_well_disable [i915]] disabling AUX C
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.633980] [drm:skl_set_power_well [i915]] Disabling AUX C
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.634037] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.634093] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.634148] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.634286] [drm:skylake_get_initial_plane_config [i915]] pipe A with fb: size=1920x1080@32, offset=0, pitch 7680, size 0x7e9000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.634352] [drm:i915_gem_object_create_stolen_for_preallocated [i915]] creating preallocated stolen object: stolen_offset=0, gtt_offset=0, size=7e9000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.634501] [drm:i915_gem_object_create_stolen_for_preallocated [i915]] failed to allocate stolen space
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.634582] [drm:intel_set_plane_visible [i915]] pipe A active planes 0x0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.634643] [drm:fetch_uc_fw [i915]] before requesting firmware: uC fw fetch status PENDING
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.635397] [drm:fetch_uc_fw [i915]] fetch uC fw from i915/glk_huc_ver02_00_1748.bin succeeded, fw ffff880175731708
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.635455] [drm:fetch_uc_fw [i915]] firmware version 2.0 OK (minimum 2.0)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.635812] [drm:fetch_uc_fw [i915]] uC fw fetch status SUCCESS, obj ffff880174d10040
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.635975] [drm:fetch_uc_fw [i915]] before requesting firmware: uC fw fetch status PENDING
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.636302] [drm:fetch_uc_fw [i915]] fetch uC fw from i915/glk_guc_ver10_56.bin succeeded, fw ffff880175731708
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.636358] [drm:fetch_uc_fw [i915]] firmware version 10.56 OK (minimum 10.56)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.636572] [drm:fetch_uc_fw [i915]] uC fw fetch status SUCCESS, obj ffff880174d17840
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.637573] [drm:i915_gem_init_ggtt [i915]] clearing unused GTT space: [1000, fee00000]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.637714] [drm:i915_gem_contexts_init [i915]] logical context support initialized
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.637889] [drm:intel_engine_create_scratch [i915]] rcs0 pipe control offset: 0xfedff000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.639844] [drm:gen8_init_common_ring [i915]] Execlists enabled for rcs0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.639920] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 12
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.640047] [drm:gen8_init_common_ring [i915]] Execlists enabled for bcs0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.640173] [drm:gen8_init_common_ring [i915]] Execlists enabled for vcs0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.640316] [drm:gen8_init_common_ring [i915]] Execlists enabled for vecs0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.641061] [drm:intel_huc_init_hw [i915]] i915/glk_huc_ver02_00_1748.bin fw status: fetch SUCCESS, load NONE
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.643603] [drm:intel_huc_init_hw [i915]] HuC DMA transfer wait over with ret 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.643668] [drm:intel_huc_init_hw [i915]] i915/glk_huc_ver02_00_1748.bin fw status: fetch SUCCESS, load SUCCESS
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.643725] [drm:intel_guc_init_hw [i915]] GuC fw status: path i915/glk_guc_ver10_56.bin, fetch SUCCESS, load NONE
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.643779] [drm:intel_guc_init_hw [i915]] GuC fw status: fetch SUCCESS, load PENDING
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.650730] [drm:guc_ucode_xfer_dma [i915]] DMA status 0x10, GuC status 0x8002f0ec
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.650794] [drm:guc_ucode_xfer_dma [i915]] returning 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.650798] [drm] GuC submission enabled (firmware i915/glk_guc_ver10_56.bin [version 10.56])
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.657963] [drm:i915_guc_submission_enable [i915]] reserved cacheline 0x0, next 0x40, linesize 64
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.658031] [drm:i915_guc_submission_enable [i915]] Host engines 0x17 => GuC engines used 0xf
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.658095] [drm:__reserve_doorbell [i915]] client 0 (high prio=no) reserved doorbell: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.660456] [drm:i915_guc_submission_enable [i915]] new priority 2 client ffff880175ac8638 for engine(s) 0x17: stage_id 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.660521] [drm:i915_guc_submission_enable [i915]] doorbell id 0, cacheline offset 0x0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.664142] [drm:intel_fbdev_init [i915]] pipe A not active or no fb, skipping
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.664207] [drm:intel_fbdev_init [i915]] pipe B not active or no fb, skipping
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.664305] [drm:intel_fbdev_init [i915]] pipe C not active or no fb, skipping
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.664368] [drm:intel_fbdev_init [i915]] no active fbs found, not using BIOS config
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.664515] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.667057] [drm:intel_backlight_device_register [i915]] Connector eDP-1 backlight sysfs interface registered
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.667161] [drm:intel_dp_connector_register [i915]] registering DPDDC-A bus for card0-eDP-1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.668293] [drm:intel_dp_connector_register [i915]] registering DPDDC-B bus for card0-DP-1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.669636] [drm] Initialized i915 1.6.0 20170619 for 0000:00:02.0 on minor 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.671678] [drm:intel_opregion_register [i915]] 4 outputs detected
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.686902] ACPI: Video Device [GFX0] (multi-head: yes  rom: no  post: no)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.690729] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:00/input/input3
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.691865] [drm] DRM_I915_DEBUG enabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.691868] [drm] DRM_I915_DEBUG_GEM enabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.691924] [drm:drm_setup_crtcs] 
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.691940] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:60:eDP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.692038] [drm:intel_dp_detect [i915]] [CONNECTOR:60:eDP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.692041] sdhci-pci 0000:00:1b.0: SDHCI controller found [8086:31ca] (rev 1)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.692109] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.692169] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.692241] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.692295] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.692786] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.693514] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:60:eDP-1] status updated from unknown to connected
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.693659] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.693673] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:60:eDP-1] probed modes :
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.693680] [drm:drm_mode_debug_printmodeline] Modeline 61:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.693685] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:68:DP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.693752] [drm:intel_dp_detect [i915]] [CONNECTOR:68:DP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.693812] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.693878] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.694944] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 80 02 00 00 00 00 00 00
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.695878] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.695936] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.695991] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.696046] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.696088] sdhci-pci 0000:00:1c.0: SDHCI controller found [8086:31cc] (rev 1)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.697022] [drm:drm_dp_read_desc] DP sink: OUI 00-e0-4c dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.697077] [drm:intel_dp_detect [i915]] Sink is not MST capable
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.700594] mmc0: SDHCI controller on PCI [0000:00:1c.0] using ADMA 64-bit
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.701031] sdhci-pci 0000:00:1b.0: SDHCI controller found [8086:31ca] (rev 1)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.705139] sdhci-pci 0000:00:1e.0: SDHCI controller found [8086:31d0] (rev 1)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.706550] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.706609] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.706620] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:68:DP-1] status updated from unknown to connected
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.706709] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.706723] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:68:DP-1] probed modes :
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.706729] [drm:drm_mode_debug_printmodeline] Modeline 78:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.706734] [drm:drm_mode_debug_printmodeline] Modeline 81:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.706738] [drm:drm_mode_debug_printmodeline] Modeline 86:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.706742] [drm:drm_mode_debug_printmodeline] Modeline 80:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.706747] [drm:drm_mode_debug_printmodeline] Modeline 79:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.706751] [drm:drm_mode_debug_printmodeline] Modeline 87:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.706756] [drm:drm_mode_debug_printmodeline] Modeline 88:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.706760] [drm:drm_mode_debug_printmodeline] Modeline 89:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.706764] [drm:drm_mode_debug_printmodeline] Modeline 82:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.706769] [drm:drm_mode_debug_printmodeline] Modeline 83:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.706773] [drm:drm_mode_debug_printmodeline] Modeline 84:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.706778] [drm:drm_mode_debug_printmodeline] Modeline 85:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.706783] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.706847] [drm:intel_hdmi_detect [i915]] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.707415] mmc1: SDHCI controller on PCI [0000:00:1e.0] using ADMA 64-bit
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.707688] sdhci-pci 0000:00:1b.0: SDHCI controller found [8086:31ca] (rev 1)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.708264] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.708330] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.710290] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.710298] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.712287] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.712346] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.714568] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.714589] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.714599] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1] status updated from unknown to disconnected
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.714604] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1] disconnected
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.714614] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.714676] [drm:intel_hdmi_detect [i915]] [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.794352] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.794447] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.796670] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.796695] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.796708] [drm:drm_rgb_quant_range_selectable] CEA VCDB 0x2b
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.796721] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:75:HDMI-A-2] status updated from unknown to connected
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797067] [drm:drm_add_edid_modes] HDMI: DVI dual 0, max TMDS clock 170000 kHz
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797074] [drm:drm_edid_to_eld] ELD monitor HP E232
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797081] [drm:drm_edid_to_eld] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797087] [drm:drm_edid_to_eld] ELD size 28, SAD count 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797243] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:75:HDMI-A-2] probed modes :
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797254] [drm:drm_mode_debug_printmodeline] Modeline 91:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797261] [drm:drm_mode_debug_printmodeline] Modeline 113:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797268] [drm:drm_mode_debug_printmodeline] Modeline 93:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797275] [drm:drm_mode_debug_printmodeline] Modeline 98:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797282] [drm:drm_mode_debug_printmodeline] Modeline 97:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797289] [drm:drm_mode_debug_printmodeline] Modeline 101:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797296] [drm:drm_mode_debug_printmodeline] Modeline 99:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797303] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797310] [drm:drm_mode_debug_printmodeline] Modeline 94:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797317] [drm:drm_mode_debug_printmodeline] Modeline 115:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797323] [drm:drm_mode_debug_printmodeline] Modeline 95:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797330] [drm:drm_mode_debug_printmodeline] Modeline 104:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797337] [drm:drm_mode_debug_printmodeline] Modeline 102:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797344] [drm:drm_mode_debug_printmodeline] Modeline 111:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797351] [drm:drm_mode_debug_printmodeline] Modeline 116:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797358] [drm:drm_mode_debug_printmodeline] Modeline 96:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797365] [drm:drm_mode_debug_printmodeline] Modeline 117:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797371] [drm:drm_mode_debug_printmodeline] Modeline 103:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797413] [drm:drm_setup_crtcs] connector 60 enabled? yes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797419] [drm:drm_setup_crtcs] connector 68 enabled? yes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797425] [drm:drm_setup_crtcs] connector 72 enabled? no
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797430] [drm:drm_setup_crtcs] connector 75 enabled? yes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797533] [drm:intel_fb_initial_config [i915]] Not using firmware configuration
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797548] [drm:drm_setup_crtcs] looking for cmdline mode on connector 60
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797554] [drm:drm_setup_crtcs] looking for preferred mode on connector 60 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797560] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797565] [drm:drm_setup_crtcs] looking for cmdline mode on connector 68
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797570] [drm:drm_setup_crtcs] looking for preferred mode on connector 68 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797576] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797581] [drm:drm_setup_crtcs] looking for cmdline mode on connector 75
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797586] [drm:drm_setup_crtcs] looking for preferred mode on connector 75 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797591] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797596] [drm:drm_setup_crtcs] picking CRTCs for 8192x8192 config
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797777] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 36 (0,0)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797791] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 47 (0,0)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797803] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 58 (0,0)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.797917] [drm:intelfb_create [i915]] no BIOS fb, allocating a new one
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.802298] [drm:intelfb_create [i915]] allocated 1920x1080 fb: 0x00180000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.803591] fbcon: inteldrmfb (fb0) is primary device
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.804875] [drm:drm_atomic_state_init] Allocated atomic state ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.804887] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880175ae5288 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.804896] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 2A] ffff880175ae6e48 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.804899] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175ae6e48 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.804902] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175ae6e48
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.804910] [drm:drm_atomic_get_plane_state] Added [PLANE:30:plane 3A] ffff880175ae5038 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.804912] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175ae5038 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.804915] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175ae5038
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.804923] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane 4A] ffff8801764ba068 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.804925] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801764ba068 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.804928] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801764ba068
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.804936] [drm:drm_atomic_get_plane_state] Added [PLANE:34:cursor A] ffff880179efb098 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.804939] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880179efb098 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.804941] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880179efb098
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.804948] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880179efb2e8 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.804956] [drm:drm_atomic_get_plane_state] Added [PLANE:39:plane 2B] ffff880179ef8b98 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.804958] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880179ef8b98 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.804960] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880179ef8b98
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.804968] [drm:drm_atomic_get_plane_state] Added [PLANE:41:plane 3B] ffff880175ae4de8 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.804970] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175ae4de8 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.804973] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175ae4de8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.804993] [drm:drm_atomic_get_plane_state] Added [PLANE:43:plane 4B] ffff880175aa4008 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.804995] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175aa4008 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.804997] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175aa4008
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805006] [drm:drm_atomic_get_plane_state] Added [PLANE:45:cursor B] ffff880175aa7c28 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805008] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175aa7c28 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805011] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175aa7c28
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805019] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880175aa4258 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805026] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 2C] ffff880175aa79d8 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805029] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175aa79d8 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805031] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175aa79d8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805040] [drm:drm_atomic_get_plane_state] Added [PLANE:52:plane 3C] ffff880175aa44a8 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805042] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175aa44a8 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805044] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175aa44a8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805062] [drm:drm_atomic_get_plane_state] Added [PLANE:54:plane 4C] ffff880175a2c008 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805064] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175a2c008 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805067] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175a2c008
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805075] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor C] ffff880175a2fc28 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805077] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175a2fc28 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805080] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175a2fc28
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805091] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880174c44a88 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805106] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880174c44a88
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805109] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175ae5288 to [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805112] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880175ae5288
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805116] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805139] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff880179f16748 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805147] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880179f16748 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805155] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff880179f175c8 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805158] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880179f175c8 to [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805188] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880174c437e8 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805198] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880174c437e8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805200] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880179efb2e8 to [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805203] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880179efb2e8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805207] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805213] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880179f16748 to [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805223] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880174c44138 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805231] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880174c44138
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805233] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175aa4258 to [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805236] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880175aa4258
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805240] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805250] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff880179f173f8 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805253] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880179f173f8 to [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805256] [drm:drm_atomic_check_only] checking ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805261] [drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] mode changed
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805264] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] mode changed
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805266] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] enable changed
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805268] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] active changed
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805271] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] mode changed
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805273] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] enable changed
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805275] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] active changed
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805283] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805287] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] using [ENCODER:59:DDI A] on [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805290] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805294] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805296] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805300] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] using [ENCODER:74:DDI C] on [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805303] [drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] needs all connectors, enable: y, active: y
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805306] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805313] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] needs all connectors, enable: y, active: y
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805316] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805322] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] needs all connectors, enable: y, active: y
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805325] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805332] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805406] [drm:intel_atomic_check [i915]] [CONNECTOR:60:eDP-1] checking for sink bpp constrains
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805469] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805538] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 141000KHz
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805604] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805664] [drm:intel_dp_compute_config [i915]] DP link bw required 423000 available 540000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805730] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805793] [drm:intel_dump_pipe_config [i915]] [CRTC:36:pipe A][modeset]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805856] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805917] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6571076, gmch_n: 8388608, link_m: 273794, link_n: 524288, tu: 64
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.805975] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.806033] [drm:intel_dump_pipe_config [i915]] requested mode:
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.806037] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.806095] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.806099] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.806157] [drm:intel_dump_pipe_config [i915]] crtc timings: 141000 1920 1936 1952 2104 1080 1083 1097 1116, type: 0x48 flags: 0xa
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.806215] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 141000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.806290] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.806348] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.806404] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.806470] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.806527] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.806584] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.806641] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.806697] [drm:intel_dump_pipe_config [i915]] [PLANE:30:plane 3A] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.806752] [drm:intel_dump_pipe_config [i915]] [PLANE:32:plane 4A] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.806808] [drm:intel_dump_pipe_config [i915]] [PLANE:34:cursor A] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.806813] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.806873] [drm:intel_atomic_check [i915]] [CONNECTOR:68:DP-1] checking for sink bpp constrains
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.806930] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.806990] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 148500KHz
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.807050] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.807107] [drm:intel_dp_compute_config [i915]] DP link bw required 445500 available 648000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.807165] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.807242] [drm:intel_dump_pipe_config [i915]] [CRTC:47:pipe B][modeset]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.807297] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 24, dithering: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.807353] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.807408] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.807462] [drm:intel_dump_pipe_config [i915]] requested mode:
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.807467] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.807522] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.807526] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.807582] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.807636] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1080, pixel rate 148500
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.807692] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.807747] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.807801] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.807860] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.807914] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.807971] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 1B] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.808025] [drm:intel_dump_pipe_config [i915]] [PLANE:39:plane 2B] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.808079] [drm:intel_dump_pipe_config [i915]] [PLANE:41:plane 3B] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.808132] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 4B] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.808186] [drm:intel_dump_pipe_config [i915]] [PLANE:45:cursor B] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.808205] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.808264] [drm:intel_atomic_check [i915]] [CONNECTOR:75:HDMI-A-2] checking for sink bpp constrains
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.808319] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.808384] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.808442] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 24 for HDMI
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.808501] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.808556] [drm:intel_dump_pipe_config [i915]] [CRTC:58:pipe C][modeset]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.808609] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 24, dithering: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.808663] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.808716] [drm:intel_dump_pipe_config [i915]] requested mode:
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.808720] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.808773] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.808777] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.808831] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.808884] [drm:intel_dump_pipe_config [i915]] port clock: 148500, pipe src size: 1920x1080, pixel rate 148500
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.808938] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.808991] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.809044] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.809102] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.809155] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.809208] [drm:intel_dump_pipe_config [i915]] [PLANE:48:plane 1C] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.809275] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 2C] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.809328] [drm:intel_dump_pipe_config [i915]] [PLANE:52:plane 3C] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.809381] [drm:intel_dump_pipe_config [i915]] [PLANE:54:plane 4C] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.809433] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor C] disabled, scaler_id = -1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.809496] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.809560] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.809615] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 0 -> 1, off 0, on 1, ms 1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.809670] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.809725] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 0 -> 1, off 0, on 1, ms 1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.809779] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.809833] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 0 -> 1, off 0, on 1, ms 1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.809892] [drm:bxt_get_dpll [i915]] [CRTC:36:pipe A] using pre-allocated PORT PLL A
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.809948] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe A
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.810008] [drm:bxt_get_dpll [i915]] [CRTC:47:pipe B] using pre-allocated PORT PLL B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.810062] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.810119] [drm:skl_update_scaler [i915]] scaler_user index 1.31: Staged freeing scaler id 0 scaler_users = 0x0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.810178] [drm:bxt_get_dpll [i915]] [CRTC:58:pipe C] using pre-allocated PORT PLL C
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.810249] [drm:intel_reference_shared_dpll [i915]] using PORT PLL C for pipe C
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.810303] [drm:skl_update_scaler [i915]] scaler_user index 2.31: Staged freeing scaler id 0 scaler_users = 0x0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.810401] [drm:skl_compute_wm [i915]] [PLANE:26:plane 1A] ddb (0 - 510) -> (0 - 332)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.810457] [drm:skl_compute_wm [i915]] [PLANE:34:cursor A] ddb (0 - 0) -> (332 - 340)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.810512] [drm:skl_compute_wm [i915]] [PLANE:37:plane 1B] ddb (510 - 1020) -> (340 - 672)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.810567] [drm:skl_compute_wm [i915]] [PLANE:45:cursor B] ddb (0 - 0) -> (672 - 680)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.810620] [drm:skl_compute_wm [i915]] [PLANE:48:plane 1C] ddb (0 - 0) -> (680 - 1012)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.810674] [drm:skl_compute_wm [i915]] [PLANE:56:cursor C] ddb (0 - 0) -> (1012 - 1020)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.810677] [drm:drm_atomic_commit] committing ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.811223] [drm:intel_disable_pipe [i915]] disabling pipe A
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.828704] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.828833] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.829506] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.829616] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.829747] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.829868] [drm:skl_set_power_well [i915]] Disabling DDI B IO power well
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.830177] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 1, on? 1) for crtc 36
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.830512] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.830661] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.831372] [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.831544] [drm:intel_update_cdclk [i915]] Current CD clock rate: 79200 kHz, VCO: 633600 kHz, ref: 19200 kHz
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.831667] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DDI A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.831785] [drm:intel_atomic_commit_tail [i915]] [ENCODER:67:DDI B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.831899] [drm:intel_atomic_commit_tail [i915]] [ENCODER:69:DP-MST A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.832013] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.832125] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.832239] [drm:intel_atomic_commit_tail [i915]] [ENCODER:74:DDI C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.832384] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL A
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.832501] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.832617] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL C
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.832792] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 1, on? 0) for crtc 36
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.832904] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.833660] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   10.833789] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.225561] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 0000006a
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.225623] [drm:wait_panel_status [i915]] Wait complete
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.225679] [drm:edp_panel_on [i915]] Wait for panel power on
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.225736] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 0000006b
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.426829] [drm:wait_panel_status [i915]] Wait complete
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.426897] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.426954] [drm:skl_set_power_well [i915]] Enabling DDI A IO power well
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.428327] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.428415] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.428508] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.429336] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.429421] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.430547] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.430635] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.432278] [drm:intel_enable_pipe [i915]] enabling pipe A
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.432423] [drm:intel_edp_backlight_on [i915]] 
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.432510] [drm:intel_panel_enable_backlight [i915]] pipe A
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.433240] [drm:intel_dp_aux_enable_backlight [i915]] VBT defined backlight frequency 200 Hz
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.434682] [drm:intel_dp_aux_enable_backlight [i915]] Enable dynamic brightness.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.435172] [drm:intel_psr_enable [i915]] PSR not supported on this platform
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.435277] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.435415] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.435509] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.449441] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 2, on? 0) for crtc 47
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.449530] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.449777] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.449865] [drm:skl_set_power_well [i915]] Enabling DDI B IO power well
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.449953] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.450041] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.450596] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.450682] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.451389] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.451473] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.452031] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.452116] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.452205] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.452314] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.452867] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.452952] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.453064] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.453148] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.453235] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.453351] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.453435] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.454024] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.454110] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.454840] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.454961] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.455546] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.455631] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.456603] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.456700] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.457314] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.457398] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.457591] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.457671] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.458204] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.458325] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.459352] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.459449] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.460025] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.460109] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.460197] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.460307] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.460921] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.461002] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.461105] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.461203] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.461334] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.461387] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.461939] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.461991] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.462452] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.462538] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.463024] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.463076] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.464020] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.464082] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.464607] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.464661] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.464718] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.464769] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.465309] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.465361] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.465432] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.467782] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 162000, Lane count = 4
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.467859] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.467918] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.468444] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.468533] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.469523] [drm:intel_enable_pipe [i915]] enabling pipe B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.469764] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL C (active 4, on? 0) for crtc 58
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.469823] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL C
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.470018] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.470074] [drm:skl_set_power_well [i915]] Enabling DDI C IO power well
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.471128] [drm:intel_enable_pipe [i915]] enabling pipe C
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.489062] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:60:eDP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.489158] [drm:intel_atomic_commit_tail [i915]] [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.489365] [drm:intel_ddi_get_config [i915]] pipe has 24 bpp for eDP panel, overriding BIOS-provided max 18 bpp
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.489472] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL A
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.489716] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:68:DP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.489819] [drm:intel_atomic_commit_tail [i915]] [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.490021] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.490288] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.490406] [drm:intel_atomic_commit_tail [i915]] [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.490608] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL C
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.490744] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.490917] [drm:__drm_atomic_state_free] Freeing atomic state ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.490998] Console: switching to colour frame buffer device 240x67
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491557] [drm:drm_atomic_state_init] Allocated atomic state ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491574] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff8801759c4a88 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491592] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880175a2c258 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491609] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff8801759c4a88
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491614] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175a2c258 to [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491619] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880175a2c258
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491625] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491647] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff880179f16918 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491656] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880179f16918 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491661] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880179f16918 to [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491674] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff8801757c0958 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491686] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880175a2f9d8 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491699] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff8801757c0958
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491703] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175a2f9d8 to [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491707] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880175a2f9d8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491712] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491726] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff880179f16008 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491733] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880179f16008 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491738] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880179f16008 to [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491751] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff8801757c0008 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491763] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880175a2c4a8 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491775] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff8801757c0008
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491779] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175a2c4a8 to [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491783] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880175a2c4a8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491788] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491803] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff880179f16578 state to ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491808] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880179f16578 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491813] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880179f16578 to [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491818] [drm:drm_atomic_check_only] checking ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491836] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491842] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491846] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491851] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491855] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491860] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.491957] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.492044] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.492130] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.492215] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.492320] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.492403] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.492424] [drm:drm_atomic_commit] committing ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.505523] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.505661] [drm:__drm_atomic_state_free] Freeing atomic state ffff880175983a78
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.521955] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.623686] EXT4-fs (sda2): mounted filesystem with ordered data mode. Opts: (null)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   11.778155] [drm] RC6 on
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   12.338651] EXT4-fs (sda2): re-mounted. Opts: (null)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.408415] snd_hda_intel 0000:00:0e.0: bound 0000:00:02.0 (ops i915_audio_component_bind_ops [i915])
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.409028] sdhci-pci 0000:00:1b.0: SDHCI controller found [8086:31ca] (rev 1)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.437614] [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=65472/65535
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.437688] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 65472
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.448819] snd_hda_codec_realtek hdaudioC0D0: autoconfig for ALC298: line_outs=1 (0x14/0x0/0x0/0x0/0x0) type:speaker
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.448825] snd_hda_codec_realtek hdaudioC0D0:    speaker_outs=0 (0x0/0x0/0x0/0x0/0x0)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.448828] snd_hda_codec_realtek hdaudioC0D0:    hp_outs=1 (0x21/0x0/0x0/0x0/0x0)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.448831] snd_hda_codec_realtek hdaudioC0D0:    mono: mono_out=0x0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.448833] snd_hda_codec_realtek hdaudioC0D0:    inputs:
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.448837] snd_hda_codec_realtek hdaudioC0D0:      Mic=0x18
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.448840] snd_hda_codec_realtek hdaudioC0D0:      Internal Mic=0x12
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.460398] sdhci-pci 0000:00:1b.0: SDHCI controller found [8086:31ca] (rev 1)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.496831] sdhci-pci 0000:00:1b.0: SDHCI controller found [8086:31ca] (rev 1)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.504830] input: HDA Intel PCH Mic as /devices/pci0000:00/0000:00:0e.0/sound/card0/input4
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.505911] input: HDA Intel PCH Headphone as /devices/pci0000:00/0000:00:0e.0/sound/card0/input5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.555639] sdhci-pci 0000:00:1b.0: SDHCI controller found [8086:31ca] (rev 1)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571570] [drm:drm_atomic_state_init] Allocated atomic state ffff880175945a58
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571591] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880177606fc8 state to ffff880175945a58
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571600] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880177f129a8 state to ffff880175945a58
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571621] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177606fc8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571624] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177f129a8 to [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571627] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880177f129a8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571631] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880175945a58
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571658] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff8801781cecb8 state to ffff880175945a58
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571668] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801781cecb8 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571671] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801781cecb8 to [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571681] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880177606678 state to ffff880175945a58
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571688] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880177f12bf8 state to ffff880175945a58
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571697] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177606678
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571700] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177f12bf8 to [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571702] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880177f12bf8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571705] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff880175945a58
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571715] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff8801781cf058 state to ffff880175945a58
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571718] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801781cf058 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571721] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801781cf058 to [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571730] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880177600958 state to ffff880175945a58
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571737] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880177f10948 state to ffff880175945a58
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571746] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177600958
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571748] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177f10948 to [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571750] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880177f10948
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571753] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff880175945a58
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571763] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff8801781ce578 state to ffff880175945a58
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571766] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801781ce578 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571769] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801781ce578 to [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571771] [drm:drm_atomic_check_only] checking ffff880175945a58
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571785] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571789] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571791] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571795] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571797] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571800] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571874] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571921] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.571969] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.572014] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.572061] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.572105] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.572127] [drm:drm_atomic_commit] committing ffff880175945a58
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.588662] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880175945a58
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.588748] [drm:__drm_atomic_state_free] Freeing atomic state ffff880175945a58
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.718778] Adding 16642044k swap on /dev/sda3.  Priority:-1 extents:1 across:16642044k SSFS
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.725230] FAT-fs (sda1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck.
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733658] [drm:drm_atomic_state_init] Allocated atomic state ffff880166800aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733673] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880178370958 state to ffff880166800aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733681] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880175a2c4a8 state to ffff880166800aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733695] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880178370958
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733698] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175a2c4a8 to [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733701] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880175a2c4a8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733705] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880166800aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733720] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff8801780cecb8 state to ffff880166800aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733726] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801780cecb8 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733729] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801780cecb8 to [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733738] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880178372548 state to ffff880166800aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733745] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880175a2f9d8 state to ffff880166800aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733753] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880178372548
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733756] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175a2f9d8 to [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733758] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880175a2f9d8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733762] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff880166800aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733772] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff880179efd3f8 state to ffff880166800aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733776] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880179efd3f8 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733778] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880179efd3f8 to [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733787] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880178374138 state to ffff880166800aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733794] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880175a2c258 state to ffff880166800aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733802] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880178374138
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733804] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175a2c258 to [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733807] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880175a2c258
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733810] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff880166800aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733819] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff880179efcae8 state to ffff880166800aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733822] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880179efcae8 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733825] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880179efcae8 to [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733827] [drm:drm_atomic_check_only] checking ffff880166800aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733840] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733844] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733846] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733849] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733852] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733855] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733931] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.733979] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.734027] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.734073] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.734119] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.734164] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.734198] [drm:drm_atomic_commit] committing ffff880166800aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.748076] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880166800aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.748162] [drm:__drm_atomic_state_free] Freeing atomic state ffff880166800aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782209] [drm:drm_atomic_state_init] Allocated atomic state ffff880166807a38
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782222] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff8801783712a8 state to ffff880166807a38
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782232] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880175ae7098 state to ffff880166807a38
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782244] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff8801783712a8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782247] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175ae7098 to [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782250] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880175ae7098
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782254] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880166807a38
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782269] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff8801782f4748 state to ffff880166807a38
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782274] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801782f4748 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782278] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801782f4748 to [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782286] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff8801783753d8 state to ffff880166807a38
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782294] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880175ae54d8 state to ffff880166807a38
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782302] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff8801783753d8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782304] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175ae54d8 to [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782307] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880175ae54d8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782310] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff880166807a38
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782319] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff8801782f53f8 state to ffff880166807a38
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782323] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801782f53f8 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782325] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801782f53f8 to [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782334] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880177606fc8 state to ffff880166807a38
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782341] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880175ae5978 state to ffff880166807a38
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782349] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177606fc8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782351] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175ae5978 to [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782354] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880175ae5978
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782357] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff880166807a38
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782366] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff8801782f4008 state to ffff880166807a38
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782369] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801782f4008 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782372] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801782f4008 to [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782374] [drm:drm_atomic_check_only] checking ffff880166807a38
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782387] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782391] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782393] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782396] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782399] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782402] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782474] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782522] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782570] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782616] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782662] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782707] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.782724] [drm:drm_atomic_commit] committing ffff880166807a38
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.797249] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880166807a38
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.797336] [drm:__drm_atomic_state_free] Freeing atomic state ffff880166807a38
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.811882] [drm:drm_atomic_state_init] Allocated atomic state ffff88017660d508
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.811894] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880178374138 state to ffff88017660d508
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.811903] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880175496758 state to ffff88017660d508
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.811915] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880178374138
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.811918] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175496758 to [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.811921] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880175496758
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.811925] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88017660d508
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.811939] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff8801780cf228 state to ffff88017660d508
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.811944] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801780cf228 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.811948] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801780cf228 to [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.811956] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880178372548 state to ffff88017660d508
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.811964] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff8801754954d8 state to ffff88017660d508
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.811972] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880178372548
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.811974] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801754954d8 to [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.811977] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff8801754954d8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.811980] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff88017660d508
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.811989] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff8801780ce1d8 state to ffff88017660d508
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.811992] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801780ce1d8 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.811995] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801780ce1d8 to [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.812004] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880178370958 state to ffff88017660d508
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.812011] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff8801754969a8 state to ffff88017660d508
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.812019] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880178370958
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.812021] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801754969a8 to [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.812024] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff8801754969a8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.812027] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff88017660d508
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.812036] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff8801780cf798 state to ffff88017660d508
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.812039] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801780cf798 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.812041] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801780cf798 to [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.812044] [drm:drm_atomic_check_only] checking ffff88017660d508
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.812057] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.812061] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.812063] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.812066] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.812069] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.812072] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.812146] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.812194] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.812268] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.812314] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.812358] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.812401] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.812417] [drm:drm_atomic_commit] committing ffff88017660d508
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.822186] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88017660d508
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.822304] [drm:__drm_atomic_state_free] Freeing atomic state ffff88017660d508
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861084] [drm:drm_atomic_state_init] Allocated atomic state ffff880176608aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861099] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880177606fc8 state to ffff880176608aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861108] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880175497538 state to ffff880176608aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861120] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177606fc8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861123] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175497538 to [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861126] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880175497538
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861130] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880176608aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861146] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff8801776da3a8 state to ffff880176608aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861151] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801776da3a8 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861155] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801776da3a8 to [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861163] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880177600958 state to ffff880176608aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861210] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880175496508 state to ffff880176608aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861219] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177600958
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861222] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175496508 to [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861224] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880175496508
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861227] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff880176608aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861237] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff8801776dbb38 state to ffff880176608aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861241] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801776dbb38 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861244] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801776dbb38 to [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861254] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880177601bf8 state to ffff880176608aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861261] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880177f10948 state to ffff880176608aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861269] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177601bf8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861272] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177f10948 to [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861274] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880177f10948
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861277] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff880176608aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861287] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff8801776da578 state to ffff880176608aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861290] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801776da578 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861293] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801776da578 to [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861295] [drm:drm_atomic_check_only] checking ffff880176608aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861309] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861313] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861315] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861319] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861321] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861324] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861397] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861446] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861494] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861540] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861586] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861632] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.861649] [drm:drm_atomic_commit] committing ffff880176608aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.871972] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880176608aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.872058] [drm:__drm_atomic_state_free] Freeing atomic state ffff880176608aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885166] [drm:drm_atomic_state_init] Allocated atomic state ffff88017ab10aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885213] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880177130008 state to ffff88017ab10aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885222] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff8801754969a8 state to ffff88017ab10aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885235] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177130008
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885238] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801754969a8 to [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885241] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff8801754969a8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885245] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88017ab10aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885261] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff8801776db5c8 state to ffff88017ab10aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885267] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801776db5c8 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885270] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801776db5c8 to [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885279] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880177136fc8 state to ffff88017ab10aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885287] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880175496758 state to ffff88017ab10aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885296] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177136fc8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885298] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175496758 to [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885300] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880175496758
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885304] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff88017ab10aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885313] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff8801776da748 state to ffff88017ab10aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885317] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801776da748 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885320] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801776da748 to [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885329] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880177130958 state to ffff88017ab10aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885337] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff8801754954d8 state to ffff88017ab10aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885345] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177130958
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885347] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801754954d8 to [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885350] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff8801754954d8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885353] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff88017ab10aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885362] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff8801776da1d8 state to ffff88017ab10aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885366] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801776da1d8 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885369] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801776da1d8 to [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885371] [drm:drm_atomic_check_only] checking ffff88017ab10aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885384] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885388] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885390] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885394] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885397] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885400] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885473] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885521] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885569] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885615] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885662] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885708] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.885724] [drm:drm_atomic_commit] committing ffff88017ab10aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.897101] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88017ab10aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.897316] [drm:__drm_atomic_state_free] Freeing atomic state ffff88017ab10aa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.919846] r8169 0000:01:00.0 enp1s0: link down
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.920426] r8169 0000:01:00.0 enp1s0: link down
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   13.922947] IPv6: ADDRCONF(NETDEV_UP): enp1s0: link is not ready
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   14.149177] random: crng init done
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   14.550804] new mount options do not match the existing superblock, will be ignored
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   16.450319] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   16.450421] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000067
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   16.450502] [drm:intel_power_well_disable [i915]] disabling AUX A
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   16.450658] [drm:skl_set_power_well [i915]] Disabling AUX A
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   17.972116] r8169 0000:01:00.0 enp1s0: link up
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   17.972148] IPv6: ADDRCONF(NETDEV_CHANGE): enp1s0: link becomes ready
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796084] [drm:drm_atomic_state_init] Allocated atomic state ffff880160e1a538
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796132] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880160cd0008 state to ffff880160e1a538
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796158] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880163571e18 state to ffff880160e1a538
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796260] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880160cd0008
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796268] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163571e18 to [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796277] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880163571e18
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796288] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880160e1a538
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796362] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff880160d86748 state to ffff880160e1a538
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796391] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880160d86748 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796400] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880160d86748 to [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796425] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880160cd6678 state to ffff880160e1a538
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796447] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880163572508 state to ffff880160e1a538
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796470] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880160cd6678
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796477] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163572508 to [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796484] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880163572508
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796493] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff880160e1a538
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796518] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff880160d863a8 state to ffff880160e1a538
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796530] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880160d863a8 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796538] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880160d863a8 to [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796561] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880160cd1bf8 state to ffff880160e1a538
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796581] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880163571bc8 state to ffff880160e1a538
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796603] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880160cd1bf8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796610] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163571bc8 to [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796617] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880163571bc8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796626] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff880160e1a538
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796653] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff880160d873f8 state to ffff880160e1a538
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796662] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880160d873f8 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796669] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880160d873f8 to [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796676] [drm:drm_atomic_check_only] checking ffff880160e1a538
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796705] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796716] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796723] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796732] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796738] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796747] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.796914] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.797045] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.797174] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.797399] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.797526] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.797648] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.797705] [drm:drm_atomic_commit] committing ffff880160e1a538
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.808876] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880160e1a538
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   19.808962] [drm:__drm_atomic_state_free] Freeing atomic state ffff880160e1a538
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.994099] [drm:drm_fb_helper_hotplug_event] 
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.994116] [drm:drm_setup_crtcs] 
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.994140] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:60:eDP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.994260] [drm:intel_dp_detect [i915]] [CONNECTOR:60:eDP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.994336] [drm:intel_power_well_enable [i915]] enabling AUX A
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.994439] [drm:skl_set_power_well [i915]] Enabling AUX A
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.994490] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.994539] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.994586] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.994633] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.994743] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.994873] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006f
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.995531] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.996342] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.996357] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:60:eDP-1] probed modes :
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.996364] [drm:drm_mode_debug_printmodeline] Modeline 61:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.996370] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:68:DP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.996433] [drm:intel_dp_detect [i915]] [CONNECTOR:68:DP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.996477] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.996537] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.997586] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 80 02 00 00 00 00 00 00
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.998609] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.998656] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.998702] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.998746] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.999863] [drm:drm_dp_read_desc] DP sink: OUI 00-e0-4c dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   20.999916] [drm:intel_dp_detect [i915]] Sink is not MST capable
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.009839] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.009940] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.010045] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.010112] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:68:DP-1] probed modes :
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.010119] [drm:drm_mode_debug_printmodeline] Modeline 78:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.010124] [drm:drm_mode_debug_printmodeline] Modeline 81:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.010129] [drm:drm_mode_debug_printmodeline] Modeline 86:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.010133] [drm:drm_mode_debug_printmodeline] Modeline 80:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.010138] [drm:drm_mode_debug_printmodeline] Modeline 79:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.010142] [drm:drm_mode_debug_printmodeline] Modeline 87:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.010146] [drm:drm_mode_debug_printmodeline] Modeline 88:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.010151] [drm:drm_mode_debug_printmodeline] Modeline 89:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.010155] [drm:drm_mode_debug_printmodeline] Modeline 82:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.010160] [drm:drm_mode_debug_printmodeline] Modeline 83:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.010164] [drm:drm_mode_debug_printmodeline] Modeline 84:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.010312] [drm:drm_mode_debug_printmodeline] Modeline 85:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.010321] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.010371] [drm:intel_hdmi_detect [i915]] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.012334] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.012396] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.014353] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.014365] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.016348] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.016396] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.018512] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.018525] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.018533] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1] disconnected
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.018542] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.018595] [drm:intel_hdmi_detect [i915]] [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.092337] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.092404] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.094567] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.094581] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.094591] [drm:drm_rgb_quant_range_selectable] CEA VCDB 0x2b
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.094917] [drm:drm_add_edid_modes] HDMI: DVI dual 0, max TMDS clock 170000 kHz
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.094923] [drm:drm_edid_to_eld] ELD monitor HP E232
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.094929] [drm:drm_edid_to_eld] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.094934] [drm:drm_edid_to_eld] ELD size 28, SAD count 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095581] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:75:HDMI-A-2] probed modes :
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095591] [drm:drm_mode_debug_printmodeline] Modeline 91:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095598] [drm:drm_mode_debug_printmodeline] Modeline 113:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095604] [drm:drm_mode_debug_printmodeline] Modeline 93:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095611] [drm:drm_mode_debug_printmodeline] Modeline 98:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095618] [drm:drm_mode_debug_printmodeline] Modeline 97:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095627] [drm:drm_mode_debug_printmodeline] Modeline 101:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095633] [drm:drm_mode_debug_printmodeline] Modeline 99:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095640] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095646] [drm:drm_mode_debug_printmodeline] Modeline 94:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095653] [drm:drm_mode_debug_printmodeline] Modeline 115:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095659] [drm:drm_mode_debug_printmodeline] Modeline 95:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095666] [drm:drm_mode_debug_printmodeline] Modeline 104:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095673] [drm:drm_mode_debug_printmodeline] Modeline 102:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095681] [drm:drm_mode_debug_printmodeline] Modeline 111:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095687] [drm:drm_mode_debug_printmodeline] Modeline 116:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095694] [drm:drm_mode_debug_printmodeline] Modeline 96:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095700] [drm:drm_mode_debug_printmodeline] Modeline 117:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095707] [drm:drm_mode_debug_printmodeline] Modeline 103:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095747] [drm:drm_setup_crtcs] connector 60 enabled? yes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095753] [drm:drm_setup_crtcs] connector 68 enabled? yes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095759] [drm:drm_setup_crtcs] connector 72 enabled? no
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095764] [drm:drm_setup_crtcs] connector 75 enabled? yes
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095847] [drm:intel_fb_initial_config [i915]] Not using firmware configuration
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095867] [drm:drm_setup_crtcs] looking for cmdline mode on connector 60
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095873] [drm:drm_setup_crtcs] looking for preferred mode on connector 60 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095878] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095885] [drm:drm_setup_crtcs] looking for cmdline mode on connector 68
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095890] [drm:drm_setup_crtcs] looking for preferred mode on connector 68 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095895] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095899] [drm:drm_setup_crtcs] looking for cmdline mode on connector 75
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095904] [drm:drm_setup_crtcs] looking for preferred mode on connector 75 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095909] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.095913] [drm:drm_setup_crtcs] picking CRTCs for 1920x1080 config
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096125] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 36 (0,0)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096140] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 47 (0,0)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096152] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 58 (0,0)
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096275] [drm:drm_atomic_state_init] Allocated atomic state ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096291] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880175aa4de8 state to ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096309] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880177130008 state to ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096322] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 2A] ffff880175aa4258 state to ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096329] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175aa4258 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096335] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175aa4258
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096347] [drm:drm_atomic_get_plane_state] Added [PLANE:30:plane 3A] ffff880175aa7098 state to ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096352] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175aa7098 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096357] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175aa7098
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096370] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane 4A] ffff880179efb2e8 state to ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096376] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880179efb2e8 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096381] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880179efb2e8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096393] [drm:drm_atomic_get_plane_state] Added [PLANE:34:cursor A] ffff880177f129a8 state to ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096398] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177f129a8 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096403] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880177f129a8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096418] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880163570de8 state to ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096431] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880177130958 state to ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096445] [drm:drm_atomic_get_plane_state] Added [PLANE:39:plane 2B] ffff8801637ea2b8 state to ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096450] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801637ea2b8 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096455] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801637ea2b8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096470] [drm:drm_atomic_get_plane_state] Added [PLANE:41:plane 3B] ffff880163f839d8 state to ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096475] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163f839d8 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096481] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163f839d8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096493] [drm:drm_atomic_get_plane_state] Added [PLANE:43:plane 4B] ffff880163f80258 state to ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096498] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163f80258 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096503] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163f80258
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096515] [drm:drm_atomic_get_plane_state] Added [PLANE:45:cursor B] ffff880163f80948 state to ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096520] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163f80948 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096525] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163f80948
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096537] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880163f82e48 state to ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096551] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880177131bf8 state to ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096564] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 2C] ffff880163f81728 state to ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096568] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163f81728 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096574] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163f81728
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096586] [drm:drm_atomic_get_plane_state] Added [PLANE:52:plane 3C] ffff880163f806f8 state to ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096591] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163f806f8 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096596] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163f806f8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096608] [drm:drm_atomic_get_plane_state] Added [PLANE:54:plane 4C] ffff880163f829a8 state to ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096614] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163f829a8 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096619] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163f829a8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096631] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor C] ffff880163f82068 state to ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096636] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163f82068 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096641] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163f82068
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096657] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177130008
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096662] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175aa4de8 to [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096668] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880175aa4de8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096675] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096720] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff88015e553d08 state to ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096748] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88015e553d08 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096755] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88015e553d08 to [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096769] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177130958
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096774] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163570de8 to [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096779] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880163570de8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096788] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096802] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff88015e552578 state to ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096810] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88015e552578 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096816] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88015e552578 to [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096830] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177131bf8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096835] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163f82e48 to [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096840] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880163f82e48
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096847] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096863] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff88015e552ae8 state to ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096870] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88015e552ae8 to [NOCRTC]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096876] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88015e552ae8 to [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096881] [drm:drm_atomic_check_only] checking ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096897] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096905] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096910] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096918] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096923] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.096929] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.097010] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.097080] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.097150] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.097217] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.097313] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.097379] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.097416] [drm:drm_atomic_commit] committing ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.107818] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   21.108035] [drm:__drm_atomic_state_free] Freeing atomic state ffff88015e49dfa8
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   24.001897] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   24.002031] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000067
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   24.002139] [drm:intel_power_well_disable [i915]] disabling AUX A
>Jun 29 10:25:14 GLK-2-GLKRVP1DDR405 kernel: [   24.002370] [drm:skl_set_power_well [i915]] Disabling AUX A
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.560300] Console: switching to colour dummy device 80x25
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.596440] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.596563] [drm:intel_hdmi_detect [i915]] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.598343] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.598417] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.600308] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.600318] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.602321] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.602370] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.604501] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.604511] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.604518] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1] disconnected
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.605067] [drm:status_store] [CONNECTOR:72:HDMI-A-1] force updated from 0 to 2 or reprobing
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.605113] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.605208] [drm:intel_hdmi_force [i915]] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.607361] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.607429] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.609296] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.609304] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.611341] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.611393] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.613410] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.613423] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.613431] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1] status updated from disconnected to connected
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.613822] [drm:do_detailed_mode] composite sync not supported
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.614014] [drm:drm_add_edid_modes] HDMI: DVI dual 0, max TMDS clock 0 kHz
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.614020] [drm:drm_edid_to_eld] ELD monitor IGT
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.614025] [drm:drm_edid_to_eld] HDMI: latency present 0 0, video latency 0 1, audio latency 32 0
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.614029] [drm:drm_edid_to_eld] ELD size 24, SAD count 0
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.614081] [drm:drm_mode_debug_printmodeline] Modeline 129:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.614085] [drm:drm_mode_prune_invalid] Not using 3840x2160 mode: CLOCK_HIGH
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.614097] [drm:drm_mode_debug_printmodeline] Modeline 136:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.614101] [drm:drm_mode_prune_invalid] Not using 3840x2160 mode: CLOCK_HIGH
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.614116] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1] probed modes :
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.614122] [drm:drm_mode_debug_printmodeline] Modeline 109:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1105 1125 0x48 0xa
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.614127] [drm:drm_mode_debug_printmodeline] Modeline 125:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.614132] [drm:drm_mode_debug_printmodeline] Modeline 134:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.614138] [drm:drm_mode_debug_printmodeline] Modeline 126:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.614143] [drm:drm_mode_debug_printmodeline] Modeline 124:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.614148] [drm:drm_mode_debug_printmodeline] Modeline 133:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.614153] [drm:drm_mode_debug_printmodeline] Modeline 110:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.614158] [drm:drm_mode_debug_printmodeline] Modeline 130:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.614163] [drm:drm_mode_debug_printmodeline] Modeline 128:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.614169] [drm:drm_mode_debug_printmodeline] Modeline 118:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.614174] [drm:drm_mode_debug_printmodeline] Modeline 119:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.614179] [drm:drm_mode_debug_printmodeline] Modeline 131:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.614184] [drm:drm_mode_debug_printmodeline] Modeline 120:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.614339] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.614412] [drm:intel_hdmi_force [i915]] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.616311] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.616367] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.618645] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.618661] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.620339] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.620395] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622356] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622370] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622382] [drm:do_detailed_mode] composite sync not supported
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622552] [drm:drm_add_edid_modes] HDMI: DVI dual 0, max TMDS clock 0 kHz
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622557] [drm:drm_edid_to_eld] ELD monitor IGT
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622562] [drm:drm_edid_to_eld] HDMI: latency present 0 0, video latency 0 1, audio latency 32 0
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622566] [drm:drm_edid_to_eld] ELD size 24, SAD count 0
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622667] [drm:drm_mode_debug_printmodeline] Modeline 142:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622671] [drm:drm_mode_prune_invalid] Not using 3840x2160 mode: CLOCK_HIGH
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622682] [drm:drm_mode_debug_printmodeline] Modeline 149:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622685] [drm:drm_mode_prune_invalid] Not using 3840x2160 mode: CLOCK_HIGH
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622707] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1] probed modes :
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622729] [drm:drm_mode_debug_printmodeline] Modeline 109:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1105 1125 0x48 0xa
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622735] [drm:drm_mode_debug_printmodeline] Modeline 125:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622740] [drm:drm_mode_debug_printmodeline] Modeline 134:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622745] [drm:drm_mode_debug_printmodeline] Modeline 126:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622750] [drm:drm_mode_debug_printmodeline] Modeline 124:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622755] [drm:drm_mode_debug_printmodeline] Modeline 133:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622760] [drm:drm_mode_debug_printmodeline] Modeline 110:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622765] [drm:drm_mode_debug_printmodeline] Modeline 130:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622770] [drm:drm_mode_debug_printmodeline] Modeline 128:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622774] [drm:drm_mode_debug_printmodeline] Modeline 118:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622779] [drm:drm_mode_debug_printmodeline] Modeline 119:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622784] [drm:drm_mode_debug_printmodeline] Modeline 131:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.622789] [drm:drm_mode_debug_printmodeline] Modeline 120:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.627462] [drm:status_store] [CONNECTOR:72:HDMI-A-1] force updated from 2 to 0 or reprobing
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.627470] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.627544] [drm:intel_hdmi_detect [i915]] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.629332] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.629383] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.631313] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.631322] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.633302] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.633352] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.635607] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.635628] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.635639] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1] status updated from connected to disconnected
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.635643] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1] disconnected
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653000] [drm:drm_atomic_state_init] Allocated atomic state ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653032] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880175ae5038 state to ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653053] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880160e0a548 state to ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653067] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 2A] ffff880175ae4de8 state to ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653073] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175ae4de8 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653078] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175ae4de8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653095] [drm:drm_atomic_get_plane_state] Added [PLANE:30:plane 3A] ffff880163570258 state to ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653099] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163570258 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653104] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163570258
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653117] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane 4A] ffff880163571e18 state to ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653122] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163571e18 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653126] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163571e18
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653139] [drm:drm_atomic_get_plane_state] Added [PLANE:34:cursor A] ffff8801635739d8 state to ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653143] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801635739d8 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653147] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801635739d8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653160] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880163572508 state to ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653175] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880160e092a8 state to ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653189] [drm:drm_atomic_get_plane_state] Added [PLANE:39:plane 2B] ffff880163573788 state to ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653193] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163573788 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653223] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163573788
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653238] [drm:drm_atomic_get_plane_state] Added [PLANE:41:plane 3B] ffff880163571bc8 state to ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653242] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163571bc8 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653246] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163571bc8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653259] [drm:drm_atomic_get_plane_state] Added [PLANE:43:plane 4B] ffff880163573c28 state to ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653263] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163573c28 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653267] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163573c28
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653280] [drm:drm_atomic_get_plane_state] Added [PLANE:45:cursor B] ffff880163572068 state to ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653284] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163572068 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653288] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163572068
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653300] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880163573538 state to ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653316] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880160e0c138 state to ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653329] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 2C] ffff880163570008 state to ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653334] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163570008 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653337] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163570008
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653351] [drm:drm_atomic_get_plane_state] Added [PLANE:52:plane 3C] ffff8801635732e8 state to ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653355] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801635732e8 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653359] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801635732e8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653373] [drm:drm_atomic_get_plane_state] Added [PLANE:54:plane 4C] ffff880163572bf8 state to ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653377] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163572bf8 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653381] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163572bf8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653393] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor C] ffff8801635704a8 state to ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653397] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801635704a8 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653401] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801635704a8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653443] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880160e0a548
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653448] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175ae5038 to [CRTC:36:pipe A]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653453] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880175ae5038
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653460] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653514] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff880160fb8748 state to ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653536] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880160fb8748 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653542] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880160fb8748 to [CRTC:36:pipe A]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653558] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880160e092a8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653563] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163572508 to [CRTC:47:pipe B]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653567] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880163572508
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653573] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653589] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff880160fb93f8 state to ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653597] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880160fb93f8 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653603] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880160fb93f8 to [CRTC:47:pipe B]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653618] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880160e0c138
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653622] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163573538 to [CRTC:58:pipe C]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653627] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880163573538
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653632] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653650] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff8801780cf228 state to ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653656] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801780cf228 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653661] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801780cf228 to [CRTC:58:pipe C]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653666] [drm:drm_atomic_check_only] checking ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653687] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653695] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653699] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653705] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653709] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653715] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653831] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.653918] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.654004] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.654087] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.654170] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.654252] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.654317] [drm:drm_atomic_commit] committing ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.672401] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.672652] [drm:__drm_atomic_state_free] Freeing atomic state ffff88015e49e4f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.673137] Console: switching to colour frame buffer device 240x67
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694533] [drm:drm_atomic_state_init] Allocated atomic state ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694564] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880163570de8 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694578] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880160e0ca88 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694587] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 2A] ffff880163571288 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694591] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163571288 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694594] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163571288
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694602] [drm:drm_atomic_get_plane_state] Added [PLANE:30:plane 3A] ffff880163573098 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694607] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163573098 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694610] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163573098
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694619] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane 4A] ffff880163571728 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694622] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163571728 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694625] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163571728
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694634] [drm:drm_atomic_get_plane_state] Added [PLANE:34:cursor A] ffff880179efb2e8 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694637] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880179efb2e8 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694640] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880179efb2e8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694648] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880179efb098 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694657] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880160e08958 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694665] [drm:drm_atomic_get_plane_state] Added [PLANE:39:plane 2B] ffff880179ef8b98 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694669] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880179ef8b98 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694672] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880179ef8b98
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694681] [drm:drm_atomic_get_plane_state] Added [PLANE:41:plane 3B] ffff880175aa7098 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694684] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175aa7098 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694687] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175aa7098
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694696] [drm:drm_atomic_get_plane_state] Added [PLANE:43:plane 4B] ffff880175aa4008 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694699] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175aa4008 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694702] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175aa4008
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694710] [drm:drm_atomic_get_plane_state] Added [PLANE:45:cursor B] ffff880175aa4258 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694713] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175aa4258 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694716] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175aa4258
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694724] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880175aa7c28 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694734] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880160e0efc8 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694742] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 2C] ffff880175aa4de8 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694745] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175aa4de8 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694748] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175aa4de8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694756] [drm:drm_atomic_get_plane_state] Added [PLANE:52:plane 3C] ffff880175aa79d8 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694760] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175aa79d8 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694763] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175aa79d8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694771] [drm:drm_atomic_get_plane_state] Added [PLANE:54:plane 4C] ffff880175aa4b98 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694774] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175aa4b98 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694777] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175aa4b98
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694785] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor C] ffff880175aa44a8 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694788] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175aa44a8 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694792] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175aa44a8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694837] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880160e0ca88
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694840] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163570de8 to [CRTC:36:pipe A]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694844] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880163570de8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694849] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694881] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff8801780ce3a8 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694924] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801780ce3a8 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694929] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801780ce3a8 to [CRTC:36:pipe A]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694939] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880160e08958
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694943] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880179efb098 to [CRTC:47:pipe B]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694946] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880179efb098
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694950] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694961] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff8801780ce008 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694966] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801780ce008 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694970] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801780ce008 to [CRTC:47:pipe B]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694980] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880160e0efc8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694983] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175aa7c28 to [CRTC:58:pipe C]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694987] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880175aa7c28
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.694991] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.695002] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff8801780cecb8 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.695006] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801780cecb8 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.695010] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801780cecb8 to [CRTC:58:pipe C]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.695014] [drm:drm_atomic_check_only] checking ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.695029] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.695035] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.695038] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.695042] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.695046] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.695050] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.695124] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.695172] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.695221] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.695299] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.695349] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.695397] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.695425] [drm:drm_atomic_commit] committing ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.705599] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.705766] [drm:__drm_atomic_state_free] Freeing atomic state ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.705847] [drm:drm_fb_helper_hotplug_event] 
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.705872] [drm:drm_setup_crtcs] 
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.705888] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:60:eDP-1]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.705983] [drm:intel_dp_detect [i915]] [CONNECTOR:60:eDP-1]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.706074] [drm:intel_power_well_enable [i915]] enabling AUX A
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.706177] [drm:skl_set_power_well [i915]] Enabling AUX A
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.706234] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.706331] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.706386] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.706443] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.706597] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.706676] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006f
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.707668] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.708523] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.708540] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:60:eDP-1] probed modes :
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.708548] [drm:drm_mode_debug_printmodeline] Modeline 61:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.708554] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:68:DP-1]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.708618] [drm:intel_dp_detect [i915]] [CONNECTOR:68:DP-1]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.708669] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.708721] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.709982] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 80 02 00 00 00 00 00 00
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.711032] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.711102] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.711168] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.711232] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.712307] [drm:drm_dp_read_desc] DP sink: OUI 00-e0-4c dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.712375] [drm:intel_dp_detect [i915]] Sink is not MST capable
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.722461] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.722506] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.722619] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.722676] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:68:DP-1] probed modes :
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.722682] [drm:drm_mode_debug_printmodeline] Modeline 78:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.722686] [drm:drm_mode_debug_printmodeline] Modeline 81:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.722690] [drm:drm_mode_debug_printmodeline] Modeline 86:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.722694] [drm:drm_mode_debug_printmodeline] Modeline 80:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.722699] [drm:drm_mode_debug_printmodeline] Modeline 79:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.722703] [drm:drm_mode_debug_printmodeline] Modeline 87:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.722707] [drm:drm_mode_debug_printmodeline] Modeline 88:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.722711] [drm:drm_mode_debug_printmodeline] Modeline 89:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.722715] [drm:drm_mode_debug_printmodeline] Modeline 82:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.722719] [drm:drm_mode_debug_printmodeline] Modeline 83:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.722723] [drm:drm_mode_debug_printmodeline] Modeline 84:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.722728] [drm:drm_mode_debug_printmodeline] Modeline 85:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.722733] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.722780] [drm:intel_hdmi_detect [i915]] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.724952] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.725012] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.727527] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.727546] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.730036] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.730085] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.732510] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.732531] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.732541] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1] disconnected
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.732551] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.732604] [drm:intel_hdmi_detect [i915]] [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.818383] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.818431] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.820804] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.820821] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.820830] [drm:drm_rgb_quant_range_selectable] CEA VCDB 0x2b
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821093] [drm:drm_add_edid_modes] HDMI: DVI dual 0, max TMDS clock 170000 kHz
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821097] [drm:drm_edid_to_eld] ELD monitor HP E232
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821102] [drm:drm_edid_to_eld] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821105] [drm:drm_edid_to_eld] ELD size 28, SAD count 0
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821680] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:75:HDMI-A-2] probed modes :
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821687] [drm:drm_mode_debug_printmodeline] Modeline 91:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821692] [drm:drm_mode_debug_printmodeline] Modeline 113:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821696] [drm:drm_mode_debug_printmodeline] Modeline 93:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821701] [drm:drm_mode_debug_printmodeline] Modeline 98:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821705] [drm:drm_mode_debug_printmodeline] Modeline 97:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821709] [drm:drm_mode_debug_printmodeline] Modeline 101:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821714] [drm:drm_mode_debug_printmodeline] Modeline 99:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821718] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821722] [drm:drm_mode_debug_printmodeline] Modeline 94:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821727] [drm:drm_mode_debug_printmodeline] Modeline 115:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821731] [drm:drm_mode_debug_printmodeline] Modeline 95:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821735] [drm:drm_mode_debug_printmodeline] Modeline 104:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821740] [drm:drm_mode_debug_printmodeline] Modeline 102:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821744] [drm:drm_mode_debug_printmodeline] Modeline 111:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821749] [drm:drm_mode_debug_printmodeline] Modeline 116:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821753] [drm:drm_mode_debug_printmodeline] Modeline 96:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821757] [drm:drm_mode_debug_printmodeline] Modeline 117:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821761] [drm:drm_mode_debug_printmodeline] Modeline 103:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821785] [drm:drm_setup_crtcs] connector 60 enabled? yes
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821789] [drm:drm_setup_crtcs] connector 68 enabled? yes
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821793] [drm:drm_setup_crtcs] connector 72 enabled? no
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821796] [drm:drm_setup_crtcs] connector 75 enabled? yes
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821862] [drm:intel_fb_initial_config [i915]] Not using firmware configuration
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821871] [drm:drm_setup_crtcs] looking for cmdline mode on connector 60
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821875] [drm:drm_setup_crtcs] looking for preferred mode on connector 60 0
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821879] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821882] [drm:drm_setup_crtcs] looking for cmdline mode on connector 68
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821885] [drm:drm_setup_crtcs] looking for preferred mode on connector 68 0
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821889] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821892] [drm:drm_setup_crtcs] looking for cmdline mode on connector 75
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821895] [drm:drm_setup_crtcs] looking for preferred mode on connector 75 0
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821898] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.821901] [drm:drm_setup_crtcs] picking CRTCs for 1920x1080 config
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822049] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 36 (0,0)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822058] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 47 (0,0)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822066] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 58 (0,0)
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822134] [drm:drm_atomic_state_init] Allocated atomic state ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822145] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880163f82508 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822160] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880177131bf8 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822168] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 2A] ffff880163f83788 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822172] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163f83788 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822176] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163f83788
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822184] [drm:drm_atomic_get_plane_state] Added [PLANE:30:plane 3A] ffff880163f804a8 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822187] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163f804a8 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822190] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163f804a8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822255] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane 4A] ffff880163f81728 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822262] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163f81728 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822268] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163f81728
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822280] [drm:drm_atomic_get_plane_state] Added [PLANE:34:cursor A] ffff880163f81e18 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822286] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163f81e18 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822292] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163f81e18
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822303] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880163f81288 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822316] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880177136fc8 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822327] [drm:drm_atomic_get_plane_state] Added [PLANE:39:plane 2B] ffff880163f814d8 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822332] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163f814d8 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822338] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163f814d8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822348] [drm:drm_atomic_get_plane_state] Added [PLANE:41:plane 3B] ffff880163f806f8 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822355] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163f806f8 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822361] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163f806f8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822371] [drm:drm_atomic_get_plane_state] Added [PLANE:43:plane 4B] ffff880163f839d8 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822378] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163f839d8 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822383] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163f839d8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822395] [drm:drm_atomic_get_plane_state] Added [PLANE:45:cursor B] ffff880163f81038 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822398] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163f81038 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822401] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163f81038
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822410] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880163f80258 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822420] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880177130958 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822428] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 2C] ffff880163f829a8 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822431] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163f829a8 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822436] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163f829a8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822444] [drm:drm_atomic_get_plane_state] Added [PLANE:52:plane 3C] ffff880163f80948 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822447] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163f80948 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822451] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163f80948
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822459] [drm:drm_atomic_get_plane_state] Added [PLANE:54:plane 4C] ffff880163f81bc8 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822463] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163f81bc8 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822467] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163f81bc8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822474] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor C] ffff880163f82068 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822478] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163f82068 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822481] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163f82068
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822494] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177131bf8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822500] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163f82508 to [CRTC:36:pipe A]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822506] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880163f82508
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822516] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822532] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff88016489eae8 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822540] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88016489eae8 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822544] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88016489eae8 to [CRTC:36:pipe A]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822554] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177136fc8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822557] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163f81288 to [CRTC:47:pipe B]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822566] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880163f81288
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822572] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822584] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff88016489e008 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822590] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88016489e008 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822595] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88016489e008 to [CRTC:47:pipe B]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822607] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177130958
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822612] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163f80258 to [CRTC:58:pipe C]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822618] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880163f80258
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822623] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822634] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff88016489f968 state to ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822642] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88016489f968 to [NOCRTC]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822646] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88016489f968 to [CRTC:58:pipe C]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822649] [drm:drm_atomic_check_only] checking ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822662] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822667] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822671] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822678] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822683] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822687] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822745] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822795] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822843] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822889] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822935] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.822981] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.823000] [drm:drm_atomic_commit] committing ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.838993] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88015e49dfa8
>Jun 29 10:40:19 GLK-2-GLKRVP1DDR405 kernel: [  942.839190] [drm:__drm_atomic_state_free] Freeing atomic state ffff88015e49dfa8
>Jun 29 10:40:22 GLK-2-GLKRVP1DDR405 kernel: [  945.729860] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>Jun 29 10:40:22 GLK-2-GLKRVP1DDR405 kernel: [  945.729956] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000067
>Jun 29 10:40:22 GLK-2-GLKRVP1DDR405 kernel: [  945.730034] [drm:intel_power_well_disable [i915]] disabling AUX A
>Jun 29 10:40:22 GLK-2-GLKRVP1DDR405 kernel: [  945.730111] [drm:skl_set_power_well [i915]] Disabling AUX A
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.833815] [drm:drm_fb_helper_hotplug_event] 
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.833831] [drm:drm_setup_crtcs] 
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.833850] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:60:eDP-1]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.834012] [drm:intel_dp_detect [i915]] [CONNECTOR:60:eDP-1]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.834138] [drm:intel_power_well_enable [i915]] enabling AUX A
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.834301] [drm:skl_set_power_well [i915]] Enabling AUX A
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.834511] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.834649] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.834781] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.834905] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.835122] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.835258] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006f
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.835980] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.837262] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.837301] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:60:eDP-1] probed modes :
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.837318] [drm:drm_mode_debug_printmodeline] Modeline 61:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.837331] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:68:DP-1]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.837460] [drm:intel_dp_detect [i915]] [CONNECTOR:68:DP-1]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.837578] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.837699] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.839055] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 80 02 00 00 00 00 00 00
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.840217] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.840413] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.840534] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.840654] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.841774] [drm:drm_dp_read_desc] DP sink: OUI 00-e0-4c dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.841899] [drm:intel_dp_detect [i915]] Sink is not MST capable
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.852020] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.852068] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.852162] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.852250] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:68:DP-1] probed modes :
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.852256] [drm:drm_mode_debug_printmodeline] Modeline 78:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.852261] [drm:drm_mode_debug_printmodeline] Modeline 81:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.852266] [drm:drm_mode_debug_printmodeline] Modeline 86:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.852270] [drm:drm_mode_debug_printmodeline] Modeline 80:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.852275] [drm:drm_mode_debug_printmodeline] Modeline 79:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.852284] [drm:drm_mode_debug_printmodeline] Modeline 87:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.852292] [drm:drm_mode_debug_printmodeline] Modeline 88:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.852300] [drm:drm_mode_debug_printmodeline] Modeline 89:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.852306] [drm:drm_mode_debug_printmodeline] Modeline 82:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.852311] [drm:drm_mode_debug_printmodeline] Modeline 83:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.852316] [drm:drm_mode_debug_printmodeline] Modeline 84:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.852320] [drm:drm_mode_debug_printmodeline] Modeline 85:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.852326] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.852374] [drm:intel_hdmi_detect [i915]] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.854304] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.854352] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.856310] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.856318] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.858370] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.858417] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.860348] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.860356] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.860362] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1] disconnected
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.860368] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.860419] [drm:intel_hdmi_detect [i915]] [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.942472] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.942521] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.944861] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.944880] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.944889] [drm:drm_rgb_quant_range_selectable] CEA VCDB 0x2b
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945125] [drm:drm_add_edid_modes] HDMI: DVI dual 0, max TMDS clock 170000 kHz
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945130] [drm:drm_edid_to_eld] ELD monitor HP E232
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945134] [drm:drm_edid_to_eld] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945138] [drm:drm_edid_to_eld] ELD size 28, SAD count 0
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945381] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:75:HDMI-A-2] probed modes :
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945388] [drm:drm_mode_debug_printmodeline] Modeline 91:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945393] [drm:drm_mode_debug_printmodeline] Modeline 113:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945398] [drm:drm_mode_debug_printmodeline] Modeline 93:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945402] [drm:drm_mode_debug_printmodeline] Modeline 98:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945407] [drm:drm_mode_debug_printmodeline] Modeline 97:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945411] [drm:drm_mode_debug_printmodeline] Modeline 101:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945416] [drm:drm_mode_debug_printmodeline] Modeline 99:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945420] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945425] [drm:drm_mode_debug_printmodeline] Modeline 94:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945429] [drm:drm_mode_debug_printmodeline] Modeline 115:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945434] [drm:drm_mode_debug_printmodeline] Modeline 95:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945438] [drm:drm_mode_debug_printmodeline] Modeline 104:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945445] [drm:drm_mode_debug_printmodeline] Modeline 102:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945449] [drm:drm_mode_debug_printmodeline] Modeline 111:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945453] [drm:drm_mode_debug_printmodeline] Modeline 116:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945458] [drm:drm_mode_debug_printmodeline] Modeline 96:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945462] [drm:drm_mode_debug_printmodeline] Modeline 117:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945467] [drm:drm_mode_debug_printmodeline] Modeline 103:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945489] [drm:drm_setup_crtcs] connector 60 enabled? yes
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945493] [drm:drm_setup_crtcs] connector 68 enabled? yes
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945496] [drm:drm_setup_crtcs] connector 72 enabled? no
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945500] [drm:drm_setup_crtcs] connector 75 enabled? yes
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945553] [drm:intel_fb_initial_config [i915]] Not using firmware configuration
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945563] [drm:drm_setup_crtcs] looking for cmdline mode on connector 60
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945567] [drm:drm_setup_crtcs] looking for preferred mode on connector 60 0
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945570] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945573] [drm:drm_setup_crtcs] looking for cmdline mode on connector 68
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945577] [drm:drm_setup_crtcs] looking for preferred mode on connector 68 0
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945581] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945584] [drm:drm_setup_crtcs] looking for cmdline mode on connector 75
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945589] [drm:drm_setup_crtcs] looking for preferred mode on connector 75 0
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945592] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945595] [drm:drm_setup_crtcs] picking CRTCs for 1920x1080 config
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945724] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 36 (0,0)
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945733] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 47 (0,0)
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945742] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 58 (0,0)
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945812] [drm:drm_atomic_state_init] Allocated atomic state ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945824] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880174dc22b8 state to ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945837] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880177134a88 state to ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945847] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 2A] ffff880174dc0258 state to ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945851] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174dc0258 to [NOCRTC]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945855] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174dc0258
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945864] [drm:drm_atomic_get_plane_state] Added [PLANE:30:plane 3A] ffff880174dc04a8 state to ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945868] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174dc04a8 to [NOCRTC]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945871] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174dc04a8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945880] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane 4A] ffff880174dc0de8 state to ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945883] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174dc0de8 to [NOCRTC]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945888] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174dc0de8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945897] [drm:drm_atomic_get_plane_state] Added [PLANE:34:cursor A] ffff880174dc3788 state to ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945900] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174dc3788 to [NOCRTC]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945903] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174dc3788
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945912] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880174dc2758 state to ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945922] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880177130008 state to ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945930] [drm:drm_atomic_get_plane_state] Added [PLANE:39:plane 2B] ffff880174dc1978 state to ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945933] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174dc1978 to [NOCRTC]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945937] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174dc1978
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945946] [drm:drm_atomic_get_plane_state] Added [PLANE:41:plane 3B] ffff880174dc0948 state to ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945949] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174dc0948 to [NOCRTC]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945952] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174dc0948
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945960] [drm:drm_atomic_get_plane_state] Added [PLANE:43:plane 4B] ffff880174dc1728 state to ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945964] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174dc1728 to [NOCRTC]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945968] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174dc1728
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945976] [drm:drm_atomic_get_plane_state] Added [PLANE:45:cursor B] ffff880174dc3098 state to ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945979] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174dc3098 to [NOCRTC]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945983] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174dc3098
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.945991] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880174dc39d8 state to ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946002] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff88017ab192a8 state to ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946010] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 2C] ffff880174dc0b98 state to ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946014] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174dc0b98 to [NOCRTC]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946017] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174dc0b98
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946028] [drm:drm_atomic_get_plane_state] Added [PLANE:52:plane 3C] ffff880175495e18 state to ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946032] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175495e18 to [NOCRTC]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946036] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175495e18
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946045] [drm:drm_atomic_get_plane_state] Added [PLANE:54:plane 4C] ffff880175496068 state to ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946049] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175496068 to [NOCRTC]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946052] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175496068
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946060] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor C] ffff8801754954d8 state to ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946064] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801754954d8 to [NOCRTC]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946067] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801754954d8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946076] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177134a88
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946080] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174dc22b8 to [CRTC:36:pipe A]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946085] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880174dc22b8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946090] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946105] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff880163758cb8 state to ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946111] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880163758cb8 to [NOCRTC]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946115] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880163758cb8 to [CRTC:36:pipe A]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946125] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177130008
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946129] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174dc2758 to [CRTC:47:pipe B]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946133] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880174dc2758
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946137] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946147] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff880163758ae8 state to ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946152] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880163758ae8 to [NOCRTC]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946157] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880163758ae8 to [CRTC:47:pipe B]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946165] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff88017ab192a8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946169] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174dc39d8 to [CRTC:58:pipe C]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946173] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880174dc39d8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946177] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946187] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff880163758e88 state to ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946192] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880163758e88 to [NOCRTC]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946229] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880163758e88 to [CRTC:58:pipe C]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946233] [drm:drm_atomic_check_only] checking ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946265] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946275] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946283] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946290] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946299] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946308] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946395] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946467] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946538] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946609] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946681] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946749] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.946776] [drm:drm_atomic_commit] committing ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.959315] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88015e49dfa8
>Jun 29 10:40:29 GLK-2-GLKRVP1DDR405 kernel: [  952.959499] [drm:__drm_atomic_state_free] Freeing atomic state ffff88015e49dfa8
>Jun 29 10:40:32 GLK-2-GLKRVP1DDR405 kernel: [  955.841871] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>Jun 29 10:40:32 GLK-2-GLKRVP1DDR405 kernel: [  955.842005] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000067
>Jun 29 10:40:32 GLK-2-GLKRVP1DDR405 kernel: [  955.842113] [drm:intel_power_well_disable [i915]] disabling AUX A
>Jun 29 10:40:32 GLK-2-GLKRVP1DDR405 kernel: [  955.842285] [drm:skl_set_power_well [i915]] Disabling AUX A
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.441107] Console: switching to colour dummy device 80x25
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.466064] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.466170] [drm:intel_hdmi_detect [i915]] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.468560] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.468643] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.470484] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.470509] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.470743] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.470818] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.472493] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.472520] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.472533] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1] disconnected
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.473092] [drm:status_store] [CONNECTOR:72:HDMI-A-1] force updated from 0 to 2 or reprobing
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.473104] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.473189] [drm:intel_hdmi_force [i915]] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.475735] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.475820] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.477664] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.477691] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.479690] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.479775] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.481697] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.481725] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.481739] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1] status updated from disconnected to connected
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.481770] [drm:do_detailed_mode] composite sync not supported
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.482186] [drm:drm_add_edid_modes] HDMI: DVI dual 0, max TMDS clock 0 kHz
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.482194] [drm:drm_edid_to_eld] ELD monitor IGT
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.482258] [drm:drm_edid_to_eld] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.482265] [drm:drm_edid_to_eld] ELD size 28, SAD count 1
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.482335] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1] probed modes :
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.482345] [drm:drm_mode_debug_printmodeline] Modeline 108:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1105 1125 0x48 0xa
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.482353] [drm:drm_mode_debug_printmodeline] Modeline 125:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.482361] [drm:drm_mode_debug_printmodeline] Modeline 133:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.482369] [drm:drm_mode_debug_printmodeline] Modeline 126:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.482376] [drm:drm_mode_debug_printmodeline] Modeline 124:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.482384] [drm:drm_mode_debug_printmodeline] Modeline 132:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.482391] [drm:drm_mode_debug_printmodeline] Modeline 110:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.482399] [drm:drm_mode_debug_printmodeline] Modeline 129:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.482406] [drm:drm_mode_debug_printmodeline] Modeline 128:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.482414] [drm:drm_mode_debug_printmodeline] Modeline 118:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.482421] [drm:drm_mode_debug_printmodeline] Modeline 119:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.482429] [drm:drm_mode_debug_printmodeline] Modeline 130:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.482437] [drm:drm_mode_debug_printmodeline] Modeline 120:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.483015] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.483103] [drm:intel_hdmi_force [i915]] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.484419] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.484514] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.486435] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.486451] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.488654] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.488751] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.490905] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.490917] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.490929] [drm:do_detailed_mode] composite sync not supported
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.491117] [drm:drm_add_edid_modes] HDMI: DVI dual 0, max TMDS clock 0 kHz
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.491123] [drm:drm_edid_to_eld] ELD monitor IGT
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.491130] [drm:drm_edid_to_eld] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.491135] [drm:drm_edid_to_eld] ELD size 28, SAD count 1
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.491318] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1] probed modes :
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.491328] [drm:drm_mode_debug_printmodeline] Modeline 108:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1105 1125 0x48 0xa
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.491335] [drm:drm_mode_debug_printmodeline] Modeline 125:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.491342] [drm:drm_mode_debug_printmodeline] Modeline 133:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.491353] [drm:drm_mode_debug_printmodeline] Modeline 126:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.491364] [drm:drm_mode_debug_printmodeline] Modeline 124:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.491374] [drm:drm_mode_debug_printmodeline] Modeline 132:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.491382] [drm:drm_mode_debug_printmodeline] Modeline 110:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.491390] [drm:drm_mode_debug_printmodeline] Modeline 129:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.491396] [drm:drm_mode_debug_printmodeline] Modeline 128:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.491404] [drm:drm_mode_debug_printmodeline] Modeline 118:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.491416] [drm:drm_mode_debug_printmodeline] Modeline 119:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.491428] [drm:drm_mode_debug_printmodeline] Modeline 130:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.491437] [drm:drm_mode_debug_printmodeline] Modeline 120:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.491824] [drm:drm_mode_addfb2] [FB:121]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.491836] [drm:drm_mode_setcrtc] [CRTC:36:pipe A]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.491958] [drm:drm_mode_setcrtc] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.491991] [drm:drm_atomic_state_init] Allocated atomic state ffff88015e49dfa8
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492009] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880160cd12a8 state to ffff88015e49dfa8
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492023] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880175ae7098 state to ffff88015e49dfa8
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492051] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880160cd12a8
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492057] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175ae7098 to [CRTC:36:pipe A]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492063] [drm:drm_atomic_set_fb_for_plane] Set [FB:121] for plane state ffff880175ae7098
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492071] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88015e49dfa8
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492121] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff8801782f4ae8 state to ffff88015e49dfa8
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492155] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801782f4ae8 to [NOCRTC]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492168] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:72:HDMI-A-1] ffff8801782f4748 state to ffff88015e49dfa8
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492174] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801782f4748 to [CRTC:36:pipe A]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492191] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff8801782f5228 state to ffff88015e49dfa8
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492263] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880160e0efc8 state to ffff88015e49dfa8
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492272] [drm:handle_conflicting_encoders] [ENCODER:67:DDI B] in use on [CRTC:47:pipe B], disabling [CONNECTOR:68:DP-1]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492277] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801782f5228 to [NOCRTC]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492287] [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state ffff880160e0efc8
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492298] [drm:drm_atomic_check_only] checking ffff88015e49dfa8
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492309] [drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] mode changed
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492318] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] mode changed
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492324] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] enable changed
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492333] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] active changed
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492348] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492358] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:60:eDP-1]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492365] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492370] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:68:DP-1]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492375] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492381] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:72:HDMI-A-1] using [ENCODER:67:DDI B] on [CRTC:36:pipe A]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492387] [drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] needs all connectors, enable: y, active: y
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492394] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88015e49dfa8
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492404] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] needs all connectors, enable: n, active: n
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492410] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff88015e49dfa8
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492428] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880175ae4de8 state to ffff88015e49dfa8
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492436] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88015e49dfa8
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492534] [drm:intel_atomic_check [i915]] [CONNECTOR:72:HDMI-A-1] checking for sink bpp constrains
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492610] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492694] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492768] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 24 for HDMI
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492847] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.492923] [drm:intel_dump_pipe_config [i915]] [CRTC:36:pipe A][modeset]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.493014] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 24, dithering: 0
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.493080] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.493145] [drm:intel_dump_pipe_config [i915]] requested mode:
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.493154] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1105 1125 0x48 0xa
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.493219] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.493257] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1105 1125 0x48 0xa
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.493324] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1105 1125, type: 0x48 flags: 0xa
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.493395] [drm:intel_dump_pipe_config [i915]] port clock: 148500, pipe src size: 1920x1080, pixel rate 148500
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.493466] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.493535] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.493603] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.493677] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.493742] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.493809] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] FB:107, fb = 1920x1080 format = XR24 little-endian (0x34325258)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.493875] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+1920+1080 dst 0x0+1920+1080
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.493940] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.494005] [drm:intel_dump_pipe_config [i915]] [PLANE:30:plane 3A] disabled, scaler_id = -1
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.494070] [drm:intel_dump_pipe_config [i915]] [PLANE:32:plane 4A] disabled, scaler_id = -1
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.494135] [drm:intel_dump_pipe_config [i915]] [PLANE:34:cursor A] disabled, scaler_id = -1
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.494208] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.494314] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 121
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.494381] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 1, on 1, ms 1
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.494449] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.494519] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 0, off 1, on 0, ms 1
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.494599] [drm:bxt_get_dpll [i915]] [CRTC:36:pipe A] using pre-allocated PORT PLL B
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.494667] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe A
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.494712] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880160e0a548 state to ffff88015e49dfa8
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.494727] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880175ae6e48 state to ffff88015e49dfa8
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.494795] [drm:skl_compute_wm [i915]] [PLANE:26:plane 1A] ddb (0 - 332) -> (0 - 502)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.494862] [drm:skl_compute_wm [i915]] [PLANE:34:cursor A] ddb (332 - 340) -> (502 - 510)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.494924] [drm:skl_compute_wm [i915]] [PLANE:37:plane 1B] ddb (340 - 672) -> (0 - 0)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.494986] [drm:skl_compute_wm [i915]] [PLANE:45:cursor B] ddb (672 - 680) -> (0 - 0)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.495047] [drm:skl_compute_wm [i915]] [PLANE:48:plane 1C] ddb (680 - 1012) -> (510 - 1012)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.495053] [drm:drm_atomic_commit] committing ffff88015e49dfa8
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.510215] [drm:intel_edp_backlight_off [i915]] 
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.510286] [drm:intel_power_well_enable [i915]] enabling AUX A
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.510390] [drm:skl_set_power_well [i915]] Enabling AUX A
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.510456] [drm:intel_power_well_disable [i915]] disabling AUX A
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.510524] [drm:skl_set_power_well [i915]] Disabling AUX A
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.713852] [drm:intel_disable_pipe [i915]] disabling pipe A
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.718656] [drm:intel_power_well_enable [i915]] enabling AUX A
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.718791] [drm:skl_set_power_well [i915]] Enabling AUX A
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.718965] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.719097] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.720297] [drm:intel_edp_panel_off.part.26 [i915]] Turn eDP port A panel power off
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.720471] [drm:intel_edp_panel_off.part.26 [i915]] Wait for panel power off time
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.720573] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000060
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.770959] [drm:wait_panel_status [i915]] Wait complete
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.771103] [drm:intel_power_well_disable [i915]] disabling AUX A
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.771196] [drm:skl_set_power_well [i915]] Disabling AUX A
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.771404] [drm:intel_power_well_disable [i915]] disabling DDI A IO power well
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.771502] [drm:skl_set_power_well [i915]] Disabling DDI A IO power well
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.771724] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.771946] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL A (active 1, on? 1) for crtc 36
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.772290] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL A
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.772544] [drm:intel_disable_pipe [i915]] disabling pipe B
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.773571] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.773747] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.773918] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.774455] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.774556] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.774669] [drm:skl_set_power_well [i915]] Disabling DDI B IO power well
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.774806] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 2, on? 1) for crtc 47
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.775066] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.775420] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DDI A]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.775546] [drm:intel_atomic_commit_tail [i915]] [ENCODER:67:DDI B]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.775657] [drm:intel_atomic_commit_tail [i915]] [ENCODER:69:DP-MST A]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.775766] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST B]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.775873] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST C]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.775983] [drm:intel_atomic_commit_tail [i915]] [ENCODER:74:DDI C]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.776095] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:60:eDP-1]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.776213] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:68:DP-1]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.776389] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL A
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.776512] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL B
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.776629] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL C
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.776898] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 1, on? 0) for crtc 36
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.777009] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.778570] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.778679] [drm:skl_set_power_well [i915]] Enabling DDI B IO power well
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.780437] [drm:intel_enable_pipe [i915]] enabling pipe A
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.781424] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.781497] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.815103] [drm:intel_power_well_disable [i915]] disabling dpio-common-a
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.815528] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.815693] [drm:intel_atomic_commit_tail [i915]] [CRTC:36:pipe A]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.816025] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL B
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.816199] [drm:intel_atomic_commit_tail [i915]] [CRTC:47:pipe B]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.816424] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88015e49dfa8
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.816565] [drm:__drm_atomic_state_free] Freeing atomic state ffff88015e49dfa8
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.826573] [drm:status_store] [CONNECTOR:72:HDMI-A-1] force updated from 2 to 0 or reprobing
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.826581] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.826649] [drm:intel_hdmi_detect [i915]] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.828684] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.828735] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.830585] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.830607] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.832585] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.832636] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.834750] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.834771] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.834781] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1] status updated from connected to disconnected
>Jun 29 10:43:23 GLK-2-GLKRVP1DDR405 kernel: [ 1126.834786] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1] disconnected
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857620] [drm:drm_atomic_state_init] Allocated atomic state ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857640] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff8801635704a8 state to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857658] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880160e0c138 state to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857672] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 2A] ffff8801635739d8 state to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857676] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801635739d8 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857681] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801635739d8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857693] [drm:drm_atomic_get_plane_state] Added [PLANE:30:plane 3A] ffff880163572bf8 state to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857697] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163572bf8 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857701] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163572bf8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857713] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane 4A] ffff880163572508 state to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857717] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163572508 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857721] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163572508
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857733] [drm:drm_atomic_get_plane_state] Added [PLANE:34:cursor A] ffff8801635732e8 state to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857737] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801635732e8 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857741] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801635732e8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857752] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880163573788 state to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857767] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880160e08958 state to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857779] [drm:drm_atomic_get_plane_state] Added [PLANE:39:plane 2B] ffff880163570008 state to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857782] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163570008 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857786] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163570008
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857798] [drm:drm_atomic_get_plane_state] Added [PLANE:41:plane 3B] ffff880163571bc8 state to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857802] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163571bc8 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857805] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163571bc8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857817] [drm:drm_atomic_get_plane_state] Added [PLANE:43:plane 4B] ffff880163573538 state to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857821] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163573538 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857824] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163573538
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857835] [drm:drm_atomic_get_plane_state] Added [PLANE:45:cursor B] ffff880163573c28 state to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857839] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163573c28 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857843] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163573c28
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857855] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880163572068 state to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857868] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880160e0ca88 state to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857883] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 2C] ffff8801637eb788 state to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857887] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801637eb788 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857890] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801637eb788
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857902] [drm:drm_atomic_get_plane_state] Added [PLANE:52:plane 3C] ffff8801637e86f8 state to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857906] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801637e86f8 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857910] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801637e86f8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857922] [drm:drm_atomic_get_plane_state] Added [PLANE:54:plane 4C] ffff8801637e94d8 state to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857926] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801637e94d8 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857929] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801637e94d8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857941] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor C] ffff8801637e9038 state to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857945] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801637e9038 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857949] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801637e9038
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857968] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880160e0c138
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857972] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801635704a8 to [CRTC:36:pipe A]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857977] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff8801635704a8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.857983] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858011] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:72:HDMI-A-1] ffff880160fb9b38 state to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858019] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880160fb9b38 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858032] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff880160fb9d08 state to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858037] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880160fb9d08 to [CRTC:36:pipe A]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858053] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880160e08958
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858057] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163573788 to [CRTC:47:pipe B]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858061] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880163573788
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858066] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858084] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff880160fb9968 state to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858089] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880160fb9968 to [CRTC:47:pipe B]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858102] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880160e0ca88
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858106] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163572068 to [CRTC:58:pipe C]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858110] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880163572068
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858116] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858133] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff880160fb8ae8 state to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858138] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880160fb8ae8 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858143] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880160fb8ae8 to [CRTC:58:pipe C]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858148] [drm:drm_atomic_check_only] checking ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858157] [drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] mode changed
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858161] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] mode changed
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858165] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] enable changed
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858169] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] active changed
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858184] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858191] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] using [ENCODER:59:DDI A] on [CRTC:36:pipe A]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858195] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858200] [drm:drm_atomic_helper_check_modeset] [ENCODER:67:DDI B] in use on [CRTC:36:pipe A], stealing it
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858244] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] using [ENCODER:67:DDI B] on [CRTC:47:pipe B]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858248] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858252] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858256] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858262] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858266] [drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] needs all connectors, enable: y, active: y
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858271] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858281] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] needs all connectors, enable: y, active: y
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858286] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858298] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858405] [drm:intel_atomic_check [i915]] [CONNECTOR:60:eDP-1] checking for sink bpp constrains
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858483] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858567] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 141000KHz
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858653] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858727] [drm:intel_dp_compute_config [i915]] DP link bw required 423000 available 540000
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858808] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858887] [drm:intel_dump_pipe_config [i915]] [CRTC:36:pipe A][modeset]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.858965] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.859041] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6571076, gmch_n: 8388608, link_m: 273794, link_n: 524288, tu: 64
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.859113] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.859185] [drm:intel_dump_pipe_config [i915]] requested mode:
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.859194] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.859266] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.859302] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.859377] [drm:intel_dump_pipe_config [i915]] crtc timings: 141000 1920 1936 1952 2104 1080 1083 1097 1116, type: 0x48 flags: 0xa
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.859449] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 141000
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.859524] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.859596] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.859668] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.859746] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x6300, ebb4: 0x2000,pll0: 0x21, pll1: 0x100, pll2: 0x1a6666, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.859818] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.859896] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] FB:121, fb = 1920x1080 format = XR24 little-endian (0x34325258)
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.859968] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+1920+1080 dst 0x0+1920+1080
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.860043] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.860114] [drm:intel_dump_pipe_config [i915]] [PLANE:30:plane 3A] disabled, scaler_id = -1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.860186] [drm:intel_dump_pipe_config [i915]] [PLANE:32:plane 4A] disabled, scaler_id = -1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.860257] [drm:intel_dump_pipe_config [i915]] [PLANE:34:cursor A] disabled, scaler_id = -1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.860291] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.860370] [drm:intel_atomic_check [i915]] [CONNECTOR:68:DP-1] checking for sink bpp constrains
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.860443] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.860524] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.860598] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 24 for HDMI
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.860677] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.860750] [drm:intel_dump_pipe_config [i915]] [CRTC:47:pipe B][modeset]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.860822] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 24, dithering: 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.860893] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.860964] [drm:intel_dump_pipe_config [i915]] requested mode:
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.860971] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.861041] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.861048] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.861120] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.861191] [drm:intel_dump_pipe_config [i915]] port clock: 148500, pipe src size: 1920x1080, pixel rate 148500
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.861265] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.861362] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.861433] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.861510] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8200, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x19999a, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.861581] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.861655] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 1B] FB:107, fb = 1920x1080 format = XR24 little-endian (0x34325258)
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.861727] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+0+0 dst 0x0+0+0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.861798] [drm:intel_dump_pipe_config [i915]] [PLANE:39:plane 2B] disabled, scaler_id = -1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.861869] [drm:intel_dump_pipe_config [i915]] [PLANE:41:plane 3B] disabled, scaler_id = -1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.861940] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 4B] disabled, scaler_id = -1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.862010] [drm:intel_dump_pipe_config [i915]] [PLANE:45:cursor B] disabled, scaler_id = -1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.862094] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.862174] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.862248] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 1, on 1, ms 1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.862347] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.862420] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 0 -> 1, off 0, on 1, ms 1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.862494] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.862567] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.862648] [drm:bxt_get_dpll [i915]] [CRTC:36:pipe A] using pre-allocated PORT PLL A
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.862721] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe A
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.862803] [drm:bxt_get_dpll [i915]] [CRTC:47:pipe B] using pre-allocated PORT PLL B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.862875] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.862962] [drm:skl_compute_wm [i915]] [PLANE:26:plane 1A] ddb (0 - 502) -> (0 - 332)
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.863030] [drm:skl_compute_wm [i915]] [PLANE:34:cursor A] ddb (502 - 510) -> (332 - 340)
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.863098] [drm:skl_compute_wm [i915]] [PLANE:37:plane 1B] ddb (0 - 0) -> (340 - 672)
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.863165] [drm:skl_compute_wm [i915]] [PLANE:45:cursor B] ddb (0 - 0) -> (672 - 680)
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.863233] [drm:skl_compute_wm [i915]] [PLANE:48:plane 1C] ddb (510 - 1012) -> (680 - 1012)
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.863308] [drm:drm_atomic_commit] committing ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.863600] [drm:intel_power_well_enable [i915]] enabling dpio-common-a
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.864887] [drm:intel_disable_pipe [i915]] disabling pipe A
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.883155] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.883237] [drm:skl_set_power_well [i915]] Disabling DDI B IO power well
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.883443] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.883606] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 1, on? 1) for crtc 36
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.883868] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.883992] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DDI A]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.884069] [drm:intel_atomic_commit_tail [i915]] [ENCODER:67:DDI B]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.884144] [drm:intel_atomic_commit_tail [i915]] [ENCODER:69:DP-MST A]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.884219] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST B]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.884318] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST C]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.884392] [drm:intel_atomic_commit_tail [i915]] [ENCODER:74:DDI C]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.884469] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.884551] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL A
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.884640] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.884716] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL C
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.884877] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 1, on? 0) for crtc 36
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.884950] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.886346] [drm:intel_power_well_enable [i915]] enabling AUX A
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.886420] [drm:skl_set_power_well [i915]] Enabling AUX A
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.886533] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1126.886634] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.148574] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000010, dig 0x18001819, pins 0x00000020
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.148685] [drm:intel_hpd_irq_handler [i915]] digital hpd port B - short
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.148912] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port B - short
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.149081] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.149213] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.329708] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000060
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.329818] [drm:wait_panel_status [i915]] Wait complete
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.329921] [drm:edp_panel_on [i915]] Wait for panel power on
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.330026] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000063
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.432167] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.432278] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.432380] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.532112] [drm:wait_panel_status [i915]] Wait complete
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.532832] [drm:intel_power_well_disable [i915]] disabling AUX A
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.532935] [drm:skl_set_power_well [i915]] Disabling AUX A
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.533040] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.533152] [drm:skl_set_power_well [i915]] Enabling DDI A IO power well
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.533510] [drm:intel_power_well_enable [i915]] enabling AUX A
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.533702] [drm:skl_set_power_well [i915]] Enabling AUX A
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.534759] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 80 02 00 00 00 00 00 00
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.534941] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.535089] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.537801] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.537913] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.538051] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.539502] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.539614] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.540860] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.540974] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.543267] [drm:intel_enable_pipe [i915]] enabling pipe A
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.543449] [drm:intel_edp_backlight_on [i915]] 
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.543558] [drm:intel_panel_enable_backlight [i915]] pipe A
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.544704] [drm:intel_dp_aux_enable_backlight [i915]] VBT defined backlight frequency 200 Hz
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.545952] [drm:intel_dp_aux_enable_backlight [i915]] Enable dynamic brightness.
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.546350] [drm:intel_psr_enable [i915]] PSR not supported on this platform
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.546395] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.546480] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.546524] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.572176] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 2, on? 0) for crtc 47
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.572259] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.572567] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.572647] [drm:skl_set_power_well [i915]] Enabling DDI B IO power well
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.574459] [drm:intel_enable_pipe [i915]] enabling pipe B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.576944] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:60:eDP-1]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.577062] [drm:intel_atomic_commit_tail [i915]] [CRTC:36:pipe A]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.577459] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL A
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.577832] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:68:DP-1]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.577917] attached crtc is active, but connector isn't
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.577982] ------------[ cut here ]------------
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578065] WARNING: CPU: 1 PID: 1402 at drivers/gpu/drm/i915/intel_display.c:5971 verify_connector_state.isra.51+0x2c3/0x340 [i915]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578068] Modules linked in: x86_pkg_temp_thermal intel_powerclamp coretemp crct10dif_pclmul crc32_pclmul ghash_clmulni_intel lpc_ich snd_hda_codec_realtek snd_hda_codec_generic snd_hda_intel snd_hda_codec snd_hwdep snd_hda_core snd_pcm sdhci_pci sdhci mmc_core r8169 mii i915 prime_numbers i2c_hid
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578131] CPU: 1 PID: 1402 Comm: kms_hdmi_inject Tainted: G     U          4.12.0-rc7-drm-tip-ww26-commit-85a692e+ #1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578134] Hardware name: Intel Corp. Geminilake/GLK RVP1 DDR4 (05), BIOS GELKRVPA.X64.0050.B51.1706021357 06/02/2017
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578138] task: ffff8801634c4d40 task.stack: ffffc900018b4000
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578217] RIP: 0010:verify_connector_state.isra.51+0x2c3/0x340 [i915]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578246] RSP: 0018:ffffc900018b7a70 EFLAGS: 00010282
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578251] RAX: 000000000000002c RBX: 0000000000000001 RCX: 0000000000000006
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578254] RDX: 0000000000000006 RSI: ffff8801634c5640 RDI: ffff8801634c4d40
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578257] RBP: ffffc900018b7aa8 R08: 0000000000000000 R09: 0000000000000001
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578260] R10: ffff880160e08958 R11: 0000000000000000 R12: ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578263] R13: ffff880160fb9968 R14: ffff8801759ad698 R15: ffff8801757c53d8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578267] FS:  00007fea91ba0640(0000) GS:ffff88017fc80000(0000) knlGS:0000000000000000
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578270] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578273] CR2: 0000000001fece28 CR3: 0000000174d64000 CR4: 00000000003406e0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578275] Call Trace:
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578362]  intel_atomic_commit_tail+0x4ef/0xf70 [i915]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578377]  ? wake_atomic_t_function+0x30/0x30
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578460]  intel_atomic_commit+0x3fb/0x500 [i915]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578474]  ? drm_atomic_set_crtc_for_connector+0xcb/0x100
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578481]  drm_atomic_commit+0x46/0x50
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578489]  restore_fbdev_mode+0x148/0x270
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578497]  drm_fb_helper_restore_fbdev_mode_unlocked+0x2e/0x70
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578503]  drm_fb_helper_set_par+0x28/0x50
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578584]  intel_fbdev_set_par+0x15/0x60 [i915]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578592]  fbcon_init+0x57a/0x600
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578600]  visual_init+0xd1/0x130
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578606]  do_bind_con_driver+0x1ad/0x390
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578615]  store_bind+0x129/0x190
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578624]  dev_attr_store+0x13/0x20
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578631]  sysfs_kf_write+0x40/0x50
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578637]  kernfs_fop_write+0x130/0x1b0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578647]  __vfs_write+0x23/0x120
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578653]  ? rcu_read_lock_sched_held+0x75/0x80
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578657]  ? rcu_sync_lockdep_assert+0x2a/0x50
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578663]  ? __sb_start_write+0xfa/0x1f0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578670]  vfs_write+0xc5/0x1d0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578676]  ? trace_hardirqs_on_caller+0x118/0x180
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578682]  SyS_write+0x44/0xb0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578690]  entry_SYSCALL_64_fastpath+0x1c/0xb1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578694] RIP: 0033:0x7fea90aac670
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578697] RSP: 002b:00007ffc4f041a98 EFLAGS: 00000246 ORIG_RAX: 0000000000000001
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578702] RAX: ffffffffffffffda RBX: 0000000001febe93 RCX: 00007fea90aac670
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578705] RDX: 0000000000000002 RSI: 000000000043430b RDI: 0000000000000006
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578708] RBP: 0000000001febe20 R08: 0000000001febe93 R09: 0000000000000020
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578711] R10: 0000000000000073 R11: 0000000000000246 R12: 00007ffc4f041aa0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578714] R13: 000000000043430b R14: 0000000000000006 R15: 0000000000000018
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578725] Code: e9 4e e1 48 8b 4d c8 e9 4f fe ff ff 48 c7 c7 a8 40 18 a0 e8 58 3e 0d e1 0f ff e9 6f fd ff ff 48 c7 c7 58 40 18 a0 e8 45 3e 0d e1 <0f> ff e9 37 fe ff ff 48 c7 c7 90 3f 18 a0 e8 32 3e 0d e1 0f ff 
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578862] ---[ end trace 6e2ac7858e69f3ae ]---
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.578947] [drm:intel_atomic_commit_tail [i915]] [CRTC:47:pipe B]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.579148] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.579247] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.579461] [drm:__drm_atomic_state_free] Freeing atomic state ffff88015e49afd8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.579904] Console: switching to colour frame buffer device 240x67
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.580805] [drm:intel_dp_check_link_status [i915]] DDI B: channel EQ not ok, retraining
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.582593] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.582684] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.582775] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.585564] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.585654] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.589154] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.591655] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 162000, Lane count = 4
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.609529] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.609659] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.609779] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627513] [drm:drm_atomic_state_init] Allocated atomic state ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627528] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff8801637ea2b8 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627542] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880160e0a548 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627552] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 2A] ffff8801637e8008 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627556] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801637e8008 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627560] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801637e8008
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627569] [drm:drm_atomic_get_plane_state] Added [PLANE:30:plane 3A] ffff8801637eb538 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627573] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801637eb538 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627576] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801637eb538
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627585] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane 4A] ffff8801637e9728 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627589] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801637e9728 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627592] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801637e9728
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627603] [drm:drm_atomic_get_plane_state] Added [PLANE:34:cursor A] ffff8801637e8258 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627606] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801637e8258 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627609] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801637e8258
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627618] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff8801637ea758 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627629] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880160e092a8 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627637] [drm:drm_atomic_get_plane_state] Added [PLANE:39:plane 2B] ffff8801637eb2e8 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627641] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801637eb2e8 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627645] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801637eb2e8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627654] [drm:drm_atomic_get_plane_state] Added [PLANE:41:plane 3B] ffff8801637ea9a8 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627657] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801637ea9a8 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627660] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801637ea9a8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627669] [drm:drm_atomic_get_plane_state] Added [PLANE:43:plane 4B] ffff8801637eabf8 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627672] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801637eabf8 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627676] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801637eabf8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627684] [drm:drm_atomic_get_plane_state] Added [PLANE:45:cursor B] ffff8801637ebc28 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627688] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801637ebc28 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627692] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801637ebc28
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627701] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff8801637e8b98 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627711] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880160e0efc8 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627719] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 2C] ffff8801637ea508 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627723] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801637ea508 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627726] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801637ea508
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627735] [drm:drm_atomic_get_plane_state] Added [PLANE:52:plane 3C] ffff8801637eb9d8 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627738] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801637eb9d8 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627742] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801637eb9d8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627749] [drm:drm_atomic_get_plane_state] Added [PLANE:54:plane 4C] ffff8801637e9978 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627753] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801637e9978 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627756] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801637e9978
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627764] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor C] ffff8801637e8948 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627767] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801637e8948 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627772] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801637e8948
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627785] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880160e0a548
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627790] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801637ea2b8 to [CRTC:36:pipe A]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627794] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff8801637ea2b8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627800] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627818] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff8801780cecb8 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627825] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801780cecb8 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627829] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801780cecb8 to [CRTC:36:pipe A]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627839] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880160e092a8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627844] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801637ea758 to [CRTC:47:pipe B]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627847] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff8801637ea758
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627852] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627862] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff8801780cf228 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627867] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801780cf228 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627871] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801780cf228 to [CRTC:47:pipe B]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627881] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880160e0efc8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627884] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801637e8b98 to [CRTC:58:pipe C]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627888] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff8801637e8b98
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627892] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627904] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff8801780ce008 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627908] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801780ce008 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627913] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801780ce008 to [CRTC:58:pipe C]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627917] [drm:drm_atomic_check_only] checking ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627932] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627938] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627942] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627946] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627950] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.627954] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.628035] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.628084] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.628133] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.628180] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.628228] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.628297] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.628317] [drm:drm_atomic_commit] committing ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.643342] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.643482] [drm:__drm_atomic_state_free] Freeing atomic state ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.643523] [drm:drm_fb_helper_hotplug_event] 
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.643527] [drm:drm_setup_crtcs] 
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.643536] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:60:eDP-1]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.643607] [drm:intel_dp_detect [i915]] [CONNECTOR:60:eDP-1]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.643660] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.643707] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.643751] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.643794] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.644339] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.645236] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.645251] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:60:eDP-1] probed modes :
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.645257] [drm:drm_mode_debug_printmodeline] Modeline 61:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.645265] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:68:DP-1]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.645315] [drm:intel_dp_detect [i915]] [CONNECTOR:68:DP-1]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.645361] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.645409] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.645460] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.645506] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.645523] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:68:DP-1] status updated from connected to disconnected
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.645527] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:68:DP-1] disconnected
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.645585] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.645632] [drm:intel_hdmi_detect [i915]] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.646499] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000010, dig 0x18001819, pins 0x00000020
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.646551] [drm:intel_hpd_irq_handler [i915]] digital hpd port B - short
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.646652] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port B - short
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.646700] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.646765] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.647304] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.647360] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.647952] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 80 02 00 00 00 00 00 00
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.649494] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.649504] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.651455] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.651508] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.653477] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.653496] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.653504] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1] disconnected
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.653882] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.653949] [drm:intel_hdmi_detect [i915]] [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.737183] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.737255] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.739758] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.739784] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.739796] [drm:drm_rgb_quant_range_selectable] CEA VCDB 0x2b
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740144] [drm:drm_add_edid_modes] HDMI: DVI dual 0, max TMDS clock 170000 kHz
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740151] [drm:drm_edid_to_eld] ELD monitor HP E232
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740158] [drm:drm_edid_to_eld] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740163] [drm:drm_edid_to_eld] ELD size 28, SAD count 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740568] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:75:HDMI-A-2] probed modes :
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740579] [drm:drm_mode_debug_printmodeline] Modeline 91:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740587] [drm:drm_mode_debug_printmodeline] Modeline 113:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740595] [drm:drm_mode_debug_printmodeline] Modeline 93:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740602] [drm:drm_mode_debug_printmodeline] Modeline 98:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740612] [drm:drm_mode_debug_printmodeline] Modeline 97:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740619] [drm:drm_mode_debug_printmodeline] Modeline 101:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740627] [drm:drm_mode_debug_printmodeline] Modeline 99:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740634] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740642] [drm:drm_mode_debug_printmodeline] Modeline 94:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740652] [drm:drm_mode_debug_printmodeline] Modeline 115:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740659] [drm:drm_mode_debug_printmodeline] Modeline 95:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740666] [drm:drm_mode_debug_printmodeline] Modeline 104:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740674] [drm:drm_mode_debug_printmodeline] Modeline 102:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740681] [drm:drm_mode_debug_printmodeline] Modeline 111:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740688] [drm:drm_mode_debug_printmodeline] Modeline 116:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740696] [drm:drm_mode_debug_printmodeline] Modeline 96:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740703] [drm:drm_mode_debug_printmodeline] Modeline 117:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740710] [drm:drm_mode_debug_printmodeline] Modeline 103:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740749] [drm:drm_setup_crtcs] connector 60 enabled? yes
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740757] [drm:drm_setup_crtcs] connector 68 enabled? no
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740763] [drm:drm_setup_crtcs] connector 72 enabled? no
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740768] [drm:drm_setup_crtcs] connector 75 enabled? yes
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740857] [drm:intel_fb_initial_config [i915]] Not using firmware configuration
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740872] [drm:drm_setup_crtcs] looking for cmdline mode on connector 60
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740877] [drm:drm_setup_crtcs] looking for preferred mode on connector 60 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740883] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740888] [drm:drm_setup_crtcs] looking for cmdline mode on connector 75
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740893] [drm:drm_setup_crtcs] looking for preferred mode on connector 75 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740899] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740904] [drm:drm_setup_crtcs] picking CRTCs for 1920x1080 config
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.740994] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 36 (0,0)
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.741010] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 47 (0,0)
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.741663] [drm:intel_dp_check_link_status [i915]] DDI B: channel EQ not ok, retraining
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.743422] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.743507] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.743593] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.746679] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.746772] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.750270] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.752791] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 162000, Lane count = 4
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759038] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759094] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759101] [drm:drm_atomic_state_init] Allocated atomic state ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759119] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff8801634144a8 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759132] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880177130008 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759142] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 2A] ffff880163414008 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759146] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163414008 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759149] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163414008
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759158] [drm:drm_atomic_get_plane_state] Added [PLANE:30:plane 3A] ffff880163415e18 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759162] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163415e18 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759165] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163415e18
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759174] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane 4A] ffff880163415288 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759178] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163415288 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759181] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163415288
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759190] [drm:drm_atomic_get_plane_state] Added [PLANE:34:cursor A] ffff8801634172e8 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759193] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801634172e8 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759197] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801634172e8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759283] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880163415978 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759298] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880177131bf8 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759310] [drm:drm_atomic_get_plane_state] Added [PLANE:39:plane 2B] ffff880163417c28 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759315] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163417c28 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759323] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163417c28
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759335] [drm:drm_atomic_get_plane_state] Added [PLANE:41:plane 3B] ffff880163416758 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759340] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163416758 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759343] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163416758
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759352] [drm:drm_atomic_get_plane_state] Added [PLANE:43:plane 4B] ffff8801634162b8 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759356] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801634162b8 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759359] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801634162b8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759368] [drm:drm_atomic_get_plane_state] Added [PLANE:45:cursor B] ffff8801634179d8 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759371] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801634179d8 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759374] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801634179d8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759383] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880163414948 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759394] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880177134a88 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759402] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 2C] ffff880163415038 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759406] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163415038 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759409] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163415038
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759418] [drm:drm_atomic_get_plane_state] Added [PLANE:52:plane 3C] ffff8801634146f8 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759422] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801634146f8 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759427] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801634146f8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759439] [drm:drm_atomic_get_plane_state] Added [PLANE:54:plane 4C] ffff880163416068 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759446] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163416068 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759452] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163416068
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759463] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor C] ffff880163417538 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759468] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163417538 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759473] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163417538
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759489] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177130008
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759493] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801634144a8 to [CRTC:36:pipe A]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759498] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff8801634144a8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759503] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759524] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff880174c8b3f8 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759531] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880174c8b3f8 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759538] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880174c8b3f8 to [CRTC:36:pipe A]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759551] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177131bf8
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759554] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163415978 to [CRTC:47:pipe B]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759562] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880163415978
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759567] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759579] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff88016489f968 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759589] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88016489f968 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759598] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff88016489ecb8 state to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759605] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88016489ecb8 to [CRTC:47:pipe B]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759611] [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state ffff880177134a88
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759615] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff880177134a88
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759618] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163414948 to [NOCRTC]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759622] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163414948
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759629] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759639] [drm:drm_atomic_check_only] checking ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759647] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] mode changed
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759651] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] enable changed
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759657] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] active changed
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759668] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759673] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759677] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759685] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:68:DP-1]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759690] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759694] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:47:pipe B]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759698] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] needs all connectors, enable: y, active: y
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759702] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759713] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] needs all connectors, enable: n, active: n
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759717] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759725] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759783] [drm:intel_atomic_check [i915]] [CONNECTOR:75:HDMI-A-2] checking for sink bpp constrains
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759834] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759889] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759937] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 24 for HDMI
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.759987] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.760035] [drm:intel_dump_pipe_config [i915]] [CRTC:47:pipe B][modeset]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.760083] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 24, dithering: 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.760129] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.760175] [drm:intel_dump_pipe_config [i915]] requested mode:
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.760182] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.760228] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.760255] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.760302] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.760351] [drm:intel_dump_pipe_config [i915]] port clock: 148500, pipe src size: 1920x1080, pixel rate 148500
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.760401] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.760451] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.760499] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.760554] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x6300, ebb4: 0x2000,pll0: 0x21, pll1: 0x100, pll2: 0x1a6666, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.760602] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.760653] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 1B] FB:107, fb = 1920x1080 format = XR24 little-endian (0x34325258)
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.760702] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+1920+1080 dst 0x0+1920+1080
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.760747] [drm:intel_dump_pipe_config [i915]] [PLANE:39:plane 2B] disabled, scaler_id = -1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.760793] [drm:intel_dump_pipe_config [i915]] [PLANE:41:plane 3B] disabled, scaler_id = -1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.760839] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 4B] disabled, scaler_id = -1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.760886] [drm:intel_dump_pipe_config [i915]] [PLANE:45:cursor B] disabled, scaler_id = -1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.760937] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.760991] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.761038] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.761085] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.761131] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 1, on 1, ms 1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.761183] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb -1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.761229] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 0, off 1, on 0, ms 1
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.761307] [drm:bxt_get_dpll [i915]] [CRTC:47:pipe B] using pre-allocated PORT PLL C
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.761359] [drm:intel_reference_shared_dpll [i915]] using PORT PLL C for pipe B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.761419] [drm:skl_compute_wm [i915]] [PLANE:26:plane 1A] ddb (0 - 332) -> (0 - 502)
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.761466] [drm:skl_compute_wm [i915]] [PLANE:34:cursor A] ddb (332 - 340) -> (502 - 510)
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.761512] [drm:skl_compute_wm [i915]] [PLANE:37:plane 1B] ddb (340 - 672) -> (510 - 1012)
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.761583] [drm:skl_compute_wm [i915]] [PLANE:45:cursor B] ddb (672 - 680) -> (1012 - 1020)
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.761650] [drm:skl_compute_wm [i915]] [PLANE:48:plane 1C] ddb (680 - 1012) -> (0 - 0)
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.761715] [drm:skl_compute_wm [i915]] [PLANE:56:cursor C] ddb (1012 - 1020) -> (0 - 0)
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.761723] [drm:drm_atomic_commit] committing ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.762091] [drm:intel_disable_pipe [i915]] disabling pipe B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.775716] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.775812] [drm:skl_set_power_well [i915]] Disabling DDI B IO power well
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.775971] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 2, on? 1) for crtc 47
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.776409] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.776616] [drm:intel_disable_pipe [i915]] disabling pipe C
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.790402] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.790479] [drm:skl_set_power_well [i915]] Disabling DDI C IO power well
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.790578] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL C (active 4, on? 1) for crtc 58
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.790791] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL C
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.791011] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DDI A]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.791085] [drm:intel_atomic_commit_tail [i915]] [ENCODER:67:DDI B]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.791159] [drm:intel_atomic_commit_tail [i915]] [ENCODER:69:DP-MST A]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.791230] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST B]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.791352] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST C]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.791426] [drm:intel_atomic_commit_tail [i915]] [ENCODER:74:DDI C]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.791503] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:68:DP-1]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.791597] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL A
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.791801] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.791873] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL C
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.792066] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL C (active 2, on? 0) for crtc 47
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.792138] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL C
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.793293] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.793364] [drm:skl_set_power_well [i915]] Enabling DDI C IO power well
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.794631] [drm:intel_enable_pipe [i915]] enabling pipe B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.808679] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000010, dig 0x18001819, pins 0x00000020
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.808763] [drm:intel_hpd_irq_handler [i915]] digital hpd port B - short
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.808942] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port B - short
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.809021] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.809095] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.810254] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 80 02 00 00 00 00 00 00
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.827000] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.827142] [drm:intel_atomic_commit_tail [i915]] [CRTC:47:pipe B]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.827454] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL C
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.827716] [drm:intel_atomic_commit_tail [i915]] [CRTC:58:pipe C]
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.827777] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.827985] [drm:__drm_atomic_state_free] Freeing atomic state ffff88015e49b528
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.829677] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.829845] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:43:24 GLK-2-GLKRVP1DDR405 kernel: [ 1127.829945] [drm:intel_power_well_disable [i915]] disabling dpio-common-b
>Jun 29 10:43:27 GLK-2-GLKRVP1DDR405 kernel: [ 1130.689806] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>Jun 29 10:43:27 GLK-2-GLKRVP1DDR405 kernel: [ 1130.689941] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000067
>Jun 29 10:43:27 GLK-2-GLKRVP1DDR405 kernel: [ 1130.690052] [drm:intel_power_well_disable [i915]] disabling AUX A
>Jun 29 10:43:27 GLK-2-GLKRVP1DDR405 kernel: [ 1130.690163] [drm:skl_set_power_well [i915]] Disabling AUX A
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.641743] [drm:drm_fb_helper_hotplug_event] 
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.641759] [drm:drm_setup_crtcs] 
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.641777] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:60:eDP-1]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.641940] [drm:intel_dp_detect [i915]] [CONNECTOR:60:eDP-1]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.642067] [drm:intel_power_well_enable [i915]] enabling AUX A
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.642195] [drm:skl_set_power_well [i915]] Enabling AUX A
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.642409] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.642547] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.642680] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.642806] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.642985] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.643123] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006f
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.643816] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.644989] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.645026] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:60:eDP-1] probed modes :
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.645043] [drm:drm_mode_debug_printmodeline] Modeline 61:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.645056] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:68:DP-1]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.645184] [drm:intel_dp_detect [i915]] [CONNECTOR:68:DP-1]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.645303] [drm:intel_power_well_enable [i915]] enabling dpio-common-b
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.647240] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.647412] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.648664] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 80 02 00 00 00 00 00 00
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.649956] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.650087] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.650211] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.650423] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.651529] [drm:drm_dp_read_desc] DP sink: OUI 00-e0-4c dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.651657] [drm:intel_dp_detect [i915]] Sink is not MST capable
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.661338] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.661385] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.661432] [drm:intel_power_well_disable [i915]] disabling dpio-common-b
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.661445] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:68:DP-1] status updated from disconnected to connected
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.661521] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.661538] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:68:DP-1] probed modes :
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.661544] [drm:drm_mode_debug_printmodeline] Modeline 82:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.661549] [drm:drm_mode_debug_printmodeline] Modeline 85:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.661553] [drm:drm_mode_debug_printmodeline] Modeline 90:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.661557] [drm:drm_mode_debug_printmodeline] Modeline 84:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.661562] [drm:drm_mode_debug_printmodeline] Modeline 83:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.661566] [drm:drm_mode_debug_printmodeline] Modeline 92:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.661571] [drm:drm_mode_debug_printmodeline] Modeline 106:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.661575] [drm:drm_mode_debug_printmodeline] Modeline 108:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.661580] [drm:drm_mode_debug_printmodeline] Modeline 86:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.661584] [drm:drm_mode_debug_printmodeline] Modeline 87:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.661588] [drm:drm_mode_debug_printmodeline] Modeline 88:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.661593] [drm:drm_mode_debug_printmodeline] Modeline 89:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.661600] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.661648] [drm:intel_hdmi_detect [i915]] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.664102] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.664153] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.666543] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.666564] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.668722] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.668773] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.671068] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.671090] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.671099] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1] disconnected
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.671109] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.671163] [drm:intel_hdmi_detect [i915]] [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.756411] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.756460] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.758797] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.758817] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.758827] [drm:drm_rgb_quant_range_selectable] CEA VCDB 0x2b
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759062] [drm:drm_add_edid_modes] HDMI: DVI dual 0, max TMDS clock 170000 kHz
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759067] [drm:drm_edid_to_eld] ELD monitor HP E232
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759072] [drm:drm_edid_to_eld] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759075] [drm:drm_edid_to_eld] ELD size 28, SAD count 0
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759321] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:75:HDMI-A-2] probed modes :
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759328] [drm:drm_mode_debug_printmodeline] Modeline 91:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759333] [drm:drm_mode_debug_printmodeline] Modeline 113:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759337] [drm:drm_mode_debug_printmodeline] Modeline 93:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759344] [drm:drm_mode_debug_printmodeline] Modeline 98:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759349] [drm:drm_mode_debug_printmodeline] Modeline 97:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759353] [drm:drm_mode_debug_printmodeline] Modeline 101:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759358] [drm:drm_mode_debug_printmodeline] Modeline 99:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759362] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759366] [drm:drm_mode_debug_printmodeline] Modeline 94:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759371] [drm:drm_mode_debug_printmodeline] Modeline 115:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759375] [drm:drm_mode_debug_printmodeline] Modeline 95:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759380] [drm:drm_mode_debug_printmodeline] Modeline 104:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759384] [drm:drm_mode_debug_printmodeline] Modeline 102:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759389] [drm:drm_mode_debug_printmodeline] Modeline 111:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759393] [drm:drm_mode_debug_printmodeline] Modeline 116:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759397] [drm:drm_mode_debug_printmodeline] Modeline 96:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759402] [drm:drm_mode_debug_printmodeline] Modeline 117:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759406] [drm:drm_mode_debug_printmodeline] Modeline 103:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759432] [drm:drm_setup_crtcs] connector 60 enabled? yes
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759440] [drm:drm_setup_crtcs] connector 68 enabled? yes
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759447] [drm:drm_setup_crtcs] connector 72 enabled? no
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759454] [drm:drm_setup_crtcs] connector 75 enabled? yes
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759509] [drm:intel_fb_initial_config [i915]] Not using firmware configuration
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759522] [drm:drm_setup_crtcs] looking for cmdline mode on connector 60
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759528] [drm:drm_setup_crtcs] looking for preferred mode on connector 60 0
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759533] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759536] [drm:drm_setup_crtcs] looking for cmdline mode on connector 68
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759540] [drm:drm_setup_crtcs] looking for preferred mode on connector 68 0
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759544] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759548] [drm:drm_setup_crtcs] looking for cmdline mode on connector 75
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759551] [drm:drm_setup_crtcs] looking for preferred mode on connector 75 0
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759554] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759557] [drm:drm_setup_crtcs] picking CRTCs for 1920x1080 config
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759687] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 36 (0,0)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759697] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 47 (0,0)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759706] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 58 (0,0)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759785] [drm:drm_atomic_state_init] Allocated atomic state ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759797] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff88017845d4d8 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759810] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880177136fc8 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759820] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 2A] ffff88017845e9a8 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759824] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88017845e9a8 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759828] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88017845e9a8
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759837] [drm:drm_atomic_get_plane_state] Added [PLANE:30:plane 3A] ffff88017845d978 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759840] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88017845d978 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759844] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88017845d978
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759852] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane 4A] ffff88017845fc28 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759856] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88017845fc28 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759859] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88017845fc28
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759867] [drm:drm_atomic_get_plane_state] Added [PLANE:34:cursor A] ffff88017845e2b8 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759871] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88017845e2b8 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759876] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88017845e2b8
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759884] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff88017845cde8 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759895] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880177130958 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759904] [drm:drm_atomic_get_plane_state] Added [PLANE:39:plane 2B] ffff88017845f9d8 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759908] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88017845f9d8 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759911] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88017845f9d8
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759919] [drm:drm_atomic_get_plane_state] Added [PLANE:41:plane 3B] ffff88017845cb98 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759923] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88017845cb98 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759927] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88017845cb98
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759935] [drm:drm_atomic_get_plane_state] Added [PLANE:43:plane 4B] ffff88017845c6f8 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759938] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88017845c6f8 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759942] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88017845c6f8
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759951] [drm:drm_atomic_get_plane_state] Added [PLANE:45:cursor B] ffff88017845f098 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759954] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88017845f098 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759957] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88017845f098
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759966] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff88017845f788 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759974] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 2C] ffff88017845f2e8 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759977] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88017845f2e8 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759980] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88017845f2e8
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759990] [drm:drm_atomic_get_plane_state] Added [PLANE:52:plane 3C] ffff880175989728 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759993] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175989728 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.759997] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175989728
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760006] [drm:drm_atomic_get_plane_state] Added [PLANE:54:plane 4C] ffff88017598a068 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760009] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88017598a068 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760012] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88017598a068
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760021] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor C] ffff8801786c94d8 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760024] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801786c94d8 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760028] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801786c94d8
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760038] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177136fc8
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760043] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88017845d4d8 to [CRTC:36:pipe A]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760047] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff88017845d4d8
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760052] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760068] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff880163758e88 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760075] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880163758e88 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760079] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880163758e88 to [CRTC:36:pipe A]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760090] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177130958
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760094] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88017845cde8 to [CRTC:47:pipe B]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760097] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff88017845cde8
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760102] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760113] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff8801637593f8 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760117] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801637593f8 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760126] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff880163759b38 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760129] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880163759b38 to [CRTC:47:pipe B]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760140] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff88017ab192a8 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760149] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff88017ab192a8
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760152] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88017845f788 to [CRTC:58:pipe C]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760156] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff88017845f788
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760162] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760168] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801637593f8 to [CRTC:58:pipe C]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760172] [drm:drm_atomic_check_only] checking ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760179] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] mode changed
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760183] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] enable changed
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760186] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] active changed
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760194] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760199] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760228] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760233] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] using [ENCODER:67:DDI B] on [CRTC:47:pipe B]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760236] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760241] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760244] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] needs all connectors, enable: y, active: y
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760248] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760271] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] needs all connectors, enable: y, active: y
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760276] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760288] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760349] [drm:intel_atomic_check [i915]] [CONNECTOR:68:DP-1] checking for sink bpp constrains
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760402] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760462] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 148500KHz
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760516] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760569] [drm:intel_dp_compute_config [i915]] DP link bw required 445500 available 648000
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760626] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760683] [drm:intel_dump_pipe_config [i915]] [CRTC:47:pipe B][modeset]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760735] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 24, dithering: 0
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760788] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760839] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760890] [drm:intel_dump_pipe_config [i915]] requested mode:
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760898] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760948] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.760957] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.761009] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.761059] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1080, pixel rate 148500
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.761113] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.761163] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.761215] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.761313] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x6300, ebb4: 0x2000,pll0: 0x21, pll1: 0x100, pll2: 0x1a6666, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.761381] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.761451] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 1B] FB:107, fb = 1920x1080 format = XR24 little-endian (0x34325258)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.761518] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+1920+1080 dst 0x0+1920+1080
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.761586] [drm:intel_dump_pipe_config [i915]] [PLANE:39:plane 2B] disabled, scaler_id = -1
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.761650] [drm:intel_dump_pipe_config [i915]] [PLANE:41:plane 3B] disabled, scaler_id = -1
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.761715] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 4B] disabled, scaler_id = -1
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.761779] [drm:intel_dump_pipe_config [i915]] [PLANE:45:cursor B] disabled, scaler_id = -1
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.761790] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.761863] [drm:intel_atomic_check [i915]] [CONNECTOR:75:HDMI-A-2] checking for sink bpp constrains
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.761932] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.762005] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.762074] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 24 for HDMI
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.762145] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.762213] [drm:intel_dump_pipe_config [i915]] [CRTC:58:pipe C][modeset]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.762305] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 24, dithering: 0
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.762373] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 1
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.762438] [drm:intel_dump_pipe_config [i915]] requested mode:
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.762450] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.762517] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.762528] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.762595] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.762662] [drm:intel_dump_pipe_config [i915]] port clock: 148500, pipe src size: 1920x1080, pixel rate 148500
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.762732] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.762799] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.762866] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.762937] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x6300, ebb4: 0x2000,pll0: 0x21, pll1: 0x100, pll2: 0x1a6666, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.763002] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.763069] [drm:intel_dump_pipe_config [i915]] [PLANE:48:plane 1C] disabled, scaler_id = -1
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.763136] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 2C] disabled, scaler_id = -1
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.763199] [drm:intel_dump_pipe_config [i915]] [PLANE:52:plane 3C] disabled, scaler_id = -1
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.763309] [drm:intel_dump_pipe_config [i915]] [PLANE:54:plane 4C] disabled, scaler_id = -1
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.763376] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor C] disabled, scaler_id = -1
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.763451] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.763526] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.763592] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.763661] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.763726] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 1, on 1, ms 1
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.763793] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.763858] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 0 -> 1, off 0, on 1, ms 1
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.763931] [drm:bxt_get_dpll [i915]] [CRTC:47:pipe B] using pre-allocated PORT PLL B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.763996] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.764069] [drm:bxt_get_dpll [i915]] [CRTC:58:pipe C] using pre-allocated PORT PLL C
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.764134] [drm:intel_reference_shared_dpll [i915]] using PORT PLL C for pipe C
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.764212] [drm:skl_compute_wm [i915]] [PLANE:26:plane 1A] ddb (0 - 502) -> (0 - 332)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.764307] [drm:skl_compute_wm [i915]] [PLANE:34:cursor A] ddb (502 - 510) -> (332 - 340)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.764371] [drm:skl_compute_wm [i915]] [PLANE:37:plane 1B] ddb (510 - 1012) -> (340 - 672)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.764434] [drm:skl_compute_wm [i915]] [PLANE:45:cursor B] ddb (1012 - 1020) -> (672 - 680)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.764497] [drm:skl_compute_wm [i915]] [PLANE:48:plane 1C] ddb (0 - 0) -> (680 - 1012)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.764561] [drm:skl_compute_wm [i915]] [PLANE:56:cursor C] ddb (0 - 0) -> (1012 - 1020)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.764570] [drm:drm_atomic_commit] committing ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.764738] [drm:intel_power_well_enable [i915]] enabling dpio-common-b
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.765175] [drm:intel_disable_pipe [i915]] disabling pipe B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.778474] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.778549] [drm:skl_set_power_well [i915]] Disabling DDI C IO power well
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.778698] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL C (active 2, on? 1) for crtc 47
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.778958] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL C
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.779072] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DDI A]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.779141] [drm:intel_atomic_commit_tail [i915]] [ENCODER:67:DDI B]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.779206] [drm:intel_atomic_commit_tail [i915]] [ENCODER:69:DP-MST A]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.779366] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST B]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.779436] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST C]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.779507] [drm:intel_atomic_commit_tail [i915]] [ENCODER:74:DDI C]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.779578] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL A
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.779823] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.779892] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL C
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.786192] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 2, on? 0) for crtc 47
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.786346] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.787492] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.787569] [drm:skl_set_power_well [i915]] Enabling DDI B IO power well
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.787659] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.787773] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.788383] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.788498] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.789200] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.789328] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.789880] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.789963] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.790048] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.790128] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.790692] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.790775] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.791519] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.791601] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.792170] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.792252] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.793218] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.793397] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.794003] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.794086] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.794205] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.794333] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.794427] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.794518] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.794599] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.795193] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.795315] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.795531] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.795610] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.796180] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.796243] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.797219] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.797385] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.797906] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.797950] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.797996] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.798039] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.798582] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.798642] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.798694] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.798742] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.798819] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.798862] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.799374] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.799420] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.799876] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.799918] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.800389] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.800449] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.801424] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.801477] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.801982] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.802042] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.802091] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.802134] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.802658] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.802704] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.802762] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.805092] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 162000, Lane count = 4
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.805156] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.805204] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.805760] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.805829] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.806669] [drm:intel_enable_pipe [i915]] enabling pipe B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.823849] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL C (active 4, on? 0) for crtc 58
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.823931] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL C
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.824174] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.824247] [drm:skl_set_power_well [i915]] Enabling DDI C IO power well
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.825931] [drm:intel_enable_pipe [i915]] enabling pipe C
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.843425] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:68:DP-1]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.843544] [drm:intel_atomic_commit_tail [i915]] [CRTC:47:pipe B]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.843764] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.843972] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.844065] [drm:intel_atomic_commit_tail [i915]] [CRTC:58:pipe C]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.844258] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL C
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.844429] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.844611] [drm:__drm_atomic_state_free] Freeing atomic state ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.844796] [drm:drm_fb_helper_hotplug_event] 
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.844802] [drm:drm_setup_crtcs] 
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.844813] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:60:eDP-1]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.844898] [drm:intel_dp_detect [i915]] [CONNECTOR:60:eDP-1]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.844981] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.845061] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.845137] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.845212] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.846007] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.847263] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.847287] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:60:eDP-1] probed modes :
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.847298] [drm:drm_mode_debug_printmodeline] Modeline 61:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.847306] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:68:DP-1]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.847398] [drm:intel_dp_detect [i915]] [CONNECTOR:68:DP-1]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.847480] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.847563] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.848789] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 80 02 00 00 00 00 00 00
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.849974] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.850060] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.850141] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.850222] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.851403] [drm:drm_dp_read_desc] DP sink: OUI 00-e0-4c dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.851488] [drm:intel_dp_detect [i915]] Sink is not MST capable
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.861486] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.861540] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.861630] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.861692] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:68:DP-1] probed modes :
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.861698] [drm:drm_mode_debug_printmodeline] Modeline 82:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.861703] [drm:drm_mode_debug_printmodeline] Modeline 85:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.861708] [drm:drm_mode_debug_printmodeline] Modeline 90:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.861712] [drm:drm_mode_debug_printmodeline] Modeline 84:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.861717] [drm:drm_mode_debug_printmodeline] Modeline 83:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.861721] [drm:drm_mode_debug_printmodeline] Modeline 92:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.861726] [drm:drm_mode_debug_printmodeline] Modeline 106:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.861730] [drm:drm_mode_debug_printmodeline] Modeline 108:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.861734] [drm:drm_mode_debug_printmodeline] Modeline 86:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.861739] [drm:drm_mode_debug_printmodeline] Modeline 87:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.861743] [drm:drm_mode_debug_printmodeline] Modeline 88:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.861748] [drm:drm_mode_debug_printmodeline] Modeline 89:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.861753] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.861801] [drm:intel_hdmi_detect [i915]] [CONNECTOR:72:HDMI-A-1]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.863613] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.863663] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.865927] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.865947] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.868340] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.868391] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.870650] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.870671] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.870680] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1] disconnected
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.870690] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.870744] [drm:intel_hdmi_detect [i915]] [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.954816] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.954875] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957200] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957274] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957285] [drm:drm_rgb_quant_range_selectable] CEA VCDB 0x2b
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957566] [drm:drm_add_edid_modes] HDMI: DVI dual 0, max TMDS clock 170000 kHz
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957571] [drm:drm_edid_to_eld] ELD monitor HP E232
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957576] [drm:drm_edid_to_eld] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957580] [drm:drm_edid_to_eld] ELD size 28, SAD count 0
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957743] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:75:HDMI-A-2] probed modes :
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957751] [drm:drm_mode_debug_printmodeline] Modeline 91:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957756] [drm:drm_mode_debug_printmodeline] Modeline 113:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957761] [drm:drm_mode_debug_printmodeline] Modeline 93:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957766] [drm:drm_mode_debug_printmodeline] Modeline 98:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957772] [drm:drm_mode_debug_printmodeline] Modeline 97:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957777] [drm:drm_mode_debug_printmodeline] Modeline 101:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957782] [drm:drm_mode_debug_printmodeline] Modeline 99:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957787] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957792] [drm:drm_mode_debug_printmodeline] Modeline 94:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957797] [drm:drm_mode_debug_printmodeline] Modeline 115:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957804] [drm:drm_mode_debug_printmodeline] Modeline 95:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957809] [drm:drm_mode_debug_printmodeline] Modeline 104:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957814] [drm:drm_mode_debug_printmodeline] Modeline 102:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957819] [drm:drm_mode_debug_printmodeline] Modeline 111:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957824] [drm:drm_mode_debug_printmodeline] Modeline 116:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957829] [drm:drm_mode_debug_printmodeline] Modeline 96:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957834] [drm:drm_mode_debug_printmodeline] Modeline 117:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957839] [drm:drm_mode_debug_printmodeline] Modeline 103:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957866] [drm:drm_setup_crtcs] connector 60 enabled? yes
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957871] [drm:drm_setup_crtcs] connector 68 enabled? yes
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957875] [drm:drm_setup_crtcs] connector 72 enabled? no
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957879] [drm:drm_setup_crtcs] connector 75 enabled? yes
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957942] [drm:intel_fb_initial_config [i915]] Not using firmware configuration
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957951] [drm:drm_setup_crtcs] looking for cmdline mode on connector 60
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957955] [drm:drm_setup_crtcs] looking for preferred mode on connector 60 0
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957959] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957963] [drm:drm_setup_crtcs] looking for cmdline mode on connector 68
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957967] [drm:drm_setup_crtcs] looking for preferred mode on connector 68 0
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957971] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957975] [drm:drm_setup_crtcs] looking for cmdline mode on connector 75
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957978] [drm:drm_setup_crtcs] looking for preferred mode on connector 75 0
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957982] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.957986] [drm:drm_setup_crtcs] picking CRTCs for 1920x1080 config
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958133] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 36 (0,0)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958143] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 47 (0,0)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958153] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 58 (0,0)
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958295] [drm:drm_atomic_state_init] Allocated atomic state ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958311] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880174dc1978 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958327] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff88017ab1ae98 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958342] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 2A] ffff880174dc3098 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958348] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174dc3098 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958355] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174dc3098
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958367] [drm:drm_atomic_get_plane_state] Added [PLANE:30:plane 3A] ffff880174dc3788 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958373] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174dc3788 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958380] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174dc3788
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958393] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane 4A] ffff880174dc0258 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958399] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174dc0258 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958406] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174dc0258
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958417] [drm:drm_atomic_get_plane_state] Added [PLANE:34:cursor A] ffff880174dc0de8 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958423] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174dc0de8 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958427] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174dc0de8
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958436] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880174dc0b98 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958448] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff88017ab1a548 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958458] [drm:drm_atomic_get_plane_state] Added [PLANE:39:plane 2B] ffff880174dc2068 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958462] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174dc2068 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958466] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174dc2068
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958475] [drm:drm_atomic_get_plane_state] Added [PLANE:41:plane 3B] ffff880174dc39d8 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958479] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174dc39d8 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958483] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174dc39d8
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958493] [drm:drm_atomic_get_plane_state] Added [PLANE:43:plane 4B] ffff880174dc22b8 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958496] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174dc22b8 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958500] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174dc22b8
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958510] [drm:drm_atomic_get_plane_state] Added [PLANE:45:cursor B] ffff880174dc1e18 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958514] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174dc1e18 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958517] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174dc1e18
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958527] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880174dc2e48 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958541] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880177606678 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958550] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 2C] ffff880174dc2758 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958554] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174dc2758 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958559] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174dc2758
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958571] [drm:drm_atomic_get_plane_state] Added [PLANE:52:plane 3C] ffff880163570258 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958578] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163570258 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958585] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163570258
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958598] [drm:drm_atomic_get_plane_state] Added [PLANE:54:plane 4C] ffff880163571728 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958604] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163571728 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958612] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163571728
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958625] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor C] ffff880163572068 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958632] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880163572068 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958639] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880163572068
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958652] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff88017ab1ae98
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958656] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174dc1978 to [CRTC:36:pipe A]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958661] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880174dc1978
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958667] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958685] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff8801781ceae8 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958694] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801781ceae8 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958699] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801781ceae8 to [CRTC:36:pipe A]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958712] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff88017ab1a548
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958717] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174dc0b98 to [CRTC:47:pipe B]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958722] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880174dc0b98
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958727] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958740] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff8801781ce008 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958747] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801781ce008 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958752] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801781ce008 to [CRTC:47:pipe B]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958765] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177606678
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958769] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174dc2e48 to [CRTC:58:pipe C]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958774] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880174dc2e48
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958784] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958797] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff8801781cee88 state to ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958802] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801781cee88 to [NOCRTC]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958811] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801781cee88 to [CRTC:58:pipe C]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958815] [drm:drm_atomic_check_only] checking ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958830] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958837] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958841] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958847] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958854] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958861] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958926] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.958983] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.959038] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.959090] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.959143] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.959195] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.959261] [drm:drm_atomic_commit] committing ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.976391] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88015e49b528
>Jun 29 10:43:33 GLK-2-GLKRVP1DDR405 kernel: [ 1136.976599] [drm:__drm_atomic_state_free] Freeing atomic state ffff88015e49b528
>Jun 29 10:43:36 GLK-2-GLKRVP1DDR405 kernel: [ 1139.905891] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>Jun 29 10:43:36 GLK-2-GLKRVP1DDR405 kernel: [ 1139.906026] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000067
>Jun 29 10:43:36 GLK-2-GLKRVP1DDR405 kernel: [ 1139.906134] [drm:intel_power_well_disable [i915]] disabling AUX A
>Jun 29 10:43:36 GLK-2-GLKRVP1DDR405 kernel: [ 1139.906286] [drm:skl_set_power_well [i915]] Disabling AUX A

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Attachments on bug 101649: 132348 | 132349 | 132956 | 132957 | 136440 | 136487 | 136549 | 136629 | 136658

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