Attachment 133802 Details for Bug 102421 – Dmesg.log (HSW)

Dmesg.log (HSW)

PerfOaExponentsDM00.log (text/plain), 134.78 KB, created by Hector Velazquez on 2017-08-25 19:58:18 UTC

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Creator: Hector Velazquez

Created: 2017-08-25 19:58:18 UTC

Size: 134.78 KB

patch

obsolete

>=~=~=~=~=~=~=~=~=~=~=~= PuTTY log 2017.08.25 13:53:24 =~=~=~=~=~=~=~=~=~=~=~=
>sudo dmesg -C[5Pdmesg -w
>[32m[10280.729741] [0m[33mConsole[0m: switching to colour dummy device 80x25
>[32m[10280.729876] [0m[33m[IGT] kms_setmode[0m: executing
>[32m[10280.752054] [0m[33m[IGT] kms_setmode[0m: starting subtest basic
>[32m[10280.752207] [0m[drm:drm_mode_setcrtc] [CRTC:36:pipe A]
>[32m[10280.752263] [0m[drm:drm_atomic_state_init] Allocated atomic state ffff880100589a98
>[32m[10280.752280] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff8800558f1bf8 state to ffff880100589a98
>[32m[10280.752292] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff88006cbe3538 state to ffff880100589a98
>[32m[10280.752298] [0m[drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff8800558f1bf8
>[32m[10280.752303] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe3538 to [NOCRTC]
>[32m[10280.752309] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe3538
>[32m[10280.752316] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880100589a98
>[32m[10280.752336] [0m[drm:drm_atomic_get_connector_state] Added [CONNECTOR:63:DP-1] ffff88006d132e88 state to ffff880100589a98
>[32m[10280.752345] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88006d132e88 to [NOCRTC]
>[32m[10280.752350] [0m[drm:drm_atomic_check_only] checking ffff880100589a98
>[32m[10280.752359] [0m[drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] mode changed
>[32m[10280.752364] [0m[drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] enable changed
>[32m[10280.752369] [0m[drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] active changed
>[32m[10280.752374] [0m[drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:63:DP-1]
>[32m[10280.752378] [0m[drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:63:DP-1]
>[32m[10280.752384] [0m[33m[drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] needs all connectors, enable[0m: n, active: n
>[32m[10280.752390] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880100589a98
>[32m[10280.752485] [0m[drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:27:primary A] with fb -1
>[32m[10280.752539] [0m[drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:primary A] visible 1 -> 0, off 1, on 0, ms 1
>[32m[10280.752605] [0m[drm:drm_atomic_commit] committing ffff880100589a98
>[32m[10280.767507] [0m[drm:intel_disable_pipe [i915]] disabling pipe A
>[32m[10280.785176] [0m[drm:intel_disable_shared_dpll [i915]] disable LCPLL 810 (active 1, on? 1) for crtc 36
>[32m[10280.785247] [0m[drm:intel_disable_shared_dpll [i915]] disabling LCPLL 810
>[32m[10280.785326] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DDI B]
>[32m[10280.785389] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:62:DDI C]
>[32m[10280.785454] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:64:DP-MST A]
>[32m[10280.785512] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:65:DP-MST B]
>[32m[10280.785566] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:66:DP-MST C]
>[32m[10280.785722] [0m[drm:verify_connector_state.isra.71 [i915]] [CONNECTOR:63:DP-1]
>[32m[10280.785822] [0m[drm:verify_single_dpll_state.isra.72 [i915]] WRPLL 1
>[32m[10280.785909] [0m[drm:verify_single_dpll_state.isra.72 [i915]] WRPLL 2
>[32m[10280.785994] [0m[drm:verify_single_dpll_state.isra.72 [i915]] SPLL
>[32m[10280.786076] [0m[drm:verify_single_dpll_state.isra.72 [i915]] LCPLL 810
>[32m[10280.786147] [0m[drm:verify_single_dpll_state.isra.72 [i915]] LCPLL 1350
>[32m[10280.786215] [0m[drm:verify_single_dpll_state.isra.72 [i915]] LCPLL 2700
>[32m[10280.786346] [0m[drm:intel_power_well_disable [i915]] disabling display
>[32m[10280.786456] [0m[drm:intel_atomic_commit_tail [i915]] [CRTC:36:pipe A]
>[32m[10280.786541] [0m[drm:intel_power_well_disable [i915]] disabling always-on
>[32m[10280.786620] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff880100589a98
>[32m[10280.786681] [0m[drm:__drm_atomic_state_free] Freeing atomic state ffff880100589a98
>[32m[10280.786754] [0m[drm:drm_mode_setcrtc] [CRTC:46:pipe B]
>[32m[10280.786855] [0m[drm:drm_atomic_state_init] Allocated atomic state ffff880100589a98
>[32m[10280.786881] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:46:pipe B] ffff8800558f37e8 state to ffff880100589a98
>[32m[10280.786905] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:37:primary B] ffff88006cbe2068 state to ffff880100589a98
>[32m[10280.786917] [0m[drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff8800558f37e8
>[32m[10280.786928] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe2068 to [NOCRTC]
>[32m[10280.786938] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe2068
>[32m[10280.786952] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:46:pipe B] to ffff880100589a98
>[32m[10280.786970] [0m[drm:drm_atomic_check_only] checking ffff880100589a98
>[32m[10280.786992] [0m[drm:drm_atomic_commit] committing ffff880100589a98
>[32m[10280.787115] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff880100589a98
>[32m[10280.787158] [0m[drm:__drm_atomic_state_free] Freeing atomic state ffff880100589a98
>[32m[10280.787206] [0m[drm:drm_mode_setcrtc] [CRTC:56:pipe C]
>[32m[10280.787301] [0m[drm:drm_atomic_state_init] Allocated atomic state ffff880100589a98
>[32m[10280.787325] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:56:pipe C] ffff8800558f6fc8 state to ffff880100589a98
>[32m[10280.787348] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:47:primary C] ffff88006cbe39d8 state to ffff880100589a98
>[32m[10280.787360] [0m[drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff8800558f6fc8
>[32m[10280.787371] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe39d8 to [NOCRTC]
>[32m[10280.787381] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe39d8
>[32m[10280.787395] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:56:pipe C] to ffff880100589a98
>[32m[10280.787410] [0m[drm:drm_atomic_check_only] checking ffff880100589a98
>[32m[10280.787427] [0m[drm:drm_atomic_commit] committing ffff880100589a98
>[32m[10280.787529] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff880100589a98
>[32m[10280.787627] [0m[drm:__drm_atomic_state_free] Freeing atomic state ffff880100589a98
>[32m[10280.787924] [0m[drm:drm_mode_addfb2] [FB:82]
>[32m[10280.830017] [0m[drm:drm_mode_addfb2] [FB:84]
>[32m[10280.832832] [0m[drm:intel_runtime_suspend [i915]] Suspending device
>[32m[10280.832900] [0m[drm:hsw_enable_pc8 [i915]] Enabling package C8+
>[32m[10280.834612] [0m[drm:intel_runtime_suspend [i915]] Device suspended
>[32m[10280.858808] [0m[drm:intel_runtime_resume [i915]] Resuming device
>[32m[10280.863051] [0m[drm:hsw_disable_pc8 [i915]] Disabling package C8+
>[32m[10280.866094] [0m[33m[drm:intel_update_cdclk [i915]] Current CD clock rate[0m: 450000 kHz, VCO: 0 kHz, ref: 0 kHz
>[32m[10280.866458] [0m[drm:intel_hdmi_detect [i915]] [CONNECTOR:58:HDMI-A-1]
>[32m[10280.866505] [0m[drm:intel_runtime_resume [i915]] Device resumed
>[32m[10280.866789] [0m[drm:intel_power_well_enable [i915]] enabling always-on
>[32m[10280.868624] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0050 w(1)
>[32m[10280.868649] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[32m[10280.870616] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0050 w(1)
>[32m[10280.870622] [0m[33m[drm:drm_do_probe_ddc_edid] drm[0m: skipping non-existent adapter i915 gmbus dpb
>[32m[10280.872614] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0040 w(1)
>[32m[10280.872637] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[32m[10280.874620] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0040 w(1)
>[32m[10280.874626] [0m[33m[drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID[0m:  (err -6)
>[32m[10280.874645] [0m[drm:intel_power_well_disable [i915]] disabling always-on
>[32m[10280.874652] [0m[drm:drm_helper_hpd_irq_event] [CONNECTOR:58:HDMI-A-1] status updated from disconnected to disconnected
>[32m[10280.874678] [0m[drm:intel_dp_detect [i915]] [CONNECTOR:63:DP-1]
>[32m[10280.874697] [0m[drm:intel_power_well_enable [i915]] enabling always-on
>[32m[10280.875826] [0m[33m[drm:intel_dp_read_dpcd [i915]] DPCD[0m: 11 0a 84 01 01 00 01 80 02 00 00 00 00 00 00
>[32m[10280.876824] [0m[33m[drm:intel_dp_detect [i915]] Display Port TPS3 support[0m: source yes, sink no
>[32m[10280.876851] [0m[33m[drm:intel_dp_print_rates [i915]] source rates[0m: 162000, 270000, 540000
>[32m[10280.876874] [0m[33m[drm:intel_dp_print_rates [i915]] sink rates[0m: 162000, 270000
>[32m[10280.876896] [0m[33m[drm:intel_dp_print_rates [i915]] common rates[0m: 162000, 270000
>[32m[10280.877949] [0m[33m[drm:drm_dp_read_desc] DP sink[0m: OUI 00-e0-4c dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[32m[10280.878000] [0m[drm:intel_dp_detect [i915]] Sink is not MST capable
>[32m[10280.888078] [0m[drm:intel_power_well_disable [i915]] disabling always-on
>[32m[10280.888085] [0m[drm:drm_helper_hpd_irq_event] [CONNECTOR:63:DP-1] status updated from connected to connected
>[32m[10280.888113] [0m[drm:intel_hdmi_detect [i915]] [CONNECTOR:67:HDMI-A-2]
>[32m[10280.888133] [0m[drm:intel_power_well_enable [i915]] enabling always-on
>[32m[10280.889625] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0050 w(1)
>[32m[10280.889650] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[32m[10280.890589] [0m[drm:drm_mode_setcrtc] [CRTC:36:pipe A]
>[32m[10280.891714] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0050 w(1)
>[32m[10280.891724] [0m[33m[drm:drm_do_probe_ddc_edid] drm[0m: skipping non-existent adapter i915 gmbus dpc
>[32m[10280.893892] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0040 w(1)
>[32m[10280.893948] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[32m[10280.895677] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0040 w(1)
>[32m[10280.895691] [0m[33m[drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID[0m:  (err -6)
>[32m[10280.895732] [0m[drm:intel_power_well_disable [i915]] disabling always-on
>[32m[10280.895746] [0m[drm:drm_helper_hpd_irq_event] [CONNECTOR:67:HDMI-A-2] status updated from disconnected to disconnected
>[32m[10280.896095] [0m[drm:intel_runtime_suspend [i915]] Suspending device
>[32m[10280.896175] [0m[drm:hsw_enable_pc8 [i915]] Enabling package C8+
>[32m[10280.896181] [0m[drm:drm_mode_setcrtc] [CONNECTOR:63:DP-1]
>[32m[10280.896207] [0m[drm:drm_atomic_state_init] Allocated atomic state ffff88010058a538
>[32m[10280.896222] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff8800558f2548 state to ffff88010058a538
>[32m[10280.896233] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff88006cbe29a8 state to ffff88010058a538
>[32m[10280.896245] [0m[drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff8800558f2548
>[32m[10280.896251] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe29a8 to [CRTC:36:pipe A]
>[32m[10280.896297] [0m[drm:drm_atomic_set_fb_for_plane] Set [FB:84] for plane state ffff88006cbe29a8
>[32m[10280.896307] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88010058a538
>[32m[10280.896338] [0m[drm:drm_atomic_get_connector_state] Added [CONNECTOR:63:DP-1] ffff88005ecb93f8 state to ffff88010058a538
>[32m[10280.896348] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88005ecb93f8 to [CRTC:36:pipe A]
>[32m[10280.896375] [0m[drm:drm_atomic_check_only] checking ffff88010058a538
>[32m[10280.896385] [0m[drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] mode changed
>[32m[10280.896392] [0m[drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] enable changed
>[32m[10280.896400] [0m[drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] active changed
>[32m[10280.896422] [0m[drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:63:DP-1]
>[32m[10280.896432] [0m[drm:drm_atomic_helper_check_modeset] [CONNECTOR:63:DP-1] using [ENCODER:62:DDI C] on [CRTC:36:pipe A]
>[32m[10280.896441] [0m[33m[drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] needs all connectors, enable[0m: y, active: y
>[32m[10280.896450] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88010058a538
>[32m[10280.896465] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88010058a538
>[32m[10280.896544] [0m[drm:intel_atomic_check [i915]] [CONNECTOR:63:DP-1] checking for sink bpp constrains
>[32m[10280.896685] [0m[drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[32m[10280.896759] [0m[drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 148500KHz
>[32m[10280.896828] [0m[drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24
>[32m[10280.896898] [0m[drm:intel_dp_compute_config [i915]] DP link bw required 445500 available 648000
>[32m[10280.896972] [0m[33m[drm:intel_atomic_check [i915]] hw max bpp[0m: 36, pipe bpp: 24, dithering: 0
>[32m[10280.897041] [0m[drm:intel_dump_pipe_config [i915]] [CRTC:36:pipe A][modeset]
>[32m[10280.897110] [0m[33m[drm:intel_dump_pipe_config [i915]] cpu_transcoder[0m: A, pipe bpp: 24, dithering: 0
>[32m[10280.897177] [0m[33m[drm:intel_dump_pipe_config [i915]] dp m_n[0m: lanes: 4; gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64
>[32m[10280.897243] [0m[33m[drm:intel_dump_pipe_config [i915]] audio[0m: 0, infoframes: 0
>[32m[10280.897303] [0m[drm:intel_dump_pipe_config [i915]] requested mode:
>[32m[10280.897320] [0m[drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[32m[10280.897380] [0m[drm:intel_dump_pipe_config [i915]] adjusted mode:
>[32m[10280.897394] [0m[drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[32m[10280.897458] [0m[33m[drm:intel_dump_pipe_config [i915]] crtc timings[0m: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[32m[10280.897522] [0m[33m[drm:intel_dump_pipe_config [i915]] port clock[0m: 162000, pipe src size: 1920x1080, pixel rate 148500
>[32m[10280.897583] [0m[33m[drm:intel_dump_pipe_config [i915]] pch pfit[0m: pos: 0x00000000, size: 0x00000000, disabled
>[32m[10280.897673] [0m[33m[drm:intel_dump_pipe_config [i915]] ips[0m: 1, double wide: 0
>[32m[10280.897742] [0m[33m[drm:hsw_dump_hw_state [i915]] dpll_hw_state[0m: wrpll: 0x0 spll: 0x0
>[32m[10280.897801] [0m[drm:intel_dump_pipe_config [i915]] planes on this crtc
>[32m[10280.897861] [0m[drm:intel_dump_pipe_config [i915]] [PLANE:27:primary A] disabled, scaler_id = 0
>[32m[10280.897932] [0m[drm:intel_dump_pipe_config [i915]] [PLANE:30:sprite A] disabled, scaler_id = 0
>[32m[10280.897965] [0m[drm:intel_dump_pipe_config [i915]] [PLANE:33:cursor A] disabled, scaler_id = 0
>[32m[10280.897982] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:46:pipe B] ffff8800558f53d8 state to ffff88010058a538
>[32m[10280.897992] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:56:pipe C] ffff8800558f6678 state to ffff88010058a538
>[32m[10280.898031] [0m[drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:27:primary A] with fb 84
>[32m[10280.898068] [0m[drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:primary A] visible 0 -> 1, off 0, on 1, ms 1
>[32m[10280.898107] [0m[drm:intel_reference_shared_dpll [i915]] using LCPLL 810 for pipe A
>[32m[10280.898119] [0m[drm:drm_atomic_commit] committing ffff88010058a538
>[32m[10280.899595] [0m[drm:intel_runtime_suspend [i915]] Device suspended
>[32m[10280.923816] [0m[drm:intel_runtime_resume [i915]] Resuming device
>[32m[10280.928063] [0m[drm:hsw_disable_pc8 [i915]] Disabling package C8+
>[32m[10280.930446] [0m[33m[drm:intel_update_cdclk [i915]] Current CD clock rate[0m: 450000 kHz, VCO: 0 kHz, ref: 0 kHz
>[32m[10280.930847] [0m[drm:intel_runtime_resume [i915]] Device resumed
>[32m[10280.931851] [0m[drm:intel_runtime_suspend [i915]] Suspending device
>[32m[10280.932020] [0m[drm:hsw_enable_pc8 [i915]] Enabling package C8+
>[32m[10280.935769] [0m[drm:intel_runtime_suspend [i915]] Device suspended
>[32m[10280.959800] [0m[drm:intel_runtime_resume [i915]] Resuming device
>[32m[10280.964064] [0m[drm:hsw_disable_pc8 [i915]] Disabling package C8+
>[32m[10280.966444] [0m[33m[drm:intel_update_cdclk [i915]] Current CD clock rate[0m: 450000 kHz, VCO: 0 kHz, ref: 0 kHz
>[32m[10280.966805] [0m[drm:intel_runtime_resume [i915]] Device resumed
>[32m[10280.966879] [0m[drm:intel_power_well_enable [i915]] enabling always-on
>[32m[10280.966951] [0m[drm:intel_power_well_enable [i915]] enabling display
>[32m[10280.967055] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DDI B]
>[32m[10280.967128] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:62:DDI C]
>[32m[10280.967194] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:64:DP-MST A]
>[32m[10280.967261] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:65:DP-MST B]
>[32m[10280.967327] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:66:DP-MST C]
>[32m[10280.967398] [0m[drm:verify_single_dpll_state.isra.72 [i915]] WRPLL 1
>[32m[10280.967468] [0m[drm:verify_single_dpll_state.isra.72 [i915]] WRPLL 2
>[32m[10280.967540] [0m[drm:verify_single_dpll_state.isra.72 [i915]] SPLL
>[32m[10280.967669] [0m[drm:verify_single_dpll_state.isra.72 [i915]] LCPLL 810
>[32m[10280.967738] [0m[drm:verify_single_dpll_state.isra.72 [i915]] LCPLL 1350
>[32m[10280.967800] [0m[drm:verify_single_dpll_state.isra.72 [i915]] LCPLL 2700
>[32m[10280.967879] [0m[drm:intel_enable_shared_dpll [i915]] enable LCPLL 810 (active 1, on? 0) for crtc 36
>[32m[10280.967953] [0m[drm:intel_enable_shared_dpll [i915]] enabling LCPLL 810
>[32m[10280.970329] [0m[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[32m[10280.970391] [0m[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[32m[10280.970447] [0m[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[32m[10280.970500] [0m[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[32m[10280.973375] [0m[drm:intel_dp_start_link_train [i915]] clock recovery OK
>[32m[10280.973413] [0m[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[32m[10280.976551] [0m[drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[32m[10280.978701] [0m[drm:intel_dp_start_link_train [i915]] [CONNECTOR:63:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4
>[32m[10280.979463] [0m[drm:intel_enable_pipe [i915]] enabling pipe A
>[32m[10281.013298] [0m[drm:verify_connector_state.isra.71 [i915]] [CONNECTOR:63:DP-1]
>[32m[10281.013376] [0m[drm:intel_atomic_commit_tail [i915]] [CRTC:36:pipe A]
>[32m[10281.013466] [0m[drm:verify_single_dpll_state.isra.72 [i915]] LCPLL 810
>[32m[10281.013497] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88010058a538
>[32m[10281.013618] [0m[drm:__drm_atomic_state_free] Freeing atomic state ffff88010058a538
>[32m[10281.013777] [0m[drm:intel_hdmi_detect [i915]] [CONNECTOR:58:HDMI-A-1]
>[32m[10281.016005] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0050 w(1)
>[32m[10281.016071] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[32m[10281.018301] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0050 w(1)
>[32m[10281.018321] [0m[33m[drm:drm_do_probe_ddc_edid] drm[0m: skipping non-existent adapter i915 gmbus dpb
>[32m[10281.020601] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0040 w(1)
>[32m[10281.020739] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[32m[10281.022940] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0040 w(1)
>[32m[10281.022960] [0m[33m[drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID[0m:  (err -6)
>[32m[10281.022972] [0m[drm:drm_helper_hpd_irq_event] [CONNECTOR:58:HDMI-A-1] status updated from disconnected to disconnected
>[32m[10281.023052] [0m[drm:intel_dp_detect [i915]] [CONNECTOR:63:DP-1]
>[32m[10281.024403] [0m[33m[drm:intel_dp_read_dpcd [i915]] DPCD[0m: 11 0a 84 01 01 00 01 80 02 00 00 00 00 00 00
>[32m[10281.025496] [0m[33m[drm:intel_dp_detect [i915]] Display Port TPS3 support[0m: source yes, sink no
>[32m[10281.025560] [0m[33m[drm:intel_dp_print_rates [i915]] source rates[0m: 162000, 270000, 540000
>[32m[10281.025713] [0m[33m[drm:intel_dp_print_rates [i915]] sink rates[0m: 162000, 270000
>[32m[10281.025792] [0m[33m[drm:intel_dp_print_rates [i915]] common rates[0m: 162000, 270000
>[32m[10281.026941] [0m[33m[drm:drm_dp_read_desc] DP sink[0m: OUI 00-e0-4c dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[32m[10281.027002] [0m[drm:intel_dp_detect [i915]] Sink is not MST capable
>[32m[10281.037312] [0m[drm:drm_helper_hpd_irq_event] [CONNECTOR:63:DP-1] status updated from connected to connected
>[32m[10281.037344] [0m[drm:intel_hdmi_detect [i915]] [CONNECTOR:67:HDMI-A-2]
>[32m[10281.039494] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0050 w(1)
>[32m[10281.039549] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[32m[10281.041714] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0050 w(1)
>[32m[10281.041725] [0m[33m[drm:drm_do_probe_ddc_edid] drm[0m: skipping non-existent adapter i915 gmbus dpc
>[32m[10281.043921] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0040 w(1)
>[32m[10281.043983] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[32m[10281.046186] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0040 w(1)
>[32m[10281.046670] [0m[33m[drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID[0m:  (err -6)
>[32m[10281.046680] [0m[drm:drm_helper_hpd_irq_event] [CONNECTOR:67:HDMI-A-2] status updated from disconnected to disconnected
>[32m[10281.046755] [0m[drm:intel_hdmi_detect [i915]] [CONNECTOR:58:HDMI-A-1]
>[32m[10281.048947] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0050 w(1)
>[32m[10281.049006] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[32m[10281.051208] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0050 w(1)
>[32m[10281.051225] [0m[33m[drm:drm_do_probe_ddc_edid] drm[0m: skipping non-existent adapter i915 gmbus dpb
>[32m[10281.052692] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0040 w(1)
>[32m[10281.052742] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[32m[10281.054687] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0040 w(1)
>[32m[10281.054701] [0m[33m[drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID[0m:  (err -6)
>[32m[10281.054711] [0m[drm:drm_helper_hpd_irq_event] [CONNECTOR:58:HDMI-A-1] status updated from disconnected to disconnected
>[32m[10281.054766] [0m[drm:intel_dp_detect [i915]] [CONNECTOR:63:DP-1]
>[32m[10281.055945] [0m[33m[drm:intel_dp_read_dpcd [i915]] DPCD[0m: 11 0a 84 01 01 00 01 80 02 00 00 00 00 00 00
>[32m[10281.056923] [0m[33m[drm:intel_dp_detect [i915]] Display Port TPS3 support[0m: source yes, sink no
>[32m[10281.056947] [0m[33m[drm:intel_dp_print_rates [i915]] source rates[0m: 162000, 270000, 540000
>[32m[10281.056969] [0m[33m[drm:intel_dp_print_rates [i915]] sink rates[0m: 162000, 270000
>[32m[10281.056990] [0m[33m[drm:intel_dp_print_rates [i915]] common rates[0m: 162000, 270000
>[32m[10281.058023] [0m[33m[drm:drm_dp_read_desc] DP sink[0m: OUI 00-e0-4c dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[32m[10281.058060] [0m[drm:intel_dp_detect [i915]] Sink is not MST capable
>[32m[10281.067976] [0m[drm:drm_helper_hpd_irq_event] [CONNECTOR:63:DP-1] status updated from connected to connected
>[32m[10281.068019] [0m[drm:intel_hdmi_detect [i915]] [CONNECTOR:67:HDMI-A-2]
>[32m[10281.070165] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0050 w(1)
>[32m[10281.070223] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[32m[10281.072367] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0050 w(1)
>[32m[10281.072378] [0m[33m[drm:drm_do_probe_ddc_edid] drm[0m: skipping non-existent adapter i915 gmbus dpc
>[32m[10281.074524] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0040 w(1)
>[32m[10281.074588] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[32m[10281.076786] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0040 w(1)
>[32m[10281.076805] [0m[33m[drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID[0m:  (err -6)
>[32m[10281.076815] [0m[drm:drm_helper_hpd_irq_event] [CONNECTOR:67:HDMI-A-2] status updated from disconnected to disconnected
>[32m[10283.029809] [0m[drm:drm_mode_setcrtc] [CRTC:36:pipe A]
>[32m[10283.029902] [0m[drm:drm_atomic_state_init] Allocated atomic state ffff88010058a538
>[32m[10283.029924] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff8800558f6fc8 state to ffff88010058a538
>[32m[10283.029943] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff88006cbe1288 state to ffff88010058a538
>[32m[10283.029951] [0m[drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff8800558f6fc8
>[32m[10283.029959] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe1288 to [NOCRTC]
>[32m[10283.029967] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe1288
>[32m[10283.029977] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88010058a538
>[32m[10283.030006] [0m[drm:drm_atomic_get_connector_state] Added [CONNECTOR:63:DP-1] ffff88005b410cb8 state to ffff88010058a538
>[32m[10283.030017] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88005b410cb8 to [NOCRTC]
>[32m[10283.030026] [0m[drm:drm_atomic_check_only] checking ffff88010058a538
>[32m[10283.030038] [0m[drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] mode changed
>[32m[10283.030045] [0m[drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] enable changed
>[32m[10283.030052] [0m[drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] active changed
>[32m[10283.030059] [0m[drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:63:DP-1]
>[32m[10283.030067] [0m[drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:63:DP-1]
>[32m[10283.030076] [0m[33m[drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] needs all connectors, enable[0m: n, active: n
>[32m[10283.030084] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88010058a538
>[32m[10283.030213] [0m[drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:27:primary A] with fb -1
>[32m[10283.030293] [0m[drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:primary A] visible 1 -> 0, off 1, on 0, ms 1
>[32m[10283.030310] [0m[drm:drm_atomic_commit] committing ffff88010058a538
>[32m[10283.046529] [0m[drm:intel_disable_pipe [i915]] disabling pipe A
>[32m[10283.064410] [0m[drm:intel_disable_shared_dpll [i915]] disable LCPLL 810 (active 1, on? 1) for crtc 36
>[32m[10283.064490] [0m[drm:intel_disable_shared_dpll [i915]] disabling LCPLL 810
>[32m[10283.064580] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DDI B]
>[32m[10283.064791] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:62:DDI C]
>[32m[10283.064896] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:64:DP-MST A]
>[32m[10283.064987] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:65:DP-MST B]
>[32m[10283.065078] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:66:DP-MST C]
>[32m[10283.065170] [0m[drm:verify_connector_state.isra.71 [i915]] [CONNECTOR:63:DP-1]
>[32m[10283.065265] [0m[drm:verify_single_dpll_state.isra.72 [i915]] WRPLL 1
>[32m[10283.065352] [0m[drm:verify_single_dpll_state.isra.72 [i915]] WRPLL 2
>[32m[10283.065445] [0m[drm:verify_single_dpll_state.isra.72 [i915]] SPLL
>[32m[10283.065541] [0m[drm:verify_single_dpll_state.isra.72 [i915]] LCPLL 810
>[32m[10283.065710] [0m[drm:verify_single_dpll_state.isra.72 [i915]] LCPLL 1350
>[32m[10283.065808] [0m[drm:verify_single_dpll_state.isra.72 [i915]] LCPLL 2700
>[32m[10283.065969] [0m[drm:intel_power_well_disable [i915]] disabling display
>[32m[10283.066109] [0m[drm:intel_atomic_commit_tail [i915]] [CRTC:36:pipe A]
>[32m[10283.066213] [0m[drm:intel_power_well_disable [i915]] disabling always-on
>[32m[10283.066357] [0m[drm:intel_runtime_suspend [i915]] Suspending device
>[32m[10283.066527] [0m[drm:hsw_enable_pc8 [i915]] Enabling package C8+
>[32m[10283.066810] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88010058a538
>[32m[10283.066886] [0m[drm:__drm_atomic_state_free] Freeing atomic state ffff88010058a538
>[32m[10283.067009] [0m[drm:drm_mode_setcrtc] [CRTC:36:pipe A]
>[32m[10283.067159] [0m[drm:drm_atomic_state_init] Allocated atomic state ffff88010058a538
>[32m[10283.067192] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff8800558f2548 state to ffff88010058a538
>[32m[10283.067222] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff88006cbe29a8 state to ffff88010058a538
>[32m[10283.067237] [0m[drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff8800558f2548
>[32m[10283.067250] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe29a8 to [NOCRTC]
>[32m[10283.067264] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe29a8
>[32m[10283.067280] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88010058a538
>[32m[10283.067303] [0m[drm:drm_atomic_check_only] checking ffff88010058a538
>[32m[10283.067329] [0m[drm:drm_atomic_commit] committing ffff88010058a538
>[32m[10283.067463] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88010058a538
>[32m[10283.067498] [0m[drm:__drm_atomic_state_free] Freeing atomic state ffff88010058a538
>[32m[10283.067536] [0m[drm:drm_mode_setcrtc] [CRTC:46:pipe B]
>[32m[10283.067650] [0m[drm:drm_atomic_state_init] Allocated atomic state ffff880100589a98
>[32m[10283.067670] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:46:pipe B] ffff8800558f6fc8 state to ffff880100589a98
>[32m[10283.067688] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:37:primary B] ffff88006cbe1288 state to ffff880100589a98
>[32m[10283.067697] [0m[drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff8800558f6fc8
>[32m[10283.067705] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe1288 to [NOCRTC]
>[32m[10283.067713] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe1288
>[32m[10283.067724] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:46:pipe B] to ffff880100589a98
>[32m[10283.067741] [0m[drm:drm_atomic_check_only] checking ffff880100589a98
>[32m[10283.067755] [0m[drm:drm_atomic_commit] committing ffff880100589a98
>[32m[10283.067835] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff880100589a98
>[32m[10283.067868] [0m[drm:__drm_atomic_state_free] Freeing atomic state ffff880100589a98
>[32m[10283.067905] [0m[drm:drm_mode_setcrtc] [CRTC:56:pipe C]
>[32m[10283.067976] [0m[drm:drm_atomic_state_init] Allocated atomic state ffff88005d11afd8
>[32m[10283.067994] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:56:pipe C] ffff8800558f53d8 state to ffff88005d11afd8
>[32m[10283.068012] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:47:primary C] ffff88006cbe2068 state to ffff88005d11afd8
>[32m[10283.068020] [0m[drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff8800558f53d8
>[32m[10283.068028] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe2068 to [NOCRTC]
>[32m[10283.068036] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe2068
>[32m[10283.068045] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:56:pipe C] to ffff88005d11afd8
>[32m[10283.068057] [0m[drm:drm_atomic_check_only] checking ffff88005d11afd8
>[32m[10283.068072] [0m[drm:drm_atomic_commit] committing ffff88005d11afd8
>[32m[10283.068148] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d11afd8
>[32m[10283.068181] [0m[drm:__drm_atomic_state_free] Freeing atomic state ffff88005d11afd8
>[32m[10283.068385] [0m[drm:drm_mode_addfb2] [FB:84]
>[32m[10283.070607] [0m[drm:intel_runtime_suspend [i915]] Device suspended
>[32m[10283.094802] [0m[drm:intel_runtime_resume [i915]] Resuming device
>[32m[10283.096946] [0m[drm:hsw_disable_pc8 [i915]] Disabling package C8+
>[32m[10283.099354] [0m[33m[drm:intel_update_cdclk [i915]] Current CD clock rate[0m: 450000 kHz, VCO: 0 kHz, ref: 0 kHz
>[32m[10283.099701] [0m[drm:intel_runtime_resume [i915]] Device resumed
>[32m[10283.108606] [0m[drm:intel_hdmi_detect [i915]] [CONNECTOR:58:HDMI-A-1]
>[32m[10283.108639] [0m[drm:intel_power_well_enable [i915]] enabling always-on
>[32m[10283.110620] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0050 w(1)
>[32m[10283.110644] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[32m[10283.112612] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0050 w(1)
>[32m[10283.112620] [0m[33m[drm:drm_do_probe_ddc_edid] drm[0m: skipping non-existent adapter i915 gmbus dpb
>[32m[10283.114714] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0040 w(1)
>[32m[10283.114740] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[32m[10283.116889] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0040 w(1)
>[32m[10283.116904] [0m[33m[drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID[0m:  (err -6)
>[32m[10283.116950] [0m[drm:intel_power_well_disable [i915]] disabling always-on
>[32m[10283.116973] [0m[drm:drm_helper_hpd_irq_event] [CONNECTOR:58:HDMI-A-1] status updated from disconnected to disconnected
>[32m[10283.117035] [0m[drm:intel_dp_detect [i915]] [CONNECTOR:63:DP-1]
>[32m[10283.117079] [0m[drm:intel_power_well_enable [i915]] enabling always-on
>[32m[10283.118320] [0m[33m[drm:intel_dp_read_dpcd [i915]] DPCD[0m: 11 0a 84 01 01 00 01 80 02 00 00 00 00 00 00
>[32m[10283.119309] [0m[33m[drm:intel_dp_detect [i915]] Display Port TPS3 support[0m: source yes, sink no
>[32m[10283.119334] [0m[33m[drm:intel_dp_print_rates [i915]] source rates[0m: 162000, 270000, 540000
>[32m[10283.119357] [0m[33m[drm:intel_dp_print_rates [i915]] sink rates[0m: 162000, 270000
>[32m[10283.119378] [0m[33m[drm:intel_dp_print_rates [i915]] common rates[0m: 162000, 270000
>[32m[10283.120415] [0m[33m[drm:drm_dp_read_desc] DP sink[0m: OUI 00-e0-4c dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[32m[10283.120443] [0m[drm:intel_dp_detect [i915]] Sink is not MST capable
>[32m[10283.130267] [0m[drm:intel_power_well_disable [i915]] disabling always-on
>[32m[10283.130278] [0m[drm:drm_helper_hpd_irq_event] [CONNECTOR:63:DP-1] status updated from connected to connected
>[32m[10283.130316] [0m[drm:intel_runtime_suspend [i915]] Suspending device
>[32m[10283.130364] [0m[drm:hsw_enable_pc8 [i915]] Enabling package C8+
>[32m[10283.130368] [0m[drm:drm_mode_addfb2] [FB:85]
>[32m[10283.130480] [0m[drm:intel_hdmi_detect [i915]] [CONNECTOR:67:HDMI-A-2]
>[32m[10283.132493] [0m[drm:intel_runtime_suspend [i915]] Device suspended
>[32m[10283.155836] [0m[drm:intel_runtime_resume [i915]] Resuming device
>[32m[10283.160106] [0m[drm:hsw_disable_pc8 [i915]] Disabling package C8+
>[32m[10283.163091] [0m[33m[drm:intel_update_cdclk [i915]] Current CD clock rate[0m: 450000 kHz, VCO: 0 kHz, ref: 0 kHz
>[32m[10283.163401] [0m[drm:intel_runtime_resume [i915]] Device resumed
>[32m[10283.163694] [0m[drm:intel_power_well_enable [i915]] enabling always-on
>[32m[10283.165801] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0050 w(1)
>[32m[10283.165832] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[32m[10283.167918] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0050 w(1)
>[32m[10283.167926] [0m[33m[drm:drm_do_probe_ddc_edid] drm[0m: skipping non-existent adapter i915 gmbus dpc
>[32m[10283.170013] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0040 w(1)
>[32m[10283.170044] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[32m[10283.172130] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0040 w(1)
>[32m[10283.172138] [0m[33m[drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID[0m:  (err -6)
>[32m[10283.172164] [0m[drm:intel_power_well_disable [i915]] disabling always-on
>[32m[10283.172172] [0m[drm:drm_helper_hpd_irq_event] [CONNECTOR:67:HDMI-A-2] status updated from disconnected to disconnected
>[32m[10283.172214] [0m[drm:intel_hdmi_detect [i915]] [CONNECTOR:58:HDMI-A-1]
>[32m[10283.172238] [0m[drm:intel_power_well_enable [i915]] enabling always-on
>[32m[10283.174326] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0050 w(1)
>[32m[10283.174357] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[32m[10283.176449] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0050 w(1)
>[32m[10283.176455] [0m[33m[drm:drm_do_probe_ddc_edid] drm[0m: skipping non-existent adapter i915 gmbus dpb
>[32m[10283.178542] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0040 w(1)
>[32m[10283.178592] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[32m[10283.180679] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0040 w(1)
>[32m[10283.180686] [0m[33m[drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID[0m:  (err -6)
>[32m[10283.180712] [0m[drm:intel_power_well_disable [i915]] disabling always-on
>[32m[10283.180719] [0m[drm:drm_helper_hpd_irq_event] [CONNECTOR:58:HDMI-A-1] status updated from disconnected to disconnected
>[32m[10283.180752] [0m[drm:intel_dp_detect [i915]] [CONNECTOR:63:DP-1]
>[32m[10283.180776] [0m[drm:intel_power_well_enable [i915]] enabling always-on
>[32m[10283.181860] [0m[33m[drm:intel_dp_read_dpcd [i915]] DPCD[0m: 11 0a 84 01 01 00 01 80 02 00 00 00 00 00 00
>[32m[10283.181994] [0m[drm:drm_mode_setcrtc] [CRTC:46:pipe B]
>[32m[10283.182819] [0m[33m[drm:intel_dp_detect [i915]] Display Port TPS3 support[0m: source yes, sink no
>[32m[10283.182843] [0m[33m[drm:intel_dp_print_rates [i915]] source rates[0m: 162000, 270000, 540000
>[32m[10283.182866] [0m[33m[drm:intel_dp_print_rates [i915]] sink rates[0m: 162000, 270000
>[32m[10283.182886] [0m[33m[drm:intel_dp_print_rates [i915]] common rates[0m: 162000, 270000
>[32m[10283.183916] [0m[33m[drm:drm_dp_read_desc] DP sink[0m: OUI 00-e0-4c dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[32m[10283.183945] [0m[drm:intel_dp_detect [i915]] Sink is not MST capable
>[32m[10283.193788] [0m[drm:intel_power_well_disable [i915]] disabling always-on
>[32m[10283.193794] [0m[drm:drm_helper_hpd_irq_event] [CONNECTOR:63:DP-1] status updated from connected to connected
>[32m[10283.193821] [0m[drm:intel_hdmi_detect [i915]] [CONNECTOR:67:HDMI-A-2]
>[32m[10283.193840] [0m[drm:intel_power_well_enable [i915]] enabling always-on
>[32m[10283.195984] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0050 w(1)
>[32m[10283.196039] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[32m[10283.198184] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0050 w(1)
>[32m[10283.198194] [0m[33m[drm:drm_do_probe_ddc_edid] drm[0m: skipping non-existent adapter i915 gmbus dpc
>[32m[10283.200340] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0040 w(1)
>[32m[10283.200395] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[32m[10283.202516] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0040 w(1)
>[32m[10283.202526] [0m[33m[drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID[0m:  (err -6)
>[32m[10283.202576] [0m[drm:intel_power_well_disable [i915]] disabling always-on
>[32m[10283.202661] [0m[drm:drm_helper_hpd_irq_event] [CONNECTOR:67:HDMI-A-2] status updated from disconnected to disconnected
>[32m[10283.202734] [0m[drm:intel_runtime_suspend [i915]] Suspending device
>[32m[10283.202761] [0m[drm:drm_mode_setcrtc] [CONNECTOR:63:DP-1]
>[32m[10283.202845] [0m[drm:hsw_enable_pc8 [i915]] Enabling package C8+
>[32m[10283.202850] [0m[drm:drm_atomic_state_init] Allocated atomic state ffff88005d119548
>[32m[10283.202869] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:46:pipe B] ffff8800558f37e8 state to ffff88005d119548
>[32m[10283.202888] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:37:primary B] ffff88006cbe04a8 state to ffff88005d119548
>[32m[10283.202907] [0m[drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff8800558f37e8
>[32m[10283.202915] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe04a8 to [CRTC:46:pipe B]
>[32m[10283.202923] [0m[drm:drm_atomic_set_fb_for_plane] Set [FB:85] for plane state ffff88006cbe04a8
>[32m[10283.202933] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:46:pipe B] to ffff88005d119548
>[32m[10283.202960] [0m[drm:drm_atomic_get_connector_state] Added [CONNECTOR:63:DP-1] ffff88005b410578 state to ffff88005d119548
>[32m[10283.202969] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88005b410578 to [CRTC:46:pipe B]
>[32m[10283.202983] [0m[drm:drm_atomic_check_only] checking ffff88005d119548
>[32m[10283.202992] [0m[drm:drm_atomic_helper_check_modeset] [CRTC:46:pipe B] mode changed
>[32m[10283.203014] [0m[drm:drm_atomic_helper_check_modeset] [CRTC:46:pipe B] enable changed
>[32m[10283.203021] [0m[drm:drm_atomic_helper_check_modeset] [CRTC:46:pipe B] active changed
>[32m[10283.203032] [0m[drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:63:DP-1]
>[32m[10283.203038] [0m[drm:drm_atomic_helper_check_modeset] [CONNECTOR:63:DP-1] using [ENCODER:62:DDI C] on [CRTC:46:pipe B]
>[32m[10283.203044] [0m[33m[drm:drm_atomic_helper_check_modeset] [CRTC:46:pipe B] needs all connectors, enable[0m: y, active: y
>[32m[10283.203061] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:46:pipe B] to ffff88005d119548
>[32m[10283.203071] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:46:pipe B] to ffff88005d119548
>[32m[10283.203125] [0m[drm:intel_atomic_check [i915]] [CONNECTOR:63:DP-1] checking for sink bpp constrains
>[32m[10283.203170] [0m[drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[32m[10283.203218] [0m[drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 148500KHz
>[32m[10283.203264] [0m[drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24
>[32m[10283.203307] [0m[drm:intel_dp_compute_config [i915]] DP link bw required 445500 available 648000
>[32m[10283.203353] [0m[33m[drm:intel_atomic_check [i915]] hw max bpp[0m: 36, pipe bpp: 24, dithering: 0
>[32m[10283.203397] [0m[drm:intel_dump_pipe_config [i915]] [CRTC:46:pipe B][modeset]
>[32m[10283.203438] [0m[33m[drm:intel_dump_pipe_config [i915]] cpu_transcoder[0m: B, pipe bpp: 24, dithering: 0
>[32m[10283.203480] [0m[33m[drm:intel_dump_pipe_config [i915]] dp m_n[0m: lanes: 4; gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64
>[32m[10283.203520] [0m[33m[drm:intel_dump_pipe_config [i915]] audio[0m: 0, infoframes: 0
>[32m[10283.203564] [0m[drm:intel_dump_pipe_config [i915]] requested mode:
>[32m[10283.203607] [0m[drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[32m[10283.203665] [0m[drm:intel_dump_pipe_config [i915]] adjusted mode:
>[32m[10283.203677] [0m[drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[32m[10283.203734] [0m[33m[drm:intel_dump_pipe_config [i915]] crtc timings[0m: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[32m[10283.203789] [0m[33m[drm:intel_dump_pipe_config [i915]] port clock[0m: 162000, pipe src size: 1920x1080, pixel rate 148500
>[32m[10283.203844] [0m[33m[drm:intel_dump_pipe_config [i915]] pch pfit[0m: pos: 0x00000000, size: 0x00000000, disabled
>[32m[10283.203898] [0m[33m[drm:intel_dump_pipe_config [i915]] ips[0m: 0, double wide: 0
>[32m[10283.203959] [0m[33m[drm:hsw_dump_hw_state [i915]] dpll_hw_state[0m: wrpll: 0x0 spll: 0x0
>[32m[10283.204013] [0m[drm:intel_dump_pipe_config [i915]] planes on this crtc
>[32m[10283.204068] [0m[drm:intel_dump_pipe_config [i915]] [PLANE:37:primary B] disabled, scaler_id = 0
>[32m[10283.204099] [0m[drm:intel_dump_pipe_config [i915]] [PLANE:40:sprite B] disabled, scaler_id = 0
>[32m[10283.204129] [0m[drm:intel_dump_pipe_config [i915]] [PLANE:43:cursor B] disabled, scaler_id = 0
>[32m[10283.204146] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff8800558f1bf8 state to ffff88005d119548
>[32m[10283.204158] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:56:pipe C] ffff88005daa0958 state to ffff88005d119548
>[32m[10283.204195] [0m[drm:intel_plane_atomic_calc_changes [i915]] [CRTC:46:pipe B] has [PLANE:37:primary B] with fb 85
>[32m[10283.204229] [0m[drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:primary B] visible 0 -> 1, off 0, on 1, ms 1
>[32m[10283.204269] [0m[drm:intel_reference_shared_dpll [i915]] using LCPLL 810 for pipe B
>[32m[10283.204279] [0m[drm:drm_atomic_commit] committing ffff88005d119548
>[32m[10283.207023] [0m[drm:intel_runtime_suspend [i915]] Device suspended
>[32m[10283.230818] [0m[drm:intel_runtime_resume [i915]] Resuming device
>[32m[10283.234993] [0m[drm:hsw_disable_pc8 [i915]] Disabling package C8+
>[32m[10283.237356] [0m[33m[drm:intel_update_cdclk [i915]] Current CD clock rate[0m: 450000 kHz, VCO: 0 kHz, ref: 0 kHz
>[32m[10283.237662] [0m[drm:intel_runtime_resume [i915]] Device resumed
>[32m[10283.240932] [0m[drm:intel_runtime_suspend [i915]] Suspending device
>[32m[10283.241174] [0m[drm:hsw_enable_pc8 [i915]] Enabling package C8+
>[32m[10283.243285] [0m[drm:intel_runtime_suspend [i915]] Device suspended
>[32m[10283.266810] [0m[drm:intel_runtime_resume [i915]] Resuming device
>[32m[10283.271057] [0m[drm:hsw_disable_pc8 [i915]] Disabling package C8+
>[32m[10283.273439] [0m[33m[drm:intel_update_cdclk [i915]] Current CD clock rate[0m: 450000 kHz, VCO: 0 kHz, ref: 0 kHz
>[32m[10283.273798] [0m[drm:intel_runtime_resume [i915]] Device resumed
>[32m[10283.273872] [0m[drm:intel_power_well_enable [i915]] enabling always-on
>[32m[10283.273944] [0m[drm:intel_power_well_enable [i915]] enabling display
>[32m[10283.274051] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DDI B]
>[32m[10283.274125] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:62:DDI C]
>[32m[10283.274190] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:64:DP-MST A]
>[32m[10283.274259] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:65:DP-MST B]
>[32m[10283.274327] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:66:DP-MST C]
>[32m[10283.274399] [0m[drm:verify_single_dpll_state.isra.72 [i915]] WRPLL 1
>[32m[10283.274468] [0m[drm:verify_single_dpll_state.isra.72 [i915]] WRPLL 2
>[32m[10283.274541] [0m[drm:verify_single_dpll_state.isra.72 [i915]] SPLL
>[32m[10283.274669] [0m[drm:verify_single_dpll_state.isra.72 [i915]] LCPLL 810
>[32m[10283.274739] [0m[drm:verify_single_dpll_state.isra.72 [i915]] LCPLL 1350
>[32m[10283.274799] [0m[drm:verify_single_dpll_state.isra.72 [i915]] LCPLL 2700
>[32m[10283.274880] [0m[drm:intel_enable_shared_dpll [i915]] enable LCPLL 810 (active 2, on? 0) for crtc 46
>[32m[10283.274955] [0m[drm:intel_enable_shared_dpll [i915]] enabling LCPLL 810
>[32m[10283.277303] [0m[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[32m[10283.277358] [0m[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[32m[10283.277406] [0m[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[32m[10283.277455] [0m[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[32m[10283.280339] [0m[drm:intel_dp_start_link_train [i915]] clock recovery OK
>[32m[10283.280392] [0m[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[32m[10283.283496] [0m[drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[32m[10283.285712] [0m[drm:intel_dp_start_link_train [i915]] [CONNECTOR:63:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4
>[32m[10283.286486] [0m[drm:intel_enable_pipe [i915]] enabling pipe B
>[32m[10283.303482] [0m[drm:verify_connector_state.isra.71 [i915]] [CONNECTOR:63:DP-1]
>[32m[10283.303562] [0m[drm:intel_atomic_commit_tail [i915]] [CRTC:46:pipe B]
>[32m[10283.303720] [0m[drm:verify_single_dpll_state.isra.72 [i915]] LCPLL 810
>[32m[10283.303753] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d119548
>[32m[10283.303823] [0m[drm:__drm_atomic_state_free] Freeing atomic state ffff88005d119548
>[32m[10283.304013] [0m[drm:intel_hdmi_detect [i915]] [CONNECTOR:58:HDMI-A-1]
>[32m[10283.306246] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0050 w(1)
>[32m[10283.306312] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[32m[10283.308528] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0050 w(1)
>[32m[10283.308549] [0m[33m[drm:drm_do_probe_ddc_edid] drm[0m: skipping non-existent adapter i915 gmbus dpb
>[32m[10283.310813] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0040 w(1)
>[32m[10283.310875] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[32m[10283.313090] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0040 w(1)
>[32m[10283.313113] [0m[33m[drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID[0m:  (err -6)
>[32m[10283.313124] [0m[drm:drm_helper_hpd_irq_event] [CONNECTOR:58:HDMI-A-1] status updated from disconnected to disconnected
>[32m[10283.313196] [0m[drm:intel_dp_detect [i915]] [CONNECTOR:63:DP-1]
>[32m[10283.314445] [0m[33m[drm:intel_dp_read_dpcd [i915]] DPCD[0m: 11 0a 84 01 01 00 01 80 02 00 00 00 00 00 00
>[32m[10283.315528] [0m[33m[drm:intel_dp_detect [i915]] Display Port TPS3 support[0m: source yes, sink no
>[32m[10283.315605] [0m[33m[drm:intel_dp_print_rates [i915]] source rates[0m: 162000, 270000, 540000
>[32m[10283.315752] [0m[33m[drm:intel_dp_print_rates [i915]] sink rates[0m: 162000, 270000
>[32m[10283.315835] [0m[33m[drm:intel_dp_print_rates [i915]] common rates[0m: 162000, 270000
>[32m[10283.316979] [0m[33m[drm:drm_dp_read_desc] DP sink[0m: OUI 00-e0-4c dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[32m[10283.317031] [0m[drm:intel_dp_detect [i915]] Sink is not MST capable
>[32m[10283.326893] [0m[drm:drm_helper_hpd_irq_event] [CONNECTOR:63:DP-1] status updated from connected to connected
>[32m[10283.326934] [0m[drm:intel_hdmi_detect [i915]] [CONNECTOR:67:HDMI-A-2]
>[32m[10283.329080] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0050 w(1)
>[32m[10283.329138] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[32m[10283.331343] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0050 w(1)
>[32m[10283.331362] [0m[33m[drm:drm_do_probe_ddc_edid] drm[0m: skipping non-existent adapter i915 gmbus dpc
>[32m[10283.333587] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0040 w(1)
>[32m[10283.333692] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[32m[10283.335884] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0040 w(1)
>[32m[10283.335905] [0m[33m[drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID[0m:  (err -6)
>[32m[10283.335915] [0m[drm:drm_helper_hpd_irq_event] [CONNECTOR:67:HDMI-A-2] status updated from disconnected to disconnected
>[32m[10283.335999] [0m[drm:intel_hdmi_detect [i915]] [CONNECTOR:58:HDMI-A-1]
>[32m[10283.338215] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0050 w(1)
>[32m[10283.338277] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[32m[10283.340483] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0050 w(1)
>[32m[10283.340502] [0m[33m[drm:drm_do_probe_ddc_edid] drm[0m: skipping non-existent adapter i915 gmbus dpb
>[32m[10283.342719] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0040 w(1)
>[32m[10283.342776] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[32m[10283.344969] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0040 w(1)
>[32m[10283.344990] [0m[33m[drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID[0m:  (err -6)
>[32m[10283.345000] [0m[drm:drm_helper_hpd_irq_event] [CONNECTOR:58:HDMI-A-1] status updated from disconnected to disconnected
>[32m[10283.345068] [0m[drm:intel_dp_detect [i915]] [CONNECTOR:63:DP-1]
>[32m[10283.346332] [0m[33m[drm:intel_dp_read_dpcd [i915]] DPCD[0m: 11 0a 84 01 01 00 01 80 02 00 00 00 00 00 00
>[32m[10283.347310] [0m[33m[drm:intel_dp_detect [i915]] Display Port TPS3 support[0m: source yes, sink no
>[32m[10283.347335] [0m[33m[drm:intel_dp_print_rates [i915]] source rates[0m: 162000, 270000, 540000
>[32m[10283.347357] [0m[33m[drm:intel_dp_print_rates [i915]] sink rates[0m: 162000, 270000
>[32m[10283.347379] [0m[33m[drm:intel_dp_print_rates [i915]] common rates[0m: 162000, 270000
>[32m[10283.348417] [0m[33m[drm:drm_dp_read_desc] DP sink[0m: OUI 00-e0-4c dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[32m[10283.348454] [0m[drm:intel_dp_detect [i915]] Sink is not MST capable
>[32m[10283.358273] [0m[drm:drm_helper_hpd_irq_event] [CONNECTOR:63:DP-1] status updated from connected to connected
>[32m[10283.358307] [0m[drm:intel_hdmi_detect [i915]] [CONNECTOR:67:HDMI-A-2]
>[32m[10283.360455] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0050 w(1)
>[32m[10283.360510] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[32m[10283.361672] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0050 w(1)
>[32m[10283.361682] [0m[33m[drm:drm_do_probe_ddc_edid] drm[0m: skipping non-existent adapter i915 gmbus dpc
>[32m[10283.363812] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0040 w(1)
>[32m[10283.363867] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[32m[10283.366073] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0040 w(1)
>[32m[10283.366093] [0m[33m[drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID[0m:  (err -6)
>[32m[10283.366103] [0m[drm:drm_helper_hpd_irq_event] [CONNECTOR:67:HDMI-A-2] status updated from disconnected to disconnected
>[32m[10285.328317] [0m[drm:drm_atomic_state_init] Allocated atomic state ffff88005d119548
>[32m[10285.328342] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d119548
>[32m[10285.328356] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d119548
>[32m[10285.328374] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d119548
>[32m[10285.328404] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:37:primary B] ffff88006cbe39d8 state to ffff88005d119548
>[32m[10285.328421] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:46:pipe B] ffff880100af2e98 state to ffff88005d119548
>[32m[10285.328431] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:46:pipe B] to ffff88005d119548
>[32m[10285.328457] [0m[drm:drm_atomic_get_connector_state] Added [CONNECTOR:63:DP-1] ffff880059b28cb8 state to ffff88005d119548
>[32m[10285.328469] [0m[drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff880100af2e98
>[32m[10285.328476] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe39d8
>[32m[10285.328484] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe39d8 to [NOCRTC]
>[32m[10285.328492] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880059b28cb8 to [NOCRTC]
>[32m[10285.328500] [0m[drm:drm_atomic_check_only] checking ffff88005d119548
>[32m[10285.328510] [0m[drm:drm_atomic_helper_check_modeset] [CRTC:46:pipe B] mode changed
>[32m[10285.328517] [0m[drm:drm_atomic_helper_check_modeset] [CRTC:46:pipe B] enable changed
>[32m[10285.328524] [0m[drm:drm_atomic_helper_check_modeset] [CRTC:46:pipe B] active changed
>[32m[10285.328531] [0m[drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:63:DP-1]
>[32m[10285.328538] [0m[drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:63:DP-1]
>[32m[10285.328547] [0m[33m[drm:drm_atomic_helper_check_modeset] [CRTC:46:pipe B] needs all connectors, enable[0m: n, active: n
>[32m[10285.328612] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:46:pipe B] to ffff88005d119548
>[32m[10285.328715] [0m[drm:intel_plane_atomic_calc_changes [i915]] [CRTC:46:pipe B] has [PLANE:37:primary B] with fb -1
>[32m[10285.328791] [0m[drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:primary B] visible 1 -> 0, off 1, on 0, ms 1
>[32m[10285.328816] [0m[drm:drm_atomic_commit] committing ffff88005d119548
>[32m[10285.328968] [0m[drm:intel_disable_pipe [i915]] disabling pipe B
>[32m[10285.337290] [0m[drm:intel_disable_shared_dpll [i915]] disable LCPLL 810 (active 2, on? 1) for crtc 46
>[32m[10285.337342] [0m[drm:intel_disable_shared_dpll [i915]] disabling LCPLL 810
>[32m[10285.337399] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DDI B]
>[32m[10285.337444] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:62:DDI C]
>[32m[10285.337491] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:64:DP-MST A]
>[32m[10285.337532] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:65:DP-MST B]
>[32m[10285.337570] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:66:DP-MST C]
>[32m[10285.337660] [0m[drm:verify_connector_state.isra.71 [i915]] [CONNECTOR:63:DP-1]
>[32m[10285.337711] [0m[drm:verify_single_dpll_state.isra.72 [i915]] WRPLL 1
>[32m[10285.337761] [0m[drm:verify_single_dpll_state.isra.72 [i915]] WRPLL 2
>[32m[10285.337805] [0m[drm:verify_single_dpll_state.isra.72 [i915]] SPLL
>[32m[10285.337847] [0m[drm:verify_single_dpll_state.isra.72 [i915]] LCPLL 810
>[32m[10285.337907] [0m[drm:verify_single_dpll_state.isra.72 [i915]] LCPLL 1350
>[32m[10285.337941] [0m[drm:verify_single_dpll_state.isra.72 [i915]] LCPLL 2700
>[32m[10285.337998] [0m[drm:intel_power_well_disable [i915]] disabling display
>[32m[10285.338048] [0m[drm:intel_atomic_commit_tail [i915]] [CRTC:46:pipe B]
>[32m[10285.338085] [0m[drm:intel_power_well_disable [i915]] disabling always-on
>[32m[10285.338102] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d119548
>[32m[10285.338120] [0m[drm:__drm_atomic_state_free] Freeing atomic state ffff88005d119548
>[32m[10285.338170] [0m[drm:intel_runtime_suspend [i915]] Suspending device
>[32m[10285.338214] [0m[drm:hsw_enable_pc8 [i915]] Enabling package C8+
>[32m[10285.338285] [0m[33m[IGT] kms_setmode[0m: exiting, ret=99
>[32m[10285.339610] [0m[drm:intel_runtime_suspend [i915]] Device suspended
>[32m[10285.363806] [0m[drm:intel_runtime_resume [i915]] Resuming device
>[32m[10285.368066] [0m[drm:hsw_disable_pc8 [i915]] Disabling package C8+
>[32m[10285.370445] [0m[33m[drm:intel_update_cdclk [i915]] Current CD clock rate[0m: 450000 kHz, VCO: 0 kHz, ref: 0 kHz
>[32m[10285.370834] [0m[drm:intel_hdmi_detect [i915]] [CONNECTOR:58:HDMI-A-1]
>[32m[10285.370911] [0m[drm:intel_runtime_resume [i915]] Device resumed
>[32m[10285.371004] [0m[drm:intel_power_well_enable [i915]] enabling always-on
>[32m[10285.372688] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0050 w(1)
>[32m[10285.372741] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[32m[10285.374779] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0050 w(1)
>[32m[10285.374791] [0m[33m[drm:drm_do_probe_ddc_edid] drm[0m: skipping non-existent adapter i915 gmbus dpb
>[32m[10285.376692] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0040 w(1)
>[32m[10285.376748] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[32m[10285.378663] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr[0m: 0040 w(1)
>[32m[10285.378677] [0m[33m[drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID[0m:  (err -6)
>[32m[10285.378721] [0m[drm:intel_power_well_disable [i915]] disabling always-on
>[32m[10285.378730] [0m[drm:drm_helper_hpd_irq_event] [CONNECTOR:58:HDMI-A-1] status updated from disconnected to disconnected
>[32m[10285.378787] [0m[drm:intel_dp_detect [i915]] [CONNECTOR:63:DP-1]
>[32m[10285.378828] [0m[drm:intel_power_well_enable [i915]] enabling always-on
>[32m[10285.380030] [0m[33m[drm:intel_dp_read_dpcd [i915]] DPCD[0m: 11 0a 84 01 01 00 01 80 02 00 00 00 00 00 00
>[32m[10285.381187] [0m[33m[drm:intel_dp_detect [i915]] Display Port TPS3 support[0m: source yes, sink no
>[32m[10285.381260] [0m[33m[drm:intel_dp_print_rates [i915]] source rates[0m: 162000, 270000, 540000
>[32m[10285.381332] [0m[33m[drm:intel_dp_print_rates [i915]] sink rates[0m: 162000, 270000
>[32m[10285.381405] [0m[33m[drm:intel_dp_print_rates [i915]] common rates[0m: 162000, 270000
>[32m[10285.382508] [0m[33m[drm:drm_dp_read_desc] DP sink[0m: OUI 00-e0-4c dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[32m[10285.382569] [0m[drm:intel_dp_detect [i915]] Sink is not MST capable
>[32m[10285.392620] [0m[drm:intel_power_well_disable [i915]] disabling always-on
>[32m[10285.392628] [0m[drm:drm_helper_hpd_irq_event] [CONNECTOR:63:DP-1] status updated from connected to connected
>[32m[10285.392672] [0m[drm:intel_hdmi_detect [i915]] [CONNECTOR:67:HDMI-A-2]
>[32m[10285.392705] [0m[drm:intel_power_well_enable [i915]] enabling always-on
>[32m[10285.392766] [0m[drm:drm_atomic_state_init] Allocated atomic state ffff88005d119548
>[32m[10285.392778] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff88006cbe1e18 state to ffff88005d119548
>[32m[10285.392789] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:30:sprite A] ffff88006cbe32e8 state to ffff88005d119548
>[32m[10285.392794] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe32e8 to [NOCRTC]
>[32m[10285.392798] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe32e8
>[32m[10285.392808] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:33:cursor A] ffff88006cbe04a8 state to ffff88005d119548
>[32m[10285.392812] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe04a8 to [NOCRTC]
>[32m[10285.392816] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe04a8
>[32m[10285.392825] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:37:primary B] ffff88006cbe0de8 state to ffff88005d119548
>[32m[10285.392835] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:40:sprite B] ffff88006cbe3c28 state to ffff88005d119548
>[32m[10285.392839] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe3c28 to [NOCRTC]
>[32m[10285.392843] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe3c28
>[32m[10285.392852] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:43:cursor B] ffff88006cbe2e48 state to ffff88005d119548
>[32m[10285.392867] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe2e48 to [NOCRTC]
>[32m[10285.392872] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe2e48
>[32m[10285.392882] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:47:primary C] ffff88006cbe0008 state to ffff88005d119548
>[32m[10285.392892] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:50:sprite C] ffff88006cbe1978 state to ffff88005d119548
>[32m[10285.392897] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe1978 to [NOCRTC]
>[32m[10285.392901] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe1978
>[32m[10285.392911] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:53:cursor C] ffff88006cbe3098 state to ffff88005d119548
>[32m[10285.392916] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe3098 to [NOCRTC]
>[32m[10285.392930] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe3098
>[32m[10285.392941] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880055f4efc8 state to ffff88005d119548
>[32m[10285.392953] [0m[drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880055f4efc8
>[32m[10285.392958] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe1e18 to [CRTC:36:pipe A]
>[32m[10285.392962] [0m[drm:drm_atomic_set_fb_for_plane] Set [FB:83] for plane state ffff88006cbe1e18
>[32m[10285.392969] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d119548
>[32m[10285.394787] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0050 w(1)
>[32m[10285.394829] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[32m[10285.396954] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0050 w(1)
>[32m[10285.396965] [0m[33m[drm:drm_do_probe_ddc_edid] drm[0m: skipping non-existent adapter i915 gmbus dpc
>[32m[10285.399170] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0040 w(1)
>[32m[10285.399232] [0m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[32m[10285.401395] [0m[33m[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr[0m: 0040 w(1)
>[32m[10285.401412] [0m[33m[drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID[0m:  (err -6)
>[32m[10285.401458] [0m[drm:intel_power_well_disable [i915]] disabling always-on
>[32m[10285.401474] [0m[drm:drm_helper_hpd_irq_event] [CONNECTOR:67:HDMI-A-2] status updated from disconnected to disconnected
>[32m[10285.401517] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff88006cbe3098 state to ffff88005d119548
>[32m[10285.401532] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:30:sprite A] ffff88006cbe3538 state to ffff88005d119548
>[32m[10285.401538] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe3538 to [NOCRTC]
>[32m[10285.401543] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe3538
>[32m[10285.401592] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d119548
>[32m[10285.401618] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff88006cbe3538 state to ffff88005d119548
>[32m[10285.401631] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:30:sprite A] ffff88006cbe1288 state to ffff88005d119548
>[32m[10285.401640] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe1288 to [NOCRTC]
>[32m[10285.401649] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe1288
>[32m[10285.401661] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:33:cursor A] ffff88006cbe3098 state to ffff88005d119548
>[32m[10285.401669] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe3098 to [NOCRTC]
>[32m[10285.401677] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe3098
>[32m[10285.401690] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:37:primary B] ffff88006cbe0258 state to ffff88005d119548
>[32m[10285.401696] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d119548
>[32m[10285.401730] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff88006cbe0258 state to ffff88005d119548
>[32m[10285.401747] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:30:sprite A] ffff88006cbe22b8 state to ffff88005d119548
>[32m[10285.401755] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe22b8 to [NOCRTC]
>[32m[10285.401762] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe22b8
>[32m[10285.401780] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:33:cursor A] ffff88006cbe3098 state to ffff88005d119548
>[32m[10285.401788] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe3098 to [NOCRTC]
>[32m[10285.401795] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe3098
>[32m[10285.401814] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:37:primary B] ffff88006cbe06f8 state to ffff88005d119548
>[32m[10285.401836] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:40:sprite B] ffff88006cbe1288 state to ffff88005d119548
>[32m[10285.401847] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe1288 to [NOCRTC]
>[32m[10285.401858] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe1288
>[32m[10285.401877] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:43:cursor B] ffff88006cbe1e18 state to ffff88005d119548
>[32m[10285.401885] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe1e18 to [NOCRTC]
>[32m[10285.401893] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe1e18
>[32m[10285.401911] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:47:primary C] ffff88006cbe3538 state to ffff88005d119548
>[32m[10285.401931] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:50:sprite C] ffff88006cbe32e8 state to ffff88005d119548
>[32m[10285.401938] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe32e8 to [NOCRTC]
>[32m[10285.401946] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe32e8
>[32m[10285.401965] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:53:cursor C] ffff88006cbe1978 state to ffff88005d119548
>[32m[10285.401973] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe1978 to [NOCRTC]
>[32m[10285.401981] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe1978
>[32m[10285.402005] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880055f4efc8 state to ffff88005d119548
>[32m[10285.402030] [0m[drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880055f4efc8
>[32m[10285.402040] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe0258 to [CRTC:36:pipe A]
>[32m[10285.402050] [0m[drm:drm_atomic_set_fb_for_plane] Set [FB:83] for plane state ffff88006cbe0258
>[32m[10285.402061] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88005d119548
>[32m[10285.402097] [0m[drm:drm_atomic_get_connector_state] Added [CONNECTOR:63:DP-1] ffff880059b29d08 state to ffff88005d119548
>[32m[10285.402106] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880059b29d08 to [CRTC:36:pipe A]
>[32m[10285.402118] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d119548
>[32m[10285.402236] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff88006cbe1978 state to ffff88005d119548
>[32m[10285.402254] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:30:sprite A] ffff88006cbe0008 state to ffff88005d119548
>[32m[10285.402263] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe0008 to [NOCRTC]
>[32m[10285.402271] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe0008
>[32m[10285.402289] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:33:cursor A] ffff88006cbe32e8 state to ffff88005d119548
>[32m[10285.402297] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe32e8 to [NOCRTC]
>[32m[10285.402305] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe32e8
>[32m[10285.402324] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:37:primary B] ffff88006cbe2e48 state to ffff88005d119548
>[32m[10285.402341] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:40:sprite B] ffff88006cbe3538 state to ffff88005d119548
>[32m[10285.402350] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe3538 to [NOCRTC]
>[32m[10285.402357] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe3538
>[32m[10285.402374] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:43:cursor B] ffff88006cbe3c28 state to ffff88005d119548
>[32m[10285.402382] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe3c28 to [NOCRTC]
>[32m[10285.402388] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe3c28
>[32m[10285.402399] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:47:primary C] ffff88006cbe1e18 state to ffff88005d119548
>[32m[10285.402409] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:50:sprite C] ffff88006cbe0de8 state to ffff88005d119548
>[32m[10285.402414] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe0de8 to [NOCRTC]
>[32m[10285.402419] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe0de8
>[32m[10285.402429] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:53:cursor C] ffff88006cbe1288 state to ffff88005d119548
>[32m[10285.402434] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe1288 to [NOCRTC]
>[32m[10285.402438] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe1288
>[32m[10285.402450] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880055f4efc8 state to ffff88005d119548
>[32m[10285.402463] [0m[drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880055f4efc8
>[32m[10285.402468] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe1978 to [CRTC:36:pipe A]
>[32m[10285.402473] [0m[drm:drm_atomic_set_fb_for_plane] Set [FB:83] for plane state ffff88006cbe1978
>[32m[10285.402480] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88005d119548
>[32m[10285.402493] [0m[drm:drm_atomic_get_connector_state] Added [CONNECTOR:63:DP-1] ffff880059b29d08 state to ffff88005d119548
>[32m[10285.402498] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880059b29d08 to [CRTC:36:pipe A]
>[32m[10285.402510] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:46:pipe B] ffff880055f48958 state to ffff88005d119548
>[32m[10285.402515] [0m[drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff880055f48958
>[32m[10285.402520] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe2e48 to [NOCRTC]
>[32m[10285.402525] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe2e48
>[32m[10285.402531] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:46:pipe B] to ffff88005d119548
>[32m[10285.402545] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:56:pipe C] ffff880055f4a548 state to ffff88005d119548
>[32m[10285.402588] [0m[drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff880055f4a548
>[32m[10285.402593] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe1e18 to [NOCRTC]
>[32m[10285.402601] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe1e18
>[32m[10285.402610] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:56:pipe C] to ffff88005d119548
>[32m[10285.402621] [0m[drm:drm_atomic_check_only] checking ffff88005d119548
>[32m[10285.402630] [0m[drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] mode changed
>[32m[10285.402640] [0m[drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] enable changed
>[32m[10285.402648] [0m[drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] active changed
>[32m[10285.402659] [0m[drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:63:DP-1]
>[32m[10285.402668] [0m[drm:drm_atomic_helper_check_modeset] [CONNECTOR:63:DP-1] using [ENCODER:62:DDI C] on [CRTC:36:pipe A]
>[32m[10285.402677] [0m[33m[drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] needs all connectors, enable[0m: y, active: y
>[32m[10285.402686] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88005d119548
>[32m[10285.402698] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88005d119548
>[32m[10285.402762] [0m[drm:intel_atomic_check [i915]] [CONNECTOR:63:DP-1] checking for sink bpp constrains
>[32m[10285.402813] [0m[drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[32m[10285.402865] [0m[drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 148500KHz
>[32m[10285.402918] [0m[drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24
>[32m[10285.402965] [0m[drm:intel_dp_compute_config [i915]] DP link bw required 445500 available 648000
>[32m[10285.403013] [0m[33m[drm:intel_atomic_check [i915]] hw max bpp[0m: 36, pipe bpp: 24, dithering: 0
>[32m[10285.403061] [0m[drm:intel_dump_pipe_config [i915]] [CRTC:36:pipe A][modeset]
>[32m[10285.403114] [0m[33m[drm:intel_dump_pipe_config [i915]] cpu_transcoder[0m: A, pipe bpp: 24, dithering: 0
>[32m[10285.403140] [0m[33m[drm:intel_dump_pipe_config [i915]] dp m_n[0m: lanes: 4; gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64
>[32m[10285.403164] [0m[33m[drm:intel_dump_pipe_config [i915]] audio[0m: 0, infoframes: 0
>[32m[10285.403187] [0m[drm:intel_dump_pipe_config [i915]] requested mode:
>[32m[10285.403193] [0m[drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[32m[10285.403216] [0m[drm:intel_dump_pipe_config [i915]] adjusted mode:
>[32m[10285.403221] [0m[drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[32m[10285.403246] [0m[33m[drm:intel_dump_pipe_config [i915]] crtc timings[0m: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[32m[10285.403269] [0m[33m[drm:intel_dump_pipe_config [i915]] port clock[0m: 162000, pipe src size: 1920x1080, pixel rate 148500
>[32m[10285.403292] [0m[33m[drm:intel_dump_pipe_config [i915]] pch pfit[0m: pos: 0x00000000, size: 0x00000000, disabled
>[32m[10285.403315] [0m[33m[drm:intel_dump_pipe_config [i915]] ips[0m: 1, double wide: 0
>[32m[10285.403341] [0m[33m[drm:hsw_dump_hw_state [i915]] dpll_hw_state[0m: wrpll: 0x0 spll: 0x0
>[32m[10285.403365] [0m[drm:intel_dump_pipe_config [i915]] planes on this crtc
>[32m[10285.403388] [0m[drm:intel_dump_pipe_config [i915]] [PLANE:27:primary A] disabled, scaler_id = 0
>[32m[10285.403411] [0m[drm:intel_dump_pipe_config [i915]] [PLANE:30:sprite A] disabled, scaler_id = 0
>[32m[10285.403434] [0m[drm:intel_dump_pipe_config [i915]] [PLANE:33:cursor A] disabled, scaler_id = 0
>[32m[10285.403466] [0m[drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:27:primary A] with fb 83
>[32m[10285.403503] [0m[drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:primary A] visible 0 -> 1, off 0, on 1, ms 1
>[32m[10285.403543] [0m[drm:intel_reference_shared_dpll [i915]] using LCPLL 810 for pipe A
>[32m[10285.403578] [0m[drm:drm_atomic_commit] committing ffff88005d119548
>[32m[10285.403672] [0m[drm:intel_power_well_enable [i915]] enabling always-on
>[32m[10285.403707] [0m[drm:intel_power_well_enable [i915]] enabling display
>[32m[10285.403758] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:57:DDI B]
>[32m[10285.403796] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:62:DDI C]
>[32m[10285.403831] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:64:DP-MST A]
>[32m[10285.403866] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:65:DP-MST B]
>[32m[10285.403900] [0m[drm:intel_atomic_commit_tail [i915]] [ENCODER:66:DP-MST C]
>[32m[10285.403936] [0m[drm:verify_single_dpll_state.isra.72 [i915]] WRPLL 1
>[32m[10285.403974] [0m[drm:verify_single_dpll_state.isra.72 [i915]] WRPLL 2
>[32m[10285.404010] [0m[drm:verify_single_dpll_state.isra.72 [i915]] SPLL
>[32m[10285.404047] [0m[drm:verify_single_dpll_state.isra.72 [i915]] LCPLL 810
>[32m[10285.404076] [0m[drm:verify_single_dpll_state.isra.72 [i915]] LCPLL 1350
>[32m[10285.404098] [0m[drm:verify_single_dpll_state.isra.72 [i915]] LCPLL 2700
>[32m[10285.404125] [0m[drm:intel_enable_shared_dpll [i915]] enable LCPLL 810 (active 1, on? 0) for crtc 36
>[32m[10285.404150] [0m[drm:intel_enable_shared_dpll [i915]] enabling LCPLL 810
>[32m[10285.406270] [0m[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[32m[10285.406304] [0m[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[32m[10285.406334] [0m[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[32m[10285.406369] [0m[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[32m[10285.409124] [0m[drm:intel_dp_start_link_train [i915]] clock recovery OK
>[32m[10285.409159] [0m[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[32m[10285.412183] [0m[drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[32m[10285.414249] [0m[drm:intel_dp_start_link_train [i915]] [CONNECTOR:63:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4
>[32m[10285.414960] [0m[drm:intel_enable_pipe [i915]] enabling pipe A
>[32m[10285.448445] [0m[drm:verify_connector_state.isra.71 [i915]] [CONNECTOR:63:DP-1]
>[32m[10285.448510] [0m[drm:intel_atomic_commit_tail [i915]] [CRTC:36:pipe A]
>[32m[10285.448590] [0m[drm:verify_single_dpll_state.isra.72 [i915]] LCPLL 810
>[32m[10285.448687] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d119548
>[32m[10285.448802] [0m[drm:__drm_atomic_state_free] Freeing atomic state ffff88005d119548
>[32m[10285.449449] [0m[drm:drm_atomic_state_init] Allocated atomic state ffff88005d118008
>[32m[10285.449463] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff88006cbe3098 state to ffff88005d118008
>[32m[10285.449475] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880055f49bf8 state to ffff88005d118008
>[32m[10285.449485] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:30:sprite A] ffff88006cbe04a8 state to ffff88005d118008
>[32m[10285.449489] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe04a8 to [NOCRTC]
>[32m[10285.449494] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe04a8
>[32m[10285.449502] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:33:cursor A] ffff88006cbe22b8 state to ffff88005d118008
>[32m[10285.449506] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe22b8 to [NOCRTC]
>[32m[10285.449510] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe22b8
>[32m[10285.449519] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:37:primary B] ffff88006cbe0258 state to ffff88005d118008
>[32m[10285.449529] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:40:sprite B] ffff880057f7e068 state to ffff88005d118008
>[32m[10285.449533] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7e068 to [NOCRTC]
>[32m[10285.449537] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7e068
>[32m[10285.449546] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:43:cursor B] ffff880057f7ebf8 state to ffff88005d118008
>[32m[10285.449609] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7ebf8 to [NOCRTC]
>[32m[10285.449618] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7ebf8
>[32m[10285.449636] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:47:primary C] ffff880057f7fc28 state to ffff88005d118008
>[32m[10285.449652] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:50:sprite C] ffff880057f7dbc8 state to ffff88005d118008
>[32m[10285.449658] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7dbc8 to [NOCRTC]
>[32m[10285.449663] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7dbc8
>[32m[10285.449679] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:53:cursor C] ffff880057f7c008 state to ffff88005d118008
>[32m[10285.449684] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7c008 to [NOCRTC]
>[32m[10285.449690] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7c008
>[32m[10285.449710] [0m[drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880055f49bf8
>[32m[10285.449716] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe3098 to [CRTC:36:pipe A]
>[32m[10285.449722] [0m[drm:drm_atomic_set_fb_for_plane] Set [FB:83] for plane state ffff88006cbe3098
>[32m[10285.449732] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88005d118008
>[32m[10285.449762] [0m[drm:drm_atomic_get_connector_state] Added [CONNECTOR:63:DP-1] ffff88005b410578 state to ffff88005d118008
>[32m[10285.449772] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88005b410578 to [NOCRTC]
>[32m[10285.449779] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88005b410578 to [CRTC:36:pipe A]
>[32m[10285.449797] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:46:pipe B] ffff880055f48008 state to ffff88005d118008
>[32m[10285.449803] [0m[drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff880055f48008
>[32m[10285.449809] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006cbe0258 to [NOCRTC]
>[32m[10285.449815] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006cbe0258
>[32m[10285.449824] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:46:pipe B] to ffff88005d118008
>[32m[10285.449846] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:56:pipe C] ffff880055f4ca88 state to ffff88005d118008
>[32m[10285.449852] [0m[drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff880055f4ca88
>[32m[10285.449858] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7fc28 to [NOCRTC]
>[32m[10285.449863] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7fc28
>[32m[10285.449871] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:56:pipe C] to ffff88005d118008
>[32m[10285.449882] [0m[drm:drm_atomic_check_only] checking ffff88005d118008
>[32m[10285.449906] [0m[drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:63:DP-1]
>[32m[10285.449911] [0m[drm:drm_atomic_helper_check_modeset] [CONNECTOR:63:DP-1] keeps [ENCODER:62:DDI C], now on [CRTC:36:pipe A]
>[32m[10285.449953] [0m[drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:27:primary A] with fb 83
>[32m[10285.449981] [0m[drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:primary A] visible 1 -> 1, off 0, on 0, ms 0
>[32m[10285.449989] [0m[drm:drm_atomic_commit] committing ffff88005d118008
>[32m[10285.465172] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d118008
>[32m[10285.465275] [0m[drm:__drm_atomic_state_free] Freeing atomic state ffff88005d118008
>[32m[10285.465414] [0m[drm:drm_atomic_state_init] Allocated atomic state ffff88005d118008
>[32m[10285.465429] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff880057f7cde8 state to ffff88005d118008
>[32m[10285.465441] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880055f4a548 state to ffff88005d118008
>[32m[10285.465451] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:30:sprite A] ffff880057f7d728 state to ffff88005d118008
>[32m[10285.465455] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7d728 to [NOCRTC]
>[32m[10285.465459] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7d728
>[32m[10285.465469] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:33:cursor A] ffff880057f7f098 state to ffff88005d118008
>[32m[10285.465473] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7f098 to [NOCRTC]
>[32m[10285.465477] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7f098
>[32m[10285.465487] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:37:primary B] ffff880057f7d978 state to ffff88005d118008
>[32m[10285.465497] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:40:sprite B] ffff880057f7f788 state to ffff88005d118008
>[32m[10285.465501] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7f788 to [NOCRTC]
>[32m[10285.465505] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7f788
>[32m[10285.465514] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:43:cursor B] ffff880057f7e9a8 state to ffff88005d118008
>[32m[10285.465518] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7e9a8 to [NOCRTC]
>[32m[10285.465522] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7e9a8
>[32m[10285.465531] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:47:primary C] ffff880057f7f538 state to ffff88005d118008
>[32m[10285.465540] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:50:sprite C] ffff880057f7ee48 state to ffff88005d118008
>[32m[10285.465544] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7ee48 to [NOCRTC]
>[32m[10285.465589] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7ee48
>[32m[10285.465599] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:53:cursor C] ffff880057f7c258 state to ffff88005d118008
>[32m[10285.465603] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7c258 to [NOCRTC]
>[32m[10285.465607] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7c258
>[32m[10285.465621] [0m[drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880055f4a548
>[32m[10285.465625] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7cde8 to [CRTC:36:pipe A]
>[32m[10285.465630] [0m[drm:drm_atomic_set_fb_for_plane] Set [FB:83] for plane state ffff880057f7cde8
>[32m[10285.465636] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88005d118008
>[32m[10285.465655] [0m[drm:drm_atomic_get_connector_state] Added [CONNECTOR:63:DP-1] ffff88005b410e88 state to ffff88005d118008
>[32m[10285.465661] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88005b410e88 to [NOCRTC]
>[32m[10285.465667] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88005b410e88 to [CRTC:36:pipe A]
>[32m[10285.465679] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:46:pipe B] ffff880055f4ae98 state to ffff88005d118008
>[32m[10285.465683] [0m[drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff880055f4ae98
>[32m[10285.465687] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7d978 to [NOCRTC]
>[32m[10285.465691] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7d978
>[32m[10285.465696] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:46:pipe B] to ffff88005d118008
>[32m[10285.465708] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:56:pipe C] ffff880055f48958 state to ffff88005d118008
>[32m[10285.465712] [0m[drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff880055f48958
>[32m[10285.465716] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7f538 to [NOCRTC]
>[32m[10285.465719] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7f538
>[32m[10285.465724] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:56:pipe C] to ffff88005d118008
>[32m[10285.465732] [0m[drm:drm_atomic_check_only] checking ffff88005d118008
>[32m[10285.465744] [0m[drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:63:DP-1]
>[32m[10285.465750] [0m[drm:drm_atomic_helper_check_modeset] [CONNECTOR:63:DP-1] keeps [ENCODER:62:DDI C], now on [CRTC:36:pipe A]
>[32m[10285.465837] [0m[drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:27:primary A] with fb 83
>[32m[10285.465888] [0m[drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:primary A] visible 1 -> 1, off 0, on 0, ms 0
>[32m[10285.465902] [0m[drm:drm_atomic_commit] committing ffff88005d118008
>[32m[10285.481779] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d118008
>[32m[10285.481887] [0m[drm:__drm_atomic_state_free] Freeing atomic state ffff88005d118008
>[32m[10285.486351] [0m[33mConsole[0m: switching to colour frame buffer device 240x67
>[32m[10285.486369] [0m[drm:drm_atomic_state_init] Allocated atomic state ffff88005d118008
>[32m[10285.486376] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff880057f7c008 state to ffff88005d118008
>[32m[10285.486382] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880055f4ca88 state to ffff88005d118008
>[32m[10285.486388] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:30:sprite A] ffff880057f7c4a8 state to ffff88005d118008
>[32m[10285.486390] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7c4a8 to [NOCRTC]
>[32m[10285.486392] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7c4a8
>[32m[10285.486397] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:33:cursor A] ffff880057f7dbc8 state to ffff88005d118008
>[32m[10285.486399] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7dbc8 to [NOCRTC]
>[32m[10285.486401] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7dbc8
>[32m[10285.486405] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:37:primary B] ffff880057f7d038 state to ffff88005d118008
>[32m[10285.486410] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:40:sprite B] ffff880057f7fc28 state to ffff88005d118008
>[32m[10285.486412] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7fc28 to [NOCRTC]
>[32m[10285.486414] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7fc28
>[32m[10285.486418] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:43:cursor B] ffff880057f7c948 state to ffff88005d118008
>[32m[10285.486420] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7c948 to [NOCRTC]
>[32m[10285.486422] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7c948
>[32m[10285.486427] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:47:primary C] ffff880057f7ebf8 state to ffff88005d118008
>[32m[10285.486431] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:50:sprite C] ffff880057f7cb98 state to ffff88005d118008
>[32m[10285.486433] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7cb98 to [NOCRTC]
>[32m[10285.486435] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7cb98
>[32m[10285.486439] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:53:cursor C] ffff880057f7e068 state to ffff88005d118008
>[32m[10285.486441] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7e068 to [NOCRTC]
>[32m[10285.486443] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7e068
>[32m[10285.486449] [0m[drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880055f4ca88
>[32m[10285.486451] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7c008 to [CRTC:36:pipe A]
>[32m[10285.486454] [0m[drm:drm_atomic_set_fb_for_plane] Set [FB:83] for plane state ffff880057f7c008
>[32m[10285.486456] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88005d118008
>[32m[10285.486466] [0m[drm:drm_atomic_get_connector_state] Added [CONNECTOR:63:DP-1] ffff88005b410578 state to ffff88005d118008
>[32m[10285.486469] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88005b410578 to [NOCRTC]
>[32m[10285.486472] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88005b410578 to [CRTC:36:pipe A]
>[32m[10285.486477] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:46:pipe B] ffff880055f4efc8 state to ffff88005d118008
>[32m[10285.486479] [0m[drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff880055f4efc8
>[32m[10285.486481] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7d038 to [NOCRTC]
>[32m[10285.486483] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7d038
>[32m[10285.486485] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:46:pipe B] to ffff88005d118008
>[32m[10285.486492] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:56:pipe C] ffff880055f48008 state to ffff88005d118008
>[32m[10285.486494] [0m[drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff880055f48008
>[32m[10285.486496] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7ebf8 to [NOCRTC]
>[32m[10285.486497] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7ebf8
>[32m[10285.486500] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:56:pipe C] to ffff88005d118008
>[32m[10285.486503] [0m[drm:drm_atomic_check_only] checking ffff88005d118008
>[32m[10285.486510] [0m[drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:63:DP-1]
>[32m[10285.486512] [0m[drm:drm_atomic_helper_check_modeset] [CONNECTOR:63:DP-1] keeps [ENCODER:62:DDI C], now on [CRTC:36:pipe A]
>[32m[10285.486550] [0m[drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:27:primary A] with fb 83
>[32m[10285.486586] [0m[drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:primary A] visible 1 -> 1, off 0, on 0, ms 0
>[32m[10285.486592] [0m[drm:drm_atomic_commit] committing ffff88005d118008
>[32m[10285.498508] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d118008
>[32m[10285.498652] [0m[drm:__drm_atomic_state_free] Freeing atomic state ffff88005d118008
>[32m[14399.305702] [0m[33mConsole[0m: switching to colour dummy device 80x25
>[32m[14399.306225] [0m[33m[IGT] perf[0m: executing
>[32m[14399.326916] [0m[33m[IGT] perf[0m: starting subtest oa-exponents
>[32m[14399.338506] [0m[drm:i915_perf_open_ioctl [i915]] OA Buffer initialized, gtt offset = 0x1000000, vaddr = ffffc90002651000
>[32m[14400.326515] [0m[33m[IGT] perf[0m: exiting, ret=99
>[32m[14400.349938] [0m[drm:drm_atomic_state_init] Allocated atomic state ffff88005d11afd8
>[32m[14400.349956] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff88005a3ee068 state to ffff88005d11afd8
>[32m[14400.349972] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff88005d2da548 state to ffff88005d11afd8
>[32m[14400.349984] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:30:sprite A] ffff88005a3ee758 state to ffff88005d11afd8
>[32m[14400.349990] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88005a3ee758 to [NOCRTC]
>[32m[14400.349996] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88005a3ee758
>[32m[14400.350007] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:33:cursor A] ffff88005a3ec008 state to ffff88005d11afd8
>[32m[14400.350013] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88005a3ec008 to [NOCRTC]
>[32m[14400.350018] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88005a3ec008
>[32m[14400.350029] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:37:primary B] ffff88005a3eee48 state to ffff88005d11afd8
>[32m[14400.350040] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:40:sprite B] ffff88005a3ef788 state to ffff88005d11afd8
>[32m[14400.350046] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88005a3ef788 to [NOCRTC]
>[32m[14400.350051] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88005a3ef788
>[32m[14400.350062] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:43:cursor B] ffff88005a3ecb98 state to ffff88005d11afd8
>[32m[14400.350067] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88005a3ecb98 to [NOCRTC]
>[32m[14400.350072] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88005a3ecb98
>[32m[14400.350084] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:47:primary C] ffff88005a3edbc8 state to ffff88005d11afd8
>[32m[14400.350094] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:50:sprite C] ffff88005a3ef9d8 state to ffff88005d11afd8
>[32m[14400.350100] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88005a3ef9d8 to [NOCRTC]
>[32m[14400.350105] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88005a3ef9d8
>[32m[14400.350116] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:53:cursor C] ffff88005a3ecde8 state to ffff88005d11afd8
>[32m[14400.350121] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88005a3ecde8 to [NOCRTC]
>[32m[14400.350127] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88005a3ecde8
>[32m[14400.350142] [0m[drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff88005d2da548
>[32m[14400.350147] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88005a3ee068 to [CRTC:36:pipe A]
>[32m[14400.350153] [0m[drm:drm_atomic_set_fb_for_plane] Set [FB:83] for plane state ffff88005a3ee068
>[32m[14400.350161] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88005d11afd8
>[32m[14400.350181] [0m[drm:drm_atomic_get_connector_state] Added [CONNECTOR:63:DP-1] ffff88005b410e88 state to ffff88005d11afd8
>[32m[14400.350188] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88005b410e88 to [NOCRTC]
>[32m[14400.350195] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88005b410e88 to [CRTC:36:pipe A]
>[32m[14400.350208] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:46:pipe B] ffff88005d2db7e8 state to ffff88005d11afd8
>[32m[14400.350214] [0m[drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88005d2db7e8
>[32m[14400.350220] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88005a3eee48 to [NOCRTC]
>[32m[14400.350225] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88005a3eee48
>[32m[14400.350232] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:46:pipe B] to ffff88005d11afd8
>[32m[14400.350247] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:56:pipe C] ffff88005d2ddd28 state to ffff88005d11afd8
>[32m[14400.350252] [0m[drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88005d2ddd28
>[32m[14400.350258] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88005a3edbc8 to [NOCRTC]
>[32m[14400.350263] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88005a3edbc8
>[32m[14400.350269] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:56:pipe C] to ffff88005d11afd8
>[32m[14400.350278] [0m[drm:drm_atomic_check_only] checking ffff88005d11afd8
>[32m[14400.350291] [0m[drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:63:DP-1]
>[32m[14400.350299] [0m[drm:drm_atomic_helper_check_modeset] [CONNECTOR:63:DP-1] keeps [ENCODER:62:DDI C], now on [CRTC:36:pipe A]
>[32m[14400.350372] [0m[drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:27:primary A] with fb 83
>[32m[14400.350425] [0m[drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:primary A] visible 1 -> 1, off 0, on 0, ms 0
>[32m[14400.350440] [0m[drm:drm_atomic_commit] committing ffff88005d11afd8
>[32m[14400.362027] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d11afd8
>[32m[14400.362189] [0m[drm:__drm_atomic_state_free] Freeing atomic state ffff88005d11afd8
>[32m[14400.363258] [0m[drm:drm_atomic_state_init] Allocated atomic state ffff88005d11da58
>[32m[14400.363271] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff880057f7e758 state to ffff88005d11da58
>[32m[14400.363277] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d11da58
>[32m[14400.363293] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff880057f7e758 state to ffff88005d11da58
>[32m[14400.363303] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff88005d2d92a8 state to ffff88005d11da58
>[32m[14400.363310] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:30:sprite A] ffff880057f7d4d8 state to ffff88005d11da58
>[32m[14400.363313] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7d4d8 to [NOCRTC]
>[32m[14400.363315] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7d4d8
>[32m[14400.363321] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:33:cursor A] ffff880057f7c948 state to ffff88005d11da58
>[32m[14400.363323] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7c948 to [NOCRTC]
>[32m[14400.363325] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7c948
>[32m[14400.363328] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d11da58
>[32m[14400.363345] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff880057f7c948 state to ffff88005d11da58
>[32m[14400.363350] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff88005d2d92a8 state to ffff88005d11da58
>[32m[14400.363356] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:30:sprite A] ffff880057f7fc28 state to ffff88005d11da58
>[32m[14400.363358] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7fc28 to [NOCRTC]
>[32m[14400.363360] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7fc28
>[32m[14400.363365] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:33:cursor A] ffff880057f7d4d8 state to ffff88005d11da58
>[32m[14400.363367] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7d4d8 to [NOCRTC]
>[32m[14400.363369] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7d4d8
>[32m[14400.363375] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:37:primary B] ffff880057f7d038 state to ffff88005d11da58
>[32m[14400.363380] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:40:sprite B] ffff880057f7e758 state to ffff88005d11da58
>[32m[14400.363382] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7e758 to [NOCRTC]
>[32m[14400.363384] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7e758
>[32m[14400.363390] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:43:cursor B] ffff880057f7dbc8 state to ffff88005d11da58
>[32m[14400.363392] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7dbc8 to [NOCRTC]
>[32m[14400.363394] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7dbc8
>[32m[14400.363399] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:47:primary C] ffff880057f7de18 state to ffff88005d11da58
>[32m[14400.363404] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:50:sprite C] ffff880057f7c4a8 state to ffff88005d11da58
>[32m[14400.363406] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7c4a8 to [NOCRTC]
>[32m[14400.363408] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7c4a8
>[32m[14400.363414] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:53:cursor C] ffff880057f7d288 state to ffff88005d11da58
>[32m[14400.363416] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7d288 to [NOCRTC]
>[32m[14400.363418] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7d288
>[32m[14400.363425] [0m[drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff88005d2d92a8
>[32m[14400.363428] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7c948 to [CRTC:36:pipe A]
>[32m[14400.363430] [0m[drm:drm_atomic_set_fb_for_plane] Set [FB:83] for plane state ffff880057f7c948
>[32m[14400.363434] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88005d11da58
>[32m[14400.363444] [0m[drm:drm_atomic_get_connector_state] Added [CONNECTOR:63:DP-1] ffff88005ecb8cb8 state to ffff88005d11da58
>[32m[14400.363448] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88005ecb8cb8 to [NOCRTC]
>[32m[14400.363451] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88005ecb8cb8 to [CRTC:36:pipe A]
>[32m[14400.363454] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d11da58
>[32m[14400.363490] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff880057f7d288 state to ffff88005d11da58
>[32m[14400.363496] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff88005d2d92a8 state to ffff88005d11da58
>[32m[14400.363502] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:30:sprite A] ffff880057f7cde8 state to ffff88005d11da58
>[32m[14400.363504] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7cde8 to [NOCRTC]
>[32m[14400.363506] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7cde8
>[32m[14400.363511] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:33:cursor A] ffff880057f7c4a8 state to ffff88005d11da58
>[32m[14400.363514] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7c4a8 to [NOCRTC]
>[32m[14400.363516] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7c4a8
>[32m[14400.363521] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:37:primary B] ffff880057f7d728 state to ffff88005d11da58
>[32m[14400.363526] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:40:sprite B] ffff880057f7de18 state to ffff88005d11da58
>[32m[14400.363528] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7de18 to [NOCRTC]
>[32m[14400.363531] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7de18
>[32m[14400.363536] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:43:cursor B] ffff880057f7c258 state to ffff88005d11da58
>[32m[14400.363538] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7c258 to [NOCRTC]
>[32m[14400.363540] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7c258
>[32m[14400.363545] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:47:primary C] ffff880057f7dbc8 state to ffff88005d11da58
>[32m[14400.363550] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:50:sprite C] ffff880057f7f098 state to ffff88005d11da58
>[32m[14400.363552] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7f098 to [NOCRTC]
>[32m[14400.363554] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7f098
>[32m[14400.363559] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:53:cursor C] ffff880057f7e758 state to ffff88005d11da58
>[32m[14400.363561] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7e758 to [NOCRTC]
>[32m[14400.363563] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7e758
>[32m[14400.363568] [0m[drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff88005d2d92a8
>[32m[14400.363571] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7d288 to [CRTC:36:pipe A]
>[32m[14400.363573] [0m[drm:drm_atomic_set_fb_for_plane] Set [FB:83] for plane state ffff880057f7d288
>[32m[14400.363576] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88005d11da58
>[32m[14400.363583] [0m[drm:drm_atomic_get_connector_state] Added [CONNECTOR:63:DP-1] ffff88005ecb8cb8 state to ffff88005d11da58
>[32m[14400.363586] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88005ecb8cb8 to [NOCRTC]
>[32m[14400.363589] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88005ecb8cb8 to [CRTC:36:pipe A]
>[32m[14400.363595] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:46:pipe B] ffff88005d2dae98 state to ffff88005d11da58
>[32m[14400.363598] [0m[drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88005d2dae98
>[32m[14400.363600] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7d728 to [NOCRTC]
>[32m[14400.363602] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7d728
>[32m[14400.363605] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:46:pipe B] to ffff88005d11da58
>[32m[14400.363612] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:56:pipe C] ffff88005d2de678 state to ffff88005d11da58
>[32m[14400.363614] [0m[drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88005d2de678
>[32m[14400.363616] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7dbc8 to [NOCRTC]
>[32m[14400.363618] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7dbc8
>[32m[14400.363621] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:56:pipe C] to ffff88005d11da58
>[32m[14400.363625] [0m[drm:drm_atomic_check_only] checking ffff88005d11da58
>[32m[14400.363632] [0m[drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:63:DP-1]
>[32m[14400.363636] [0m[drm:drm_atomic_helper_check_modeset] [CONNECTOR:63:DP-1] keeps [ENCODER:62:DDI C], now on [CRTC:36:pipe A]
>[32m[14400.363681] [0m[drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:27:primary A] with fb 83
>[32m[14400.363708] [0m[drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:primary A] visible 1 -> 1, off 0, on 0, ms 0
>[32m[14400.363716] [0m[drm:drm_atomic_commit] committing ffff88005d11da58
>[32m[14400.378673] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d11da58
>[32m[14400.378764] [0m[drm:__drm_atomic_state_free] Freeing atomic state ffff88005d11da58
>[32m[14400.378939] [0m[drm:drm_atomic_state_init] Allocated atomic state ffff88005d11da58
>[32m[14400.378952] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff880057f7d978 state to ffff88005d11da58
>[32m[14400.378964] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880077dce678 state to ffff88005d11da58
>[32m[14400.378969] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d11da58
>[32m[14400.378990] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff880057f7d978 state to ffff88005d11da58
>[32m[14400.379001] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff88005ed14138 state to ffff88005d11da58
>[32m[14400.379011] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:30:sprite A] ffff880057f7f788 state to ffff88005d11da58
>[32m[14400.379015] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7f788 to [NOCRTC]
>[32m[14400.379019] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7f788
>[32m[14400.379028] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:33:cursor A] ffff880057f7d038 state to ffff88005d11da58
>[32m[14400.379032] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7d038 to [NOCRTC]
>[32m[14400.379036] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7d038
>[32m[14400.379040] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d11da58
>[32m[14400.379068] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff880057f7d038 state to ffff88005d11da58
>[32m[14400.379080] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff88004cf7d3d8 state to ffff88005d11da58
>[32m[14400.379089] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:30:sprite A] ffff880057f7d4d8 state to ffff88005d11da58
>[32m[14400.379092] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7d4d8 to [NOCRTC]
>[32m[14400.379096] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7d4d8
>[32m[14400.379105] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:33:cursor A] ffff880057f7f788 state to ffff88005d11da58
>[32m[14400.379108] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7f788 to [NOCRTC]
>[32m[14400.379112] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7f788
>[32m[14400.379120] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:37:primary B] ffff880057f7fc28 state to ffff88005d11da58
>[32m[14400.379129] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:40:sprite B] ffff880057f7d978 state to ffff88005d11da58
>[32m[14400.379133] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7d978 to [NOCRTC]
>[32m[14400.379136] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7d978
>[32m[14400.379145] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:43:cursor B] ffff880057f7c948 state to ffff88005d11da58
>[32m[14400.379148] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7c948 to [NOCRTC]
>[32m[14400.379152] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7c948
>[32m[14400.379161] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:47:primary C] ffff880057f7e9a8 state to ffff88005d11da58
>[32m[14400.379169] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:50:sprite C] ffff880057f7c008 state to ffff88005d11da58
>[32m[14400.379173] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7c008 to [NOCRTC]
>[32m[14400.379176] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7c008
>[32m[14400.379185] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:53:cursor C] ffff880057f7f538 state to ffff88005d11da58
>[32m[14400.379189] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7f538 to [NOCRTC]
>[32m[14400.379192] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880057f7f538
>[32m[14400.379204] [0m[drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff88004cf7d3d8
>[32m[14400.379208] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880057f7d038 to [CRTC:36:pipe A]
>[32m[14400.379212] [0m[drm:drm_atomic_set_fb_for_plane] Set [FB:83] for plane state ffff880057f7d038
>[32m[14400.379219] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88005d11da58
>[32m[14400.379235] [0m[drm:drm_atomic_get_connector_state] Added [CONNECTOR:63:DP-1] ffff88005ecb8ae8 state to ffff88005d11da58
>[32m[14400.379241] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88005ecb8ae8 to [NOCRTC]
>[32m[14400.379246] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88005ecb8ae8 to [CRTC:36:pipe A]
>[32m[14400.379251] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d11da58
>[32m[14400.379314] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff88005ee45728 state to ffff88005d11da58
>[32m[14400.379324] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff88004cf7d3d8 state to ffff88005d11da58
>[32m[14400.379333] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:30:sprite A] ffff8800702d1038 state to ffff88005d11da58
>[32m[14400.379337] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800702d1038 to [NOCRTC]
>[32m[14400.379340] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800702d1038
>[32m[14400.379351] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:33:cursor A] ffff880059a5a508 state to ffff88005d11da58
>[32m[14400.379355] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880059a5a508 to [NOCRTC]
>[32m[14400.379358] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880059a5a508
>[32m[14400.379368] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:37:primary B] ffff880059a5b538 state to ffff88005d11da58
>[32m[14400.379378] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:40:sprite B] ffff880059a5a2b8 state to ffff88005d11da58
>[32m[14400.379382] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880059a5a2b8 to [NOCRTC]
>[32m[14400.379386] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880059a5a2b8
>[32m[14400.379395] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:43:cursor B] ffff880059a5b9d8 state to ffff88005d11da58
>[32m[14400.379399] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880059a5b9d8 to [NOCRTC]
>[32m[14400.379402] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880059a5b9d8
>[32m[14400.379412] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:47:primary C] ffff880059a59978 state to ffff88005d11da58
>[32m[14400.379421] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:50:sprite C] ffff880059a59e18 state to ffff88005d11da58
>[32m[14400.379425] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880059a59e18 to [NOCRTC]
>[32m[14400.379429] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880059a59e18
>[32m[14400.379438] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:53:cursor C] ffff880059a5ae48 state to ffff88005d11da58
>[32m[14400.379442] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880059a5ae48 to [NOCRTC]
>[32m[14400.379446] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880059a5ae48
>[32m[14400.379455] [0m[drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff88004cf7d3d8
>[32m[14400.379459] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88005ee45728 to [CRTC:36:pipe A]
>[32m[14400.379463] [0m[drm:drm_atomic_set_fb_for_plane] Set [FB:83] for plane state ffff88005ee45728
>[32m[14400.379468] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88005d11da58
>[32m[14400.379478] [0m[drm:drm_atomic_get_connector_state] Added [CONNECTOR:63:DP-1] ffff88005ecb8ae8 state to ffff88005d11da58
>[32m[14400.379484] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88005ecb8ae8 to [NOCRTC]
>[32m[14400.379488] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88005ecb8ae8 to [CRTC:36:pipe A]
>[32m[14400.379498] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:46:pipe B] ffff88004cf7efc8 state to ffff88005d11da58
>[32m[14400.379502] [0m[drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88004cf7efc8
>[32m[14400.379506] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880059a5b538 to [NOCRTC]
>[32m[14400.379510] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880059a5b538
>[32m[14400.379515] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:46:pipe B] to ffff88005d11da58
>[32m[14400.379528] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:56:pipe C] ffff88004cf78958 state to ffff88005d11da58
>[32m[14400.379532] [0m[drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88004cf78958
>[32m[14400.379535] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880059a59978 to [NOCRTC]
>[32m[14400.379539] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880059a59978
>[32m[14400.379544] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:56:pipe C] to ffff88005d11da58
>[32m[14400.379551] [0m[drm:drm_atomic_check_only] checking ffff88005d11da58
>[32m[14400.379561] [0m[drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:63:DP-1]
>[32m[14400.379566] [0m[drm:drm_atomic_helper_check_modeset] [CONNECTOR:63:DP-1] keeps [ENCODER:62:DDI C], now on [CRTC:36:pipe A]
>[32m[14400.379636] [0m[drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:27:primary A] with fb 83
>[32m[14400.379688] [0m[drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:primary A] visible 1 -> 1, off 0, on 0, ms 0
>[32m[14400.379700] [0m[drm:drm_atomic_commit] committing ffff88005d11da58
>[32m[14400.395361] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d11da58
>[32m[14400.395447] [0m[drm:__drm_atomic_state_free] Freeing atomic state ffff88005d11da58
>[32m[14400.401627] [0m[33mConsole[0m: switching to colour frame buffer device 240x67
>[32m[14400.401661] [0m[drm:drm_atomic_state_init] Allocated atomic state ffff88005d11da58
>[32m[14400.401669] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff880059a59728 state to ffff88005d11da58
>[32m[14400.401678] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff88004cf792a8 state to ffff88005d11da58
>[32m[14400.401685] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:30:sprite A] ffff880059a59288 state to ffff88005d11da58
>[32m[14400.401688] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880059a59288 to [NOCRTC]
>[32m[14400.401691] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880059a59288
>[32m[14400.401694] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d11da58
>[32m[14400.401712] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff880059a59288 state to ffff88005d11da58
>[32m[14400.401719] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff88004cf792a8 state to ffff88005d11da58
>[32m[14400.401726] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:30:sprite A] ffff880059a5abf8 state to ffff88005d11da58
>[32m[14400.401728] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880059a5abf8 to [NOCRTC]
>[32m[14400.401731] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880059a5abf8
>[32m[14400.401737] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:33:cursor A] ffff880059a59728 state to ffff88005d11da58
>[32m[14400.401739] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880059a59728 to [NOCRTC]
>[32m[14400.401742] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880059a59728
>[32m[14400.401745] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d11da58
>[32m[14400.401776] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff880059a59728 state to ffff88005d11da58
>[32m[14400.401783] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff88004cf792a8 state to ffff88005d11da58
>[32m[14400.401789] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:30:sprite A] ffff880059a58008 state to ffff88005d11da58
>[32m[14400.401792] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880059a58008 to [NOCRTC]
>[32m[14400.401794] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880059a58008
>[32m[14400.401800] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:33:cursor A] ffff880059a5abf8 state to ffff88005d11da58
>[32m[14400.401803] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880059a5abf8 to [NOCRTC]
>[32m[14400.401805] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880059a5abf8
>[32m[14400.401811] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:37:primary B] ffff880059a59bc8 state to ffff88005d11da58
>[32m[14400.401817] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:40:sprite B] ffff880059a59288 state to ffff88005d11da58
>[32m[14400.401820] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880059a59288 to [NOCRTC]
>[32m[14400.401822] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880059a59288
>[32m[14400.401828] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:43:cursor B] ffff880059a584a8 state to ffff88005d11da58
>[32m[14400.401831] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880059a584a8 to [NOCRTC]
>[32m[14400.401834] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880059a584a8
>[32m[14400.401839] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:47:primary C] ffff880059a5bc28 state to ffff88005d11da58
>[32m[14400.401845] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:50:sprite C] ffff880059a58de8 state to ffff88005d11da58
>[32m[14400.401848] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880059a58de8 to [NOCRTC]
>[32m[14400.401850] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880059a58de8
>[32m[14400.401857] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:53:cursor C] ffff880059a594d8 state to ffff88005d11da58
>[32m[14400.401859] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880059a594d8 to [NOCRTC]
>[32m[14400.401862] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880059a594d8
>[32m[14400.401870] [0m[drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff88004cf792a8
>[32m[14400.401873] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880059a59728 to [CRTC:36:pipe A]
>[32m[14400.401875] [0m[drm:drm_atomic_set_fb_for_plane] Set [FB:83] for plane state ffff880059a59728
>[32m[14400.401879] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88005d11da58
>[32m[14400.401891] [0m[drm:drm_atomic_get_connector_state] Added [CONNECTOR:63:DP-1] ffff88005ecb8cb8 state to ffff88005d11da58
>[32m[14400.401895] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88005ecb8cb8 to [NOCRTC]
>[32m[14400.401898] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88005ecb8cb8 to [CRTC:36:pipe A]
>[32m[14400.401902] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d11da58
>[32m[14400.401947] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:27:primary A] ffff88006d351288 state to ffff88005d11da58
>[32m[14400.401953] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff88004cf792a8 state to ffff88005d11da58
>[32m[14400.401960] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:30:sprite A] ffff88006d3532e8 state to ffff88005d11da58
>[32m[14400.401962] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006d3532e8 to [NOCRTC]
>[32m[14400.401965] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006d3532e8
>[32m[14400.401971] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:33:cursor A] ffff88006d350008 state to ffff88005d11da58
>[32m[14400.401974] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006d350008 to [NOCRTC]
>[32m[14400.401976] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006d350008
>[32m[14400.401983] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:37:primary B] ffff88006d351728 state to ffff88005d11da58
>[32m[14400.401989] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:40:sprite B] ffff88006d3529a8 state to ffff88005d11da58
>[32m[14400.401992] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006d3529a8 to [NOCRTC]
>[32m[14400.401994] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006d3529a8
>[32m[14400.402000] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:43:cursor B] ffff88006d350258 state to ffff88005d11da58
>[32m[14400.402003] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006d350258 to [NOCRTC]
>[32m[14400.402005] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006d350258
>[32m[14400.402011] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:47:primary C] ffff88006d350de8 state to ffff88005d11da58
>[32m[14400.402017] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:50:sprite C] ffff88006d3539d8 state to ffff88005d11da58
>[32m[14400.402020] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006d3539d8 to [NOCRTC]
>[32m[14400.402022] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006d3539d8
>[32m[14400.402028] [0m[drm:drm_atomic_get_plane_state] Added [PLANE:53:cursor C] ffff88006d350948 state to ffff88005d11da58
>[32m[14400.402031] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006d350948 to [NOCRTC]
>[32m[14400.402033] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006d350948
>[32m[14400.402040] [0m[drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff88004cf792a8
>[32m[14400.402043] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006d351288 to [CRTC:36:pipe A]
>[32m[14400.402045] [0m[drm:drm_atomic_set_fb_for_plane] Set [FB:83] for plane state ffff88006d351288
>[32m[14400.402049] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88005d11da58
>[32m[14400.402056] [0m[drm:drm_atomic_get_connector_state] Added [CONNECTOR:63:DP-1] ffff88005ecb8cb8 state to ffff88005d11da58
>[32m[14400.402060] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88005ecb8cb8 to [NOCRTC]
>[32m[14400.402063] [0m[drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88005ecb8cb8 to [CRTC:36:pipe A]
>[32m[14400.402070] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:46:pipe B] ffff88004cf7ae98 state to ffff88005d11da58
>[32m[14400.402072] [0m[drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88004cf7ae98
>[32m[14400.402075] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006d351728 to [NOCRTC]
>[32m[14400.402077] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006d351728
>[32m[14400.402081] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:46:pipe B] to ffff88005d11da58
>[32m[14400.402090] [0m[drm:drm_atomic_get_crtc_state] Added [CRTC:56:pipe C] ffff88004cf7c138 state to ffff88005d11da58
>[32m[14400.402093] [0m[drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88004cf7c138
>[32m[14400.402095] [0m[drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88006d350de8 to [NOCRTC]
>[32m[14400.402098] [0m[drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88006d350de8
>[32m[14400.402101] [0m[drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:56:pipe C] to ffff88005d11da58
>[32m[14400.402106] [0m[drm:drm_atomic_check_only] checking ffff88005d11da58
>[32m[14400.402113] [0m[drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:63:DP-1]
>[32m[14400.402116] [0m[drm:drm_atomic_helper_check_modeset] [CONNECTOR:63:DP-1] keeps [ENCODER:62:DDI C], now on [CRTC:36:pipe A]
>[32m[14400.402160] [0m[drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:27:primary A] with fb 83
>[32m[14400.402195] [0m[drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:primary A] visible 1 -> 1, off 0, on 0, ms 0
>[32m[14400.402203] [0m[drm:drm_atomic_commit] committing ffff88005d11da58
>[32m[14400.412026] [0m[drm:drm_atomic_state_default_clear] Clearing atomic state ffff88005d11da58
>[32m[14400.412119] [0m[drm:__drm_atomic_state_free] Freeing atomic state ffff88005d11da58
>
>
>^C
>(01:54 PM) [gfx@gfx-desktop] [~]$ : dmesg -wsudo dmesg -C
>[sudo] password for gfx: 
>(01:54 PM) [gfx@gfx-desktop] [~]$ :

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Attachments on bug 102421: 133801 | 133802 | 133979

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