Attachment 134168 Details for Bug 102662 – dmesg log

dmesg log

dmesg_log (text/plain), 251.03 KB, created by Elizabeth on 2017-09-11 20:04:35 UTC

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Creator: Elizabeth

Created: 2017-09-11 20:04:35 UTC

Size: 251.03 KB

patch

obsolete

>[  219.468550] [drm:skl_compute_wm [i915]] [PLANE:43:plane 1B] ddb (510 - 1012) -> (0 - 0)
>[  219.468574] [drm:skl_compute_wm [i915]] [PLANE:55:cursor B] ddb (1012 - 1020) -> (0 - 0)
>[  219.468586] [drm:drm_atomic_commit [drm]] committing ffff8f7f31c16800
>[  219.468629] [drm:intel_edp_backlight_off [i915]] 
>[  219.622218] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[  219.622248] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000063
>[  219.629311] sd 0:0:0:0: [sda] Stopping disk
>[  219.674215] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  219.674249] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  219.686546] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  219.686576] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b
>[  219.686839] [drm:intel_edp_panel_off.part.29 [i915]] Turn eDP port A panel power off
>[  219.686866] [drm:intel_edp_panel_off.part.29 [i915]] Wait for panel power off time
>[  219.686893] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status 80000008 control 00000060
>[  219.737980] [drm:wait_panel_status [i915]] Wait complete
>[  219.738006] [drm:intel_power_well_disable [i915]] disabling DDI A IO power well
>[  219.739926] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010
>[  219.739954] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  219.739981] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  219.740081] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  219.740112] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL A (active 1, on? 1) for crtc 42
>[  219.740141] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  219.740167] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL A
>[  219.740216] [drm:intel_disable_pipe [i915]] disabling pipe B
>[  219.746851] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[  219.748928] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 2, on? 1) for crtc 58
>[  219.748979] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B
>[  219.749018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI A]
>[  219.749045] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B]
>[  219.749075] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A]
>[  219.749100] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B]
>[  219.749125] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C]
>[  219.749149] [drm:intel_atomic_commit_tail [i915]] [ENCODER:90:DDI C]
>[  219.749175] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:76:eDP-1]
>[  219.749201] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:84:DP-1]
>[  219.749226] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL A
>[  219.749251] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL B
>[  219.749276] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL C
>[  219.749307] [drm:intel_atomic_commit_tail [i915]] [CRTC:42:pipe A]
>[  219.749339] [drm:intel_atomic_commit_tail [i915]] [CRTC:58:pipe B]
>[  219.749359] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8f7f31c16800
>[  219.749374] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8f7f31c16800
>[  219.756309] PM: suspend of devices complete after 317.414 msecs
>[  219.761133] [drm:intel_power_well_disable [i915]] disabling AUX C
>[  219.761159] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  219.761184] [drm:intel_power_well_disable [i915]] disabling AUX A
>[  219.761209] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[  219.761235] [drm:intel_power_well_disable [i915]] disabling dpio-common-b
>[  219.761260] [drm:intel_power_well_disable [i915]] disabling dpio-common-a
>[  219.761285] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  219.761318] [drm:intel_power_well_disable [i915]] disabling DC off
>[  219.761347] [drm:gen9_enable_dc5 [i915]] Enabling DC5
>[  219.761375] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01
>[  219.761401] [drm:intel_power_well_disable [i915]] disabling always-on
>[  219.761429] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00
>[  219.761508] [drm:intel_update_cdclk [i915]] Current CD clock rate: 19200 kHz, VCO: 0 kHz, ref: 19200 kHz
>[  219.761532] [drm:intel_power_well_disable [i915]] disabling power well 1
>[  219.761599] [drm:bxt_enable_dc9 [i915]] Enabling DC9
>[  219.761627] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 08
>[  219.778348] PM: late suspend of devices complete after 21.929 msecs
>[  219.819415] PM: noirq suspend of devices complete after 41.063 msecs
>[  219.820682] ACPI: Preparing to enter system sleep state S3
>[  219.821517] ACPI: EC: event blocked
>[  219.821518] ACPI: EC: EC stopped
>[  219.821520] PM: Saving platform NVS memory
>[  219.821530] Disabling non-boot CPUs ...
>[  219.835763] smpboot: CPU 1 is now offline
>[  219.841228] ACPI: Low-level resume complete
>[  219.841393] ACPI: EC: EC started
>[  219.841394] PM: Restoring platform NVS memory
>[  219.842355] Suspended for 14.136 seconds
>[  219.842518] Enabling non-boot CPUs ...
>[  219.842592] x86: Booting SMP configuration:
>[  219.842593] smpboot: Booting Node 0 Processor 1 APIC 0x2
>[  219.843768]  cache: parent cpu1 should not be sleeping
>[  219.844049] CPU1 is up
>[  219.846740] ACPI: Waking up from system sleep state S3
>[  219.984308] PM: noirq resume of devices complete after 39.244 msecs
>[  219.984680] [drm:gen9_sanitize_dc_state [i915]] Resetting DC state tracking from 08 to 00
>[  219.984737] [drm:bxt_disable_dc9 [i915]] Disabling DC9
>[  219.984795] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  219.984861] [drm:sanitize_rc6_option [i915]] BIOS enabled RC states: HW_CTRL off HW_RC6 off SW_TARGET_STATE 4
>[  219.984947] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  219.985005] [drm:intel_power_well_enable [i915]] enabling power well 1
>[  219.985082] [drm:intel_update_cdclk [i915]] Current CD clock rate: 316800 kHz, VCO: 633600 kHz, ref: 19200 kHz
>[  219.985491] [drm:intel_power_well_enable [i915]] enabling always-on
>[  219.985548] [drm:intel_power_well_enable [i915]] enabling DC off
>[  219.985606] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  219.985666] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  219.985733] [drm:intel_power_well_enable [i915]] enabling dpio-common-a
>[  219.985879] [drm:intel_power_well_enable [i915]] enabling dpio-common-b
>[  219.986047] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[  219.986214] [drm:intel_power_well_enable [i915]] enabling AUX A
>[  219.986269] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  219.986324] [drm:intel_power_well_enable [i915]] enabling AUX C
>[  220.160445] PM: early resume of devices complete after 176.065 msecs
>[  220.160774] HDA: we are doing full chip reset now
>[  220.161515] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x799e5018
>[  220.161605] [drm:intel_opregion_setup [i915]] Public ACPI methods supported
>[  220.161678] [drm:intel_opregion_setup [i915]] ASLE supported
>[  220.161785] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA)
>[  220.161891] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:10001010 hp_port:38
>[  220.161982] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60
>[  220.162058] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60
>[  220.162216] [drm:gen8_init_common_ring [i915]] Execlists enabled for rcs0
>[  220.162307] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 12
>[  220.162445] [drm:gen8_init_common_ring [i915]] Execlists enabled for bcs0
>[  220.162589] [drm:gen8_init_common_ring [i915]] Execlists enabled for vcs0
>[  220.162730] [drm:gen8_init_common_ring [i915]] Execlists enabled for vecs0
>[  220.163292] ACPI: EC: event unblocked
>[  220.164805] [drm:intel_huc_init_hw [i915]] i915/glk_huc_ver02_00_1748.bin fw status: fetch SUCCESS, load SUCCESS
>[  220.166972] [drm:intel_huc_init_hw [i915]] HuC DMA transfer wait over with ret 0
>[  220.167058] [drm:intel_huc_init_hw [i915]] i915/glk_huc_ver02_00_1748.bin fw status: fetch SUCCESS, load SUCCESS
>[  220.167142] [drm:intel_guc_init_hw [i915]] GuC fw status: path i915/glk_guc_ver10_56.bin, fetch SUCCESS, load SUCCESS
>[  220.167224] [drm:intel_guc_init_hw [i915]] GuC fw status: fetch SUCCESS, load PENDING
>[  220.170907] sd 0:0:0:0: [sda] Starting disk
>[  220.173423] [drm:guc_ucode_xfer_dma [i915]] DMA status 0x10, GuC status 0x8002f0ec
>[  220.173468] [drm:guc_ucode_xfer_dma [i915]] returning 0
>[  220.173471] [drm] GuC submission enabled (firmware i915/glk_guc_ver10_56.bin [version 10.56])
>[  220.179162] r8169 0000:01:00.0 enp1s0: link down
>[  220.184248] [drm:intel_update_cdclk [i915]] Current CD clock rate: 316800 kHz, VCO: 633600 kHz, ref: 19200 kHz
>[  220.184315] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38
>[  220.184402] [drm:intel_set_plane_visible [i915]] pipe A active planes 0x0
>[  220.184469] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:42:pipe A] hw state readout: disabled
>[  220.184537] [drm:intel_set_plane_visible [i915]] pipe B active planes 0x0
>[  220.184597] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:58:pipe B] hw state readout: disabled
>[  220.184666] [drm:intel_set_plane_visible [i915]] pipe C active planes 0x0
>[  220.184725] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:74:pipe C] hw state readout: disabled
>[  220.184789] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL A hw state readout: crtc_mask 0x00000000, on 0
>[  220.184847] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL B hw state readout: crtc_mask 0x00000000, on 0
>[  220.184904] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0
>[  220.184967] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:75:DDI A] hw state readout: disabled, pipe A
>[  220.185025] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:83:DDI B] hw state readout: disabled, pipe A
>[  220.185088] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:85:DP-MST A] hw state readout: disabled, pipe A
>[  220.185145] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:86:DP-MST B] hw state readout: disabled, pipe B
>[  220.185201] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:87:DP-MST C] hw state readout: disabled, pipe C
>[  220.185258] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:90:DDI C] hw state readout: disabled, pipe A
>[  220.185318] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:76:eDP-1] hw state readout: disabled
>[  220.185377] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:84:DP-1] hw state readout: disabled
>[  220.185439] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:88:HDMI-A-1] hw state readout: disabled
>[  220.185500] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:91:HDMI-A-2] hw state readout: disabled
>[  220.185564] [drm:intel_dump_pipe_config [i915]] [CRTC:42:pipe A][setup_hw_state]
>[  220.185626] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0
>[  220.185682] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  220.185737] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  220.185778] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  220.185834] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  220.185863] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  220.185920] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  220.186004] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  220.186059] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  220.186114] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  220.186168] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  220.186235] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0
>[  220.186293] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  220.186349] [drm:intel_dump_pipe_config [i915]] [PLANE:27:plane 1A] disabled, scaler_id = -1
>[  220.186408] [drm:intel_dump_pipe_config [i915]] [PLANE:30:plane 2A] disabled, scaler_id = -1
>[  220.186462] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 3A] disabled, scaler_id = -1
>[  220.186520] [drm:intel_dump_pipe_config [i915]] [PLANE:36:plane 4A] disabled, scaler_id = -1
>[  220.186577] [drm:intel_dump_pipe_config [i915]] [PLANE:39:cursor A] disabled, scaler_id = -1
>[  220.186635] [drm:intel_dump_pipe_config [i915]] [CRTC:58:pipe B][setup_hw_state]
>[  220.186690] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0
>[  220.186744] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  220.186801] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  220.186830] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  220.186885] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  220.186914] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  220.186970] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  220.187025] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  220.187080] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  220.187134] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  220.187189] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  220.187250] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0
>[  220.187305] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  220.187363] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 1B] disabled, scaler_id = -1
>[  220.187420] [drm:intel_dump_pipe_config [i915]] [PLANE:46:plane 2B] disabled, scaler_id = -1
>[  220.187474] [drm:intel_dump_pipe_config [i915]] [PLANE:49:plane 3B] disabled, scaler_id = -1
>[  220.187528] [drm:intel_dump_pipe_config [i915]] [PLANE:52:plane 4B] disabled, scaler_id = -1
>[  220.187582] [drm:intel_dump_pipe_config [i915]] [PLANE:55:cursor B] disabled, scaler_id = -1
>[  220.187639] [drm:intel_dump_pipe_config [i915]] [CRTC:74:pipe C][setup_hw_state]
>[  220.187693] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0
>[  220.187747] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  220.187801] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  220.187830] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  220.187884] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  220.187912] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  220.187969] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  220.188024] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  220.188078] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1
>[  220.188133] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  220.188186] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  220.188285] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0
>[  220.188335] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  220.188386] [drm:intel_dump_pipe_config [i915]] [PLANE:59:plane 1C] disabled, scaler_id = -1
>[  220.188436] [drm:intel_dump_pipe_config [i915]] [PLANE:62:plane 2C] disabled, scaler_id = -1
>[  220.188488] [drm:intel_dump_pipe_config [i915]] [PLANE:65:plane 3C] disabled, scaler_id = -1
>[  220.188540] [drm:intel_dump_pipe_config [i915]] [PLANE:68:plane 4C] disabled, scaler_id = -1
>[  220.188592] [drm:intel_dump_pipe_config [i915]] [PLANE:71:cursor C] disabled, scaler_id = -1
>[  220.188718] [drm:intel_power_well_disable [i915]] disabling AUX C
>[  220.188772] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  220.188824] [drm:intel_power_well_disable [i915]] disabling AUX A
>[  220.188874] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[  220.188929] [drm:intel_power_well_disable [i915]] disabling dpio-common-b
>[  220.188980] [drm:intel_power_well_disable [i915]] disabling dpio-common-a
>[  220.189030] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  220.189085] [drm:intel_power_well_disable [i915]] disabling DC off
>[  220.189140] [drm:gen9_enable_dc5 [i915]] Enabling DC5
>[  220.189190] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01
>[  220.189583] [drm:intel_power_well_disable [i915]] disabling always-on
>[  220.189623] [drm:drm_atomic_check_only [drm]] checking ffff8f7f31c16000
>[  220.189648] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] mode changed
>[  220.189661] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] enable changed
>[  220.189673] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] active changed
>[  220.189686] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] mode changed
>[  220.189697] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] enable changed
>[  220.189709] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] active changed
>[  220.189724] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:76:eDP-1]
>[  220.189737] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:76:eDP-1] keeps [ENCODER:75:DDI A], now on [CRTC:42:pipe A]
>[  220.189749] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:84:DP-1]
>[  220.189762] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:84:DP-1] keeps [ENCODER:83:DDI B], now on [CRTC:58:pipe B]
>[  220.189774] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:88:HDMI-A-1]
>[  220.189786] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:88:HDMI-A-1]
>[  220.189797] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:91:HDMI-A-2]
>[  220.189809] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:91:HDMI-A-2]
>[  220.189821] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] needs all connectors, enable: y, active: y
>[  220.189851] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f31c16000
>[  220.189866] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] needs all connectors, enable: y, active: y
>[  220.189891] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f31c16000
>[  220.189905] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] needs all connectors, enable: n, active: n
>[  220.189930] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:74:pipe C] to ffff8f7f31c16000
>[  220.189956] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f31c16000
>[  220.190017] [drm:intel_atomic_check [i915]] [CONNECTOR:76:eDP-1] checking for sink bpp constrains
>[  220.190072] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[  220.190103] [drm:drm_mode_debug_printmodeline [drm]] Modeline 79:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[  220.190164] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 141000KHz
>[  220.190236] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24
>[  220.190290] [drm:intel_dp_compute_config [i915]] DP link bw required 423000 available 540000
>[  220.190351] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[  220.190406] [drm:intel_dump_pipe_config [i915]] [CRTC:42:pipe A][modeset]
>[  220.190458] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0
>[  220.190510] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6571076, gmch_n: 8388608, link_m: 273794, link_n: 524288, tu: 64
>[  220.190588] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  220.190637] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  220.190667] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[  220.190717] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  220.190743] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[  220.190796] [drm:intel_dump_pipe_config [i915]] crtc timings: 141000 1920 1936 1952 2104 1080 1083 1097 1116, type: 0x48 flags: 0xa
>[  220.190846] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 141000
>[  220.190897] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  220.190947] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  220.190997] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  220.191056] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[  220.191107] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  220.191157] [drm:intel_dump_pipe_config [i915]] [PLANE:27:plane 1A] disabled, scaler_id = -1
>[  220.191207] [drm:intel_dump_pipe_config [i915]] [PLANE:30:plane 2A] disabled, scaler_id = -1
>[  220.191260] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 3A] disabled, scaler_id = -1
>[  220.191309] [drm:intel_dump_pipe_config [i915]] [PLANE:36:plane 4A] disabled, scaler_id = -1
>[  220.191359] [drm:intel_dump_pipe_config [i915]] [PLANE:39:cursor A] disabled, scaler_id = -1
>[  220.191391] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f31c16000
>[  220.191449] [drm:intel_atomic_check [i915]] [CONNECTOR:84:DP-1] checking for sink bpp constrains
>[  220.191504] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[  220.191560] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 148500KHz
>[  220.191617] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24
>[  220.191670] [drm:intel_dp_compute_config [i915]] DP link bw required 445500 available 648000
>[  220.191724] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[  220.191776] [drm:intel_dump_pipe_config [i915]] [CRTC:58:pipe B][modeset]
>[  220.191827] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 24, dithering: 0
>[  220.191879] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64
>[  220.191929] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  220.191978] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  220.192005] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  220.192055] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  220.192081] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  220.192133] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[  220.192183] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1080, pixel rate 148500
>[  220.192244] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  220.192294] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  220.192344] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  220.192401] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8200, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x19999a, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[  220.192451] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  220.192502] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 1B] disabled, scaler_id = -1
>[  220.192552] [drm:intel_dump_pipe_config [i915]] [PLANE:46:plane 2B] disabled, scaler_id = -1
>[  220.192601] [drm:intel_dump_pipe_config [i915]] [PLANE:49:plane 3B] disabled, scaler_id = -1
>[  220.192651] [drm:intel_dump_pipe_config [i915]] [PLANE:52:plane 4B] disabled, scaler_id = -1
>[  220.192700] [drm:intel_dump_pipe_config [i915]] [PLANE:55:cursor B] disabled, scaler_id = -1
>[  220.192759] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>[  220.192822] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:42:pipe A] has [PLANE:27:plane 1A] with fb 133
>[  220.192877] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:plane 1A] visible 0 -> 1, off 0, on 1, ms 1
>[  220.192930] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe B] has [PLANE:43:plane 1B] with fb 133
>[  220.192982] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:43:plane 1B] visible 0 -> 1, off 0, on 1, ms 1
>[  220.193040] [drm:bxt_get_dpll [i915]] [CRTC:42:pipe A] using pre-allocated PORT PLL A
>[  220.193096] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe A
>[  220.193153] [drm:bxt_get_dpll [i915]] [CRTC:58:pipe B] using pre-allocated PORT PLL B
>[  220.193205] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe B
>[  220.193280] [drm:skl_compute_wm [i915]] [PLANE:27:plane 1A] ddb (0 - 0) -> (0 - 502)
>[  220.193330] [drm:skl_compute_wm [i915]] [PLANE:39:cursor A] ddb (0 - 0) -> (502 - 510)
>[  220.193381] [drm:skl_compute_wm [i915]] [PLANE:43:plane 1B] ddb (0 - 0) -> (510 - 1012)
>[  220.193431] [drm:skl_compute_wm [i915]] [PLANE:55:cursor B] ddb (0 - 0) -> (1012 - 1020)
>[  220.193458] [drm:drm_atomic_commit [drm]] committing ffff8f7f31c16000
>[  220.194425] [drm:intel_power_well_enable [i915]] enabling always-on
>[  220.194475] [drm:intel_power_well_enable [i915]] enabling DC off
>[  220.194842] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00
>[  220.194899] [drm:intel_power_well_enable [i915]] enabling dpio-common-a
>[  220.195036] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  220.195098] [drm:intel_power_well_enable [i915]] enabling dpio-common-b
>[  220.195312] [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz
>[  220.195400] [drm:intel_update_cdclk [i915]] Current CD clock rate: 79200 kHz, VCO: 633600 kHz, ref: 19200 kHz
>[  220.195459] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI A]
>[  220.195523] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B]
>[  220.195575] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A]
>[  220.195626] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B]
>[  220.195676] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C]
>[  220.195726] [drm:intel_atomic_commit_tail [i915]] [ENCODER:90:DDI C]
>[  220.195778] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:88:HDMI-A-1]
>[  220.195832] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:91:HDMI-A-2]
>[  220.195883] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL A
>[  220.195934] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL B
>[  220.195985] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL C
>[  220.196070] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 1, on? 0) for crtc 42
>[  220.196126] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A
>[  220.196296] [drm:intel_power_well_enable [i915]] enabling AUX A
>[  220.196358] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  220.196417] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  220.196478] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000062
>[  220.196531] [drm:wait_panel_status [i915]] Wait complete
>[  220.196587] [drm:edp_panel_on [i915]] Wait for panel power on
>[  220.196642] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000063
>[  220.298561] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010
>[  220.298655] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  220.298742] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  220.298860] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  220.396357] atkbd serio0: Failed to deactivate keyboard on isa0060/serio0
>[  220.396892] [drm:wait_panel_status [i915]] Wait complete
>[  220.396979] [drm:intel_power_well_disable [i915]] disabling AUX A
>[  220.397064] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well
>[  220.397159] [drm:intel_power_well_enable [i915]] enabling AUX A
>[  220.397253] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  220.397341] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b
>[  220.398513] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  220.398592] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  220.398673] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  220.399330] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  220.399409] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[  220.400365] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  220.400445] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:76:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  220.401039] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  220.401151] [drm:intel_edp_backlight_on [i915]] 
>[  220.401233] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  220.401317] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 67764
>[  220.408405] [drm:intel_psr_enable [i915]] PSR not supported on this platform
>[  220.408473] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  220.408550] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  220.408608] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  220.408729] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 2, on? 0) for crtc 58
>[  220.408788] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B
>[  220.408958] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  220.409034] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  220.409515] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  220.410178] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  220.410659] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  220.410716] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  220.411193] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  220.411270] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  220.411328] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  220.411389] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  220.411446] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  220.411951] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  220.412111] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  220.412575] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  220.413241] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  220.413713] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  220.413769] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  220.414278] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  220.414349] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[  220.414404] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  220.414460] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  220.414953] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  220.415109] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  220.415578] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  220.416247] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  220.416695] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  220.416726] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  220.417208] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  220.417244] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  220.417279] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[  220.417310] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  220.417821] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  220.418249] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  220.418682] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  220.419393] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  220.419839] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  220.419870] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  220.420383] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  220.420419] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  220.422588] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4
>[  220.422680] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  220.423127] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  220.423522] [drm:intel_enable_pipe [i915]] enabling pipe B
>[  220.440468] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:76:eDP-1]
>[  220.440511] [drm:intel_atomic_commit_tail [i915]] [CRTC:42:pipe A]
>[  220.440592] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL A
>[  220.440672] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:84:DP-1]
>[  220.440710] [drm:intel_atomic_commit_tail [i915]] [CRTC:58:pipe B]
>[  220.440775] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL B
>[  220.440825] [drm:intel_atomic_commit_tail [i915]] [CRTC:74:pipe C]
>[  220.440865] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8f7f31c16000
>[  220.440889] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8f7f31c16000
>[  220.440929] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38
>[  220.440964] [drm:intel_opregion_register [i915]] 4 outputs detected
>[  220.441003] [drm:intel_dp_detect [i915]] [CONNECTOR:76:eDP-1]
>[  220.441036] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>[  220.441069] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>[  220.441099] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  220.441128] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  220.444083] PM: resume of devices complete after 283.632 msecs
>[  220.444130] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000
>[  220.444732] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:76:eDP-1] status updated from connected to connected
>[  220.444779] [drm:intel_dp_detect [i915]] [CONNECTOR:84:DP-1]
>[  220.444824] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  220.446028] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 80 02 00 00 00 00 00 00
>[  220.446917] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>[  220.446966] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>[  220.447010] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  220.447055] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  220.447994] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-e0-4c dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[  220.448042] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[  220.452672] PM: Finishing wakeup.
>[  220.452674] OOM killer enabled.
>[  220.452674] Restarting tasks ... done.
>[  220.461963] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  220.461979] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:84:DP-1] status updated from connected to connected
>[  220.462010] [drm:intel_hdmi_detect [i915]] [CONNECTOR:88:HDMI-A-1]
>[  220.464056] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  220.464084] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[  220.466123] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  220.466142] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[  220.468251] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[  220.468278] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[  220.470449] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[  220.470460] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[  220.470467] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:88:HDMI-A-1] status updated from disconnected to disconnected
>[  220.470495] [drm:intel_hdmi_detect [i915]] [CONNECTOR:91:HDMI-A-2]
>[  220.545783] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>[  220.545842] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[  220.547989] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>[  220.548014] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[  220.548050] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[  220.548068] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:91:HDMI-A-2] status updated from connected to connected
>[  220.668352] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
>[  220.709458] ata1.00: configured for UDMA/133
>[  220.772179] atkbd serio0: Failed to enable keyboard on isa0060/serio0
>[  221.123485] [IGT] kms_flip: exiting, ret=99
>[  221.123614] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8f7f3165e800
>[  221.123663] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe A] ffff8f7f31d08000 state to ffff8f7f3165e800
>[  221.123701] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f3165e800
>[  221.123741] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:76:eDP-1] ffff8f7f2bc03400 state to ffff8f7f3165e800
>[  221.123779] [drm:drm_atomic_check_only [drm]] checking ffff8f7f3165e800
>[  221.123812] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:76:eDP-1]
>[  221.123834] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:76:eDP-1] keeps [ENCODER:75:DDI A], now on [CRTC:42:pipe A]
>[  221.123892] [drm:drm_atomic_commit [drm]] committing ffff8f7f3165e800
>[  221.134056] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8f7f3165e800
>[  221.134086] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8f7f3165e800
>[  221.134631] [drm] RC6 on
>[  221.154009] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8f7f3165e800
>[  221.154051] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:27:plane 1A] ffff8f7f3472c700 state to ffff8f7f3165e800
>[  221.154082] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe A] ffff8f7f31d0d800 state to ffff8f7f3165e800
>[  221.154106] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f3165e800
>[  221.154132] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:76:eDP-1] ffff8f7f2bc03680 state to ffff8f7f3165e800
>[  221.154158] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for CRTC state ffff8f7f31d0d800
>[  221.154183] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f3472c700
>[  221.154206] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f3472c700 to [NOCRTC]
>[  221.154232] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:43:plane 1B] ffff8f7f2df02300 state to ffff8f7f3165e800
>[  221.154257] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:58:pipe B] ffff8f7f31d0d000 state to ffff8f7f3165e800
>[  221.154279] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f3165e800
>[  221.154303] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:84:DP-1] ffff8f7f2bc03900 state to ffff8f7f3165e800
>[  221.154326] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for CRTC state ffff8f7f31d0d000
>[  221.154347] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f2df02300
>[  221.154369] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f2df02300 to [NOCRTC]
>[  221.154392] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff8f7f2bc03680 to [NOCRTC]
>[  221.154414] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff8f7f2bc03900 to [NOCRTC]
>[  221.154435] [drm:drm_atomic_check_only [drm]] checking ffff8f7f3165e800
>[  221.154456] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] mode changed
>[  221.154469] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] enable changed
>[  221.154482] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] active changed
>[  221.154494] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] mode changed
>[  221.154506] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] enable changed
>[  221.154518] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] active changed
>[  221.154530] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:76:eDP-1]
>[  221.154542] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:76:eDP-1]
>[  221.154555] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:84:DP-1]
>[  221.154567] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:84:DP-1]
>[  221.154579] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] needs all connectors, enable: n, active: n
>[  221.154602] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f3165e800
>[  221.154616] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] needs all connectors, enable: n, active: n
>[  221.154639] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f3165e800
>[  221.154721] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>[  221.154786] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:42:pipe A] has [PLANE:27:plane 1A] with fb -1
>[  221.154843] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:plane 1A] visible 1 -> 0, off 1, on 0, ms 1
>[  221.154899] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe B] has [PLANE:43:plane 1B] with fb -1
>[  221.154954] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:43:plane 1B] visible 1 -> 0, off 1, on 0, ms 1
>[  221.154987] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:74:pipe C] ffff8f7f30314800 state to ffff8f7f3165e800
>[  221.155045] [drm:skl_compute_wm [i915]] [PLANE:27:plane 1A] ddb (0 - 502) -> (0 - 0)
>[  221.155095] [drm:skl_compute_wm [i915]] [PLANE:39:cursor A] ddb (502 - 510) -> (0 - 0)
>[  221.155147] [drm:skl_compute_wm [i915]] [PLANE:43:plane 1B] ddb (510 - 1012) -> (0 - 0)
>[  221.155197] [drm:skl_compute_wm [i915]] [PLANE:55:cursor B] ddb (1012 - 1020) -> (0 - 0)
>[  221.155227] [drm:drm_atomic_commit [drm]] committing ffff8f7f3165e800
>[  221.155309] [drm:intel_edp_backlight_off [i915]] 
>[  221.360452] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  221.360561] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  221.368912] [drm:intel_edp_panel_off.part.29 [i915]] Turn eDP port A panel power off
>[  221.369002] [drm:intel_edp_panel_off.part.29 [i915]] Wait for panel power off time
>[  221.369089] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000060
>[  221.419848] [drm:wait_panel_status [i915]] Wait complete
>[  221.419934] [drm:intel_power_well_disable [i915]] disabling AUX A
>[  221.420015] [drm:intel_power_well_disable [i915]] disabling DDI A IO power well
>[  221.422098] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010
>[  221.422192] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  221.422286] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  221.422376] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL A (active 1, on? 1) for crtc 42
>[  221.422462] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  221.422545] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL A
>[  221.422677] [drm:intel_disable_pipe [i915]] disabling pipe B
>[  221.422763] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  221.424435] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  221.424962] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  221.425048] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[  221.427326] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 2, on? 1) for crtc 58
>[  221.427445] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B
>[  221.427563] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI A]
>[  221.427650] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B]
>[  221.427733] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A]
>[  221.427812] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B]
>[  221.427888] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C]
>[  221.427966] [drm:intel_atomic_commit_tail [i915]] [ENCODER:90:DDI C]
>[  221.428049] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:76:eDP-1]
>[  221.428134] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:84:DP-1]
>[  221.428277] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL A
>[  221.428359] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL B
>[  221.428447] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL C
>[  221.428541] [drm:intel_power_well_disable [i915]] disabling dpio-common-a
>[  221.428634] [drm:intel_atomic_commit_tail [i915]] [CRTC:42:pipe A]
>[  221.428722] [drm:intel_power_well_disable [i915]] disabling dpio-common-b
>[  221.428808] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  221.428905] [drm:intel_atomic_commit_tail [i915]] [CRTC:58:pipe B]
>[  221.428987] [drm:intel_power_well_disable [i915]] disabling DC off
>[  221.429071] [drm:gen9_enable_dc5 [i915]] Enabling DC5
>[  221.429154] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01
>[  221.429236] [drm:intel_power_well_disable [i915]] disabling always-on
>[  221.429306] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8f7f3165e800
>[  221.429356] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8f7f3165e800
>[  221.429456] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8f7f3165e800
>[  221.429500] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:27:plane 1A] ffff8f7f2df02400 state to ffff8f7f3165e800
>[  221.429540] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:30:plane 2A] ffff8f7f2df02000 state to ffff8f7f3165e800
>[  221.429577] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f2df02000 to [NOCRTC]
>[  221.429612] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f2df02000
>[  221.429649] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:33:plane 3A] ffff8f7f2df02600 state to ffff8f7f3165e800
>[  221.429682] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f2df02600 to [NOCRTC]
>[  221.429715] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f2df02600
>[  221.429753] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:36:plane 4A] ffff8f7f2df02900 state to ffff8f7f3165e800
>[  221.429785] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f2df02900 to [NOCRTC]
>[  221.429821] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f2df02900
>[  221.429860] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:39:cursor A] ffff8f7f3472ca00 state to ffff8f7f3165e800
>[  221.429892] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f3472ca00 to [NOCRTC]
>[  221.429928] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f3472ca00
>[  221.429964] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:43:plane 1B] ffff8f7f3472cd00 state to ffff8f7f3165e800
>[  221.429998] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:46:plane 2B] ffff8f7f3472ce00 state to ffff8f7f3165e800
>[  221.430036] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f3472ce00 to [NOCRTC]
>[  221.430072] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f3472ce00
>[  221.430106] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:49:plane 3B] ffff8f7f3472c800 state to ffff8f7f3165e800
>[  221.430139] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f3472c800 to [NOCRTC]
>[  221.430174] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f3472c800
>[  221.430213] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:plane 4B] ffff8f7f3472cc00 state to ffff8f7f3165e800
>[  221.430246] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f3472cc00 to [NOCRTC]
>[  221.430281] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f3472cc00
>[  221.430316] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:55:cursor B] ffff8f7f2df86b00 state to ffff8f7f3165e800
>[  221.430350] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f2df86b00 to [NOCRTC]
>[  221.430385] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f2df86b00
>[  221.430420] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:59:plane 1C] ffff8f7f2dcc5300 state to ffff8f7f3165e800
>[  221.430456] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:62:plane 2C] ffff8f7f2dcc5800 state to ffff8f7f3165e800
>[  221.430493] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f2dcc5800 to [NOCRTC]
>[  221.430525] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f2dcc5800
>[  221.430564] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:65:plane 3C] ffff8f7f2de2cf00 state to ffff8f7f3165e800
>[  221.430598] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f2de2cf00 to [NOCRTC]
>[  221.430631] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f2de2cf00
>[  221.430668] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:68:plane 4C] ffff8f7f2de2cd00 state to ffff8f7f3165e800
>[  221.430703] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f2de2cd00 to [NOCRTC]
>[  221.430735] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f2de2cd00
>[  221.430772] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:71:cursor C] ffff8f7f2de2c100 state to ffff8f7f3165e800
>[  221.430807] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f2de2c100 to [NOCRTC]
>[  221.430839] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f2de2c100
>[  221.430880] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe A] ffff8f7f31d08000 state to ffff8f7f3165e800
>[  221.430925] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for CRTC state ffff8f7f31d08000
>[  221.430964] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f2df02400 to [CRTC:42:pipe A]
>[  221.431001] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:128] for plane state ffff8f7f2df02400
>[  221.431035] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f3165e800
>[  221.431079] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:76:eDP-1] ffff8f7f2bc03400 state to ffff8f7f3165e800
>[  221.431112] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff8f7f2bc03400 to [CRTC:42:pipe A]
>[  221.431149] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:58:pipe B] ffff8f7f2d7eb800 state to ffff8f7f3165e800
>[  221.431188] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for CRTC state ffff8f7f2d7eb800
>[  221.431221] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f3472cd00 to [CRTC:58:pipe B]
>[  221.431259] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:128] for plane state ffff8f7f3472cd00
>[  221.431296] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f3165e800
>[  221.431333] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:84:DP-1] ffff8f7f2bc03b80 state to ffff8f7f3165e800
>[  221.431366] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff8f7f2bc03b80 to [CRTC:58:pipe B]
>[  221.431404] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:74:pipe C] ffff8f7f2d7eb000 state to ffff8f7f3165e800
>[  221.431439] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for CRTC state ffff8f7f2d7eb000
>[  221.431475] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f2dcc5300 to [CRTC:74:pipe C]
>[  221.431511] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:128] for plane state ffff8f7f2dcc5300
>[  221.431544] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:74:pipe C] to ffff8f7f3165e800
>[  221.431580] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:91:HDMI-A-2] ffff8f7f2bc03e80 state to ffff8f7f3165e800
>[  221.431616] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff8f7f2bc03e80 to [CRTC:74:pipe C]
>[  221.431648] [drm:drm_atomic_check_only [drm]] checking ffff8f7f3165e800
>[  221.431682] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] mode changed
>[  221.431705] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] enable changed
>[  221.431724] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] active changed
>[  221.431743] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] mode changed
>[  221.431761] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] enable changed
>[  221.431782] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] active changed
>[  221.431799] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] mode changed
>[  221.431817] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] enable changed
>[  221.431835] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] active changed
>[  221.431860] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:76:eDP-1]
>[  221.431880] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:76:eDP-1] using [ENCODER:75:DDI A] on [CRTC:42:pipe A]
>[  221.431899] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:84:DP-1]
>[  221.431921] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:84:DP-1] using [ENCODER:83:DDI B] on [CRTC:58:pipe B]
>[  221.431939] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:91:HDMI-A-2]
>[  221.431958] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:91:HDMI-A-2] using [ENCODER:90:DDI C] on [CRTC:74:pipe C]
>[  221.431976] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] needs all connectors, enable: y, active: y
>[  221.432015] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f3165e800
>[  221.432035] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] needs all connectors, enable: y, active: y
>[  221.432070] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f3165e800
>[  221.432094] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] needs all connectors, enable: y, active: y
>[  221.432128] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:74:pipe C] to ffff8f7f3165e800
>[  221.432210] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f3165e800
>[  221.432303] [drm:intel_atomic_check [i915]] [CONNECTOR:76:eDP-1] checking for sink bpp constrains
>[  221.432388] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[  221.432439] [drm:drm_mode_debug_printmodeline [drm]] Modeline 79:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[  221.432535] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 141000KHz
>[  221.432643] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24
>[  221.432725] [drm:intel_dp_compute_config [i915]] DP link bw required 423000 available 540000
>[  221.432816] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[  221.432902] [drm:intel_dump_pipe_config [i915]] [CRTC:42:pipe A][modeset]
>[  221.432989] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0
>[  221.433071] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6571076, gmch_n: 8388608, link_m: 273794, link_n: 524288, tu: 64
>[  221.433151] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  221.433230] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  221.433274] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[  221.433353] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  221.433395] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[  221.433476] [drm:intel_dump_pipe_config [i915]] crtc timings: 141000 1920 1936 1952 2104 1080 1083 1097 1116, type: 0x48 flags: 0xa
>[  221.433558] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 141000
>[  221.433638] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  221.433716] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  221.433795] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  221.433886] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[  221.433966] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  221.434043] [drm:intel_dump_pipe_config [i915]] [PLANE:27:plane 1A] disabled, scaler_id = -1
>[  221.434123] [drm:intel_dump_pipe_config [i915]] [PLANE:30:plane 2A] disabled, scaler_id = -1
>[  221.434199] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 3A] disabled, scaler_id = -1
>[  221.434277] [drm:intel_dump_pipe_config [i915]] [PLANE:36:plane 4A] disabled, scaler_id = -1
>[  221.434356] [drm:intel_dump_pipe_config [i915]] [PLANE:39:cursor A] disabled, scaler_id = -1
>[  221.434398] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f3165e800
>[  221.434483] [drm:intel_atomic_check [i915]] [CONNECTOR:84:DP-1] checking for sink bpp constrains
>[  221.434564] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[  221.434650] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 148500KHz
>[  221.434738] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24
>[  221.434820] [drm:intel_dp_compute_config [i915]] DP link bw required 445500 available 648000
>[  221.434904] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[  221.434985] [drm:intel_dump_pipe_config [i915]] [CRTC:58:pipe B][modeset]
>[  221.435066] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 24, dithering: 0
>[  221.435144] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64
>[  221.435223] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  221.435299] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  221.435342] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  221.435418] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  221.435460] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  221.435540] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[  221.435619] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1080, pixel rate 148500
>[  221.435698] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  221.435776] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  221.435854] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  221.435940] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8200, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x19999a, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[  221.436019] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  221.436098] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 1B] disabled, scaler_id = -1
>[  221.436176] [drm:intel_dump_pipe_config [i915]] [PLANE:46:plane 2B] disabled, scaler_id = -1
>[  221.436268] [drm:intel_dump_pipe_config [i915]] [PLANE:49:plane 3B] disabled, scaler_id = -1
>[  221.436325] [drm:intel_dump_pipe_config [i915]] [PLANE:52:plane 4B] disabled, scaler_id = -1
>[  221.436355] [drm:intel_dump_pipe_config [i915]] [PLANE:55:cursor B] disabled, scaler_id = -1
>[  221.436370] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:74:pipe C] to ffff8f7f3165e800
>[  221.436403] [drm:intel_atomic_check [i915]] [CONNECTOR:91:HDMI-A-2] checking for sink bpp constrains
>[  221.436453] [drm:intel_hdmi_compute_config [i915]] picking bpc to 12 for HDMI output
>[  221.436487] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 36 for HDMI
>[  221.436519] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 36, dithering: 0
>[  221.436550] [drm:intel_dump_pipe_config [i915]] [CRTC:74:pipe C][modeset]
>[  221.436580] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 36, dithering: 0
>[  221.436609] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 1
>[  221.436638] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  221.436654] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5
>[  221.436684] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  221.436699] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5
>[  221.436730] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1082 1087 1125, type: 0x48 flags: 0x5
>[  221.436760] [drm:intel_dump_pipe_config [i915]] port clock: 222750, pipe src size: 1920x1080, pixel rate 148500
>[  221.436791] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1
>[  221.436820] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  221.436850] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  221.436883] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x6200, ebb4: 0x2000,pll0: 0x21, pll1: 0x100, pll2: 0x1a6666, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[  221.436913] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  221.436942] [drm:intel_dump_pipe_config [i915]] [PLANE:59:plane 1C] disabled, scaler_id = -1
>[  221.436972] [drm:intel_dump_pipe_config [i915]] [PLANE:62:plane 2C] disabled, scaler_id = -1
>[  221.437001] [drm:intel_dump_pipe_config [i915]] [PLANE:65:plane 3C] disabled, scaler_id = -1
>[  221.437030] [drm:intel_dump_pipe_config [i915]] [PLANE:68:plane 4C] disabled, scaler_id = -1
>[  221.437060] [drm:intel_dump_pipe_config [i915]] [PLANE:71:cursor C] disabled, scaler_id = -1
>[  221.437094] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
>[  221.437131] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:42:pipe A] has [PLANE:27:plane 1A] with fb 128
>[  221.437162] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:plane 1A] visible 0 -> 1, off 0, on 1, ms 1
>[  221.437194] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe B] has [PLANE:43:plane 1B] with fb 128
>[  221.437224] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:43:plane 1B] visible 0 -> 1, off 0, on 1, ms 1
>[  221.437255] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:74:pipe C] has [PLANE:59:plane 1C] with fb 128
>[  221.437285] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:59:plane 1C] visible 0 -> 1, off 0, on 1, ms 1
>[  221.437321] [drm:bxt_get_dpll [i915]] [CRTC:42:pipe A] using pre-allocated PORT PLL A
>[  221.437353] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe A
>[  221.437386] [drm:bxt_get_dpll [i915]] [CRTC:58:pipe B] using pre-allocated PORT PLL B
>[  221.437417] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe B
>[  221.437453] [drm:bxt_get_dpll [i915]] [CRTC:74:pipe C] using pre-allocated PORT PLL C
>[  221.437482] [drm:intel_reference_shared_dpll [i915]] using PORT PLL C for pipe C
>[  221.437523] [drm:skl_compute_wm [i915]] [PLANE:27:plane 1A] ddb (0 - 0) -> (0 - 332)
>[  221.437553] [drm:skl_compute_wm [i915]] [PLANE:39:cursor A] ddb (0 - 0) -> (332 - 340)
>[  221.437583] [drm:skl_compute_wm [i915]] [PLANE:43:plane 1B] ddb (0 - 0) -> (340 - 672)
>[  221.437612] [drm:skl_compute_wm [i915]] [PLANE:55:cursor B] ddb (0 - 0) -> (672 - 680)
>[  221.437642] [drm:skl_compute_wm [i915]] [PLANE:59:plane 1C] ddb (0 - 0) -> (680 - 1012)
>[  221.437670] [drm:skl_compute_wm [i915]] [PLANE:71:cursor C] ddb (0 - 0) -> (1012 - 1020)
>[  221.437687] [drm:drm_atomic_commit [drm]] committing ffff8f7f3165e800
>[  221.437739] [drm:intel_power_well_enable [i915]] enabling always-on
>[  221.437782] [drm:intel_power_well_enable [i915]] enabling DC off
>[  221.437808] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00
>[  221.437839] [drm:intel_power_well_enable [i915]] enabling dpio-common-a
>[  221.438282] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  221.440270] [drm:intel_power_well_enable [i915]] enabling dpio-common-b
>[  221.440435] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[  221.440596] [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz
>[  221.440652] [drm:intel_update_cdclk [i915]] Current CD clock rate: 316800 kHz, VCO: 633600 kHz, ref: 19200 kHz
>[  221.440679] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI A]
>[  221.440704] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B]
>[  221.440728] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A]
>[  221.440752] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B]
>[  221.440776] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C]
>[  221.440799] [drm:intel_atomic_commit_tail [i915]] [ENCODER:90:DDI C]
>[  221.440824] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL A
>[  221.440848] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL B
>[  221.440873] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL C
>[  221.440921] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 1, on? 0) for crtc 42
>[  221.440946] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A
>[  221.441074] [drm:intel_power_well_enable [i915]] enabling AUX A
>[  221.441106] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  221.441135] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  221.996421] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000060
>[  221.996470] [drm:wait_panel_status [i915]] Wait complete
>[  221.996515] [drm:edp_panel_on [i915]] Wait for panel power on
>[  221.996557] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000063
>[  222.098507] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010
>[  222.098585] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  222.098656] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  222.098791] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  222.198449] [drm:wait_panel_status [i915]] Wait complete
>[  222.198519] [drm:intel_power_well_disable [i915]] disabling AUX A
>[  222.198588] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well
>[  222.198684] [drm:intel_power_well_enable [i915]] enabling AUX A
>[  222.198760] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  222.198832] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b
>[  222.199967] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  222.200030] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  222.200097] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  222.201187] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  222.201267] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[  222.202216] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  222.202298] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:76:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  222.202758] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  222.202851] [drm:intel_edp_backlight_on [i915]] 
>[  222.202934] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  222.203015] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 67764
>[  222.208400] [drm:intel_psr_enable [i915]] PSR not supported on this platform
>[  222.208453] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  222.208512] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  222.208555] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  222.208661] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 2, on? 0) for crtc 58
>[  222.208705] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B
>[  222.208850] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  222.208909] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  222.209370] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  222.210016] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  222.210480] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  222.210521] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  222.210984] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  222.211044] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  222.211087] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  222.211133] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  222.211175] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  222.211664] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  222.211808] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  222.212454] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  222.213142] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  222.213607] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  222.213652] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  222.214153] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  222.214202] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  222.214250] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[  222.214292] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  222.214784] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  222.215224] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  222.215674] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  222.216407] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  222.216882] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  222.216923] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  222.217422] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  222.217470] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  222.219693] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4
>[  222.219743] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  222.220229] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  222.220450] [drm:intel_enable_pipe [i915]] enabling pipe B
>[  222.220548] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL C (active 4, on? 0) for crtc 74
>[  222.220591] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL C
>[  222.220867] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>[  222.221123] [drm:intel_enable_pipe [i915]] enabling pipe C
>[  222.221659] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:91:HDMI-A-2], [ENCODER:90:DDI C]
>[  222.221700] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe C, 36 bytes ELD
>[  222.221743] [drm:audio_config_hdmi_pixel_clock.isra.4 [i915]] Configuring HDMI audio for pixel clock 148500 (0x00090000)
>[  222.221780] [drm:hsw_audio_config_update [i915]] using automatic N
>[  222.238701] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:76:eDP-1]
>[  222.238773] [drm:intel_atomic_commit_tail [i915]] [CRTC:42:pipe A]
>[  222.238908] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL A
>[  222.239026] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:84:DP-1]
>[  222.239086] [drm:intel_atomic_commit_tail [i915]] [CRTC:58:pipe B]
>[  222.239183] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL B
>[  222.239277] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:91:HDMI-A-2]
>[  222.239343] [drm:intel_atomic_commit_tail [i915]] [CRTC:74:pipe C]
>[  222.239440] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL C
>[  222.239512] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8f7f3165e800
>[  222.239551] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8f7f3165e800
>[  223.466002] r8169 0000:01:00.0 enp1s0: link up
>[  224.496186] r8169 0000:01:00.0 enp1s0: link down
>[  225.260452] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[  225.260544] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000067
>[  225.260624] [drm:intel_power_well_disable [i915]] disabling AUX A
>[  227.806559] r8169 0000:01:00.0 enp1s0: link up
>[  321.621717] [IGT] kms_flip: executing
>[  321.848751] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:76:eDP-1]
>[  321.848858] [drm:intel_dp_detect [i915]] [CONNECTOR:76:eDP-1]
>[  321.848939] [drm:intel_power_well_enable [i915]] enabling AUX A
>[  321.849030] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>[  321.849116] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>[  321.849195] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  321.849272] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  321.849355] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  321.849434] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006f
>[  321.849840] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000
>[  321.850516] [drm:drm_edid_to_eld [drm]] ELD: no CEA Extension found
>[  321.850561] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:76:eDP-1] probed modes :
>[  321.850603] [drm:drm_mode_debug_printmodeline [drm]] Modeline 77:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[  321.850640] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:84:DP-1]
>[  321.850722] [drm:intel_dp_detect [i915]] [CONNECTOR:84:DP-1]
>[  321.850799] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  321.851844] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 80 02 00 00 00 00 00 00
>[  321.853060] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>[  321.853151] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>[  321.853237] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  321.853316] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  321.854276] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-e0-4c dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[  321.854356] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[  321.863268] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  321.863311] [drm:drm_edid_to_eld [drm]] ELD: no CEA Extension found
>[  321.863373] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:84:DP-1] probed modes :
>[  321.863386] [drm:drm_mode_debug_printmodeline [drm]] Modeline 94:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  321.863398] [drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[  321.863409] [drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  321.863420] [drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  321.863431] [drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  321.863441] [drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  321.863452] [drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  321.863463] [drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  321.863474] [drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  321.863484] [drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  321.863495] [drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  321.863506] [drm:drm_mode_debug_printmodeline [drm]] Modeline 101:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  321.863520] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:88:HDMI-A-1]
>[  321.863548] [drm:intel_hdmi_detect [i915]] [CONNECTOR:88:HDMI-A-1]
>[  321.865803] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  321.865863] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[  321.868111] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  321.868169] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[  321.870679] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[  321.870743] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[  321.872555] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[  321.872571] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[  321.872579] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:88:HDMI-A-1] disconnected
>[  321.872612] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:91:HDMI-A-2]
>[  321.872644] [drm:intel_hdmi_detect [i915]] [CONNECTOR:91:HDMI-A-2]
>[  321.949749] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>[  321.949800] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[  321.952037] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>[  321.952060] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[  321.952092] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[  321.952132] [drm:drm_add_edid_modes [drm]] HDMI: DVI dual 0, max TMDS clock 225000 kHz
>[  321.952542] [drm:drm_edid_to_eld [drm]] ELD monitor DELL U2713HM
>[  321.952564] [drm:drm_edid_to_eld [drm]] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>[  321.952585] [drm:drm_edid_to_eld [drm]] ELD size 36, SAD count 1
>[  321.952919] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:91:HDMI-A-2] probed modes :
>[  321.952942] [drm:drm_mode_debug_printmodeline [drm]] Modeline 107:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5
>[  321.952963] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  321.952984] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  321.953004] [drm:drm_mode_debug_printmodeline [drm]] Modeline 109:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  321.953024] [drm:drm_mode_debug_printmodeline [drm]] Modeline 141:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  321.953044] [drm:drm_mode_debug_printmodeline [drm]] Modeline 139:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  321.953063] [drm:drm_mode_debug_printmodeline [drm]] Modeline 138:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  321.953083] [drm:drm_mode_debug_printmodeline [drm]] Modeline 140:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  321.953103] [drm:drm_mode_debug_printmodeline [drm]] Modeline 153:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  321.953123] [drm:drm_mode_debug_printmodeline [drm]] Modeline 151:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
>[  321.953143] [drm:drm_mode_debug_printmodeline [drm]] Modeline 113:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[  321.953163] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  321.953182] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  321.953202] [drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>[  321.953222] [drm:drm_mode_debug_printmodeline [drm]] Modeline 114:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  321.953242] [drm:drm_mode_debug_printmodeline [drm]] Modeline 110:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  321.953262] [drm:drm_mode_debug_printmodeline [drm]] Modeline 142:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  321.953282] [drm:drm_mode_debug_printmodeline [drm]] Modeline 137:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  321.953301] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  321.953321] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  321.953341] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  321.953361] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  321.953381] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  321.953400] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[  321.953420] [drm:drm_mode_debug_printmodeline [drm]] Modeline 143:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  321.953440] [drm:drm_mode_debug_printmodeline [drm]] Modeline 111:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  321.953460] [drm:drm_mode_debug_printmodeline [drm]] Modeline 150:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[  321.953480] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[  321.953500] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  321.953519] [drm:drm_mode_debug_printmodeline [drm]] Modeline 144:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  321.953539] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  321.953559] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  321.954652] [IGT] kms_flip: starting subtest 2x-vblank-vs-suspend-interruptible
>[  321.955512] [drm:drm_mode_addfb2 [drm]] [FB:93]
>[  321.955567] [drm:drm_mode_addfb2 [drm]] [FB:133]
>[  322.008069] [drm:drm_mode_setcrtc [drm]] [CRTC:42:pipe A]
>[  322.008091] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8f7f324dd000
>[  322.008108] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe A] ffff8f7f3257d800 state to ffff8f7f324dd000
>[  322.008122] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:27:plane 1A] ffff8f7f31d11d00 state to ffff8f7f324dd000
>[  322.008134] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for CRTC state ffff8f7f3257d800
>[  322.008146] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f31d11d00 to [NOCRTC]
>[  322.008172] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f31d11d00
>[  322.008186] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f324dd000
>[  322.008203] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:76:eDP-1] ffff8f7f34e34400 state to ffff8f7f324dd000
>[  322.008217] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff8f7f34e34400 to [NOCRTC]
>[  322.008229] [drm:drm_atomic_check_only [drm]] checking ffff8f7f324dd000
>[  322.008241] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] mode changed
>[  322.008248] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] enable changed
>[  322.008254] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] active changed
>[  322.008260] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:76:eDP-1]
>[  322.008269] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:76:eDP-1]
>[  322.008277] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] needs all connectors, enable: n, active: n
>[  322.008289] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f324dd000
>[  322.008337] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
>[  322.008370] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:42:pipe A] has [PLANE:27:plane 1A] with fb -1
>[  322.008401] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:plane 1A] visible 1 -> 0, off 1, on 0, ms 1
>[  322.008420] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:58:pipe B] ffff8f7f3257a000 state to ffff8f7f324dd000
>[  322.008435] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:43:plane 1B] ffff8f7f31d11200 state to ffff8f7f324dd000
>[  322.008448] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:74:pipe C] ffff8f7f32578000 state to ffff8f7f324dd000
>[  322.008460] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:59:plane 1C] ffff8f7f31d11300 state to ffff8f7f324dd000
>[  322.008489] [drm:skl_compute_wm [i915]] [PLANE:27:plane 1A] ddb (0 - 332) -> (0 - 0)
>[  322.008514] [drm:skl_compute_wm [i915]] [PLANE:39:cursor A] ddb (332 - 340) -> (0 - 0)
>[  322.008539] [drm:skl_compute_wm [i915]] [PLANE:43:plane 1B] ddb (340 - 672) -> (0 - 502)
>[  322.008564] [drm:skl_compute_wm [i915]] [PLANE:55:cursor B] ddb (672 - 680) -> (502 - 510)
>[  322.008590] [drm:skl_compute_wm [i915]] [PLANE:59:plane 1C] ddb (680 - 1012) -> (510 - 1012)
>[  322.008602] [drm:drm_atomic_commit [drm]] committing ffff8f7f324dd000
>[  322.008657] [drm:intel_edp_backlight_off [i915]] 
>[  322.216402] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  322.216465] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  322.222814] [drm:intel_edp_panel_off.part.29 [i915]] Turn eDP port A panel power off
>[  322.222862] [drm:intel_edp_panel_off.part.29 [i915]] Wait for panel power off time
>[  322.222909] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status 80000008 control 00000060
>[  322.273547] [drm:wait_panel_status [i915]] Wait complete
>[  322.273634] [drm:intel_power_well_disable [i915]] disabling AUX A
>[  322.273715] [drm:intel_power_well_disable [i915]] disabling DDI A IO power well
>[  322.275883] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010
>[  322.275975] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  322.276060] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  322.276167] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  322.276259] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  322.276660] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL A (active 1, on? 1) for crtc 42
>[  322.276768] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL A
>[  322.276880] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI A]
>[  322.276966] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B]
>[  322.277050] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A]
>[  322.277129] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B]
>[  322.277209] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C]
>[  322.277287] [drm:intel_atomic_commit_tail [i915]] [ENCODER:90:DDI C]
>[  322.277371] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:76:eDP-1]
>[  322.277454] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL A
>[  322.277536] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL B
>[  322.277630] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL C
>[  322.288675] [drm:intel_power_well_disable [i915]] disabling dpio-common-a
>[  322.288788] [drm:intel_atomic_commit_tail [i915]] [CRTC:42:pipe A]
>[  322.288866] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8f7f324dd000
>[  322.288915] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8f7f324dd000
>[  322.289003] [drm:drm_mode_setcrtc [drm]] [CRTC:58:pipe B]
>[  322.289049] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8f7f30282000
>[  322.289093] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:58:pipe B] ffff8f7f347ae800 state to ffff8f7f30282000
>[  322.289133] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:43:plane 1B] ffff8f7f356a3900 state to ffff8f7f30282000
>[  322.289170] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for CRTC state ffff8f7f347ae800
>[  322.289204] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f356a3900 to [NOCRTC]
>[  322.289240] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f356a3900
>[  322.289274] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f30282000
>[  322.289315] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:84:DP-1] ffff8f7f2bc03a80 state to ffff8f7f30282000
>[  322.289352] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff8f7f2bc03a80 to [NOCRTC]
>[  322.289389] [drm:drm_atomic_check_only [drm]] checking ffff8f7f30282000
>[  322.289416] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] mode changed
>[  322.289436] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] enable changed
>[  322.289454] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] active changed
>[  322.289472] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:84:DP-1]
>[  322.289490] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:84:DP-1]
>[  322.289510] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] needs all connectors, enable: n, active: n
>[  322.289544] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f30282000
>[  322.289646] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
>[  322.289742] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe B] has [PLANE:43:plane 1B] with fb -1
>[  322.289826] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:43:plane 1B] visible 1 -> 0, off 1, on 0, ms 1
>[  322.289870] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe A] ffff8f7f347ab800 state to ffff8f7f30282000
>[  322.289910] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:74:pipe C] ffff8f7f2d7eb000 state to ffff8f7f30282000
>[  322.289949] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:59:plane 1C] ffff8f7f356a3c00 state to ffff8f7f30282000
>[  322.290039] [drm:skl_compute_wm [i915]] [PLANE:43:plane 1B] ddb (0 - 502) -> (0 - 0)
>[  322.290116] [drm:skl_compute_wm [i915]] [PLANE:55:cursor B] ddb (502 - 510) -> (0 - 0)
>[  322.290192] [drm:skl_compute_wm [i915]] [PLANE:59:plane 1C] ddb (510 - 1012) -> (0 - 988)
>[  322.290270] [drm:skl_compute_wm [i915]] [PLANE:71:cursor C] ddb (1012 - 1020) -> (988 - 1020)
>[  322.290306] [drm:drm_atomic_commit [drm]] committing ffff8f7f30282000
>[  322.290464] [drm:intel_disable_pipe [i915]] disabling pipe B
>[  322.304410] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  322.304932] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  322.305017] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[  322.307279] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 2, on? 1) for crtc 58
>[  322.307394] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B
>[  322.307508] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI A]
>[  322.307590] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B]
>[  322.307672] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A]
>[  322.307749] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B]
>[  322.307826] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C]
>[  322.307902] [drm:intel_atomic_commit_tail [i915]] [ENCODER:90:DDI C]
>[  322.307983] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:84:DP-1]
>[  322.308064] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL A
>[  322.308143] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL B
>[  322.309137] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL C
>[  322.322014] [drm:intel_power_well_disable [i915]] disabling dpio-common-b
>[  322.322126] [drm:intel_atomic_commit_tail [i915]] [CRTC:58:pipe B]
>[  322.322202] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8f7f30282000
>[  322.322251] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8f7f30282000
>[  322.322337] [drm:drm_mode_setcrtc [drm]] [CRTC:74:pipe C]
>[  322.322385] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8f7f324dd000
>[  322.322427] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:74:pipe C] ffff8f7f32578000 state to ffff8f7f324dd000
>[  322.322463] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:59:plane 1C] ffff8f7f31d11300 state to ffff8f7f324dd000
>[  322.322498] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for CRTC state ffff8f7f32578000
>[  322.322532] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f31d11300 to [NOCRTC]
>[  322.322565] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f31d11300
>[  322.322598] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:74:pipe C] to ffff8f7f324dd000
>[  322.322637] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:91:HDMI-A-2] ffff8f7f2df0c700 state to ffff8f7f324dd000
>[  322.322671] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff8f7f2df0c700 to [NOCRTC]
>[  322.322704] [drm:drm_atomic_check_only [drm]] checking ffff8f7f324dd000
>[  322.322732] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] mode changed
>[  322.322751] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] enable changed
>[  322.322769] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] active changed
>[  322.322789] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:91:HDMI-A-2]
>[  322.322806] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:91:HDMI-A-2]
>[  322.322826] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] needs all connectors, enable: n, active: n
>[  322.322860] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:74:pipe C] to ffff8f7f324dd000
>[  322.322906] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe A] ffff8f7f3257a000 state to ffff8f7f324dd000
>[  322.322940] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:58:pipe B] ffff8f7f3257d800 state to ffff8f7f324dd000
>[  322.323031] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>[  322.323124] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:74:pipe C] has [PLANE:59:plane 1C] with fb -1
>[  322.323207] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:59:plane 1C] visible 1 -> 0, off 1, on 0, ms 1
>[  322.323297] [drm:skl_compute_wm [i915]] [PLANE:59:plane 1C] ddb (0 - 988) -> (0 - 0)
>[  322.323373] [drm:skl_compute_wm [i915]] [PLANE:71:cursor C] ddb (988 - 1020) -> (0 - 0)
>[  322.323409] [drm:drm_atomic_commit [drm]] committing ffff8f7f324dd000
>[  322.323545] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe C
>[  322.323633] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[  322.323753] [drm:intel_disable_pipe [i915]] disabling pipe C
>[  322.338646] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well
>[  322.340436] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL C (active 4, on? 1) for crtc 74
>[  322.340554] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL C
>[  322.340670] [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz
>[  322.340785] [drm:intel_update_cdclk [i915]] Current CD clock rate: 79200 kHz, VCO: 633600 kHz, ref: 19200 kHz
>[  322.340876] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI A]
>[  322.340962] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B]
>[  322.341047] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A]
>[  322.341130] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B]
>[  322.341207] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C]
>[  322.341288] [drm:intel_atomic_commit_tail [i915]] [ENCODER:90:DDI C]
>[  322.341374] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:91:HDMI-A-2]
>[  322.341457] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL A
>[  322.341541] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL B
>[  322.341621] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL C
>[  322.341717] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[  322.341800] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  322.341902] [drm:intel_atomic_commit_tail [i915]] [CRTC:74:pipe C]
>[  322.341987] [drm:intel_power_well_disable [i915]] disabling DC off
>[  322.342069] [drm:gen9_enable_dc5 [i915]] Enabling DC5
>[  322.342154] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01
>[  322.342234] [drm:intel_power_well_disable [i915]] disabling always-on
>[  322.342295] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8f7f324dd000
>[  322.342345] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8f7f324dd000
>[  322.342433] [drm:drm_mode_setcrtc [drm]] [CRTC:58:pipe B]
>[  322.342487] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:84:DP-1]
>[  322.342528] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8f7f324dd000
>[  322.342573] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:58:pipe B] ffff8f7f3257b800 state to ffff8f7f324dd000
>[  322.342612] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:43:plane 1B] ffff8f7f34e1df00 state to ffff8f7f324dd000
>[  322.342653] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for CRTC state ffff8f7f3257b800
>[  322.342691] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f34e1df00 to [CRTC:58:pipe B]
>[  322.342726] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:93] for plane state ffff8f7f34e1df00
>[  322.342763] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f324dd000
>[  322.342802] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:84:DP-1] ffff8f7f2df0cf00 state to ffff8f7f324dd000
>[  322.342839] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff8f7f2df0cf00 to [CRTC:58:pipe B]
>[  322.342879] [drm:drm_atomic_check_only [drm]] checking ffff8f7f324dd000
>[  322.342908] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] mode changed
>[  322.342928] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] enable changed
>[  322.342949] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] active changed
>[  322.342970] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:84:DP-1]
>[  322.342990] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:84:DP-1] using [ENCODER:83:DDI B] on [CRTC:58:pipe B]
>[  322.343012] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] needs all connectors, enable: y, active: y
>[  322.343047] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f324dd000
>[  322.343087] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f324dd000
>[  322.343180] [drm:intel_atomic_check [i915]] [CONNECTOR:84:DP-1] checking for sink bpp constrains
>[  322.343263] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[  322.343358] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 148500KHz
>[  322.343449] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24
>[  322.343533] [drm:intel_dp_compute_config [i915]] DP link bw required 445500 available 648000
>[  322.343621] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[  322.343709] [drm:intel_dump_pipe_config [i915]] [CRTC:58:pipe B][modeset]
>[  322.343793] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 24, dithering: 0
>[  322.343876] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64
>[  322.343954] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  322.344032] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  322.344077] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  322.344157] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  322.344230] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  322.344315] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[  322.344393] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1080, pixel rate 148500
>[  322.344473] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  322.344555] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  322.344633] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  322.344724] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8200, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x19999a, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[  322.344804] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  322.344883] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 1B] disabled, scaler_id = -1
>[  322.344962] [drm:intel_dump_pipe_config [i915]] [PLANE:46:plane 2B] disabled, scaler_id = -1
>[  322.345042] [drm:intel_dump_pipe_config [i915]] [PLANE:49:plane 3B] disabled, scaler_id = -1
>[  322.345123] [drm:intel_dump_pipe_config [i915]] [PLANE:52:plane 4B] disabled, scaler_id = -1
>[  322.345200] [drm:intel_dump_pipe_config [i915]] [PLANE:55:cursor B] disabled, scaler_id = -1
>[  322.345287] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>[  322.345385] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe B] has [PLANE:43:plane 1B] with fb 93
>[  322.345466] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:43:plane 1B] visible 0 -> 1, off 0, on 1, ms 1
>[  322.345551] [drm:bxt_get_dpll [i915]] [CRTC:58:pipe B] using pre-allocated PORT PLL B
>[  322.345637] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe B
>[  322.345687] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe A] ffff8f7f3257b000 state to ffff8f7f324dd000
>[  322.345730] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:74:pipe C] ffff8f7f32579000 state to ffff8f7f324dd000
>[  322.345822] [drm:skl_compute_wm [i915]] [PLANE:43:plane 1B] ddb (0 - 0) -> (0 - 988)
>[  322.345899] [drm:skl_compute_wm [i915]] [PLANE:55:cursor B] ddb (0 - 0) -> (988 - 1020)
>[  322.345939] [drm:drm_atomic_commit [drm]] committing ffff8f7f324dd000
>[  322.347048] [drm:intel_power_well_enable [i915]] enabling always-on
>[  322.347087] [drm:intel_power_well_enable [i915]] enabling DC off
>[  322.347125] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00
>[  322.347168] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  322.348412] [drm:intel_power_well_enable [i915]] enabling dpio-common-b
>[  322.348678] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI A]
>[  322.348721] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B]
>[  322.348762] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A]
>[  322.348802] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B]
>[  322.348838] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C]
>[  322.348879] [drm:intel_atomic_commit_tail [i915]] [ENCODER:90:DDI C]
>[  322.348918] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL A
>[  322.348958] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL B
>[  322.348995] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL C
>[  322.349059] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 2, on? 0) for crtc 58
>[  322.349100] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B
>[  322.349237] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  322.349286] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  322.349747] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  322.350385] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  322.350840] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  322.350875] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  322.351331] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  322.351382] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  322.351419] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  322.351459] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  322.351494] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  322.351975] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  322.352112] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  322.352561] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  322.353237] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  322.353691] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  322.353727] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  322.354218] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  322.354260] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  322.354300] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[  322.354336] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  322.354821] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  322.355253] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  322.355695] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  322.356613] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  322.357084] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  322.357121] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  322.357614] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  322.357659] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  322.359883] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4
>[  322.359932] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  322.360402] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  322.360757] [drm:intel_enable_pipe [i915]] enabling pipe B
>[  322.377793] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:84:DP-1]
>[  322.377865] [drm:intel_atomic_commit_tail [i915]] [CRTC:58:pipe B]
>[  322.377977] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL B
>[  322.378039] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8f7f324dd000
>[  322.378073] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8f7f324dd000
>[  322.378139] [drm:drm_mode_setcrtc [drm]] [CRTC:42:pipe A]
>[  322.378173] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:76:eDP-1]
>[  322.378200] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8f7f30280000
>[  322.378228] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe A] ffff8f7f2d7eb800 state to ffff8f7f30280000
>[  322.378252] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:27:plane 1A] ffff8f7f356a3600 state to ffff8f7f30280000
>[  322.378278] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for CRTC state ffff8f7f2d7eb800
>[  322.378301] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f356a3600 to [CRTC:42:pipe A]
>[  322.378324] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:93] for plane state ffff8f7f356a3600
>[  322.378347] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f30280000
>[  322.378373] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:76:eDP-1] ffff8f7f2bc03200 state to ffff8f7f30280000
>[  322.378396] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff8f7f2bc03200 to [CRTC:42:pipe A]
>[  322.378421] [drm:drm_atomic_check_only [drm]] checking ffff8f7f30280000
>[  322.378441] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] mode changed
>[  322.378454] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] enable changed
>[  322.378466] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] active changed
>[  322.378479] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:76:eDP-1]
>[  322.378493] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:76:eDP-1] using [ENCODER:75:DDI A] on [CRTC:42:pipe A]
>[  322.378506] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] needs all connectors, enable: y, active: y
>[  322.378529] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f30280000
>[  322.378555] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f30280000
>[  322.378615] [drm:intel_atomic_check [i915]] [CONNECTOR:76:eDP-1] checking for sink bpp constrains
>[  322.378671] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[  322.378701] [drm:drm_mode_debug_printmodeline [drm]] Modeline 79:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[  322.378761] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 141000KHz
>[  322.378834] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24
>[  322.378888] [drm:intel_dp_compute_config [i915]] DP link bw required 423000 available 540000
>[  322.378945] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[  322.379001] [drm:intel_dump_pipe_config [i915]] [CRTC:42:pipe A][modeset]
>[  322.379054] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0
>[  322.379108] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6571076, gmch_n: 8388608, link_m: 273794, link_n: 524288, tu: 64
>[  322.379159] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  322.379210] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  322.379238] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[  322.379289] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  322.379316] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[  322.379369] [drm:intel_dump_pipe_config [i915]] crtc timings: 141000 1920 1936 1952 2104 1080 1083 1097 1116, type: 0x48 flags: 0xa
>[  322.379420] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 141000
>[  322.379471] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  322.379521] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  322.379571] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  322.379630] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[  322.379680] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  322.379731] [drm:intel_dump_pipe_config [i915]] [PLANE:27:plane 1A] disabled, scaler_id = -1
>[  322.379782] [drm:intel_dump_pipe_config [i915]] [PLANE:30:plane 2A] disabled, scaler_id = -1
>[  322.379834] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 3A] disabled, scaler_id = -1
>[  322.379885] [drm:intel_dump_pipe_config [i915]] [PLANE:36:plane 4A] disabled, scaler_id = -1
>[  322.379935] [drm:intel_dump_pipe_config [i915]] [PLANE:39:cursor A] disabled, scaler_id = -1
>[  322.379993] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>[  322.380053] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:42:pipe A] has [PLANE:27:plane 1A] with fb 93
>[  322.380106] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:plane 1A] visible 0 -> 1, off 0, on 1, ms 1
>[  322.380164] [drm:bxt_get_dpll [i915]] [CRTC:42:pipe A] using pre-allocated PORT PLL A
>[  322.380261] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe A
>[  322.380300] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:58:pipe B] ffff8f7f2d7e8800 state to ffff8f7f30280000
>[  322.380329] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:43:plane 1B] ffff8f7f356a3100 state to ffff8f7f30280000
>[  322.380358] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:74:pipe C] ffff8f7f2d7eb000 state to ffff8f7f30280000
>[  322.380419] [drm:skl_compute_wm [i915]] [PLANE:27:plane 1A] ddb (0 - 0) -> (0 - 502)
>[  322.380475] [drm:skl_compute_wm [i915]] [PLANE:39:cursor A] ddb (0 - 0) -> (502 - 510)
>[  322.380529] [drm:skl_compute_wm [i915]] [PLANE:43:plane 1B] ddb (0 - 988) -> (510 - 1012)
>[  322.380583] [drm:skl_compute_wm [i915]] [PLANE:55:cursor B] ddb (988 - 1020) -> (1012 - 1020)
>[  322.380611] [drm:drm_atomic_commit [drm]] committing ffff8f7f30280000
>[  322.380704] [drm:intel_power_well_enable [i915]] enabling dpio-common-a
>[  322.381342] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI A]
>[  322.381401] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B]
>[  322.381459] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A]
>[  322.381513] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B]
>[  322.381567] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C]
>[  322.381619] [drm:intel_atomic_commit_tail [i915]] [ENCODER:90:DDI C]
>[  322.381674] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL A
>[  322.381729] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL B
>[  322.381797] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL C
>[  322.394462] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 1, on? 0) for crtc 42
>[  322.394524] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A
>[  322.394719] [drm:intel_power_well_enable [i915]] enabling AUX A
>[  322.394785] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  322.394842] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  322.828427] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000060
>[  322.828518] [drm:wait_panel_status [i915]] Wait complete
>[  322.828602] [drm:edp_panel_on [i915]] Wait for panel power on
>[  322.828685] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000063
>[  322.930651] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010
>[  322.930750] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  322.930838] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  322.931002] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  323.030713] [drm:wait_panel_status [i915]] Wait complete
>[  323.030799] [drm:intel_power_well_disable [i915]] disabling AUX A
>[  323.030884] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well
>[  323.031022] [drm:intel_power_well_enable [i915]] enabling AUX A
>[  323.031113] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  323.031200] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b
>[  323.032430] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  323.032509] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  323.032591] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  323.033251] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  323.033328] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[  323.034275] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  323.034354] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:76:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  323.034937] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  323.035030] [drm:intel_edp_backlight_on [i915]] 
>[  323.035109] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  323.035189] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 67764
>[  323.040411] [drm:intel_psr_enable [i915]] PSR not supported on this platform
>[  323.040464] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  323.040524] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  323.040570] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  323.051918] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:76:eDP-1]
>[  323.052004] [drm:intel_atomic_commit_tail [i915]] [CRTC:42:pipe A]
>[  323.052147] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL A
>[  323.052295] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8f7f30280000
>[  323.052334] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8f7f30280000
>[  323.052429] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8f7f30280000
>[  323.052465] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe A] ffff8f7f35fa0800 state to ffff8f7f30280000
>[  323.052494] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:27:plane 1A] ffff8f7f356a3900 state to ffff8f7f30280000
>[  323.052522] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f356a3900 to [CRTC:42:pipe A]
>[  323.052553] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:133] for plane state ffff8f7f356a3900
>[  323.052579] [drm:drm_atomic_check_only [drm]] checking ffff8f7f30280000
>[  323.052663] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:42:pipe A] has [PLANE:27:plane 1A] with fb 133
>[  323.052730] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  323.052774] [drm:drm_atomic_nonblocking_commit [drm]] committing ffff8f7f30280000 nonblocking
>[  323.053245] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8f7f30282400
>[  323.053278] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:58:pipe B] ffff8f7f305ad000 state to ffff8f7f30282400
>[  323.053307] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:43:plane 1B] ffff8f7f356a3a00 state to ffff8f7f30282400
>[  323.053334] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f356a3a00 to [CRTC:58:pipe B]
>[  323.053363] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:133] for plane state ffff8f7f356a3a00
>[  323.053389] [drm:drm_atomic_check_only [drm]] checking ffff8f7f30282400
>[  323.053460] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe B] has [PLANE:43:plane 1B] with fb 133
>[  323.053529] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:43:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[  323.053565] [drm:drm_atomic_nonblocking_commit [drm]] committing ffff8f7f30282400 nonblocking
>[  323.061071] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8f7f30282400
>[  323.061121] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8f7f30282400
>[  323.068509] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8f7f30280000
>[  323.068552] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8f7f30280000
>[  323.127300] PM: Syncing filesystems ... done.
>[  323.134643] PM: Preparing system for sleep (mem)
>[  323.135466] Freezing user space processes ... (elapsed 0.001 seconds) done.
>[  323.136761] OOM killer disabled.
>[  323.136762] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
>[  323.137877] PM: Suspending system (mem)
>[  323.137911] Suspending console(s) (use no_console_suspend to debug)
>[  323.988204] hpet1: lost 7160 rtc interrupts
>[  324.865451] hpet1: lost 7161 rtc interrupts
>[  325.228464] sd 0:0:0:0: [sda] Synchronizing SCSI cache
>[  325.251516] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[  325.251676] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  325.251702] [drm:intel_power_well_enable [i915]] enabling AUX C
>[  325.253838] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8f7f2de0ac00
>[  325.253962] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe A] ffff8f7f3183b000 state to ffff8f7f2de0ac00
>[  325.254082] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:58:pipe B] ffff8f7f304ad000 state to ffff8f7f2de0ac00
>[  325.254202] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:74:pipe C] ffff8f7f304ab800 state to ffff8f7f2de0ac00
>[  325.254321] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:27:plane 1A] ffff8f7f2bdeb900 state to ffff8f7f2de0ac00
>[  325.254440] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:30:plane 2A] ffff8f7f356fdb00 state to ffff8f7f2de0ac00
>[  325.254558] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:33:plane 3A] ffff8f7f356fd700 state to ffff8f7f2de0ac00
>[  325.254676] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:36:plane 4A] ffff8f7f2bd78b00 state to ffff8f7f2de0ac00
>[  325.254796] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:39:cursor A] ffff8f7f2bd78000 state to ffff8f7f2de0ac00
>[  325.254914] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:43:plane 1B] ffff8f7f2bd78800 state to ffff8f7f2de0ac00
>[  325.255032] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:46:plane 2B] ffff8f7f2bd78600 state to ffff8f7f2de0ac00
>[  325.255150] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:49:plane 3B] ffff8f7f2bd78e00 state to ffff8f7f2de0ac00
>[  325.255269] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:plane 4B] ffff8f7f2bd78f00 state to ffff8f7f2de0ac00
>[  325.255386] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:55:cursor B] ffff8f7f34e1d700 state to ffff8f7f2de0ac00
>[  325.255502] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:59:plane 1C] ffff8f7f34e1df00 state to ffff8f7f2de0ac00
>[  325.255620] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:62:plane 2C] ffff8f7f331c1a00 state to ffff8f7f2de0ac00
>[  325.255738] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:65:plane 3C] ffff8f7f331c1100 state to ffff8f7f2de0ac00
>[  325.255856] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:68:plane 4C] ffff8f7f331c1500 state to ffff8f7f2de0ac00
>[  325.255974] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:71:cursor C] ffff8f7f331c1000 state to ffff8f7f2de0ac00
>[  325.256091] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:76:eDP-1] ffff8f7f2bc03900 state to ffff8f7f2de0ac00
>[  325.256320] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:84:DP-1] ffff8f7f2bc03f80 state to ffff8f7f2de0ac00
>[  325.256437] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:88:HDMI-A-1] ffff8f7f2bc03a00 state to ffff8f7f2de0ac00
>[  325.256554] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:91:HDMI-A-2] ffff8f7f2bc03000 state to ffff8f7f2de0ac00
>[  325.256670] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8f7f2de0a400
>[  325.256789] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe A] ffff8f7f304ad800 state to ffff8f7f2de0a400
>[  325.256907] [drm:drm_atomic_set_mode_prop_for_crtc [drm]] Set [NOMODE] for CRTC state ffff8f7f304ad800
>[  325.257023] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:27:plane 1A] ffff8f7f331c1700 state to ffff8f7f2de0a400
>[  325.257141] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f2de0a400
>[  325.257259] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:76:eDP-1] ffff8f7f2bc03180 state to ffff8f7f2de0a400
>[  325.257376] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:58:pipe B] ffff8f7f304aa800 state to ffff8f7f2de0a400
>[  325.257493] [drm:drm_atomic_set_mode_prop_for_crtc [drm]] Set [NOMODE] for CRTC state ffff8f7f304aa800
>[  325.257611] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:43:plane 1B] ffff8f7f356a3c00 state to ffff8f7f2de0a400
>[  325.257729] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f2de0a400
>[  325.257847] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:84:DP-1] ffff8f7f2bc03800 state to ffff8f7f2de0a400
>[  325.257965] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:74:pipe C] ffff8f7f304af800 state to ffff8f7f2de0a400
>[  325.258083] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:74:pipe C] to ffff8f7f2de0a400
>[  325.258198] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff8f7f2bc03180 to [NOCRTC]
>[  325.258313] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff8f7f2bc03800 to [NOCRTC]
>[  325.258428] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f331c1700 to [NOCRTC]
>[  325.258545] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f331c1700
>[  325.258662] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f356a3c00 to [NOCRTC]
>[  325.258780] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f356a3c00
>[  325.258897] [drm:drm_atomic_check_only [drm]] checking ffff8f7f2de0a400
>[  325.259015] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] mode changed
>[  325.259128] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] enable changed
>[  325.259134] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] active changed
>[  325.259246] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] mode changed
>[  325.259252] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] enable changed
>[  325.259365] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] active changed
>[  325.259476] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:76:eDP-1]
>[  325.259586] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:76:eDP-1]
>[  325.259697] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:84:DP-1]
>[  325.259808] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:84:DP-1]
>[  325.259919] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] needs all connectors, enable: n, active: n
>[  325.260036] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f2de0a400
>[  325.260269] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] needs all connectors, enable: n, active: n
>[  325.260384] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f2de0a400
>[  325.260521] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>[  325.260656] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:42:pipe A] has [PLANE:27:plane 1A] with fb -1
>[  325.260788] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:plane 1A] visible 1 -> 0, off 1, on 0, ms 1
>[  325.260967] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe B] has [PLANE:43:plane 1B] with fb -1
>[  325.261097] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:43:plane 1B] visible 1 -> 0, off 1, on 0, ms 1
>[  325.261336] [drm:skl_compute_wm [i915]] [PLANE:27:plane 1A] ddb (0 - 502) -> (0 - 0)
>[  325.261464] [drm:skl_compute_wm [i915]] [PLANE:39:cursor A] ddb (502 - 510) -> (0 - 0)
>[  325.261592] [drm:skl_compute_wm [i915]] [PLANE:43:plane 1B] ddb (510 - 1012) -> (0 - 0)
>[  325.261719] [drm:skl_compute_wm [i915]] [PLANE:55:cursor B] ddb (1012 - 1020) -> (0 - 0)
>[  325.261837] [drm:drm_atomic_commit [drm]] committing ffff8f7f2de0a400
>[  325.262195] [drm:intel_edp_backlight_off [i915]] 
>[  325.414401] sd 0:0:0:0: [sda] Stopping disk
>[  325.473176] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  325.473211] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  325.483580] [drm:intel_edp_panel_off.part.29 [i915]] Turn eDP port A panel power off
>[  325.483608] [drm:intel_edp_panel_off.part.29 [i915]] Wait for panel power off time
>[  325.483637] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000060
>[  325.534712] [drm:wait_panel_status [i915]] Wait complete
>[  325.534739] [drm:intel_power_well_disable [i915]] disabling DDI A IO power well
>[  325.536536] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010
>[  325.536563] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  325.536589] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  325.536728] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  325.536818] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  325.536848] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL A (active 1, on? 1) for crtc 42
>[  325.536900] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL A
>[  325.536948] [drm:intel_disable_pipe [i915]] disabling pipe B
>[  325.545627] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[  325.547702] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 2, on? 1) for crtc 58
>[  325.547753] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B
>[  325.547792] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI A]
>[  325.547819] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B]
>[  325.547849] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A]
>[  325.547876] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B]
>[  325.547900] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C]
>[  325.547928] [drm:intel_atomic_commit_tail [i915]] [ENCODER:90:DDI C]
>[  325.547953] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:76:eDP-1]
>[  325.547979] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:84:DP-1]
>[  325.548007] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL A
>[  325.548032] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL B
>[  325.548057] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL C
>[  325.548087] [drm:intel_atomic_commit_tail [i915]] [CRTC:42:pipe A]
>[  325.548118] [drm:intel_atomic_commit_tail [i915]] [CRTC:58:pipe B]
>[  325.548138] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8f7f2de0a400
>[  325.548162] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8f7f2de0a400
>[  325.548524] PM: suspend of devices complete after 323.856 msecs
>[  325.549327] [drm:intel_power_well_disable [i915]] disabling AUX C
>[  325.549353] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  325.549378] [drm:intel_power_well_disable [i915]] disabling AUX A
>[  325.549403] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[  325.549429] [drm:intel_power_well_disable [i915]] disabling dpio-common-b
>[  325.549454] [drm:intel_power_well_disable [i915]] disabling dpio-common-a
>[  325.549479] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  325.549512] [drm:intel_power_well_disable [i915]] disabling DC off
>[  325.549541] [drm:gen9_enable_dc5 [i915]] Enabling DC5
>[  325.549569] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01
>[  325.549596] [drm:intel_power_well_disable [i915]] disabling always-on
>[  325.549622] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00
>[  325.549700] [drm:intel_update_cdclk [i915]] Current CD clock rate: 19200 kHz, VCO: 0 kHz, ref: 19200 kHz
>[  325.549724] [drm:intel_power_well_disable [i915]] disabling power well 1
>[  325.549757] [drm:hsw_power_well_disable [i915]] power well 1 forced on (bios:1 driver:0 kvmr:0 debug:0)
>[  325.549821] [drm:bxt_enable_dc9 [i915]] Enabling DC9
>[  325.549849] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 08
>[  325.568342] PM: late suspend of devices complete after 19.815 msecs
>[  325.609445] PM: noirq suspend of devices complete after 41.098 msecs
>[  325.610715] ACPI: Preparing to enter system sleep state S3
>[  325.611556] ACPI: EC: event blocked
>[  325.611558] ACPI: EC: EC stopped
>[  325.611559] PM: Saving platform NVS memory
>[  325.611570] Disabling non-boot CPUs ...
>[  325.624871] IRQ 1: no longer affine to CPU1
>[  325.624878] IRQ 8: no longer affine to CPU1
>[  325.624890] IRQ 9: no longer affine to CPU1
>[  325.624903] IRQ 122: no longer affine to CPU1
>[  325.624908] IRQ 123: no longer affine to CPU1
>[  325.624912] IRQ 124: no longer affine to CPU1
>[  325.625939] smpboot: CPU 1 is now offline
>[  325.631808] ACPI: Low-level resume complete
>[  325.631961] ACPI: EC: EC started
>[  325.631962] PM: Restoring platform NVS memory
>[  325.632922] Suspended for 14.215 seconds
>[  325.633062] Enabling non-boot CPUs ...
>[  325.633153] x86: Booting SMP configuration:
>[  325.633155] smpboot: Booting Node 0 Processor 1 APIC 0x2
>[  325.634933]  cache: parent cpu1 should not be sleeping
>[  325.635353] CPU1 is up
>[  325.640162] ACPI: Waking up from system sleep state S3
>[  325.774568] PM: noirq resume of devices complete after 36.981 msecs
>[  325.775008] [drm:gen9_sanitize_dc_state [i915]] Resetting DC state tracking from 08 to 00
>[  325.775073] [drm:bxt_disable_dc9 [i915]] Disabling DC9
>[  325.775136] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  325.775208] [drm:sanitize_rc6_option [i915]] BIOS enabled RC states: HW_CTRL off HW_RC6 off SW_TARGET_STATE 4
>[  325.775302] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  325.775366] [drm:intel_power_well_enable [i915]] enabling power well 1
>[  325.775450] [drm:intel_update_cdclk [i915]] Current CD clock rate: 316800 kHz, VCO: 633600 kHz, ref: 19200 kHz
>[  325.775878] [drm:intel_power_well_enable [i915]] enabling always-on
>[  325.775940] [drm:intel_power_well_enable [i915]] enabling DC off
>[  325.776003] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  325.776068] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  325.776138] [drm:intel_power_well_enable [i915]] enabling dpio-common-a
>[  325.776295] [drm:intel_power_well_enable [i915]] enabling dpio-common-b
>[  325.776471] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[  325.776644] [drm:intel_power_well_enable [i915]] enabling AUX A
>[  325.776705] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  325.776764] [drm:intel_power_well_enable [i915]] enabling AUX C
>[  325.950988] PM: early resume of devices complete after 176.343 msecs
>[  325.951477] HDA: we are doing full chip reset now
>[  325.951561] ACPI: EC: event unblocked
>[  325.952020] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x799e5018
>[  325.952166] [drm:intel_opregion_setup [i915]] Public ACPI methods supported
>[  325.952248] [drm:intel_opregion_setup [i915]] ASLE supported
>[  325.952470] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA)
>[  325.952588] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:10001010 hp_port:38
>[  325.952687] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60
>[  325.952769] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60
>[  325.952938] [drm:gen8_init_common_ring [i915]] Execlists enabled for rcs0
>[  325.953037] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 12
>[  325.953184] [drm:gen8_init_common_ring [i915]] Execlists enabled for bcs0
>[  325.953334] [drm:gen8_init_common_ring [i915]] Execlists enabled for vcs0
>[  325.953483] [drm:gen8_init_common_ring [i915]] Execlists enabled for vecs0
>[  325.955675] [drm:intel_huc_init_hw [i915]] i915/glk_huc_ver02_00_1748.bin fw status: fetch SUCCESS, load SUCCESS
>[  325.957839] [drm:intel_huc_init_hw [i915]] HuC DMA transfer wait over with ret 0
>[  325.957925] [drm:intel_huc_init_hw [i915]] i915/glk_huc_ver02_00_1748.bin fw status: fetch SUCCESS, load SUCCESS
>[  325.958012] [drm:intel_guc_init_hw [i915]] GuC fw status: path i915/glk_guc_ver10_56.bin, fetch SUCCESS, load SUCCESS
>[  325.958093] [drm:intel_guc_init_hw [i915]] GuC fw status: fetch SUCCESS, load PENDING
>[  325.961660] sd 0:0:0:0: [sda] Starting disk
>[  325.963658] [drm:guc_ucode_xfer_dma [i915]] DMA status 0x10, GuC status 0x8002f0ec
>[  325.963711] [drm:guc_ucode_xfer_dma [i915]] returning 0
>[  325.963713] [drm] GuC submission enabled (firmware i915/glk_guc_ver10_56.bin [version 10.56])
>[  325.973371] r8169 0000:01:00.0 enp1s0: link down
>[  325.974460] [drm:intel_update_cdclk [i915]] Current CD clock rate: 316800 kHz, VCO: 633600 kHz, ref: 19200 kHz
>[  325.974506] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38
>[  325.974564] [drm:intel_set_plane_visible [i915]] pipe A active planes 0x0
>[  325.974610] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:42:pipe A] hw state readout: disabled
>[  325.974657] [drm:intel_set_plane_visible [i915]] pipe B active planes 0x0
>[  325.974698] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:58:pipe B] hw state readout: disabled
>[  325.974747] [drm:intel_set_plane_visible [i915]] pipe C active planes 0x0
>[  325.974788] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:74:pipe C] hw state readout: disabled
>[  325.974834] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL A hw state readout: crtc_mask 0x00000000, on 0
>[  325.974877] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL B hw state readout: crtc_mask 0x00000000, on 0
>[  325.974917] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0
>[  325.974962] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:75:DDI A] hw state readout: disabled, pipe A
>[  325.975005] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:83:DDI B] hw state readout: disabled, pipe A
>[  325.975045] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:85:DP-MST A] hw state readout: disabled, pipe A
>[  325.975086] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:86:DP-MST B] hw state readout: disabled, pipe B
>[  325.975125] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:87:DP-MST C] hw state readout: disabled, pipe C
>[  325.975168] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:90:DDI C] hw state readout: disabled, pipe A
>[  325.975212] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:76:eDP-1] hw state readout: disabled
>[  325.975252] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:84:DP-1] hw state readout: disabled
>[  325.975294] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:88:HDMI-A-1] hw state readout: disabled
>[  325.975340] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:91:HDMI-A-2] hw state readout: disabled
>[  325.975386] [drm:intel_dump_pipe_config [i915]] [CRTC:42:pipe A][setup_hw_state]
>[  325.975431] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0
>[  325.975470] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  325.975508] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  325.975539] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  325.975578] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  325.975598] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  325.975638] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  325.975677] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  325.975715] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  325.975754] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  325.975792] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  325.975841] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0
>[  325.975879] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  325.975920] [drm:intel_dump_pipe_config [i915]] [PLANE:27:plane 1A] disabled, scaler_id = -1
>[  325.975960] [drm:intel_dump_pipe_config [i915]] [PLANE:30:plane 2A] disabled, scaler_id = -1
>[  325.976000] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 3A] disabled, scaler_id = -1
>[  325.976040] [drm:intel_dump_pipe_config [i915]] [PLANE:36:plane 4A] disabled, scaler_id = -1
>[  325.976081] [drm:intel_dump_pipe_config [i915]] [PLANE:39:cursor A] disabled, scaler_id = -1
>[  325.976122] [drm:intel_dump_pipe_config [i915]] [CRTC:58:pipe B][setup_hw_state]
>[  325.976159] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0
>[  325.976197] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  325.976234] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  325.976254] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  325.976292] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  325.976312] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  325.976351] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  325.976389] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  325.976427] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  325.976466] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  325.976504] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  325.976547] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0
>[  325.976584] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  325.976622] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 1B] disabled, scaler_id = -1
>[  325.976660] [drm:intel_dump_pipe_config [i915]] [PLANE:46:plane 2B] disabled, scaler_id = -1
>[  325.976700] [drm:intel_dump_pipe_config [i915]] [PLANE:49:plane 3B] disabled, scaler_id = -1
>[  325.976740] [drm:intel_dump_pipe_config [i915]] [PLANE:52:plane 4B] disabled, scaler_id = -1
>[  325.976780] [drm:intel_dump_pipe_config [i915]] [PLANE:55:cursor B] disabled, scaler_id = -1
>[  325.976821] [drm:intel_dump_pipe_config [i915]] [CRTC:74:pipe C][setup_hw_state]
>[  325.976858] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0
>[  325.976895] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  325.976932] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  325.976952] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  325.976990] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  325.977009] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  325.977048] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  325.977086] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  325.977123] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1
>[  325.977161] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  325.977198] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  325.977241] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0
>[  325.977279] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  325.977316] [drm:intel_dump_pipe_config [i915]] [PLANE:59:plane 1C] disabled, scaler_id = -1
>[  325.977357] [drm:intel_dump_pipe_config [i915]] [PLANE:62:plane 2C] disabled, scaler_id = -1
>[  325.977397] [drm:intel_dump_pipe_config [i915]] [PLANE:65:plane 3C] disabled, scaler_id = -1
>[  325.977437] [drm:intel_dump_pipe_config [i915]] [PLANE:68:plane 4C] disabled, scaler_id = -1
>[  325.977477] [drm:intel_dump_pipe_config [i915]] [PLANE:71:cursor C] disabled, scaler_id = -1
>[  325.977577] [drm:intel_power_well_disable [i915]] disabling AUX C
>[  325.977617] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  325.977655] [drm:intel_power_well_disable [i915]] disabling AUX A
>[  325.977693] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[  325.977736] [drm:intel_power_well_disable [i915]] disabling dpio-common-b
>[  325.977774] [drm:intel_power_well_disable [i915]] disabling dpio-common-a
>[  325.977813] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  325.977855] [drm:intel_power_well_disable [i915]] disabling DC off
>[  325.977897] [drm:gen9_enable_dc5 [i915]] Enabling DC5
>[  325.977940] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01
>[  325.977980] [drm:intel_power_well_disable [i915]] disabling always-on
>[  325.978013] [drm:drm_atomic_check_only [drm]] checking ffff8f7f2de0ac00
>[  325.978033] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] mode changed
>[  325.978043] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] enable changed
>[  325.978052] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] active changed
>[  325.978062] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] mode changed
>[  325.978070] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] enable changed
>[  325.978079] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] active changed
>[  325.978093] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:76:eDP-1]
>[  325.978103] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:76:eDP-1] keeps [ENCODER:75:DDI A], now on [CRTC:42:pipe A]
>[  325.978112] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:84:DP-1]
>[  325.978122] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:84:DP-1] keeps [ENCODER:83:DDI B], now on [CRTC:58:pipe B]
>[  325.978130] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:88:HDMI-A-1]
>[  325.978139] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:88:HDMI-A-1]
>[  325.978148] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:91:HDMI-A-2]
>[  325.978156] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:91:HDMI-A-2]
>[  325.978165] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] needs all connectors, enable: y, active: y
>[  325.978187] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f2de0ac00
>[  325.978198] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] needs all connectors, enable: y, active: y
>[  325.978216] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f2de0ac00
>[  325.978227] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] needs all connectors, enable: n, active: n
>[  325.978245] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:74:pipe C] to ffff8f7f2de0ac00
>[  325.978265] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f2de0ac00
>[  325.978309] [drm:intel_atomic_check [i915]] [CONNECTOR:76:eDP-1] checking for sink bpp constrains
>[  325.978350] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[  325.978375] [drm:drm_mode_debug_printmodeline [drm]] Modeline 79:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[  325.978419] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 141000KHz
>[  325.978484] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24
>[  325.978524] [drm:intel_dp_compute_config [i915]] DP link bw required 423000 available 540000
>[  325.978572] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[  325.978612] [drm:intel_dump_pipe_config [i915]] [CRTC:42:pipe A][modeset]
>[  325.978652] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0
>[  325.978691] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6571076, gmch_n: 8388608, link_m: 273794, link_n: 524288, tu: 64
>[  325.978729] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  325.978767] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  325.978787] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[  325.978825] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  325.978845] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[  325.978885] [drm:intel_dump_pipe_config [i915]] crtc timings: 141000 1920 1936 1952 2104 1080 1083 1097 1116, type: 0x48 flags: 0xa
>[  325.978923] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 141000
>[  325.978961] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  325.978999] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  325.979036] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  325.979084] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[  325.979123] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  325.979160] [drm:intel_dump_pipe_config [i915]] [PLANE:27:plane 1A] disabled, scaler_id = -1
>[  325.979198] [drm:intel_dump_pipe_config [i915]] [PLANE:30:plane 2A] disabled, scaler_id = -1
>[  325.979236] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 3A] disabled, scaler_id = -1
>[  325.979273] [drm:intel_dump_pipe_config [i915]] [PLANE:36:plane 4A] disabled, scaler_id = -1
>[  325.979310] [drm:intel_dump_pipe_config [i915]] [PLANE:39:cursor A] disabled, scaler_id = -1
>[  325.979338] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f2de0ac00
>[  325.979382] [drm:intel_atomic_check [i915]] [CONNECTOR:84:DP-1] checking for sink bpp constrains
>[  325.979421] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[  325.979463] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 148500KHz
>[  325.979505] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24
>[  325.979545] [drm:intel_dp_compute_config [i915]] DP link bw required 445500 available 648000
>[  325.979585] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[  325.979624] [drm:intel_dump_pipe_config [i915]] [CRTC:58:pipe B][modeset]
>[  325.979663] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 24, dithering: 0
>[  325.979701] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64
>[  325.979739] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  325.979776] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  325.979796] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  325.979834] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  325.979853] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  325.979892] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[  325.979930] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1080, pixel rate 148500
>[  325.979968] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  325.980008] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  325.980045] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  325.980087] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8200, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x19999a, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[  325.980125] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  325.980163] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 1B] disabled, scaler_id = -1
>[  325.980200] [drm:intel_dump_pipe_config [i915]] [PLANE:46:plane 2B] disabled, scaler_id = -1
>[  325.980237] [drm:intel_dump_pipe_config [i915]] [PLANE:49:plane 3B] disabled, scaler_id = -1
>[  325.980275] [drm:intel_dump_pipe_config [i915]] [PLANE:52:plane 4B] disabled, scaler_id = -1
>[  325.980312] [drm:intel_dump_pipe_config [i915]] [PLANE:55:cursor B] disabled, scaler_id = -1
>[  325.980357] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>[  325.980407] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:42:pipe A] has [PLANE:27:plane 1A] with fb 133
>[  325.980446] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:plane 1A] visible 0 -> 1, off 0, on 1, ms 1
>[  325.980491] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe B] has [PLANE:43:plane 1B] with fb 133
>[  325.980529] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:43:plane 1B] visible 0 -> 1, off 0, on 1, ms 1
>[  325.980574] [drm:bxt_get_dpll [i915]] [CRTC:42:pipe A] using pre-allocated PORT PLL A
>[  325.980616] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe A
>[  325.980660] [drm:bxt_get_dpll [i915]] [CRTC:58:pipe B] using pre-allocated PORT PLL B
>[  325.980698] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe B
>[  325.980750] [drm:skl_compute_wm [i915]] [PLANE:27:plane 1A] ddb (0 - 0) -> (0 - 502)
>[  325.980788] [drm:skl_compute_wm [i915]] [PLANE:39:cursor A] ddb (0 - 0) -> (502 - 510)
>[  325.980826] [drm:skl_compute_wm [i915]] [PLANE:43:plane 1B] ddb (0 - 0) -> (510 - 1012)
>[  325.980864] [drm:skl_compute_wm [i915]] [PLANE:55:cursor B] ddb (0 - 0) -> (1012 - 1020)
>[  325.980884] [drm:drm_atomic_commit [drm]] committing ffff8f7f2de0ac00
>[  325.981355] [drm:intel_power_well_enable [i915]] enabling always-on
>[  325.981392] [drm:intel_power_well_enable [i915]] enabling DC off
>[  325.981431] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00
>[  325.981474] [drm:intel_power_well_enable [i915]] enabling dpio-common-a
>[  325.981622] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  325.981670] [drm:intel_power_well_enable [i915]] enabling dpio-common-b
>[  325.981881] [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz
>[  325.981972] [drm:intel_update_cdclk [i915]] Current CD clock rate: 79200 kHz, VCO: 633600 kHz, ref: 19200 kHz
>[  325.982031] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI A]
>[  325.982088] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B]
>[  325.982144] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A]
>[  325.982199] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B]
>[  325.982254] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C]
>[  325.982309] [drm:intel_atomic_commit_tail [i915]] [ENCODER:90:DDI C]
>[  325.982365] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:88:HDMI-A-1]
>[  325.982423] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:91:HDMI-A-2]
>[  325.982498] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL A
>[  325.982554] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL B
>[  325.982610] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL C
>[  325.982700] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 1, on? 0) for crtc 42
>[  325.982758] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A
>[  325.982924] [drm:intel_power_well_enable [i915]] enabling AUX A
>[  325.982993] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  325.983056] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  325.983127] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000062
>[  325.983185] [drm:wait_panel_status [i915]] Wait complete
>[  325.983246] [drm:edp_panel_on [i915]] Wait for panel power on
>[  325.983305] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000063
>[  326.085228] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010
>[  326.085321] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  326.085409] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  326.085557] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  326.183842] [drm:wait_panel_status [i915]] Wait complete
>[  326.183929] [drm:intel_power_well_disable [i915]] disabling AUX A
>[  326.184014] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well
>[  326.184110] [drm:intel_power_well_enable [i915]] enabling AUX A
>[  326.184205] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  326.184294] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b
>[  326.185461] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  326.185543] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  326.185625] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  326.186285] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  326.186364] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[  326.187329] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  326.187410] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:76:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  326.188000] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  326.188113] [drm:intel_edp_backlight_on [i915]] 
>[  326.188196] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  326.188277] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 67764
>[  326.190464] atkbd serio0: Failed to deactivate keyboard on isa0060/serio0
>[  326.194502] [drm:intel_psr_enable [i915]] PSR not supported on this platform
>[  326.194582] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  326.194676] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  326.194754] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  326.194929] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 2, on? 0) for crtc 58
>[  326.195008] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B
>[  326.195201] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  326.195291] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  326.195790] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  326.196466] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  326.196937] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  326.196987] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  326.197457] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  326.197518] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  326.197565] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  326.197613] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  326.197661] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  326.198155] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  326.198302] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  326.198759] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  326.199414] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  326.199876] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  326.199924] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  326.200426] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  326.200486] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[  326.200532] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  326.200579] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  326.201065] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  326.201213] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  326.201666] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  326.202353] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  326.202825] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  326.202875] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  326.203379] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  326.203434] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  326.203489] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[  326.203539] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  326.204033] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  326.204479] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  326.204924] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  326.205605] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  326.206062] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  326.206102] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  326.206599] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  326.206645] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  326.208798] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4
>[  326.208861] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  326.209306] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  326.209690] [drm:intel_enable_pipe [i915]] enabling pipe B
>[  326.226723] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:76:eDP-1]
>[  326.226786] [drm:intel_atomic_commit_tail [i915]] [CRTC:42:pipe A]
>[  326.226895] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL A
>[  326.226999] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:84:DP-1]
>[  326.227056] [drm:intel_atomic_commit_tail [i915]] [CRTC:58:pipe B]
>[  326.227143] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL B
>[  326.227212] [drm:intel_atomic_commit_tail [i915]] [CRTC:74:pipe C]
>[  326.227264] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8f7f2de0ac00
>[  326.227299] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8f7f2de0ac00
>[  326.227359] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38
>[  326.227415] [drm:intel_opregion_register [i915]] 4 outputs detected
>[  326.227475] [drm:intel_dp_detect [i915]] [CONNECTOR:76:eDP-1]
>[  326.227529] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>[  326.227581] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>[  326.227630] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  326.227678] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  326.230237] PM: resume of devices complete after 279.241 msecs
>[  326.230696] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000
>[  326.231292] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:76:eDP-1] status updated from connected to connected
>[  326.231342] [drm:intel_dp_detect [i915]] [CONNECTOR:84:DP-1]
>[  326.231399] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  326.232400] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 80 02 00 00 00 00 00 00
>[  326.233276] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>[  326.233327] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>[  326.233377] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  326.233424] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  326.234363] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-e0-4c dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[  326.234412] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[  326.238716] PM: Finishing wakeup.
>[  326.238717] OOM killer enabled.
>[  326.238718] Restarting tasks ... 
>[  326.247252] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  326.247269] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:84:DP-1] status updated from connected to connected
>[  326.247299] [drm:intel_hdmi_detect [i915]] [CONNECTOR:88:HDMI-A-1]
>[  326.249379] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  326.249407] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[  326.250506] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  326.250527] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[  326.252105] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[  326.252133] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[  326.254200] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[  326.254213] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[  326.254222] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:88:HDMI-A-1] status updated from disconnected to disconnected
>[  326.254251] [drm:intel_hdmi_detect [i915]] [CONNECTOR:91:HDMI-A-2]
>[  326.254272] done.
>[  326.324245] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>[  326.324296] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[  326.326362] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>[  326.326381] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[  326.326411] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[  326.326499] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:91:HDMI-A-2] status updated from connected to connected
>[  326.458461] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
>[  326.499439] ata1.00: configured for UDMA/133
>[  326.558840] PM: Syncing filesystems ... done.
>[  326.567357] PM: Preparing system for sleep (mem)
>[  326.567750] Freezing user space processes ... 
>[  326.570441] atkbd serio0: Failed to enable keyboard on isa0060/serio0
>[  326.570488] (elapsed 0.002 seconds) done.
>[  326.570492] OOM killer disabled.
>[  326.570492] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
>[  326.571606] PM: Suspending system (mem)
>[  326.571640] Suspending console(s) (use no_console_suspend to debug)
>[  327.404957] hpet1: lost 7160 rtc interrupts
>[  327.826913] [drm] RC6 on
>[  328.261849] hpet1: lost 7161 rtc interrupts
>[  328.694927] sd 0:0:0:0: [sda] Synchronizing SCSI cache
>[  328.715902] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[  328.716034] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  328.716060] [drm:intel_power_well_enable [i915]] enabling AUX C
>[  328.721444] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8f7f31674400
>[  328.721461] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe A] ffff8f7f304ac800 state to ffff8f7f31674400
>[  328.721474] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:58:pipe B] ffff8f7f304ab000 state to ffff8f7f31674400
>[  328.721486] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:74:pipe C] ffff8f7f304a8800 state to ffff8f7f31674400
>[  328.721498] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:27:plane 1A] ffff8f7f2ddef400 state to ffff8f7f31674400
>[  328.721511] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:30:plane 2A] ffff8f7f2de60700 state to ffff8f7f31674400
>[  328.721522] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:33:plane 3A] ffff8f7f2de60e00 state to ffff8f7f31674400
>[  328.721534] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:36:plane 4A] ffff8f7f2de60900 state to ffff8f7f31674400
>[  328.721546] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:39:cursor A] ffff8f7f2de60f00 state to ffff8f7f31674400
>[  328.721557] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:43:plane 1B] ffff8f7f2de60200 state to ffff8f7f31674400
>[  328.721568] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:46:plane 2B] ffff8f7f2de60a00 state to ffff8f7f31674400
>[  328.721580] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:49:plane 3B] ffff8f7f331c1700 state to ffff8f7f31674400
>[  328.721591] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:plane 4B] ffff8f7f2fe23300 state to ffff8f7f31674400
>[  328.721602] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:55:cursor B] ffff8f7f2fe23400 state to ffff8f7f31674400
>[  328.721614] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:59:plane 1C] ffff8f7f2fe23000 state to ffff8f7f31674400
>[  328.721625] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:62:plane 2C] ffff8f7f2fe23100 state to ffff8f7f31674400
>[  328.721636] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:65:plane 3C] ffff8f7f2fe23200 state to ffff8f7f31674400
>[  328.721647] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:68:plane 4C] ffff8f7f36235500 state to ffff8f7f31674400
>[  328.721658] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:71:cursor C] ffff8f7f32e1eb00 state to ffff8f7f31674400
>[  328.721671] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:76:eDP-1] ffff8f7f2ffd3f80 state to ffff8f7f31674400
>[  328.721683] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:84:DP-1] ffff8f7f2ffd3d80 state to ffff8f7f31674400
>[  328.721694] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:88:HDMI-A-1] ffff8f7f2ffd3200 state to ffff8f7f31674400
>[  328.721705] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:91:HDMI-A-2] ffff8f7f2ffd3a00 state to ffff8f7f31674400
>[  328.721717] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8f7f31677400
>[  328.721728] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe A] ffff8f7f304ae800 state to ffff8f7f31677400
>[  328.721739] [drm:drm_atomic_set_mode_prop_for_crtc [drm]] Set [NOMODE] for CRTC state ffff8f7f304ae800
>[  328.721750] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:27:plane 1A] ffff8f7f317ef800 state to ffff8f7f31677400
>[  328.721762] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f31677400
>[  328.721773] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:76:eDP-1] ffff8f7f2ffd3300 state to ffff8f7f31677400
>[  328.721784] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:58:pipe B] ffff8f7f304a9800 state to ffff8f7f31677400
>[  328.721795] [drm:drm_atomic_set_mode_prop_for_crtc [drm]] Set [NOMODE] for CRTC state ffff8f7f304a9800
>[  328.721806] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:43:plane 1B] ffff8f7f317ef000 state to ffff8f7f31677400
>[  328.721816] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f31677400
>[  328.721827] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:84:DP-1] ffff8f7f2ffd3c00 state to ffff8f7f31677400
>[  328.721839] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:74:pipe C] ffff8f7f304af800 state to ffff8f7f31677400
>[  328.721849] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:74:pipe C] to ffff8f7f31677400
>[  328.721860] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff8f7f2ffd3300 to [NOCRTC]
>[  328.721870] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff8f7f2ffd3c00 to [NOCRTC]
>[  328.721881] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f317ef800 to [NOCRTC]
>[  328.721891] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f317ef800
>[  328.721901] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f317ef000 to [NOCRTC]
>[  328.721912] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f317ef000
>[  328.721922] [drm:drm_atomic_check_only [drm]] checking ffff8f7f31677400
>[  328.721933] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] mode changed
>[  328.721939] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] enable changed
>[  328.721945] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] active changed
>[  328.721951] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] mode changed
>[  328.721956] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] enable changed
>[  328.721962] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] active changed
>[  328.721968] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:76:eDP-1]
>[  328.721974] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:76:eDP-1]
>[  328.721980] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:84:DP-1]
>[  328.721986] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:84:DP-1]
>[  328.721992] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] needs all connectors, enable: n, active: n
>[  328.722003] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f31677400
>[  328.722009] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] needs all connectors, enable: n, active: n
>[  328.722020] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f31677400
>[  328.722053] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>[  328.722084] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:42:pipe A] has [PLANE:27:plane 1A] with fb -1
>[  328.722112] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:plane 1A] visible 1 -> 0, off 1, on 0, ms 1
>[  328.722139] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe B] has [PLANE:43:plane 1B] with fb -1
>[  328.722165] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:43:plane 1B] visible 1 -> 0, off 1, on 0, ms 1
>[  328.722194] [drm:skl_compute_wm [i915]] [PLANE:27:plane 1A] ddb (0 - 502) -> (0 - 0)
>[  328.722219] [drm:skl_compute_wm [i915]] [PLANE:39:cursor A] ddb (502 - 510) -> (0 - 0)
>[  328.722243] [drm:skl_compute_wm [i915]] [PLANE:43:plane 1B] ddb (510 - 1012) -> (0 - 0)
>[  328.722267] [drm:skl_compute_wm [i915]] [PLANE:55:cursor B] ddb (1012 - 1020) -> (0 - 0)
>[  328.722279] [drm:drm_atomic_commit [drm]] committing ffff8f7f31677400
>[  328.722322] [drm:intel_edp_backlight_off [i915]] 
>[  328.886276] sd 0:0:0:0: [sda] Stopping disk
>[  328.926459] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  328.926509] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  328.937173] [drm:intel_edp_panel_off.part.29 [i915]] Turn eDP port A panel power off
>[  328.937308] [drm:intel_edp_panel_off.part.29 [i915]] Wait for panel power off time
>[  328.937444] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000060
>[  328.988560] [drm:wait_panel_status [i915]] Wait complete
>[  328.988691] [drm:intel_power_well_disable [i915]] disabling DDI A IO power well
>[  328.990296] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010
>[  328.990323] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  328.990349] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  328.990423] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  328.990864] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  328.990999] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL A (active 1, on? 1) for crtc 42
>[  328.992537] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL A
>[  328.993117] [drm:intel_disable_pipe [i915]] disabling pipe B
>[  329.012366] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[  329.014535] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 2, on? 1) for crtc 58
>[  329.015953] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B
>[  329.016204] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI A]
>[  329.016340] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B]
>[  329.016478] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A]
>[  329.016613] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B]
>[  329.016745] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C]
>[  329.016879] [drm:intel_atomic_commit_tail [i915]] [ENCODER:90:DDI C]
>[  329.017012] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:76:eDP-1]
>[  329.017147] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:84:DP-1]
>[  329.017282] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL A
>[  329.017416] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL B
>[  329.017548] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL C
>[  329.017686] [drm:intel_atomic_commit_tail [i915]] [CRTC:42:pipe A]
>[  329.017932] [drm:intel_atomic_commit_tail [i915]] [CRTC:58:pipe B]
>[  329.018169] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8f7f31677400
>[  329.018403] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8f7f31677400
>[  329.019937] PM: suspend of devices complete after 328.605 msecs
>[  329.020507] [drm:intel_power_well_disable [i915]] disabling AUX C
>[  329.020533] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  329.020558] [drm:intel_power_well_disable [i915]] disabling AUX A
>[  329.020583] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[  329.020611] [drm:intel_power_well_disable [i915]] disabling dpio-common-b
>[  329.020637] [drm:intel_power_well_disable [i915]] disabling dpio-common-a
>[  329.020662] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  329.020692] [drm:intel_power_well_disable [i915]] disabling DC off
>[  329.020723] [drm:gen9_enable_dc5 [i915]] Enabling DC5
>[  329.020751] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01
>[  329.020778] [drm:intel_power_well_disable [i915]] disabling always-on
>[  329.020803] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00
>[  329.020879] [drm:intel_update_cdclk [i915]] Current CD clock rate: 19200 kHz, VCO: 0 kHz, ref: 19200 kHz
>[  329.020904] [drm:intel_power_well_disable [i915]] disabling power well 1
>[  329.020974] [drm:bxt_enable_dc9 [i915]] Enabling DC9
>[  329.020999] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 08
>[  329.038538] PM: late suspend of devices complete after 18.598 msecs
>[  329.079669] PM: noirq suspend of devices complete after 41.127 msecs
>[  329.080937] ACPI: Preparing to enter system sleep state S3
>[  329.081776] ACPI: EC: event blocked
>[  329.081778] ACPI: EC: EC stopped
>[  329.081779] PM: Saving platform NVS memory
>[  329.081789] Disabling non-boot CPUs ...
>[  329.096135] smpboot: CPU 1 is now offline
>[  329.101869] ACPI: Low-level resume complete
>[  329.102028] ACPI: EC: EC started
>[  329.102029] PM: Restoring platform NVS memory
>[  329.102990] Suspended for 14.536 seconds
>[  329.103134] Enabling non-boot CPUs ...
>[  329.103223] x86: Booting SMP configuration:
>[  329.103225] smpboot: Booting Node 0 Processor 1 APIC 0x2
>[  329.104989]  cache: parent cpu1 should not be sleeping
>[  329.105412] CPU1 is up
>[  329.110206] ACPI: Waking up from system sleep state S3
>[  329.248808] PM: noirq resume of devices complete after 39.083 msecs
>[  329.249176] [drm:gen9_sanitize_dc_state [i915]] Resetting DC state tracking from 08 to 00
>[  329.249234] [drm:bxt_disable_dc9 [i915]] Disabling DC9
>[  329.249291] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  329.249357] [drm:sanitize_rc6_option [i915]] BIOS enabled RC states: HW_CTRL off HW_RC6 off SW_TARGET_STATE 4
>[  329.249446] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  329.249505] [drm:intel_power_well_enable [i915]] enabling power well 1
>[  329.249583] [drm:intel_update_cdclk [i915]] Current CD clock rate: 316800 kHz, VCO: 633600 kHz, ref: 19200 kHz
>[  329.249990] [drm:intel_power_well_enable [i915]] enabling always-on
>[  329.250047] [drm:intel_power_well_enable [i915]] enabling DC off
>[  329.250108] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[  329.250168] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  329.250232] [drm:intel_power_well_enable [i915]] enabling dpio-common-a
>[  329.250383] [drm:intel_power_well_enable [i915]] enabling dpio-common-b
>[  329.250552] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[  329.250719] [drm:intel_power_well_enable [i915]] enabling AUX A
>[  329.250775] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  329.250829] [drm:intel_power_well_enable [i915]] enabling AUX C
>[  329.425233] PM: early resume of devices complete after 176.349 msecs
>[  329.425720] HDA: we are doing full chip reset now
>[  329.426275] ACPI: EC: event unblocked
>[  329.427417] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x799e5018
>[  329.427555] [drm:intel_opregion_setup [i915]] Public ACPI methods supported
>[  329.427638] [drm:intel_opregion_setup [i915]] ASLE supported
>[  329.427883] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA)
>[  329.428012] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:10001010 hp_port:38
>[  329.428113] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60
>[  329.428196] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60
>[  329.428366] [drm:gen8_init_common_ring [i915]] Execlists enabled for rcs0
>[  329.428466] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 12
>[  329.428612] [drm:gen8_init_common_ring [i915]] Execlists enabled for bcs0
>[  329.428761] [drm:gen8_init_common_ring [i915]] Execlists enabled for vcs0
>[  329.428909] [drm:gen8_init_common_ring [i915]] Execlists enabled for vecs0
>[  329.429057] [drm:intel_huc_init_hw [i915]] i915/glk_huc_ver02_00_1748.bin fw status: fetch SUCCESS, load SUCCESS
>[  329.430849] [drm:intel_huc_init_hw [i915]] HuC DMA transfer wait over with ret 0
>[  329.430943] [drm:intel_huc_init_hw [i915]] i915/glk_huc_ver02_00_1748.bin fw status: fetch SUCCESS, load SUCCESS
>[  329.431027] [drm:intel_guc_init_hw [i915]] GuC fw status: path i915/glk_guc_ver10_56.bin, fetch SUCCESS, load SUCCESS
>[  329.431111] [drm:intel_guc_init_hw [i915]] GuC fw status: fetch SUCCESS, load PENDING
>[  329.435999] sd 0:0:0:0: [sda] Starting disk
>[  329.436961] [drm:guc_ucode_xfer_dma [i915]] DMA status 0x10, GuC status 0x8002f0ec
>[  329.437050] [drm:guc_ucode_xfer_dma [i915]] returning 0
>[  329.437057] [drm] GuC submission enabled (firmware i915/glk_guc_ver10_56.bin [version 10.56])
>[  329.443621] r8169 0000:01:00.0 enp1s0: link down
>[  329.447528] [drm:intel_update_cdclk [i915]] Current CD clock rate: 316800 kHz, VCO: 633600 kHz, ref: 19200 kHz
>[  329.447580] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38
>[  329.447626] [drm:intel_set_plane_visible [i915]] pipe A active planes 0x0
>[  329.447659] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:42:pipe A] hw state readout: disabled
>[  329.447694] [drm:intel_set_plane_visible [i915]] pipe B active planes 0x0
>[  329.447722] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:58:pipe B] hw state readout: disabled
>[  329.447757] [drm:intel_set_plane_visible [i915]] pipe C active planes 0x0
>[  329.447785] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:74:pipe C] hw state readout: disabled
>[  329.447818] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL A hw state readout: crtc_mask 0x00000000, on 0
>[  329.447845] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL B hw state readout: crtc_mask 0x00000000, on 0
>[  329.447872] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0
>[  329.447905] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:75:DDI A] hw state readout: disabled, pipe A
>[  329.447935] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:83:DDI B] hw state readout: disabled, pipe A
>[  329.447962] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:85:DP-MST A] hw state readout: disabled, pipe A
>[  329.447991] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:86:DP-MST B] hw state readout: disabled, pipe B
>[  329.448017] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:87:DP-MST C] hw state readout: disabled, pipe C
>[  329.448043] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:90:DDI C] hw state readout: disabled, pipe A
>[  329.448073] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:76:eDP-1] hw state readout: disabled
>[  329.448106] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:84:DP-1] hw state readout: disabled
>[  329.448133] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:88:HDMI-A-1] hw state readout: disabled
>[  329.448165] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:91:HDMI-A-2] hw state readout: disabled
>[  329.448197] [drm:intel_dump_pipe_config [i915]] [CRTC:42:pipe A][setup_hw_state]
>[  329.448229] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0
>[  329.448255] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  329.448281] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  329.448305] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  329.448332] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  329.448346] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  329.448373] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  329.448399] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  329.448426] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  329.448451] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  329.448477] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  329.448512] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0
>[  329.448538] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  329.448567] [drm:intel_dump_pipe_config [i915]] [PLANE:27:plane 1A] disabled, scaler_id = -1
>[  329.448595] [drm:intel_dump_pipe_config [i915]] [PLANE:30:plane 2A] disabled, scaler_id = -1
>[  329.448624] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 3A] disabled, scaler_id = -1
>[  329.448652] [drm:intel_dump_pipe_config [i915]] [PLANE:36:plane 4A] disabled, scaler_id = -1
>[  329.448685] [drm:intel_dump_pipe_config [i915]] [PLANE:39:cursor A] disabled, scaler_id = -1
>[  329.448712] [drm:intel_dump_pipe_config [i915]] [CRTC:58:pipe B][setup_hw_state]
>[  329.448738] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0
>[  329.448764] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  329.448789] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  329.448803] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  329.448829] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  329.448842] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  329.448869] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  329.448895] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  329.448921] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  329.448947] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  329.448972] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  329.449001] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0
>[  329.449027] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  329.449056] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 1B] disabled, scaler_id = -1
>[  329.449082] [drm:intel_dump_pipe_config [i915]] [PLANE:46:plane 2B] disabled, scaler_id = -1
>[  329.449110] [drm:intel_dump_pipe_config [i915]] [PLANE:49:plane 3B] disabled, scaler_id = -1
>[  329.449135] [drm:intel_dump_pipe_config [i915]] [PLANE:52:plane 4B] disabled, scaler_id = -1
>[  329.449164] [drm:intel_dump_pipe_config [i915]] [PLANE:55:cursor B] disabled, scaler_id = -1
>[  329.449192] [drm:intel_dump_pipe_config [i915]] [CRTC:74:pipe C][setup_hw_state]
>[  329.449218] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0
>[  329.449246] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  329.449271] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  329.449285] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  329.449311] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  329.449324] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  329.449351] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[  329.449377] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[  329.449403] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1
>[  329.449429] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  329.449454] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  329.449483] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0
>[  329.449509] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  329.449535] [drm:intel_dump_pipe_config [i915]] [PLANE:59:plane 1C] disabled, scaler_id = -1
>[  329.449566] [drm:intel_dump_pipe_config [i915]] [PLANE:62:plane 2C] disabled, scaler_id = -1
>[  329.449595] [drm:intel_dump_pipe_config [i915]] [PLANE:65:plane 3C] disabled, scaler_id = -1
>[  329.449623] [drm:intel_dump_pipe_config [i915]] [PLANE:68:plane 4C] disabled, scaler_id = -1
>[  329.449651] [drm:intel_dump_pipe_config [i915]] [PLANE:71:cursor C] disabled, scaler_id = -1
>[  329.449734] [drm:intel_power_well_disable [i915]] disabling AUX C
>[  329.449762] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  329.449789] [drm:intel_power_well_disable [i915]] disabling AUX A
>[  329.449815] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[  329.449846] [drm:intel_power_well_disable [i915]] disabling dpio-common-b
>[  329.449873] [drm:intel_power_well_disable [i915]] disabling dpio-common-a
>[  329.449901] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  329.449932] [drm:intel_power_well_disable [i915]] disabling DC off
>[  329.449962] [drm:gen9_enable_dc5 [i915]] Enabling DC5
>[  329.449994] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01
>[  329.450022] [drm:intel_power_well_disable [i915]] disabling always-on
>[  329.450048] [drm:drm_atomic_check_only [drm]] checking ffff8f7f31674400
>[  329.450064] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] mode changed
>[  329.450071] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] enable changed
>[  329.450077] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] active changed
>[  329.450083] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] mode changed
>[  329.450090] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] enable changed
>[  329.450096] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] active changed
>[  329.450104] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:76:eDP-1]
>[  329.450112] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:76:eDP-1] keeps [ENCODER:75:DDI A], now on [CRTC:42:pipe A]
>[  329.450118] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:84:DP-1]
>[  329.450125] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:84:DP-1] keeps [ENCODER:83:DDI B], now on [CRTC:58:pipe B]
>[  329.450131] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:88:HDMI-A-1]
>[  329.450137] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:88:HDMI-A-1]
>[  329.450143] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:91:HDMI-A-2]
>[  329.450149] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:91:HDMI-A-2]
>[  329.450156] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] needs all connectors, enable: y, active: y
>[  329.450171] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f31674400
>[  329.450178] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] needs all connectors, enable: y, active: y
>[  329.450191] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f31674400
>[  329.450198] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] needs all connectors, enable: n, active: n
>[  329.450211] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:74:pipe C] to ffff8f7f31674400
>[  329.450225] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f31674400
>[  329.450259] [drm:intel_atomic_check [i915]] [CONNECTOR:76:eDP-1] checking for sink bpp constrains
>[  329.450287] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[  329.450304] [drm:drm_mode_debug_printmodeline [drm]] Modeline 79:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[  329.450337] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 141000KHz
>[  329.450378] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24
>[  329.450406] [drm:intel_dp_compute_config [i915]] DP link bw required 423000 available 540000
>[  329.450440] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[  329.450468] [drm:intel_dump_pipe_config [i915]] [CRTC:42:pipe A][modeset]
>[  329.450495] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0
>[  329.450523] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6571076, gmch_n: 8388608, link_m: 273794, link_n: 524288, tu: 64
>[  329.450549] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  329.450575] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  329.450589] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[  329.450616] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  329.450632] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[  329.450659] [drm:intel_dump_pipe_config [i915]] crtc timings: 141000 1920 1936 1952 2104 1080 1083 1097 1116, type: 0x48 flags: 0xa
>[  329.450686] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 141000
>[  329.450712] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  329.450738] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  329.450764] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  329.450797] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[  329.450823] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  329.450850] [drm:intel_dump_pipe_config [i915]] [PLANE:27:plane 1A] disabled, scaler_id = -1
>[  329.450876] [drm:intel_dump_pipe_config [i915]] [PLANE:30:plane 2A] disabled, scaler_id = -1
>[  329.450902] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 3A] disabled, scaler_id = -1
>[  329.450928] [drm:intel_dump_pipe_config [i915]] [PLANE:36:plane 4A] disabled, scaler_id = -1
>[  329.450954] [drm:intel_dump_pipe_config [i915]] [PLANE:39:cursor A] disabled, scaler_id = -1
>[  329.450968] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f31674400
>[  329.450999] [drm:intel_atomic_check [i915]] [CONNECTOR:84:DP-1] checking for sink bpp constrains
>[  329.451026] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[  329.451056] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 148500KHz
>[  329.451085] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24
>[  329.451112] [drm:intel_dp_compute_config [i915]] DP link bw required 445500 available 648000
>[  329.451140] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[  329.451168] [drm:intel_dump_pipe_config [i915]] [CRTC:58:pipe B][modeset]
>[  329.451194] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 24, dithering: 0
>[  329.451221] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64
>[  329.451247] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  329.451273] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  329.451287] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  329.451313] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  329.451327] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  329.451354] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[  329.451380] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1080, pixel rate 148500
>[  329.451406] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  329.451432] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  329.451458] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  329.451487] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8200, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x19999a, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[  329.451514] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  329.451540] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 1B] disabled, scaler_id = -1
>[  329.451566] [drm:intel_dump_pipe_config [i915]] [PLANE:46:plane 2B] disabled, scaler_id = -1
>[  329.451592] [drm:intel_dump_pipe_config [i915]] [PLANE:49:plane 3B] disabled, scaler_id = -1
>[  329.451617] [drm:intel_dump_pipe_config [i915]] [PLANE:52:plane 4B] disabled, scaler_id = -1
>[  329.451643] [drm:intel_dump_pipe_config [i915]] [PLANE:55:cursor B] disabled, scaler_id = -1
>[  329.451676] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>[  329.451711] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:42:pipe A] has [PLANE:27:plane 1A] with fb 133
>[  329.451738] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:plane 1A] visible 0 -> 1, off 0, on 1, ms 1
>[  329.451769] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe B] has [PLANE:43:plane 1B] with fb 133
>[  329.451796] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:43:plane 1B] visible 0 -> 1, off 0, on 1, ms 1
>[  329.451828] [drm:bxt_get_dpll [i915]] [CRTC:42:pipe A] using pre-allocated PORT PLL A
>[  329.451861] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe A
>[  329.451892] [drm:bxt_get_dpll [i915]] [CRTC:58:pipe B] using pre-allocated PORT PLL B
>[  329.451919] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe B
>[  329.451957] [drm:skl_compute_wm [i915]] [PLANE:27:plane 1A] ddb (0 - 0) -> (0 - 502)
>[  329.451984] [drm:skl_compute_wm [i915]] [PLANE:39:cursor A] ddb (0 - 0) -> (502 - 510)
>[  329.452010] [drm:skl_compute_wm [i915]] [PLANE:43:plane 1B] ddb (0 - 0) -> (510 - 1012)
>[  329.452036] [drm:skl_compute_wm [i915]] [PLANE:55:cursor B] ddb (0 - 0) -> (1012 - 1020)
>[  329.452050] [drm:drm_atomic_commit [drm]] committing ffff8f7f31674400
>[  329.452513] [drm:intel_power_well_enable [i915]] enabling always-on
>[  329.452550] [drm:intel_power_well_enable [i915]] enabling DC off
>[  329.452586] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00
>[  329.452632] [drm:intel_power_well_enable [i915]] enabling dpio-common-a
>[  329.452787] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  329.452834] [drm:intel_power_well_enable [i915]] enabling dpio-common-b
>[  329.453010] [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz
>[  329.453081] [drm:intel_update_cdclk [i915]] Current CD clock rate: 79200 kHz, VCO: 633600 kHz, ref: 19200 kHz
>[  329.453121] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI A]
>[  329.453157] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B]
>[  329.453193] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A]
>[  329.453229] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B]
>[  329.453265] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C]
>[  329.453301] [drm:intel_atomic_commit_tail [i915]] [ENCODER:90:DDI C]
>[  329.453337] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:88:HDMI-A-1]
>[  329.453377] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:91:HDMI-A-2]
>[  329.453418] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL A
>[  329.453454] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL B
>[  329.453490] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL C
>[  329.453552] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 1, on? 0) for crtc 42
>[  329.453590] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A
>[  329.453730] [drm:intel_power_well_enable [i915]] enabling AUX A
>[  329.453772] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  329.453811] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  329.453860] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000062
>[  329.453897] [drm:wait_panel_status [i915]] Wait complete
>[  329.453937] [drm:edp_panel_on [i915]] Wait for panel power on
>[  329.453977] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000063
>[  329.555982] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010
>[  329.556028] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  329.556070] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  329.556144] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  329.655229] [drm:wait_panel_status [i915]] Wait complete
>[  329.655272] [drm:intel_power_well_disable [i915]] disabling AUX A
>[  329.655315] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well
>[  329.655369] [drm:intel_power_well_enable [i915]] enabling AUX A
>[  329.655416] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  329.655464] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b
>[  329.656555] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  329.656592] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  329.656633] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  329.657277] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  329.657313] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  329.657896] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  329.657934] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[  329.658827] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  329.658868] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:76:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  329.659396] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  329.659446] [drm:intel_edp_backlight_on [i915]] 
>[  329.659486] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  329.659526] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 67764
>[  329.664753] [drm:intel_psr_enable [i915]] PSR not supported on this platform
>[  329.664756] atkbd serio0: Failed to deactivate keyboard on isa0060/serio0
>[  329.664804] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  329.664864] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  329.664912] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  329.665022] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 2, on? 0) for crtc 58
>[  329.665073] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B
>[  329.665225] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  329.665284] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  329.665747] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  329.666393] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  329.666863] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  329.666911] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  329.667380] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  329.667441] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  329.667491] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  329.667542] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  329.667590] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  329.668084] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  329.668231] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  329.668687] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  329.669340] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  329.669801] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  329.669848] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  329.670349] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  329.670409] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[  329.670455] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  329.670502] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  329.670987] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  329.671134] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  329.671586] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  329.672239] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  329.672711] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  329.672762] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  329.673271] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  329.673327] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  329.673379] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[  329.673429] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  329.673929] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  329.674378] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  329.674831] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  329.675530] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  329.675982] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  329.676018] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  329.676507] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  329.676548] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  329.678717] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4
>[  329.678755] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  329.679235] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  329.679625] [drm:intel_enable_pipe [i915]] enabling pipe B
>[  329.696587] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:76:eDP-1]
>[  329.696636] [drm:intel_atomic_commit_tail [i915]] [CRTC:42:pipe A]
>[  329.696778] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL A
>[  329.696887] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:84:DP-1]
>[  329.696949] [drm:intel_atomic_commit_tail [i915]] [CRTC:58:pipe B]
>[  329.697040] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL B
>[  329.697152] [drm:intel_atomic_commit_tail [i915]] [CRTC:74:pipe C]
>[  329.697207] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8f7f31674400
>[  329.697245] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8f7f31674400
>[  329.697307] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38
>[  329.697367] [drm:intel_opregion_register [i915]] 4 outputs detected
>[  329.697432] [drm:intel_dp_detect [i915]] [CONNECTOR:76:eDP-1]
>[  329.697490] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>[  329.697546] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>[  329.697599] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  329.697651] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  329.700391] PM: resume of devices complete after 275.151 msecs
>[  329.700413] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000
>[  329.701011] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:76:eDP-1] status updated from connected to connected
>[  329.701066] [drm:intel_dp_detect [i915]] [CONNECTOR:84:DP-1]
>[  329.701118] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  329.702126] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 80 02 00 00 00 00 00 00
>[  329.703014] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>[  329.703075] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>[  329.703128] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[  329.703180] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[  329.704125] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-e0-4c dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[  329.704179] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[  329.708406] PM: Finishing wakeup.
>[  329.708407] OOM killer enabled.
>[  329.708408] Restarting tasks ... 
>[  329.715741] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  329.715757] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:84:DP-1] status updated from connected to connected
>[  329.715787] [drm:intel_hdmi_detect [i915]] [CONNECTOR:88:HDMI-A-1]
>[  329.717796] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  329.717824] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[  329.718966] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  329.718986] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[  329.720670] done.
>[  329.720736] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[  329.720763] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[  329.722816] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[  329.722826] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[  329.722834] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:88:HDMI-A-1] status updated from disconnected to disconnected
>[  329.722863] [drm:intel_hdmi_detect [i915]] [CONNECTOR:91:HDMI-A-2]
>[  329.795303] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>[  329.795392] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[  329.796826] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>[  329.796856] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[  329.796906] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[  329.796930] [drm:drm_helper_hpd_irq_event [drm_kms_helper]] [CONNECTOR:91:HDMI-A-2] status updated from connected to connected
>[  329.884904] [IGT] kms_flip: exiting, ret=99
>[  329.884969] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8f7f34909c00
>[  329.884991] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe A] ffff8f7f32579800 state to ffff8f7f34909c00
>[  329.885008] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f34909c00
>[  329.885026] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:76:eDP-1] ffff8f7f2df0cf00 state to ffff8f7f34909c00
>[  329.885042] [drm:drm_atomic_check_only [drm]] checking ffff8f7f34909c00
>[  329.885061] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:76:eDP-1]
>[  329.885071] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:76:eDP-1] keeps [ENCODER:75:DDI A], now on [CRTC:42:pipe A]
>[  329.885100] [drm:drm_atomic_commit [drm]] committing ffff8f7f34909c00
>[  329.892791] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8f7f34909c00
>[  329.892815] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8f7f34909c00
>[  329.893279] [drm] RC6 on
>[  329.914611] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8f7f34909c00
>[  329.914656] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:27:plane 1A] ffff8f7f34e4ed00 state to ffff8f7f34909c00
>[  329.914690] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe A] ffff8f7f32578800 state to ffff8f7f34909c00
>[  329.914719] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f34909c00
>[  329.914751] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:76:eDP-1] ffff8f7f2df0c780 state to ffff8f7f34909c00
>[  329.914782] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for CRTC state ffff8f7f32578800
>[  329.914809] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f34e4ed00
>[  329.914836] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f34e4ed00 to [NOCRTC]
>[  329.914868] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:43:plane 1B] ffff8f7f35f7df00 state to ffff8f7f34909c00
>[  329.914897] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:58:pipe B] ffff8f7f3257e000 state to ffff8f7f34909c00
>[  329.914924] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f34909c00
>[  329.914953] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:84:DP-1] ffff8f7f2df0ca80 state to ffff8f7f34909c00
>[  329.914980] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for CRTC state ffff8f7f3257e000
>[  329.915006] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f35f7df00
>[  329.915033] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f35f7df00 to [NOCRTC]
>[  329.915060] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff8f7f2df0c780 to [NOCRTC]
>[  329.915086] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff8f7f2df0ca80 to [NOCRTC]
>[  329.915112] [drm:drm_atomic_check_only [drm]] checking ffff8f7f34909c00
>[  329.915136] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] mode changed
>[  329.915151] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] enable changed
>[  329.915166] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] active changed
>[  329.915181] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] mode changed
>[  329.915195] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] enable changed
>[  329.915210] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] active changed
>[  329.915225] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:76:eDP-1]
>[  329.915239] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:76:eDP-1]
>[  329.915254] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:84:DP-1]
>[  329.915269] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:84:DP-1]
>[  329.915284] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] needs all connectors, enable: n, active: n
>[  329.915312] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f34909c00
>[  329.915328] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] needs all connectors, enable: n, active: n
>[  329.915355] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f34909c00
>[  329.915449] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>[  329.915526] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:42:pipe A] has [PLANE:27:plane 1A] with fb -1
>[  329.915594] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:plane 1A] visible 1 -> 0, off 1, on 0, ms 1
>[  329.915661] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe B] has [PLANE:43:plane 1B] with fb -1
>[  329.915727] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:43:plane 1B] visible 1 -> 0, off 1, on 0, ms 1
>[  329.915765] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:74:pipe C] ffff8f7f3257e800 state to ffff8f7f34909c00
>[  329.915831] [drm:skl_compute_wm [i915]] [PLANE:27:plane 1A] ddb (0 - 502) -> (0 - 0)
>[  329.915892] [drm:skl_compute_wm [i915]] [PLANE:39:cursor A] ddb (502 - 510) -> (0 - 0)
>[  329.915953] [drm:skl_compute_wm [i915]] [PLANE:43:plane 1B] ddb (510 - 1012) -> (0 - 0)
>[  329.916014] [drm:skl_compute_wm [i915]] [PLANE:55:cursor B] ddb (1012 - 1020) -> (0 - 0)
>[  329.916045] [drm:drm_atomic_commit [drm]] committing ffff8f7f34909c00
>[  329.916142] [drm:intel_edp_backlight_off [i915]] 
>[  329.936818] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
>[  329.977924] ata1.00: configured for UDMA/133
>[  330.044854] atkbd serio0: Failed to enable keyboard on isa0060/serio0
>[  330.120937] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  330.121027] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  330.127234] [drm:intel_edp_panel_off.part.29 [i915]] Turn eDP port A panel power off
>[  330.127306] [drm:intel_edp_panel_off.part.29 [i915]] Wait for panel power off time
>[  330.127377] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000060
>[  330.178367] [drm:wait_panel_status [i915]] Wait complete
>[  330.178437] [drm:intel_power_well_disable [i915]] disabling AUX A
>[  330.178502] [drm:intel_power_well_disable [i915]] disabling DDI A IO power well
>[  330.180361] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010
>[  330.180439] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  330.180509] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  330.180623] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  330.180769] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  330.180848] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL A (active 1, on? 1) for crtc 42
>[  330.180958] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL A
>[  330.181073] [drm:intel_disable_pipe [i915]] disabling pipe B
>[  330.197857] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  330.198370] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  330.198448] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[  330.200710] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 2, on? 1) for crtc 58
>[  330.200906] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B
>[  330.201166] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI A]
>[  330.201255] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B]
>[  330.201345] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A]
>[  330.201427] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B]
>[  330.201507] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C]
>[  330.201589] [drm:intel_atomic_commit_tail [i915]] [ENCODER:90:DDI C]
>[  330.201674] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:76:eDP-1]
>[  330.201760] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:84:DP-1]
>[  330.201843] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL A
>[  330.201926] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL B
>[  330.202007] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL C
>[  330.202104] [drm:intel_power_well_disable [i915]] disabling dpio-common-a
>[  330.202197] [drm:intel_atomic_commit_tail [i915]] [CRTC:42:pipe A]
>[  330.202284] [drm:intel_power_well_disable [i915]] disabling dpio-common-b
>[  330.202370] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  330.202468] [drm:intel_atomic_commit_tail [i915]] [CRTC:58:pipe B]
>[  330.202550] [drm:intel_power_well_disable [i915]] disabling DC off
>[  330.202632] [drm:gen9_enable_dc5 [i915]] Enabling DC5
>[  330.202719] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01
>[  330.202801] [drm:intel_power_well_disable [i915]] disabling always-on
>[  330.202866] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8f7f34909c00
>[  330.202915] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8f7f34909c00
>[  330.203054] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff8f7f34909c00
>[  330.203099] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:27:plane 1A] ffff8f7f34e4e800 state to ffff8f7f34909c00
>[  330.203139] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:30:plane 2A] ffff8f7f34e4e700 state to ffff8f7f34909c00
>[  330.203176] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f34e4e700 to [NOCRTC]
>[  330.203211] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f34e4e700
>[  330.203249] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:33:plane 3A] ffff8f7f34e4ec00 state to ffff8f7f34909c00
>[  330.203282] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f34e4ec00 to [NOCRTC]
>[  330.203318] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f34e4ec00
>[  330.203355] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:36:plane 4A] ffff8f7f34e4ea00 state to ffff8f7f34909c00
>[  330.203388] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f34e4ea00 to [NOCRTC]
>[  330.203424] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f34e4ea00
>[  330.203461] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:39:cursor A] ffff8f7f34e4eb00 state to ffff8f7f34909c00
>[  330.203493] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f34e4eb00 to [NOCRTC]
>[  330.203526] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f34e4eb00
>[  330.203565] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:43:plane 1B] ffff8f7f35f7d500 state to ffff8f7f34909c00
>[  330.203600] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:46:plane 2B] ffff8f7f2ddc6600 state to ffff8f7f34909c00
>[  330.203636] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f2ddc6600 to [NOCRTC]
>[  330.203671] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f2ddc6600
>[  330.203708] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:49:plane 3B] ffff8f7f2ddc6300 state to ffff8f7f34909c00
>[  330.203744] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f2ddc6300 to [NOCRTC]
>[  330.203779] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f2ddc6300
>[  330.203817] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:plane 4B] ffff8f7f31485900 state to ffff8f7f34909c00
>[  330.203850] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f31485900 to [NOCRTC]
>[  330.203886] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f31485900
>[  330.203923] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:55:cursor B] ffff8f7f31485100 state to ffff8f7f34909c00
>[  330.203956] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f31485100 to [NOCRTC]
>[  330.203991] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f31485100
>[  330.204024] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:59:plane 1C] ffff8f7f31485f00 state to ffff8f7f34909c00
>[  330.204061] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:62:plane 2C] ffff8f7f31485300 state to ffff8f7f34909c00
>[  330.204096] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f31485300 to [NOCRTC]
>[  330.204128] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f31485300
>[  330.204164] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:65:plane 3C] ffff8f7f31485e00 state to ffff8f7f34909c00
>[  330.204201] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f31485e00 to [NOCRTC]
>[  330.204233] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f31485e00
>[  330.204272] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:68:plane 4C] ffff8f7f331cdb00 state to ffff8f7f34909c00
>[  330.204307] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f331cdb00 to [NOCRTC]
>[  330.204339] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f331cdb00
>[  330.204377] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:71:cursor C] ffff8f7f331cd500 state to ffff8f7f34909c00
>[  330.204411] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f331cd500 to [NOCRTC]
>[  330.204444] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff8f7f331cd500
>[  330.204486] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe A] ffff8f7f32579800 state to ffff8f7f34909c00
>[  330.204531] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for CRTC state ffff8f7f32579800
>[  330.204568] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f34e4e800 to [CRTC:42:pipe A]
>[  330.204604] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:128] for plane state ffff8f7f34e4e800
>[  330.204639] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f34909c00
>[  330.204715] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:76:eDP-1] ffff8f7f2df0cf00 state to ffff8f7f34909c00
>[  330.204757] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff8f7f2df0cf00 to [CRTC:42:pipe A]
>[  330.204793] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:58:pipe B] ffff8f7f3257c800 state to ffff8f7f34909c00
>[  330.204831] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for CRTC state ffff8f7f3257c800
>[  330.204869] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f35f7d500 to [CRTC:58:pipe B]
>[  330.204902] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:128] for plane state ffff8f7f35f7d500
>[  330.204941] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f34909c00
>[  330.204979] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:84:DP-1] ffff8f7f2df0c800 state to ffff8f7f34909c00
>[  330.205012] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff8f7f2df0c800 to [CRTC:58:pipe B]
>[  330.205050] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:74:pipe C] ffff8f7f32579000 state to ffff8f7f34909c00
>[  330.205089] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for CRTC state ffff8f7f32579000
>[  330.205122] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff8f7f31485f00 to [CRTC:74:pipe C]
>[  330.205155] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:128] for plane state ffff8f7f31485f00
>[  330.205191] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:74:pipe C] to ffff8f7f34909c00
>[  330.205227] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:91:HDMI-A-2] ffff8f7f2df0ce00 state to ffff8f7f34909c00
>[  330.205263] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff8f7f2df0ce00 to [CRTC:74:pipe C]
>[  330.205299] [drm:drm_atomic_check_only [drm]] checking ffff8f7f34909c00
>[  330.205328] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] mode changed
>[  330.205349] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] enable changed
>[  330.205370] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] active changed
>[  330.205389] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] mode changed
>[  330.205407] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] enable changed
>[  330.205425] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] active changed
>[  330.205446] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] mode changed
>[  330.205463] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] enable changed
>[  330.205481] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] active changed
>[  330.205508] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:76:eDP-1]
>[  330.205528] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:76:eDP-1] using [ENCODER:75:DDI A] on [CRTC:42:pipe A]
>[  330.205547] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:84:DP-1]
>[  330.205567] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:84:DP-1] using [ENCODER:83:DDI B] on [CRTC:58:pipe B]
>[  330.205587] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:91:HDMI-A-2]
>[  330.205606] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:91:HDMI-A-2] using [ENCODER:90:DDI C] on [CRTC:74:pipe C]
>[  330.205625] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] needs all connectors, enable: y, active: y
>[  330.205660] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f34909c00
>[  330.205684] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] needs all connectors, enable: y, active: y
>[  330.205718] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f34909c00
>[  330.205741] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] needs all connectors, enable: y, active: y
>[  330.205778] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:74:pipe C] to ffff8f7f34909c00
>[  330.205817] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff8f7f34909c00
>[  330.205911] [drm:intel_atomic_check [i915]] [CONNECTOR:76:eDP-1] checking for sink bpp constrains
>[  330.205997] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[  330.206045] [drm:drm_mode_debug_printmodeline [drm]] Modeline 79:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[  330.206141] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 141000KHz
>[  330.206251] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24
>[  330.206334] [drm:intel_dp_compute_config [i915]] DP link bw required 423000 available 540000
>[  330.206425] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[  330.206512] [drm:intel_dump_pipe_config [i915]] [CRTC:42:pipe A][modeset]
>[  330.206599] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0
>[  330.206680] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6571076, gmch_n: 8388608, link_m: 273794, link_n: 524288, tu: 64
>[  330.206761] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  330.206840] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  330.206884] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[  330.206961] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  330.207004] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[  330.207085] [drm:intel_dump_pipe_config [i915]] crtc timings: 141000 1920 1936 1952 2104 1080 1083 1097 1116, type: 0x48 flags: 0xa
>[  330.207163] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 141000
>[  330.207243] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  330.207320] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  330.207398] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  330.207490] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[  330.207569] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  330.207647] [drm:intel_dump_pipe_config [i915]] [PLANE:27:plane 1A] disabled, scaler_id = -1
>[  330.207726] [drm:intel_dump_pipe_config [i915]] [PLANE:30:plane 2A] disabled, scaler_id = -1
>[  330.207802] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 3A] disabled, scaler_id = -1
>[  330.207880] [drm:intel_dump_pipe_config [i915]] [PLANE:36:plane 4A] disabled, scaler_id = -1
>[  330.207956] [drm:intel_dump_pipe_config [i915]] [PLANE:39:cursor A] disabled, scaler_id = -1
>[  330.207998] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff8f7f34909c00
>[  330.208084] [drm:intel_atomic_check [i915]] [CONNECTOR:84:DP-1] checking for sink bpp constrains
>[  330.208165] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[  330.208257] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 148500KHz
>[  330.208348] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24
>[  330.208428] [drm:intel_dp_compute_config [i915]] DP link bw required 445500 available 648000
>[  330.208513] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[  330.208598] [drm:intel_dump_pipe_config [i915]] [CRTC:58:pipe B][modeset]
>[  330.208678] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 24, dithering: 0
>[  330.208773] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64
>[  330.208861] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  330.208890] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  330.208905] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  330.208933] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  330.208951] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  330.208981] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[  330.209011] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1080, pixel rate 148500
>[  330.209042] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  330.209070] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  330.209098] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  330.209129] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8200, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x19999a, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[  330.209158] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  330.209190] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 1B] disabled, scaler_id = -1
>[  330.209218] [drm:intel_dump_pipe_config [i915]] [PLANE:46:plane 2B] disabled, scaler_id = -1
>[  330.209246] [drm:intel_dump_pipe_config [i915]] [PLANE:49:plane 3B] disabled, scaler_id = -1
>[  330.209274] [drm:intel_dump_pipe_config [i915]] [PLANE:52:plane 4B] disabled, scaler_id = -1
>[  330.209301] [drm:intel_dump_pipe_config [i915]] [PLANE:55:cursor B] disabled, scaler_id = -1
>[  330.209317] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:74:pipe C] to ffff8f7f34909c00
>[  330.209347] [drm:intel_atomic_check [i915]] [CONNECTOR:91:HDMI-A-2] checking for sink bpp constrains
>[  330.209396] [drm:intel_hdmi_compute_config [i915]] picking bpc to 12 for HDMI output
>[  330.209429] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 36 for HDMI
>[  330.209460] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 36, dithering: 0
>[  330.209489] [drm:intel_dump_pipe_config [i915]] [CRTC:74:pipe C][modeset]
>[  330.209518] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 36, dithering: 0
>[  330.209545] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 1
>[  330.209574] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  330.209592] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5
>[  330.209620] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  330.209637] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5
>[  330.209667] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1082 1087 1125, type: 0x48 flags: 0x5
>[  330.209696] [drm:intel_dump_pipe_config [i915]] port clock: 222750, pipe src size: 1920x1080, pixel rate 148500
>[  330.209725] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1
>[  330.209755] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  330.209783] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  330.209815] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x6200, ebb4: 0x2000,pll0: 0x21, pll1: 0x100, pll2: 0x1a6666, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[  330.209843] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  330.209871] [drm:intel_dump_pipe_config [i915]] [PLANE:59:plane 1C] disabled, scaler_id = -1
>[  330.209899] [drm:intel_dump_pipe_config [i915]] [PLANE:62:plane 2C] disabled, scaler_id = -1
>[  330.209926] [drm:intel_dump_pipe_config [i915]] [PLANE:65:plane 3C] disabled, scaler_id = -1
>[  330.209955] [drm:intel_dump_pipe_config [i915]] [PLANE:68:plane 4C] disabled, scaler_id = -1
>[  330.209982] [drm:intel_dump_pipe_config [i915]] [PLANE:71:cursor C] disabled, scaler_id = -1
>[  330.210015] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
>[  330.210052] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:42:pipe A] has [PLANE:27:plane 1A] with fb 128
>[  330.210082] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:plane 1A] visible 0 -> 1, off 0, on 1, ms 1
>[  330.210112] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe B] has [PLANE:43:plane 1B] with fb 128
>[  330.210141] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:43:plane 1B] visible 0 -> 1, off 0, on 1, ms 1
>[  330.210171] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:74:pipe C] has [PLANE:59:plane 1C] with fb 128
>[  330.210203] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:59:plane 1C] visible 0 -> 1, off 0, on 1, ms 1
>[  330.210235] [drm:bxt_get_dpll [i915]] [CRTC:42:pipe A] using pre-allocated PORT PLL A
>[  330.210270] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe A
>[  330.210306] [drm:bxt_get_dpll [i915]] [CRTC:58:pipe B] using pre-allocated PORT PLL B
>[  330.210335] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe B
>[  330.210369] [drm:bxt_get_dpll [i915]] [CRTC:74:pipe C] using pre-allocated PORT PLL C
>[  330.210397] [drm:intel_reference_shared_dpll [i915]] using PORT PLL C for pipe C
>[  330.210435] [drm:skl_compute_wm [i915]] [PLANE:27:plane 1A] ddb (0 - 0) -> (0 - 332)
>[  330.210464] [drm:skl_compute_wm [i915]] [PLANE:39:cursor A] ddb (0 - 0) -> (332 - 340)
>[  330.210492] [drm:skl_compute_wm [i915]] [PLANE:43:plane 1B] ddb (0 - 0) -> (340 - 672)
>[  330.210520] [drm:skl_compute_wm [i915]] [PLANE:55:cursor B] ddb (0 - 0) -> (672 - 680)
>[  330.210548] [drm:skl_compute_wm [i915]] [PLANE:59:plane 1C] ddb (0 - 0) -> (680 - 1012)
>[  330.210576] [drm:skl_compute_wm [i915]] [PLANE:71:cursor C] ddb (0 - 0) -> (1012 - 1020)
>[  330.210592] [drm:drm_atomic_commit [drm]] committing ffff8f7f34909c00
>[  330.210639] [drm:intel_power_well_enable [i915]] enabling always-on
>[  330.210669] [drm:intel_power_well_enable [i915]] enabling DC off
>[  330.210698] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00
>[  330.210733] [drm:intel_power_well_enable [i915]] enabling dpio-common-a
>[  330.211643] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  330.213907] [drm:intel_power_well_enable [i915]] enabling dpio-common-b
>[  330.214077] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[  330.214245] [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz
>[  330.214303] [drm:intel_update_cdclk [i915]] Current CD clock rate: 316800 kHz, VCO: 633600 kHz, ref: 19200 kHz
>[  330.214333] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI A]
>[  330.214362] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B]
>[  330.214389] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A]
>[  330.214415] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B]
>[  330.214439] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C]
>[  330.214462] [drm:intel_atomic_commit_tail [i915]] [ENCODER:90:DDI C]
>[  330.214490] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL A
>[  330.214516] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL B
>[  330.214540] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL C
>[  330.214591] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 1, on? 0) for crtc 42
>[  330.214618] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A
>[  330.214746] [drm:intel_power_well_enable [i915]] enabling AUX A
>[  330.214778] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  330.214805] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  330.744943] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 08000001 control 00000060
>[  330.776995] [drm:wait_panel_status [i915]] Wait complete
>[  330.777078] [drm:edp_panel_on [i915]] Wait for panel power on
>[  330.777161] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000063
>[  330.879008] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010
>[  330.879101] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  330.879189] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  330.879297] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  330.977710] [drm:wait_panel_status [i915]] Wait complete
>[  330.977798] [drm:intel_power_well_disable [i915]] disabling AUX A
>[  330.977882] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well
>[  330.978022] [drm:intel_power_well_enable [i915]] enabling AUX A
>[  330.978115] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  330.978203] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b
>[  330.979394] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  330.979472] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  330.979554] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  330.980207] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  330.980289] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[  330.981247] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  330.981331] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:76:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2
>[  330.981791] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  330.981885] [drm:intel_edp_backlight_on [i915]] 
>[  330.981967] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  330.982048] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 67764
>[  330.988742] [drm:intel_psr_enable [i915]] PSR not supported on this platform
>[  330.988793] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[  330.988854] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[  330.988903] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  330.989006] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 2, on? 0) for crtc 58
>[  330.989057] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B
>[  330.989205] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  330.989267] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  330.989731] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  330.990380] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  330.990850] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  330.990897] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  330.991366] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  330.991427] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  330.991475] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  330.991523] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  330.991571] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  330.992065] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  330.992212] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  330.992666] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  330.993375] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  330.993849] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  330.993898] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  330.994405] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  330.994460] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  330.994513] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[  330.994562] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  330.995056] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  330.995503] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  330.995958] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  330.996849] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  330.997343] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  330.997399] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  330.997917] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  330.997980] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  331.000218] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4
>[  331.000263] [drm:intel_power_well_enable [i915]] enabling AUX B
>[  331.000859] [drm:intel_power_well_disable [i915]] disabling AUX B
>[  331.001060] [drm:intel_enable_pipe [i915]] enabling pipe B
>[  331.001155] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL C (active 4, on? 0) for crtc 74
>[  331.001191] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL C
>[  331.001322] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>[  331.001548] [drm:intel_enable_pipe [i915]] enabling pipe C
>[  331.002001] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:91:HDMI-A-2], [ENCODER:90:DDI C]
>[  331.002037] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe C, 36 bytes ELD
>[  331.002075] [drm:audio_config_hdmi_pixel_clock.isra.4 [i915]] Configuring HDMI audio for pixel clock 148500 (0x00090000)
>[  331.002110] [drm:hsw_audio_config_update [i915]] using automatic N
>[  331.019035] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:76:eDP-1]
>[  331.019102] [drm:intel_atomic_commit_tail [i915]] [CRTC:42:pipe A]
>[  331.019222] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL A
>[  331.019326] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:84:DP-1]
>[  331.019384] [drm:intel_atomic_commit_tail [i915]] [CRTC:58:pipe B]
>[  331.019469] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL B
>[  331.019561] [drm:verify_connector_state.isra.109 [i915]] [CONNECTOR:91:HDMI-A-2]
>[  331.019619] [drm:intel_atomic_commit_tail [i915]] [CRTC:74:pipe C]
>[  331.019703] [drm:verify_single_dpll_state.isra.110 [i915]] PORT PLL C
>[  331.019767] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff8f7f34909c00
>[  331.019804] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff8f7f34909c00
>[  332.707746] r8169 0000:01:00.0 enp1s0: link up
>[  334.072946] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[  334.073038] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000067
>[  334.073119] [drm:intel_power_well_disable [i915]] disabling AUX A

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