Attachment 138437 Details for Bug 102553 – implement missing functions

[patch] implement missing functions

si_dpm_pcie_lanes.patch (text/plain), 2.11 KB, created by Stefano Cipriani on 2018-03-29 23:21:49 UTC

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Creator: Stefano Cipriani

Created: 2018-03-29 23:21:49 UTC

Size: 2.11 KB

patch

obsolete

>--- a/drivers/gpu/drm/amd/amdgpu/si.c	2018-03-28 21:10:01.000000000 +0200
>+++ b/drivers/gpu/drm/amd/amdgpu/si.c	2018-03-30 00:50:47.451543381 +0200
>@@ -1252,6 +1252,83 @@
> 	}
> }
> 
>+static bool si_gui_idle(struct amdgpu_device *adev)
>+{
>+	if (RREG32(GRBM_STATUS) & GUI_ACTIVE)
>+		return false;
>+	else
>+		return true;
>+}
>+
>+int si_get_pcie_lanes(struct amdgpu_device *adev)
>+{
>+	u32 link_width_cntl;
>+
>+	if (adev->flags & AMD_IS_APU)
>+		return 0;
>+
>+	si_gui_idle(adev);
>+
>+	link_width_cntl = RREG32_PCIE_PORT(PCIE_LC_LINK_WIDTH_CNTL);
>+
>+	switch ((link_width_cntl & LC_LINK_WIDTH_RD_MASK) >> LC_LINK_WIDTH_RD_SHIFT) {
>+	case LC_LINK_WIDTH_X1:
>+		return 1;
>+	case LC_LINK_WIDTH_X2:
>+		return 2;
>+	case LC_LINK_WIDTH_X4:
>+		return 4;
>+	case LC_LINK_WIDTH_X8:
>+		return 8;
>+	case LC_LINK_WIDTH_X0:
>+	case LC_LINK_WIDTH_X16:
>+	default:
>+		return 16;
>+	}
>+}
>+
>+void si_set_pcie_lanes(struct amdgpu_device *adev, int lanes)
>+{
>+	u32 link_width_cntl, mask;
>+
>+	if (adev->flags & AMD_IS_APU)
>+		return;
>+
>+	si_gui_idle(adev);
>+
>+	switch (lanes) {
>+	case 0:
>+		mask = LC_LINK_WIDTH_X0;
>+		break;
>+	case 1:
>+		mask = LC_LINK_WIDTH_X1;
>+		break;
>+	case 2:
>+		mask = LC_LINK_WIDTH_X2;
>+		break;
>+	case 4:
>+		mask = LC_LINK_WIDTH_X4;
>+		break;
>+	case 8:
>+		mask = LC_LINK_WIDTH_X8;
>+		break;
>+	case 16:
>+		mask = LC_LINK_WIDTH_X16;
>+		break;
>+	default:
>+		DRM_ERROR("invalid pcie lane request: %d\n", lanes);
>+		return;
>+	}
>+
>+	link_width_cntl = RREG32_PCIE_PORT(PCIE_LC_LINK_WIDTH_CNTL);
>+	link_width_cntl &= ~LC_LINK_WIDTH_RD_MASK;
>+	link_width_cntl |= mask << LC_LINK_WIDTH_RD_SHIFT;
>+	link_width_cntl |= (LC_RECONFIG_NOW |
>+			    LC_RECONFIG_ARC_MISSING_ESCAPE);
>+
>+	WREG32_PCIE_PORT(PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
>+}
>+
> static const struct amdgpu_asic_funcs si_asic_funcs =
> {
> 	.read_disabled_bios = &si_read_disabled_bios,
>@@ -1265,6 +1342,8 @@
> 	.get_config_memsize = &si_get_config_memsize,
> 	.flush_hdp = &si_flush_hdp,
> 	.invalidate_hdp = &si_invalidate_hdp,
>+	.get_pcie_lanes = &si_get_pcie_lanes,
>+	.set_pcie_lanes = &si_set_pcie_lanes,
> };
> 
> static uint32_t si_get_rev_id(struct amdgpu_device *adev)
>@@ -2022,4 +2101,3 @@
> 	}
> 	return 0;
> }
>-

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Attachments on bug 102553: 133980 | 137877 | 138045 | 138437 | 138450 | 138479 | 138480

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