Attachment 139073 Details for Bug 106223 – Screen detected as HD

Screen detected as HD

HD (text/plain), 66.19 KB, created by Ricardo Ribalda on 2018-04-24 21:00:48 UTC

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Description:

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Creator: Ricardo Ribalda

Created: 2018-04-24 21:00:48 UTC

Size: 66.19 KB

patch

obsolete

>[   73.264251] [drm:drm_mode_addfb2 [drm]] [FB:79]
>[   73.285260] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   73.854252] [drm:drm_mode_addfb2 [drm]] [FB:79]
>[   74.456306] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   75.058021] [drm:drm_mode_addfb2 [drm]] [FB:79]
>[   75.659822] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   76.262028] [drm:drm_mode_addfb2 [drm]] [FB:79]
>[   76.851942] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00200000, dig 0x10101011, pins 0x00000020
>[   76.852000] [drm:intel_hpd_irq_handler [i915]] digital hpd port B - short
>[   76.852103] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port B - short
>[   76.852155] [drm:intel_power_well_enable [i915]] enabling DC off
>[   76.852210] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[   76.852266] [drm:intel_power_well_enable [i915]] enabling power well 2
>[   76.853139] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c2 01 01 15 01 81 02 01 04 01 0f 00 01
>[   76.854648] [drm:intel_power_well_disable [i915]] disabling power well 2
>[   76.854689] [drm:intel_power_well_disable [i915]] disabling DC off
>[   76.854722] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[   76.854752] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[   76.854813] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[   76.854858] [drm:i915_hotplug_work_func [i915]] Connector DP-1 (pin 5) received hotplug event.
>[   76.854901] [drm:intel_dp_detect [i915]] [CONNECTOR:69:DP-1]
>[   76.854931] [drm:intel_power_well_enable [i915]] enabling DC off
>[   76.854962] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[   76.854997] [drm:intel_power_well_enable [i915]] enabling power well 2
>[   76.855857] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c2 01 01 15 01 81 02 01 04 01 0f 00 01
>[   76.857340] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[   76.857354] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[   76.857368] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[   76.858120] [drm:drm_dp_read_desc [drm_kms_helper]] DP branch: OUI 00-1c-f8 dev-ID 176GB0 HW-rev 1.0 SW-rev 7.38 quirks 0x0000
>[   76.858792] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[   76.861010] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   76.861616] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.863322] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.864357] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.865797] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.866944] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.868319] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.870029] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.871162] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.872481] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.873615] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.874999] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.876084] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.877506] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.878640] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.880825] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.881962] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.883340] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.884479] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.885867] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.886998] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.888278] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.889411] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.890793] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.891946] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.893327] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.894463] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.895844] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.896974] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.898400] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.899530] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   76.900638] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[   76.901322] [drm:intel_power_well_disable [i915]] disabling power well 2
>[   76.901347] [drm:intel_power_well_disable [i915]] disabling DC off
>[   76.901365] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[   76.901382] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[   76.901411] [drm:i915_hotplug_work_func [i915]] [CONNECTOR:69:DP-1] status updated from disconnected to connected
>[   76.901435] [drm:i915_hotplug_work_func [i915]] Connector HDMI-A-1 (pin 5) received hotplug event.
>[   76.901458] [drm:intel_hdmi_detect [i915]] [CONNECTOR:73:HDMI-A-1]
>[   76.959814] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 5
>[   76.991655] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   76.991711] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[   76.991758] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[   77.023594] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   77.023605] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[   77.083717] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 5
>[   77.115603] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[   77.118537] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:59:eDP-1]
>[   77.118576] [drm:intel_dp_detect [i915]] [CONNECTOR:59:eDP-1]
>[   77.118603] [drm:intel_power_well_enable [i915]] enabling DC off
>[   77.118629] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[   77.118669] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[   77.118699] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[   77.118726] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[   77.118767] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[   77.118850] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000f
>[   77.119291] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[   77.120012] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   77.120028] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   77.120066] [drm:intel_connector_update_modes [i915]] ELD: no CEA Extension found
>[   77.120089] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:59:eDP-1] probed modes :
>[   77.120103] [drm:drm_mode_debug_printmodeline [drm]] Modeline 60:"1920x1080" 60 147800 1920 1968 2000 2200 1080 1083 1089 1120 0x48 0x9
>[   77.120116] [drm:drm_mode_debug_printmodeline [drm]] Modeline 61:"1920x1080" 48 118300 1920 1968 2000 2200 1080 1083 1089 1120 0x40 0x9
>[   77.120135] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:69:DP-1]
>[   77.120159] [drm:intel_dp_detect [i915]] [CONNECTOR:69:DP-1]
>[   77.120178] [drm:intel_power_well_enable [i915]] enabling power well 2
>[   77.120993] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c2 01 01 15 01 81 02 01 04 01 0f 00 01
>[   77.122456] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[   77.122476] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[   77.122495] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[   77.123251] [drm:drm_dp_read_desc [drm_kms_helper]] DP branch: OUI 00-1c-f8 dev-ID 176GB0 HW-rev 1.0 SW-rev 7.38 quirks 0x0000
>[   77.123936] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[   77.126740] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   77.128442] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   77.130147] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   77.131855] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   77.133561] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   77.135266] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   77.136973] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   77.138680] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   77.141180] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   77.142876] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   77.144586] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   77.146291] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   77.147999] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   77.149704] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   77.151410] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   77.153116] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   77.154541] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[   77.155206] [drm:intel_power_well_disable [i915]] disabling power well 2
>[   77.155219] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   77.155225] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   77.155232] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   77.155236] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   77.155321] [drm:drm_edid_to_eld [drm]] ELD monitor Q2775
>[   77.155326] [drm:drm_edid_to_eld [drm]] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>[   77.155339] [drm:intel_connector_update_modes [i915]] ELD size 28, SAD count 1
>[   77.155419] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:69:DP-1] probed modes :
>[   77.155426] [drm:drm_mode_debug_printmodeline [drm]] Modeline 83:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x48 0x5
>[   77.155432] [drm:drm_mode_debug_printmodeline [drm]] Modeline 84:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   77.155437] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   77.155442] [drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   77.155447] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   77.155452] [drm:drm_mode_debug_printmodeline [drm]] Modeline 108:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   77.155462] [drm:drm_mode_debug_printmodeline [drm]] Modeline 113:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   77.155467] [drm:drm_mode_debug_printmodeline [drm]] Modeline 88:"1280x1440" 60 156000 1280 1376 1512 1744 1440 1443 1453 1493 0x40 0x6
>[   77.155471] [drm:drm_mode_debug_printmodeline [drm]] Modeline 89:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   77.155476] [drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   77.155481] [drm:drm_mode_debug_printmodeline [drm]] Modeline 91:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   77.155485] [drm:drm_mode_debug_printmodeline [drm]] Modeline 90:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[   77.155490] [drm:drm_mode_debug_printmodeline [drm]] Modeline 92:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[   77.155494] [drm:drm_mode_debug_printmodeline [drm]] Modeline 85:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   77.155501] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   77.155508] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   77.155516] [drm:drm_mode_debug_printmodeline [drm]] Modeline 101:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   77.155523] [drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   77.155529] [drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   77.155537] [drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   77.155544] [drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   77.155551] [drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[   77.155558] [drm:drm_mode_debug_printmodeline [drm]] Modeline 93:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   77.155565] [drm:drm_mode_debug_printmodeline [drm]] Modeline 94:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[   77.155573] [drm:drm_mode_debug_printmodeline [drm]] Modeline 87:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   77.155580] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   77.155588] [drm:drm_mode_debug_printmodeline [drm]] Modeline 86:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   77.155595] [drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   77.155602] [drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   77.155608] [drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   77.155613] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   77.155618] [drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   77.155623] [drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   77.155644] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:73:HDMI-A-1]
>[   77.155658] [drm:intel_hdmi_detect [i915]] [CONNECTOR:73:HDMI-A-1]
>[   77.216823] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 5
>[   77.247628] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   77.247683] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[   77.247732] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[   77.279597] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   77.279608] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[   77.341175] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 5
>[   77.371606] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[   77.371616] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:73:HDMI-A-1] disconnected
>[   77.371639] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:76:HDMI-A-2]
>[   77.371677] [drm:intel_hdmi_detect [i915]] [CONNECTOR:76:HDMI-A-2]
>[   77.373965] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   77.374002] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   77.375699] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   77.375722] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpc
>[   77.375759] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[   77.375792] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpc. force bit now 1
>[   77.379059] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpc
>[   77.379091] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpc. force bit now 0
>[   77.381382] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>[   77.381418] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   77.383747] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>[   77.383761] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[   77.383771] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:76:HDMI-A-2] disconnected
>[   77.396765] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[   77.396824] [drm:intel_edp_backlight_off [i915]] 
>[   77.603634] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[   77.603752] [drm:intel_disable_pipe [i915]] disabling pipe A
>[   77.606341] [drm:intel_edp_panel_off.part.30 [i915]] Turn eDP port A panel power off
>[   77.606429] [drm:intel_edp_panel_off.part.30 [i915]] Wait for panel power off time
>[   77.606547] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000000
>[   77.658183] [drm:wait_panel_status [i915]] Wait complete
>[   77.658230] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[   77.658290] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[   77.658347] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 37
>[   77.658393] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[   77.658465] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DDI A]
>[   77.658511] [drm:intel_atomic_commit_tail [i915]] [ENCODER:68:DDI B]
>[   77.658554] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST A]
>[   77.658593] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST B]
>[   77.658630] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST C]
>[   77.658667] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI C]
>[   77.658748] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[   77.658792] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[   77.658833] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[   77.658893] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:59:eDP-1]
>[   77.658940] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   77.659007] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[   77.659050] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   77.659091] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 2
>[   77.659130] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 3
>[   77.659187] [drm:intel_atomic_commit_tail [i915]] [CRTC:37:pipe A]
>[   77.659232] [drm:intel_power_well_disable [i915]] disabling DC off
>[   77.659271] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[   77.659306] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[   77.659753] [drm:intel_power_well_disable [i915]] disabling always-on
>[   77.723750] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   77.723764] [drm:drm_mode_setcrtc [drm]] [CRTC:37:pipe A]
>[   77.723776] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:69:DP-1]
>[   77.723814] [drm:intel_atomic_check [i915]] [CONNECTOR:69:DP-1] checking for sink bpp constrains
>[   77.723831] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 540000 pixel clock 241500KHz
>[   77.723852] [drm:intel_dp_compute_config [i915]] DP link bw 14 rate select 00 lane count 2 clock 540000 bpp 30
>[   77.723866] [drm:intel_dp_compute_config [i915]] DP link bw required 905625 available 1080000
>[   77.723882] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 30, dithering: 0
>[   77.723897] [drm:intel_dump_pipe_config [i915]] [CRTC:37:pipe A][modeset]
>[   77.723911] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80)
>[   77.723924] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 30, dithering: 0
>[   77.723936] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 7034197, gmch_n: 8388608, link_m: 468946, link_n: 1048576, tu: 64
>[   77.723948] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 0
>[   77.723959] [drm:intel_dump_pipe_config [i915]] requested mode:
>[   77.723969] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x48 0x5
>[   77.723980] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[   77.723988] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x48 0x5
>[   77.724001] [drm:intel_dump_pipe_config [i915]] crtc timings: 241500 2560 2608 2640 2720 1440 1443 1448 1481, type: 0x48 flags: 0x5
>[   77.724012] [drm:intel_dump_pipe_config [i915]] port clock: 540000, pipe src size: 2560x1440, pixel rate 241500
>[   77.724023] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[   77.724033] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   77.724044] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[   77.724055] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[   77.724065] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[   77.724075] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1
>[   77.724086] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1
>[   77.724096] [drm:intel_dump_pipe_config [i915]] [PLANE:34:cursor A] disabled, scaler_id = -1
>[   77.724111] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[   77.724129] [drm:intel_find_shared_dpll [i915]] [CRTC:37:pipe A] allocated DPLL 1
>[   77.724142] [drm:intel_reference_shared_dpll [i915]] using DPLL 1 for pipe A
>[   77.732185] [drm:intel_power_well_enable [i915]] enabling always-on
>[   77.732196] [drm:intel_power_well_enable [i915]] enabling DC off
>[   77.732441] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[   77.732454] [drm:intel_power_well_enable [i915]] enabling power well 2
>[   77.732477] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DDI A]
>[   77.732491] [drm:intel_atomic_commit_tail [i915]] [ENCODER:68:DDI B]
>[   77.732503] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST A]
>[   77.732515] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST B]
>[   77.732526] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST C]
>[   77.732537] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI C]
>[   77.732550] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   77.732563] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   77.732575] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 2
>[   77.732587] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 3
>[   77.732603] [drm:intel_enable_shared_dpll [i915]] enable DPLL 1 (active 1, on? 0) for crtc 37
>[   77.732616] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 1
>[   77.734743] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[   77.736386] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[   77.736400] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[   77.736412] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   77.736424] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[   77.741443] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[   77.741455] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[   77.746476] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 01000000
>[   77.746487] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[   77.746498] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 1
>[   77.751510] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 02000000
>[   77.751520] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[   77.751530] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 2
>[   77.756540] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 03000000
>[   77.756549] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[   77.756559] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 3
>[   77.761567] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 03000000
>[   77.761576] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[   77.761584] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 3
>[   77.766593] [drm:intel_dp_dump_link_status [i915]] ln0_1:0x0 ln2_3:0x0 align:0x80 sink:0x0 adj_req0_1:0xcc adj_req2_3:0x0
>[   77.766602] [drm:intel_dp_start_link_train [i915]] Clock recovery check failed, cannot continue channel equalization
>[   77.767836] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:69:DP-1] Link Training failed at link rate = 540000, lane count = 2
>[   77.767855] [drm:intel_dp_modeset_retry_work_fn [i915]] [CONNECTOR:69:DP-1]
>[   77.768280] [drm:intel_enable_pipe [i915]] enabling pipe A
>[   77.768302] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS
>[   77.768315] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:69:DP-1], [ENCODER:68:DDI B]
>[   77.768326] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe A, 28 bytes ELD
>[   77.768340] [drm:hsw_audio_config_update [i915]] using Maud 784, Naud 18750
>[   77.768358] [drm] Reducing the compressed framebuffer size. This may lead to less power savings than a non-reduced-size. Try to increase stolen memory size if available in BIOS.
>[   77.768371] [drm:intel_fbc_enable [i915]] reserved 3686400 bytes of contiguous stolen space for FBC, threshold: 4
>[   77.768381] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[   77.785240] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:69:DP-1]
>[   77.785258] [drm:intel_atomic_commit_tail [i915]] [CRTC:37:pipe A]
>[   77.785284] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   77.787493] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   77.787506] [drm:drm_mode_setcrtc [drm]] [CRTC:47:pipe B]
>[   77.787516] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:59:eDP-1]
>[   77.787568] [drm:intel_atomic_check [i915]] [CONNECTOR:59:eDP-1] checking for sink bpp constrains
>[   77.787583] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[   77.787594] [drm:drm_mode_debug_printmodeline [drm]] Modeline 64:"1920x1080" 48 118300 1920 1968 2000 2200 1080 1083 1089 1120 0x40 0x9
>[   77.787611] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 118300KHz
>[   77.787631] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24
>[   77.787643] [drm:intel_dp_compute_config [i915]] DP link bw required 354900 available 540000
>[   77.787657] [drm:intel_dp_compute_config [i915]] PSR disable by flag
>[   77.787673] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[   77.787690] [drm:intel_dump_pipe_config [i915]] [CRTC:47:pipe B][modeset]
>[   77.787706] [drm:intel_dump_pipe_config [i915]] output_types: EDP (0x100)
>[   77.787724] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0
>[   77.787740] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 5513179, gmch_n: 8388608, link_m: 229715, link_n: 524288, tu: 64
>[   77.787754] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[   77.787767] [drm:intel_dump_pipe_config [i915]] requested mode:
>[   77.787779] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 147800 1920 1968 2000 2200 1080 1083 1089 1120 0x48 0x9
>[   77.787793] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[   77.787810] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 48 118300 1920 1968 2000 2200 1080 1083 1089 1120 0x40 0x9
>[   77.787826] [drm:intel_dump_pipe_config [i915]] crtc timings: 118300 1920 1968 2000 2200 1080 1083 1089 1120, type: 0x40 flags: 0x9
>[   77.787838] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 118300
>[   77.787849] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[   77.787858] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   77.787867] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[   77.787877] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[   77.787886] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[   77.787897] [drm:intel_dump_pipe_config [i915]] [PLANE:38:plane 1B] disabled, scaler_id = -1
>[   77.787906] [drm:intel_dump_pipe_config [i915]] [PLANE:41:plane 2B] disabled, scaler_id = -1
>[   77.787915] [drm:intel_dump_pipe_config [i915]] [PLANE:44:cursor B] disabled, scaler_id = -1
>[   77.787930] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[   77.787945] [drm:intel_find_shared_dpll [i915]] [CRTC:47:pipe B] allocated DPLL 0
>[   77.787957] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe B
>[   77.802072] [drm:intel_disable_sagv [i915]] Disabling the SAGV
>[   77.802137] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DDI A]
>[   77.802153] [drm:intel_atomic_commit_tail [i915]] [ENCODER:68:DDI B]
>[   77.802168] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST A]
>[   77.802181] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST B]
>[   77.802194] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST C]
>[   77.802206] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI C]
>[   77.802220] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   77.802235] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   77.802248] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 2
>[   77.802260] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 3
>[   77.818498] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 2, on? 0) for crtc 47
>[   77.818522] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[   77.818587] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[   77.818620] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[   78.271843] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[   78.271916] [drm:wait_panel_status [i915]] Wait complete
>[   78.271995] [drm:edp_panel_on [i915]] Wait for panel power on
>[   78.272110] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[   78.343166] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[   78.343231] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[   78.343289] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[   78.343399] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[   78.473673] [drm:wait_panel_status [i915]] Wait complete
>[   78.473729] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[   78.473816] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[   78.473926] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[   78.475170] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[   78.475225] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[   78.475272] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   78.475318] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[   78.476114] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[   78.476170] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   78.476218] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   78.476939] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[   78.476982] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   78.477026] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   78.477740] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[   78.477783] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[   78.478803] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 05000000
>[   78.478843] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   78.478882] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 1
>[   78.479838] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 05000000
>[   78.479852] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   78.479864] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 1
>[   78.480794] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[   78.480808] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:59:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2
>[   78.481053] [drm:intel_enable_pipe [i915]] enabling pipe B
>[   78.481084] [drm:intel_edp_backlight_on [i915]] 
>[   78.481099] [drm:intel_panel_enable_backlight [i915]] pipe B
>[   78.481178] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 6818
>[   78.481240] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS
>[   78.502046] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:59:eDP-1]
>[   78.502094] [drm:intel_atomic_commit_tail [i915]] [CRTC:47:pipe B]
>[   78.502150] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   78.502300] [drm:drm_mode_setcrtc [drm]] [CRTC:57:pipe C]
>[   78.503165] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:59:eDP-1]
>[   78.503217] [drm:intel_dp_detect [i915]] [CONNECTOR:59:eDP-1]
>[   78.503263] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[   78.503305] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[   78.503346] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[   78.504149] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[   78.504875] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   78.504898] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   78.504957] [drm:intel_connector_update_modes [i915]] ELD: no CEA Extension found
>[   78.504990] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:59:eDP-1] probed modes :
>[   78.505011] [drm:drm_mode_debug_printmodeline [drm]] Modeline 60:"1920x1080" 60 147800 1920 1968 2000 2200 1080 1083 1089 1120 0x48 0x9
>[   78.505029] [drm:drm_mode_debug_printmodeline [drm]] Modeline 61:"1920x1080" 48 118300 1920 1968 2000 2200 1080 1083 1089 1120 0x40 0x9
>[   78.505056] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:69:DP-1]
>[   78.505096] [drm:intel_dp_detect [i915]] [CONNECTOR:69:DP-1]
>[   78.505947] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c2 01 01 15 01 81 02 01 04 01 0f 00 01
>[   78.507496] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[   78.507551] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[   78.507598] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[   78.508390] [drm:drm_dp_read_desc [drm_kms_helper]] DP branch: OUI 00-1c-f8 dev-ID 176GB0 HW-rev 1.0 SW-rev 7.38 quirks 0x0000
>[   78.509064] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[   78.511883] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   78.512940] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   78.514252] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   78.515957] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   78.517663] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   78.519366] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   78.521074] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   78.522781] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   78.524486] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   78.526987] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   78.528079] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   78.529533] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   78.531239] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   78.532946] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   78.534651] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   78.536358] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   78.538063] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   78.539770] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   78.541202] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[   78.541867] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   78.541874] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   78.541884] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   78.541889] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   78.541994] [drm:drm_edid_to_eld [drm]] ELD monitor Q2775
>[   78.542000] [drm:drm_edid_to_eld [drm]] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>[   78.542026] [drm:intel_connector_update_modes [i915]] ELD size 28, SAD count 1
>[   78.542126] [drm:drm_mode_debug_printmodeline [drm]] Modeline 83:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x48 0x5
>[   78.542133] [drm:drm_mode_prune_invalid [drm]] Not using 2560x1440 mode: CLOCK_HIGH
>[   78.542141] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:69:DP-1] probed modes :
>[   78.542148] [drm:drm_mode_debug_printmodeline [drm]] Modeline 84:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   78.542154] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   78.542160] [drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   78.542166] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   78.542171] [drm:drm_mode_debug_printmodeline [drm]] Modeline 108:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   78.542177] [drm:drm_mode_debug_printmodeline [drm]] Modeline 113:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   78.542183] [drm:drm_mode_debug_printmodeline [drm]] Modeline 88:"1280x1440" 60 156000 1280 1376 1512 1744 1440 1443 1453 1493 0x40 0x6
>[   78.542189] [drm:drm_mode_debug_printmodeline [drm]] Modeline 89:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   78.542194] [drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   78.542200] [drm:drm_mode_debug_printmodeline [drm]] Modeline 91:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   78.542205] [drm:drm_mode_debug_printmodeline [drm]] Modeline 90:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[   78.542211] [drm:drm_mode_debug_printmodeline [drm]] Modeline 92:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[   78.542217] [drm:drm_mode_debug_printmodeline [drm]] Modeline 85:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   78.542222] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   78.542228] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   78.542233] [drm:drm_mode_debug_printmodeline [drm]] Modeline 101:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   78.542239] [drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   78.542244] [drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   78.542250] [drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   78.542256] [drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   78.542261] [drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[   78.542267] [drm:drm_mode_debug_printmodeline [drm]] Modeline 93:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   78.542272] [drm:drm_mode_debug_printmodeline [drm]] Modeline 94:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[   78.542278] [drm:drm_mode_debug_printmodeline [drm]] Modeline 87:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   78.542283] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   78.542289] [drm:drm_mode_debug_printmodeline [drm]] Modeline 86:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   78.542294] [drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   78.542300] [drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   78.542306] [drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   78.542311] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   78.542317] [drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   78.542323] [drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   78.542346] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:73:HDMI-A-1]
>[   78.542363] [drm:intel_hdmi_detect [i915]] [CONNECTOR:73:HDMI-A-1]
>[   78.600786] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 5
>[   78.631573] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   78.631611] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[   78.631644] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[   78.663557] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   78.663568] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[   78.725401] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 5
>[   78.755583] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[   78.755597] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:73:HDMI-A-1] disconnected
>[   78.755633] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:76:HDMI-A-2]
>[   78.755689] [drm:intel_hdmi_detect [i915]] [CONNECTOR:76:HDMI-A-2]
>[   78.758079] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   78.758133] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   78.759687] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   78.759728] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpc
>[   78.759785] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[   78.759835] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpc. force bit now 1
>[   78.763136] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpc
>[   78.763183] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpc. force bit now 0
>[   78.765568] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>[   78.765622] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   78.767800] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>[   78.767825] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[   78.767840] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:76:HDMI-A-2] disconnected
>[   78.849001] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[   78.849051] [drm:intel_edp_backlight_off [i915]] 
>[   79.055549] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[   79.055666] [drm:intel_disable_pipe [i915]] disabling pipe B
>[   79.065916] [drm:intel_edp_panel_off.part.30 [i915]] Turn eDP port A panel power off
>[   79.065996] [drm:intel_edp_panel_off.part.30 [i915]] Wait for panel power off time
>[   79.066107] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000000
>[   79.117134] [drm:wait_panel_status [i915]] Wait complete
>[   79.117178] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[   79.117240] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 2, on? 1) for crtc 47
>[   79.117290] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[   79.117359] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DDI A]
>[   79.117407] [drm:intel_atomic_commit_tail [i915]] [ENCODER:68:DDI B]
>[   79.117449] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST A]
>[   79.117489] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST B]
>[   79.117527] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST C]
>[   79.117563] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI C]
>[   79.117607] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:59:eDP-1]
>[   79.117650] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   79.117691] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   79.117731] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 2
>[   79.117769] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 3
>[   79.118368] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[   79.118424] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[   79.118474] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[   79.118539] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[   79.119665] [drm:intel_atomic_commit_tail [i915]] [CRTC:47:pipe B]
>[   79.119714] [drm:intel_enable_sagv [i915]] Enabling the SAGV
>[   79.122945] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[   79.123030] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe A
>[   79.123083] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[   79.123199] [drm:intel_disable_pipe [i915]] disabling pipe A
>[   79.138379] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[   79.138439] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[   79.175861] [drm:intel_disable_shared_dpll [i915]] disable DPLL 1 (active 1, on? 1) for crtc 37
>[   79.175930] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 1
>[   79.176017] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DDI A]
>[   79.176071] [drm:intel_atomic_commit_tail [i915]] [ENCODER:68:DDI B]
>[   79.176123] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST A]
>[   79.176169] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST B]
>[   79.176212] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST C]
>[   79.176254] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI C]
>[   79.176304] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:69:DP-1]
>[   79.176354] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   79.176401] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   79.176445] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 2
>[   79.176488] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 3
>[   79.176540] [drm:intel_power_well_disable [i915]] disabling power well 2
>[   79.176608] [drm:intel_atomic_commit_tail [i915]] [CRTC:37:pipe A]
>[   79.176658] [drm:intel_power_well_disable [i915]] disabling DC off
>[   79.176701] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[   79.176741] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[   79.177159] [drm:intel_power_well_disable [i915]] disabling always-on
>[   79.215504] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   79.215520] [drm:drm_mode_setcrtc [drm]] [CRTC:37:pipe A]
>[   79.215532] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:59:eDP-1]
>[   79.215569] [drm:intel_atomic_check [i915]] [CONNECTOR:59:eDP-1] checking for sink bpp constrains
>[   79.215586] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[   79.215597] [drm:drm_mode_debug_printmodeline [drm]] Modeline 64:"1920x1080" 48 118300 1920 1968 2000 2200 1080 1083 1089 1120 0x40 0x9
>[   79.215615] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 118300KHz
>[   79.215635] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24
>[   79.215649] [drm:intel_dp_compute_config [i915]] DP link bw required 354900 available 540000
>[   79.215662] [drm:intel_dp_compute_config [i915]] PSR disable by flag
>[   79.215677] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[   79.215692] [drm:intel_dump_pipe_config [i915]] [CRTC:37:pipe A][modeset]
>[   79.215706] [drm:intel_dump_pipe_config [i915]] output_types: EDP (0x100)
>[   79.215720] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0
>[   79.215733] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 5513179, gmch_n: 8388608, link_m: 229715, link_n: 524288, tu: 64
>[   79.215745] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[   79.215756] [drm:intel_dump_pipe_config [i915]] requested mode:
>[   79.215765] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 147800 1920 1968 2000 2200 1080 1083 1089 1120 0x48 0x9
>[   79.215777] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[   79.215785] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 48 118300 1920 1968 2000 2200 1080 1083 1089 1120 0x40 0x9
>[   79.215798] [drm:intel_dump_pipe_config [i915]] crtc timings: 118300 1920 1968 2000 2200 1080 1083 1089 1120, type: 0x40 flags: 0x9
>[   79.215809] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 118300
>[   79.215820] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[   79.215832] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   79.215842] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[   79.215853] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x1, cfgcr1: 0x0, cfgcr2: 0x0
>[   79.215864] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[   79.215875] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1
>[   79.215886] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1
>[   79.215897] [drm:intel_dump_pipe_config [i915]] [PLANE:34:cursor A] FB:81, fb = 256x256 format = AR24 little-endian (0x34325241)
>[   79.215909] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+-949+-528 dst 949x528+-949+-528
>[   79.215924] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[   79.215942] [drm:intel_find_shared_dpll [i915]] [CRTC:37:pipe A] allocated DPLL 0
>[   79.215955] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[   79.222943] [drm:intel_power_well_enable [i915]] enabling always-on
>[   79.222955] [drm:intel_power_well_enable [i915]] enabling DC off
>[   79.222967] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[   79.223363] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DDI A]
>[   79.223379] [drm:intel_atomic_commit_tail [i915]] [ENCODER:68:DDI B]
>[   79.223393] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST A]
>[   79.223410] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST B]
>[   79.223435] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST C]
>[   79.223449] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI C]
>[   79.223466] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   79.223483] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   79.223497] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 2
>[   79.223510] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 3
>[   79.223527] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 37
>[   79.223541] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[   79.223564] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[   79.223591] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[   79.743980] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[   79.744049] [drm:wait_panel_status [i915]] Wait complete
>[   79.744124] [drm:edp_panel_on [i915]] Wait for panel power on
>[   79.744233] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[   79.815361] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[   79.815428] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[   79.815486] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[   79.815603] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[   79.944503] [drm:wait_panel_status [i915]] Wait complete
>[   79.944559] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[   79.944649] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[   79.944758] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[   79.945984] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[   79.946030] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[   79.946073] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   79.946118] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[   79.946842] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[   79.946883] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   79.946922] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   79.947680] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[   79.947719] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   79.947733] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   79.948368] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[   79.948382] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[   79.949323] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 05000000
>[   79.949335] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   79.949348] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 1
>[   79.950280] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 05000000
>[   79.950294] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   79.950306] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 1
>[   79.951239] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[   79.951254] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:59:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2
>[   79.951527] [drm:intel_enable_pipe [i915]] enabling pipe A
>[   79.951565] [drm:intel_edp_backlight_on [i915]] 
>[   79.951584] [drm:intel_panel_enable_backlight [i915]] pipe A
>[   79.951664] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 6818
>[   79.951728] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS
>[   79.951732] [drm] Reducing the compressed framebuffer size. This may lead to less power savings than a non-reduced-size. Try to increase stolen memory size if available in BIOS.
>[   79.951749] [drm:intel_fbc_enable [i915]] reserved 4147200 bytes of contiguous stolen space for FBC, threshold: 2
>[   79.951764] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[   79.972504] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:59:eDP-1]
>[   79.972544] [drm:intel_atomic_commit_tail [i915]] [CRTC:37:pipe A]
>[   79.972597] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   79.981623] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   79.981663] [drm:drm_mode_setcrtc [drm]] [CRTC:47:pipe B]
>[   79.981694] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:69:DP-1]
>[   79.981782] [drm:intel_atomic_check [i915]] [CONNECTOR:69:DP-1] checking for sink bpp constrains
>[   79.981834] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 148500KHz
>[   79.981886] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24
>[   79.981927] [drm:intel_dp_compute_config [i915]] DP link bw required 445500 available 540000
>[   79.981974] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[   79.982021] [drm:intel_dump_pipe_config [i915]] [CRTC:47:pipe B][modeset]
>[   79.982064] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80)
>[   79.982104] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 24, dithering: 0
>[   79.982143] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6920601, gmch_n: 8388608, link_m: 288358, link_n: 524288, tu: 64
>[   79.982179] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 0
>[   79.982213] [drm:intel_dump_pipe_config [i915]] requested mode:
>[   79.982247] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   79.982284] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[   79.982310] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   79.982350] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x40 flags: 0x5
>[   79.982387] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 148500
>[   79.982424] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[   79.982460] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   79.982496] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[   79.982532] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[   79.982578] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[   79.982613] [drm:intel_dump_pipe_config [i915]] [PLANE:38:plane 1B] disabled, scaler_id = -1
>[   79.982667] [drm:intel_dump_pipe_config [i915]] [PLANE:41:plane 2B] disabled, scaler_id = -1
>[   79.982725] [drm:intel_dump_pipe_config [i915]] [PLANE:44:cursor B] disabled, scaler_id = -1
>[   79.982807] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[   79.982906] [drm:intel_find_shared_dpll [i915]] [CRTC:47:pipe B] allocated DPLL 1
>[   79.982975] [drm:intel_reference_shared_dpll [i915]] using DPLL 1 for pipe B
>[   79.993459] [drm:intel_power_well_enable [i915]] enabling power well 2
>[   79.993516] [drm:intel_disable_sagv [i915]] Disabling the SAGV
>[   79.993580] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DDI A]
>[   79.993632] [drm:intel_atomic_commit_tail [i915]] [ENCODER:68:DDI B]
>[   79.993680] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST A]
>[   79.993723] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST B]
>[   79.993764] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST C]
>[   79.993803] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI C]
>[   79.993849] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   79.993895] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   79.993937] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 2
>[   79.993976] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 3
>[   80.014301] [drm:intel_enable_shared_dpll [i915]] enable DPLL 1 (active 2, on? 0) for crtc 47
>[   80.014356] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 1
>[   80.015690] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[   80.017431] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[   80.017480] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[   80.017522] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   80.017563] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[   80.022653] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[   80.022692] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[   80.027781] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[   80.029942] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:69:DP-1] Link Training Passed at Link Rate = 270000, Lane count = 2
>[   80.030482] [drm:intel_enable_pipe [i915]] enabling pipe B
>[   80.030568] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS
>[   80.030618] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:69:DP-1], [ENCODER:68:DDI B]
>[   80.030661] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe B, 28 bytes ELD
>[   80.030707] [drm:hsw_audio_config_update [i915]] using Maud 784, Naud 9375
>[   80.047364] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:69:DP-1]
>[   80.047439] [drm:intel_atomic_commit_tail [i915]] [CRTC:47:pipe B]
>[   80.047546] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   80.047763] [drm:drm_mode_setcrtc [drm]] [CRTC:57:pipe C]
>[   80.061382] [drm:drm_mode_addfb2 [drm]] [FB:107]
>[   80.068125] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[   80.113554] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   80.123818] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   80.193693] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   80.199413] [drm:drm_mode_addfb2 [drm]] [FB:107]
>[   80.208796] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   80.214952] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   80.470297] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   80.473444] [drm:drm_mode_addfb2 [drm]] [FB:107]
>[   81.070937] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   81.072664] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   81.672204] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   81.673648] [drm:drm_mode_addfb2 [drm]] [FB:107]
>[   82.274688] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   82.275786] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   82.876265] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   82.877251] [drm:drm_mode_addfb2 [drm]] [FB:107]
>[   83.007796] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[   83.007908] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000007
>[   83.477394] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   83.478590] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   83.733080] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   83.736527] [drm:drm_mode_addfb2 [drm]] [FB:107]
>[   83.749690] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   83.750763] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   83.765886] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   83.767208] [drm:drm_mode_addfb2 [drm]] [FB:107]
>[   83.784378] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   83.786237] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   83.805212] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   83.806588] [drm:drm_mode_addfb2 [drm]] [FB:107]
>[   83.826041] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   83.827462] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   83.846907] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   83.848448] [drm:drm_mode_addfb2 [drm]] [FB:107]
>[   83.867693] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   83.869313] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   83.888494] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   83.889927] [drm:drm_mode_addfb2 [drm]] [FB:107]
>[   83.911786] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   83.913048] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   84.078801] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   84.080552] [drm:drm_mode_addfb2 [drm]] [FB:107]
>[   85.132679] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   85.133730] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   85.150013] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   85.151001] [drm:drm_mode_addfb2 [drm]] [FB:107]
>[   85.165849] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   85.166833] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   85.182073] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   85.183071] [drm:drm_mode_addfb2 [drm]] [FB:107]
>[   85.200527] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   85.201704] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   85.221518] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   85.222914] [drm:drm_mode_addfb2 [drm]] [FB:107]
>[   85.242384] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   85.243882] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   85.263263] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   85.264813] [drm:drm_mode_addfb2 [drm]] [FB:107]
>[   85.283874] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   85.285070] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   85.304848] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   85.306256] [drm:drm_mode_addfb2 [drm]] [FB:107]
>[   85.325694] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   85.327083] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   85.432435] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   85.436085] [drm:drm_mode_addfb2 [drm]] [FB:107]
>[   85.515388] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   85.518709] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   85.581524] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   85.585098] [drm:drm_mode_addfb2 [drm]] [FB:107]
>[   86.282604] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   86.283855] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   86.768542] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   86.769789] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   87.343014] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   87.344635] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   87.781423] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   87.782740] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   87.808796] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   87.810013] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   87.968411] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   87.969648] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   88.112656] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   88.113850] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   88.248443] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   88.249701] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   88.384460] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   88.385707] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   89.039918] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   89.040987] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   89.200205] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   89.201191] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   89.707115] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   89.707935] [drm:drm_mode_addfb2 [drm]] [FB:82]

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Attachments on bug 106223: 139073 | 139074 | 139077 | 139078 | 139079 | 139080 | 145386 | 145405 | 145407

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