Attachment 139074 Details for Bug 106223 – Screen detected as 1440p

Screen detected as 1440p

1440p (text/plain), 125.79 KB, created by Ricardo Ribalda on 2018-04-24 21:01:11 UTC

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Description:

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Creator: Ricardo Ribalda

Created: 2018-04-24 21:01:11 UTC

Size: 125.79 KB

patch

obsolete

>[   46.021377] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[   46.029741] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[   46.038107] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[   46.046467] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[   46.047067] [drm:drm_mode_addfb2 [drm]] [FB:84]
>[   46.054835] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[   46.063192] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[   46.071554] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[   46.079912] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[   46.088269] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[   46.096626] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[   46.104982] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[   46.113339] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[   46.121696] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[   46.130052] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[   46.138408] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[   46.146765] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[   46.152546] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 05 01 81 02 01 04 01 0f 00 00
>[   46.153980] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[   46.153989] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[   46.153998] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[   46.154759] [drm:drm_dp_read_desc [drm_kms_helper]] DP branch: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[   46.155421] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[   46.157534] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.159219] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.160913] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.162620] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.164325] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.166031] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.167735] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.169441] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.170529] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.172136] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.173968] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.175881] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.177575] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.179281] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.180986] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.182692] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.184396] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.186103] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.187807] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.189239] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[   46.189904] [drm:intel_power_well_disable [i915]] disabling power well 2
>[   46.189918] [drm:intel_power_well_disable [i915]] disabling DC off
>[   46.189928] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[   46.189936] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[   46.189952] [drm:i915_hotplug_work_func [i915]] [CONNECTOR:69:DP-1] status updated from disconnected to connected
>[   46.189964] [drm:i915_hotplug_work_func [i915]] Connector HDMI-A-1 (pin 5) received hotplug event.
>[   46.189976] [drm:intel_hdmi_detect [i915]] [CONNECTOR:73:HDMI-A-1]
>[   46.239977] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00200000, dig 0x10101011, pins 0x00000020
>[   46.239995] [drm:intel_hpd_irq_handler [i915]] digital hpd port B - short
>[   46.240053] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port B - short
>[   46.240066] [drm:intel_power_well_enable [i915]] enabling DC off
>[   46.240079] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[   46.240096] [drm:intel_power_well_enable [i915]] enabling power well 2
>[   46.240888] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c2 01 01 15 01 81 02 01 04 01 0f 00 01
>[   46.250482] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 5
>[   46.282233] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   46.282262] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[   46.282288] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[   46.314310] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   46.314336] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[   46.375627] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 5
>[   46.406519] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[   46.406621] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[   46.406671] [drm:i915_hotplug_work_func [i915]] Connector DP-1 (pin 5) received hotplug event.
>[   46.407359] [drm:intel_power_well_disable [i915]] disabling power well 2
>[   46.407402] [drm:intel_dp_detect [i915]] [CONNECTOR:69:DP-1]
>[   46.407461] [drm:intel_power_well_disable [i915]] disabling DC off
>[   46.407510] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[   46.407555] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[   46.407592] [drm:intel_power_well_enable [i915]] enabling DC off
>[   46.407623] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[   46.407658] [drm:intel_power_well_enable [i915]] enabling power well 2
>[   46.408511] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c2 01 01 15 01 81 02 01 04 01 0f 00 01
>[   46.410016] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[   46.410052] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[   46.410085] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[   46.410941] [drm:drm_dp_read_desc [drm_kms_helper]] DP branch: OUI 00-1c-f8 dev-ID 176GB0 HW-rev 1.0 SW-rev 7.38 quirks 0x0000
>[   46.411657] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[   46.414547] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.415652] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.417017] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.418174] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.419533] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.420641] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.422043] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.423107] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.424519] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.425665] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.427036] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.428182] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.429588] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.430701] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.432120] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.433275] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.435528] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.436638] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.438046] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.439110] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.440515] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.441669] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.443044] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.444761] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.445913] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.447278] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.448427] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.449841] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.450975] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.452389] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.453539] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.454664] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[   46.455377] [drm:intel_power_well_disable [i915]] disabling power well 2
>[   46.455418] [drm:intel_power_well_disable [i915]] disabling DC off
>[   46.455451] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[   46.455481] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[   46.455538] [drm:i915_hotplug_work_func [i915]] Connector HDMI-A-1 (pin 5) received hotplug event.
>[   46.455582] [drm:intel_hdmi_detect [i915]] [CONNECTOR:73:HDMI-A-1]
>[   46.516626] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 5
>[   46.546888] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   46.546939] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[   46.546984] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[   46.578961] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   46.578985] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[   46.640694] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 5
>[   46.671174] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[   46.671268] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:59:eDP-1]
>[   46.671321] [drm:intel_dp_detect [i915]] [CONNECTOR:59:eDP-1]
>[   46.671358] [drm:intel_power_well_enable [i915]] enabling DC off
>[   46.671406] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[   46.671445] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[   46.671475] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[   46.671501] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[   46.671542] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[   46.671624] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000f
>[   46.672062] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[   46.672784] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   46.672803] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   46.672849] [drm:intel_connector_update_modes [i915]] ELD: no CEA Extension found
>[   46.672877] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:59:eDP-1] probed modes :
>[   46.672895] [drm:drm_mode_debug_printmodeline [drm]] Modeline 60:"1920x1080" 60 147800 1920 1968 2000 2200 1080 1083 1089 1120 0x48 0x9
>[   46.672910] [drm:drm_mode_debug_printmodeline [drm]] Modeline 61:"1920x1080" 48 118300 1920 1968 2000 2200 1080 1083 1089 1120 0x40 0x9
>[   46.672930] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:69:DP-1]
>[   46.672958] [drm:intel_dp_detect [i915]] [CONNECTOR:69:DP-1]
>[   46.672980] [drm:intel_power_well_enable [i915]] enabling power well 2
>[   46.673808] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c2 01 01 15 01 81 02 01 04 01 0f 00 01
>[   46.675293] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[   46.675318] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[   46.675344] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[   46.676112] [drm:drm_dp_read_desc [drm_kms_helper]] DP branch: OUI 00-1c-f8 dev-ID 176GB0 HW-rev 1.0 SW-rev 7.38 quirks 0x0000
>[   46.676787] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[   46.679558] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.681253] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.682959] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.684666] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.686372] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.688078] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.689784] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.691496] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.693993] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.695115] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.696720] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.698427] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.700133] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.701839] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.703545] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.705251] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.706957] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   46.708383] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[   46.709047] [drm:intel_power_well_disable [i915]] disabling power well 2
>[   46.709059] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   46.709065] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   46.709071] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   46.709076] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   46.709154] [drm:drm_edid_to_eld [drm]] ELD monitor Q2775
>[   46.709159] [drm:drm_edid_to_eld [drm]] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>[   46.709172] [drm:intel_connector_update_modes [i915]] ELD size 28, SAD count 1
>[   46.709245] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:69:DP-1] probed modes :
>[   46.709251] [drm:drm_mode_debug_printmodeline [drm]] Modeline 86:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x48 0x5
>[   46.709257] [drm:drm_mode_debug_printmodeline [drm]] Modeline 87:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   46.709262] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   46.709266] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   46.709271] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   46.709275] [drm:drm_mode_debug_printmodeline [drm]] Modeline 114:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   46.709279] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   46.709284] [drm:drm_mode_debug_printmodeline [drm]] Modeline 91:"1280x1440" 60 156000 1280 1376 1512 1744 1440 1443 1453 1493 0x40 0x6
>[   46.709288] [drm:drm_mode_debug_printmodeline [drm]] Modeline 92:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   46.709292] [drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   46.709296] [drm:drm_mode_debug_printmodeline [drm]] Modeline 94:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   46.709301] [drm:drm_mode_debug_printmodeline [drm]] Modeline 93:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[   46.709305] [drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[   46.709309] [drm:drm_mode_debug_printmodeline [drm]] Modeline 88:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   46.709313] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   46.709318] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   46.709322] [drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   46.709326] [drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   46.709330] [drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   46.709334] [drm:drm_mode_debug_printmodeline [drm]] Modeline 107:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   46.709339] [drm:drm_mode_debug_printmodeline [drm]] Modeline 108:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   46.709343] [drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[   46.709347] [drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   46.709351] [drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[   46.709356] [drm:drm_mode_debug_printmodeline [drm]] Modeline 90:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   46.709360] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   46.709364] [drm:drm_mode_debug_printmodeline [drm]] Modeline 89:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   46.709368] [drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   46.709372] [drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   46.709377] [drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   46.709381] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   46.709385] [drm:drm_mode_debug_printmodeline [drm]] Modeline 101:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   46.709389] [drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   46.709404] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:73:HDMI-A-1]
>[   46.709416] [drm:intel_hdmi_detect [i915]] [CONNECTOR:73:HDMI-A-1]
>[   46.769196] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 5
>[   46.799539] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   46.799594] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[   46.799642] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[   46.831582] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   46.831593] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[   46.892040] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 5
>[   46.923796] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[   46.923811] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:73:HDMI-A-1] disconnected
>[   46.923855] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:76:HDMI-A-2]
>[   46.923910] [drm:intel_hdmi_detect [i915]] [CONNECTOR:76:HDMI-A-2]
>[   46.926373] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   46.926425] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   46.927908] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   46.927946] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpc
>[   46.928001] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[   46.928049] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpc. force bit now 1
>[   46.931357] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpc
>[   46.931400] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpc. force bit now 0
>[   46.933702] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>[   46.933753] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   46.935955] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>[   46.935977] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[   46.935991] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:76:HDMI-A-2] disconnected
>[   46.945648] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[   46.945752] [drm:intel_edp_backlight_off [i915]] 
>[   47.152265] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[   47.152385] [drm:intel_disable_pipe [i915]] disabling pipe A
>[   47.154885] [drm:intel_edp_panel_off.part.30 [i915]] Turn eDP port A panel power off
>[   47.154965] [drm:intel_edp_panel_off.part.30 [i915]] Wait for panel power off time
>[   47.155077] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000000
>[   47.205526] [drm:wait_panel_status [i915]] Wait complete
>[   47.205573] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[   47.205634] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[   47.205689] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 37
>[   47.205737] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[   47.205807] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DDI A]
>[   47.205854] [drm:intel_atomic_commit_tail [i915]] [ENCODER:68:DDI B]
>[   47.205896] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST A]
>[   47.205936] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST B]
>[   47.205974] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST C]
>[   47.206010] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI C]
>[   47.206055] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:59:eDP-1]
>[   47.206101] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   47.206142] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   47.206182] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 2
>[   47.206221] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 3
>[   47.206275] [drm:intel_atomic_commit_tail [i915]] [CRTC:37:pipe A]
>[   47.206320] [drm:intel_power_well_disable [i915]] disabling DC off
>[   47.206359] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[   47.206394] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[   47.206808] [drm:intel_power_well_disable [i915]] disabling always-on
>[   47.207553] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[   47.207609] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[   47.207660] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[   47.207792] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[   47.269584] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   47.269599] [drm:drm_mode_setcrtc [drm]] [CRTC:37:pipe A]
>[   47.269610] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:69:DP-1]
>[   47.269649] [drm:intel_atomic_check [i915]] [CONNECTOR:69:DP-1] checking for sink bpp constrains
>[   47.269668] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 540000 pixel clock 241500KHz
>[   47.269690] [drm:intel_dp_compute_config [i915]] DP link bw 14 rate select 00 lane count 4 clock 540000 bpp 36
>[   47.269705] [drm:intel_dp_compute_config [i915]] DP link bw required 1086750 available 2160000
>[   47.269721] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 36, dithering: 0
>[   47.269737] [drm:intel_dump_pipe_config [i915]] [CRTC:37:pipe A][modeset]
>[   47.269752] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80)
>[   47.269766] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 36, dithering: 0
>[   47.269780] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 4220518, gmch_n: 8388608, link_m: 468946, link_n: 1048576, tu: 64
>[   47.269793] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 0
>[   47.269806] [drm:intel_dump_pipe_config [i915]] requested mode:
>[   47.269816] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x48 0x5
>[   47.269829] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[   47.269838] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x48 0x5
>[   47.269851] [drm:intel_dump_pipe_config [i915]] crtc timings: 241500 2560 2608 2640 2720 1440 1443 1448 1481, type: 0x48 flags: 0x5
>[   47.269864] [drm:intel_dump_pipe_config [i915]] port clock: 540000, pipe src size: 2560x1440, pixel rate 241500
>[   47.269877] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[   47.269889] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   47.269901] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[   47.269913] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[   47.269924] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[   47.269936] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1
>[   47.269948] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1
>[   47.269960] [drm:intel_dump_pipe_config [i915]] [PLANE:34:cursor A] disabled, scaler_id = -1
>[   47.269977] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 450000 kHz, actual 450000 kHz
>[   47.269996] [drm:intel_find_shared_dpll [i915]] [CRTC:37:pipe A] allocated DPLL 1
>[   47.270010] [drm:intel_reference_shared_dpll [i915]] using DPLL 1 for pipe A
>[   47.278364] [drm:intel_power_well_enable [i915]] enabling always-on
>[   47.278376] [drm:intel_power_well_enable [i915]] enabling DC off
>[   47.278623] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[   47.278638] [drm:intel_power_well_enable [i915]] enabling power well 2
>[   47.278660] [drm:intel_set_cdclk [i915]] Changing CDCLK to 450000 kHz, VCO 8100000 kHz, ref 24000 kHz
>[   47.278898] [drm:intel_update_cdclk [i915]] Current CD clock rate: 450000 kHz, VCO: 8100000 kHz, ref: 24000 kHz
>[   47.278914] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DDI A]
>[   47.278927] [drm:intel_atomic_commit_tail [i915]] [ENCODER:68:DDI B]
>[   47.278940] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST A]
>[   47.278952] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST B]
>[   47.278964] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST C]
>[   47.278976] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI C]
>[   47.278989] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   47.279003] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   47.279016] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 2
>[   47.279028] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 3
>[   47.279043] [drm:intel_enable_shared_dpll [i915]] enable DPLL 1 (active 1, on? 0) for crtc 37
>[   47.279056] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 1
>[   47.280510] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[   47.282135] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[   47.282150] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[   47.282162] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   47.282175] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[   47.287210] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[   47.287221] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   47.287231] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   47.292258] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 07000000
>[   47.292268] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[   47.292277] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   47.297303] [drm:intel_dp_start_link_train [i915]] Max Voltage Swing reached
>[   47.297315] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:69:DP-1] Link Training failed at link rate = 540000, lane count = 4
>[   47.297329] [drm:intel_dp_modeset_retry_work_fn [i915]] [CONNECTOR:69:DP-1]
>[   47.297745] [drm:intel_enable_pipe [i915]] enabling pipe A
>[   47.297770] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS
>[   47.297782] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:69:DP-1], [ENCODER:68:DDI B]
>[   47.297794] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe A, 28 bytes ELD
>[   47.297808] [drm:hsw_audio_config_update [i915]] using Maud 784, Naud 18750
>[   47.297827] [drm] Reducing the compressed framebuffer size. This may lead to less power savings than a non-reduced-size. Try to increase stolen memory size if available in BIOS.
>[   47.297840] [drm:intel_fbc_enable [i915]] reserved 3686400 bytes of contiguous stolen space for FBC, threshold: 4
>[   47.297851] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[   47.314712] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:69:DP-1]
>[   47.314734] [drm:intel_atomic_commit_tail [i915]] [CRTC:37:pipe A]
>[   47.314764] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   47.317184] [drm:drm_mode_addfb2 [drm]] [FB:83]
>[   47.317197] [drm:drm_mode_setcrtc [drm]] [CRTC:47:pipe B]
>[   47.317207] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:59:eDP-1]
>[   47.317239] [drm:intel_atomic_check [i915]] [CONNECTOR:59:eDP-1] checking for sink bpp constrains
>[   47.317255] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[   47.317265] [drm:drm_mode_debug_printmodeline [drm]] Modeline 64:"1920x1080" 48 118300 1920 1968 2000 2200 1080 1083 1089 1120 0x40 0x9
>[   47.317281] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 118300KHz
>[   47.317301] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24
>[   47.317314] [drm:intel_dp_compute_config [i915]] DP link bw required 354900 available 540000
>[   47.317326] [drm:intel_dp_compute_config [i915]] PSR disable by flag
>[   47.317341] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[   47.317356] [drm:intel_dump_pipe_config [i915]] [CRTC:47:pipe B][modeset]
>[   47.317370] [drm:intel_dump_pipe_config [i915]] output_types: EDP (0x100)
>[   47.317383] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0
>[   47.317397] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 5513179, gmch_n: 8388608, link_m: 229715, link_n: 524288, tu: 64
>[   47.317410] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[   47.317421] [drm:intel_dump_pipe_config [i915]] requested mode:
>[   47.317431] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 147800 1920 1968 2000 2200 1080 1083 1089 1120 0x48 0x9
>[   47.317443] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[   47.317451] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 48 118300 1920 1968 2000 2200 1080 1083 1089 1120 0x40 0x9
>[   47.317465] [drm:intel_dump_pipe_config [i915]] crtc timings: 118300 1920 1968 2000 2200 1080 1083 1089 1120, type: 0x40 flags: 0x9
>[   47.317477] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 118300
>[   47.317493] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[   47.317505] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   47.317516] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[   47.317528] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[   47.317538] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[   47.317548] [drm:intel_dump_pipe_config [i915]] [PLANE:38:plane 1B] disabled, scaler_id = -1
>[   47.317559] [drm:intel_dump_pipe_config [i915]] [PLANE:41:plane 2B] disabled, scaler_id = -1
>[   47.317570] [drm:intel_dump_pipe_config [i915]] [PLANE:44:cursor B] FB:80, fb = 256x256 format = AR24 little-endian (0x34325241)
>[   47.317581] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+-956+-536 dst 956x536+-956+-536
>[   47.317596] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 450000 kHz, actual 450000 kHz
>[   47.317614] [drm:intel_find_shared_dpll [i915]] [CRTC:47:pipe B] allocated DPLL 0
>[   47.317627] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe B
>[   47.331582] [drm:intel_disable_sagv [i915]] Disabling the SAGV
>[   47.331613] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DDI A]
>[   47.331635] [drm:intel_atomic_commit_tail [i915]] [ENCODER:68:DDI B]
>[   47.331654] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST A]
>[   47.331672] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST B]
>[   47.331689] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST C]
>[   47.331705] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI C]
>[   47.331723] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   47.331742] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   47.331760] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 2
>[   47.331776] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 3
>[   47.347971] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 2, on? 0) for crtc 47
>[   47.348009] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[   47.348059] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[   47.348103] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[   47.825887] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[   47.825960] [drm:wait_panel_status [i915]] Wait complete
>[   47.826042] [drm:edp_panel_on [i915]] Wait for panel power on
>[   47.826156] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[   47.897317] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[   47.897383] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[   47.897439] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[   47.897552] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[   48.028394] [drm:wait_panel_status [i915]] Wait complete
>[   48.028451] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[   48.028539] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[   48.028648] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[   48.029883] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[   48.029933] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[   48.029974] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   48.030014] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[   48.030788] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[   48.030835] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   48.030886] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   48.031613] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[   48.031662] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   48.031704] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   48.032435] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[   48.032485] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[   48.033520] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 05000000
>[   48.033559] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   48.033597] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 1
>[   48.034599] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 05000000
>[   48.034612] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   48.034624] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 1
>[   48.035553] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[   48.035568] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:59:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2
>[   48.035808] [drm:intel_enable_pipe [i915]] enabling pipe B
>[   48.035844] [drm:intel_edp_backlight_on [i915]] 
>[   48.035859] [drm:intel_panel_enable_backlight [i915]] pipe B
>[   48.035937] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 6818
>[   48.035999] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS
>[   48.056787] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:59:eDP-1]
>[   48.056827] [drm:intel_atomic_commit_tail [i915]] [CRTC:47:pipe B]
>[   48.056878] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   48.057006] [drm:drm_mode_setcrtc [drm]] [CRTC:57:pipe C]
>[   48.057811] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:59:eDP-1]
>[   48.057852] [drm:intel_dp_detect [i915]] [CONNECTOR:59:eDP-1]
>[   48.057890] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[   48.057923] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[   48.057956] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[   48.058421] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[   48.059160] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   48.059189] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   48.059264] [drm:intel_connector_update_modes [i915]] ELD: no CEA Extension found
>[   48.059331] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:59:eDP-1] probed modes :
>[   48.059365] [drm:drm_mode_debug_printmodeline [drm]] Modeline 60:"1920x1080" 60 147800 1920 1968 2000 2200 1080 1083 1089 1120 0x48 0x9
>[   48.059398] [drm:drm_mode_debug_printmodeline [drm]] Modeline 61:"1920x1080" 48 118300 1920 1968 2000 2200 1080 1083 1089 1120 0x40 0x9
>[   48.059444] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:69:DP-1]
>[   48.059510] [drm:intel_dp_detect [i915]] [CONNECTOR:69:DP-1]
>[   48.060386] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c2 01 01 15 01 81 02 01 04 01 0f 00 01
>[   48.061915] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[   48.061955] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[   48.061992] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[   48.062793] [drm:drm_dp_read_desc [drm_kms_helper]] DP branch: OUI 00-1c-f8 dev-ID 176GB0 HW-rev 1.0 SW-rev 7.38 quirks 0x0000
>[   48.063477] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[   48.066279] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   48.067339] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   48.068650] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   48.070356] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   48.072061] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   48.073767] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   48.074797] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   48.076251] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   48.077957] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   48.079663] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   48.082171] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   48.083864] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   48.085569] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   48.087278] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   48.088983] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   48.090692] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   48.092398] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   48.094104] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   48.095538] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[   48.096202] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   48.096210] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   48.096220] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   48.096226] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   48.096329] [drm:drm_edid_to_eld [drm]] ELD monitor Q2775
>[   48.096336] [drm:drm_edid_to_eld [drm]] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>[   48.096363] [drm:intel_connector_update_modes [i915]] ELD size 28, SAD count 1
>[   48.096467] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:69:DP-1] probed modes :
>[   48.096476] [drm:drm_mode_debug_printmodeline [drm]] Modeline 86:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x48 0x5
>[   48.096483] [drm:drm_mode_debug_printmodeline [drm]] Modeline 87:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   48.096490] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   48.096496] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   48.096502] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   48.096508] [drm:drm_mode_debug_printmodeline [drm]] Modeline 114:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   48.096513] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   48.096519] [drm:drm_mode_debug_printmodeline [drm]] Modeline 91:"1280x1440" 60 156000 1280 1376 1512 1744 1440 1443 1453 1493 0x40 0x6
>[   48.096525] [drm:drm_mode_debug_printmodeline [drm]] Modeline 92:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   48.096530] [drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   48.096536] [drm:drm_mode_debug_printmodeline [drm]] Modeline 94:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   48.096542] [drm:drm_mode_debug_printmodeline [drm]] Modeline 93:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[   48.096548] [drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[   48.096553] [drm:drm_mode_debug_printmodeline [drm]] Modeline 88:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   48.096559] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   48.096564] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   48.096570] [drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   48.096576] [drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   48.096581] [drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   48.096587] [drm:drm_mode_debug_printmodeline [drm]] Modeline 107:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   48.096592] [drm:drm_mode_debug_printmodeline [drm]] Modeline 108:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   48.096598] [drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[   48.096603] [drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   48.096609] [drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[   48.096615] [drm:drm_mode_debug_printmodeline [drm]] Modeline 90:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   48.096620] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   48.096626] [drm:drm_mode_debug_printmodeline [drm]] Modeline 89:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   48.096631] [drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   48.096637] [drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   48.096642] [drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   48.096648] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   48.096654] [drm:drm_mode_debug_printmodeline [drm]] Modeline 101:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   48.096659] [drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   48.096682] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:73:HDMI-A-1]
>[   48.096700] [drm:intel_hdmi_detect [i915]] [CONNECTOR:73:HDMI-A-1]
>[   48.155374] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 5
>[   48.186509] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   48.186545] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[   48.186578] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[   48.218544] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   48.218555] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[   48.279488] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 5
>[   48.310740] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[   48.310744] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:73:HDMI-A-1] disconnected
>[   48.310761] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:76:HDMI-A-2]
>[   48.310778] [drm:intel_hdmi_detect [i915]] [CONNECTOR:76:HDMI-A-2]
>[   48.313252] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   48.313271] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   48.314980] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   48.315005] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpc
>[   48.315023] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[   48.315037] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpc. force bit now 1
>[   48.318238] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpc
>[   48.318251] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpc. force bit now 0
>[   48.320718] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>[   48.320735] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   48.323047] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>[   48.323057] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[   48.323066] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:76:HDMI-A-2] disconnected
>[   48.395503] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 450000 kHz, actual 450000 kHz
>[   48.395562] [drm:intel_edp_backlight_off [i915]] 
>[   48.603235] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[   48.603342] [drm:intel_disable_pipe [i915]] disabling pipe B
>[   48.619759] [drm:intel_edp_panel_off.part.30 [i915]] Turn eDP port A panel power off
>[   48.619841] [drm:intel_edp_panel_off.part.30 [i915]] Wait for panel power off time
>[   48.619952] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000000
>[   48.670956] [drm:wait_panel_status [i915]] Wait complete
>[   48.671000] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[   48.671063] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 2, on? 1) for crtc 47
>[   48.671113] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[   48.671183] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DDI A]
>[   48.671231] [drm:intel_atomic_commit_tail [i915]] [ENCODER:68:DDI B]
>[   48.671273] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST A]
>[   48.671312] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST B]
>[   48.671399] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST C]
>[   48.671460] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI C]
>[   48.671522] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:59:eDP-1]
>[   48.671585] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   48.671642] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   48.671687] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 2
>[   48.671733] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 3
>[   48.672197] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[   48.672251] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[   48.672307] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[   48.672379] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[   48.682367] [drm:intel_atomic_commit_tail [i915]] [CRTC:47:pipe B]
>[   48.682416] [drm:intel_enable_sagv [i915]] Enabling the SAGV
>[   48.682672] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[   48.682758] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe A
>[   48.682812] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[   48.682932] [drm:intel_disable_pipe [i915]] disabling pipe A
>[   48.700984] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[   48.701044] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[   48.735869] [drm:intel_disable_shared_dpll [i915]] disable DPLL 1 (active 1, on? 1) for crtc 37
>[   48.735938] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 1
>[   48.736022] [drm:intel_set_cdclk [i915]] Changing CDCLK to 337500 kHz, VCO 8100000 kHz, ref 24000 kHz
>[   48.736615] [drm:intel_update_cdclk [i915]] Current CD clock rate: 337500 kHz, VCO: 8100000 kHz, ref: 24000 kHz
>[   48.736666] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DDI A]
>[   48.736712] [drm:intel_atomic_commit_tail [i915]] [ENCODER:68:DDI B]
>[   48.736757] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST A]
>[   48.736798] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST B]
>[   48.736837] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST C]
>[   48.736874] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI C]
>[   48.736919] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:69:DP-1]
>[   48.736963] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   48.737006] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   48.737045] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 2
>[   48.737084] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 3
>[   48.737131] [drm:intel_power_well_disable [i915]] disabling power well 2
>[   48.737190] [drm:intel_atomic_commit_tail [i915]] [CRTC:37:pipe A]
>[   48.737234] [drm:intel_power_well_disable [i915]] disabling DC off
>[   48.737273] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[   48.737308] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[   48.737721] [drm:intel_power_well_disable [i915]] disabling always-on
>[   48.764750] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   48.764766] [drm:drm_mode_setcrtc [drm]] [CRTC:37:pipe A]
>[   48.764778] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:69:DP-1]
>[   48.764819] [drm:intel_atomic_check [i915]] [CONNECTOR:69:DP-1] checking for sink bpp constrains
>[   48.764839] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 241500KHz
>[   48.764862] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 4 clock 270000 bpp 30
>[   48.764877] [drm:intel_dp_compute_config [i915]] DP link bw required 905625 available 1080000
>[   48.764895] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 30, dithering: 0
>[   48.764913] [drm:intel_dump_pipe_config [i915]] [CRTC:37:pipe A][modeset]
>[   48.764929] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80)
>[   48.764945] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 30, dithering: 0
>[   48.764959] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 7034197, gmch_n: 8388608, link_m: 468946, link_n: 524288, tu: 64
>[   48.764973] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 0
>[   48.764986] [drm:intel_dump_pipe_config [i915]] requested mode:
>[   48.764997] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x48 0x5
>[   48.765010] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[   48.765020] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x48 0x5
>[   48.765034] [drm:intel_dump_pipe_config [i915]] crtc timings: 241500 2560 2608 2640 2720 1440 1443 1448 1481, type: 0x48 flags: 0x5
>[   48.765047] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 2560x1440, pixel rate 241500
>[   48.765060] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[   48.765073] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   48.765086] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[   48.765099] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x1, cfgcr1: 0x0, cfgcr2: 0x0
>[   48.765111] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[   48.765123] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1
>[   48.765135] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1
>[   48.765147] [drm:intel_dump_pipe_config [i915]] [PLANE:34:cursor A] disabled, scaler_id = -1
>[   48.765165] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[   48.765186] [drm:intel_find_shared_dpll [i915]] [CRTC:37:pipe A] allocated DPLL 1
>[   48.765202] [drm:intel_reference_shared_dpll [i915]] using DPLL 1 for pipe A
>[   48.774486] [drm:intel_power_well_enable [i915]] enabling always-on
>[   48.774501] [drm:intel_power_well_enable [i915]] enabling DC off
>[   48.774751] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[   48.774768] [drm:intel_power_well_enable [i915]] enabling power well 2
>[   48.774797] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DDI A]
>[   48.774816] [drm:intel_atomic_commit_tail [i915]] [ENCODER:68:DDI B]
>[   48.774833] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST A]
>[   48.774849] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST B]
>[   48.774864] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST C]
>[   48.774879] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI C]
>[   48.774896] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   48.774912] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   48.774928] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 2
>[   48.774942] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 3
>[   48.774961] [drm:intel_enable_shared_dpll [i915]] enable DPLL 1 (active 1, on? 0) for crtc 37
>[   48.774977] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 1
>[   48.777182] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[   48.778818] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[   48.778836] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[   48.778852] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   48.778867] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[   48.783912] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[   48.783927] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   48.783941] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   48.789012] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 07000000
>[   48.789026] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[   48.789039] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   48.794075] [drm:intel_dp_start_link_train [i915]] Max Voltage Swing reached
>[   48.794090] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:69:DP-1] Link Training failed at link rate = 270000, lane count = 4
>[   48.794111] [drm:intel_dp_modeset_retry_work_fn [i915]] [CONNECTOR:69:DP-1]
>[   48.794547] [drm:intel_enable_pipe [i915]] enabling pipe A
>[   48.794597] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS
>[   48.794614] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:69:DP-1], [ENCODER:68:DDI B]
>[   48.794630] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe A, 28 bytes ELD
>[   48.794648] [drm:hsw_audio_config_update [i915]] using Maud 784, Naud 9375
>[   48.794671] [drm] Reducing the compressed framebuffer size. This may lead to less power savings than a non-reduced-size. Try to increase stolen memory size if available in BIOS.
>[   48.794688] [drm:intel_fbc_enable [i915]] reserved 3686400 bytes of contiguous stolen space for FBC, threshold: 4
>[   48.794704] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[   48.811496] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:69:DP-1]
>[   48.811522] [drm:intel_atomic_commit_tail [i915]] [CRTC:37:pipe A]
>[   48.811558] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   48.815963] [drm:drm_mode_addfb2 [drm]] [FB:83]
>[   48.815980] [drm:drm_mode_setcrtc [drm]] [CRTC:47:pipe B]
>[   48.815993] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:59:eDP-1]
>[   48.816051] [drm:intel_atomic_check [i915]] [CONNECTOR:59:eDP-1] checking for sink bpp constrains
>[   48.816069] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[   48.816082] [drm:drm_mode_debug_printmodeline [drm]] Modeline 64:"1920x1080" 48 118300 1920 1968 2000 2200 1080 1083 1089 1120 0x40 0x9
>[   48.816101] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 118300KHz
>[   48.816124] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24
>[   48.816139] [drm:intel_dp_compute_config [i915]] DP link bw required 354900 available 540000
>[   48.816154] [drm:intel_dp_compute_config [i915]] PSR disable by flag
>[   48.816171] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[   48.816189] [drm:intel_dump_pipe_config [i915]] [CRTC:47:pipe B][modeset]
>[   48.816204] [drm:intel_dump_pipe_config [i915]] output_types: EDP (0x100)
>[   48.816219] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0
>[   48.816234] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 5513179, gmch_n: 8388608, link_m: 229715, link_n: 524288, tu: 64
>[   48.816248] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[   48.816261] [drm:intel_dump_pipe_config [i915]] requested mode:
>[   48.816272] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 147800 1920 1968 2000 2200 1080 1083 1089 1120 0x48 0x9
>[   48.816285] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[   48.816295] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 48 118300 1920 1968 2000 2200 1080 1083 1089 1120 0x40 0x9
>[   48.816309] [drm:intel_dump_pipe_config [i915]] crtc timings: 118300 1920 1968 2000 2200 1080 1083 1089 1120, type: 0x40 flags: 0x9
>[   48.816322] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 118300
>[   48.816335] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[   48.816348] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   48.816361] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[   48.816374] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[   48.816386] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[   48.816399] [drm:intel_dump_pipe_config [i915]] [PLANE:38:plane 1B] disabled, scaler_id = -1
>[   48.816411] [drm:intel_dump_pipe_config [i915]] [PLANE:41:plane 2B] disabled, scaler_id = -1
>[   48.816424] [drm:intel_dump_pipe_config [i915]] [PLANE:44:cursor B] FB:80, fb = 256x256 format = AR24 little-endian (0x34325241)
>[   48.816437] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+-956+-536 dst 956x536+-956+-536
>[   48.816454] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[   48.816483] [drm:intel_find_shared_dpll [i915]] [CRTC:47:pipe B] allocated DPLL 0
>[   48.816498] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe B
>[   48.828108] [drm:intel_disable_sagv [i915]] Disabling the SAGV
>[   48.828135] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DDI A]
>[   48.828155] [drm:intel_atomic_commit_tail [i915]] [ENCODER:68:DDI B]
>[   48.828173] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST A]
>[   48.828189] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST B]
>[   48.828204] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST C]
>[   48.828219] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI C]
>[   48.828236] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   48.828253] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   48.828269] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 2
>[   48.828284] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 3
>[   48.844856] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 2, on? 0) for crtc 47
>[   48.844889] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[   48.844933] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[   48.844973] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[   49.300636] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[   49.300711] [drm:wait_panel_status [i915]] Wait complete
>[   49.300793] [drm:edp_panel_on [i915]] Wait for panel power on
>[   49.300908] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[   49.371999] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[   49.372065] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[   49.372123] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[   49.372233] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[   49.502655] [drm:wait_panel_status [i915]] Wait complete
>[   49.502711] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[   49.502799] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[   49.502909] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[   49.504153] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[   49.504209] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[   49.504256] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   49.504302] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[   49.505087] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[   49.505145] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   49.505198] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   49.505949] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[   49.506002] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   49.506052] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   49.506799] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[   49.506849] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[   49.507896] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 05000000
>[   49.507949] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   49.508004] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 1
>[   49.508966] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 05000000
>[   49.508979] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   49.508991] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 1
>[   49.509920] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[   49.509934] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:59:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2
>[   49.510179] [drm:intel_enable_pipe [i915]] enabling pipe B
>[   49.510209] [drm:intel_edp_backlight_on [i915]] 
>[   49.510224] [drm:intel_panel_enable_backlight [i915]] pipe B
>[   49.510303] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 6818
>[   49.510364] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS
>[   49.531149] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:59:eDP-1]
>[   49.531189] [drm:intel_atomic_commit_tail [i915]] [CRTC:47:pipe B]
>[   49.531241] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   49.531372] [drm:drm_mode_setcrtc [drm]] [CRTC:57:pipe C]
>[   49.534207] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:59:eDP-1]
>[   49.534262] [drm:intel_dp_detect [i915]] [CONNECTOR:59:eDP-1]
>[   49.534313] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[   49.534347] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[   49.534377] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[   49.534817] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[   49.535575] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   49.535609] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   49.535701] [drm:intel_connector_update_modes [i915]] ELD: no CEA Extension found
>[   49.535749] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:59:eDP-1] probed modes :
>[   49.535778] [drm:drm_mode_debug_printmodeline [drm]] Modeline 60:"1920x1080" 60 147800 1920 1968 2000 2200 1080 1083 1089 1120 0x48 0x9
>[   49.535802] [drm:drm_mode_debug_printmodeline [drm]] Modeline 61:"1920x1080" 48 118300 1920 1968 2000 2200 1080 1083 1089 1120 0x40 0x9
>[   49.535844] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:69:DP-1]
>[   49.535902] [drm:intel_dp_detect [i915]] [CONNECTOR:69:DP-1]
>[   49.536764] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c2 01 01 15 01 81 02 01 04 01 0f 00 01
>[   49.538373] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[   49.538443] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[   49.538498] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[   49.539307] [drm:drm_dp_read_desc [drm_kms_helper]] DP branch: OUI 00-1c-f8 dev-ID 176GB0 HW-rev 1.0 SW-rev 7.38 quirks 0x0000
>[   49.539992] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[   49.542778] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   49.543855] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   49.545308] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   49.547012] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   49.548719] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   49.550425] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   49.552130] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   49.553839] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   49.555543] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   49.558045] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   49.559741] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   49.561449] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   49.562493] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   49.563945] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   49.565653] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   49.567358] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   49.569064] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   49.570769] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   49.572202] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[   49.572876] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   49.572887] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   49.572899] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   49.572907] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   49.573052] [drm:drm_edid_to_eld [drm]] ELD monitor Q2775
>[   49.573061] [drm:drm_edid_to_eld [drm]] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>[   49.573088] [drm:intel_connector_update_modes [i915]] ELD size 28, SAD count 1
>[   49.573232] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:69:DP-1] probed modes :
>[   49.573244] [drm:drm_mode_debug_printmodeline [drm]] Modeline 86:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x48 0x5
>[   49.573255] [drm:drm_mode_debug_printmodeline [drm]] Modeline 87:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   49.573265] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   49.573273] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   49.573282] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   49.573290] [drm:drm_mode_debug_printmodeline [drm]] Modeline 114:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   49.573299] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   49.573308] [drm:drm_mode_debug_printmodeline [drm]] Modeline 91:"1280x1440" 60 156000 1280 1376 1512 1744 1440 1443 1453 1493 0x40 0x6
>[   49.573317] [drm:drm_mode_debug_printmodeline [drm]] Modeline 92:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   49.573326] [drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   49.573335] [drm:drm_mode_debug_printmodeline [drm]] Modeline 94:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   49.573343] [drm:drm_mode_debug_printmodeline [drm]] Modeline 93:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[   49.573352] [drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[   49.573359] [drm:drm_mode_debug_printmodeline [drm]] Modeline 88:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   49.573369] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   49.573378] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   49.573386] [drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   49.573395] [drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   49.573404] [drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   49.573412] [drm:drm_mode_debug_printmodeline [drm]] Modeline 107:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   49.573420] [drm:drm_mode_debug_printmodeline [drm]] Modeline 108:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   49.573428] [drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[   49.573437] [drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   49.573446] [drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[   49.573455] [drm:drm_mode_debug_printmodeline [drm]] Modeline 90:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   49.573464] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   49.573473] [drm:drm_mode_debug_printmodeline [drm]] Modeline 89:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   49.573481] [drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   49.573489] [drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   49.573496] [drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   49.573505] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   49.573514] [drm:drm_mode_debug_printmodeline [drm]] Modeline 101:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   49.573523] [drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   49.573568] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:73:HDMI-A-1]
>[   49.573591] [drm:intel_hdmi_detect [i915]] [CONNECTOR:73:HDMI-A-1]
>[   49.634610] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 5
>[   49.665184] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   49.665239] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[   49.665286] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[   49.697223] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   49.697235] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[   49.758575] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 5
>[   49.789386] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[   49.789401] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:73:HDMI-A-1] disconnected
>[   49.789444] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:76:HDMI-A-2]
>[   49.789500] [drm:intel_hdmi_detect [i915]] [CONNECTOR:76:HDMI-A-2]
>[   49.791897] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   49.791949] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   49.793602] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   49.793651] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpc
>[   49.793710] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[   49.793760] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpc. force bit now 1
>[   49.797068] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpc
>[   49.797117] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpc. force bit now 0
>[   49.799404] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>[   49.799456] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   49.801520] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>[   49.801542] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[   49.801557] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:76:HDMI-A-2] disconnected
>[   49.877921] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[   49.877977] [drm:intel_edp_backlight_off [i915]] 
>[   50.085767] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[   50.085874] [drm:intel_disable_pipe [i915]] disabling pipe B
>[   50.094091] [drm:intel_edp_panel_off.part.30 [i915]] Turn eDP port A panel power off
>[   50.094172] [drm:intel_edp_panel_off.part.30 [i915]] Wait for panel power off time
>[   50.094284] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000000
>[   50.144364] [drm:wait_panel_status [i915]] Wait complete
>[   50.144408] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[   50.144471] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 2, on? 1) for crtc 47
>[   50.144521] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[   50.144592] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DDI A]
>[   50.144640] [drm:intel_atomic_commit_tail [i915]] [ENCODER:68:DDI B]
>[   50.144682] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST A]
>[   50.144721] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST B]
>[   50.144758] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST C]
>[   50.144795] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI C]
>[   50.144839] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:59:eDP-1]
>[   50.144883] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   50.144924] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   50.144963] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 2
>[   50.145002] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 3
>[   50.145910] [drm:intel_atomic_commit_tail [i915]] [CRTC:47:pipe B]
>[   50.145989] [drm:intel_enable_sagv [i915]] Enabling the SAGV
>[   50.146447] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[   50.146519] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[   50.146574] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[   50.146642] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[   50.146864] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[   50.146956] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe A
>[   50.147012] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[   50.147130] [drm:intel_disable_pipe [i915]] disabling pipe A
>[   50.164712] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[   50.164772] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[   50.202260] [drm:intel_disable_shared_dpll [i915]] disable DPLL 1 (active 1, on? 1) for crtc 37
>[   50.202329] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 1
>[   50.202416] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DDI A]
>[   50.202469] [drm:intel_atomic_commit_tail [i915]] [ENCODER:68:DDI B]
>[   50.202522] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST A]
>[   50.202568] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST B]
>[   50.202611] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST C]
>[   50.202653] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI C]
>[   50.202704] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:69:DP-1]
>[   50.202755] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   50.202803] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   50.202848] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 2
>[   50.202892] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 3
>[   50.202944] [drm:intel_power_well_disable [i915]] disabling power well 2
>[   50.203017] [drm:intel_atomic_commit_tail [i915]] [CRTC:37:pipe A]
>[   50.203066] [drm:intel_power_well_disable [i915]] disabling DC off
>[   50.203109] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[   50.203148] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[   50.203566] [drm:intel_power_well_disable [i915]] disabling always-on
>[   50.228709] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   50.228724] [drm:drm_mode_setcrtc [drm]] [CRTC:37:pipe A]
>[   50.228737] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:69:DP-1]
>[   50.228778] [drm:intel_atomic_check [i915]] [CONNECTOR:69:DP-1] checking for sink bpp constrains
>[   50.228798] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 162000 pixel clock 241500KHz
>[   50.228816] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 18
>[   50.228832] [drm:intel_dp_compute_config [i915]] DP link bw required 543375 available 648000
>[   50.228849] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[   50.228866] [drm:intel_dump_pipe_config [i915]] [CRTC:37:pipe A][modeset]
>[   50.228883] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80)
>[   50.228899] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 18, dithering: 1
>[   50.228914] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 7034197, gmch_n: 8388608, link_m: 390788, link_n: 262144, tu: 64
>[   50.228928] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 0
>[   50.228942] [drm:intel_dump_pipe_config [i915]] requested mode:
>[   50.228952] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x48 0x5
>[   50.228966] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[   50.228976] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x48 0x5
>[   50.228991] [drm:intel_dump_pipe_config [i915]] crtc timings: 241500 2560 2608 2640 2720 1440 1443 1448 1481, type: 0x48 flags: 0x5
>[   50.229004] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 2560x1440, pixel rate 241500
>[   50.229017] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[   50.229031] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   50.229043] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[   50.229056] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[   50.229069] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[   50.229082] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1
>[   50.229095] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1
>[   50.229107] [drm:intel_dump_pipe_config [i915]] [PLANE:34:cursor A] disabled, scaler_id = -1
>[   50.229125] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[   50.229147] [drm:intel_find_shared_dpll [i915]] [CRTC:37:pipe A] allocated DPLL 1
>[   50.229162] [drm:intel_reference_shared_dpll [i915]] using DPLL 1 for pipe A
>[   50.237518] [drm:intel_power_well_enable [i915]] enabling always-on
>[   50.237532] [drm:intel_power_well_enable [i915]] enabling DC off
>[   50.237779] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[   50.237794] [drm:intel_power_well_enable [i915]] enabling power well 2
>[   50.237820] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DDI A]
>[   50.237849] [drm:intel_atomic_commit_tail [i915]] [ENCODER:68:DDI B]
>[   50.237865] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST A]
>[   50.237879] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST B]
>[   50.237892] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST C]
>[   50.237908] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI C]
>[   50.237935] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   50.237955] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   50.237971] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 2
>[   50.237985] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 3
>[   50.238005] [drm:intel_enable_shared_dpll [i915]] enable DPLL 1 (active 1, on? 0) for crtc 37
>[   50.238021] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 1
>[   50.240089] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[   50.241717] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[   50.241733] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[   50.241747] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   50.241760] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[   50.246798] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[   50.246810] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   50.246821] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   50.251852] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 07000000
>[   50.251864] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[   50.251875] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   50.256905] [drm:intel_dp_start_link_train [i915]] Max Voltage Swing reached
>[   50.256918] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:69:DP-1] Link Training failed at link rate = 162000, lane count = 4
>[   50.256936] [drm:intel_dp_modeset_retry_work_fn [i915]] [CONNECTOR:69:DP-1]
>[   50.257364] [drm:intel_enable_pipe [i915]] enabling pipe A
>[   50.257392] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS
>[   50.257406] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:69:DP-1], [ENCODER:68:DDI B]
>[   50.257420] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe A, 28 bytes ELD
>[   50.257436] [drm:hsw_audio_config_update [i915]] using Maud 784, Naud 5625
>[   50.257456] [drm] Reducing the compressed framebuffer size. This may lead to less power savings than a non-reduced-size. Try to increase stolen memory size if available in BIOS.
>[   50.257471] [drm:intel_fbc_enable [i915]] reserved 3686400 bytes of contiguous stolen space for FBC, threshold: 4
>[   50.257483] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[   50.274212] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:69:DP-1]
>[   50.274274] [drm:intel_atomic_commit_tail [i915]] [CRTC:37:pipe A]
>[   50.274348] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   50.285165] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   50.285205] [drm:drm_mode_setcrtc [drm]] [CRTC:47:pipe B]
>[   50.285237] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:59:eDP-1]
>[   50.285327] [drm:intel_atomic_check [i915]] [CONNECTOR:59:eDP-1] checking for sink bpp constrains
>[   50.285377] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[   50.285410] [drm:drm_mode_debug_printmodeline [drm]] Modeline 64:"1920x1080" 48 118300 1920 1968 2000 2200 1080 1083 1089 1120 0x40 0x9
>[   50.285467] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 118300KHz
>[   50.285528] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24
>[   50.285568] [drm:intel_dp_compute_config [i915]] DP link bw required 354900 available 540000
>[   50.285606] [drm:intel_dp_compute_config [i915]] PSR disable by flag
>[   50.285652] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[   50.285699] [drm:intel_dump_pipe_config [i915]] [CRTC:47:pipe B][modeset]
>[   50.285741] [drm:intel_dump_pipe_config [i915]] output_types: EDP (0x100)
>[   50.285782] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0
>[   50.285822] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 5513179, gmch_n: 8388608, link_m: 229715, link_n: 524288, tu: 64
>[   50.285859] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[   50.285894] [drm:intel_dump_pipe_config [i915]] requested mode:
>[   50.285927] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 147800 1920 1968 2000 2200 1080 1083 1089 1120 0x48 0x9
>[   50.285965] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[   50.285993] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 48 118300 1920 1968 2000 2200 1080 1083 1089 1120 0x40 0x9
>[   50.286087] [drm:intel_dump_pipe_config [i915]] crtc timings: 118300 1920 1968 2000 2200 1080 1083 1089 1120, type: 0x40 flags: 0x9
>[   50.286134] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 118300
>[   50.286178] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[   50.286229] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   50.286277] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[   50.286333] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[   50.286374] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[   50.286423] [drm:intel_dump_pipe_config [i915]] [PLANE:38:plane 1B] disabled, scaler_id = -1
>[   50.286480] [drm:intel_dump_pipe_config [i915]] [PLANE:41:plane 2B] disabled, scaler_id = -1
>[   50.286529] [drm:intel_dump_pipe_config [i915]] [PLANE:44:cursor B] FB:80, fb = 256x256 format = AR24 little-endian (0x34325241)
>[   50.286579] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+-956+-536 dst 956x536+-956+-536
>[   50.286635] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[   50.286717] [drm:intel_find_shared_dpll [i915]] [CRTC:47:pipe B] allocated DPLL 0
>[   50.286769] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe B
>[   50.291234] [drm:intel_disable_sagv [i915]] Disabling the SAGV
>[   50.291302] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DDI A]
>[   50.291357] [drm:intel_atomic_commit_tail [i915]] [ENCODER:68:DDI B]
>[   50.291404] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST A]
>[   50.291447] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST B]
>[   50.291488] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST C]
>[   50.291529] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI C]
>[   50.291574] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   50.291620] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   50.291663] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 2
>[   50.291705] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 3
>[   50.307698] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 2, on? 0) for crtc 47
>[   50.307752] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[   50.307823] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[   50.307881] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[   50.774887] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[   50.774958] [drm:wait_panel_status [i915]] Wait complete
>[   50.775036] [drm:edp_panel_on [i915]] Wait for panel power on
>[   50.775149] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[   50.846232] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[   50.846297] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[   50.846356] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[   50.846467] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[   50.977339] [drm:wait_panel_status [i915]] Wait complete
>[   50.977395] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[   50.977482] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[   50.977594] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[   50.978845] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[   50.978902] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[   50.978949] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   50.978995] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[   50.979789] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[   50.979843] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   50.979901] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   50.980638] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[   50.980695] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   50.980748] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   50.981485] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[   50.981542] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[   50.982578] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 05000000
>[   50.982617] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   50.982655] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 1
>[   50.983641] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 05000000
>[   50.983654] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   50.983667] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 1
>[   50.984595] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[   50.984609] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:59:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2
>[   50.984854] [drm:intel_enable_pipe [i915]] enabling pipe B
>[   50.984886] [drm:intel_edp_backlight_on [i915]] 
>[   50.984900] [drm:intel_panel_enable_backlight [i915]] pipe B
>[   50.984979] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 6818
>[   50.985041] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS
>[   51.005823] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:59:eDP-1]
>[   51.005863] [drm:intel_atomic_commit_tail [i915]] [CRTC:47:pipe B]
>[   51.005914] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   51.006046] [drm:drm_mode_setcrtc [drm]] [CRTC:57:pipe C]
>[   51.008326] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:59:eDP-1]
>[   51.008399] [drm:intel_dp_detect [i915]] [CONNECTOR:59:eDP-1]
>[   51.008475] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[   51.008541] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[   51.008603] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[   51.009077] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[   51.009873] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   51.009915] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   51.010019] [drm:intel_connector_update_modes [i915]] ELD: no CEA Extension found
>[   51.010077] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:59:eDP-1] probed modes :
>[   51.010116] [drm:drm_mode_debug_printmodeline [drm]] Modeline 60:"1920x1080" 60 147800 1920 1968 2000 2200 1080 1083 1089 1120 0x48 0x9
>[   51.010150] [drm:drm_mode_debug_printmodeline [drm]] Modeline 61:"1920x1080" 48 118300 1920 1968 2000 2200 1080 1083 1089 1120 0x40 0x9
>[   51.010192] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:69:DP-1]
>[   51.010264] [drm:intel_dp_detect [i915]] [CONNECTOR:69:DP-1]
>[   51.011153] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c2 01 01 15 01 81 02 01 04 01 0f 00 01
>[   51.012749] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[   51.012817] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[   51.012882] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[   51.013678] [drm:drm_dp_read_desc [drm_kms_helper]] DP branch: OUI 00-1c-f8 dev-ID 176GB0 HW-rev 1.0 SW-rev 7.38 quirks 0x0000
>[   51.014417] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[   51.017266] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   51.018316] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   51.019598] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   51.020630] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   51.022084] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   51.023791] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   51.024858] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   51.026311] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   51.028018] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   51.029724] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   51.031431] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   51.033931] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   51.035628] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   51.037334] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   51.039040] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   51.040747] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   51.042453] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   51.044160] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   51.045867] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
>[   51.047302] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[   51.047966] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   51.047973] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   51.047983] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   51.047988] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   51.048092] [drm:drm_edid_to_eld [drm]] ELD monitor Q2775
>[   51.048098] [drm:drm_edid_to_eld [drm]] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>[   51.048124] [drm:intel_connector_update_modes [i915]] ELD size 28, SAD count 1
>[   51.048228] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:69:DP-1] probed modes :
>[   51.048236] [drm:drm_mode_debug_printmodeline [drm]] Modeline 86:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x48 0x5
>[   51.048244] [drm:drm_mode_debug_printmodeline [drm]] Modeline 87:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   51.048250] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   51.048257] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   51.048263] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   51.048268] [drm:drm_mode_debug_printmodeline [drm]] Modeline 114:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   51.048274] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   51.048280] [drm:drm_mode_debug_printmodeline [drm]] Modeline 91:"1280x1440" 60 156000 1280 1376 1512 1744 1440 1443 1453 1493 0x40 0x6
>[   51.048285] [drm:drm_mode_debug_printmodeline [drm]] Modeline 92:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   51.048291] [drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   51.048297] [drm:drm_mode_debug_printmodeline [drm]] Modeline 94:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   51.048302] [drm:drm_mode_debug_printmodeline [drm]] Modeline 93:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[   51.048308] [drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[   51.048314] [drm:drm_mode_debug_printmodeline [drm]] Modeline 88:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   51.048319] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   51.048325] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   51.048331] [drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   51.048336] [drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   51.048342] [drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   51.048347] [drm:drm_mode_debug_printmodeline [drm]] Modeline 107:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   51.048353] [drm:drm_mode_debug_printmodeline [drm]] Modeline 108:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   51.048358] [drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[   51.048364] [drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   51.048370] [drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[   51.048375] [drm:drm_mode_debug_printmodeline [drm]] Modeline 90:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   51.048381] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   51.048386] [drm:drm_mode_debug_printmodeline [drm]] Modeline 89:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   51.048392] [drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   51.048398] [drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   51.048403] [drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   51.048409] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   51.048414] [drm:drm_mode_debug_printmodeline [drm]] Modeline 101:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   51.048420] [drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   51.048442] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:73:HDMI-A-1]
>[   51.048459] [drm:intel_hdmi_detect [i915]] [CONNECTOR:73:HDMI-A-1]
>[   51.107927] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 5
>[   51.139365] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   51.139404] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[   51.139437] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[   51.171390] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   51.171402] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[   51.231762] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 5
>[   51.263507] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[   51.263510] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:73:HDMI-A-1] disconnected
>[   51.263518] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:76:HDMI-A-2]
>[   51.263531] [drm:intel_hdmi_detect [i915]] [CONNECTOR:76:HDMI-A-2]
>[   51.266110] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   51.266123] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   51.267851] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   51.267863] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpc
>[   51.267878] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[   51.267890] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpc. force bit now 1
>[   51.271076] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpc
>[   51.271088] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpc. force bit now 0
>[   51.273670] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>[   51.273683] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   51.275857] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>[   51.275866] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[   51.275870] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:76:HDMI-A-2] disconnected
>[   51.336878] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[   51.336947] [drm:intel_edp_backlight_off [i915]] 
>[   51.543975] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[   51.544093] [drm:intel_disable_pipe [i915]] disabling pipe B
>[   51.548219] [drm:intel_edp_panel_off.part.30 [i915]] Turn eDP port A panel power off
>[   51.548308] [drm:intel_edp_panel_off.part.30 [i915]] Wait for panel power off time
>[   51.548428] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000000
>[   51.600378] [drm:wait_panel_status [i915]] Wait complete
>[   51.600424] [drm:intel_power_well_disable [i915]] disabling DDI A/E IO power well
>[   51.600488] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 2, on? 1) for crtc 47
>[   51.600538] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[   51.600619] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[   51.600666] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[   51.600708] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[   51.600792] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DDI A]
>[   51.600859] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[   51.600907] [drm:intel_atomic_commit_tail [i915]] [ENCODER:68:DDI B]
>[   51.600949] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST A]
>[   51.600988] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST B]
>[   51.601025] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST C]
>[   51.601062] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI C]
>[   51.601107] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:59:eDP-1]
>[   51.601151] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   51.601192] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   51.601233] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 2
>[   51.601272] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 3
>[   51.608755] [drm:intel_atomic_commit_tail [i915]] [CRTC:47:pipe B]
>[   51.608807] [drm:intel_enable_sagv [i915]] Enabling the SAGV
>[   51.609105] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[   51.609198] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe A
>[   51.609253] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[   51.609371] [drm:intel_disable_pipe [i915]] disabling pipe A
>[   51.627532] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[   51.627600] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[   51.664354] [drm:intel_disable_shared_dpll [i915]] disable DPLL 1 (active 1, on? 1) for crtc 37
>[   51.664422] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 1
>[   51.664508] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DDI A]
>[   51.664561] [drm:intel_atomic_commit_tail [i915]] [ENCODER:68:DDI B]
>[   51.664614] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST A]
>[   51.664660] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST B]
>[   51.664704] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST C]
>[   51.664748] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI C]
>[   51.664799] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:69:DP-1]
>[   51.664851] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   51.664899] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   51.664945] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 2
>[   51.664990] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 3
>[   51.665041] [drm:intel_power_well_disable [i915]] disabling power well 2
>[   51.665111] [drm:intel_atomic_commit_tail [i915]] [CRTC:37:pipe A]
>[   51.665161] [drm:intel_power_well_disable [i915]] disabling DC off
>[   51.665203] [drm:skl_enable_dc6 [i915]] Enabling DC6
>[   51.665243] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 02
>[   51.665661] [drm:intel_power_well_disable [i915]] disabling always-on
>[   51.697656] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   51.697673] [drm:drm_mode_setcrtc [drm]] [CRTC:37:pipe A]
>[   51.697687] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:69:DP-1]
>[   51.697730] [drm:intel_atomic_check [i915]] [CONNECTOR:69:DP-1] checking for sink bpp constrains
>[   51.697752] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 540000 pixel clock 241500KHz
>[   51.697779] [drm:intel_dp_compute_config [i915]] DP link bw 14 rate select 00 lane count 2 clock 540000 bpp 30
>[   51.697796] [drm:intel_dp_compute_config [i915]] DP link bw required 905625 available 1080000
>[   51.697816] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 30, dithering: 0
>[   51.697837] [drm:intel_dump_pipe_config [i915]] [CRTC:37:pipe A][modeset]
>[   51.697857] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80)
>[   51.697874] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 30, dithering: 0
>[   51.697891] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 7034197, gmch_n: 8388608, link_m: 468946, link_n: 1048576, tu: 64
>[   51.697906] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 0
>[   51.697921] [drm:intel_dump_pipe_config [i915]] requested mode:
>[   51.697934] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x48 0x5
>[   51.697949] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[   51.697960] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x48 0x5
>[   51.697977] [drm:intel_dump_pipe_config [i915]] crtc timings: 241500 2560 2608 2640 2720 1440 1443 1448 1481, type: 0x48 flags: 0x5
>[   51.697993] [drm:intel_dump_pipe_config [i915]] port clock: 540000, pipe src size: 2560x1440, pixel rate 241500
>[   51.698007] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[   51.698022] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   51.698037] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[   51.698052] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x5, cfgcr1: 0x0, cfgcr2: 0x0
>[   51.698066] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[   51.698081] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1
>[   51.698095] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1
>[   51.698110] [drm:intel_dump_pipe_config [i915]] [PLANE:34:cursor A] disabled, scaler_id = -1
>[   51.698130] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[   51.698153] [drm:intel_find_shared_dpll [i915]] [CRTC:37:pipe A] allocated DPLL 1
>[   51.698171] [drm:intel_reference_shared_dpll [i915]] using DPLL 1 for pipe A
>[   51.705195] [drm:intel_power_well_enable [i915]] enabling always-on
>[   51.705207] [drm:intel_power_well_enable [i915]] enabling DC off
>[   51.705594] [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
>[   51.705609] [drm:intel_power_well_enable [i915]] enabling power well 2
>[   51.705635] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DDI A]
>[   51.705651] [drm:intel_atomic_commit_tail [i915]] [ENCODER:68:DDI B]
>[   51.705679] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST A]
>[   51.705692] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST B]
>[   51.705703] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST C]
>[   51.705715] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI C]
>[   51.705728] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   51.705742] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   51.705755] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 2
>[   51.705767] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 3
>[   51.705782] [drm:intel_enable_shared_dpll [i915]] enable DPLL 1 (active 1, on? 0) for crtc 37
>[   51.705795] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 1
>[   51.707869] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[   51.709495] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[   51.709511] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[   51.709524] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   51.709538] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[   51.714561] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[   51.714574] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[   51.719596] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[   51.721858] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:69:DP-1] Link Training Passed at Link Rate = 540000, Lane count = 2
>[   51.722289] [drm:intel_enable_pipe [i915]] enabling pipe A
>[   51.722314] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS
>[   51.722330] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:69:DP-1], [ENCODER:68:DDI B]
>[   51.722344] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe A, 28 bytes ELD
>[   51.722360] [drm:hsw_audio_config_update [i915]] using Maud 784, Naud 18750
>[   51.722382] [drm] Reducing the compressed framebuffer size. This may lead to less power savings than a non-reduced-size. Try to increase stolen memory size if available in BIOS.
>[   51.722399] [drm:intel_fbc_enable [i915]] reserved 3686400 bytes of contiguous stolen space for FBC, threshold: 4
>[   51.722415] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[   51.739214] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:69:DP-1]
>[   51.739235] [drm:intel_atomic_commit_tail [i915]] [CRTC:37:pipe A]
>[   51.739264] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   51.743092] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   51.743105] [drm:drm_mode_setcrtc [drm]] [CRTC:47:pipe B]
>[   51.743116] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:59:eDP-1]
>[   51.743148] [drm:intel_atomic_check [i915]] [CONNECTOR:59:eDP-1] checking for sink bpp constrains
>[   51.743166] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[   51.743177] [drm:drm_mode_debug_printmodeline [drm]] Modeline 64:"1920x1080" 48 118300 1920 1968 2000 2200 1080 1083 1089 1120 0x40 0x9
>[   51.743195] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 118300KHz
>[   51.743218] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24
>[   51.743232] [drm:intel_dp_compute_config [i915]] DP link bw required 354900 available 540000
>[   51.743246] [drm:intel_dp_compute_config [i915]] PSR disable by flag
>[   51.743262] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[   51.743279] [drm:intel_dump_pipe_config [i915]] [CRTC:47:pipe B][modeset]
>[   51.743294] [drm:intel_dump_pipe_config [i915]] output_types: EDP (0x100)
>[   51.743308] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0
>[   51.743322] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 5513179, gmch_n: 8388608, link_m: 229715, link_n: 524288, tu: 64
>[   51.743335] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[   51.743347] [drm:intel_dump_pipe_config [i915]] requested mode:
>[   51.743358] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 147800 1920 1968 2000 2200 1080 1083 1089 1120 0x48 0x9
>[   51.743370] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[   51.743379] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 48 118300 1920 1968 2000 2200 1080 1083 1089 1120 0x40 0x9
>[   51.743393] [drm:intel_dump_pipe_config [i915]] crtc timings: 118300 1920 1968 2000 2200 1080 1083 1089 1120, type: 0x40 flags: 0x9
>[   51.743407] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 118300
>[   51.743419] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[   51.743431] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   51.743443] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[   51.743455] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0
>[   51.743467] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[   51.743479] [drm:intel_dump_pipe_config [i915]] [PLANE:38:plane 1B] disabled, scaler_id = -1
>[   51.743490] [drm:intel_dump_pipe_config [i915]] [PLANE:41:plane 2B] disabled, scaler_id = -1
>[   51.743503] [drm:intel_dump_pipe_config [i915]] [PLANE:44:cursor B] FB:80, fb = 256x256 format = AR24 little-endian (0x34325241)
>[   51.743515] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+-956+-536 dst 956x536+-956+-536
>[   51.743531] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[   51.743550] [drm:intel_find_shared_dpll [i915]] [CRTC:47:pipe B] allocated DPLL 0
>[   51.743564] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe B
>[   51.756058] [drm:intel_disable_sagv [i915]] Disabling the SAGV
>[   51.756088] [drm:intel_atomic_commit_tail [i915]] [ENCODER:58:DDI A]
>[   51.756111] [drm:intel_atomic_commit_tail [i915]] [ENCODER:68:DDI B]
>[   51.756131] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST A]
>[   51.756150] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST B]
>[   51.756168] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST C]
>[   51.756185] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI C]
>[   51.756205] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   51.756225] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 1
>[   51.756244] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 2
>[   51.756261] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 3
>[   51.772473] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 2, on? 0) for crtc 47
>[   51.772500] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[   51.772535] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[   51.772569] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[   52.216988] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[   52.217063] [drm:wait_panel_status [i915]] Wait complete
>[   52.217145] [drm:edp_panel_on [i915]] Wait for panel power on
>[   52.217259] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[   52.288322] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[   52.288388] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[   52.288445] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[   52.288552] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[   52.418980] [drm:wait_panel_status [i915]] Wait complete
>[   52.419036] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[   52.419125] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[   52.419234] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[   52.420456] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[   52.420505] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[   52.420548] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   52.420593] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[   52.421354] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[   52.421399] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   52.421440] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   52.422153] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[   52.422192] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   52.422231] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[   52.422945] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[   52.422986] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[   52.424006] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 05000000
>[   52.424045] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   52.424084] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 1
>[   52.425035] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 05000000
>[   52.425049] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[   52.425063] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 1
>[   52.425992] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[   52.426007] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:59:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2
>[   52.426252] [drm:intel_enable_pipe [i915]] enabling pipe B
>[   52.426283] [drm:intel_edp_backlight_on [i915]] 
>[   52.426298] [drm:intel_panel_enable_backlight [i915]] pipe B
>[   52.426377] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 6818
>[   52.426439] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS
>[   52.447289] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:59:eDP-1]
>[   52.447340] [drm:intel_atomic_commit_tail [i915]] [CRTC:47:pipe B]
>[   52.447396] [drm:verify_single_dpll_state.isra.115 [i915]] DPLL 0
>[   52.447540] [drm:drm_mode_setcrtc [drm]] [CRTC:57:pipe C]
>[   52.482850] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   52.490856] [drm:drm_mode_addfb2 [drm]] [FB:119]
>[   55.611901] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[   55.612022] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000007
>[   56.363411] [drm:drm_mode_addfb2 [drm]] [FB:79]
>[   56.365616] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   56.383962] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   56.385024] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   56.396333] [drm:drm_mode_addfb2 [drm]] [FB:79]
>[   56.404684] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   56.412670] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   56.425670] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   56.430441] [drm:drm_mode_addfb2 [drm]] [FB:79]
>[   56.446551] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   56.472587] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   56.476035] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   57.280653] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   57.283966] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   57.297581] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   57.300359] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   57.314454] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   57.321199] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   57.331006] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   57.342155] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   57.346636] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   57.362994] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   57.381222] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   57.383917] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   57.397293] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   57.404679] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   57.414042] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   57.425386] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   57.430329] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   57.446299] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   57.464243] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   57.467038] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   57.480787] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   57.487997] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   57.497402] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   57.508844] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   57.513294] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   57.529527] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   57.613740] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   57.615804] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   57.697770] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   57.699765] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   57.731220] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   57.733226] [drm:drm_mode_addfb2 [drm]] [FB:82]
>[   57.747710] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   57.758731] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   57.763520] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   57.779573] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   58.370591] [drm:drm_mode_addfb2 [drm]] [FB:79]
>[   58.372629] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   58.955837] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   58.957612] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   59.348297] [drm:drm_mode_addfb2 [drm]] [FB:79]
>[   59.350176] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   59.363950] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   59.365686] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   59.752264] [drm:drm_mode_addfb2 [drm]] [FB:79]
>[   59.754004] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   60.288361] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   60.290149] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   60.862436] [drm:drm_mode_addfb2 [drm]] [FB:79]
>[   60.864911] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   61.331453] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   61.333914] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   61.348085] [drm:drm_mode_addfb2 [drm]] [FB:79]
>[   61.350128] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   61.815871] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   61.818440] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   61.935822] [drm:drm_mode_addfb2 [drm]] [FB:79]
>[   61.938439] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   62.087827] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   62.090419] [drm:drm_mode_addfb2 [drm]] [FB:81]
>[   62.351835] [drm:drm_mode_addfb2 [drm]] [FB:79]
>[   62.354415] [drm:drm_mode_addfb2 [drm]] [FB:80]
>[   62.753432] [drm:drm_mode_addfb2 [drm]] [FB:77]
>[   62.754411] [drm:drm_mode_addfb2 [drm]] [FB:81]

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Attachments on bug 106223: 139073 | 139074 | 139077 | 139078 | 139079 | 139080 | 145386 | 145405 | 145407

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