Attachment 141100 Details for Bug 107543 – dmesg at drm tip

dmesg at drm tip

dmesg_drm_tip.txt (text/plain), 602.29 KB, created by Dan Booker on 2018-08-15 09:59:27 UTC

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Creator: Dan Booker

Created: 2018-08-15 09:59:27 UTC

Size: 602.29 KB

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>[Wed Aug 15 10:27:33 2018] Linux version 4.18.0+ (eureka@eureka-celeron-dan) (gcc version 6.3.0 20170516 (Debian 6.3.0-18+deb9u1)) #3 SMP Wed Aug 15 09:27:41 BST 2018
>[Wed Aug 15 10:27:33 2018] Command line: BOOT_IMAGE=/boot/vmlinuz-4.18.0+ root=UUID=0124a9a7-0101-464e-a335-4ea2e1c13a57 ro text i915.enable_fbc=0 i915.enable_psr=0 drm.debug=0x1e log_buf_len=1M
>[Wed Aug 15 10:27:33 2018] x86/fpu: Supporting XSAVE feature 0x001: 'x87 floating point registers'
>[Wed Aug 15 10:27:33 2018] x86/fpu: Supporting XSAVE feature 0x002: 'SSE registers'
>[Wed Aug 15 10:27:33 2018] x86/fpu: Supporting XSAVE feature 0x008: 'MPX bounds registers'
>[Wed Aug 15 10:27:33 2018] x86/fpu: Supporting XSAVE feature 0x010: 'MPX CSR'
>[Wed Aug 15 10:27:33 2018] x86/fpu: xstate_offset[3]:  576, xstate_sizes[3]:   64
>[Wed Aug 15 10:27:33 2018] x86/fpu: xstate_offset[4]:  640, xstate_sizes[4]:   64
>[Wed Aug 15 10:27:33 2018] x86/fpu: Enabled xstate features 0x1b, context size is 704 bytes, using 'compacted' format.
>[Wed Aug 15 10:27:33 2018] BIOS-provided physical RAM map:
>[Wed Aug 15 10:27:33 2018] BIOS-e820: [mem 0x0000000000000000-0x000000000009c3ff] usable
>[Wed Aug 15 10:27:33 2018] BIOS-e820: [mem 0x000000000009c400-0x000000000009ffff] reserved
>[Wed Aug 15 10:27:33 2018] BIOS-e820: [mem 0x00000000000e0000-0x00000000000fffff] reserved
>[Wed Aug 15 10:27:33 2018] BIOS-e820: [mem 0x0000000000100000-0x0000000085771fff] usable
>[Wed Aug 15 10:27:33 2018] BIOS-e820: [mem 0x0000000085772000-0x0000000085772fff] ACPI NVS
>[Wed Aug 15 10:27:33 2018] BIOS-e820: [mem 0x0000000085773000-0x0000000085773fff] reserved
>[Wed Aug 15 10:27:33 2018] BIOS-e820: [mem 0x0000000085774000-0x000000008c338fff] usable
>[Wed Aug 15 10:27:33 2018] BIOS-e820: [mem 0x000000008c339000-0x000000008c79afff] reserved
>[Wed Aug 15 10:27:33 2018] BIOS-e820: [mem 0x000000008c79b000-0x000000008c7d7fff] ACPI data
>[Wed Aug 15 10:27:33 2018] BIOS-e820: [mem 0x000000008c7d8000-0x000000008cbb3fff] ACPI NVS
>[Wed Aug 15 10:27:33 2018] BIOS-e820: [mem 0x000000008cbb4000-0x000000008cffefff] reserved
>[Wed Aug 15 10:27:33 2018] BIOS-e820: [mem 0x000000008cfff000-0x000000008cffffff] usable
>[Wed Aug 15 10:27:33 2018] BIOS-e820: [mem 0x000000008d000000-0x000000008fffffff] reserved
>[Wed Aug 15 10:27:33 2018] BIOS-e820: [mem 0x00000000e0000000-0x00000000efffffff] reserved
>[Wed Aug 15 10:27:33 2018] BIOS-e820: [mem 0x00000000fe000000-0x00000000fe010fff] reserved
>[Wed Aug 15 10:27:33 2018] BIOS-e820: [mem 0x00000000fec00000-0x00000000fec00fff] reserved
>[Wed Aug 15 10:27:33 2018] BIOS-e820: [mem 0x00000000fed00000-0x00000000fed00fff] reserved
>[Wed Aug 15 10:27:33 2018] BIOS-e820: [mem 0x00000000fee00000-0x00000000fee00fff] reserved
>[Wed Aug 15 10:27:33 2018] BIOS-e820: [mem 0x00000000ff000000-0x00000000ffffffff] reserved
>[Wed Aug 15 10:27:33 2018] BIOS-e820: [mem 0x0000000100000000-0x000000016dffffff] usable
>[Wed Aug 15 10:27:33 2018] NX (Execute Disable) protection: active
>[Wed Aug 15 10:27:33 2018] SMBIOS 3.1.1 present.
>[Wed Aug 15 10:27:33 2018] DMI: Default string ADD-KLU/Default string, BIOS 0002 07/06/2018
>[Wed Aug 15 10:27:33 2018] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved
>[Wed Aug 15 10:27:33 2018] e820: remove [mem 0x000a0000-0x000fffff] usable
>[Wed Aug 15 10:27:33 2018] last_pfn = 0x16e000 max_arch_pfn = 0x400000000
>[Wed Aug 15 10:27:33 2018] MTRR default type: write-back
>[Wed Aug 15 10:27:33 2018] MTRR fixed ranges enabled:
>[Wed Aug 15 10:27:33 2018]   00000-9FFFF write-back
>[Wed Aug 15 10:27:33 2018]   A0000-BFFFF uncachable
>[Wed Aug 15 10:27:33 2018]   C0000-FFFFF write-protect
>[Wed Aug 15 10:27:33 2018] MTRR variable ranges enabled:
>[Wed Aug 15 10:27:33 2018]   0 base 00C0000000 mask 7FC0000000 uncachable
>[Wed Aug 15 10:27:33 2018]   1 base 00A0000000 mask 7FE0000000 uncachable
>[Wed Aug 15 10:27:33 2018]   2 base 0090000000 mask 7FF0000000 uncachable
>[Wed Aug 15 10:27:33 2018]   3 base 008E000000 mask 7FFE000000 uncachable
>[Wed Aug 15 10:27:33 2018]   4 base 008D800000 mask 7FFF800000 uncachable
>[Wed Aug 15 10:27:33 2018]   5 disabled
>[Wed Aug 15 10:27:33 2018]   6 disabled
>[Wed Aug 15 10:27:33 2018]   7 disabled
>[Wed Aug 15 10:27:33 2018]   8 disabled
>[Wed Aug 15 10:27:33 2018]   9 disabled
>[Wed Aug 15 10:27:33 2018] x86/PAT: Configuration [0-7]: WB  WC  UC- UC  WB  WP  UC- WT  
>[Wed Aug 15 10:27:33 2018] last_pfn = 0x8d000 max_arch_pfn = 0x400000000
>[Wed Aug 15 10:27:33 2018] found SMP MP-table at [mem 0x000fcd00-0x000fcd0f] mapped at [(____ptrval____)]
>[Wed Aug 15 10:27:33 2018] Base memory trampoline at [(____ptrval____)] 96000 size 24576
>[Wed Aug 15 10:27:33 2018] Using GB pages for direct mapping
>[Wed Aug 15 10:27:33 2018] BRK [0x161c37000, 0x161c37fff] PGTABLE
>[Wed Aug 15 10:27:33 2018] BRK [0x161c38000, 0x161c38fff] PGTABLE
>[Wed Aug 15 10:27:33 2018] BRK [0x161c39000, 0x161c39fff] PGTABLE
>[Wed Aug 15 10:27:33 2018] BRK [0x161c3a000, 0x161c3afff] PGTABLE
>[Wed Aug 15 10:27:33 2018] BRK [0x161c3b000, 0x161c3bfff] PGTABLE
>[Wed Aug 15 10:27:33 2018] BRK [0x161c3c000, 0x161c3cfff] PGTABLE
>[Wed Aug 15 10:27:33 2018] BRK [0x161c3d000, 0x161c3dfff] PGTABLE
>[Wed Aug 15 10:27:33 2018] BRK [0x161c3e000, 0x161c3efff] PGTABLE
>[Wed Aug 15 10:27:33 2018] BRK [0x161c3f000, 0x161c3ffff] PGTABLE
>[Wed Aug 15 10:27:33 2018] log_buf_len: 1048576 bytes
>[Wed Aug 15 10:27:33 2018] early log buf free: 126544(96%)
>[Wed Aug 15 10:27:33 2018] RAMDISK: [mem 0x35707000-0x36b7afff]
>[Wed Aug 15 10:27:33 2018] ACPI: Early table checksum verification disabled
>[Wed Aug 15 10:27:33 2018] ACPI: RSDP 0x00000000000F05B0 000024 (v02 ALASKA)
>[Wed Aug 15 10:27:33 2018] ACPI: XSDT 0x000000008C7A70A8 0000D4 (v01 ALASKA A M I    01072009 AMI  00010013)
>[Wed Aug 15 10:27:33 2018] ACPI: FACP 0x000000008C7CDD88 000114 (v06 ALASKA A M I    01072009 AMI  00010013)
>[Wed Aug 15 10:27:33 2018] ACPI: DSDT 0x000000008C7A7210 026B73 (v02 ALASKA A M I    01072009 INTL 20160422)
>[Wed Aug 15 10:27:33 2018] ACPI: FACS 0x000000008CBB3F00 000040
>[Wed Aug 15 10:27:33 2018] ACPI: APIC 0x000000008C7CDEA0 000068 (v03 ALASKA A M I    01072009 AMI  00010013)
>[Wed Aug 15 10:27:33 2018] ACPI: FPDT 0x000000008C7CDF08 000044 (v01 ALASKA A M I    01072009 AMI  00010013)
>[Wed Aug 15 10:27:33 2018] ACPI: FIDT 0x000000008C7CDF50 00009C (v01 ALASKA A M I    01072009 AMI  00010013)
>[Wed Aug 15 10:27:33 2018] ACPI: MCFG 0x000000008C7CDFF0 00003C (v01 ALASKA A M I    01072009 MSFT 00000097)
>[Wed Aug 15 10:27:33 2018] ACPI: SSDT 0x000000008C7CE030 0003A3 (v01 SataRe SataTabl 00001000 INTL 20160422)
>[Wed Aug 15 10:27:33 2018] ACPI: SSDT 0x000000008C7CE3D8 003158 (v02 SaSsdt SaSsdt   00003000 INTL 20160422)
>[Wed Aug 15 10:27:33 2018] ACPI: HPET 0x000000008C7D1530 000038 (v01 INTEL  KBL-ULT  00000001 MSFT 0000005F)
>[Wed Aug 15 10:27:33 2018] ACPI: SSDT 0x000000008C7D1568 0011C0 (v02 INTEL  Ther_Rvp 00001000 INTL 20160422)
>[Wed Aug 15 10:27:33 2018] ACPI: SSDT 0x000000008C7D2728 000024 (v02 INTEL  xh_OEMBD 00000000 INTL 20160422)
>[Wed Aug 15 10:27:33 2018] ACPI: UEFI 0x000000008C7D2750 000042 (v01 ALASKA A M I    00000002      01000013)
>[Wed Aug 15 10:27:33 2018] ACPI: SSDT 0x000000008C7D2798 0017AE (v02 CpuRef CpuSsdt  00003000 INTL 20160422)
>[Wed Aug 15 10:27:33 2018] ACPI: LPIT 0x000000008C7D3F48 000094 (v01 INTEL  KBL-ULT  00000000 MSFT 0000005F)
>[Wed Aug 15 10:27:33 2018] ACPI: SSDT 0x000000008C7D3FE0 000141 (v02 INTEL  HdaDsp   00000000 INTL 20160422)
>[Wed Aug 15 10:27:33 2018] ACPI: SSDT 0x000000008C7D4128 00029F (v02 INTEL  sensrhub 00000000 INTL 20160422)
>[Wed Aug 15 10:27:33 2018] ACPI: SSDT 0x000000008C7D43C8 003002 (v02 INTEL  PtidDevc 00001000 INTL 20160422)
>[Wed Aug 15 10:27:33 2018] ACPI: SSDT 0x000000008C7D73D0 000517 (v02 INTEL  TbtTypeC 00000000 INTL 20160422)
>[Wed Aug 15 10:27:33 2018] ACPI: DBGP 0x000000008C7D78E8 000034 (v01 INTEL           00000002 MSFT 0000005F)
>[Wed Aug 15 10:27:33 2018] ACPI: DBG2 0x000000008C7D7920 000054 (v00 INTEL           00000002 MSFT 0000005F)
>[Wed Aug 15 10:27:33 2018] ACPI: DMAR 0x000000008C7D7978 0000A8 (v01 INTEL  EDK2     00000001 INTL 00000001)
>[Wed Aug 15 10:27:33 2018] ACPI: ASF! 0x000000008C7D7A20 0000A0 (v32 INTEL   HCG     00000001 TFSM 000F4240)
>[Wed Aug 15 10:27:33 2018] ACPI: WSMT 0x000000008C7D7AC0 000028 (v01 ALASKA A M I    01072009 AMI  00010013)
>[Wed Aug 15 10:27:33 2018] ACPI: Local APIC address 0xfee00000
>[Wed Aug 15 10:27:33 2018] No NUMA configuration found
>[Wed Aug 15 10:27:33 2018] Faking a node at [mem 0x0000000000000000-0x000000016dffffff]
>[Wed Aug 15 10:27:33 2018] NODE_DATA(0) allocated [mem 0x16defb000-0x16defffff]
>[Wed Aug 15 10:27:33 2018] Zone ranges:
>[Wed Aug 15 10:27:33 2018]   DMA      [mem 0x0000000000001000-0x0000000000ffffff]
>[Wed Aug 15 10:27:33 2018]   DMA32    [mem 0x0000000001000000-0x00000000ffffffff]
>[Wed Aug 15 10:27:33 2018]   Normal   [mem 0x0000000100000000-0x000000016dffffff]
>[Wed Aug 15 10:27:33 2018]   Device   empty
>[Wed Aug 15 10:27:33 2018] Movable zone start for each node
>[Wed Aug 15 10:27:33 2018] Early memory node ranges
>[Wed Aug 15 10:27:33 2018]   node   0: [mem 0x0000000000001000-0x000000000009bfff]
>[Wed Aug 15 10:27:33 2018]   node   0: [mem 0x0000000000100000-0x0000000085771fff]
>[Wed Aug 15 10:27:33 2018]   node   0: [mem 0x0000000085774000-0x000000008c338fff]
>[Wed Aug 15 10:27:33 2018]   node   0: [mem 0x000000008cfff000-0x000000008cffffff]
>[Wed Aug 15 10:27:33 2018]   node   0: [mem 0x0000000100000000-0x000000016dffffff]
>[Wed Aug 15 10:27:33 2018] Reserved but unavailable: 15661 pages
>[Wed Aug 15 10:27:33 2018] Initmem setup node 0 [mem 0x0000000000001000-0x000000016dffffff]
>[Wed Aug 15 10:27:33 2018] On node 0 totalpages: 1024723
>[Wed Aug 15 10:27:33 2018]   DMA zone: 64 pages used for memmap
>[Wed Aug 15 10:27:33 2018]   DMA zone: 21 pages reserved
>[Wed Aug 15 10:27:33 2018]   DMA zone: 3995 pages, LIFO batch:0
>[Wed Aug 15 10:27:33 2018]   DMA32 zone: 8909 pages used for memmap
>[Wed Aug 15 10:27:33 2018]   DMA32 zone: 570168 pages, LIFO batch:31
>[Wed Aug 15 10:27:33 2018]   Normal zone: 7040 pages used for memmap
>[Wed Aug 15 10:27:33 2018]   Normal zone: 450560 pages, LIFO batch:31
>[Wed Aug 15 10:27:33 2018] Reserving Intel graphics memory at [mem 0x8e000000-0x8fffffff]
>[Wed Aug 15 10:27:33 2018] ACPI: PM-Timer IO Port: 0x1808
>[Wed Aug 15 10:27:33 2018] ACPI: Local APIC address 0xfee00000
>[Wed Aug 15 10:27:33 2018] ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1])
>[Wed Aug 15 10:27:33 2018] ACPI: LAPIC_NMI (acpi_id[0x02] high edge lint[0x1])
>[Wed Aug 15 10:27:33 2018] IOAPIC[0]: apic_id 2, version 32, address 0xfec00000, GSI 0-119
>[Wed Aug 15 10:27:33 2018] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
>[Wed Aug 15 10:27:33 2018] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level)
>[Wed Aug 15 10:27:33 2018] ACPI: IRQ0 used by override.
>[Wed Aug 15 10:27:33 2018] ACPI: IRQ9 used by override.
>[Wed Aug 15 10:27:33 2018] Using ACPI (MADT) for SMP configuration information
>[Wed Aug 15 10:27:33 2018] ACPI: HPET id: 0x8086a201 base: 0xfed00000
>[Wed Aug 15 10:27:33 2018] smpboot: Allowing 2 CPUs, 0 hotplug CPUs
>[Wed Aug 15 10:27:33 2018] PM: Registered nosave memory: [mem 0x00000000-0x00000fff]
>[Wed Aug 15 10:27:33 2018] PM: Registered nosave memory: [mem 0x0009c000-0x0009cfff]
>[Wed Aug 15 10:27:33 2018] PM: Registered nosave memory: [mem 0x0009d000-0x0009ffff]
>[Wed Aug 15 10:27:33 2018] PM: Registered nosave memory: [mem 0x000a0000-0x000dffff]
>[Wed Aug 15 10:27:33 2018] PM: Registered nosave memory: [mem 0x000e0000-0x000fffff]
>[Wed Aug 15 10:27:33 2018] PM: Registered nosave memory: [mem 0x85772000-0x85772fff]
>[Wed Aug 15 10:27:33 2018] PM: Registered nosave memory: [mem 0x85773000-0x85773fff]
>[Wed Aug 15 10:27:33 2018] PM: Registered nosave memory: [mem 0x8c339000-0x8c79afff]
>[Wed Aug 15 10:27:33 2018] PM: Registered nosave memory: [mem 0x8c79b000-0x8c7d7fff]
>[Wed Aug 15 10:27:33 2018] PM: Registered nosave memory: [mem 0x8c7d8000-0x8cbb3fff]
>[Wed Aug 15 10:27:33 2018] PM: Registered nosave memory: [mem 0x8cbb4000-0x8cffefff]
>[Wed Aug 15 10:27:33 2018] PM: Registered nosave memory: [mem 0x8d000000-0x8fffffff]
>[Wed Aug 15 10:27:33 2018] PM: Registered nosave memory: [mem 0x90000000-0xdfffffff]
>[Wed Aug 15 10:27:33 2018] PM: Registered nosave memory: [mem 0xe0000000-0xefffffff]
>[Wed Aug 15 10:27:33 2018] PM: Registered nosave memory: [mem 0xf0000000-0xfdffffff]
>[Wed Aug 15 10:27:33 2018] PM: Registered nosave memory: [mem 0xfe000000-0xfe010fff]
>[Wed Aug 15 10:27:33 2018] PM: Registered nosave memory: [mem 0xfe011000-0xfebfffff]
>[Wed Aug 15 10:27:33 2018] PM: Registered nosave memory: [mem 0xfec00000-0xfec00fff]
>[Wed Aug 15 10:27:33 2018] PM: Registered nosave memory: [mem 0xfec01000-0xfecfffff]
>[Wed Aug 15 10:27:33 2018] PM: Registered nosave memory: [mem 0xfed00000-0xfed00fff]
>[Wed Aug 15 10:27:33 2018] PM: Registered nosave memory: [mem 0xfed01000-0xfedfffff]
>[Wed Aug 15 10:27:33 2018] PM: Registered nosave memory: [mem 0xfee00000-0xfee00fff]
>[Wed Aug 15 10:27:33 2018] PM: Registered nosave memory: [mem 0xfee01000-0xfeffffff]
>[Wed Aug 15 10:27:33 2018] PM: Registered nosave memory: [mem 0xff000000-0xffffffff]
>[Wed Aug 15 10:27:33 2018] [mem 0x90000000-0xdfffffff] available for PCI devices
>[Wed Aug 15 10:27:33 2018] Booting paravirtualized kernel on bare hardware
>[Wed Aug 15 10:27:33 2018] clocksource: refined-jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645519600211568 ns
>[Wed Aug 15 10:27:33 2018] random: get_random_bytes called from start_kernel+0x94/0x540 with crng_init=0
>[Wed Aug 15 10:27:33 2018] setup_percpu: NR_CPUS:512 nr_cpumask_bits:512 nr_cpu_ids:2 nr_node_ids:1
>[Wed Aug 15 10:27:33 2018] percpu: Embedded 44 pages/cpu @(____ptrval____) s142360 r8192 d29672 u1048576
>[Wed Aug 15 10:27:33 2018] pcpu-alloc: s142360 r8192 d29672 u1048576 alloc=1*2097152
>[Wed Aug 15 10:27:33 2018] pcpu-alloc: [0] 0 1 
>[Wed Aug 15 10:27:33 2018] Built 1 zonelists, mobility grouping on.  Total pages: 1008689
>[Wed Aug 15 10:27:33 2018] Policy zone: Normal
>[Wed Aug 15 10:27:33 2018] Kernel command line: BOOT_IMAGE=/boot/vmlinuz-4.18.0+ root=UUID=0124a9a7-0101-464e-a335-4ea2e1c13a57 ro text i915.enable_fbc=0 i915.enable_psr=0 drm.debug=0x1e log_buf_len=1M
>[Wed Aug 15 10:27:33 2018] Calgary: detecting Calgary via BIOS EBDA area
>[Wed Aug 15 10:27:33 2018] Calgary: Unable to locate Rio Grande table in EBDA - bailing!
>[Wed Aug 15 10:27:33 2018] Memory: 3922112K/4098892K available (10252K kernel code, 1208K rwdata, 3164K rodata, 1540K init, 652K bss, 176780K reserved, 0K cma-reserved)
>[Wed Aug 15 10:27:33 2018] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
>[Wed Aug 15 10:27:33 2018] Kernel/User page tables isolation: enabled
>[Wed Aug 15 10:27:33 2018] ftrace: allocating 30723 entries in 121 pages
>[Wed Aug 15 10:27:33 2018] Hierarchical RCU implementation.
>[Wed Aug 15 10:27:33 2018] 	RCU restricting CPUs from NR_CPUS=512 to nr_cpu_ids=2.
>[Wed Aug 15 10:27:33 2018] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
>[Wed Aug 15 10:27:33 2018] NR_IRQS: 33024, nr_irqs: 512, preallocated irqs: 16
>[Wed Aug 15 10:27:33 2018] Console: colour VGA+ 80x25
>[Wed Aug 15 10:27:33 2018] console [tty0] enabled
>[Wed Aug 15 10:27:33 2018] ACPI: Core revision 20180531
>[Wed Aug 15 10:27:33 2018] clocksource: hpet: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 79635855245 ns
>[Wed Aug 15 10:27:33 2018] hpet clockevent registered
>[Wed Aug 15 10:27:33 2018] APIC: Switch to symmetric I/O mode setup
>[Wed Aug 15 10:27:33 2018] DMAR: Host address width 39
>[Wed Aug 15 10:27:33 2018] DMAR: DRHD base: 0x000000fed90000 flags: 0x0
>[Wed Aug 15 10:27:33 2018] DMAR: dmar0: reg_base_addr fed90000 ver 1:0 cap 1c0000c40660462 ecap 19e2ff0505e
>[Wed Aug 15 10:27:33 2018] DMAR: DRHD base: 0x000000fed91000 flags: 0x1
>[Wed Aug 15 10:27:33 2018] DMAR: dmar1: reg_base_addr fed91000 ver 1:0 cap d2008c40660462 ecap f050da
>[Wed Aug 15 10:27:33 2018] DMAR: RMRR base: 0x0000008c740000 end: 0x0000008c75ffff
>[Wed Aug 15 10:27:33 2018] DMAR: RMRR base: 0x0000008d800000 end: 0x0000008fffffff
>[Wed Aug 15 10:27:33 2018] DMAR-IR: IOAPIC id 2 under DRHD base  0xfed91000 IOMMU 1
>[Wed Aug 15 10:27:33 2018] DMAR-IR: HPET id 0 under DRHD base 0xfed91000
>[Wed Aug 15 10:27:33 2018] DMAR-IR: Queued invalidation will be enabled to support x2apic and Intr-remapping.
>[Wed Aug 15 10:27:33 2018] DMAR-IR: Enabled IRQ remapping in x2apic mode
>[Wed Aug 15 10:27:33 2018] x2apic enabled
>[Wed Aug 15 10:27:33 2018] Switched APIC routing to cluster x2apic.
>[Wed Aug 15 10:27:33 2018] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
>[Wed Aug 15 10:27:33 2018] tsc: Detected 2200.000 MHz processor
>[Wed Aug 15 10:27:33 2018] tsc: Detected 2208.000 MHz TSC
>[Wed Aug 15 10:27:33 2018] clocksource: tsc-early: mask: 0xffffffffffffffff max_cycles: 0x1fd3b81b95f, max_idle_ns: 440795257325 ns
>[Wed Aug 15 10:27:33 2018] Calibrating delay loop (skipped), value calculated using timer frequency.. 4416.00 BogoMIPS (lpj=8832000)
>[Wed Aug 15 10:27:33 2018] pid_max: default: 32768 minimum: 301
>[Wed Aug 15 10:27:33 2018] Security Framework initialized
>[Wed Aug 15 10:27:33 2018] Yama: becoming mindful.
>[Wed Aug 15 10:27:33 2018] AppArmor: AppArmor initialized
>[Wed Aug 15 10:27:33 2018] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes)
>[Wed Aug 15 10:27:33 2018] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes)
>[Wed Aug 15 10:27:33 2018] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes)
>[Wed Aug 15 10:27:33 2018] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes)
>[Wed Aug 15 10:27:33 2018] CPU: Physical Processor ID: 0
>[Wed Aug 15 10:27:33 2018] CPU: Processor Core ID: 0
>[Wed Aug 15 10:27:33 2018] ENERGY_PERF_BIAS: Set to 'normal', was 'performance'
>[Wed Aug 15 10:27:33 2018] ENERGY_PERF_BIAS: View and update with x86_energy_perf_policy(8)
>[Wed Aug 15 10:27:33 2018] mce: CPU supports 8 MCE banks
>[Wed Aug 15 10:27:33 2018] CPU0: Thermal monitoring enabled (TM1)
>[Wed Aug 15 10:27:33 2018] process: using mwait in idle threads
>[Wed Aug 15 10:27:33 2018] Last level iTLB entries: 4KB 128, 2MB 8, 4MB 8
>[Wed Aug 15 10:27:33 2018] Last level dTLB entries: 4KB 64, 2MB 0, 4MB 0, 1GB 4
>[Wed Aug 15 10:27:33 2018] Spectre V2 : Mitigation: Full generic retpoline
>[Wed Aug 15 10:27:33 2018] Spectre V2 : Spectre v2 mitigation: Filling RSB on context switch
>[Wed Aug 15 10:27:33 2018] Spectre V2 : Spectre v2 mitigation: Enabling Indirect Branch Prediction Barrier
>[Wed Aug 15 10:27:33 2018] Spectre V2 : Enabling Restricted Speculation for firmware calls
>[Wed Aug 15 10:27:33 2018] Speculative Store Bypass: Vulnerable
>[Wed Aug 15 10:27:33 2018] Freeing SMP alternatives memory: 24K
>[Wed Aug 15 10:27:33 2018] TSC deadline timer enabled
>[Wed Aug 15 10:27:33 2018] smpboot: CPU0: Intel(R) Celeron(R) CPU 3965U @ 2.20GHz (family: 0x6, model: 0x8e, stepping: 0x9)
>[Wed Aug 15 10:27:33 2018] Performance Events: PEBS fmt3+, Skylake events, 32-deep LBR, full-width counters, Intel PMU driver.
>[Wed Aug 15 10:27:33 2018] ... version:                4
>[Wed Aug 15 10:27:33 2018] ... bit width:              48
>[Wed Aug 15 10:27:33 2018] ... generic registers:      8
>[Wed Aug 15 10:27:33 2018] ... value mask:             0000ffffffffffff
>[Wed Aug 15 10:27:33 2018] ... max period:             00007fffffffffff
>[Wed Aug 15 10:27:33 2018] ... fixed-purpose events:   3
>[Wed Aug 15 10:27:33 2018] ... event mask:             00000007000000ff
>[Wed Aug 15 10:27:33 2018] Hierarchical SRCU implementation.
>[Wed Aug 15 10:27:33 2018] NMI watchdog: Enabled. Permanently consumes one hw-PMU counter.
>[Wed Aug 15 10:27:33 2018] smp: Bringing up secondary CPUs ...
>[Wed Aug 15 10:27:33 2018] x86: Booting SMP configuration:
>[Wed Aug 15 10:27:33 2018] .... node  #0, CPUs:      #1
>[Wed Aug 15 10:27:33 2018] smp: Brought up 1 node, 2 CPUs
>[Wed Aug 15 10:27:33 2018] smpboot: Max logical packages: 1
>[Wed Aug 15 10:27:33 2018] smpboot: Total of 2 processors activated (8832.00 BogoMIPS)
>[Wed Aug 15 10:27:33 2018] devtmpfs: initialized
>[Wed Aug 15 10:27:33 2018] x86/mm: Memory block size: 128MB
>[Wed Aug 15 10:27:33 2018] PM: Registering ACPI NVS region [mem 0x85772000-0x85772fff] (4096 bytes)
>[Wed Aug 15 10:27:33 2018] PM: Registering ACPI NVS region [mem 0x8c7d8000-0x8cbb3fff] (4046848 bytes)
>[Wed Aug 15 10:27:33 2018] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
>[Wed Aug 15 10:27:33 2018] futex hash table entries: 512 (order: 3, 32768 bytes)
>[Wed Aug 15 10:27:33 2018] pinctrl core: initialized pinctrl subsystem
>[Wed Aug 15 10:27:33 2018] NET: Registered protocol family 16
>[Wed Aug 15 10:27:33 2018] audit: initializing netlink subsys (disabled)
>[Wed Aug 15 10:27:33 2018] audit: type=2000 audit(1534325253.036:1): state=initialized audit_enabled=0 res=1
>[Wed Aug 15 10:27:33 2018] cpuidle: using governor ladder
>[Wed Aug 15 10:27:33 2018] cpuidle: using governor menu
>[Wed Aug 15 10:27:33 2018] ACPI FADT declares the system doesn't support PCIe ASPM, so disable it
>[Wed Aug 15 10:27:33 2018] ACPI: bus type PCI registered
>[Wed Aug 15 10:27:33 2018] acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
>[Wed Aug 15 10:27:33 2018] PCI: MMCONFIG for domain 0000 [bus 00-ff] at [mem 0xe0000000-0xefffffff] (base 0xe0000000)
>[Wed Aug 15 10:27:33 2018] PCI: MMCONFIG at [mem 0xe0000000-0xefffffff] reserved in E820
>[Wed Aug 15 10:27:33 2018] PCI: Using configuration type 1 for base access
>[Wed Aug 15 10:27:33 2018] HugeTLB registered 1.00 GiB page size, pre-allocated 0 pages
>[Wed Aug 15 10:27:33 2018] HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages
>[Wed Aug 15 10:27:33 2018] ACPI: Added _OSI(Module Device)
>[Wed Aug 15 10:27:33 2018] ACPI: Added _OSI(Processor Device)
>[Wed Aug 15 10:27:33 2018] ACPI: Added _OSI(3.0 _SCP Extensions)
>[Wed Aug 15 10:27:33 2018] ACPI: Added _OSI(Processor Aggregator Device)
>[Wed Aug 15 10:27:33 2018] ACPI: Added _OSI(Linux-Dell-Video)
>[Wed Aug 15 10:27:33 2018] ACPI: 10 ACPI AML tables successfully acquired and loaded
>[Wed Aug 15 10:27:33 2018] ACPI: Dynamic OEM Table Load:
>[Wed Aug 15 10:27:33 2018] ACPI: SSDT 0xFFFF8AB2E818B800 00060F (v02 PmRef  Cpu0Ist  00003000 INTL 20160422)
>[Wed Aug 15 10:27:33 2018] ACPI: \_PR_.PR00: _OSC native thermal LVT Acked
>[Wed Aug 15 10:27:33 2018] ACPI: Dynamic OEM Table Load:
>[Wed Aug 15 10:27:33 2018] ACPI: SSDT 0xFFFF8AB2E804C800 0003FF (v02 PmRef  Cpu0Cst  00003001 INTL 20160422)
>[Wed Aug 15 10:27:33 2018] ACPI: Dynamic OEM Table Load:
>[Wed Aug 15 10:27:33 2018] ACPI: SSDT 0xFFFF8AB2E80399C0 0000BA (v02 PmRef  Cpu0Hwp  00003000 INTL 20160422)
>[Wed Aug 15 10:27:33 2018] ACPI: Dynamic OEM Table Load:
>[Wed Aug 15 10:27:33 2018] ACPI: SSDT 0xFFFF8AB2E818A800 000628 (v02 PmRef  HwpLvt   00003000 INTL 20160422)
>[Wed Aug 15 10:27:33 2018] ACPI: Dynamic OEM Table Load:
>[Wed Aug 15 10:27:33 2018] ACPI: SSDT 0xFFFF8AB2E9119000 000D14 (v02 PmRef  ApIst    00003000 INTL 20160422)
>[Wed Aug 15 10:27:33 2018] ACPI: Dynamic OEM Table Load:
>[Wed Aug 15 10:27:33 2018] ACPI: SSDT 0xFFFF8AB2E804C000 000317 (v02 PmRef  ApHwp    00003000 INTL 20160422)
>[Wed Aug 15 10:27:33 2018] ACPI: Dynamic OEM Table Load:
>[Wed Aug 15 10:27:33 2018] ACPI: SSDT 0xFFFF8AB2E804F000 00030A (v02 PmRef  ApCst    00003000 INTL 20160422)
>[Wed Aug 15 10:27:33 2018] ACPI: Interpreter enabled
>[Wed Aug 15 10:27:33 2018] ACPI: (supports S0 S3 S4 S5)
>[Wed Aug 15 10:27:33 2018] ACPI: Using IOAPIC for interrupt routing
>[Wed Aug 15 10:27:33 2018] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
>[Wed Aug 15 10:27:33 2018] ACPI: Enabled 6 GPEs in block 00 to 7F
>[Wed Aug 15 10:27:33 2018] ACPI: Power Resource [FN00] (off)
>[Wed Aug 15 10:27:33 2018] ACPI: Power Resource [FN01] (off)
>[Wed Aug 15 10:27:33 2018] ACPI: Power Resource [FN02] (off)
>[Wed Aug 15 10:27:33 2018] ACPI: Power Resource [FN03] (off)
>[Wed Aug 15 10:27:33 2018] ACPI: Power Resource [FN04] (off)
>[Wed Aug 15 10:27:33 2018] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-fe])
>[Wed Aug 15 10:27:33 2018] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI]
>[Wed Aug 15 10:27:33 2018] acpi PNP0A08:00: _OSC: platform does not support [PCIeHotplug PME]
>[Wed Aug 15 10:27:33 2018] acpi PNP0A08:00: _OSC: OS now controls [AER PCIeCapability LTR]
>[Wed Aug 15 10:27:33 2018] acpi PNP0A08:00: FADT indicates ASPM is unsupported, using BIOS configuration
>[Wed Aug 15 10:27:33 2018] PCI host bridge to bus 0000:00
>[Wed Aug 15 10:27:33 2018] pci_bus 0000:00: root bus resource [io  0x0000-0x0cf7 window]
>[Wed Aug 15 10:27:33 2018] pci_bus 0000:00: root bus resource [io  0x0d00-0xffff window]
>[Wed Aug 15 10:27:33 2018] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff window]
>[Wed Aug 15 10:27:33 2018] pci_bus 0000:00: root bus resource [mem 0x90000000-0xdfffffff window]
>[Wed Aug 15 10:27:33 2018] pci_bus 0000:00: root bus resource [mem 0xfd000000-0xfe7fffff window]
>[Wed Aug 15 10:27:33 2018] pci_bus 0000:00: root bus resource [bus 00-fe]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:00.0: [8086:5904] type 00 class 0x060000
>[Wed Aug 15 10:27:33 2018] pci 0000:00:02.0: [8086:5906] type 00 class 0x030000
>[Wed Aug 15 10:27:33 2018] pci 0000:00:02.0: reg 0x10: [mem 0xde000000-0xdeffffff 64bit]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:02.0: reg 0x18: [mem 0xc0000000-0xcfffffff 64bit pref]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:02.0: reg 0x20: [io  0xf000-0xf03f]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:14.0: [8086:9d2f] type 00 class 0x0c0330
>[Wed Aug 15 10:27:33 2018] pci 0000:00:14.0: reg 0x10: [mem 0xdf710000-0xdf71ffff 64bit]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:14.0: PME# supported from D3hot D3cold
>[Wed Aug 15 10:27:33 2018] pci 0000:00:14.2: [8086:9d31] type 00 class 0x118000
>[Wed Aug 15 10:27:33 2018] pci 0000:00:14.2: reg 0x10: [mem 0xdf72e000-0xdf72efff 64bit]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:16.0: [8086:9d3a] type 00 class 0x078000
>[Wed Aug 15 10:27:33 2018] pci 0000:00:16.0: reg 0x10: [mem 0xdf72d000-0xdf72dfff 64bit]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:16.0: PME# supported from D3hot
>[Wed Aug 15 10:27:33 2018] pci 0000:00:17.0: [8086:9d03] type 00 class 0x010601
>[Wed Aug 15 10:27:33 2018] pci 0000:00:17.0: reg 0x10: [mem 0xdf728000-0xdf729fff]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:17.0: reg 0x14: [mem 0xdf72c000-0xdf72c0ff]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:17.0: reg 0x18: [io  0xf090-0xf097]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:17.0: reg 0x1c: [io  0xf080-0xf083]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:17.0: reg 0x20: [io  0xf060-0xf07f]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:17.0: reg 0x24: [mem 0xdf72b000-0xdf72b7ff]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:17.0: PME# supported from D3hot
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1c.0: [8086:9d14] type 01 class 0x060400
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1c.5: [8086:9d15] type 01 class 0x060400
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1c.5: PME# supported from D0 D3hot D3cold
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1c.6: [8086:9d16] type 01 class 0x060400
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1c.6: PME# supported from D0 D3hot D3cold
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1f.0: [8086:9d4e] type 00 class 0x060100
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1f.2: [8086:9d21] type 00 class 0x058000
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1f.2: reg 0x10: [mem 0xdf724000-0xdf727fff]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1f.3: [8086:9d71] type 00 class 0x040300
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1f.3: reg 0x10: [mem 0xdf720000-0xdf723fff 64bit]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1f.3: reg 0x20: [mem 0xdf700000-0xdf70ffff 64bit]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1f.3: PME# supported from D3hot D3cold
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1f.4: [8086:9d23] type 00 class 0x0c0500
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1f.4: reg 0x10: [mem 0xdf72a000-0xdf72a0ff 64bit]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1f.4: reg 0x20: [io  0xf040-0xf05f]
>[Wed Aug 15 10:27:33 2018] pci 0000:01:00.0: [8086:1536] type 00 class 0x020000
>[Wed Aug 15 10:27:33 2018] pci 0000:01:00.0: reg 0x10: [mem 0xdf400000-0xdf4fffff]
>[Wed Aug 15 10:27:33 2018] pci 0000:01:00.0: reg 0x18: [io  0xe000-0xe01f]
>[Wed Aug 15 10:27:33 2018] pci 0000:01:00.0: reg 0x1c: [mem 0xdf500000-0xdf503fff]
>[Wed Aug 15 10:27:33 2018] pci 0000:01:00.0: reg 0x30: [mem 0xdf300000-0xdf3fffff pref]
>[Wed Aug 15 10:27:33 2018] pci 0000:01:00.0: PME# supported from D0 D3hot D3cold
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1c.0: PCI bridge to [bus 01]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1c.0:   bridge window [io  0xe000-0xefff]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1c.0:   bridge window [mem 0xdf300000-0xdf5fffff]
>[Wed Aug 15 10:27:33 2018] pci 0000:02:00.0: [8086:1536] type 00 class 0x020000
>[Wed Aug 15 10:27:33 2018] pci 0000:02:00.0: reg 0x10: [mem 0xdf100000-0xdf1fffff]
>[Wed Aug 15 10:27:33 2018] pci 0000:02:00.0: reg 0x18: [io  0xd000-0xd01f]
>[Wed Aug 15 10:27:33 2018] pci 0000:02:00.0: reg 0x1c: [mem 0xdf200000-0xdf203fff]
>[Wed Aug 15 10:27:33 2018] pci 0000:02:00.0: reg 0x30: [mem 0xdf000000-0xdf0fffff pref]
>[Wed Aug 15 10:27:33 2018] pci 0000:02:00.0: PME# supported from D0 D3hot D3cold
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1c.5: PCI bridge to [bus 02]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1c.5:   bridge window [io  0xd000-0xdfff]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1c.5:   bridge window [mem 0xdf000000-0xdf2fffff]
>[Wed Aug 15 10:27:33 2018] pci 0000:03:00.0: [8086:1539] type 00 class 0x020000
>[Wed Aug 15 10:27:33 2018] pci 0000:03:00.0: reg 0x10: [mem 0xdf600000-0xdf61ffff]
>[Wed Aug 15 10:27:33 2018] pci 0000:03:00.0: reg 0x18: [io  0xc000-0xc01f]
>[Wed Aug 15 10:27:33 2018] pci 0000:03:00.0: reg 0x1c: [mem 0xdf620000-0xdf623fff]
>[Wed Aug 15 10:27:33 2018] pci 0000:03:00.0: PME# supported from D0 D3hot D3cold
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1c.6: PCI bridge to [bus 03]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1c.6:   bridge window [io  0xc000-0xcfff]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1c.6:   bridge window [mem 0xdf600000-0xdf6fffff]
>[Wed Aug 15 10:27:33 2018] ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 7 10 *11 12 14 15)
>[Wed Aug 15 10:27:33 2018] ACPI: PCI Interrupt Link [LNKB] (IRQs 3 4 5 6 7 *10 11 12 14 15)
>[Wed Aug 15 10:27:33 2018] ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 5 6 7 10 *11 12 14 15)
>[Wed Aug 15 10:27:33 2018] ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 5 6 7 10 *11 12 14 15)
>[Wed Aug 15 10:27:33 2018] ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 10 *11 12 14 15)
>[Wed Aug 15 10:27:33 2018] ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 10 *11 12 14 15)
>[Wed Aug 15 10:27:33 2018] ACPI: PCI Interrupt Link [LNKG] (IRQs 3 4 5 6 10 *11 12 14 15)
>[Wed Aug 15 10:27:33 2018] ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 10 *11 12 14 15)
>[Wed Aug 15 10:27:33 2018] pci 0000:00:02.0: vgaarb: setting as boot VGA device
>[Wed Aug 15 10:27:33 2018] pci 0000:00:02.0: vgaarb: VGA device added: decodes=io+mem,owns=io+mem,locks=none
>[Wed Aug 15 10:27:33 2018] pci 0000:00:02.0: vgaarb: bridge control possible
>[Wed Aug 15 10:27:33 2018] vgaarb: loaded
>[Wed Aug 15 10:27:33 2018] pps_core: LinuxPPS API ver. 1 registered
>[Wed Aug 15 10:27:33 2018] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
>[Wed Aug 15 10:27:33 2018] PTP clock support registered
>[Wed Aug 15 10:27:33 2018] EDAC MC: Ver: 3.0.0
>[Wed Aug 15 10:27:33 2018] PCI: Using ACPI for IRQ routing
>[Wed Aug 15 10:27:33 2018] PCI: pci_cache_line_size set to 64 bytes
>[Wed Aug 15 10:27:33 2018] e820: reserve RAM buffer [mem 0x0009c400-0x0009ffff]
>[Wed Aug 15 10:27:33 2018] e820: reserve RAM buffer [mem 0x85772000-0x87ffffff]
>[Wed Aug 15 10:27:33 2018] e820: reserve RAM buffer [mem 0x8c339000-0x8fffffff]
>[Wed Aug 15 10:27:33 2018] e820: reserve RAM buffer [mem 0x8d000000-0x8fffffff]
>[Wed Aug 15 10:27:33 2018] e820: reserve RAM buffer [mem 0x16e000000-0x16fffffff]
>[Wed Aug 15 10:27:33 2018] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0, 0, 0, 0, 0
>[Wed Aug 15 10:27:33 2018] hpet0: 8 comparators, 64-bit 24.000000 MHz counter
>[Wed Aug 15 10:27:33 2018] clocksource: Switched to clocksource tsc-early
>[Wed Aug 15 10:27:33 2018] VFS: Disk quotas dquot_6.6.0
>[Wed Aug 15 10:27:33 2018] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
>[Wed Aug 15 10:27:33 2018] AppArmor: AppArmor Filesystem Enabled
>[Wed Aug 15 10:27:33 2018] pnp: PnP ACPI init
>[Wed Aug 15 10:27:33 2018] system 00:00: [io  0x0a00-0x0a0f] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:00: [io  0x0a10-0x0a1f] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:00: Plug and Play ACPI device, IDs PNP0c02 (active)
>[Wed Aug 15 10:27:33 2018] pnp 00:01: [dma 0 disabled]
>[Wed Aug 15 10:27:33 2018] pnp 00:01: Plug and Play ACPI device, IDs PNP0501 (active)
>[Wed Aug 15 10:27:33 2018] system 00:02: [io  0x0680-0x069f] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:02: [io  0xffff] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:02: [io  0xffff] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:02: [io  0xffff] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:02: [io  0x1800-0x18fe] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:02: [io  0x164e-0x164f] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:02: Plug and Play ACPI device, IDs PNP0c02 (active)
>[Wed Aug 15 10:27:33 2018] pnp 00:03: Plug and Play ACPI device, IDs PNP0b00 (active)
>[Wed Aug 15 10:27:33 2018] system 00:04: [io  0x1854-0x1857] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:04: Plug and Play ACPI device, IDs INT3f0d PNP0c02 (active)
>[Wed Aug 15 10:27:33 2018] system 00:05: [mem 0xfed10000-0xfed17fff] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:05: [mem 0xfed18000-0xfed18fff] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:05: [mem 0xfed19000-0xfed19fff] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:05: [mem 0xe0000000-0xefffffff] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:05: [mem 0xfed20000-0xfed3ffff] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:05: [mem 0xfed90000-0xfed93fff] could not be reserved
>[Wed Aug 15 10:27:33 2018] system 00:05: [mem 0xfed45000-0xfed8ffff] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:05: [mem 0xff000000-0xffffffff] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:05: [mem 0xfee00000-0xfeefffff] could not be reserved
>[Wed Aug 15 10:27:33 2018] system 00:05: [mem 0xdffe0000-0xdfffffff] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:05: Plug and Play ACPI device, IDs PNP0c02 (active)
>[Wed Aug 15 10:27:33 2018] system 00:06: [mem 0xfd000000-0xfdabffff] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:06: [mem 0xfdad0000-0xfdadffff] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:06: [mem 0xfdb00000-0xfdffffff] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:06: [mem 0xfe000000-0xfe01ffff] could not be reserved
>[Wed Aug 15 10:27:33 2018] system 00:06: [mem 0xfe036000-0xfe03bfff] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:06: [mem 0xfe03d000-0xfe3fffff] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:06: [mem 0xfe410000-0xfe7fffff] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:06: Plug and Play ACPI device, IDs PNP0c02 (active)
>[Wed Aug 15 10:27:33 2018] system 00:07: [io  0xff00-0xfffe] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:07: Plug and Play ACPI device, IDs PNP0c02 (active)
>[Wed Aug 15 10:27:33 2018] system 00:08: [mem 0xfe029000-0xfe029fff] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:08: [mem 0xfe028000-0xfe028fff] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:08: [mem 0xfdaf0000-0xfdafffff] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:08: [mem 0xfdae0000-0xfdaeffff] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:08: [mem 0xfdac0000-0xfdacffff] has been reserved
>[Wed Aug 15 10:27:33 2018] system 00:08: Plug and Play ACPI device, IDs PNP0c02 (active)
>[Wed Aug 15 10:27:33 2018] pnp: PnP ACPI: found 9 devices
>[Wed Aug 15 10:27:33 2018] clocksource: acpi_pm: mask: 0xffffff max_cycles: 0xffffff, max_idle_ns: 2085701024 ns
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1c.0: PCI bridge to [bus 01]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1c.0:   bridge window [io  0xe000-0xefff]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1c.0:   bridge window [mem 0xdf300000-0xdf5fffff]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1c.5: PCI bridge to [bus 02]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1c.5:   bridge window [io  0xd000-0xdfff]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1c.5:   bridge window [mem 0xdf000000-0xdf2fffff]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1c.6: PCI bridge to [bus 03]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1c.6:   bridge window [io  0xc000-0xcfff]
>[Wed Aug 15 10:27:33 2018] pci 0000:00:1c.6:   bridge window [mem 0xdf600000-0xdf6fffff]
>[Wed Aug 15 10:27:33 2018] pci_bus 0000:00: resource 4 [io  0x0000-0x0cf7 window]
>[Wed Aug 15 10:27:33 2018] pci_bus 0000:00: resource 5 [io  0x0d00-0xffff window]
>[Wed Aug 15 10:27:33 2018] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff window]
>[Wed Aug 15 10:27:33 2018] pci_bus 0000:00: resource 7 [mem 0x90000000-0xdfffffff window]
>[Wed Aug 15 10:27:33 2018] pci_bus 0000:00: resource 8 [mem 0xfd000000-0xfe7fffff window]
>[Wed Aug 15 10:27:33 2018] pci_bus 0000:01: resource 0 [io  0xe000-0xefff]
>[Wed Aug 15 10:27:33 2018] pci_bus 0000:01: resource 1 [mem 0xdf300000-0xdf5fffff]
>[Wed Aug 15 10:27:33 2018] pci_bus 0000:02: resource 0 [io  0xd000-0xdfff]
>[Wed Aug 15 10:27:33 2018] pci_bus 0000:02: resource 1 [mem 0xdf000000-0xdf2fffff]
>[Wed Aug 15 10:27:33 2018] pci_bus 0000:03: resource 0 [io  0xc000-0xcfff]
>[Wed Aug 15 10:27:33 2018] pci_bus 0000:03: resource 1 [mem 0xdf600000-0xdf6fffff]
>[Wed Aug 15 10:27:33 2018] NET: Registered protocol family 2
>[Wed Aug 15 10:27:33 2018] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes)
>[Wed Aug 15 10:27:33 2018] TCP established hash table entries: 32768 (order: 6, 262144 bytes)
>[Wed Aug 15 10:27:33 2018] TCP bind hash table entries: 32768 (order: 7, 524288 bytes)
>[Wed Aug 15 10:27:33 2018] TCP: Hash tables configured (established 32768 bind 32768)
>[Wed Aug 15 10:27:33 2018] UDP hash table entries: 2048 (order: 4, 65536 bytes)
>[Wed Aug 15 10:27:33 2018] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes)
>[Wed Aug 15 10:27:33 2018] NET: Registered protocol family 1
>[Wed Aug 15 10:27:33 2018] pci 0000:00:02.0: Video device with shadowed ROM at [mem 0x000c0000-0x000dffff]
>[Wed Aug 15 10:27:33 2018] PCI: CLS 64 bytes, default 64
>[Wed Aug 15 10:27:33 2018] Unpacking initramfs...
>[Wed Aug 15 10:27:33 2018] Freeing initrd memory: 20944K
>[Wed Aug 15 10:27:33 2018] PCI-DMA: Using software bounce buffering for IO (SWIOTLB)
>[Wed Aug 15 10:27:33 2018] software IO TLB [mem 0x88339000-0x8c339000] (64MB) mapped at [(____ptrval____)-(____ptrval____)]
>[Wed Aug 15 10:27:33 2018] clocksource: tsc: mask: 0xffffffffffffffff max_cycles: 0x1fd3b81b95f, max_idle_ns: 440795257325 ns
>[Wed Aug 15 10:27:33 2018] clocksource: Switched to clocksource tsc
>[Wed Aug 15 10:27:33 2018] Initialise system trusted keyrings
>[Wed Aug 15 10:27:33 2018] workingset: timestamp_bits=40 max_order=20 bucket_order=0
>[Wed Aug 15 10:27:33 2018] zbud: loaded
>[Wed Aug 15 10:27:33 2018] pstore: using deflate compression
>[Wed Aug 15 10:27:33 2018] Key type asymmetric registered
>[Wed Aug 15 10:27:33 2018] Asymmetric key parser 'x509' registered
>[Wed Aug 15 10:27:33 2018] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 248)
>[Wed Aug 15 10:27:33 2018] io scheduler noop registered
>[Wed Aug 15 10:27:33 2018] io scheduler deadline registered
>[Wed Aug 15 10:27:33 2018] io scheduler cfq registered (default)
>[Wed Aug 15 10:27:33 2018] io scheduler mq-deadline registered
>[Wed Aug 15 10:27:33 2018] pcieport 0000:00:1c.0: AER enabled with IRQ 122
>[Wed Aug 15 10:27:33 2018] pcieport 0000:00:1c.5: AER enabled with IRQ 123
>[Wed Aug 15 10:27:33 2018] pcieport 0000:00:1c.6: AER enabled with IRQ 124
>[Wed Aug 15 10:27:33 2018] intel_idle: MWAIT substates: 0x11142120
>[Wed Aug 15 10:27:33 2018] intel_idle: v0.4.1 model 0x8E
>[Wed Aug 15 10:27:33 2018] intel_idle: lapic_timer_reliable_states 0xffffffff
>[Wed Aug 15 10:27:33 2018] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
>[Wed Aug 15 10:27:33 2018] 00:01: ttyS0 at I/O 0x3f8 (irq = 4, base_baud = 115200) is a 16550A
>[Wed Aug 15 10:27:33 2018] serial8250: ttyS1 at I/O 0x2f8 (irq = 3, base_baud = 115200) is a 16550A
>[Wed Aug 15 10:27:33 2018] Linux agpgart interface v0.103
>[Wed Aug 15 10:27:33 2018] AMD IOMMUv2 driver by Joerg Roedel <jroedel@suse.de>
>[Wed Aug 15 10:27:33 2018] AMD IOMMUv2 functionality not available on this system
>[Wed Aug 15 10:27:33 2018] i8042: PNP: No PS/2 controller found.
>[Wed Aug 15 10:27:33 2018] i8042: Probing ports directly.
>[Wed Aug 15 10:27:35 2018] i8042: No controller found
>[Wed Aug 15 10:27:35 2018] mousedev: PS/2 mouse device common for all mice
>[Wed Aug 15 10:27:35 2018] rtc_cmos 00:03: RTC can wake from S4
>[Wed Aug 15 10:27:35 2018] rtc_cmos 00:03: registered as rtc0
>[Wed Aug 15 10:27:35 2018] rtc_cmos 00:03: alarms up to one month, y3k, 242 bytes nvram, hpet irqs
>[Wed Aug 15 10:27:35 2018] intel_pstate: Intel P-state driver initializing
>[Wed Aug 15 10:27:35 2018] intel_pstate: HWP enabled
>[Wed Aug 15 10:27:35 2018] ledtrig-cpu: registered to indicate activity on CPUs
>[Wed Aug 15 10:27:35 2018] NET: Registered protocol family 10
>[Wed Aug 15 10:27:35 2018] Segment Routing with IPv6
>[Wed Aug 15 10:27:35 2018] mip6: Mobile IPv6
>[Wed Aug 15 10:27:35 2018] NET: Registered protocol family 17
>[Wed Aug 15 10:27:35 2018] mpls_gso: MPLS GSO support
>[Wed Aug 15 10:27:35 2018] microcode: sig=0x806e9, pf=0x80, revision=0x84
>[Wed Aug 15 10:27:35 2018] microcode: Microcode Update Driver: v2.2.
>[Wed Aug 15 10:27:35 2018] sched_clock: Marking stable (2024787591, 0)->(1999980321, 24807270)
>[Wed Aug 15 10:27:35 2018] registered taskstats version 1
>[Wed Aug 15 10:27:35 2018] Loading compiled-in X.509 certificates
>[Wed Aug 15 10:27:35 2018] zswap: loaded using pool lzo/zbud
>[Wed Aug 15 10:27:35 2018] AppArmor: AppArmor sha1 policy hashing enabled
>[Wed Aug 15 10:27:35 2018] rtc_cmos 00:03: setting system clock to 2018-08-15 09:27:35 UTC (1534325255)
>[Wed Aug 15 10:27:35 2018] Freeing unused kernel memory: 1540K
>[Wed Aug 15 10:27:35 2018] Write protecting the kernel read-only data: 16384k
>[Wed Aug 15 10:27:35 2018] Freeing unused kernel memory: 2028K
>[Wed Aug 15 10:27:35 2018] Freeing unused kernel memory: 932K
>[Wed Aug 15 10:27:35 2018] x86/mm: Checked W+X mappings: passed, no W+X pages found.
>[Wed Aug 15 10:27:35 2018] x86/mm: Checking user space page tables
>[Wed Aug 15 10:27:35 2018] x86/mm: Checked W+X mappings: passed, no W+X pages found.
>[Wed Aug 15 10:27:35 2018] thermal LNXTHERM:00: registered as thermal_zone0
>[Wed Aug 15 10:27:35 2018] ACPI: Thermal Zone [TZ00] (28 C)
>[Wed Aug 15 10:27:35 2018] thermal LNXTHERM:01: registered as thermal_zone1
>[Wed Aug 15 10:27:35 2018] ACPI: Thermal Zone [TZ01] (30 C)
>[Wed Aug 15 10:27:35 2018] ACPI: bus type USB registered
>[Wed Aug 15 10:27:35 2018] usbcore: registered new interface driver usbfs
>[Wed Aug 15 10:27:35 2018] usbcore: registered new interface driver hub
>[Wed Aug 15 10:27:35 2018] usbcore: registered new device driver usb
>[Wed Aug 15 10:27:35 2018] dca service started, version 1.12.1
>[Wed Aug 15 10:27:35 2018] igb: loading out-of-tree module taints kernel.
>[Wed Aug 15 10:27:35 2018] xhci_hcd 0000:00:14.0: xHCI Host Controller
>[Wed Aug 15 10:27:35 2018] xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 1
>[Wed Aug 15 10:27:35 2018] xhci_hcd 0000:00:14.0: hcc params 0x200077c1 hci version 0x100 quirks 0x0000000000109810
>[Wed Aug 15 10:27:35 2018] xhci_hcd 0000:00:14.0: cache line size of 64 is not supported
>[Wed Aug 15 10:27:35 2018] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 4.18
>[Wed Aug 15 10:27:35 2018] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
>[Wed Aug 15 10:27:35 2018] usb usb1: Product: xHCI Host Controller
>[Wed Aug 15 10:27:35 2018] usb usb1: Manufacturer: Linux 4.18.0+ xhci-hcd
>[Wed Aug 15 10:27:35 2018] usb usb1: SerialNumber: 0000:00:14.0
>[Wed Aug 15 10:27:35 2018] i801_smbus 0000:00:1f.4: SPD Write Disable is set
>[Wed Aug 15 10:27:35 2018] i801_smbus 0000:00:1f.4: SMBus using PCI interrupt
>[Wed Aug 15 10:27:35 2018] hub 1-0:1.0: USB hub found
>[Wed Aug 15 10:27:35 2018] hub 1-0:1.0: 12 ports detected
>[Wed Aug 15 10:27:35 2018] xhci_hcd 0000:00:14.0: xHCI Host Controller
>[Wed Aug 15 10:27:35 2018] Intel(R) Gigabit Ethernet Linux Driver - version 5.3.5.18
>[Wed Aug 15 10:27:35 2018] xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 2
>[Wed Aug 15 10:27:35 2018] Copyright(c) 2007 - 2018 Intel Corporation.
>[Wed Aug 15 10:27:35 2018] xhci_hcd 0000:00:14.0: Host supports USB 3.0  SuperSpeed
>[Wed Aug 15 10:27:35 2018] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 4.18
>[Wed Aug 15 10:27:35 2018] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
>[Wed Aug 15 10:27:35 2018] usb usb2: Product: xHCI Host Controller
>[Wed Aug 15 10:27:35 2018] usb usb2: Manufacturer: Linux 4.18.0+ xhci-hcd
>[Wed Aug 15 10:27:35 2018] usb usb2: SerialNumber: 0000:00:14.0
>[Wed Aug 15 10:27:35 2018] SCSI subsystem initialized
>[Wed Aug 15 10:27:35 2018] hub 2-0:1.0: USB hub found
>[Wed Aug 15 10:27:35 2018] hub 2-0:1.0: 6 ports detected
>[Wed Aug 15 10:27:35 2018] libata version 3.00 loaded.
>[Wed Aug 15 10:27:35 2018] ahci 0000:00:17.0: version 3.0
>[Wed Aug 15 10:27:35 2018] ahci 0000:00:17.0: AHCI 0001.0301 32 slots 2 ports 6 Gbps 0x6 impl SATA mode
>[Wed Aug 15 10:27:35 2018] ahci 0000:00:17.0: flags: 64bit ncq pm led clo only pio slum part deso sadm sds apst 
>[Wed Aug 15 10:27:35 2018] scsi host0: ahci
>[Wed Aug 15 10:27:35 2018] scsi host1: ahci
>[Wed Aug 15 10:27:35 2018] scsi host2: ahci
>[Wed Aug 15 10:27:35 2018] ata1: DUMMY
>[Wed Aug 15 10:27:35 2018] ata2: SATA max UDMA/133 abar m2048@0xdf72b000 port 0xdf72b180 irq 126
>[Wed Aug 15 10:27:35 2018] ata3: SATA max UDMA/133 abar m2048@0xdf72b000 port 0xdf72b200 irq 126
>[Wed Aug 15 10:27:35 2018] ata3: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
>[Wed Aug 15 10:27:35 2018] ata2: SATA link down (SStatus 4 SControl 300)
>[Wed Aug 15 10:27:35 2018] ACPI BIOS Error (bug): Could not resolve [\_SB.PCI0.SAT0.PRT2._GTF.DSSP], AE_NOT_FOUND (20180531/psargs-330)
>[Wed Aug 15 10:27:35 2018] ACPI Error: Method parse/execution failed \_SB.PCI0.SAT0.PRT2._GTF, AE_NOT_FOUND (20180531/psparse-516)
>[Wed Aug 15 10:27:35 2018] ata3.00: ATA-9: WDC WDS120G2G0B-00EPW0, UI190000, max UDMA/133
>[Wed Aug 15 10:27:35 2018] ata3.00: 234455040 sectors, multi 1: LBA48 NCQ (depth 32)
>[Wed Aug 15 10:27:35 2018] usb 1-2: new low-speed USB device number 2 using xhci_hcd
>[Wed Aug 15 10:27:35 2018] ACPI BIOS Error (bug): Could not resolve [\_SB.PCI0.SAT0.PRT2._GTF.DSSP], AE_NOT_FOUND (20180531/psargs-330)
>[Wed Aug 15 10:27:35 2018] ACPI Error: Method parse/execution failed \_SB.PCI0.SAT0.PRT2._GTF, AE_NOT_FOUND (20180531/psparse-516)
>[Wed Aug 15 10:27:35 2018] ata3.00: configured for UDMA/133
>[Wed Aug 15 10:27:35 2018] scsi 2:0:0:0: Direct-Access     ATA      WDC WDS120G2G0B- 0000 PQ: 0 ANSI: 5
>[Wed Aug 15 10:27:35 2018] sd 2:0:0:0: [sda] 234455040 512-byte logical blocks: (120 GB/112 GiB)
>[Wed Aug 15 10:27:35 2018] sd 2:0:0:0: [sda] Write Protect is off
>[Wed Aug 15 10:27:35 2018] sd 2:0:0:0: [sda] Mode Sense: 00 3a 00 00
>[Wed Aug 15 10:27:35 2018] sd 2:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
>[Wed Aug 15 10:27:35 2018]  sda: sda1 sda2 < sda5 >
>[Wed Aug 15 10:27:35 2018] sd 2:0:0:0: [sda] Attached SCSI disk
>[Wed Aug 15 10:27:35 2018] usb 1-2: New USB device found, idVendor=413c, idProduct=2107, bcdDevice= 1.15
>[Wed Aug 15 10:27:35 2018] usb 1-2: New USB device strings: Mfr=1, Product=2, SerialNumber=0
>[Wed Aug 15 10:27:35 2018] usb 1-2: Product: Dell USB Entry Keyboard
>[Wed Aug 15 10:27:35 2018] usb 1-2: Manufacturer: Dell
>[Wed Aug 15 10:27:35 2018] hidraw: raw HID events driver (C) Jiri Kosina
>[Wed Aug 15 10:27:35 2018] usbcore: registered new interface driver usbhid
>[Wed Aug 15 10:27:35 2018] usbhid: USB HID core driver
>[Wed Aug 15 10:27:35 2018] input: Dell Dell USB Entry Keyboard as /devices/pci0000:00/0000:00:14.0/usb1/1-2/1-2:1.0/0003:413C:2107.0001/input/input0
>[Wed Aug 15 10:27:35 2018] hid-generic 0003:413C:2107.0001: input,hidraw0: USB HID v1.10 Keyboard [Dell Dell USB Entry Keyboard] on usb-0000:00:14.0-2/input0
>[Wed Aug 15 10:27:35 2018] usb 1-4: new low-speed USB device number 3 using xhci_hcd
>[Wed Aug 15 10:27:35 2018] igb 0000:01:00.0: added PHC on eth0
>[Wed Aug 15 10:27:35 2018] igb 0000:01:00.0: Intel(R) Gigabit Ethernet Linux Driver
>[Wed Aug 15 10:27:35 2018] igb 0000:01:00.0: eth0: (PCIe:2.5GT/s:Width x1) 
>[Wed Aug 15 10:27:35 2018] igb 0000:01:00.0 eth0: MAC: 00:07:32:52:16:72
>[Wed Aug 15 10:27:35 2018] igb 0000:01:00.0: eth0: PBA No: 000300-000
>[Wed Aug 15 10:27:35 2018] usb 1-4: New USB device found, idVendor=093a, idProduct=2510, bcdDevice= 1.00
>[Wed Aug 15 10:27:35 2018] igb 0000:01:00.0: LRO is disabled
>[Wed Aug 15 10:27:35 2018] usb 1-4: New USB device strings: Mfr=1, Product=2, SerialNumber=0
>[Wed Aug 15 10:27:35 2018] igb 0000:01:00.0: Using MSI-X interrupts. 1 rx queue(s), 1 tx queue(s)
>[Wed Aug 15 10:27:35 2018] usb 1-4: Product: USB Optical Mouse
>[Wed Aug 15 10:27:35 2018] usb 1-4: Manufacturer: PixArt
>[Wed Aug 15 10:27:35 2018] input: PixArt USB Optical Mouse as /devices/pci0000:00/0000:00:14.0/usb1/1-4/1-4:1.0/0003:093A:2510.0002/input/input1
>[Wed Aug 15 10:27:35 2018] hid-generic 0003:093A:2510.0002: input,hidraw1: USB HID v1.11 Mouse [PixArt USB Optical Mouse] on usb-0000:00:14.0-4/input0
>[Wed Aug 15 10:27:36 2018] igb 0000:02:00.0: added PHC on eth1
>[Wed Aug 15 10:27:36 2018] igb 0000:02:00.0: Intel(R) Gigabit Ethernet Linux Driver
>[Wed Aug 15 10:27:36 2018] igb 0000:02:00.0: eth1: (PCIe:2.5GT/s:Width x1) 
>[Wed Aug 15 10:27:36 2018] igb 0000:02:00.0 eth1: MAC: 00:07:32:52:16:73
>[Wed Aug 15 10:27:36 2018] igb 0000:02:00.0: eth1: PBA No: 000300-000
>[Wed Aug 15 10:27:36 2018] igb 0000:02:00.0: LRO is disabled
>[Wed Aug 15 10:27:36 2018] igb 0000:02:00.0: Using MSI-X interrupts. 1 rx queue(s), 1 tx queue(s)
>[Wed Aug 15 10:27:36 2018] igb 0000:03:00.0: added PHC on eth2
>[Wed Aug 15 10:27:36 2018] igb 0000:03:00.0: Intel(R) Gigabit Ethernet Linux Driver
>[Wed Aug 15 10:27:36 2018] igb 0000:03:00.0: eth2: (PCIe:2.5GT/s:Width x1) 
>[Wed Aug 15 10:27:36 2018] igb 0000:03:00.0 eth2: MAC: 00:07:32:52:16:74
>[Wed Aug 15 10:27:36 2018] igb 0000:03:00.0: eth2: PBA No: Unknown
>[Wed Aug 15 10:27:36 2018] igb 0000:03:00.0: LRO is disabled
>[Wed Aug 15 10:27:36 2018] igb 0000:03:00.0: Using MSI-X interrupts. 1 rx queue(s), 1 tx queue(s)
>[Wed Aug 15 10:27:36 2018] igb 0000:02:00.0 enp2s0: renamed from eth1
>[Wed Aug 15 10:27:36 2018] igb 0000:01:00.0 enp1s0: renamed from eth0
>[Wed Aug 15 10:27:36 2018] igb 0000:03:00.0 enp3s0: renamed from eth2
>[Wed Aug 15 10:27:36 2018] PM: Image not found (code -22)
>[Wed Aug 15 10:27:36 2018] random: fast init done
>[Wed Aug 15 10:27:37 2018] EXT4-fs (sda1): mounted filesystem with ordered data mode. Opts: (null)
>[Wed Aug 15 10:27:37 2018] systemd[1]: systemd 237 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +SECCOMP +BLKID +ELFUTILS +KMOD -IDN2 +IDN -PCRE2 default-hierarchy=hybrid)
>[Wed Aug 15 10:27:37 2018] systemd[1]: Detected architecture x86-64.
>[Wed Aug 15 10:27:37 2018] systemd[1]: Set hostname to <eureka-celeron-dan>.
>[Wed Aug 15 10:27:37 2018] random: systemd: uninitialized urandom read (16 bytes read)
>[Wed Aug 15 10:27:37 2018] systemd[1]: Created slice User and Session Slice.
>[Wed Aug 15 10:27:37 2018] random: systemd: uninitialized urandom read (16 bytes read)
>[Wed Aug 15 10:27:37 2018] systemd[1]: Reached target Remote File Systems.
>[Wed Aug 15 10:27:37 2018] random: systemd: uninitialized urandom read (16 bytes read)
>[Wed Aug 15 10:27:37 2018] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
>[Wed Aug 15 10:27:37 2018] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
>[Wed Aug 15 10:27:37 2018] systemd[1]: Reached target Local Encrypted Volumes.
>[Wed Aug 15 10:27:37 2018] systemd[1]: Created slice System Slice.
>[Wed Aug 15 10:27:37 2018] systemd[1]: Listening on Syslog Socket.
>[Wed Aug 15 10:27:37 2018] EXT4-fs (sda1): re-mounted. Opts: errors=remount-ro
>[Wed Aug 15 10:27:37 2018] systemd-journald[196]: Received request to flush runtime journal from PID 1
>[Wed Aug 15 10:27:38 2018] input: Sleep Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0E:00/input/input2
>[Wed Aug 15 10:27:38 2018] ACPI: Sleep Button [SLPB]
>[Wed Aug 15 10:27:38 2018] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input3
>[Wed Aug 15 10:27:38 2018] ACPI: Power Button [PWRB]
>[Wed Aug 15 10:27:38 2018] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input4
>[Wed Aug 15 10:27:38 2018] ACPI: Power Button [PWRF]
>[Wed Aug 15 10:27:38 2018] mei_me 0000:00:16.0: enabling device (0004 -> 0006)
>[Wed Aug 15 10:27:38 2018] iTCO_vendor_support: vendor-support=0
>[Wed Aug 15 10:27:38 2018] iTCO_wdt: Intel TCO WatchDog Timer Driver v1.11
>[Wed Aug 15 10:27:38 2018] iTCO_wdt: Found a Intel PCH TCO device (Version=4, TCOBASE=0x0400)
>[Wed Aug 15 10:27:38 2018] iTCO_wdt: initialized. heartbeat=30 sec (nowayout=0)
>[Wed Aug 15 10:27:38 2018] sd 2:0:0:0: Attached scsi generic sg0 type 0
>[Wed Aug 15 10:27:38 2018] input: PC Speaker as /devices/platform/pcspkr/input/input5
>[Wed Aug 15 10:27:38 2018] RAPL PMU: API unit is 2^-32 Joules, 5 fixed counters, 655360 ms ovfl timer
>[Wed Aug 15 10:27:38 2018] RAPL PMU: hw unit of domain pp0-core 2^-14 Joules
>[Wed Aug 15 10:27:38 2018] RAPL PMU: hw unit of domain package 2^-14 Joules
>[Wed Aug 15 10:27:38 2018] RAPL PMU: hw unit of domain dram 2^-14 Joules
>[Wed Aug 15 10:27:38 2018] RAPL PMU: hw unit of domain pp1-gpu 2^-14 Joules
>[Wed Aug 15 10:27:38 2018] RAPL PMU: hw unit of domain psys 2^-14 Joules
>[Wed Aug 15 10:27:38 2018] cryptd: max_cpu_qlen set to 1000
>[Wed Aug 15 10:27:38 2018] SSE version of gcm_enc/dec engaged.
>[Wed Aug 15 10:27:38 2018] Adding 4097020k swap on /dev/sda5.  Priority:-2 extents:1 across:4097020k SSFS
>[Wed Aug 15 10:27:38 2018] Setting dangerous option enable_fbc - tainting kernel
>[Wed Aug 15 10:27:38 2018] Setting dangerous option enable_psr - tainting kernel
>[Wed Aug 15 10:27:38 2018] [drm:intel_pch_type [i915]] Found SunrisePoint LP PCH
>[Wed Aug 15 10:27:38 2018] [drm:i915_driver_load [i915]] WOPCM size: 1024KiB
>[Wed Aug 15 10:27:38 2018] [drm:intel_uc_init_early [i915]] enable_guc=0 (submission:no huc:no)
>[Wed Aug 15 10:27:38 2018] [drm:i915_driver_load [i915]] guc_log_level=0 (enabled:no, verbose:no, verbosity:0)
>[Wed Aug 15 10:27:38 2018] [drm:intel_power_domains_init [i915]] Allowed DC state mask 03
>[Wed Aug 15 10:27:38 2018] [drm:i915_driver_load [i915]] ppgtt mode: 3
>[Wed Aug 15 10:27:38 2018] [drm:i915_ggtt_probe_hw [i915]] GGTT size = 4096M
>[Wed Aug 15 10:27:38 2018] [drm:i915_ggtt_probe_hw [i915]] GMADR size = 256M
>[Wed Aug 15 10:27:38 2018] [drm:i915_ggtt_probe_hw [i915]] DSM size = 32M
>[Wed Aug 15 10:27:38 2018] [drm] Replacing VGA console driver
>[Wed Aug 15 10:27:38 2018] Console: switching to colour dummy device 80x25
>[Wed Aug 15 10:27:38 2018] [drm:i915_gem_init_stolen [i915]] GEN6_STOLEN_RESERVED = 8ff00047
>[Wed Aug 15 10:27:38 2018] [drm:i915_gem_init_stolen [i915]] Memory reserved for graphics device: 32768K, usable: 31744K
>[Wed Aug 15 10:27:38 2018] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x8cbaf018
>[Wed Aug 15 10:27:38 2018] [drm:intel_opregion_setup [i915]] Public ACPI methods supported
>[Wed Aug 15 10:27:38 2018] [drm:intel_opregion_setup [i915]] SWSCI supported
>[Wed Aug 15 10:27:38 2018] [drm:intel_opregion_setup [i915]] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00300483
>[Wed Aug 15 10:27:38 2018] [drm:intel_opregion_setup [i915]] ASLE supported
>[Wed Aug 15 10:27:38 2018] [drm:intel_opregion_setup [i915]] ASLE extension supported
>[Wed Aug 15 10:27:38 2018] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (Mailbox #4)
>[Wed Aug 15 10:27:38 2018] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
>[Wed Aug 15 10:27:38 2018] [drm] Driver supports precise vblank timestamp query.
>[Wed Aug 15 10:27:38 2018] [drm:intel_bios_init [i915]] Set default to SSC at 120000 kHz
>[Wed Aug 15 10:27:38 2018] [drm:intel_bios_init [i915]] VBT signature "$VBT SKYLAKE        ", BDB version 209
>[Wed Aug 15 10:27:38 2018] [drm:intel_bios_init [i915]] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 0 lvds_use_ssc 0 lvds_ssc_freq 120000 display_clock_mode 1 fdi_rx_polarity_inverted 0
>[Wed Aug 15 10:27:38 2018] [drm:intel_bios_init [i915]] crt_ddc_bus_pin: 2
>[Wed Aug 15 10:27:38 2018] [drm:intel_opregion_get_panel_type [i915]] Ignoring OpRegion panel type (0)
>[Wed Aug 15 10:27:38 2018] [drm:intel_bios_init [i915]] Panel type: 2 (VBT)
>[Wed Aug 15 10:27:38 2018] [drm:intel_bios_init [i915]] DRRS supported mode is static
>[Wed Aug 15 10:27:38 2018] [drm:intel_bios_init [i915]] Found panel mode in BIOS VBT tables:
>[Wed Aug 15 10:27:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1024x768" 0 65000 1024 1048 1184 1344 768 771 777 806 0x8 0xa
>[Wed Aug 15 10:27:38 2018] [drm:intel_bios_init [i915]] VBT initial LVDS value 300
>[Wed Aug 15 10:27:38 2018] [drm:intel_bios_init [i915]] VBT backlight PWM modulation frequency 200 Hz, active high, min brightness 0, level 255, controller 0
>[Wed Aug 15 10:27:38 2018] [drm:intel_bios_init [i915]] DRRS State Enabled:1
>[Wed Aug 15 10:27:38 2018] [drm:intel_bios_init [i915]] Skipping SDVO device mapping
>[Wed Aug 15 10:27:38 2018] [drm:intel_bios_init [i915]] Port A VBT info: DP:1 HDMI:0 DVI:0 EDP:1 CRT:0
>[Wed Aug 15 10:27:38 2018] [drm:intel_bios_init [i915]] VBT HDMI level shift for port A: 0
>[Wed Aug 15 10:27:38 2018] [drm:intel_bios_init [i915]] Port B VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0
>[Wed Aug 15 10:27:38 2018] [drm:intel_bios_init [i915]] VBT HDMI level shift for port B: 8
>[Wed Aug 15 10:27:38 2018] [drm:intel_bios_init [i915]] Port C VBT info: DP:1 HDMI:0 DVI:0 EDP:0 CRT:0
>[Wed Aug 15 10:27:38 2018] [drm:intel_bios_init [i915]] VBT HDMI level shift for port C: 8
>[Wed Aug 15 10:27:38 2018] [drm:intel_dsm_detect [i915]] no _DSM method for intel device
>[Wed Aug 15 10:27:38 2018] [drm:i915_driver_load [i915]] rawclk rate: 24000 kHz
>[Wed Aug 15 10:27:38 2018] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[Wed Aug 15 10:27:38 2018] [drm:intel_power_well_enable [i915]] enabling power well 1
>[Wed Aug 15 10:27:38 2018] [drm:intel_power_well_enable [i915]] enabling MISC IO power well
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 675000 kHz, VCO 8100000 kHz, ref 24000 kHz, bypass 24000 kHz, voltage level 3
>[Wed Aug 15 10:27:38 2018] [drm:intel_update_max_cdclk [i915]] Max CD clock rate: 675000 kHz
>[Wed Aug 15 10:27:38 2018] [drm:skl_init_cdclk [i915]] Max dotclock rate: 675000 kHz
>[Wed Aug 15 10:27:38 2018] [drm:intel_power_well_enable [i915]] enabling always-on
>[Wed Aug 15 10:27:38 2018] [drm:intel_power_well_enable [i915]] enabling DC off
>[Wed Aug 15 10:27:38 2018] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[Wed Aug 15 10:27:38 2018] [drm:intel_power_well_enable [i915]] enabling power well 2
>[Wed Aug 15 10:27:38 2018] i915 0000:00:02.0: vgaarb: changed VGA decodes: olddecodes=io+mem,decodes=io+mem:owns=io+mem
>[Wed Aug 15 10:27:38 2018] [drm:intel_power_well_enable [i915]] enabling DDI A/E IO power well
>[Wed Aug 15 10:27:38 2018] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[Wed Aug 15 10:27:38 2018] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>[Wed Aug 15 10:27:38 2018] [drm:intel_power_well_enable [i915]] enabling DDI D IO power well
>[Wed Aug 15 10:27:38 2018] [drm:intel_csr_ucode_init [i915]] Loading i915/kbl_dmc_ver1_04.bin
>[Wed Aug 15 10:27:38 2018] [drm:intel_fbc_init [i915]] Sanitized enable_fbc value: 0
>[Wed Aug 15 10:27:38 2018] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM0 latency 2 (2.0 usec)
>[Wed Aug 15 10:27:38 2018] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM1 latency 19 (19.0 usec)
>[Wed Aug 15 10:27:38 2018] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM2 latency 28 (28.0 usec)
>[Wed Aug 15 10:27:38 2018] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM3 latency 32 (32.0 usec)
>[Wed Aug 15 10:27:38 2018] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM4 latency 63 (63.0 usec)
>[Wed Aug 15 10:27:38 2018] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM5 latency 77 (77.0 usec)
>[Wed Aug 15 10:27:38 2018] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM6 latency 83 (83.0 usec)
>[Wed Aug 15 10:27:38 2018] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM7 latency 99 (99.0 usec)
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_init [i915]] 3 display pipes available.
>[Wed Aug 15 10:27:38 2018] i915 0000:00:02.0: Direct firmware load for i915/kbl_dmc_ver1_04.bin failed with error -2
>[Wed Aug 15 10:27:38 2018] i915 0000:00:02.0: Failed to load DMC firmware i915/kbl_dmc_ver1_04.bin. Disabling runtime power management.
>[Wed Aug 15 10:27:38 2018] i915 0000:00:02.0: DMC firmware homepage: https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/i915
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 675000 kHz, VCO 8100000 kHz, ref 24000 kHz, bypass 24000 kHz, voltage level 3
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_init_connector [i915]] Adding eDP connector on port A
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_init_connector [i915]] using AUX A for port A (VBT)
>[Wed Aug 15 10:27:38 2018] [drm:intel_pps_dump_state [i915]] cur t1_t3 0 t8 0 t9 0 t10 0 t11_t12 0
>[Wed Aug 15 10:27:38 2018] [drm:intel_pps_dump_state [i915]] vbt t1_t3 2000 t8 10 t9 2000 t10 500 t11_t12 6000
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_init_panel_power_sequencer [i915]] panel power up delay 200, power down delay 50, power cycle delay 600
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_init_panel_power_sequencer [i915]] backlight on delay 1, off delay 200
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x4af06
>[Wed Aug 15 10:27:38 2018] [drm:intel_edp_panel_vdd_sanitize [i915]] VDD left on by BIOS, adjusting state tracking
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] intel_rapl: Found RAPL domain package
>[Wed Aug 15 10:27:38 2018] intel_rapl: Found RAPL domain core
>[Wed Aug 15 10:27:38 2018] intel_rapl: Found RAPL domain uncore
>[Wed Aug 15 10:27:38 2018] intel_rapl: Found RAPL domain dram
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[Wed Aug 15 10:27:38 2018] [drm] failed to retrieve link info, disabling eDP
>[Wed Aug 15 10:27:38 2018] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[Wed Aug 15 10:27:38 2018] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000000
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_init_connector [i915]] Adding DP connector on port B
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_init_connector [i915]] using AUX B for port B (VBT)
>[Wed Aug 15 10:27:38 2018] [drm:intel_hdmi_init_connector [i915]] Adding HDMI connector on port B
>[Wed Aug 15 10:27:38 2018] [drm:intel_hdmi_init_connector [i915]] Using DDC pin 0x5 for port B (VBT)
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_init_connector [i915]] Adding DP connector on port C
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_init_connector [i915]] using AUX C for port C (VBT)
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:41:pipe A] hw state readout: enabled
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:55:pipe B] hw state readout: disabled
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:69:pipe C] hw state readout: disabled
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] DPLL 0 hw state readout: crtc_mask 0x00000000, on 1
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] DPLL 1 hw state readout: crtc_mask 0x00000001, on 1
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] DPLL 2 hw state readout: crtc_mask 0x00000000, on 0
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] DPLL 3 hw state readout: crtc_mask 0x00000000, on 0
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:70:DDI B] hw state readout: disabled, pipe A
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:72:DP-MST A] hw state readout: disabled, pipe A
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:73:DP-MST B] hw state readout: disabled, pipe B
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:74:DP-MST C] hw state readout: disabled, pipe C
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:82:DDI C] hw state readout: enabled, pipe A
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:84:DP-MST A] hw state readout: disabled, pipe A
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:85:DP-MST B] hw state readout: disabled, pipe B
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:86:DP-MST C] hw state readout: disabled, pipe C
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:71:DP-1] hw state readout: disabled
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:78:HDMI-A-1] hw state readout: disabled
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:83:DP-2] hw state readout: enabled
>[Wed Aug 15 10:27:38 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:3840x2160] for [CRTC:41:pipe A] state (____ptrval____)
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] [CRTC:41:pipe A][setup_hw_state]
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80)
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 30, dithering: 0
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 7766016, gmch_n: 8388608, link_m: 517734, link_n: 524288, tu: 64
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] requested mode:
>[Wed Aug 15 10:27:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"3840x2160" 60 533249 720 3888 3920 4000 400 2163 2168 2222 0x40 0x9
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[Wed Aug 15 10:27:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"3840x2160" 60 533249 3840 3888 3920 4000 2160 2163 2168 2222 0x40 0x9
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] crtc timings: 533249 3840 3888 3920 4000 2160 2163 2168 2222, type: 0x40 flags: 0x9
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] port clock: 540000, pipe src size: 720x400, pixel rate 533249
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x80000000, scaler_id: 0
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x0f000870, enabled
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x1, cfgcr1: 0x0, cfgcr2: 0x0
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 2A] disabled, scaler_id = -1
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:38:cursor A] disabled, scaler_id = -1
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] [CRTC:55:pipe B][setup_hw_state]
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] output_types:  (0x0)
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] requested mode:
>[Wed Aug 15 10:27:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[Wed Aug 15 10:27:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:42:plane 1B] disabled, scaler_id = -1
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:52:cursor B] disabled, scaler_id = -1
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] [CRTC:69:pipe C][setup_hw_state]
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] output_types:  (0x0)
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] requested mode:
>[Wed Aug 15 10:27:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[Wed Aug 15 10:27:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:56:plane 1C] disabled, scaler_id = -1
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:61:plane 2C] disabled, scaler_id = -1
>[Wed Aug 15 10:27:38 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:66:cursor C] disabled, scaler_id = -1
>[Wed Aug 15 10:27:38 2018] [drm:intel_modeset_setup_hw_state [i915]] DPLL 0 enabled but not in use, disabling
>[Wed Aug 15 10:27:38 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state (____ptrval____)
>[Wed Aug 15 10:27:38 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:38 2018] [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:41:pipe A] to (____ptrval____)
>[Wed Aug 15 10:27:38 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:38 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:69:pipe C] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:38 2018] [drm:drm_atomic_check_only [drm]] checking (____ptrval____)
>[Wed Aug 15 10:27:38 2018] [drm:skl_compute_wm [i915]] [PLANE:38:cursor A] ddb (0 - 0) -> (860 - 892)
>[Wed Aug 15 10:27:38 2018] [drm:drm_atomic_commit [drm]] committing (____ptrval____)
>[Wed Aug 15 10:27:38 2018] [drm:i915_gem_init_ggtt [i915]] clearing unused GTT space: [1000, 100000000]
>[Wed Aug 15 10:27:38 2018] [drm:intel_ctx_workarounds_init [i915]] Number of context specific w/a: 10
>[Wed Aug 15 10:27:38 2018] [drm:i915_gem_contexts_init [i915]] logical context support initialized
>[Wed Aug 15 10:27:38 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state (____ptrval____)
>[Wed Aug 15 10:27:38 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state (____ptrval____)
>[Wed Aug 15 10:27:38 2018] [drm:intel_fbdev_init [i915]] pipe A not active or no fb, skipping
>[Wed Aug 15 10:27:38 2018] [drm:intel_fbdev_init [i915]] pipe B not active or no fb, skipping
>[Wed Aug 15 10:27:38 2018] [drm:intel_fbdev_init [i915]] pipe C not active or no fb, skipping
>[Wed Aug 15 10:27:38 2018] [drm:intel_fbdev_init [i915]] no active fbs found, not using BIOS config
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_connector_register [i915]] registering DPDDC-B bus for card0-DP-1
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_connector_register [i915]] registering DPDDC-C bus for card0-DP-2
>[Wed Aug 15 10:27:38 2018] [drm] Initialized i915 1.6.0 20180719 for 0000:00:02.0 on minor 0
>[Wed Aug 15 10:27:38 2018] [drm:intel_opregion_register [i915]] 3 outputs detected
>[Wed Aug 15 10:27:38 2018] ACPI: Video Device [GFX0] (multi-head: yes  rom: no  post: no)
>[Wed Aug 15 10:27:38 2018] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:00/input/input6
>[Wed Aug 15 10:27:38 2018] snd_hda_intel 0000:00:1f.3: bound 0000:00:02.0 (ops i915_audio_component_bind_ops [i915])
>[Wed Aug 15 10:27:38 2018] i915 device info: pciid=0x5906 rev=0x02 platform=KABYLAKE gen=9
>[Wed Aug 15 10:27:38 2018] [drm:drm_setup_crtcs [drm_kms_helper]] 
>[Wed Aug 15 10:27:38 2018] i915 device info: is_mobile: no
>[Wed Aug 15 10:27:38 2018] i915 device info: is_lp: no
>[Wed Aug 15 10:27:38 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:27:38 2018] i915 device info: is_alpha_support: no
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:27:38 2018] i915 device info: has_64bit_reloc: yes
>[Wed Aug 15 10:27:38 2018] i915 device info: has_aliasing_ppgtt: yes
>[Wed Aug 15 10:27:38 2018] i915 device info: has_csr: yes
>[Wed Aug 15 10:27:38 2018] i915 device info: has_ddi: yes
>[Wed Aug 15 10:27:38 2018] i915 device info: has_dp_mst: yes
>[Wed Aug 15 10:27:38 2018] i915 device info: has_reset_engine: yes
>[Wed Aug 15 10:27:38 2018] i915 device info: has_fbc: yes
>[Wed Aug 15 10:27:38 2018] i915 device info: has_fpga_dbg: yes
>[Wed Aug 15 10:27:38 2018] i915 device info: has_full_ppgtt: yes
>[Wed Aug 15 10:27:38 2018] i915 device info: has_full_48bit_ppgtt: yes
>[Wed Aug 15 10:27:38 2018] i915 device info: has_gmch_display: no
>[Wed Aug 15 10:27:38 2018] i915 device info: has_guc: yes
>[Wed Aug 15 10:27:38 2018] i915 device info: has_guc_ct: no
>[Wed Aug 15 10:27:38 2018] i915 device info: has_hotplug: yes
>[Wed Aug 15 10:27:38 2018] i915 device info: has_l3_dpf: no
>[Wed Aug 15 10:27:38 2018] i915 device info: has_llc: yes
>[Wed Aug 15 10:27:38 2018] i915 device info: has_logical_ring_contexts: yes
>[Wed Aug 15 10:27:38 2018] i915 device info: has_logical_ring_elsq: no
>[Wed Aug 15 10:27:38 2018] i915 device info: has_logical_ring_preemption: yes
>[Wed Aug 15 10:27:38 2018] i915 device info: has_overlay: no
>[Wed Aug 15 10:27:38 2018] i915 device info: has_pooled_eu: no
>[Wed Aug 15 10:27:38 2018] i915 device info: has_psr: yes
>[Wed Aug 15 10:27:38 2018] i915 device info: has_rc6: yes
>[Wed Aug 15 10:27:38 2018] i915 device info: has_rc6p: no
>[Wed Aug 15 10:27:38 2018] i915 device info: has_runtime_pm: yes
>[Wed Aug 15 10:27:38 2018] i915 device info: has_snoop: no
>[Wed Aug 15 10:27:38 2018] i915 device info: has_coherent_ggtt: yes
>[Wed Aug 15 10:27:38 2018] i915 device info: unfenced_needs_alignment: no
>[Wed Aug 15 10:27:38 2018] i915 device info: cursor_needs_physical: no
>[Wed Aug 15 10:27:38 2018] i915 device info: hws_needs_physical: no
>[Wed Aug 15 10:27:38 2018] i915 device info: overlay_needs_physical: no
>[Wed Aug 15 10:27:38 2018] i915 device info: supports_tv: no
>[Wed Aug 15 10:27:38 2018] i915 device info: has_ipc: yes
>[Wed Aug 15 10:27:38 2018] i915 device info: slice total: 1, mask=0001
>[Wed Aug 15 10:27:38 2018] i915 device info: subslice total: 2
>[Wed Aug 15 10:27:38 2018] i915 device info: slice0: 2 subslices, mask=0006
>[Wed Aug 15 10:27:38 2018] i915 device info: slice1: 0 subslices, mask=0000
>[Wed Aug 15 10:27:38 2018] i915 device info: slice2: 0 subslices, mask=0000
>[Wed Aug 15 10:27:38 2018] i915 device info: EU total: 12
>[Wed Aug 15 10:27:38 2018] i915 device info: EU per subslice: 6
>[Wed Aug 15 10:27:38 2018] i915 device info: has slice power gating: no
>[Wed Aug 15 10:27:38 2018] i915 device info: has subslice power gating: no
>[Wed Aug 15 10:27:38 2018] i915 device info: has EU power gating: yes
>[Wed Aug 15 10:27:38 2018] i915 device info: CS timestamp frequency: 12000 kHz
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[Wed Aug 15 10:27:39 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1] status updated from unknown to disconnected
>[Wed Aug 15 10:27:39 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1] disconnected
>[Wed Aug 15 10:27:39 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:27:39 2018] [drm:intel_hdmi_detect [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:27:39 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:27:39 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:27:39 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:27:39 2018] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[Wed Aug 15 10:27:39 2018] [drm:intel_hdmi_set_edid [i915]] Assuming DP dual mode adaptor presence based on VBT
>[Wed Aug 15 10:27:39 2018] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (type 1 DVI) detected (max TMDS clock: 165000 kHz)
>[Wed Aug 15 10:27:39 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] status updated from unknown to connected
>[Wed Aug 15 10:27:39 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:27:39 2018] [drm:drm_add_edid_modes [drm]] ELD: no CEA Extension found
>[Wed Aug 15 10:27:39 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:27:39 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] probed modes :
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 90:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 00 01 00 02 02 06 00 00 00 00
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[Wed Aug 15 10:27:39 2018] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[Wed Aug 15 10:27:39 2018] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[Wed Aug 15 10:27:39 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2] status updated from unknown to connected
>[Wed Aug 15 10:27:39 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:27:39 2018] [drm:drm_add_edid_modes [drm]] ELD monitor U28E590
>[Wed Aug 15 10:27:39 2018] [drm:drm_add_edid_modes [drm]] ELD size 32, SAD count 1
>[Wed Aug 15 10:27:39 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:27:39 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2] probed modes :
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 92:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 94:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 93:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 101:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 110:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 111:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 113:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 114:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 107:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 108:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 109:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] connector 71 enabled? no
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] connector 78 enabled? yes
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] connector 83 enabled? yes
>[Wed Aug 15 10:27:39 2018] [drm:intel_fb_initial_config [i915]] Not using firmware configuration
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] looking for cmdline mode on connector 78
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] looking for preferred mode on connector 78 0
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] found mode 1920x1080
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] looking for cmdline mode on connector 83
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] looking for preferred mode on connector 83 0
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] found mode 3840x2160
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] picking CRTCs for 8192x8192 config
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] desired mode 1920x1080 set on crtc 41 (0,0)
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] desired mode 3840x2160 set on crtc 55 (0,0)
>[Wed Aug 15 10:27:39 2018] [drm:intelfb_create [i915]] no BIOS fb, allocating a new one
>[Wed Aug 15 10:27:39 2018] [drm:intelfb_create [i915]] allocated 3840x2160 fb: 0x00040000
>[Wed Aug 15 10:27:39 2018] fbcon: inteldrmfb (fb0) is primary device
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:33:plane 2A] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:33:plane 2A] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:38:cursor A] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:38:cursor A] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:47:plane 2B] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:47:plane 2B] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:cursor B] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:52:cursor B] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:56:plane 1C] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:61:plane 2C] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:61:plane 2C] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:66:cursor C] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:66:cursor C] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for [CRTC:41:pipe A] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:28:plane 1A] state (____ptrval____) to [CRTC:41:pipe A]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:124] for [PLANE:28:plane 1A] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:41:pipe A] to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:83:DP-2] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state (____ptrval____) to [NOCRTC]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state (____ptrval____) to [CRTC:41:pipe A]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:3840x2160] for [CRTC:55:pipe B] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:42:plane 1B] state (____ptrval____) to [CRTC:55:pipe B]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:124] for [PLANE:42:plane 1B] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:55:pipe B] to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state (____ptrval____) to [CRTC:55:pipe B]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:69:pipe C] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:69:pipe C] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:56:plane 1C] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:69:pipe C] to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_check_only [drm]] checking (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:41:pipe A] mode changed
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:55:pipe B] mode changed
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:55:pipe B] enable changed
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:55:pipe B] active changed
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] using [ENCODER:70:DDI B] on [CRTC:41:pipe A]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:83:DP-2] keeps [ENCODER:82:DDI C], now on [CRTC:55:pipe B]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:41:pipe A] needs all connectors, enable: y, active: y
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:41:pipe A] to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:41:pipe A] to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:55:pipe B] needs all connectors, enable: y, active: y
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:55:pipe B] to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:55:pipe B] to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:intel_atomic_check [i915]] [CONNECTOR:78:HDMI-A-1] checking for sink bpp constrains
>[Wed Aug 15 10:27:39 2018] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to default limit of 24
>[Wed Aug 15 10:27:39 2018] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
>[Wed Aug 15 10:27:39 2018] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 24 for HDMI
>[Wed Aug 15 10:27:39 2018] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] [CRTC:41:pipe A][modeset]
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] output_types: HDMI (0x40)
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 24, dithering: 0
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] requested mode:
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] port clock: 148500, pipe src size: 1920x1080, pixel rate 148500
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x80000000, scaler_id: 0
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x1, cfgcr1: 0x0, cfgcr2: 0x0
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 2A] disabled, scaler_id = -1
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:38:cursor A] disabled, scaler_id = -1
>[Wed Aug 15 10:27:39 2018] [drm:intel_atomic_check [i915]] [CONNECTOR:83:DP-2] checking for sink bpp constrains
>[Wed Aug 15 10:27:39 2018] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 30
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max rate 540000 max bpp 30 pixel clock 533250KHz
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_compute_config [i915]] DP lane count 4 clock 540000 bpp 30
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_compute_config [i915]] DP link rate required 1999688 available 2160000
>[Wed Aug 15 10:27:39 2018] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 30, dithering: 0
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] [CRTC:55:pipe B][modeset]
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80)
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 30, dithering: 0
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 7766016, gmch_n: 8388608, link_m: 1035468, link_n: 1048576, tu: 64
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 0
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] requested mode:
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] crtc timings: 533250 3840 3888 3920 4000 2160 2163 2168 2222, type: 0x48 flags: 0x9
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] port clock: 540000, pipe src size: 3840x2160, pixel rate 533250
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:42:plane 1B] disabled, scaler_id = -1
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:52:cursor B] disabled, scaler_id = -1
>[Wed Aug 15 10:27:39 2018] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 540000 kHz, actual 540000 kHz
>[Wed Aug 15 10:27:39 2018] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 2, actual 2
>[Wed Aug 15 10:27:39 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 124
>[Wed Aug 15 10:27:39 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 0 -> 1, off 0, on 1, ms 1
>[Wed Aug 15 10:27:39 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 124
>[Wed Aug 15 10:27:39 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 0 -> 1, off 0, on 1, ms 1
>[Wed Aug 15 10:27:39 2018] [drm:intel_find_shared_dpll [i915]] [CRTC:41:pipe A] allocated DPLL 1
>[Wed Aug 15 10:27:39 2018] [drm:intel_reference_shared_dpll [i915]] using DPLL 1 for pipe A
>[Wed Aug 15 10:27:39 2018] [drm:skl_update_scaler [i915]] scaler_user index 0.31: Staged freeing scaler id 0 scaler_users = 0x0
>[Wed Aug 15 10:27:39 2018] [drm:intel_find_shared_dpll [i915]] [CRTC:55:pipe B] allocated DPLL 2
>[Wed Aug 15 10:27:39 2018] [drm:intel_reference_shared_dpll [i915]] using DPLL 2 for pipe B
>[Wed Aug 15 10:27:39 2018] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 0) -> (0 - 289)
>[Wed Aug 15 10:27:39 2018] [drm:skl_compute_wm [i915]] [PLANE:38:cursor A] ddb (860 - 892) -> (289 - 297)
>[Wed Aug 15 10:27:39 2018] [drm:skl_compute_wm [i915]] [PLANE:42:plane 1B] ddb (0 - 0) -> (297 - 884)
>[Wed Aug 15 10:27:39 2018] [drm:skl_compute_wm [i915]] [PLANE:52:cursor B] ddb (0 - 0) -> (884 - 892)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_commit [drm]] committing (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:intel_disable_pipe [i915]] disabling pipe A
>[Wed Aug 15 10:27:39 2018] [drm:intel_disable_shared_dpll [i915]] disable DPLL 1 (active 1, on? 1) for crtc 41
>[Wed Aug 15 10:27:39 2018] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 1
>[Wed Aug 15 10:27:39 2018] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 540000 kHz, VCO 8100000 kHz, ref 24000 kHz, bypass 24000 kHz, voltage level 2
>[Wed Aug 15 10:27:39 2018] [drm:intel_disable_sagv [i915]] Disabling the SAGV
>[Wed Aug 15 10:27:39 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DDI B]
>[Wed Aug 15 10:27:39 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST A]
>[Wed Aug 15 10:27:39 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:73:DP-MST B]
>[Wed Aug 15 10:27:39 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:74:DP-MST C]
>[Wed Aug 15 10:27:39 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:82:DDI C]
>[Wed Aug 15 10:27:39 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:84:DP-MST A]
>[Wed Aug 15 10:27:39 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST B]
>[Wed Aug 15 10:27:39 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST C]
>[Wed Aug 15 10:27:39 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 0
>[Wed Aug 15 10:27:39 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 1
>[Wed Aug 15 10:27:39 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 2
>[Wed Aug 15 10:27:39 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 3
>[Wed Aug 15 10:27:39 2018] [drm:intel_enable_shared_dpll [i915]] enable DPLL 1 (active 1, on? 0) for crtc 41
>[Wed Aug 15 10:27:39 2018] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 1
>[Wed Aug 15 10:27:39 2018] [drm:intel_enable_pipe [i915]] enabling pipe A
>[Wed Aug 15 10:27:39 2018] [drm:intel_enable_shared_dpll [i915]] enable DPLL 2 (active 2, on? 0) for crtc 55
>[Wed Aug 15 10:27:39 2018] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 2
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_start_link_train [i915]] Using LINK_BW_SET value 14
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 07000000
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 08000000
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 1
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 07000000
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:83:DP-2] Link Training Passed at Link Rate = 540000, Lane count = 4
>[Wed Aug 15 10:27:39 2018] [drm:intel_enable_pipe [i915]] enabling pipe B
>[Wed Aug 15 10:27:39 2018] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS
>[Wed Aug 15 10:27:39 2018] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:83:DP-2], [ENCODER:82:DDI C]
>[Wed Aug 15 10:27:39 2018] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe B, 32 bytes ELD
>[Wed Aug 15 10:27:39 2018] [drm:hsw_audio_config_update [i915]] using automatic Maud, Naud
>[Wed Aug 15 10:27:39 2018] [drm:verify_connector_state.isra.125 [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:27:39 2018] [drm:intel_atomic_commit_tail [i915]] [CRTC:41:pipe A]
>[Wed Aug 15 10:27:39 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 1
>[Wed Aug 15 10:27:39 2018] [drm:verify_connector_state.isra.125 [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:27:39 2018] [drm:intel_atomic_commit_tail [i915]] [CRTC:55:pipe B]
>[Wed Aug 15 10:27:39 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 2
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] Console: switching to colour frame buffer device 240x67
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:33:plane 2A] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:33:plane 2A] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:38:cursor A] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:38:cursor A] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:47:plane 2B] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:47:plane 2B] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:cursor B] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:52:cursor B] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:56:plane 1C] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:61:plane 2C] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:61:plane 2C] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:66:cursor C] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:66:cursor C] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for [CRTC:41:pipe A] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:124] for [PLANE:28:plane 1A] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:41:pipe A] to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state (____ptrval____) to [NOCRTC]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state (____ptrval____) to [CRTC:41:pipe A]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:3840x2160] for [CRTC:55:pipe B] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:124] for [PLANE:42:plane 1B] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:55:pipe B] to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:83:DP-2] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state (____ptrval____) to [NOCRTC]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state (____ptrval____) to [CRTC:55:pipe B]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:69:pipe C] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:69:pipe C] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:56:plane 1C] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:69:pipe C] to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_check_only [drm]] checking (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] keeps [ENCODER:70:DDI B], now on [CRTC:41:pipe A]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:83:DP-2] keeps [ENCODER:82:DDI C], now on [CRTC:55:pipe B]
>[Wed Aug 15 10:27:39 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 124
>[Wed Aug 15 10:27:39 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:27:39 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 124
>[Wed Aug 15 10:27:39 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_commit [drm]] committing (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:33:plane 2A] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:33:plane 2A] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:38:cursor A] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:38:cursor A] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:47:plane 2B] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:47:plane 2B] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:cursor B] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:52:cursor B] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:56:plane 1C] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:61:plane 2C] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:61:plane 2C] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:66:cursor C] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:66:cursor C] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for [CRTC:41:pipe A] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:124] for [PLANE:28:plane 1A] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:41:pipe A] to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state (____ptrval____) to [NOCRTC]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state (____ptrval____) to [CRTC:41:pipe A]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:3840x2160] for [CRTC:55:pipe B] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:124] for [PLANE:42:plane 1B] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:55:pipe B] to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:83:DP-2] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state (____ptrval____) to [NOCRTC]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state (____ptrval____) to [CRTC:55:pipe B]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:69:pipe C] (____ptrval____) state to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:69:pipe C] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:56:plane 1C] state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:69:pipe C] to (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_check_only [drm]] checking (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] keeps [ENCODER:70:DDI B], now on [CRTC:41:pipe A]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:83:DP-2] keeps [ENCODER:82:DDI C], now on [CRTC:55:pipe B]
>[Wed Aug 15 10:27:39 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 124
>[Wed Aug 15 10:27:39 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:27:39 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 124
>[Wed Aug 15 10:27:39 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_commit [drm]] committing (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_fb_helper_hotplug_event.part.31 [drm_kms_helper]] 
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] 
>[Wed Aug 15 10:27:39 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:27:39 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state (____ptrval____)
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] snd_hda_codec_realtek hdaudioC0D0: autoconfig for ALC887-VD: line_outs=1 (0x14/0x0/0x0/0x0/0x0) type:line
>[Wed Aug 15 10:27:39 2018] snd_hda_codec_realtek hdaudioC0D0:    speaker_outs=1 (0x15/0x0/0x0/0x0/0x0)
>[Wed Aug 15 10:27:39 2018] snd_hda_codec_realtek hdaudioC0D0:    hp_outs=1 (0x1b/0x0/0x0/0x0/0x0)
>[Wed Aug 15 10:27:39 2018] snd_hda_codec_realtek hdaudioC0D0:    mono: mono_out=0x0
>[Wed Aug 15 10:27:39 2018] snd_hda_codec_realtek hdaudioC0D0:    inputs:
>[Wed Aug 15 10:27:39 2018] snd_hda_codec_realtek hdaudioC0D0:      Front Mic=0x19
>[Wed Aug 15 10:27:39 2018] snd_hda_codec_realtek hdaudioC0D0:      Rear Mic=0x18
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] audit: type=1400 audit(1534325259.796:2): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/telepathy/mission-control-5" pid=418 comm="apparmor_parser"
>[Wed Aug 15 10:27:39 2018] audit: type=1400 audit(1534325259.800:3): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/telepathy/telepathy-*" pid=418 comm="apparmor_parser"
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] audit: type=1400 audit(1534325259.800:4): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/telepathy/telepathy-*//pxgsettings" pid=418 comm="apparmor_parser"
>[Wed Aug 15 10:27:39 2018] audit: type=1400 audit(1534325259.800:5): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/telepathy/telepathy-*//sanitized_helper" pid=418 comm="apparmor_parser"
>[Wed Aug 15 10:27:39 2018] audit: type=1400 audit(1534325259.800:6): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/telepathy/telepathy-ofono" pid=418 comm="apparmor_parser"
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[Wed Aug 15 10:27:39 2018] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[Wed Aug 15 10:27:39 2018] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[Wed Aug 15 10:27:39 2018] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[Wed Aug 15 10:27:39 2018] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[Wed Aug 15 10:27:39 2018] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[Wed Aug 15 10:27:39 2018] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[Wed Aug 15 10:27:39 2018] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[Wed Aug 15 10:27:39 2018] input: HDA Intel PCH Front Mic as /devices/pci0000:00/0000:00:1f.3/sound/card0/input7
>[Wed Aug 15 10:27:39 2018] input: HDA Intel PCH Rear Mic as /devices/pci0000:00/0000:00:1f.3/sound/card0/input8
>[Wed Aug 15 10:27:39 2018] input: HDA Intel PCH Line Out as /devices/pci0000:00/0000:00:1f.3/sound/card0/input9
>[Wed Aug 15 10:27:39 2018] input: HDA Intel PCH Front Headphone as /devices/pci0000:00/0000:00:1f.3/sound/card0/input10
>[Wed Aug 15 10:27:39 2018] input: HDA Intel PCH HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input11
>[Wed Aug 15 10:27:39 2018] input: HDA Intel PCH HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input12
>[Wed Aug 15 10:27:39 2018] input: HDA Intel PCH HDMI/DP,pcm=8 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input13
>[Wed Aug 15 10:27:39 2018] input: HDA Intel PCH HDMI/DP,pcm=9 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input14
>[Wed Aug 15 10:27:39 2018] input: HDA Intel PCH HDMI/DP,pcm=10 as /devices/pci0000:00/0000:00:1f.3/sound/card0/input15
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[Wed Aug 15 10:27:39 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1] disconnected
>[Wed Aug 15 10:27:39 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:27:39 2018] [drm:intel_hdmi_detect [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:27:39 2018] random: crng init done
>[Wed Aug 15 10:27:39 2018] random: 7 urandom warning(s) missed due to ratelimiting
>[Wed Aug 15 10:27:39 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:27:39 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:27:39 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:27:39 2018] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[Wed Aug 15 10:27:39 2018] [drm:intel_hdmi_set_edid [i915]] Assuming DP dual mode adaptor presence based on VBT
>[Wed Aug 15 10:27:39 2018] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (type 1 DVI) detected (max TMDS clock: 165000 kHz)
>[Wed Aug 15 10:27:39 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:27:39 2018] [drm:drm_add_edid_modes [drm]] ELD: no CEA Extension found
>[Wed Aug 15 10:27:39 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:27:39 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] probed modes :
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 90:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 00 01 00 02 02 06 00 00 00 00
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[Wed Aug 15 10:27:39 2018] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[Wed Aug 15 10:27:39 2018] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[Wed Aug 15 10:27:39 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:27:39 2018] [drm:drm_add_edid_modes [drm]] ELD monitor U28E590
>[Wed Aug 15 10:27:39 2018] [drm:drm_add_edid_modes [drm]] ELD size 32, SAD count 1
>[Wed Aug 15 10:27:39 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:27:39 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2] probed modes :
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 92:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 94:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 93:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 101:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 110:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 111:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 113:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 114:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 107:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 108:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 109:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] connector 71 enabled? no
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] connector 78 enabled? yes
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] connector 83 enabled? yes
>[Wed Aug 15 10:27:39 2018] [drm:intel_fb_initial_config [i915]] Not using firmware configuration
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] looking for cmdline mode on connector 78
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] looking for preferred mode on connector 78 0
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] found mode 1920x1080
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] looking for cmdline mode on connector 83
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] looking for preferred mode on connector 83 0
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] found mode 3840x2160
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] picking CRTCs for 3840x2160 config
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] desired mode 1920x1080 set on crtc 41 (0,0)
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] desired mode 3840x2160 set on crtc 55 (0,0)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000007b86aba state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000eea67106 state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:33:plane 2A] 00000000cc494768 state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:33:plane 2A] state 00000000cc494768
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:38:cursor A] 00000000eef23643 state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:38:cursor A] state 00000000eef23643
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000755b0bf0 state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 000000000a9de97e state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:47:plane 2B] 0000000032de2f51 state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:47:plane 2B] state 0000000032de2f51
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:cursor B] 00000000a5b28d12 state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:52:cursor B] state 00000000a5b28d12
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:56:plane 1C] 0000000053ace749 state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:61:plane 2C] 00000000f0d09b59 state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:61:plane 2C] state 00000000f0d09b59
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:66:cursor C] 00000000248a1b32 state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:66:cursor C] state 00000000248a1b32
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for [CRTC:41:pipe A] state 00000000eea67106
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:124] for [PLANE:28:plane 1A] state 0000000007b86aba
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:41:pipe A] to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] 000000007aa985a6 state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state 000000007aa985a6 to [NOCRTC]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state 000000007aa985a6 to [CRTC:41:pipe A]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:3840x2160] for [CRTC:55:pipe B] state 000000000a9de97e
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:124] for [PLANE:42:plane 1B] state 00000000755b0bf0
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:55:pipe B] to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:83:DP-2] 00000000b27e3e69 state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state 00000000b27e3e69 to [NOCRTC]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state 00000000b27e3e69 to [CRTC:55:pipe B]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:69:pipe C] 000000005d5b1adc state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:69:pipe C] state 000000005d5b1adc
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:56:plane 1C] state 0000000053ace749
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:69:pipe C] to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] keeps [ENCODER:70:DDI B], now on [CRTC:41:pipe A]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:83:DP-2] keeps [ENCODER:82:DDI C], now on [CRTC:55:pipe B]
>[Wed Aug 15 10:27:39 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 124
>[Wed Aug 15 10:27:39 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:27:39 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 124
>[Wed Aug 15 10:27:39 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_commit [drm]] committing 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_fb_helper_hotplug_event.part.31 [drm_kms_helper]] 
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] 
>[Wed Aug 15 10:27:39 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:27:39 2018] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[Wed Aug 15 10:27:39 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1] disconnected
>[Wed Aug 15 10:27:39 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:27:39 2018] [drm:intel_hdmi_detect [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:27:39 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:27:39 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:27:39 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:27:39 2018] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[Wed Aug 15 10:27:39 2018] [drm:intel_hdmi_set_edid [i915]] Assuming DP dual mode adaptor presence based on VBT
>[Wed Aug 15 10:27:39 2018] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (type 1 DVI) detected (max TMDS clock: 165000 kHz)
>[Wed Aug 15 10:27:39 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:27:39 2018] [drm:drm_add_edid_modes [drm]] ELD: no CEA Extension found
>[Wed Aug 15 10:27:39 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:27:39 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] probed modes :
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 90:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 00 01 00 02 02 06 00 00 00 00
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[Wed Aug 15 10:27:39 2018] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[Wed Aug 15 10:27:39 2018] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[Wed Aug 15 10:27:39 2018] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[Wed Aug 15 10:27:39 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:27:39 2018] [drm:drm_add_edid_modes [drm]] ELD monitor U28E590
>[Wed Aug 15 10:27:39 2018] [drm:drm_add_edid_modes [drm]] ELD size 32, SAD count 1
>[Wed Aug 15 10:27:39 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:27:39 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2] probed modes :
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 92:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 94:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 93:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 101:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 110:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 111:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 113:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 114:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 107:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 108:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:27:39 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 109:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] connector 71 enabled? no
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] connector 78 enabled? yes
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] connector 83 enabled? yes
>[Wed Aug 15 10:27:39 2018] [drm:intel_fb_initial_config [i915]] Not using firmware configuration
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] looking for cmdline mode on connector 78
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] looking for preferred mode on connector 78 0
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] found mode 1920x1080
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] looking for cmdline mode on connector 83
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] looking for preferred mode on connector 83 0
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] found mode 3840x2160
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] picking CRTCs for 3840x2160 config
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] desired mode 1920x1080 set on crtc 41 (0,0)
>[Wed Aug 15 10:27:39 2018] [drm:drm_setup_crtcs [drm_kms_helper]] desired mode 3840x2160 set on crtc 55 (0,0)
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a41d9585 state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 0000000032b4fe10 state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:33:plane 2A] 00000000eab445e3 state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:33:plane 2A] state 00000000eab445e3
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:38:cursor A] 00000000029c90b5 state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:38:cursor A] state 00000000029c90b5
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000339ef1f4 state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000a66d4ccc state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:47:plane 2B] 000000003a9dc306 state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:47:plane 2B] state 000000003a9dc306
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:cursor B] 000000001c874a6f state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:52:cursor B] state 000000001c874a6f
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:56:plane 1C] 000000006a9f5df2 state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:61:plane 2C] 000000009fa2084e state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:61:plane 2C] state 000000009fa2084e
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:66:cursor C] 00000000ca39c3cb state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:66:cursor C] state 00000000ca39c3cb
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for [CRTC:41:pipe A] state 0000000032b4fe10
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:124] for [PLANE:28:plane 1A] state 00000000a41d9585
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:41:pipe A] to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] 00000000e92d7c3d state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state 00000000e92d7c3d to [NOCRTC]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state 00000000e92d7c3d to [CRTC:41:pipe A]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:3840x2160] for [CRTC:55:pipe B] state 00000000a66d4ccc
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:124] for [PLANE:42:plane 1B] state 00000000339ef1f4
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:55:pipe B] to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:83:DP-2] 0000000049afd9fe state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state 0000000049afd9fe to [NOCRTC]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state 0000000049afd9fe to [CRTC:55:pipe B]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:69:pipe C] 000000005f03febd state to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:69:pipe C] state 000000005f03febd
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:56:plane 1C] state 000000006a9f5df2
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:69:pipe C] to 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] keeps [ENCODER:70:DDI B], now on [CRTC:41:pipe A]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:83:DP-2] keeps [ENCODER:82:DDI C], now on [CRTC:55:pipe B]
>[Wed Aug 15 10:27:39 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 124
>[Wed Aug 15 10:27:39 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:27:39 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 124
>[Wed Aug 15 10:27:39 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_commit [drm]] committing 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c0255575
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000086c067ca
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000ea2fbdd1 state to 0000000086c067ca
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000b1920b94 state to 0000000086c067ca
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:33:plane 2A] 0000000043676b3f state to 0000000086c067ca
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:33:plane 2A] state 0000000043676b3f
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:38:cursor A] 00000000ecd987b6 state to 0000000086c067ca
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:38:cursor A] state 00000000ecd987b6
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 000000004fba0dd9 state to 0000000086c067ca
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000106a70b9 state to 0000000086c067ca
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:47:plane 2B] 00000000b959facf state to 0000000086c067ca
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:47:plane 2B] state 00000000b959facf
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:cursor B] 000000005a231d41 state to 0000000086c067ca
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:52:cursor B] state 000000005a231d41
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:56:plane 1C] 000000001f9ca439 state to 0000000086c067ca
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:61:plane 2C] 0000000039f70269 state to 0000000086c067ca
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:61:plane 2C] state 0000000039f70269
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:66:cursor C] 0000000035724be8 state to 0000000086c067ca
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:66:cursor C] state 0000000035724be8
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for [CRTC:41:pipe A] state 00000000b1920b94
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:124] for [PLANE:28:plane 1A] state 00000000ea2fbdd1
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:41:pipe A] to 0000000086c067ca
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] 000000004a2800cb state to 0000000086c067ca
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state 000000004a2800cb to [NOCRTC]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state 000000004a2800cb to [CRTC:41:pipe A]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:3840x2160] for [CRTC:55:pipe B] state 00000000106a70b9
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:124] for [PLANE:42:plane 1B] state 000000004fba0dd9
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:55:pipe B] to 0000000086c067ca
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:83:DP-2] 00000000643d5953 state to 0000000086c067ca
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state 00000000643d5953 to [NOCRTC]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state 00000000643d5953 to [CRTC:55:pipe B]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:69:pipe C] 00000000ba7a7c95 state to 0000000086c067ca
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:69:pipe C] state 00000000ba7a7c95
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:56:plane 1C] state 000000001f9ca439
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:69:pipe C] to 0000000086c067ca
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_check_only [drm]] checking 0000000086c067ca
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] keeps [ENCODER:70:DDI B], now on [CRTC:41:pipe A]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:83:DP-2] keeps [ENCODER:82:DDI C], now on [CRTC:55:pipe B]
>[Wed Aug 15 10:27:39 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 124
>[Wed Aug 15 10:27:39 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:27:39 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 124
>[Wed Aug 15 10:27:39 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_commit [drm]] committing 0000000086c067ca
>[Wed Aug 15 10:27:39 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000086c067ca
>[Wed Aug 15 10:27:39 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000086c067ca
>[Wed Aug 15 10:27:41 2018] audit: type=1400 audit(1534325262.068:7): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/bin/evince" pid=419 comm="apparmor_parser"
>[Wed Aug 15 10:27:41 2018] audit: type=1400 audit(1534325262.068:8): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/bin/evince//sanitized_helper" pid=419 comm="apparmor_parser"
>[Wed Aug 15 10:27:41 2018] audit: type=1400 audit(1534325262.068:9): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/bin/evince-previewer" pid=419 comm="apparmor_parser"
>[Wed Aug 15 10:27:41 2018] audit: type=1400 audit(1534325262.072:10): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/bin/evince-previewer//sanitized_helper" pid=419 comm="apparmor_parser"
>[Wed Aug 15 10:27:41 2018] audit: type=1400 audit(1534325262.072:11): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/bin/evince-thumbnailer" pid=419 comm="apparmor_parser"
>[Wed Aug 15 10:27:42 2018] IPv6: ADDRCONF(NETDEV_UP): enp1s0: link is not ready
>[Wed Aug 15 10:27:42 2018] IPv6: ADDRCONF(NETDEV_UP): enp1s0: link is not ready
>[Wed Aug 15 10:27:42 2018] IPv6: ADDRCONF(NETDEV_UP): enp2s0: link is not ready
>[Wed Aug 15 10:27:42 2018] IPv6: ADDRCONF(NETDEV_UP): enp2s0: link is not ready
>[Wed Aug 15 10:27:42 2018] IPv6: ADDRCONF(NETDEV_UP): enp3s0: link is not ready
>[Wed Aug 15 10:27:43 2018] IPv6: ADDRCONF(NETDEV_UP): enp3s0: link is not ready
>[Wed Aug 15 10:27:45 2018] igb 0000:01:00.0 enp1s0: igb: enp1s0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: None
>[Wed Aug 15 10:27:45 2018] IPv6: ADDRCONF(NETDEV_CHANGE): enp1s0: link becomes ready
>[Wed Aug 15 10:27:45 2018] igb 0000:01:00.0: changing MTU from 1500 to 9000
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000dbe91efb
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000007f553aa7 state to 00000000dbe91efb
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 0000000078fa9a00 state to 00000000dbe91efb
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:33:plane 2A] 00000000d4c2e330 state to 00000000dbe91efb
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:33:plane 2A] state 00000000d4c2e330
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:38:cursor A] 000000008ee547d6 state to 00000000dbe91efb
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:38:cursor A] state 000000008ee547d6
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000337bdf36 state to 00000000dbe91efb
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 000000000dc43762 state to 00000000dbe91efb
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:47:plane 2B] 00000000bdc3d1e9 state to 00000000dbe91efb
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:47:plane 2B] state 00000000bdc3d1e9
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:cursor B] 00000000bccfd72f state to 00000000dbe91efb
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:52:cursor B] state 00000000bccfd72f
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:56:plane 1C] 0000000097eb27a9 state to 00000000dbe91efb
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:61:plane 2C] 000000002ff2451e state to 00000000dbe91efb
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:61:plane 2C] state 000000002ff2451e
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:66:cursor C] 00000000e59fb0d6 state to 00000000dbe91efb
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:66:cursor C] state 00000000e59fb0d6
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for [CRTC:41:pipe A] state 0000000078fa9a00
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:124] for [PLANE:28:plane 1A] state 000000007f553aa7
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:41:pipe A] to 00000000dbe91efb
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] 00000000b4f4561d state to 00000000dbe91efb
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state 00000000b4f4561d to [NOCRTC]
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state 00000000b4f4561d to [CRTC:41:pipe A]
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:3840x2160] for [CRTC:55:pipe B] state 000000000dc43762
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:124] for [PLANE:42:plane 1B] state 00000000337bdf36
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:55:pipe B] to 00000000dbe91efb
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:83:DP-2] 00000000b57b654c state to 00000000dbe91efb
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state 00000000b57b654c to [NOCRTC]
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state 00000000b57b654c to [CRTC:55:pipe B]
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:69:pipe C] 00000000b3221f1c state to 00000000dbe91efb
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:69:pipe C] state 00000000b3221f1c
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:56:plane 1C] state 0000000097eb27a9
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:69:pipe C] to 00000000dbe91efb
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_check_only [drm]] checking 00000000dbe91efb
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] keeps [ENCODER:70:DDI B], now on [CRTC:41:pipe A]
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:83:DP-2] keeps [ENCODER:82:DDI C], now on [CRTC:55:pipe B]
>[Wed Aug 15 10:27:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 124
>[Wed Aug 15 10:27:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:27:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 124
>[Wed Aug 15 10:27:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_commit [drm]] committing 00000000dbe91efb
>[Wed Aug 15 10:27:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000dbe91efb
>[Wed Aug 15 10:27:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000dbe91efb
>[Wed Aug 15 10:27:48 2018] igb 0000:01:00.0 enp1s0: igb: enp1s0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: None
>[Wed Aug 15 10:28:46 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000081569353
>[Wed Aug 15 10:28:46 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a5b28d12 state to 0000000081569353
>[Wed Aug 15 10:28:46 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000c813c81e state to 0000000081569353
>[Wed Aug 15 10:28:46 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:33:plane 2A] 0000000032de2f51 state to 0000000081569353
>[Wed Aug 15 10:28:46 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:33:plane 2A] state 0000000032de2f51
>[Wed Aug 15 10:28:46 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:38:cursor A] 00000000755b0bf0 state to 0000000081569353
>[Wed Aug 15 10:28:46 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:38:cursor A] state 00000000755b0bf0
>[Wed Aug 15 10:28:46 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000eef23643 state to 0000000081569353
>[Wed Aug 15 10:28:46 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 0000000059f549f0 state to 0000000081569353
>[Wed Aug 15 10:28:46 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:47:plane 2B] 00000000233701a4 state to 0000000081569353
>[Wed Aug 15 10:28:46 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:47:plane 2B] state 00000000233701a4
>[Wed Aug 15 10:28:46 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:cursor B] 000000008ca03ed2 state to 0000000081569353
>[Wed Aug 15 10:28:46 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:52:cursor B] state 000000008ca03ed2
>[Wed Aug 15 10:28:46 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:56:plane 1C] 000000009407ca7d state to 0000000081569353
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:61:plane 2C] 0000000038bebb2b state to 0000000081569353
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:61:plane 2C] state 0000000038bebb2b
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:66:cursor C] 00000000875f80d2 state to 0000000081569353
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:66:cursor C] state 00000000875f80d2
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for [CRTC:41:pipe A] state 00000000c813c81e
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:124] for [PLANE:28:plane 1A] state 00000000a5b28d12
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:41:pipe A] to 0000000081569353
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] 000000005fb9ea04 state to 0000000081569353
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state 000000005fb9ea04 to [NOCRTC]
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state 000000005fb9ea04 to [CRTC:41:pipe A]
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:3840x2160] for [CRTC:55:pipe B] state 0000000059f549f0
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:124] for [PLANE:42:plane 1B] state 00000000eef23643
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:55:pipe B] to 0000000081569353
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:83:DP-2] 000000007e06cdd8 state to 0000000081569353
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state 000000007e06cdd8 to [NOCRTC]
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state 000000007e06cdd8 to [CRTC:55:pipe B]
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:69:pipe C] 00000000fb8c01db state to 0000000081569353
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:69:pipe C] state 00000000fb8c01db
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:56:plane 1C] state 000000009407ca7d
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:69:pipe C] to 0000000081569353
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_check_only [drm]] checking 0000000081569353
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] keeps [ENCODER:70:DDI B], now on [CRTC:41:pipe A]
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:83:DP-2] keeps [ENCODER:82:DDI C], now on [CRTC:55:pipe B]
>[Wed Aug 15 10:28:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 124
>[Wed Aug 15 10:28:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:28:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 124
>[Wed Aug 15 10:28:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_commit [drm]] committing 0000000081569353
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000081569353
>[Wed Aug 15 10:28:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000081569353
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003f4cd1ae
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a41d9585 state to 000000003f4cd1ae
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 0000000080e92804 state to 000000003f4cd1ae
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:33:plane 2A] 00000000d6e6888c state to 000000003f4cd1ae
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:33:plane 2A] state 00000000d6e6888c
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:38:cursor A] 0000000091e2c9b7 state to 000000003f4cd1ae
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:38:cursor A] state 0000000091e2c9b7
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000a135c548 state to 000000003f4cd1ae
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 0000000032069e44 state to 000000003f4cd1ae
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:47:plane 2B] 00000000df9a65bb state to 000000003f4cd1ae
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:47:plane 2B] state 00000000df9a65bb
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:cursor B] 0000000018e75000 state to 000000003f4cd1ae
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:52:cursor B] state 0000000018e75000
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:56:plane 1C] 0000000074351469 state to 000000003f4cd1ae
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:61:plane 2C] 00000000e7ef36b9 state to 000000003f4cd1ae
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:61:plane 2C] state 00000000e7ef36b9
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:66:cursor C] 00000000cc478a1d state to 000000003f4cd1ae
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:66:cursor C] state 00000000cc478a1d
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for [CRTC:41:pipe A] state 0000000080e92804
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:124] for [PLANE:28:plane 1A] state 00000000a41d9585
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:41:pipe A] to 000000003f4cd1ae
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] 00000000200d546f state to 000000003f4cd1ae
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state 00000000200d546f to [NOCRTC]
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state 00000000200d546f to [CRTC:41:pipe A]
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:3840x2160] for [CRTC:55:pipe B] state 0000000032069e44
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:124] for [PLANE:42:plane 1B] state 00000000a135c548
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:55:pipe B] to 000000003f4cd1ae
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:83:DP-2] 000000009539da37 state to 000000003f4cd1ae
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state 000000009539da37 to [NOCRTC]
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state 000000009539da37 to [CRTC:55:pipe B]
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:69:pipe C] 00000000c332d023 state to 000000003f4cd1ae
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:69:pipe C] state 00000000c332d023
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:56:plane 1C] state 0000000074351469
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:69:pipe C] to 000000003f4cd1ae
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_check_only [drm]] checking 000000003f4cd1ae
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] keeps [ENCODER:70:DDI B], now on [CRTC:41:pipe A]
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:83:DP-2] keeps [ENCODER:82:DDI C], now on [CRTC:55:pipe B]
>[Wed Aug 15 10:28:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 124
>[Wed Aug 15 10:28:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:28:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 124
>[Wed Aug 15 10:28:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_commit [drm]] committing 000000003f4cd1ae
>[Wed Aug 15 10:28:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003f4cd1ae
>[Wed Aug 15 10:28:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003f4cd1ae
>[Wed Aug 15 10:29:54 2018] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00200000, dig 0x10101012, pins 0x00000020, long 0x00000020
>[Wed Aug 15 10:29:54 2018] [drm:intel_hpd_irq_handler [i915]] digital hpd port B - long
>[Wed Aug 15 10:29:54 2018] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 5 - cnt: 0
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port B - long
>[Wed Aug 15 10:29:54 2018] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[Wed Aug 15 10:29:54 2018] [drm:i915_hotplug_work_func [i915]] Connector DP-1 (pin 5) received hotplug event.
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:29:54 2018] [drm:i915_hotplug_work_func [i915]] Connector HDMI-A-1 (pin 5) received hotplug event.
>[Wed Aug 15 10:29:54 2018] [drm:intel_hdmi_detect [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:29:54 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[Wed Aug 15 10:29:54 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:29:54 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[Wed Aug 15 10:29:54 2018] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[Wed Aug 15 10:29:54 2018] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[Wed Aug 15 10:29:54 2018] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[Wed Aug 15 10:29:54 2018] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[Wed Aug 15 10:29:54 2018] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[Wed Aug 15 10:29:54 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:29:54 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:29:54 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:29:54 2018] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[Wed Aug 15 10:29:54 2018] [drm:intel_encoder_hotplug [i915]] [CONNECTOR:78:HDMI-A-1] status updated from connected to disconnected
>[Wed Aug 15 10:29:54 2018] [drm:drm_fb_helper_hotplug_event.part.31 [drm_kms_helper]] 
>[Wed Aug 15 10:29:54 2018] [drm:drm_setup_crtcs [drm_kms_helper]] 
>[Wed Aug 15 10:29:54 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:29:54 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1] disconnected
>[Wed Aug 15 10:29:54 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:29:54 2018] [drm:intel_hdmi_detect [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:29:54 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[Wed Aug 15 10:29:54 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:29:54 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[Wed Aug 15 10:29:54 2018] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[Wed Aug 15 10:29:54 2018] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[Wed Aug 15 10:29:54 2018] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[Wed Aug 15 10:29:54 2018] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[Wed Aug 15 10:29:54 2018] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[Wed Aug 15 10:29:54 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:29:54 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:29:54 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:29:54 2018] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[Wed Aug 15 10:29:54 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] disconnected
>[Wed Aug 15 10:29:54 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 00 01 00 02 02 06 00 00 00 00
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[Wed Aug 15 10:29:54 2018] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[Wed Aug 15 10:29:54 2018] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[Wed Aug 15 10:29:54 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:29:54 2018] [drm:drm_add_edid_modes [drm]] ELD monitor U28E590
>[Wed Aug 15 10:29:54 2018] [drm:drm_add_edid_modes [drm]] ELD size 32, SAD count 1
>[Wed Aug 15 10:29:54 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:29:54 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2] probed modes :
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 92:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 94:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 93:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 101:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 110:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 111:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 113:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 114:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 107:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 108:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 109:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[Wed Aug 15 10:29:54 2018] [drm:drm_setup_crtcs [drm_kms_helper]] connector 71 enabled? no
>[Wed Aug 15 10:29:54 2018] [drm:drm_setup_crtcs [drm_kms_helper]] connector 78 enabled? no
>[Wed Aug 15 10:29:54 2018] [drm:drm_setup_crtcs [drm_kms_helper]] connector 83 enabled? yes
>[Wed Aug 15 10:29:54 2018] [drm:intel_fb_initial_config [i915]] Not using firmware configuration
>[Wed Aug 15 10:29:54 2018] [drm:drm_setup_crtcs [drm_kms_helper]] looking for cmdline mode on connector 83
>[Wed Aug 15 10:29:54 2018] [drm:drm_setup_crtcs [drm_kms_helper]] looking for preferred mode on connector 83 0
>[Wed Aug 15 10:29:54 2018] [drm:drm_setup_crtcs [drm_kms_helper]] found mode 3840x2160
>[Wed Aug 15 10:29:54 2018] [drm:drm_setup_crtcs [drm_kms_helper]] picking CRTCs for 3840x2160 config
>[Wed Aug 15 10:29:54 2018] [drm:drm_setup_crtcs [drm_kms_helper]] desired mode 3840x2160 set on crtc 41 (0,0)
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000eed13ff4 state to 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000b3221f1c state to 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:33:plane 2A] 00000000923baee7 state to 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:33:plane 2A] state 00000000923baee7
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:38:cursor A] 000000006507a935 state to 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:38:cursor A] state 000000006507a935
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000d17e7768 state to 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 000000006af03025 state to 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:47:plane 2B] 000000005629be04 state to 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:47:plane 2B] state 000000005629be04
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:cursor B] 0000000090c93c52 state to 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:52:cursor B] state 0000000090c93c52
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:56:plane 1C] 00000000c177de34 state to 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:61:plane 2C] 0000000021ed7d96 state to 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:61:plane 2C] state 0000000021ed7d96
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:66:cursor C] 0000000047b33070 state to 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:66:cursor C] state 0000000047b33070
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:3840x2160] for [CRTC:41:pipe A] state 00000000b3221f1c
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:124] for [PLANE:28:plane 1A] state 00000000eed13ff4
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:41:pipe A] to 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] 00000000891dd0ca state to 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state 00000000891dd0ca to [NOCRTC]
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:83:DP-2] 00000000038a91c7 state to 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state 00000000038a91c7 to [CRTC:41:pipe A]
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_set_mode_prop_for_crtc [drm]] Set [NOMODE] for [CRTC:55:pipe B] state 000000006af03025
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:55:pipe B] state 000000006af03025
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:42:plane 1B] state 00000000d17e7768 to [NOCRTC]
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:42:plane 1B] state 00000000d17e7768
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:55:pipe B] to 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:69:pipe C] 00000000ecf525e8 state to 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:69:pipe C] state 00000000ecf525e8
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:56:plane 1C] state 00000000c177de34
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:69:pipe C] to 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_check_only [drm]] checking 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:41:pipe A] mode changed
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:55:pipe B] mode changed
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:55:pipe B] enable changed
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:55:pipe B] active changed
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:83:DP-2] keeps [ENCODER:82:DDI C], now on [CRTC:41:pipe A]
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:41:pipe A] needs all connectors, enable: y, active: y
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:41:pipe A] to 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:41:pipe A] to 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:55:pipe B] needs all connectors, enable: n, active: n
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:55:pipe B] to 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:55:pipe B] to 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:intel_atomic_check [i915]] [CONNECTOR:83:DP-2] checking for sink bpp constrains
>[Wed Aug 15 10:29:54 2018] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 30
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max rate 540000 max bpp 30 pixel clock 533250KHz
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_compute_config [i915]] DP lane count 4 clock 540000 bpp 30
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_compute_config [i915]] DP link rate required 1999688 available 2160000
>[Wed Aug 15 10:29:54 2018] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 30, dithering: 0
>[Wed Aug 15 10:29:54 2018] [drm:intel_dump_pipe_config [i915]] [CRTC:41:pipe A][modeset]
>[Wed Aug 15 10:29:54 2018] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80)
>[Wed Aug 15 10:29:54 2018] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 30, dithering: 0
>[Wed Aug 15 10:29:54 2018] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 7766016, gmch_n: 8388608, link_m: 1035468, link_n: 1048576, tu: 64
>[Wed Aug 15 10:29:54 2018] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 0
>[Wed Aug 15 10:29:54 2018] [drm:intel_dump_pipe_config [i915]] requested mode:
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9
>[Wed Aug 15 10:29:54 2018] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[Wed Aug 15 10:29:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9
>[Wed Aug 15 10:29:54 2018] [drm:intel_dump_pipe_config [i915]] crtc timings: 533250 3840 3888 3920 4000 2160 2163 2168 2222, type: 0x48 flags: 0x9
>[Wed Aug 15 10:29:54 2018] [drm:intel_dump_pipe_config [i915]] port clock: 540000, pipe src size: 3840x2160, pixel rate 533250
>[Wed Aug 15 10:29:54 2018] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[Wed Aug 15 10:29:54 2018] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[Wed Aug 15 10:29:54 2018] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[Wed Aug 15 10:29:54 2018] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x21, cfgcr1: 0x80400173, cfgcr2: 0x3a5
>[Wed Aug 15 10:29:54 2018] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[Wed Aug 15 10:29:54 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] FB:124, fb = 3840x2160 format = XR24 little-endian (0x34325258)
>[Wed Aug 15 10:29:54 2018] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+1920+1080 dst 0x0+1920+1080
>[Wed Aug 15 10:29:54 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 2A] disabled, scaler_id = -1
>[Wed Aug 15 10:29:54 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:38:cursor A] disabled, scaler_id = -1
>[Wed Aug 15 10:29:54 2018] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 540000 kHz, actual 540000 kHz
>[Wed Aug 15 10:29:54 2018] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 2, actual 2
>[Wed Aug 15 10:29:54 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 124
>[Wed Aug 15 10:29:54 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 1, on 1, ms 1
>[Wed Aug 15 10:29:54 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb -1
>[Wed Aug 15 10:29:54 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 0, off 1, on 0, ms 1
>[Wed Aug 15 10:29:54 2018] [drm:intel_find_shared_dpll [i915]] [CRTC:41:pipe A] allocated DPLL 1
>[Wed Aug 15 10:29:54 2018] [drm:intel_reference_shared_dpll [i915]] using DPLL 1 for pipe A
>[Wed Aug 15 10:29:54 2018] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 289) -> (0 - 860)
>[Wed Aug 15 10:29:54 2018] [drm:skl_compute_wm [i915]] [PLANE:38:cursor A] ddb (289 - 297) -> (860 - 892)
>[Wed Aug 15 10:29:54 2018] [drm:skl_compute_wm [i915]] [PLANE:42:plane 1B] ddb (297 - 884) -> (0 - 0)
>[Wed Aug 15 10:29:54 2018] [drm:skl_compute_wm [i915]] [PLANE:52:cursor B] ddb (884 - 892) -> (0 - 0)
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_commit [drm]] committing 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:intel_disable_pipe [i915]] disabling pipe A
>[Wed Aug 15 10:29:54 2018] [drm:intel_disable_shared_dpll [i915]] disable DPLL 1 (active 1, on? 1) for crtc 41
>[Wed Aug 15 10:29:54 2018] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 1
>[Wed Aug 15 10:29:54 2018] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe B
>[Wed Aug 15 10:29:54 2018] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[Wed Aug 15 10:29:54 2018] [drm:intel_disable_pipe [i915]] disabling pipe B
>[Wed Aug 15 10:29:54 2018] [drm:intel_disable_shared_dpll [i915]] disable DPLL 2 (active 2, on? 1) for crtc 55
>[Wed Aug 15 10:29:54 2018] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 2
>[Wed Aug 15 10:29:54 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DDI B]
>[Wed Aug 15 10:29:54 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST A]
>[Wed Aug 15 10:29:54 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:73:DP-MST B]
>[Wed Aug 15 10:29:54 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:74:DP-MST C]
>[Wed Aug 15 10:29:54 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:82:DDI C]
>[Wed Aug 15 10:29:54 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:84:DP-MST A]
>[Wed Aug 15 10:29:54 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST B]
>[Wed Aug 15 10:29:54 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST C]
>[Wed Aug 15 10:29:54 2018] [drm:verify_connector_state.isra.125 [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:29:54 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 0
>[Wed Aug 15 10:29:54 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 1
>[Wed Aug 15 10:29:54 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 2
>[Wed Aug 15 10:29:54 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 3
>[Wed Aug 15 10:29:54 2018] [drm:intel_enable_shared_dpll [i915]] enable DPLL 1 (active 1, on? 0) for crtc 41
>[Wed Aug 15 10:29:54 2018] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 1
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_start_link_train [i915]] Using LINK_BW_SET value 14
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 07000000
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 08000000
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 1
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[Wed Aug 15 10:29:54 2018] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:83:DP-2] Link Training Passed at Link Rate = 540000, Lane count = 4
>[Wed Aug 15 10:29:54 2018] [drm:intel_enable_pipe [i915]] enabling pipe A
>[Wed Aug 15 10:29:54 2018] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS
>[Wed Aug 15 10:29:54 2018] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:83:DP-2], [ENCODER:82:DDI C]
>[Wed Aug 15 10:29:54 2018] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe A, 32 bytes ELD
>[Wed Aug 15 10:29:54 2018] [drm:hsw_audio_config_update [i915]] using automatic Maud, Naud
>[Wed Aug 15 10:29:54 2018] [drm:verify_connector_state.isra.125 [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:29:54 2018] [drm:intel_atomic_commit_tail [i915]] [CRTC:41:pipe A]
>[Wed Aug 15 10:29:54 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 1
>[Wed Aug 15 10:29:54 2018] [drm:intel_atomic_commit_tail [i915]] [CRTC:55:pipe B]
>[Wed Aug 15 10:29:54 2018] [drm:intel_enable_sagv [i915]] Enabling the SAGV
>[Wed Aug 15 10:29:54 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000092c0420f
>[Wed Aug 15 10:29:54 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000092c0420f
>[Wed Aug 15 10:29:57 2018] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00200000, dig 0x10101012, pins 0x00000020, long 0x00000020
>[Wed Aug 15 10:29:57 2018] [drm:intel_hpd_irq_handler [i915]] digital hpd port B - long
>[Wed Aug 15 10:29:57 2018] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 5 - cnt: 0
>[Wed Aug 15 10:29:57 2018] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port B - long
>[Wed Aug 15 10:29:57 2018] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[Wed Aug 15 10:29:57 2018] [drm:i915_hotplug_work_func [i915]] Connector DP-1 (pin 5) received hotplug event.
>[Wed Aug 15 10:29:57 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:29:57 2018] [drm:i915_hotplug_work_func [i915]] Connector HDMI-A-1 (pin 5) received hotplug event.
>[Wed Aug 15 10:29:57 2018] [drm:intel_hdmi_detect [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:29:57 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[Wed Aug 15 10:29:57 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:29:57 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[Wed Aug 15 10:29:57 2018] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[Wed Aug 15 10:29:57 2018] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[Wed Aug 15 10:29:57 2018] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[Wed Aug 15 10:29:57 2018] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00200000, dig 0x10101012, pins 0x00000020, long 0x00000020
>[Wed Aug 15 10:29:57 2018] [drm:intel_hpd_irq_handler [i915]] digital hpd port B - long
>[Wed Aug 15 10:29:57 2018] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 5 - cnt: 1
>[Wed Aug 15 10:29:57 2018] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port B - long
>[Wed Aug 15 10:29:57 2018] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[Wed Aug 15 10:29:57 2018] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[Wed Aug 15 10:29:57 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:29:57 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:29:57 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:29:57 2018] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[Wed Aug 15 10:29:57 2018] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[Wed Aug 15 10:29:57 2018] [drm:i915_hotplug_work_func [i915]] Connector DP-1 (pin 5) received hotplug event.
>[Wed Aug 15 10:29:57 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:29:57 2018] [drm:i915_hotplug_work_func [i915]] Connector HDMI-A-1 (pin 5) received hotplug event.
>[Wed Aug 15 10:29:57 2018] [drm:intel_hdmi_detect [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:29:57 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[Wed Aug 15 10:29:57 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:29:57 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[Wed Aug 15 10:29:57 2018] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[Wed Aug 15 10:29:57 2018] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[Wed Aug 15 10:29:57 2018] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[Wed Aug 15 10:29:57 2018] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[Wed Aug 15 10:29:57 2018] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[Wed Aug 15 10:29:57 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:29:57 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:29:57 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:29:57 2018] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[Wed Aug 15 10:30:04 2018] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00200000, dig 0x10101012, pins 0x00000020, long 0x00000020
>[Wed Aug 15 10:30:04 2018] [drm:intel_hpd_irq_handler [i915]] digital hpd port B - long
>[Wed Aug 15 10:30:04 2018] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 5 - cnt: 0
>[Wed Aug 15 10:30:04 2018] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port B - long
>[Wed Aug 15 10:30:04 2018] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[Wed Aug 15 10:30:04 2018] [drm:i915_hotplug_work_func [i915]] Connector DP-1 (pin 5) received hotplug event.
>[Wed Aug 15 10:30:04 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:30:04 2018] [drm:i915_hotplug_work_func [i915]] Connector HDMI-A-1 (pin 5) received hotplug event.
>[Wed Aug 15 10:30:04 2018] [drm:intel_hdmi_detect [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:30:04 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[Wed Aug 15 10:30:04 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:30:04 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[Wed Aug 15 10:30:04 2018] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[Wed Aug 15 10:30:04 2018] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[Wed Aug 15 10:30:04 2018] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[Wed Aug 15 10:30:04 2018] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00200000, dig 0x10101012, pins 0x00000020, long 0x00000020
>[Wed Aug 15 10:30:04 2018] [drm:intel_hpd_irq_handler [i915]] digital hpd port B - long
>[Wed Aug 15 10:30:04 2018] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 5 - cnt: 1
>[Wed Aug 15 10:30:04 2018] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port B - long
>[Wed Aug 15 10:30:04 2018] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[Wed Aug 15 10:30:04 2018] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[Wed Aug 15 10:30:04 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:30:04 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:30:04 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:30:04 2018] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[Wed Aug 15 10:30:04 2018] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[Wed Aug 15 10:30:04 2018] [drm:i915_hotplug_work_func [i915]] Connector DP-1 (pin 5) received hotplug event.
>[Wed Aug 15 10:30:04 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:30:04 2018] [drm:i915_hotplug_work_func [i915]] Connector HDMI-A-1 (pin 5) received hotplug event.
>[Wed Aug 15 10:30:04 2018] [drm:intel_hdmi_detect [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:30:04 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[Wed Aug 15 10:30:04 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:30:04 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[Wed Aug 15 10:30:04 2018] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[Wed Aug 15 10:30:04 2018] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[Wed Aug 15 10:30:04 2018] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[Wed Aug 15 10:30:04 2018] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[Wed Aug 15 10:30:04 2018] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[Wed Aug 15 10:30:04 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:30:04 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:30:04 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:30:04 2018] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[Wed Aug 15 10:32:31 2018] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00200000, dig 0x10101012, pins 0x00000020, long 0x00000020
>[Wed Aug 15 10:32:31 2018] [drm:intel_hpd_irq_handler [i915]] digital hpd port B - long
>[Wed Aug 15 10:32:31 2018] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 5 - cnt: 0
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port B - long
>[Wed Aug 15 10:32:31 2018] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[Wed Aug 15 10:32:31 2018] [drm:i915_hotplug_work_func [i915]] Connector DP-1 (pin 5) received hotplug event.
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[Wed Aug 15 10:32:31 2018] [drm:i915_hotplug_work_func [i915]] Connector HDMI-A-1 (pin 5) received hotplug event.
>[Wed Aug 15 10:32:31 2018] [drm:intel_hdmi_detect [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:32:31 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:32:31 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:32:31 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:32:31 2018] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[Wed Aug 15 10:32:31 2018] [drm:intel_hdmi_set_edid [i915]] Assuming DP dual mode adaptor presence based on VBT
>[Wed Aug 15 10:32:31 2018] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (type 1 DVI) detected (max TMDS clock: 165000 kHz)
>[Wed Aug 15 10:32:31 2018] [drm:intel_encoder_hotplug [i915]] [CONNECTOR:78:HDMI-A-1] status updated from disconnected to connected
>[Wed Aug 15 10:32:31 2018] [drm:drm_fb_helper_hotplug_event.part.31 [drm_kms_helper]] 
>[Wed Aug 15 10:32:31 2018] [drm:drm_setup_crtcs [drm_kms_helper]] 
>[Wed Aug 15 10:32:31 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:31 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:32:32 2018] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[Wed Aug 15 10:32:32 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1] disconnected
>[Wed Aug 15 10:32:32 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:32:32 2018] [drm:intel_hdmi_detect [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:32:32 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:32:32 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:32:32 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:32:32 2018] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[Wed Aug 15 10:32:32 2018] [drm:intel_hdmi_set_edid [i915]] Assuming DP dual mode adaptor presence based on VBT
>[Wed Aug 15 10:32:32 2018] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (type 1 DVI) detected (max TMDS clock: 165000 kHz)
>[Wed Aug 15 10:32:32 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:32:32 2018] [drm:drm_add_edid_modes [drm]] ELD: no CEA Extension found
>[Wed Aug 15 10:32:32 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:32:32 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] probed modes :
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[Wed Aug 15 10:32:32 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 00 01 00 02 02 06 00 00 00 00
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[Wed Aug 15 10:32:32 2018] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[Wed Aug 15 10:32:32 2018] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[Wed Aug 15 10:32:32 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:32:32 2018] [drm:drm_add_edid_modes [drm]] ELD monitor U28E590
>[Wed Aug 15 10:32:32 2018] [drm:drm_add_edid_modes [drm]] ELD size 32, SAD count 1
>[Wed Aug 15 10:32:32 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:32:32 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2] probed modes :
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 92:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 94:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 93:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 101:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 110:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 111:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 113:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 114:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 107:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 108:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 109:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[Wed Aug 15 10:32:32 2018] [drm:drm_setup_crtcs [drm_kms_helper]] connector 71 enabled? no
>[Wed Aug 15 10:32:32 2018] [drm:drm_setup_crtcs [drm_kms_helper]] connector 78 enabled? yes
>[Wed Aug 15 10:32:32 2018] [drm:drm_setup_crtcs [drm_kms_helper]] connector 83 enabled? yes
>[Wed Aug 15 10:32:32 2018] [drm:intel_fb_initial_config [i915]] Not using firmware configuration
>[Wed Aug 15 10:32:32 2018] [drm:drm_setup_crtcs [drm_kms_helper]] looking for cmdline mode on connector 78
>[Wed Aug 15 10:32:32 2018] [drm:drm_setup_crtcs [drm_kms_helper]] looking for preferred mode on connector 78 0
>[Wed Aug 15 10:32:32 2018] [drm:drm_setup_crtcs [drm_kms_helper]] found mode 1920x1080
>[Wed Aug 15 10:32:32 2018] [drm:drm_setup_crtcs [drm_kms_helper]] looking for cmdline mode on connector 83
>[Wed Aug 15 10:32:32 2018] [drm:drm_setup_crtcs [drm_kms_helper]] looking for preferred mode on connector 83 0
>[Wed Aug 15 10:32:32 2018] [drm:drm_setup_crtcs [drm_kms_helper]] found mode 3840x2160
>[Wed Aug 15 10:32:32 2018] [drm:drm_setup_crtcs [drm_kms_helper]] picking CRTCs for 3840x2160 config
>[Wed Aug 15 10:32:32 2018] [drm:drm_setup_crtcs [drm_kms_helper]] desired mode 1920x1080 set on crtc 41 (0,0)
>[Wed Aug 15 10:32:32 2018] [drm:drm_setup_crtcs [drm_kms_helper]] desired mode 3840x2160 set on crtc 55 (0,0)
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000dc515744 state to 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000d0372e1f state to 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:33:plane 2A] 000000001ac46e6b state to 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:33:plane 2A] state 000000001ac46e6b
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:38:cursor A] 000000002e365d65 state to 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:38:cursor A] state 000000002e365d65
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000097786bf9 state to 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:47:plane 2B] 0000000005e00188 state to 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:47:plane 2B] state 0000000005e00188
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:cursor B] 00000000c7af1b6e state to 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:52:cursor B] state 00000000c7af1b6e
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:56:plane 1C] 00000000a104ef46 state to 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:61:plane 2C] 0000000082b6e6e4 state to 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:61:plane 2C] state 0000000082b6e6e4
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:66:cursor C] 00000000f707d666 state to 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:66:cursor C] state 00000000f707d666
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for [CRTC:41:pipe A] state 00000000d0372e1f
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:124] for [PLANE:28:plane 1A] state 00000000dc515744
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:41:pipe A] to 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:83:DP-2] 0000000063b872ca state to 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state 0000000063b872ca to [NOCRTC]
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] 00000000299e623a state to 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state 00000000299e623a to [CRTC:41:pipe A]
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 000000004b4fe4b3 state to 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:3840x2160] for [CRTC:55:pipe B] state 000000004b4fe4b3
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:42:plane 1B] state 0000000097786bf9 to [CRTC:55:pipe B]
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:124] for [PLANE:42:plane 1B] state 0000000097786bf9
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:55:pipe B] to 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state 0000000063b872ca to [CRTC:55:pipe B]
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:69:pipe C] 000000005623a265 state to 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:69:pipe C] state 000000005623a265
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:56:plane 1C] state 00000000a104ef46
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:69:pipe C] to 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_check_only [drm]] checking 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:41:pipe A] mode changed
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:55:pipe B] mode changed
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:55:pipe B] enable changed
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:55:pipe B] active changed
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] using [ENCODER:70:DDI B] on [CRTC:41:pipe A]
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:83:DP-2] keeps [ENCODER:82:DDI C], now on [CRTC:55:pipe B]
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:41:pipe A] needs all connectors, enable: y, active: y
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:41:pipe A] to 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:41:pipe A] to 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:55:pipe B] needs all connectors, enable: y, active: y
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:55:pipe B] to 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:55:pipe B] to 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:intel_atomic_check [i915]] [CONNECTOR:78:HDMI-A-1] checking for sink bpp constrains
>[Wed Aug 15 10:32:32 2018] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to default limit of 24
>[Wed Aug 15 10:32:32 2018] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
>[Wed Aug 15 10:32:32 2018] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 24 for HDMI
>[Wed Aug 15 10:32:32 2018] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] [CRTC:41:pipe A][modeset]
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] output_types: HDMI (0x40)
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 24, dithering: 0
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] requested mode:
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] port clock: 148500, pipe src size: 1920x1080, pixel rate 148500
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x1, cfgcr1: 0x0, cfgcr2: 0x0
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] FB:124, fb = 3840x2160 format = XR24 little-endian (0x34325258)
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+3840+2160 dst 0x0+3840+2160
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 2A] disabled, scaler_id = -1
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:38:cursor A] disabled, scaler_id = -1
>[Wed Aug 15 10:32:32 2018] [drm:intel_atomic_check [i915]] [CONNECTOR:83:DP-2] checking for sink bpp constrains
>[Wed Aug 15 10:32:32 2018] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 30
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max rate 540000 max bpp 30 pixel clock 533250KHz
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_compute_config [i915]] DP lane count 4 clock 540000 bpp 30
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_compute_config [i915]] DP link rate required 1999688 available 2160000
>[Wed Aug 15 10:32:32 2018] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 30, dithering: 0
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] [CRTC:55:pipe B][modeset]
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80)
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 30, dithering: 0
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 7766016, gmch_n: 8388608, link_m: 1035468, link_n: 1048576, tu: 64
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 0
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] requested mode:
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[Wed Aug 15 10:32:32 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] crtc timings: 533250 3840 3888 3920 4000 2160 2163 2168 2222, type: 0x48 flags: 0x9
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] port clock: 540000, pipe src size: 3840x2160, pixel rate 533250
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x1, cfgcr1: 0x0, cfgcr2: 0x0
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:42:plane 1B] disabled, scaler_id = -1
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1
>[Wed Aug 15 10:32:32 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:52:cursor B] disabled, scaler_id = -1
>[Wed Aug 15 10:32:32 2018] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 540000 kHz, actual 540000 kHz
>[Wed Aug 15 10:32:32 2018] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 2, actual 2
>[Wed Aug 15 10:32:32 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 124
>[Wed Aug 15 10:32:32 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 1, on 1, ms 1
>[Wed Aug 15 10:32:32 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 124
>[Wed Aug 15 10:32:32 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 0 -> 1, off 0, on 1, ms 1
>[Wed Aug 15 10:32:32 2018] [drm:intel_find_shared_dpll [i915]] [CRTC:41:pipe A] allocated DPLL 1
>[Wed Aug 15 10:32:32 2018] [drm:intel_reference_shared_dpll [i915]] using DPLL 1 for pipe A
>[Wed Aug 15 10:32:32 2018] [drm:intel_find_shared_dpll [i915]] [CRTC:55:pipe B] allocated DPLL 2
>[Wed Aug 15 10:32:32 2018] [drm:intel_reference_shared_dpll [i915]] using DPLL 2 for pipe B
>[Wed Aug 15 10:32:32 2018] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 860) -> (0 - 289)
>[Wed Aug 15 10:32:32 2018] [drm:skl_compute_wm [i915]] [PLANE:38:cursor A] ddb (860 - 892) -> (289 - 297)
>[Wed Aug 15 10:32:32 2018] [drm:skl_compute_wm [i915]] [PLANE:42:plane 1B] ddb (0 - 0) -> (297 - 884)
>[Wed Aug 15 10:32:32 2018] [drm:skl_compute_wm [i915]] [PLANE:52:cursor B] ddb (0 - 0) -> (884 - 892)
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_commit [drm]] committing 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe A
>[Wed Aug 15 10:32:32 2018] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[Wed Aug 15 10:32:32 2018] [drm:intel_disable_pipe [i915]] disabling pipe A
>[Wed Aug 15 10:32:32 2018] [drm:intel_disable_shared_dpll [i915]] disable DPLL 1 (active 1, on? 1) for crtc 41
>[Wed Aug 15 10:32:32 2018] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 1
>[Wed Aug 15 10:32:32 2018] [drm:intel_disable_sagv [i915]] Disabling the SAGV
>[Wed Aug 15 10:32:32 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DDI B]
>[Wed Aug 15 10:32:32 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST A]
>[Wed Aug 15 10:32:32 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:73:DP-MST B]
>[Wed Aug 15 10:32:32 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:74:DP-MST C]
>[Wed Aug 15 10:32:32 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:82:DDI C]
>[Wed Aug 15 10:32:32 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:84:DP-MST A]
>[Wed Aug 15 10:32:32 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST B]
>[Wed Aug 15 10:32:32 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST C]
>[Wed Aug 15 10:32:32 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 0
>[Wed Aug 15 10:32:32 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 1
>[Wed Aug 15 10:32:32 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 2
>[Wed Aug 15 10:32:32 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 3
>[Wed Aug 15 10:32:32 2018] [drm:intel_enable_shared_dpll [i915]] enable DPLL 1 (active 1, on? 0) for crtc 41
>[Wed Aug 15 10:32:32 2018] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 1
>[Wed Aug 15 10:32:32 2018] [drm:intel_enable_pipe [i915]] enabling pipe A
>[Wed Aug 15 10:32:32 2018] [drm:intel_enable_shared_dpll [i915]] enable DPLL 2 (active 2, on? 0) for crtc 55
>[Wed Aug 15 10:32:32 2018] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 2
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_start_link_train [i915]] Using LINK_BW_SET value 14
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 07000000
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 08000000
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 1
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[Wed Aug 15 10:32:32 2018] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:83:DP-2] Link Training Passed at Link Rate = 540000, Lane count = 4
>[Wed Aug 15 10:32:32 2018] [drm:intel_enable_pipe [i915]] enabling pipe B
>[Wed Aug 15 10:32:32 2018] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS
>[Wed Aug 15 10:32:32 2018] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:83:DP-2], [ENCODER:82:DDI C]
>[Wed Aug 15 10:32:32 2018] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe B, 32 bytes ELD
>[Wed Aug 15 10:32:32 2018] [drm:hsw_audio_config_update [i915]] using automatic Maud, Naud
>[Wed Aug 15 10:32:32 2018] [drm:verify_connector_state.isra.125 [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:32:32 2018] [drm:intel_atomic_commit_tail [i915]] [CRTC:41:pipe A]
>[Wed Aug 15 10:32:32 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 1
>[Wed Aug 15 10:32:32 2018] [drm:verify_connector_state.isra.125 [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:32:32 2018] [drm:intel_atomic_commit_tail [i915]] [CRTC:55:pipe B]
>[Wed Aug 15 10:32:32 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 2
>[Wed Aug 15 10:32:32 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007d06463e
>[Wed Aug 15 10:32:32 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007d06463e
>[Wed Aug 15 10:46:48 2018] perf: interrupt took too long (2504 > 2500), lowering kernel.perf_event_max_sample_rate to 79750
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000002518da86 state to 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000106a70b9 state to 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:33:plane 2A] 00000000d17e7768 state to 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:33:plane 2A] state 00000000d17e7768
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:38:cursor A] 00000000ba3def0d state to 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:38:cursor A] state 00000000ba3def0d
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000eed13ff4 state to 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000ba7a7c95 state to 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:47:plane 2B] 00000000563ba39d state to 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:47:plane 2B] state 00000000563ba39d
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:cursor B] 0000000090c93c52 state to 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:52:cursor B] state 0000000090c93c52
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:56:plane 1C] 0000000021ed7d96 state to 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:61:plane 2C] 000000006507a935 state to 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:61:plane 2C] state 000000006507a935
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:66:cursor C] 00000000923baee7 state to 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:66:cursor C] state 00000000923baee7
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for [CRTC:41:pipe A] state 00000000106a70b9
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:124] for [PLANE:28:plane 1A] state 000000002518da86
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:41:pipe A] to 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] 00000000cc5f41f6 state to 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state 00000000cc5f41f6 to [NOCRTC]
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state 00000000cc5f41f6 to [CRTC:41:pipe A]
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:3840x2160] for [CRTC:55:pipe B] state 00000000ba7a7c95
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:124] for [PLANE:42:plane 1B] state 00000000eed13ff4
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:55:pipe B] to 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:83:DP-2] 00000000632f4660 state to 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state 00000000632f4660 to [NOCRTC]
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state 00000000632f4660 to [CRTC:55:pipe B]
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:69:pipe C] 00000000b1920b94 state to 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:69:pipe C] state 00000000b1920b94
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:56:plane 1C] state 0000000021ed7d96
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:69:pipe C] to 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_check_only [drm]] checking 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] keeps [ENCODER:70:DDI B], now on [CRTC:41:pipe A]
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:83:DP-2] keeps [ENCODER:82:DDI C], now on [CRTC:55:pipe B]
>[Wed Aug 15 10:52:35 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 124
>[Wed Aug 15 10:52:35 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:35 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 124
>[Wed Aug 15 10:52:35 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_commit [drm]] committing 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_addfb2 [drm]] [FB:125]
>[Wed Aug 15 10:52:35 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[Wed Aug 15 10:52:35 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1] disconnected
>[Wed Aug 15 10:52:35 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:35 2018] [drm:intel_hdmi_detect [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:35 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:52:35 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:52:35 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:52:35 2018] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[Wed Aug 15 10:52:35 2018] [drm:intel_hdmi_set_edid [i915]] Assuming DP dual mode adaptor presence based on VBT
>[Wed Aug 15 10:52:35 2018] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (type 1 DVI) detected (max TMDS clock: 165000 kHz)
>[Wed Aug 15 10:52:35 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:35 2018] [drm:drm_add_edid_modes [drm]] ELD: no CEA Extension found
>[Wed Aug 15 10:52:35 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:35 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] probed modes :
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[Wed Aug 15 10:52:35 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 00 01 00 02 02 06 00 00 00 00
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[Wed Aug 15 10:52:35 2018] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[Wed Aug 15 10:52:35 2018] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[Wed Aug 15 10:52:35 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:35 2018] [drm:drm_add_edid_modes [drm]] ELD monitor U28E590
>[Wed Aug 15 10:52:35 2018] [drm:drm_add_edid_modes [drm]] ELD size 32, SAD count 1
>[Wed Aug 15 10:52:35 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:35 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2] probed modes :
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 92:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 94:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 93:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 101:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 110:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 111:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 113:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 114:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 107:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 108:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:52:35 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 109:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:38:cursor A] 000000000a18180f state to 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:38:cursor A] state 000000000a18180f
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_check_only [drm]] checking 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_commit [drm]] committing 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:cursor B] 00000000fb131592 state to 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:52:cursor B] state 00000000fb131592
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_check_only [drm]] checking 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_commit [drm]] committing 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:66:cursor C] 00000000eb833ed2 state to 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:66:cursor C] state 00000000eb833ed2
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_check_only [drm]] checking 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_commit [drm]] committing 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000089ac6c87
>[Wed Aug 15 10:52:35 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:35 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:36 2018] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[Wed Aug 15 10:52:36 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1] disconnected
>[Wed Aug 15 10:52:36 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:36 2018] [drm:intel_hdmi_detect [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:36 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:52:36 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:52:36 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:52:36 2018] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[Wed Aug 15 10:52:36 2018] [drm:intel_hdmi_set_edid [i915]] Assuming DP dual mode adaptor presence based on VBT
>[Wed Aug 15 10:52:36 2018] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (type 1 DVI) detected (max TMDS clock: 165000 kHz)
>[Wed Aug 15 10:52:36 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:36 2018] [drm:drm_add_edid_modes [drm]] ELD: no CEA Extension found
>[Wed Aug 15 10:52:36 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:36 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] probed modes :
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[Wed Aug 15 10:52:36 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 00 01 00 02 02 06 00 00 00 00
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[Wed Aug 15 10:52:36 2018] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[Wed Aug 15 10:52:36 2018] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[Wed Aug 15 10:52:36 2018] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[Wed Aug 15 10:52:36 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:36 2018] [drm:drm_add_edid_modes [drm]] ELD monitor U28E590
>[Wed Aug 15 10:52:36 2018] [drm:drm_add_edid_modes [drm]] ELD size 32, SAD count 1
>[Wed Aug 15 10:52:36 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:36 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2] probed modes :
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 92:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 94:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 93:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 101:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 110:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 111:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 113:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 114:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 107:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 108:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 109:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:71:DP-1] 0000000024e20d48 state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_check_only [drm]] checking 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_commit [drm]] committing 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:71:DP-1] 00000000fe423fa7 state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_check_only [drm]] checking 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_commit [drm]] committing 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:71:DP-1] 0000000024e20d48 state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_check_only [drm]] checking 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_commit [drm]] committing 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:71:DP-1] 00000000fe423fa7 state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_check_only [drm]] checking 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_commit [drm]] committing 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] 0000000024e20d48 state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 000000004b4fe4b3 state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_check_only [drm]] checking 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] keeps [ENCODER:70:DDI B], now on [CRTC:41:pipe A]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_commit [drm]] committing 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] 0000000046f2ecaf state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000d0372e1f state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_check_only [drm]] checking 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] keeps [ENCODER:70:DDI B], now on [CRTC:41:pipe A]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_commit [drm]] committing 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] 0000000024e20d48 state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 000000004b4fe4b3 state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_check_only [drm]] checking 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] keeps [ENCODER:70:DDI B], now on [CRTC:41:pipe A]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_commit [drm]] committing 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] 0000000046f2ecaf state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000d0372e1f state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_check_only [drm]] checking 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] keeps [ENCODER:70:DDI B], now on [CRTC:41:pipe A]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_commit [drm]] committing 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] 0000000024e20d48 state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 000000004b4fe4b3 state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_check_only [drm]] checking 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] keeps [ENCODER:70:DDI B], now on [CRTC:41:pipe A]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_commit [drm]] committing 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] 0000000046f2ecaf state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000d0372e1f state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_check_only [drm]] checking 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] keeps [ENCODER:70:DDI B], now on [CRTC:41:pipe A]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_commit [drm]] committing 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:83:DP-2] 0000000024e20d48 state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 000000004b4fe4b3 state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_check_only [drm]] checking 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:83:DP-2] keeps [ENCODER:82:DDI C], now on [CRTC:55:pipe B]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_commit [drm]] committing 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:83:DP-2] 000000006c6dfbca state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000cf18992b state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_check_only [drm]] checking 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:83:DP-2] keeps [ENCODER:82:DDI C], now on [CRTC:55:pipe B]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_commit [drm]] committing 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:83:DP-2] 0000000024e20d48 state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 000000004b4fe4b3 state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_check_only [drm]] checking 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:83:DP-2] keeps [ENCODER:82:DDI C], now on [CRTC:55:pipe B]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_commit [drm]] committing 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:83:DP-2] 000000006c6dfbca state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000cf18992b state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_check_only [drm]] checking 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:83:DP-2] keeps [ENCODER:82:DDI C], now on [CRTC:55:pipe B]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_commit [drm]] committing 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 0000000053f97469 state to 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:41:pipe A] to 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] 00000000e08a83db state to 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_check_only [drm]] checking 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] keeps [ENCODER:70:DDI B], now on [CRTC:41:pipe A]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_commit [drm]] committing 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000bba9e71f state to 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:55:pipe B] to 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:83:DP-2] 000000009b654aca state to 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_check_only [drm]] checking 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:83:DP-2] keeps [ENCODER:82:DDI C], now on [CRTC:55:pipe B]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_commit [drm]] committing 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 000000002f71dd99 state to 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_check_only [drm]] checking 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_commit [drm]] committing 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_addfb2 [drm]] [FB:126]
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_setcrtc [drm]] [CRTC:41:pipe A]
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 0000000053f97469 state to 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000006d6ba72 state to 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:] for [CRTC:41:pipe A] state 0000000053f97469
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:126] for [PLANE:28:plane 1A] state 0000000006d6ba72
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:41:pipe A] to 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] 000000008c179c05 state to 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state 000000008c179c05 to [NOCRTC]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state 000000008c179c05 to [CRTC:41:pipe A]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_check_only [drm]] checking 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] keeps [ENCODER:70:DDI B], now on [CRTC:41:pipe A]
>[Wed Aug 15 10:52:36 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 126
>[Wed Aug 15 10:52:36 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_commit [drm]] committing 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f3b497e3
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 000000004b4fe4b3 state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:41:pipe A] to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] 00000000dc47b1eb state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_check_only [drm]] checking 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] keeps [ENCODER:70:DDI B], now on [CRTC:41:pipe A]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_commit [drm]] committing 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000a881699b state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_check_only [drm]] checking 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_commit [drm]] committing 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_setcrtc [drm]] [CRTC:55:pipe B]
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 000000003d214534 state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 000000009407ca7d state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:] for [CRTC:55:pipe B] state 000000003d214534
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:126] for [PLANE:42:plane 1B] state 000000009407ca7d
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:55:pipe B] to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:83:DP-2] 000000006c6dfbca state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state 000000006c6dfbca to [NOCRTC]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state 000000006c6dfbca to [CRTC:55:pipe B]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_check_only [drm]] checking 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:83:DP-2] keeps [ENCODER:82:DDI C], now on [CRTC:55:pipe B]
>[Wed Aug 15 10:52:36 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 126
>[Wed Aug 15 10:52:36 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_commit [drm]] committing 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000a881699b state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:55:pipe B] to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:83:DP-2] 0000000046f2ecaf state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_check_only [drm]] checking 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:83:DP-2] keeps [ENCODER:82:DDI C], now on [CRTC:55:pipe B]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_commit [drm]] committing 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_mode_setcrtc [drm]] [CRTC:69:pipe C]
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:69:pipe C] 000000003d214534 state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:56:plane 1C] 0000000032de2f51 state to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:69:pipe C] state 000000003d214534
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:56:plane 1C] state 0000000032de2f51
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:69:pipe C] to 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_check_only [drm]] checking 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_commit [drm]] committing 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005623a265
>[Wed Aug 15 10:52:36 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005623a265
>[Wed Aug 15 10:52:37 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:37 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:38 2018] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[Wed Aug 15 10:52:38 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1] disconnected
>[Wed Aug 15 10:52:38 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:38 2018] [drm:intel_hdmi_detect [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:38 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:52:38 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:52:38 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:52:38 2018] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[Wed Aug 15 10:52:38 2018] [drm:intel_hdmi_set_edid [i915]] Assuming DP dual mode adaptor presence based on VBT
>[Wed Aug 15 10:52:38 2018] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (type 1 DVI) detected (max TMDS clock: 165000 kHz)
>[Wed Aug 15 10:52:38 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:38 2018] [drm:drm_add_edid_modes [drm]] ELD: no CEA Extension found
>[Wed Aug 15 10:52:38 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:38 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] probed modes :
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[Wed Aug 15 10:52:38 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 00 01 00 02 02 06 00 00 00 00
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[Wed Aug 15 10:52:38 2018] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[Wed Aug 15 10:52:38 2018] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[Wed Aug 15 10:52:38 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:38 2018] [drm:drm_add_edid_modes [drm]] ELD monitor U28E590
>[Wed Aug 15 10:52:38 2018] [drm:drm_add_edid_modes [drm]] ELD size 32, SAD count 1
>[Wed Aug 15 10:52:38 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:38 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2] probed modes :
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 92:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 94:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 93:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 101:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 110:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 111:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 113:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 114:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 107:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 108:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 109:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b1920b94
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 000000007cc8189f state to 00000000b1920b94
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_check_only [drm]] checking 00000000b1920b94
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_commit [drm]] committing 00000000b1920b94
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b1920b94
>[Wed Aug 15 10:52:38 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b1920b94
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_setcrtc [drm]] [CRTC:41:pipe A]
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000975668bd
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000866038f3 state to 00000000975668bd
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000074351469 state to 00000000975668bd
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:] for [CRTC:41:pipe A] state 00000000866038f3
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:126] for [PLANE:28:plane 1A] state 0000000074351469
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:41:pipe A] to 00000000975668bd
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] 000000006315b55e state to 00000000975668bd
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state 000000006315b55e to [NOCRTC]
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:83:DP-2] 00000000ff837740 state to 00000000975668bd
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000f32f698d state to 00000000975668bd
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:83:DP-2] state 00000000ff837740 to [CRTC:41:pipe A]
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_set_mode_prop_for_crtc [drm]] Set [NOMODE] for [CRTC:55:pipe B] state 00000000f32f698d
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_check_only [drm]] checking 00000000975668bd
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:41:pipe A] mode changed
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:55:pipe B] mode changed
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:55:pipe B] enable changed
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:55:pipe B] active changed
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:83:DP-2] keeps [ENCODER:82:DDI C], now on [CRTC:41:pipe A]
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:41:pipe A] needs all connectors, enable: y, active: y
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:41:pipe A] to 00000000975668bd
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:41:pipe A] to 00000000975668bd
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:55:pipe B] needs all connectors, enable: n, active: n
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:55:pipe B] to 00000000975668bd
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:55:pipe B] to 00000000975668bd
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000cc478a1d state to 00000000975668bd
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_check [i915]] [CONNECTOR:83:DP-2] checking for sink bpp constrains
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 30
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max rate 540000 max bpp 30 pixel clock 533250KHz
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_compute_config [i915]] DP lane count 4 clock 540000 bpp 30
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_compute_config [i915]] DP link rate required 1999688 available 2160000
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 30, dithering: 0
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] [CRTC:41:pipe A][modeset]
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80)
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 30, dithering: 0
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 7766016, gmch_n: 8388608, link_m: 1035468, link_n: 1048576, tu: 64
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 0
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] requested mode:
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x0 0x9
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x0 0x9
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] crtc timings: 533250 3840 3888 3920 4000 2160 2163 2168 2222, type: 0x0 flags: 0x9
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] port clock: 540000, pipe src size: 3840x2160, pixel rate 533250
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x21, cfgcr1: 0x80400173, cfgcr2: 0x3a5
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] FB:126, fb = 5760x2160 format = XR24 little-endian (0x34325258)
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+1920+1080 dst 0x0+1920+1080
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 2A] disabled, scaler_id = -1
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:38:cursor A] disabled, scaler_id = -1
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 540000 kHz, actual 540000 kHz
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 2, actual 2
>[Wed Aug 15 10:52:38 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 126
>[Wed Aug 15 10:52:38 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 1, on 1, ms 1
>[Wed Aug 15 10:52:38 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 126
>[Wed Aug 15 10:52:38 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 0, off 1, on 0, ms 1
>[Wed Aug 15 10:52:38 2018] [drm:intel_find_shared_dpll [i915]] [CRTC:41:pipe A] allocated DPLL 1
>[Wed Aug 15 10:52:38 2018] [drm:intel_reference_shared_dpll [i915]] using DPLL 1 for pipe A
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:69:pipe C] 00000000a0a6c4a2 state to 00000000975668bd
>[Wed Aug 15 10:52:38 2018] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 289) -> (0 - 860)
>[Wed Aug 15 10:52:38 2018] [drm:skl_compute_wm [i915]] [PLANE:38:cursor A] ddb (289 - 297) -> (860 - 892)
>[Wed Aug 15 10:52:38 2018] [drm:skl_compute_wm [i915]] [PLANE:42:plane 1B] ddb (297 - 884) -> (0 - 0)
>[Wed Aug 15 10:52:38 2018] [drm:skl_compute_wm [i915]] [PLANE:52:cursor B] ddb (884 - 892) -> (0 - 0)
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_commit [drm]] committing 00000000975668bd
>[Wed Aug 15 10:52:38 2018] [drm:intel_disable_pipe [i915]] disabling pipe A
>[Wed Aug 15 10:52:38 2018] [drm:intel_disable_shared_dpll [i915]] disable DPLL 1 (active 1, on? 1) for crtc 41
>[Wed Aug 15 10:52:38 2018] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 1
>[Wed Aug 15 10:52:38 2018] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe B
>[Wed Aug 15 10:52:38 2018] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[Wed Aug 15 10:52:38 2018] [drm:intel_disable_pipe [i915]] disabling pipe B
>[Wed Aug 15 10:52:38 2018] [drm:intel_disable_shared_dpll [i915]] disable DPLL 2 (active 2, on? 1) for crtc 55
>[Wed Aug 15 10:52:38 2018] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 2
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DDI B]
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST A]
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:73:DP-MST B]
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:74:DP-MST C]
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:82:DDI C]
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:84:DP-MST A]
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST B]
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST C]
>[Wed Aug 15 10:52:38 2018] [drm:verify_connector_state.isra.125 [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:38 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 0
>[Wed Aug 15 10:52:38 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 1
>[Wed Aug 15 10:52:38 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 2
>[Wed Aug 15 10:52:38 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 3
>[Wed Aug 15 10:52:38 2018] [drm:intel_enable_shared_dpll [i915]] enable DPLL 1 (active 1, on? 0) for crtc 41
>[Wed Aug 15 10:52:38 2018] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 1
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_start_link_train [i915]] Using LINK_BW_SET value 14
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 07000000
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 08000000
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 1
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[Wed Aug 15 10:52:38 2018] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:83:DP-2] Link Training Passed at Link Rate = 540000, Lane count = 4
>[Wed Aug 15 10:52:38 2018] [drm:intel_enable_pipe [i915]] enabling pipe A
>[Wed Aug 15 10:52:38 2018] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS
>[Wed Aug 15 10:52:38 2018] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:83:DP-2], [ENCODER:82:DDI C]
>[Wed Aug 15 10:52:38 2018] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe A, 32 bytes ELD
>[Wed Aug 15 10:52:38 2018] [drm:hsw_audio_config_update [i915]] using automatic Maud, Naud
>[Wed Aug 15 10:52:38 2018] [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR* CPU pipe A FIFO underrun
>[Wed Aug 15 10:52:38 2018] [drm:verify_connector_state.isra.125 [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_commit_tail [i915]] [CRTC:41:pipe A]
>[Wed Aug 15 10:52:38 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 1
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_commit_tail [i915]] [CRTC:55:pipe B]
>[Wed Aug 15 10:52:38 2018] [drm:intel_enable_sagv [i915]] Enabling the SAGV
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000975668bd
>[Wed Aug 15 10:52:38 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000975668bd
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b1920b94
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000975668bd state to 00000000b1920b94
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:41:pipe A] to 00000000b1920b94
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:83:DP-2] 00000000366ec6fd state to 00000000b1920b94
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_check_only [drm]] checking 00000000b1920b94
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:83:DP-2] keeps [ENCODER:82:DDI C], now on [CRTC:41:pipe A]
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_commit [drm]] committing 00000000b1920b94
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b1920b94
>[Wed Aug 15 10:52:38 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b1920b94
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000b1920b94 state to 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_check_only [drm]] checking 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_commit [drm]] committing 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_setcrtc [drm]] [CRTC:55:pipe B]
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000f32f698d state to 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000a135c548 state to 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:] for [CRTC:55:pipe B] state 00000000f32f698d
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:126] for [PLANE:42:plane 1B] state 00000000a135c548
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:55:pipe B] to 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] 00000000ff837740 state to 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:78:HDMI-A-1] state 00000000ff837740 to [CRTC:55:pipe B]
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_check_only [drm]] checking 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:55:pipe B] mode changed
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:55:pipe B] enable changed
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:55:pipe B] active changed
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] using [ENCODER:70:DDI B] on [CRTC:55:pipe B]
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:55:pipe B] needs all connectors, enable: y, active: y
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:55:pipe B] to 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:55:pipe B] to 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_check [i915]] [CONNECTOR:78:HDMI-A-1] checking for sink bpp constrains
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to default limit of 24
>[Wed Aug 15 10:52:38 2018] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
>[Wed Aug 15 10:52:38 2018] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 24 for HDMI
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] [CRTC:55:pipe B][modeset]
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] output_types: HDMI (0x40)
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 24, dithering: 0
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] requested mode:
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0x5
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[Wed Aug 15 10:52:38 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0x5
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x0 flags: 0x5
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] port clock: 148500, pipe src size: 1920x1080, pixel rate 148500
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x1, cfgcr1: 0x0, cfgcr2: 0x0
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:42:plane 1B] FB:126, fb = 5760x2160 format = XR24 little-endian (0x34325258)
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 1920x0+0+0 dst 0x0+0+0
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1
>[Wed Aug 15 10:52:38 2018] [drm:intel_dump_pipe_config [i915]] [PLANE:52:cursor B] disabled, scaler_id = -1
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 540000 kHz, actual 540000 kHz
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 2, actual 2
>[Wed Aug 15 10:52:38 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 126
>[Wed Aug 15 10:52:38 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 0 -> 1, off 0, on 1, ms 1
>[Wed Aug 15 10:52:38 2018] [drm:intel_find_shared_dpll [i915]] [CRTC:55:pipe B] allocated DPLL 2
>[Wed Aug 15 10:52:38 2018] [drm:intel_reference_shared_dpll [i915]] using DPLL 2 for pipe B
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000866038f3 state to 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:69:pipe C] 0000000080e92804 state to 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000ee6ce82b state to 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 860) -> (0 - 586)
>[Wed Aug 15 10:52:38 2018] [drm:skl_compute_wm [i915]] [PLANE:38:cursor A] ddb (860 - 892) -> (586 - 594)
>[Wed Aug 15 10:52:38 2018] [drm:skl_compute_wm [i915]] [PLANE:42:plane 1B] ddb (0 - 0) -> (594 - 884)
>[Wed Aug 15 10:52:38 2018] [drm:skl_compute_wm [i915]] [PLANE:52:cursor B] ddb (0 - 0) -> (884 - 892)
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_commit [drm]] committing 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:intel_disable_sagv [i915]] Disabling the SAGV
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DDI B]
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:72:DP-MST A]
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:73:DP-MST B]
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:74:DP-MST C]
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:82:DDI C]
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:84:DP-MST A]
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST B]
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST C]
>[Wed Aug 15 10:52:38 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 0
>[Wed Aug 15 10:52:38 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 1
>[Wed Aug 15 10:52:38 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 2
>[Wed Aug 15 10:52:38 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 3
>[Wed Aug 15 10:52:38 2018] [drm:intel_enable_shared_dpll [i915]] enable DPLL 2 (active 2, on? 0) for crtc 55
>[Wed Aug 15 10:52:38 2018] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 2
>[Wed Aug 15 10:52:38 2018] [drm:intel_enable_pipe [i915]] enabling pipe B
>[Wed Aug 15 10:52:38 2018] [drm:verify_connector_state.isra.125 [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:38 2018] [drm:intel_atomic_commit_tail [i915]] [CRTC:55:pipe B]
>[Wed Aug 15 10:52:38 2018] [drm:verify_single_dpll_state.isra.86 [i915]] DPLL 2
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007cc8189f
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000053f97469
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000d8e7e46e state to 0000000053f97469
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:55:pipe B] to 0000000053f97469
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] 00000000c87a46ec state to 0000000053f97469
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_check_only [drm]] checking 0000000053f97469
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] keeps [ENCODER:70:DDI B], now on [CRTC:55:pipe B]
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_commit [drm]] committing 0000000053f97469
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000053f97469
>[Wed Aug 15 10:52:38 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000053f97469
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000053f97469
>[Wed Aug 15 10:52:38 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000053f97469
>[Wed Aug 15 10:52:38 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000053f97469
>[Wed Aug 15 10:52:39 2018] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[Wed Aug 15 10:52:39 2018] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[Wed Aug 15 10:52:39 2018] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[Wed Aug 15 10:52:39 2018] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[Wed Aug 15 10:52:39 2018] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[Wed Aug 15 10:52:39 2018] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[Wed Aug 15 10:52:39 2018] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[Wed Aug 15 10:52:39 2018] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[Wed Aug 15 10:52:40 2018] [drm:hsw_audio_config_update [i915]] using Maud 784, Naud 18750
>[Wed Aug 15 10:52:40 2018] [drm:hsw_audio_config_update [i915]] using Maud 784, Naud 18750
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:38:cursor A] 00000000c88852eb state to 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000b1920b94 state to 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:38:cursor A] state 00000000c88852eb to [CRTC:41:pipe A]
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:89] for [PLANE:38:cursor A] state 00000000c88852eb
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:38:cursor A] with fb 89
>[Wed Aug 15 10:52:43 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:38:cursor A] visible 0 -> 1, off 0, on 1, ms 0
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_commit [drm]] committing 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:38:cursor A] 000000000a18180f state to 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000866038f3 state to 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:38:cursor A] state 000000000a18180f to [NOCRTC]
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:38:cursor A] state 000000000a18180f
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:38:cursor A] with fb -1
>[Wed Aug 15 10:52:43 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:38:cursor A] visible 1 -> 0, off 1, on 0, ms 0
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_commit [drm]] committing 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:cursor B] 00000000c88852eb state to 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000b1920b94 state to 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:52:cursor B] state 00000000c88852eb to [CRTC:55:pipe B]
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:89] for [PLANE:52:cursor B] state 00000000c88852eb
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:52:cursor B] with fb 89
>[Wed Aug 15 10:52:43 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:52:cursor B] visible 0 -> 1, off 0, on 1, ms 0
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_commit [drm]] committing 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:cursor B] 00000000fb131592 state to 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000d8e7e46e state to 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:52:cursor B] state 00000000fb131592 to [NOCRTC]
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:52:cursor B] state 00000000fb131592
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:52:cursor B] with fb -1
>[Wed Aug 15 10:52:43 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:52:cursor B] visible 1 -> 0, off 1, on 0, ms 0
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_commit [drm]] committing 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:38:cursor A] 00000000c88852eb state to 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:38:cursor A] state 00000000c88852eb
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_commit [drm]] committing 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:38:cursor A] 000000000a18180f state to 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000b1920b94 state to 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:38:cursor A] state 000000000a18180f to [CRTC:41:pipe A]
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:89] for [PLANE:38:cursor A] state 000000000a18180f
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:38:cursor A] with fb 89
>[Wed Aug 15 10:52:43 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:38:cursor A] visible 0 -> 1, off 0, on 1, ms 0
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_commit [drm]] committing 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a0a6c4a2
>[Wed Aug 15 10:52:43 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a0a6c4a2
>[Wed Aug 15 10:52:44 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:44 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:44 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:44 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:44 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:44 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:44 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:44 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:44 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:44 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:44 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:44 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:44 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:44 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:44 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:44 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:44 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:44 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:44 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:44 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:44 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101210, pins 0x00000040, long 0x00000040
>[Wed Aug 15 10:52:45 2018] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - long
>[Wed Aug 15 10:52:45 2018] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 6 - cnt: 0
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - long
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[Wed Aug 15 10:52:45 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1] disconnected
>[Wed Aug 15 10:52:45 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:45 2018] [drm:intel_hdmi_detect [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:45 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:52:45 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:52:45 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:52:45 2018] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[Wed Aug 15 10:52:45 2018] [drm:intel_hdmi_set_edid [i915]] Assuming DP dual mode adaptor presence based on VBT
>[Wed Aug 15 10:52:45 2018] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (type 1 DVI) detected (max TMDS clock: 165000 kHz)
>[Wed Aug 15 10:52:45 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:45 2018] [drm:drm_add_edid_modes [drm]] ELD: no CEA Extension found
>[Wed Aug 15 10:52:45 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:45 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] probed modes :
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[Wed Aug 15 10:52:45 2018] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[Wed Aug 15 10:52:45 2018] [drm:i915_hotplug_work_func [i915]] Connector DP-2 (pin 6) received hotplug event.
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:45 2018] [drm:intel_encoder_hotplug [i915]] [CONNECTOR:83:DP-2] status updated from connected to disconnected
>[Wed Aug 15 10:52:45 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:45 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2] disconnected
>[Wed Aug 15 10:52:45 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101210, pins 0x00000040, long 0x00000040
>[Wed Aug 15 10:52:45 2018] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - long
>[Wed Aug 15 10:52:45 2018] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 6 - cnt: 1
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - long
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[Wed Aug 15 10:52:45 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1] disconnected
>[Wed Aug 15 10:52:45 2018] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[Wed Aug 15 10:52:45 2018] [drm:i915_hotplug_work_func [i915]] Connector DP-2 (pin 6) received hotplug event.
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 00 01 00 02 02 06 00 00 00 00
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[Wed Aug 15 10:52:45 2018] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[Wed Aug 15 10:52:45 2018] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[Wed Aug 15 10:52:45 2018] [drm:intel_encoder_hotplug [i915]] [CONNECTOR:83:DP-2] status updated from disconnected to connected
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_start_link_train [i915]] Using LINK_BW_SET value 14
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 07000000
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 08000000
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 1
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 07000000
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:83:DP-2] Link Training Passed at Link Rate = 540000, Lane count = 4
>[Wed Aug 15 10:52:45 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:45 2018] [drm:intel_hdmi_detect [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:45 2018] [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR* CPU pipe A FIFO underrun
>[Wed Aug 15 10:52:45 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:52:45 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:52:45 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:52:45 2018] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[Wed Aug 15 10:52:45 2018] [drm:intel_hdmi_set_edid [i915]] Assuming DP dual mode adaptor presence based on VBT
>[Wed Aug 15 10:52:45 2018] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (type 1 DVI) detected (max TMDS clock: 165000 kHz)
>[Wed Aug 15 10:52:45 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:45 2018] [drm:drm_add_edid_modes [drm]] ELD: no CEA Extension found
>[Wed Aug 15 10:52:45 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:45 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] probed modes :
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 00 01 00 02 02 06 00 00 00 00
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[Wed Aug 15 10:52:45 2018] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[Wed Aug 15 10:52:45 2018] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[Wed Aug 15 10:52:45 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:45 2018] [drm:drm_add_edid_modes [drm]] ELD monitor U28E590
>[Wed Aug 15 10:52:45 2018] [drm:drm_add_edid_modes [drm]] ELD size 32, SAD count 1
>[Wed Aug 15 10:52:45 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:45 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2] probed modes :
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 94:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 101:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 113:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 114:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 107:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 108:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 109:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 110:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 111:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[Wed Aug 15 10:52:45 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[Wed Aug 15 10:52:45 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1] disconnected
>[Wed Aug 15 10:52:45 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:45 2018] [drm:intel_hdmi_detect [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:45 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:52:45 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:52:45 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:52:45 2018] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[Wed Aug 15 10:52:45 2018] [drm:intel_hdmi_set_edid [i915]] Assuming DP dual mode adaptor presence based on VBT
>[Wed Aug 15 10:52:45 2018] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (type 1 DVI) detected (max TMDS clock: 165000 kHz)
>[Wed Aug 15 10:52:45 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:45 2018] [drm:drm_add_edid_modes [drm]] ELD: no CEA Extension found
>[Wed Aug 15 10:52:45 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:45 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] probed modes :
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 00 01 00 02 02 06 00 00 00 00
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[Wed Aug 15 10:52:45 2018] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[Wed Aug 15 10:52:45 2018] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[Wed Aug 15 10:52:45 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:45 2018] [drm:drm_add_edid_modes [drm]] ELD monitor U28E590
>[Wed Aug 15 10:52:45 2018] [drm:drm_add_edid_modes [drm]] ELD size 32, SAD count 1
>[Wed Aug 15 10:52:45 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:45 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2] probed modes :
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 94:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 101:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 113:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 114:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 107:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 108:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 109:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 110:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:52:45 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 111:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[Wed Aug 15 10:52:45 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008a0a69c9
>[Wed Aug 15 10:52:45 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:38:cursor A] 0000000020ad09e1 state to 000000008a0a69c9
>[Wed Aug 15 10:52:45 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 000000001f04bb30 state to 000000008a0a69c9
>[Wed Aug 15 10:52:45 2018] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:38:cursor A] state 0000000020ad09e1 to [NOCRTC]
>[Wed Aug 15 10:52:45 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:38:cursor A] state 0000000020ad09e1
>[Wed Aug 15 10:52:45 2018] [drm:drm_atomic_check_only [drm]] checking 000000008a0a69c9
>[Wed Aug 15 10:52:45 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:38:cursor A] with fb -1
>[Wed Aug 15 10:52:45 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:38:cursor A] visible 1 -> 0, off 1, on 0, ms 0
>[Wed Aug 15 10:52:45 2018] [drm:drm_atomic_commit [drm]] committing 000000008a0a69c9
>[Wed Aug 15 10:52:45 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008a0a69c9
>[Wed Aug 15 10:52:45 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008a0a69c9
>[Wed Aug 15 10:52:45 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008a0a69c9
>[Wed Aug 15 10:52:45 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:38:cursor A] 000000006c0eb3a9 state to 000000008a0a69c9
>[Wed Aug 15 10:52:45 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:38:cursor A] state 000000006c0eb3a9
>[Wed Aug 15 10:52:45 2018] [drm:drm_atomic_check_only [drm]] checking 000000008a0a69c9
>[Wed Aug 15 10:52:45 2018] [drm:drm_atomic_commit [drm]] committing 000000008a0a69c9
>[Wed Aug 15 10:52:45 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008a0a69c9
>[Wed Aug 15 10:52:45 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008a0a69c9
>[Wed Aug 15 10:52:45 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008a0a69c9
>[Wed Aug 15 10:52:45 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:38:cursor A] 0000000020ad09e1 state to 000000008a0a69c9
>[Wed Aug 15 10:52:45 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 000000005ac9223c state to 000000008a0a69c9
>[Wed Aug 15 10:52:45 2018] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:38:cursor A] state 0000000020ad09e1 to [CRTC:41:pipe A]
>[Wed Aug 15 10:52:45 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:89] for [PLANE:38:cursor A] state 0000000020ad09e1
>[Wed Aug 15 10:52:45 2018] [drm:drm_atomic_check_only [drm]] checking 000000008a0a69c9
>[Wed Aug 15 10:52:45 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:38:cursor A] with fb 89
>[Wed Aug 15 10:52:45 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:38:cursor A] visible 0 -> 1, off 0, on 1, ms 0
>[Wed Aug 15 10:52:45 2018] [drm:drm_atomic_commit [drm]] committing 000000008a0a69c9
>[Wed Aug 15 10:52:45 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008a0a69c9
>[Wed Aug 15 10:52:45 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008a0a69c9
>[Wed Aug 15 10:52:45 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:45 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:46 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:46 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:46 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:46 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:46 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:46 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:46 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:46 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:46 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:46 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:46 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:46 2018] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[Wed Aug 15 10:52:46 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1] disconnected
>[Wed Aug 15 10:52:46 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:46 2018] [drm:intel_hdmi_detect [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:46 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:52:46 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:52:46 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:52:46 2018] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[Wed Aug 15 10:52:46 2018] [drm:intel_hdmi_set_edid [i915]] Assuming DP dual mode adaptor presence based on VBT
>[Wed Aug 15 10:52:46 2018] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (type 1 DVI) detected (max TMDS clock: 165000 kHz)
>[Wed Aug 15 10:52:46 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:46 2018] [drm:drm_add_edid_modes [drm]] ELD: no CEA Extension found
>[Wed Aug 15 10:52:46 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:46 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] probed modes :
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[Wed Aug 15 10:52:46 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:46 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:46 2018] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 00 01 00 02 02 06 00 00 00 00
>[Wed Aug 15 10:52:46 2018] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[Wed Aug 15 10:52:46 2018] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[Wed Aug 15 10:52:46 2018] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[Wed Aug 15 10:52:46 2018] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[Wed Aug 15 10:52:46 2018] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[Wed Aug 15 10:52:46 2018] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[Wed Aug 15 10:52:46 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:46 2018] [drm:drm_add_edid_modes [drm]] ELD monitor U28E590
>[Wed Aug 15 10:52:46 2018] [drm:drm_add_edid_modes [drm]] ELD size 32, SAD count 1
>[Wed Aug 15 10:52:46 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:46 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2] probed modes :
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 94:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 101:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 113:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 114:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 107:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 108:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 109:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 110:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:52:46 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 111:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[Wed Aug 15 10:52:46 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:38:cursor A] state 00000000cec87db6
>[Wed Aug 15 10:52:46 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:38:cursor A] with fb 92
>[Wed Aug 15 10:52:46 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:38:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:46 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:38:cursor A] state 00000000e26c15ac
>[Wed Aug 15 10:52:46 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:38:cursor A] with fb 92
>[Wed Aug 15 10:52:46 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:38:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:46 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b612e43a
>[Wed Aug 15 10:52:46 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000decb6da4 state to 00000000b612e43a
>[Wed Aug 15 10:52:46 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:55:pipe B] to 00000000b612e43a
>[Wed Aug 15 10:52:46 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:78:HDMI-A-1] 00000000b48d153b state to 00000000b612e43a
>[Wed Aug 15 10:52:46 2018] [drm:drm_atomic_check_only [drm]] checking 00000000b612e43a
>[Wed Aug 15 10:52:46 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:46 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] keeps [ENCODER:70:DDI B], now on [CRTC:55:pipe B]
>[Wed Aug 15 10:52:46 2018] [drm:drm_atomic_commit [drm]] committing 00000000b612e43a
>[Wed Aug 15 10:52:46 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b612e43a
>[Wed Aug 15 10:52:46 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b612e43a
>[Wed Aug 15 10:52:46 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b612e43a
>[Wed Aug 15 10:52:46 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 0000000087688a31 state to 00000000b612e43a
>[Wed Aug 15 10:52:46 2018] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:41:pipe A] to 00000000b612e43a
>[Wed Aug 15 10:52:46 2018] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:83:DP-2] 0000000091cac89e state to 00000000b612e43a
>[Wed Aug 15 10:52:46 2018] [drm:drm_atomic_check_only [drm]] checking 00000000b612e43a
>[Wed Aug 15 10:52:46 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:46 2018] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:83:DP-2] keeps [ENCODER:82:DDI C], now on [CRTC:41:pipe A]
>[Wed Aug 15 10:52:46 2018] [drm:drm_atomic_commit [drm]] committing 00000000b612e43a
>[Wed Aug 15 10:52:46 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b612e43a
>[Wed Aug 15 10:52:46 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b612e43a
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ed6cd782
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000d70a6470 state to 00000000ed6cd782
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 00000000ed6cd782
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_commit [drm]] committing 00000000ed6cd782
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ed6cd782
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ed6cd782
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fc3ec712
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000d58adb7a state to 00000000fc3ec712
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 00000000fc3ec712
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_commit [drm]] committing 00000000fc3ec712
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fc3ec712
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fc3ec712
>[Wed Aug 15 10:52:47 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000a2c2cda0 state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000eea4a37b state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 00000000eea4a37b
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:intel_atomic_commit [i915]] Preparing state failed with -512
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000a2c2cda0 state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000eea4a37b state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 00000000eea4a37b
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:intel_atomic_commit [i915]] Preparing state failed with -512
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000a2c2cda0 state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000eea4a37b state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 00000000eea4a37b
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:intel_atomic_commit [i915]] Preparing state failed with -512
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000a2c2cda0 state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000eea4a37b state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 00000000eea4a37b
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000ea032446 state to 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 000000008cd7a7dc state to 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 000000008cd7a7dc
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000041f3e56f nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_mode_addfb2 [drm]] [FB:126]
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000d58adb7a state to 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000085a91e77 state to 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:126] for [PLANE:28:plane 1A] state 0000000085a91e77
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 126
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000041f3e56f nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:intel_atomic_commit [i915]] Preparing state failed with -512
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000d58adb7a state to 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000085a91e77 state to 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:126] for [PLANE:28:plane 1A] state 0000000085a91e77
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 126
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000041f3e56f nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:intel_atomic_commit [i915]] Preparing state failed with -512
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000d58adb7a state to 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000085a91e77 state to 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:126] for [PLANE:28:plane 1A] state 0000000085a91e77
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 126
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000041f3e56f nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000d70a6470 state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 000000004df78120 state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:126] for [PLANE:42:plane 1B] state 000000004df78120
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 126
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000ea032446 state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004f43353a state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 000000004f43353a
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:intel_atomic_commit [i915]] Preparing state failed with -512
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000ea032446 state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004f43353a state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 000000004f43353a
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:intel_atomic_commit [i915]] Preparing state failed with -512
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000ea032446 state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004f43353a state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 000000004f43353a
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:intel_atomic_commit [i915]] Preparing state failed with -512
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000ea032446 state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004f43353a state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 000000004f43353a
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000a4ef997f state to 00000000a2c2cda0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000083337eff state to 00000000a2c2cda0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 0000000083337eff
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a2c2cda0
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a2c2cda0 nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:47 2018] [drm:drm_mode_addfb2 [drm]] [FB:126]
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000d70a6470 state to 00000000a2c2cda0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004df78120 state to 00000000a2c2cda0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:126] for [PLANE:28:plane 1A] state 000000004df78120
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a2c2cda0
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 126
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a2c2cda0 nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000d58adb7a state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000085a91e77 state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:126] for [PLANE:42:plane 1B] state 0000000085a91e77
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 126
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000a4ef997f state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000083337eff state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 0000000083337eff
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000a2c2cda0 state to 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000a149f231 state to 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 00000000a149f231
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000041f3e56f nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_mode_addfb2 [drm]] [FB:126]
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000d58adb7a state to 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000085a91e77 state to 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:126] for [PLANE:28:plane 1A] state 0000000085a91e77
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 126
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000041f3e56f nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ea032446
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000c7c777c6 state to 00000000ea032446
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000a1511e22 state to 00000000ea032446
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:126] for [PLANE:42:plane 1B] state 00000000a1511e22
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 00000000ea032446
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 126
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ea032446 nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ea032446
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ea032446
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000a4ef997f state to 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000083337eff state to 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 0000000083337eff
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000041f3e56f nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d70a6470
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000ea032446 state to 00000000d70a6470
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 000000007d40e603 state to 00000000d70a6470
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 000000007d40e603
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 00000000d70a6470
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d70a6470 nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d70a6470
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d70a6470
>[Wed Aug 15 10:52:47 2018] [drm:drm_mode_addfb2 [drm]] [FB:126]
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000d58adb7a state to 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000085a91e77 state to 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:126] for [PLANE:28:plane 1A] state 0000000085a91e77
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 126
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000041f3e56f nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000d70a6470 state to 00000000a2c2cda0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000b587f311 state to 00000000a2c2cda0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:126] for [PLANE:42:plane 1B] state 00000000b587f311
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a2c2cda0
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 126
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a2c2cda0 nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000a4ef997f state to 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000083337eff state to 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 0000000083337eff
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000041f3e56f nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000a2c2cda0 state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 000000007d40e603 state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 000000007d40e603
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_mode_addfb2 [drm]] [FB:126]
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000d70a6470 state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000b587f311 state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:126] for [PLANE:28:plane 1A] state 00000000b587f311
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 126
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000d58adb7a state to 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000085a91e77 state to 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:126] for [PLANE:42:plane 1B] state 0000000085a91e77
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 126
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000041f3e56f nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000a2c2cda0 state to 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000007d40e603 state to 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 000000007d40e603
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 0000000041f3e56f
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000041f3e56f nonblocking
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000a4ef997f state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000083337eff state to 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 0000000083337eff
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:47 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:47 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:126]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000d58adb7a state to 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000085a91e77 state to 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:126] for [PLANE:28:plane 1A] state 0000000085a91e77
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 126
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000d70a6470 state to 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000b587f311 state to 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:126] for [PLANE:42:plane 1B] state 00000000b587f311
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 126
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000041f3e56f nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000a4ef997f state to 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000083337eff state to 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 0000000083337eff
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000041f3e56f nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000a2c2cda0 state to 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 000000007d40e603 state to 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 000000007d40e603
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:131] for [PLANE:38:cursor A] state 00000000a1511e22
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:38:cursor A] with fb 131
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:38:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:131] for [PLANE:38:cursor A] state 00000000a149f231
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:38:cursor A] with fb 131
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:38:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:92]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 0000000041f3e56f state to 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000b587f311 state to 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:28:plane 1A] state 00000000b587f311
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000ea032446 state to 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000085a91e77 state to 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:42:plane 1B] state 0000000085a91e77
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d58adb7a nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000d58adb7a state to 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000007d40e603 state to 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 000000007d40e603
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f32f698d nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000c7c777c6 state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000083337eff state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 0000000083337eff
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a2c2cda0 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:92]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000a2c2cda0 state to 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000085a91e77 state to 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:28:plane 1A] state 0000000085a91e77
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a4ef997f nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 0000000041f3e56f state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000b587f311 state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:42:plane 1B] state 00000000b587f311
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ea032446 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000ea032446 state to 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000083337eff state to 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 0000000083337eff
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000975668bd nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000a4ef997f state to 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 000000007d40e603 state to 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 000000007d40e603
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:92]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 0000000041f3e56f state to 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000b587f311 state to 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:28:plane 1A] state 00000000b587f311
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000d58adb7a state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000085a91e77 state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:42:plane 1B] state 0000000085a91e77
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a2c2cda0 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000f32f698d state to 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000007d40e603 state to 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 000000007d40e603
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000975668bd nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000a4ef997f state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000083337eff state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 0000000083337eff
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a2c2cda0 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:92]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000d58adb7a state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000085a91e77 state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:28:plane 1A] state 0000000085a91e77
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a2c2cda0 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000c7c777c6 state to 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000b587f311 state to 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:42:plane 1B] state 00000000b587f311
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000041f3e56f nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 0000000041f3e56f state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000083337eff state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 0000000083337eff
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ea032446 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000a2c2cda0 state to 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 000000007d40e603 state to 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 000000007d40e603
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a4ef997f nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:92]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000a4ef997f state to 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000b587f311 state to 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:28:plane 1A] state 00000000b587f311
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000975668bd nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000ea032446 state to 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000085a91e77 state to 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:42:plane 1B] state 0000000085a91e77
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000c7c777c6 state to 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000007d40e603 state to 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 000000007d40e603
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d58adb7a nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 0000000041f3e56f state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000083337eff state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 0000000083337eff
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a2c2cda0 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:92]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000f32f698d state to 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000085a91e77 state to 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:28:plane 1A] state 0000000085a91e77
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000975668bd nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000ea032446 state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000b587f311 state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:42:plane 1B] state 00000000b587f311
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a2c2cda0 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000c7c777c6 state to 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000083337eff state to 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 0000000083337eff
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000041f3e56f nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000a4ef997f state to 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 000000007d40e603 state to 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 000000007d40e603
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d58adb7a nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:92]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 0000000041f3e56f state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000b587f311 state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:28:plane 1A] state 00000000b587f311
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ea032446 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000f32f698d state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000085a91e77 state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:42:plane 1B] state 0000000085a91e77
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a2c2cda0 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000a4ef997f state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000007d40e603 state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 000000007d40e603
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a2c2cda0 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000c7c777c6 state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000083337eff state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 0000000083337eff
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ea032446 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:92]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 0000000041f3e56f state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000085a91e77 state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:28:plane 1A] state 0000000085a91e77
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a2c2cda0 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000f32f698d state to 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000b587f311 state to 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:42:plane 1B] state 00000000b587f311
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d58adb7a nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000d58adb7a state to 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000083337eff state to 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 0000000083337eff
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000975668bd nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000a4ef997f state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 000000007d40e603 state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 000000007d40e603
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a2c2cda0 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:92]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000c7c777c6 state to 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000b587f311 state to 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:28:plane 1A] state 00000000b587f311
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000041f3e56f nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000f32f698d state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000085a91e77 state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:42:plane 1B] state 0000000085a91e77
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ea032446 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000a4ef997f state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000007d40e603 state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 000000007d40e603
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ea032446 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000d58adb7a state to 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000083337eff state to 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 0000000083337eff
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000041f3e56f nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:92]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000c7c777c6 state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000085a91e77 state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:28:plane 1A] state 0000000085a91e77
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ea032446 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000f32f698d state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000b587f311 state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:42:plane 1B] state 00000000b587f311
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a2c2cda0 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000a2c2cda0 state to 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000083337eff state to 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 0000000083337eff
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000975668bd nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000a4ef997f state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 000000007d40e603 state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 000000007d40e603
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ea032446 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:92]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000c7c777c6 state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000b587f311 state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:28:plane 1A] state 00000000b587f311
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ea032446 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 0000000041f3e56f state to 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000085a91e77 state to 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:42:plane 1B] state 0000000085a91e77
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d58adb7a nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000d58adb7a state to 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000007d40e603 state to 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 000000007d40e603
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000975668bd nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000ea032446 state to 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000083337eff state to 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 0000000083337eff
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a4ef997f nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:92]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000a4ef997f state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000085a91e77 state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:28:plane 1A] state 0000000085a91e77
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a2c2cda0 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000c7c777c6 state to 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000b587f311 state to 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:42:plane 1B] state 00000000b587f311
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000041f3e56f nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 0000000041f3e56f state to 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000083337eff state to 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 0000000083337eff
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f32f698d nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000a2c2cda0 state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 000000007d40e603 state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 000000007d40e603
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ea032446 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:92]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000a4ef997f state to 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000b587f311 state to 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:28:plane 1A] state 00000000b587f311
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000f32f698d state to 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000085a91e77 state to 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:42:plane 1B] state 0000000085a91e77
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d58adb7a nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000a2c2cda0 state to 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000007d40e603 state to 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 000000007d40e603
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d58adb7a nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 0000000041f3e56f state to 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000083337eff state to 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 0000000083337eff
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:92]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000a4ef997f state to 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000085a91e77 state to 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:28:plane 1A] state 0000000085a91e77
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d58adb7a nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000f32f698d state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000b587f311 state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:42:plane 1B] state 00000000b587f311
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ea032446 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000ea032446 state to 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000083337eff state to 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 0000000083337eff
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000975668bd nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000d58adb7a state to 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 000000007d40e603 state to 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 000000007d40e603
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000041f3e56f nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000975668bd
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:92]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000a2c2cda0 state to 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000b587f311 state to 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:28:plane 1A] state 00000000b587f311
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000041f3e56f nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000a4ef997f state to 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000a1511e22 state to 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:42:plane 1B] state 00000000a1511e22
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 0000000041f3e56f state to 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004df78120 state to 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 000000004df78120
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d58adb7a nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000c7c777c6 state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 000000004f43353a state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 000000004f43353a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ea032446 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:92]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000975668bd state to 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a1511e22 state to 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:28:plane 1A] state 00000000a1511e22
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f32f698d nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000a2c2cda0 state to 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000b587f311 state to 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:42:plane 1B] state 00000000b587f311
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d58adb7a nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000a4ef997f state to 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004df78120 state to 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 000000004df78120
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000041f3e56f nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000c7c777c6 state to 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000083337eff state to 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 0000000083337eff
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d58adb7a nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000041f3e56f
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:92]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000020639510
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000581dcd2e state to 0000000020639510
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000279e6230 state to 0000000020639510
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:28:plane 1A] state 00000000279e6230
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 0000000020639510
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000020639510 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005c63f598
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 0000000021236e7c state to 000000005c63f598
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 000000008004127b state to 000000005c63f598
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:42:plane 1B] state 000000008004127b
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 000000005c63f598
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005c63f598 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005c63f598
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005c63f598
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000020639510
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000020639510
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000020639510
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 000000005c63f598 state to 0000000020639510
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000fc8fe5b6 state to 0000000020639510
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 00000000fc8fe5b6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 0000000020639510
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000020639510 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000500ddfa1
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 000000009666e239 state to 00000000500ddfa1
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000685b55ce state to 00000000500ddfa1
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 00000000685b55ce
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000500ddfa1
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000500ddfa1 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000500ddfa1
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000500ddfa1
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000020639510
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000020639510
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:92]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000a4ef997f state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a1511e22 state to 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:28:plane 1A] state 00000000a1511e22
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ea032446 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000d58adb7a state to 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 000000007d40e603 state to 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:42:plane 1B] state 000000007d40e603
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ea032446
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000ea032446 state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000085a91e77 state to 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 0000000085a91e77
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a2c2cda0 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000975668bd state to 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000dc60817c state to 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 00000000dc60817c
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c7c777c6 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c7c777c6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a2c2cda0
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:92]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000a2c2cda0 state to 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000007d40e603 state to 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:28:plane 1A] state 000000007d40e603
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f32f698d nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000c7c777c6 state to 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000a1511e22 state to 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:42:plane 1B] state 00000000a1511e22
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a4ef997f nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f32f698d
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000ea032446 state to 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004df78120 state to 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 000000004df78120
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d58adb7a nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000fbc2a5ec state to 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000083337eff state to 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 0000000083337eff
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a4ef997f nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a4ef997f
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d58adb7a
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:92]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b86bc77c
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 0000000042da9f77 state to 00000000b86bc77c
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000007d40e603 state to 00000000b86bc77c
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:28:plane 1A] state 000000007d40e603
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000b86bc77c
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b86bc77c nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000002dedd485
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 0000000088a8320f state to 000000002dedd485
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000a1511e22 state to 000000002dedd485
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:42:plane 1B] state 00000000a1511e22
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 000000002dedd485
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000002dedd485 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000002dedd485
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000002dedd485
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b86bc77c
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b86bc77c
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000002dedd485
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 000000003ba10326 state to 000000002dedd485
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004df78120 state to 000000002dedd485
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 000000004df78120
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 000000002dedd485
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000002dedd485 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009b635507
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 000000007a0abe91 state to 000000009b635507
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000083337eff state to 000000009b635507
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 0000000083337eff
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 000000009b635507
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009b635507 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009b635507
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009b635507
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b86bc77c
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b86bc77c
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000002dedd485
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b86bc77c
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000002dedd485
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:92]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b86bc77c
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 000000008d244d62 state to 00000000b86bc77c
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000b587f311 state to 00000000b86bc77c
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:28:plane 1A] state 00000000b587f311
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000b86bc77c
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b86bc77c nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000056565284
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 000000001ce72c2d state to 0000000056565284
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 000000004f43353a state to 0000000056565284
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:42:plane 1B] state 000000004f43353a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 0000000056565284
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000056565284 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000056565284
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000056565284
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cf0a1b68
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cf0a1b68
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b86bc77c
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cf0a1b68
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b86bc77c
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ab3bf254
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 0000000087688a31 state to 00000000ab3bf254
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000fc8fe5b6 state to 00000000ab3bf254
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 00000000fc8fe5b6
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000ab3bf254
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ab3bf254 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000031ddf366
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000b612e43a state to 0000000031ddf366
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 00000000685b55ce state to 0000000031ddf366
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 00000000685b55ce
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 0000000031ddf366
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000031ddf366 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000031ddf366
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000031ddf366
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cf0a1b68
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cf0a1b68
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ab3bf254
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cf0a1b68
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ab3bf254
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:92]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ab3bf254
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 0000000031ddf366 state to 00000000ab3bf254
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000084ed95d2 state to 00000000ab3bf254
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:28:plane 1A] state 0000000084ed95d2
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000ab3bf254
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ab3bf254 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a4433522
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 0000000018b373d5 state to 00000000a4433522
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000026a3be4c state to 00000000a4433522
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:42:plane 1B] state 0000000026a3be4c
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000a4433522
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 92
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a4433522 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a4433522
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ab3bf254
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ab3bf254
>[Wed Aug 15 10:52:48 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a4433522
>[Wed Aug 15 10:52:48 2018] [drm:drm_mode_addfb2 [drm]] [FB:91]
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cf0a1b68
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000adab4a27 state to 00000000cf0a1b68
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000b587f311 state to 00000000cf0a1b68
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:28:plane 1A] state 00000000b587f311
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 00000000cf0a1b68
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cf0a1b68 nonblocking
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004efd8058
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000a8edcf18 state to 000000004efd8058
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 000000004f43353a state to 000000004efd8058
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:91] for [PLANE:42:plane 1B] state 000000004f43353a
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_check_only [drm]] checking 000000004efd8058
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 91
>[Wed Aug 15 10:52:48 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:48 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004efd8058 nonblocking
>[Wed Aug 15 10:52:49 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004efd8058
>[Wed Aug 15 10:52:49 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004efd8058
>[Wed Aug 15 10:52:49 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000074699e6e
>[Wed Aug 15 10:52:49 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000074699e6e
>[Wed Aug 15 10:52:49 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cf0a1b68
>[Wed Aug 15 10:52:49 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000074699e6e
>[Wed Aug 15 10:52:49 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cf0a1b68
>[Wed Aug 15 10:52:49 2018] [drm:drm_mode_addfb2 [drm]] [FB:92]
>[Wed Aug 15 10:52:49 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000074699e6e
>[Wed Aug 15 10:52:49 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000962c6cb9 state to 0000000074699e6e
>[Wed Aug 15 10:52:49 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004df78120 state to 0000000074699e6e
>[Wed Aug 15 10:52:49 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:28:plane 1A] state 000000004df78120
>[Wed Aug 15 10:52:49 2018] [drm:drm_atomic_check_only [drm]] checking 0000000074699e6e
>[Wed Aug 15 10:52:49 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 92
>[Wed Aug 15 10:52:49 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:49 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000074699e6e nonblocking
>[Wed Aug 15 10:52:49 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cf0a1b68
>[Wed Aug 15 10:52:49 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 000000004efd8058 state to 00000000cf0a1b68
>[Wed Aug 15 10:52:49 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000083337eff state to 00000000cf0a1b68
>[Wed Aug 15 10:52:49 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:92] for [PLANE:42:plane 1B] state 0000000083337eff
>[Wed Aug 15 10:52:49 2018] [drm:drm_atomic_check_only [drm]] checking 00000000cf0a1b68
>[Wed Aug 15 10:52:49 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 92
>[Wed Aug 15 10:52:49 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:49 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cf0a1b68 nonblocking
>[Wed Aug 15 10:52:49 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000074699e6e
>[Wed Aug 15 10:52:49 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cf0a1b68
>[Wed Aug 15 10:52:49 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cf0a1b68
>[Wed Aug 15 10:52:49 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000074699e6e
>[Wed Aug 15 10:52:54 2018] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101210, pins 0x00000040, long 0x00000040
>[Wed Aug 15 10:52:54 2018] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - long
>[Wed Aug 15 10:52:54 2018] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 6 - cnt: 0
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - long
>[Wed Aug 15 10:52:54 2018] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[Wed Aug 15 10:52:54 2018] [drm:i915_hotplug_work_func [i915]] Connector DP-2 (pin 6) received hotplug event.
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:54 2018] [drm:intel_encoder_hotplug [i915]] [CONNECTOR:83:DP-2] status updated from connected to disconnected
>[Wed Aug 15 10:52:54 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101210, pins 0x00000040, long 0x00000040
>[Wed Aug 15 10:52:54 2018] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - long
>[Wed Aug 15 10:52:54 2018] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 6 - cnt: 1
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - long
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[Wed Aug 15 10:52:54 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1] disconnected
>[Wed Aug 15 10:52:54 2018] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[Wed Aug 15 10:52:54 2018] [drm:i915_hotplug_work_func [i915]] Connector DP-2 (pin 6) received hotplug event.
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 00 01 00 02 02 06 00 00 00 00
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[Wed Aug 15 10:52:54 2018] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[Wed Aug 15 10:52:54 2018] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[Wed Aug 15 10:52:54 2018] [drm:intel_encoder_hotplug [i915]] [CONNECTOR:83:DP-2] status updated from disconnected to connected
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_start_link_train [i915]] Using LINK_BW_SET value 14
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 07000000
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 08000000
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 1
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 07000000
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:83:DP-2] Link Training Passed at Link Rate = 540000, Lane count = 4
>[Wed Aug 15 10:52:54 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:54 2018] [drm:intel_hdmi_detect [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:54 2018] [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR* CPU pipe A FIFO underrun
>[Wed Aug 15 10:52:54 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:52:54 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:52:54 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:52:54 2018] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[Wed Aug 15 10:52:54 2018] [drm:intel_hdmi_set_edid [i915]] Assuming DP dual mode adaptor presence based on VBT
>[Wed Aug 15 10:52:54 2018] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (type 1 DVI) detected (max TMDS clock: 165000 kHz)
>[Wed Aug 15 10:52:54 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:54 2018] [drm:drm_add_edid_modes [drm]] ELD: no CEA Extension found
>[Wed Aug 15 10:52:54 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:54 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] probed modes :
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 00 01 00 02 02 06 00 00 00 00
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[Wed Aug 15 10:52:54 2018] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[Wed Aug 15 10:52:54 2018] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[Wed Aug 15 10:52:54 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:54 2018] [drm:drm_add_edid_modes [drm]] ELD monitor U28E590
>[Wed Aug 15 10:52:54 2018] [drm:drm_add_edid_modes [drm]] ELD size 32, SAD count 1
>[Wed Aug 15 10:52:54 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:54 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2] probed modes :
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 94:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 101:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 113:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 114:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 107:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 108:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 109:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 110:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 111:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[Wed Aug 15 10:52:54 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:52:54 2018] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[Wed Aug 15 10:52:54 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1] disconnected
>[Wed Aug 15 10:52:54 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:54 2018] [drm:intel_hdmi_detect [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:52:54 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:52:54 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:52:54 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:52:54 2018] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[Wed Aug 15 10:52:54 2018] [drm:intel_hdmi_set_edid [i915]] Assuming DP dual mode adaptor presence based on VBT
>[Wed Aug 15 10:52:54 2018] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (type 1 DVI) detected (max TMDS clock: 165000 kHz)
>[Wed Aug 15 10:52:54 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:54 2018] [drm:drm_add_edid_modes [drm]] ELD: no CEA Extension found
>[Wed Aug 15 10:52:54 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:54 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] probed modes :
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 00 01 00 02 02 06 00 00 00 00
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[Wed Aug 15 10:52:54 2018] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[Wed Aug 15 10:52:54 2018] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[Wed Aug 15 10:52:54 2018] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[Wed Aug 15 10:52:54 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:54 2018] [drm:drm_add_edid_modes [drm]] ELD monitor U28E590
>[Wed Aug 15 10:52:54 2018] [drm:drm_add_edid_modes [drm]] ELD size 32, SAD count 1
>[Wed Aug 15 10:52:54 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:52:54 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2] probed modes :
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 94:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 101:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 113:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 114:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 107:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 108:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 109:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 110:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:52:54 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 111:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[Wed Aug 15 10:52:59 2018] [drm:drm_mode_addfb2 [drm]] [FB:93]
>[Wed Aug 15 10:52:59 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000581dcd2e
>[Wed Aug 15 10:52:59 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 0000000020639510 state to 00000000581dcd2e
>[Wed Aug 15 10:52:59 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a4788f6b state to 00000000581dcd2e
>[Wed Aug 15 10:52:59 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:93] for [PLANE:28:plane 1A] state 00000000a4788f6b
>[Wed Aug 15 10:52:59 2018] [drm:drm_atomic_check_only [drm]] checking 00000000581dcd2e
>[Wed Aug 15 10:52:59 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 93
>[Wed Aug 15 10:52:59 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:59 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000581dcd2e nonblocking
>[Wed Aug 15 10:52:59 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005c63f598
>[Wed Aug 15 10:52:59 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 000000009666e239 state to 000000005c63f598
>[Wed Aug 15 10:52:59 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000020ad09e1 state to 000000005c63f598
>[Wed Aug 15 10:52:59 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:93] for [PLANE:42:plane 1B] state 0000000020ad09e1
>[Wed Aug 15 10:52:59 2018] [drm:drm_atomic_check_only [drm]] checking 000000005c63f598
>[Wed Aug 15 10:52:59 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 93
>[Wed Aug 15 10:52:59 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:52:59 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000005c63f598 nonblocking
>[Wed Aug 15 10:52:59 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000581dcd2e
>[Wed Aug 15 10:52:59 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000581dcd2e
>[Wed Aug 15 10:52:59 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005c63f598
>[Wed Aug 15 10:52:59 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005c63f598
>[Wed Aug 15 10:53:03 2018] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101210, pins 0x00000040, long 0x00000040
>[Wed Aug 15 10:53:03 2018] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - long
>[Wed Aug 15 10:53:03 2018] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 6 - cnt: 0
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - long
>[Wed Aug 15 10:53:03 2018] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[Wed Aug 15 10:53:03 2018] [drm:i915_hotplug_work_func [i915]] Connector DP-2 (pin 6) received hotplug event.
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:53:03 2018] [drm:intel_encoder_hotplug [i915]] [CONNECTOR:83:DP-2] status updated from connected to disconnected
>[Wed Aug 15 10:53:03 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[Wed Aug 15 10:53:03 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1] disconnected
>[Wed Aug 15 10:53:03 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:53:03 2018] [drm:intel_hdmi_detect [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:53:03 2018] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101210, pins 0x00000040, long 0x00000040
>[Wed Aug 15 10:53:03 2018] [drm:intel_hpd_irq_handler [i915]] digital hpd port C - long
>[Wed Aug 15 10:53:03 2018] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 6 - cnt: 1
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - long
>[Wed Aug 15 10:53:03 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:53:03 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:53:03 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:53:03 2018] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[Wed Aug 15 10:53:03 2018] [drm:intel_hdmi_set_edid [i915]] Assuming DP dual mode adaptor presence based on VBT
>[Wed Aug 15 10:53:03 2018] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (type 1 DVI) detected (max TMDS clock: 165000 kHz)
>[Wed Aug 15 10:53:03 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:53:03 2018] [drm:drm_add_edid_modes [drm]] ELD: no CEA Extension found
>[Wed Aug 15 10:53:03 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:53:03 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] probed modes :
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[Wed Aug 15 10:53:03 2018] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[Wed Aug 15 10:53:03 2018] [drm:i915_hotplug_work_func [i915]] Connector DP-2 (pin 6) received hotplug event.
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 00 01 00 02 02 06 00 00 00 00
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[Wed Aug 15 10:53:03 2018] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[Wed Aug 15 10:53:03 2018] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[Wed Aug 15 10:53:03 2018] [drm:intel_encoder_hotplug [i915]] [CONNECTOR:83:DP-2] status updated from disconnected to connected
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_start_link_train [i915]] Using LINK_BW_SET value 14
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 07000000
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 08000000
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 1
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 07000000
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:83:DP-2] Link Training Passed at Link Rate = 540000, Lane count = 4
>[Wed Aug 15 10:53:03 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:53:03 2018] [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR* CPU pipe A FIFO underrun
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 00 01 00 02 02 06 00 00 00 00
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[Wed Aug 15 10:53:03 2018] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[Wed Aug 15 10:53:03 2018] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[Wed Aug 15 10:53:03 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:53:03 2018] [drm:drm_add_edid_modes [drm]] ELD monitor U28E590
>[Wed Aug 15 10:53:03 2018] [drm:drm_add_edid_modes [drm]] ELD size 32, SAD count 1
>[Wed Aug 15 10:53:03 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:53:03 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2] probed modes :
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 94:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 101:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 113:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 114:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 107:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 108:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 109:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 110:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 111:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[Wed Aug 15 10:53:03 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:71:DP-1]
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[Wed Aug 15 10:53:03 2018] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[Wed Aug 15 10:53:03 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:DP-1] disconnected
>[Wed Aug 15 10:53:03 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:53:03 2018] [drm:intel_hdmi_detect [i915]] [CONNECTOR:78:HDMI-A-1]
>[Wed Aug 15 10:53:03 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:53:03 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[Wed Aug 15 10:53:03 2018] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[Wed Aug 15 10:53:03 2018] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[Wed Aug 15 10:53:03 2018] [drm:intel_hdmi_set_edid [i915]] Assuming DP dual mode adaptor presence based on VBT
>[Wed Aug 15 10:53:03 2018] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (type 1 DVI) detected (max TMDS clock: 165000 kHz)
>[Wed Aug 15 10:53:03 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:53:03 2018] [drm:drm_add_edid_modes [drm]] ELD: no CEA Extension found
>[Wed Aug 15 10:53:03 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:53:03 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-1] probed modes :
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_detect [i915]] [CONNECTOR:83:DP-2]
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 00 01 00 02 02 06 00 00 00 00
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[Wed Aug 15 10:53:03 2018] [drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[Wed Aug 15 10:53:03 2018] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[Wed Aug 15 10:53:03 2018] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[Wed Aug 15 10:53:03 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:53:03 2018] [drm:drm_add_edid_modes [drm]] ELD monitor U28E590
>[Wed Aug 15 10:53:03 2018] [drm:drm_add_edid_modes [drm]] ELD size 32, SAD count 1
>[Wed Aug 15 10:53:03 2018] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[Wed Aug 15 10:53:03 2018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:83:DP-2] probed modes :
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 94:"3840x2160" 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0x9
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 101:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 113:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 114:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 107:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 108:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 109:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 110:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[Wed Aug 15 10:53:03 2018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 111:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[Wed Aug 15 10:53:05 2018] [drm:drm_mode_addfb2 [drm]] [FB:120]
>[Wed Aug 15 10:53:05 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000021236e7c
>[Wed Aug 15 10:53:05 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:41:pipe A] 00000000500ddfa1 state to 0000000021236e7c
>[Wed Aug 15 10:53:05 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000008004127b state to 0000000021236e7c
>[Wed Aug 15 10:53:05 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:120] for [PLANE:28:plane 1A] state 000000008004127b
>[Wed Aug 15 10:53:05 2018] [drm:drm_atomic_check_only [drm]] checking 0000000021236e7c
>[Wed Aug 15 10:53:05 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:41:pipe A] has [PLANE:28:plane 1A] with fb 120
>[Wed Aug 15 10:53:05 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:53:05 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000021236e7c nonblocking
>[Wed Aug 15 10:53:05 2018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000decb6da4
>[Wed Aug 15 10:53:05 2018] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:55:pipe B] 00000000581dcd2e state to 00000000decb6da4
>[Wed Aug 15 10:53:05 2018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:42:plane 1B] 0000000038d787da state to 00000000decb6da4
>[Wed Aug 15 10:53:05 2018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:120] for [PLANE:42:plane 1B] state 0000000038d787da
>[Wed Aug 15 10:53:05 2018] [drm:drm_atomic_check_only [drm]] checking 00000000decb6da4
>[Wed Aug 15 10:53:05 2018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:55:pipe B] has [PLANE:42:plane 1B] with fb 120
>[Wed Aug 15 10:53:05 2018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:42:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>[Wed Aug 15 10:53:05 2018] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000decb6da4 nonblocking
>[Wed Aug 15 10:53:05 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000decb6da4
>[Wed Aug 15 10:53:05 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000decb6da4
>[Wed Aug 15 10:53:05 2018] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000021236e7c
>[Wed Aug 15 10:53:05 2018] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000021236e7c
>

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Attachments on bug 107543: 141036 | 141037 | 141100 | 141101 | 141217 | 141218 | 141336 | 141337 | 141343 | 141344 | 141888 | 141914 | 141958 | 142722 | 142802 | 142803 | 142879

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