Attachment 141160 Details for Bug 107600 – intel_ reg dump --all

intel_ reg dump --all

intel_reg_dump.txt (text/plain), 17.35 KB, created by H Buus on 2018-08-16 23:06:57 UTC

(hide)

Description:

Filename:

MIME Type:

Creator: H Buus

Created: 2018-08-16 23:06:57 UTC

Size: 17.35 KB

patch

obsolete

>Warning: register spec not found in '/usr/share/intel-gpu-tools/registers'. Using builtin register spec.
>                                DCC (0x00010200): 0x000f0401
>Gen2	0x0401
>                          CHDECMISC (0x00010111): 0x11987820
>Gen2	XOR bank/rank, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present
>                             C0DRB0 (0x00010200): 0x000f0401
>Gen2	0x0401
>                             C0DRB1 (0x00010202): 0x0000000f
>Gen2	0x000f
>                             C0DRB2 (0x00010204): 0x00000000
>Gen2	0x0000
>                             C0DRB3 (0x00010206): 0x04000000
>Gen2	0x0000
>                             C1DRB0 (0x00010600): 0x05040302
>Gen2	0x0302
>                             C1DRB1 (0x00010602): 0x07060504
>Gen2	0x0504
>                             C1DRB2 (0x00010604): 0x09080706
>Gen2	0x0706
>                             C1DRB3 (0x00010606): 0x0b0a0908
>Gen2	0x0908
>                            C0DRA01 (0x00010208): 0x01000400
>Gen2	0x0400
>                            C0DRA23 (0x0001020a): 0x02000100
>Gen2	0x0100
>                            C1DRA01 (0x00010608): 0x0d0c0b0a
>Gen2	0x0b0a
>                            C1DRA23 (0x0001060a): 0x0f0e0d0c
>Gen2	0x0d0c
>                         PGETBL_CTL (0x00002020): 0x4ffc0001
>                  VCLK_DIVISOR_VGA0 (0x00006000): 0x00031108
>Gen2	n = 3, m1 = 17, m2 = 8
>                  VCLK_DIVISOR_VGA1 (0x00006004): 0x00031406
>Gen2	n = 3, m1 = 20, m2 = 6
>                      VCLK_POST_DIV (0x00006010): 0x00800080
>Gen2	vga0 p1 = 2, p2 = 4, vga1 p1 = 2, p2 = 2
>                          DPLL_TEST (0x0000606c): 0x00010001
>                       CACHE_MODE_0 (0x00002120): 0x00006820
>                            D_STATE (0x00006104): 0x0000000b
>                      DSPCLK_GATE_D (0x00006200): 0x00000000
>Gen2	clock gates disabled:
>                     RENCLK_GATE_D1 (0x00006204): 0x00000000
>                     RENCLK_GATE_D2 (0x00006208): 0x00000000
>                              SDVOB (0x00061140): 0x00480000
>Gen2	disabled, pipe A, stall disabled, not detected
>Gen2	disabled, pipe A, no stall, -hsync, -vsync
>                              SDVOC (0x00061160): 0x00480000
>Gen2	disabled, pipe A, stall disabled, not detected
>Gen2	disabled, pipe A, no stall, -hsync, -vsync
>                            SDVOUDI (0x00061150): 0x000000ae
>                             DSPARB (0x00070030): 0x00001d9c
>                             FW_BLC (0x000020d8): 0x011d0108
>                            FW_BLC2 (0x000020dc): 0x00000102
>                        FW_BLC_SELF (0x000020e0): 0x0000000f
>                             DSPFW1 (0x00070034): 0x00000000
>                             DSPFW2 (0x00070038): 0x00000000
>                             DSPFW3 (0x0007003c): 0x00000000
>                               ADPA (0x00061100): 0x00000c00
>Gen2	disabled, pipe A, -hsync, -vsync
>Gen5	disable, train pattern pattern_1, voltage swing 0.4V,pre-emphasis none, port width X1, enhanced framing disable, FDI PLL disable, scrambing enable, master mode disable
>                               LVDS (0x00061180): 0xc0300300
>Gen2	enabled, pipe B, 18 bit, 1 channel
>                               DVOA (0x00061120): 0x00000000
>Gen2	disabled, pipe A, no stall, -hsync, -vsync
>                               DVOB (0x00061140): 0x00480000
>Gen2	disabled, pipe A, stall disabled, not detected
>Gen2	disabled, pipe A, no stall, -hsync, -vsync
>                               DVOC (0x00061160): 0x00480000
>Gen2	disabled, pipe A, stall disabled, not detected
>Gen2	disabled, pipe A, no stall, -hsync, -vsync
>                        DVOA_SRCDIM (0x00061124): 0x00000000
>                        DVOB_SRCDIM (0x00061144): 0x00000000
>                        DVOC_SRCDIM (0x00061164): 0x00000000
>                        BLC_PWM_CTL (0x00061254): 0x762b762a
>                       BLC_PWM_CTL2 (0x00061250): 0x00000000
>                         PP_CONTROL (0x00061204): 0xabcd0001
>Gen2	power target: on
>                          PP_STATUS (0x00061200): 0xc0000008
>Gen2	on, ready, sequencing idle
>                       PP_ON_DELAYS (0x00061208): 0x012c0fa0
>                      PP_OFF_DELAYS (0x0006120c): 0x01c20fa0
>                         PP_DIVISOR (0x00061210): 0x00299909
>                       PFIT_CONTROL (0x00061230): 0x00000008
>                    PFIT_PGM_RATIOS (0x00061234): 0x00000000
>                    PORT_HOTPLUG_EN (0x00061110): 0x00000000
>                  PORT_HOTPLUG_STAT (0x00061114): 0x00000000
>                           DSPACNTR (0x00070180): 0xd9000000
>Gen2	enabled, pipe B
>Gen5	enabled, pipe B
>Gen7.5	enabled, pipe B
>                         DSPASTRIDE (0x00070188): 0x00002000
>Gen2	8192 bytes
>Gen5	128
>Gen7.5	128
>                            DSPAPOS (0x0007018c): 0x00000000
>Gen2	0, 0
>                           DSPASIZE (0x00070190): 0x031f04ff
>Gen2	1280, 800
>                           DSPABASE (0x00070184): 0x03000000
>                           DSPASURF (0x0007019c): 0x00000000
>                        DSPATILEOFF (0x000701a4): 0x00000000
>Gen5	0, 0
>Gen7.5	0, 0
>                          PIPEACONF (0x00070008): 0x00000000
>Gen2	disabled, inactive
>Gen5	disabled, inactive
>Gen7.5	disabled, inactive
>                           PIPEASRC (0x0006001c): 0x027f01df
>Gen2	640, 480
>Gen5	640, 480
>Gen7.5	640, 480
>                          PIPEASTAT (0x00070024): 0x10000a01
>Gen2	status: CRC_DONE_ENABLE GMBUS_INT_STATUS VSYNC_INT_STATUS OREG_UPDATE_STATUS
>                  PIPEA_GMCH_DATA_M (0x00070050): 0x00000000
>                  PIPEA_GMCH_DATA_N (0x00070054): 0x00000000
>                    PIPEA_DP_LINK_M (0x00070060): 0x00000000
>                    PIPEA_DP_LINK_N (0x00070064): 0x00000000
>                      CURSOR_A_BASE (0x00070084): 0x00000000
>                   CURSOR_A_CONTROL (0x00070080): 0x00000000
>                  CURSOR_A_POSITION (0x00070088): 0x00000000
>                               FPA0 (0x00006040): 0x00021203
>Gen2	n = 2, m1 = 18, m2 = 3
>                               FPA1 (0x00006044): 0x00021203
>Gen2	n = 2, m1 = 18, m2 = 3
>                             DPLL_A (0x00006014): 0x10000000
>Gen2	disabled, non-dvo, default clock, unknown mode, p1 = 0, p2 = 0
>                          DPLL_A_MD (0x0000601c): 0x00000000
>                           HTOTAL_A (0x00060000): 0x033f027f
>Gen2	640 active, 832 total
>Gen5	640 active, 832 total
>Gen7.5	640 active, 832 total
>                           HBLANK_A (0x00060004): 0x033f027f
>Gen2	640 start, 832 end
>Gen5	640 start, 832 end
>Gen7.5	640 start, 832 end
>                            HSYNC_A (0x00060008): 0x02bf0297
>Gen2	664 start, 704 end
>Gen5	664 start, 704 end
>Gen7.5	664 start, 704 end
>                           VTOTAL_A (0x0006000c): 0x020701df
>Gen2	480 active, 520 total
>Gen5	480 active, 520 total
>Gen7.5	480 active, 520 total
>                           VBLANK_A (0x00060010): 0x020701df
>Gen2	480 start, 520 end
>Gen5	480 start, 520 end
>Gen7.5	480 start, 520 end
>                            VSYNC_A (0x00060014): 0x01ea01e8
>Gen2	489 start, 491 end
>Gen5	489 start, 491 end
>Gen7.5	489 start, 491 end
>                          BCLRPAT_A (0x00060020): 0x00000000
>                       VSYNCSHIFT_A (0x00060028): 0x00000000
>                           DSPBCNTR (0x00071180): 0x00000000
>Gen2	disabled, pipe A
>Gen5	disabled, pipe A
>Gen7.5	disabled, pipe A
>                         DSPBSTRIDE (0x00071188): 0x00001000
>Gen2	4096 bytes
>Gen5	64
>Gen7.5	64
>                            DSPBPOS (0x0007118c): 0x00000000
>Gen2	0, 0
>                           DSPBSIZE (0x00071190): 0x02ff03ff
>Gen2	1024, 768
>                           DSPBBASE (0x00071184): 0x00000000
>                           DSPBSURF (0x0007119c): 0x00000000
>                        DSPBTILEOFF (0x000711a4): 0x00000000
>Gen5	0, 0
>Gen7.5	0, 0
>                          PIPEBCONF (0x00071008): 0x80000000
>Gen2	enabled, inactive
>Gen5	enabled, inactive
>Gen7.5	enabled, inactive
>                           PIPEBSRC (0x0006101c): 0x04ff031f
>Gen2	1280, 800
>Gen5	1280, 800
>Gen7.5	1280, 800
>                          PIPEBSTAT (0x00071024): 0x10000242
>Gen2	status: CRC_DONE_ENABLE VSYNC_INT_STATUS LBLC_EVENT_STATUS VBLANK_INT_STATUS
>                  PIPEB_GMCH_DATA_M (0x00071050): 0x00000000
>                  PIPEB_GMCH_DATA_N (0x00071054): 0x00000000
>                    PIPEB_DP_LINK_M (0x00071060): 0x00000000
>                    PIPEB_DP_LINK_N (0x00071064): 0x00000000
>                      CURSOR_B_BASE (0x000700c4): 0x339a0000
>                   CURSOR_B_CONTROL (0x000700c0): 0x14000027
>                  CURSOR_B_POSITION (0x000700c8): 0x0188027c
>                               FPB0 (0x00006048): 0x00020d06
>Gen2	n = 2, m1 = 13, m2 = 6
>                               FPB1 (0x0000604c): 0x00020d06
>Gen2	n = 2, m1 = 13, m2 = 6
>                             DPLL_B (0x00006018): 0x98026000
>Gen2	enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14
>                          DPLL_B_MD (0x00006020): 0x00000000
>                           HTOTAL_B (0x00061000): 0x059f04ff
>Gen2	1280 active, 1440 total
>Gen5	1280 active, 1440 total
>Gen7.5	1280 active, 1440 total
>                           HBLANK_B (0x00061004): 0x059f04ff
>Gen2	1280 start, 1440 end
>Gen5	1280 start, 1440 end
>Gen7.5	1280 start, 1440 end
>                            HSYNC_B (0x00061008): 0x054f052f
>Gen2	1328 start, 1360 end
>Gen5	1328 start, 1360 end
>Gen7.5	1328 start, 1360 end
>                           VTOTAL_B (0x0006100c): 0x0336031f
>Gen2	800 active, 823 total
>Gen5	800 active, 823 total
>Gen7.5	800 active, 823 total
>                           VBLANK_B (0x00061010): 0x0336031f
>Gen2	800 start, 823 end
>Gen5	800 start, 823 end
>Gen7.5	800 start, 823 end
>                            VSYNC_B (0x00061014): 0x03270321
>Gen2	802 start, 808 end
>Gen5	802 start, 808 end
>Gen7.5	802 start, 808 end
>                          BCLRPAT_B (0x00061020): 0x00000000
>                       VSYNCSHIFT_B (0x00061028): 0x00000000
>                  VCLK_DIVISOR_VGA0 (0x00006000): 0x00031108
>Gen2	n = 3, m1 = 17, m2 = 8
>                  VCLK_DIVISOR_VGA1 (0x00006004): 0x00031406
>Gen2	n = 3, m1 = 20, m2 = 6
>                      VCLK_POST_DIV (0x00006010): 0x00800080
>Gen2	vga0 p1 = 2, p2 = 4, vga1 p1 = 2, p2 = 2
>                           VGACNTRL (0x00071400): 0x80000000
>Gen2	disabled
>                             TV_CTL (0x00068000): 0x000c0c00
>                             TV_DAC (0x00068004): 0x70000000
>                           TV_CSC_Y (0x00068010): 0x0332012d
>                          TV_CSC_Y2 (0x00068014): 0x07d30104
>                           TV_CSC_U (0x00068018): 0x0733052d
>                          TV_CSC_U2 (0x0006801c): 0x05c70200
>                           TV_CSC_V (0x00068020): 0x0340030c
>                          TV_CSC_V2 (0x00068024): 0x06d00200
>                       TV_CLR_KNOBS (0x00068028): 0x00606000
>                       TV_CLR_LEVEL (0x0006802c): 0x010b00e1
>                         TV_H_CTL_1 (0x00068030): 0x00400359
>                         TV_H_CTL_2 (0x00068034): 0x80480022
>                         TV_H_CTL_3 (0x00068038): 0x007c0344
>                         TV_V_CTL_1 (0x0006803c): 0x00f01415
>                         TV_V_CTL_2 (0x00068040): 0x00060607
>                         TV_V_CTL_3 (0x00068044): 0x80120001
>                         TV_V_CTL_4 (0x00068048): 0x000900f0
>                         TV_V_CTL_5 (0x0006804c): 0x000a00f0
>                         TV_V_CTL_6 (0x00068050): 0x000900f0
>                         TV_V_CTL_7 (0x00068054): 0x000a00f0
>                        TV_SC_CTL_1 (0x00068060): 0xc1710087
>                        TV_SC_CTL_2 (0x00068064): 0x6b405140
>                        TV_SC_CTL_3 (0x00068068): 0x00000000
>                         TV_WIN_POS (0x00068070): 0x00360024
>Gen5	54, 36
>Gen7.5	54, 36
>                        TV_WIN_SIZE (0x00068074): 0x02640198
>Gen5	612, 408
>Gen7.5	612, 408
>                    TV_FILTER_CTL_1 (0x00068080): 0x800010bb
>Gen5	enable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1
>Gen7.5	enable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1
>                    TV_FILTER_CTL_2 (0x00068084): 0x00028283
>Gen5	vscale 5.019623
>                    TV_FILTER_CTL_3 (0x00068088): 0x00014141
>Gen5	vscale initial phase 2.509796
>                      TV_CC_CONTROL (0x00068090): 0x00000000
>Gen5	hscale 0.000000
>                         TV_CC_DATA (0x00068094): 0x00000000
>                        TV_H_LUMA_0 (0x00068100): 0xb1403000
>                       TV_H_LUMA_59 (0x000681ec): 0x0000b060
>                      TV_H_CHROMA_0 (0x00068200): 0xb1403000
>                     TV_H_CHROMA_59 (0x000682ec): 0x0000b060
>                       FBC_CFB_BASE (0x00003200): 0x00000000
>                        FBC_LL_BASE (0x00003204): 0x00000000
>                        FBC_CONTROL (0x00003208): 0x01f40000
>                        FBC_COMMAND (0x0000320c): 0x00000000
>                         FBC_STATUS (0x00003210): 0x20000000
>                       FBC_CONTROL2 (0x00003214): 0x00000000
>                      FBC_FENCE_OFF (0x0000321b): 0x00000000
>                        FBC_MOD_NUM (0x00003220): 0x00000000
>                            MI_MODE (0x0000209c): 0x00000200
>                       MI_ARB_STATE (0x000020e4): 0x00000844
>                     MI_RDRET_STATE (0x000020fc): 0x00000000
>                            ECOSKPD (0x000021d0): 0x00000306
>                               DP_B (0x00064100): 0x00000000
>Gen7.5	disabled not reversed x1 not detected
>                     DPB_AUX_CH_CTL (0x00064110): 0x00000000
>                   DPB_AUX_CH_DATA1 (0x00064114): 0x00000000
>                   DPB_AUX_CH_DATA2 (0x00064118): 0x00000000
>                   DPB_AUX_CH_DATA3 (0x0006411c): 0x00000000
>                   DPB_AUX_CH_DATA4 (0x00064120): 0x00000000
>                   DPB_AUX_CH_DATA5 (0x00064124): 0x00000000
>                               DP_C (0x00064200): 0x00000000
>Gen7.5	disabled not reversed x1 not detected
>                     DPC_AUX_CH_CTL (0x00064210): 0x00000000
>                   DPC_AUX_CH_DATA1 (0x00064214): 0x00000000
>                   DPC_AUX_CH_DATA2 (0x00064218): 0x00000000
>                   DPC_AUX_CH_DATA3 (0x0006421c): 0x00000000
>                   DPC_AUX_CH_DATA4 (0x00064220): 0x00000000
>                   DPC_AUX_CH_DATA5 (0x00064224): 0x00000000
>                               DP_D (0x00064300): 0x00000000
>Gen7.5	disabled not reversed x1 not detected
>                     DPD_AUX_CH_CTL (0x00064310): 0x00000000
>                   DPD_AUX_CH_DATA1 (0x00064314): 0x00000000
>                   DPD_AUX_CH_DATA2 (0x00064318): 0x00000000
>                   DPD_AUX_CH_DATA3 (0x0006431c): 0x00000000
>                   DPD_AUX_CH_DATA4 (0x00064320): 0x00000000
>                   DPD_AUX_CH_DATA5 (0x00064324): 0x00000000
>                         AUD_CONFIG (0x00062000): 0x00000000
>Gen5	1 active, 1 total
>Gen7.5	1 active, 1 total
>                   AUD_HDMIW_STATUS (0x000620d4): 0x00000000
>                     AUD_CONV_CHCNT (0x00062120): 0x00000000
>                      VIDEO_DIP_CTL (0x00061170): 0x00000000
>                      AUD_PINW_CNTR (0x000620b0): 0x00000000
>                        AUD_CNTL_ST (0x000620b4): 0x00000000
>                        AUD_PIN_CAP (0x000620a4): 0x00000000
>                       AUD_PINW_CAP (0x000620a0): 0x00000000
>                 AUD_PINW_UNSOLRESP (0x000620b8): 0x00000000
>                   AUD_OUT_DIG_CNVT (0x0006207c): 0x00000000
>                      AUD_OUT_CWCAP (0x00062070): 0x00000000
>                        AUD_GRP_CAP (0x00062048): 0x00000000
>Gen5	val 0x0 0
>                           FENCE  0 (0x00002000): 0x00000000
>Gen2	disabled
>                           FENCE  1 (0x00002004): 0x03000341
>Gen2	enabled, X tiled, 8192 pitch, 0x03000000 - 0x03800000 (8192kb)
>                           FENCE  2 (0x00002008): 0x00000000
>Gen2	disabled
>                           FENCE  3 (0x0000200c): 0x02200131
>Gen2	enabled, X tiled, 4096 pitch, 0x02200000 - 0x02400000 (2048kb)
>                           FENCE  4 (0x00002010): 0x01a00041
>Gen2	enabled, X tiled, 8192 pitch, 0x01a00000 - 0x01b00000 (1024kb)
>                           FENCE  5 (0x00002014): 0x00500031
>Gen2	enabled, X tiled, 4096 pitch, 0x00500000 - 0x00600000 (1024kb)
>                           FENCE  6 (0x00002018): 0x00600131
>Gen2	enabled, X tiled, 4096 pitch, 0x00600000 - 0x00800000 (2048kb)
>                           FENCE  7 (0x0000201c): 0x00000000
>Gen2	disabled
>                           FENCE  8 (0x00003000): 0xffffffff
>Gen2	enabled, Y tiled, 16384 pitch, 0x0ff00000 - 0x17f00000 (131072kb)
>                           FENCE  9 (0x00003004): 0xffffffff
>Gen2	enabled, Y tiled, 16384 pitch, 0x0ff00000 - 0x17f00000 (131072kb)
>                          FENCE  10 (0x00003008): 0xffffffff
>Gen2	enabled, Y tiled, 16384 pitch, 0x0ff00000 - 0x17f00000 (131072kb)
>                          FENCE  11 (0x0000300c): 0xffffffff
>Gen2	enabled, Y tiled, 16384 pitch, 0x0ff00000 - 0x17f00000 (131072kb)
>                          FENCE  12 (0x00003010): 0xffffffff
>Gen2	enabled, Y tiled, 16384 pitch, 0x0ff00000 - 0x17f00000 (131072kb)
>                          FENCE  13 (0x00003014): 0xffffffff
>Gen2	enabled, Y tiled, 16384 pitch, 0x0ff00000 - 0x17f00000 (131072kb)
>                          FENCE  14 (0x00003018): 0xffffffff
>Gen2	enabled, Y tiled, 16384 pitch, 0x0ff00000 - 0x17f00000 (131072kb)
>                          FENCE  15 (0x0000301c): 0xffffffff
>Gen2	enabled, Y tiled, 16384 pitch, 0x0ff00000 - 0x17f00000 (131072kb)
>                            INST_PM (0x000020c0): 0x00001800

Actions: View

Attachments on bug 107600: 141158 | 141159 | 141160 | 141161 | 141162 | 141173 | 141175 | 141176 | 141178 | 141180 | 141183 | 141386 | 141404

Use of freedesktop.org services, including Bugzilla, is subject to our Code of Conduct. How we collect and use information is described in our Privacy Policy.