Attachment 141244 Details for Bug 107477 – GTA 5 RADV_DEBUG log

GTA 5 RADV_DEBUG log

gta5_crash.log (text/x-log), 294.15 KB, created by Clément Guérin on 2018-08-23 05:01:40 UTC

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Creator: Clément Guérin

Created: 2018-08-23 05:01:40 UTC

Size: 294.15 KB

patch

obsolete

>000b:fixme:winediag:start_process Wine Staging 3.13 is a testing version containing experimental patches.
>000b:fixme:winediag:start_process Please mention your exact version when filing bug reports on winehq.org.
>0031:fixme:heap:RtlSetHeapInformation 0x11f0000 0 0x23e830 4 stub
>0031:fixme:thread:SetThreadIdealProcessor (0x74): stub
>0031:fixme:wer:WerSetFlags (1) stub!
>0031:fixme:ver:GetCurrentPackageId (0x23d850 (nil)): stub
>info:  Game: GTA5.exe
>info:  DXVK: v0.65-60-gf75e3ad
>warn:  OpenVR: Failed to locate module
>info:  Enabled instance extensions:
>info:    VK_KHR_get_physical_device_properties2
>info:    VK_KHR_surface
>info:    VK_KHR_win32_surface
>info:  AMD RADV FIJI (LLVM 8.0.0):
>info:    Driver: 18.2.99
>info:    Vulkan: 1.1.70
>info:    Memory Heap[0]: 
>info:      Size: 3840 MiB
>info:      Flags: 0x1
>info:      Memory Type[0]: Property Flags = 0x1
>info:    Memory Heap[1]: 
>info:      Size: 256 MiB
>info:      Flags: 0x1
>info:      Memory Type[2]: Property Flags = 0x7
>info:    Memory Heap[2]: 
>info:      Size: 4096 MiB
>info:      Flags: 0x0
>info:      Memory Type[1]: Property Flags = 0x6
>info:      Memory Type[3]: Property Flags = 0xe
>warn:  DXGI: VK_FORMAT_D24_UNORM_S8_UINT -> VK_FORMAT_D32_SFLOAT_S8_UINT
>info:  Game: GTA5.exe
>info:  DXVK: v0.65-60-gf75e3ad
>warn:  OpenVR: Failed to locate module
>info:  Enabled instance extensions:
>info:    VK_KHR_get_physical_device_properties2
>info:    VK_KHR_surface
>info:    VK_KHR_win32_surface
>info:  AMD RADV FIJI (LLVM 8.0.0):
>info:    Driver: 18.2.99
>info:    Vulkan: 1.1.70
>info:    Memory Heap[0]: 
>info:      Size: 3840 MiB
>info:      Flags: 0x1
>info:      Memory Type[0]: Property Flags = 0x1
>info:    Memory Heap[1]: 
>info:      Size: 256 MiB
>info:      Flags: 0x1
>info:      Memory Type[2]: Property Flags = 0x7
>info:    Memory Heap[2]: 
>info:      Size: 4096 MiB
>info:      Flags: 0x0
>info:      Memory Type[1]: Property Flags = 0x6
>info:      Memory Type[3]: Property Flags = 0xe
>warn:  DXGI: VK_FORMAT_D24_UNORM_S8_UINT -> VK_FORMAT_D32_SFLOAT_S8_UINT
>info:  D3D11CoreCreateDevice: Probing D3D_FEATURE_LEVEL_11_0
>info:  D3D11CoreCreateDevice: Using feature level D3D_FEATURE_LEVEL_11_0
>info:  Enabled device extensions:
>info:    VK_EXT_shader_viewport_index_layer
>info:    VK_EXT_vertex_attribute_divisor
>info:    VK_KHR_dedicated_allocation
>info:    VK_KHR_descriptor_update_template
>info:    VK_KHR_get_memory_requirements2
>info:    VK_KHR_image_format_list
>info:    VK_KHR_maintenance1
>info:    VK_KHR_maintenance2
>info:    VK_KHR_sampler_mirror_clamp_to_edge
>info:    VK_KHR_shader_draw_parameters
>info:    VK_KHR_swapchain
>info:  Game: GTA5.exe
>info:  DXVK: v0.65-60-gf75e3ad
>warn:  OpenVR: Failed to locate module
>info:  Enabled instance extensions:
>info:    VK_KHR_get_physical_device_properties2
>info:    VK_KHR_surface
>info:    VK_KHR_win32_surface
>info:  AMD RADV FIJI (LLVM 8.0.0):
>info:    Driver: 18.2.99
>info:    Vulkan: 1.1.70
>info:    Memory Heap[0]: 
>info:      Size: 3840 MiB
>info:      Flags: 0x1
>info:      Memory Type[0]: Property Flags = 0x1
>info:    Memory Heap[1]: 
>info:      Size: 256 MiB
>info:      Flags: 0x1
>info:      Memory Type[2]: Property Flags = 0x7
>info:    Memory Heap[2]: 
>info:      Size: 4096 MiB
>info:      Flags: 0x0
>info:      Memory Type[1]: Property Flags = 0x6
>info:      Memory Type[3]: Property Flags = 0xe
>warn:  DXGI: VK_FORMAT_D24_UNORM_S8_UINT -> VK_FORMAT_D32_SFLOAT_S8_UINT
>info:  Game: GTA5.exe
>info:  DXVK: v0.65-60-gf75e3ad
>warn:  OpenVR: Failed to locate module
>info:  Enabled instance extensions:
>info:    VK_KHR_get_physical_device_properties2
>info:    VK_KHR_surface
>info:    VK_KHR_win32_surface
>info:  AMD RADV FIJI (LLVM 8.0.0):
>info:    Driver: 18.2.99
>info:    Vulkan: 1.1.70
>info:    Memory Heap[0]: 
>info:      Size: 3840 MiB
>info:      Flags: 0x1
>info:      Memory Type[0]: Property Flags = 0x1
>info:    Memory Heap[1]: 
>info:      Size: 256 MiB
>info:      Flags: 0x1
>info:      Memory Type[2]: Property Flags = 0x7
>info:    Memory Heap[2]: 
>info:      Size: 4096 MiB
>info:      Flags: 0x0
>info:      Memory Type[1]: Property Flags = 0x6
>info:      Memory Type[3]: Property Flags = 0xe
>warn:  DXGI: VK_FORMAT_D24_UNORM_S8_UINT -> VK_FORMAT_D32_SFLOAT_S8_UINT
>info:  D3D11CoreCreateDevice: Probing D3D_FEATURE_LEVEL_11_0
>info:  D3D11CoreCreateDevice: Using feature level D3D_FEATURE_LEVEL_11_0
>info:  Enabled device extensions:
>info:    VK_EXT_shader_viewport_index_layer
>info:    VK_EXT_vertex_attribute_divisor
>info:    VK_KHR_dedicated_allocation
>info:    VK_KHR_descriptor_update_template
>info:    VK_KHR_get_memory_requirements2
>info:    VK_KHR_image_format_list
>info:    VK_KHR_maintenance1
>info:    VK_KHR_maintenance2
>info:    VK_KHR_sampler_mirror_clamp_to_edge
>info:    VK_KHR_shader_draw_parameters
>info:    VK_KHR_swapchain
>004c:fixme:wtsapi:WTSRegisterSessionNotification Stub 0x10066 0x00000000
>info:  D3D11CoreCreateDevice: Probing D3D_FEATURE_LEVEL_11_0
>info:  D3D11CoreCreateDevice: Using feature level D3D_FEATURE_LEVEL_11_0
>info:  Enabled device extensions:
>info:    VK_EXT_shader_viewport_index_layer
>info:    VK_EXT_vertex_attribute_divisor
>info:    VK_KHR_dedicated_allocation
>info:    VK_KHR_descriptor_update_template
>info:    VK_KHR_get_memory_requirements2
>info:    VK_KHR_image_format_list
>info:    VK_KHR_maintenance1
>info:    VK_KHR_maintenance2
>info:    VK_KHR_sampler_mirror_clamp_to_edge
>info:    VK_KHR_shader_draw_parameters
>info:    VK_KHR_swapchain
>warn:  DXGI: MakeWindowAssociation: Ignoring flags
>warn:  D3D11Device: No matching border color found for (1,0,0,0)
>004c:fixme:imm:ImmReleaseContext (0x10066, 0x98e80): stub
>0031:fixme:thread:SetThreadIdealProcessor (0xe40): stub
>info:  DxgiVkPresenter: Recreating swap chain: 
>  Format:       VK_FORMAT_B8G8R8A8_UNORM
>  Present mode: VK_PRESENT_MODE_IMMEDIATE_KHR
>  Buffer size:  2560x1440
>0031:fixme:hnetcfg:fw_app_get_Enabled 0x5d773810, 0x23f7f0
>0031:fixme:hnetcfg:fw_app_put_ProcessImageFileName 0x5d773810, L"C:\\Program Files (x86)\\Grand Theft Auto V\\GTA5.exe"
>0031:fixme:mpr:WNetGetUniversalNameW (L"C:\\Program Files (x86)\\Grand Theft Auto V\\GTA5.exe", 0x00000001, (nil), 0x23f704): stub
>0031:fixme:hnetcfg:fw_app_put_Name 0x5d773810, L"GTA V"
>0031:fixme:hnetcfg:fw_apps_Add 0x5d773c00, 0x5d773810
>0031:fixme:mfplat:MFStartup (65648, 0): stub
>shader: MESA_SHADER_VERTEX
>inputs: 0
>outputs: 0
>uniforms: 0
>shared: 0
>decl_var shader_in INTERP_MODE_NONE vec3 v0 (VERT_ATTRIB_GENERIC0.xyz, 0, 0)
>decl_var shader_in INTERP_MODE_NONE vec4 v1 (VERT_ATTRIB_GENERIC1, 0, 0)
>decl_var shader_in INTERP_MODE_NONE vec2 v2 (VERT_ATTRIB_GENERIC2.xy, 0, 0)
>decl_var shader_in INTERP_MODE_NONE vec3 v3 (VERT_ATTRIB_GENERIC3.xyz, 0, 0)
>decl_var shader_out INTERP_MODE_NONE vec4 vs_vertex_out.field0 (VARYING_SLOT_POS, 0, 0)
>decl_var shader_out INTERP_MODE_NONE float o1 (VARYING_SLOT_VAR1.x, 0, 0)
>decl_var shader_out INTERP_MODE_NONE float o1@0 (VARYING_SLOT_VAR1.w, 0, 0)
>decl_var shader_out INTERP_MODE_NONE float o2 (VARYING_SLOT_VAR1.y, 0, 0)
>decl_var shader_out INTERP_MODE_NONE float o2@1 (VARYING_SLOT_VAR1.z, 0, 0)
>decl_var shader_out INTERP_MODE_NONE float o3 (VARYING_SLOT_VAR3.x, 0, 0)
>decl_var shader_out INTERP_MODE_NONE float o3@2 (VARYING_SLOT_VAR3.y, 0, 0)
>decl_var shader_out INTERP_MODE_NONE float o3@3 (VARYING_SLOT_VAR3.z, 0, 0)
>decl_function main (0 params)
>
>impl main {
>	decl_var  INTERP_MODE_NONE vec3 in@v0-temp
>	decl_var  INTERP_MODE_NONE vec4 r0
>	decl_var  INTERP_MODE_NONE vec4 out@vs_vertex_out.field0-temp
>	decl_var  INTERP_MODE_NONE vec2 out@o2-temp
>	decl_var  INTERP_MODE_NONE vec2 in@v2-temp
>	decl_var  INTERP_MODE_NONE vec4 r1
>	decl_var  INTERP_MODE_NONE vec4 out@o0-temp
>	decl_var  INTERP_MODE_NONE vec4 out@o1-temp
>	decl_var  INTERP_MODE_NONE vec3 out@o3-temp
>	decl_var  INTERP_MODE_NONE vec4 in@v1-temp
>	decl_var  INTERP_MODE_NONE vec3 in@v3-temp
>	decl_var  INTERP_MODE_NONE vec4[32] shader_in
>	decl_var  INTERP_MODE_NONE float o0
>	decl_var  INTERP_MODE_NONE float o1@4
>	decl_var  INTERP_MODE_NONE float o0@5
>	decl_var  INTERP_MODE_NONE float o0@6
>	decl_var  INTERP_MODE_NONE float o0@7
>	decl_var  INTERP_MODE_NONE float o1@8
>	block block_0:
>	/* preds: */
>	vec1 32 ssa_0 = deref_var &v0 (shader_in vec3) 
>	vec3 32 ssa_1 = intrinsic load_deref (ssa_0) ()
>	vec1 32 ssa_2 = deref_var &v1 (shader_in vec4) 
>	vec4 32 ssa_3 = intrinsic load_deref (ssa_2) ()
>	vec1 32 ssa_4 = deref_var &v2 (shader_in vec2) 
>	vec2 32 ssa_5 = intrinsic load_deref (ssa_4) ()
>	vec1 32 ssa_6 = deref_var &v3 (shader_in vec3) 
>	vec3 32 ssa_7 = intrinsic load_deref (ssa_6) ()
>	vec3 32 ssa_8 = load_const (0x00000000 /* 0.000000 */, 0x00000000 /* 0.000000 */, 0x3f800000 /* 1.000000 */)
>	vec1 32 ssa_9 = load_const (0x00000000 /* 0.000000 */)
>	vec1 32 ssa_10 = load_const (0x3dcccccd /* 0.100000 */)
>	vec2 32 ssa_11 = load_const (0x3f800000 /* 1.000000 */, 0x3f800000 /* 1.000000 */)
>	vec2 32 ssa_12 = load_const (0x00000000 /* 0.000000 */, 0x00000000 /* 0.000000 */)
>	vec1 32 ssa_13 = load_const (0xbf800000 /* -1.000000 */)
>	vec1 32 ssa_14 = load_const (0x3f800000 /* 1.000000 */)
>	vec1 32 ssa_15 = load_const (0x368637bd /* 0.000004 */)
>	vec1 32 ssa_16 = intrinsic vulkan_resource_index (ssa_9) (0, 0) /* desc-set=0 */ /* binding=0 */
>	vec1 32 ssa_17 = load_const (0x00000090 /* 0.000000 */)
>	vec4 32 ssa_18 = intrinsic load_ubo (ssa_16, ssa_17) ()
>	vec1 32 ssa_19 = fmul ssa_1.y, ssa_18.x
>	vec1 32 ssa_20 = fmul ssa_1.y, ssa_18.y
>	vec1 32 ssa_21 = fmul ssa_1.y, ssa_18.z
>	vec1 32 ssa_22 = fmul ssa_1.y, ssa_18.w
>	vec1 32 ssa_23 = load_const (0x00000080 /* 0.000000 */)
>	vec4 32 ssa_24 = intrinsic load_ubo (ssa_16, ssa_23) ()
>	vec1 32 ssa_25 = fmul ssa_1.x, ssa_24.x
>	vec1 32 ssa_26 = fadd ssa_25, ssa_19
>	vec1 32 ssa_27 = fmul ssa_1.x, ssa_24.y
>	vec1 32 ssa_28 = fadd ssa_27, ssa_20
>	vec1 32 ssa_29 = fmul ssa_1.x, ssa_24.z
>	vec1 32 ssa_30 = fadd ssa_29, ssa_21
>	vec1 32 ssa_31 = fmul ssa_1.x, ssa_24.w
>	vec1 32 ssa_32 = fadd ssa_31, ssa_22
>	vec1 32 ssa_33 = load_const (0x000000a0 /* 0.000000 */)
>	vec4 32 ssa_34 = intrinsic load_ubo (ssa_16, ssa_33) ()
>	vec1 32 ssa_35 = fmul ssa_1.z, ssa_34.x
>	vec1 32 ssa_36 = fadd ssa_35, ssa_26
>	vec1 32 ssa_37 = fmul ssa_1.z, ssa_34.y
>	vec1 32 ssa_38 = fadd ssa_37, ssa_28
>	vec1 32 ssa_39 = fmul ssa_1.z, ssa_34.z
>	vec1 32 ssa_40 = fadd ssa_39, ssa_30
>	vec1 32 ssa_41 = fmul ssa_1.z, ssa_34.w
>	vec1 32 ssa_42 = fadd ssa_41, ssa_32
>	vec1 32 ssa_43 = load_const (0x000000b0 /* 0.000000 */)
>	vec4 32 ssa_44 = intrinsic load_ubo (ssa_16, ssa_43) ()
>	vec1 32 ssa_45 = fadd ssa_36, ssa_44.x
>	vec1 32 ssa_46 = fadd ssa_38, ssa_44.y
>	vec1 32 ssa_47 = fadd ssa_40, ssa_44.z
>	vec1 32 ssa_48 = fadd ssa_42, ssa_44.w
>	vec1 32 ssa_49 = load_const (0x00000010 /* 0.000000 */)
>	vec4 32 ssa_50 = intrinsic load_ubo (ssa_16, ssa_49) ()
>	vec1 32 ssa_51 = fmul ssa_1.y, ssa_50.x
>	vec1 32 ssa_52 = fmul ssa_1.y, ssa_50.y
>	vec1 32 ssa_53 = fmul ssa_1.y, ssa_50.z
>	vec4 32 ssa_54 = intrinsic load_ubo (ssa_16, ssa_9) ()
>	vec1 32 ssa_55 = fmul ssa_1.x, ssa_54.x
>	vec1 32 ssa_56 = fadd ssa_55, ssa_51
>	vec1 32 ssa_57 = fmul ssa_1.x, ssa_54.y
>	vec1 32 ssa_58 = fadd ssa_57, ssa_52
>	vec1 32 ssa_59 = fmul ssa_1.x, ssa_54.z
>	vec1 32 ssa_60 = fadd ssa_59, ssa_53
>	vec1 32 ssa_61 = load_const (0x00000020 /* 0.000000 */)
>	vec4 32 ssa_62 = intrinsic load_ubo (ssa_16, ssa_61) ()
>	vec1 32 ssa_63 = fmul ssa_1.z, ssa_62.x
>	vec1 32 ssa_64 = fadd ssa_63, ssa_56
>	vec1 32 ssa_65 = fmul ssa_1.z, ssa_62.y
>	vec1 32 ssa_66 = fadd ssa_65, ssa_58
>	vec1 32 ssa_67 = fmul ssa_1.z, ssa_62.z
>	vec1 32 ssa_68 = fadd ssa_67, ssa_60
>	vec1 32 ssa_69 = load_const (0x00000030 /* 0.000000 */)
>	vec4 32 ssa_70 = intrinsic load_ubo (ssa_16, ssa_69) ()
>	vec1 32 ssa_71 = fadd ssa_64, ssa_70.x
>	vec1 32 ssa_72 = fadd ssa_66, ssa_70.y
>	vec1 32 ssa_73 = fadd ssa_68, ssa_70.z
>	vec1 32 ssa_74 = fneg ssa_71
>	vec1 32 ssa_75 = fneg ssa_72
>	vec1 32 ssa_76 = fneg ssa_73
>	vec1 32 ssa_77 = load_const (0x000000f0 /* 0.000000 */)
>	vec4 32 ssa_78 = intrinsic load_ubo (ssa_16, ssa_77) ()
>	vec1 32 ssa_79 = fadd ssa_74, ssa_78.x
>	vec1 32 ssa_80 = fadd ssa_75, ssa_78.y
>	vec1 32 ssa_81 = fadd ssa_76, ssa_78.z
>	vec1 32 ssa_82 = fmul ssa_79, ssa_79
>	vec1 32 ssa_83 = fmul ssa_80, ssa_80
>	vec1 32 ssa_84 = fadd ssa_82, ssa_83
>	vec1 32 ssa_85 = fmul ssa_81, ssa_81
>	vec1 32 ssa_86 = fadd ssa_84, ssa_85
>	vec1 32 ssa_87 = fmul ssa_86, ssa_15
>	vec1 32 ssa_88 = fmin ssa_87, ssa_14
>	vec1 32 ssa_89 = intrinsic vulkan_resource_index (ssa_9) (0, 1) /* desc-set=0 */ /* binding=1 */
>	vec1 32 ssa_90 = load_const (0x000000d0 /* 0.000000 */)
>	vec4 32 ssa_91 = intrinsic load_ubo (ssa_89, ssa_90) ()
>	vec1 32 ssa_92 = fneg ssa_91.z
>	vec1 32 ssa_93 = fadd ssa_88, ssa_92
>	vec1 32 ssa_94 = fmax ssa_93, ssa_12.x
>	vec1 32 ssa_95 = fmin ssa_94, ssa_11.x
>	vec1 32 ssa_96 = intrinsic vulkan_resource_index (ssa_9) (0, 2) /* desc-set=0 */ /* binding=2 */
>	vec1 32 ssa_97 = load_const (0x00000310 /* 0.000000 */)
>	vec4 32 ssa_98 = intrinsic load_ubo (ssa_96, ssa_97) ()
>	vec1 32 ssa_99 = fadd ssa_98.w, ssa_13
>	vec1 32 ssa_100 = fmul ssa_95, ssa_99
>	vec1 32 ssa_101 = fadd ssa_100, ssa_11.x
>	vec1 32 ssa_102 = fmul ssa_101, ssa_3.x
>	vec1 32 ssa_103 = fmax ssa_102, ssa_12.x
>	vec1 32 ssa_104 = fmin ssa_103, ssa_11.x
>	vec1 32 ssa_105 = fmul ssa_7.x, ssa_7.x
>	vec1 32 ssa_106 = fmul ssa_7.y, ssa_7.y
>	vec1 32 ssa_107 = fadd ssa_105, ssa_106
>	vec1 32 ssa_108 = fmul ssa_7.z, ssa_7.z
>	vec1 32 ssa_109 = fadd ssa_107, ssa_108
>	vec1 32 ssa_110 = flt ssa_109, ssa_10
>	vec1 32 ssa_111 = bcsel ssa_110, ssa_8.x, ssa_7.x
>	vec1 32 ssa_112 = bcsel ssa_110, ssa_8.y, ssa_7.y
>	vec1 32 ssa_113 = bcsel ssa_110, ssa_8.z, ssa_7.z
>	vec1 32 ssa_114 = fmul ssa_112, ssa_50.x
>	vec1 32 ssa_115 = fmul ssa_112, ssa_50.y
>	vec1 32 ssa_116 = fmul ssa_112, ssa_50.z
>	vec1 32 ssa_117 = fmul ssa_111, ssa_54.x
>	vec1 32 ssa_118 = fadd ssa_117, ssa_114
>	vec1 32 ssa_119 = fmul ssa_111, ssa_54.y
>	vec1 32 ssa_120 = fadd ssa_119, ssa_115
>	vec1 32 ssa_121 = fmul ssa_111, ssa_54.z
>	vec1 32 ssa_122 = fadd ssa_121, ssa_116
>	vec1 32 ssa_123 = fmul ssa_113, ssa_62.x
>	vec1 32 ssa_124 = fadd ssa_123, ssa_118
>	vec1 32 ssa_125 = fmul ssa_113, ssa_62.y
>	vec1 32 ssa_126 = fadd ssa_125, ssa_120
>	vec1 32 ssa_127 = fmul ssa_113, ssa_62.z
>	vec1 32 ssa_128 = fadd ssa_127, ssa_122
>	vec1 32 ssa_129 = fmul ssa_124, ssa_124
>	vec1 32 ssa_130 = fmul ssa_126, ssa_126
>	vec1 32 ssa_131 = fadd ssa_129, ssa_130
>	vec1 32 ssa_132 = fmul ssa_128, ssa_128
>	vec1 32 ssa_133 = fadd ssa_131, ssa_132
>	vec1 32 ssa_134 = frsq ssa_133
>	vec1 32 ssa_135 = fmul ssa_134, ssa_124
>	vec1 32 ssa_136 = fmul ssa_134, ssa_126
>	vec1 32 ssa_137 = fmul ssa_134, ssa_128
>	vec4 32 ssa_138 = vec4 ssa_45, ssa_46, ssa_47, ssa_48
>	vec1 32 ssa_139 = deref_var &o1 (shader_out float) 
>	intrinsic store_deref (ssa_139, ssa_104) (1) /* wrmask=x */
>	vec1 32 ssa_140 = deref_var &o1@0 (shader_out float) 
>	vec1 32 ssa_141 = imov ssa_3.w
>	intrinsic store_deref (ssa_140, ssa_141) (1) /* wrmask=x */
>	vec1 32 ssa_142 = deref_var &o2 (shader_out float) 
>	vec1 32 ssa_143 = imov ssa_5.x
>	intrinsic store_deref (ssa_142, ssa_143) (1) /* wrmask=x */
>	vec1 32 ssa_144 = deref_var &o2@1 (shader_out float) 
>	vec1 32 ssa_145 = imov ssa_5.y
>	intrinsic store_deref (ssa_144, ssa_145) (1) /* wrmask=x */
>	vec1 32 ssa_146 = deref_var &o3 (shader_out float) 
>	intrinsic store_deref (ssa_146, ssa_135) (1) /* wrmask=x */
>	vec1 32 ssa_147 = deref_var &o3@2 (shader_out float) 
>	intrinsic store_deref (ssa_147, ssa_136) (1) /* wrmask=x */
>	vec1 32 ssa_148 = deref_var &o3@3 (shader_out float) 
>	intrinsic store_deref (ssa_148, ssa_137) (1) /* wrmask=x */
>	vec1 32 ssa_149 = deref_var &vs_vertex_out.field0 (shader_out vec4) 
>	intrinsic store_deref (ssa_149, ssa_138) (15) /* wrmask=xyzw */
>	/* succs: block_0 */
>	block block_0:
>}
>
>shader: MESA_SHADER_FRAGMENT
>inputs: 0
>outputs: 0
>uniforms: 0
>shared: 0
>decl_var uniform INTERP_MODE_NONE sampler s0 (429, 0, 6)
>decl_var uniform INTERP_MODE_NONE sampler2D t0 (429, 0, 7)
>decl_var shader_in INTERP_MODE_NONE vec4 ps_frag_coord (VARYING_SLOT_POS, 0, 0)
>decl_var shader_in INTERP_MODE_NONE float v1 (VARYING_SLOT_VAR1.x, 0, 0)
>decl_var shader_in INTERP_MODE_NONE float v1@0 (VARYING_SLOT_VAR1.w, 0, 0)
>decl_var shader_in INTERP_MODE_NONE float v2 (VARYING_SLOT_VAR1.y, 0, 0)
>decl_var shader_in INTERP_MODE_NONE float v2@1 (VARYING_SLOT_VAR1.z, 0, 0)
>decl_var shader_in INTERP_MODE_NONE float v3 (VARYING_SLOT_VAR3.x, 0, 0)
>decl_var shader_in INTERP_MODE_NONE float v3@2 (VARYING_SLOT_VAR3.y, 0, 0)
>decl_var shader_in INTERP_MODE_NONE float v3@3 (VARYING_SLOT_VAR3.z, 0, 0)
>decl_var shader_out INTERP_MODE_NONE vec4 o0 (FRAG_RESULT_DATA0, 0, 0)
>decl_var shader_out INTERP_MODE_NONE vec4 o1 (FRAG_RESULT_DATA1, 0, 0)
>decl_var shader_out INTERP_MODE_NONE vec4 o2 (FRAG_RESULT_DATA2, 0, 0)
>decl_var shader_out INTERP_MODE_NONE vec4 o3 (FRAG_RESULT_DATA3, 0, 0)
>decl_function main (0 params)
>
>impl main {
>	decl_var  INTERP_MODE_NONE vec4 r1
>	decl_var  INTERP_MODE_NONE vec4 out@o1-temp
>	decl_var  INTERP_MODE_NONE vec4 out@o2-temp
>	decl_var  INTERP_MODE_NONE vec4 r0
>	decl_var  INTERP_MODE_NONE vec4 out@o3-temp
>	decl_var  INTERP_MODE_NONE vec4 r2
>	decl_var  INTERP_MODE_NONE vec4 out@o0-temp
>	decl_var  INTERP_MODE_NONE uvec4[4] icb
>	decl_var  INTERP_MODE_NONE vec4[32] shader_in
>	decl_var  INTERP_MODE_NONE bool ps_kill
>	block block_0:
>	/* preds: */
>	vec1 32 ssa_0 = load_const (0x00000000 /* 0.000000 */)
>	vec1 32 ssa_1 = load_const (0x00000001 /* 0.000000 */)
>	vec1 32 ssa_2 = deref_var &v1 (shader_in float) 
>	vec1 32 ssa_3 = intrinsic load_deref (ssa_2) ()
>	vec1 32 ssa_4 = deref_var &v1@0 (shader_in float) 
>	vec1 32 ssa_5 = intrinsic load_deref (ssa_4) ()
>	vec1 32 ssa_6 = deref_var &v2 (shader_in float) 
>	vec1 32 ssa_7 = intrinsic load_deref (ssa_6) ()
>	vec1 32 ssa_8 = deref_var &v2@1 (shader_in float) 
>	vec1 32 ssa_9 = intrinsic load_deref (ssa_8) ()
>	vec2 32 ssa_10 = vec2 ssa_7, ssa_9
>	vec1 32 ssa_11 = deref_var &v3 (shader_in float) 
>	vec1 32 ssa_12 = intrinsic load_deref (ssa_11) ()
>	vec1 32 ssa_13 = deref_var &v3@2 (shader_in float) 
>	vec1 32 ssa_14 = intrinsic load_deref (ssa_13) ()
>	vec1 32 ssa_15 = deref_var &v3@3 (shader_in float) 
>	vec1 32 ssa_16 = intrinsic load_deref (ssa_15) ()
>	vec1 32 ssa_17 = deref_var &ps_frag_coord (shader_in vec4) 
>	vec4 32 ssa_18 = intrinsic load_deref (ssa_17) ()
>	vec4 32 ssa_19 = load_const (0x00000000 /* 0.000000 */, 0x00000000 /* 0.000000 */, 0x00000000 /* 0.000000 */, 0x00000000 /* 0.000000 */)
>	vec3 32 ssa_20 = load_const (0x00000000 /* 0.000000 */, 0x00000000 /* 0.000000 */, 0x00000000 /* 0.000000 */)
>	vec1 32 ssa_21 = load_const (0x3f7851ec /* 0.970000 */)
>	vec2 32 ssa_22 = load_const (0x3f000000 /* 0.500000 */, 0x3efa0000 /* 0.488281 */)
>	vec1 32 ssa_23 = load_const (0x3f800000 /* 1.000000 */)
>	vec1 32 ssa_24 = load_const (0x3f333333 /* 0.700000 */)
>	vec1 32 ssa_25 = load_const (0xbf000000 /* -0.500000 */)
>	vec1 32 ssa_26 = load_const (0x3f000000 /* 0.500000 */)
>	vec1 32 ssa_27 = load_const (0x3b000000 /* 0.001953 */)
>	vec1 32 ssa_28 = load_const (0x3fc4ec4f /* 1.538462 */)
>	vec1 32 ssa_29 = load_const (0xbeb33333 /* -0.350000 */)
>	vec3 32 ssa_30 = load_const (0x3f000000 /* 0.500000 */, 0x3f000000 /* 0.500000 */, 0x3f000000 /* 0.500000 */)
>	vec2 32 ssa_31 = load_const (0x00000001 /* 0.000000 */, 0x00000001 /* 0.000000 */)
>	vec1 32 ssa_32 = f2u32 ssa_18.x
>	vec1 32 ssa_33 = f2u32 ssa_18.y
>	vec1 32 ssa_34 = iand ssa_32, ssa_31.x
>	vec1 32 ssa_35 = iand ssa_33, ssa_31.y
>	vec1 32 ssa_36 = ishl ssa_35, ssa_1
>	vec1 32 ssa_37 = iadd ssa_34, ssa_36
>	vec1 32 ssa_38 = intrinsic vulkan_resource_index (ssa_0) (0, 3) /* desc-set=0 */ /* binding=3 */
>	vec1 32 ssa_39 = load_const (0x00000002 /* 0.000000 */)
>	vec1 32 ssa_40 = ilt ssa_37, ssa_39
>	vec1 32 ssa_41 = ilt ssa_37, ssa_1
>	vec1 32 ssa_42 = b2f ssa_41
>	vec1 32 ssa_43 = ige ssa_37, ssa_1
>	vec1 32 ssa_44 = b2f ssa_43
>	vec1 32 ssa_45 = load_const (0x00000003 /* 0.000000 */)
>	vec1 32 ssa_46 = ilt ssa_37, ssa_45
>	vec1 32 ssa_47 = b2f ssa_46
>	vec1 32 ssa_48 = ige ssa_37, ssa_45
>	vec1 32 ssa_49 = b2f ssa_48
>	vec1 32 ssa_50 = bcsel ssa_40, ssa_42, ssa_0
>	vec1 32 ssa_51 = bcsel ssa_40, ssa_44, ssa_0
>	vec1 32 ssa_52 = bcsel ssa_40, ssa_0, ssa_47
>	vec1 32 ssa_53 = bcsel ssa_40, ssa_0, ssa_49
>	vec4 32 ssa_54 = intrinsic load_ubo (ssa_38, ssa_0) ()
>	vec1 32 ssa_55 = fmul ssa_54.x, ssa_50
>	vec1 32 ssa_56 = fmul ssa_54.y, ssa_51
>	vec1 32 ssa_57 = fadd ssa_55, ssa_56
>	vec1 32 ssa_58 = fmul ssa_54.z, ssa_52
>	vec1 32 ssa_59 = fadd ssa_57, ssa_58
>	vec1 32 ssa_60 = fmul ssa_54.w, ssa_53
>	vec1 32 ssa_61 = fadd ssa_59, ssa_60
>	vec1 32 ssa_62 = flt ssa_61, ssa_23
>	vec1 32 ssa_63 = deref_var &s0 (uniform sampler) 
>	vec1 32 ssa_64 = deref_var &t0 (uniform sampler2D) 
>	vec4 32 ssa_65 = tex ssa_64 (texture_deref), ssa_63 (sampler_deref), ssa_10 (coord), 
>	vec1 32 ssa_66 = load_const (0x000000c0 /* 0.000000 */)
>	vec4 32 ssa_67 = intrinsic load_ubo (ssa_38, ssa_66) ()
>	vec1 32 ssa_68 = fmul ssa_65.w, ssa_67.x
>	vec1 32 ssa_69 = intrinsic vulkan_resource_index (ssa_0) (0, 4) /* desc-set=0 */ /* binding=4 */
>	vec1 32 ssa_70 = load_const (0x00000040 /* 0.000000 */)
>	vec4 32 ssa_71 = intrinsic load_ubo (ssa_69, ssa_70) ()
>	vec1 32 ssa_72 = fge ssa_71.x, ssa_68
>	vec1 32 ssa_73 = ior ssa_62, ssa_72
>	vec1 32 ssa_74 = fmul ssa_12, ssa_12
>	vec1 32 ssa_75 = fmul ssa_14, ssa_14
>	vec1 32 ssa_76 = fadd ssa_74, ssa_75
>	vec1 32 ssa_77 = fmul ssa_16, ssa_16
>	vec1 32 ssa_78 = fadd ssa_76, ssa_77
>	vec1 32 ssa_79 = frsq ssa_78
>	vec1 32 ssa_80 = fmul ssa_79, ssa_16
>	vec1 32 ssa_81 = fmul ssa_65.w, ssa_5
>	vec1 32 ssa_82 = fmul ssa_3, ssa_67.z
>	vec1 32 ssa_83 = fmul ssa_81, ssa_67.x
>	vec1 32 ssa_84 = fmul ssa_79, ssa_30.x
>	vec1 32 ssa_85 = fmul ssa_84, ssa_12
>	vec1 32 ssa_86 = fadd ssa_85, ssa_30.x
>	vec1 32 ssa_87 = fmul ssa_79, ssa_30.y
>	vec1 32 ssa_88 = fmul ssa_87, ssa_14
>	vec1 32 ssa_89 = fadd ssa_88, ssa_30.y
>	vec1 32 ssa_90 = fmul ssa_80, ssa_30.z
>	vec1 32 ssa_91 = fadd ssa_90, ssa_30.z
>	vec1 32 ssa_92 = fadd ssa_80, ssa_29
>	vec1 32 ssa_93 = fmul ssa_92, ssa_28
>	vec1 32 ssa_94 = fmax ssa_93, ssa_0
>	vec1 32 ssa_95 = fmin ssa_94, ssa_23
>	vec1 32 ssa_96 = load_const (0x00000030 /* 0.000000 */)
>	vec4 32 ssa_97 = intrinsic load_ubo (ssa_69, ssa_96) ()
>	vec1 32 ssa_98 = fmul ssa_95, ssa_97.z
>	vec1 32 ssa_99 = load_const (0x000000d0 /* 0.000000 */)
>	vec4 32 ssa_100 = intrinsic load_ubo (ssa_38, ssa_99) ()
>	vec1 32 ssa_101 = fneg ssa_100.z
>	vec1 32 ssa_102 = fadd ssa_101, ssa_23
>	vec1 32 ssa_103 = fmul ssa_102, ssa_98
>	vec1 32 ssa_104 = fmul ssa_82, ssa_103
>	vec1 32 ssa_105 = intrinsic vulkan_resource_index (ssa_0) (0, 5) /* desc-set=0 */ /* binding=5 */
>	vec4 32 ssa_106 = intrinsic load_ubo (ssa_105, ssa_0) ()
>	vec1 32 ssa_107 = fmul ssa_106.y, ssa_27
>	vec1 32 ssa_108 = fneg ssa_107
>	vec1 32 ssa_109 = fneg ssa_106.z
>	vec1 32 ssa_110 = fmul ssa_106.z, ssa_26
>	vec1 32 ssa_111 = fneg ssa_110
>	vec1 32 ssa_112 = fadd ssa_111, ssa_23
>	vec1 32 ssa_113 = fmul ssa_112, ssa_25
>	vec1 32 ssa_114 = fmul ssa_113, ssa_104
>	vec1 32 ssa_115 = fadd ssa_114, ssa_23
>	vec1 32 ssa_116 = fmul ssa_65.x, ssa_115
>	vec1 32 ssa_117 = fmul ssa_65.y, ssa_115
>	vec1 32 ssa_118 = fmul ssa_65.z, ssa_115
>	vec1 32 ssa_119 = fadd ssa_106.z, ssa_24
>	vec1 32 ssa_120 = fmax ssa_119, ssa_0
>	vec1 32 ssa_121 = fmin ssa_120, ssa_23
>	vec1 32 ssa_122 = fmul ssa_121, ssa_22.x
>	vec1 32 ssa_123 = fmul ssa_121, ssa_22.y
>	vec1 32 ssa_124 = fneg ssa_106.x
>	vec1 32 ssa_125 = fadd ssa_122, ssa_109
>	vec1 32 ssa_126 = fadd ssa_123, ssa_108
>	vec1 32 ssa_127 = fadd ssa_21, ssa_124
>	vec1 32 ssa_128 = fmax ssa_125, ssa_20.x
>	vec1 32 ssa_129 = fmax ssa_126, ssa_20.y
>	vec1 32 ssa_130 = fmax ssa_127, ssa_20.z
>	vec1 32 ssa_131 = fmul ssa_128, ssa_104
>	vec1 32 ssa_132 = fadd ssa_131, ssa_106.z
>	vec1 32 ssa_133 = fmul ssa_130, ssa_104
>	vec1 32 ssa_134 = fadd ssa_133, ssa_106.x
>	vec1 32 ssa_135 = fmul ssa_129, ssa_104
>	vec1 32 ssa_136 = fadd ssa_135, ssa_107
>	vec1 32 ssa_137 = fsqrt ssa_132
>	vec1 32 ssa_138 = fsqrt ssa_136
>	intrinsic discard_if (ssa_73) ()
>	vec1 32 ssa_139 = deref_var &o0 (shader_out vec4) 
>	vec4 32 ssa_140 = vec4 ssa_116, ssa_117, ssa_118, ssa_83
>	intrinsic store_deref (ssa_139, ssa_140) (15) /* wrmask=xyzw */
>	vec1 32 ssa_141 = deref_var &o1 (shader_out vec4) 
>	vec4 32 ssa_142 = vec4 ssa_86, ssa_89, ssa_91, ssa_83
>	intrinsic store_deref (ssa_141, ssa_142) (15) /* wrmask=xyzw */
>	vec1 32 ssa_143 = deref_var &o2 (shader_out vec4) 
>	vec4 32 ssa_144 = vec4 ssa_137, ssa_138, ssa_134, ssa_83
>	intrinsic store_deref (ssa_143, ssa_144) (15) /* wrmask=xyzw */
>	vec1 32 ssa_145 = deref_var &o3 (shader_out vec4) 
>	intrinsic store_deref (ssa_145, ssa_19) (15) /* wrmask=xyzw */
>	/* succs: block_0 */
>	block block_0:
>}
>
>; ModuleID = 'mesa-shader'
>source_filename = "mesa-shader"
>target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
>target triple = "amdgcn-mesa-mesa3d"
>
>define amdgpu_ps void @main([0 x i8] addrspace(6)* inreg noalias dereferenceable(18446744073709551615), [0 x i8] addrspace(6)* inreg noalias dereferenceable(18446744073709551615), i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, i32, i32) {
>main_body:
>  %temp175 = alloca float, addrspace(5)
>  %temp174 = alloca float, addrspace(5)
>  %temp173 = alloca float, addrspace(5)
>  %temp172 = alloca float, addrspace(5)
>  %temp171 = alloca float, addrspace(5)
>  %temp170 = alloca float, addrspace(5)
>  %temp169 = alloca float, addrspace(5)
>  %temp168 = alloca float, addrspace(5)
>  %temp167 = alloca float, addrspace(5)
>  %temp166 = alloca float, addrspace(5)
>  %temp165 = alloca float, addrspace(5)
>  %temp164 = alloca float, addrspace(5)
>  %temp163 = alloca float, addrspace(5)
>  %temp162 = alloca float, addrspace(5)
>  %temp161 = alloca float, addrspace(5)
>  %temp160 = alloca float, addrspace(5)
>  %temp159 = alloca float, addrspace(5)
>  %temp158 = alloca float, addrspace(5)
>  %temp157 = alloca float, addrspace(5)
>  %temp156 = alloca float, addrspace(5)
>  %temp155 = alloca float, addrspace(5)
>  %temp154 = alloca float, addrspace(5)
>  %temp153 = alloca float, addrspace(5)
>  %temp152 = alloca float, addrspace(5)
>  %temp151 = alloca float, addrspace(5)
>  %temp150 = alloca float, addrspace(5)
>  %temp149 = alloca float, addrspace(5)
>  %temp148 = alloca float, addrspace(5)
>  %temp147 = alloca float, addrspace(5)
>  %temp146 = alloca float, addrspace(5)
>  %temp145 = alloca float, addrspace(5)
>  %temp144 = alloca float, addrspace(5)
>  %temp143 = alloca float, addrspace(5)
>  %temp142 = alloca float, addrspace(5)
>  %temp141 = alloca float, addrspace(5)
>  %temp140 = alloca float, addrspace(5)
>  %temp139 = alloca float, addrspace(5)
>  %temp138 = alloca float, addrspace(5)
>  %temp137 = alloca float, addrspace(5)
>  %temp136 = alloca float, addrspace(5)
>  %temp135 = alloca float, addrspace(5)
>  %temp134 = alloca float, addrspace(5)
>  %temp133 = alloca float, addrspace(5)
>  %temp132 = alloca float, addrspace(5)
>  %temp131 = alloca float, addrspace(5)
>  %temp130 = alloca float, addrspace(5)
>  %temp129 = alloca float, addrspace(5)
>  %temp128 = alloca float, addrspace(5)
>  %temp127 = alloca float, addrspace(5)
>  %temp126 = alloca float, addrspace(5)
>  %temp125 = alloca float, addrspace(5)
>  %temp124 = alloca float, addrspace(5)
>  %temp123 = alloca float, addrspace(5)
>  %temp122 = alloca float, addrspace(5)
>  %temp121 = alloca float, addrspace(5)
>  %temp120 = alloca float, addrspace(5)
>  %temp119 = alloca float, addrspace(5)
>  %temp118 = alloca float, addrspace(5)
>  %temp117 = alloca float, addrspace(5)
>  %temp116 = alloca float, addrspace(5)
>  %temp115 = alloca float, addrspace(5)
>  %temp114 = alloca float, addrspace(5)
>  %temp113 = alloca float, addrspace(5)
>  %temp112 = alloca float, addrspace(5)
>  %temp111 = alloca float, addrspace(5)
>  %temp110 = alloca float, addrspace(5)
>  %temp109 = alloca float, addrspace(5)
>  %temp108 = alloca float, addrspace(5)
>  %temp107 = alloca float, addrspace(5)
>  %temp106 = alloca float, addrspace(5)
>  %temp105 = alloca float, addrspace(5)
>  %temp104 = alloca float, addrspace(5)
>  %temp103 = alloca float, addrspace(5)
>  %temp102 = alloca float, addrspace(5)
>  %temp101 = alloca float, addrspace(5)
>  %temp100 = alloca float, addrspace(5)
>  %temp99 = alloca float, addrspace(5)
>  %temp98 = alloca float, addrspace(5)
>  %temp97 = alloca float, addrspace(5)
>  %temp96 = alloca float, addrspace(5)
>  %temp95 = alloca float, addrspace(5)
>  %temp94 = alloca float, addrspace(5)
>  %temp93 = alloca float, addrspace(5)
>  %temp92 = alloca float, addrspace(5)
>  %temp91 = alloca float, addrspace(5)
>  %temp90 = alloca float, addrspace(5)
>  %temp89 = alloca float, addrspace(5)
>  %temp88 = alloca float, addrspace(5)
>  %temp87 = alloca float, addrspace(5)
>  %temp86 = alloca float, addrspace(5)
>  %temp85 = alloca float, addrspace(5)
>  %temp84 = alloca float, addrspace(5)
>  %temp83 = alloca float, addrspace(5)
>  %temp82 = alloca float, addrspace(5)
>  %temp81 = alloca float, addrspace(5)
>  %temp80 = alloca float, addrspace(5)
>  %temp79 = alloca float, addrspace(5)
>  %temp78 = alloca float, addrspace(5)
>  %temp77 = alloca float, addrspace(5)
>  %temp76 = alloca float, addrspace(5)
>  %temp75 = alloca float, addrspace(5)
>  %temp74 = alloca float, addrspace(5)
>  %temp73 = alloca float, addrspace(5)
>  %temp72 = alloca float, addrspace(5)
>  %temp71 = alloca float, addrspace(5)
>  %temp70 = alloca float, addrspace(5)
>  %temp69 = alloca float, addrspace(5)
>  %temp68 = alloca float, addrspace(5)
>  %temp67 = alloca float, addrspace(5)
>  %temp66 = alloca float, addrspace(5)
>  %temp65 = alloca float, addrspace(5)
>  %temp64 = alloca float, addrspace(5)
>  %temp63 = alloca float, addrspace(5)
>  %temp62 = alloca float, addrspace(5)
>  %temp61 = alloca float, addrspace(5)
>  %temp60 = alloca float, addrspace(5)
>  %temp59 = alloca float, addrspace(5)
>  %temp58 = alloca float, addrspace(5)
>  %temp57 = alloca float, addrspace(5)
>  %temp56 = alloca float, addrspace(5)
>  %temp55 = alloca float, addrspace(5)
>  %temp54 = alloca float, addrspace(5)
>  %temp53 = alloca float, addrspace(5)
>  %temp52 = alloca float, addrspace(5)
>  %temp51 = alloca float, addrspace(5)
>  %temp50 = alloca float, addrspace(5)
>  %temp49 = alloca float, addrspace(5)
>  %temp48 = alloca float, addrspace(5)
>  %temp47 = alloca float, addrspace(5)
>  %temp46 = alloca float, addrspace(5)
>  %temp45 = alloca float, addrspace(5)
>  %temp44 = alloca float, addrspace(5)
>  %temp43 = alloca float, addrspace(5)
>  %temp42 = alloca float, addrspace(5)
>  %temp41 = alloca float, addrspace(5)
>  %temp40 = alloca float, addrspace(5)
>  %temp39 = alloca float, addrspace(5)
>  %temp38 = alloca float, addrspace(5)
>  %temp37 = alloca float, addrspace(5)
>  %temp36 = alloca float, addrspace(5)
>  %temp35 = alloca float, addrspace(5)
>  %temp34 = alloca float, addrspace(5)
>  %temp33 = alloca float, addrspace(5)
>  %temp32 = alloca float, addrspace(5)
>  %temp31 = alloca float, addrspace(5)
>  %temp30 = alloca float, addrspace(5)
>  %temp29 = alloca float, addrspace(5)
>  %temp28 = alloca float, addrspace(5)
>  %temp27 = alloca float, addrspace(5)
>  %temp26 = alloca float, addrspace(5)
>  %temp25 = alloca float, addrspace(5)
>  %temp24 = alloca float, addrspace(5)
>  %temp23 = alloca float, addrspace(5)
>  %temp22 = alloca float, addrspace(5)
>  %temp21 = alloca float, addrspace(5)
>  %temp20 = alloca float, addrspace(5)
>  %temp19 = alloca float, addrspace(5)
>  %temp18 = alloca float, addrspace(5)
>  %temp17 = alloca float, addrspace(5)
>  %temp16 = alloca float, addrspace(5)
>  %temp15 = alloca float, addrspace(5)
>  %temp14 = alloca float, addrspace(5)
>  %temp13 = alloca float, addrspace(5)
>  %temp12 = alloca float, addrspace(5)
>  %temp11 = alloca float, addrspace(5)
>  %temp10 = alloca float, addrspace(5)
>  %temp9 = alloca float, addrspace(5)
>  %temp8 = alloca float, addrspace(5)
>  %temp7 = alloca float, addrspace(5)
>  %temp6 = alloca float, addrspace(5)
>  %temp5 = alloca float, addrspace(5)
>  %temp4 = alloca float, addrspace(5)
>  %temp3 = alloca float, addrspace(5)
>  %temp2 = alloca float, addrspace(5)
>  %temp1 = alloca float, addrspace(5)
>  %temp = alloca float, addrspace(5)
>  %19 = alloca float, addrspace(5)
>  %20 = alloca float, addrspace(5)
>  %21 = alloca float, addrspace(5)
>  %22 = alloca float, addrspace(5)
>  %23 = alloca float, addrspace(5)
>  %24 = alloca float, addrspace(5)
>  %25 = alloca float, addrspace(5)
>  %26 = alloca float, addrspace(5)
>  %27 = alloca float, addrspace(5)
>  %28 = alloca float, addrspace(5)
>  %29 = alloca float, addrspace(5)
>  %30 = alloca float, addrspace(5)
>  %31 = alloca float, addrspace(5)
>  %32 = alloca float, addrspace(5)
>  %33 = alloca float, addrspace(5)
>  %34 = alloca float, addrspace(5)
>  %35 = call i8 addrspace(4)* @llvm.amdgcn.implicit.buffer.ptr() #1
>  %36 = bitcast i8 addrspace(4)* %35 to [0 x <4 x i32>] addrspace(4)*
>  %37 = fdiv float 1.000000e+00, %14, !fpmath !0
>  %38 = bitcast <2 x i32> %4 to <2 x float>
>  %39 = extractelement <2 x float> %38, i32 0
>  %40 = extractelement <2 x float> %38, i32 1
>  %41 = call float @llvm.amdgcn.interp.p1(float %39, i32 0, i32 0, i32 %2) #1
>  %42 = call float @llvm.amdgcn.interp.p2(float %41, float %40, i32 0, i32 0, i32 %2) #1
>  %43 = call float @llvm.amdgcn.interp.p1(float %39, i32 1, i32 0, i32 %2) #1
>  %44 = call float @llvm.amdgcn.interp.p2(float %43, float %40, i32 1, i32 0, i32 %2) #1
>  %45 = call float @llvm.amdgcn.interp.p1(float %39, i32 2, i32 0, i32 %2) #1
>  %46 = call float @llvm.amdgcn.interp.p2(float %45, float %40, i32 2, i32 0, i32 %2) #1
>  %47 = call float @llvm.amdgcn.interp.p1(float %39, i32 3, i32 0, i32 %2) #1
>  %48 = call float @llvm.amdgcn.interp.p2(float %47, float %40, i32 3, i32 0, i32 %2) #1
>  %49 = bitcast <2 x i32> %4 to <2 x float>
>  %50 = extractelement <2 x float> %49, i32 0
>  %51 = extractelement <2 x float> %49, i32 1
>  %52 = call float @llvm.amdgcn.interp.p1(float %50, i32 0, i32 1, i32 %2) #1
>  %53 = call float @llvm.amdgcn.interp.p2(float %52, float %51, i32 0, i32 1, i32 %2) #1
>  %54 = call float @llvm.amdgcn.interp.p1(float %50, i32 1, i32 1, i32 %2) #1
>  %55 = call float @llvm.amdgcn.interp.p2(float %54, float %51, i32 1, i32 1, i32 %2) #1
>  %56 = call float @llvm.amdgcn.interp.p1(float %50, i32 2, i32 1, i32 %2) #1
>  %57 = call float @llvm.amdgcn.interp.p2(float %56, float %51, i32 2, i32 1, i32 %2) #1
>  %58 = call float @llvm.amdgcn.interp.p1(float %50, i32 3, i32 1, i32 %2) #1
>  %59 = call float @llvm.amdgcn.interp.p2(float %58, float %51, i32 3, i32 1, i32 %2) #1
>  store float 0.000000e+00, float addrspace(5)* %34
>  store float undef, float addrspace(5)* %34
>  store float 0.000000e+00, float addrspace(5)* %33
>  store float undef, float addrspace(5)* %33
>  store float 0.000000e+00, float addrspace(5)* %32
>  store float undef, float addrspace(5)* %32
>  store float 0.000000e+00, float addrspace(5)* %31
>  store float undef, float addrspace(5)* %31
>  store float 0.000000e+00, float addrspace(5)* %30
>  store float undef, float addrspace(5)* %30
>  store float 0.000000e+00, float addrspace(5)* %29
>  store float undef, float addrspace(5)* %29
>  store float 0.000000e+00, float addrspace(5)* %28
>  store float undef, float addrspace(5)* %28
>  store float 0.000000e+00, float addrspace(5)* %27
>  store float undef, float addrspace(5)* %27
>  store float 0.000000e+00, float addrspace(5)* %26
>  store float undef, float addrspace(5)* %26
>  store float 0.000000e+00, float addrspace(5)* %25
>  store float undef, float addrspace(5)* %25
>  store float 0.000000e+00, float addrspace(5)* %24
>  store float undef, float addrspace(5)* %24
>  store float 0.000000e+00, float addrspace(5)* %23
>  store float undef, float addrspace(5)* %23
>  store float 0.000000e+00, float addrspace(5)* %22
>  store float undef, float addrspace(5)* %22
>  store float 0.000000e+00, float addrspace(5)* %21
>  store float undef, float addrspace(5)* %21
>  store float 0.000000e+00, float addrspace(5)* %20
>  store float undef, float addrspace(5)* %20
>  store float 0.000000e+00, float addrspace(5)* %19
>  store float undef, float addrspace(5)* %19
>  store float 0.000000e+00, float addrspace(5)* %temp
>  store float undef, float addrspace(5)* %temp
>  store float 0.000000e+00, float addrspace(5)* %temp1
>  store float undef, float addrspace(5)* %temp1
>  store float 0.000000e+00, float addrspace(5)* %temp2
>  store float undef, float addrspace(5)* %temp2
>  store float 0.000000e+00, float addrspace(5)* %temp3
>  store float undef, float addrspace(5)* %temp3
>  store float 0.000000e+00, float addrspace(5)* %temp4
>  store float undef, float addrspace(5)* %temp4
>  store float 0.000000e+00, float addrspace(5)* %temp5
>  store float undef, float addrspace(5)* %temp5
>  store float 0.000000e+00, float addrspace(5)* %temp6
>  store float undef, float addrspace(5)* %temp6
>  store float 0.000000e+00, float addrspace(5)* %temp7
>  store float undef, float addrspace(5)* %temp7
>  store float 0.000000e+00, float addrspace(5)* %temp8
>  store float undef, float addrspace(5)* %temp8
>  store float 0.000000e+00, float addrspace(5)* %temp9
>  store float undef, float addrspace(5)* %temp9
>  store float 0.000000e+00, float addrspace(5)* %temp10
>  store float undef, float addrspace(5)* %temp10
>  store float 0.000000e+00, float addrspace(5)* %temp11
>  store float undef, float addrspace(5)* %temp11
>  store float 0.000000e+00, float addrspace(5)* %temp12
>  store float undef, float addrspace(5)* %temp12
>  store float 0.000000e+00, float addrspace(5)* %temp13
>  store float undef, float addrspace(5)* %temp13
>  store float 0.000000e+00, float addrspace(5)* %temp14
>  store float undef, float addrspace(5)* %temp14
>  store float 0.000000e+00, float addrspace(5)* %temp15
>  store float undef, float addrspace(5)* %temp15
>  store float 0.000000e+00, float addrspace(5)* %temp16
>  store float undef, float addrspace(5)* %temp16
>  store float 0.000000e+00, float addrspace(5)* %temp17
>  store float undef, float addrspace(5)* %temp17
>  store float 0.000000e+00, float addrspace(5)* %temp18
>  store float undef, float addrspace(5)* %temp18
>  store float 0.000000e+00, float addrspace(5)* %temp19
>  store float undef, float addrspace(5)* %temp19
>  store float 0.000000e+00, float addrspace(5)* %temp20
>  store float undef, float addrspace(5)* %temp20
>  store float 0.000000e+00, float addrspace(5)* %temp21
>  store float undef, float addrspace(5)* %temp21
>  store float 0.000000e+00, float addrspace(5)* %temp22
>  store float undef, float addrspace(5)* %temp22
>  store float 0.000000e+00, float addrspace(5)* %temp23
>  store float undef, float addrspace(5)* %temp23
>  store float 0.000000e+00, float addrspace(5)* %temp24
>  store float undef, float addrspace(5)* %temp24
>  store float 0.000000e+00, float addrspace(5)* %temp25
>  store float undef, float addrspace(5)* %temp25
>  store float 0.000000e+00, float addrspace(5)* %temp26
>  store float undef, float addrspace(5)* %temp26
>  store float 0.000000e+00, float addrspace(5)* %temp27
>  store float undef, float addrspace(5)* %temp27
>  store float 0.000000e+00, float addrspace(5)* %temp28
>  store float undef, float addrspace(5)* %temp28
>  store float 0.000000e+00, float addrspace(5)* %temp29
>  store float undef, float addrspace(5)* %temp29
>  store float 0.000000e+00, float addrspace(5)* %temp30
>  store float undef, float addrspace(5)* %temp30
>  store float 0.000000e+00, float addrspace(5)* %temp31
>  store float undef, float addrspace(5)* %temp31
>  store float 0.000000e+00, float addrspace(5)* %temp32
>  store float undef, float addrspace(5)* %temp32
>  store float 0.000000e+00, float addrspace(5)* %temp33
>  store float undef, float addrspace(5)* %temp33
>  store float 0.000000e+00, float addrspace(5)* %temp34
>  store float undef, float addrspace(5)* %temp34
>  store float 0.000000e+00, float addrspace(5)* %temp35
>  store float undef, float addrspace(5)* %temp35
>  store float 0.000000e+00, float addrspace(5)* %temp36
>  store float undef, float addrspace(5)* %temp36
>  store float 0.000000e+00, float addrspace(5)* %temp37
>  store float undef, float addrspace(5)* %temp37
>  store float 0.000000e+00, float addrspace(5)* %temp38
>  store float undef, float addrspace(5)* %temp38
>  store float 0.000000e+00, float addrspace(5)* %temp39
>  store float undef, float addrspace(5)* %temp39
>  store float 0.000000e+00, float addrspace(5)* %temp40
>  store float undef, float addrspace(5)* %temp40
>  store float 0.000000e+00, float addrspace(5)* %temp41
>  store float undef, float addrspace(5)* %temp41
>  store float 0.000000e+00, float addrspace(5)* %temp42
>  store float undef, float addrspace(5)* %temp42
>  store float 0.000000e+00, float addrspace(5)* %temp43
>  store float undef, float addrspace(5)* %temp43
>  store float 0.000000e+00, float addrspace(5)* %temp44
>  store float undef, float addrspace(5)* %temp44
>  store float 0.000000e+00, float addrspace(5)* %temp45
>  store float undef, float addrspace(5)* %temp45
>  store float 0.000000e+00, float addrspace(5)* %temp46
>  store float undef, float addrspace(5)* %temp46
>  store float 0.000000e+00, float addrspace(5)* %temp47
>  store float undef, float addrspace(5)* %temp47
>  store float 0.000000e+00, float addrspace(5)* %temp48
>  store float undef, float addrspace(5)* %temp48
>  store float 0.000000e+00, float addrspace(5)* %temp49
>  store float undef, float addrspace(5)* %temp49
>  store float 0.000000e+00, float addrspace(5)* %temp50
>  store float undef, float addrspace(5)* %temp50
>  store float 0.000000e+00, float addrspace(5)* %temp51
>  store float undef, float addrspace(5)* %temp51
>  store float 0.000000e+00, float addrspace(5)* %temp52
>  store float undef, float addrspace(5)* %temp52
>  store float 0.000000e+00, float addrspace(5)* %temp53
>  store float undef, float addrspace(5)* %temp53
>  store float 0.000000e+00, float addrspace(5)* %temp54
>  store float undef, float addrspace(5)* %temp54
>  store float 0.000000e+00, float addrspace(5)* %temp55
>  store float undef, float addrspace(5)* %temp55
>  store float 0.000000e+00, float addrspace(5)* %temp56
>  store float undef, float addrspace(5)* %temp56
>  store float 0.000000e+00, float addrspace(5)* %temp57
>  store float undef, float addrspace(5)* %temp57
>  store float 0.000000e+00, float addrspace(5)* %temp58
>  store float undef, float addrspace(5)* %temp58
>  store float 0.000000e+00, float addrspace(5)* %temp59
>  store float undef, float addrspace(5)* %temp59
>  store float 0.000000e+00, float addrspace(5)* %temp60
>  store float undef, float addrspace(5)* %temp60
>  store float 0.000000e+00, float addrspace(5)* %temp61
>  store float undef, float addrspace(5)* %temp61
>  store float 0.000000e+00, float addrspace(5)* %temp62
>  store float undef, float addrspace(5)* %temp62
>  store float 0.000000e+00, float addrspace(5)* %temp63
>  store float undef, float addrspace(5)* %temp63
>  store float 0.000000e+00, float addrspace(5)* %temp64
>  store float undef, float addrspace(5)* %temp64
>  store float 0.000000e+00, float addrspace(5)* %temp65
>  store float undef, float addrspace(5)* %temp65
>  store float 0.000000e+00, float addrspace(5)* %temp66
>  store float undef, float addrspace(5)* %temp66
>  store float 0.000000e+00, float addrspace(5)* %temp67
>  store float undef, float addrspace(5)* %temp67
>  store float 0.000000e+00, float addrspace(5)* %temp68
>  store float undef, float addrspace(5)* %temp68
>  store float 0.000000e+00, float addrspace(5)* %temp69
>  store float undef, float addrspace(5)* %temp69
>  store float 0.000000e+00, float addrspace(5)* %temp70
>  store float undef, float addrspace(5)* %temp70
>  store float 0.000000e+00, float addrspace(5)* %temp71
>  store float undef, float addrspace(5)* %temp71
>  store float 0.000000e+00, float addrspace(5)* %temp72
>  store float undef, float addrspace(5)* %temp72
>  store float 0.000000e+00, float addrspace(5)* %temp73
>  store float undef, float addrspace(5)* %temp73
>  store float 0.000000e+00, float addrspace(5)* %temp74
>  store float undef, float addrspace(5)* %temp74
>  store float 0.000000e+00, float addrspace(5)* %temp75
>  store float undef, float addrspace(5)* %temp75
>  store float 0.000000e+00, float addrspace(5)* %temp76
>  store float undef, float addrspace(5)* %temp76
>  store float 0.000000e+00, float addrspace(5)* %temp77
>  store float undef, float addrspace(5)* %temp77
>  store float 0.000000e+00, float addrspace(5)* %temp78
>  store float undef, float addrspace(5)* %temp78
>  store float 0.000000e+00, float addrspace(5)* %temp79
>  store float undef, float addrspace(5)* %temp79
>  store float 0.000000e+00, float addrspace(5)* %temp80
>  store float undef, float addrspace(5)* %temp80
>  store float 0.000000e+00, float addrspace(5)* %temp81
>  store float undef, float addrspace(5)* %temp81
>  store float 0.000000e+00, float addrspace(5)* %temp82
>  store float undef, float addrspace(5)* %temp82
>  store float 0.000000e+00, float addrspace(5)* %temp83
>  store float undef, float addrspace(5)* %temp83
>  store float 0.000000e+00, float addrspace(5)* %temp84
>  store float undef, float addrspace(5)* %temp84
>  store float 0.000000e+00, float addrspace(5)* %temp85
>  store float undef, float addrspace(5)* %temp85
>  store float 0.000000e+00, float addrspace(5)* %temp86
>  store float undef, float addrspace(5)* %temp86
>  store float 0.000000e+00, float addrspace(5)* %temp87
>  store float undef, float addrspace(5)* %temp87
>  store float 0.000000e+00, float addrspace(5)* %temp88
>  store float undef, float addrspace(5)* %temp88
>  store float 0.000000e+00, float addrspace(5)* %temp89
>  store float undef, float addrspace(5)* %temp89
>  store float 0.000000e+00, float addrspace(5)* %temp90
>  store float undef, float addrspace(5)* %temp90
>  store float 0.000000e+00, float addrspace(5)* %temp91
>  store float undef, float addrspace(5)* %temp91
>  store float 0.000000e+00, float addrspace(5)* %temp92
>  store float undef, float addrspace(5)* %temp92
>  store float 0.000000e+00, float addrspace(5)* %temp93
>  store float undef, float addrspace(5)* %temp93
>  store float 0.000000e+00, float addrspace(5)* %temp94
>  store float undef, float addrspace(5)* %temp94
>  store float 0.000000e+00, float addrspace(5)* %temp95
>  store float undef, float addrspace(5)* %temp95
>  store float 0.000000e+00, float addrspace(5)* %temp96
>  store float undef, float addrspace(5)* %temp96
>  store float 0.000000e+00, float addrspace(5)* %temp97
>  store float undef, float addrspace(5)* %temp97
>  store float 0.000000e+00, float addrspace(5)* %temp98
>  store float undef, float addrspace(5)* %temp98
>  store float 0.000000e+00, float addrspace(5)* %temp99
>  store float undef, float addrspace(5)* %temp99
>  store float 0.000000e+00, float addrspace(5)* %temp100
>  store float undef, float addrspace(5)* %temp100
>  store float 0.000000e+00, float addrspace(5)* %temp101
>  store float undef, float addrspace(5)* %temp101
>  store float 0.000000e+00, float addrspace(5)* %temp102
>  store float undef, float addrspace(5)* %temp102
>  store float 0.000000e+00, float addrspace(5)* %temp103
>  store float undef, float addrspace(5)* %temp103
>  store float 0.000000e+00, float addrspace(5)* %temp104
>  store float undef, float addrspace(5)* %temp104
>  store float 0.000000e+00, float addrspace(5)* %temp105
>  store float undef, float addrspace(5)* %temp105
>  store float 0.000000e+00, float addrspace(5)* %temp106
>  store float undef, float addrspace(5)* %temp106
>  store float 0.000000e+00, float addrspace(5)* %temp107
>  store float undef, float addrspace(5)* %temp107
>  store float 0.000000e+00, float addrspace(5)* %temp108
>  store float undef, float addrspace(5)* %temp108
>  store float 0.000000e+00, float addrspace(5)* %temp109
>  store float undef, float addrspace(5)* %temp109
>  store float 0.000000e+00, float addrspace(5)* %temp110
>  store float undef, float addrspace(5)* %temp110
>  store float 0.000000e+00, float addrspace(5)* %temp111
>  store float undef, float addrspace(5)* %temp111
>  store float 0.000000e+00, float addrspace(5)* %temp112
>  store float undef, float addrspace(5)* %temp112
>  store float 0.000000e+00, float addrspace(5)* %temp113
>  store float undef, float addrspace(5)* %temp113
>  store float 0.000000e+00, float addrspace(5)* %temp114
>  store float undef, float addrspace(5)* %temp114
>  store float 0.000000e+00, float addrspace(5)* %temp115
>  store float undef, float addrspace(5)* %temp115
>  store float 0.000000e+00, float addrspace(5)* %temp116
>  store float undef, float addrspace(5)* %temp116
>  store float 0.000000e+00, float addrspace(5)* %temp117
>  store float undef, float addrspace(5)* %temp117
>  store float 0.000000e+00, float addrspace(5)* %temp118
>  store float undef, float addrspace(5)* %temp118
>  store float 0.000000e+00, float addrspace(5)* %temp119
>  store float undef, float addrspace(5)* %temp119
>  store float 0.000000e+00, float addrspace(5)* %temp120
>  store float undef, float addrspace(5)* %temp120
>  store float 0.000000e+00, float addrspace(5)* %temp121
>  store float undef, float addrspace(5)* %temp121
>  store float 0.000000e+00, float addrspace(5)* %temp122
>  store float undef, float addrspace(5)* %temp122
>  store float 0.000000e+00, float addrspace(5)* %temp123
>  store float undef, float addrspace(5)* %temp123
>  store float 0.000000e+00, float addrspace(5)* %temp124
>  store float undef, float addrspace(5)* %temp124
>  store float 0.000000e+00, float addrspace(5)* %temp125
>  store float undef, float addrspace(5)* %temp125
>  store float 0.000000e+00, float addrspace(5)* %temp126
>  store float undef, float addrspace(5)* %temp126
>  store float 0.000000e+00, float addrspace(5)* %temp127
>  store float undef, float addrspace(5)* %temp127
>  store float 0.000000e+00, float addrspace(5)* %temp128
>  store float undef, float addrspace(5)* %temp128
>  store float 0.000000e+00, float addrspace(5)* %temp129
>  store float undef, float addrspace(5)* %temp129
>  store float 0.000000e+00, float addrspace(5)* %temp130
>  store float undef, float addrspace(5)* %temp130
>  store float 0.000000e+00, float addrspace(5)* %temp131
>  store float undef, float addrspace(5)* %temp131
>  store float 0.000000e+00, float addrspace(5)* %temp132
>  store float undef, float addrspace(5)* %temp132
>  store float 0.000000e+00, float addrspace(5)* %temp133
>  store float undef, float addrspace(5)* %temp133
>  store float 0.000000e+00, float addrspace(5)* %temp134
>  store float undef, float addrspace(5)* %temp134
>  store float 0.000000e+00, float addrspace(5)* %temp135
>  store float undef, float addrspace(5)* %temp135
>  store float 0.000000e+00, float addrspace(5)* %temp136
>  store float undef, float addrspace(5)* %temp136
>  store float 0.000000e+00, float addrspace(5)* %temp137
>  store float undef, float addrspace(5)* %temp137
>  store float 0.000000e+00, float addrspace(5)* %temp138
>  store float undef, float addrspace(5)* %temp138
>  store float 0.000000e+00, float addrspace(5)* %temp139
>  store float undef, float addrspace(5)* %temp139
>  store float 0.000000e+00, float addrspace(5)* %temp140
>  store float undef, float addrspace(5)* %temp140
>  store float 0.000000e+00, float addrspace(5)* %temp141
>  store float undef, float addrspace(5)* %temp141
>  store float 0.000000e+00, float addrspace(5)* %temp142
>  store float undef, float addrspace(5)* %temp142
>  store float 0.000000e+00, float addrspace(5)* %temp143
>  store float undef, float addrspace(5)* %temp143
>  store float 0.000000e+00, float addrspace(5)* %temp144
>  store float undef, float addrspace(5)* %temp144
>  store float 0.000000e+00, float addrspace(5)* %temp145
>  store float undef, float addrspace(5)* %temp145
>  store float 0.000000e+00, float addrspace(5)* %temp146
>  store float undef, float addrspace(5)* %temp146
>  store float 0.000000e+00, float addrspace(5)* %temp147
>  store float undef, float addrspace(5)* %temp147
>  store float 0.000000e+00, float addrspace(5)* %temp148
>  store float undef, float addrspace(5)* %temp148
>  store float 0.000000e+00, float addrspace(5)* %temp149
>  store float undef, float addrspace(5)* %temp149
>  store float 0.000000e+00, float addrspace(5)* %temp150
>  store float undef, float addrspace(5)* %temp150
>  store float 0.000000e+00, float addrspace(5)* %temp151
>  store float undef, float addrspace(5)* %temp151
>  store float 0.000000e+00, float addrspace(5)* %temp152
>  store float undef, float addrspace(5)* %temp152
>  store float 0.000000e+00, float addrspace(5)* %temp153
>  store float undef, float addrspace(5)* %temp153
>  store float 0.000000e+00, float addrspace(5)* %temp154
>  store float undef, float addrspace(5)* %temp154
>  store float 0.000000e+00, float addrspace(5)* %temp155
>  store float undef, float addrspace(5)* %temp155
>  store float 0.000000e+00, float addrspace(5)* %temp156
>  store float undef, float addrspace(5)* %temp156
>  store float 0.000000e+00, float addrspace(5)* %temp157
>  store float undef, float addrspace(5)* %temp157
>  store float 0.000000e+00, float addrspace(5)* %temp158
>  store float undef, float addrspace(5)* %temp158
>  store float 0.000000e+00, float addrspace(5)* %temp159
>  store float undef, float addrspace(5)* %temp159
>  store float 0.000000e+00, float addrspace(5)* %temp160
>  store float undef, float addrspace(5)* %temp160
>  store float 0.000000e+00, float addrspace(5)* %temp161
>  store float undef, float addrspace(5)* %temp161
>  store float 0.000000e+00, float addrspace(5)* %temp162
>  store float undef, float addrspace(5)* %temp162
>  store float 0.000000e+00, float addrspace(5)* %temp163
>  store float undef, float addrspace(5)* %temp163
>  store float 0.000000e+00, float addrspace(5)* %temp164
>  store float undef, float addrspace(5)* %temp164
>  store float 0.000000e+00, float addrspace(5)* %temp165
>  store float undef, float addrspace(5)* %temp165
>  store float 0.000000e+00, float addrspace(5)* %temp166
>  store float undef, float addrspace(5)* %temp166
>  store float 0.000000e+00, float addrspace(5)* %temp167
>  store float undef, float addrspace(5)* %temp167
>  store float 0.000000e+00, float addrspace(5)* %temp168
>  store float undef, float addrspace(5)* %temp168
>  store float 0.000000e+00, float addrspace(5)* %temp169
>  store float undef, float addrspace(5)* %temp169
>  store float 0.000000e+00, float addrspace(5)* %temp170
>  store float undef, float addrspace(5)* %temp170
>  store float 0.000000e+00, float addrspace(5)* %temp171
>  store float undef, float addrspace(5)* %temp171
>  store float 0.000000e+00, float addrspace(5)* %temp172
>  store float undef, float addrspace(5)* %temp172
>  store float 0.000000e+00, float addrspace(5)* %temp173
>  store float undef, float addrspace(5)* %temp173
>  store float 0.000000e+00, float addrspace(5)* %temp174
>  store float undef, float addrspace(5)* %temp174
>  store float 0.000000e+00, float addrspace(5)* %temp175
>  store float undef, float addrspace(5)* %temp175
>  %60 = bitcast float %42 to i32
>  %61 = bitcast float %48 to i32
>  %62 = bitcast float %44 to i32
>  %63 = bitcast float %46 to i32
>  %64 = insertelement <2 x i32> undef, i32 %62, i32 0
>  %65 = insertelement <2 x i32> %64, i32 %63, i32 1
>  %66 = bitcast float %53 to i32
>  %67 = bitcast float %55 to i32
>  %68 = bitcast float %57 to i32
>  %69 = insertelement <4 x float> undef, float %11, i32 0
>  %70 = insertelement <4 x float> %69, float %12, i32 1
>  %71 = insertelement <4 x float> %70, float %13, i32 2
>  %72 = insertelement <4 x float> %71, float %37, i32 3
>  %73 = bitcast <4 x float> %72 to <4 x i32>
>  %74 = extractelement <4 x i32> %73, i32 0
>  %75 = bitcast i32 %74 to float
>  %76 = fptoui float %75 to i32
>  %77 = extractelement <4 x i32> %73, i32 1
>  %78 = bitcast i32 %77 to float
>  %79 = fptoui float %78 to i32
>  %80 = and i32 %76, 1
>  %81 = and i32 %79, 1
>  %82 = shl i32 %81, 1
>  %83 = add i32 %80, %82
>  %84 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %1, i32 0, i32 48
>  %85 = bitcast i8 addrspace(6)* %84 to <4 x i32> addrspace(6)*, !amdgpu.uniform !1
>  %86 = icmp slt i32 %83, 2
>  %87 = select i1 %86, i32 -1, i32 0
>  %88 = icmp slt i32 %83, 1
>  %89 = select i1 %88, i32 -1, i32 0
>  %90 = and i32 %89, 1065353216
>  %91 = icmp sge i32 %83, 1
>  %92 = select i1 %91, i32 -1, i32 0
>  %93 = and i32 %92, 1065353216
>  %94 = icmp slt i32 %83, 3
>  %95 = select i1 %94, i32 -1, i32 0
>  %96 = and i32 %95, 1065353216
>  %97 = icmp sge i32 %83, 3
>  %98 = select i1 %97, i32 -1, i32 0
>  %99 = and i32 %98, 1065353216
>  %100 = icmp ne i32 %87, 0
>  %101 = select i1 %100, i32 %90, i32 0
>  %102 = icmp ne i32 %87, 0
>  %103 = select i1 %102, i32 %93, i32 0
>  %104 = icmp ne i32 %87, 0
>  %105 = select i1 %104, i32 0, i32 %96
>  %106 = icmp ne i32 %87, 0
>  %107 = select i1 %106, i32 0, i32 %99
>  %108 = load <4 x i32>, <4 x i32> addrspace(6)* %85, !invariant.load !1
>  %109 = call float @llvm.SI.load.const.v4i32(<4 x i32> %108, i32 0)
>  %110 = call float @llvm.SI.load.const.v4i32(<4 x i32> %108, i32 4)
>  %111 = call float @llvm.SI.load.const.v4i32(<4 x i32> %108, i32 8)
>  %112 = call float @llvm.SI.load.const.v4i32(<4 x i32> %108, i32 12)
>  %113 = insertelement <4 x float> undef, float %109, i32 0
>  %114 = insertelement <4 x float> %113, float %110, i32 1
>  %115 = insertelement <4 x float> %114, float %111, i32 2
>  %116 = insertelement <4 x float> %115, float %112, i32 3
>  %117 = bitcast <4 x float> %116 to <4 x i32>
>  %118 = extractelement <4 x i32> %117, i32 0
>  %119 = bitcast i32 %118 to float
>  %120 = bitcast i32 %101 to float
>  %121 = fmul float %119, %120
>  %122 = bitcast float %121 to i32
>  %123 = extractelement <4 x i32> %117, i32 1
>  %124 = bitcast i32 %123 to float
>  %125 = bitcast i32 %103 to float
>  %126 = fmul float %124, %125
>  %127 = bitcast float %126 to i32
>  %128 = bitcast i32 %122 to float
>  %129 = bitcast i32 %127 to float
>  %130 = fadd float %128, %129
>  %131 = bitcast float %130 to i32
>  %132 = extractelement <4 x i32> %117, i32 2
>  %133 = bitcast i32 %132 to float
>  %134 = bitcast i32 %105 to float
>  %135 = fmul float %133, %134
>  %136 = bitcast float %135 to i32
>  %137 = bitcast i32 %131 to float
>  %138 = bitcast i32 %136 to float
>  %139 = fadd float %137, %138
>  %140 = bitcast float %139 to i32
>  %141 = extractelement <4 x i32> %117, i32 3
>  %142 = bitcast i32 %141 to float
>  %143 = bitcast i32 %107 to float
>  %144 = fmul float %142, %143
>  %145 = bitcast float %144 to i32
>  %146 = bitcast i32 %140 to float
>  %147 = bitcast i32 %145 to float
>  %148 = fadd float %146, %147
>  %149 = bitcast float %148 to i32
>  %150 = bitcast i32 %149 to float
>  %151 = fcmp olt float %150, 1.000000e+00
>  %152 = select i1 %151, i32 -1, i32 0
>  %153 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 32
>  %154 = bitcast i8 addrspace(6)* %153 to [0 x <8 x i32>] addrspace(6)*
>  %155 = getelementptr [0 x <8 x i32>], [0 x <8 x i32>] addrspace(6)* %154, i32 0, i32 0, !amdgpu.uniform !1
>  %156 = load <8 x i32>, <8 x i32> addrspace(6)* %155, !invariant.load !1
>  %157 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 0
>  %158 = bitcast i8 addrspace(6)* %157 to [0 x <4 x i32>] addrspace(6)*
>  %159 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(6)* %158, i32 0, i32 0, !amdgpu.uniform !1
>  %160 = load <4 x i32>, <4 x i32> addrspace(6)* %159, !invariant.load !1
>  %161 = extractelement <2 x i32> %65, i32 0
>  %162 = extractelement <2 x i32> %65, i32 1
>  %163 = bitcast i32 %161 to float
>  %164 = bitcast i32 %162 to float
>  %165 = call <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32(i32 15, float %163, float %164, <8 x i32> %156, <4 x i32> %160, i1 false, i32 0, i32 0) #1
>  %166 = bitcast <4 x float> %165 to <4 x i32>
>  %167 = load <4 x i32>, <4 x i32> addrspace(6)* %85, !invariant.load !1
>  %168 = call float @llvm.SI.load.const.v4i32(<4 x i32> %167, i32 192)
>  %169 = call float @llvm.SI.load.const.v4i32(<4 x i32> %167, i32 196)
>  %170 = call float @llvm.SI.load.const.v4i32(<4 x i32> %167, i32 200)
>  %171 = call float @llvm.SI.load.const.v4i32(<4 x i32> %167, i32 204)
>  %172 = insertelement <4 x float> undef, float %168, i32 0
>  %173 = insertelement <4 x float> %172, float %169, i32 1
>  %174 = insertelement <4 x float> %173, float %170, i32 2
>  %175 = insertelement <4 x float> %174, float %171, i32 3
>  %176 = bitcast <4 x float> %175 to <4 x i32>
>  %177 = extractelement <4 x i32> %166, i32 3
>  %178 = extractelement <4 x i32> %176, i32 0
>  %179 = bitcast i32 %177 to float
>  %180 = bitcast i32 %178 to float
>  %181 = fmul float %179, %180
>  %182 = bitcast float %181 to i32
>  %183 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %1, i32 0, i32 64
>  %184 = bitcast i8 addrspace(6)* %183 to <4 x i32> addrspace(6)*, !amdgpu.uniform !1
>  %185 = load <4 x i32>, <4 x i32> addrspace(6)* %184, !invariant.load !1
>  %186 = call float @llvm.SI.load.const.v4i32(<4 x i32> %185, i32 64)
>  %187 = call float @llvm.SI.load.const.v4i32(<4 x i32> %185, i32 68)
>  %188 = call float @llvm.SI.load.const.v4i32(<4 x i32> %185, i32 72)
>  %189 = call float @llvm.SI.load.const.v4i32(<4 x i32> %185, i32 76)
>  %190 = insertelement <4 x float> undef, float %186, i32 0
>  %191 = insertelement <4 x float> %190, float %187, i32 1
>  %192 = insertelement <4 x float> %191, float %188, i32 2
>  %193 = insertelement <4 x float> %192, float %189, i32 3
>  %194 = bitcast <4 x float> %193 to <4 x i32>
>  %195 = extractelement <4 x i32> %194, i32 0
>  %196 = bitcast i32 %195 to float
>  %197 = bitcast i32 %182 to float
>  %198 = fcmp oge float %196, %197
>  %199 = select i1 %198, i32 -1, i32 0
>  %200 = or i32 %152, %199
>  %201 = bitcast i32 %66 to float
>  %202 = bitcast i32 %66 to float
>  %203 = fmul float %201, %202
>  %204 = bitcast float %203 to i32
>  %205 = bitcast i32 %67 to float
>  %206 = bitcast i32 %67 to float
>  %207 = fmul float %205, %206
>  %208 = bitcast float %207 to i32
>  %209 = bitcast i32 %204 to float
>  %210 = bitcast i32 %208 to float
>  %211 = fadd float %209, %210
>  %212 = bitcast float %211 to i32
>  %213 = bitcast i32 %68 to float
>  %214 = bitcast i32 %68 to float
>  %215 = fmul float %213, %214
>  %216 = bitcast float %215 to i32
>  %217 = bitcast i32 %212 to float
>  %218 = bitcast i32 %216 to float
>  %219 = fadd float %217, %218
>  %220 = bitcast float %219 to i32
>  %221 = bitcast i32 %220 to float
>  %222 = call float @llvm.sqrt.f32(float %221) #1
>  %223 = fdiv float 1.000000e+00, %222, !fpmath !0
>  %224 = bitcast float %223 to i32
>  %225 = bitcast i32 %224 to float
>  %226 = bitcast i32 %68 to float
>  %227 = fmul float %225, %226
>  %228 = bitcast float %227 to i32
>  %229 = extractelement <4 x i32> %166, i32 3
>  %230 = bitcast i32 %229 to float
>  %231 = bitcast i32 %61 to float
>  %232 = fmul float %230, %231
>  %233 = bitcast float %232 to i32
>  %234 = extractelement <4 x i32> %176, i32 2
>  %235 = bitcast i32 %60 to float
>  %236 = bitcast i32 %234 to float
>  %237 = fmul float %235, %236
>  %238 = bitcast float %237 to i32
>  %239 = extractelement <4 x i32> %176, i32 0
>  %240 = bitcast i32 %233 to float
>  %241 = bitcast i32 %239 to float
>  %242 = fmul float %240, %241
>  %243 = bitcast float %242 to i32
>  %244 = bitcast i32 %224 to float
>  %245 = fmul float %244, 5.000000e-01
>  %246 = bitcast float %245 to i32
>  %247 = bitcast i32 %246 to float
>  %248 = bitcast i32 %66 to float
>  %249 = fmul float %247, %248
>  %250 = bitcast float %249 to i32
>  %251 = bitcast i32 %250 to float
>  %252 = fadd float %251, 5.000000e-01
>  %253 = bitcast float %252 to i32
>  %254 = bitcast i32 %224 to float
>  %255 = fmul float %254, 5.000000e-01
>  %256 = bitcast float %255 to i32
>  %257 = bitcast i32 %256 to float
>  %258 = bitcast i32 %67 to float
>  %259 = fmul float %257, %258
>  %260 = bitcast float %259 to i32
>  %261 = bitcast i32 %260 to float
>  %262 = fadd float %261, 5.000000e-01
>  %263 = bitcast float %262 to i32
>  %264 = bitcast i32 %228 to float
>  %265 = fmul float %264, 5.000000e-01
>  %266 = bitcast float %265 to i32
>  %267 = bitcast i32 %266 to float
>  %268 = fadd float %267, 5.000000e-01
>  %269 = bitcast float %268 to i32
>  %270 = bitcast i32 %228 to float
>  %271 = fadd float %270, 0xBFD6666660000000
>  %272 = bitcast float %271 to i32
>  %273 = bitcast i32 %272 to float
>  %274 = fmul float %273, 0x3FF89D89E0000000
>  %275 = bitcast float %274 to i32
>  %276 = bitcast i32 %275 to float
>  %277 = call float @llvm.maxnum.f32(float %276, float 0.000000e+00) #1
>  %278 = call float @llvm.canonicalize.f32(float %277) #1
>  %279 = bitcast float %278 to i32
>  %280 = bitcast i32 %279 to float
>  %281 = call float @llvm.minnum.f32(float %280, float 1.000000e+00) #1
>  %282 = call float @llvm.canonicalize.f32(float %281) #1
>  %283 = bitcast float %282 to i32
>  %284 = load <4 x i32>, <4 x i32> addrspace(6)* %184, !invariant.load !1
>  %285 = call float @llvm.SI.load.const.v4i32(<4 x i32> %284, i32 48)
>  %286 = call float @llvm.SI.load.const.v4i32(<4 x i32> %284, i32 52)
>  %287 = call float @llvm.SI.load.const.v4i32(<4 x i32> %284, i32 56)
>  %288 = call float @llvm.SI.load.const.v4i32(<4 x i32> %284, i32 60)
>  %289 = insertelement <4 x float> undef, float %285, i32 0
>  %290 = insertelement <4 x float> %289, float %286, i32 1
>  %291 = insertelement <4 x float> %290, float %287, i32 2
>  %292 = insertelement <4 x float> %291, float %288, i32 3
>  %293 = bitcast <4 x float> %292 to <4 x i32>
>  %294 = extractelement <4 x i32> %293, i32 2
>  %295 = bitcast i32 %283 to float
>  %296 = bitcast i32 %294 to float
>  %297 = fmul float %295, %296
>  %298 = bitcast float %297 to i32
>  %299 = load <4 x i32>, <4 x i32> addrspace(6)* %85, !invariant.load !1
>  %300 = call float @llvm.SI.load.const.v4i32(<4 x i32> %299, i32 208)
>  %301 = call float @llvm.SI.load.const.v4i32(<4 x i32> %299, i32 212)
>  %302 = call float @llvm.SI.load.const.v4i32(<4 x i32> %299, i32 216)
>  %303 = call float @llvm.SI.load.const.v4i32(<4 x i32> %299, i32 220)
>  %304 = insertelement <4 x float> undef, float %300, i32 0
>  %305 = insertelement <4 x float> %304, float %301, i32 1
>  %306 = insertelement <4 x float> %305, float %302, i32 2
>  %307 = insertelement <4 x float> %306, float %303, i32 3
>  %308 = bitcast <4 x float> %307 to <4 x i32>
>  %309 = extractelement <4 x i32> %308, i32 2
>  %310 = bitcast i32 %309 to float
>  %311 = fsub float -0.000000e+00, %310
>  %312 = bitcast float %311 to i32
>  %313 = bitcast i32 %312 to float
>  %314 = fadd float %313, 1.000000e+00
>  %315 = bitcast float %314 to i32
>  %316 = bitcast i32 %315 to float
>  %317 = bitcast i32 %298 to float
>  %318 = fmul float %316, %317
>  %319 = bitcast float %318 to i32
>  %320 = bitcast i32 %238 to float
>  %321 = bitcast i32 %319 to float
>  %322 = fmul float %320, %321
>  %323 = bitcast float %322 to i32
>  %324 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %1, i32 0, i32 80
>  %325 = bitcast i8 addrspace(6)* %324 to <4 x i32> addrspace(6)*, !amdgpu.uniform !1
>  %326 = load <4 x i32>, <4 x i32> addrspace(6)* %325, !invariant.load !1
>  %327 = call float @llvm.SI.load.const.v4i32(<4 x i32> %326, i32 0)
>  %328 = call float @llvm.SI.load.const.v4i32(<4 x i32> %326, i32 4)
>  %329 = call float @llvm.SI.load.const.v4i32(<4 x i32> %326, i32 8)
>  %330 = call float @llvm.SI.load.const.v4i32(<4 x i32> %326, i32 12)
>  %331 = insertelement <4 x float> undef, float %327, i32 0
>  %332 = insertelement <4 x float> %331, float %328, i32 1
>  %333 = insertelement <4 x float> %332, float %329, i32 2
>  %334 = insertelement <4 x float> %333, float %330, i32 3
>  %335 = bitcast <4 x float> %334 to <4 x i32>
>  %336 = extractelement <4 x i32> %335, i32 1
>  %337 = bitcast i32 %336 to float
>  %338 = fmul float %337, 0x3F60000000000000
>  %339 = bitcast float %338 to i32
>  %340 = bitcast i32 %339 to float
>  %341 = fsub float -0.000000e+00, %340
>  %342 = bitcast float %341 to i32
>  %343 = extractelement <4 x i32> %335, i32 2
>  %344 = bitcast i32 %343 to float
>  %345 = fsub float -0.000000e+00, %344
>  %346 = bitcast float %345 to i32
>  %347 = extractelement <4 x i32> %335, i32 2
>  %348 = bitcast i32 %347 to float
>  %349 = fmul float %348, 5.000000e-01
>  %350 = bitcast float %349 to i32
>  %351 = bitcast i32 %350 to float
>  %352 = fsub float -0.000000e+00, %351
>  %353 = bitcast float %352 to i32
>  %354 = bitcast i32 %353 to float
>  %355 = fadd float %354, 1.000000e+00
>  %356 = bitcast float %355 to i32
>  %357 = bitcast i32 %356 to float
>  %358 = fmul float %357, -5.000000e-01
>  %359 = bitcast float %358 to i32
>  %360 = bitcast i32 %359 to float
>  %361 = bitcast i32 %323 to float
>  %362 = fmul float %360, %361
>  %363 = bitcast float %362 to i32
>  %364 = bitcast i32 %363 to float
>  %365 = fadd float %364, 1.000000e+00
>  %366 = bitcast float %365 to i32
>  %367 = extractelement <4 x i32> %166, i32 0
>  %368 = bitcast i32 %367 to float
>  %369 = bitcast i32 %366 to float
>  %370 = fmul float %368, %369
>  %371 = bitcast float %370 to i32
>  %372 = extractelement <4 x i32> %166, i32 1
>  %373 = bitcast i32 %372 to float
>  %374 = bitcast i32 %366 to float
>  %375 = fmul float %373, %374
>  %376 = bitcast float %375 to i32
>  %377 = extractelement <4 x i32> %166, i32 2
>  %378 = bitcast i32 %377 to float
>  %379 = bitcast i32 %366 to float
>  %380 = fmul float %378, %379
>  %381 = bitcast float %380 to i32
>  %382 = extractelement <4 x i32> %335, i32 2
>  %383 = bitcast i32 %382 to float
>  %384 = fadd float %383, 0x3FE6666660000000
>  %385 = bitcast float %384 to i32
>  %386 = bitcast i32 %385 to float
>  %387 = call float @llvm.maxnum.f32(float %386, float 0.000000e+00) #1
>  %388 = call float @llvm.canonicalize.f32(float %387) #1
>  %389 = bitcast float %388 to i32
>  %390 = bitcast i32 %389 to float
>  %391 = call float @llvm.minnum.f32(float %390, float 1.000000e+00) #1
>  %392 = call float @llvm.canonicalize.f32(float %391) #1
>  %393 = bitcast float %392 to i32
>  %394 = bitcast i32 %393 to float
>  %395 = fmul float %394, 5.000000e-01
>  %396 = bitcast float %395 to i32
>  %397 = bitcast i32 %393 to float
>  %398 = fmul float %397, 0x3FDF400000000000
>  %399 = bitcast float %398 to i32
>  %400 = extractelement <4 x i32> %335, i32 0
>  %401 = bitcast i32 %400 to float
>  %402 = fsub float -0.000000e+00, %401
>  %403 = bitcast float %402 to i32
>  %404 = bitcast i32 %396 to float
>  %405 = bitcast i32 %346 to float
>  %406 = fadd float %404, %405
>  %407 = bitcast float %406 to i32
>  %408 = bitcast i32 %399 to float
>  %409 = bitcast i32 %342 to float
>  %410 = fadd float %408, %409
>  %411 = bitcast float %410 to i32
>  %412 = bitcast i32 %403 to float
>  %413 = fadd float 0x3FEF0A3D80000000, %412
>  %414 = bitcast float %413 to i32
>  %415 = bitcast i32 %407 to float
>  %416 = call float @llvm.maxnum.f32(float %415, float 0.000000e+00) #1
>  %417 = call float @llvm.canonicalize.f32(float %416) #1
>  %418 = bitcast float %417 to i32
>  %419 = bitcast i32 %411 to float
>  %420 = call float @llvm.maxnum.f32(float %419, float 0.000000e+00) #1
>  %421 = call float @llvm.canonicalize.f32(float %420) #1
>  %422 = bitcast float %421 to i32
>  %423 = bitcast i32 %414 to float
>  %424 = call float @llvm.maxnum.f32(float %423, float 0.000000e+00) #1
>  %425 = call float @llvm.canonicalize.f32(float %424) #1
>  %426 = bitcast float %425 to i32
>  %427 = bitcast i32 %418 to float
>  %428 = bitcast i32 %323 to float
>  %429 = fmul float %427, %428
>  %430 = bitcast float %429 to i32
>  %431 = extractelement <4 x i32> %335, i32 2
>  %432 = bitcast i32 %430 to float
>  %433 = bitcast i32 %431 to float
>  %434 = fadd float %432, %433
>  %435 = bitcast float %434 to i32
>  %436 = bitcast i32 %426 to float
>  %437 = bitcast i32 %323 to float
>  %438 = fmul float %436, %437
>  %439 = bitcast float %438 to i32
>  %440 = extractelement <4 x i32> %335, i32 0
>  %441 = bitcast i32 %439 to float
>  %442 = bitcast i32 %440 to float
>  %443 = fadd float %441, %442
>  %444 = bitcast float %443 to i32
>  %445 = bitcast i32 %422 to float
>  %446 = bitcast i32 %323 to float
>  %447 = fmul float %445, %446
>  %448 = bitcast float %447 to i32
>  %449 = bitcast i32 %448 to float
>  %450 = bitcast i32 %339 to float
>  %451 = fadd float %449, %450
>  %452 = bitcast float %451 to i32
>  %453 = bitcast i32 %435 to float
>  %454 = call float @llvm.sqrt.f32(float %453) #1
>  %455 = bitcast float %454 to i32
>  %456 = bitcast i32 %452 to float
>  %457 = call float @llvm.sqrt.f32(float %456) #1
>  %458 = bitcast float %457 to i32
>  %459 = icmp eq i32 %200, 0
>  call void @llvm.amdgcn.kill(i1 %459) #3
>  %460 = insertelement <4 x i32> undef, i32 %371, i32 0
>  %461 = insertelement <4 x i32> %460, i32 %376, i32 1
>  %462 = insertelement <4 x i32> %461, i32 %381, i32 2
>  %463 = insertelement <4 x i32> %462, i32 %243, i32 3
>  %464 = bitcast <4 x i32> %463 to <4 x float>
>  %465 = extractelement <4 x float> %464, i32 0
>  store float %465, float addrspace(5)* %34
>  %466 = extractelement <4 x float> %464, i32 1
>  store float %466, float addrspace(5)* %33
>  %467 = extractelement <4 x float> %464, i32 2
>  store float %467, float addrspace(5)* %32
>  %468 = extractelement <4 x float> %464, i32 3
>  store float %468, float addrspace(5)* %31
>  %469 = insertelement <4 x i32> undef, i32 %253, i32 0
>  %470 = insertelement <4 x i32> %469, i32 %263, i32 1
>  %471 = insertelement <4 x i32> %470, i32 %269, i32 2
>  %472 = insertelement <4 x i32> %471, i32 %243, i32 3
>  %473 = bitcast <4 x i32> %472 to <4 x float>
>  %474 = extractelement <4 x float> %473, i32 0
>  store float %474, float addrspace(5)* %30
>  %475 = extractelement <4 x float> %473, i32 1
>  store float %475, float addrspace(5)* %29
>  %476 = extractelement <4 x float> %473, i32 2
>  store float %476, float addrspace(5)* %28
>  %477 = extractelement <4 x float> %473, i32 3
>  store float %477, float addrspace(5)* %27
>  %478 = insertelement <4 x i32> undef, i32 %455, i32 0
>  %479 = insertelement <4 x i32> %478, i32 %458, i32 1
>  %480 = insertelement <4 x i32> %479, i32 %444, i32 2
>  %481 = insertelement <4 x i32> %480, i32 %243, i32 3
>  %482 = bitcast <4 x i32> %481 to <4 x float>
>  %483 = extractelement <4 x float> %482, i32 0
>  store float %483, float addrspace(5)* %26
>  %484 = extractelement <4 x float> %482, i32 1
>  store float %484, float addrspace(5)* %25
>  %485 = extractelement <4 x float> %482, i32 2
>  store float %485, float addrspace(5)* %24
>  %486 = extractelement <4 x float> %482, i32 3
>  store float %486, float addrspace(5)* %23
>  store float 0.000000e+00, float addrspace(5)* %22
>  store float 0.000000e+00, float addrspace(5)* %21
>  store float 0.000000e+00, float addrspace(5)* %20
>  store float 0.000000e+00, float addrspace(5)* %19
>  %487 = load float, float addrspace(5)* %34
>  %488 = load float, float addrspace(5)* %33
>  %489 = load float, float addrspace(5)* %32
>  %490 = load float, float addrspace(5)* %31
>  %491 = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %487, float %488) #1
>  %492 = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %489, float %490) #1
>  %493 = load float, float addrspace(5)* %30
>  %494 = load float, float addrspace(5)* %29
>  %495 = load float, float addrspace(5)* %28
>  %496 = load float, float addrspace(5)* %27
>  %497 = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %493, float %494) #1
>  %498 = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %495, float %496) #1
>  %499 = load float, float addrspace(5)* %26
>  %500 = load float, float addrspace(5)* %25
>  %501 = load float, float addrspace(5)* %24
>  %502 = load float, float addrspace(5)* %23
>  %503 = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %499, float %500) #1
>  %504 = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %501, float %502) #1
>  %505 = load float, float addrspace(5)* %22
>  %506 = load float, float addrspace(5)* %21
>  %507 = load float, float addrspace(5)* %20
>  %508 = load float, float addrspace(5)* %19
>  %509 = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %505, float %506) #1
>  %510 = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %507, float %508) #1
>  %511 = bitcast <2 x half> %491 to <2 x i16>
>  %512 = bitcast <2 x half> %492 to <2 x i16>
>  call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 5, <2 x i16> %511, <2 x i16> %512, i1 false, i1 false) #3
>  %513 = bitcast <2 x half> %497 to <2 x i16>
>  %514 = bitcast <2 x half> %498 to <2 x i16>
>  call void @llvm.amdgcn.exp.compr.v2i16(i32 1, i32 5, <2 x i16> %513, <2 x i16> %514, i1 false, i1 false) #3
>  %515 = bitcast <2 x half> %503 to <2 x i16>
>  %516 = bitcast <2 x half> %504 to <2 x i16>
>  call void @llvm.amdgcn.exp.compr.v2i16(i32 2, i32 5, <2 x i16> %515, <2 x i16> %516, i1 false, i1 false) #3
>  %517 = bitcast <2 x half> %509 to <2 x i16>
>  %518 = bitcast <2 x half> %510 to <2 x i16>
>  call void @llvm.amdgcn.exp.compr.v2i16(i32 3, i32 5, <2 x i16> %517, <2 x i16> %518, i1 true, i1 true) #3
>  ret void
>}
>
>; Function Attrs: nounwind readnone speculatable
>declare i8 addrspace(4)* @llvm.amdgcn.implicit.buffer.ptr() #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.amdgcn.interp.p1(float, i32, i32, i32) #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.amdgcn.interp.p2(float, float, i32, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const.v4i32(<4 x i32>, i32) #1
>
>; Function Attrs: nounwind readonly
>declare <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #2
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.sqrt.f32(float) #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.maxnum.f32(float, float) #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.canonicalize.f32(float) #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.minnum.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.amdgcn.kill(i1) #3
>
>; Function Attrs: nounwind readnone speculatable
>declare <2 x half> @llvm.amdgcn.cvt.pkrtz(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.amdgcn.exp.compr.v2i16(i32, i32, <2 x i16>, <2 x i16>, i1, i1) #3
>
>attributes #0 = { nounwind readnone speculatable }
>attributes #1 = { nounwind readnone }
>attributes #2 = { nounwind readonly }
>attributes #3 = { nounwind }
>
>!0 = !{float 2.500000e+00}
>!1 = !{}
>; ModuleID = 'mesa-shader'
>source_filename = "mesa-shader"
>target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
>target triple = "amdgcn-mesa-mesa3d"
>
>define amdgpu_ps void @main([0 x i8] addrspace(6)* inreg noalias dereferenceable(18446744073709551615), [0 x i8] addrspace(6)* inreg noalias dereferenceable(18446744073709551615), i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, i32, i32) {
>main_body:
>  %19 = bitcast <2 x i32> %4 to <2 x float>
>  %20 = extractelement <2 x float> %19, i32 0
>  %21 = extractelement <2 x float> %19, i32 1
>  %22 = call float @llvm.amdgcn.interp.p1(float %20, i32 0, i32 0, i32 %2) #1
>  %23 = call float @llvm.amdgcn.interp.p2(float %22, float %21, i32 0, i32 0, i32 %2) #1
>  %24 = call float @llvm.amdgcn.interp.p1(float %20, i32 1, i32 0, i32 %2) #1
>  %25 = call float @llvm.amdgcn.interp.p2(float %24, float %21, i32 1, i32 0, i32 %2) #1
>  %26 = call float @llvm.amdgcn.interp.p1(float %20, i32 2, i32 0, i32 %2) #1
>  %27 = call float @llvm.amdgcn.interp.p2(float %26, float %21, i32 2, i32 0, i32 %2) #1
>  %28 = call float @llvm.amdgcn.interp.p1(float %20, i32 3, i32 0, i32 %2) #1
>  %29 = call float @llvm.amdgcn.interp.p2(float %28, float %21, i32 3, i32 0, i32 %2) #1
>  %30 = call float @llvm.amdgcn.interp.p1(float %20, i32 0, i32 1, i32 %2) #1
>  %31 = call float @llvm.amdgcn.interp.p2(float %30, float %21, i32 0, i32 1, i32 %2) #1
>  %32 = call float @llvm.amdgcn.interp.p1(float %20, i32 1, i32 1, i32 %2) #1
>  %33 = call float @llvm.amdgcn.interp.p2(float %32, float %21, i32 1, i32 1, i32 %2) #1
>  %34 = call float @llvm.amdgcn.interp.p1(float %20, i32 2, i32 1, i32 %2) #1
>  %35 = call float @llvm.amdgcn.interp.p2(float %34, float %21, i32 2, i32 1, i32 %2) #1
>  %36 = fptoui float %11 to i32
>  %37 = fptoui float %12 to i32
>  %38 = and i32 %36, 1
>  %39 = shl i32 %37, 1
>  %40 = and i32 %39, 2
>  %41 = or i32 %38, %40
>  %42 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %1, i32 0, i32 48
>  %43 = bitcast i8 addrspace(6)* %42 to <4 x i32> addrspace(6)*, !amdgpu.uniform !0
>  %44 = icmp ult i32 %41, 2
>  %45 = icmp eq i32 %41, 0
>  %46 = icmp eq i32 %41, 0
>  %47 = select i1 %46, i32 0, i32 1065353216
>  %48 = icmp eq i32 %41, 3
>  %49 = icmp eq i32 %41, 3
>  %50 = select i1 %49, i32 1065353216, i32 0
>  %51 = select i1 %45, i32 1065353216, i32 0
>  %52 = select i1 %44, i32 %47, i32 0
>  %53 = or i1 %44, %48
>  %54 = select i1 %44, i32 0, i32 %50
>  %55 = load <4 x i32>, <4 x i32> addrspace(6)* %43, align 16, !invariant.load !0
>  %56 = call float @llvm.SI.load.const.v4i32(<4 x i32> %55, i32 0)
>  %57 = call float @llvm.SI.load.const.v4i32(<4 x i32> %55, i32 4)
>  %58 = call float @llvm.SI.load.const.v4i32(<4 x i32> %55, i32 8)
>  %59 = call float @llvm.SI.load.const.v4i32(<4 x i32> %55, i32 12)
>  %60 = bitcast i32 %51 to float
>  %61 = fmul float %56, %60
>  %62 = bitcast i32 %52 to float
>  %63 = fmul float %57, %62
>  %64 = fadd float %61, %63
>  %65 = select i1 %53, float 0.000000e+00, float 1.000000e+00
>  %66 = fmul float %58, %65
>  %67 = fadd float %64, %66
>  %68 = bitcast i32 %54 to float
>  %69 = fmul float %59, %68
>  %70 = fadd float %67, %69
>  %71 = fcmp uge float %70, 1.000000e+00
>  %72 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 32
>  %73 = bitcast i8 addrspace(6)* %72 to <8 x i32> addrspace(6)*
>  %74 = load <8 x i32>, <8 x i32> addrspace(6)* %73, align 32, !invariant.load !0
>  %75 = bitcast [0 x i8] addrspace(6)* %0 to <4 x i32> addrspace(6)*
>  %76 = load <4 x i32>, <4 x i32> addrspace(6)* %75, align 16, !invariant.load !0
>  %77 = call <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32(i32 15, float %25, float %27, <8 x i32> %74, <4 x i32> %76, i1 false, i32 0, i32 0) #1
>  %78 = call float @llvm.SI.load.const.v4i32(<4 x i32> %55, i32 192)
>  %79 = call float @llvm.SI.load.const.v4i32(<4 x i32> %55, i32 200)
>  %80 = extractelement <4 x float> %77, i32 3
>  %81 = fmul float %80, %78
>  %82 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %1, i32 0, i32 64
>  %83 = bitcast i8 addrspace(6)* %82 to <4 x i32> addrspace(6)*, !amdgpu.uniform !0
>  %84 = load <4 x i32>, <4 x i32> addrspace(6)* %83, align 16, !invariant.load !0
>  %85 = call float @llvm.SI.load.const.v4i32(<4 x i32> %84, i32 64)
>  %86 = fcmp ult float %85, %81
>  %87 = fmul float %31, %31
>  %88 = fmul float %33, %33
>  %89 = fadd float %87, %88
>  %90 = fmul float %35, %35
>  %91 = fadd float %89, %90
>  %92 = call float @llvm.sqrt.f32(float %91) #1
>  %93 = fdiv float 1.000000e+00, %92, !fpmath !1
>  %94 = fmul float %93, %35
>  %95 = fmul float %80, %29
>  %96 = fmul float %23, %79
>  %97 = fmul float %95, %78
>  %98 = fmul float %93, 5.000000e-01
>  %99 = fmul float %98, %31
>  %100 = fadd float %99, 5.000000e-01
>  %101 = fmul float %98, %33
>  %102 = fadd float %101, 5.000000e-01
>  %103 = fmul float %94, 5.000000e-01
>  %104 = fadd float %103, 5.000000e-01
>  %105 = fadd float %94, 0xBFD6666660000000
>  %106 = fmul float %105, 0x3FF89D89E0000000
>  %107 = call float @llvm.maxnum.f32(float %106, float 0.000000e+00) #1
>  %108 = call float @llvm.canonicalize.f32(float %107) #1
>  %109 = call float @llvm.minnum.f32(float %108, float 1.000000e+00) #1
>  %110 = call float @llvm.canonicalize.f32(float %109) #1
>  %111 = call float @llvm.SI.load.const.v4i32(<4 x i32> %84, i32 56)
>  %112 = fmul float %110, %111
>  %113 = call float @llvm.SI.load.const.v4i32(<4 x i32> %55, i32 216)
>  %114 = fsub float 1.000000e+00, %113
>  %115 = fmul float %114, %112
>  %116 = fmul float %96, %115
>  %117 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %1, i32 0, i32 80
>  %118 = bitcast i8 addrspace(6)* %117 to <4 x i32> addrspace(6)*, !amdgpu.uniform !0
>  %119 = load <4 x i32>, <4 x i32> addrspace(6)* %118, align 16, !invariant.load !0
>  %120 = call float @llvm.SI.load.const.v4i32(<4 x i32> %119, i32 0)
>  %121 = call float @llvm.SI.load.const.v4i32(<4 x i32> %119, i32 4)
>  %122 = call float @llvm.SI.load.const.v4i32(<4 x i32> %119, i32 8)
>  %123 = fmul float %121, 0x3F60000000000000
>  %124 = fmul float %122, -5.000000e-01
>  %125 = fadd float %124, 1.000000e+00
>  %126 = fmul float %125, -5.000000e-01
>  %127 = fmul float %126, %116
>  %128 = fadd float %127, 1.000000e+00
>  %129 = extractelement <4 x float> %77, i32 0
>  %130 = fmul float %129, %128
>  %131 = extractelement <4 x float> %77, i32 1
>  %132 = fmul float %131, %128
>  %133 = extractelement <4 x float> %77, i32 2
>  %134 = fmul float %133, %128
>  %135 = fadd float %122, 0x3FE6666660000000
>  %136 = call float @llvm.maxnum.f32(float %135, float 0.000000e+00) #1
>  %137 = call float @llvm.canonicalize.f32(float %136) #1
>  %138 = call float @llvm.minnum.f32(float %137, float 1.000000e+00) #1
>  %139 = call float @llvm.canonicalize.f32(float %138) #1
>  %140 = fmul float %139, 5.000000e-01
>  %141 = fmul float %139, 0x3FDF400000000000
>  %142 = fsub float %140, %122
>  %143 = fsub float %141, %123
>  %144 = fsub float 0x3FEF0A3D80000000, %120
>  %145 = call float @llvm.maxnum.f32(float %142, float 0.000000e+00) #1
>  %146 = call float @llvm.canonicalize.f32(float %145) #1
>  %147 = call float @llvm.maxnum.f32(float %143, float 0.000000e+00) #1
>  %148 = call float @llvm.canonicalize.f32(float %147) #1
>  %149 = call float @llvm.maxnum.f32(float %144, float 0.000000e+00) #1
>  %150 = call float @llvm.canonicalize.f32(float %149) #1
>  %151 = fmul float %146, %116
>  %152 = fadd float %151, %122
>  %153 = fmul float %150, %116
>  %154 = fadd float %153, %120
>  %155 = fmul float %148, %116
>  %156 = fadd float %155, %123
>  %157 = call float @llvm.sqrt.f32(float %152) #1
>  %158 = call float @llvm.sqrt.f32(float %156) #1
>  %159 = and i1 %86, %71
>  call void @llvm.amdgcn.kill(i1 %159) #3
>  %160 = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %130, float %132) #1
>  %161 = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %134, float %97) #1
>  %162 = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %100, float %102) #1
>  %163 = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %104, float %97) #1
>  %164 = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %157, float %158) #1
>  %165 = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %154, float %97) #1
>  %166 = bitcast <2 x half> %160 to <2 x i16>
>  %167 = bitcast <2 x half> %161 to <2 x i16>
>  call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 5, <2 x i16> %166, <2 x i16> %167, i1 false, i1 false) #3
>  %168 = bitcast <2 x half> %162 to <2 x i16>
>  %169 = bitcast <2 x half> %163 to <2 x i16>
>  call void @llvm.amdgcn.exp.compr.v2i16(i32 1, i32 5, <2 x i16> %168, <2 x i16> %169, i1 false, i1 false) #3
>  %170 = bitcast <2 x half> %164 to <2 x i16>
>  %171 = bitcast <2 x half> %165 to <2 x i16>
>  call void @llvm.amdgcn.exp.compr.v2i16(i32 2, i32 5, <2 x i16> %170, <2 x i16> %171, i1 false, i1 false) #3
>  call void @llvm.amdgcn.exp.compr.v2i16(i32 3, i32 5, <2 x i16> zeroinitializer, <2 x i16> zeroinitializer, i1 true, i1 true) #3
>  ret void
>}
>
>; Function Attrs: nounwind readnone speculatable
>declare i8 addrspace(4)* @llvm.amdgcn.implicit.buffer.ptr() #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.amdgcn.interp.p1(float, i32, i32, i32) #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.amdgcn.interp.p2(float, float, i32, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const.v4i32(<4 x i32>, i32) #1
>
>; Function Attrs: nounwind readonly
>declare <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #2
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.sqrt.f32(float) #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.maxnum.f32(float, float) #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.canonicalize.f32(float) #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.minnum.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.amdgcn.kill(i1) #3
>
>; Function Attrs: nounwind readnone speculatable
>declare <2 x half> @llvm.amdgcn.cvt.pkrtz(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.amdgcn.exp.compr.v2i16(i32, i32, <2 x i16>, <2 x i16>, i1, i1) #3
>
>attributes #0 = { nounwind readnone speculatable }
>attributes #1 = { nounwind readnone }
>attributes #2 = { nounwind readonly }
>attributes #3 = { nounwind }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>disasm:
>main:
>BB0_0:
>	s_mov_b64 s[24:25], exec                                 ; BE98017E
>	s_wqm_b64 exec, exec                                     ; BEFE077E
>	s_mov_b32 s6, s3                                         ; BE860003
>	s_mov_b32 s3, 0                                          ; BE830080
>	s_mov_b32 s7, s3                                         ; BE870003
>	s_load_dwordx4 s[8:11], s[6:7], 0x30                     ; C00A0203 00000030
>	v_cvt_u32_f32_e32 v3, v3                                 ; 7E060F03
>	v_cvt_u32_f32_e32 v2, v2                                 ; 7E040F02
>	s_mov_b32 m0, s4                                         ; BEFC0004
>	v_interp_p1_f32_e32 v6, v0, attr0.x                      ; D4180000
>	v_interp_p1_f32_e32 v4, v0, attr0.y                      ; D4100100
>	v_interp_p1_f32_e32 v5, v0, attr0.z                      ; D4140200
>	v_interp_p1_f32_e32 v11, v0, attr0.w                     ; D42C0300
>	v_interp_p1_f32_e32 v12, v0, attr1.x                     ; D4300400
>	v_interp_p1_f32_e32 v13, v0, attr1.y                     ; D4340500
>	v_interp_p1_f32_e32 v14, v0, attr1.z                     ; D4380600
>	v_interp_p2_f32_e32 v6, v1, attr0.x                      ; D4190001
>	v_interp_p2_f32_e32 v4, v1, attr0.y                      ; D4110101
>	v_interp_p2_f32_e32 v5, v1, attr0.z                      ; D4150201
>	v_interp_p2_f32_e32 v11, v1, attr0.w                     ; D42D0301
>	v_interp_p2_f32_e32 v12, v1, attr1.x                     ; D4310401
>	v_interp_p2_f32_e32 v13, v1, attr1.y                     ; D4350501
>	v_interp_p2_f32_e32 v14, v1, attr1.z                     ; D4390601
>	v_lshlrev_b32_e32 v1, 1, v3                              ; 24020681
>	s_load_dwordx4 s[12:15], s[6:7], 0x40                    ; C00A0303 00000040
>	s_load_dwordx4 s[16:19], s[6:7], 0x50                    ; C00A0403 00000050
>	v_and_b32_e32 v0, 1, v2                                  ; 26000481
>	v_and_b32_e32 v1, 2, v1                                  ; 26020282
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_buffer_load_dwordx4 s[4:7], s[8:11], 0x0               ; C02A0104 00000000
>	v_or_b32_e32 v1, v0, v1                                  ; 28020300
>	v_cmp_eq_u32_e32 vcc, 0, v1                              ; 7D940280
>	v_cndmask_b32_e64 v2, 1.0, 0, vcc                        ; D1000002 01A900F2
>	v_cndmask_b32_e64 v7, 0, 1.0, vcc                        ; D1000007 01A9E480
>	v_cmp_gt_u32_e32 vcc, 2, v1                              ; 7D980282
>	v_cmp_eq_u32_e64 s[0:1], 3, v1                           ; D0CA0000 00020283
>	v_cndmask_b32_e32 v1, 0, v2, vcc                         ; 00020480
>	v_cndmask_b32_e64 v3, 0, 1.0, s[0:1]                     ; D1000003 0001E480
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mul_f32_e32 v1, s5, v1                                 ; 0A020205
>	s_or_b64 s[0:1], vcc, s[0:1]                             ; 8780006A
>	v_cndmask_b32_e64 v2, v3, 0, vcc                         ; D1000002 01A90103
>	v_mac_f32_e32 v1, s4, v7                                 ; 2C020E04
>	v_cndmask_b32_e64 v3, 1.0, 0, s[0:1]                     ; D1000003 000100F2
>	v_mac_f32_e32 v1, s6, v3                                 ; 2C020606
>	v_mac_f32_e32 v1, s7, v2                                 ; 2C020407
>	s_load_dwordx4 s[20:23], s[2:3], 0x0                     ; C00A0501 00000000
>	s_load_dwordx8 s[0:7], s[2:3], 0x20                      ; C00E0001 00000020
>	v_mov_b32_e32 v0, 0                                      ; 7E000280
>	v_cmp_ngt_f32_e32 vcc, 1.0, v1                           ; 7C9602F2
>	s_and_b64 exec, exec, s[24:25]                           ; 86FE187E
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	image_sample v[7:10], v[4:5], s[0:7], s[20:23] dmask:0xf ; F0800F00 00A00704
>	v_mul_f32_e32 v1, v13, v13                               ; 0A021B0D
>	v_mac_f32_e32 v1, v12, v12                               ; 2C02190C
>	s_buffer_load_dwordx2 s[2:3], s[16:19], 0x0              ; C0260088 00000000
>	s_buffer_load_dword s7, s[16:19], 0x8                    ; C02201C8 00000008
>	v_mac_f32_e32 v1, v14, v14                               ; 2C021D0E
>	v_rsq_f32_e32 v1, v1                                     ; 7E024901
>	s_buffer_load_dword s4, s[8:11], 0xc0                    ; C0220104 000000C0
>	s_buffer_load_dword s0, s[8:11], 0xc8                    ; C0220004 000000C8
>	s_buffer_load_dword s1, s[8:11], 0xd8                    ; C0220044 000000D8
>	s_buffer_load_dword s5, s[12:15], 0x38                   ; C0220146 00000038
>	v_mov_b32_e32 v3, 0x3f333333                             ; 7E0602FF 3F333333
>	v_mov_b32_e32 v2, 0x3b000000                             ; 7E0402FF 3B000000
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mul_f32_e32 v17, s3, v2                                ; 0A220403
>	v_mad_f32 v2, s7, -0.5, 1.0                              ; D1C10002 03C9E207
>	v_mov_b32_e32 v5, 0x3efa0000                             ; 7E0A02FF 3EFA0000
>	v_add_f32_e64 v3, s7, v3 clamp                           ; D1018003 00020607
>	v_mul_f32_e32 v18, -0.5, v2                              ; 0A2404F1
>	v_mad_f32 v2, v3, 0.5, -s7                               ; D1C10002 801DE103
>	v_mad_f32 v3, v3, v5, -v17                               ; D1C10003 84460B03
>	v_mul_f32_e32 v5, v1, v14                                ; 0A0A1D01
>	v_mov_b32_e32 v4, 0x3fc4ec4f                             ; 7E0802FF 3FC4EC4F
>	v_madak_f32 v14, v1, v14, 0xbeb33333                     ; 301C1D01 BEB33333
>	v_mul_f32_e64 v4, v14, v4 clamp                          ; D1058004 0002090E
>	s_buffer_load_dword s6, s[12:15], 0x40                   ; C0220186 00000040
>	v_sub_f32_e64 v16, 1.0, s1                               ; D1020010 000002F2
>	v_mul_f32_e32 v4, s5, v4                                 ; 0A080805
>	v_mul_f32_e32 v19, 0.5, v1                               ; 0A2602F0
>	v_mul_f32_e32 v6, s0, v6                                 ; 0A0C0C00
>	v_mul_f32_e32 v4, v16, v4                                ; 0A080910
>	v_max_f32_e32 v20, 0, v2                                 ; 16280480
>	v_max_f32_e32 v21, 0, v3                                 ; 162A0680
>	v_mad_f32 v1, v19, v12, 0.5                              ; D1C10001 03C21913
>	v_mul_f32_e32 v12, v6, v4                                ; 0A180906
>	v_mad_f32 v4, v20, v12, s7                               ; D1C10004 001E1914
>	v_mac_f32_e32 v17, v21, v12                              ; 2C221915
>	v_mov_b32_e32 v15, 0x3f7851ec                            ; 7E1E02FF 3F7851EC
>	v_mad_f32 v3, v5, 0.5, 0.5                               ; D1C10003 03C1E105
>	v_sqrt_f32_e32 v4, v4                                    ; 7E084F04
>	v_sqrt_f32_e32 v5, v17                                   ; 7E0A4F11
>	v_mad_f32 v6, v18, v12, 1.0                              ; D1C10006 03CA1912
>	v_mad_f32 v2, v19, v13, 0.5                              ; D1C10002 03C21B13
>	v_subrev_f32_e32 v15, s2, v15                            ; 061E1E02
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mul_f32_e32 v13, s4, v10                               ; 0A1A1404
>	v_mul_f32_e32 v10, v10, v11                              ; 0A14170A
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_cmp_nge_f32_e64 s[0:1], s6, v13                        ; D0490000 00021A06
>	v_mul_f32_e32 v7, v7, v6                                 ; 0A0E0D07
>	v_mul_f32_e32 v8, v8, v6                                 ; 0A100D08
>	v_mul_f32_e32 v9, v9, v6                                 ; 0A120D09
>	v_mul_f32_e32 v6, s4, v10                                ; 0A0C1404
>	v_max_f32_e32 v10, 0, v15                                ; 16141E80
>	s_and_b64 s[0:1], s[0:1], vcc                            ; 86806A00
>	v_mad_f32 v10, v10, v12, s2                              ; D1C1000A 000A190A
>	s_and_b64 exec, exec, s[0:1]                             ; 86FE007E
>	s_cbranch_execnz BB0_2                                   ; BF890000
>	exp null off, off, off, off done vm                      ; C4001890 00000000
>	s_endpgm                                                 ; BF810000
>BB0_2:
>	v_cvt_pkrtz_f16_f32 v7, v7, v8                           ; D2960007 00021107
>	v_cvt_pkrtz_f16_f32 v8, v9, v6                           ; D2960008 00020D09
>	v_cvt_pkrtz_f16_f32 v1, v1, v2                           ; D2960001 00020501
>	v_cvt_pkrtz_f16_f32 v2, v3, v6                           ; D2960002 00020D03
>	v_cvt_pkrtz_f16_f32 v3, v4, v5                           ; D2960003 00020B04
>	v_cvt_pkrtz_f16_f32 v4, v10, v6                          ; D2960004 00020D0A
>	exp mrt0 v7, off, v8, off compr                          ; C4000405 00000807
>	exp mrt1 v1, off, v2, off compr                          ; C4000415 00000201
>	exp mrt2 v3, off, v4, off compr                          ; C4000425 00000403
>	exp mrt3 v0, off, v0, off done compr vm                  ; C4001C35 00000000
>	s_endpgm                                                 ; BF810000
>
>; ModuleID = 'mesa-shader'
>source_filename = "mesa-shader"
>target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
>target triple = "amdgcn-mesa-mesa3d"
>
>define amdgpu_vs void @main([0 x i8] addrspace(6)* inreg noalias dereferenceable(18446744073709551615), [0 x i8] addrspace(6)* inreg noalias dereferenceable(18446744073709551615), [0 x <4 x i32>] addrspace(6)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) {
>main_body:
>  %temp195 = alloca float, addrspace(5)
>  %temp194 = alloca float, addrspace(5)
>  %temp193 = alloca float, addrspace(5)
>  %temp192 = alloca float, addrspace(5)
>  %temp191 = alloca float, addrspace(5)
>  %temp190 = alloca float, addrspace(5)
>  %temp189 = alloca float, addrspace(5)
>  %temp188 = alloca float, addrspace(5)
>  %temp187 = alloca float, addrspace(5)
>  %temp186 = alloca float, addrspace(5)
>  %temp185 = alloca float, addrspace(5)
>  %temp184 = alloca float, addrspace(5)
>  %temp183 = alloca float, addrspace(5)
>  %temp182 = alloca float, addrspace(5)
>  %temp181 = alloca float, addrspace(5)
>  %temp180 = alloca float, addrspace(5)
>  %temp179 = alloca float, addrspace(5)
>  %temp178 = alloca float, addrspace(5)
>  %temp177 = alloca float, addrspace(5)
>  %temp176 = alloca float, addrspace(5)
>  %temp175 = alloca float, addrspace(5)
>  %temp174 = alloca float, addrspace(5)
>  %temp173 = alloca float, addrspace(5)
>  %temp172 = alloca float, addrspace(5)
>  %temp171 = alloca float, addrspace(5)
>  %temp170 = alloca float, addrspace(5)
>  %temp169 = alloca float, addrspace(5)
>  %temp168 = alloca float, addrspace(5)
>  %temp167 = alloca float, addrspace(5)
>  %temp166 = alloca float, addrspace(5)
>  %temp165 = alloca float, addrspace(5)
>  %temp164 = alloca float, addrspace(5)
>  %temp163 = alloca float, addrspace(5)
>  %temp162 = alloca float, addrspace(5)
>  %temp161 = alloca float, addrspace(5)
>  %temp160 = alloca float, addrspace(5)
>  %temp159 = alloca float, addrspace(5)
>  %temp158 = alloca float, addrspace(5)
>  %temp157 = alloca float, addrspace(5)
>  %temp156 = alloca float, addrspace(5)
>  %temp155 = alloca float, addrspace(5)
>  %temp154 = alloca float, addrspace(5)
>  %temp153 = alloca float, addrspace(5)
>  %temp152 = alloca float, addrspace(5)
>  %temp151 = alloca float, addrspace(5)
>  %temp150 = alloca float, addrspace(5)
>  %temp149 = alloca float, addrspace(5)
>  %temp148 = alloca float, addrspace(5)
>  %temp147 = alloca float, addrspace(5)
>  %temp146 = alloca float, addrspace(5)
>  %temp145 = alloca float, addrspace(5)
>  %temp144 = alloca float, addrspace(5)
>  %temp143 = alloca float, addrspace(5)
>  %temp142 = alloca float, addrspace(5)
>  %temp141 = alloca float, addrspace(5)
>  %temp140 = alloca float, addrspace(5)
>  %temp139 = alloca float, addrspace(5)
>  %temp138 = alloca float, addrspace(5)
>  %temp137 = alloca float, addrspace(5)
>  %temp136 = alloca float, addrspace(5)
>  %temp135 = alloca float, addrspace(5)
>  %temp134 = alloca float, addrspace(5)
>  %temp133 = alloca float, addrspace(5)
>  %temp132 = alloca float, addrspace(5)
>  %temp131 = alloca float, addrspace(5)
>  %temp130 = alloca float, addrspace(5)
>  %temp129 = alloca float, addrspace(5)
>  %temp128 = alloca float, addrspace(5)
>  %temp127 = alloca float, addrspace(5)
>  %temp126 = alloca float, addrspace(5)
>  %temp125 = alloca float, addrspace(5)
>  %temp124 = alloca float, addrspace(5)
>  %temp123 = alloca float, addrspace(5)
>  %temp122 = alloca float, addrspace(5)
>  %temp121 = alloca float, addrspace(5)
>  %temp120 = alloca float, addrspace(5)
>  %temp119 = alloca float, addrspace(5)
>  %temp118 = alloca float, addrspace(5)
>  %temp117 = alloca float, addrspace(5)
>  %temp116 = alloca float, addrspace(5)
>  %temp115 = alloca float, addrspace(5)
>  %temp114 = alloca float, addrspace(5)
>  %temp113 = alloca float, addrspace(5)
>  %temp112 = alloca float, addrspace(5)
>  %temp111 = alloca float, addrspace(5)
>  %temp110 = alloca float, addrspace(5)
>  %temp109 = alloca float, addrspace(5)
>  %temp108 = alloca float, addrspace(5)
>  %temp107 = alloca float, addrspace(5)
>  %temp106 = alloca float, addrspace(5)
>  %temp105 = alloca float, addrspace(5)
>  %temp104 = alloca float, addrspace(5)
>  %temp103 = alloca float, addrspace(5)
>  %temp102 = alloca float, addrspace(5)
>  %temp101 = alloca float, addrspace(5)
>  %temp100 = alloca float, addrspace(5)
>  %temp99 = alloca float, addrspace(5)
>  %temp98 = alloca float, addrspace(5)
>  %temp97 = alloca float, addrspace(5)
>  %temp96 = alloca float, addrspace(5)
>  %temp95 = alloca float, addrspace(5)
>  %temp94 = alloca float, addrspace(5)
>  %temp93 = alloca float, addrspace(5)
>  %temp92 = alloca float, addrspace(5)
>  %temp91 = alloca float, addrspace(5)
>  %temp90 = alloca float, addrspace(5)
>  %temp89 = alloca float, addrspace(5)
>  %temp88 = alloca float, addrspace(5)
>  %temp87 = alloca float, addrspace(5)
>  %temp86 = alloca float, addrspace(5)
>  %temp85 = alloca float, addrspace(5)
>  %temp84 = alloca float, addrspace(5)
>  %temp83 = alloca float, addrspace(5)
>  %temp82 = alloca float, addrspace(5)
>  %temp81 = alloca float, addrspace(5)
>  %temp80 = alloca float, addrspace(5)
>  %temp79 = alloca float, addrspace(5)
>  %temp78 = alloca float, addrspace(5)
>  %temp77 = alloca float, addrspace(5)
>  %temp76 = alloca float, addrspace(5)
>  %temp75 = alloca float, addrspace(5)
>  %temp74 = alloca float, addrspace(5)
>  %temp73 = alloca float, addrspace(5)
>  %temp72 = alloca float, addrspace(5)
>  %temp71 = alloca float, addrspace(5)
>  %temp70 = alloca float, addrspace(5)
>  %temp69 = alloca float, addrspace(5)
>  %temp68 = alloca float, addrspace(5)
>  %temp67 = alloca float, addrspace(5)
>  %temp66 = alloca float, addrspace(5)
>  %temp65 = alloca float, addrspace(5)
>  %temp64 = alloca float, addrspace(5)
>  %temp63 = alloca float, addrspace(5)
>  %temp62 = alloca float, addrspace(5)
>  %temp61 = alloca float, addrspace(5)
>  %temp60 = alloca float, addrspace(5)
>  %temp59 = alloca float, addrspace(5)
>  %temp58 = alloca float, addrspace(5)
>  %temp57 = alloca float, addrspace(5)
>  %temp56 = alloca float, addrspace(5)
>  %temp55 = alloca float, addrspace(5)
>  %temp54 = alloca float, addrspace(5)
>  %temp53 = alloca float, addrspace(5)
>  %temp52 = alloca float, addrspace(5)
>  %temp51 = alloca float, addrspace(5)
>  %temp50 = alloca float, addrspace(5)
>  %temp49 = alloca float, addrspace(5)
>  %temp48 = alloca float, addrspace(5)
>  %temp47 = alloca float, addrspace(5)
>  %temp46 = alloca float, addrspace(5)
>  %temp45 = alloca float, addrspace(5)
>  %temp44 = alloca float, addrspace(5)
>  %temp43 = alloca float, addrspace(5)
>  %temp42 = alloca float, addrspace(5)
>  %temp41 = alloca float, addrspace(5)
>  %temp40 = alloca float, addrspace(5)
>  %temp39 = alloca float, addrspace(5)
>  %temp38 = alloca float, addrspace(5)
>  %temp37 = alloca float, addrspace(5)
>  %temp36 = alloca float, addrspace(5)
>  %temp35 = alloca float, addrspace(5)
>  %temp34 = alloca float, addrspace(5)
>  %temp33 = alloca float, addrspace(5)
>  %temp32 = alloca float, addrspace(5)
>  %temp31 = alloca float, addrspace(5)
>  %temp30 = alloca float, addrspace(5)
>  %temp29 = alloca float, addrspace(5)
>  %temp28 = alloca float, addrspace(5)
>  %temp27 = alloca float, addrspace(5)
>  %temp26 = alloca float, addrspace(5)
>  %temp25 = alloca float, addrspace(5)
>  %temp24 = alloca float, addrspace(5)
>  %temp23 = alloca float, addrspace(5)
>  %temp22 = alloca float, addrspace(5)
>  %temp21 = alloca float, addrspace(5)
>  %temp20 = alloca float, addrspace(5)
>  %temp19 = alloca float, addrspace(5)
>  %temp18 = alloca float, addrspace(5)
>  %temp17 = alloca float, addrspace(5)
>  %temp16 = alloca float, addrspace(5)
>  %temp15 = alloca float, addrspace(5)
>  %temp14 = alloca float, addrspace(5)
>  %temp13 = alloca float, addrspace(5)
>  %temp12 = alloca float, addrspace(5)
>  %temp11 = alloca float, addrspace(5)
>  %temp10 = alloca float, addrspace(5)
>  %temp9 = alloca float, addrspace(5)
>  %temp8 = alloca float, addrspace(5)
>  %temp7 = alloca float, addrspace(5)
>  %temp6 = alloca float, addrspace(5)
>  %temp5 = alloca float, addrspace(5)
>  %temp4 = alloca float, addrspace(5)
>  %temp3 = alloca float, addrspace(5)
>  %temp2 = alloca float, addrspace(5)
>  %temp1 = alloca float, addrspace(5)
>  %temp = alloca float, addrspace(5)
>  %9 = alloca float, addrspace(5)
>  %10 = alloca float, addrspace(5)
>  %11 = alloca float, addrspace(5)
>  %12 = alloca float, addrspace(5)
>  %13 = alloca float, addrspace(5)
>  %14 = alloca float, addrspace(5)
>  %15 = alloca float, addrspace(5)
>  %16 = alloca float, addrspace(5)
>  %17 = alloca float, addrspace(5)
>  %18 = alloca float, addrspace(5)
>  %19 = alloca float, addrspace(5)
>  %20 = alloca float, addrspace(5)
>  %21 = alloca float, addrspace(5)
>  %22 = alloca float, addrspace(5)
>  %23 = alloca float, addrspace(5)
>  %24 = alloca float, addrspace(5)
>  %25 = alloca float, addrspace(5)
>  %26 = alloca float, addrspace(5)
>  %27 = alloca float, addrspace(5)
>  %28 = alloca float, addrspace(5)
>  %29 = alloca float, addrspace(5)
>  %30 = alloca float, addrspace(5)
>  %31 = alloca float, addrspace(5)
>  %32 = alloca float, addrspace(5)
>  %33 = alloca float, addrspace(5)
>  %34 = alloca float, addrspace(5)
>  %35 = alloca float, addrspace(5)
>  %36 = alloca float, addrspace(5)
>  %37 = alloca float, addrspace(5)
>  %38 = alloca float, addrspace(5)
>  %39 = alloca float, addrspace(5)
>  %40 = alloca float, addrspace(5)
>  %41 = call i8 addrspace(4)* @llvm.amdgcn.implicit.buffer.ptr() #2
>  %42 = bitcast i8 addrspace(4)* %41 to [0 x <4 x i32>] addrspace(4)*
>  %43 = add i32 %5, %3
>  %44 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(6)* %2, i32 0, i32 0, !amdgpu.uniform !0
>  %45 = load <4 x i32>, <4 x i32> addrspace(6)* %44, !invariant.load !0
>  %46 = call <4 x float> @llvm.amdgcn.buffer.load.format.v4f32(<4 x i32> %45, i32 %43, i32 0, i1 false, i1 false) #2
>  %47 = extractelement <4 x float> %46, i32 0
>  %48 = extractelement <4 x float> %46, i32 1
>  %49 = extractelement <4 x float> %46, i32 2
>  %50 = insertelement <4 x float> undef, float %47, i32 0
>  %51 = insertelement <4 x float> %50, float %48, i32 1
>  %52 = insertelement <4 x float> %51, float %49, i32 2
>  %53 = insertelement <4 x float> %52, float undef, i32 3
>  %54 = extractelement <4 x float> %53, i32 0
>  %55 = extractelement <4 x float> %53, i32 1
>  %56 = extractelement <4 x float> %53, i32 2
>  %57 = extractelement <4 x float> %53, i32 3
>  %58 = bitcast float %54 to i32
>  %59 = bitcast float %55 to i32
>  %60 = bitcast float %56 to i32
>  %61 = bitcast float %57 to i32
>  %62 = add i32 %5, %3
>  %63 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(6)* %2, i32 0, i32 1, !amdgpu.uniform !0
>  %64 = load <4 x i32>, <4 x i32> addrspace(6)* %63, !invariant.load !0
>  %65 = call <4 x float> @llvm.amdgcn.buffer.load.format.v4f32(<4 x i32> %64, i32 %62, i32 0, i1 false, i1 false) #2
>  %66 = extractelement <4 x float> %65, i32 0
>  %67 = extractelement <4 x float> %65, i32 1
>  %68 = extractelement <4 x float> %65, i32 2
>  %69 = extractelement <4 x float> %65, i32 3
>  %70 = bitcast float %66 to i32
>  %71 = bitcast float %67 to i32
>  %72 = bitcast float %68 to i32
>  %73 = bitcast float %69 to i32
>  %74 = add i32 %5, %3
>  %75 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(6)* %2, i32 0, i32 2, !amdgpu.uniform !0
>  %76 = load <4 x i32>, <4 x i32> addrspace(6)* %75, !invariant.load !0
>  %77 = call <2 x float> @llvm.amdgcn.buffer.load.format.v2f32(<4 x i32> %76, i32 %74, i32 0, i1 false, i1 false) #2
>  %78 = extractelement <2 x float> %77, i32 0
>  %79 = extractelement <2 x float> %77, i32 1
>  %80 = insertelement <4 x float> undef, float %78, i32 0
>  %81 = insertelement <4 x float> %80, float %79, i32 1
>  %82 = insertelement <4 x float> %81, float undef, i32 2
>  %83 = insertelement <4 x float> %82, float undef, i32 3
>  %84 = extractelement <4 x float> %83, i32 0
>  %85 = extractelement <4 x float> %83, i32 1
>  %86 = extractelement <4 x float> %83, i32 2
>  %87 = extractelement <4 x float> %83, i32 3
>  %88 = bitcast float %84 to i32
>  %89 = bitcast float %85 to i32
>  %90 = bitcast float %86 to i32
>  %91 = bitcast float %87 to i32
>  %92 = add i32 %5, %3
>  %93 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(6)* %2, i32 0, i32 3, !amdgpu.uniform !0
>  %94 = load <4 x i32>, <4 x i32> addrspace(6)* %93, !invariant.load !0
>  %95 = call <4 x float> @llvm.amdgcn.buffer.load.format.v4f32(<4 x i32> %94, i32 %92, i32 0, i1 false, i1 false) #2
>  %96 = extractelement <4 x float> %95, i32 0
>  %97 = extractelement <4 x float> %95, i32 1
>  %98 = extractelement <4 x float> %95, i32 2
>  %99 = insertelement <4 x float> undef, float %96, i32 0
>  %100 = insertelement <4 x float> %99, float %97, i32 1
>  %101 = insertelement <4 x float> %100, float %98, i32 2
>  %102 = insertelement <4 x float> %101, float undef, i32 3
>  %103 = extractelement <4 x float> %102, i32 0
>  %104 = extractelement <4 x float> %102, i32 1
>  %105 = extractelement <4 x float> %102, i32 2
>  %106 = extractelement <4 x float> %102, i32 3
>  %107 = bitcast float %103 to i32
>  %108 = bitcast float %104 to i32
>  %109 = bitcast float %105 to i32
>  %110 = bitcast float %106 to i32
>  store float 0.000000e+00, float addrspace(5)* %40
>  store float undef, float addrspace(5)* %40
>  store float 0.000000e+00, float addrspace(5)* %39
>  store float undef, float addrspace(5)* %39
>  store float 0.000000e+00, float addrspace(5)* %38
>  store float undef, float addrspace(5)* %38
>  store float 0.000000e+00, float addrspace(5)* %37
>  store float undef, float addrspace(5)* %37
>  store float 0.000000e+00, float addrspace(5)* %36
>  store float undef, float addrspace(5)* %36
>  store float 0.000000e+00, float addrspace(5)* %35
>  store float undef, float addrspace(5)* %35
>  store float 0.000000e+00, float addrspace(5)* %34
>  store float undef, float addrspace(5)* %34
>  store float 0.000000e+00, float addrspace(5)* %33
>  store float undef, float addrspace(5)* %33
>  store float 0.000000e+00, float addrspace(5)* %32
>  store float undef, float addrspace(5)* %32
>  store float 0.000000e+00, float addrspace(5)* %31
>  store float undef, float addrspace(5)* %31
>  store float 0.000000e+00, float addrspace(5)* %30
>  store float undef, float addrspace(5)* %30
>  store float 0.000000e+00, float addrspace(5)* %29
>  store float undef, float addrspace(5)* %29
>  store float 0.000000e+00, float addrspace(5)* %28
>  store float undef, float addrspace(5)* %28
>  store float 0.000000e+00, float addrspace(5)* %27
>  store float undef, float addrspace(5)* %27
>  store float 0.000000e+00, float addrspace(5)* %26
>  store float undef, float addrspace(5)* %26
>  store float 0.000000e+00, float addrspace(5)* %25
>  store float undef, float addrspace(5)* %25
>  store float 0.000000e+00, float addrspace(5)* %24
>  store float undef, float addrspace(5)* %24
>  store float 0.000000e+00, float addrspace(5)* %23
>  store float undef, float addrspace(5)* %23
>  store float 0.000000e+00, float addrspace(5)* %22
>  store float undef, float addrspace(5)* %22
>  store float 0.000000e+00, float addrspace(5)* %21
>  store float undef, float addrspace(5)* %21
>  store float 0.000000e+00, float addrspace(5)* %20
>  store float undef, float addrspace(5)* %20
>  store float 0.000000e+00, float addrspace(5)* %19
>  store float undef, float addrspace(5)* %19
>  store float 0.000000e+00, float addrspace(5)* %18
>  store float undef, float addrspace(5)* %18
>  store float 0.000000e+00, float addrspace(5)* %17
>  store float undef, float addrspace(5)* %17
>  store float 0.000000e+00, float addrspace(5)* %16
>  store float undef, float addrspace(5)* %16
>  store float 0.000000e+00, float addrspace(5)* %15
>  store float undef, float addrspace(5)* %15
>  store float 0.000000e+00, float addrspace(5)* %14
>  store float undef, float addrspace(5)* %14
>  store float 0.000000e+00, float addrspace(5)* %13
>  store float undef, float addrspace(5)* %13
>  store float 0.000000e+00, float addrspace(5)* %12
>  store float undef, float addrspace(5)* %12
>  store float 0.000000e+00, float addrspace(5)* %11
>  store float undef, float addrspace(5)* %11
>  store float 0.000000e+00, float addrspace(5)* %10
>  store float undef, float addrspace(5)* %10
>  store float 0.000000e+00, float addrspace(5)* %9
>  store float undef, float addrspace(5)* %9
>  store float 0.000000e+00, float addrspace(5)* %temp
>  store float undef, float addrspace(5)* %temp
>  store float 0.000000e+00, float addrspace(5)* %temp1
>  store float undef, float addrspace(5)* %temp1
>  store float 0.000000e+00, float addrspace(5)* %temp2
>  store float undef, float addrspace(5)* %temp2
>  store float 0.000000e+00, float addrspace(5)* %temp3
>  store float undef, float addrspace(5)* %temp3
>  store float 0.000000e+00, float addrspace(5)* %temp4
>  store float undef, float addrspace(5)* %temp4
>  store float 0.000000e+00, float addrspace(5)* %temp5
>  store float undef, float addrspace(5)* %temp5
>  store float 0.000000e+00, float addrspace(5)* %temp6
>  store float undef, float addrspace(5)* %temp6
>  store float 0.000000e+00, float addrspace(5)* %temp7
>  store float undef, float addrspace(5)* %temp7
>  store float 0.000000e+00, float addrspace(5)* %temp8
>  store float undef, float addrspace(5)* %temp8
>  store float 0.000000e+00, float addrspace(5)* %temp9
>  store float undef, float addrspace(5)* %temp9
>  store float 0.000000e+00, float addrspace(5)* %temp10
>  store float undef, float addrspace(5)* %temp10
>  store float 0.000000e+00, float addrspace(5)* %temp11
>  store float undef, float addrspace(5)* %temp11
>  store float 0.000000e+00, float addrspace(5)* %temp12
>  store float undef, float addrspace(5)* %temp12
>  store float 0.000000e+00, float addrspace(5)* %temp13
>  store float undef, float addrspace(5)* %temp13
>  store float 0.000000e+00, float addrspace(5)* %temp14
>  store float undef, float addrspace(5)* %temp14
>  store float 0.000000e+00, float addrspace(5)* %temp15
>  store float undef, float addrspace(5)* %temp15
>  store float 0.000000e+00, float addrspace(5)* %temp16
>  store float undef, float addrspace(5)* %temp16
>  store float 0.000000e+00, float addrspace(5)* %temp17
>  store float undef, float addrspace(5)* %temp17
>  store float 0.000000e+00, float addrspace(5)* %temp18
>  store float undef, float addrspace(5)* %temp18
>  store float 0.000000e+00, float addrspace(5)* %temp19
>  store float undef, float addrspace(5)* %temp19
>  store float 0.000000e+00, float addrspace(5)* %temp20
>  store float undef, float addrspace(5)* %temp20
>  store float 0.000000e+00, float addrspace(5)* %temp21
>  store float undef, float addrspace(5)* %temp21
>  store float 0.000000e+00, float addrspace(5)* %temp22
>  store float undef, float addrspace(5)* %temp22
>  store float 0.000000e+00, float addrspace(5)* %temp23
>  store float undef, float addrspace(5)* %temp23
>  store float 0.000000e+00, float addrspace(5)* %temp24
>  store float undef, float addrspace(5)* %temp24
>  store float 0.000000e+00, float addrspace(5)* %temp25
>  store float undef, float addrspace(5)* %temp25
>  store float 0.000000e+00, float addrspace(5)* %temp26
>  store float undef, float addrspace(5)* %temp26
>  store float 0.000000e+00, float addrspace(5)* %temp27
>  store float undef, float addrspace(5)* %temp27
>  store float 0.000000e+00, float addrspace(5)* %temp28
>  store float undef, float addrspace(5)* %temp28
>  store float 0.000000e+00, float addrspace(5)* %temp29
>  store float undef, float addrspace(5)* %temp29
>  store float 0.000000e+00, float addrspace(5)* %temp30
>  store float undef, float addrspace(5)* %temp30
>  store float 0.000000e+00, float addrspace(5)* %temp31
>  store float undef, float addrspace(5)* %temp31
>  store float 0.000000e+00, float addrspace(5)* %temp32
>  store float undef, float addrspace(5)* %temp32
>  store float 0.000000e+00, float addrspace(5)* %temp33
>  store float undef, float addrspace(5)* %temp33
>  store float 0.000000e+00, float addrspace(5)* %temp34
>  store float undef, float addrspace(5)* %temp34
>  store float 0.000000e+00, float addrspace(5)* %temp35
>  store float undef, float addrspace(5)* %temp35
>  store float 0.000000e+00, float addrspace(5)* %temp36
>  store float undef, float addrspace(5)* %temp36
>  store float 0.000000e+00, float addrspace(5)* %temp37
>  store float undef, float addrspace(5)* %temp37
>  store float 0.000000e+00, float addrspace(5)* %temp38
>  store float undef, float addrspace(5)* %temp38
>  store float 0.000000e+00, float addrspace(5)* %temp39
>  store float undef, float addrspace(5)* %temp39
>  store float 0.000000e+00, float addrspace(5)* %temp40
>  store float undef, float addrspace(5)* %temp40
>  store float 0.000000e+00, float addrspace(5)* %temp41
>  store float undef, float addrspace(5)* %temp41
>  store float 0.000000e+00, float addrspace(5)* %temp42
>  store float undef, float addrspace(5)* %temp42
>  store float 0.000000e+00, float addrspace(5)* %temp43
>  store float undef, float addrspace(5)* %temp43
>  store float 0.000000e+00, float addrspace(5)* %temp44
>  store float undef, float addrspace(5)* %temp44
>  store float 0.000000e+00, float addrspace(5)* %temp45
>  store float undef, float addrspace(5)* %temp45
>  store float 0.000000e+00, float addrspace(5)* %temp46
>  store float undef, float addrspace(5)* %temp46
>  store float 0.000000e+00, float addrspace(5)* %temp47
>  store float undef, float addrspace(5)* %temp47
>  store float 0.000000e+00, float addrspace(5)* %temp48
>  store float undef, float addrspace(5)* %temp48
>  store float 0.000000e+00, float addrspace(5)* %temp49
>  store float undef, float addrspace(5)* %temp49
>  store float 0.000000e+00, float addrspace(5)* %temp50
>  store float undef, float addrspace(5)* %temp50
>  store float 0.000000e+00, float addrspace(5)* %temp51
>  store float undef, float addrspace(5)* %temp51
>  store float 0.000000e+00, float addrspace(5)* %temp52
>  store float undef, float addrspace(5)* %temp52
>  store float 0.000000e+00, float addrspace(5)* %temp53
>  store float undef, float addrspace(5)* %temp53
>  store float 0.000000e+00, float addrspace(5)* %temp54
>  store float undef, float addrspace(5)* %temp54
>  store float 0.000000e+00, float addrspace(5)* %temp55
>  store float undef, float addrspace(5)* %temp55
>  store float 0.000000e+00, float addrspace(5)* %temp56
>  store float undef, float addrspace(5)* %temp56
>  store float 0.000000e+00, float addrspace(5)* %temp57
>  store float undef, float addrspace(5)* %temp57
>  store float 0.000000e+00, float addrspace(5)* %temp58
>  store float undef, float addrspace(5)* %temp58
>  store float 0.000000e+00, float addrspace(5)* %temp59
>  store float undef, float addrspace(5)* %temp59
>  store float 0.000000e+00, float addrspace(5)* %temp60
>  store float undef, float addrspace(5)* %temp60
>  store float 0.000000e+00, float addrspace(5)* %temp61
>  store float undef, float addrspace(5)* %temp61
>  store float 0.000000e+00, float addrspace(5)* %temp62
>  store float undef, float addrspace(5)* %temp62
>  store float 0.000000e+00, float addrspace(5)* %temp63
>  store float undef, float addrspace(5)* %temp63
>  store float 0.000000e+00, float addrspace(5)* %temp64
>  store float undef, float addrspace(5)* %temp64
>  store float 0.000000e+00, float addrspace(5)* %temp65
>  store float undef, float addrspace(5)* %temp65
>  store float 0.000000e+00, float addrspace(5)* %temp66
>  store float undef, float addrspace(5)* %temp66
>  store float 0.000000e+00, float addrspace(5)* %temp67
>  store float undef, float addrspace(5)* %temp67
>  store float 0.000000e+00, float addrspace(5)* %temp68
>  store float undef, float addrspace(5)* %temp68
>  store float 0.000000e+00, float addrspace(5)* %temp69
>  store float undef, float addrspace(5)* %temp69
>  store float 0.000000e+00, float addrspace(5)* %temp70
>  store float undef, float addrspace(5)* %temp70
>  store float 0.000000e+00, float addrspace(5)* %temp71
>  store float undef, float addrspace(5)* %temp71
>  store float 0.000000e+00, float addrspace(5)* %temp72
>  store float undef, float addrspace(5)* %temp72
>  store float 0.000000e+00, float addrspace(5)* %temp73
>  store float undef, float addrspace(5)* %temp73
>  store float 0.000000e+00, float addrspace(5)* %temp74
>  store float undef, float addrspace(5)* %temp74
>  store float 0.000000e+00, float addrspace(5)* %temp75
>  store float undef, float addrspace(5)* %temp75
>  store float 0.000000e+00, float addrspace(5)* %temp76
>  store float undef, float addrspace(5)* %temp76
>  store float 0.000000e+00, float addrspace(5)* %temp77
>  store float undef, float addrspace(5)* %temp77
>  store float 0.000000e+00, float addrspace(5)* %temp78
>  store float undef, float addrspace(5)* %temp78
>  store float 0.000000e+00, float addrspace(5)* %temp79
>  store float undef, float addrspace(5)* %temp79
>  store float 0.000000e+00, float addrspace(5)* %temp80
>  store float undef, float addrspace(5)* %temp80
>  store float 0.000000e+00, float addrspace(5)* %temp81
>  store float undef, float addrspace(5)* %temp81
>  store float 0.000000e+00, float addrspace(5)* %temp82
>  store float undef, float addrspace(5)* %temp82
>  store float 0.000000e+00, float addrspace(5)* %temp83
>  store float undef, float addrspace(5)* %temp83
>  store float 0.000000e+00, float addrspace(5)* %temp84
>  store float undef, float addrspace(5)* %temp84
>  store float 0.000000e+00, float addrspace(5)* %temp85
>  store float undef, float addrspace(5)* %temp85
>  store float 0.000000e+00, float addrspace(5)* %temp86
>  store float undef, float addrspace(5)* %temp86
>  store float 0.000000e+00, float addrspace(5)* %temp87
>  store float undef, float addrspace(5)* %temp87
>  store float 0.000000e+00, float addrspace(5)* %temp88
>  store float undef, float addrspace(5)* %temp88
>  store float 0.000000e+00, float addrspace(5)* %temp89
>  store float undef, float addrspace(5)* %temp89
>  store float 0.000000e+00, float addrspace(5)* %temp90
>  store float undef, float addrspace(5)* %temp90
>  store float 0.000000e+00, float addrspace(5)* %temp91
>  store float undef, float addrspace(5)* %temp91
>  store float 0.000000e+00, float addrspace(5)* %temp92
>  store float undef, float addrspace(5)* %temp92
>  store float 0.000000e+00, float addrspace(5)* %temp93
>  store float undef, float addrspace(5)* %temp93
>  store float 0.000000e+00, float addrspace(5)* %temp94
>  store float undef, float addrspace(5)* %temp94
>  store float 0.000000e+00, float addrspace(5)* %temp95
>  store float undef, float addrspace(5)* %temp95
>  store float 0.000000e+00, float addrspace(5)* %temp96
>  store float undef, float addrspace(5)* %temp96
>  store float 0.000000e+00, float addrspace(5)* %temp97
>  store float undef, float addrspace(5)* %temp97
>  store float 0.000000e+00, float addrspace(5)* %temp98
>  store float undef, float addrspace(5)* %temp98
>  store float 0.000000e+00, float addrspace(5)* %temp99
>  store float undef, float addrspace(5)* %temp99
>  store float 0.000000e+00, float addrspace(5)* %temp100
>  store float undef, float addrspace(5)* %temp100
>  store float 0.000000e+00, float addrspace(5)* %temp101
>  store float undef, float addrspace(5)* %temp101
>  store float 0.000000e+00, float addrspace(5)* %temp102
>  store float undef, float addrspace(5)* %temp102
>  store float 0.000000e+00, float addrspace(5)* %temp103
>  store float undef, float addrspace(5)* %temp103
>  store float 0.000000e+00, float addrspace(5)* %temp104
>  store float undef, float addrspace(5)* %temp104
>  store float 0.000000e+00, float addrspace(5)* %temp105
>  store float undef, float addrspace(5)* %temp105
>  store float 0.000000e+00, float addrspace(5)* %temp106
>  store float undef, float addrspace(5)* %temp106
>  store float 0.000000e+00, float addrspace(5)* %temp107
>  store float undef, float addrspace(5)* %temp107
>  store float 0.000000e+00, float addrspace(5)* %temp108
>  store float undef, float addrspace(5)* %temp108
>  store float 0.000000e+00, float addrspace(5)* %temp109
>  store float undef, float addrspace(5)* %temp109
>  store float 0.000000e+00, float addrspace(5)* %temp110
>  store float undef, float addrspace(5)* %temp110
>  store float 0.000000e+00, float addrspace(5)* %temp111
>  store float undef, float addrspace(5)* %temp111
>  store float 0.000000e+00, float addrspace(5)* %temp112
>  store float undef, float addrspace(5)* %temp112
>  store float 0.000000e+00, float addrspace(5)* %temp113
>  store float undef, float addrspace(5)* %temp113
>  store float 0.000000e+00, float addrspace(5)* %temp114
>  store float undef, float addrspace(5)* %temp114
>  store float 0.000000e+00, float addrspace(5)* %temp115
>  store float undef, float addrspace(5)* %temp115
>  store float 0.000000e+00, float addrspace(5)* %temp116
>  store float undef, float addrspace(5)* %temp116
>  store float 0.000000e+00, float addrspace(5)* %temp117
>  store float undef, float addrspace(5)* %temp117
>  store float 0.000000e+00, float addrspace(5)* %temp118
>  store float undef, float addrspace(5)* %temp118
>  store float 0.000000e+00, float addrspace(5)* %temp119
>  store float undef, float addrspace(5)* %temp119
>  store float 0.000000e+00, float addrspace(5)* %temp120
>  store float undef, float addrspace(5)* %temp120
>  store float 0.000000e+00, float addrspace(5)* %temp121
>  store float undef, float addrspace(5)* %temp121
>  store float 0.000000e+00, float addrspace(5)* %temp122
>  store float undef, float addrspace(5)* %temp122
>  store float 0.000000e+00, float addrspace(5)* %temp123
>  store float undef, float addrspace(5)* %temp123
>  store float 0.000000e+00, float addrspace(5)* %temp124
>  store float undef, float addrspace(5)* %temp124
>  store float 0.000000e+00, float addrspace(5)* %temp125
>  store float undef, float addrspace(5)* %temp125
>  store float 0.000000e+00, float addrspace(5)* %temp126
>  store float undef, float addrspace(5)* %temp126
>  store float 0.000000e+00, float addrspace(5)* %temp127
>  store float undef, float addrspace(5)* %temp127
>  store float 0.000000e+00, float addrspace(5)* %temp128
>  store float undef, float addrspace(5)* %temp128
>  store float 0.000000e+00, float addrspace(5)* %temp129
>  store float undef, float addrspace(5)* %temp129
>  store float 0.000000e+00, float addrspace(5)* %temp130
>  store float undef, float addrspace(5)* %temp130
>  store float 0.000000e+00, float addrspace(5)* %temp131
>  store float undef, float addrspace(5)* %temp131
>  store float 0.000000e+00, float addrspace(5)* %temp132
>  store float undef, float addrspace(5)* %temp132
>  store float 0.000000e+00, float addrspace(5)* %temp133
>  store float undef, float addrspace(5)* %temp133
>  store float 0.000000e+00, float addrspace(5)* %temp134
>  store float undef, float addrspace(5)* %temp134
>  store float 0.000000e+00, float addrspace(5)* %temp135
>  store float undef, float addrspace(5)* %temp135
>  store float 0.000000e+00, float addrspace(5)* %temp136
>  store float undef, float addrspace(5)* %temp136
>  store float 0.000000e+00, float addrspace(5)* %temp137
>  store float undef, float addrspace(5)* %temp137
>  store float 0.000000e+00, float addrspace(5)* %temp138
>  store float undef, float addrspace(5)* %temp138
>  store float 0.000000e+00, float addrspace(5)* %temp139
>  store float undef, float addrspace(5)* %temp139
>  store float 0.000000e+00, float addrspace(5)* %temp140
>  store float undef, float addrspace(5)* %temp140
>  store float 0.000000e+00, float addrspace(5)* %temp141
>  store float undef, float addrspace(5)* %temp141
>  store float 0.000000e+00, float addrspace(5)* %temp142
>  store float undef, float addrspace(5)* %temp142
>  store float 0.000000e+00, float addrspace(5)* %temp143
>  store float undef, float addrspace(5)* %temp143
>  store float 0.000000e+00, float addrspace(5)* %temp144
>  store float undef, float addrspace(5)* %temp144
>  store float 0.000000e+00, float addrspace(5)* %temp145
>  store float undef, float addrspace(5)* %temp145
>  store float 0.000000e+00, float addrspace(5)* %temp146
>  store float undef, float addrspace(5)* %temp146
>  store float 0.000000e+00, float addrspace(5)* %temp147
>  store float undef, float addrspace(5)* %temp147
>  store float 0.000000e+00, float addrspace(5)* %temp148
>  store float undef, float addrspace(5)* %temp148
>  store float 0.000000e+00, float addrspace(5)* %temp149
>  store float undef, float addrspace(5)* %temp149
>  store float 0.000000e+00, float addrspace(5)* %temp150
>  store float undef, float addrspace(5)* %temp150
>  store float 0.000000e+00, float addrspace(5)* %temp151
>  store float undef, float addrspace(5)* %temp151
>  store float 0.000000e+00, float addrspace(5)* %temp152
>  store float undef, float addrspace(5)* %temp152
>  store float 0.000000e+00, float addrspace(5)* %temp153
>  store float undef, float addrspace(5)* %temp153
>  store float 0.000000e+00, float addrspace(5)* %temp154
>  store float undef, float addrspace(5)* %temp154
>  store float 0.000000e+00, float addrspace(5)* %temp155
>  store float undef, float addrspace(5)* %temp155
>  store float 0.000000e+00, float addrspace(5)* %temp156
>  store float undef, float addrspace(5)* %temp156
>  store float 0.000000e+00, float addrspace(5)* %temp157
>  store float undef, float addrspace(5)* %temp157
>  store float 0.000000e+00, float addrspace(5)* %temp158
>  store float undef, float addrspace(5)* %temp158
>  store float 0.000000e+00, float addrspace(5)* %temp159
>  store float undef, float addrspace(5)* %temp159
>  store float 0.000000e+00, float addrspace(5)* %temp160
>  store float undef, float addrspace(5)* %temp160
>  store float 0.000000e+00, float addrspace(5)* %temp161
>  store float undef, float addrspace(5)* %temp161
>  store float 0.000000e+00, float addrspace(5)* %temp162
>  store float undef, float addrspace(5)* %temp162
>  store float 0.000000e+00, float addrspace(5)* %temp163
>  store float undef, float addrspace(5)* %temp163
>  store float 0.000000e+00, float addrspace(5)* %temp164
>  store float undef, float addrspace(5)* %temp164
>  store float 0.000000e+00, float addrspace(5)* %temp165
>  store float undef, float addrspace(5)* %temp165
>  store float 0.000000e+00, float addrspace(5)* %temp166
>  store float undef, float addrspace(5)* %temp166
>  store float 0.000000e+00, float addrspace(5)* %temp167
>  store float undef, float addrspace(5)* %temp167
>  store float 0.000000e+00, float addrspace(5)* %temp168
>  store float undef, float addrspace(5)* %temp168
>  store float 0.000000e+00, float addrspace(5)* %temp169
>  store float undef, float addrspace(5)* %temp169
>  store float 0.000000e+00, float addrspace(5)* %temp170
>  store float undef, float addrspace(5)* %temp170
>  store float 0.000000e+00, float addrspace(5)* %temp171
>  store float undef, float addrspace(5)* %temp171
>  store float 0.000000e+00, float addrspace(5)* %temp172
>  store float undef, float addrspace(5)* %temp172
>  store float 0.000000e+00, float addrspace(5)* %temp173
>  store float undef, float addrspace(5)* %temp173
>  store float 0.000000e+00, float addrspace(5)* %temp174
>  store float undef, float addrspace(5)* %temp174
>  store float 0.000000e+00, float addrspace(5)* %temp175
>  store float undef, float addrspace(5)* %temp175
>  store float 0.000000e+00, float addrspace(5)* %temp176
>  store float undef, float addrspace(5)* %temp176
>  store float 0.000000e+00, float addrspace(5)* %temp177
>  store float undef, float addrspace(5)* %temp177
>  store float 0.000000e+00, float addrspace(5)* %temp178
>  store float undef, float addrspace(5)* %temp178
>  store float 0.000000e+00, float addrspace(5)* %temp179
>  store float undef, float addrspace(5)* %temp179
>  store float 0.000000e+00, float addrspace(5)* %temp180
>  store float undef, float addrspace(5)* %temp180
>  store float 0.000000e+00, float addrspace(5)* %temp181
>  store float undef, float addrspace(5)* %temp181
>  store float 0.000000e+00, float addrspace(5)* %temp182
>  store float undef, float addrspace(5)* %temp182
>  store float 0.000000e+00, float addrspace(5)* %temp183
>  store float undef, float addrspace(5)* %temp183
>  store float 0.000000e+00, float addrspace(5)* %temp184
>  store float undef, float addrspace(5)* %temp184
>  store float 0.000000e+00, float addrspace(5)* %temp185
>  store float undef, float addrspace(5)* %temp185
>  store float 0.000000e+00, float addrspace(5)* %temp186
>  store float undef, float addrspace(5)* %temp186
>  store float 0.000000e+00, float addrspace(5)* %temp187
>  store float undef, float addrspace(5)* %temp187
>  store float 0.000000e+00, float addrspace(5)* %temp188
>  store float undef, float addrspace(5)* %temp188
>  store float 0.000000e+00, float addrspace(5)* %temp189
>  store float undef, float addrspace(5)* %temp189
>  store float 0.000000e+00, float addrspace(5)* %temp190
>  store float undef, float addrspace(5)* %temp190
>  store float 0.000000e+00, float addrspace(5)* %temp191
>  store float undef, float addrspace(5)* %temp191
>  store float 0.000000e+00, float addrspace(5)* %temp192
>  store float undef, float addrspace(5)* %temp192
>  store float 0.000000e+00, float addrspace(5)* %temp193
>  store float undef, float addrspace(5)* %temp193
>  store float 0.000000e+00, float addrspace(5)* %temp194
>  store float undef, float addrspace(5)* %temp194
>  store float 0.000000e+00, float addrspace(5)* %temp195
>  store float undef, float addrspace(5)* %temp195
>  %111 = insertelement <3 x i32> undef, i32 %58, i32 0
>  %112 = insertelement <3 x i32> %111, i32 %59, i32 1
>  %113 = insertelement <3 x i32> %112, i32 %60, i32 2
>  %114 = insertelement <4 x i32> undef, i32 %70, i32 0
>  %115 = insertelement <4 x i32> %114, i32 %71, i32 1
>  %116 = insertelement <4 x i32> %115, i32 %72, i32 2
>  %117 = insertelement <4 x i32> %116, i32 %73, i32 3
>  %118 = insertelement <2 x i32> undef, i32 %88, i32 0
>  %119 = insertelement <2 x i32> %118, i32 %89, i32 1
>  %120 = insertelement <3 x i32> undef, i32 %107, i32 0
>  %121 = insertelement <3 x i32> %120, i32 %108, i32 1
>  %122 = insertelement <3 x i32> %121, i32 %109, i32 2
>  %123 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %1, i32 0, i32 0
>  %124 = bitcast i8 addrspace(6)* %123 to <4 x i32> addrspace(6)*, !amdgpu.uniform !0
>  %125 = load <4 x i32>, <4 x i32> addrspace(6)* %124, !invariant.load !0
>  %126 = call float @llvm.SI.load.const.v4i32(<4 x i32> %125, i32 144)
>  %127 = call float @llvm.SI.load.const.v4i32(<4 x i32> %125, i32 148)
>  %128 = call float @llvm.SI.load.const.v4i32(<4 x i32> %125, i32 152)
>  %129 = call float @llvm.SI.load.const.v4i32(<4 x i32> %125, i32 156)
>  %130 = insertelement <4 x float> undef, float %126, i32 0
>  %131 = insertelement <4 x float> %130, float %127, i32 1
>  %132 = insertelement <4 x float> %131, float %128, i32 2
>  %133 = insertelement <4 x float> %132, float %129, i32 3
>  %134 = bitcast <4 x float> %133 to <4 x i32>
>  %135 = extractelement <3 x i32> %113, i32 1
>  %136 = extractelement <4 x i32> %134, i32 0
>  %137 = bitcast i32 %135 to float
>  %138 = bitcast i32 %136 to float
>  %139 = fmul float %137, %138
>  %140 = bitcast float %139 to i32
>  %141 = extractelement <3 x i32> %113, i32 1
>  %142 = extractelement <4 x i32> %134, i32 1
>  %143 = bitcast i32 %141 to float
>  %144 = bitcast i32 %142 to float
>  %145 = fmul float %143, %144
>  %146 = bitcast float %145 to i32
>  %147 = extractelement <3 x i32> %113, i32 1
>  %148 = extractelement <4 x i32> %134, i32 2
>  %149 = bitcast i32 %147 to float
>  %150 = bitcast i32 %148 to float
>  %151 = fmul float %149, %150
>  %152 = bitcast float %151 to i32
>  %153 = extractelement <3 x i32> %113, i32 1
>  %154 = extractelement <4 x i32> %134, i32 3
>  %155 = bitcast i32 %153 to float
>  %156 = bitcast i32 %154 to float
>  %157 = fmul float %155, %156
>  %158 = bitcast float %157 to i32
>  %159 = load <4 x i32>, <4 x i32> addrspace(6)* %124, !invariant.load !0
>  %160 = call float @llvm.SI.load.const.v4i32(<4 x i32> %159, i32 128)
>  %161 = call float @llvm.SI.load.const.v4i32(<4 x i32> %159, i32 132)
>  %162 = call float @llvm.SI.load.const.v4i32(<4 x i32> %159, i32 136)
>  %163 = call float @llvm.SI.load.const.v4i32(<4 x i32> %159, i32 140)
>  %164 = insertelement <4 x float> undef, float %160, i32 0
>  %165 = insertelement <4 x float> %164, float %161, i32 1
>  %166 = insertelement <4 x float> %165, float %162, i32 2
>  %167 = insertelement <4 x float> %166, float %163, i32 3
>  %168 = bitcast <4 x float> %167 to <4 x i32>
>  %169 = extractelement <3 x i32> %113, i32 0
>  %170 = extractelement <4 x i32> %168, i32 0
>  %171 = bitcast i32 %169 to float
>  %172 = bitcast i32 %170 to float
>  %173 = fmul float %171, %172
>  %174 = bitcast float %173 to i32
>  %175 = bitcast i32 %174 to float
>  %176 = bitcast i32 %140 to float
>  %177 = fadd float %175, %176
>  %178 = bitcast float %177 to i32
>  %179 = extractelement <3 x i32> %113, i32 0
>  %180 = extractelement <4 x i32> %168, i32 1
>  %181 = bitcast i32 %179 to float
>  %182 = bitcast i32 %180 to float
>  %183 = fmul float %181, %182
>  %184 = bitcast float %183 to i32
>  %185 = bitcast i32 %184 to float
>  %186 = bitcast i32 %146 to float
>  %187 = fadd float %185, %186
>  %188 = bitcast float %187 to i32
>  %189 = extractelement <3 x i32> %113, i32 0
>  %190 = extractelement <4 x i32> %168, i32 2
>  %191 = bitcast i32 %189 to float
>  %192 = bitcast i32 %190 to float
>  %193 = fmul float %191, %192
>  %194 = bitcast float %193 to i32
>  %195 = bitcast i32 %194 to float
>  %196 = bitcast i32 %152 to float
>  %197 = fadd float %195, %196
>  %198 = bitcast float %197 to i32
>  %199 = extractelement <3 x i32> %113, i32 0
>  %200 = extractelement <4 x i32> %168, i32 3
>  %201 = bitcast i32 %199 to float
>  %202 = bitcast i32 %200 to float
>  %203 = fmul float %201, %202
>  %204 = bitcast float %203 to i32
>  %205 = bitcast i32 %204 to float
>  %206 = bitcast i32 %158 to float
>  %207 = fadd float %205, %206
>  %208 = bitcast float %207 to i32
>  %209 = load <4 x i32>, <4 x i32> addrspace(6)* %124, !invariant.load !0
>  %210 = call float @llvm.SI.load.const.v4i32(<4 x i32> %209, i32 160)
>  %211 = call float @llvm.SI.load.const.v4i32(<4 x i32> %209, i32 164)
>  %212 = call float @llvm.SI.load.const.v4i32(<4 x i32> %209, i32 168)
>  %213 = call float @llvm.SI.load.const.v4i32(<4 x i32> %209, i32 172)
>  %214 = insertelement <4 x float> undef, float %210, i32 0
>  %215 = insertelement <4 x float> %214, float %211, i32 1
>  %216 = insertelement <4 x float> %215, float %212, i32 2
>  %217 = insertelement <4 x float> %216, float %213, i32 3
>  %218 = bitcast <4 x float> %217 to <4 x i32>
>  %219 = extractelement <3 x i32> %113, i32 2
>  %220 = extractelement <4 x i32> %218, i32 0
>  %221 = bitcast i32 %219 to float
>  %222 = bitcast i32 %220 to float
>  %223 = fmul float %221, %222
>  %224 = bitcast float %223 to i32
>  %225 = bitcast i32 %224 to float
>  %226 = bitcast i32 %178 to float
>  %227 = fadd float %225, %226
>  %228 = bitcast float %227 to i32
>  %229 = extractelement <3 x i32> %113, i32 2
>  %230 = extractelement <4 x i32> %218, i32 1
>  %231 = bitcast i32 %229 to float
>  %232 = bitcast i32 %230 to float
>  %233 = fmul float %231, %232
>  %234 = bitcast float %233 to i32
>  %235 = bitcast i32 %234 to float
>  %236 = bitcast i32 %188 to float
>  %237 = fadd float %235, %236
>  %238 = bitcast float %237 to i32
>  %239 = extractelement <3 x i32> %113, i32 2
>  %240 = extractelement <4 x i32> %218, i32 2
>  %241 = bitcast i32 %239 to float
>  %242 = bitcast i32 %240 to float
>  %243 = fmul float %241, %242
>  %244 = bitcast float %243 to i32
>  %245 = bitcast i32 %244 to float
>  %246 = bitcast i32 %198 to float
>  %247 = fadd float %245, %246
>  %248 = bitcast float %247 to i32
>  %249 = extractelement <3 x i32> %113, i32 2
>  %250 = extractelement <4 x i32> %218, i32 3
>  %251 = bitcast i32 %249 to float
>  %252 = bitcast i32 %250 to float
>  %253 = fmul float %251, %252
>  %254 = bitcast float %253 to i32
>  %255 = bitcast i32 %254 to float
>  %256 = bitcast i32 %208 to float
>  %257 = fadd float %255, %256
>  %258 = bitcast float %257 to i32
>  %259 = load <4 x i32>, <4 x i32> addrspace(6)* %124, !invariant.load !0
>  %260 = call float @llvm.SI.load.const.v4i32(<4 x i32> %259, i32 176)
>  %261 = call float @llvm.SI.load.const.v4i32(<4 x i32> %259, i32 180)
>  %262 = call float @llvm.SI.load.const.v4i32(<4 x i32> %259, i32 184)
>  %263 = call float @llvm.SI.load.const.v4i32(<4 x i32> %259, i32 188)
>  %264 = insertelement <4 x float> undef, float %260, i32 0
>  %265 = insertelement <4 x float> %264, float %261, i32 1
>  %266 = insertelement <4 x float> %265, float %262, i32 2
>  %267 = insertelement <4 x float> %266, float %263, i32 3
>  %268 = bitcast <4 x float> %267 to <4 x i32>
>  %269 = extractelement <4 x i32> %268, i32 0
>  %270 = bitcast i32 %228 to float
>  %271 = bitcast i32 %269 to float
>  %272 = fadd float %270, %271
>  %273 = bitcast float %272 to i32
>  %274 = extractelement <4 x i32> %268, i32 1
>  %275 = bitcast i32 %238 to float
>  %276 = bitcast i32 %274 to float
>  %277 = fadd float %275, %276
>  %278 = bitcast float %277 to i32
>  %279 = extractelement <4 x i32> %268, i32 2
>  %280 = bitcast i32 %248 to float
>  %281 = bitcast i32 %279 to float
>  %282 = fadd float %280, %281
>  %283 = bitcast float %282 to i32
>  %284 = extractelement <4 x i32> %268, i32 3
>  %285 = bitcast i32 %258 to float
>  %286 = bitcast i32 %284 to float
>  %287 = fadd float %285, %286
>  %288 = bitcast float %287 to i32
>  %289 = load <4 x i32>, <4 x i32> addrspace(6)* %124, !invariant.load !0
>  %290 = call float @llvm.SI.load.const.v4i32(<4 x i32> %289, i32 16)
>  %291 = call float @llvm.SI.load.const.v4i32(<4 x i32> %289, i32 20)
>  %292 = call float @llvm.SI.load.const.v4i32(<4 x i32> %289, i32 24)
>  %293 = call float @llvm.SI.load.const.v4i32(<4 x i32> %289, i32 28)
>  %294 = insertelement <4 x float> undef, float %290, i32 0
>  %295 = insertelement <4 x float> %294, float %291, i32 1
>  %296 = insertelement <4 x float> %295, float %292, i32 2
>  %297 = insertelement <4 x float> %296, float %293, i32 3
>  %298 = bitcast <4 x float> %297 to <4 x i32>
>  %299 = extractelement <3 x i32> %113, i32 1
>  %300 = extractelement <4 x i32> %298, i32 0
>  %301 = bitcast i32 %299 to float
>  %302 = bitcast i32 %300 to float
>  %303 = fmul float %301, %302
>  %304 = bitcast float %303 to i32
>  %305 = extractelement <3 x i32> %113, i32 1
>  %306 = extractelement <4 x i32> %298, i32 1
>  %307 = bitcast i32 %305 to float
>  %308 = bitcast i32 %306 to float
>  %309 = fmul float %307, %308
>  %310 = bitcast float %309 to i32
>  %311 = extractelement <3 x i32> %113, i32 1
>  %312 = extractelement <4 x i32> %298, i32 2
>  %313 = bitcast i32 %311 to float
>  %314 = bitcast i32 %312 to float
>  %315 = fmul float %313, %314
>  %316 = bitcast float %315 to i32
>  %317 = load <4 x i32>, <4 x i32> addrspace(6)* %124, !invariant.load !0
>  %318 = call float @llvm.SI.load.const.v4i32(<4 x i32> %317, i32 0)
>  %319 = call float @llvm.SI.load.const.v4i32(<4 x i32> %317, i32 4)
>  %320 = call float @llvm.SI.load.const.v4i32(<4 x i32> %317, i32 8)
>  %321 = call float @llvm.SI.load.const.v4i32(<4 x i32> %317, i32 12)
>  %322 = insertelement <4 x float> undef, float %318, i32 0
>  %323 = insertelement <4 x float> %322, float %319, i32 1
>  %324 = insertelement <4 x float> %323, float %320, i32 2
>  %325 = insertelement <4 x float> %324, float %321, i32 3
>  %326 = bitcast <4 x float> %325 to <4 x i32>
>  %327 = extractelement <3 x i32> %113, i32 0
>  %328 = extractelement <4 x i32> %326, i32 0
>  %329 = bitcast i32 %327 to float
>  %330 = bitcast i32 %328 to float
>  %331 = fmul float %329, %330
>  %332 = bitcast float %331 to i32
>  %333 = bitcast i32 %332 to float
>  %334 = bitcast i32 %304 to float
>  %335 = fadd float %333, %334
>  %336 = bitcast float %335 to i32
>  %337 = extractelement <3 x i32> %113, i32 0
>  %338 = extractelement <4 x i32> %326, i32 1
>  %339 = bitcast i32 %337 to float
>  %340 = bitcast i32 %338 to float
>  %341 = fmul float %339, %340
>  %342 = bitcast float %341 to i32
>  %343 = bitcast i32 %342 to float
>  %344 = bitcast i32 %310 to float
>  %345 = fadd float %343, %344
>  %346 = bitcast float %345 to i32
>  %347 = extractelement <3 x i32> %113, i32 0
>  %348 = extractelement <4 x i32> %326, i32 2
>  %349 = bitcast i32 %347 to float
>  %350 = bitcast i32 %348 to float
>  %351 = fmul float %349, %350
>  %352 = bitcast float %351 to i32
>  %353 = bitcast i32 %352 to float
>  %354 = bitcast i32 %316 to float
>  %355 = fadd float %353, %354
>  %356 = bitcast float %355 to i32
>  %357 = load <4 x i32>, <4 x i32> addrspace(6)* %124, !invariant.load !0
>  %358 = call float @llvm.SI.load.const.v4i32(<4 x i32> %357, i32 32)
>  %359 = call float @llvm.SI.load.const.v4i32(<4 x i32> %357, i32 36)
>  %360 = call float @llvm.SI.load.const.v4i32(<4 x i32> %357, i32 40)
>  %361 = call float @llvm.SI.load.const.v4i32(<4 x i32> %357, i32 44)
>  %362 = insertelement <4 x float> undef, float %358, i32 0
>  %363 = insertelement <4 x float> %362, float %359, i32 1
>  %364 = insertelement <4 x float> %363, float %360, i32 2
>  %365 = insertelement <4 x float> %364, float %361, i32 3
>  %366 = bitcast <4 x float> %365 to <4 x i32>
>  %367 = extractelement <3 x i32> %113, i32 2
>  %368 = extractelement <4 x i32> %366, i32 0
>  %369 = bitcast i32 %367 to float
>  %370 = bitcast i32 %368 to float
>  %371 = fmul float %369, %370
>  %372 = bitcast float %371 to i32
>  %373 = bitcast i32 %372 to float
>  %374 = bitcast i32 %336 to float
>  %375 = fadd float %373, %374
>  %376 = bitcast float %375 to i32
>  %377 = extractelement <3 x i32> %113, i32 2
>  %378 = extractelement <4 x i32> %366, i32 1
>  %379 = bitcast i32 %377 to float
>  %380 = bitcast i32 %378 to float
>  %381 = fmul float %379, %380
>  %382 = bitcast float %381 to i32
>  %383 = bitcast i32 %382 to float
>  %384 = bitcast i32 %346 to float
>  %385 = fadd float %383, %384
>  %386 = bitcast float %385 to i32
>  %387 = extractelement <3 x i32> %113, i32 2
>  %388 = extractelement <4 x i32> %366, i32 2
>  %389 = bitcast i32 %387 to float
>  %390 = bitcast i32 %388 to float
>  %391 = fmul float %389, %390
>  %392 = bitcast float %391 to i32
>  %393 = bitcast i32 %392 to float
>  %394 = bitcast i32 %356 to float
>  %395 = fadd float %393, %394
>  %396 = bitcast float %395 to i32
>  %397 = load <4 x i32>, <4 x i32> addrspace(6)* %124, !invariant.load !0
>  %398 = call float @llvm.SI.load.const.v4i32(<4 x i32> %397, i32 48)
>  %399 = call float @llvm.SI.load.const.v4i32(<4 x i32> %397, i32 52)
>  %400 = call float @llvm.SI.load.const.v4i32(<4 x i32> %397, i32 56)
>  %401 = call float @llvm.SI.load.const.v4i32(<4 x i32> %397, i32 60)
>  %402 = insertelement <4 x float> undef, float %398, i32 0
>  %403 = insertelement <4 x float> %402, float %399, i32 1
>  %404 = insertelement <4 x float> %403, float %400, i32 2
>  %405 = insertelement <4 x float> %404, float %401, i32 3
>  %406 = bitcast <4 x float> %405 to <4 x i32>
>  %407 = extractelement <4 x i32> %406, i32 0
>  %408 = bitcast i32 %376 to float
>  %409 = bitcast i32 %407 to float
>  %410 = fadd float %408, %409
>  %411 = bitcast float %410 to i32
>  %412 = extractelement <4 x i32> %406, i32 1
>  %413 = bitcast i32 %386 to float
>  %414 = bitcast i32 %412 to float
>  %415 = fadd float %413, %414
>  %416 = bitcast float %415 to i32
>  %417 = extractelement <4 x i32> %406, i32 2
>  %418 = bitcast i32 %396 to float
>  %419 = bitcast i32 %417 to float
>  %420 = fadd float %418, %419
>  %421 = bitcast float %420 to i32
>  %422 = bitcast i32 %411 to float
>  %423 = fsub float -0.000000e+00, %422
>  %424 = bitcast float %423 to i32
>  %425 = bitcast i32 %416 to float
>  %426 = fsub float -0.000000e+00, %425
>  %427 = bitcast float %426 to i32
>  %428 = bitcast i32 %421 to float
>  %429 = fsub float -0.000000e+00, %428
>  %430 = bitcast float %429 to i32
>  %431 = load <4 x i32>, <4 x i32> addrspace(6)* %124, !invariant.load !0
>  %432 = call float @llvm.SI.load.const.v4i32(<4 x i32> %431, i32 240)
>  %433 = call float @llvm.SI.load.const.v4i32(<4 x i32> %431, i32 244)
>  %434 = call float @llvm.SI.load.const.v4i32(<4 x i32> %431, i32 248)
>  %435 = call float @llvm.SI.load.const.v4i32(<4 x i32> %431, i32 252)
>  %436 = insertelement <4 x float> undef, float %432, i32 0
>  %437 = insertelement <4 x float> %436, float %433, i32 1
>  %438 = insertelement <4 x float> %437, float %434, i32 2
>  %439 = insertelement <4 x float> %438, float %435, i32 3
>  %440 = bitcast <4 x float> %439 to <4 x i32>
>  %441 = extractelement <4 x i32> %440, i32 0
>  %442 = bitcast i32 %424 to float
>  %443 = bitcast i32 %441 to float
>  %444 = fadd float %442, %443
>  %445 = bitcast float %444 to i32
>  %446 = extractelement <4 x i32> %440, i32 1
>  %447 = bitcast i32 %427 to float
>  %448 = bitcast i32 %446 to float
>  %449 = fadd float %447, %448
>  %450 = bitcast float %449 to i32
>  %451 = extractelement <4 x i32> %440, i32 2
>  %452 = bitcast i32 %430 to float
>  %453 = bitcast i32 %451 to float
>  %454 = fadd float %452, %453
>  %455 = bitcast float %454 to i32
>  %456 = bitcast i32 %445 to float
>  %457 = bitcast i32 %445 to float
>  %458 = fmul float %456, %457
>  %459 = bitcast float %458 to i32
>  %460 = bitcast i32 %450 to float
>  %461 = bitcast i32 %450 to float
>  %462 = fmul float %460, %461
>  %463 = bitcast float %462 to i32
>  %464 = bitcast i32 %459 to float
>  %465 = bitcast i32 %463 to float
>  %466 = fadd float %464, %465
>  %467 = bitcast float %466 to i32
>  %468 = bitcast i32 %455 to float
>  %469 = bitcast i32 %455 to float
>  %470 = fmul float %468, %469
>  %471 = bitcast float %470 to i32
>  %472 = bitcast i32 %467 to float
>  %473 = bitcast i32 %471 to float
>  %474 = fadd float %472, %473
>  %475 = bitcast float %474 to i32
>  %476 = bitcast i32 %475 to float
>  %477 = fmul float %476, 0x3ED0C6F7A0000000
>  %478 = bitcast float %477 to i32
>  %479 = bitcast i32 %478 to float
>  %480 = call float @llvm.minnum.f32(float %479, float 1.000000e+00) #2
>  %481 = call float @llvm.canonicalize.f32(float %480) #2
>  %482 = bitcast float %481 to i32
>  %483 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %1, i32 0, i32 16
>  %484 = bitcast i8 addrspace(6)* %483 to <4 x i32> addrspace(6)*, !amdgpu.uniform !0
>  %485 = load <4 x i32>, <4 x i32> addrspace(6)* %484, !invariant.load !0
>  %486 = call float @llvm.SI.load.const.v4i32(<4 x i32> %485, i32 208)
>  %487 = call float @llvm.SI.load.const.v4i32(<4 x i32> %485, i32 212)
>  %488 = call float @llvm.SI.load.const.v4i32(<4 x i32> %485, i32 216)
>  %489 = call float @llvm.SI.load.const.v4i32(<4 x i32> %485, i32 220)
>  %490 = insertelement <4 x float> undef, float %486, i32 0
>  %491 = insertelement <4 x float> %490, float %487, i32 1
>  %492 = insertelement <4 x float> %491, float %488, i32 2
>  %493 = insertelement <4 x float> %492, float %489, i32 3
>  %494 = bitcast <4 x float> %493 to <4 x i32>
>  %495 = extractelement <4 x i32> %494, i32 2
>  %496 = bitcast i32 %495 to float
>  %497 = fsub float -0.000000e+00, %496
>  %498 = bitcast float %497 to i32
>  %499 = bitcast i32 %482 to float
>  %500 = bitcast i32 %498 to float
>  %501 = fadd float %499, %500
>  %502 = bitcast float %501 to i32
>  %503 = bitcast i32 %502 to float
>  %504 = call float @llvm.maxnum.f32(float %503, float 0.000000e+00) #2
>  %505 = call float @llvm.canonicalize.f32(float %504) #2
>  %506 = bitcast float %505 to i32
>  %507 = bitcast i32 %506 to float
>  %508 = call float @llvm.minnum.f32(float %507, float 1.000000e+00) #2
>  %509 = call float @llvm.canonicalize.f32(float %508) #2
>  %510 = bitcast float %509 to i32
>  %511 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %1, i32 0, i32 32
>  %512 = bitcast i8 addrspace(6)* %511 to <4 x i32> addrspace(6)*, !amdgpu.uniform !0
>  %513 = load <4 x i32>, <4 x i32> addrspace(6)* %512, !invariant.load !0
>  %514 = call float @llvm.SI.load.const.v4i32(<4 x i32> %513, i32 784)
>  %515 = call float @llvm.SI.load.const.v4i32(<4 x i32> %513, i32 788)
>  %516 = call float @llvm.SI.load.const.v4i32(<4 x i32> %513, i32 792)
>  %517 = call float @llvm.SI.load.const.v4i32(<4 x i32> %513, i32 796)
>  %518 = insertelement <4 x float> undef, float %514, i32 0
>  %519 = insertelement <4 x float> %518, float %515, i32 1
>  %520 = insertelement <4 x float> %519, float %516, i32 2
>  %521 = insertelement <4 x float> %520, float %517, i32 3
>  %522 = bitcast <4 x float> %521 to <4 x i32>
>  %523 = extractelement <4 x i32> %522, i32 3
>  %524 = bitcast i32 %523 to float
>  %525 = fadd float %524, -1.000000e+00
>  %526 = bitcast float %525 to i32
>  %527 = bitcast i32 %510 to float
>  %528 = bitcast i32 %526 to float
>  %529 = fmul float %527, %528
>  %530 = bitcast float %529 to i32
>  %531 = bitcast i32 %530 to float
>  %532 = fadd float %531, 1.000000e+00
>  %533 = bitcast float %532 to i32
>  %534 = extractelement <4 x i32> %117, i32 0
>  %535 = bitcast i32 %533 to float
>  %536 = bitcast i32 %534 to float
>  %537 = fmul float %535, %536
>  %538 = bitcast float %537 to i32
>  %539 = bitcast i32 %538 to float
>  %540 = call float @llvm.maxnum.f32(float %539, float 0.000000e+00) #2
>  %541 = call float @llvm.canonicalize.f32(float %540) #2
>  %542 = bitcast float %541 to i32
>  %543 = bitcast i32 %542 to float
>  %544 = call float @llvm.minnum.f32(float %543, float 1.000000e+00) #2
>  %545 = call float @llvm.canonicalize.f32(float %544) #2
>  %546 = bitcast float %545 to i32
>  %547 = extractelement <3 x i32> %122, i32 0
>  %548 = extractelement <3 x i32> %122, i32 0
>  %549 = bitcast i32 %547 to float
>  %550 = bitcast i32 %548 to float
>  %551 = fmul float %549, %550
>  %552 = bitcast float %551 to i32
>  %553 = extractelement <3 x i32> %122, i32 1
>  %554 = extractelement <3 x i32> %122, i32 1
>  %555 = bitcast i32 %553 to float
>  %556 = bitcast i32 %554 to float
>  %557 = fmul float %555, %556
>  %558 = bitcast float %557 to i32
>  %559 = bitcast i32 %552 to float
>  %560 = bitcast i32 %558 to float
>  %561 = fadd float %559, %560
>  %562 = bitcast float %561 to i32
>  %563 = extractelement <3 x i32> %122, i32 2
>  %564 = extractelement <3 x i32> %122, i32 2
>  %565 = bitcast i32 %563 to float
>  %566 = bitcast i32 %564 to float
>  %567 = fmul float %565, %566
>  %568 = bitcast float %567 to i32
>  %569 = bitcast i32 %562 to float
>  %570 = bitcast i32 %568 to float
>  %571 = fadd float %569, %570
>  %572 = bitcast float %571 to i32
>  %573 = bitcast i32 %572 to float
>  %574 = fcmp olt float %573, 0x3FB99999A0000000
>  %575 = select i1 %574, i32 -1, i32 0
>  %576 = extractelement <3 x i32> %122, i32 0
>  %577 = icmp ne i32 %575, 0
>  %578 = select i1 %577, i32 0, i32 %576
>  %579 = extractelement <3 x i32> %122, i32 1
>  %580 = icmp ne i32 %575, 0
>  %581 = select i1 %580, i32 0, i32 %579
>  %582 = extractelement <3 x i32> %122, i32 2
>  %583 = icmp ne i32 %575, 0
>  %584 = select i1 %583, i32 1065353216, i32 %582
>  %585 = extractelement <4 x i32> %298, i32 0
>  %586 = bitcast i32 %581 to float
>  %587 = bitcast i32 %585 to float
>  %588 = fmul float %586, %587
>  %589 = bitcast float %588 to i32
>  %590 = extractelement <4 x i32> %298, i32 1
>  %591 = bitcast i32 %581 to float
>  %592 = bitcast i32 %590 to float
>  %593 = fmul float %591, %592
>  %594 = bitcast float %593 to i32
>  %595 = extractelement <4 x i32> %298, i32 2
>  %596 = bitcast i32 %581 to float
>  %597 = bitcast i32 %595 to float
>  %598 = fmul float %596, %597
>  %599 = bitcast float %598 to i32
>  %600 = extractelement <4 x i32> %326, i32 0
>  %601 = bitcast i32 %578 to float
>  %602 = bitcast i32 %600 to float
>  %603 = fmul float %601, %602
>  %604 = bitcast float %603 to i32
>  %605 = bitcast i32 %604 to float
>  %606 = bitcast i32 %589 to float
>  %607 = fadd float %605, %606
>  %608 = bitcast float %607 to i32
>  %609 = extractelement <4 x i32> %326, i32 1
>  %610 = bitcast i32 %578 to float
>  %611 = bitcast i32 %609 to float
>  %612 = fmul float %610, %611
>  %613 = bitcast float %612 to i32
>  %614 = bitcast i32 %613 to float
>  %615 = bitcast i32 %594 to float
>  %616 = fadd float %614, %615
>  %617 = bitcast float %616 to i32
>  %618 = extractelement <4 x i32> %326, i32 2
>  %619 = bitcast i32 %578 to float
>  %620 = bitcast i32 %618 to float
>  %621 = fmul float %619, %620
>  %622 = bitcast float %621 to i32
>  %623 = bitcast i32 %622 to float
>  %624 = bitcast i32 %599 to float
>  %625 = fadd float %623, %624
>  %626 = bitcast float %625 to i32
>  %627 = extractelement <4 x i32> %366, i32 0
>  %628 = bitcast i32 %584 to float
>  %629 = bitcast i32 %627 to float
>  %630 = fmul float %628, %629
>  %631 = bitcast float %630 to i32
>  %632 = bitcast i32 %631 to float
>  %633 = bitcast i32 %608 to float
>  %634 = fadd float %632, %633
>  %635 = bitcast float %634 to i32
>  %636 = extractelement <4 x i32> %366, i32 1
>  %637 = bitcast i32 %584 to float
>  %638 = bitcast i32 %636 to float
>  %639 = fmul float %637, %638
>  %640 = bitcast float %639 to i32
>  %641 = bitcast i32 %640 to float
>  %642 = bitcast i32 %617 to float
>  %643 = fadd float %641, %642
>  %644 = bitcast float %643 to i32
>  %645 = extractelement <4 x i32> %366, i32 2
>  %646 = bitcast i32 %584 to float
>  %647 = bitcast i32 %645 to float
>  %648 = fmul float %646, %647
>  %649 = bitcast float %648 to i32
>  %650 = bitcast i32 %649 to float
>  %651 = bitcast i32 %626 to float
>  %652 = fadd float %650, %651
>  %653 = bitcast float %652 to i32
>  %654 = bitcast i32 %635 to float
>  %655 = bitcast i32 %635 to float
>  %656 = fmul float %654, %655
>  %657 = bitcast float %656 to i32
>  %658 = bitcast i32 %644 to float
>  %659 = bitcast i32 %644 to float
>  %660 = fmul float %658, %659
>  %661 = bitcast float %660 to i32
>  %662 = bitcast i32 %657 to float
>  %663 = bitcast i32 %661 to float
>  %664 = fadd float %662, %663
>  %665 = bitcast float %664 to i32
>  %666 = bitcast i32 %653 to float
>  %667 = bitcast i32 %653 to float
>  %668 = fmul float %666, %667
>  %669 = bitcast float %668 to i32
>  %670 = bitcast i32 %665 to float
>  %671 = bitcast i32 %669 to float
>  %672 = fadd float %670, %671
>  %673 = bitcast float %672 to i32
>  %674 = bitcast i32 %673 to float
>  %675 = call float @llvm.sqrt.f32(float %674) #2
>  %676 = fdiv float 1.000000e+00, %675, !fpmath !1
>  %677 = bitcast float %676 to i32
>  %678 = bitcast i32 %677 to float
>  %679 = bitcast i32 %635 to float
>  %680 = fmul float %678, %679
>  %681 = bitcast float %680 to i32
>  %682 = bitcast i32 %677 to float
>  %683 = bitcast i32 %644 to float
>  %684 = fmul float %682, %683
>  %685 = bitcast float %684 to i32
>  %686 = bitcast i32 %677 to float
>  %687 = bitcast i32 %653 to float
>  %688 = fmul float %686, %687
>  %689 = bitcast float %688 to i32
>  %690 = insertelement <4 x i32> undef, i32 %273, i32 0
>  %691 = insertelement <4 x i32> %690, i32 %278, i32 1
>  %692 = insertelement <4 x i32> %691, i32 %283, i32 2
>  %693 = insertelement <4 x i32> %692, i32 %288, i32 3
>  %694 = bitcast i32 %546 to float
>  store float %694, float addrspace(5)* %24
>  %695 = extractelement <4 x i32> %117, i32 3
>  %696 = bitcast i32 %695 to float
>  store float %696, float addrspace(5)* %21
>  %697 = extractelement <2 x i32> %119, i32 0
>  %698 = bitcast i32 %697 to float
>  store float %698, float addrspace(5)* %23
>  %699 = extractelement <2 x i32> %119, i32 1
>  %700 = bitcast i32 %699 to float
>  store float %700, float addrspace(5)* %22
>  %701 = bitcast i32 %681 to float
>  store float %701, float addrspace(5)* %12
>  %702 = bitcast i32 %685 to float
>  store float %702, float addrspace(5)* %11
>  %703 = bitcast i32 %689 to float
>  store float %703, float addrspace(5)* %10
>  %704 = bitcast <4 x i32> %693 to <4 x float>
>  %705 = extractelement <4 x float> %704, i32 0
>  store float %705, float addrspace(5)* %40
>  %706 = extractelement <4 x float> %704, i32 1
>  store float %706, float addrspace(5)* %39
>  %707 = extractelement <4 x float> %704, i32 2
>  store float %707, float addrspace(5)* %38
>  %708 = extractelement <4 x float> %704, i32 3
>  store float %708, float addrspace(5)* %37
>  %709 = load float, float addrspace(5)* %40
>  %710 = load float, float addrspace(5)* %39
>  %711 = load float, float addrspace(5)* %38
>  %712 = load float, float addrspace(5)* %37
>  call void @llvm.amdgcn.exp.f32(i32 12, i32 15, float %709, float %710, float %711, float %712, i1 true, i1 false) #3
>  %713 = load float, float addrspace(5)* %24
>  %714 = load float, float addrspace(5)* %23
>  %715 = load float, float addrspace(5)* %22
>  %716 = load float, float addrspace(5)* %21
>  call void @llvm.amdgcn.exp.f32(i32 32, i32 15, float %713, float %714, float %715, float %716, i1 false, i1 false) #3
>  %717 = load float, float addrspace(5)* %12
>  %718 = load float, float addrspace(5)* %11
>  %719 = load float, float addrspace(5)* %10
>  %720 = load float, float addrspace(5)* %9
>  call void @llvm.amdgcn.exp.f32(i32 33, i32 7, float %717, float %718, float %719, float %720, i1 false, i1 false) #3
>  ret void
>}
>
>; Function Attrs: nounwind readnone speculatable
>declare i8 addrspace(4)* @llvm.amdgcn.implicit.buffer.ptr() #0
>
>; Function Attrs: nounwind readonly
>declare <4 x float> @llvm.amdgcn.buffer.load.format.v4f32(<4 x i32>, i32, i32, i1, i1) #1
>
>; Function Attrs: nounwind readonly
>declare <2 x float> @llvm.amdgcn.buffer.load.format.v2f32(<4 x i32>, i32, i32, i1, i1) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const.v4i32(<4 x i32>, i32) #2
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.minnum.f32(float, float) #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.canonicalize.f32(float) #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.maxnum.f32(float, float) #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.sqrt.f32(float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #3
>
>attributes #0 = { nounwind readnone speculatable }
>attributes #1 = { nounwind readonly }
>attributes #2 = { nounwind readnone }
>attributes #3 = { nounwind }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>; ModuleID = 'mesa-shader'
>source_filename = "mesa-shader"
>target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
>target triple = "amdgcn-mesa-mesa3d"
>
>define amdgpu_vs void @main([0 x i8] addrspace(6)* inreg noalias dereferenceable(18446744073709551615), [0 x i8] addrspace(6)* inreg noalias dereferenceable(18446744073709551615), [0 x <4 x i32>] addrspace(6)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) {
>main_body:
>  %9 = add i32 %5, %3
>  %10 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(6)* %2, i32 0, i32 0, !amdgpu.uniform !0
>  %11 = load <4 x i32>, <4 x i32> addrspace(6)* %10, align 16, !invariant.load !0
>  %12 = call <4 x float> @llvm.amdgcn.buffer.load.format.v4f32(<4 x i32> %11, i32 %9, i32 0, i1 false, i1 false) #2
>  %13 = extractelement <4 x float> %12, i32 0
>  %14 = extractelement <4 x float> %12, i32 1
>  %15 = extractelement <4 x float> %12, i32 2
>  %16 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(6)* %2, i32 0, i32 1, !amdgpu.uniform !0
>  %17 = load <4 x i32>, <4 x i32> addrspace(6)* %16, align 16, !invariant.load !0
>  %18 = call <4 x float> @llvm.amdgcn.buffer.load.format.v4f32(<4 x i32> %17, i32 %9, i32 0, i1 false, i1 false) #2
>  %19 = extractelement <4 x float> %18, i32 0
>  %20 = extractelement <4 x float> %18, i32 3
>  %21 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(6)* %2, i32 0, i32 2, !amdgpu.uniform !0
>  %22 = load <4 x i32>, <4 x i32> addrspace(6)* %21, align 16, !invariant.load !0
>  %23 = call <2 x float> @llvm.amdgcn.buffer.load.format.v2f32(<4 x i32> %22, i32 %9, i32 0, i1 false, i1 false) #2
>  %24 = extractelement <2 x float> %23, i32 0
>  %25 = extractelement <2 x float> %23, i32 1
>  %26 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(6)* %2, i32 0, i32 3, !amdgpu.uniform !0
>  %27 = load <4 x i32>, <4 x i32> addrspace(6)* %26, align 16, !invariant.load !0
>  %28 = call <4 x float> @llvm.amdgcn.buffer.load.format.v4f32(<4 x i32> %27, i32 %9, i32 0, i1 false, i1 false) #2
>  %29 = extractelement <4 x float> %28, i32 0
>  %30 = extractelement <4 x float> %28, i32 1
>  %31 = extractelement <4 x float> %28, i32 2
>  %32 = bitcast [0 x i8] addrspace(6)* %1 to <4 x i32> addrspace(6)*, !amdgpu.uniform !0
>  %33 = load <4 x i32>, <4 x i32> addrspace(6)* %32, align 16, !invariant.load !0
>  %34 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 144)
>  %35 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 148)
>  %36 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 152)
>  %37 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 156)
>  %38 = fmul float %14, %34
>  %39 = fmul float %14, %35
>  %40 = fmul float %14, %36
>  %41 = fmul float %14, %37
>  %42 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 128)
>  %43 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 132)
>  %44 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 136)
>  %45 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 140)
>  %46 = fmul float %13, %42
>  %47 = fadd float %46, %38
>  %48 = fmul float %13, %43
>  %49 = fadd float %48, %39
>  %50 = fmul float %13, %44
>  %51 = fadd float %50, %40
>  %52 = fmul float %13, %45
>  %53 = fadd float %52, %41
>  %54 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 160)
>  %55 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 164)
>  %56 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 168)
>  %57 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 172)
>  %58 = fmul float %15, %54
>  %59 = fadd float %58, %47
>  %60 = fmul float %15, %55
>  %61 = fadd float %60, %49
>  %62 = fmul float %15, %56
>  %63 = fadd float %62, %51
>  %64 = fmul float %15, %57
>  %65 = fadd float %64, %53
>  %66 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 176)
>  %67 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 180)
>  %68 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 184)
>  %69 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 188)
>  %70 = fadd float %59, %66
>  %71 = fadd float %61, %67
>  %72 = fadd float %63, %68
>  %73 = fadd float %65, %69
>  %74 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 16)
>  %75 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 20)
>  %76 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 24)
>  %77 = fmul float %14, %74
>  %78 = fmul float %14, %75
>  %79 = fmul float %14, %76
>  %80 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 0)
>  %81 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 4)
>  %82 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 8)
>  %83 = fmul float %13, %80
>  %84 = fadd float %83, %77
>  %85 = fmul float %13, %81
>  %86 = fadd float %85, %78
>  %87 = fmul float %13, %82
>  %88 = fadd float %87, %79
>  %89 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 32)
>  %90 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 36)
>  %91 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 40)
>  %92 = fmul float %15, %89
>  %93 = fadd float %92, %84
>  %94 = fmul float %15, %90
>  %95 = fadd float %94, %86
>  %96 = fmul float %15, %91
>  %97 = fadd float %96, %88
>  %98 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 48)
>  %99 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 52)
>  %100 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 56)
>  %101 = fadd float %93, %98
>  %102 = fadd float %95, %99
>  %103 = fadd float %97, %100
>  %104 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 240)
>  %105 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 244)
>  %106 = call float @llvm.SI.load.const.v4i32(<4 x i32> %33, i32 248)
>  %107 = fsub float %104, %101
>  %108 = fsub float %105, %102
>  %109 = fsub float %106, %103
>  %110 = fmul float %107, %107
>  %111 = fmul float %108, %108
>  %112 = fadd float %110, %111
>  %113 = fmul float %109, %109
>  %114 = fadd float %112, %113
>  %115 = fmul float %114, 0x3ED0C6F7A0000000
>  %116 = call float @llvm.minnum.f32(float %115, float 1.000000e+00) #2
>  %117 = call float @llvm.canonicalize.f32(float %116) #2
>  %118 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %1, i32 0, i32 16
>  %119 = bitcast i8 addrspace(6)* %118 to <4 x i32> addrspace(6)*, !amdgpu.uniform !0
>  %120 = load <4 x i32>, <4 x i32> addrspace(6)* %119, align 16, !invariant.load !0
>  %121 = call float @llvm.SI.load.const.v4i32(<4 x i32> %120, i32 216)
>  %122 = fsub float %117, %121
>  %123 = call float @llvm.maxnum.f32(float %122, float 0.000000e+00) #2
>  %124 = call float @llvm.canonicalize.f32(float %123) #2
>  %125 = call float @llvm.minnum.f32(float %124, float 1.000000e+00) #2
>  %126 = call float @llvm.canonicalize.f32(float %125) #2
>  %127 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %1, i32 0, i32 32
>  %128 = bitcast i8 addrspace(6)* %127 to <4 x i32> addrspace(6)*, !amdgpu.uniform !0
>  %129 = load <4 x i32>, <4 x i32> addrspace(6)* %128, align 16, !invariant.load !0
>  %130 = call float @llvm.SI.load.const.v4i32(<4 x i32> %129, i32 796)
>  %131 = fadd float %130, -1.000000e+00
>  %132 = fmul float %126, %131
>  %133 = fadd float %132, 1.000000e+00
>  %134 = fmul float %133, %19
>  %135 = call float @llvm.maxnum.f32(float %134, float 0.000000e+00) #2
>  %136 = call float @llvm.canonicalize.f32(float %135) #2
>  %137 = call float @llvm.minnum.f32(float %136, float 1.000000e+00) #2
>  %138 = call float @llvm.canonicalize.f32(float %137) #2
>  %139 = fmul float %29, %29
>  %140 = fmul float %30, %30
>  %141 = fadd float %139, %140
>  %142 = fmul float %31, %31
>  %143 = fadd float %141, %142
>  %144 = fcmp olt float %143, 0x3FB99999A0000000
>  %145 = select i1 %144, float 0.000000e+00, float %30
>  %146 = fmul float %145, %74
>  %147 = fmul float %145, %75
>  %148 = fmul float %145, %76
>  %149 = select i1 %144, float 0.000000e+00, float %29
>  %150 = fmul float %149, %80
>  %151 = fadd float %150, %146
>  %152 = fmul float %149, %81
>  %153 = fadd float %152, %147
>  %154 = fmul float %149, %82
>  %155 = fadd float %154, %148
>  %156 = select i1 %144, float 1.000000e+00, float %31
>  %157 = fmul float %156, %89
>  %158 = fadd float %157, %151
>  %159 = fmul float %156, %90
>  %160 = fadd float %159, %153
>  %161 = fmul float %156, %91
>  %162 = fadd float %161, %155
>  %163 = fmul float %158, %158
>  %164 = fmul float %160, %160
>  %165 = fadd float %163, %164
>  %166 = fmul float %162, %162
>  %167 = fadd float %165, %166
>  %168 = call float @llvm.sqrt.f32(float %167) #2
>  %169 = fdiv float 1.000000e+00, %168, !fpmath !1
>  %170 = fmul float %169, %158
>  %171 = fmul float %169, %160
>  %172 = fmul float %169, %162
>  call void @llvm.amdgcn.exp.f32(i32 12, i32 15, float %70, float %71, float %72, float %73, i1 true, i1 false) #3
>  call void @llvm.amdgcn.exp.f32(i32 32, i32 15, float %138, float %24, float %25, float %20, i1 false, i1 false) #3
>  call void @llvm.amdgcn.exp.f32(i32 33, i32 7, float %170, float %171, float %172, float undef, i1 false, i1 false) #3
>  ret void
>}
>
>; Function Attrs: nounwind readnone speculatable
>declare i8 addrspace(4)* @llvm.amdgcn.implicit.buffer.ptr() #0
>
>; Function Attrs: nounwind readonly
>declare <4 x float> @llvm.amdgcn.buffer.load.format.v4f32(<4 x i32>, i32, i32, i1, i1) #1
>
>; Function Attrs: nounwind readonly
>declare <2 x float> @llvm.amdgcn.buffer.load.format.v2f32(<4 x i32>, i32, i32, i1, i1) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const.v4i32(<4 x i32>, i32) #2
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.minnum.f32(float, float) #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.canonicalize.f32(float) #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.maxnum.f32(float, float) #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.sqrt.f32(float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #3
>
>attributes #0 = { nounwind readnone speculatable }
>attributes #1 = { nounwind readonly }
>attributes #2 = { nounwind readnone }
>attributes #3 = { nounwind }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>disasm:
>main:
>BB1_0:
>	s_mov_b32 s2, s3                                      ; BE820003
>	s_mov_b32 s3, 0                                       ; BE830080
>	s_mov_b32 s0, s5                                      ; BE800005
>	s_mov_b32 s5, s3                                      ; BE850003
>	s_load_dwordx4 s[8:11], s[4:5], 0x10                  ; C00A0202 00000010
>	s_load_dwordx4 s[12:15], s[4:5], 0x20                 ; C00A0302 00000020
>	s_load_dwordx4 s[16:19], s[4:5], 0x30                 ; C00A0402 00000030
>	s_load_dwordx4 s[20:23], s[2:3], 0x20                 ; C00A0501 00000020
>	s_load_dwordx4 s[4:7], s[4:5], 0x0                    ; C00A0102 00000000
>	v_add_u32_e32 v7, vcc, s0, v0                         ; 320E0000
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xy v[10:11], v7, s[12:15], 0 idxen ; E0042000 80030A07
>	buffer_load_format_xyzw v[0:3], v7, s[16:19], 0 idxen ; E00C2000 80040007
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	buffer_load_format_xyzw v[3:6], v7, s[4:7], 0 idxen   ; E00C2000 80010307
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	buffer_load_format_xyzw v[6:9], v7, s[8:11], 0 idxen  ; E00C2000 80020607
>	s_load_dwordx4 s[4:7], s[2:3], 0x0                    ; C00A0101 00000000
>	s_load_dwordx4 s[8:11], s[2:3], 0x10                  ; C00A0201 00000010
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mov_b32_e32 v7, 0x3dcccccd                          ; 7E0E02FF 3DCCCCCD
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	s_buffer_load_dwordx2 s[24:25], s[4:7], 0x0           ; C0260602 00000000
>	s_buffer_load_dword s34, s[4:7], 0x8                  ; C0220882 00000008
>	s_buffer_load_dwordx2 s[26:27], s[4:7], 0x10          ; C0260682 00000010
>	s_buffer_load_dword s35, s[4:7], 0x18                 ; C02208C2 00000018
>	s_buffer_load_dwordx2 s[28:29], s[4:7], 0x20          ; C0260702 00000020
>	s_buffer_load_dword s36, s[4:7], 0x28                 ; C0220902 00000028
>	s_buffer_load_dwordx2 s[30:31], s[4:7], 0x30          ; C0260782 00000030
>	s_buffer_load_dwordx4 s[0:3], s[4:7], 0xb0            ; C02A0002 000000B0
>	s_buffer_load_dwordx2 s[32:33], s[4:7], 0xf0          ; C0260802 000000F0
>	s_buffer_load_dword s37, s[4:7], 0xf8                 ; C0220942 000000F8
>	s_buffer_load_dword s38, s[4:7], 0x38                 ; C0220982 00000038
>	s_buffer_load_dwordx4 s[12:15], s[4:7], 0x80          ; C02A0302 00000080
>	s_buffer_load_dwordx4 s[16:19], s[4:7], 0x90          ; C02A0402 00000090
>	s_buffer_load_dwordx4 s[4:7], s[4:7], 0xa0            ; C02A0102 000000A0
>	s_buffer_load_dword s8, s[8:11], 0xd8                 ; C0220204 000000D8
>	s_buffer_load_dword s9, s[20:23], 0x31c               ; C022024A 0000031C
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_add_f32_e64 v8, s9, -1.0                            ; D1010008 0001E609
>	v_mul_f32_e32 v12, v1, v1                             ; 0A180301
>	v_mac_f32_e32 v12, v0, v0                             ; 2C180100
>	v_mul_f32_e32 v14, s17, v4                            ; 0A1C0811
>	v_mul_f32_e32 v16, s19, v4                            ; 0A200813
>	v_mul_f32_e32 v18, s27, v4                            ; 0A24081B
>	v_mul_f32_e32 v13, s16, v4                            ; 0A1A0810
>	v_mul_f32_e32 v15, s18, v4                            ; 0A1E0812
>	v_mul_f32_e32 v17, s26, v4                            ; 0A22081A
>	v_mac_f32_e32 v14, s13, v3                            ; 2C1C060D
>	v_mac_f32_e32 v16, s15, v3                            ; 2C20060F
>	v_mac_f32_e32 v18, s25, v3                            ; 2C240619
>	v_mul_f32_e32 v4, s35, v4                             ; 0A080823
>	v_mac_f32_e32 v12, v2, v2                             ; 2C180502
>	v_cmp_lt_f32_e32 vcc, v12, v7                         ; 7C820F0C
>	v_mac_f32_e32 v13, s12, v3                            ; 2C1A060C
>	v_mac_f32_e32 v15, s14, v3                            ; 2C1E060E
>	v_mac_f32_e32 v17, s24, v3                            ; 2C220618
>	v_mac_f32_e32 v4, s34, v3                             ; 2C080622
>	v_mac_f32_e32 v14, s5, v5                             ; 2C1C0A05
>	v_mac_f32_e32 v16, s7, v5                             ; 2C200A07
>	v_mac_f32_e32 v18, s29, v5                            ; 2C240A1D
>	v_mac_f32_e32 v4, s36, v5                             ; 2C080A24
>	v_mac_f32_e32 v13, s4, v5                             ; 2C1A0A04
>	v_mac_f32_e32 v15, s6, v5                             ; 2C1E0A06
>	v_mac_f32_e32 v17, s28, v5                            ; 2C220A1C
>	v_add_f32_e32 v5, s1, v14                             ; 020A1C01
>	v_add_f32_e32 v14, s3, v16                            ; 021C2003
>	v_add_f32_e32 v16, s31, v18                           ; 0220241F
>	v_cndmask_b32_e64 v1, v1, 0, vcc                      ; D1000001 01A90101
>	v_add_f32_e32 v3, s0, v13                             ; 02061A00
>	v_add_f32_e32 v13, s2, v15                            ; 021A1E02
>	v_add_f32_e32 v15, s30, v17                           ; 021E221E
>	v_sub_f32_e32 v12, s33, v16                           ; 04182021
>	v_cndmask_b32_e64 v0, v0, 0, vcc                      ; D1000000 01A90100
>	v_mul_f32_e32 v16, s27, v1                            ; 0A20021B
>	v_sub_f32_e32 v7, s32, v15                            ; 040E1E20
>	v_mul_f32_e32 v15, s26, v1                            ; 0A1E021A
>	v_cndmask_b32_e64 v2, v2, 1.0, vcc                    ; D1000002 01A9E502
>	v_mac_f32_e32 v16, s25, v0                            ; 2C200019
>	v_mul_f32_e32 v1, s35, v1                             ; 0A020223
>	v_mac_f32_e32 v15, s24, v0                            ; 2C1E0018
>	v_mac_f32_e32 v16, s29, v2                            ; 2C20041D
>	v_mac_f32_e32 v1, s34, v0                             ; 2C020022
>	v_add_f32_e32 v4, s38, v4                             ; 02080826
>	exp pos0 v3, v5, v13, v14 done                        ; C40008CF 0E0D0503
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>	v_mul_f32_e32 v3, v12, v12                            ; 0A06190C
>	v_mac_f32_e32 v15, s28, v2                            ; 2C1E041C
>	v_mul_f32_e32 v0, v16, v16                            ; 0A002110
>	v_sub_f32_e32 v4, s37, v4                             ; 04080825
>	v_mac_f32_e32 v3, v7, v7                              ; 2C060F07
>	v_mac_f32_e32 v1, s36, v2                             ; 2C020424
>	v_mac_f32_e32 v0, v15, v15                            ; 2C001F0F
>	v_mac_f32_e32 v0, v1, v1                              ; 2C000301
>	v_mac_f32_e32 v3, v4, v4                              ; 2C060904
>	v_mul_f32_e32 v2, 0x368637bd, v3                      ; 0A0406FF 368637BD
>	v_rsq_f32_e32 v0, v0                                  ; 7E004900
>	v_min_f32_e32 v2, 1.0, v2                             ; 140404F2
>	v_sub_f32_e64 v2, v2, s8 clamp                        ; D1028002 00001102
>	v_mad_f32 v2, v2, v8, 1.0                             ; D1C10002 03CA1102
>	v_mul_f32_e64 v2, v2, v6 clamp                        ; D1058002 00020D02
>	v_mul_f32_e32 v3, v0, v15                             ; 0A061F00
>	v_mul_f32_e32 v4, v0, v16                             ; 0A082100
>	v_mul_f32_e32 v0, v0, v1                              ; 0A000300
>	exp param0 v2, v10, v11, v9                           ; C400020F 090B0A02
>	exp param1 v3, v4, v0, off                            ; C4000217 00000403
>	s_endpgm                                              ; BF810000
>
>shader: MESA_SHADER_VERTEX
>inputs: 0
>outputs: 0
>uniforms: 0
>shared: 0
>decl_var shader_in INTERP_MODE_NONE vec3 v0 (VERT_ATTRIB_GENERIC0.xyz, 0, 0)
>decl_var shader_in INTERP_MODE_NONE vec4 v1 (VERT_ATTRIB_GENERIC1, 0, 0)
>decl_var shader_in INTERP_MODE_NONE vec4 v3 (VERT_ATTRIB_GENERIC3, 0, 0)
>decl_var shader_in INTERP_MODE_NONE vec4 v4 (VERT_ATTRIB_GENERIC4, 0, 0)
>decl_var shader_in INTERP_MODE_NONE vec4 v5 (VERT_ATTRIB_GENERIC5, 0, 0)
>decl_var shader_in INTERP_MODE_NONE vec4 v6 (VERT_ATTRIB_GENERIC6, 0, 0)
>decl_var shader_in INTERP_MODE_NONE vec4 v7 (VERT_ATTRIB_GENERIC7, 0, 0)
>decl_var shader_in INTERP_MODE_NONE vec4 v8 (VERT_ATTRIB_GENERIC8, 0, 0)
>decl_var shader_in INTERP_MODE_NONE vec4 v9 (VERT_ATTRIB_GENERIC9, 0, 0)
>decl_var shader_in INTERP_MODE_NONE vec4 v10 (VERT_ATTRIB_GENERIC10, 0, 0)
>decl_var shader_in INTERP_MODE_NONE vec4 v11 (VERT_ATTRIB_GENERIC11, 0, 0)
>decl_var shader_in INTERP_MODE_NONE vec3 v13 (VERT_ATTRIB_GENERIC13.xyz, 0, 0)
>decl_var shader_out INTERP_MODE_NONE float[4] clip_distances (VARYING_SLOT_CLIP_DIST0.x, 0, 0) compact
>decl_var shader_out INTERP_MODE_NONE vec4 vs_vertex_out.field0 (VARYING_SLOT_POS, 0, 0)
>decl_var shader_out INTERP_MODE_NONE float o0 (VARYING_SLOT_VAR0.x, 0, 0)
>decl_var shader_out INTERP_MODE_NONE float o0@0 (VARYING_SLOT_VAR0.y, 0, 0)
>decl_var shader_out INTERP_MODE_NONE float o0@1 (VARYING_SLOT_VAR0.z, 0, 0)
>decl_var shader_out INTERP_MODE_NONE float o0@2 (VARYING_SLOT_VAR0.w, 0, 0)
>decl_var shader_out INTERP_MODE_NONE float o1 (VARYING_SLOT_VAR1.x, 0, 0)
>decl_var shader_out INTERP_MODE_NONE float o1@3 (VARYING_SLOT_VAR1.y, 0, 0)
>decl_var shader_out INTERP_MODE_NONE float o1@4 (VARYING_SLOT_VAR1.z, 0, 0)
>decl_var shader_out INTERP_MODE_NONE float o1@5 (VARYING_SLOT_VAR1.w, 0, 0)
>decl_var shader_out INTERP_MODE_NONE float o2 (VARYING_SLOT_VAR2.x, 0, 0)
>decl_var shader_out INTERP_MODE_NONE float o2@6 (VARYING_SLOT_VAR2.y, 0, 0)
>decl_var shader_out INTERP_MODE_NONE float o3 (VARYING_SLOT_VAR3.x, 0, 0)
>decl_var shader_out INTERP_MODE_NONE float o5 (VARYING_SLOT_VAR3.y, 0, 0)
>decl_var shader_out INTERP_MODE_NONE float o7 (VARYING_SLOT_VAR2.z, 0, 0)
>decl_var shader_out INTERP_MODE_NONE float o7@7 (VARYING_SLOT_VAR2.w, 0, 0)
>decl_function main (0 params)
>
>impl main {
>	decl_var  INTERP_MODE_NONE vec4 in@v1-temp
>	decl_var  INTERP_MODE_NONE vec4 r0
>	decl_var  INTERP_MODE_NONE vec3 out@o9-temp
>	decl_var  INTERP_MODE_NONE float[4] out@clip_distances-temp
>	decl_var  INTERP_MODE_NONE vec4 in@v4-temp
>	decl_var  INTERP_MODE_NONE vec4 in@v10-temp
>	decl_var  INTERP_MODE_NONE vec4 out@o4-temp
>	decl_var  INTERP_MODE_NONE vec4 in@v11-temp
>	decl_var  INTERP_MODE_NONE vec4 out@o5-temp
>	decl_var  INTERP_MODE_NONE vec4 r3
>	decl_var  INTERP_MODE_NONE vec4[3] x3
>	decl_var  INTERP_MODE_NONE vec4 out@o1-temp
>	decl_var  INTERP_MODE_NONE vec4[3] x2
>	decl_var  INTERP_MODE_NONE vec4 out@vs_vertex_out.field0-temp
>	decl_var  INTERP_MODE_NONE vec4 out@o10-temp
>	decl_var  INTERP_MODE_NONE vec4[3] x1
>	decl_var  INTERP_MODE_NONE vec4 out@o2-temp
>	decl_var  INTERP_MODE_NONE vec4[3] x0
>	decl_var  INTERP_MODE_NONE vec4 in@v5-temp
>	decl_var  INTERP_MODE_NONE vec4 out@o11-temp
>	decl_var  INTERP_MODE_NONE vec2 out@o3-temp
>	decl_var  INTERP_MODE_NONE vec4 r2
>	decl_var  INTERP_MODE_NONE vec4 in@v9-temp
>	decl_var  INTERP_MODE_NONE vec4 in@v7-temp
>	decl_var  INTERP_MODE_NONE vec4 out@o12-temp
>	decl_var  INTERP_MODE_NONE vec3 in@v13-temp
>	decl_var  INTERP_MODE_NONE vec4 in@v6-temp
>	decl_var  INTERP_MODE_NONE vec4 out@o7-temp
>	decl_var  INTERP_MODE_NONE vec4 in@v8-temp
>	decl_var  INTERP_MODE_NONE vec4 in@v3-temp
>	decl_var  INTERP_MODE_NONE vec4[32] shader_in
>	decl_var  INTERP_MODE_NONE vec4 out@o6-temp
>	decl_var  INTERP_MODE_NONE vec4 out@o0-temp
>	decl_var  INTERP_MODE_NONE vec3 in@v0-temp
>	decl_var  INTERP_MODE_NONE vec4 out@o8-temp
>	decl_var  INTERP_MODE_NONE vec4 r1
>	decl_var  INTERP_MODE_NONE float o11
>	decl_var  INTERP_MODE_NONE float o2@8
>	decl_var  INTERP_MODE_NONE float o7@9
>	decl_var  INTERP_MODE_NONE float o4
>	decl_var  INTERP_MODE_NONE float o5@10
>	decl_var  INTERP_MODE_NONE float o5@11
>	decl_var  INTERP_MODE_NONE float o10
>	decl_var  INTERP_MODE_NONE float o6
>	decl_var  INTERP_MODE_NONE float o9
>	decl_var  INTERP_MODE_NONE float o6@12
>	decl_var  INTERP_MODE_NONE float o5@13
>	decl_var  INTERP_MODE_NONE float o10@14
>	decl_var  INTERP_MODE_NONE float o4@15
>	decl_var  INTERP_MODE_NONE float o8
>	decl_var  INTERP_MODE_NONE float o12
>	decl_var  INTERP_MODE_NONE float o8@16
>	decl_var  INTERP_MODE_NONE float o11@17
>	decl_var  INTERP_MODE_NONE float o8@18
>	decl_var  INTERP_MODE_NONE float o12@19
>	decl_var  INTERP_MODE_NONE float o11@20
>	decl_var  INTERP_MODE_NONE float o4@21
>	decl_var  INTERP_MODE_NONE float o4@22
>	decl_var  INTERP_MODE_NONE float o8@23
>	decl_var  INTERP_MODE_NONE float o10@24
>	decl_var  INTERP_MODE_NONE float o7@25
>	decl_var  INTERP_MODE_NONE float o3@26
>	decl_var  INTERP_MODE_NONE float o10@27
>	decl_var  INTERP_MODE_NONE float o9@28
>	decl_var  INTERP_MODE_NONE float o2@29
>	decl_var  INTERP_MODE_NONE float o9@30
>	decl_var  INTERP_MODE_NONE float o12@31
>	decl_var  INTERP_MODE_NONE float o6@32
>	decl_var  INTERP_MODE_NONE float o6@33
>	decl_var  INTERP_MODE_NONE float o11@34
>	decl_var  INTERP_MODE_NONE float o12@35
>	block block_0:
>	/* preds: */
>	vec1 32 ssa_0 = deref_var &v0 (shader_in vec3) 
>	vec3 32 ssa_1 = intrinsic load_deref (ssa_0) ()
>	vec1 32 ssa_2 = deref_var &v1 (shader_in vec4) 
>	vec4 32 ssa_3 = intrinsic load_deref (ssa_2) ()
>	vec1 32 ssa_4 = deref_var &v3 (shader_in vec4) 
>	vec4 32 ssa_5 = intrinsic load_deref (ssa_4) ()
>	vec1 32 ssa_6 = deref_var &v4 (shader_in vec4) 
>	vec4 32 ssa_7 = intrinsic load_deref (ssa_6) ()
>	vec1 32 ssa_8 = deref_var &v6 (shader_in vec4) 
>	vec4 32 ssa_9 = intrinsic load_deref (ssa_8) ()
>	vec1 32 ssa_10 = deref_var &v7 (shader_in vec4) 
>	vec4 32 ssa_11 = intrinsic load_deref (ssa_10) ()
>	vec1 32 ssa_12 = deref_var &v8 (shader_in vec4) 
>	vec4 32 ssa_13 = intrinsic load_deref (ssa_12) ()
>	vec1 32 ssa_14 = deref_var &v9 (shader_in vec4) 
>	vec4 32 ssa_15 = intrinsic load_deref (ssa_14) ()
>	vec1 32 ssa_16 = deref_var &v10 (shader_in vec4) 
>	vec4 32 ssa_17 = intrinsic load_deref (ssa_16) ()
>	vec1 32 ssa_18 = deref_var &v11 (shader_in vec4) 
>	vec4 32 ssa_19 = intrinsic load_deref (ssa_18) ()
>	vec1 32 ssa_20 = deref_var &v13 (shader_in vec3) 
>	vec3 32 ssa_21 = intrinsic load_deref (ssa_20) ()
>	vec1 32 ssa_22 = load_const (0x3f800000 /* 1.000000 */)
>	vec1 32 ssa_23 = load_const (0x00000000 /* 0.000000 */)
>	vec3 32 ssa_24 = load_const (0x3f000000 /* 0.500000 */, 0x3f000000 /* 0.500000 */, 0x3f000000 /* 0.500000 */)
>	vec1 32 ssa_25 = load_const (0x358637bd /* 0.000001 */)
>	vec1 32 ssa_26 = load_const (0x3f000000 /* 0.500000 */)
>	vec1 32 ssa_27 = load_const (0x00000001 /* 0.000000 */)
>	vec1 32 ssa_28 = load_const (0x00000002 /* 0.000000 */)
>	vec1 32 ssa_29 = fmul ssa_3.w, ssa_7.w
>	vec1 32 ssa_30 = fmul ssa_29, ssa_7.y
>	vec1 32 ssa_31 = fge ssa_25, ssa_3.w
>	vec1 32 ssa_32 = bcsel ssa_31, ssa_23, ssa_30
>	vec1 32 ssa_33 = fmul ssa_3.x, ssa_3.x
>	vec1 32 ssa_34 = fmul ssa_3.y, ssa_3.y
>	vec1 32 ssa_35 = fmul ssa_3.z, ssa_3.z
>	vec1 32 ssa_36 = fmul ssa_33, ssa_5.y
>	vec1 32 ssa_37 = fadd ssa_36, ssa_3.x
>	vec1 32 ssa_38 = fmul ssa_34, ssa_5.y
>	vec1 32 ssa_39 = fadd ssa_38, ssa_3.y
>	vec1 32 ssa_40 = fmul ssa_35, ssa_5.y
>	vec1 32 ssa_41 = fadd ssa_40, ssa_3.z
>	vec1 32 ssa_42 = f2i32 ssa_21.x
>	vec1 32 ssa_43 = f2i32 ssa_21.y
>	vec1 32 ssa_44 = ilt ssa_42, ssa_27
>	vec1 32 ssa_45 = ilt ssa_42, ssa_28
>	vec1 32 ssa_46 = bcsel ssa_45, ssa_26, ssa_15.y
>	vec1 32 ssa_47 = bcsel ssa_44, ssa_15.x, ssa_46
>	vec1 32 ssa_48 = fneg ssa_19.x
>	vec1 32 ssa_49 = fneg ssa_19.w
>	vec1 32 ssa_50 = fadd ssa_48, ssa_19.y
>	vec1 32 ssa_51 = fadd ssa_49, ssa_19.z
>	vec1 32 ssa_52 = fmul ssa_47, ssa_50
>	vec1 32 ssa_53 = fadd ssa_52, ssa_19.x
>	vec1 32 ssa_54 = ilt ssa_43, ssa_27
>	vec1 32 ssa_55 = ilt ssa_43, ssa_28
>	vec1 32 ssa_56 = bcsel ssa_55, ssa_26, ssa_15.w
>	vec1 32 ssa_57 = bcsel ssa_54, ssa_15.z, ssa_56
>	vec1 32 ssa_58 = fmul ssa_57, ssa_51
>	vec1 32 ssa_59 = fadd ssa_58, ssa_19.w
>	vec1 32 ssa_60 = fneg ssa_17.x
>	vec1 32 ssa_61 = fneg ssa_17.w
>	vec1 32 ssa_62 = fadd ssa_60, ssa_17.y
>	vec1 32 ssa_63 = fadd ssa_61, ssa_17.z
>	vec1 32 ssa_64 = fmul ssa_47, ssa_62
>	vec1 32 ssa_65 = fadd ssa_64, ssa_17.x
>	vec1 32 ssa_66 = fmul ssa_57, ssa_63
>	vec1 32 ssa_67 = fadd ssa_66, ssa_17.w
>	vec1 32 ssa_68 = fmax ssa_5.x, ssa_23
>	vec1 32 ssa_69 = fmin ssa_68, ssa_22
>	vec1 32 ssa_70 = fadd ssa_1.x, ssa_11.x
>	vec1 32 ssa_71 = fadd ssa_1.y, ssa_11.y
>	vec1 32 ssa_72 = fadd ssa_1.z, ssa_11.z
>	vec1 32 ssa_73 = fadd ssa_70, ssa_9.w
>	vec1 32 ssa_74 = fadd ssa_71, ssa_11.w
>	vec1 32 ssa_75 = fadd ssa_72, ssa_13.w
>	vec1 32 ssa_76 = fneg ssa_9.w
>	vec1 32 ssa_77 = fneg ssa_11.w
>	vec1 32 ssa_78 = fneg ssa_13.w
>	vec1 32 ssa_79 = fadd ssa_76, ssa_13.x
>	vec1 32 ssa_80 = fadd ssa_77, ssa_13.y
>	vec1 32 ssa_81 = fadd ssa_78, ssa_13.z
>	vec1 32 ssa_82 = fmul ssa_79, ssa_47
>	vec1 32 ssa_83 = fadd ssa_82, ssa_73
>	vec1 32 ssa_84 = fmul ssa_80, ssa_47
>	vec1 32 ssa_85 = fadd ssa_84, ssa_74
>	vec1 32 ssa_86 = fmul ssa_81, ssa_47
>	vec1 32 ssa_87 = fadd ssa_86, ssa_75
>	vec1 32 ssa_88 = fneg ssa_11.x
>	vec1 32 ssa_89 = fneg ssa_11.y
>	vec1 32 ssa_90 = fneg ssa_11.z
>	vec1 32 ssa_91 = fadd ssa_9.x, ssa_88
>	vec1 32 ssa_92 = fadd ssa_9.y, ssa_89
>	vec1 32 ssa_93 = fadd ssa_9.z, ssa_90
>	vec1 32 ssa_94 = fmul ssa_91, ssa_57
>	vec1 32 ssa_95 = fadd ssa_94, ssa_83
>	vec1 32 ssa_96 = fmul ssa_92, ssa_57
>	vec1 32 ssa_97 = fadd ssa_96, ssa_85
>	vec1 32 ssa_98 = fmul ssa_93, ssa_57
>	vec1 32 ssa_99 = fadd ssa_98, ssa_87
>	vec1 32 ssa_100 = fadd ssa_79, ssa_91
>	vec1 32 ssa_101 = fadd ssa_80, ssa_92
>	vec1 32 ssa_102 = fadd ssa_81, ssa_93
>	vec1 32 ssa_103 = fmul ssa_100, ssa_24.x
>	vec1 32 ssa_104 = fadd ssa_103, ssa_73
>	vec1 32 ssa_105 = fmul ssa_101, ssa_24.y
>	vec1 32 ssa_106 = fadd ssa_105, ssa_74
>	vec1 32 ssa_107 = fmul ssa_102, ssa_24.z
>	vec1 32 ssa_108 = fadd ssa_107, ssa_75
>	vec1 32 ssa_109 = fmul ssa_103, ssa_103
>	vec1 32 ssa_110 = fmul ssa_105, ssa_105
>	vec1 32 ssa_111 = fadd ssa_109, ssa_110
>	vec1 32 ssa_112 = fmul ssa_107, ssa_107
>	vec1 32 ssa_113 = fadd ssa_111, ssa_112
>	vec1 32 ssa_114 = frsq ssa_113
>	vec1 32 ssa_115 = fneg ssa_104
>	vec1 32 ssa_116 = fneg ssa_106
>	vec1 32 ssa_117 = fneg ssa_108
>	vec1 32 ssa_118 = fadd ssa_95, ssa_115
>	vec1 32 ssa_119 = fadd ssa_97, ssa_116
>	vec1 32 ssa_120 = fadd ssa_99, ssa_117
>	vec1 32 ssa_121 = fneg ssa_95
>	vec1 32 ssa_122 = fneg ssa_97
>	vec1 32 ssa_123 = fneg ssa_99
>	vec1 32 ssa_124 = fadd ssa_121, ssa_104
>	vec1 32 ssa_125 = fadd ssa_122, ssa_106
>	vec1 32 ssa_126 = fadd ssa_123, ssa_108
>	vec1 32 ssa_127 = fmul ssa_118, ssa_7.w
>	vec1 32 ssa_128 = fadd ssa_127, ssa_104
>	vec1 32 ssa_129 = fmul ssa_119, ssa_7.w
>	vec1 32 ssa_130 = fadd ssa_129, ssa_106
>	vec1 32 ssa_131 = fmul ssa_120, ssa_7.w
>	vec1 32 ssa_132 = fadd ssa_131, ssa_108
>	vec1 32 ssa_133 = fmul ssa_124, ssa_124
>	vec1 32 ssa_134 = fmul ssa_125, ssa_125
>	vec1 32 ssa_135 = fadd ssa_133, ssa_134
>	vec1 32 ssa_136 = fmul ssa_126, ssa_126
>	vec1 32 ssa_137 = fadd ssa_135, ssa_136
>	vec1 32 ssa_138 = fsqrt ssa_137
>	vec1 32 ssa_139 = fmul ssa_114, ssa_138
>	vec1 32 ssa_140 = intrinsic vulkan_resource_index (ssa_23) (0, 3) /* desc-set=0 */ /* binding=3 */
>	vec1 32 ssa_141 = load_const (0x00000040 /* 0.000000 */)
>	vec4 32 ssa_142 = intrinsic load_ubo (ssa_140, ssa_141) ()
>	vec1 32 ssa_143 = fmul ssa_139, ssa_142.y
>	vec1 32 ssa_144 = fneg ssa_128
>	vec1 32 ssa_145 = fneg ssa_130
>	vec1 32 ssa_146 = fneg ssa_132
>	vec1 32 ssa_147 = intrinsic vulkan_resource_index (ssa_23) (0, 0) /* desc-set=0 */ /* binding=0 */
>	vec1 32 ssa_148 = load_const (0x000000f0 /* 0.000000 */)
>	vec4 32 ssa_149 = intrinsic load_ubo (ssa_147, ssa_148) ()
>	vec1 32 ssa_150 = fadd ssa_144, ssa_149.x
>	vec1 32 ssa_151 = fadd ssa_145, ssa_149.y
>	vec1 32 ssa_152 = fadd ssa_146, ssa_149.z
>	vec1 32 ssa_153 = fmul ssa_150, ssa_150
>	vec1 32 ssa_154 = fmul ssa_151, ssa_151
>	vec1 32 ssa_155 = fadd ssa_153, ssa_154
>	vec1 32 ssa_156 = fmul ssa_152, ssa_152
>	vec1 32 ssa_157 = fadd ssa_155, ssa_156
>	vec1 32 ssa_158 = frsq ssa_157
>	vec1 32 ssa_159 = fmul ssa_158, ssa_150
>	vec1 32 ssa_160 = fmul ssa_158, ssa_151
>	vec1 32 ssa_161 = fmul ssa_158, ssa_152
>	vec1 32 ssa_162 = load_const (0x00000030 /* 0.000000 */)
>	vec4 32 ssa_163 = intrinsic load_ubo (ssa_140, ssa_162) ()
>	vec1 32 ssa_164 = fmul ssa_159, ssa_163.y
>	vec1 32 ssa_165 = fadd ssa_164, ssa_128
>	vec1 32 ssa_166 = fmul ssa_160, ssa_163.y
>	vec1 32 ssa_167 = fadd ssa_166, ssa_130
>	vec1 32 ssa_168 = fmul ssa_161, ssa_163.y
>	vec1 32 ssa_169 = fadd ssa_168, ssa_132
>	vec1 32 ssa_170 = load_const (0x00000090 /* 0.000000 */)
>	vec4 32 ssa_171 = intrinsic load_ubo (ssa_147, ssa_170) ()
>	vec1 32 ssa_172 = fmul ssa_167, ssa_171.x
>	vec1 32 ssa_173 = fmul ssa_167, ssa_171.y
>	vec1 32 ssa_174 = fmul ssa_167, ssa_171.z
>	vec1 32 ssa_175 = fmul ssa_167, ssa_171.w
>	vec1 32 ssa_176 = load_const (0x00000080 /* 0.000000 */)
>	vec4 32 ssa_177 = intrinsic load_ubo (ssa_147, ssa_176) ()
>	vec1 32 ssa_178 = fmul ssa_165, ssa_177.x
>	vec1 32 ssa_179 = fadd ssa_178, ssa_172
>	vec1 32 ssa_180 = fmul ssa_165, ssa_177.y
>	vec1 32 ssa_181 = fadd ssa_180, ssa_173
>	vec1 32 ssa_182 = fmul ssa_165, ssa_177.z
>	vec1 32 ssa_183 = fadd ssa_182, ssa_174
>	vec1 32 ssa_184 = fmul ssa_165, ssa_177.w
>	vec1 32 ssa_185 = fadd ssa_184, ssa_175
>	vec1 32 ssa_186 = load_const (0x000000a0 /* 0.000000 */)
>	vec4 32 ssa_187 = intrinsic load_ubo (ssa_147, ssa_186) ()
>	vec1 32 ssa_188 = fmul ssa_169, ssa_187.x
>	vec1 32 ssa_189 = fadd ssa_188, ssa_179
>	vec1 32 ssa_190 = fmul ssa_169, ssa_187.y
>	vec1 32 ssa_191 = fadd ssa_190, ssa_181
>	vec1 32 ssa_192 = fmul ssa_169, ssa_187.z
>	vec1 32 ssa_193 = fadd ssa_192, ssa_183
>	vec1 32 ssa_194 = fmul ssa_169, ssa_187.w
>	vec1 32 ssa_195 = fadd ssa_194, ssa_185
>	vec1 32 ssa_196 = load_const (0x000000b0 /* 0.000000 */)
>	vec4 32 ssa_197 = intrinsic load_ubo (ssa_147, ssa_196) ()
>	vec1 32 ssa_198 = fadd ssa_189, ssa_197.x
>	vec1 32 ssa_199 = fadd ssa_191, ssa_197.y
>	vec1 32 ssa_200 = fadd ssa_193, ssa_197.z
>	vec1 32 ssa_201 = fadd ssa_195, ssa_197.w
>	vec1 32 ssa_202 = intrinsic vulkan_resource_index (ssa_23) (0, 1) /* desc-set=0 */ /* binding=1 */
>	vec4 32 ssa_203 = intrinsic load_ubo (ssa_202, ssa_23) ()
>	vec1 32 ssa_204 = fmul ssa_198, ssa_203.x
>	vec1 32 ssa_205 = fmul ssa_199, ssa_203.y
>	vec1 32 ssa_206 = fadd ssa_204, ssa_205
>	vec1 32 ssa_207 = fmul ssa_200, ssa_203.z
>	vec1 32 ssa_208 = fadd ssa_206, ssa_207
>	vec1 32 ssa_209 = fmul ssa_201, ssa_203.w
>	vec1 32 ssa_210 = fadd ssa_208, ssa_209
>	vec1 32 ssa_211 = deref_var &clip_distances (shader_out float[4]) 
>	vec1 32 ssa_212 = deref_array &(*ssa_211)[0] (shader_out float) /* &clip_distances[0] */
>	intrinsic store_deref (ssa_212, ssa_210) (1) /* wrmask=x */
>	vec1 32 ssa_213 = deref_array &(*ssa_211)[1] (shader_out float) /* &clip_distances[1] */
>	intrinsic store_deref (ssa_213, ssa_23) (1) /* wrmask=x */
>	vec1 32 ssa_214 = deref_array &(*ssa_211)[2] (shader_out float) /* &clip_distances[2] */
>	intrinsic store_deref (ssa_214, ssa_23) (1) /* wrmask=x */
>	vec1 32 ssa_215 = load_const (0x00000003 /* 0.000000 */)
>	vec1 32 ssa_216 = deref_array &(*ssa_211)[3] (shader_out float) /* &clip_distances[3] */
>	intrinsic store_deref (ssa_216, ssa_23) (1) /* wrmask=x */
>	vec1 32 ssa_217 = deref_var &o0 (shader_out float) 
>	intrinsic store_deref (ssa_217, ssa_37) (1) /* wrmask=x */
>	vec1 32 ssa_218 = deref_var &o0@0 (shader_out float) 
>	intrinsic store_deref (ssa_218, ssa_39) (1) /* wrmask=x */
>	vec1 32 ssa_219 = deref_var &o0@1 (shader_out float) 
>	intrinsic store_deref (ssa_219, ssa_41) (1) /* wrmask=x */
>	vec1 32 ssa_220 = deref_var &o0@2 (shader_out float) 
>	intrinsic store_deref (ssa_220, ssa_32) (1) /* wrmask=x */
>	vec1 32 ssa_221 = deref_var &o1 (shader_out float) 
>	intrinsic store_deref (ssa_221, ssa_65) (1) /* wrmask=x */
>	vec1 32 ssa_222 = deref_var &o1@3 (shader_out float) 
>	intrinsic store_deref (ssa_222, ssa_67) (1) /* wrmask=x */
>	vec1 32 ssa_223 = deref_var &o1@4 (shader_out float) 
>	intrinsic store_deref (ssa_223, ssa_53) (1) /* wrmask=x */
>	vec1 32 ssa_224 = deref_var &o1@5 (shader_out float) 
>	intrinsic store_deref (ssa_224, ssa_59) (1) /* wrmask=x */
>	vec1 32 ssa_225 = deref_var &o2 (shader_out float) 
>	intrinsic store_deref (ssa_225, ssa_65) (1) /* wrmask=x */
>	vec1 32 ssa_226 = deref_var &o2@6 (shader_out float) 
>	intrinsic store_deref (ssa_226, ssa_67) (1) /* wrmask=x */
>	vec1 32 ssa_227 = deref_var &o3 (shader_out float) 
>	intrinsic store_deref (ssa_227, ssa_69) (1) /* wrmask=x */
>	vec1 32 ssa_228 = deref_var &o5 (shader_out float) 
>	vec1 32 ssa_229 = imov ssa_7.x
>	intrinsic store_deref (ssa_228, ssa_229) (1) /* wrmask=x */
>	vec1 32 ssa_230 = deref_var &o7 (shader_out float) 
>	intrinsic store_deref (ssa_230, ssa_143) (1) /* wrmask=x */
>	vec1 32 ssa_231 = deref_var &o7@7 (shader_out float) 
>	intrinsic store_deref (ssa_231, ssa_201) (1) /* wrmask=x */
>	vec4 32 ssa_232 = vec4 ssa_198, ssa_199, ssa_200, ssa_201
>	vec1 32 ssa_233 = deref_var &vs_vertex_out.field0 (shader_out vec4) 
>	intrinsic store_deref (ssa_233, ssa_232) (15) /* wrmask=xyzw */
>	/* succs: block_0 */
>	block block_0:
>}
>
>shader: MESA_SHADER_FRAGMENT
>inputs: 0
>outputs: 0
>uniforms: 0
>shared: 0
>decl_var uniform INTERP_MODE_NONE sampler s5 (429, 0, 8)
>decl_var uniform INTERP_MODE_NONE sampler s6 (429, 0, 9)
>decl_var uniform INTERP_MODE_NONE sampler s8 (429, 0, 10)
>decl_var uniform INTERP_MODE_NONE sampler s12 (429, 0, 11)
>decl_var uniform INTERP_MODE_NONE sampler2D t5 (429, 0, 12)
>decl_var uniform INTERP_MODE_NONE sampler2D t6 (429, 0, 13)
>decl_var uniform INTERP_MODE_NONE sampler2D t8 (429, 0, 14)
>decl_var uniform INTERP_MODE_NONE sampler2D t12 (429, 0, 15)
>decl_var shader_in INTERP_MODE_NONE float[4] clip_distances (VARYING_SLOT_CLIP_DIST0.x, 0, 0) compact
>decl_var shader_in INTERP_MODE_NONE vec4 ps_frag_coord (VARYING_SLOT_POS, 0, 0)
>decl_var shader_in INTERP_MODE_NONE float v0 (VARYING_SLOT_VAR0.x, 0, 0)
>decl_var shader_in INTERP_MODE_NONE float v0@0 (VARYING_SLOT_VAR0.y, 0, 0)
>decl_var shader_in INTERP_MODE_NONE float v0@1 (VARYING_SLOT_VAR0.z, 0, 0)
>decl_var shader_in INTERP_MODE_NONE float v0@2 (VARYING_SLOT_VAR0.w, 0, 0)
>decl_var shader_in INTERP_MODE_NONE float v1 (VARYING_SLOT_VAR1.x, 0, 0)
>decl_var shader_in INTERP_MODE_NONE float v1@3 (VARYING_SLOT_VAR1.y, 0, 0)
>decl_var shader_in INTERP_MODE_NONE float v1@4 (VARYING_SLOT_VAR1.z, 0, 0)
>decl_var shader_in INTERP_MODE_NONE float v1@5 (VARYING_SLOT_VAR1.w, 0, 0)
>decl_var shader_in INTERP_MODE_NONE float v2 (VARYING_SLOT_VAR2.x, 0, 0)
>decl_var shader_in INTERP_MODE_NONE float v2@6 (VARYING_SLOT_VAR2.y, 0, 0)
>decl_var shader_in INTERP_MODE_FLAT float v3 (VARYING_SLOT_VAR3.x, 0, 0)
>decl_var shader_in INTERP_MODE_FLAT float v5 (VARYING_SLOT_VAR3.y, 0, 0)
>decl_var shader_in INTERP_MODE_NONE float v7 (VARYING_SLOT_VAR2.z, 0, 0)
>decl_var shader_in INTERP_MODE_NONE float v7@7 (VARYING_SLOT_VAR2.w, 0, 0)
>decl_var shader_out INTERP_MODE_NONE vec4 o0 (FRAG_RESULT_DATA0, 0, 0)
>decl_var shader_out INTERP_MODE_NONE float o1 (FRAG_RESULT_DATA1.x, 0, 0)
>decl_var shader_out INTERP_MODE_NONE float o2 (FRAG_RESULT_DATA2.x, 0, 0)
>decl_function main (0 params)
>
>impl main {
>	decl_var  INTERP_MODE_NONE vec4 r5
>	decl_var  INTERP_MODE_NONE vec4 r0
>	decl_var  INTERP_MODE_NONE vec4 r6
>	decl_var  INTERP_MODE_NONE vec4 out@o0-temp
>	decl_var  INTERP_MODE_NONE vec4 r1
>	decl_var  INTERP_MODE_NONE float out@o1-temp
>	decl_var  INTERP_MODE_NONE vec4 r2
>	decl_var  INTERP_MODE_NONE float out@o2-temp
>	decl_var  INTERP_MODE_NONE vec4[32] shader_in
>	decl_var  INTERP_MODE_NONE vec4 r3
>	decl_var  INTERP_MODE_NONE vec4 r4
>	block block_0:
>	/* preds: */
>	vec1 32 ssa_0 = deref_var &v0 (shader_in float) 
>	vec1 32 ssa_1 = intrinsic load_deref (ssa_0) ()
>	vec1 32 ssa_2 = deref_var &v0@0 (shader_in float) 
>	vec1 32 ssa_3 = intrinsic load_deref (ssa_2) ()
>	vec1 32 ssa_4 = deref_var &v0@1 (shader_in float) 
>	vec1 32 ssa_5 = intrinsic load_deref (ssa_4) ()
>	vec1 32 ssa_6 = deref_var &v0@2 (shader_in float) 
>	vec1 32 ssa_7 = intrinsic load_deref (ssa_6) ()
>	vec1 32 ssa_8 = deref_var &v1 (shader_in float) 
>	vec1 32 ssa_9 = intrinsic load_deref (ssa_8) ()
>	vec1 32 ssa_10 = deref_var &v1@3 (shader_in float) 
>	vec1 32 ssa_11 = intrinsic load_deref (ssa_10) ()
>	vec1 32 ssa_12 = deref_var &v1@4 (shader_in float) 
>	vec1 32 ssa_13 = intrinsic load_deref (ssa_12) ()
>	vec1 32 ssa_14 = deref_var &v1@5 (shader_in float) 
>	vec1 32 ssa_15 = intrinsic load_deref (ssa_14) ()
>	vec1 32 ssa_16 = deref_var &v2 (shader_in float) 
>	vec1 32 ssa_17 = intrinsic load_deref (ssa_16) ()
>	vec1 32 ssa_18 = deref_var &v2@6 (shader_in float) 
>	vec1 32 ssa_19 = intrinsic load_deref (ssa_18) ()
>	vec1 32 ssa_20 = deref_var &v3 (shader_in float) 
>	vec1 32 ssa_21 = intrinsic load_deref (ssa_20) ()
>	vec1 32 ssa_22 = deref_var &v5 (shader_in float) 
>	vec1 32 ssa_23 = intrinsic load_deref (ssa_22) ()
>	vec1 32 ssa_24 = deref_var &v7 (shader_in float) 
>	vec1 32 ssa_25 = intrinsic load_deref (ssa_24) ()
>	vec1 32 ssa_26 = deref_var &v7@7 (shader_in float) 
>	vec1 32 ssa_27 = intrinsic load_deref (ssa_26) ()
>	vec1 32 ssa_28 = deref_var &ps_frag_coord (shader_in vec4) 
>	vec4 32 ssa_29 = intrinsic load_deref (ssa_28) ()
>	vec1 32 ssa_30 = deref_var &clip_distances (shader_in float[4]) 
>	vec1 32 ssa_31 = load_const (0x00000000 /* 0.000000 */)
>	vec1 32 ssa_32 = deref_array &(*ssa_30)[0] (shader_in float) /* &clip_distances[0] */
>	vec1 32 ssa_33 = intrinsic load_deref (ssa_32) ()
>	vec3 32 ssa_34 = load_const (0x3e4ccccd /* 0.200000 */, 0x3e4ccccd /* 0.200000 */, 0x3e4ccccd /* 0.200000 */)
>	vec4 32 ssa_35 = load_const (0xbf000000 /* -0.500000 */, 0x3fc00000 /* 1.500000 */, 0x3fc00000 /* 1.500000 */, 0x3f000000 /* 0.500000 */)
>	vec4 32 ssa_36 = load_const (0x3f000000 /* 0.500000 */, 0xbfc00000 /* -1.500000 */, 0xbfc00000 /* -1.500000 */, 0xbf000000 /* -0.500000 */)
>	vec1 32 ssa_37 = load_const (0x38d1b717 /* 0.000100 */)
>	vec1 32 ssa_38 = load_const (0x3f800000 /* 1.000000 */)
>	vec1 32 ssa_39 = load_const (0x41a00000 /* 20.000000 */)
>	vec1 32 ssa_40 = load_const (0x447a0000 /* 1000.000000 */)
>	vec2 32 ssa_41 = load_const (0x00000000 /* 0.000000 */, 0x00000000 /* 0.000000 */)
>	vec1 32 ssa_42 = load_const (0x42c80000 /* 100.000000 */)
>	vec4 32 ssa_43 = load_const (0xbf800000 /* -1.000000 */, 0xbf800000 /* -1.000000 */, 0xbf800000 /* -1.000000 */, 0xbf800000 /* -1.000000 */)
>	vec4 32 ssa_44 = load_const (0x40000000 /* 2.000000 */, 0x40000000 /* 2.000000 */, 0x40000000 /* 2.000000 */, 0x40000000 /* 2.000000 */)
>	vec1 32 ssa_45 = deref_var &s8 (uniform sampler) 
>	vec1 32 ssa_46 = deref_var &t8 (uniform sampler2D) 
>	vec2 32 ssa_47 = vec2 ssa_17, ssa_19
>	vec4 32 ssa_48 = tex ssa_46 (texture_deref), ssa_45 (sampler_deref), ssa_47 (coord), 
>	vec1 32 ssa_49 = fmul ssa_48.x, ssa_44.x
>	vec1 32 ssa_50 = fadd ssa_49, ssa_43.x
>	vec1 32 ssa_51 = fmul ssa_48.y, ssa_44.y
>	vec1 32 ssa_52 = fadd ssa_51, ssa_43.y
>	vec1 32 ssa_53 = fmul ssa_48.x, ssa_44.z
>	vec1 32 ssa_54 = fadd ssa_53, ssa_43.z
>	vec1 32 ssa_55 = fmul ssa_48.y, ssa_44.w
>	vec1 32 ssa_56 = fadd ssa_55, ssa_43.w
>	vec1 32 ssa_57 = fmul ssa_48.z, ssa_7
>	vec1 32 ssa_58 = intrinsic vulkan_resource_index (ssa_31) (0, 7) /* desc-set=0 */ /* binding=7 */
>	vec1 32 ssa_59 = load_const (0x00000050 /* 0.000000 */)
>	vec4 32 ssa_60 = intrinsic load_ubo (ssa_58, ssa_59) ()
>	vec1 32 ssa_61 = fmul ssa_57, ssa_60.x
>	vec1 32 ssa_62 = fmul ssa_61, ssa_42
>	vec1 32 ssa_63 = fmul ssa_50, ssa_62
>	vec1 32 ssa_64 = fmul ssa_52, ssa_62
>	vec1 32 ssa_65 = fmul ssa_54, ssa_62
>	vec1 32 ssa_66 = fadd ssa_65, ssa_29.x
>	vec1 32 ssa_67 = fmul ssa_56, ssa_62
>	vec1 32 ssa_68 = fadd ssa_67, ssa_29.y
>	vec1 32 ssa_69 = intrinsic vulkan_resource_index (ssa_31) (0, 5) /* desc-set=0 */ /* binding=5 */
>	vec1 32 ssa_70 = load_const (0x00000010 /* 0.000000 */)
>	vec4 32 ssa_71 = intrinsic load_ubo (ssa_69, ssa_70) ()
>	vec1 32 ssa_72 = fmul ssa_66, ssa_71.x
>	vec1 32 ssa_73 = fmul ssa_68, ssa_71.y
>	vec1 32 ssa_74 = deref_var &s5 (uniform sampler) 
>	vec1 32 ssa_75 = deref_var &t5 (uniform sampler2D) 
>	vec2 32 ssa_76 = vec2 ssa_9, ssa_11
>	vec4 32 ssa_77 = tex ssa_75 (texture_deref), ssa_74 (sampler_deref), ssa_76 (coord), 
>	vec1 32 ssa_78 = fmul ssa_77.x, ssa_77.x
>	vec1 32 ssa_79 = fmul ssa_77.y, ssa_77.y
>	vec1 32 ssa_80 = fmul ssa_77.z, ssa_77.z
>	vec2 32 ssa_81 = vec2 ssa_13, ssa_15
>	vec4 32 ssa_82 = tex ssa_75 (texture_deref), ssa_74 (sampler_deref), ssa_81 (coord), 
>	vec1 32 ssa_83 = fmul ssa_82.x, ssa_82.x
>	vec1 32 ssa_84 = fmul ssa_82.y, ssa_82.y
>	vec1 32 ssa_85 = fmul ssa_82.z, ssa_82.z
>	vec1 32 ssa_86 = fneg ssa_78
>	vec1 32 ssa_87 = fneg ssa_79
>	vec1 32 ssa_88 = fneg ssa_80
>	vec1 32 ssa_89 = fneg ssa_77.w
>	vec1 32 ssa_90 = fadd ssa_86, ssa_83
>	vec1 32 ssa_91 = fadd ssa_87, ssa_84
>	vec1 32 ssa_92 = fadd ssa_88, ssa_85
>	vec1 32 ssa_93 = fadd ssa_89, ssa_82.w
>	vec1 32 ssa_94 = fmul ssa_21, ssa_90
>	vec1 32 ssa_95 = fadd ssa_94, ssa_78
>	vec1 32 ssa_96 = fmul ssa_21, ssa_91
>	vec1 32 ssa_97 = fadd ssa_96, ssa_79
>	vec1 32 ssa_98 = fmul ssa_21, ssa_92
>	vec1 32 ssa_99 = fadd ssa_98, ssa_80
>	vec1 32 ssa_100 = fmul ssa_21, ssa_93
>	vec1 32 ssa_101 = fadd ssa_100, ssa_77.w
>	vec1 32 ssa_102 = deref_var &s12 (uniform sampler) 
>	vec1 32 ssa_103 = deref_var &t12 (uniform sampler2D) 
>	vec2 32 ssa_104 = vec2 ssa_72, ssa_73
>	vec4 32 ssa_105 = tex ssa_103 (texture_deref), ssa_102 (sampler_deref), ssa_104 (coord), 
>	vec1 32 ssa_106 = fneg ssa_105.x
>	vec1 32 ssa_107 = fadd ssa_106, ssa_38
>	vec1 32 ssa_108 = intrinsic vulkan_resource_index (ssa_31) (0, 6) /* desc-set=0 */ /* binding=6 */
>	vec4 32 ssa_109 = intrinsic load_ubo (ssa_108, ssa_59) ()
>	vec1 32 ssa_110 = feq ssa_109.z, ssa_109.z
>	vec1 32 ssa_111 = feq ssa_109.w, ssa_109.w
>	vec1 32 ssa_112 = fne ssa_41.x, ssa_109.z
>	vec1 32 ssa_113 = fne ssa_41.y, ssa_109.w
>	vec1 32 ssa_114 = iand ssa_112, ssa_110
>	vec1 32 ssa_115 = iand ssa_113, ssa_111
>	vec1 32 ssa_116 = bcsel ssa_114, ssa_105.x, ssa_107
>	vec1 32 ssa_117 = fneg ssa_116
>	vec1 32 ssa_118 = fadd ssa_117, ssa_38
>	vec4 32 ssa_119 = intrinsic load_ubo (ssa_69, ssa_31) ()
>	vec1 32 ssa_120 = fmul ssa_118, ssa_119.z
>	vec1 32 ssa_121 = fadd ssa_120, ssa_119.w
>	vec1 32 ssa_122 = frcp ssa_121
>	vec1 32 ssa_123 = fneg ssa_27
>	vec1 32 ssa_124 = fadd ssa_122, ssa_123
>	vec1 32 ssa_125 = fmul ssa_124, ssa_40
>	vec1 32 ssa_126 = fmax ssa_125, ssa_31
>	vec1 32 ssa_127 = fmin ssa_126, ssa_38
>	vec1 32 ssa_128 = fmul ssa_127, ssa_7
>	vec1 32 ssa_129 = fneg ssa_25
>	vec1 32 ssa_130 = fmul ssa_124, ssa_124
>	vec1 32 ssa_131 = fadd ssa_130, ssa_129
>	vec1 32 ssa_132 = fmul ssa_131, ssa_23
>	vec1 32 ssa_133 = fmax ssa_132, ssa_31
>	vec1 32 ssa_134 = fmin ssa_133, ssa_38
>	vec1 32 ssa_135 = fmul ssa_128, ssa_134
>	vec1 32 ssa_136 = load_const (0x00000040 /* 0.000000 */)
>	vec4 32 ssa_137 = intrinsic load_ubo (ssa_58, ssa_136) ()
>	vec1 32 ssa_138 = fneg ssa_137.w
>	vec1 32 ssa_139 = fadd ssa_131, ssa_138
>	vec1 32 ssa_140 = fmul ssa_139, ssa_23
>	vec1 32 ssa_141 = fmax ssa_140, ssa_31
>	vec1 32 ssa_142 = fmin ssa_141, ssa_38
>	vec1 32 ssa_143 = fneg ssa_142
>	vec1 32 ssa_144 = fadd ssa_143, ssa_38
>	vec1 32 ssa_145 = fneg ssa_137.z
>	vec1 32 ssa_146 = fadd ssa_145, ssa_38
>	vec1 32 ssa_147 = fmul ssa_144, ssa_146
>	vec1 32 ssa_148 = fadd ssa_147, ssa_142
>	vec1 32 ssa_149 = fmul ssa_148, ssa_1
>	vec1 32 ssa_150 = fmul ssa_148, ssa_3
>	vec1 32 ssa_151 = fmul ssa_148, ssa_5
>	vec1 32 ssa_152 = fmul ssa_33, ssa_39
>	vec1 32 ssa_153 = fmax ssa_152, ssa_31
>	vec1 32 ssa_154 = fmin ssa_153, ssa_38
>	vec1 32 ssa_155 = bcsel ssa_115, ssa_154, ssa_38
>	vec1 32 ssa_156 = fmul ssa_155, ssa_135
>	vec1 32 ssa_157 = fmul ssa_101, ssa_156
>	vec1 32 ssa_158 = flt ssa_37, ssa_57
>	vec1 32 ssa_159 = deref_var &s6 (uniform sampler) 
>	vec1 32 ssa_160 = deref_var &t6 (uniform sampler2D) 
>	vec4 32 ssa_161 = txl ssa_160 (texture_deref), ssa_159 (sampler_deref), ssa_104 (coord), ssa_31 (lod), 
>	/* succs: block_1 block_2 */
>	if ssa_158 {
>		block block_1:
>		/* preds: block_0 */
>		vec1 32 ssa_162 = fadd ssa_36.x, ssa_66
>		vec1 32 ssa_163 = fmul ssa_71.x, ssa_162
>		vec1 32 ssa_164 = fadd ssa_36.y, ssa_68
>		vec1 32 ssa_165 = fmul ssa_71.y, ssa_164
>		vec1 32 ssa_166 = fadd ssa_36.z, ssa_66
>		vec1 32 ssa_167 = fmul ssa_71.x, ssa_166
>		vec1 32 ssa_168 = fadd ssa_36.w, ssa_68
>		vec1 32 ssa_169 = fmul ssa_71.y, ssa_168
>		vec1 32 ssa_170 = fadd ssa_63, ssa_35.x
>		vec1 32 ssa_171 = fadd ssa_170, ssa_29.x
>		vec1 32 ssa_172 = fmul ssa_71.x, ssa_171
>		vec1 32 ssa_173 = fadd ssa_64, ssa_35.y
>		vec1 32 ssa_174 = fadd ssa_173, ssa_29.y
>		vec1 32 ssa_175 = fmul ssa_71.y, ssa_174
>		vec1 32 ssa_176 = fadd ssa_35.z, ssa_66
>		vec1 32 ssa_177 = fmul ssa_71.x, ssa_176
>		vec1 32 ssa_178 = fadd ssa_35.w, ssa_68
>		vec1 32 ssa_179 = fmul ssa_71.y, ssa_178
>		vec2 32 ssa_180 = vec2 ssa_163, ssa_165
>		vec4 32 ssa_181 = txl ssa_160 (texture_deref), ssa_159 (sampler_deref), ssa_180 (coord), ssa_31 (lod), 
>		vec1 32 ssa_182 = fadd ssa_161.x, ssa_181.x
>		vec1 32 ssa_183 = fadd ssa_161.y, ssa_181.y
>		vec1 32 ssa_184 = fadd ssa_161.z, ssa_181.z
>		vec2 32 ssa_185 = vec2 ssa_167, ssa_169
>		vec4 32 ssa_186 = txl ssa_160 (texture_deref), ssa_159 (sampler_deref), ssa_185 (coord), ssa_31 (lod), 
>		vec1 32 ssa_187 = fadd ssa_186.x, ssa_182
>		vec1 32 ssa_188 = fadd ssa_186.y, ssa_183
>		vec1 32 ssa_189 = fadd ssa_186.z, ssa_184
>		vec2 32 ssa_190 = vec2 ssa_172, ssa_175
>		vec4 32 ssa_191 = txl ssa_160 (texture_deref), ssa_159 (sampler_deref), ssa_190 (coord), ssa_31 (lod), 
>		vec1 32 ssa_192 = fadd ssa_187, ssa_191.x
>		vec1 32 ssa_193 = fadd ssa_188, ssa_191.y
>		vec1 32 ssa_194 = fadd ssa_189, ssa_191.z
>		vec2 32 ssa_195 = vec2 ssa_177, ssa_179
>		vec4 32 ssa_196 = txl ssa_160 (texture_deref), ssa_159 (sampler_deref), ssa_195 (coord), ssa_31 (lod), 
>		vec1 32 ssa_197 = fadd ssa_196.x, ssa_192
>		vec1 32 ssa_198 = fadd ssa_196.y, ssa_193
>		vec1 32 ssa_199 = fadd ssa_196.z, ssa_194
>		vec1 32 ssa_200 = fmul ssa_197, ssa_34.x
>		vec1 32 ssa_201 = fmul ssa_198, ssa_34.y
>		vec1 32 ssa_202 = fmul ssa_199, ssa_34.z
>		/* succs: block_3 */
>	} else {
>		block block_2:
>		/* preds: block_0 */
>		vec1 32 ssa_203 = imov ssa_161.x
>		vec1 32 ssa_204 = imov ssa_161.y
>		vec1 32 ssa_205 = imov ssa_161.z
>		/* succs: block_3 */
>	}
>	block block_3:
>	/* preds: block_1 block_2 */
>	vec1 32 ssa_206 = phi block_1: ssa_200, block_2: ssa_203
>	vec1 32 ssa_207 = phi block_1: ssa_201, block_2: ssa_204
>	vec1 32 ssa_208 = phi block_1: ssa_202, block_2: ssa_205
>	vec1 32 ssa_209 = intrinsic vulkan_resource_index (ssa_31) (0, 4) /* desc-set=0 */ /* binding=4 */
>	vec1 32 ssa_210 = load_const (0x000000e0 /* 0.000000 */)
>	vec4 32 ssa_211 = intrinsic load_ubo (ssa_209, ssa_210) ()
>	vec1 32 ssa_212 = fmul ssa_206, ssa_211.w
>	vec1 32 ssa_213 = fmul ssa_207, ssa_211.w
>	vec1 32 ssa_214 = fmul ssa_208, ssa_211.w
>	vec1 32 ssa_215 = fneg ssa_212
>	vec1 32 ssa_216 = fneg ssa_213
>	vec1 32 ssa_217 = fneg ssa_214
>	vec1 32 ssa_218 = fmul ssa_149, ssa_95
>	vec1 32 ssa_219 = fadd ssa_218, ssa_215
>	vec1 32 ssa_220 = fmul ssa_150, ssa_97
>	vec1 32 ssa_221 = fadd ssa_220, ssa_216
>	vec1 32 ssa_222 = fmul ssa_151, ssa_99
>	vec1 32 ssa_223 = fadd ssa_222, ssa_217
>	vec1 32 ssa_224 = fmul ssa_157, ssa_219
>	vec1 32 ssa_225 = fadd ssa_224, ssa_212
>	vec1 32 ssa_226 = fmul ssa_157, ssa_221
>	vec1 32 ssa_227 = fadd ssa_226, ssa_213
>	vec1 32 ssa_228 = fmul ssa_157, ssa_223
>	vec1 32 ssa_229 = fadd ssa_228, ssa_214
>	vec1 32 ssa_230 = fmul ssa_225, ssa_211.z
>	vec1 32 ssa_231 = fmul ssa_227, ssa_211.z
>	vec1 32 ssa_232 = fmul ssa_229, ssa_211.z
>	vec1 32 ssa_233 = load_const (0x00000130 /* 0.000000 */)
>	vec4 32 ssa_234 = intrinsic load_ubo (ssa_209, ssa_233) ()
>	vec1 32 ssa_235 = fmul ssa_157, ssa_234.x
>	vec1 32 ssa_236 = deref_var &o0 (shader_out vec4) 
>	vec4 32 ssa_237 = vec4 ssa_230, ssa_231, ssa_232, ssa_57
>	intrinsic store_deref (ssa_236, ssa_237) (15) /* wrmask=xyzw */
>	vec1 32 ssa_238 = deref_var &o1 (shader_out float) 
>	intrinsic store_deref (ssa_238, ssa_27) (1) /* wrmask=x */
>	vec1 32 ssa_239 = deref_var &o2 (shader_out float) 
>	intrinsic store_deref (ssa_239, ssa_235) (1) /* wrmask=x */
>	/* succs: block_0 */
>	block block_0:
>}
>
>; ModuleID = 'mesa-shader'
>source_filename = "mesa-shader"
>target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
>target triple = "amdgcn-mesa-mesa3d"
>
>define amdgpu_ps void @main([0 x i8] addrspace(6)* inreg noalias dereferenceable(18446744073709551615), [0 x i8] addrspace(6)* inreg noalias dereferenceable(18446744073709551615), i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, i32, i32) {
>main_body:
>  %temp167 = alloca float, addrspace(5)
>  %temp166 = alloca float, addrspace(5)
>  %temp165 = alloca float, addrspace(5)
>  %temp164 = alloca float, addrspace(5)
>  %temp163 = alloca float, addrspace(5)
>  %temp162 = alloca float, addrspace(5)
>  %temp161 = alloca float, addrspace(5)
>  %temp160 = alloca float, addrspace(5)
>  %temp159 = alloca float, addrspace(5)
>  %temp158 = alloca float, addrspace(5)
>  %temp157 = alloca float, addrspace(5)
>  %temp156 = alloca float, addrspace(5)
>  %temp155 = alloca float, addrspace(5)
>  %temp154 = alloca float, addrspace(5)
>  %temp153 = alloca float, addrspace(5)
>  %temp152 = alloca float, addrspace(5)
>  %temp151 = alloca float, addrspace(5)
>  %temp150 = alloca float, addrspace(5)
>  %temp149 = alloca float, addrspace(5)
>  %temp148 = alloca float, addrspace(5)
>  %temp147 = alloca float, addrspace(5)
>  %temp146 = alloca float, addrspace(5)
>  %temp145 = alloca float, addrspace(5)
>  %temp144 = alloca float, addrspace(5)
>  %temp143 = alloca float, addrspace(5)
>  %temp142 = alloca float, addrspace(5)
>  %temp141 = alloca float, addrspace(5)
>  %temp140 = alloca float, addrspace(5)
>  %temp139 = alloca float, addrspace(5)
>  %temp138 = alloca float, addrspace(5)
>  %temp137 = alloca float, addrspace(5)
>  %temp136 = alloca float, addrspace(5)
>  %temp135 = alloca float, addrspace(5)
>  %temp134 = alloca float, addrspace(5)
>  %temp133 = alloca float, addrspace(5)
>  %temp132 = alloca float, addrspace(5)
>  %temp131 = alloca float, addrspace(5)
>  %temp130 = alloca float, addrspace(5)
>  %temp129 = alloca float, addrspace(5)
>  %temp128 = alloca float, addrspace(5)
>  %temp127 = alloca float, addrspace(5)
>  %temp126 = alloca float, addrspace(5)
>  %temp125 = alloca float, addrspace(5)
>  %temp124 = alloca float, addrspace(5)
>  %temp123 = alloca float, addrspace(5)
>  %temp122 = alloca float, addrspace(5)
>  %temp121 = alloca float, addrspace(5)
>  %temp120 = alloca float, addrspace(5)
>  %temp119 = alloca float, addrspace(5)
>  %temp118 = alloca float, addrspace(5)
>  %temp117 = alloca float, addrspace(5)
>  %temp116 = alloca float, addrspace(5)
>  %temp115 = alloca float, addrspace(5)
>  %temp114 = alloca float, addrspace(5)
>  %temp113 = alloca float, addrspace(5)
>  %temp112 = alloca float, addrspace(5)
>  %temp111 = alloca float, addrspace(5)
>  %temp110 = alloca float, addrspace(5)
>  %temp109 = alloca float, addrspace(5)
>  %temp108 = alloca float, addrspace(5)
>  %temp107 = alloca float, addrspace(5)
>  %temp106 = alloca float, addrspace(5)
>  %temp105 = alloca float, addrspace(5)
>  %temp104 = alloca float, addrspace(5)
>  %temp103 = alloca float, addrspace(5)
>  %temp102 = alloca float, addrspace(5)
>  %temp101 = alloca float, addrspace(5)
>  %temp100 = alloca float, addrspace(5)
>  %temp99 = alloca float, addrspace(5)
>  %temp98 = alloca float, addrspace(5)
>  %temp97 = alloca float, addrspace(5)
>  %temp96 = alloca float, addrspace(5)
>  %temp95 = alloca float, addrspace(5)
>  %temp94 = alloca float, addrspace(5)
>  %temp93 = alloca float, addrspace(5)
>  %temp92 = alloca float, addrspace(5)
>  %temp91 = alloca float, addrspace(5)
>  %temp90 = alloca float, addrspace(5)
>  %temp89 = alloca float, addrspace(5)
>  %temp88 = alloca float, addrspace(5)
>  %temp87 = alloca float, addrspace(5)
>  %temp86 = alloca float, addrspace(5)
>  %temp85 = alloca float, addrspace(5)
>  %temp84 = alloca float, addrspace(5)
>  %temp83 = alloca float, addrspace(5)
>  %temp82 = alloca float, addrspace(5)
>  %temp81 = alloca float, addrspace(5)
>  %temp80 = alloca float, addrspace(5)
>  %temp79 = alloca float, addrspace(5)
>  %temp78 = alloca float, addrspace(5)
>  %temp77 = alloca float, addrspace(5)
>  %temp76 = alloca float, addrspace(5)
>  %temp75 = alloca float, addrspace(5)
>  %temp74 = alloca float, addrspace(5)
>  %temp73 = alloca float, addrspace(5)
>  %temp72 = alloca float, addrspace(5)
>  %temp71 = alloca float, addrspace(5)
>  %temp70 = alloca float, addrspace(5)
>  %temp69 = alloca float, addrspace(5)
>  %temp68 = alloca float, addrspace(5)
>  %temp67 = alloca float, addrspace(5)
>  %temp66 = alloca float, addrspace(5)
>  %temp65 = alloca float, addrspace(5)
>  %temp64 = alloca float, addrspace(5)
>  %temp63 = alloca float, addrspace(5)
>  %temp62 = alloca float, addrspace(5)
>  %temp61 = alloca float, addrspace(5)
>  %temp60 = alloca float, addrspace(5)
>  %temp59 = alloca float, addrspace(5)
>  %temp58 = alloca float, addrspace(5)
>  %temp57 = alloca float, addrspace(5)
>  %temp56 = alloca float, addrspace(5)
>  %temp55 = alloca float, addrspace(5)
>  %temp54 = alloca float, addrspace(5)
>  %temp53 = alloca float, addrspace(5)
>  %temp52 = alloca float, addrspace(5)
>  %temp51 = alloca float, addrspace(5)
>  %temp50 = alloca float, addrspace(5)
>  %temp49 = alloca float, addrspace(5)
>  %temp48 = alloca float, addrspace(5)
>  %temp47 = alloca float, addrspace(5)
>  %temp46 = alloca float, addrspace(5)
>  %temp45 = alloca float, addrspace(5)
>  %temp44 = alloca float, addrspace(5)
>  %temp43 = alloca float, addrspace(5)
>  %temp42 = alloca float, addrspace(5)
>  %temp41 = alloca float, addrspace(5)
>  %temp40 = alloca float, addrspace(5)
>  %temp39 = alloca float, addrspace(5)
>  %temp38 = alloca float, addrspace(5)
>  %temp37 = alloca float, addrspace(5)
>  %temp36 = alloca float, addrspace(5)
>  %temp35 = alloca float, addrspace(5)
>  %temp34 = alloca float, addrspace(5)
>  %temp33 = alloca float, addrspace(5)
>  %temp32 = alloca float, addrspace(5)
>  %temp31 = alloca float, addrspace(5)
>  %temp30 = alloca float, addrspace(5)
>  %temp29 = alloca float, addrspace(5)
>  %temp28 = alloca float, addrspace(5)
>  %temp27 = alloca float, addrspace(5)
>  %temp26 = alloca float, addrspace(5)
>  %temp25 = alloca float, addrspace(5)
>  %temp24 = alloca float, addrspace(5)
>  %temp23 = alloca float, addrspace(5)
>  %temp22 = alloca float, addrspace(5)
>  %temp21 = alloca float, addrspace(5)
>  %temp20 = alloca float, addrspace(5)
>  %temp19 = alloca float, addrspace(5)
>  %temp18 = alloca float, addrspace(5)
>  %temp17 = alloca float, addrspace(5)
>  %temp16 = alloca float, addrspace(5)
>  %temp15 = alloca float, addrspace(5)
>  %temp14 = alloca float, addrspace(5)
>  %temp13 = alloca float, addrspace(5)
>  %temp12 = alloca float, addrspace(5)
>  %temp11 = alloca float, addrspace(5)
>  %temp10 = alloca float, addrspace(5)
>  %temp9 = alloca float, addrspace(5)
>  %temp8 = alloca float, addrspace(5)
>  %temp7 = alloca float, addrspace(5)
>  %temp6 = alloca float, addrspace(5)
>  %temp5 = alloca float, addrspace(5)
>  %temp4 = alloca float, addrspace(5)
>  %temp3 = alloca float, addrspace(5)
>  %temp2 = alloca float, addrspace(5)
>  %temp1 = alloca float, addrspace(5)
>  %temp = alloca float, addrspace(5)
>  %19 = alloca float, addrspace(5)
>  %20 = alloca float, addrspace(5)
>  %21 = alloca float, addrspace(5)
>  %22 = alloca float, addrspace(5)
>  %23 = alloca float, addrspace(5)
>  %24 = alloca float, addrspace(5)
>  %25 = alloca float, addrspace(5)
>  %26 = alloca float, addrspace(5)
>  %27 = alloca float, addrspace(5)
>  %28 = alloca float, addrspace(5)
>  %29 = alloca float, addrspace(5)
>  %30 = alloca float, addrspace(5)
>  %31 = call i8 addrspace(4)* @llvm.amdgcn.implicit.buffer.ptr() #2
>  %32 = bitcast i8 addrspace(4)* %31 to [0 x <4 x i32>] addrspace(4)*
>  %33 = fdiv float 1.000000e+00, %14, !fpmath !0
>  %34 = bitcast <2 x i32> %4 to <2 x float>
>  %35 = extractelement <2 x float> %34, i32 0
>  %36 = extractelement <2 x float> %34, i32 1
>  %37 = call float @llvm.amdgcn.interp.p1(float %35, i32 0, i32 0, i32 %2) #2
>  %38 = call float @llvm.amdgcn.interp.p2(float %37, float %36, i32 0, i32 0, i32 %2) #2
>  %39 = call float @llvm.amdgcn.interp.p1(float %35, i32 1, i32 0, i32 %2) #2
>  %40 = call float @llvm.amdgcn.interp.p2(float %39, float %36, i32 1, i32 0, i32 %2) #2
>  %41 = call float @llvm.amdgcn.interp.p1(float %35, i32 2, i32 0, i32 %2) #2
>  %42 = call float @llvm.amdgcn.interp.p2(float %41, float %36, i32 2, i32 0, i32 %2) #2
>  %43 = call float @llvm.amdgcn.interp.p1(float %35, i32 3, i32 0, i32 %2) #2
>  %44 = call float @llvm.amdgcn.interp.p2(float %43, float %36, i32 3, i32 0, i32 %2) #2
>  %45 = bitcast <2 x i32> %4 to <2 x float>
>  %46 = extractelement <2 x float> %45, i32 0
>  %47 = extractelement <2 x float> %45, i32 1
>  %48 = call float @llvm.amdgcn.interp.p1(float %46, i32 0, i32 1, i32 %2) #2
>  %49 = call float @llvm.amdgcn.interp.p2(float %48, float %47, i32 0, i32 1, i32 %2) #2
>  %50 = call float @llvm.amdgcn.interp.p1(float %46, i32 1, i32 1, i32 %2) #2
>  %51 = call float @llvm.amdgcn.interp.p2(float %50, float %47, i32 1, i32 1, i32 %2) #2
>  %52 = call float @llvm.amdgcn.interp.p1(float %46, i32 2, i32 1, i32 %2) #2
>  %53 = call float @llvm.amdgcn.interp.p2(float %52, float %47, i32 2, i32 1, i32 %2) #2
>  %54 = call float @llvm.amdgcn.interp.p1(float %46, i32 3, i32 1, i32 %2) #2
>  %55 = call float @llvm.amdgcn.interp.p2(float %54, float %47, i32 3, i32 1, i32 %2) #2
>  %56 = bitcast <2 x i32> %4 to <2 x float>
>  %57 = extractelement <2 x float> %56, i32 0
>  %58 = extractelement <2 x float> %56, i32 1
>  %59 = call float @llvm.amdgcn.interp.p1(float %57, i32 0, i32 2, i32 %2) #2
>  %60 = call float @llvm.amdgcn.interp.p2(float %59, float %58, i32 0, i32 2, i32 %2) #2
>  %61 = call float @llvm.amdgcn.interp.p1(float %57, i32 1, i32 2, i32 %2) #2
>  %62 = call float @llvm.amdgcn.interp.p2(float %61, float %58, i32 1, i32 2, i32 %2) #2
>  %63 = call float @llvm.amdgcn.interp.p1(float %57, i32 2, i32 2, i32 %2) #2
>  %64 = call float @llvm.amdgcn.interp.p2(float %63, float %58, i32 2, i32 2, i32 %2) #2
>  %65 = call float @llvm.amdgcn.interp.p1(float %57, i32 3, i32 2, i32 %2) #2
>  %66 = call float @llvm.amdgcn.interp.p2(float %65, float %58, i32 3, i32 2, i32 %2) #2
>  %67 = call float @llvm.amdgcn.interp.mov(i32 2, i32 0, i32 3, i32 %2) #2
>  %68 = bitcast float %67 to i32
>  %69 = call float @llvm.amdgcn.interp.mov(i32 2, i32 1, i32 3, i32 %2) #2
>  %70 = bitcast float %69 to i32
>  %71 = call float @llvm.amdgcn.interp.mov(i32 2, i32 2, i32 3, i32 %2) #2
>  %72 = bitcast float %71 to i32
>  %73 = call float @llvm.amdgcn.interp.mov(i32 2, i32 3, i32 3, i32 %2) #2
>  %74 = bitcast float %73 to i32
>  store float 0.000000e+00, float addrspace(5)* %30
>  store float undef, float addrspace(5)* %30
>  store float 0.000000e+00, float addrspace(5)* %29
>  store float undef, float addrspace(5)* %29
>  store float 0.000000e+00, float addrspace(5)* %28
>  store float undef, float addrspace(5)* %28
>  store float 0.000000e+00, float addrspace(5)* %27
>  store float undef, float addrspace(5)* %27
>  store float 0.000000e+00, float addrspace(5)* %26
>  store float undef, float addrspace(5)* %26
>  store float 0.000000e+00, float addrspace(5)* %25
>  store float undef, float addrspace(5)* %25
>  store float 0.000000e+00, float addrspace(5)* %24
>  store float undef, float addrspace(5)* %24
>  store float 0.000000e+00, float addrspace(5)* %23
>  store float undef, float addrspace(5)* %23
>  store float 0.000000e+00, float addrspace(5)* %22
>  store float undef, float addrspace(5)* %22
>  store float 0.000000e+00, float addrspace(5)* %21
>  store float undef, float addrspace(5)* %21
>  store float 0.000000e+00, float addrspace(5)* %20
>  store float undef, float addrspace(5)* %20
>  store float 0.000000e+00, float addrspace(5)* %19
>  store float undef, float addrspace(5)* %19
>  store float 0.000000e+00, float addrspace(5)* %temp
>  store float undef, float addrspace(5)* %temp
>  store float 0.000000e+00, float addrspace(5)* %temp1
>  store float undef, float addrspace(5)* %temp1
>  store float 0.000000e+00, float addrspace(5)* %temp2
>  store float undef, float addrspace(5)* %temp2
>  store float 0.000000e+00, float addrspace(5)* %temp3
>  store float undef, float addrspace(5)* %temp3
>  store float 0.000000e+00, float addrspace(5)* %temp4
>  store float undef, float addrspace(5)* %temp4
>  store float 0.000000e+00, float addrspace(5)* %temp5
>  store float undef, float addrspace(5)* %temp5
>  store float 0.000000e+00, float addrspace(5)* %temp6
>  store float undef, float addrspace(5)* %temp6
>  store float 0.000000e+00, float addrspace(5)* %temp7
>  store float undef, float addrspace(5)* %temp7
>  store float 0.000000e+00, float addrspace(5)* %temp8
>  store float undef, float addrspace(5)* %temp8
>  store float 0.000000e+00, float addrspace(5)* %temp9
>  store float undef, float addrspace(5)* %temp9
>  store float 0.000000e+00, float addrspace(5)* %temp10
>  store float undef, float addrspace(5)* %temp10
>  store float 0.000000e+00, float addrspace(5)* %temp11
>  store float undef, float addrspace(5)* %temp11
>  store float 0.000000e+00, float addrspace(5)* %temp12
>  store float undef, float addrspace(5)* %temp12
>  store float 0.000000e+00, float addrspace(5)* %temp13
>  store float undef, float addrspace(5)* %temp13
>  store float 0.000000e+00, float addrspace(5)* %temp14
>  store float undef, float addrspace(5)* %temp14
>  store float 0.000000e+00, float addrspace(5)* %temp15
>  store float undef, float addrspace(5)* %temp15
>  store float 0.000000e+00, float addrspace(5)* %temp16
>  store float undef, float addrspace(5)* %temp16
>  store float 0.000000e+00, float addrspace(5)* %temp17
>  store float undef, float addrspace(5)* %temp17
>  store float 0.000000e+00, float addrspace(5)* %temp18
>  store float undef, float addrspace(5)* %temp18
>  store float 0.000000e+00, float addrspace(5)* %temp19
>  store float undef, float addrspace(5)* %temp19
>  store float 0.000000e+00, float addrspace(5)* %temp20
>  store float undef, float addrspace(5)* %temp20
>  store float 0.000000e+00, float addrspace(5)* %temp21
>  store float undef, float addrspace(5)* %temp21
>  store float 0.000000e+00, float addrspace(5)* %temp22
>  store float undef, float addrspace(5)* %temp22
>  store float 0.000000e+00, float addrspace(5)* %temp23
>  store float undef, float addrspace(5)* %temp23
>  store float 0.000000e+00, float addrspace(5)* %temp24
>  store float undef, float addrspace(5)* %temp24
>  store float 0.000000e+00, float addrspace(5)* %temp25
>  store float undef, float addrspace(5)* %temp25
>  store float 0.000000e+00, float addrspace(5)* %temp26
>  store float undef, float addrspace(5)* %temp26
>  store float 0.000000e+00, float addrspace(5)* %temp27
>  store float undef, float addrspace(5)* %temp27
>  store float 0.000000e+00, float addrspace(5)* %temp28
>  store float undef, float addrspace(5)* %temp28
>  store float 0.000000e+00, float addrspace(5)* %temp29
>  store float undef, float addrspace(5)* %temp29
>  store float 0.000000e+00, float addrspace(5)* %temp30
>  store float undef, float addrspace(5)* %temp30
>  store float 0.000000e+00, float addrspace(5)* %temp31
>  store float undef, float addrspace(5)* %temp31
>  store float 0.000000e+00, float addrspace(5)* %temp32
>  store float undef, float addrspace(5)* %temp32
>  store float 0.000000e+00, float addrspace(5)* %temp33
>  store float undef, float addrspace(5)* %temp33
>  store float 0.000000e+00, float addrspace(5)* %temp34
>  store float undef, float addrspace(5)* %temp34
>  store float 0.000000e+00, float addrspace(5)* %temp35
>  store float undef, float addrspace(5)* %temp35
>  store float 0.000000e+00, float addrspace(5)* %temp36
>  store float undef, float addrspace(5)* %temp36
>  store float 0.000000e+00, float addrspace(5)* %temp37
>  store float undef, float addrspace(5)* %temp37
>  store float 0.000000e+00, float addrspace(5)* %temp38
>  store float undef, float addrspace(5)* %temp38
>  store float 0.000000e+00, float addrspace(5)* %temp39
>  store float undef, float addrspace(5)* %temp39
>  store float 0.000000e+00, float addrspace(5)* %temp40
>  store float undef, float addrspace(5)* %temp40
>  store float 0.000000e+00, float addrspace(5)* %temp41
>  store float undef, float addrspace(5)* %temp41
>  store float 0.000000e+00, float addrspace(5)* %temp42
>  store float undef, float addrspace(5)* %temp42
>  store float 0.000000e+00, float addrspace(5)* %temp43
>  store float undef, float addrspace(5)* %temp43
>  store float 0.000000e+00, float addrspace(5)* %temp44
>  store float undef, float addrspace(5)* %temp44
>  store float 0.000000e+00, float addrspace(5)* %temp45
>  store float undef, float addrspace(5)* %temp45
>  store float 0.000000e+00, float addrspace(5)* %temp46
>  store float undef, float addrspace(5)* %temp46
>  store float 0.000000e+00, float addrspace(5)* %temp47
>  store float undef, float addrspace(5)* %temp47
>  store float 0.000000e+00, float addrspace(5)* %temp48
>  store float undef, float addrspace(5)* %temp48
>  store float 0.000000e+00, float addrspace(5)* %temp49
>  store float undef, float addrspace(5)* %temp49
>  store float 0.000000e+00, float addrspace(5)* %temp50
>  store float undef, float addrspace(5)* %temp50
>  store float 0.000000e+00, float addrspace(5)* %temp51
>  store float undef, float addrspace(5)* %temp51
>  store float 0.000000e+00, float addrspace(5)* %temp52
>  store float undef, float addrspace(5)* %temp52
>  store float 0.000000e+00, float addrspace(5)* %temp53
>  store float undef, float addrspace(5)* %temp53
>  store float 0.000000e+00, float addrspace(5)* %temp54
>  store float undef, float addrspace(5)* %temp54
>  store float 0.000000e+00, float addrspace(5)* %temp55
>  store float undef, float addrspace(5)* %temp55
>  store float 0.000000e+00, float addrspace(5)* %temp56
>  store float undef, float addrspace(5)* %temp56
>  store float 0.000000e+00, float addrspace(5)* %temp57
>  store float undef, float addrspace(5)* %temp57
>  store float 0.000000e+00, float addrspace(5)* %temp58
>  store float undef, float addrspace(5)* %temp58
>  store float 0.000000e+00, float addrspace(5)* %temp59
>  store float undef, float addrspace(5)* %temp59
>  store float 0.000000e+00, float addrspace(5)* %temp60
>  store float undef, float addrspace(5)* %temp60
>  store float 0.000000e+00, float addrspace(5)* %temp61
>  store float undef, float addrspace(5)* %temp61
>  store float 0.000000e+00, float addrspace(5)* %temp62
>  store float undef, float addrspace(5)* %temp62
>  store float 0.000000e+00, float addrspace(5)* %temp63
>  store float undef, float addrspace(5)* %temp63
>  store float 0.000000e+00, float addrspace(5)* %temp64
>  store float undef, float addrspace(5)* %temp64
>  store float 0.000000e+00, float addrspace(5)* %temp65
>  store float undef, float addrspace(5)* %temp65
>  store float 0.000000e+00, float addrspace(5)* %temp66
>  store float undef, float addrspace(5)* %temp66
>  store float 0.000000e+00, float addrspace(5)* %temp67
>  store float undef, float addrspace(5)* %temp67
>  store float 0.000000e+00, float addrspace(5)* %temp68
>  store float undef, float addrspace(5)* %temp68
>  store float 0.000000e+00, float addrspace(5)* %temp69
>  store float undef, float addrspace(5)* %temp69
>  store float 0.000000e+00, float addrspace(5)* %temp70
>  store float undef, float addrspace(5)* %temp70
>  store float 0.000000e+00, float addrspace(5)* %temp71
>  store float undef, float addrspace(5)* %temp71
>  store float 0.000000e+00, float addrspace(5)* %temp72
>  store float undef, float addrspace(5)* %temp72
>  store float 0.000000e+00, float addrspace(5)* %temp73
>  store float undef, float addrspace(5)* %temp73
>  store float 0.000000e+00, float addrspace(5)* %temp74
>  store float undef, float addrspace(5)* %temp74
>  store float 0.000000e+00, float addrspace(5)* %temp75
>  store float undef, float addrspace(5)* %temp75
>  store float 0.000000e+00, float addrspace(5)* %temp76
>  store float undef, float addrspace(5)* %temp76
>  store float 0.000000e+00, float addrspace(5)* %temp77
>  store float undef, float addrspace(5)* %temp77
>  store float 0.000000e+00, float addrspace(5)* %temp78
>  store float undef, float addrspace(5)* %temp78
>  store float 0.000000e+00, float addrspace(5)* %temp79
>  store float undef, float addrspace(5)* %temp79
>  store float 0.000000e+00, float addrspace(5)* %temp80
>  store float undef, float addrspace(5)* %temp80
>  store float 0.000000e+00, float addrspace(5)* %temp81
>  store float undef, float addrspace(5)* %temp81
>  store float 0.000000e+00, float addrspace(5)* %temp82
>  store float undef, float addrspace(5)* %temp82
>  store float 0.000000e+00, float addrspace(5)* %temp83
>  store float undef, float addrspace(5)* %temp83
>  store float 0.000000e+00, float addrspace(5)* %temp84
>  store float undef, float addrspace(5)* %temp84
>  store float 0.000000e+00, float addrspace(5)* %temp85
>  store float undef, float addrspace(5)* %temp85
>  store float 0.000000e+00, float addrspace(5)* %temp86
>  store float undef, float addrspace(5)* %temp86
>  store float 0.000000e+00, float addrspace(5)* %temp87
>  store float undef, float addrspace(5)* %temp87
>  store float 0.000000e+00, float addrspace(5)* %temp88
>  store float undef, float addrspace(5)* %temp88
>  store float 0.000000e+00, float addrspace(5)* %temp89
>  store float undef, float addrspace(5)* %temp89
>  store float 0.000000e+00, float addrspace(5)* %temp90
>  store float undef, float addrspace(5)* %temp90
>  store float 0.000000e+00, float addrspace(5)* %temp91
>  store float undef, float addrspace(5)* %temp91
>  store float 0.000000e+00, float addrspace(5)* %temp92
>  store float undef, float addrspace(5)* %temp92
>  store float 0.000000e+00, float addrspace(5)* %temp93
>  store float undef, float addrspace(5)* %temp93
>  store float 0.000000e+00, float addrspace(5)* %temp94
>  store float undef, float addrspace(5)* %temp94
>  store float 0.000000e+00, float addrspace(5)* %temp95
>  store float undef, float addrspace(5)* %temp95
>  store float 0.000000e+00, float addrspace(5)* %temp96
>  store float undef, float addrspace(5)* %temp96
>  store float 0.000000e+00, float addrspace(5)* %temp97
>  store float undef, float addrspace(5)* %temp97
>  store float 0.000000e+00, float addrspace(5)* %temp98
>  store float undef, float addrspace(5)* %temp98
>  store float 0.000000e+00, float addrspace(5)* %temp99
>  store float undef, float addrspace(5)* %temp99
>  store float 0.000000e+00, float addrspace(5)* %temp100
>  store float undef, float addrspace(5)* %temp100
>  store float 0.000000e+00, float addrspace(5)* %temp101
>  store float undef, float addrspace(5)* %temp101
>  store float 0.000000e+00, float addrspace(5)* %temp102
>  store float undef, float addrspace(5)* %temp102
>  store float 0.000000e+00, float addrspace(5)* %temp103
>  store float undef, float addrspace(5)* %temp103
>  store float 0.000000e+00, float addrspace(5)* %temp104
>  store float undef, float addrspace(5)* %temp104
>  store float 0.000000e+00, float addrspace(5)* %temp105
>  store float undef, float addrspace(5)* %temp105
>  store float 0.000000e+00, float addrspace(5)* %temp106
>  store float undef, float addrspace(5)* %temp106
>  store float 0.000000e+00, float addrspace(5)* %temp107
>  store float undef, float addrspace(5)* %temp107
>  store float 0.000000e+00, float addrspace(5)* %temp108
>  store float undef, float addrspace(5)* %temp108
>  store float 0.000000e+00, float addrspace(5)* %temp109
>  store float undef, float addrspace(5)* %temp109
>  store float 0.000000e+00, float addrspace(5)* %temp110
>  store float undef, float addrspace(5)* %temp110
>  store float 0.000000e+00, float addrspace(5)* %temp111
>  store float undef, float addrspace(5)* %temp111
>  store float 0.000000e+00, float addrspace(5)* %temp112
>  store float undef, float addrspace(5)* %temp112
>  store float 0.000000e+00, float addrspace(5)* %temp113
>  store float undef, float addrspace(5)* %temp113
>  store float 0.000000e+00, float addrspace(5)* %temp114
>  store float undef, float addrspace(5)* %temp114
>  store float 0.000000e+00, float addrspace(5)* %temp115
>  store float undef, float addrspace(5)* %temp115
>  store float 0.000000e+00, float addrspace(5)* %temp116
>  store float undef, float addrspace(5)* %temp116
>  store float 0.000000e+00, float addrspace(5)* %temp117
>  store float undef, float addrspace(5)* %temp117
>  store float 0.000000e+00, float addrspace(5)* %temp118
>  store float undef, float addrspace(5)* %temp118
>  store float 0.000000e+00, float addrspace(5)* %temp119
>  store float undef, float addrspace(5)* %temp119
>  store float 0.000000e+00, float addrspace(5)* %temp120
>  store float undef, float addrspace(5)* %temp120
>  store float 0.000000e+00, float addrspace(5)* %temp121
>  store float undef, float addrspace(5)* %temp121
>  store float 0.000000e+00, float addrspace(5)* %temp122
>  store float undef, float addrspace(5)* %temp122
>  store float 0.000000e+00, float addrspace(5)* %temp123
>  store float undef, float addrspace(5)* %temp123
>  store float 0.000000e+00, float addrspace(5)* %temp124
>  store float undef, float addrspace(5)* %temp124
>  store float 0.000000e+00, float addrspace(5)* %temp125
>  store float undef, float addrspace(5)* %temp125
>  store float 0.000000e+00, float addrspace(5)* %temp126
>  store float undef, float addrspace(5)* %temp126
>  store float 0.000000e+00, float addrspace(5)* %temp127
>  store float undef, float addrspace(5)* %temp127
>  store float 0.000000e+00, float addrspace(5)* %temp128
>  store float undef, float addrspace(5)* %temp128
>  store float 0.000000e+00, float addrspace(5)* %temp129
>  store float undef, float addrspace(5)* %temp129
>  store float 0.000000e+00, float addrspace(5)* %temp130
>  store float undef, float addrspace(5)* %temp130
>  store float 0.000000e+00, float addrspace(5)* %temp131
>  store float undef, float addrspace(5)* %temp131
>  store float 0.000000e+00, float addrspace(5)* %temp132
>  store float undef, float addrspace(5)* %temp132
>  store float 0.000000e+00, float addrspace(5)* %temp133
>  store float undef, float addrspace(5)* %temp133
>  store float 0.000000e+00, float addrspace(5)* %temp134
>  store float undef, float addrspace(5)* %temp134
>  store float 0.000000e+00, float addrspace(5)* %temp135
>  store float undef, float addrspace(5)* %temp135
>  store float 0.000000e+00, float addrspace(5)* %temp136
>  store float undef, float addrspace(5)* %temp136
>  store float 0.000000e+00, float addrspace(5)* %temp137
>  store float undef, float addrspace(5)* %temp137
>  store float 0.000000e+00, float addrspace(5)* %temp138
>  store float undef, float addrspace(5)* %temp138
>  store float 0.000000e+00, float addrspace(5)* %temp139
>  store float undef, float addrspace(5)* %temp139
>  store float 0.000000e+00, float addrspace(5)* %temp140
>  store float undef, float addrspace(5)* %temp140
>  store float 0.000000e+00, float addrspace(5)* %temp141
>  store float undef, float addrspace(5)* %temp141
>  store float 0.000000e+00, float addrspace(5)* %temp142
>  store float undef, float addrspace(5)* %temp142
>  store float 0.000000e+00, float addrspace(5)* %temp143
>  store float undef, float addrspace(5)* %temp143
>  store float 0.000000e+00, float addrspace(5)* %temp144
>  store float undef, float addrspace(5)* %temp144
>  store float 0.000000e+00, float addrspace(5)* %temp145
>  store float undef, float addrspace(5)* %temp145
>  store float 0.000000e+00, float addrspace(5)* %temp146
>  store float undef, float addrspace(5)* %temp146
>  store float 0.000000e+00, float addrspace(5)* %temp147
>  store float undef, float addrspace(5)* %temp147
>  store float 0.000000e+00, float addrspace(5)* %temp148
>  store float undef, float addrspace(5)* %temp148
>  store float 0.000000e+00, float addrspace(5)* %temp149
>  store float undef, float addrspace(5)* %temp149
>  store float 0.000000e+00, float addrspace(5)* %temp150
>  store float undef, float addrspace(5)* %temp150
>  store float 0.000000e+00, float addrspace(5)* %temp151
>  store float undef, float addrspace(5)* %temp151
>  store float 0.000000e+00, float addrspace(5)* %temp152
>  store float undef, float addrspace(5)* %temp152
>  store float 0.000000e+00, float addrspace(5)* %temp153
>  store float undef, float addrspace(5)* %temp153
>  store float 0.000000e+00, float addrspace(5)* %temp154
>  store float undef, float addrspace(5)* %temp154
>  store float 0.000000e+00, float addrspace(5)* %temp155
>  store float undef, float addrspace(5)* %temp155
>  store float 0.000000e+00, float addrspace(5)* %temp156
>  store float undef, float addrspace(5)* %temp156
>  store float 0.000000e+00, float addrspace(5)* %temp157
>  store float undef, float addrspace(5)* %temp157
>  store float 0.000000e+00, float addrspace(5)* %temp158
>  store float undef, float addrspace(5)* %temp158
>  store float 0.000000e+00, float addrspace(5)* %temp159
>  store float undef, float addrspace(5)* %temp159
>  store float 0.000000e+00, float addrspace(5)* %temp160
>  store float undef, float addrspace(5)* %temp160
>  store float 0.000000e+00, float addrspace(5)* %temp161
>  store float undef, float addrspace(5)* %temp161
>  store float 0.000000e+00, float addrspace(5)* %temp162
>  store float undef, float addrspace(5)* %temp162
>  store float 0.000000e+00, float addrspace(5)* %temp163
>  store float undef, float addrspace(5)* %temp163
>  store float 0.000000e+00, float addrspace(5)* %temp164
>  store float undef, float addrspace(5)* %temp164
>  store float 0.000000e+00, float addrspace(5)* %temp165
>  store float undef, float addrspace(5)* %temp165
>  store float 0.000000e+00, float addrspace(5)* %temp166
>  store float undef, float addrspace(5)* %temp166
>  store float 0.000000e+00, float addrspace(5)* %temp167
>  store float undef, float addrspace(5)* %temp167
>  %75 = bitcast float %38 to i32
>  %76 = bitcast float %40 to i32
>  %77 = bitcast float %42 to i32
>  %78 = bitcast float %44 to i32
>  %79 = bitcast float %49 to i32
>  %80 = bitcast float %51 to i32
>  %81 = bitcast float %53 to i32
>  %82 = bitcast float %55 to i32
>  %83 = bitcast float %60 to i32
>  %84 = bitcast float %62 to i32
>  %85 = bitcast float %64 to i32
>  %86 = bitcast float %66 to i32
>  %87 = insertelement <4 x float> undef, float %11, i32 0
>  %88 = insertelement <4 x float> %87, float %12, i32 1
>  %89 = insertelement <4 x float> %88, float %13, i32 2
>  %90 = insertelement <4 x float> %89, float %33, i32 3
>  %91 = bitcast <4 x float> %90 to <4 x i32>
>  %92 = bitcast <2 x i32> %4 to i32
>  %93 = insertelement <2 x i32> undef, i32 %83, i32 0
>  %94 = insertelement <2 x i32> %93, i32 %84, i32 1
>  %95 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 192
>  %96 = bitcast i8 addrspace(6)* %95 to [0 x <8 x i32>] addrspace(6)*
>  %97 = getelementptr [0 x <8 x i32>], [0 x <8 x i32>] addrspace(6)* %96, i32 0, i32 0, !amdgpu.uniform !1
>  %98 = load <8 x i32>, <8 x i32> addrspace(6)* %97, !invariant.load !1
>  %99 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 32
>  %100 = bitcast i8 addrspace(6)* %99 to [0 x <4 x i32>] addrspace(6)*
>  %101 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(6)* %100, i32 0, i32 0, !amdgpu.uniform !1
>  %102 = load <4 x i32>, <4 x i32> addrspace(6)* %101, !invariant.load !1
>  %103 = extractelement <2 x i32> %94, i32 0
>  %104 = extractelement <2 x i32> %94, i32 1
>  %105 = bitcast i32 %103 to float
>  %106 = bitcast i32 %104 to float
>  %107 = call <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32(i32 15, float %105, float %106, <8 x i32> %98, <4 x i32> %102, i1 false, i32 0, i32 0) #2
>  %108 = bitcast <4 x float> %107 to <4 x i32>
>  %109 = extractelement <4 x i32> %108, i32 0
>  %110 = bitcast i32 %109 to float
>  %111 = fmul float %110, 2.000000e+00
>  %112 = bitcast float %111 to i32
>  %113 = bitcast i32 %112 to float
>  %114 = fadd float %113, -1.000000e+00
>  %115 = bitcast float %114 to i32
>  %116 = extractelement <4 x i32> %108, i32 1
>  %117 = bitcast i32 %116 to float
>  %118 = fmul float %117, 2.000000e+00
>  %119 = bitcast float %118 to i32
>  %120 = bitcast i32 %119 to float
>  %121 = fadd float %120, -1.000000e+00
>  %122 = bitcast float %121 to i32
>  %123 = extractelement <4 x i32> %108, i32 0
>  %124 = bitcast i32 %123 to float
>  %125 = fmul float %124, 2.000000e+00
>  %126 = bitcast float %125 to i32
>  %127 = bitcast i32 %126 to float
>  %128 = fadd float %127, -1.000000e+00
>  %129 = bitcast float %128 to i32
>  %130 = extractelement <4 x i32> %108, i32 1
>  %131 = bitcast i32 %130 to float
>  %132 = fmul float %131, 2.000000e+00
>  %133 = bitcast float %132 to i32
>  %134 = bitcast i32 %133 to float
>  %135 = fadd float %134, -1.000000e+00
>  %136 = bitcast float %135 to i32
>  %137 = extractelement <4 x i32> %108, i32 2
>  %138 = bitcast i32 %137 to float
>  %139 = bitcast i32 %78 to float
>  %140 = fmul float %138, %139
>  %141 = bitcast float %140 to i32
>  %142 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %1, i32 0, i32 112
>  %143 = bitcast i8 addrspace(6)* %142 to <4 x i32> addrspace(6)*, !amdgpu.uniform !1
>  %144 = load <4 x i32>, <4 x i32> addrspace(6)* %143, !invariant.load !1
>  %145 = call float @llvm.SI.load.const.v4i32(<4 x i32> %144, i32 80)
>  %146 = call float @llvm.SI.load.const.v4i32(<4 x i32> %144, i32 84)
>  %147 = call float @llvm.SI.load.const.v4i32(<4 x i32> %144, i32 88)
>  %148 = call float @llvm.SI.load.const.v4i32(<4 x i32> %144, i32 92)
>  %149 = insertelement <4 x float> undef, float %145, i32 0
>  %150 = insertelement <4 x float> %149, float %146, i32 1
>  %151 = insertelement <4 x float> %150, float %147, i32 2
>  %152 = insertelement <4 x float> %151, float %148, i32 3
>  %153 = bitcast <4 x float> %152 to <4 x i32>
>  %154 = extractelement <4 x i32> %153, i32 0
>  %155 = bitcast i32 %141 to float
>  %156 = bitcast i32 %154 to float
>  %157 = fmul float %155, %156
>  %158 = bitcast float %157 to i32
>  %159 = bitcast i32 %158 to float
>  %160 = fmul float %159, 1.000000e+02
>  %161 = bitcast float %160 to i32
>  %162 = bitcast i32 %115 to float
>  %163 = bitcast i32 %161 to float
>  %164 = fmul float %162, %163
>  %165 = bitcast float %164 to i32
>  %166 = bitcast i32 %122 to float
>  %167 = bitcast i32 %161 to float
>  %168 = fmul float %166, %167
>  %169 = bitcast float %168 to i32
>  %170 = bitcast i32 %129 to float
>  %171 = bitcast i32 %161 to float
>  %172 = fmul float %170, %171
>  %173 = bitcast float %172 to i32
>  %174 = extractelement <4 x i32> %91, i32 0
>  %175 = bitcast i32 %173 to float
>  %176 = bitcast i32 %174 to float
>  %177 = fadd float %175, %176
>  %178 = bitcast float %177 to i32
>  %179 = bitcast i32 %136 to float
>  %180 = bitcast i32 %161 to float
>  %181 = fmul float %179, %180
>  %182 = bitcast float %181 to i32
>  %183 = extractelement <4 x i32> %91, i32 1
>  %184 = bitcast i32 %182 to float
>  %185 = bitcast i32 %183 to float
>  %186 = fadd float %184, %185
>  %187 = bitcast float %186 to i32
>  %188 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %1, i32 0, i32 80
>  %189 = bitcast i8 addrspace(6)* %188 to <4 x i32> addrspace(6)*, !amdgpu.uniform !1
>  %190 = load <4 x i32>, <4 x i32> addrspace(6)* %189, !invariant.load !1
>  %191 = call float @llvm.SI.load.const.v4i32(<4 x i32> %190, i32 16)
>  %192 = call float @llvm.SI.load.const.v4i32(<4 x i32> %190, i32 20)
>  %193 = call float @llvm.SI.load.const.v4i32(<4 x i32> %190, i32 24)
>  %194 = call float @llvm.SI.load.const.v4i32(<4 x i32> %190, i32 28)
>  %195 = insertelement <4 x float> undef, float %191, i32 0
>  %196 = insertelement <4 x float> %195, float %192, i32 1
>  %197 = insertelement <4 x float> %196, float %193, i32 2
>  %198 = insertelement <4 x float> %197, float %194, i32 3
>  %199 = bitcast <4 x float> %198 to <4 x i32>
>  %200 = extractelement <4 x i32> %199, i32 0
>  %201 = bitcast i32 %178 to float
>  %202 = bitcast i32 %200 to float
>  %203 = fmul float %201, %202
>  %204 = bitcast float %203 to i32
>  %205 = extractelement <4 x i32> %199, i32 1
>  %206 = bitcast i32 %187 to float
>  %207 = bitcast i32 %205 to float
>  %208 = fmul float %206, %207
>  %209 = bitcast float %208 to i32
>  %210 = insertelement <2 x i32> undef, i32 %79, i32 0
>  %211 = insertelement <2 x i32> %210, i32 %80, i32 1
>  %212 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 64
>  %213 = bitcast i8 addrspace(6)* %212 to [0 x <8 x i32>] addrspace(6)*
>  %214 = getelementptr [0 x <8 x i32>], [0 x <8 x i32>] addrspace(6)* %213, i32 0, i32 0, !amdgpu.uniform !1
>  %215 = load <8 x i32>, <8 x i32> addrspace(6)* %214, !invariant.load !1
>  %216 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 0
>  %217 = bitcast i8 addrspace(6)* %216 to [0 x <4 x i32>] addrspace(6)*
>  %218 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(6)* %217, i32 0, i32 0, !amdgpu.uniform !1
>  %219 = load <4 x i32>, <4 x i32> addrspace(6)* %218, !invariant.load !1
>  %220 = extractelement <2 x i32> %211, i32 0
>  %221 = extractelement <2 x i32> %211, i32 1
>  %222 = bitcast i32 %220 to float
>  %223 = bitcast i32 %221 to float
>  %224 = call <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32(i32 15, float %222, float %223, <8 x i32> %215, <4 x i32> %219, i1 false, i32 0, i32 0) #2
>  %225 = bitcast <4 x float> %224 to <4 x i32>
>  %226 = extractelement <4 x i32> %225, i32 0
>  %227 = extractelement <4 x i32> %225, i32 0
>  %228 = bitcast i32 %226 to float
>  %229 = bitcast i32 %227 to float
>  %230 = fmul float %228, %229
>  %231 = bitcast float %230 to i32
>  %232 = extractelement <4 x i32> %225, i32 1
>  %233 = extractelement <4 x i32> %225, i32 1
>  %234 = bitcast i32 %232 to float
>  %235 = bitcast i32 %233 to float
>  %236 = fmul float %234, %235
>  %237 = bitcast float %236 to i32
>  %238 = extractelement <4 x i32> %225, i32 2
>  %239 = extractelement <4 x i32> %225, i32 2
>  %240 = bitcast i32 %238 to float
>  %241 = bitcast i32 %239 to float
>  %242 = fmul float %240, %241
>  %243 = bitcast float %242 to i32
>  %244 = insertelement <2 x i32> undef, i32 %81, i32 0
>  %245 = insertelement <2 x i32> %244, i32 %82, i32 1
>  %246 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 64
>  %247 = bitcast i8 addrspace(6)* %246 to [0 x <8 x i32>] addrspace(6)*
>  %248 = getelementptr [0 x <8 x i32>], [0 x <8 x i32>] addrspace(6)* %247, i32 0, i32 0, !amdgpu.uniform !1
>  %249 = load <8 x i32>, <8 x i32> addrspace(6)* %248, !invariant.load !1
>  %250 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 0
>  %251 = bitcast i8 addrspace(6)* %250 to [0 x <4 x i32>] addrspace(6)*
>  %252 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(6)* %251, i32 0, i32 0, !amdgpu.uniform !1
>  %253 = load <4 x i32>, <4 x i32> addrspace(6)* %252, !invariant.load !1
>  %254 = extractelement <2 x i32> %245, i32 0
>  %255 = extractelement <2 x i32> %245, i32 1
>  %256 = bitcast i32 %254 to float
>  %257 = bitcast i32 %255 to float
>  %258 = call <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32(i32 15, float %256, float %257, <8 x i32> %249, <4 x i32> %253, i1 false, i32 0, i32 0) #2
>  %259 = bitcast <4 x float> %258 to <4 x i32>
>  %260 = extractelement <4 x i32> %259, i32 0
>  %261 = extractelement <4 x i32> %259, i32 0
>  %262 = bitcast i32 %260 to float
>  %263 = bitcast i32 %261 to float
>  %264 = fmul float %262, %263
>  %265 = bitcast float %264 to i32
>  %266 = extractelement <4 x i32> %259, i32 1
>  %267 = extractelement <4 x i32> %259, i32 1
>  %268 = bitcast i32 %266 to float
>  %269 = bitcast i32 %267 to float
>  %270 = fmul float %268, %269
>  %271 = bitcast float %270 to i32
>  %272 = extractelement <4 x i32> %259, i32 2
>  %273 = extractelement <4 x i32> %259, i32 2
>  %274 = bitcast i32 %272 to float
>  %275 = bitcast i32 %273 to float
>  %276 = fmul float %274, %275
>  %277 = bitcast float %276 to i32
>  %278 = bitcast i32 %231 to float
>  %279 = fsub float -0.000000e+00, %278
>  %280 = bitcast float %279 to i32
>  %281 = bitcast i32 %237 to float
>  %282 = fsub float -0.000000e+00, %281
>  %283 = bitcast float %282 to i32
>  %284 = bitcast i32 %243 to float
>  %285 = fsub float -0.000000e+00, %284
>  %286 = bitcast float %285 to i32
>  %287 = extractelement <4 x i32> %225, i32 3
>  %288 = bitcast i32 %287 to float
>  %289 = fsub float -0.000000e+00, %288
>  %290 = bitcast float %289 to i32
>  %291 = bitcast i32 %280 to float
>  %292 = bitcast i32 %265 to float
>  %293 = fadd float %291, %292
>  %294 = bitcast float %293 to i32
>  %295 = bitcast i32 %283 to float
>  %296 = bitcast i32 %271 to float
>  %297 = fadd float %295, %296
>  %298 = bitcast float %297 to i32
>  %299 = bitcast i32 %286 to float
>  %300 = bitcast i32 %277 to float
>  %301 = fadd float %299, %300
>  %302 = bitcast float %301 to i32
>  %303 = extractelement <4 x i32> %259, i32 3
>  %304 = bitcast i32 %290 to float
>  %305 = bitcast i32 %303 to float
>  %306 = fadd float %304, %305
>  %307 = bitcast float %306 to i32
>  %308 = bitcast i32 %68 to float
>  %309 = bitcast i32 %294 to float
>  %310 = fmul float %308, %309
>  %311 = bitcast float %310 to i32
>  %312 = bitcast i32 %311 to float
>  %313 = bitcast i32 %231 to float
>  %314 = fadd float %312, %313
>  %315 = bitcast float %314 to i32
>  %316 = bitcast i32 %68 to float
>  %317 = bitcast i32 %298 to float
>  %318 = fmul float %316, %317
>  %319 = bitcast float %318 to i32
>  %320 = bitcast i32 %319 to float
>  %321 = bitcast i32 %237 to float
>  %322 = fadd float %320, %321
>  %323 = bitcast float %322 to i32
>  %324 = bitcast i32 %68 to float
>  %325 = bitcast i32 %302 to float
>  %326 = fmul float %324, %325
>  %327 = bitcast float %326 to i32
>  %328 = bitcast i32 %327 to float
>  %329 = bitcast i32 %243 to float
>  %330 = fadd float %328, %329
>  %331 = bitcast float %330 to i32
>  %332 = bitcast i32 %68 to float
>  %333 = bitcast i32 %307 to float
>  %334 = fmul float %332, %333
>  %335 = bitcast float %334 to i32
>  %336 = extractelement <4 x i32> %225, i32 3
>  %337 = bitcast i32 %335 to float
>  %338 = bitcast i32 %336 to float
>  %339 = fadd float %337, %338
>  %340 = bitcast float %339 to i32
>  %341 = insertelement <2 x i32> undef, i32 %204, i32 0
>  %342 = insertelement <2 x i32> %341, i32 %209, i32 1
>  %343 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 256
>  %344 = bitcast i8 addrspace(6)* %343 to [0 x <8 x i32>] addrspace(6)*
>  %345 = getelementptr [0 x <8 x i32>], [0 x <8 x i32>] addrspace(6)* %344, i32 0, i32 0, !amdgpu.uniform !1
>  %346 = load <8 x i32>, <8 x i32> addrspace(6)* %345, !invariant.load !1
>  %347 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 48
>  %348 = bitcast i8 addrspace(6)* %347 to [0 x <4 x i32>] addrspace(6)*
>  %349 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(6)* %348, i32 0, i32 0, !amdgpu.uniform !1
>  %350 = load <4 x i32>, <4 x i32> addrspace(6)* %349, !invariant.load !1
>  %351 = extractelement <2 x i32> %342, i32 0
>  %352 = extractelement <2 x i32> %342, i32 1
>  %353 = bitcast i32 %351 to float
>  %354 = bitcast i32 %352 to float
>  %355 = call <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32(i32 15, float %353, float %354, <8 x i32> %346, <4 x i32> %350, i1 false, i32 0, i32 0) #2
>  %356 = bitcast <4 x float> %355 to <4 x i32>
>  %357 = extractelement <4 x i32> %356, i32 0
>  %358 = bitcast i32 %357 to float
>  %359 = fsub float -0.000000e+00, %358
>  %360 = bitcast float %359 to i32
>  %361 = bitcast i32 %360 to float
>  %362 = fadd float %361, 1.000000e+00
>  %363 = bitcast float %362 to i32
>  %364 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %1, i32 0, i32 96
>  %365 = bitcast i8 addrspace(6)* %364 to <4 x i32> addrspace(6)*, !amdgpu.uniform !1
>  %366 = load <4 x i32>, <4 x i32> addrspace(6)* %365, !invariant.load !1
>  %367 = call float @llvm.SI.load.const.v4i32(<4 x i32> %366, i32 80)
>  %368 = call float @llvm.SI.load.const.v4i32(<4 x i32> %366, i32 84)
>  %369 = call float @llvm.SI.load.const.v4i32(<4 x i32> %366, i32 88)
>  %370 = call float @llvm.SI.load.const.v4i32(<4 x i32> %366, i32 92)
>  %371 = insertelement <4 x float> undef, float %367, i32 0
>  %372 = insertelement <4 x float> %371, float %368, i32 1
>  %373 = insertelement <4 x float> %372, float %369, i32 2
>  %374 = insertelement <4 x float> %373, float %370, i32 3
>  %375 = bitcast <4 x float> %374 to <4 x i32>
>  %376 = extractelement <4 x i32> %375, i32 2
>  %377 = extractelement <4 x i32> %375, i32 2
>  %378 = bitcast i32 %376 to float
>  %379 = bitcast i32 %377 to float
>  %380 = fcmp oeq float %378, %379
>  %381 = select i1 %380, i32 -1, i32 0
>  %382 = extractelement <4 x i32> %375, i32 3
>  %383 = extractelement <4 x i32> %375, i32 3
>  %384 = bitcast i32 %382 to float
>  %385 = bitcast i32 %383 to float
>  %386 = fcmp oeq float %384, %385
>  %387 = select i1 %386, i32 -1, i32 0
>  %388 = extractelement <4 x i32> %375, i32 2
>  %389 = bitcast i32 %388 to float
>  %390 = fcmp une float 0.000000e+00, %389
>  %391 = select i1 %390, i32 -1, i32 0
>  %392 = extractelement <4 x i32> %375, i32 3
>  %393 = bitcast i32 %392 to float
>  %394 = fcmp une float 0.000000e+00, %393
>  %395 = select i1 %394, i32 -1, i32 0
>  %396 = and i32 %391, %381
>  %397 = and i32 %395, %387
>  %398 = extractelement <4 x i32> %356, i32 0
>  %399 = icmp ne i32 %396, 0
>  %400 = select i1 %399, i32 %398, i32 %363
>  %401 = bitcast i32 %400 to float
>  %402 = fsub float -0.000000e+00, %401
>  %403 = bitcast float %402 to i32
>  %404 = bitcast i32 %403 to float
>  %405 = fadd float %404, 1.000000e+00
>  %406 = bitcast float %405 to i32
>  %407 = load <4 x i32>, <4 x i32> addrspace(6)* %189, !invariant.load !1
>  %408 = call float @llvm.SI.load.const.v4i32(<4 x i32> %407, i32 0)
>  %409 = call float @llvm.SI.load.const.v4i32(<4 x i32> %407, i32 4)
>  %410 = call float @llvm.SI.load.const.v4i32(<4 x i32> %407, i32 8)
>  %411 = call float @llvm.SI.load.const.v4i32(<4 x i32> %407, i32 12)
>  %412 = insertelement <4 x float> undef, float %408, i32 0
>  %413 = insertelement <4 x float> %412, float %409, i32 1
>  %414 = insertelement <4 x float> %413, float %410, i32 2
>  %415 = insertelement <4 x float> %414, float %411, i32 3
>  %416 = bitcast <4 x float> %415 to <4 x i32>
>  %417 = extractelement <4 x i32> %416, i32 2
>  %418 = bitcast i32 %406 to float
>  %419 = bitcast i32 %417 to float
>  %420 = fmul float %418, %419
>  %421 = bitcast float %420 to i32
>  %422 = extractelement <4 x i32> %416, i32 3
>  %423 = bitcast i32 %421 to float
>  %424 = bitcast i32 %422 to float
>  %425 = fadd float %423, %424
>  %426 = bitcast float %425 to i32
>  %427 = bitcast i32 %426 to float
>  %428 = fdiv float 1.000000e+00, %427, !fpmath !0
>  %429 = bitcast float %428 to i32
>  %430 = bitcast i32 %86 to float
>  %431 = fsub float -0.000000e+00, %430
>  %432 = bitcast float %431 to i32
>  %433 = bitcast i32 %429 to float
>  %434 = bitcast i32 %432 to float
>  %435 = fadd float %433, %434
>  %436 = bitcast float %435 to i32
>  %437 = bitcast i32 %436 to float
>  %438 = fmul float %437, 1.000000e+03
>  %439 = bitcast float %438 to i32
>  %440 = bitcast i32 %439 to float
>  %441 = call float @llvm.maxnum.f32(float %440, float 0.000000e+00) #2
>  %442 = call float @llvm.canonicalize.f32(float %441) #2
>  %443 = bitcast float %442 to i32
>  %444 = bitcast i32 %443 to float
>  %445 = call float @llvm.minnum.f32(float %444, float 1.000000e+00) #2
>  %446 = call float @llvm.canonicalize.f32(float %445) #2
>  %447 = bitcast float %446 to i32
>  %448 = bitcast i32 %447 to float
>  %449 = bitcast i32 %78 to float
>  %450 = fmul float %448, %449
>  %451 = bitcast float %450 to i32
>  %452 = bitcast i32 %85 to float
>  %453 = fsub float -0.000000e+00, %452
>  %454 = bitcast float %453 to i32
>  %455 = bitcast i32 %436 to float
>  %456 = bitcast i32 %436 to float
>  %457 = fmul float %455, %456
>  %458 = bitcast float %457 to i32
>  %459 = bitcast i32 %458 to float
>  %460 = bitcast i32 %454 to float
>  %461 = fadd float %459, %460
>  %462 = bitcast float %461 to i32
>  %463 = bitcast i32 %462 to float
>  %464 = bitcast i32 %70 to float
>  %465 = fmul float %463, %464
>  %466 = bitcast float %465 to i32
>  %467 = bitcast i32 %466 to float
>  %468 = call float @llvm.maxnum.f32(float %467, float 0.000000e+00) #2
>  %469 = call float @llvm.canonicalize.f32(float %468) #2
>  %470 = bitcast float %469 to i32
>  %471 = bitcast i32 %470 to float
>  %472 = call float @llvm.minnum.f32(float %471, float 1.000000e+00) #2
>  %473 = call float @llvm.canonicalize.f32(float %472) #2
>  %474 = bitcast float %473 to i32
>  %475 = bitcast i32 %451 to float
>  %476 = bitcast i32 %474 to float
>  %477 = fmul float %475, %476
>  %478 = bitcast float %477 to i32
>  %479 = load <4 x i32>, <4 x i32> addrspace(6)* %143, !invariant.load !1
>  %480 = call float @llvm.SI.load.const.v4i32(<4 x i32> %479, i32 64)
>  %481 = call float @llvm.SI.load.const.v4i32(<4 x i32> %479, i32 68)
>  %482 = call float @llvm.SI.load.const.v4i32(<4 x i32> %479, i32 72)
>  %483 = call float @llvm.SI.load.const.v4i32(<4 x i32> %479, i32 76)
>  %484 = insertelement <4 x float> undef, float %480, i32 0
>  %485 = insertelement <4 x float> %484, float %481, i32 1
>  %486 = insertelement <4 x float> %485, float %482, i32 2
>  %487 = insertelement <4 x float> %486, float %483, i32 3
>  %488 = bitcast <4 x float> %487 to <4 x i32>
>  %489 = extractelement <4 x i32> %488, i32 3
>  %490 = bitcast i32 %489 to float
>  %491 = fsub float -0.000000e+00, %490
>  %492 = bitcast float %491 to i32
>  %493 = bitcast i32 %462 to float
>  %494 = bitcast i32 %492 to float
>  %495 = fadd float %493, %494
>  %496 = bitcast float %495 to i32
>  %497 = bitcast i32 %496 to float
>  %498 = bitcast i32 %70 to float
>  %499 = fmul float %497, %498
>  %500 = bitcast float %499 to i32
>  %501 = bitcast i32 %500 to float
>  %502 = call float @llvm.maxnum.f32(float %501, float 0.000000e+00) #2
>  %503 = call float @llvm.canonicalize.f32(float %502) #2
>  %504 = bitcast float %503 to i32
>  %505 = bitcast i32 %504 to float
>  %506 = call float @llvm.minnum.f32(float %505, float 1.000000e+00) #2
>  %507 = call float @llvm.canonicalize.f32(float %506) #2
>  %508 = bitcast float %507 to i32
>  %509 = bitcast i32 %508 to float
>  %510 = fsub float -0.000000e+00, %509
>  %511 = bitcast float %510 to i32
>  %512 = bitcast i32 %511 to float
>  %513 = fadd float %512, 1.000000e+00
>  %514 = bitcast float %513 to i32
>  %515 = extractelement <4 x i32> %488, i32 2
>  %516 = bitcast i32 %515 to float
>  %517 = fsub float -0.000000e+00, %516
>  %518 = bitcast float %517 to i32
>  %519 = bitcast i32 %518 to float
>  %520 = fadd float %519, 1.000000e+00
>  %521 = bitcast float %520 to i32
>  %522 = bitcast i32 %514 to float
>  %523 = bitcast i32 %521 to float
>  %524 = fmul float %522, %523
>  %525 = bitcast float %524 to i32
>  %526 = bitcast i32 %525 to float
>  %527 = bitcast i32 %508 to float
>  %528 = fadd float %526, %527
>  %529 = bitcast float %528 to i32
>  %530 = bitcast i32 %529 to float
>  %531 = bitcast i32 %75 to float
>  %532 = fmul float %530, %531
>  %533 = bitcast float %532 to i32
>  %534 = bitcast i32 %529 to float
>  %535 = bitcast i32 %76 to float
>  %536 = fmul float %534, %535
>  %537 = bitcast float %536 to i32
>  %538 = bitcast i32 %529 to float
>  %539 = bitcast i32 %77 to float
>  %540 = fmul float %538, %539
>  %541 = bitcast float %540 to i32
>  %542 = bitcast i32 %92 to float
>  %543 = fmul float %542, 2.000000e+01
>  %544 = bitcast float %543 to i32
>  %545 = bitcast i32 %544 to float
>  %546 = call float @llvm.maxnum.f32(float %545, float 0.000000e+00) #2
>  %547 = call float @llvm.canonicalize.f32(float %546) #2
>  %548 = bitcast float %547 to i32
>  %549 = bitcast i32 %548 to float
>  %550 = call float @llvm.minnum.f32(float %549, float 1.000000e+00) #2
>  %551 = call float @llvm.canonicalize.f32(float %550) #2
>  %552 = bitcast float %551 to i32
>  %553 = icmp ne i32 %397, 0
>  %554 = select i1 %553, i32 %552, i32 1065353216
>  %555 = bitcast i32 %554 to float
>  %556 = bitcast i32 %478 to float
>  %557 = fmul float %555, %556
>  %558 = bitcast float %557 to i32
>  %559 = bitcast i32 %340 to float
>  %560 = bitcast i32 %558 to float
>  %561 = fmul float %559, %560
>  %562 = bitcast float %561 to i32
>  %563 = bitcast i32 %141 to float
>  %564 = fcmp olt float 0x3F1A36E2E0000000, %563
>  %565 = select i1 %564, i32 -1, i32 0
>  %566 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 128
>  %567 = bitcast i8 addrspace(6)* %566 to [0 x <8 x i32>] addrspace(6)*
>  %568 = getelementptr [0 x <8 x i32>], [0 x <8 x i32>] addrspace(6)* %567, i32 0, i32 0, !amdgpu.uniform !1
>  %569 = load <8 x i32>, <8 x i32> addrspace(6)* %568, !invariant.load !1
>  %570 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 16
>  %571 = bitcast i8 addrspace(6)* %570 to [0 x <4 x i32>] addrspace(6)*
>  %572 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(6)* %571, i32 0, i32 0, !amdgpu.uniform !1
>  %573 = load <4 x i32>, <4 x i32> addrspace(6)* %572, !invariant.load !1
>  %574 = extractelement <2 x i32> %342, i32 0
>  %575 = extractelement <2 x i32> %342, i32 1
>  %576 = bitcast i32 %574 to float
>  %577 = bitcast i32 %575 to float
>  %578 = call <4 x float> @llvm.amdgcn.image.sample.lz.2d.v4f32.f32(i32 15, float %576, float %577, <8 x i32> %569, <4 x i32> %573, i1 false, i32 0, i32 0) #2
>  %579 = bitcast <4 x float> %578 to <4 x i32>
>  %580 = icmp ne i32 %565, 0
>  br i1 %580, label %if1, label %else2
>
>if1:                                              ; preds = %main_body
>  %581 = bitcast i32 %178 to float
>  %582 = fadd float 5.000000e-01, %581
>  %583 = bitcast float %582 to i32
>  %584 = extractelement <4 x i32> %199, i32 0
>  %585 = bitcast i32 %584 to float
>  %586 = bitcast i32 %583 to float
>  %587 = fmul float %585, %586
>  %588 = bitcast float %587 to i32
>  %589 = bitcast i32 %187 to float
>  %590 = fadd float -1.500000e+00, %589
>  %591 = bitcast float %590 to i32
>  %592 = extractelement <4 x i32> %199, i32 1
>  %593 = bitcast i32 %592 to float
>  %594 = bitcast i32 %591 to float
>  %595 = fmul float %593, %594
>  %596 = bitcast float %595 to i32
>  %597 = bitcast i32 %178 to float
>  %598 = fadd float -1.500000e+00, %597
>  %599 = bitcast float %598 to i32
>  %600 = extractelement <4 x i32> %199, i32 0
>  %601 = bitcast i32 %600 to float
>  %602 = bitcast i32 %599 to float
>  %603 = fmul float %601, %602
>  %604 = bitcast float %603 to i32
>  %605 = bitcast i32 %187 to float
>  %606 = fadd float -5.000000e-01, %605
>  %607 = bitcast float %606 to i32
>  %608 = extractelement <4 x i32> %199, i32 1
>  %609 = bitcast i32 %608 to float
>  %610 = bitcast i32 %607 to float
>  %611 = fmul float %609, %610
>  %612 = bitcast float %611 to i32
>  %613 = bitcast i32 %165 to float
>  %614 = fadd float %613, -5.000000e-01
>  %615 = bitcast float %614 to i32
>  %616 = extractelement <4 x i32> %91, i32 0
>  %617 = bitcast i32 %615 to float
>  %618 = bitcast i32 %616 to float
>  %619 = fadd float %617, %618
>  %620 = bitcast float %619 to i32
>  %621 = extractelement <4 x i32> %199, i32 0
>  %622 = bitcast i32 %621 to float
>  %623 = bitcast i32 %620 to float
>  %624 = fmul float %622, %623
>  %625 = bitcast float %624 to i32
>  %626 = bitcast i32 %169 to float
>  %627 = fadd float %626, 1.500000e+00
>  %628 = bitcast float %627 to i32
>  %629 = extractelement <4 x i32> %91, i32 1
>  %630 = bitcast i32 %628 to float
>  %631 = bitcast i32 %629 to float
>  %632 = fadd float %630, %631
>  %633 = bitcast float %632 to i32
>  %634 = extractelement <4 x i32> %199, i32 1
>  %635 = bitcast i32 %634 to float
>  %636 = bitcast i32 %633 to float
>  %637 = fmul float %635, %636
>  %638 = bitcast float %637 to i32
>  %639 = bitcast i32 %178 to float
>  %640 = fadd float 1.500000e+00, %639
>  %641 = bitcast float %640 to i32
>  %642 = extractelement <4 x i32> %199, i32 0
>  %643 = bitcast i32 %642 to float
>  %644 = bitcast i32 %641 to float
>  %645 = fmul float %643, %644
>  %646 = bitcast float %645 to i32
>  %647 = bitcast i32 %187 to float
>  %648 = fadd float 5.000000e-01, %647
>  %649 = bitcast float %648 to i32
>  %650 = extractelement <4 x i32> %199, i32 1
>  %651 = bitcast i32 %650 to float
>  %652 = bitcast i32 %649 to float
>  %653 = fmul float %651, %652
>  %654 = bitcast float %653 to i32
>  %655 = insertelement <2 x i32> undef, i32 %588, i32 0
>  %656 = insertelement <2 x i32> %655, i32 %596, i32 1
>  %657 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 128
>  %658 = bitcast i8 addrspace(6)* %657 to [0 x <8 x i32>] addrspace(6)*
>  %659 = getelementptr [0 x <8 x i32>], [0 x <8 x i32>] addrspace(6)* %658, i32 0, i32 0, !amdgpu.uniform !1
>  %660 = load <8 x i32>, <8 x i32> addrspace(6)* %659, !invariant.load !1
>  %661 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 16
>  %662 = bitcast i8 addrspace(6)* %661 to [0 x <4 x i32>] addrspace(6)*
>  %663 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(6)* %662, i32 0, i32 0, !amdgpu.uniform !1
>  %664 = load <4 x i32>, <4 x i32> addrspace(6)* %663, !invariant.load !1
>  %665 = extractelement <2 x i32> %656, i32 0
>  %666 = extractelement <2 x i32> %656, i32 1
>  %667 = bitcast i32 %665 to float
>  %668 = bitcast i32 %666 to float
>  %669 = call <4 x float> @llvm.amdgcn.image.sample.lz.2d.v4f32.f32(i32 15, float %667, float %668, <8 x i32> %660, <4 x i32> %664, i1 false, i32 0, i32 0) #2
>  %670 = bitcast <4 x float> %669 to <4 x i32>
>  %671 = extractelement <4 x i32> %579, i32 0
>  %672 = extractelement <4 x i32> %670, i32 0
>  %673 = bitcast i32 %671 to float
>  %674 = bitcast i32 %672 to float
>  %675 = fadd float %673, %674
>  %676 = bitcast float %675 to i32
>  %677 = extractelement <4 x i32> %579, i32 1
>  %678 = extractelement <4 x i32> %670, i32 1
>  %679 = bitcast i32 %677 to float
>  %680 = bitcast i32 %678 to float
>  %681 = fadd float %679, %680
>  %682 = bitcast float %681 to i32
>  %683 = extractelement <4 x i32> %579, i32 2
>  %684 = extractelement <4 x i32> %670, i32 2
>  %685 = bitcast i32 %683 to float
>  %686 = bitcast i32 %684 to float
>  %687 = fadd float %685, %686
>  %688 = bitcast float %687 to i32
>  %689 = insertelement <2 x i32> undef, i32 %604, i32 0
>  %690 = insertelement <2 x i32> %689, i32 %612, i32 1
>  %691 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 128
>  %692 = bitcast i8 addrspace(6)* %691 to [0 x <8 x i32>] addrspace(6)*
>  %693 = getelementptr [0 x <8 x i32>], [0 x <8 x i32>] addrspace(6)* %692, i32 0, i32 0, !amdgpu.uniform !1
>  %694 = load <8 x i32>, <8 x i32> addrspace(6)* %693, !invariant.load !1
>  %695 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 16
>  %696 = bitcast i8 addrspace(6)* %695 to [0 x <4 x i32>] addrspace(6)*
>  %697 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(6)* %696, i32 0, i32 0, !amdgpu.uniform !1
>  %698 = load <4 x i32>, <4 x i32> addrspace(6)* %697, !invariant.load !1
>  %699 = extractelement <2 x i32> %690, i32 0
>  %700 = extractelement <2 x i32> %690, i32 1
>  %701 = bitcast i32 %699 to float
>  %702 = bitcast i32 %700 to float
>  %703 = call <4 x float> @llvm.amdgcn.image.sample.lz.2d.v4f32.f32(i32 15, float %701, float %702, <8 x i32> %694, <4 x i32> %698, i1 false, i32 0, i32 0) #2
>  %704 = bitcast <4 x float> %703 to <4 x i32>
>  %705 = extractelement <4 x i32> %704, i32 0
>  %706 = bitcast i32 %705 to float
>  %707 = bitcast i32 %676 to float
>  %708 = fadd float %706, %707
>  %709 = bitcast float %708 to i32
>  %710 = extractelement <4 x i32> %704, i32 1
>  %711 = bitcast i32 %710 to float
>  %712 = bitcast i32 %682 to float
>  %713 = fadd float %711, %712
>  %714 = bitcast float %713 to i32
>  %715 = extractelement <4 x i32> %704, i32 2
>  %716 = bitcast i32 %715 to float
>  %717 = bitcast i32 %688 to float
>  %718 = fadd float %716, %717
>  %719 = bitcast float %718 to i32
>  %720 = insertelement <2 x i32> undef, i32 %625, i32 0
>  %721 = insertelement <2 x i32> %720, i32 %638, i32 1
>  %722 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 128
>  %723 = bitcast i8 addrspace(6)* %722 to [0 x <8 x i32>] addrspace(6)*
>  %724 = getelementptr [0 x <8 x i32>], [0 x <8 x i32>] addrspace(6)* %723, i32 0, i32 0, !amdgpu.uniform !1
>  %725 = load <8 x i32>, <8 x i32> addrspace(6)* %724, !invariant.load !1
>  %726 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 16
>  %727 = bitcast i8 addrspace(6)* %726 to [0 x <4 x i32>] addrspace(6)*
>  %728 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(6)* %727, i32 0, i32 0, !amdgpu.uniform !1
>  %729 = load <4 x i32>, <4 x i32> addrspace(6)* %728, !invariant.load !1
>  %730 = extractelement <2 x i32> %721, i32 0
>  %731 = extractelement <2 x i32> %721, i32 1
>  %732 = bitcast i32 %730 to float
>  %733 = bitcast i32 %731 to float
>  %734 = call <4 x float> @llvm.amdgcn.image.sample.lz.2d.v4f32.f32(i32 15, float %732, float %733, <8 x i32> %725, <4 x i32> %729, i1 false, i32 0, i32 0) #2
>  %735 = bitcast <4 x float> %734 to <4 x i32>
>  %736 = extractelement <4 x i32> %735, i32 0
>  %737 = bitcast i32 %709 to float
>  %738 = bitcast i32 %736 to float
>  %739 = fadd float %737, %738
>  %740 = bitcast float %739 to i32
>  %741 = extractelement <4 x i32> %735, i32 1
>  %742 = bitcast i32 %714 to float
>  %743 = bitcast i32 %741 to float
>  %744 = fadd float %742, %743
>  %745 = bitcast float %744 to i32
>  %746 = extractelement <4 x i32> %735, i32 2
>  %747 = bitcast i32 %719 to float
>  %748 = bitcast i32 %746 to float
>  %749 = fadd float %747, %748
>  %750 = bitcast float %749 to i32
>  %751 = insertelement <2 x i32> undef, i32 %646, i32 0
>  %752 = insertelement <2 x i32> %751, i32 %654, i32 1
>  %753 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 128
>  %754 = bitcast i8 addrspace(6)* %753 to [0 x <8 x i32>] addrspace(6)*
>  %755 = getelementptr [0 x <8 x i32>], [0 x <8 x i32>] addrspace(6)* %754, i32 0, i32 0, !amdgpu.uniform !1
>  %756 = load <8 x i32>, <8 x i32> addrspace(6)* %755, !invariant.load !1
>  %757 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 16
>  %758 = bitcast i8 addrspace(6)* %757 to [0 x <4 x i32>] addrspace(6)*
>  %759 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(6)* %758, i32 0, i32 0, !amdgpu.uniform !1
>  %760 = load <4 x i32>, <4 x i32> addrspace(6)* %759, !invariant.load !1
>  %761 = extractelement <2 x i32> %752, i32 0
>  %762 = extractelement <2 x i32> %752, i32 1
>  %763 = bitcast i32 %761 to float
>  %764 = bitcast i32 %762 to float
>  %765 = call <4 x float> @llvm.amdgcn.image.sample.lz.2d.v4f32.f32(i32 15, float %763, float %764, <8 x i32> %756, <4 x i32> %760, i1 false, i32 0, i32 0) #2
>  %766 = bitcast <4 x float> %765 to <4 x i32>
>  %767 = extractelement <4 x i32> %766, i32 0
>  %768 = bitcast i32 %767 to float
>  %769 = bitcast i32 %740 to float
>  %770 = fadd float %768, %769
>  %771 = bitcast float %770 to i32
>  %772 = extractelement <4 x i32> %766, i32 1
>  %773 = bitcast i32 %772 to float
>  %774 = bitcast i32 %745 to float
>  %775 = fadd float %773, %774
>  %776 = bitcast float %775 to i32
>  %777 = extractelement <4 x i32> %766, i32 2
>  %778 = bitcast i32 %777 to float
>  %779 = bitcast i32 %750 to float
>  %780 = fadd float %778, %779
>  %781 = bitcast float %780 to i32
>  %782 = bitcast i32 %771 to float
>  %783 = fmul float %782, 0x3FC99999A0000000
>  %784 = bitcast float %783 to i32
>  %785 = bitcast i32 %776 to float
>  %786 = fmul float %785, 0x3FC99999A0000000
>  %787 = bitcast float %786 to i32
>  %788 = bitcast i32 %781 to float
>  %789 = fmul float %788, 0x3FC99999A0000000
>  %790 = bitcast float %789 to i32
>  br label %endif1
>
>else2:                                            ; preds = %main_body
>  %791 = extractelement <4 x i32> %579, i32 0
>  %792 = extractelement <4 x i32> %579, i32 1
>  %793 = extractelement <4 x i32> %579, i32 2
>  br label %endif1
>
>endif1:                                           ; preds = %else2, %if1
>  %794 = phi i32 [ %784, %if1 ], [ %791, %else2 ]
>  %795 = phi i32 [ %787, %if1 ], [ %792, %else2 ]
>  %796 = phi i32 [ %790, %if1 ], [ %793, %else2 ]
>  %797 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %1, i32 0, i32 64
>  %798 = bitcast i8 addrspace(6)* %797 to <4 x i32> addrspace(6)*, !amdgpu.uniform !1
>  %799 = load <4 x i32>, <4 x i32> addrspace(6)* %798, !invariant.load !1
>  %800 = call float @llvm.SI.load.const.v4i32(<4 x i32> %799, i32 224)
>  %801 = call float @llvm.SI.load.const.v4i32(<4 x i32> %799, i32 228)
>  %802 = call float @llvm.SI.load.const.v4i32(<4 x i32> %799, i32 232)
>  %803 = call float @llvm.SI.load.const.v4i32(<4 x i32> %799, i32 236)
>  %804 = insertelement <4 x float> undef, float %800, i32 0
>  %805 = insertelement <4 x float> %804, float %801, i32 1
>  %806 = insertelement <4 x float> %805, float %802, i32 2
>  %807 = insertelement <4 x float> %806, float %803, i32 3
>  %808 = bitcast <4 x float> %807 to <4 x i32>
>  %809 = extractelement <4 x i32> %808, i32 3
>  %810 = bitcast i32 %794 to float
>  %811 = bitcast i32 %809 to float
>  %812 = fmul float %810, %811
>  %813 = bitcast float %812 to i32
>  %814 = extractelement <4 x i32> %808, i32 3
>  %815 = bitcast i32 %795 to float
>  %816 = bitcast i32 %814 to float
>  %817 = fmul float %815, %816
>  %818 = bitcast float %817 to i32
>  %819 = extractelement <4 x i32> %808, i32 3
>  %820 = bitcast i32 %796 to float
>  %821 = bitcast i32 %819 to float
>  %822 = fmul float %820, %821
>  %823 = bitcast float %822 to i32
>  %824 = bitcast i32 %813 to float
>  %825 = fsub float -0.000000e+00, %824
>  %826 = bitcast float %825 to i32
>  %827 = bitcast i32 %818 to float
>  %828 = fsub float -0.000000e+00, %827
>  %829 = bitcast float %828 to i32
>  %830 = bitcast i32 %823 to float
>  %831 = fsub float -0.000000e+00, %830
>  %832 = bitcast float %831 to i32
>  %833 = bitcast i32 %533 to float
>  %834 = bitcast i32 %315 to float
>  %835 = fmul float %833, %834
>  %836 = bitcast float %835 to i32
>  %837 = bitcast i32 %836 to float
>  %838 = bitcast i32 %826 to float
>  %839 = fadd float %837, %838
>  %840 = bitcast float %839 to i32
>  %841 = bitcast i32 %537 to float
>  %842 = bitcast i32 %323 to float
>  %843 = fmul float %841, %842
>  %844 = bitcast float %843 to i32
>  %845 = bitcast i32 %844 to float
>  %846 = bitcast i32 %829 to float
>  %847 = fadd float %845, %846
>  %848 = bitcast float %847 to i32
>  %849 = bitcast i32 %541 to float
>  %850 = bitcast i32 %331 to float
>  %851 = fmul float %849, %850
>  %852 = bitcast float %851 to i32
>  %853 = bitcast i32 %852 to float
>  %854 = bitcast i32 %832 to float
>  %855 = fadd float %853, %854
>  %856 = bitcast float %855 to i32
>  %857 = bitcast i32 %562 to float
>  %858 = bitcast i32 %840 to float
>  %859 = fmul float %857, %858
>  %860 = bitcast float %859 to i32
>  %861 = bitcast i32 %860 to float
>  %862 = bitcast i32 %813 to float
>  %863 = fadd float %861, %862
>  %864 = bitcast float %863 to i32
>  %865 = bitcast i32 %562 to float
>  %866 = bitcast i32 %848 to float
>  %867 = fmul float %865, %866
>  %868 = bitcast float %867 to i32
>  %869 = bitcast i32 %868 to float
>  %870 = bitcast i32 %818 to float
>  %871 = fadd float %869, %870
>  %872 = bitcast float %871 to i32
>  %873 = bitcast i32 %562 to float
>  %874 = bitcast i32 %856 to float
>  %875 = fmul float %873, %874
>  %876 = bitcast float %875 to i32
>  %877 = bitcast i32 %876 to float
>  %878 = bitcast i32 %823 to float
>  %879 = fadd float %877, %878
>  %880 = bitcast float %879 to i32
>  %881 = extractelement <4 x i32> %808, i32 2
>  %882 = bitcast i32 %864 to float
>  %883 = bitcast i32 %881 to float
>  %884 = fmul float %882, %883
>  %885 = bitcast float %884 to i32
>  %886 = extractelement <4 x i32> %808, i32 2
>  %887 = bitcast i32 %872 to float
>  %888 = bitcast i32 %886 to float
>  %889 = fmul float %887, %888
>  %890 = bitcast float %889 to i32
>  %891 = extractelement <4 x i32> %808, i32 2
>  %892 = bitcast i32 %880 to float
>  %893 = bitcast i32 %891 to float
>  %894 = fmul float %892, %893
>  %895 = bitcast float %894 to i32
>  %896 = load <4 x i32>, <4 x i32> addrspace(6)* %798, !invariant.load !1
>  %897 = call float @llvm.SI.load.const.v4i32(<4 x i32> %896, i32 304)
>  %898 = call float @llvm.SI.load.const.v4i32(<4 x i32> %896, i32 308)
>  %899 = call float @llvm.SI.load.const.v4i32(<4 x i32> %896, i32 312)
>  %900 = call float @llvm.SI.load.const.v4i32(<4 x i32> %896, i32 316)
>  %901 = insertelement <4 x float> undef, float %897, i32 0
>  %902 = insertelement <4 x float> %901, float %898, i32 1
>  %903 = insertelement <4 x float> %902, float %899, i32 2
>  %904 = insertelement <4 x float> %903, float %900, i32 3
>  %905 = bitcast <4 x float> %904 to <4 x i32>
>  %906 = extractelement <4 x i32> %905, i32 0
>  %907 = bitcast i32 %562 to float
>  %908 = bitcast i32 %906 to float
>  %909 = fmul float %907, %908
>  %910 = bitcast float %909 to i32
>  %911 = insertelement <4 x i32> undef, i32 %885, i32 0
>  %912 = insertelement <4 x i32> %911, i32 %890, i32 1
>  %913 = insertelement <4 x i32> %912, i32 %895, i32 2
>  %914 = insertelement <4 x i32> %913, i32 %141, i32 3
>  %915 = bitcast <4 x i32> %914 to <4 x float>
>  %916 = extractelement <4 x float> %915, i32 0
>  store float %916, float addrspace(5)* %30
>  %917 = extractelement <4 x float> %915, i32 1
>  store float %917, float addrspace(5)* %29
>  %918 = extractelement <4 x float> %915, i32 2
>  store float %918, float addrspace(5)* %28
>  %919 = extractelement <4 x float> %915, i32 3
>  store float %919, float addrspace(5)* %27
>  %920 = bitcast i32 %86 to float
>  store float %920, float addrspace(5)* %26
>  %921 = bitcast i32 %910 to float
>  store float %921, float addrspace(5)* %22
>  %922 = load float, float addrspace(5)* %30
>  %923 = load float, float addrspace(5)* %29
>  %924 = load float, float addrspace(5)* %28
>  %925 = load float, float addrspace(5)* %27
>  %926 = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %922, float %923) #2
>  %927 = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %924, float %925) #2
>  %928 = load float, float addrspace(5)* %26
>  %929 = load float, float addrspace(5)* %25
>  %930 = load float, float addrspace(5)* %24
>  %931 = load float, float addrspace(5)* %23
>  %932 = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %928, float %929) #2
>  %933 = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %930, float %931) #2
>  %934 = load float, float addrspace(5)* %22
>  %935 = load float, float addrspace(5)* %21
>  %936 = load float, float addrspace(5)* %20
>  %937 = load float, float addrspace(5)* %19
>  %938 = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %934, float %935) #2
>  %939 = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %936, float %937) #2
>  %940 = bitcast <2 x half> %926 to <2 x i16>
>  %941 = bitcast <2 x half> %927 to <2 x i16>
>  call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 5, <2 x i16> %940, <2 x i16> %941, i1 false, i1 false) #3
>  %942 = bitcast <2 x half> %932 to <2 x i16>
>  %943 = bitcast <2 x half> %933 to <2 x i16>
>  call void @llvm.amdgcn.exp.compr.v2i16(i32 1, i32 5, <2 x i16> %942, <2 x i16> %943, i1 false, i1 false) #3
>  %944 = bitcast <2 x half> %938 to <2 x i16>
>  %945 = bitcast <2 x half> %939 to <2 x i16>
>  call void @llvm.amdgcn.exp.compr.v2i16(i32 2, i32 5, <2 x i16> %944, <2 x i16> %945, i1 true, i1 true) #3
>  ret void
>}
>
>; Function Attrs: nounwind readnone speculatable
>declare i8 addrspace(4)* @llvm.amdgcn.implicit.buffer.ptr() #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.amdgcn.interp.p1(float, i32, i32, i32) #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.amdgcn.interp.p2(float, float, i32, i32, i32) #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.amdgcn.interp.mov(i32, i32, i32, i32) #0
>
>; Function Attrs: nounwind readonly
>declare <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const.v4i32(<4 x i32>, i32) #2
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.maxnum.f32(float, float) #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.canonicalize.f32(float) #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.minnum.f32(float, float) #0
>
>; Function Attrs: nounwind readonly
>declare <4 x float> @llvm.amdgcn.image.sample.lz.2d.v4f32.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
>
>; Function Attrs: nounwind readnone speculatable
>declare <2 x half> @llvm.amdgcn.cvt.pkrtz(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.amdgcn.exp.compr.v2i16(i32, i32, <2 x i16>, <2 x i16>, i1, i1) #3
>
>attributes #0 = { nounwind readnone speculatable }
>attributes #1 = { nounwind readonly }
>attributes #2 = { nounwind readnone }
>attributes #3 = { nounwind }
>
>!0 = !{float 2.500000e+00}
>!1 = !{}
>; ModuleID = 'mesa-shader'
>source_filename = "mesa-shader"
>target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
>target triple = "amdgcn-mesa-mesa3d"
>
>define amdgpu_ps void @main([0 x i8] addrspace(6)* inreg noalias dereferenceable(18446744073709551615), [0 x i8] addrspace(6)* inreg noalias dereferenceable(18446744073709551615), i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, i32, i32) {
>main_body:
>  %19 = bitcast <2 x i32> %4 to <2 x float>
>  %20 = extractelement <2 x float> %19, i32 0
>  %21 = extractelement <2 x float> %19, i32 1
>  %22 = call float @llvm.amdgcn.interp.p1(float %20, i32 0, i32 0, i32 %2) #2
>  %23 = call float @llvm.amdgcn.interp.p2(float %22, float %21, i32 0, i32 0, i32 %2) #2
>  %24 = call float @llvm.amdgcn.interp.p1(float %20, i32 1, i32 0, i32 %2) #2
>  %25 = call float @llvm.amdgcn.interp.p2(float %24, float %21, i32 1, i32 0, i32 %2) #2
>  %26 = call float @llvm.amdgcn.interp.p1(float %20, i32 2, i32 0, i32 %2) #2
>  %27 = call float @llvm.amdgcn.interp.p2(float %26, float %21, i32 2, i32 0, i32 %2) #2
>  %28 = call float @llvm.amdgcn.interp.p1(float %20, i32 3, i32 0, i32 %2) #2
>  %29 = call float @llvm.amdgcn.interp.p2(float %28, float %21, i32 3, i32 0, i32 %2) #2
>  %30 = call float @llvm.amdgcn.interp.p1(float %20, i32 0, i32 1, i32 %2) #2
>  %31 = call float @llvm.amdgcn.interp.p2(float %30, float %21, i32 0, i32 1, i32 %2) #2
>  %32 = call float @llvm.amdgcn.interp.p1(float %20, i32 1, i32 1, i32 %2) #2
>  %33 = call float @llvm.amdgcn.interp.p2(float %32, float %21, i32 1, i32 1, i32 %2) #2
>  %34 = call float @llvm.amdgcn.interp.p1(float %20, i32 2, i32 1, i32 %2) #2
>  %35 = call float @llvm.amdgcn.interp.p2(float %34, float %21, i32 2, i32 1, i32 %2) #2
>  %36 = call float @llvm.amdgcn.interp.p1(float %20, i32 3, i32 1, i32 %2) #2
>  %37 = call float @llvm.amdgcn.interp.p2(float %36, float %21, i32 3, i32 1, i32 %2) #2
>  %38 = call float @llvm.amdgcn.interp.p1(float %20, i32 0, i32 2, i32 %2) #2
>  %39 = call float @llvm.amdgcn.interp.p2(float %38, float %21, i32 0, i32 2, i32 %2) #2
>  %40 = call float @llvm.amdgcn.interp.p1(float %20, i32 1, i32 2, i32 %2) #2
>  %41 = call float @llvm.amdgcn.interp.p2(float %40, float %21, i32 1, i32 2, i32 %2) #2
>  %42 = call float @llvm.amdgcn.interp.p1(float %20, i32 2, i32 2, i32 %2) #2
>  %43 = call float @llvm.amdgcn.interp.p2(float %42, float %21, i32 2, i32 2, i32 %2) #2
>  %44 = call float @llvm.amdgcn.interp.p1(float %20, i32 3, i32 2, i32 %2) #2
>  %45 = call float @llvm.amdgcn.interp.p2(float %44, float %21, i32 3, i32 2, i32 %2) #2
>  %46 = call float @llvm.amdgcn.interp.mov(i32 2, i32 0, i32 3, i32 %2) #2
>  %47 = call float @llvm.amdgcn.interp.mov(i32 2, i32 1, i32 3, i32 %2) #2
>  %48 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 192
>  %49 = bitcast i8 addrspace(6)* %48 to <8 x i32> addrspace(6)*
>  %50 = load <8 x i32>, <8 x i32> addrspace(6)* %49, align 32, !invariant.load !0
>  %51 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 32
>  %52 = bitcast i8 addrspace(6)* %51 to <4 x i32> addrspace(6)*
>  %53 = load <4 x i32>, <4 x i32> addrspace(6)* %52, align 16, !invariant.load !0
>  %54 = call <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32(i32 15, float %39, float %41, <8 x i32> %50, <4 x i32> %53, i1 false, i32 0, i32 0) #2
>  %55 = extractelement <4 x float> %54, i32 0
>  %56 = fmul float %55, 2.000000e+00
>  %57 = fadd float %56, -1.000000e+00
>  %58 = extractelement <4 x float> %54, i32 1
>  %59 = fmul float %58, 2.000000e+00
>  %60 = fadd float %59, -1.000000e+00
>  %61 = extractelement <4 x float> %54, i32 2
>  %62 = fmul float %61, %29
>  %63 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %1, i32 0, i32 112
>  %64 = bitcast i8 addrspace(6)* %63 to <4 x i32> addrspace(6)*, !amdgpu.uniform !0
>  %65 = load <4 x i32>, <4 x i32> addrspace(6)* %64, align 16, !invariant.load !0
>  %66 = call float @llvm.SI.load.const.v4i32(<4 x i32> %65, i32 80)
>  %67 = fmul float %62, %66
>  %68 = fmul float %67, 1.000000e+02
>  %69 = fmul float %57, %68
>  %70 = fmul float %60, %68
>  %71 = fadd float %69, %11
>  %72 = fadd float %70, %12
>  %73 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %1, i32 0, i32 80
>  %74 = bitcast i8 addrspace(6)* %73 to <4 x i32> addrspace(6)*, !amdgpu.uniform !0
>  %75 = load <4 x i32>, <4 x i32> addrspace(6)* %74, align 16, !invariant.load !0
>  %76 = call float @llvm.SI.load.const.v4i32(<4 x i32> %75, i32 16)
>  %77 = call float @llvm.SI.load.const.v4i32(<4 x i32> %75, i32 20)
>  %78 = fmul float %71, %76
>  %79 = fmul float %72, %77
>  %80 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 64
>  %81 = bitcast i8 addrspace(6)* %80 to <8 x i32> addrspace(6)*
>  %82 = load <8 x i32>, <8 x i32> addrspace(6)* %81, align 32, !invariant.load !0
>  %83 = bitcast [0 x i8] addrspace(6)* %0 to <4 x i32> addrspace(6)*
>  %84 = load <4 x i32>, <4 x i32> addrspace(6)* %83, align 16, !invariant.load !0
>  %85 = call <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32(i32 15, float %31, float %33, <8 x i32> %82, <4 x i32> %84, i1 false, i32 0, i32 0) #2
>  %86 = extractelement <4 x float> %85, i32 0
>  %87 = fmul float %86, %86
>  %88 = extractelement <4 x float> %85, i32 1
>  %89 = fmul float %88, %88
>  %90 = extractelement <4 x float> %85, i32 2
>  %91 = fmul float %90, %90
>  %92 = call <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32(i32 15, float %35, float %37, <8 x i32> %82, <4 x i32> %84, i1 false, i32 0, i32 0) #2
>  %93 = extractelement <4 x float> %92, i32 0
>  %94 = fmul float %93, %93
>  %95 = extractelement <4 x float> %92, i32 1
>  %96 = fmul float %95, %95
>  %97 = extractelement <4 x float> %92, i32 2
>  %98 = fmul float %97, %97
>  %99 = extractelement <4 x float> %85, i32 3
>  %100 = fsub float %94, %87
>  %101 = fsub float %96, %89
>  %102 = fsub float %98, %91
>  %103 = extractelement <4 x float> %92, i32 3
>  %104 = fsub float %103, %99
>  %105 = fmul float %46, %100
>  %106 = fadd float %105, %87
>  %107 = fmul float %46, %101
>  %108 = fadd float %107, %89
>  %109 = fmul float %46, %102
>  %110 = fadd float %109, %91
>  %111 = fmul float %46, %104
>  %112 = fadd float %111, %99
>  %113 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 256
>  %114 = bitcast i8 addrspace(6)* %113 to <8 x i32> addrspace(6)*
>  %115 = load <8 x i32>, <8 x i32> addrspace(6)* %114, align 32, !invariant.load !0
>  %116 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 48
>  %117 = bitcast i8 addrspace(6)* %116 to <4 x i32> addrspace(6)*
>  %118 = load <4 x i32>, <4 x i32> addrspace(6)* %117, align 16, !invariant.load !0
>  %119 = call float @llvm.amdgcn.image.sample.2d.f32.f32(i32 1, float %78, float %79, <8 x i32> %115, <4 x i32> %118, i1 false, i32 0, i32 0)
>  %120 = fsub float 1.000000e+00, %119
>  %121 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %1, i32 0, i32 96
>  %122 = bitcast i8 addrspace(6)* %121 to <4 x i32> addrspace(6)*, !amdgpu.uniform !0
>  %123 = load <4 x i32>, <4 x i32> addrspace(6)* %122, align 16, !invariant.load !0
>  %124 = call float @llvm.SI.load.const.v4i32(<4 x i32> %123, i32 88)
>  %125 = call float @llvm.SI.load.const.v4i32(<4 x i32> %123, i32 92)
>  %126 = fcmp one float %124, 0.000000e+00
>  %127 = fcmp one float %125, 0.000000e+00
>  %.v = select i1 %126, float %119, float %120
>  %128 = fsub float 1.000000e+00, %.v
>  %129 = call float @llvm.SI.load.const.v4i32(<4 x i32> %75, i32 8)
>  %130 = call float @llvm.SI.load.const.v4i32(<4 x i32> %75, i32 12)
>  %131 = fmul float %128, %129
>  %132 = fadd float %131, %130
>  %133 = fdiv float 1.000000e+00, %132, !fpmath !1
>  %134 = fsub float %133, %45
>  %135 = fmul float %134, 1.000000e+03
>  %136 = call float @llvm.maxnum.f32(float %135, float 0.000000e+00) #2
>  %137 = call float @llvm.canonicalize.f32(float %136) #2
>  %138 = call float @llvm.minnum.f32(float %137, float 1.000000e+00) #2
>  %139 = call float @llvm.canonicalize.f32(float %138) #2
>  %140 = fmul float %139, %29
>  %141 = fmul float %134, %134
>  %142 = fsub float %141, %43
>  %143 = fmul float %142, %47
>  %144 = call float @llvm.maxnum.f32(float %143, float 0.000000e+00) #2
>  %145 = call float @llvm.canonicalize.f32(float %144) #2
>  %146 = call float @llvm.minnum.f32(float %145, float 1.000000e+00) #2
>  %147 = call float @llvm.canonicalize.f32(float %146) #2
>  %148 = fmul float %140, %147
>  %149 = call float @llvm.SI.load.const.v4i32(<4 x i32> %65, i32 72)
>  %150 = call float @llvm.SI.load.const.v4i32(<4 x i32> %65, i32 76)
>  %151 = fsub float %142, %150
>  %152 = fmul float %151, %47
>  %153 = call float @llvm.maxnum.f32(float %152, float 0.000000e+00) #2
>  %154 = call float @llvm.canonicalize.f32(float %153) #2
>  %155 = call float @llvm.minnum.f32(float %154, float 1.000000e+00) #2
>  %156 = call float @llvm.canonicalize.f32(float %155) #2
>  %157 = fsub float 1.000000e+00, %156
>  %158 = fsub float 1.000000e+00, %149
>  %159 = fmul float %157, %158
>  %160 = fadd float %159, %156
>  %161 = fmul float %160, %23
>  %162 = fmul float %160, %25
>  %163 = fmul float %160, %27
>  %164 = bitcast <2 x i32> %4 to float
>  %165 = fmul float %164, 2.000000e+01
>  %166 = call float @llvm.maxnum.f32(float %165, float 0.000000e+00) #2
>  %167 = call float @llvm.canonicalize.f32(float %166) #2
>  %168 = call float @llvm.minnum.f32(float %167, float 1.000000e+00) #2
>  %169 = call float @llvm.canonicalize.f32(float %168) #2
>  %170 = select i1 %127, float %169, float 1.000000e+00
>  %171 = fmul float %170, %148
>  %172 = fmul float %112, %171
>  %173 = fcmp ogt float %62, 0x3F1A36E2E0000000
>  %174 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 128
>  %175 = bitcast i8 addrspace(6)* %174 to <8 x i32> addrspace(6)*
>  %176 = load <8 x i32>, <8 x i32> addrspace(6)* %175, align 32, !invariant.load !0
>  %177 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %0, i32 0, i32 16
>  %178 = bitcast i8 addrspace(6)* %177 to <4 x i32> addrspace(6)*
>  %179 = load <4 x i32>, <4 x i32> addrspace(6)* %178, align 16, !invariant.load !0
>  %180 = call <4 x float> @llvm.amdgcn.image.sample.lz.2d.v4f32.f32(i32 15, float %78, float %79, <8 x i32> %176, <4 x i32> %179, i1 false, i32 0, i32 0) #2
>  %181 = bitcast <4 x float> %180 to <4 x i32>
>  br i1 %173, label %if1, label %else2
>
>if1:                                              ; preds = %main_body
>  %182 = fadd float %71, 5.000000e-01
>  %183 = fmul float %76, %182
>  %184 = fadd float %72, -1.500000e+00
>  %185 = fmul float %77, %184
>  %186 = fadd float %71, -1.500000e+00
>  %187 = fmul float %76, %186
>  %188 = fadd float %72, -5.000000e-01
>  %189 = fmul float %77, %188
>  %190 = fadd float %69, -5.000000e-01
>  %191 = fadd float %190, %11
>  %192 = fmul float %76, %191
>  %193 = fadd float %70, 1.500000e+00
>  %194 = fadd float %193, %12
>  %195 = fmul float %77, %194
>  %196 = fadd float %71, 1.500000e+00
>  %197 = fmul float %76, %196
>  %198 = fadd float %72, 5.000000e-01
>  %199 = fmul float %77, %198
>  %200 = call <4 x float> @llvm.amdgcn.image.sample.lz.2d.v4f32.f32(i32 15, float %183, float %185, <8 x i32> %176, <4 x i32> %179, i1 false, i32 0, i32 0) #2
>  %201 = extractelement <4 x float> %180, i32 0
>  %202 = extractelement <4 x float> %200, i32 0
>  %203 = fadd float %201, %202
>  %204 = extractelement <4 x float> %180, i32 1
>  %205 = extractelement <4 x float> %200, i32 1
>  %206 = fadd float %204, %205
>  %207 = extractelement <4 x float> %180, i32 2
>  %208 = extractelement <4 x float> %200, i32 2
>  %209 = fadd float %207, %208
>  %210 = call <4 x float> @llvm.amdgcn.image.sample.lz.2d.v4f32.f32(i32 15, float %187, float %189, <8 x i32> %176, <4 x i32> %179, i1 false, i32 0, i32 0) #2
>  %211 = extractelement <4 x float> %210, i32 0
>  %212 = fadd float %211, %203
>  %213 = extractelement <4 x float> %210, i32 1
>  %214 = fadd float %213, %206
>  %215 = extractelement <4 x float> %210, i32 2
>  %216 = fadd float %215, %209
>  %217 = call <4 x float> @llvm.amdgcn.image.sample.lz.2d.v4f32.f32(i32 15, float %192, float %195, <8 x i32> %176, <4 x i32> %179, i1 false, i32 0, i32 0) #2
>  %218 = extractelement <4 x float> %217, i32 0
>  %219 = fadd float %212, %218
>  %220 = extractelement <4 x float> %217, i32 1
>  %221 = fadd float %214, %220
>  %222 = extractelement <4 x float> %217, i32 2
>  %223 = fadd float %216, %222
>  %224 = call <4 x float> @llvm.amdgcn.image.sample.lz.2d.v4f32.f32(i32 15, float %197, float %199, <8 x i32> %176, <4 x i32> %179, i1 false, i32 0, i32 0) #2
>  %225 = extractelement <4 x float> %224, i32 0
>  %226 = fadd float %225, %219
>  %227 = extractelement <4 x float> %224, i32 1
>  %228 = fadd float %227, %221
>  %229 = extractelement <4 x float> %224, i32 2
>  %230 = fadd float %229, %223
>  %231 = fmul float %226, 0x3FC99999A0000000
>  %232 = bitcast float %231 to i32
>  %233 = fmul float %228, 0x3FC99999A0000000
>  %234 = bitcast float %233 to i32
>  %235 = fmul float %230, 0x3FC99999A0000000
>  %236 = bitcast float %235 to i32
>  br label %endif1
>
>else2:                                            ; preds = %main_body
>  %237 = extractelement <4 x i32> %181, i32 0
>  %238 = extractelement <4 x i32> %181, i32 1
>  %239 = extractelement <4 x i32> %181, i32 2
>  br label %endif1
>
>endif1:                                           ; preds = %else2, %if1
>  %240 = phi i32 [ %232, %if1 ], [ %237, %else2 ]
>  %241 = phi i32 [ %234, %if1 ], [ %238, %else2 ]
>  %242 = phi i32 [ %236, %if1 ], [ %239, %else2 ]
>  %243 = getelementptr [0 x i8], [0 x i8] addrspace(6)* %1, i32 0, i32 64
>  %244 = bitcast i8 addrspace(6)* %243 to <4 x i32> addrspace(6)*, !amdgpu.uniform !0
>  %245 = load <4 x i32>, <4 x i32> addrspace(6)* %244, align 16, !invariant.load !0
>  %246 = call float @llvm.SI.load.const.v4i32(<4 x i32> %245, i32 232)
>  %247 = call float @llvm.SI.load.const.v4i32(<4 x i32> %245, i32 236)
>  %248 = bitcast i32 %240 to float
>  %249 = fmul float %247, %248
>  %250 = bitcast i32 %241 to float
>  %251 = fmul float %247, %250
>  %252 = bitcast i32 %242 to float
>  %253 = fmul float %247, %252
>  %254 = fmul float %161, %106
>  %255 = fsub float %254, %249
>  %256 = fmul float %162, %108
>  %257 = fsub float %256, %251
>  %258 = fmul float %163, %110
>  %259 = fsub float %258, %253
>  %260 = fmul float %172, %255
>  %261 = fadd float %260, %249
>  %262 = fmul float %172, %257
>  %263 = fadd float %262, %251
>  %264 = fmul float %172, %259
>  %265 = fadd float %264, %253
>  %266 = fmul float %261, %246
>  %267 = fmul float %263, %246
>  %268 = fmul float %265, %246
>  %269 = call float @llvm.SI.load.const.v4i32(<4 x i32> %245, i32 304)
>  %270 = fmul float %172, %269
>  %271 = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %266, float %267) #2
>  %272 = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %268, float %62) #2
>  %273 = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %45, float undef) #2
>  %274 = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %270, float undef) #2
>  %275 = bitcast <2 x half> %271 to <2 x i16>
>  %276 = bitcast <2 x half> %272 to <2 x i16>
>  call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 5, <2 x i16> %275, <2 x i16> %276, i1 false, i1 false) #3
>  %277 = bitcast <2 x half> %273 to <2 x i16>
>  call void @llvm.amdgcn.exp.compr.v2i16(i32 1, i32 5, <2 x i16> %277, <2 x i16> undef, i1 false, i1 false) #3
>  %278 = bitcast <2 x half> %274 to <2 x i16>
>  call void @llvm.amdgcn.exp.compr.v2i16(i32 2, i32 5, <2 x i16> %278, <2 x i16> undef, i1 true, i1 true) #3
>  ret void
>}
>
>; Function Attrs: nounwind readnone speculatable
>declare i8 addrspace(4)* @llvm.amdgcn.implicit.buffer.ptr() #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.amdgcn.interp.p1(float, i32, i32, i32) #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.amdgcn.interp.p2(float, float, i32, i32, i32) #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.amdgcn.interp.mov(i32, i32, i32, i32) #0
>
>; Function Attrs: nounwind readonly
>declare <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const.v4i32(<4 x i32>, i32) #2
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.maxnum.f32(float, float) #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.canonicalize.f32(float) #0
>
>; Function Attrs: nounwind readnone speculatable
>declare float @llvm.minnum.f32(float, float) #0
>
>; Function Attrs: nounwind readonly
>declare <4 x float> @llvm.amdgcn.image.sample.lz.2d.v4f32.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
>
>; Function Attrs: nounwind readnone speculatable
>declare <2 x half> @llvm.amdgcn.cvt.pkrtz(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.amdgcn.exp.compr.v2i16(i32, i32, <2 x i16>, <2 x i16>, i1, i1) #3
>
>; Function Attrs: nounwind readonly
>declare float @llvm.amdgcn.image.sample.2d.f32.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
>
>attributes #0 = { nounwind readnone speculatable }
>attributes #1 = { nounwind readonly }
>attributes #2 = { nounwind readnone }
>attributes #3 = { nounwind }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>LLVM ERROR: Cannot select: 0x7ff3f89cc4c8: f32 = bitcast 0x7ff3f89cc870
>  0x7ff3f89cc870: v2i32,ch = CopyFromReg 0x7ff3f893c858, Register:v2i32 %42
>    0x7ff3f89cc738: v2i32 = Register %42
>In function: main
>AL lib: (EE) alc_cleanup: 1 device not closed

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Attachments on bug 107477: 141244 | 141249 | 141250 | 141256 | 141267 | 141347

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