Attachment 142142 Details for Bug 108493 – ddebug dumb from unigine heaven 2

ddebug dumb from unigine heaven 2

heaven_x64_3039_00000002 (text/plain), 120.22 KB, created by Timur Kristóf on 2018-10-22 19:27:46 UTC

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Creator: Timur Kristóf

Created: 2018-10-22 19:27:46 UTC

Size: 120.22 KB

patch

obsolete

>Command: ./heaven_x64 -project_name Heaven -data_path ../ -engine_config ../data/heaven_4.0.cfg -system_script heaven/unigine.cpp -sound_app openal -video_app opengl -video_multisample 0 -video_fullscreen 1 -video_mode -1 -video_height 2160 -video_width 3840 -extern_define ,RELEASE,LANGUAGE_EN,QUALITY_LOW,TESSELLATION_DISABLED -extern_plugin ,GPUMonitor 
>Driver vendor: X.Org
>Device vendor: AMD
>Device name: Radeon RX 570 Series (POLARIS10, DRM 3.26.0, 4.18.13-300.fc29.x86_64, LLVM 8.0.0)
>
>[1;33mpipe[0m = 0x19bac30
>[1;33mtime before (API call)[0m = 146.567184s
>[1;33mtime after (driver done)[0m = 146.598954s
>
>[1;33mdraw_info: [0m{index_size = 2, has_user_indices = 0, mode = triangles, start = 1086, count = 24, start_instance = 0, instance_count = 1, drawid = 0, vertices_per_patch = 3, index_bias = 0, min_index = 0, max_index = 4294967295, primitive_restart = 0, index.resource = 0x24d4b60, count_from_stream_output = NULL, indirect = NULL, }
>
>[1;33mvertex_buffer 0: [0m{stride = 32, is_user_buffer = 0, buffer_offset = 0, buffer.resource = 0x24bf160, }
>  buffer.resource: {target = buffer, format = PIPE_FORMAT_R8_UNORM, width0 = 16768, height0 = 1, depth0 = 1, array_size = 1, last_level = 0, nr_samples = 0, nr_storage_samples = 0, usage = 0, bind = 16, flags = 0, }
>[1;33mnum vertex elements[0m = 4
>  [1;33mvertex_element 0: [0m{src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32_FLOAT, }
>  [1;33mvertex_element 1: [0m{src_offset = 8, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R16G16B16A16_FLOAT, }
>  [1;33mvertex_element 2: [0m{src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R16G16B16A16_FLOAT, }
>  [1;33mvertex_element 3: [0m{src_offset = 24, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R16G16B16A16_FLOAT, }
>[1;33mnum stream output targets[0m = 0
>
>[1;32mbegin shader: VERTEX[0m
>[1;33mshader_state: [0m{tokens = "
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL SV[0], INSTANCEID
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], GENERIC[1]
>DCL OUT[3], GENERIC[2]
>DCL OUT[4], GENERIC[3]
>DCL CONST[0][0..105]
>DCL TEMP[0..37], LOCAL
>IMM[0] INT32 {3, 0, 1, 2}
>IMM[1] FLT32 {    1.0000,     0.0000,     0.0000,     0.0000}
>  0: UMUL TEMP[0].x, SV[0].xxxx, IMM[0].xxxx
>  1: UADD TEMP[1].xyz, TEMP[0].xxxx, IMM[0].yzww
>  2: MOV TEMP[2], CONST[0][TEMP[1].x+9]
>  3: MOV TEMP[3], CONST[0][TEMP[1].y+9]
>  4: MOV TEMP[4], CONST[0][TEMP[1].z+9]
>  5: MOV TEMP[5].w, IMM[1].xxxx
>  6: MOV TEMP[5].x, IN[0].xxxx
>  7: MOV TEMP[5].y, IN[0].yyyy
>  8: MOV TEMP[5].z, IN[2].wwww
>  9: DP4 TEMP[6].x, TEMP[2], TEMP[5]
> 10: DP4 TEMP[7].x, TEMP[3], TEMP[5]
> 11: DP4 TEMP[8].x, TEMP[4], TEMP[5]
> 12: DP3 TEMP[9].x, TEMP[2].xyzz, IN[2].xyzz
> 13: DP3 TEMP[10].x, TEMP[3].xyzz, IN[2].xyzz
> 14: MOV TEMP[9].y, TEMP[10].xxxx
> 15: DP3 TEMP[11].x, TEMP[4].xyzz, IN[2].xyzz
> 16: MOV TEMP[9].z, TEMP[11].xxxx
> 17: DP3 TEMP[12].x, TEMP[9].xyzz, TEMP[9].xyzz
> 18: RSQ TEMP[13].x, TEMP[12].xxxx
> 19: MUL TEMP[14].xyz, TEMP[9].xyzz, TEMP[13].xxxx
> 20: DP3 TEMP[15].x, TEMP[2].xyzz, IN[3].xyzz
> 21: DP3 TEMP[16].x, TEMP[3].xyzz, IN[3].xyzz
> 22: MOV TEMP[15].y, TEMP[16].xxxx
> 23: DP3 TEMP[17].x, TEMP[4].xyzz, IN[3].xyzz
> 24: MOV TEMP[15].z, TEMP[17].xxxx
> 25: DP3 TEMP[18].x, TEMP[15].xyzz, TEMP[15].xyzz
> 26: RSQ TEMP[19].x, TEMP[18].xxxx
> 27: MUL TEMP[20].xyz, TEMP[15].xyzz, TEMP[19].xxxx
> 28: MOV TEMP[21].zw, IN[1].wwzw
> 29: MAD TEMP[21].xy, IN[1].xyyy, CONST[0][105].xyyy, CONST[0][105].zwww
> 30: MUL TEMP[22], CONST[0][0], TEMP[6].xxxx
> 31: MAD TEMP[23], CONST[0][1], TEMP[7].xxxx, TEMP[22]
> 32: MAD TEMP[24], CONST[0][2], TEMP[8].xxxx, TEMP[23]
> 33: ADD OUT[0], TEMP[24], CONST[0][3]
> 34: MOV OUT[1], TEMP[21]
> 35: MUL TEMP[25], CONST[0][4], TEMP[20].xxxx
> 36: MAD TEMP[26], CONST[0][5], TEMP[20].yyyy, TEMP[25]
> 37: MAD TEMP[27].xyz, CONST[0][6], TEMP[20].zzzz, TEMP[26]
> 38: MOV OUT[2].xyz, TEMP[27].xyzx
> 39: MUL TEMP[28].xyz, TEMP[14].zxyy, TEMP[20].yzxx
> 40: MAD TEMP[29].xyz, TEMP[14].yzxx, TEMP[20].zxyy, -TEMP[28].xyzz
> 41: MUL TEMP[30].xyz, TEMP[29].xyzz, IN[3].wwww
> 42: MUL TEMP[31], CONST[0][4], TEMP[30].xxxx
> 43: MAD TEMP[32], CONST[0][5], TEMP[30].yyyy, TEMP[31]
> 44: MAD TEMP[33].xyz, CONST[0][6], TEMP[30].zzzz, TEMP[32]
> 45: MOV OUT[3].xyz, TEMP[33].xyzx
> 46: MUL TEMP[34].xyz, TEMP[14].xyzz, CONST[0][8].xxxx
> 47: MUL TEMP[35], CONST[0][4], TEMP[34].xxxx
> 48: MAD TEMP[36], CONST[0][5], TEMP[34].yyyy, TEMP[35]
> 49: MAD TEMP[37].xyz, CONST[0][6], TEMP[34].zzzz, TEMP[36]
> 50: MOV OUT[4].xyz, TEMP[37].xyzx
> 51: END
>", }
>[1;33mconstant_buffer 0: [0m{buffer = NULL, buffer_offset = 0, buffer_size = 1696, user_buffer = 0x26931b0, }
>[1;32mend shader: VERTEX[0m
>
>[1;33mviewport_state 0: [0m{scale = {1920, 1080, 0.5, }, translate = {1920, 1080, 0.5, }, }
>[1;33mrasterizer_state: [0m{flatshade = 0, light_twoside = 0, clamp_vertex_color = 0, clamp_fragment_color = 0, front_ccw = 0, cull_face = 2, fill_front = 0, fill_back = 0, offset_point = 0, offset_line = 0, offset_tri = 0, scissor = 0, poly_smooth = 0, poly_stipple_enable = 0, point_smooth = 0, sprite_coord_enable = 0, sprite_coord_mode = 1, point_quad_rasterization = 1, point_tri_clip = 0, point_size_per_vertex = 0, multisample = 0, line_smooth = 0, line_stipple_enable = 0, line_stipple_factor = 0, line_stipple_pattern = 65535, line_last_pixel = 0, flatshade_first = 0, half_pixel_center = 1, bottom_edge_rule = 0, rasterizer_discard = 0, depth_clip_near = 1, depth_clip_far = 1, clip_halfz = 0, clip_plane_enable = 0, line_width = 1, point_size = 1, offset_units = 0, offset_scale = 0, offset_clamp = 0, }
>
>[1;32mbegin shader: FRAGMENT[0m
>[1;33mshader_state: [0m{tokens = "
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2], GENERIC[2], PERSPECTIVE
>DCL IN[3], GENERIC[3], PERSPECTIVE
>DCL SV[0], POSITION
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SVIEW[0], 2D, FLOAT
>DCL SVIEW[1], 2D, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL CONST[0][13..14]
>DCL CONST[0][0..12]
>DCL TEMP[0]
>DCL TEMP[1..43], LOCAL
>IMM[0] FLT32 {    1.0000,     3.0000,    -1.0000,     0.0000}
>  0: MOV TEMP[0], SV[0]
>  1: MAD TEMP[0].y, SV[0], CONST[0][14].xxxx, CONST[0][14].yyyy
>  2: MOV TEMP[1].xy, IN[0].xyyy
>  3: TEX TEMP[2].xy, TEMP[1], SAMP[1], 2D
>  4: MOV TEMP[3].xy, IN[0].xyyy
>  5: TEX TEMP[4], TEMP[3], SAMP[0], 2D
>  6: MUL TEMP[5], TEMP[4], CONST[0][12]
>  7: DP2 TEMP[6].x, TEMP[2].xyyy, TEMP[2].xyyy
>  8: ADD TEMP[7].x, IMM[0].xxxx, -TEMP[6].xxxx
>  9: MOV_SAT TEMP[8].x, TEMP[7].xxxx
> 10: SQRT TEMP[9].x, TEMP[8].xxxx
> 11: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[5].xyzz
> 12: MUL TEMP[10].xy, TEMP[0].xyyy, CONST[0][0].zwww
> 13: MOV TEMP[11].xy, TEMP[10].xyyy
> 14: TEX TEMP[12].x, TEMP[11], SAMP[4], 2D
> 15: MUL TEMP[13].xyz, CONST[0][1].xyzz, TEMP[12].xxxx
> 16: MUL TEMP[14].xyz, TEMP[5].xyzz, TEMP[13].xyzz
> 17: MUL TEMP[15].xyz, IN[1].xyzz, TEMP[2].xxxx
> 18: MAD TEMP[16].xyz, IN[2].xyzz, TEMP[2].yyyy, TEMP[15].xyzz
> 19: MAD TEMP[17].xyz, IN[3].xyzz, TEMP[9].xxxx, TEMP[16].xyzz
> 20: DP3 TEMP[18].x, TEMP[17].xyzz, TEMP[17].xyzz
> 21: RSQ TEMP[19].x, TEMP[18].xxxx
> 22: MUL TEMP[20].xyz, TEMP[17].xyzz, TEMP[19].xxxx
> 23: MUL TEMP[21].x, TEMP[20].yyyy, TEMP[20].yyyy
> 24: MAD TEMP[22].x, TEMP[20].xxxx, TEMP[20].xxxx, -TEMP[21].xxxx
> 25: MUL TEMP[23].x, TEMP[20].zzzz, TEMP[20].zzzz
> 26: MAD TEMP[24].x, TEMP[23].xxxx, IMM[0].yyyy, IMM[0].zzzz
> 27: MUL TEMP[25].x, TEMP[20].zzzz, TEMP[20].xxxx
> 28: MUL TEMP[26].x, TEMP[20].yyyy, TEMP[20].zzzz
> 29: MUL TEMP[27].x, TEMP[20].xxxx, TEMP[20].yyyy
> 30: MUL TEMP[28].xyz, CONST[0][3].xyzz, TEMP[20].yyyy
> 31: ADD TEMP[29].xyz, CONST[0][2].xyzz, -TEMP[28].xyzz
> 32: MAD TEMP[30].xyz, CONST[0][4].xyzz, TEMP[20].zzzz, TEMP[29].xyzz
> 33: MAD TEMP[31].xyz, CONST[0][5].xyzz, TEMP[20].xxxx, TEMP[30].xyzz
> 34: MAD TEMP[32].xyz, CONST[0][6].xyzz, TEMP[27].xxxx, TEMP[31].xyzz
> 35: MAD TEMP[33].xyz, CONST[0][7].xyzz, TEMP[26].xxxx, TEMP[32].xyzz
> 36: MAD TEMP[34].xyz, CONST[0][8].xyzz, TEMP[25].xxxx, TEMP[33].xyzz
> 37: MAD TEMP[35].xyz, CONST[0][9].xyzz, TEMP[24].xxxx, TEMP[34].xyzz
> 38: MAD TEMP[36].xyz, CONST[0][10].xyzz, TEMP[22].xxxx, TEMP[35].xyzz
> 39: MAX TEMP[37].xyz, TEMP[36].xyzz, IMM[0].wwww
> 40: MUL TEMP[38].xyz, TEMP[5].xyzz, TEMP[37].xyzz
> 41: MOV TEMP[39].xy, IN[0].zwww
> 42: TEX TEMP[40].x, TEMP[39], SAMP[3], 2D
> 43: MUL TEMP[41].x, TEMP[40].xxxx, TEMP[12].xxxx
> 44: MUL TEMP[42].x, TEMP[41].xxxx, CONST[0][11].xxxx
> 45: MAD TEMP[14].xyz, TEMP[38].xyzz, TEMP[42].xxxx, TEMP[14].xyzz
> 46: MOV TEMP[43].xyz, TEMP[14].xyzx
> 47: MOV TEMP[43].w, TEMP[5].wwww
> 48: MOV OUT[0], TEMP[43]
> 49: END
>", }
>[1;33mconstant_buffer 0: [0m{buffer = NULL, buffer_offset = 0, buffer_size = 240, user_buffer = 0x2696cb0, }
>[1;33msampler_state 0: [0m{wrap_s = repeat, wrap_t = repeat, wrap_r = repeat, min_img_filter = linear, min_mip_filter = nearest, mag_img_filter = linear, compare_mode = 0, compare_func = never, normalized_coords = 1, max_anisotropy = 2, seamless_cube_map = 0, lod_bias = 0, min_lod = 0, max_lod = 1000, border_color.f = {0, 0, 0, 0, }, }
>[1;33msampler_state 1: [0m{wrap_s = repeat, wrap_t = repeat, wrap_r = repeat, min_img_filter = linear, min_mip_filter = nearest, mag_img_filter = linear, compare_mode = 0, compare_func = never, normalized_coords = 1, max_anisotropy = 2, seamless_cube_map = 0, lod_bias = 0, min_lod = 0, max_lod = 1000, border_color.f = {0, 0, 0, 0, }, }
>[1;33msampler_state 2: [0m{wrap_s = repeat, wrap_t = repeat, wrap_r = repeat, min_img_filter = linear, min_mip_filter = nearest, mag_img_filter = linear, compare_mode = 0, compare_func = never, normalized_coords = 1, max_anisotropy = 0, seamless_cube_map = 0, lod_bias = 0, min_lod = 0, max_lod = 1000, border_color.f = {0, 0, 0, 0, }, }
>[1;33msampler_state 3: [0m{wrap_s = repeat, wrap_t = repeat, wrap_r = repeat, min_img_filter = linear, min_mip_filter = nearest, mag_img_filter = linear, compare_mode = 0, compare_func = never, normalized_coords = 1, max_anisotropy = 0, seamless_cube_map = 0, lod_bias = 0, min_lod = 0, max_lod = 1000, border_color.f = {0, 0, 0, 0, }, }
>[1;33msampler_state 4: [0m{wrap_s = repeat, wrap_t = repeat, wrap_r = repeat, min_img_filter = nearest, min_mip_filter = none, mag_img_filter = nearest, compare_mode = 0, compare_func = never, normalized_coords = 1, max_anisotropy = 0, seamless_cube_map = 0, lod_bias = 0, min_lod = 0, max_lod = 1000, border_color.f = {0, 0, 0, 0, }, }
>[1;33msampler_state 5: [0m{wrap_s = repeat, wrap_t = repeat, wrap_r = repeat, min_img_filter = linear, min_mip_filter = nearest, mag_img_filter = linear, compare_mode = 0, compare_func = never, normalized_coords = 1, max_anisotropy = 2, seamless_cube_map = 0, lod_bias = 0, min_lod = 0, max_lod = 1000, border_color.f = {0, 0, 0, 0, }, }
>[1;33msampler_state 6: [0m{wrap_s = clamp_to_edge, wrap_t = clamp_to_edge, wrap_r = repeat, min_img_filter = linear, min_mip_filter = none, mag_img_filter = linear, compare_mode = 1, compare_func = less_equal, normalized_coords = 1, max_anisotropy = 0, seamless_cube_map = 0, lod_bias = 0, min_lod = 0, max_lod = 1000, border_color.f = {0, 0, 0, 0, }, }
>[1;33msampler_state 7: [0m{wrap_s = repeat, wrap_t = repeat, wrap_r = repeat, min_img_filter = linear, min_mip_filter = nearest, mag_img_filter = linear, compare_mode = 0, compare_func = never, normalized_coords = 1, max_anisotropy = 0, seamless_cube_map = 0, lod_bias = 0, min_lod = 0, max_lod = 1000, border_color.f = {0, 0, 0, 0, }, }
>[1;33msampler_state 8: [0m{wrap_s = repeat, wrap_t = repeat, wrap_r = repeat, min_img_filter = nearest, min_mip_filter = none, mag_img_filter = nearest, compare_mode = 0, compare_func = never, normalized_coords = 1, max_anisotropy = 0, seamless_cube_map = 0, lod_bias = 0, min_lod = 0, max_lod = 1000, border_color.f = {0, 0, 0, 0, }, }
>[1;33msampler_view 0: [0m{target = 2d, format = PIPE_FORMAT_DXT5_RGBA, texture = 0x236ba40, u.tex.first_layer = 0, u.tex.last_layer = 0, u.tex.last_level = 7, u.tex.last_level = 7, swizzle_r = 0, swizzle_g = 1, swizzle_b = 2, swizzle_a = 3, }
>  texture: {target = 2d, format = PIPE_FORMAT_DXT5_RGBA, width0 = 128, height0 = 128, depth0 = 1, array_size = 1, last_level = 7, nr_samples = 0, nr_storage_samples = 0, usage = 0, bind = 8, flags = 4, }
>[1;33msampler_view 1: [0m{target = 2d, format = PIPE_FORMAT_RGTC2_SNORM, texture = 0x2373800, u.tex.first_layer = 0, u.tex.last_layer = 0, u.tex.last_level = 7, u.tex.last_level = 7, swizzle_r = 0, swizzle_g = 1, swizzle_b = 4, swizzle_a = 5, }
>  texture: {target = 2d, format = PIPE_FORMAT_RGTC2_SNORM, width0 = 128, height0 = 128, depth0 = 1, array_size = 1, last_level = 7, nr_samples = 0, nr_storage_samples = 0, usage = 0, bind = 8, flags = 4, }
>[1;33msampler_view 3: [0m{target = 2d, format = PIPE_FORMAT_RGTC1_UNORM, texture = 0x1ce34f0, u.tex.first_layer = 0, u.tex.last_layer = 0, u.tex.last_level = 4, u.tex.last_level = 4, swizzle_r = 0, swizzle_g = 4, swizzle_b = 4, swizzle_a = 5, }
>  texture: {target = 2d, format = PIPE_FORMAT_RGTC1_UNORM, width0 = 16, height0 = 16, depth0 = 1, array_size = 1, last_level = 4, nr_samples = 0, nr_storage_samples = 0, usage = 0, bind = 8, flags = 4, }
>[1;33msampler_view 4: [0m{target = 2d, format = PIPE_FORMAT_R8G8B8A8_UNORM, texture = 0x1c5af70, u.tex.first_layer = 0, u.tex.last_layer = 0, u.tex.last_level = 0, u.tex.last_level = 0, swizzle_r = 0, swizzle_g = 1, swizzle_b = 2, swizzle_a = 3, }
>  texture: {target = 2d, format = PIPE_FORMAT_R8G8B8A8_UNORM, width0 = 4, height0 = 4, depth0 = 1, array_size = 1, last_level = 0, nr_samples = 0, nr_storage_samples = 0, usage = 0, bind = 10, flags = 4, }
>[1;32mend shader: FRAGMENT[0m
>
>[1;33mdepth_stencil_alpha_state: [0m{depth = {enabled = 1, writemask = 1, func = less_equal, }, stencil = {{enabled = 0, }, {enabled = 0, }, }, alpha = {enabled = 0, }, }
>[1;33mstencil_ref: [0m{ref_value = {0, 0, }, }
>[1;33mblend_state: [0m{dither = 1, alpha_to_coverage = 0, alpha_to_one = 0, logicop_enable = 0, independent_blend_enable = 0, rt = {{blend_enable = 1, rgb_func = add, rgb_src_factor = src_alpha, rgb_dst_factor = inv_src_alpha, alpha_func = add, alpha_src_factor = one, alpha_dst_factor = inv_src_alpha, colormask = 15, }, }, }
>[1;33mblend_color: [0m{color = {0, 0, 0, 0, }, }
>[1;33mmin_samples[0m = 1
>[1;33msample_mask[0m = 0xffffffff
>
>[1;33mframebuffer_state: [0m{width = 3840, height = 2160, samples = 0, layers = 0, nr_cbufs = 1, cbufs = {0x7a06b40, NULL, NULL, NULL, NULL, NULL, NULL, NULL, }, zsbuf = 0x28410e0, }
>  [1;33mcbufs[0]:[0m
>    [1;33msurface: [0m{format = PIPE_FORMAT_R16G16B16A16_FLOAT, width = 3840, height = 2160, texture = 0x4c92c60, u.tex.level = 0, u.tex.first_layer = 0, u.tex.last_layer = 0, }
>    [1;33mresource: [0m{target = 2d, format = PIPE_FORMAT_R16G16B16A16_FLOAT, width0 = 3840, height0 = 2160, depth0 = 1, array_size = 1, last_level = 0, nr_samples = 0, nr_storage_samples = 0, usage = 0, bind = 10, flags = 4, }
>  [1;33mzsbuf:[0m
>    [1;33msurface: [0m{format = PIPE_FORMAT_Z24_UNORM_S8_UINT, width = 3840, height = 2160, texture = 0x28400f0, u.tex.level = 0, u.tex.first_layer = 0, u.tex.last_layer = 0, }
>    [1;33mresource: [0m{target = 2d, format = PIPE_FORMAT_Z24_UNORM_S8_UINT, width0 = 3840, height0 = 2160, depth0 = 1, array_size = 1, last_level = 0, nr_samples = 0, nr_storage_samples = 0, usage = 0, bind = 9, flags = 4, }
>
>
>
>*****************************************************************************
>Context Log:
>
>------------------ IB begin ------------------
>c0044700 [1;32mEVENT_WRITE_EOP[0m:
>00000528         [1;33mVGT_EVENT_INITIATOR[0m <- EVENT_TYPE = BOTTOM_OF_PIPE_TS
>                 [1;33mEVENT_INDEX[0m <- 5
>                 [1;33mTCL1_VOL_ACTION_ENA[0m <- 0
>                 [1;33mTC_VOL_ACTION_ENA[0m <- 0
>                 [1;33mTC_WB_ACTION_ENA[0m <- 0
>                 [1;33mTCL1_ACTION_ENA[0m <- 0
>                 [1;33mTC_ACTION_ENA[0m <- 0
>00001400         [1;33mADDRESS_LO[0m <- 5120 (0x00001400)
>23000001         [1;33mADDRESS_HI[0m <- 0x23000001
>                 [1;33mDST_SEL[0m <- 0
>                 [1;33mINT_SEL[0m <- 3
>                 [1;33mDATA_SEL[0m <- 1
>00000000         [1;33mDATA_LO[0m <- 0
>00000000         [1;33mDATA_HI[0m <- 0
>c0044700 [1;32mEVENT_WRITE_EOP[0m:
>00000528         [1;33mVGT_EVENT_INITIATOR[0m <- EVENT_TYPE = BOTTOM_OF_PIPE_TS
>                 [1;33mEVENT_INDEX[0m <- 5
>                 [1;33mTCL1_VOL_ACTION_ENA[0m <- 0
>                 [1;33mTC_VOL_ACTION_ENA[0m <- 0
>                 [1;33mTC_WB_ACTION_ENA[0m <- 0
>                 [1;33mTCL1_ACTION_ENA[0m <- 0
>                 [1;33mTC_ACTION_ENA[0m <- 0
>00107d4c         [1;33mADDRESS_LO[0m <- 0x00107d4c
>23000001         [1;33mADDRESS_HI[0m <- 0x23000001
>                 [1;33mDST_SEL[0m <- 0
>                 [1;33mINT_SEL[0m <- 3
>                 [1;33mDATA_SEL[0m <- 1
>80000000         [1;33mDATA_LO[0m <- -0.0f (0x80000000)
>00000000         [1;33mDATA_HI[0m <- 0
>c0044700 [1;32mEVENT_WRITE_EOP[0m:
>00000528         [1;33mVGT_EVENT_INITIATOR[0m <- EVENT_TYPE = BOTTOM_OF_PIPE_TS
>                 [1;33mEVENT_INDEX[0m <- 5
>                 [1;33mTCL1_VOL_ACTION_ENA[0m <- 0
>                 [1;33mTC_VOL_ACTION_ENA[0m <- 0
>                 [1;33mTC_WB_ACTION_ENA[0m <- 0
>                 [1;33mTCL1_ACTION_ENA[0m <- 0
>                 [1;33mTC_ACTION_ENA[0m <- 0
>00001400         [1;33mADDRESS_LO[0m <- 5120 (0x00001400)
>23000001         [1;33mADDRESS_HI[0m <- 0x23000001
>                 [1;33mDST_SEL[0m <- 0
>                 [1;33mINT_SEL[0m <- 3
>                 [1;33mDATA_SEL[0m <- 1
>00000000         [1;33mDATA_LO[0m <- 0
>00000000         [1;33mDATA_HI[0m <- 0
>c0044700 [1;32mEVENT_WRITE_EOP[0m:
>00000528         [1;33mVGT_EVENT_INITIATOR[0m <- EVENT_TYPE = BOTTOM_OF_PIPE_TS
>                 [1;33mEVENT_INDEX[0m <- 5
>                 [1;33mTCL1_VOL_ACTION_ENA[0m <- 0
>                 [1;33mTC_VOL_ACTION_ENA[0m <- 0
>                 [1;33mTC_WB_ACTION_ENA[0m <- 0
>                 [1;33mTCL1_ACTION_ENA[0m <- 0
>                 [1;33mTC_ACTION_ENA[0m <- 0
>00107d50         [1;33mADDRESS_LO[0m <- 0x00107d50
>23000001         [1;33mADDRESS_HI[0m <- 0x23000001
>                 [1;33mDST_SEL[0m <- 0
>                 [1;33mINT_SEL[0m <- 3
>                 [1;33mDATA_SEL[0m <- 1
>80000000         [1;33mDATA_LO[0m <- -0.0f (0x80000000)
>00000000         [1;33mDATA_HI[0m <- 0
>c0033700 [1;32mWRITE_DATA[0m:
>40100500         [1;33mCONTROL[0m <- ENGINE_SEL = PFP
>                            WR_CONFIRM = 1
>                            WR_ONE_ADDR = 0
>                            DST_SEL = MEM_ASYNC
>00107d54         [1;33mDST_ADDR_LO[0m <- 0x00107d54
>00000001         [1;33mDST_ADDR_HI[0m <- 1
>80000000 
>c0055000 [1;32mDMA_DATA[0m:
>60300000         [1;33mDMA_DATA_WORD0[0m <- CP_SYNC = 0
>                                   SRC_SEL = SRC_ADDR_TC_L2
>                                   DST_CACHE_POLICY = 0
>                                   DST_SEL = DST_ADDR_TC_L2
>                                   SRC_CACHE_POLICY = 0
>                                   ENGINE = ME
>0776b800         [1;33mSRC_ADDR_LO[0m <- 0x0776b800
>00000001         [1;33mSRC_ADDR_HI[0m <- 1
>0776b800         [1;33mDST_ADDR_LO[0m <- 0x0776b800
>00000001         [1;33mDST_ADDR_HI[0m <- 1
>00200300         [1;33mCOMMAND[0m <- BYTE_COUNT_GFX6 = 768 (0x00300)
>                            BYTE_COUNT_GFX9 = 0x200300
>                            DISABLE_WR_CONFIRM_GFX6 = 1
>                            SRC_SWAP = NONE
>                            DST_SWAP = NONE
>                            SAS = MEMORY
>                            DAS = MEMORY
>                            SAIC = INCREMENT
>                            DAIC = INCREMENT
>                            RAW_WAIT = 0
>                            DISABLE_WR_CONFIRM_GFX9 = 0
>c0055000 [1;32mDMA_DATA[0m:
>60300000         [1;33mDMA_DATA_WORD0[0m <- CP_SYNC = 0
>                                   SRC_SEL = SRC_ADDR_TC_L2
>                                   DST_CACHE_POLICY = 0
>                                   DST_SEL = DST_ADDR_TC_L2
>                                   SRC_CACHE_POLICY = 0
>                                   ENGINE = ME
>002659c0         [1;33mSRC_ADDR_LO[0m <- 0x002659c0
>00000000         [1;33mSRC_ADDR_HI[0m <- 0
>002659c0         [1;33mDST_ADDR_LO[0m <- 0x002659c0
>00000000         [1;33mDST_ADDR_HI[0m <- 0
>00200040         [1;33mCOMMAND[0m <- BYTE_COUNT_GFX6 = 64 (0x00040)
>                            BYTE_COUNT_GFX9 = 0x200040
>                            DISABLE_WR_CONFIRM_GFX6 = 1
>                            SRC_SWAP = NONE
>                            DST_SWAP = NONE
>                            SAS = MEMORY
>                            DAS = MEMORY
>                            SAIC = INCREMENT
>                            DAIC = INCREMENT
>                            RAW_WAIT = 0
>                            DISABLE_WR_CONFIRM_GFX9 = 0
>c0016900 [1;36mSET_CONTEXT_REG[1;36m:
>00000203 
>00000010         [1;33mDB_SHADER_CONTROL[0m <- Z_EXPORT_ENABLE = 0
>                                      STENCIL_TEST_VAL_EXPORT_ENABLE = 0
>                                      STENCIL_OP_VAL_EXPORT_ENABLE = 0
>                                      Z_ORDER = EARLY_Z_THEN_LATE_Z
>                                      KILL_ENABLE = 0
>                                      COVERAGE_TO_MASK_ENABLE = 0
>                                      MASK_EXPORT_ENABLE = 0
>                                      EXEC_ON_HIER_FAIL = 0
>                                      EXEC_ON_NOOP = 0
>                                      ALPHA_TO_MASK_DISABLE = 0
>                                      DEPTH_BEFORE_SHADER = 0
>                                      CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z
>                                      DUAL_QUAD_DISABLE = 0
>c0017600 [1;36mSET_SH_REG[1;36m:
>0000004e 
>00127f00         [1;33mSPI_SHADER_USER_DATA_VS_2[0m <- 0x00127f00
>c0027600 [1;36mSET_SH_REG[1;36m:
>0000000e 
>001285c0         [1;33mSPI_SHADER_USER_DATA_PS_2[0m <- 0x001285c0
>00265800         [1;33mSPI_SHADER_USER_DATA_PS_3[0m <- 0x00265800
>c0017600 [1;36mSET_SH_REG[1;36m:
>00000054 
>002659c0         [1;33mSPI_SHADER_USER_DATA_VS_8[0m <- 0x002659c0
>c0016900 [1;36mSET_CONTEXT_REG[1;36m:
>000002dc 
>0000aa00         [1;33mDB_ALPHA_TO_MASK[0m <- ALPHA_TO_MASK_ENABLE = 0
>                                     ALPHA_TO_MASK_OFFSET0 = 2
>                                     ALPHA_TO_MASK_OFFSET1 = 2
>                                     ALPHA_TO_MASK_OFFSET2 = 2
>                                     ALPHA_TO_MASK_OFFSET3 = 2
>                                     OFFSET_ROUND = 0
>c0086900 [1;36mSET_CONTEXT_REG[1;36m:
>000001e0 
>65010504         [1;33mCB_BLEND0_CONTROL[0m <- COLOR_SRCBLEND = BLEND_SRC_ALPHA
>                                      COLOR_COMB_FCN = COMB_DST_PLUS_SRC
>                                      COLOR_DESTBLEND = BLEND_ONE_MINUS_SRC_ALPHA
>                                      ALPHA_SRCBLEND = BLEND_ONE
>                                      ALPHA_COMB_FCN = COMB_DST_PLUS_SRC
>                                      ALPHA_DESTBLEND = BLEND_ONE_MINUS_SRC_ALPHA
>                                      SEPARATE_ALPHA_BLEND = 1
>                                      ENABLE = 1
>                                      DISABLE_ROP3 = 0
>65010504         [1;33mCB_BLEND1_CONTROL[0m <- COLOR_SRCBLEND = BLEND_SRC_ALPHA
>                                      COLOR_COMB_FCN = COMB_DST_PLUS_SRC
>                                      COLOR_DESTBLEND = BLEND_ONE_MINUS_SRC_ALPHA
>                                      ALPHA_SRCBLEND = BLEND_ONE
>                                      ALPHA_COMB_FCN = COMB_DST_PLUS_SRC
>                                      ALPHA_DESTBLEND = BLEND_ONE_MINUS_SRC_ALPHA
>                                      SEPARATE_ALPHA_BLEND = 1
>                                      ENABLE = 1
>                                      DISABLE_ROP3 = 0
>65010504         [1;33mCB_BLEND2_CONTROL[0m <- COLOR_SRCBLEND = BLEND_SRC_ALPHA
>                                      COLOR_COMB_FCN = COMB_DST_PLUS_SRC
>                                      COLOR_DESTBLEND = BLEND_ONE_MINUS_SRC_ALPHA
>                                      ALPHA_SRCBLEND = BLEND_ONE
>                                      ALPHA_COMB_FCN = COMB_DST_PLUS_SRC
>                                      ALPHA_DESTBLEND = BLEND_ONE_MINUS_SRC_ALPHA
>                                      SEPARATE_ALPHA_BLEND = 1
>                                      ENABLE = 1
>                                      DISABLE_ROP3 = 0
>65010504         [1;33mCB_BLEND3_CONTROL[0m <- COLOR_SRCBLEND = BLEND_SRC_ALPHA
>                                      COLOR_COMB_FCN = COMB_DST_PLUS_SRC
>                                      COLOR_DESTBLEND = BLEND_ONE_MINUS_SRC_ALPHA
>                                      ALPHA_SRCBLEND = BLEND_ONE
>                                      ALPHA_COMB_FCN = COMB_DST_PLUS_SRC
>                                      ALPHA_DESTBLEND = BLEND_ONE_MINUS_SRC_ALPHA
>                                      SEPARATE_ALPHA_BLEND = 1
>                                      ENABLE = 1
>                                      DISABLE_ROP3 = 0
>65010504         [1;33mCB_BLEND4_CONTROL[0m <- COLOR_SRCBLEND = BLEND_SRC_ALPHA
>                                      COLOR_COMB_FCN = COMB_DST_PLUS_SRC
>                                      COLOR_DESTBLEND = BLEND_ONE_MINUS_SRC_ALPHA
>                                      ALPHA_SRCBLEND = BLEND_ONE
>                                      ALPHA_COMB_FCN = COMB_DST_PLUS_SRC
>                                      ALPHA_DESTBLEND = BLEND_ONE_MINUS_SRC_ALPHA
>                                      SEPARATE_ALPHA_BLEND = 1
>                                      ENABLE = 1
>                                      DISABLE_ROP3 = 0
>65010504         [1;33mCB_BLEND5_CONTROL[0m <- COLOR_SRCBLEND = BLEND_SRC_ALPHA
>                                      COLOR_COMB_FCN = COMB_DST_PLUS_SRC
>                                      COLOR_DESTBLEND = BLEND_ONE_MINUS_SRC_ALPHA
>                                      ALPHA_SRCBLEND = BLEND_ONE
>                                      ALPHA_COMB_FCN = COMB_DST_PLUS_SRC
>                                      ALPHA_DESTBLEND = BLEND_ONE_MINUS_SRC_ALPHA
>                                      SEPARATE_ALPHA_BLEND = 1
>                                      ENABLE = 1
>                                      DISABLE_ROP3 = 0
>65010504         [1;33mCB_BLEND6_CONTROL[0m <- COLOR_SRCBLEND = BLEND_SRC_ALPHA
>                                      COLOR_COMB_FCN = COMB_DST_PLUS_SRC
>                                      COLOR_DESTBLEND = BLEND_ONE_MINUS_SRC_ALPHA
>                                      ALPHA_SRCBLEND = BLEND_ONE
>                                      ALPHA_COMB_FCN = COMB_DST_PLUS_SRC
>                                      ALPHA_DESTBLEND = BLEND_ONE_MINUS_SRC_ALPHA
>                                      SEPARATE_ALPHA_BLEND = 1
>                                      ENABLE = 1
>                                      DISABLE_ROP3 = 0
>65010504         [1;33mCB_BLEND7_CONTROL[0m <- COLOR_SRCBLEND = BLEND_SRC_ALPHA
>                                      COLOR_COMB_FCN = COMB_DST_PLUS_SRC
>                                      COLOR_DESTBLEND = BLEND_ONE_MINUS_SRC_ALPHA
>                                      ALPHA_SRCBLEND = BLEND_ONE
>                                      ALPHA_COMB_FCN = COMB_DST_PLUS_SRC
>                                      ALPHA_DESTBLEND = BLEND_ONE_MINUS_SRC_ALPHA
>                                      SEPARATE_ALPHA_BLEND = 1
>                                      ENABLE = 1
>                                      DISABLE_ROP3 = 0
>c0016900 [1;36mSET_CONTEXT_REG[1;36m:
>00000202 
>00cc0010         [1;33mCB_COLOR_CONTROL[0m <- DISABLE_DUAL_QUAD = 0
>                                     DEGAMMA_ENABLE = 0
>                                     MODE = CB_NORMAL
>                                     ROP3 = ROP3_COPY
>c0016900 [1;36mSET_CONTEXT_REG[1;36m:
>000001b5 
>0000486b         [1;33mSPI_INTERP_CONTROL_0[0m <- FLAT_SHADE_ENA = 1
>                                         PNT_SPRITE_ENA = 1
>                                         PNT_SPRITE_OVRD_X = SPI_PNT_SPRITE_SEL_S
>                                         PNT_SPRITE_OVRD_Y = SPI_PNT_SPRITE_SEL_T
>                                         PNT_SPRITE_OVRD_Z = SPI_PNT_SPRITE_SEL_0
>                                         PNT_SPRITE_OVRD_W = SPI_PNT_SPRITE_SEL_1
>                                         PNT_SPRITE_TOP_1 = 1
>c0036900 [1;36mSET_CONTEXT_REG[1;36m:
>00000280 
>00080008         [1;33mPA_SU_POINT_SIZE[0m <- HEIGHT = 8
>                                     WIDTH = 8
>00080008         [1;33mPA_SU_POINT_MINMAX[0m <- MIN_SIZE = 8
>                                       MAX_SIZE = 8
>00000008         [1;33mPA_SU_LINE_CNTL[0m <- WIDTH = 8
>c0016900 [1;36mSET_CONTEXT_REG[1;36m:
>00000292 
>00000002         [1;33mPA_SC_MODE_CNTL_0[0m <- MSAA_ENABLE = 0
>                                      VPORT_SCISSOR_ENABLE = 1
>                                      LINE_STIPPLE_ENABLE = 0
>                                      SEND_UNLIT_STILES_TO_PKR = 0
>c0016900 [1;36mSET_CONTEXT_REG[1;36m:
>000002df 
>00000000         [1;33mPA_SU_POLY_OFFSET_CLAMP[0m <- 0
>c0016900 [1;36mSET_CONTEXT_REG[1;36m:
>00000205 
>00080246         [1;33mPA_SU_SC_MODE_CNTL[0m <- CULL_FRONT = 0
>                                       CULL_BACK = 1
>                                       FACE = 1
>                                       POLY_MODE = X_DISABLE_POLY_MODE
>                                       POLYMODE_FRONT_PTYPE = X_DRAW_TRIANGLES
>                                       POLYMODE_BACK_PTYPE = X_DRAW_TRIANGLES
>                                       POLY_OFFSET_FRONT_ENABLE = 0
>                                       POLY_OFFSET_BACK_ENABLE = 0
>                                       POLY_OFFSET_PARA_ENABLE = 0
>                                       VTX_WINDOW_OFFSET_ENABLE = 0
>                                       PROVOKING_VTX_LAST = 1
>                                       PERSP_CORR_DIS = 0
>                                       MULTI_PRIM_IB_ENA = 0
>c0016900 [1;36mSET_CONTEXT_REG[1;36m:
>00000200 
>00000036         [1;33mDB_DEPTH_CONTROL[0m <- STENCIL_ENABLE = 0
>                                     Z_ENABLE = 1
>                                     Z_WRITE_ENABLE = 1
>                                     DEPTH_BOUNDS_ENABLE = 0
>                                     ZFUNC = FRAG_LEQUAL
>                                     BACKFACE_ENABLE = 0
>                                     STENCILFUNC = REF_NEVER
>                                     STENCILFUNC_BF = REF_NEVER
>                                     ENABLE_COLOR_WRITES_ON_DEPTH_FAIL = 0
>                                     DISABLE_COLOR_WRITES_ON_DEPTH_PASS = 0
>c0047600 [1;36mSET_SH_REG[1;36m:
>00000048 
>010776b8         [1;33mSPI_SHADER_PGM_LO_VS[0m <- 0x010776b8
>00000000         [1;33mSPI_SHADER_PGM_HI_VS[0m <- MEM_BASE = 0
>012c0105         [1;33mSPI_SHADER_PGM_RSRC1_VS[0m <- VGPRS = 5
>                                            SGPRS = 4
>                                            PRIORITY = 0
>                                            FLOAT_MODE = 192 (0xc0)
>                                            PRIV = 0
>                                            DX10_CLAMP = 1
>                                            DEBUG_MODE = 0
>                                            IEEE_MODE = 0
>                                            VGPR_COMP_CNT = 1
>                                            CU_GROUP_ENABLE = 0
>                                            CACHE_CTL = 0
>                                            CDBG_USER = 0
>00000012         [1;33mSPI_SHADER_PGM_RSRC2_VS[0m <- SCRATCH_EN = 0
>                                            USER_SGPR = 9
>                                            TRAP_PRESENT = 0
>                                            OC_LDS_EN = 0
>                                            SO_BASE0_EN = 0
>                                            SO_BASE1_EN = 0
>                                            SO_BASE2_EN = 0
>                                            SO_BASE3_EN = 0
>                                            SO_EN = 0
>                                            EXCP_EN_SI = 0
>                                            EXCP_EN = 0
>                                            DISPATCH_DRAW_EN = 0
>c0016900 [1;36mSET_CONTEXT_REG[1;36m:
>000001b1 
>00000006         [1;33mSPI_VS_OUT_CONFIG[0m <- VS_EXPORT_COUNT = 3
>                                      VS_HALF_PACK = 0
>                                      VS_EXPORTS_FOG = 0
>                                      VS_OUT_FOG_VEC_ADDR = 0
>c0047600 [1;36mSET_SH_REG[1;36m:
>00000008 
>010776bc         [1;33mSPI_SHADER_PGM_LO_PS[0m <- 0x010776bc
>00000000         [1;33mSPI_SHADER_PGM_HI_PS[0m <- MEM_BASE = 0
>002c0205         [1;33mSPI_SHADER_PGM_RSRC1_PS[0m <- VGPRS = 5
>                                            SGPRS = 8
>                                            PRIORITY = 0
>                                            FLOAT_MODE = FP_64_DENORMS
>                                            PRIV = 0
>                                            DX10_CLAMP = 1
>                                            DEBUG_MODE = 0
>                                            IEEE_MODE = 0
>                                            CU_GROUP_DISABLE = 0
>                                            CACHE_CTL = 0
>                                            CDBG_USER = 0
>0000000a         [1;33mSPI_SHADER_PGM_RSRC2_PS[0m <- SCRATCH_EN = 0
>                                            USER_SGPR = 5
>                                            TRAP_PRESENT = 0
>                                            WAVE_CNT_EN = 0
>                                            EXTRA_LDS_SIZE = 0
>                                            EXCP_EN_SI = 0
>                                            EXCP_EN = 0
>c0026900 [1;36mSET_CONTEXT_REG[1;36m:
>000001b3 
>00000302         [1;33mSPI_PS_INPUT_ENA[0m <- PERSP_SAMPLE_ENA = 0
>                                     PERSP_CENTER_ENA = 1
>                                     PERSP_CENTROID_ENA = 0
>                                     PERSP_PULL_MODEL_ENA = 0
>                                     LINEAR_SAMPLE_ENA = 0
>                                     LINEAR_CENTER_ENA = 0
>                                     LINEAR_CENTROID_ENA = 0
>                                     LINE_STIPPLE_TEX_ENA = 0
>                                     POS_X_FLOAT_ENA = 1
>                                     POS_Y_FLOAT_ENA = 1
>                                     POS_Z_FLOAT_ENA = 0
>                                     POS_W_FLOAT_ENA = 0
>                                     FRONT_FACE_ENA = 0
>                                     ANCILLARY_ENA = 0
>                                     SAMPLE_COVERAGE_ENA = 0
>                                     POS_FIXED_PT_ENA = 0
>0000f377         [1;33mSPI_PS_INPUT_ADDR[0m <- PERSP_SAMPLE_ENA = 1
>                                      PERSP_CENTER_ENA = 1
>                                      PERSP_CENTROID_ENA = 1
>                                      PERSP_PULL_MODEL_ENA = 0
>                                      LINEAR_SAMPLE_ENA = 1
>                                      LINEAR_CENTER_ENA = 1
>                                      LINEAR_CENTROID_ENA = 1
>                                      LINE_STIPPLE_TEX_ENA = 0
>                                      POS_X_FLOAT_ENA = 1
>                                      POS_Y_FLOAT_ENA = 1
>                                      POS_Z_FLOAT_ENA = 0
>                                      POS_W_FLOAT_ENA = 0
>                                      FRONT_FACE_ENA = 1
>                                      ANCILLARY_ENA = 1
>                                      SAMPLE_COVERAGE_ENA = 1
>                                      POS_FIXED_PT_ENA = 1
>c0016900 [1;36mSET_CONTEXT_REG[1;36m:
>000001b6 
>00000004         [1;33mSPI_PS_IN_CONTROL[0m <- NUM_INTERP = 4
>                                      PARAM_GEN = 0
>                                      FOG_ADDR = 0
>                                      BC_OPTIMIZE_DISABLE = 0
>                                      PASS_FOG_THROUGH_PS = 0
>c0017600 [1;36mSET_SH_REG[1;36m:
>00000050 
>00000002         [1;33mSPI_SHADER_USER_DATA_VS_4[0m <- 2
>c0002a00 [1;32mINDEX_TYPE[0m:
>00000000         [1;33mVGT_DMA_INDEX_TYPE[0m <- INDEX_TYPE = VGT_INDEX_16
>                                       SWAP_MODE = VGT_DMA_SWAP_NONE
>                                       BUF_TYPE = VGT_DMA_BUF_MEM
>                                       RDREQ_POLICY_CIK = VGT_POLICY_LRU
>                                       RDREQ_POLICY = 0
>                                       ATC = 0
>                                       NOT_EOP = 0
>                                       REQ_PATH = 0
>                                       MTYPE = 0
>c0002f00 [1;32mNUM_INSTANCES[0m:
>00000001         [1;33mVGT_NUM_INSTANCES[0m <- 1
>c0042700 [1;32mDRAW_INDEX_2[0m:
>00000588         [1;33mVGT_DMA_MAX_SIZE[0m <- 1416 (0x00000588)
>080e087c         [1;33mVGT_DMA_BASE[0m <- 0x080e087c
>00000001         [1;33mVGT_DMA_BASE_HI[0m <- BASE_ADDR_GFX6 = 1
>00000018         [1;33mVGT_NUM_INDICES[0m <- 24 (0x00000018)
>00000000         [1;33mVGT_DRAW_INITIATOR[0m <- SOURCE_SELECT = DI_SRC_SEL_DMA
>                                       MAJOR_MODE = DI_MAJOR_MODE_0
>                                       NOT_EOP = 0
>                                       USE_OPAQUE = 0
>c0055000 [1;32mDMA_DATA[0m:
>60300000         [1;33mDMA_DATA_WORD0[0m <- CP_SYNC = 0
>                                   SRC_SEL = SRC_ADDR_TC_L2
>                                   DST_CACHE_POLICY = 0
>                                   DST_SEL = DST_ADDR_TC_L2
>                                   SRC_CACHE_POLICY = 0
>                                   ENGINE = ME
>0776bc00         [1;33mSRC_ADDR_LO[0m <- 0x0776bc00
>00000001         [1;33mSRC_ADDR_HI[0m <- 1
>0776bc00         [1;33mDST_ADDR_LO[0m <- 0x0776bc00
>00000001         [1;33mDST_ADDR_HI[0m <- 1
>00200380         [1;33mCOMMAND[0m <- BYTE_COUNT_GFX6 = 896 (0x00380)
>                            BYTE_COUNT_GFX9 = 0x200380
>                            DISABLE_WR_CONFIRM_GFX6 = 1
>                            SRC_SWAP = NONE
>                            DST_SWAP = NONE
>                            SAS = MEMORY
>                            DAS = MEMORY
>                            SAIC = INCREMENT
>                            DAIC = INCREMENT
>                            RAW_WAIT = 0
>                            DISABLE_WR_CONFIRM_GFX9 = 0
>c0033700 [1;32mWRITE_DATA[0m:
>00100100         [1;33mCONTROL[0m <- ENGINE_SEL = ME
>                            WR_CONFIRM = 1
>                            WR_ONE_ADDR = 0
>                            DST_SEL = MEMORY_SYNC
>00073000         [1;33mDST_ADDR_LO[0m <- 0x00073000
>00000001         [1;33mDST_ADDR_HI[0m <- 1
>000000cf 
>c0001000 [1;32mNOP[0m:
>                 [31mTrace point ID: 207
>                 [31m!!!!! This trace point was NOT reached by the CP !!!!![0m
>cafe00cf 
>------------------- IB end -------------------
>
>[1;33mColor buffer 0:[0m
>  Info: npix_x=3840, npix_y=2160, npix_z=1, blk_w=1, blk_h=1, array_size=1, last_level=0, bpe=8, nsamples=0, flags=0x2000000, r16g16b16a16_float
>  Layout: size=66846720, alignment=262144, bankw=1, bankh=4, nbanks=16, mtilea=4, tilesplit=1024, pipeconfig=12, scanout=0
>  DCC: offset=66846720, size=262144, alignment=32768
>  DCCLevel[0]: enabled=1, offset=0, fast_clear_size=262144
>  Level[0]: offset=0, slice_size=66846720, npix_x=3840, npix_y=2160, npix_z=1, nblk_x=3840, nblk_y=2176, mode=3, tiling_index = 14
>
>[1;33mDepth-stencil buffer:[0m
>  Info: npix_x=3840, npix_y=2160, npix_z=1, blk_w=1, blk_h=1, array_size=1, last_level=0, bpe=4, nsamples=0, flags=0x2860000, z24_unorm_s8_uint
>  Layout: size=41779200, alignment=131072, bankw=1, bankh=4, nbanks=16, mtilea=4, tilesplit=256, pipeconfig=12, scanout=0
>  HTile: offset=41779200, size=524288, alignment=32768, TC_compatible = 1
>  Level[0]: offset=0, slice_size=33423360, npix_x=3840, npix_y=2160, npix_z=1, nblk_x=3840, nblk_y=2176, mode=3, tiling_index = 2
>  StencilLayout: tilesplit=64
>  StencilLevel[0]: offset=33423360, slice_size=8355840, npix_x=3840, npix_y=2160, npix_z=1, nblk_x=3840, nblk_y=2176, mode=3, tiling_index = 0
>
>SHADER KEY
>  part.vs.prolog.instance_divisor_is_one = 0
>  part.vs.prolog.instance_divisor_is_fetched = 0
>  part.vs.prolog.ls_vgpr_fix = 0
>  mono.vs.fix_fetch = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  mono.u.vs_export_prim_id = 0
>  opt.kill_outputs = 0x0
>  opt.clip_disable = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>vs_prolog:
>BB5_0:
>	v_add_u32_e32 v4, vcc, s5, v0 ; 32080005
>	v_mov_b32_e32 v5, v4          ; 7E0A0304
>	v_mov_b32_e32 v6, v4          ; 7E0C0304
>	v_mov_b32_e32 v7, v4          ; 7E0E0304
>Shader main disassembly:
>main:
>BB2_0:
>	s_mov_b32 s9, 0                                               ; BE890080
>	s_load_dwordx4 s[12:15], s[8:9], 0x0                          ; C00A0304 00000000
>	v_mul_lo_i32 v12, v1, 48                                      ; D285000C 00016101
>	s_mov_b32 s0, s2                                              ; BE800002
>	s_mov_b32 s3, 0x27fac                                         ; BE8300FF 00027FAC
>	s_movk_i32 s2, 0x6a0                                          ; B00206A0
>	s_mov_b32 s1, s9                                              ; BE810009
>	buffer_load_dwordx4 v[0:3], v12, s[0:3], 0 offen offset:144   ; E05C1090 8000000C
>	s_load_dwordx4 s[4:7], s[8:9], 0x10                           ; C00A0104 00000010
>	s_load_dwordx4 s[16:19], s[8:9], 0x20                         ; C00A0404 00000020
>	s_load_dwordx4 s[20:23], s[8:9], 0x30                         ; C00A0504 00000030
>	buffer_load_dwordx4 v[8:11], v12, s[0:3], 0 offen offset:160  ; E05C10A0 8000080C
>	buffer_load_dwordx4 v[12:15], v12, s[0:3], 0 offen offset:176 ; E05C10B0 80000C0C
>	s_waitcnt lgkmcnt(0)                                          ; BF8C007F
>	buffer_load_format_xy v[16:17], v4, s[12:15], 0 idxen         ; E0042000 80031004
>	s_buffer_load_dword s30, s[0:3], 0x58                         ; C0220780 00000058
>	s_buffer_load_dwordx2 s[28:29], s[0:3], 0x60                  ; C0260700 00000060
>	s_buffer_load_dword s31, s[0:3], 0x68                         ; C02207C0 00000068
>	s_buffer_load_dword s32, s[0:3], 0x80                         ; C0220800 00000080
>	s_buffer_load_dwordx4 s[8:11], s[0:3], 0x690                  ; C02A0200 00000690
>	s_waitcnt vmcnt(0)                                            ; BF8C0F70
>	v_mul_f32_e32 v4, v1, v17                                     ; 0A082301
>	v_mul_f32_e32 v20, v9, v17                                    ; 0A282309
>	v_mul_f32_e32 v21, v13, v17                                   ; 0A2A230D
>	v_mac_f32_e32 v4, v0, v16                                     ; 2C082100
>	v_mac_f32_e32 v20, v8, v16                                    ; 2C282108
>	v_mac_f32_e32 v21, v12, v16                                   ; 2C2A210C
>	buffer_load_format_xyzw v[16:19], v6, s[16:19], 0 idxen       ; E00C2000 80041006
>	s_buffer_load_dwordx4 s[12:15], s[0:3], 0x0                   ; C02A0300 00000000
>	s_waitcnt vmcnt(0)                                            ; BF8C0F70
>	v_mul_f32_e32 v6, v0, v16                                     ; 0A0C2100
>	v_mul_f32_e32 v22, v8, v16                                    ; 0A2C2108
>	v_mul_f32_e32 v23, v12, v16                                   ; 0A2E210C
>	v_mac_f32_e32 v6, v1, v17                                     ; 2C0C2301
>	v_mac_f32_e32 v22, v9, v17                                    ; 2C2C2309
>	v_mac_f32_e32 v23, v13, v17                                   ; 2C2E230D
>	v_mac_f32_e32 v4, v2, v19                                     ; 2C082702
>	v_mac_f32_e32 v20, v10, v19                                   ; 2C28270A
>	v_mac_f32_e32 v21, v14, v19                                   ; 2C2A270E
>	v_mac_f32_e32 v6, v2, v18                                     ; 2C0C2502
>	v_mac_f32_e32 v22, v10, v18                                   ; 2C2C250A
>	v_mac_f32_e32 v23, v14, v18                                   ; 2C2E250E
>	buffer_load_format_xyzw v[16:19], v7, s[20:23], 0 idxen       ; E00C2000 80051007
>	v_add_f32_e32 v4, v4, v3                                      ; 02080704
>	s_buffer_load_dwordx4 s[16:19], s[0:3], 0x10                  ; C02A0400 00000010
>	s_buffer_load_dwordx4 s[20:23], s[0:3], 0x20                  ; C02A0500 00000020
>	s_buffer_load_dwordx4 s[24:27], s[0:3], 0x30                  ; C02A0600 00000030
>	s_waitcnt vmcnt(0)                                            ; BF8C0F70
>	v_mul_f32_e32 v7, v0, v16                                     ; 0A0E2100
>	v_mac_f32_e32 v7, v1, v17                                     ; 2C0E2301
>	v_mac_f32_e32 v7, v2, v18                                     ; 2C0E2502
>	buffer_load_format_xyzw v[0:3], v5, s[4:7], 0 idxen           ; E00C2000 80010005
>	v_mul_f32_e32 v8, v8, v16                                     ; 0A102108
>	v_mac_f32_e32 v8, v9, v17                                     ; 2C102309
>	v_mac_f32_e32 v8, v10, v18                                    ; 2C10250A
>	v_mul_f32_e32 v10, v12, v16                                   ; 0A14210C
>	v_mac_f32_e32 v10, v13, v17                                   ; 2C14230D
>	v_mul_f32_e32 v5, v6, v6                                      ; 0A0A0D06
>	v_mul_f32_e32 v12, v7, v7                                     ; 0A180F07
>	v_mac_f32_e32 v5, v22, v22                                    ; 2C0A2D16
>	v_mac_f32_e32 v10, v14, v18                                   ; 2C14250E
>	v_mac_f32_e32 v12, v8, v8                                     ; 2C181108
>	v_mac_f32_e32 v5, v23, v23                                    ; 2C0A2F17
>	v_mac_f32_e32 v12, v10, v10                                   ; 2C18150A
>	v_rsq_f32_e32 v12, v12                                        ; 7E18490C
>	v_rsq_f32_e32 v5, v5                                          ; 7E0A4905
>	s_buffer_load_dwordx2 s[4:5], s[0:3], 0x40                    ; C0260100 00000040
>	s_buffer_load_dword s6, s[0:3], 0x48                          ; C0220180 00000048
>	s_buffer_load_dwordx2 s[0:1], s[0:3], 0x50                    ; C0260000 00000050
>	s_waitcnt lgkmcnt(0)                                          ; BF8C007F
>	v_mov_b32_e32 v16, s10                                        ; 7E20020A
>	v_add_f32_e32 v9, v20, v11                                    ; 02121714
>	v_mul_f32_e32 v17, s13, v4                                    ; 0A22080D
>	v_mul_f32_e32 v18, s14, v4                                    ; 0A24080E
>	v_mul_f32_e32 v6, v6, v5                                      ; 0A0C0B06
>	v_mul_f32_e32 v13, v22, v5                                    ; 0A1A0B16
>	v_mul_f32_e32 v10, v10, v12                                   ; 0A14190A
>	v_mul_f32_e32 v5, v23, v5                                     ; 0A0A0B17
>	v_mul_f32_e32 v8, v8, v12                                     ; 0A101908
>	v_mul_f32_e32 v7, v7, v12                                     ; 0A0E1907
>	v_mul_f32_e32 v12, v5, v8                                     ; 0A181105
>	v_mul_f32_e32 v14, v6, v10                                    ; 0A1C1506
>	v_add_f32_e32 v11, v21, v15                                   ; 02161F15
>	v_mac_f32_e32 v17, s17, v9                                    ; 2C221211
>	v_mac_f32_e32 v18, s18, v9                                    ; 2C241212
>	v_mad_f32 v14, v5, v7, -v14                                   ; D1C1000E 843A0F05
>	v_mul_f32_e32 v15, v13, v7                                    ; 0A1E0F0D
>	v_mad_f32 v12, v13, v10, -v12                                 ; D1C1000C 8432150D
>	v_mac_f32_e32 v17, s21, v11                                   ; 2C221615
>	v_mac_f32_e32 v18, s22, v11                                   ; 2C241616
>	v_mul_f32_e32 v12, v12, v19                                   ; 0A18270C
>	v_mad_f32 v15, v6, v8, -v15                                   ; D1C1000F 843E1106
>	v_mul_f32_e32 v14, v14, v19                                   ; 0A1C270E
>	v_mul_f32_e32 v15, v15, v19                                   ; 0A1E270F
>	v_mul_f32_e32 v6, s32, v6                                     ; 0A0C0C20
>	v_mul_f32_e32 v13, s32, v13                                   ; 0A1A1A20
>	v_mul_f32_e32 v5, s32, v5                                     ; 0A0A0A20
>	s_waitcnt vmcnt(0)                                            ; BF8C0F70
>	v_mad_f32 v0, s8, v0, v16                                     ; D1C10000 04420008
>	v_mul_f32_e32 v16, s12, v4                                    ; 0A20080C
>	v_mul_f32_e32 v4, s15, v4                                     ; 0A08080F
>	v_mac_f32_e32 v16, s16, v9                                    ; 2C201210
>	v_mac_f32_e32 v4, s19, v9                                     ; 2C081213
>	v_mac_f32_e32 v4, s23, v11                                    ; 2C081617
>	v_mul_f32_e32 v9, s4, v7                                      ; 0A120E04
>	v_mac_f32_e32 v16, s20, v11                                   ; 2C201614
>	v_mul_f32_e32 v11, s5, v7                                     ; 0A160E05
>	v_mul_f32_e32 v7, s6, v7                                      ; 0A0E0E06
>	v_mac_f32_e32 v9, s0, v8                                      ; 2C121000
>	v_mac_f32_e32 v11, s1, v8                                     ; 2C161001
>	v_mac_f32_e32 v7, s30, v8                                     ; 2C0E101E
>	v_mul_f32_e32 v8, s4, v12                                     ; 0A101804
>	v_mac_f32_e32 v9, s28, v10                                    ; 2C12141C
>	v_mac_f32_e32 v11, s29, v10                                   ; 2C16141D
>	v_mac_f32_e32 v7, s31, v10                                    ; 2C0E141F
>	v_mul_f32_e32 v10, s5, v12                                    ; 0A141805
>	v_mul_f32_e32 v12, s6, v12                                    ; 0A181806
>	v_mac_f32_e32 v8, s0, v14                                     ; 2C101C00
>	v_mac_f32_e32 v10, s1, v14                                    ; 2C141C01
>	v_mac_f32_e32 v12, s30, v14                                   ; 2C181C1E
>	v_mul_f32_e32 v14, s4, v6                                     ; 0A1C0C04
>	v_mac_f32_e32 v8, s28, v15                                    ; 2C101E1C
>	v_mac_f32_e32 v10, s29, v15                                   ; 2C141E1D
>	v_mac_f32_e32 v12, s31, v15                                   ; 2C181E1F
>	v_mul_f32_e32 v15, s5, v6                                     ; 0A1E0C05
>	v_mul_f32_e32 v6, s6, v6                                      ; 0A0C0C06
>	v_mac_f32_e32 v14, s0, v13                                    ; 2C1C1A00
>	v_mac_f32_e32 v15, s1, v13                                    ; 2C1E1A01
>	v_mac_f32_e32 v6, s30, v13                                    ; 2C0C1A1E
>	v_mov_b32_e32 v13, s11                                        ; 7E1A020B
>	v_mac_f32_e32 v13, s9, v1                                     ; 2C1A0209
>	v_add_f32_e32 v1, s24, v16                                    ; 02022018
>	v_add_f32_e32 v16, s25, v17                                   ; 02202219
>	v_add_f32_e32 v17, s26, v18                                   ; 0222241A
>	v_add_f32_e32 v4, s27, v4                                     ; 0208081B
>	exp pos0 v1, v16, v17, v4 done                                ; C40008CF 04111001
>	v_mac_f32_e32 v14, s28, v5                                    ; 2C1C0A1C
>	v_mac_f32_e32 v15, s29, v5                                    ; 2C1E0A1D
>	v_mac_f32_e32 v6, s31, v5                                     ; 2C0C0A1F
>	exp param0 v0, v13, v2, v3                                    ; C400020F 03020D00
>	exp param1 v9, v11, v7, v0                                    ; C400021F 00070B09
>	exp param2 v8, v10, v12, v0                                   ; C400022F 000C0A08
>	exp param3 v14, v15, v6, v0                                   ; C400023F 00060F0E
>	s_endpgm                                                      ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 40
>VGPRS: 24
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Private memory VGPRs: 0
>Code Size: 748 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 8
>********************
>
>
>SHADER KEY
>  part.ps.prolog.color_two_side = 0
>  part.ps.prolog.flatshade_colors = 0
>  part.ps.prolog.poly_stipple = 0
>  part.ps.prolog.force_persp_sample_interp = 0
>  part.ps.prolog.force_linear_sample_interp = 0
>  part.ps.prolog.force_persp_center_interp = 0
>  part.ps.prolog.force_linear_center_interp = 0
>  part.ps.prolog.bc_optimize_for_persp = 0
>  part.ps.prolog.bc_optimize_for_linear = 0
>  part.ps.epilog.spi_shader_col_format = 0x4
>  part.ps.epilog.color_is_int8 = 0x0
>  part.ps.epilog.color_is_int10 = 0x0
>  part.ps.epilog.last_cbuf = 0
>  part.ps.epilog.alpha_func = 7
>  part.ps.epilog.alpha_to_one = 0
>  part.ps.epilog.poly_line_smoothing = 0
>  part.ps.epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>main:
>BB2_0:
>	s_mov_b64 s[0:1], exec                                    ; BE80017E
>	v_mov_b32_e32 v14, v16                                    ; 7E1C0310
>	s_wqm_b64 exec, exec                                      ; BEFE077E
>	s_mov_b32 s7, 0                                           ; BE870080
>	s_mov_b32 s6, s3                                          ; BE860003
>	s_mov_b32 m0, s5                                          ; BEFC0005
>	s_load_dwordx4 s[20:23], s[6:7], 0x230                    ; C00A0503 00000230
>	s_mov_b32 s8, s2                                          ; BE880002
>	s_mov_b32 s11, 0x27fac                                    ; BE8B00FF 00027FAC
>	s_movk_i32 s10, 0xf0                                      ; B00A00F0
>	s_mov_b32 s9, s7                                          ; BE890007
>	s_load_dwordx8 s[12:19], s[6:7], 0x240                    ; C00E0303 00000240
>	s_load_dwordx8 s[24:31], s[6:7], 0x200                    ; C00E0603 00000200
>	v_interp_p1_f32_e32 v0, v2, attr0.x                       ; D4000002
>	v_interp_p1_f32_e32 v1, v2, attr0.y                       ; D4040102
>	v_interp_p2_f32_e32 v0, v3, attr0.x                       ; D4010003
>	v_interp_p2_f32_e32 v1, v3, attr0.y                       ; D4050103
>	s_buffer_load_dword s5, s[8:11], 0xa8                     ; C0220144 000000A8
>	s_buffer_load_dwordx4 s[52:55], s[8:11], 0xc0             ; C02A0D04 000000C0
>	s_load_dwordx4 s[32:35], s[6:7], 0x2f0                    ; C00A0803 000002F0
>	s_load_dwordx8 s[44:51], s[6:7], 0x300                    ; C00E0B03 00000300
>	s_load_dwordx4 s[56:59], s[6:7], 0x330                    ; C00A0E03 00000330
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	image_sample v[4:7], v[0:1], s[24:31], s[20:23] dmask:0xf ; F0800F00 00A60400
>	s_load_dwordx4 s[60:63], s[6:7], 0x270                    ; C00A0F03 00000270
>	s_load_dwordx8 s[36:43], s[6:7], 0x2c0                    ; C00E0903 000002C0
>	s_buffer_load_dwordx2 s[2:3], s[8:11], 0xe0               ; C0260084 000000E0
>	s_buffer_load_dwordx4 s[20:23], s[8:11], 0x8              ; C02A0504 00000008
>	s_buffer_load_dword s28, s[8:11], 0x18                    ; C0220704 00000018
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	image_sample v[0:1], v[0:1], s[12:19], s[60:63] dmask:0x3 ; F0800300 01E30000
>	s_buffer_load_dwordx2 s[6:7], s[8:11], 0x20               ; C0260184 00000020
>	s_buffer_load_dword s29, s[8:11], 0x28                    ; C0220744 00000028
>	s_buffer_load_dwordx2 s[24:25], s[8:11], 0x30             ; C0260604 00000030
>	s_buffer_load_dword s30, s[8:11], 0x38                    ; C0220784 00000038
>	s_buffer_load_dwordx2 s[26:27], s[8:11], 0x40             ; C0260684 00000040
>	v_interp_p1_f32_e32 v8, v2, attr1.x                       ; D4200402
>	v_interp_p1_f32_e32 v9, v2, attr1.y                       ; D4240502
>	v_interp_p1_f32_e32 v10, v2, attr1.z                      ; D4280602
>	v_interp_p2_f32_e32 v8, v3, attr1.x                       ; D4210403
>	v_interp_p2_f32_e32 v9, v3, attr1.y                       ; D4250503
>	v_interp_p2_f32_e32 v10, v3, attr1.z                      ; D4290603
>	v_interp_p1_f32_e32 v11, v2, attr2.x                      ; D42C0802
>	v_interp_p1_f32_e32 v15, v2, attr2.y                      ; D43C0902
>	v_interp_p1_f32_e32 v16, v2, attr2.z                      ; D4400A02
>	v_interp_p1_f32_e32 v17, v2, attr3.x                      ; D4440C02
>	v_interp_p2_f32_e32 v11, v3, attr2.x                      ; D42D0803
>	v_interp_p1_f32_e32 v21, v2, attr3.z                      ; D4540E02
>	v_interp_p2_f32_e32 v15, v3, attr2.y                      ; D43D0903
>	v_interp_p2_f32_e32 v16, v3, attr2.z                      ; D4410A03
>	v_interp_p2_f32_e32 v17, v3, attr3.x                      ; D4450C03
>	v_interp_p2_f32_e32 v21, v3, attr3.z                      ; D4550E03
>	s_mov_b32 s64, 0x40400000                                 ; BEC000FF 40400000
>	s_waitcnt vmcnt(1)                                        ; BF8C0F71
>	v_mul_f32_e32 v19, s53, v5                                ; 0A260A35
>	v_mov_b32_e32 v5, s3                                      ; 7E0A0203
>	v_mul_f32_e32 v20, s54, v6                                ; 0A280C36
>	v_mad_f32 v6, s2, v13, v5                                 ; D1C10006 04161A02
>	v_mul_f32_e32 v5, s20, v12                                ; 0A0A1814
>	v_mul_f32_e32 v6, s21, v6                                 ; 0A0C0C15
>	image_sample v13, v[5:6], s[44:51], s[56:59] dmask:0x1    ; F0800100 01CB0D05
>	s_waitcnt vmcnt(1)                                        ; BF8C0F71
>	v_mul_f32_e32 v5, v1, v1                                  ; 0A0A0301
>	v_mac_f32_e32 v5, v0, v0                                  ; 2C0A0100
>	v_mul_f32_e32 v8, v8, v0                                  ; 0A100108
>	v_mul_f32_e32 v9, v9, v0                                  ; 0A120109
>	v_mul_f32_e32 v10, v10, v0                                ; 0A14010A
>	v_sub_f32_e64 v0, 1.0, v5 clamp                           ; D1028000 00020AF2
>	v_sqrt_f32_e32 v0, v0                                     ; 7E004F00
>	v_mac_f32_e32 v8, v11, v1                                 ; 2C10030B
>	v_mul_f32_e32 v18, s52, v4                                ; 0A240834
>	v_mul_f32_e32 v4, s55, v7                                 ; 0A080E37
>	v_interp_p1_f32_e32 v7, v2, attr3.y                       ; D41C0D02
>	v_mac_f32_e32 v10, v16, v1                                ; 2C140310
>	v_mac_f32_e32 v9, v15, v1                                 ; 2C12030F
>	v_interp_p2_f32_e32 v7, v3, attr3.y                       ; D41D0D03
>	v_mac_f32_e32 v8, v17, v0                                 ; 2C100111
>	v_mac_f32_e32 v9, v7, v0                                  ; 2C120107
>	v_mac_f32_e32 v10, v21, v0                                ; 2C140115
>	v_mul_f32_e32 v0, v8, v8                                  ; 0A001108
>	v_mac_f32_e32 v0, v9, v9                                  ; 2C001309
>	v_mac_f32_e32 v0, v10, v10                                ; 2C00150A
>	v_rsq_f32_e32 v7, v0                                      ; 7E0E4900
>	s_buffer_load_dword s12, s[8:11], 0x48                    ; C0220304 00000048
>	s_buffer_load_dwordx2 s[2:3], s[8:11], 0x50               ; C0260084 00000050
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_mov_b32_e32 v12, s6                                     ; 7E180206
>	v_mov_b32_e32 v6, s7                                      ; 7E0C0207
>	s_buffer_load_dword s13, s[8:11], 0x58                    ; C0220344 00000058
>	s_buffer_load_dwordx2 s[6:7], s[8:11], 0x60               ; C0260184 00000060
>	v_mul_f32_e32 v9, v9, v7                                  ; 0A120F09
>	v_mul_f32_e32 v11, v18, v18                               ; 0A162512
>	v_mul_f32_e32 v18, v19, v19                               ; 0A242713
>	v_mul_f32_e32 v19, v20, v20                               ; 0A262914
>	v_mov_b32_e32 v20, s29                                    ; 7E28021D
>	v_mul_f32_e32 v8, v8, v7                                  ; 0A100F08
>	v_mul_f32_e32 v7, v10, v7                                 ; 0A0E0F0A
>	v_mad_f32 v12, -s24, v9, v12                              ; D1C1000C 24321218
>	v_mad_f32 v6, -s25, v9, v6                                ; D1C10006 241A1219
>	v_mad_f32 v20, -s30, v9, v20                              ; D1C10014 2452121E
>	v_mac_f32_e32 v12, s26, v7                                ; 2C180E1A
>	v_mac_f32_e32 v6, s27, v7                                 ; 2C0C0E1B
>	v_mul_f32_e32 v10, v9, v9                                 ; 0A141309
>	v_mac_f32_e32 v20, s12, v7                                ; 2C280E0C
>	v_mul_f32_e32 v17, v9, v7                                 ; 0A220F09
>	v_mul_f32_e32 v9, v8, v9                                  ; 0A121308
>	v_mac_f32_e32 v12, s2, v8                                 ; 2C181002
>	v_mac_f32_e32 v6, s3, v8                                  ; 2C0C1003
>	s_buffer_load_dword s12, s[8:11], 0x68                    ; C0220304 00000068
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_mac_f32_e32 v20, s13, v8                                ; 2C28100D
>	v_mac_f32_e32 v12, s6, v9                                 ; 2C181206
>	v_mac_f32_e32 v6, s7, v9                                  ; 2C0C1207
>	s_buffer_load_dwordx2 s[2:3], s[8:11], 0x70               ; C0260084 00000070
>	s_buffer_load_dword s13, s[8:11], 0x78                    ; C0220344 00000078
>	s_buffer_load_dwordx2 s[6:7], s[8:11], 0x80               ; C0260184 00000080
>	v_mac_f32_e32 v20, s12, v9                                ; 2C28120C
>	v_mul_f32_e32 v16, v7, v8                                 ; 0A201107
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_mac_f32_e32 v12, s2, v17                                ; 2C182202
>	v_mac_f32_e32 v6, s3, v17                                 ; 2C0C2203
>	v_mac_f32_e32 v20, s13, v17                               ; 2C28220D
>	s_buffer_load_dword s12, s[8:11], 0x88                    ; C0220304 00000088
>	s_buffer_load_dwordx2 s[2:3], s[8:11], 0x90               ; C0260084 00000090
>	v_mac_f32_e32 v12, s6, v16                                ; 2C182006
>	v_mac_f32_e32 v6, s7, v16                                 ; 2C0C2007
>	s_buffer_load_dword s13, s[8:11], 0x98                    ; C0220344 00000098
>	s_buffer_load_dwordx2 s[6:7], s[8:11], 0xa0               ; C0260184 000000A0
>	v_mad_f32 v10, v8, v8, -v10                               ; D1C1000A 842A1108
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_mac_f32_e32 v20, s12, v16                               ; 2C28200C
>	s_waitcnt vmcnt(0)                                        ; BF8C0F70
>	v_mul_f32_e32 v1, s22, v13                                ; 0A021A16
>	v_mul_f32_e32 v5, s23, v13                                ; 0A0A1A17
>	v_mul_f32_e32 v15, s28, v13                               ; 0A1E1A1C
>	v_mul_f32_e32 v0, v11, v1                                 ; 0A00030B
>	v_mul_f32_e32 v1, v18, v5                                 ; 0A020B12
>	v_mul_f32_e32 v5, v19, v15                                ; 0A0A1F13
>	v_mul_f32_e32 v15, v7, v7                                 ; 0A1E0F07
>	v_mad_f32 v15, v15, s64, -1.0                             ; D1C1000F 03CC810F
>	v_mac_f32_e32 v12, s2, v15                                ; 2C181E02
>	v_mac_f32_e32 v6, s3, v15                                 ; 2C0C1E03
>	v_mac_f32_e32 v20, s13, v15                               ; 2C281E0D
>	v_mac_f32_e32 v6, s7, v10                                 ; 2C0C1407
>	v_mac_f32_e32 v12, s6, v10                                ; 2C181406
>	v_mac_f32_e32 v20, s5, v10                                ; 2C281405
>	v_max_f32_e32 v7, 0, v12                                  ; 160E1880
>	v_max_f32_e32 v6, 0, v6                                   ; 160C0C80
>	v_max_f32_e32 v8, 0, v20                                  ; 16102880
>	v_mul_f32_e32 v9, v11, v7                                 ; 0A120F0B
>	v_interp_p1_f32_e32 v7, v2, attr0.w                       ; D41C0302
>	v_mul_f32_e32 v10, v18, v6                                ; 0A140D12
>	v_interp_p1_f32_e32 v6, v2, attr0.z                       ; D4180202
>	v_mul_f32_e32 v8, v19, v8                                 ; 0A101113
>	v_interp_p2_f32_e32 v6, v3, attr0.z                       ; D4190203
>	v_interp_p2_f32_e32 v7, v3, attr0.w                       ; D41D0303
>	s_and_b64 exec, exec, s[0:1]                              ; 86FE007E
>	image_sample v2, v[6:7], s[36:43], s[32:35] dmask:0x1     ; F0800100 01090206
>	s_buffer_load_dword s0, s[8:11], 0xb0                     ; C0220004 000000B0
>	v_mov_b32_e32 v3, v4                                      ; 7E060304
>	s_waitcnt vmcnt(0)                                        ; BF8C0F70
>	v_mul_f32_e32 v2, v2, v13                                 ; 0A041B02
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_mul_f32_e32 v2, s0, v2                                  ; 0A040400
>	v_mac_f32_e32 v5, v8, v2                                  ; 2C0A0508
>	v_mac_f32_e32 v0, v9, v2                                  ; 2C000509
>	v_mac_f32_e32 v1, v10, v2                                 ; 2C02050A
>	v_mov_b32_e32 v2, v5                                      ; 7E040305
>Shader epilog disassembly:
>ps_epilog:
>BB1_0:
>	v_cvt_pkrtz_f16_f32 v0, v0, v1        ; D2960000 00020300
>	v_cvt_pkrtz_f16_f32 v1, v2, v3        ; D2960001 00020702
>	exp mrt0 v0, v0, v1, v1 done compr vm ; C4001C0F 00000100
>	s_endpgm                              ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xf377
>SPI_PS_INPUT_ENA  = 0x0302
>*** SHADER STATS ***
>SGPRS: 72
>VGPRS: 24
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Private memory VGPRs: 0
>Code Size: 896 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 8
>********************
>
>
>[1;32mRW buffers slot 0 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>
>[1;32mRW buffers slot 1 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>
>[1;32mRW buffers slot 2 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>
>[1;32mRW buffers slot 3 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>
>[1;32mRW buffers slot 4 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>
>[1;32mRW buffers slot 5 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>
>[1;32mRW buffers slot 6 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>
>[1;32mRW buffers slot 7 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>
>[1;32mRW buffers slot 8 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>
>[1;32mRW buffers slot 9 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>
>[1;32mRW buffers slot 10 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>
>[1;32mRW buffers slot 11 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>
>[1;32mRW buffers slot 12 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>
>[1;32mRW buffers slot 13 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>
>[1;32mRW buffers slot 14 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>
>[1;32mRW buffers slot 15 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>
>[1;32mVS - Vertex buffer slot 0 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>
>[1;32mVS - Vertex buffer slot 1 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>
>[1;32mVS - Vertex buffer slot 2 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>
>[1;32mVS - Vertex buffer slot 3 (GPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>
>[1;32mVS - Constant buffer slot 0 (CPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0x00127f00
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0
>                             STRIDE = 0
>                             CACHE_SWIZZLE = 0
>                             SWIZZLE_ENABLE = 0
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 1696 (0x000006a0)
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_X
>                             DST_SEL_Y = SQ_SEL_Y
>                             DST_SEL_Z = SQ_SEL_Z
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_32
>                             ELEMENT_SIZE = 0
>                             INDEX_STRIDE = 0
>                             ADD_TID_ENABLE = 0
>                             ATC = 0
>                             HASH_ENABLE = 0
>                             HEAP = 0
>                             MTYPE = 0
>                             TYPE = SQ_RSRC_BUF
>
>[1;32mPS - Constant buffer slot 0 (CPU list):[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0x001285c0
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0
>                             STRIDE = 0
>                             CACHE_SWIZZLE = 0
>                             SWIZZLE_ENABLE = 0
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 240 (0x000000f0)
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_X
>                             DST_SEL_Y = SQ_SEL_Y
>                             DST_SEL_Z = SQ_SEL_Z
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_32
>                             ELEMENT_SIZE = 0
>                             INDEX_STRIDE = 0
>                             ADD_TID_ENABLE = 0
>                             ATC = 0
>                             HASH_ENABLE = 0
>                             HEAP = 0
>                             MTYPE = 0
>                             TYPE = SQ_RSRC_BUF
>
>[1;32mPS - Sampler slot 0 (GPU list):[0m
>        [1;33mSQ_IMG_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_IMG_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 255 (0xff)
>                             MIN_LOD = 4095 (0xfff)
>                             DATA_FORMAT_GFX6 = IMG_DATA_FORMAT_32_AS_32_32_32_32
>                             NUM_FORMAT_GFX6 = IMG_NUM_FORMAT_RESERVED_15
>                             MTYPE = 3
>        [1;33mSQ_IMG_RSRC_WORD2[0m <- WIDTH = 16383 (0x3fff)
>                             HEIGHT = 16383 (0x3fff)
>                             PERF_MOD = 7
>                             INTERLACED = 1
>        [1;33mSQ_IMG_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             BASE_LEVEL = 15 (0xf)
>                             LAST_LEVEL = 15 (0xf)
>                             TILING_INDEX = 31 (0x1f)
>                             POW2_PAD = 1
>                             MTYPE = 1
>                             ATC = 1
>                             TYPE = SQ_RSRC_IMG_2D_MSAA_ARRAY
>        [1;33mSQ_IMG_RSRC_WORD4[0m <- DEPTH = 8191 (0x1fff)
>                             PITCH_GFX6 = 16383 (0x3fff)
>        [1;33mSQ_IMG_RSRC_WORD5[0m <- BASE_ARRAY = 8191 (0x1fff)
>                             LAST_ARRAY = 8191 (0x1fff)
>        [1;33mSQ_IMG_RSRC_WORD6[0m <- MIN_LOD_WARN = 4095 (0xfff)
>                             COUNTER_BANK_ID = 255 (0xff)
>                             LOD_HDW_CNT_EN = 1
>                             COMPRESSION_EN = 1
>                             ALPHA_IS_ON_MSB = 1
>                             COLOR_TRANSFORM = 1
>                             LOST_ALPHA_BITS = 15 (0xf)
>                             LOST_COLOR_BITS = 15 (0xf)
>        [1;33mSQ_IMG_RSRC_WORD7[0m <- 0xffffffff
>[1;36m    Buffer:[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[1;36m    FMASK:[0m
>        [1;33mSQ_IMG_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_IMG_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 255 (0xff)
>                             MIN_LOD = 4095 (0xfff)
>                             DATA_FORMAT_GFX6 = IMG_DATA_FORMAT_32_AS_32_32_32_32
>                             NUM_FORMAT_GFX6 = IMG_NUM_FORMAT_RESERVED_15
>                             MTYPE = 3
>        [1;33mSQ_IMG_RSRC_WORD2[0m <- WIDTH = 16383 (0x3fff)
>                             HEIGHT = 16383 (0x3fff)
>                             PERF_MOD = 7
>                             INTERLACED = 1
>        [1;33mSQ_IMG_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             BASE_LEVEL = 15 (0xf)
>                             LAST_LEVEL = 15 (0xf)
>                             TILING_INDEX = 31 (0x1f)
>                             POW2_PAD = 1
>                             MTYPE = 1
>                             ATC = 1
>                             TYPE = SQ_RSRC_IMG_2D_MSAA_ARRAY
>        [1;33mSQ_IMG_RSRC_WORD4[0m <- DEPTH = 8191 (0x1fff)
>                             PITCH_GFX6 = 16383 (0x3fff)
>        [1;33mSQ_IMG_RSRC_WORD5[0m <- BASE_ARRAY = 8191 (0x1fff)
>                             LAST_ARRAY = 8191 (0x1fff)
>        [1;33mSQ_IMG_RSRC_WORD6[0m <- MIN_LOD_WARN = 4095 (0xfff)
>                             COUNTER_BANK_ID = 255 (0xff)
>                             LOD_HDW_CNT_EN = 1
>                             COMPRESSION_EN = 1
>                             ALPHA_IS_ON_MSB = 1
>                             COLOR_TRANSFORM = 1
>                             LOST_ALPHA_BITS = 15 (0xf)
>                             LOST_COLOR_BITS = 15 (0xf)
>        [1;33mSQ_IMG_RSRC_WORD7[0m <- 0xffffffff
>[1;36m    Sampler state:[0m
>        [1;33mSQ_IMG_SAMP_WORD0[0m <- CLAMP_X = SQ_TEX_MIRROR_ONCE_BORDER
>                             CLAMP_Y = SQ_TEX_MIRROR_ONCE_BORDER
>                             CLAMP_Z = SQ_TEX_MIRROR_ONCE_BORDER
>                             MAX_ANISO_RATIO = 7
>                             DEPTH_COMPARE_FUNC = SQ_TEX_DEPTH_COMPARE_ALWAYS
>                             FORCE_UNNORMALIZED = 1
>                             ANISO_THRESHOLD = 7
>                             MC_COORD_TRUNC = 1
>                             FORCE_DEGAMMA = 1
>                             ANISO_BIAS = 63 (0x3f)
>                             TRUNC_COORD = 1
>                             DISABLE_CUBE_WRAP = 1
>                             FILTER_MODE = 3
>                             COMPAT_MODE = 1
>        [1;33mSQ_IMG_SAMP_WORD1[0m <- MIN_LOD = 4095 (0xfff)
>                             MAX_LOD = 4095 (0xfff)
>                             PERF_MIP = 15 (0xf)
>                             PERF_Z = 15 (0xf)
>        [1;33mSQ_IMG_SAMP_WORD2[0m <- LOD_BIAS = 16383 (0x3fff)
>                             LOD_BIAS_SEC = 63 (0x3f)
>                             XY_MAG_FILTER = 3
>                             XY_MIN_FILTER = SQ_TEX_XY_FILTER_ANISO_BILINEAR
>                             Z_FILTER = 3
>                             MIP_FILTER = 3
>                             MIP_POINT_PRECLAMP = 1
>                             DISABLE_LSB_CEIL = 1
>                             FILTER_PREC_FIX = 1
>                             ANISO_OVERRIDE = 1
>        [1;33mSQ_IMG_SAMP_WORD3[0m <- BORDER_COLOR_PTR = 4095 (0xfff)
>                             UPGRADED_DEPTH = 1
>                             BORDER_COLOR_TYPE = SQ_TEX_BORDER_COLOR_REGISTER
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>
>[1;32mPS - Sampler slot 1 (GPU list):[0m
>        [1;33mSQ_IMG_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_IMG_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 255 (0xff)
>                             MIN_LOD = 4095 (0xfff)
>                             DATA_FORMAT_GFX6 = IMG_DATA_FORMAT_32_AS_32_32_32_32
>                             NUM_FORMAT_GFX6 = IMG_NUM_FORMAT_RESERVED_15
>                             MTYPE = 3
>        [1;33mSQ_IMG_RSRC_WORD2[0m <- WIDTH = 16383 (0x3fff)
>                             HEIGHT = 16383 (0x3fff)
>                             PERF_MOD = 7
>                             INTERLACED = 1
>        [1;33mSQ_IMG_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             BASE_LEVEL = 15 (0xf)
>                             LAST_LEVEL = 15 (0xf)
>                             TILING_INDEX = 31 (0x1f)
>                             POW2_PAD = 1
>                             MTYPE = 1
>                             ATC = 1
>                             TYPE = SQ_RSRC_IMG_2D_MSAA_ARRAY
>        [1;33mSQ_IMG_RSRC_WORD4[0m <- DEPTH = 8191 (0x1fff)
>                             PITCH_GFX6 = 16383 (0x3fff)
>        [1;33mSQ_IMG_RSRC_WORD5[0m <- BASE_ARRAY = 8191 (0x1fff)
>                             LAST_ARRAY = 8191 (0x1fff)
>        [1;33mSQ_IMG_RSRC_WORD6[0m <- MIN_LOD_WARN = 4095 (0xfff)
>                             COUNTER_BANK_ID = 255 (0xff)
>                             LOD_HDW_CNT_EN = 1
>                             COMPRESSION_EN = 1
>                             ALPHA_IS_ON_MSB = 1
>                             COLOR_TRANSFORM = 1
>                             LOST_ALPHA_BITS = 15 (0xf)
>                             LOST_COLOR_BITS = 15 (0xf)
>        [1;33mSQ_IMG_RSRC_WORD7[0m <- 0xffffffff
>[1;36m    Buffer:[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[1;36m    FMASK:[0m
>        [1;33mSQ_IMG_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_IMG_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 255 (0xff)
>                             MIN_LOD = 4095 (0xfff)
>                             DATA_FORMAT_GFX6 = IMG_DATA_FORMAT_32_AS_32_32_32_32
>                             NUM_FORMAT_GFX6 = IMG_NUM_FORMAT_RESERVED_15
>                             MTYPE = 3
>        [1;33mSQ_IMG_RSRC_WORD2[0m <- WIDTH = 16383 (0x3fff)
>                             HEIGHT = 16383 (0x3fff)
>                             PERF_MOD = 7
>                             INTERLACED = 1
>        [1;33mSQ_IMG_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             BASE_LEVEL = 15 (0xf)
>                             LAST_LEVEL = 15 (0xf)
>                             TILING_INDEX = 31 (0x1f)
>                             POW2_PAD = 1
>                             MTYPE = 1
>                             ATC = 1
>                             TYPE = SQ_RSRC_IMG_2D_MSAA_ARRAY
>        [1;33mSQ_IMG_RSRC_WORD4[0m <- DEPTH = 8191 (0x1fff)
>                             PITCH_GFX6 = 16383 (0x3fff)
>        [1;33mSQ_IMG_RSRC_WORD5[0m <- BASE_ARRAY = 8191 (0x1fff)
>                             LAST_ARRAY = 8191 (0x1fff)
>        [1;33mSQ_IMG_RSRC_WORD6[0m <- MIN_LOD_WARN = 4095 (0xfff)
>                             COUNTER_BANK_ID = 255 (0xff)
>                             LOD_HDW_CNT_EN = 1
>                             COMPRESSION_EN = 1
>                             ALPHA_IS_ON_MSB = 1
>                             COLOR_TRANSFORM = 1
>                             LOST_ALPHA_BITS = 15 (0xf)
>                             LOST_COLOR_BITS = 15 (0xf)
>        [1;33mSQ_IMG_RSRC_WORD7[0m <- 0xffffffff
>[1;36m    Sampler state:[0m
>        [1;33mSQ_IMG_SAMP_WORD0[0m <- CLAMP_X = SQ_TEX_MIRROR_ONCE_BORDER
>                             CLAMP_Y = SQ_TEX_MIRROR_ONCE_BORDER
>                             CLAMP_Z = SQ_TEX_MIRROR_ONCE_BORDER
>                             MAX_ANISO_RATIO = 7
>                             DEPTH_COMPARE_FUNC = SQ_TEX_DEPTH_COMPARE_ALWAYS
>                             FORCE_UNNORMALIZED = 1
>                             ANISO_THRESHOLD = 7
>                             MC_COORD_TRUNC = 1
>                             FORCE_DEGAMMA = 1
>                             ANISO_BIAS = 63 (0x3f)
>                             TRUNC_COORD = 1
>                             DISABLE_CUBE_WRAP = 1
>                             FILTER_MODE = 3
>                             COMPAT_MODE = 1
>        [1;33mSQ_IMG_SAMP_WORD1[0m <- MIN_LOD = 4095 (0xfff)
>                             MAX_LOD = 4095 (0xfff)
>                             PERF_MIP = 15 (0xf)
>                             PERF_Z = 15 (0xf)
>        [1;33mSQ_IMG_SAMP_WORD2[0m <- LOD_BIAS = 16383 (0x3fff)
>                             LOD_BIAS_SEC = 63 (0x3f)
>                             XY_MAG_FILTER = 3
>                             XY_MIN_FILTER = SQ_TEX_XY_FILTER_ANISO_BILINEAR
>                             Z_FILTER = 3
>                             MIP_FILTER = 3
>                             MIP_POINT_PRECLAMP = 1
>                             DISABLE_LSB_CEIL = 1
>                             FILTER_PREC_FIX = 1
>                             ANISO_OVERRIDE = 1
>        [1;33mSQ_IMG_SAMP_WORD3[0m <- BORDER_COLOR_PTR = 4095 (0xfff)
>                             UPGRADED_DEPTH = 1
>                             BORDER_COLOR_TYPE = SQ_TEX_BORDER_COLOR_REGISTER
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>
>[1;32mPS - Sampler slot 2 (GPU list):[0m
>        [1;33mSQ_IMG_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_IMG_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 255 (0xff)
>                             MIN_LOD = 4095 (0xfff)
>                             DATA_FORMAT_GFX6 = IMG_DATA_FORMAT_32_AS_32_32_32_32
>                             NUM_FORMAT_GFX6 = IMG_NUM_FORMAT_RESERVED_15
>                             MTYPE = 3
>        [1;33mSQ_IMG_RSRC_WORD2[0m <- WIDTH = 16383 (0x3fff)
>                             HEIGHT = 16383 (0x3fff)
>                             PERF_MOD = 7
>                             INTERLACED = 1
>        [1;33mSQ_IMG_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             BASE_LEVEL = 15 (0xf)
>                             LAST_LEVEL = 15 (0xf)
>                             TILING_INDEX = 31 (0x1f)
>                             POW2_PAD = 1
>                             MTYPE = 1
>                             ATC = 1
>                             TYPE = SQ_RSRC_IMG_2D_MSAA_ARRAY
>        [1;33mSQ_IMG_RSRC_WORD4[0m <- DEPTH = 8191 (0x1fff)
>                             PITCH_GFX6 = 16383 (0x3fff)
>        [1;33mSQ_IMG_RSRC_WORD5[0m <- BASE_ARRAY = 8191 (0x1fff)
>                             LAST_ARRAY = 8191 (0x1fff)
>        [1;33mSQ_IMG_RSRC_WORD6[0m <- MIN_LOD_WARN = 4095 (0xfff)
>                             COUNTER_BANK_ID = 255 (0xff)
>                             LOD_HDW_CNT_EN = 1
>                             COMPRESSION_EN = 1
>                             ALPHA_IS_ON_MSB = 1
>                             COLOR_TRANSFORM = 1
>                             LOST_ALPHA_BITS = 15 (0xf)
>                             LOST_COLOR_BITS = 15 (0xf)
>        [1;33mSQ_IMG_RSRC_WORD7[0m <- 0xffffffff
>[1;36m    Buffer:[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[1;36m    FMASK:[0m
>        [1;33mSQ_IMG_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_IMG_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 255 (0xff)
>                             MIN_LOD = 4095 (0xfff)
>                             DATA_FORMAT_GFX6 = IMG_DATA_FORMAT_32_AS_32_32_32_32
>                             NUM_FORMAT_GFX6 = IMG_NUM_FORMAT_RESERVED_15
>                             MTYPE = 3
>        [1;33mSQ_IMG_RSRC_WORD2[0m <- WIDTH = 16383 (0x3fff)
>                             HEIGHT = 16383 (0x3fff)
>                             PERF_MOD = 7
>                             INTERLACED = 1
>        [1;33mSQ_IMG_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             BASE_LEVEL = 15 (0xf)
>                             LAST_LEVEL = 15 (0xf)
>                             TILING_INDEX = 31 (0x1f)
>                             POW2_PAD = 1
>                             MTYPE = 1
>                             ATC = 1
>                             TYPE = SQ_RSRC_IMG_2D_MSAA_ARRAY
>        [1;33mSQ_IMG_RSRC_WORD4[0m <- DEPTH = 8191 (0x1fff)
>                             PITCH_GFX6 = 16383 (0x3fff)
>        [1;33mSQ_IMG_RSRC_WORD5[0m <- BASE_ARRAY = 8191 (0x1fff)
>                             LAST_ARRAY = 8191 (0x1fff)
>        [1;33mSQ_IMG_RSRC_WORD6[0m <- MIN_LOD_WARN = 4095 (0xfff)
>                             COUNTER_BANK_ID = 255 (0xff)
>                             LOD_HDW_CNT_EN = 1
>                             COMPRESSION_EN = 1
>                             ALPHA_IS_ON_MSB = 1
>                             COLOR_TRANSFORM = 1
>                             LOST_ALPHA_BITS = 15 (0xf)
>                             LOST_COLOR_BITS = 15 (0xf)
>        [1;33mSQ_IMG_RSRC_WORD7[0m <- 0xffffffff
>[1;36m    Sampler state:[0m
>        [1;33mSQ_IMG_SAMP_WORD0[0m <- CLAMP_X = SQ_TEX_MIRROR_ONCE_BORDER
>                             CLAMP_Y = SQ_TEX_MIRROR_ONCE_BORDER
>                             CLAMP_Z = SQ_TEX_MIRROR_ONCE_BORDER
>                             MAX_ANISO_RATIO = 7
>                             DEPTH_COMPARE_FUNC = SQ_TEX_DEPTH_COMPARE_ALWAYS
>                             FORCE_UNNORMALIZED = 1
>                             ANISO_THRESHOLD = 7
>                             MC_COORD_TRUNC = 1
>                             FORCE_DEGAMMA = 1
>                             ANISO_BIAS = 63 (0x3f)
>                             TRUNC_COORD = 1
>                             DISABLE_CUBE_WRAP = 1
>                             FILTER_MODE = 3
>                             COMPAT_MODE = 1
>        [1;33mSQ_IMG_SAMP_WORD1[0m <- MIN_LOD = 4095 (0xfff)
>                             MAX_LOD = 4095 (0xfff)
>                             PERF_MIP = 15 (0xf)
>                             PERF_Z = 15 (0xf)
>        [1;33mSQ_IMG_SAMP_WORD2[0m <- LOD_BIAS = 16383 (0x3fff)
>                             LOD_BIAS_SEC = 63 (0x3f)
>                             XY_MAG_FILTER = 3
>                             XY_MIN_FILTER = SQ_TEX_XY_FILTER_ANISO_BILINEAR
>                             Z_FILTER = 3
>                             MIP_FILTER = 3
>                             MIP_POINT_PRECLAMP = 1
>                             DISABLE_LSB_CEIL = 1
>                             FILTER_PREC_FIX = 1
>                             ANISO_OVERRIDE = 1
>        [1;33mSQ_IMG_SAMP_WORD3[0m <- BORDER_COLOR_PTR = 4095 (0xfff)
>                             UPGRADED_DEPTH = 1
>                             BORDER_COLOR_TYPE = SQ_TEX_BORDER_COLOR_REGISTER
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>
>[1;32mPS - Sampler slot 3 (GPU list):[0m
>        [1;33mSQ_IMG_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_IMG_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 255 (0xff)
>                             MIN_LOD = 4095 (0xfff)
>                             DATA_FORMAT_GFX6 = IMG_DATA_FORMAT_32_AS_32_32_32_32
>                             NUM_FORMAT_GFX6 = IMG_NUM_FORMAT_RESERVED_15
>                             MTYPE = 3
>        [1;33mSQ_IMG_RSRC_WORD2[0m <- WIDTH = 16383 (0x3fff)
>                             HEIGHT = 16383 (0x3fff)
>                             PERF_MOD = 7
>                             INTERLACED = 1
>        [1;33mSQ_IMG_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             BASE_LEVEL = 15 (0xf)
>                             LAST_LEVEL = 15 (0xf)
>                             TILING_INDEX = 31 (0x1f)
>                             POW2_PAD = 1
>                             MTYPE = 1
>                             ATC = 1
>                             TYPE = SQ_RSRC_IMG_2D_MSAA_ARRAY
>        [1;33mSQ_IMG_RSRC_WORD4[0m <- DEPTH = 8191 (0x1fff)
>                             PITCH_GFX6 = 16383 (0x3fff)
>        [1;33mSQ_IMG_RSRC_WORD5[0m <- BASE_ARRAY = 8191 (0x1fff)
>                             LAST_ARRAY = 8191 (0x1fff)
>        [1;33mSQ_IMG_RSRC_WORD6[0m <- MIN_LOD_WARN = 4095 (0xfff)
>                             COUNTER_BANK_ID = 255 (0xff)
>                             LOD_HDW_CNT_EN = 1
>                             COMPRESSION_EN = 1
>                             ALPHA_IS_ON_MSB = 1
>                             COLOR_TRANSFORM = 1
>                             LOST_ALPHA_BITS = 15 (0xf)
>                             LOST_COLOR_BITS = 15 (0xf)
>        [1;33mSQ_IMG_RSRC_WORD7[0m <- 0xffffffff
>[1;36m    Buffer:[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[1;36m    FMASK:[0m
>        [1;33mSQ_IMG_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_IMG_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 255 (0xff)
>                             MIN_LOD = 4095 (0xfff)
>                             DATA_FORMAT_GFX6 = IMG_DATA_FORMAT_32_AS_32_32_32_32
>                             NUM_FORMAT_GFX6 = IMG_NUM_FORMAT_RESERVED_15
>                             MTYPE = 3
>        [1;33mSQ_IMG_RSRC_WORD2[0m <- WIDTH = 16383 (0x3fff)
>                             HEIGHT = 16383 (0x3fff)
>                             PERF_MOD = 7
>                             INTERLACED = 1
>        [1;33mSQ_IMG_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             BASE_LEVEL = 15 (0xf)
>                             LAST_LEVEL = 15 (0xf)
>                             TILING_INDEX = 31 (0x1f)
>                             POW2_PAD = 1
>                             MTYPE = 1
>                             ATC = 1
>                             TYPE = SQ_RSRC_IMG_2D_MSAA_ARRAY
>        [1;33mSQ_IMG_RSRC_WORD4[0m <- DEPTH = 8191 (0x1fff)
>                             PITCH_GFX6 = 16383 (0x3fff)
>        [1;33mSQ_IMG_RSRC_WORD5[0m <- BASE_ARRAY = 8191 (0x1fff)
>                             LAST_ARRAY = 8191 (0x1fff)
>        [1;33mSQ_IMG_RSRC_WORD6[0m <- MIN_LOD_WARN = 4095 (0xfff)
>                             COUNTER_BANK_ID = 255 (0xff)
>                             LOD_HDW_CNT_EN = 1
>                             COMPRESSION_EN = 1
>                             ALPHA_IS_ON_MSB = 1
>                             COLOR_TRANSFORM = 1
>                             LOST_ALPHA_BITS = 15 (0xf)
>                             LOST_COLOR_BITS = 15 (0xf)
>        [1;33mSQ_IMG_RSRC_WORD7[0m <- 0xffffffff
>[1;36m    Sampler state:[0m
>        [1;33mSQ_IMG_SAMP_WORD0[0m <- CLAMP_X = SQ_TEX_MIRROR_ONCE_BORDER
>                             CLAMP_Y = SQ_TEX_MIRROR_ONCE_BORDER
>                             CLAMP_Z = SQ_TEX_MIRROR_ONCE_BORDER
>                             MAX_ANISO_RATIO = 7
>                             DEPTH_COMPARE_FUNC = SQ_TEX_DEPTH_COMPARE_ALWAYS
>                             FORCE_UNNORMALIZED = 1
>                             ANISO_THRESHOLD = 7
>                             MC_COORD_TRUNC = 1
>                             FORCE_DEGAMMA = 1
>                             ANISO_BIAS = 63 (0x3f)
>                             TRUNC_COORD = 1
>                             DISABLE_CUBE_WRAP = 1
>                             FILTER_MODE = 3
>                             COMPAT_MODE = 1
>        [1;33mSQ_IMG_SAMP_WORD1[0m <- MIN_LOD = 4095 (0xfff)
>                             MAX_LOD = 4095 (0xfff)
>                             PERF_MIP = 15 (0xf)
>                             PERF_Z = 15 (0xf)
>        [1;33mSQ_IMG_SAMP_WORD2[0m <- LOD_BIAS = 16383 (0x3fff)
>                             LOD_BIAS_SEC = 63 (0x3f)
>                             XY_MAG_FILTER = 3
>                             XY_MIN_FILTER = SQ_TEX_XY_FILTER_ANISO_BILINEAR
>                             Z_FILTER = 3
>                             MIP_FILTER = 3
>                             MIP_POINT_PRECLAMP = 1
>                             DISABLE_LSB_CEIL = 1
>                             FILTER_PREC_FIX = 1
>                             ANISO_OVERRIDE = 1
>        [1;33mSQ_IMG_SAMP_WORD3[0m <- BORDER_COLOR_PTR = 4095 (0xfff)
>                             UPGRADED_DEPTH = 1
>                             BORDER_COLOR_TYPE = SQ_TEX_BORDER_COLOR_REGISTER
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>
>[1;32mPS - Sampler slot 4 (GPU list):[0m
>        [1;33mSQ_IMG_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_IMG_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 255 (0xff)
>                             MIN_LOD = 4095 (0xfff)
>                             DATA_FORMAT_GFX6 = IMG_DATA_FORMAT_32_AS_32_32_32_32
>                             NUM_FORMAT_GFX6 = IMG_NUM_FORMAT_RESERVED_15
>                             MTYPE = 3
>        [1;33mSQ_IMG_RSRC_WORD2[0m <- WIDTH = 16383 (0x3fff)
>                             HEIGHT = 16383 (0x3fff)
>                             PERF_MOD = 7
>                             INTERLACED = 1
>        [1;33mSQ_IMG_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             BASE_LEVEL = 15 (0xf)
>                             LAST_LEVEL = 15 (0xf)
>                             TILING_INDEX = 31 (0x1f)
>                             POW2_PAD = 1
>                             MTYPE = 1
>                             ATC = 1
>                             TYPE = SQ_RSRC_IMG_2D_MSAA_ARRAY
>        [1;33mSQ_IMG_RSRC_WORD4[0m <- DEPTH = 8191 (0x1fff)
>                             PITCH_GFX6 = 16383 (0x3fff)
>        [1;33mSQ_IMG_RSRC_WORD5[0m <- BASE_ARRAY = 8191 (0x1fff)
>                             LAST_ARRAY = 8191 (0x1fff)
>        [1;33mSQ_IMG_RSRC_WORD6[0m <- MIN_LOD_WARN = 4095 (0xfff)
>                             COUNTER_BANK_ID = 255 (0xff)
>                             LOD_HDW_CNT_EN = 1
>                             COMPRESSION_EN = 1
>                             ALPHA_IS_ON_MSB = 1
>                             COLOR_TRANSFORM = 1
>                             LOST_ALPHA_BITS = 15 (0xf)
>                             LOST_COLOR_BITS = 15 (0xf)
>        [1;33mSQ_IMG_RSRC_WORD7[0m <- 0xffffffff
>[1;36m    Buffer:[0m
>        [1;33mSQ_BUF_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 0xffff
>                             STRIDE = 16383 (0x3fff)
>                             CACHE_SWIZZLE = 1
>                             SWIZZLE_ENABLE = 1
>        [1;33mSQ_BUF_RSRC_WORD2[0m <- 0xffffffff
>        [1;33mSQ_BUF_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             NUM_FORMAT = BUF_NUM_FORMAT_FLOAT
>                             DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15
>                             ELEMENT_SIZE = 3
>                             INDEX_STRIDE = 3
>                             ADD_TID_ENABLE = 1
>                             ATC = 1
>                             HASH_ENABLE = 1
>                             HEAP = 1
>                             MTYPE = 7
>                             TYPE = SQ_RSRC_BUF_RSVD_3
>[1;36m    FMASK:[0m
>        [1;33mSQ_IMG_RSRC_WORD0[0m <- 0xffffffff
>        [1;33mSQ_IMG_RSRC_WORD1[0m <- BASE_ADDRESS_HI = 255 (0xff)
>                             MIN_LOD = 4095 (0xfff)
>                             DATA_FORMAT_GFX6 = IMG_DATA_FORMAT_32_AS_32_32_32_32
>                             NUM_FORMAT_GFX6 = IMG_NUM_FORMAT_RESERVED_15
>                             MTYPE = 3
>        [1;33mSQ_IMG_RSRC_WORD2[0m <- WIDTH = 16383 (0x3fff)
>                             HEIGHT = 16383 (0x3fff)
>                             PERF_MOD = 7
>                             INTERLACED = 1
>        [1;33mSQ_IMG_RSRC_WORD3[0m <- DST_SEL_X = SQ_SEL_W
>                             DST_SEL_Y = SQ_SEL_W
>                             DST_SEL_Z = SQ_SEL_W
>                             DST_SEL_W = SQ_SEL_W
>                             BASE_LEVEL = 15 (0xf)
>                             LAST_LEVEL = 15 (0xf)
>                             TILING_INDEX = 31 (0x1f)
>                             POW2_PAD = 1
>                             MTYPE = 1
>                             ATC = 1
>                             TYPE = SQ_RSRC_IMG_2D_MSAA_ARRAY
>        [1;33mSQ_IMG_RSRC_WORD4[0m <- DEPTH = 8191 (0x1fff)
>                             PITCH_GFX6 = 16383 (0x3fff)
>        [1;33mSQ_IMG_RSRC_WORD5[0m <- BASE_ARRAY = 8191 (0x1fff)
>                             LAST_ARRAY = 8191 (0x1fff)
>        [1;33mSQ_IMG_RSRC_WORD6[0m <- MIN_LOD_WARN = 4095 (0xfff)
>                             COUNTER_BANK_ID = 255 (0xff)
>                             LOD_HDW_CNT_EN = 1
>                             COMPRESSION_EN = 1
>                             ALPHA_IS_ON_MSB = 1
>                             COLOR_TRANSFORM = 1
>                             LOST_ALPHA_BITS = 15 (0xf)
>                             LOST_COLOR_BITS = 15 (0xf)
>        [1;33mSQ_IMG_RSRC_WORD7[0m <- 0xffffffff
>[1;36m    Sampler state:[0m
>        [1;33mSQ_IMG_SAMP_WORD0[0m <- CLAMP_X = SQ_TEX_MIRROR_ONCE_BORDER
>                             CLAMP_Y = SQ_TEX_MIRROR_ONCE_BORDER
>                             CLAMP_Z = SQ_TEX_MIRROR_ONCE_BORDER
>                             MAX_ANISO_RATIO = 7
>                             DEPTH_COMPARE_FUNC = SQ_TEX_DEPTH_COMPARE_ALWAYS
>                             FORCE_UNNORMALIZED = 1
>                             ANISO_THRESHOLD = 7
>                             MC_COORD_TRUNC = 1
>                             FORCE_DEGAMMA = 1
>                             ANISO_BIAS = 63 (0x3f)
>                             TRUNC_COORD = 1
>                             DISABLE_CUBE_WRAP = 1
>                             FILTER_MODE = 3
>                             COMPAT_MODE = 1
>        [1;33mSQ_IMG_SAMP_WORD1[0m <- MIN_LOD = 4095 (0xfff)
>                             MAX_LOD = 4095 (0xfff)
>                             PERF_MIP = 15 (0xf)
>                             PERF_Z = 15 (0xf)
>        [1;33mSQ_IMG_SAMP_WORD2[0m <- LOD_BIAS = 16383 (0x3fff)
>                             LOD_BIAS_SEC = 63 (0x3f)
>                             XY_MAG_FILTER = 3
>                             XY_MIN_FILTER = SQ_TEX_XY_FILTER_ANISO_BILINEAR
>                             Z_FILTER = 3
>                             MIP_FILTER = 3
>                             MIP_POINT_PRECLAMP = 1
>                             DISABLE_LSB_CEIL = 1
>                             FILTER_PREC_FIX = 1
>                             ANISO_OVERRIDE = 1
>        [1;33mSQ_IMG_SAMP_WORD3[0m <- BORDER_COLOR_PTR = 4095 (0xfff)
>                             UPGRADED_DEPTH = 1
>                             BORDER_COLOR_TYPE = SQ_TEX_BORDER_COLOR_REGISTER
>[31m!!!!! This slot was corrupted in GPU memory !!!!![0m
>

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Attachments on bug 108493: 142139 | 142140 | 142141 | 142142 | 142227 | 142228

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