Attachment 17991 Details for Bug 15521 – X log exhibiting failed assertion at RHDMCIdle

X log exhibiting failed assertion at RHDMCIdle

Xorg.0.log (text/plain), 88.80 KB, created by Michael Cree on 2008-07-30 03:25:03 UTC

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Creator: Michael Cree

Created: 2008-07-30 03:25:03 UTC

Size: 88.80 KB

patch

obsolete

>
>X.Org X Server 1.4.2
>Release Date: 11 June 2008
>X Protocol Version 11, Revision 0
>Build Operating System: Linux Debian (xorg-server 2:1.4.2-1)
>Current Operating System: Linux alpha 2.6.25.13-dp264 #1 Tue Jul 29 17:23:10 NZST 2008 alpha
>Build Date: 02 July 2008  04:11:59AM
> 
>	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>Module Loader present
>Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>(==) Log file: "/var/log/Xorg.0.log", Time: Wed Jul 30 21:47:24 2008
>(==) Using config file: "/etc/X11/xorg.conf"
>(==) ServerLayout "Default Layout"
>(**) |-->Screen "Default Screen" (0)
>(**) |   |-->Monitor "Generic Monitor"
>(**) |   |-->Device "Generic Video Card"
>(**) |-->Input Device "Generic Keyboard"
>(**) |-->Input Device "Configured Mouse"
>(==) Automatically adding devices
>(==) Automatically enabling devices
>(==) No FontPath specified.  Using compiled-in default.
>(WW) The directory "/usr/share/fonts/X11/cyrillic" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/var/lib/defoma/x-ttcidfont-conf.d/dirs/TrueType" does not exist.
>	Entry deleted from font path.
>(==) FontPath set to:
>	/usr/share/fonts/X11/misc,
>	/usr/share/fonts/X11/100dpi/:unscaled,
>	/usr/share/fonts/X11/75dpi/:unscaled,
>	/usr/share/fonts/X11/Type1,
>	/usr/share/fonts/X11/100dpi,
>	/usr/share/fonts/X11/75dpi
>(==) RgbPath set to "/etc/X11/rgb"
>(==) ModulePath set to "/usr/lib/xorg/modules"
>(II) No APM support in BIOS or kernel
>(II) Loader magic: 0x120243a68
>(II) Module ABI versions:
>	X.Org ANSI C Emulation: 0.3
>	X.Org Video Driver: 2.0
>	X.Org XInput driver : 2.0
>	X.Org Server Extension : 0.3
>	X.Org Font Renderer : 0.5
>(II) Loader running on linux
>(II) LoadModule: "pcidata"
>(II) Loading /usr/lib/xorg/modules//libpcidata.so
>(II) Module pcidata: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 2.0
>(--) using VT number 7
>
>(WW) OS did not count PCI devices, guessing wildly
>(II) PCI: PCI scan (all values are in hex)
>(II) PCI: 00:07:0: chip 1080,c693 card 0000,0000 rev 00 class 06,01,00 hdr 80
>(II) PCI: 00:07:1: chip 1080,c693 card 0000,0000 rev 00 class 01,01,80 hdr 80
>(II) PCI: 00:07:2: chip 1080,c693 card 0000,0000 rev 00 class 01,01,00 hdr 80
>(II) PCI: 00:07:3: chip 1080,c693 card 0000,0000 rev 00 class 0c,03,10 hdr 80
>(II) PCI: 00:0b:0: chip 10b5,8112 card 0000,0000 rev aa class 06,04,00 hdr 01
>(II) PCI: 00:0c:0: chip 1106,3038 card 1106,3038 rev 62 class 0c,03,00 hdr 80
>(II) PCI: 00:0c:1: chip 1106,3038 card 1106,3038 rev 62 class 0c,03,00 hdr 80
>(II) PCI: 00:0c:2: chip 1106,3104 card 1106,3104 rev 65 class 0c,03,20 hdr 80
>(II) PCI: 00:0d:0: chip 4444,0803 card 0070,4000 rev 01 class 04,00,00 hdr 00
>(II) PCI: 01:00:0: chip 1002,94cc card 2232,1787 rev 00 class 03,00,00 hdr 80
>(II) PCI: 01:00:1: chip 1002,aa10 card 2232,aa10 rev 00 class 04,03,00 hdr 80
>(II) PCI: End of PCI scan
>(II) PCI-to-ISA bridge:
>(II) Bus -1: bridge is at (0:7:0), (0,-1,-1), BCTRL: 0x0008 (VGA_EN is set)
>(II) PCI-to-PCI bridge:
>(II) Bus 1: bridge is at (0:11:0), (0,1,1), BCTRL: 0x000f (VGA_EN is set)
>(II) Bus 1 I/O range:
>	[0] -1	0	0x00008000 - 0x000080ff (0x100) IX[B]
>	[1] -1	0	0x00008400 - 0x000084ff (0x100) IX[B]
>	[2] -1	0	0x00008800 - 0x000088ff (0x100) IX[B]
>	[3] -1	0	0x00008c00 - 0x00008cff (0x100) IX[B]
>(II) Bus 1 non-prefetchable memory range:
>	[0] -1	0	0x09000000 - 0x090fffff (0x100000) MX[B]
>(II) Bus 1 prefetchable memory range:
>	[0] -1	0	0x10000000 - 0x27ffffff (0x18000000) MX[B]
>(II) Host-to-PCI bridge:
>(II) Bus 0: bridge is at (0:0:0), (0,0,0), BCTRL: 0x0008 (VGA_EN is set)
>(II) Bus 0 I/O range:
>	[0] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) Bus 0 non-prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x100000000) MX[B]
>(II) Bus 0 prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x100000000) MX[B]
>(--) PCI: (0:13:0) unknown vendor (0x4444) unknown chipset (0x0803) rev 1, Mem @ 0x0c000000/26
>(--) PCI:*(1:0:0) ATI Technologies Inc unknown chipset (0x94cc) rev 0, Mem @ 0x10000000/28, 0x09000000/16, I/O @ 0x8000/8, BIOS @ 0x20000000/17
>(II) Addressable bus resource ranges are
>	[0] -1	1	0x00000000 - 0xffffffff (0x100000000) MX[B]
>	[1] -1	0	0x00000000 - 0xffffffff (0x100000000) MX[B]
>	[2] -1	1	0x00000000 - 0x0000ffff (0x10000) IX[B]
>	[3] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) OS-reported resource ranges:
>	[0] -1	1	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	1	0x00000000 - 0x00000000 (0x1) MX[B]
>	[2] -1	1	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[4] -1	0	0x00000000 - 0x00000000 (0x1) MX[B]
>	[5] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[6] -1	1	0xffffffff - 0xffffffff (0x1) IX[B]
>	[7] -1	1	0x00000000 - 0x000000ff (0x100) IX[B]
>	[8] -1	0	0xffffffff - 0xffffffff (0x1) IX[B]
>	[9] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) Active PCI resource ranges:
>	[0] -1	0	0x09010000 - 0x09013fff (0x4000) MX[B]
>	[1] -1	0	0x09111000 - 0x091110ff (0x100) MX[B]
>	[2] -1	0	0x09110000 - 0x09110fff (0x1000) MX[B]
>	[3] -1	0	0x20000000 - 0x2001ffff (0x20000) MX[B](B)
>	[4] -1	0	0x09000000 - 0x0900ffff (0x10000) MX[B](B)
>	[5] -1	0	0x10000000 - 0x1fffffff (0x10000000) MX[B](B)
>	[6] -1	0	0x0c000000 - 0x0fffffff (0x4000000) MX[B](B)
>	[7] -1	0	0x00009020 - 0x0000903f (0x20) IX[B]
>	[8] -1	0	0x00009000 - 0x0000901f (0x20) IX[B]
>	[9] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[10] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[11] -1	0	0x00009040 - 0x0000904f (0x10) IX[B]
>	[12] -1	0	0x000003f4 - 0x000003f4 (0x1) IX[B]
>	[13] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[14] -1	0	0x00008000 - 0x000080ff (0x100) IX[B](B)
>(II) Inactive PCI resource ranges:
>	[0] -1	0	0x09100000 - 0x0910ffff (0x10000) MX[B]
>(II) Active PCI resource ranges after removing overlaps:
>	[0] -1	0	0x09010000 - 0x09013fff (0x4000) MX[B]
>	[1] -1	0	0x09111000 - 0x091110ff (0x100) MX[B]
>	[2] -1	0	0x09110000 - 0x09110fff (0x1000) MX[B]
>	[3] -1	0	0x20000000 - 0x2001ffff (0x20000) MX[B](B)
>	[4] -1	0	0x09000000 - 0x0900ffff (0x10000) MX[B](B)
>	[5] -1	0	0x10000000 - 0x1fffffff (0x10000000) MX[B](B)
>	[6] -1	0	0x0c000000 - 0x0fffffff (0x4000000) MX[B](B)
>	[7] -1	0	0x00009020 - 0x0000903f (0x20) IX[B]
>	[8] -1	0	0x00009000 - 0x0000901f (0x20) IX[B]
>	[9] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[10] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[11] -1	0	0x00009040 - 0x0000904f (0x10) IX[B]
>	[12] -1	0	0x000003f4 - 0x000003f4 (0x1) IX[B]
>	[13] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[14] -1	0	0x00008000 - 0x000080ff (0x100) IX[B](B)
>(II) Inactive PCI resource ranges after removing overlaps:
>	[0] -1	0	0x09100000 - 0x0910ffff (0x10000) MX[B]
>(II) OS-reported resource ranges after removing overlaps with PCI:
>	[0] -1	1	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	1	0x00000000 - 0x00000000 (0x1) MX[B]
>	[2] -1	1	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[4] -1	0	0x00000000 - 0x00000000 (0x1) MX[B]
>	[5] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[6] -1	1	0xffffffff - 0xffffffff (0x1) IX[B]
>	[7] -1	1	0x00000000 - 0x000000ff (0x100) IX[B]
>	[8] -1	0	0xffffffff - 0xffffffff (0x1) IX[B]
>	[9] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) All system resource ranges:
>	[0] -1	1	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	1	0x00000000 - 0x00000000 (0x1) MX[B]
>	[2] -1	1	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[4] -1	0	0x00000000 - 0x00000000 (0x1) MX[B]
>	[5] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[6] -1	0	0x09010000 - 0x09013fff (0x4000) MX[B]
>	[7] -1	0	0x09111000 - 0x091110ff (0x100) MX[B]
>	[8] -1	0	0x09110000 - 0x09110fff (0x1000) MX[B]
>	[9] -1	0	0x20000000 - 0x2001ffff (0x20000) MX[B](B)
>	[10] -1	0	0x09000000 - 0x0900ffff (0x10000) MX[B](B)
>	[11] -1	0	0x10000000 - 0x1fffffff (0x10000000) MX[B](B)
>	[12] -1	0	0x0c000000 - 0x0fffffff (0x4000000) MX[B](B)
>	[13] -1	0	0x09100000 - 0x0910ffff (0x10000) MX[B]
>	[14] -1	1	0xffffffff - 0xffffffff (0x1) IX[B]
>	[15] -1	1	0x00000000 - 0x000000ff (0x100) IX[B]
>	[16] -1	0	0xffffffff - 0xffffffff (0x1) IX[B]
>	[17] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[18] -1	0	0x00009020 - 0x0000903f (0x20) IX[B]
>	[19] -1	0	0x00009000 - 0x0000901f (0x20) IX[B]
>	[20] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[21] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[22] -1	0	0x00009040 - 0x0000904f (0x10) IX[B]
>	[23] -1	0	0x000003f4 - 0x000003f4 (0x1) IX[B]
>	[24] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[25] -1	0	0x00008000 - 0x000080ff (0x100) IX[B](B)
>(II) LoadModule: "extmod"
>(II) Loading /usr/lib/xorg/modules/extensions//libextmod.so
>(II) Module extmod: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension SHAPE
>(II) Loading extension MIT-SUNDRY-NONSTANDARD
>(II) Loading extension BIG-REQUESTS
>(II) Loading extension SYNC
>(II) Loading extension MIT-SCREEN-SAVER
>(II) Loading extension XC-MISC
>(II) Loading extension XFree86-VidModeExtension
>(II) Loading extension XFree86-Misc
>(II) Loading extension XFree86-DGA
>(II) Loading extension DPMS
>(II) Loading extension TOG-CUP
>(II) Loading extension Extended-Visual-Information
>(II) Loading extension XVideo
>(II) Loading extension XVideo-MotionCompensation
>(II) Loading extension X-Resource
>(II) LoadModule: "dbe"
>(II) Loading /usr/lib/xorg/modules/extensions//libdbe.so
>(II) Module dbe: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension DOUBLE-BUFFER
>(II) LoadModule: "glx"
>(II) Loading /usr/lib/xorg/modules/extensions//libglx.so
>(II) Module glx: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(==) AIGLX enabled
>(II) Loading extension GLX
>(II) LoadModule: "freetype"
>(II) Loading /usr/lib/xorg/modules//fonts/libfreetype.so
>(II) Module freetype: vendor="X.Org Foundation & the After X-TT Project"
>	compiled for 1.4.2, module version = 2.1.0
>	Module class: X.Org Font Renderer
>	ABI class: X.Org Font Renderer, version 0.5
>(II) Loading font FreeType
>(II) LoadModule: "record"
>(II) Loading /usr/lib/xorg/modules/extensions//librecord.so
>(II) Module record: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.13.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension RECORD
>(II) LoadModule: "dri"
>(II) Loading /usr/lib/xorg/modules/extensions//libdri.so
>(II) Module dri: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension XFree86-DRI
>(II) LoadModule: "radeonhd"
>(II) Loading /usr/lib/xorg/modules/drivers//radeonhd_drv.so
>(II) Module radeonhd: vendor="AMD GPG"
>	compiled for 1.4.2, module version = 1.2.1
>	Module class: X.Org Video Driver
>	ABI class: X.Org Video Driver, version 2.0
>(II) LoadModule: "kbd"
>(II) Loading /usr/lib/xorg/modules/input//kbd_drv.so
>(II) Module kbd: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.3.1
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.0
>(II) LoadModule: "mouse"
>(II) Loading /usr/lib/xorg/modules/input//mouse_drv.so
>(II) Module mouse: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.3.0
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.0
>(II) RADEONHD: X driver for the following AMD GPG (ATI) graphics devices:
>	RV505 : Radeon X1550, X1550 64bit.
>	RV515 : Radeon X1300, X1550, X1600; FireGL V3300, V3350.
>	RV516 : Radeon X1300, X1550, X1550 64-bit, X1600; FireMV 2250.
>	R520  : Radeon X1800; FireGL V5300, V7200, V7300, V7350.
>	RV530 : Radeon X1300 XT, X1600, X1600 Pro, X1650; FireGL V3400, V5200.
>	RV535 : Radeon X1300, X1650.
>	RV550 : Radeon X2300 HD.
>	RV560 : Radeon X1650.
>	RV570 : Radeon X1950, X1950 GT; FireGL V7400.
>	R580  : Radeon X1900, X1950; AMD Stream Processor.
>	R600  : Radeon HD 2900 GT/Pro/XT; FireGL V7600/V8600/V8650.
>	RV610 : Radeon HD 2350, HD 2400 Pro/XT, HD 2400 Pro AGP; FireGL V4000.
>	RV620 : Radeon HD 3450, HD 3470.
>	RV630 : Radeon HD 2600 LE/Pro/XT, HD 2600 Pro/XT AGP; Gemini RV630;
>		FireGL V3600/V5600.
>	RV635 : Radeon HD 3650, HD 3670.
>	RV670 : Radeon HD 3690, 3850, HD 3870, FireGL V7700, FireStream 9170.
>	R680  : Radeon HD 3870 X2.
>	M52   : Mobility Radeon X1300.
>	M54   : Mobility Radeon X1400; M54-GL.
>	M56   : Mobility Radeon X1600; Mobility FireGL V5200.
>	M58   : Mobility Radeon X1800, X1800 XT; Mobility FireGL V7100, V7200.
>	M62   : Mobility Radeon X1350.
>	M64   : Mobility Radeon X1450, X2300.
>	M66   : Mobility Radeon X1700, X1700 XT; FireGL V5250.
>	M68   : Mobility Radeon X1900.
>	M71   : Mobility Radeon HD 2300.
>	M72   : Mobility Radeon HD 2400; Radeon E2400.
>	M74   : Mobility Radeon HD 2400 XT.
>	M76   : Mobility Radeon HD 2600;
>		(Gemini ATI) Mobility Radeon HD 2600 XT.
>	M82   : Mobility Radeon HD 3400.
>	M86   : Mobility Radeon HD 3650, HD 3670, Mobility FireGL V5700.
>	M88   : Mobility Radeon HD 3850, HD 3850 X2, HD 3870, HD3870 X2.
>	RS600 : Radeon Xpress 1200, Xpress 1250.
>	RS690 : Radeon X1200, X1250, X1270.
>	RS740 : RS740, RS740M.
>	RS780 : Radeon HD 3100/3200/3300 Series.
>	RV770 : Radeon HD 4800 Series; Everest, K2, Denali ATI FirePro.
>
>(II) RADEONHD: version 1.2.1, built from git branch miata, commit 31e46386
>
>(II) Primary Device is: PCI 01:00:0
>(--) Chipset RV610 found
>(II) Machine type has 8/16 bit access
>(II) resource ranges after xf86ClaimFixedResources() call:
>	[0] -1	1	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	1	0x00000000 - 0x00000000 (0x1) MX[B]
>	[2] -1	1	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[4] -1	0	0x00000000 - 0x00000000 (0x1) MX[B]
>	[5] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[6] -1	0	0x09010000 - 0x09013fff (0x4000) MX[B]
>	[7] -1	0	0x09111000 - 0x091110ff (0x100) MX[B]
>	[8] -1	0	0x09110000 - 0x09110fff (0x1000) MX[B]
>	[9] -1	0	0x20000000 - 0x2001ffff (0x20000) MX[B](B)
>	[10] -1	0	0x09000000 - 0x0900ffff (0x10000) MX[B](B)
>	[11] -1	0	0x10000000 - 0x1fffffff (0x10000000) MX[B](B)
>	[12] -1	0	0x0c000000 - 0x0fffffff (0x4000000) MX[B](B)
>	[13] -1	0	0x09100000 - 0x0910ffff (0x10000) MX[B]
>	[14] -1	1	0xffffffff - 0xffffffff (0x1) IX[B]
>	[15] -1	1	0x00000000 - 0x000000ff (0x100) IX[B]
>	[16] -1	0	0xffffffff - 0xffffffff (0x1) IX[B]
>	[17] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[18] -1	0	0x00009020 - 0x0000903f (0x20) IX[B]
>	[19] -1	0	0x00009000 - 0x0000901f (0x20) IX[B]
>	[20] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[21] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[22] -1	0	0x00009040 - 0x0000904f (0x10) IX[B]
>	[23] -1	0	0x000003f4 - 0x000003f4 (0x1) IX[B]
>	[24] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[25] -1	0	0x00008000 - 0x000080ff (0x100) IX[B](B)
>(II) resource ranges after probing:
>	[0] -1	1	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	1	0x00000000 - 0x00000000 (0x1) MX[B]
>	[2] -1	1	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[4] -1	0	0x00000000 - 0x00000000 (0x1) MX[B]
>	[5] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[6] -1	0	0x09010000 - 0x09013fff (0x4000) MX[B]
>	[7] -1	0	0x09111000 - 0x091110ff (0x100) MX[B]
>	[8] -1	0	0x09110000 - 0x09110fff (0x1000) MX[B]
>	[9] -1	0	0x20000000 - 0x2001ffff (0x20000) MX[B](B)
>	[10] -1	0	0x09000000 - 0x0900ffff (0x10000) MX[B](B)
>	[11] -1	0	0x10000000 - 0x1fffffff (0x10000000) MX[B](B)
>	[12] -1	0	0x0c000000 - 0x0fffffff (0x4000000) MX[B](B)
>	[13] -1	0	0x09100000 - 0x0910ffff (0x10000) MX[B]
>	[14] -1	1	0xffffffff - 0xffffffff (0x1) IX[B]
>	[15] -1	1	0x00000000 - 0x000000ff (0x100) IX[B]
>	[16] -1	0	0xffffffff - 0xffffffff (0x1) IX[B]
>	[17] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[18] -1	0	0x00009020 - 0x0000903f (0x20) IX[B]
>	[19] -1	0	0x00009000 - 0x0000901f (0x20) IX[B]
>	[20] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[21] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[22] -1	0	0x00009040 - 0x0000904f (0x10) IX[B]
>	[23] -1	0	0x000003f4 - 0x000003f4 (0x1) IX[B]
>	[24] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[25] -1	0	0x00008000 - 0x000080ff (0x100) IX[B](B)
>(**) RADEONHD(0): Depth 24, (--) framebuffer bpp 32
>(**) RADEONHD(0): Selected ShadowFB.
>(II) RADEONHD(0): Unknown card detected: 0x94CC:0x2232:0x1787.
>	If - and only if - your card does not work or does not work optimally
>	please contact radeonhd@opensuse.org to help rectify this.
>	Use the subject: 0x94CC:0x2232:0x1787: <name of board>
>	and *please* describe the problems you are seeing
>	in your message.
>(--) RADEONHD(0): Detected an RV610 on an unidentified card
>(II) RADEONHD(0): FUNCTION: rhdMapMMIO
>(II) RADEONHD(0): Mapped IO @ 0x9000000 to 0x200007f8000 (size 0x00010000)
>(II) RADEONHD(0): FUNCTION: rhdGetCardType
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomInit
>(II) RADEONHD(0): Getting BIOS copy from legacy VBIOS location
>(EE) RADEONHD(0): Invalid BIOS length field
>(II) RADEONHD(0): Getting BIOS copy from PCI ROM
>(II) Truncating PCI BIOS Length to 61440
>(WW) RADEONHD(0): Read only 61440 of 131072 bytes of BIOS image
>(II) RADEONHD(0): FUNCTION: rhdAtomGetTables
>(II) RADEONHD(0): ATOM BIOS Rom: 
>	SubsystemVendorID: 0x2232 SubsystemID: 0x1787
>	IOBaseAddress: 0x0000
>	Filename: 72319EAA.QEA
>	BIOS Bootup Message:   HD2400 GDDR2_32MX16 64BIT 256MB 72319EAA.QEA          
>                      
>(II) RADEONHD(0): FUNCTION: rhdAtomASICInit
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Default Engine Clock: 525000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Default Memory Clock: 400000
>(II) RADEONHD(0): Calling ASIC Init
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): ASIC_INIT Successful
>(II) RADEONHD(0): Call to AtomBIOS Init succeeded
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomAnalogTVInfoQuery
>(II) RADEONHD(0): Analog TV Default Mode: 7959673
>(II) RADEONHD(0): FUNCTION: rhdGetVideoRamSize
>(--) RADEONHD(0): VideoRAM: 262144 kByte
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomVramInfoQuery
>(II) RADEONHD(0): Framebuffer space used by Firmware (kb): 0
>(WW) RADEONHD(0): rhdAtomGetFbBaseAndSize: AtomBIOS specified VRAM scratch space size invalid
>(II) RADEONHD(0):  default to: 20480
>(II) RADEONHD(0): Cannot get VRAM scratch space. Allocating in main memory instead
>(II) RADEONHD(0): Call to AtomBIOS Set FB Space succeeded
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Default Engine Clock: 525000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Default Memory Clock: 400000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Maximum Pixel ClockPLL Frequency Output: 1200000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Minimum Pixel ClockPLL Frequency Output: 0
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Maximum Pixel ClockPLL Frequency Input: 13500
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Minimum Pixel ClockPLL Frequency Input: 1000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Maximum Pixel Clock: 400000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Reference Clock: 27000
>(WW) RADEONHD(0): DRI support has been disabled at compile time
>(II) Loading sub module "i2c"
>(II) LoadModule: "i2c"(II) Module "i2c" already built-in
>(II) RADEONHD(0): FUNCTION: RHDI2CFunc
>(II) RADEONHD(0): FUNCTION: rhdGetI2CPrescale
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Reference Clock: 27000
>(II) RADEONHD(0): FUNCTION: rhdInitI2C
>(II) RADEONHD(0): I2C clock prescale value: 438
>(II) RADEONHD(0): I2C bus "RHD I2C line 0" initialized.
>(II) RADEONHD(0): I2C clock prescale value: 438
>(II) RADEONHD(0): I2C bus "RHD I2C line 1" initialized.
>(II) RADEONHD(0): I2C clock prescale value: 438
>(II) RADEONHD(0): I2C bus "RHD I2C line 2" initialized.
>(II) RADEONHD(0): I2C clock prescale value: 438
>(II) RADEONHD(0): I2C bus "RHD I2C line 3" initialized.
>(II) Loading sub module "ddc"
>(II) LoadModule: "ddc"(II) Module "ddc" already built-in
>(II) RADEONHD(0): FUNCTION: RHDVGAInit
>(II) RADEONHD(0): Detected VGA mode.
>(II) RADEONHD(0): FUNCTION: RHDMCInit
>(II) RADEONHD(0): MC FB Address: 0x10000000.
>(II) RADEONHD(0): FUNCTION: RHDCrtcsInit
>(II) RADEONHD(0): FUNCTION: rhdInitScaleType
>(II) RADEONHD(0): FUNCTION: RHDPLLsInit
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Minimum Pixel ClockPLL Frequency Output: 0
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Maximum Pixel ClockPLL Frequency Output: 1200000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Maximum Pixel Clock: 400000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Reference Clock: 27000
>(II) RADEONHD(0): FUNCTION: RHDLUTsInit
>(II) RADEONHD(0): FUNCTION: RHDCursorsInit
>(II) RADEONHD(0): FB: Allocated Cursor Image at offset 0x00000000 (size = 0x00004000)
>(II) RADEONHD(0): FB: Allocated Cursor Image at offset 0x00004000 (size = 0x00004000)
>(II) RADEONHD(0): FUNCTION: RHDConnectorsInit
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomConnectorInfoFromObjectHeader
>(II) RADEONHD(0): ObjectTable - size: 251, BIOS - size: 61440 TableOffset: 80 object_header_end: 331
>(II) RADEONHD(0): Object: ID: 310f name: 7PIN_DIN type: 3 id: f
>(II) RADEONHD(0): FUNCTION: rhdAtomGetConnectorID
>(II) RADEONHD(0):  * SrcObject: ID: 2116 name: INTERNAL_KLDSCP_DAC2 enum: 1
>(II) RADEONHD(0):  - Record Type: 4
>(II) RADEONHD(0): FUNCTION: rhdAtomDeviceTagsFromRecord
>(II) RADEONHD(0):    NumberOfDevice: 2
>(II) RADEONHD(0):    Devices: TV1 CV
>(II) RADEONHD(0):  - Record Type: 7
>(II) RADEONHD(0): Object: ID: 3105 name: VGA type: 3 id: 5
>(II) RADEONHD(0): FUNCTION: rhdAtomGetConnectorID
>(II) RADEONHD(0):  * SrcObject: ID: 2116 name: INTERNAL_KLDSCP_DAC2 enum: 1
>(II) RADEONHD(0):  - Record Type: 1
>(II) RADEONHD(0):    rhdAtomDDCFromI2CRecord:  I2C Record: HW_Line[1] EngineID: 1 I2CAddr: 0
>(II) RADEONHD(0):  - Record Type: 4
>(II) RADEONHD(0): FUNCTION: rhdAtomDeviceTagsFromRecord
>(II) RADEONHD(0):    NumberOfDevice: 2
>(II) RADEONHD(0):    Devices: CRT2 CV
>(II) RADEONHD(0): Object: ID: 3102 name: DUAL_LINK_DVI_I type: 3 id: 2
>(II) RADEONHD(0): FUNCTION: rhdAtomGetConnectorID
>(II) RADEONHD(0):  * SrcObject: ID: 210f name: INTERNAL_LVTM1 enum: 1
>(II) RADEONHD(0):  * SrcObject: ID: 2115 name: INTERNAL_KLDSCP_DAC1 enum: 1
>(II) RADEONHD(0):  - Record Type: 1
>(II) RADEONHD(0):    rhdAtomDDCFromI2CRecord:  I2C Record: HW_Line[0] EngineID: 1 I2CAddr: 0
>(II) RADEONHD(0):  - Record Type: 2
>(II) RADEONHD(0):    rhdAtomHPDFromRecord:  HPD Record: GPIO ID: 6 Plugged_PinState: 0
>(II) RADEONHD(0): FUNCTION: rhdAtomParseGPIOLutForHPD
>(II) RADEONHD(0):    rhdAtomParseGPIOLutForHPD: GPIO PinID: 6 Index: 1fa5 Shift: 0
>(II) RADEONHD(0):  - Record Type: 4
>(II) RADEONHD(0): FUNCTION: rhdAtomDeviceTagsFromRecord
>(II) RADEONHD(0):    NumberOfDevice: 2
>(II) RADEONHD(0):    Devices: CRT1 DFP1
>(II) RADEONHD(0): Connector[0] {RHD_CONNECTOR_TV, "7PIN_DIN TV1 CV", RHD_DDC_0, RHD_HPD_NONE, { RHD_OUTPUT_DACB, RHD_OUTPUT_NONE } }
>(II) RADEONHD(0): Connector[1] {RHD_CONNECTOR_VGA, "VGA CRT2 CV", RHD_DDC_1, RHD_HPD_NONE, { RHD_OUTPUT_DACB, RHD_OUTPUT_NONE } }
>(II) RADEONHD(0): Connector[2] {RHD_CONNECTOR_DVI, "DUAL_LINK_DVI_I CRT1 DFP1", RHD_DDC_0, RHD_HPD_0, { RHD_OUTPUT_LVTMA, RHD_OUTPUT_DACA } }
>(II) RADEONHD(0): Call to AtomBIOS Get Connectors succeeded
>(II) RADEONHD(0): FUNCTION: RHDHPDSave
>(II) RADEONHD(0): FUNCTION: RHDHPDSet
>(II) RADEONHD(0): RHDConnectorsInit: 0 (7PIN_DIN TV1 CV) type 5, ddc 0, hpd 0
>(II) RADEONHD(0): FUNCTION: RHDI2CFunc
>(II) RADEONHD(0): FUNCTION: RHDDACBInit
>(II) RADEONHD(0): FUNCTION: RHDOutputAdd
>(--) RADEONHD(0): Attaching Output DAC B to Connector TV 7PIN_DIN
>(II) RADEONHD(0): RHDConnectorsInit: 1 (VGA CRT2 CV) type 1, ddc 1, hpd 0
>(II) RADEONHD(0): FUNCTION: RHDI2CFunc
>(--) RADEONHD(0): Attaching Output DAC B to Connector VGA 1
>(II) RADEONHD(0): RHDConnectorsInit: 2 (DUAL_LINK_DVI_I CRT1 DFP1) type 2, ddc 0, hpd 1
>(II) RADEONHD(0): FUNCTION: RHDI2CFunc
>(II) RADEONHD(0): FUNCTION: RHDLVTMAInit
>(II) RADEONHD(0): FUNCTION: RHDOutputAdd
>(--) RADEONHD(0): Attaching Output TMDS B to Connector DVI-I 1
>(II) RADEONHD(0): FUNCTION: RHDDACAInit
>(II) RADEONHD(0): FUNCTION: RHDOutputAdd
>(--) RADEONHD(0): Attaching Output DAC A to Connector DVI-I 1
>(II) RADEONHD(0): FUNCTION: RHDHPDRestore
>(II) RADEONHD(0): FUNCTION: RHDRandrPreInit
>(II) RADEONHD(0): RandR: Adding RRoutput TV_7PIN_DIN for Output DAC B
>(II) RADEONHD(0): RandR: Adding RRoutput VGA_1 for Output DAC B
>(II) RADEONHD(0): RandR: Adding RRoutput DVI-I_1/digital for Output TMDS B
>(II) RADEONHD(0): RandR: Adding RRoutput DVI-I_1/analog for Output DAC A
>(II) RADEONHD(0): Output TV_7PIN_DIN using monitor section Generic Monitor
>(II) RADEONHD(0): Output VGA_1 has no monitor section
>(II) RADEONHD(0): Output DVI-I_1/digital has no monitor section
>(II) RADEONHD(0): Output DVI-I_1/analog has no monitor section
>(II) RADEONHD(0): rhdRROutputDetect: Output TV_7PIN_DIN
>(II) RADEONHD(0): FUNCTION: DACBSense
>(II) RADEONHD(0): DACSense: DAC: 0x00
>(II) RADEONHD(0): rhdRROutputDetect: Output VGA_1
>(II) RADEONHD(0): FUNCTION: DACBSense
>(II) RADEONHD(0): DACSense: DAC: 0x00
>(II) RADEONHD(0): rhdRROutputDetect: Output DVI-I_1/digital
>(II) RADEONHD(0): FUNCTION: RHDHPDCheck
>(II) RADEONHD(0): RHDHPDCheck returned: 1 mask: 1
>(II) RADEONHD(0): FUNCTION: DACASense
>(II) RADEONHD(0): DACSense: DAC: 0x00
>(II) RADEONHD(0): rhdRROutputGetModes: Output DVI-I_1/digital
>(II) RADEONHD(0): FUNCTION: RHDMonitorInit
>(II) RADEONHD(0): I2C device "RHD I2C line 0:ddc2" registered at address 0xA0.
>(II) RADEONHD(0): FUNCTION: rhd6xxWriteRead
>(II) RADEONHD(0): FUNCTION: rhd6xxI2CSetupStatus
>(II) RADEONHD(0): FUNCTION: rhdR6xxI2CStatus
>(II) RADEONHD(0): EDID data for SyncMaster
>(II) RADEONHD(0): Manufacturer: SAM  Model: 214  Serial#: 1146106417
>(II) RADEONHD(0): Year: 2006  Week: 30
>(II) RADEONHD(0): EDID Version: 1.3
>(II) RADEONHD(0): Digital Display Input
>(II) RADEONHD(0): Max H-Image Size [cm]: horiz.: 45  vert.: 28
>(II) RADEONHD(0): Gamma: 2.20
>(II) RADEONHD(0): DPMS capabilities: Off; RGB/Color Display
>(II) RADEONHD(0): First detailed timing is preferred mode
>(II) RADEONHD(0): redX: 0.640 redY: 0.330   greenX: 0.300 greenY: 0.600
>(II) RADEONHD(0): blueX: 0.150 blueY: 0.060   whiteX: 0.313 whiteY: 0.329
>(II) RADEONHD(0): Supported VESA Video Modes:
>(II) RADEONHD(0): 720x400@70Hz
>(II) RADEONHD(0): 640x480@60Hz
>(II) RADEONHD(0): 640x480@67Hz
>(II) RADEONHD(0): 640x480@72Hz
>(II) RADEONHD(0): 640x480@75Hz
>(II) RADEONHD(0): 800x600@56Hz
>(II) RADEONHD(0): 800x600@60Hz
>(II) RADEONHD(0): 800x600@72Hz
>(II) RADEONHD(0): 800x600@75Hz
>(II) RADEONHD(0): 832x624@75Hz
>(II) RADEONHD(0): 1024x768@60Hz
>(II) RADEONHD(0): 1024x768@70Hz
>(II) RADEONHD(0): 1024x768@75Hz
>(II) RADEONHD(0): 1280x1024@75Hz
>(II) RADEONHD(0): 1152x870@75Hz
>(II) RADEONHD(0): Manufacturer's mask: 0
>(II) RADEONHD(0): Supported Future Video Modes:
>(II) RADEONHD(0): #0: hsize: 1680  vsize 1050  refresh: 60  vid: 179
>(II) RADEONHD(0): #1: hsize: 1280  vsize 1024  refresh: 60  vid: 32897
>(II) RADEONHD(0): #2: hsize: 1280  vsize 960  refresh: 60  vid: 16513
>(II) RADEONHD(0): #3: hsize: 1152  vsize 864  refresh: 75  vid: 20337
>(II) RADEONHD(0): Supported additional Video Mode:
>(II) RADEONHD(0): clock: 146.2 MHz   Image Size:  408 x 306 mm
>(II) RADEONHD(0): h_active: 1680  h_sync: 1784  h_sync_end 1960 h_blank_end 2240 h_border: 0
>(II) RADEONHD(0): v_active: 1050  v_sync: 1053  v_sync_end 1059 v_blanking: 1089 v_border: 0
>(II) RADEONHD(0): Ranges: V min: 56  V max: 75 Hz, H min: 30  H max: 81 kHz, PixClock max 170 MHz
>(II) RADEONHD(0): Monitor name: SyncMaster
>(II) RADEONHD(0): Serial No: HVYL700211
>(II) RADEONHD(0): EDID (in hex):
>(II) RADEONHD(0): 	00ffffffffffff004c2d140231325044
>(II) RADEONHD(0): 	1e100103802d1c782aee95a3544c9926
>(II) RADEONHD(0): 	0f5054bfef80b30081808140714f0101
>(II) RADEONHD(0): 	01010101010121399030621a274068b0
>(II) RADEONHD(0): 	360098321100001c000000fd00384b1e
>(II) RADEONHD(0): 	5111000a202020202020000000fc0053
>(II) RADEONHD(0): 	796e634d61737465720a2020000000ff
>(II) RADEONHD(0): 	004856594c3730303231310a2020002e
>(II) RADEONHD(0): FUNCTION: RHDRRMonitorInit
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 800x600
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 800x600: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 800x600
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 800x600: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 640x480
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 640x480: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 640x480
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 640x480: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 640x480
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 640x480: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 640x480
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 640x480: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 720x400
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 720x400: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1280x1024
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1280x1024: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1024x768
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1024x768: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1024x768
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1024x768: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1024x768
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1024x768: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 832x624
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 832x624: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 800x600
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 800x600: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 800x600
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 800x600: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1152x864
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1152x864: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1680x1050
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1680x1050: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1280x1024
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1280x1024: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1280x960
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1280x960: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1152x864
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1152x864: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1680x1050
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1680x1050: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 640x480
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 640x480: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 320x240
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): rhdRROutputModeValid: 320x240: doublescan mode not supported
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 640x480
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 640x480: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 320x240
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): rhdRROutputModeValid: 320x240: doublescan mode not supported
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 640x480
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 640x480: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 320x240
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): rhdRROutputModeValid: 320x240: doublescan mode not supported
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 800x600
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 800x600: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 400x300
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): rhdRROutputModeValid: 400x300: doublescan mode not supported
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 800x600
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 800x600: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 400x300
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): rhdRROutputModeValid: 400x300: doublescan mode not supported
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 800x600
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 800x600: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 400x300
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): rhdRROutputModeValid: 400x300: doublescan mode not supported
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 800x600
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 800x600: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1024x768
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1024x768: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 512x384
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): rhdRROutputModeValid: 512x384: doublescan mode not supported
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1024x768
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1024x768: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 512x384
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): rhdRROutputModeValid: 512x384: doublescan mode not supported
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1152x864
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1152x864: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 576x432
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): rhdRROutputModeValid: 576x432: doublescan mode not supported
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1280x960
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1280x960: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 640x480
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): rhdRROutputModeValid: 640x480: doublescan mode not supported
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1280x1024
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1280x1024: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 640x512
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): rhdRROutputModeValid: 640x512: doublescan mode not supported
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1600x1200
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1600x1200: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 800x600
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): rhdRROutputModeValid: 800x600: doublescan mode not supported
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 832x624
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 832x624: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 416x312
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): rhdRROutputModeValid: 416x312: doublescan mode not supported
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1280x768
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1280x768: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 640x384
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): rhdRROutputModeValid: 640x384: doublescan mode not supported
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1280x800
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1280x800: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 640x400
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): rhdRROutputModeValid: 640x400: doublescan mode not supported
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1400x1050
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1400x1050: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 700x525
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): rhdRROutputModeValid: 700x525: doublescan mode not supported
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1400x1050
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1400x1050: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 700x525
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): rhdRROutputModeValid: 700x525: doublescan mode not supported
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1440x900
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1440x900: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 720x450
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): rhdRROutputModeValid: 720x450: doublescan mode not supported
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1600x1024
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1600x1024: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 800x512
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): rhdRROutputModeValid: 800x512: doublescan mode not supported
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1680x1050
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: TMDSBModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1680x1050: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 840x525
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): rhdRROutputModeValid: 840x525: doublescan mode not supported
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 960x600
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): rhdRROutputModeValid: 960x600: doublescan mode not supported
>(II) RADEONHD(0): rhdRROutputDetect: Output DVI-I_1/analog
>(II) RADEONHD(0): FUNCTION: RHDHPDCheck
>(II) RADEONHD(0): RHDHPDCheck returned: 1 mask: 1
>(II) RADEONHD(0): FUNCTION: DACASense
>(II) RADEONHD(0): DACSense: DAC: 0x00
>(II) RADEONHD(0): Output TV_7PIN_DIN disconnected
>(II) RADEONHD(0): Output VGA_1 disconnected
>(II) RADEONHD(0): Output DVI-I_1/digital connected
>(II) RADEONHD(0): Output DVI-I_1/analog disconnected
>(II) RADEONHD(0): Output DVI-I_1/digital using initial mode 1680x1050
>(II) RADEONHD(0): RandR 1.2 support enabled
>(==) RADEONHD(0): RGB weight 888
>(==) RADEONHD(0): Default visual is TrueColor
>(==) RADEONHD(0): Using gamma correction (1.0, 1.0, 1.0)
>(II) RADEONHD(0): FUNCTION: RHDGetVirtualFromConfig
>(II) RADEONHD(0): FUNCTION: DxFBValid: CRTC 1
>(II) RADEONHD(0): FUNCTION: DxFBValid: CRTC 2
>(II) RADEONHD(0): Using 1680x1680 Framebuffer with 1728 pitch
>(II) RADEONHD(0): FB: Allocated ScanoutBuffer at offset 0x00008000 (size = 0x00B13000)
>(**) RADEONHD(0): Display dimensions: (426, 266) mm
>(**) RADEONHD(0): DPI set to (100, 160)
>(II) Loading sub module "fb"
>(II) LoadModule: "fb"
>(II) Loading /usr/lib/xorg/modules//libfb.so
>(II) Module fb: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.0.0
>	ABI class: X.Org ANSI C Emulation, version 0.3
>(II) Loading sub module "ramdac"
>(II) LoadModule: "ramdac"(II) Module "ramdac" already built-in
>(II) RADEONHD(0): FUNCTION: RHDShadowPreInit
>(II) Loading sub module "shadow"
>(II) LoadModule: "shadow"
>(II) Loading /usr/lib/xorg/modules//libshadow.so
>(II) Module shadow: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.1.0
>	ABI class: X.Org ANSI C Emulation, version 0.3
>(II) RADEONHD(0): Using ShadowFB
>(II) RADEONHD(0): Free FB offset 0x00B1B000 (size = 0x0F4E5000)
>(II) RADEONHD(0): FUNCTION: rhdUnmapMMIO
>(--) Depth 24 pixmap format is 32 bpp
>(II) do I need RAC?  No, I don't.
>(II) resource ranges after preInit:
>	[0] 0	0	0x09000000 - 0x0900ffff (0x10000) MS[B]
>	[1] 0	0	0x10000000 - 0x1fffffff (0x10000000) MS[B]
>	[2] -1	1	0xffffffff - 0xffffffff (0x1) MX[B]
>	[3] -1	1	0x00000000 - 0x00000000 (0x1) MX[B]
>	[4] -1	1	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[5] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[6] -1	0	0x00000000 - 0x00000000 (0x1) MX[B]
>	[7] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[8] -1	0	0x09010000 - 0x09013fff (0x4000) MX[B]
>	[9] -1	0	0x09111000 - 0x091110ff (0x100) MX[B]
>	[10] -1	0	0x09110000 - 0x09110fff (0x1000) MX[B]
>	[11] -1	0	0x20000000 - 0x2001ffff (0x20000) MX[B](B)
>	[12] -1	0	0x09000000 - 0x0900ffff (0x10000) MX[B](B)
>	[13] -1	0	0x10000000 - 0x1fffffff (0x10000000) MX[B](B)
>	[14] -1	0	0x0c000000 - 0x0fffffff (0x4000000) MX[B](B)
>	[15] -1	0	0x09100000 - 0x0910ffff (0x10000) MX[B]
>	[16] 0	0	0x00008000 - 0x000080ff (0x100) IS[B]
>	[17] -1	1	0xffffffff - 0xffffffff (0x1) IX[B]
>	[18] -1	1	0x00000000 - 0x000000ff (0x100) IX[B]
>	[19] -1	0	0xffffffff - 0xffffffff (0x1) IX[B]
>	[20] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[21] -1	0	0x00009020 - 0x0000903f (0x20) IX[B]
>	[22] -1	0	0x00009000 - 0x0000901f (0x20) IX[B]
>	[23] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[24] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[25] -1	0	0x00009040 - 0x0000904f (0x10) IX[B]
>	[26] -1	0	0x000003f4 - 0x000003f4 (0x1) IX[B]
>	[27] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[28] -1	0	0x00008000 - 0x000080ff (0x100) IX[B](B)
>(II) RADEONHD(0): FUNCTION: RHDScreenInit
>(II) RADEONHD(0): FUNCTION: rhdMapMMIO
>(II) RADEONHD(0): Mapped IO @ 0x9000000 to 0x200007f8000 (size 0x00010000)
>(II) RADEONHD(0): FUNCTION: rhdMapFB
>(II) RADEONHD(0): Physical FB Address: 0x10000000 (PCI BAR: 0x10000000)
>(II) RADEONHD(0): Mapped FB @ 0x10000000 to 0x20000874000 (size 0x10000000)
>(II) RADEONHD(0): FUNCTION: rhdSave
>(II) RADEONHD(0): FUNCTION: RHDSaveMC
>(II) RADEONHD(0): FUNCTION: r6xxSaveMC
>(II) RADEONHD(0): FUNCTION: RHDVGASave
>(II) RADEONHD(0): RHDVGASave: FBOffset: 0x30000000
>(EE) RADEONHD(0): RHDVGASave: VGA FB Offset (0x40000000) is out of range of the Cards Internal FB Address (0x10000000)
>(II) RADEONHD(0): FUNCTION: RHDOutputsSave
>(II) RADEONHD(0): FUNCTION: DACBSave
>(II) RADEONHD(0): FUNCTION: TMDSBSave
>(II) RADEONHD(0): FUNCTION: DACASave
>(II) RADEONHD(0): FUNCTION: RHDPLLsSave
>(II) RADEONHD(0): FUNCTION: R500PLL1Save
>(II) RADEONHD(0): FUNCTION: R500PLL2Save
>(II) RADEONHD(0): FUNCTION: RHDLUTsSave
>(II) RADEONHD(0): DxSave: CRTC 1
>(II) RADEONHD(0): Saved CrtcCountControl[0] = 0x00000000
>(II) RADEONHD(0): DxSave: CRTC 2
>(II) RADEONHD(0): Saved CrtcCountControl[1] = 0x00000000
>(II) RADEONHD(0): FUNCTION: rhdSaveCursor
>(II) RADEONHD(0): FUNCTION: saveCursor
>(II) RADEONHD(0): FUNCTION: saveCursor
>(II) RADEONHD(0): FUNCTION: RHDShadowScreenInit
>(II) RADEONHD(0): FUNCTION: RHDShadowSetup
>(==) RADEONHD(0): Backing store disabled
>(==) RADEONHD(0): Silken mouse enabled
>(II) RADEONHD(0): FUNCTION: RHDRandrScreenInit
>(II) RADEONHD(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>(II) RADEONHD(0): FUNCTION: rhdRROutputCreateResources
>(II) RADEONHD(0): FUNCTION: rhdRROutputCreateResources
>(II) RADEONHD(0): FUNCTION: rhdRROutputCreateResources
>(II) RADEONHD(0): FUNCTION: TMDSBPropertyControl
>(II) RADEONHD(0): FUNCTION: TMDSBPropertyControl
>(II) RADEONHD(0): FUNCTION: TMDSBPropertyControl
>(II) RADEONHD(0): FUNCTION: rhdRROutputCreateResources
>(II) RADEONHD(0): State at POST-ScreenInit:
>   RRCrtc #0 [rhd CRTC 1]: active 1 [0]  mode unnamed (0x0) +0+0
>   RRCrtc #1 [rhd CRTC 2]: active 0 [0]  mode unnamed (0x0) +0+0
>   RROut  TV_7PIN_DIN [Out DAC B Conn TV 7PIN_DIN]  Crtc null [null]  [inactive]  disconnected
>   RROut  VGA_1 [Out DAC B Conn VGA 1]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_1/digital [Out TMDS B Conn DVI-I 1]  Crtc CRTC 1 [null]  [inactive]  connected
>   RROut  DVI-I_1/analog [Out DAC A Conn DVI-I 1]  Crtc null [null]  [inactive]  disconnected
>(II) RADEONHD(0): FUNCTION: RHDRandrModeInit
>(II) RADEONHD(0): FUNCTION: D1Blank
>(II) RADEONHD(0): FUNCTION: D2Blank
>(II) RADEONHD(0): FUNCTION: RHDVGADisable
>(II) RADEONHD(0): FUNCTION: D1Power
>(II) RADEONHD(0): FUNCTION: D2Power
>(II) RADEONHD(0): FUNCTION: RHDMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): RHDMCIdle: MC not idle
>(WW) RADEONHD(0): MC not idle
>(II) RADEONHD(0): FUNCTION: RHDMCSetup
>(II) RADEONHD(0): FUNCTION: RHDMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): FUNCTION: r6xxMCIdle
>(II) RADEONHD(0): RHDMCIdle: MC not idle
>rhd_mc.c:416: RHDMCSetup: Assertion 'RHDMCIdle(rhdPtr, 1)' failed.
>
>Fatal server error:
>Server aborting
>

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Attachments on bug 15521: 15937 | 15958 | 15959 | 15963 | 15988 | 16034 | 16138 | 16229 | 16249 | 16910 | 16911 | 17991

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