Attachment 21125 Details for Bug 18816 – 0005-Enable-linear-memory-mode-on-SMI_MapMmio.patch

[patch] 0005-Enable-linear-memory-mode-on-SMI_MapMmio.patch

0005-Enable-linear-memory-mode-on-SMI_MapMmio.patch (text/plain), 4.12 KB, created by Francisco Jerez on 2008-12-13 10:29:29 UTC

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Creator: Francisco Jerez

Created: 2008-12-13 10:29:29 UTC

Size: 4.12 KB

patch

obsolete

>From 7caf1d86c39d0dabf5792de9fbe095315f8840e7 Mon Sep 17 00:00:00 2001
>From: Francisco Jerez <currojerez@gmail.com>
>Date: Sat, 13 Dec 2008 19:13:50 +0100
>Subject: [PATCH] Enable linear memory mode on SMI_MapMmio.
>
>Set UseBIOS to off by default for SM720. Some improvements on the
>debugging output.
>---
> src/smi_driver.c |   52 +++++++++++++++++++++++++++++-----------------------
> 1 files changed, 29 insertions(+), 23 deletions(-)
>
>diff --git a/src/smi_driver.c b/src/smi_driver.c
>index 4e0cf87..929ef3f 100644
>--- a/src/smi_driver.c
>+++ b/src/smi_driver.c
>@@ -483,7 +483,6 @@ SMI_PreInit(ScrnInfoPtr pScrn, int flags)
>     SMIPtr pSmi;
>     MessageType from;
>     vgaHWPtr hwp;
>-    int vgaCRIndex, vgaIOBase;
> 	
>     ENTER();
> 
>@@ -543,6 +542,13 @@ SMI_PreInit(ScrnInfoPtr pScrn, int flags)
> 	 */
> 	if (!vgaHWGetHWRec(pScrn))
> 	    LEAVE(FALSE);
>+
>+	hwp = VGAHWPTR(pScrn);
>+	pSmi->PIOBase = hwp->PIOOffset;
>+
>+	xf86ErrorFVerb(VERBLEV, "\tSMI_PreInit vgaCRIndex=%x, vgaIOBase=%x, "
>+		       "MMIOBase=%p\n", hwp->IOBase + VGA_CRTC_INDEX_OFFSET,
>+		       hwp->IOBase, hwp->MMIOBase);
>     }
> 
>     /*
>@@ -700,6 +706,10 @@ SMI_PreInit(ScrnInfoPtr pScrn, int flags)
> 	xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Option: UseBIOS %s.\n",
> 		   pSmi->useBIOS ? "enabled" : "disabled");
>     }
>+    else if(pSmi->Chipset == SMI_LYNX3DM){
>+	/* Default to UseBIOS disabled. */
>+	pSmi->useBIOS = FALSE;
>+    }
>     else {
> 	/* Default to UseBIOS enabled. */
> 	pSmi->useBIOS = TRUE;
>@@ -821,14 +831,6 @@ SMI_PreInit(ScrnInfoPtr pScrn, int flags)
> 		LEAVE(FALSE);
> 	    }
> 	}
>-
>-	hwp = VGAHWPTR(pScrn);
>-	vgaIOBase  = hwp->IOBase;
>-	vgaCRIndex = vgaIOBase + VGA_CRTC_INDEX_OFFSET;
>-	pSmi->PIOBase = hwp->PIOOffset;
>-
>-	xf86ErrorFVerb(VERBLEV, "\tSMI_PreInit vgaCRIndex=%x, vgaIOBase=%x, "
>-		       "MMIOBase=%p\n", vgaCRIndex, vgaIOBase, hwp->MMIOBase);
>     }
>     xf86DrvMsg(pScrn->scrnIndex, from, "Dual head %sabled\n",
> 	       pSmi->Dualhead ? "en" : "dis");
>@@ -1024,6 +1026,10 @@ SMI_EnterVT(int scrnIndex, int flags)
>     if (!xf86SetDesiredModes(pScrn))
> 	LEAVE(FALSE);
> 
>+    xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, VERBLEV,
>+		   "Done writing mode.  Register dump:\n");
>+    SMI_PrintRegs(pScrn);
>+
>     /* Reset the grapics engine */
>     if (!pSmi->NoAccel)
> 	SMI_EngineReset(pScrn);
>@@ -1260,6 +1266,8 @@ SMI_MapMmio(ScrnInfoPtr pScrn)
>     SMIPtr	pSmi = SMIPTR(pScrn);
>     CARD32	memBase;
> 
>+    SMI_EnableMmio(pScrn);
>+
>     switch (pSmi->Chipset) {
> 	case SMI_COUGAR3DR:
> 	    memBase = PCI_REGION_BASE(pSmi->PciInfo, 1, REGION_MEM);
>@@ -1385,9 +1393,12 @@ static Bool
> SMI_DetectMem(ScrnInfoPtr pScrn)
> {
>     SMIPtr	pSmi = SMIPTR(pScrn);
>+    MessageType from;
> 
>-    if ((pScrn->videoRam = pScrn->confScreen->device->videoRam))
>+    if ((pScrn->videoRam = pScrn->confScreen->device->videoRam)){
> 	pSmi->videoRAMKBytes = pScrn->videoRam;
>+	from = X_CONFIG;
>+    }
>     else {
> 	unsigned char	 config;
> 	static int	 lynx3d_table[4]  = {  0, 2, 4, 6 };
>@@ -1419,11 +1430,12 @@ SMI_DetectMem(ScrnInfoPtr pScrn)
> 		    break;
> 	    }
> 	}
>+	from = X_PROBED;
>     }
> 
>     pSmi->videoRAMBytes = pSmi->videoRAMKBytes * 1024;
>     pScrn->videoRam     = pSmi->videoRAMKBytes;
>-    xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
>+    xf86DrvMsg(pScrn->scrnIndex, from,
> 	       "videoram: %dkB\n", pSmi->videoRAMKBytes);
> 
>     return (TRUE);
>@@ -1442,18 +1454,10 @@ SMI_MapMem(ScrnInfoPtr pScrn)
> 
>     pScrn->memPhysBase = PCI_REGION_BASE(pSmi->PciInfo, 0, REGION_MEM);
> 
>-    if (IS_MSOC(pSmi)) {
>-	pSmi->fbMapOffset = 0;
>-    }
>-    else {
>-	SMI_EnableMmio(pScrn);
>-
>-	if (pSmi->Chipset == SMI_LYNX3DM) 
>-	    pSmi->fbMapOffset = 0x200000;
>-	else
>-	    pSmi->fbMapOffset = 0x0;
>-
>-    }
>+    if (pSmi->Chipset == SMI_LYNX3DM)
>+	pSmi->fbMapOffset = 0x200000;
>+    else
>+	pSmi->fbMapOffset = 0x0;
> 
> #ifndef XSERVER_LIBPCIACCESS
>     pSmi->FBBase = xf86MapPciMem(pScrn->scrnIndex,
>@@ -1718,6 +1722,8 @@ SMI_ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
>     if (!xf86SetDesiredModes(pScrn))
> 	    LEAVE(FALSE);
> 
>+    xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, VERBLEV,
>+		   "Done writing mode.  Register dump:\n");
>     SMI_PrintRegs(pScrn);
> 
>     miInitializeBackingStore(pScreen);
>-- 
>1.5.6.5
>

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Attachments on bug 18816: 20709 | 20710 | 20738 | 20753 | 21043 | 21044 | 21046 | 21056 | 21057 | 21058 | 21059 | 21060 | 21061 | 21122 | 21125 | 21127 | 21128 | 21186 | 21190 | 21201

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