Attachment 73381 Details for Bug 59661 – dmesg

dmesg

dmesg (text/plain), 122.94 KB, created by Matthias Grossmann on 2013-01-21 14:03:29 UTC

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Creator: Matthias Grossmann

Created: 2013-01-21 14:03:29 UTC

Size: 122.94 KB

patch

obsolete

>[   28.653352] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   28.656438] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[   28.656451] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1] disconnected
>[   28.656638] [drm:drm_mode_getconnector], [CONNECTOR:9:?]
>[   28.656650] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1]
>[   28.656663] [drm:intel_get_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[   28.656674] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection
>[   28.656704] [drm:intel_set_mode], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   28.656721] [drm:intel_modeset_adjusted_mode], [CRTC:4]
>[   28.657571] [drm:i9xx_crtc_mode_set], Mode for pipe B:
>[   28.657584] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[   28.693214] [drm:i9xx_update_plane], Writing base 00320000 00000000 0 0 5120
>[   28.693234] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   28.693244] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   28.693252] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   28.693259] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   28.693306] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   28.693312] [drm:intel_calculate_wm], FIFO watermark level: 8
>[   28.693317] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 8
>[   28.693323] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 8, C: 2, SR 1
>[   28.693329] [drm:i9xx_update_wm], memory self refresh disabled
>[   28.693337] [drm:intel_set_mode], [ENCODER:10:TV-10] set [MODE:0:NTSC 480i]
>[   28.718196] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   28.718207] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   28.718212] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   28.718217] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   28.718223] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   28.718228] [drm:intel_calculate_wm], FIFO watermark level: 8
>[   28.718233] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 8
>[   28.718239] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 8, C: 2, SR 1
>[   28.718245] [drm:i9xx_update_wm], memory self refresh disabled
>[   28.740134] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[   28.740159] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[   28.741807] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   28.744766] [drm:intel_connector_check_state], [CONNECTOR:9:SVIDEO-1]
>[   28.744782] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[   28.744795] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[   28.744808] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[   28.744822] [drm:intel_modeset_check_state], [CRTC:3]
>[   28.744833] [drm:intel_modeset_check_state], [CRTC:4]
>[   28.792083] [drm:intel_tv_detect_type], TV detected: 400c0017, 7f0000aa
>[   28.792099] [drm:intel_tv_detect_type], Unrecognised TV connection
>[   28.816116] [drm:intel_release_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[   28.816134] [drm:intel_set_mode], set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   28.859933] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   28.859945] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   28.859951] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   28.859956] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   28.859963] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   28.859967] [drm:intel_calculate_wm], FIFO watermark level: 8
>[   28.859972] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 8
>[   28.859978] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 8, C: 2, SR 1
>[   28.859984] [drm:i9xx_update_wm], memory self refresh disabled
>[   28.860080] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[   28.860096] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[   28.861765] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   28.864698] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[   28.864710] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[   28.864722] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[   28.864731] [drm:intel_modeset_check_state], [CRTC:3]
>[   28.864743] [drm:intel_modeset_check_state], [CRTC:4]
>[   28.864905] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1] disconnected
>[   28.866807] [drm:drm_mode_getconnector], [CONNECTOR:9:?]
>[   28.866822] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1]
>[   28.866834] [drm:intel_get_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[   28.866844] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection
>[   28.866876] [drm:intel_set_mode], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   28.866894] [drm:intel_modeset_adjusted_mode], [CRTC:4]
>[   28.867755] [drm:i9xx_crtc_mode_set], Mode for pipe B:
>[   28.867765] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[   28.898829] [drm:i9xx_update_plane], Writing base 00320000 00000000 0 0 5120
>[   28.898846] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   28.898853] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   28.898858] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   28.898863] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   28.898869] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   28.898874] [drm:intel_calculate_wm], FIFO watermark level: 8
>[   28.898879] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 8
>[   28.898885] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 8, C: 2, SR 1
>[   28.898891] [drm:i9xx_update_wm], memory self refresh disabled
>[   28.898899] [drm:intel_set_mode], [ENCODER:10:TV-10] set [MODE:0:NTSC 480i]
>[   28.908880] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   28.908893] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   28.908903] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   28.908912] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   28.908921] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   28.908931] [drm:intel_calculate_wm], FIFO watermark level: 8
>[   28.908939] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 8
>[   28.908947] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 8, C: 2, SR 1
>[   28.908959] [drm:i9xx_update_wm], memory self refresh disabled
>[   28.932207] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[   28.932229] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[   28.933862] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   28.936752] [drm:intel_connector_check_state], [CONNECTOR:9:SVIDEO-1]
>[   28.936766] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[   28.936776] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[   28.936786] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[   28.936798] [drm:intel_modeset_check_state], [CRTC:3]
>[   28.936806] [drm:intel_modeset_check_state], [CRTC:4]
>[   28.968117] [drm:intel_tv_detect_type], TV detected: 400c0017, 7f0000aa
>[   28.968138] [drm:intel_tv_detect_type], Unrecognised TV connection
>[   28.984090] [drm:intel_release_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[   28.984107] [drm:intel_set_mode], set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   29.024941] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   29.024958] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   29.024965] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   29.024972] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   29.024981] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   29.024988] [drm:intel_calculate_wm], FIFO watermark level: 8
>[   29.024995] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 8
>[   29.025003] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 8, C: 2, SR 1
>[   29.025012] [drm:i9xx_update_wm], memory self refresh disabled
>[   29.025077] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[   29.025091] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[   29.026779] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   29.037046] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[   29.037058] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[   29.037068] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[   29.037075] [drm:intel_modeset_check_state], [CRTC:3]
>[   29.037083] [drm:intel_modeset_check_state], [CRTC:4]
>[   29.037237] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1] disconnected
>[   29.039379] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[   29.039396] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:VGA-1]
>[   29.052068] [drm:intel_crt_detect], CRT detected via hotplug
>[   29.060099] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1)
>[   29.060118] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[   29.060126] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   29.060610] i2c i2c-2: sendbytes: NAK bailout.
>[   29.061134] i2c i2c-2: sendbytes: NAK bailout.
>[   29.061654] i2c i2c-2: sendbytes: NAK bailout.
>[   29.062168] i2c i2c-2: sendbytes: NAK bailout.
>[   29.062682] i2c i2c-2: sendbytes: NAK bailout.
>[   29.062801] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:VGA-1] probed modes :
>[   29.062814] [drm:drm_mode_debug_printmodeline], Modeline 28:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   29.062830] [drm:drm_mode_debug_printmodeline], Modeline 26:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   29.062845] [drm:drm_mode_debug_printmodeline], Modeline 25:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[   29.062859] [drm:drm_mode_debug_printmodeline], Modeline 27:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[   29.062872] [drm:drm_mode_debug_printmodeline], Modeline 24:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[   29.062909] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[   29.098253] [drm:drm_mode_getconnector], [CONNECTOR:8:?]
>[   29.098266] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1]
>[   29.098275] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[   29.099895] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   29.102818] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[   29.102826] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1] disconnected
>[   29.102839] [drm:drm_mode_getconnector], [CONNECTOR:8:?]
>[   29.102845] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1]
>[   29.102851] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[   29.104504] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   29.107384] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[   29.107397] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1] disconnected
>[   29.107527] [drm:drm_mode_getconnector], [CONNECTOR:9:?]
>[   29.107544] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1]
>[   29.107559] [drm:intel_get_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[   29.107575] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection
>[   29.107611] [drm:intel_set_mode], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   29.107630] [drm:intel_modeset_adjusted_mode], [CRTC:4]
>[   29.108528] [drm:i9xx_crtc_mode_set], Mode for pipe B:
>[   29.108542] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[   29.143000] [drm:i9xx_update_plane], Writing base 00320000 00000000 0 0 5120
>[   29.143021] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   29.143029] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   29.143036] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   29.143043] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   29.143052] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   29.143059] [drm:intel_calculate_wm], FIFO watermark level: 8
>[   29.143065] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 8
>[   29.143073] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 8, C: 2, SR 1
>[   29.143082] [drm:i9xx_update_wm], memory self refresh disabled
>[   29.143093] [drm:intel_set_mode], [ENCODER:10:TV-10] set [MODE:0:NTSC 480i]
>[   29.153077] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   29.153092] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   29.153099] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   29.153105] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   29.153113] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   29.153119] [drm:intel_calculate_wm], FIFO watermark level: 8
>[   29.153125] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 8
>[   29.153133] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 8, C: 2, SR 1
>[   29.153140] [drm:i9xx_update_wm], memory self refresh disabled
>[   29.176137] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[   29.176160] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[   29.177807] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   29.180671] [drm:intel_connector_check_state], [CONNECTOR:9:SVIDEO-1]
>[   29.180685] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[   29.180699] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[   29.180711] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[   29.180723] [drm:intel_modeset_check_state], [CRTC:3]
>[   29.180737] [drm:intel_modeset_check_state], [CRTC:4]
>[   29.220094] [drm:intel_tv_detect_type], TV detected: 400c0017, 7f0000aa
>[   29.220119] [drm:intel_tv_detect_type], Unrecognised TV connection
>[   29.252144] [drm:intel_release_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[   29.252173] [drm:intel_set_mode], set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   29.290968] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   29.290987] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   29.290998] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   29.291008] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   29.291021] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   29.291030] [drm:intel_calculate_wm], FIFO watermark level: 8
>[   29.291040] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 8
>[   29.291051] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 8, C: 2, SR 1
>[   29.291063] [drm:i9xx_update_wm], memory self refresh disabled
>[   29.291130] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[   29.291150] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[   29.292908] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   29.296036] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[   29.296058] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[   29.296083] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[   29.296105] [drm:intel_modeset_check_state], [CRTC:3]
>[   29.296126] [drm:intel_modeset_check_state], [CRTC:4]
>[   29.296415] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1] disconnected
>[   29.300809] [drm:drm_mode_getconnector], [CONNECTOR:9:?]
>[   29.304049] [drm:intel_crt_detect], CRT detected via hotplug
>[   29.304060] [drm:output_poll_execute], [CONNECTOR:5:VGA-1] status updated from 1 to 1
>[   29.304073] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[   29.305703] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   29.308548] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[   29.308561] [drm:output_poll_execute], [CONNECTOR:8:DVI-D-1] status updated from 2 to 2
>[   29.308573] [drm:output_poll_execute], [CONNECTOR:9:SVIDEO-1] status updated from 2 to 2
>[   29.308609] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1]
>[   29.308621] [drm:intel_get_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[   29.308629] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection
>[   29.308656] [drm:intel_set_mode], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   29.308667] [drm:intel_modeset_adjusted_mode], [CRTC:4]
>[   29.309388] [drm:i9xx_crtc_mode_set], Mode for pipe B:
>[   29.309394] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[   29.342601] [drm:i9xx_update_plane], Writing base 00320000 00000000 0 0 5120
>[   29.342618] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   29.342625] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   29.342630] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   29.342635] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   29.342641] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   29.342646] [drm:intel_calculate_wm], FIFO watermark level: 8
>[   29.342651] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 8
>[   29.342657] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 8, C: 2, SR 1
>[   29.342663] [drm:i9xx_update_wm], memory self refresh disabled
>[   29.342670] [drm:intel_set_mode], [ENCODER:10:TV-10] set [MODE:0:NTSC 480i]
>[   29.352650] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   29.352667] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   29.352683] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   29.352695] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   29.352712] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   29.352723] [drm:intel_calculate_wm], FIFO watermark level: 8
>[   29.352734] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 8
>[   29.352750] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 8, C: 2, SR 1
>[   29.352765] [drm:i9xx_update_wm], memory self refresh disabled
>[   29.376149] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[   29.376170] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[   29.377820] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   29.380685] [drm:intel_connector_check_state], [CONNECTOR:9:SVIDEO-1]
>[   29.380697] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[   29.380707] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[   29.380717] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[   29.380729] [drm:intel_modeset_check_state], [CRTC:3]
>[   29.380737] [drm:intel_modeset_check_state], [CRTC:4]
>[   29.412085] [drm:intel_tv_detect_type], TV detected: 400c0017, 7f0000aa
>[   29.412107] [drm:intel_tv_detect_type], Unrecognised TV connection
>[   29.436090] [drm:intel_release_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[   29.436116] [drm:intel_set_mode], set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   29.479927] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   29.479945] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   29.479955] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   29.479966] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   29.479978] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   29.479988] [drm:intel_calculate_wm], FIFO watermark level: 8
>[   29.479998] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 8
>[   29.480051] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 8, C: 2, SR 1
>[   29.480074] [drm:i9xx_update_wm], memory self refresh disabled
>[   29.480181] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[   29.480210] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[   29.481982] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   29.485037] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[   29.485064] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[   29.485084] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[   29.485108] [drm:intel_modeset_check_state], [CRTC:3]
>[   29.485125] [drm:intel_modeset_check_state], [CRTC:4]
>[   29.485408] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1] disconnected
>[   29.531611] [drm:drm_mode_addfb], [FB:31]
>[   29.531865] [drm:drm_mode_setcrtc], [CRTC:3]
>[   29.531878] [drm:drm_mode_setcrtc], [CONNECTOR:5:VGA-1]
>[   29.531884] [drm:intel_crtc_set_config], [CRTC:3] [FB:31] #connectors=1 (x y) (0 0)
>[   29.531894] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[   29.531899] [drm:drm_mode_debug_printmodeline], Modeline 29:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   29.531909] [drm:drm_mode_debug_printmodeline], Modeline 32:"576i100 16:9" 0 39375 1024 1053 1146 1260 576 581 586 625 0x0 0x1a
>[   29.531920] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:VGA-1] to [CRTC:3]
>[   29.531926] [drm:intel_crtc_set_config], attempting to set mode from userspace
>[   29.531931] [drm:drm_mode_debug_printmodeline], Modeline 32:"576i100 16:9" 0 39375 1024 1053 1146 1260 576 581 586 625 0x0 0x1a
>[   29.531941] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   29.531950] [drm:intel_modeset_adjusted_mode], [CRTC:3]
>[   29.560861] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   29.560871] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   29.560878] [drm:intel_calculate_wm], FIFO entries required for mode: 21
>[   29.560883] [drm:intel_calculate_wm], FIFO watermark level: 8
>[   29.560888] [drm:i9xx_update_wm], FIFO watermarks - A: 26, B: 8
>[   29.560894] [drm:i9xx_update_wm], self-refresh entries: 64
>[   29.560899] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 26, B: 8, C: 2, SR 63
>[   29.560905] [drm:i9xx_update_wm], memory self refresh enabled
>[   29.561628] [drm:i9xx_crtc_mode_set], Mode for pipe A:
>[   29.561633] [drm:drm_mode_debug_printmodeline], Modeline 32:"576i100 16:9" 0 39375 1024 1053 1146 1260 576 581 586 625 0x0 0x1a
>[   29.581421] [drm:i9xx_update_plane], Writing base 00400000 00000000 0 0 4096
>[   29.588105] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   29.588129] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   29.588147] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[   29.588161] [drm:intel_calculate_wm], FIFO watermark level: 16
>[   29.588172] [drm:i9xx_update_wm], FIFO watermarks - A: 26, B: 16
>[   29.588183] [drm:i9xx_update_wm], self-refresh entries: 64
>[   29.588193] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 26, B: 16, C: 2, SR 63
>[   29.588206] [drm:i9xx_update_wm], memory self refresh enabled
>[   29.588219] [drm:intel_set_mode], [ENCODER:6:DAC-6] set [MODE:32:576i100 16:9]
>[   29.588244] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   29.588264] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   29.588274] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[   29.588282] [drm:intel_calculate_wm], FIFO watermark level: 16
>[   29.588289] [drm:i9xx_update_wm], FIFO watermarks - A: 26, B: 16
>[   29.588297] [drm:i9xx_update_wm], self-refresh entries: 64
>[   29.588304] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 26, B: 16, C: 2, SR 63
>[   29.588313] [drm:i9xx_update_wm], memory self refresh enabled
>[   29.596267] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[   29.596288] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[   29.597941] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   29.600874] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[   29.600893] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[   29.600911] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[   29.600931] [drm:intel_modeset_check_state], [CRTC:3]
>[   29.600947] [drm:intel_modeset_check_state], [CRTC:4]
>[   40.336061] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[   40.336080] [drm:intel_crt_detect], CRT detected via hotplug
>[   40.336100] [drm:output_poll_execute], [CONNECTOR:5:VGA-1] status updated from 1 to 1
>[   40.336117] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[   40.337846] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   40.340831] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[   40.340862] [drm:output_poll_execute], [CONNECTOR:8:DVI-D-1] status updated from 2 to 2
>[   40.340892] [drm:output_poll_execute], [CONNECTOR:9:SVIDEO-1] status updated from 2 to 2
>[   51.376058] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[   51.376075] [drm:intel_crt_detect], CRT detected via hotplug
>[   51.376094] [drm:output_poll_execute], [CONNECTOR:5:VGA-1] status updated from 1 to 1
>[   51.376112] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[   51.377845] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   51.380774] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[   51.380790] [drm:output_poll_execute], [CONNECTOR:8:DVI-D-1] status updated from 2 to 2
>[   51.380805] [drm:output_poll_execute], [CONNECTOR:9:SVIDEO-1] status updated from 2 to 2
>[   51.536727] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[   51.538353] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   51.541234] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[   51.541384] [drm:intel_get_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[   51.541396] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection
>[   51.541427] [drm:intel_set_mode], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   51.541441] [drm:intel_modeset_adjusted_mode], [CRTC:4]
>[   51.542164] [drm:i9xx_crtc_mode_set], Mode for pipe B:
>[   51.542169] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[   51.580341] [drm:i9xx_update_plane], Writing base 01DB0000 00000000 0 0 5120
>[   51.580368] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   51.580381] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   51.580391] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   51.580401] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   51.580414] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[   51.580423] [drm:intel_calculate_wm], FIFO watermark level: 16
>[   51.580433] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[   51.580444] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[   51.580456] [drm:i9xx_update_wm], memory self refresh disabled
>[   51.580470] [drm:intel_set_mode], [ENCODER:10:TV-10] set [MODE:0:NTSC 480i]
>[   51.600374] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   51.600388] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   51.600396] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   51.600404] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   51.600416] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[   51.600424] [drm:intel_calculate_wm], FIFO watermark level: 16
>[   51.600431] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[   51.600443] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[   51.600452] [drm:i9xx_update_wm], memory self refresh disabled
>[   51.624137] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[   51.624158] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[   51.625807] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   51.628661] [drm:intel_connector_check_state], [CONNECTOR:9:SVIDEO-1]
>[   51.628672] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[   51.628682] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[   51.628694] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[   51.628704] [drm:intel_modeset_check_state], [CRTC:3]
>[   51.628715] [drm:intel_modeset_check_state], [CRTC:4]
>[   51.660069] [drm:intel_tv_detect_type], TV detected: 400c0017, 7f0000aa
>[   51.660092] [drm:intel_tv_detect_type], Unrecognised TV connection
>[   51.676072] [drm:intel_release_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[   51.676090] [drm:intel_set_mode], set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   51.716895] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   51.716913] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   51.716924] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   51.716934] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   51.716946] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[   51.716956] [drm:intel_calculate_wm], FIFO watermark level: 16
>[   51.716965] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[   51.716976] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[   51.716989] [drm:i9xx_update_wm], memory self refresh disabled
>[   51.717050] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[   51.717071] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[   51.718755] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   51.721838] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[   51.721866] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[   51.721891] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[   51.721913] [drm:intel_modeset_check_state], [CRTC:3]
>[   51.721934] [drm:intel_modeset_check_state], [CRTC:4]
>[   52.732073] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[   52.732090] [drm:intel_crt_detect], CRT detected via hotplug
>[   56.692705] Bluetooth: HIDP (Human Interface Emulation) ver 1.2
>[   56.692736] Bluetooth: HIDP socket layer initialized
>[   58.394539] [drm:i915_driver_open], 
>[   58.467017] [drm:i915_driver_open], 
>[   58.650577] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[   58.650592] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:VGA-1]
>[   59.656084] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[   59.656108] [drm:intel_crt_detect], CRT detected via hotplug
>[   59.664074] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1)
>[   59.664116] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[   59.664128] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   59.664615] i2c i2c-2: sendbytes: NAK bailout.
>[   59.665124] i2c i2c-2: sendbytes: NAK bailout.
>[   59.665629] i2c i2c-2: sendbytes: NAK bailout.
>[   59.666133] i2c i2c-2: sendbytes: NAK bailout.
>[   59.666638] i2c i2c-2: sendbytes: NAK bailout.
>[   59.666729] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:VGA-1] probed modes :
>[   59.666742] [drm:drm_mode_debug_printmodeline], Modeline 28:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   59.666762] [drm:drm_mode_debug_printmodeline], Modeline 26:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   59.666781] [drm:drm_mode_debug_printmodeline], Modeline 25:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[   59.666800] [drm:drm_mode_debug_printmodeline], Modeline 27:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[   59.666818] [drm:drm_mode_debug_printmodeline], Modeline 24:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[   59.666890] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[   59.667041] [drm:drm_mode_getconnector], [CONNECTOR:8:?]
>[   59.667057] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1]
>[   59.667072] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[   59.668844] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   59.671905] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[   59.671932] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1] disconnected
>[   59.672097] [drm:drm_mode_getconnector], [CONNECTOR:8:?]
>[   59.672118] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1]
>[   59.672136] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[   59.673881] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   59.676978] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[   59.677001] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1] disconnected
>[   59.677089] [drm:drm_mode_getconnector], [CONNECTOR:9:?]
>[   59.677110] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1]
>[   59.677131] [drm:intel_get_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[   59.677150] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection
>[   59.677203] [drm:intel_set_mode], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   59.677237] [drm:intel_modeset_adjusted_mode], [CRTC:4]
>[   59.678666] [drm:i9xx_crtc_mode_set], Mode for pipe B:
>[   59.678683] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[   59.748504] [drm:i9xx_update_plane], Writing base 02090000 00000000 0 0 5120
>[   59.748530] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   59.748544] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   59.748553] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   59.748564] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   59.748576] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[   59.748585] [drm:intel_calculate_wm], FIFO watermark level: 16
>[   59.748595] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[   59.748606] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[   59.748618] [drm:i9xx_update_wm], memory self refresh disabled
>[   59.748632] [drm:intel_set_mode], [ENCODER:10:TV-10] set [MODE:0:NTSC 480i]
>[   59.758622] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   59.758644] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   59.758659] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   59.758681] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   59.758699] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[   59.758720] [drm:intel_calculate_wm], FIFO watermark level: 16
>[   59.758734] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[   59.758751] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[   59.758775] [drm:i9xx_update_wm], memory self refresh disabled
>[   59.780146] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[   59.780168] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[   59.781813] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   59.784698] [drm:intel_connector_check_state], [CONNECTOR:9:SVIDEO-1]
>[   59.784708] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[   59.784721] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[   59.784731] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[   59.784743] [drm:intel_modeset_check_state], [CRTC:3]
>[   59.784751] [drm:intel_modeset_check_state], [CRTC:4]
>[   59.864076] [drm:intel_tv_detect_type], TV detected: 400c0017, 7f0000aa
>[   59.864101] [drm:intel_tv_detect_type], Unrecognised TV connection
>[   59.880084] [drm:intel_release_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[   59.880110] [drm:intel_set_mode], set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   59.923925] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   59.923944] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   59.923954] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   59.923965] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   59.923977] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[   59.923987] [drm:intel_calculate_wm], FIFO watermark level: 16
>[   59.923996] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[   59.924050] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[   59.924075] [drm:i9xx_update_wm], memory self refresh disabled
>[   59.924210] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[   59.924245] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[   59.926018] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   59.929116] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[   59.929143] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[   59.929163] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[   59.929186] [drm:intel_modeset_check_state], [CRTC:3]
>[   59.929202] [drm:intel_modeset_check_state], [CRTC:4]
>[   59.929487] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1] disconnected
>[   59.933405] [drm:drm_mode_getconnector], [CONNECTOR:9:?]
>[   59.933430] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1]
>[   59.933458] [drm:intel_get_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[   59.933479] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection
>[   59.933537] [drm:intel_set_mode], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   59.933579] [drm:intel_modeset_adjusted_mode], [CRTC:4]
>[   59.935048] [drm:i9xx_crtc_mode_set], Mode for pipe B:
>[   59.935066] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[   59.988318] [drm:i9xx_update_plane], Writing base 02090000 00000000 0 0 5120
>[   59.988344] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   59.988357] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   59.988367] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   59.988378] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   59.988390] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[   59.988399] [drm:intel_calculate_wm], FIFO watermark level: 16
>[   59.988409] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[   59.988420] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[   59.988432] [drm:i9xx_update_wm], memory self refresh disabled
>[   59.988446] [drm:intel_set_mode], [ENCODER:10:TV-10] set [MODE:0:NTSC 480i]
>[   60.013319] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   60.013333] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   60.013341] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   60.013352] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   60.013361] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[   60.013369] [drm:intel_calculate_wm], FIFO watermark level: 16
>[   60.013379] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[   60.013388] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[   60.013397] [drm:i9xx_update_wm], memory self refresh disabled
>[   60.052147] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[   60.052168] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[   60.053856] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   60.056887] [drm:intel_connector_check_state], [CONNECTOR:9:SVIDEO-1]
>[   60.056912] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[   60.056932] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[   60.056953] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[   60.056970] [drm:intel_modeset_check_state], [CRTC:3]
>[   60.056987] [drm:intel_modeset_check_state], [CRTC:4]
>[   60.088075] [drm:intel_tv_detect_type], TV detected: 400c0017, 7f0000aa
>[   60.088099] [drm:intel_tv_detect_type], Unrecognised TV connection
>[   60.120080] [drm:intel_release_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[   60.120106] [drm:intel_set_mode], set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   60.158967] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   60.158987] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   60.158998] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   60.159009] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   60.159021] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[   60.159031] [drm:intel_calculate_wm], FIFO watermark level: 16
>[   60.159041] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[   60.159052] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[   60.159064] [drm:i9xx_update_wm], memory self refresh disabled
>[   60.159115] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[   60.159133] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[   60.160905] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   60.163946] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[   60.163967] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[   60.163992] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[   60.164057] [drm:intel_modeset_check_state], [CRTC:3]
>[   60.164073] [drm:intel_modeset_check_state], [CRTC:4]
>[   60.164407] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1] disconnected
>[   62.106920] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[   62.416061] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[   62.416079] [drm:intel_crt_detect], CRT detected via hotplug
>[   62.416098] [drm:output_poll_execute], [CONNECTOR:5:VGA-1] status updated from 1 to 1
>[   62.416117] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[   62.417805] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   62.420782] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[   62.420813] [drm:output_poll_execute], [CONNECTOR:8:DVI-D-1] status updated from 2 to 2
>[   62.420843] [drm:output_poll_execute], [CONNECTOR:9:SVIDEO-1] status updated from 2 to 2
>[   62.420903] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:VGA-1]
>[   63.428070] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[   63.428094] [drm:intel_crt_detect], CRT detected via hotplug
>[   63.436064] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1)
>[   63.436085] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[   63.436097] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[   63.436585] i2c i2c-2: sendbytes: NAK bailout.
>[   63.437094] i2c i2c-2: sendbytes: NAK bailout.
>[   63.437599] i2c i2c-2: sendbytes: NAK bailout.
>[   63.438104] i2c i2c-2: sendbytes: NAK bailout.
>[   63.438608] i2c i2c-2: sendbytes: NAK bailout.
>[   63.438700] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:VGA-1] probed modes :
>[   63.438714] [drm:drm_mode_debug_printmodeline], Modeline 28:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   63.438734] [drm:drm_mode_debug_printmodeline], Modeline 26:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   63.438753] [drm:drm_mode_debug_printmodeline], Modeline 25:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[   63.438772] [drm:drm_mode_debug_printmodeline], Modeline 27:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[   63.438790] [drm:drm_mode_debug_printmodeline], Modeline 24:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[   63.438867] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[   63.439015] [drm:drm_mode_getconnector], [CONNECTOR:8:?]
>[   63.439031] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1]
>[   63.439046] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[   63.440818] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   63.443773] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[   63.443788] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1] disconnected
>[   63.443807] [drm:drm_mode_getconnector], [CONNECTOR:8:?]
>[   63.443819] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1]
>[   63.443834] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[   63.445514] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   63.448422] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[   63.448436] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1] disconnected
>[   63.448492] [drm:drm_mode_getconnector], [CONNECTOR:9:?]
>[   63.448503] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1]
>[   63.448515] [drm:intel_get_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[   63.448525] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection
>[   63.448558] [drm:intel_set_mode], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   63.448577] [drm:intel_modeset_adjusted_mode], [CRTC:4]
>[   63.449428] [drm:i9xx_crtc_mode_set], Mode for pipe B:
>[   63.449438] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[   63.520340] [drm:i9xx_update_plane], Writing base 03000000 00000000 0 0 5120
>[   63.520366] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   63.520379] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   63.520389] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   63.520400] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   63.520412] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[   63.520422] [drm:intel_calculate_wm], FIFO watermark level: 16
>[   63.520431] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[   63.520442] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[   63.520454] [drm:i9xx_update_wm], memory self refresh disabled
>[   63.520468] [drm:intel_set_mode], [ENCODER:10:TV-10] set [MODE:0:NTSC 480i]
>[   63.545331] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   63.545340] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   63.545346] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   63.545351] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   63.545357] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[   63.545362] [drm:intel_calculate_wm], FIFO watermark level: 16
>[   63.545367] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[   63.545372] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[   63.545378] [drm:i9xx_update_wm], memory self refresh disabled
>[   63.584130] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[   63.584150] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[   63.585854] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   63.588851] [drm:intel_connector_check_state], [CONNECTOR:9:SVIDEO-1]
>[   63.588877] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[   63.588906] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[   63.588931] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[   63.588953] [drm:intel_modeset_check_state], [CRTC:3]
>[   63.588974] [drm:intel_modeset_check_state], [CRTC:4]
>[   63.644078] [drm:intel_tv_detect_type], TV detected: 400c0017, 7f0000aa
>[   63.644100] [drm:intel_tv_detect_type], Unrecognised TV connection
>[   63.660084] [drm:intel_release_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[   63.660108] [drm:intel_set_mode], set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   63.700878] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   63.700887] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   63.700892] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   63.700898] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   63.700904] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[   63.700909] [drm:intel_calculate_wm], FIFO watermark level: 16
>[   63.700914] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[   63.700919] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[   63.700926] [drm:i9xx_update_wm], memory self refresh disabled
>[   63.700976] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[   63.700991] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[   63.702624] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   63.705635] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[   63.705661] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[   63.705684] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[   63.705711] [drm:intel_modeset_check_state], [CRTC:3]
>[   63.705733] [drm:intel_modeset_check_state], [CRTC:4]
>[   63.706028] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1] disconnected
>[   63.709874] [drm:drm_mode_getconnector], [CONNECTOR:9:?]
>[   63.709905] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1]
>[   63.709932] [drm:intel_get_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[   63.709962] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection
>[   63.710018] [drm:intel_set_mode], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   63.710062] [drm:intel_modeset_adjusted_mode], [CRTC:4]
>[   63.711501] [drm:i9xx_crtc_mode_set], Mode for pipe B:
>[   63.711523] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[   63.742044] [drm:i9xx_update_plane], Writing base 03000000 00000000 0 0 5120
>[   63.742060] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   63.742067] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   63.742072] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   63.742078] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   63.742084] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[   63.742089] [drm:intel_calculate_wm], FIFO watermark level: 16
>[   63.742094] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[   63.742100] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[   63.742106] [drm:i9xx_update_wm], memory self refresh disabled
>[   63.742114] [drm:intel_set_mode], [ENCODER:10:TV-10] set [MODE:0:NTSC 480i]
>[   63.752090] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   63.752102] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   63.752108] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   63.752114] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   63.752120] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[   63.752125] [drm:intel_calculate_wm], FIFO watermark level: 16
>[   63.752130] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[   63.752135] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[   63.752141] [drm:i9xx_update_wm], memory self refresh disabled
>[   63.776146] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[   63.776167] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[   63.777876] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   63.780873] [drm:intel_connector_check_state], [CONNECTOR:9:SVIDEO-1]
>[   63.780898] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[   63.780928] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[   63.780952] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[   63.780975] [drm:intel_modeset_check_state], [CRTC:3]
>[   63.780996] [drm:intel_modeset_check_state], [CRTC:4]
>[   63.812079] [drm:intel_tv_detect_type], TV detected: 400c0017, 7f0000aa
>[   63.812100] [drm:intel_tv_detect_type], Unrecognised TV connection
>[   63.828096] [drm:intel_release_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[   63.828124] [drm:intel_set_mode], set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   63.868879] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[   63.868889] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[   63.868894] [drm:intel_calculate_wm], FIFO watermark level: -8
>[   63.868900] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[   63.868906] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[   63.868911] [drm:intel_calculate_wm], FIFO watermark level: 16
>[   63.868916] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[   63.868921] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[   63.868927] [drm:i9xx_update_wm], memory self refresh disabled
>[   63.868977] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[   63.868992] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[   63.870627] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   63.873631] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[   63.873656] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[   63.873680] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[   63.873707] [drm:intel_modeset_check_state], [CRTC:3]
>[   63.873728] [drm:intel_modeset_check_state], [CRTC:4]
>[   63.874023] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1] disconnected
>[   63.954801] [drm:drm_mode_addfb], [FB:32]
>[   71.587425] [drm:drm_mode_addfb], [FB:31]
>[   73.456057] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[   73.456075] [drm:intel_crt_detect], CRT detected via hotplug
>[   73.456094] [drm:output_poll_execute], [CONNECTOR:5:VGA-1] status updated from 1 to 1
>[   73.456113] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[   73.457801] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   73.460794] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[   73.460825] [drm:output_poll_execute], [CONNECTOR:8:DVI-D-1] status updated from 2 to 2
>[   73.460855] [drm:output_poll_execute], [CONNECTOR:9:SVIDEO-1] status updated from 2 to 2
>[   73.486168] [drm:drm_mode_addfb], [FB:32]
>[   73.527842] [drm:drm_mode_addfb], [FB:31]
>[   73.531794] [drm:drm_mode_addfb], [FB:32]
>[   73.551428] [drm:drm_mode_addfb], [FB:31]
>[   73.570598] [drm:drm_mode_addfb], [FB:32]
>[   73.590013] [drm:drm_mode_addfb], [FB:31]
>[   73.609960] [drm:drm_mode_addfb], [FB:32]
>[   73.630015] [drm:drm_mode_addfb], [FB:31]
>[   73.650016] [drm:drm_mode_addfb], [FB:32]
>[   73.670034] [drm:drm_mode_addfb], [FB:31]
>[   73.681285] [drm:drm_mode_addfb], [FB:32]
>[   73.700084] [drm:drm_mode_addfb], [FB:31]
>[   73.720091] [drm:drm_mode_addfb], [FB:32]
>[   73.740131] [drm:drm_mode_addfb], [FB:31]
>[   73.760095] [drm:drm_mode_addfb], [FB:32]
>[   73.780076] [drm:drm_mode_addfb], [FB:31]
>[   73.792067] [drm:drm_mode_addfb], [FB:32]
>[   73.812692] [drm:drm_mode_addfb], [FB:31]
>[   73.830053] [drm:drm_mode_addfb], [FB:32]
>[   73.869148] [drm:drm_mode_addfb], [FB:31]
>[   73.871646] [drm:drm_mode_addfb], [FB:32]
>[   73.890157] [drm:drm_mode_addfb], [FB:31]
>[   73.910114] [drm:drm_mode_addfb], [FB:32]
>[   73.930079] [drm:drm_mode_addfb], [FB:31]
>[   73.964356] [drm:drm_mode_addfb], [FB:32]
>[   73.973010] [drm:drm_mode_addfb], [FB:31]
>[   73.990954] [drm:drm_mode_addfb], [FB:32]
>[   74.010168] [drm:drm_mode_addfb], [FB:31]
>[   74.030712] [drm:drm_mode_addfb], [FB:32]
>[   74.056190] [drm:drm_mode_addfb], [FB:31]
>[   74.061749] [drm:drm_mode_addfb], [FB:32]
>[   74.080624] [drm:drm_mode_addfb], [FB:31]
>[   74.100295] [drm:drm_mode_addfb], [FB:32]
>[   74.120227] [drm:drm_mode_addfb], [FB:31]
>[   74.140494] [drm:drm_mode_addfb], [FB:32]
>[   74.161367] [drm:drm_mode_addfb], [FB:31]
>[   74.172323] [drm:drm_mode_addfb], [FB:32]
>[   74.191295] [drm:drm_mode_addfb], [FB:31]
>[   74.210926] [drm:drm_mode_addfb], [FB:32]
>[   74.230603] [drm:drm_mode_addfb], [FB:31]
>[   74.252639] [drm:drm_mode_addfb], [FB:32]
>[   74.270278] [drm:drm_mode_addfb], [FB:31]
>[   74.290309] [drm:drm_mode_addfb], [FB:32]
>[   74.310266] [drm:drm_mode_addfb], [FB:31]
>[   74.330296] [drm:drm_mode_addfb], [FB:32]
>[   74.350298] [drm:drm_mode_addfb], [FB:31]
>[   74.370291] [drm:drm_mode_addfb], [FB:32]
>[   74.390336] [drm:drm_mode_addfb], [FB:31]
>[   74.401356] [drm:drm_mode_addfb], [FB:32]
>[   74.426592] [drm:drm_mode_addfb], [FB:31]
>[   74.450312] [drm:drm_mode_addfb], [FB:32]
>[   74.470349] [drm:drm_mode_addfb], [FB:31]
>[   74.480963] [drm:drm_mode_addfb], [FB:32]
>[   74.503069] [drm:drm_mode_addfb], [FB:31]
>[   74.520399] [drm:drm_mode_addfb], [FB:32]
>[   74.540424] [drm:drm_mode_addfb], [FB:31]
>[   74.560398] [drm:drm_mode_addfb], [FB:32]
>[   74.594826] [drm:drm_mode_addfb], [FB:31]
>[   74.602559] [drm:drm_mode_addfb], [FB:32]
>[   74.632059] [drm:drm_mode_addfb], [FB:31]
>[   74.652404] [drm:drm_mode_addfb], [FB:32]
>[   74.660531] [drm:drm_mode_addfb], [FB:31]
>[   74.680443] [drm:drm_mode_addfb], [FB:32]
>[   74.692071] [drm:drm_mode_addfb], [FB:31]
>[   74.710805] [drm:drm_mode_addfb], [FB:32]
>[   74.740668] [drm:drm_mode_addfb], [FB:31]
>[   74.760481] [drm:drm_mode_addfb], [FB:32]
>[   74.781586] [drm:drm_mode_addfb], [FB:31]
>[   74.801355] [drm:drm_mode_addfb], [FB:32]
>[   74.820613] [drm:drm_mode_addfb], [FB:31]
>[   74.845719] [drm:drm_mode_addfb], [FB:32]
>[   74.870495] [drm:drm_mode_addfb], [FB:31]
>[   74.899870] [drm:drm_mode_addfb], [FB:32]
>[   74.930824] [drm:drm_mode_addfb], [FB:31]
>[   74.954415] [drm:drm_mode_addfb], [FB:32]
>[   74.980554] [drm:drm_mode_addfb], [FB:31]
>[   74.993475] [drm:drm_mode_addfb], [FB:32]
>[   75.014577] [drm:drm_mode_addfb], [FB:31]
>[   75.040616] [drm:drm_mode_addfb], [FB:32]
>[   75.052795] [drm:drm_mode_addfb], [FB:31]
>[   75.101009] [drm:drm_mode_addfb], [FB:32]
>[   75.113990] [drm:drm_mode_addfb], [FB:31]
>[   75.130613] [drm:drm_mode_addfb], [FB:32]
>[   75.142372] [drm:drm_mode_addfb], [FB:31]
>[   75.161740] [drm:drm_mode_addfb], [FB:32]
>[   75.180834] [drm:drm_mode_addfb], [FB:31]
>[   75.200665] [drm:drm_mode_addfb], [FB:32]
>[   75.220692] [drm:drm_mode_addfb], [FB:31]
>[   75.240719] [drm:drm_mode_addfb], [FB:32]
>[   75.260718] [drm:drm_mode_addfb], [FB:31]
>[   75.280851] [drm:drm_mode_addfb], [FB:32]
>[   75.300716] [drm:drm_mode_addfb], [FB:31]
>[   75.320742] [drm:drm_mode_addfb], [FB:32]
>[   75.340681] [drm:drm_mode_addfb], [FB:31]
>[   75.360713] [drm:drm_mode_addfb], [FB:32]
>[   75.380706] [drm:drm_mode_addfb], [FB:31]
>[   75.400744] [drm:drm_mode_addfb], [FB:32]
>[   75.420727] [drm:drm_mode_addfb], [FB:31]
>[   75.441377] [drm:drm_mode_addfb], [FB:32]
>[   75.461624] [drm:drm_mode_addfb], [FB:31]
>[   75.480900] [drm:drm_mode_addfb], [FB:32]
>[   75.500793] [drm:drm_mode_addfb], [FB:31]
>[   75.523528] [drm:drm_mode_addfb], [FB:32]
>[   75.544486] [drm:drm_mode_addfb], [FB:31]
>[   75.566610] [drm:drm_mode_addfb], [FB:32]
>[   75.615854] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.615877] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.615892] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.615907] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.615923] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.615939] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.615955] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.615972] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.615987] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.616003] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.616017] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626452] cx88[0]: irq aud [0x1101] dn_risci1* dnf_of dn_sync*
>[   75.626475] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626490] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626505] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626521] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626536] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626552] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626567] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626583] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626599] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626613] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626629] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626646] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626662] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626678] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626694] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626709] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626725] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626741] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626759] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626775] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626790] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626806] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626820] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626835] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626850] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626867] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626884] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626899] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626915] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626930] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626944] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626959] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626975] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.626991] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.627007] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.627024] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.627039] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.627054] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.627071] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.627087] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.627104] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.627121] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.627138] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.627155] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.627173] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.627189] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.627205] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.627221] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.627237] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   75.627249] cx88[0]/1: IRQ loop detected, disabling interrupts
>[   75.631817] cx88[0]: irq aud [0x1001] dn_risci1* dn_sync*
>[   84.496081] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[   84.496100] [drm:intel_crt_detect], CRT detected via hotplug
>[   84.496119] [drm:output_poll_execute], [CONNECTOR:5:VGA-1] status updated from 1 to 1
>[   84.496139] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[   84.497828] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   84.500814] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[   84.500846] [drm:output_poll_execute], [CONNECTOR:8:DVI-D-1] status updated from 2 to 2
>[   84.500877] [drm:output_poll_execute], [CONNECTOR:9:SVIDEO-1] status updated from 2 to 2
>[   95.536066] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[   95.536086] [drm:intel_crt_detect], CRT detected via hotplug
>[   95.536105] [drm:output_poll_execute], [CONNECTOR:5:VGA-1] status updated from 1 to 1
>[   95.536125] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[   95.537912] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[   95.540913] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[   95.540939] [drm:output_poll_execute], [CONNECTOR:8:DVI-D-1] status updated from 2 to 2
>[   95.540969] [drm:output_poll_execute], [CONNECTOR:9:SVIDEO-1] status updated from 2 to 2
>[  100.990847] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[  100.990867] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:VGA-1]
>[  101.996073] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[  101.996098] [drm:intel_crt_detect], CRT detected via hotplug
>[  102.004064] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1)
>[  102.004083] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[  102.004096] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[  102.004583] i2c i2c-2: sendbytes: NAK bailout.
>[  102.005091] i2c i2c-2: sendbytes: NAK bailout.
>[  102.005596] i2c i2c-2: sendbytes: NAK bailout.
>[  102.006100] i2c i2c-2: sendbytes: NAK bailout.
>[  102.006605] i2c i2c-2: sendbytes: NAK bailout.
>[  102.006691] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:VGA-1] probed modes :
>[  102.006704] [drm:drm_mode_debug_printmodeline], Modeline 28:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  102.006725] [drm:drm_mode_debug_printmodeline], Modeline 26:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  102.006743] [drm:drm_mode_debug_printmodeline], Modeline 25:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  102.006762] [drm:drm_mode_debug_printmodeline], Modeline 27:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  102.006780] [drm:drm_mode_debug_printmodeline], Modeline 24:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  102.007528] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[  102.007673] [drm:drm_mode_getconnector], [CONNECTOR:8:?]
>[  102.007690] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1]
>[  102.007705] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  102.009498] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  102.012610] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[  102.012638] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1] disconnected
>[  102.013420] [drm:drm_mode_getconnector], [CONNECTOR:8:?]
>[  102.013443] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1]
>[  102.013464] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  102.015220] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  102.018782] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[  102.018806] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1] disconnected
>[  102.019017] [drm:drm_mode_getconnector], [CONNECTOR:9:?]
>[  102.019039] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1]
>[  102.019067] [drm:intel_get_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[  102.019088] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection
>[  102.019143] [drm:intel_set_mode], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  102.019180] [drm:intel_modeset_adjusted_mode], [CRTC:4]
>[  102.020642] [drm:i9xx_crtc_mode_set], Mode for pipe B:
>[  102.020652] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  102.056629] [drm:i9xx_update_plane], Writing base 02110000 00000000 0 0 5120
>[  102.056646] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  102.056660] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[  102.056667] [drm:intel_calculate_wm], FIFO watermark level: -8
>[  102.056677] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  102.056687] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  102.056694] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  102.056705] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[  102.056713] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[  102.056723] [drm:i9xx_update_wm], memory self refresh disabled
>[  102.056738] [drm:intel_set_mode], [ENCODER:10:TV-10] set [MODE:0:NTSC 480i]
>[  102.081597] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  102.081612] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[  102.081620] [drm:intel_calculate_wm], FIFO watermark level: -8
>[  102.081631] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  102.081640] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  102.081648] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  102.081658] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[  102.081666] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[  102.081679] [drm:i9xx_update_wm], memory self refresh disabled
>[  102.104146] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[  102.104167] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[  102.105834] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  102.108734] [drm:intel_connector_check_state], [CONNECTOR:9:SVIDEO-1]
>[  102.108747] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[  102.108760] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[  102.108772] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[  102.108782] [drm:intel_modeset_check_state], [CRTC:3]
>[  102.108796] [drm:intel_modeset_check_state], [CRTC:4]
>[  102.140079] [drm:intel_tv_detect_type], TV detected: 400c0017, 7f0000aa
>[  102.140101] [drm:intel_tv_detect_type], Unrecognised TV connection
>[  102.172094] [drm:intel_release_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[  102.172123] [drm:intel_set_mode], set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[  102.212901] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  102.212919] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[  102.212930] [drm:intel_calculate_wm], FIFO watermark level: -8
>[  102.212941] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  102.212953] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  102.212963] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  102.212973] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[  102.212984] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[  102.212996] [drm:i9xx_update_wm], memory self refresh disabled
>[  102.213061] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[  102.213082] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[  102.214768] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  102.217840] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[  102.217866] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[  102.217896] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[  102.217918] [drm:intel_modeset_check_state], [CRTC:3]
>[  102.217940] [drm:intel_modeset_check_state], [CRTC:4]
>[  102.218320] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1] disconnected
>[  102.223694] [drm:drm_mode_getconnector], [CONNECTOR:9:?]
>[  102.223728] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1]
>[  102.223759] [drm:intel_get_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[  102.223784] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection
>[  102.223865] [drm:intel_set_mode], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  102.223903] [drm:intel_modeset_adjusted_mode], [CRTC:4]
>[  102.225387] [drm:i9xx_crtc_mode_set], Mode for pipe B:
>[  102.225407] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  102.259069] [drm:i9xx_update_plane], Writing base 02110000 00000000 0 0 5120
>[  102.259090] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  102.259100] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[  102.259108] [drm:intel_calculate_wm], FIFO watermark level: -8
>[  102.259115] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  102.259125] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  102.259132] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  102.259139] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[  102.259148] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[  102.259157] [drm:i9xx_update_wm], memory self refresh disabled
>[  102.259167] [drm:intel_set_mode], [ENCODER:10:TV-10] set [MODE:0:NTSC 480i]
>[  102.269146] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  102.269167] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[  102.269179] [drm:intel_calculate_wm], FIFO watermark level: -8
>[  102.269191] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  102.269209] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  102.269221] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  102.269231] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[  102.269248] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[  102.269262] [drm:i9xx_update_wm], memory self refresh disabled
>[  102.292120] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[  102.292140] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[  102.293784] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  102.296644] [drm:intel_connector_check_state], [CONNECTOR:9:SVIDEO-1]
>[  102.296657] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[  102.296673] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[  102.296686] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[  102.296697] [drm:intel_modeset_check_state], [CRTC:3]
>[  102.296711] [drm:intel_modeset_check_state], [CRTC:4]
>[  102.328110] [drm:intel_tv_detect_type], TV detected: 400c0017, 7f0000aa
>[  102.328132] [drm:intel_tv_detect_type], Unrecognised TV connection
>[  102.360083] [drm:intel_release_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[  102.360109] [drm:intel_set_mode], set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[  102.398974] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  102.398992] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[  102.399003] [drm:intel_calculate_wm], FIFO watermark level: -8
>[  102.399013] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  102.399026] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  102.399035] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  102.399045] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[  102.399056] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[  102.399069] [drm:i9xx_update_wm], memory self refresh disabled
>[  102.399119] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[  102.399135] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[  102.400911] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  102.403954] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[  102.403980] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[  102.404043] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[  102.404061] [drm:intel_modeset_check_state], [CRTC:3]
>[  102.404077] [drm:intel_modeset_check_state], [CRTC:4]
>[  102.404416] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1] disconnected
>[  103.092164] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[  103.092179] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:VGA-1]
>[  104.100078] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[  104.100102] [drm:intel_crt_detect], CRT detected via hotplug
>[  104.108103] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1)
>[  104.108127] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[  104.108145] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[  104.108633] i2c i2c-2: sendbytes: NAK bailout.
>[  104.109121] i2c i2c-2: sendbytes: NAK bailout.
>[  104.109605] i2c i2c-2: sendbytes: NAK bailout.
>[  104.110089] i2c i2c-2: sendbytes: NAK bailout.
>[  104.110573] i2c i2c-2: sendbytes: NAK bailout.
>[  104.110638] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:VGA-1] probed modes :
>[  104.110645] [drm:drm_mode_debug_printmodeline], Modeline 28:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  104.110655] [drm:drm_mode_debug_printmodeline], Modeline 26:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  104.110665] [drm:drm_mode_debug_printmodeline], Modeline 25:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  104.110674] [drm:drm_mode_debug_printmodeline], Modeline 27:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  104.110684] [drm:drm_mode_debug_printmodeline], Modeline 24:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  104.111180] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[  104.111262] [drm:drm_mode_getconnector], [CONNECTOR:8:?]
>[  104.111271] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1]
>[  104.111280] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  104.112963] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  104.115859] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[  104.115874] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1] disconnected
>[  104.115915] [drm:drm_mode_getconnector], [CONNECTOR:8:?]
>[  104.115929] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1]
>[  104.115940] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  104.117629] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  104.120551] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[  104.120566] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1] disconnected
>[  104.120625] [drm:drm_mode_getconnector], [CONNECTOR:9:?]
>[  104.120637] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1]
>[  104.120652] [drm:intel_get_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[  104.120663] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection
>[  104.120699] [drm:intel_set_mode], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  104.120716] [drm:intel_modeset_adjusted_mode], [CRTC:4]
>[  104.121587] [drm:i9xx_crtc_mode_set], Mode for pipe B:
>[  104.121595] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  104.208440] [drm:i9xx_update_plane], Writing base 01000000 00000000 0 0 5120
>[  104.208502] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  104.208522] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[  104.208535] [drm:intel_calculate_wm], FIFO watermark level: -8
>[  104.208546] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  104.208558] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  104.208568] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  104.208578] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[  104.208589] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[  104.208601] [drm:i9xx_update_wm], memory self refresh disabled
>[  104.208615] [drm:intel_set_mode], [ENCODER:10:TV-10] set [MODE:0:NTSC 480i]
>[  104.218605] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  104.218632] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[  104.218649] [drm:intel_calculate_wm], FIFO watermark level: -8
>[  104.218665] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  104.218688] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  104.218703] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  104.218718] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[  104.218740] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[  104.218759] [drm:i9xx_update_wm], memory self refresh disabled
>[  104.240144] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[  104.240166] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[  104.241895] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  104.244910] [drm:intel_connector_check_state], [CONNECTOR:9:SVIDEO-1]
>[  104.244937] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[  104.244962] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[  104.244992] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[  104.245015] [drm:intel_modeset_check_state], [CRTC:3]
>[  104.245037] [drm:intel_modeset_check_state], [CRTC:4]
>[  104.276075] [drm:intel_tv_detect_type], TV detected: 400c0017, 7f0000aa
>[  104.276097] [drm:intel_tv_detect_type], Unrecognised TV connection
>[  104.308082] [drm:intel_release_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[  104.308107] [drm:intel_set_mode], set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[  104.346959] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  104.346977] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[  104.346988] [drm:intel_calculate_wm], FIFO watermark level: -8
>[  104.346999] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  104.347011] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  104.347021] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  104.347031] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[  104.347042] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[  104.347054] [drm:i9xx_update_wm], memory self refresh disabled
>[  104.347116] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[  104.347136] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[  104.348883] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  104.351947] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[  104.351974] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[  104.351998] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[  104.352049] [drm:intel_modeset_check_state], [CRTC:3]
>[  104.352070] [drm:intel_modeset_check_state], [CRTC:4]
>[  104.352379] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1] disconnected
>[  104.356316] [drm:drm_mode_getconnector], [CONNECTOR:9:?]
>[  104.356342] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1]
>[  104.356366] [drm:intel_get_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[  104.356387] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection
>[  104.356439] [drm:intel_set_mode], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  104.356472] [drm:intel_modeset_adjusted_mode], [CRTC:4]
>[  104.357871] [drm:i9xx_crtc_mode_set], Mode for pipe B:
>[  104.357896] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  104.412386] [drm:i9xx_update_plane], Writing base 01000000 00000000 0 0 5120
>[  104.412413] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  104.412427] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[  104.412437] [drm:intel_calculate_wm], FIFO watermark level: -8
>[  104.412447] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  104.412459] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  104.412469] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  104.412479] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[  104.412490] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[  104.412502] [drm:i9xx_update_wm], memory self refresh disabled
>[  104.412517] [drm:intel_set_mode], [ENCODER:10:TV-10] set [MODE:0:NTSC 480i]
>[  104.437406] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  104.437421] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[  104.437429] [drm:intel_calculate_wm], FIFO watermark level: -8
>[  104.437437] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  104.437449] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  104.437457] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  104.437464] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[  104.437475] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[  104.437485] [drm:i9xx_update_wm], memory self refresh disabled
>[  104.460142] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[  104.460163] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[  104.461808] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  104.464671] [drm:intel_connector_check_state], [CONNECTOR:9:SVIDEO-1]
>[  104.464684] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[  104.464694] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[  104.464704] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[  104.464716] [drm:intel_modeset_check_state], [CRTC:3]
>[  104.464724] [drm:intel_modeset_check_state], [CRTC:4]
>[  104.560108] [drm:intel_tv_detect_type], TV detected: 400c0017, 7f0000aa
>[  104.560131] [drm:intel_tv_detect_type], Unrecognised TV connection
>[  104.616085] [drm:intel_wait_for_vblank], vblank wait timed out
>[  104.616111] [drm:intel_release_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[  104.616131] [drm:intel_set_mode], set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[  104.648873] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  104.648891] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[  104.648902] [drm:intel_calculate_wm], FIFO watermark level: -8
>[  104.648912] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  104.648925] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  104.648934] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  104.648944] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[  104.648955] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[  104.648968] [drm:i9xx_update_wm], memory self refresh disabled
>[  104.649031] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[  104.649053] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[  104.650700] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  104.653597] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[  104.653607] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[  104.653620] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[  104.653629] [drm:intel_modeset_check_state], [CRTC:3]
>[  104.653641] [drm:intel_modeset_check_state], [CRTC:4]
>[  104.653818] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1] disconnected
>[  104.666113] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[  104.666129] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:VGA-1]
>[  105.672075] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[  105.672099] [drm:intel_crt_detect], CRT detected via hotplug
>[  105.680057] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1)
>[  105.680076] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[  105.680088] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[  105.680605] i2c i2c-2: sendbytes: NAK bailout.
>[  105.681117] i2c i2c-2: sendbytes: NAK bailout.
>[  105.681622] i2c i2c-2: sendbytes: NAK bailout.
>[  105.682127] i2c i2c-2: sendbytes: NAK bailout.
>[  105.682632] i2c i2c-2: sendbytes: NAK bailout.
>[  105.682718] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:VGA-1] probed modes :
>[  105.682732] [drm:drm_mode_debug_printmodeline], Modeline 28:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  105.682752] [drm:drm_mode_debug_printmodeline], Modeline 26:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  105.682771] [drm:drm_mode_debug_printmodeline], Modeline 25:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  105.682789] [drm:drm_mode_debug_printmodeline], Modeline 27:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  105.682808] [drm:drm_mode_debug_printmodeline], Modeline 24:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  106.688098] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[  106.688116] [drm:intel_crt_detect], CRT detected via hotplug
>[  106.688136] [drm:output_poll_execute], [CONNECTOR:5:VGA-1] status updated from 1 to 1
>[  106.688153] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  106.689866] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  106.692889] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[  106.692909] [drm:output_poll_execute], [CONNECTOR:8:DVI-D-1] status updated from 2 to 2
>[  106.692938] [drm:output_poll_execute], [CONNECTOR:9:SVIDEO-1] status updated from 2 to 2
>[  106.694349] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[  106.694545] [drm:drm_mode_getconnector], [CONNECTOR:8:?]
>[  106.694567] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1]
>[  106.694593] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  106.696391] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  106.699523] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[  106.699547] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1] disconnected
>[  106.699736] [drm:drm_mode_getconnector], [CONNECTOR:8:?]
>[  106.699759] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1]
>[  106.699780] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  106.701527] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  106.704482] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[  106.704494] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1] disconnected
>[  106.704560] [drm:drm_mode_getconnector], [CONNECTOR:9:?]
>[  106.704575] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1]
>[  106.704587] [drm:intel_get_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[  106.704600] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection
>[  106.704633] [drm:intel_set_mode], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  106.704652] [drm:intel_modeset_adjusted_mode], [CRTC:4]
>[  106.705516] [drm:i9xx_crtc_mode_set], Mode for pipe B:
>[  106.705525] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  106.768079] [drm:intel_wait_for_vblank], vblank wait timed out
>[  106.786277] [drm:i9xx_update_plane], Writing base 01000000 00000000 0 0 5120
>[  106.786303] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  106.786316] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[  106.786326] [drm:intel_calculate_wm], FIFO watermark level: -8
>[  106.786336] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  106.786348] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  106.786358] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  106.786368] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[  106.786379] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[  106.786391] [drm:i9xx_update_wm], memory self refresh disabled
>[  106.786478] [drm:intel_set_mode], [ENCODER:10:TV-10] set [MODE:0:NTSC 480i]
>[  106.801420] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  106.801432] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[  106.801440] [drm:intel_calculate_wm], FIFO watermark level: -8
>[  106.801447] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  106.801456] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  106.801463] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  106.801471] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[  106.801479] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[  106.801489] [drm:i9xx_update_wm], memory self refresh disabled
>[  106.840143] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[  106.840166] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[  106.841819] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  106.844691] [drm:intel_connector_check_state], [CONNECTOR:9:SVIDEO-1]
>[  106.844701] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[  106.844715] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[  106.844725] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[  106.844736] [drm:intel_modeset_check_state], [CRTC:3]
>[  106.844745] [drm:intel_modeset_check_state], [CRTC:4]
>[  106.876089] [drm:intel_tv_detect_type], TV detected: 400c0017, 7f0000aa
>[  106.876112] [drm:intel_tv_detect_type], Unrecognised TV connection
>[  106.908092] [drm:intel_release_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[  106.908118] [drm:intel_set_mode], set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[  106.946969] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  106.946987] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[  106.946998] [drm:intel_calculate_wm], FIFO watermark level: -8
>[  106.947008] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  106.947020] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  106.947030] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  106.947040] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[  106.947051] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[  106.947063] [drm:i9xx_update_wm], memory self refresh disabled
>[  106.947126] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[  106.947145] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[  106.948892] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  106.951959] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[  106.951985] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[  106.952047] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[  106.952064] [drm:intel_modeset_check_state], [CRTC:3]
>[  106.952081] [drm:intel_modeset_check_state], [CRTC:4]
>[  106.952400] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1] disconnected
>[  106.955794] [drm:drm_mode_getconnector], [CONNECTOR:9:?]
>[  106.955809] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1]
>[  106.955821] [drm:intel_get_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[  106.955830] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection
>[  106.955866] [drm:intel_set_mode], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  106.956096] [drm:intel_modeset_adjusted_mode], [CRTC:4]
>[  106.956966] [drm:i9xx_crtc_mode_set], Mode for pipe B:
>[  106.956975] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  107.028355] [drm:i9xx_update_plane], Writing base 01000000 00000000 0 0 5120
>[  107.028381] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  107.028394] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[  107.028405] [drm:intel_calculate_wm], FIFO watermark level: -8
>[  107.028415] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  107.028427] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  107.028437] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  107.028446] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[  107.028457] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[  107.028469] [drm:i9xx_update_wm], memory self refresh disabled
>[  107.028483] [drm:intel_set_mode], [ENCODER:10:TV-10] set [MODE:0:NTSC 480i]
>[  107.053347] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  107.053359] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[  107.053367] [drm:intel_calculate_wm], FIFO watermark level: -8
>[  107.053376] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  107.053385] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  107.053393] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  107.053400] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[  107.053409] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[  107.053418] [drm:i9xx_update_wm], memory self refresh disabled
>[  107.092148] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[  107.092168] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[  107.093868] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  107.096890] [drm:intel_connector_check_state], [CONNECTOR:9:SVIDEO-1]
>[  107.096915] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[  107.096945] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[  107.096969] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[  107.096992] [drm:intel_modeset_check_state], [CRTC:3]
>[  107.097013] [drm:intel_modeset_check_state], [CRTC:4]
>[  107.152074] [drm:intel_tv_detect_type], TV detected: 400c0017, 7f0000aa
>[  107.152096] [drm:intel_tv_detect_type], Unrecognised TV connection
>[  107.208086] [drm:intel_wait_for_vblank], vblank wait timed out
>[  107.208113] [drm:intel_release_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[  107.208133] [drm:intel_set_mode], set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[  107.256884] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  107.256893] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[  107.256899] [drm:intel_calculate_wm], FIFO watermark level: -8
>[  107.256904] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  107.256910] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  107.256915] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  107.256920] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[  107.256926] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[  107.256932] [drm:i9xx_update_wm], memory self refresh disabled
>[  107.256981] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[  107.256995] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[  107.258633] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  107.261553] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[  107.261569] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[  107.261583] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[  107.261599] [drm:intel_modeset_check_state], [CRTC:3]
>[  107.261612] [drm:intel_modeset_check_state], [CRTC:4]
>[  107.261814] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1] disconnected
>[  107.290360] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[  107.290379] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:VGA-1]
>[  108.296083] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[  108.296108] [drm:intel_crt_detect], CRT detected via hotplug
>[  108.304056] [drm:gmbus_xfer], GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1)
>[  108.304076] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[  108.304088] [drm:intel_crt_get_edid], CRT GMBUS EDID read failed, retry using GPIO bit-banging
>[  108.304584] i2c i2c-2: sendbytes: NAK bailout.
>[  108.305100] i2c i2c-2: sendbytes: NAK bailout.
>[  108.305607] i2c i2c-2: sendbytes: NAK bailout.
>[  108.306111] i2c i2c-2: sendbytes: NAK bailout.
>[  108.306616] i2c i2c-2: sendbytes: NAK bailout.
>[  108.306704] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:VGA-1] probed modes :
>[  108.306717] [drm:drm_mode_debug_printmodeline], Modeline 28:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  108.306738] [drm:drm_mode_debug_printmodeline], Modeline 26:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  108.306757] [drm:drm_mode_debug_printmodeline], Modeline 25:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  108.306775] [drm:drm_mode_debug_printmodeline], Modeline 27:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  108.306794] [drm:drm_mode_debug_printmodeline], Modeline 24:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  108.307682] [drm:drm_mode_getconnector], [CONNECTOR:5:?]
>[  108.307827] [drm:drm_mode_getconnector], [CONNECTOR:8:?]
>[  108.307844] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1]
>[  108.307859] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  108.309662] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  108.312840] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[  108.312856] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1] disconnected
>[  108.312896] [drm:drm_mode_getconnector], [CONNECTOR:8:?]
>[  108.312910] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1]
>[  108.312921] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  108.314587] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  108.317793] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[  108.317805] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:8:DVI-D-1] disconnected
>[  108.317944] [drm:drm_mode_getconnector], [CONNECTOR:9:?]
>[  108.317956] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1]
>[  108.317971] [drm:intel_get_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[  108.317982] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection
>[  108.318018] [drm:intel_set_mode], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  108.318036] [drm:intel_modeset_adjusted_mode], [CRTC:4]
>[  108.318904] [drm:i9xx_crtc_mode_set], Mode for pipe B:
>[  108.318916] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  108.352709] [drm:i9xx_update_plane], Writing base 01000000 00000000 0 0 5120
>[  108.352727] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  108.352740] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[  108.352748] [drm:intel_calculate_wm], FIFO watermark level: -8
>[  108.352758] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  108.352768] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  108.352775] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  108.352785] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[  108.352794] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[  108.352803] [drm:i9xx_update_wm], memory self refresh disabled
>[  108.352817] [drm:intel_set_mode], [ENCODER:10:TV-10] set [MODE:0:NTSC 480i]
>[  108.362788] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  108.362802] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[  108.362810] [drm:intel_calculate_wm], FIFO watermark level: -8
>[  108.362821] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  108.362830] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  108.362838] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  108.362848] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[  108.362856] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[  108.362865] [drm:i9xx_update_wm], memory self refresh disabled
>[  108.384105] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[  108.384123] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[  108.385797] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  108.388665] [drm:intel_connector_check_state], [CONNECTOR:9:SVIDEO-1]
>[  108.388673] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[  108.388680] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[  108.388687] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[  108.388692] [drm:intel_modeset_check_state], [CRTC:3]
>[  108.388698] [drm:intel_modeset_check_state], [CRTC:4]
>[  108.436084] [drm:intel_tv_detect_type], TV detected: 400c0017, 7f0000aa
>[  108.436106] [drm:intel_tv_detect_type], Unrecognised TV connection
>[  108.452088] [drm:intel_release_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[  108.452113] [drm:intel_set_mode], set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[  108.492904] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  108.492921] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[  108.492933] [drm:intel_calculate_wm], FIFO watermark level: -8
>[  108.492943] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  108.492955] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  108.492965] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  108.492975] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[  108.492986] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[  108.492998] [drm:i9xx_update_wm], memory self refresh disabled
>[  108.493061] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[  108.493082] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[  108.494765] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  108.497835] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[  108.497860] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[  108.497884] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[  108.497911] [drm:intel_modeset_check_state], [CRTC:3]
>[  108.497933] [drm:intel_modeset_check_state], [CRTC:4]
>[  108.498256] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1] disconnected
>[  108.501692] [drm:drm_mode_getconnector], [CONNECTOR:9:?]
>[  108.501707] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1]
>[  108.501723] [drm:intel_get_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[  108.501734] [drm:intel_get_load_detect_pipe], creating tmp fb for load-detection
>[  108.501769] [drm:intel_set_mode], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  108.501787] [drm:intel_modeset_adjusted_mode], [CRTC:4]
>[  108.502655] [drm:i9xx_crtc_mode_set], Mode for pipe B:
>[  108.502667] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  108.534953] [drm:i9xx_update_plane], Writing base 01000000 00000000 0 0 5120
>[  108.534970] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  108.534977] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[  108.534982] [drm:intel_calculate_wm], FIFO watermark level: -8
>[  108.534987] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  108.534994] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  108.534998] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  108.535003] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[  108.535009] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[  108.535015] [drm:i9xx_update_wm], memory self refresh disabled
>[  108.535023] [drm:intel_set_mode], [ENCODER:10:TV-10] set [MODE:0:NTSC 480i]
>[  108.545019] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  108.545031] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[  108.545039] [drm:intel_calculate_wm], FIFO watermark level: -8
>[  108.545049] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  108.545059] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  108.545069] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  108.545077] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[  108.545086] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[  108.545098] [drm:i9xx_update_wm], memory self refresh disabled
>[  108.568133] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[  108.568155] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[  108.569806] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  108.572664] [drm:intel_connector_check_state], [CONNECTOR:9:SVIDEO-1]
>[  108.572677] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[  108.572687] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[  108.572700] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[  108.572709] [drm:intel_modeset_check_state], [CRTC:3]
>[  108.572717] [drm:intel_modeset_check_state], [CRTC:4]
>[  108.604108] [drm:intel_tv_detect_type], TV detected: 400c0017, 7f0000aa
>[  108.604129] [drm:intel_tv_detect_type], Unrecognised TV connection
>[  108.636081] [drm:intel_release_load_detect_pipe], [CONNECTOR:9:SVIDEO-1], [ENCODER:10:TV-10]
>[  108.636106] [drm:intel_set_mode], set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[  108.676884] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  108.676894] [drm:intel_calculate_wm], FIFO entries required for mode: 34
>[  108.676899] [drm:intel_calculate_wm], FIFO watermark level: -8
>[  108.676905] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  108.676911] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  108.676916] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  108.676921] [drm:i9xx_update_wm], FIFO watermarks - A: 1, B: 16
>[  108.676927] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 1, B: 16, C: 2, SR 1
>[  108.676933] [drm:i9xx_update_wm], memory self refresh disabled
>[  108.676982] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[  108.676996] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[  108.678629] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  108.681667] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[  108.681692] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[  108.681717] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[  108.681744] [drm:intel_modeset_check_state], [CRTC:3]
>[  108.681765] [drm:intel_modeset_check_state], [CRTC:4]
>[  108.682102] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:SVIDEO-1] disconnected
>[  111.071242] [drm:drm_mode_addfb], [FB:31]
>[  115.157643] [drm:drm_mode_addfb], [FB:32]
>[  115.221809] [drm:drm_mode_addfb], [FB:31]
>[  116.688071] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[  116.688089] [drm:intel_crt_detect], CRT detected via hotplug
>[  116.688109] [drm:output_poll_execute], [CONNECTOR:5:VGA-1] status updated from 1 to 1
>[  116.688126] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  116.689838] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  116.692819] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[  116.692850] [drm:output_poll_execute], [CONNECTOR:8:DVI-D-1] status updated from 2 to 2
>[  116.692878] [drm:output_poll_execute], [CONNECTOR:9:SVIDEO-1] status updated from 2 to 2
>[  117.048959] [drm:drm_mode_addfb], [FB:32]
>[  123.651543] [drm:intel_crtc_cursor_set], cursor off
>[  127.728080] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[  127.728099] [drm:intel_crt_detect], CRT detected via hotplug
>[  127.728118] [drm:output_poll_execute], [CONNECTOR:5:VGA-1] status updated from 1 to 1
>[  127.728137] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  127.729849] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  127.732822] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[  127.732853] [drm:output_poll_execute], [CONNECTOR:8:DVI-D-1] status updated from 2 to 2
>[  127.732883] [drm:output_poll_execute], [CONNECTOR:9:SVIDEO-1] status updated from 2 to 2
>[  138.768074] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[  138.768093] [drm:intel_crt_detect], CRT detected via hotplug
>[  138.768112] [drm:output_poll_execute], [CONNECTOR:5:VGA-1] status updated from 1 to 1
>[  138.768130] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  138.769843] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  138.772824] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[  138.772855] [drm:output_poll_execute], [CONNECTOR:8:DVI-D-1] status updated from 2 to 2
>[  138.772885] [drm:output_poll_execute], [CONNECTOR:9:SVIDEO-1] status updated from 2 to 2
>[  149.808079] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[  149.808098] [drm:intel_crt_detect], CRT detected via hotplug
>[  149.808117] [drm:output_poll_execute], [CONNECTOR:5:VGA-1] status updated from 1 to 1
>[  149.808136] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  149.809846] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  149.812821] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[  149.812852] [drm:output_poll_execute], [CONNECTOR:8:DVI-D-1] status updated from 2 to 2
>[  149.812882] [drm:output_poll_execute], [CONNECTOR:9:SVIDEO-1] status updated from 2 to 2
>[  150.485272] [drm:intel_crtc_cursor_set], cursor off
>[  158.155563] [drm:drm_mode_addfb], [FB:31]
>[  160.848101] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[  160.848120] [drm:intel_crt_detect], CRT detected via hotplug
>[  160.848139] [drm:output_poll_execute], [CONNECTOR:5:VGA-1] status updated from 1 to 1
>[  160.848157] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  160.849873] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  160.852851] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[  160.852882] [drm:output_poll_execute], [CONNECTOR:8:DVI-D-1] status updated from 2 to 2
>[  160.852912] [drm:output_poll_execute], [CONNECTOR:9:SVIDEO-1] status updated from 2 to 2
>[  162.177455] [drm:drm_mode_addfb], [FB:32]
>[  163.319698] [drm:drm_mode_addfb], [FB:31]
>[  163.586966] [drm:drm_mode_addfb], [FB:32]
>[  164.728616] [drm:intel_crtc_cursor_set], cursor off
>[  164.769042] [drm:intel_crtc_set_config], [CRTC:3] [NOFB]
>[  164.769058] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:VGA-1] to [NOCRTC]
>[  164.769065] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  164.769070] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  164.769076] [drm:intel_set_mode], set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[  164.794012] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  164.794031] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  164.794044] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  164.794055] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  164.794065] [drm:i9xx_update_wm], FIFO watermarks - A: 26, B: 16
>[  164.794076] [drm:i9xx_update_wm], self-refresh entries: 64
>[  164.794086] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 26, B: 16, C: 2, SR 63
>[  164.794098] [drm:i9xx_update_wm], memory self refresh enabled
>[  164.794150] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[  164.795838] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  164.798889] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[  164.798909] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[  164.798934] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[  164.798952] [drm:intel_modeset_check_state], [CRTC:3]
>[  164.798968] [drm:intel_modeset_check_state], [CRTC:4]
>[  164.810059] [drm:drm_mode_addfb], [FB:31]
>[  164.810109] [drm:drm_mode_setcrtc], [CRTC:3]
>[  164.810127] [drm:drm_mode_setcrtc], [CONNECTOR:5:VGA-1]
>[  164.810139] [drm:intel_crtc_set_config], [CRTC:3] [FB:31] #connectors=1 (x y) (0 0)
>[  164.810152] [drm:intel_set_config_compute_mode_changes], crtc has no fb, full mode set
>[  164.810164] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  164.810174] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:VGA-1] to [CRTC:3]
>[  164.810183] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  164.810193] [drm:intel_crtc_set_config], attempting to set mode from userspace
>[  164.810202] [drm:drm_mode_debug_printmodeline], Modeline 32:"576i100 16:9" 0 39375 1024 1053 1146 1260 576 581 586 625 0x0 0x1a
>[  164.810220] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  164.810237] [drm:intel_modeset_adjusted_mode], [CRTC:3]
>[  164.811107] [drm:i9xx_crtc_mode_set], Mode for pipe A:
>[  164.811118] [drm:drm_mode_debug_printmodeline], Modeline 32:"576i100 16:9" 0 39375 1024 1053 1146 1260 576 581 586 625 0x0 0x1a
>[  164.830333] [drm:i9xx_update_plane], Writing base 04800000 00000000 0 0 4096
>[  164.830354] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  164.830368] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  164.830377] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  164.830385] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  164.830395] [drm:i9xx_update_wm], FIFO watermarks - A: 26, B: 16
>[  164.830404] [drm:i9xx_update_wm], self-refresh entries: 64
>[  164.830412] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 26, B: 16, C: 2, SR 63
>[  164.830425] [drm:i9xx_update_wm], memory self refresh enabled
>[  164.830436] [drm:intel_set_mode], [ENCODER:6:DAC-6] set [MODE:32:576i100 16:9]
>[  164.830451] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
>[  164.830461] [drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
>[  164.830473] [drm:intel_calculate_wm], FIFO entries required for mode: 13
>[  164.830481] [drm:intel_calculate_wm], FIFO watermark level: 16
>[  164.830488] [drm:i9xx_update_wm], FIFO watermarks - A: 26, B: 16
>[  164.830499] [drm:i9xx_update_wm], self-refresh entries: 64
>[  164.830507] [drm:i9xx_update_wm], Setting FIFO watermarks - A: 26, B: 16, C: 2, SR 63
>[  164.830520] [drm:i9xx_update_wm], memory self refresh enabled
>[  164.836343] [drm:intel_connector_check_state], [CONNECTOR:5:VGA-1]
>[  164.836359] [drm:intel_sdvo_debug_write], SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>[  164.838030] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  164.840944] [drm:intel_modeset_check_state], [ENCODER:6:DAC-6]
>[  164.840956] [drm:intel_modeset_check_state], [ENCODER:7:TMDS-7]
>[  164.840969] [drm:intel_modeset_check_state], [ENCODER:10:TV-10]
>[  164.840978] [drm:intel_modeset_check_state], [CRTC:3]
>[  164.840989] [drm:intel_modeset_check_state], [CRTC:4]
>[  171.888073] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[  171.888091] [drm:intel_crt_detect], CRT detected via hotplug
>[  171.888111] [drm:output_poll_execute], [CONNECTOR:5:VGA-1] status updated from 1 to 1
>[  171.888129] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  171.889818] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  171.892823] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[  171.892854] [drm:output_poll_execute], [CONNECTOR:8:DVI-D-1] status updated from 2 to 2
>[  171.892884] [drm:output_poll_execute], [CONNECTOR:9:SVIDEO-1] status updated from 2 to 2
>[  182.928092] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[  182.928117] [drm:intel_crt_detect], CRT detected via hotplug
>[  182.928142] [drm:output_poll_execute], [CONNECTOR:5:VGA-1] status updated from 1 to 1
>[  182.928162] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  182.929850] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  182.932862] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[  182.932893] [drm:output_poll_execute], [CONNECTOR:8:DVI-D-1] status updated from 2 to 2
>[  182.932923] [drm:output_poll_execute], [CONNECTOR:9:SVIDEO-1] status updated from 2 to 2
>[  193.968069] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[  193.968088] [drm:intel_crt_detect], CRT detected via hotplug
>[  193.968108] [drm:output_poll_execute], [CONNECTOR:5:VGA-1] status updated from 1 to 1
>[  193.968126] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  193.969815] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  193.972817] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[  193.972849] [drm:output_poll_execute], [CONNECTOR:8:DVI-D-1] status updated from 2 to 2
>[  193.972879] [drm:output_poll_execute], [CONNECTOR:9:SVIDEO-1] status updated from 2 to 2
>[  205.008076] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[  205.008094] [drm:intel_crt_detect], CRT detected via hotplug
>[  205.008113] [drm:output_poll_execute], [CONNECTOR:5:VGA-1] status updated from 1 to 1
>[  205.008133] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  205.009821] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  205.012823] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[  205.012855] [drm:output_poll_execute], [CONNECTOR:8:DVI-D-1] status updated from 2 to 2
>[  205.012885] [drm:output_poll_execute], [CONNECTOR:9:SVIDEO-1] status updated from 2 to 2
>[  216.048073] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[  216.048092] [drm:intel_crt_detect], CRT detected via hotplug
>[  216.048113] [drm:output_poll_execute], [CONNECTOR:5:VGA-1] status updated from 1 to 1
>[  216.048133] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  216.049820] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  216.052856] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[  216.052888] [drm:output_poll_execute], [CONNECTOR:8:DVI-D-1] status updated from 2 to 2
>[  216.052918] [drm:output_poll_execute], [CONNECTOR:9:SVIDEO-1] status updated from 2 to 2
>[  227.088069] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[  227.088088] [drm:intel_crt_detect], CRT detected via hotplug
>[  227.088108] [drm:output_poll_execute], [CONNECTOR:5:VGA-1] status updated from 1 to 1
>[  227.088127] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  227.089815] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  227.092822] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[  227.092852] [drm:output_poll_execute], [CONNECTOR:8:DVI-D-1] status updated from 2 to 2
>[  227.092880] [drm:output_poll_execute], [CONNECTOR:9:SVIDEO-1] status updated from 2 to 2
>[  238.128073] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[  238.128092] [drm:intel_crt_detect], CRT detected via hotplug
>[  238.128111] [drm:output_poll_execute], [CONNECTOR:5:VGA-1] status updated from 1 to 1
>[  238.128132] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  238.129820] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  238.132825] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[  238.132855] [drm:output_poll_execute], [CONNECTOR:8:DVI-D-1] status updated from 2 to 2
>[  238.132882] [drm:output_poll_execute], [CONNECTOR:9:SVIDEO-1] status updated from 2 to 2
>[  249.168080] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[  249.168098] [drm:intel_crt_detect], CRT detected via hotplug
>[  249.168118] [drm:output_poll_execute], [CONNECTOR:5:VGA-1] status updated from 1 to 1
>[  249.168136] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  249.169824] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  249.172826] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[  249.172858] [drm:output_poll_execute], [CONNECTOR:8:DVI-D-1] status updated from 2 to 2
>[  249.172888] [drm:output_poll_execute], [CONNECTOR:9:SVIDEO-1] status updated from 2 to 2
>[  260.208059] [drm:intel_crt_detect_hotplug], timed out waiting for FORCE_DETECT to go off
>[  260.208078] [drm:intel_crt_detect], CRT detected via hotplug
>[  260.208098] [drm:output_poll_execute], [CONNECTOR:5:VGA-1] status updated from 1 to 1
>[  260.208117] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  260.209805] [drm:intel_sdvo_read_response], SDVOB: R: (Success) 00 00
>[  260.212915] [drm:intel_sdvo_detect], SDVO response 0 0 [1]
>[  260.212947] [drm:output_poll_execute], [CONNECTOR:8:DVI-D-1] status updated from 2 to 2
>[  260.212977] [drm:output_poll_execute], [CONNECTOR:9:SVIDEO-1] status updated from 2 to 2

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Attachments on bug 59661: 73379 | 73380 | 73381

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