Attachment 79258 Details for Bug 64503 – use 10khz units for dto

[patch] use 10khz units for dto

0001-drm-radeon-use-10khz-units-for-audio-dto-calculation.patch (text/plain), 3.43 KB, created by Alex Deucher on 2013-05-13 15:37:20 UTC

(hide)

Description:

Filename:

MIME Type:

Creator: Alex Deucher

Created: 2013-05-13 15:37:20 UTC

Size: 3.43 KB

patch

obsolete

>From 6699d2085e5ed7ba14a596762012fea43cfa9145 Mon Sep 17 00:00:00 2001
>From: Alex Deucher <alexander.deucher@amd.com>
>Date: Mon, 13 May 2013 11:35:26 -0400
>Subject: [PATCH] drm/radeon: use 10khz units for audio dto calculation
>
>May produce better results with some modes also aviods
>overflows on DCE2.x devices.
>
>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
>Cc: stable@vger.kernel.org
>---
> drivers/gpu/drm/radeon/evergreen_hdmi.c |    7 +++----
> drivers/gpu/drm/radeon/r600_hdmi.c      |   11 +++++------
> 2 files changed, 8 insertions(+), 10 deletions(-)
>
>diff --git a/drivers/gpu/drm/radeon/evergreen_hdmi.c b/drivers/gpu/drm/radeon/evergreen_hdmi.c
>index b4ab8ce..84d6822 100644
>--- a/drivers/gpu/drm/radeon/evergreen_hdmi.c
>+++ b/drivers/gpu/drm/radeon/evergreen_hdmi.c
>@@ -154,19 +154,18 @@ static void evergreen_audio_set_dto(struct drm_encoder *encoder, u32 clock)
> 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
> 	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
> 	struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
>-	u32 base_rate = 48000;
>+	u32 base_rate = 24000;
> 
> 	if (!dig || !dig->afmt)
> 		return;
> 
>-	/* XXX: properly calculate this */
> 	/* XXX two dtos; generally use dto0 for hdmi */
> 	/* Express [24MHz / target pixel clock] as an exact rational
> 	 * number (coefficient of two integer numbers.  DCCG_AUDIO_DTOx_PHASE
> 	 * is the numerator, DCCG_AUDIO_DTOx_MODULE is the denominator
> 	 */
>-	WREG32(DCCG_AUDIO_DTO0_PHASE, (base_rate*50) & 0xffffff);
>-	WREG32(DCCG_AUDIO_DTO0_MODULE, (clock*100) & 0xffffff);
>+	WREG32(DCCG_AUDIO_DTO0_PHASE, base_rate / 10);
>+	WREG32(DCCG_AUDIO_DTO0_MODULE, clock / 10);
> 	WREG32(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO0_SOURCE_SEL(radeon_crtc->crtc_id));
> }
> 
>diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c
>index 47f180a..70c4ecb 100644
>--- a/drivers/gpu/drm/radeon/r600_hdmi.c
>+++ b/drivers/gpu/drm/radeon/r600_hdmi.c
>@@ -232,7 +232,7 @@ void r600_audio_set_dto(struct drm_encoder *encoder, u32 clock)
> 	struct radeon_device *rdev = dev->dev_private;
> 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
> 	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
>-	u32 base_rate = 48000;
>+	u32 base_rate = 24000;
> 
> 	if (!dig || !dig->afmt)
> 		return;
>@@ -240,7 +240,6 @@ void r600_audio_set_dto(struct drm_encoder *encoder, u32 clock)
> 	/* there are two DTOs selected by DCCG_AUDIO_DTO_SELECT.
> 	 * doesn't matter which one you use.  Just use the first one.
> 	 */
>-	/* XXX: properly calculate this */
> 	/* XXX two dtos; generally use dto0 for hdmi */
> 	/* Express [24MHz / target pixel clock] as an exact rational
> 	 * number (coefficient of two integer numbers.  DCCG_AUDIO_DTOx_PHASE
>@@ -250,13 +249,13 @@ void r600_audio_set_dto(struct drm_encoder *encoder, u32 clock)
> 		/* according to the reg specs, this should DCE3.2 only, but in
> 		 * practice it seems to cover DCE3.0 as well.
> 		 */
>-		WREG32(DCCG_AUDIO_DTO0_PHASE, base_rate * 50);
>-		WREG32(DCCG_AUDIO_DTO0_MODULE, clock * 100);
>+		WREG32(DCCG_AUDIO_DTO0_PHASE, base_rate / 10);
>+		WREG32(DCCG_AUDIO_DTO0_MODULE, clock / 10);
> 		WREG32(DCCG_AUDIO_DTO_SELECT, 0); /* select DTO0 */
> 	} else {
> 		/* according to the reg specs, this should be DCE2.0 and DCE3.0 */
>-		WREG32(AUDIO_DTO, AUDIO_DTO_PHASE(base_rate * 50) |
>-		       AUDIO_DTO_MODULE(clock * 100));
>+		WREG32(AUDIO_DTO, AUDIO_DTO_PHASE(base_rate / 10) |
>+		       AUDIO_DTO_MODULE(clock / 10));
> 	}
> }
> 
>-- 
>1.7.7.5
>

Actions: View | Splinter Review

Attachments on bug 64503: 79258

Use of freedesktop.org services, including Bugzilla, is subject to our Code of Conduct. How we collect and use information is described in our Privacy Policy.