Attachment 79339 Details for Bug 64193 – R600_DEBUG output with swimming dolphin

R600_DEBUG output with swimming dolphin

geht (text/plain), 194.57 KB, created by Marc Dietrich on 2013-05-15 11:33:03 UTC

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Creator: Marc Dietrich

Created: 2013-05-15 11:33:03 UTC

Size: 194.57 KB

patch

obsolete

>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 0 -- 6
>0000 00000002 81000400  VTX 2 @4 
> 0004 7C00A000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C00A000 88CD1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_SINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 1 -- 6
>0000 00000002 81000400  VTX 2 @4 
> 0004 7C00A000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C00A000 D88D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:1 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_UINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 2 -- 6
>0000 00000002 81000400  VTX 2 @4 
> 0004 7C00A000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C00A000 988D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 3 -- 6
>0000 00000002 81000000  VTX 1 @4 
> 0004 7C00A000 93564001 00080000   VFETCH         R1.x001, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:13 NUM:1 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 4 -- 6
>0000 00000002 81000000  VTX 1 @4 
> 0004 7C00A000 97561001 00080000   VFETCH         R1.xy01, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:29 NUM:1 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 5 -- 6
>0000 00000002 81000000  VTX 1 @4 
> 0004 7C00A000 9BD51001 00080000   VFETCH         R1.xyz1, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:47 NUM:1 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 6 -- 6
>0000 00000002 81000000  VTX 1 @4 
> 0004 7C00A000 988D1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  %12 = insertelement <4 x float> undef, float %4, i32 0
>  %13 = insertelement <4 x float> %12, float %5, i32 1
>  %14 = insertelement <4 x float> %13, float %6, i32 2
>  %15 = insertelement <4 x float> %14, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %15, i32 0, i32 2)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 8 dw -- 3 gprs -- 1 nstack -------------
>shader 7 -- 6
>0000 00000000 89800000  CALL_FS @0 
>0002 C000A03C 94400688 CF_NATIVE
>0004 C0014000 94600688 CF_NATIVE
>0006 00000000 80200000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>  0: MOV OUT[0], IN[0]
>  1: END
>STREAMOUT
>  0: MEM_STREAM0_BUF0[0..0] <- OUT[0].x
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.stream.output(<4 x float> %7, i32 0, i32 0, i32 1)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  call void @llvm.R600.store.dummy(i32 2)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.stream.output(<4 x float>, i32, i32, i32)
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 12 dw -- 2 gprs -- 1 nstack -------------
>shader 8 -- 6
>0000 00000000 89800000  CALL_FS @0 
>0002 00008000 90401FFF CF_NATIVE
>0004 C000A03C 94400688 CF_NATIVE
>0006 C0004000 94600FFF CF_NATIVE
>0008 00000000 80200000 CF_NATIVE
>0010 00000000 00000000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 0)
>  %1 = call float @llvm.R600.load.input(i32 1)
>  %2 = call float @llvm.R600.load.input(i32 2)
>  %3 = call float @llvm.R600.load.input(i32 3)
>  call void @llvm.R600.store.dummy(i32 0)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 4 dw -- 1 gprs -- 1 nstack -------------
>shader 9 -- 6
>0000 C0000000 94600FFF CF_NATIVE
>0002 00000000 80200000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 10 -- 6
>0000 00000002 81000400  VTX 2 @4 
> 0004 7C00A000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C00A000 88CD1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_SINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 11 -- 6
>0000 00000002 81000400  VTX 2 @4 
> 0004 7C00A000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C00A000 D88D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:1 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_UINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 12 -- 6
>0000 00000002 81000400  VTX 2 @4 
> 0004 7C00A000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C00A000 988D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 13 -- 6
>0000 00000002 81000000  VTX 1 @4 
> 0004 7C00A000 93564001 00080000   VFETCH         R1.x001, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:13 NUM:1 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 14 -- 6
>0000 00000002 81000000  VTX 1 @4 
> 0004 7C00A000 97561001 00080000   VFETCH         R1.xy01, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:29 NUM:1 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 15 -- 6
>0000 00000002 81000000  VTX 1 @4 
> 0004 7C00A000 9BD51001 00080000   VFETCH         R1.xyz1, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:47 NUM:1 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 16 -- 6
>0000 00000002 81000000  VTX 1 @4 
> 0004 7C00A000 988D1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  %12 = insertelement <4 x float> undef, float %4, i32 0
>  %13 = insertelement <4 x float> %12, float %5, i32 1
>  %14 = insertelement <4 x float> %13, float %6, i32 2
>  %15 = insertelement <4 x float> %14, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %15, i32 0, i32 2)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 8 dw -- 3 gprs -- 1 nstack -------------
>shader 17 -- 6
>0000 00000000 89800000  CALL_FS @0 
>0002 C000A03C 94400688 CF_NATIVE
>0004 C0014000 94600688 CF_NATIVE
>0006 00000000 80200000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>  0: MOV OUT[0], IN[0]
>  1: END
>STREAMOUT
>  0: MEM_STREAM0_BUF0[0..0] <- OUT[0].x
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.stream.output(<4 x float> %7, i32 0, i32 0, i32 1)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  call void @llvm.R600.store.dummy(i32 2)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.stream.output(<4 x float>, i32, i32, i32)
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 12 dw -- 2 gprs -- 1 nstack -------------
>shader 18 -- 6
>0000 00000000 89800000  CALL_FS @0 
>0002 00008000 90401FFF CF_NATIVE
>0004 C000A03C 94400688 CF_NATIVE
>0006 C0004000 94600FFF CF_NATIVE
>0008 00000000 80200000 CF_NATIVE
>0010 00000000 00000000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 0)
>  %1 = call float @llvm.R600.load.input(i32 1)
>  %2 = call float @llvm.R600.load.input(i32 2)
>  %3 = call float @llvm.R600.load.input(i32 3)
>  call void @llvm.R600.store.dummy(i32 0)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 4 dw -- 1 gprs -- 1 nstack -------------
>shader 19 -- 6
>0000 C0000000 94600FFF CF_NATIVE
>0002 00000000 80200000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>[15188:15188:0515/132754:ERROR:sandbox_linux.cc(131)] InitializeSandbox() called with multiple threads in process gpu-process
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 20 -- 6
>0000 00000002 81000400  VTX 2 @4 
> 0004 7C00A000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C00A000 88CD1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_SINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 21 -- 6
>0000 00000002 81000400  VTX 2 @4 
> 0004 7C00A000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C00A000 D88D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:1 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_UINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 22 -- 6
>0000 00000002 81000400  VTX 2 @4 
> 0004 7C00A000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C00A000 988D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 23 -- 6
>0000 00000002 81000000  VTX 1 @4 
> 0004 7C00A000 93564001 00080000   VFETCH         R1.x001, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:13 NUM:1 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 24 -- 6
>0000 00000002 81000000  VTX 1 @4 
> 0004 7C00A000 97561001 00080000   VFETCH         R1.xy01, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:29 NUM:1 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 25 -- 6
>0000 00000002 81000000  VTX 1 @4 
> 0004 7C00A000 9BD51001 00080000   VFETCH         R1.xyz1, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:47 NUM:1 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 26 -- 6
>0000 00000002 81000000  VTX 1 @4 
> 0004 7C00A000 988D1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  %12 = insertelement <4 x float> undef, float %4, i32 0
>  %13 = insertelement <4 x float> %12, float %5, i32 1
>  %14 = insertelement <4 x float> %13, float %6, i32 2
>  %15 = insertelement <4 x float> %14, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %15, i32 0, i32 2)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 8 dw -- 3 gprs -- 1 nstack -------------
>shader 27 -- 6
>0000 00000000 89800000  CALL_FS @0 
>0002 C000A03C 94400688 CF_NATIVE
>0004 C0014000 94600688 CF_NATIVE
>0006 00000000 80200000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>  0: MOV OUT[0], IN[0]
>  1: END
>STREAMOUT
>  0: MEM_STREAM0_BUF0[0..0] <- OUT[0].x
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.stream.output(<4 x float> %7, i32 0, i32 0, i32 1)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  call void @llvm.R600.store.dummy(i32 2)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.stream.output(<4 x float>, i32, i32, i32)
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 12 dw -- 2 gprs -- 1 nstack -------------
>shader 28 -- 6
>0000 00000000 89800000  CALL_FS @0 
>0002 00008000 90401FFF CF_NATIVE
>0004 C000A03C 94400688 CF_NATIVE
>0006 C0004000 94600FFF CF_NATIVE
>0008 00000000 80200000 CF_NATIVE
>0010 00000000 00000000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 0)
>  %1 = call float @llvm.R600.load.input(i32 1)
>  %2 = call float @llvm.R600.load.input(i32 2)
>  %3 = call float @llvm.R600.load.input(i32 3)
>  call void @llvm.R600.store.dummy(i32 0)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 4 dw -- 1 gprs -- 1 nstack -------------
>shader 29 -- 6
>0000 C0000000 94600FFF CF_NATIVE
>0002 00000000 80200000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], COLOR, COLOR
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 0)
>  %1 = call float @llvm.R600.load.input(i32 1)
>  %2 = call float @llvm.R600.load.input(i32 2)
>  %3 = call float @llvm.R600.load.input(i32 3)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %7, i32 0, i32 0)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 4 dw -- 1 gprs -- 1 nstack -------------
>shader 30 -- 6
>0000 C0000000 94600688 CF_NATIVE
>0002 00000000 80200000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = load <4 x float> addrspace(8)* null
>  %9 = extractelement <4 x float> %8, i32 0
>  %10 = fmul float %0, %9
>  %11 = load <4 x float> addrspace(8)* null
>  %12 = extractelement <4 x float> %11, i32 1
>  %13 = fmul float %0, %12
>  %14 = load <4 x float> addrspace(8)* null
>  %15 = extractelement <4 x float> %14, i32 2
>  %16 = fmul float %0, %15
>  %17 = load <4 x float> addrspace(8)* null
>  %18 = extractelement <4 x float> %17, i32 3
>  %19 = fmul float %0, %18
>  %20 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %21 = extractelement <4 x float> %20, i32 0
>  %22 = fmul float %1, %21
>  %23 = fadd float %22, %10
>  %24 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %25 = extractelement <4 x float> %24, i32 1
>  %26 = fmul float %1, %25
>  %27 = fadd float %26, %13
>  %28 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %29 = extractelement <4 x float> %28, i32 2
>  %30 = fmul float %1, %29
>  %31 = fadd float %30, %16
>  %32 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %33 = extractelement <4 x float> %32, i32 3
>  %34 = fmul float %1, %33
>  %35 = fadd float %34, %19
>  %36 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %37 = extractelement <4 x float> %36, i32 0
>  %38 = fmul float %2, %37
>  %39 = fadd float %38, %23
>  %40 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %41 = extractelement <4 x float> %40, i32 1
>  %42 = fmul float %2, %41
>  %43 = fadd float %42, %27
>  %44 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %45 = extractelement <4 x float> %44, i32 2
>  %46 = fmul float %2, %45
>  %47 = fadd float %46, %31
>  %48 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %49 = extractelement <4 x float> %48, i32 3
>  %50 = fmul float %2, %49
>  %51 = fadd float %50, %35
>  %52 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %53 = extractelement <4 x float> %52, i32 0
>  %54 = fmul float %3, %53
>  %55 = fadd float %54, %39
>  %56 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %57 = extractelement <4 x float> %56, i32 1
>  %58 = fmul float %3, %57
>  %59 = fadd float %58, %43
>  %60 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %61 = extractelement <4 x float> %60, i32 2
>  %62 = fmul float %3, %61
>  %63 = fadd float %62, %47
>  %64 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %65 = extractelement <4 x float> %64, i32 3
>  %66 = fmul float %3, %65
>  %67 = fadd float %66, %51
>  %68 = call float @llvm.AMDIL.clamp.(float %4, float 0.000000e+00, float 1.000000e+00)
>  %69 = call float @llvm.AMDIL.clamp.(float %5, float 0.000000e+00, float 1.000000e+00)
>  %70 = call float @llvm.AMDIL.clamp.(float %6, float 0.000000e+00, float 1.000000e+00)
>  %71 = call float @llvm.AMDIL.clamp.(float %7, float 0.000000e+00, float 1.000000e+00)
>  %72 = insertelement <4 x float> undef, float %55, i32 0
>  %73 = insertelement <4 x float> %72, float %59, i32 1
>  %74 = insertelement <4 x float> %73, float %63, i32 2
>  %75 = insertelement <4 x float> %74, float %67, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %75, i32 60, i32 1)
>  %76 = insertelement <4 x float> undef, float %68, i32 0
>  %77 = insertelement <4 x float> %76, float %69, i32 1
>  %78 = insertelement <4 x float> %77, float %70, i32 2
>  %79 = insertelement <4 x float> %78, float %71, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %79, i32 0, i32 2)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 52 dw -- 5 gprs -- 1 nstack -------------
>shader 31 -- 6
>0000 00000000 89800000  CALL_FS @0 
>0002 80000006 A04C0000  ALU 20 @12 KC0[CB0:0-32] 
> 0012 00100001 00000210     1      MUL_IEEE                 R0.x,  R1.x, KC0[0].x
> 0014 00900001 20000210            MUL_IEEE                 R0.y,  R1.x, KC0[0].y
> 0016 01100001 40000210            MUL_IEEE                 R0.z,  R1.x, KC0[0].z
> 0018 81900001 60000210            MUL_IEEE                 R0.w,  R1.x, KC0[0].w
> 0020 00102401 000280FE     2      MULADD_IEEE              R0.x,  R1.y, KC0[1].x, PV.x
> 0022 00902401 200284FE            MULADD_IEEE              R0.y,  R1.y, KC0[1].y, PV.y
> 0024 01102401 400288FE            MULADD_IEEE              R0.z,  R1.y, KC0[1].z, PV.z
> 0026 81902401 60028CFE            MULADD_IEEE              R0.w,  R1.y, KC0[1].w, PV.w
> 0028 00104801 002280FE     3      MULADD_IEEE              R1.x,  R1.z, KC0[2].x, PV.x
> 0030 00904801 202284FE            MULADD_IEEE              R1.y,  R1.z, KC0[2].y, PV.y
> 0032 01104801 408288FE            MULADD_IEEE              R4.z,  R1.z, KC0[2].z, PV.z
> 0034 01904801 60628CFE            MULADD_IEEE              R3.w,  R1.z, KC0[2].w, PV.w
> 0036 80000002 80001910            MOV_sat                  R0.x,  R2.x
> 0038 00106C01 006280FE     4      MULADD_IEEE              R3.x,  R1.w, KC0[3].x, PV.x
> 0040 00906C01 206284FE            MULADD_IEEE              R3.y,  R1.w, KC0[3].y, PV.y
> 0042 01106C01 406288FE            MULADD_IEEE              R3.z,  R1.w, KC0[3].z, PV.z
> 0044 01906C01 60628CFE            MULADD_IEEE              R3.w,  R1.w, KC0[3].w, PV.w
> 0046 80000402 A0001910            MOV_sat                  R0.y,  R2.y
> 0048 00000802 C0001910     5      MOV_sat                  R0.z,  R2.z
> 0050 80000C02 E0001910            MOV_sat                  R0.w,  R2.w
>0004 C001A03C 94400688 CF_NATIVE
>0006 C0004000 94600688 CF_NATIVE
>0008 00000000 80200000 CF_NATIVE
>0010 00000000 00000000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 0)
>  %1 = call float @llvm.R600.load.input(i32 1)
>  %2 = call float @llvm.R600.load.input(i32 2)
>  %3 = call float @llvm.R600.load.input(i32 3)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %7, i32 0, i32 0)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 4 dw -- 1 gprs -- 1 nstack -------------
>shader 32 -- 6
>0000 C0000000 94600688 CF_NATIVE
>0002 00000000 80200000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>[13:14:0515/132754:ERROR:audio_output_device.cc(186)] Not implemented reached in virtual void media::AudioOutputDevice::OnStateChanged(media::AudioOutputIPCDelegate::State)
>--------------------------------------------------------------
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL TEMP[0..1], LOCAL
>  0: MOV TEMP[0].z, IN[1].xxxx
>  1: MOV TEMP[0].xy, IN[0].zwzz
>  2: MOV TEMP[1].xy, IN[0].xyyy
>  3: TEX TEMP[1].xw, TEMP[1], SAMP[0], 2D
>  4: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xxxx
>  5: MOV TEMP[0].w, TEMP[1].wwww
>  6: MOV OUT[0], TEMP[0]
>  7: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 0)
>  %1 = call float @llvm.R600.load.input(i32 1)
>  %2 = call float @llvm.R600.load.input(i32 2)
>  %3 = call float @llvm.R600.load.input(i32 3)
>  %4 = call float @llvm.R600.load.input(i32 4)
>  %5 = call float @llvm.R600.load.input(i32 5)
>  %6 = call float @llvm.R600.load.input(i32 6)
>  %7 = call float @llvm.R600.load.input(i32 7)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float 0.000000e+00, i32 2
>  %11 = insertelement <4 x float> %10, float 0.000000e+00, i32 3
>  %12 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %11, i32 16, i32 0, i32 2)
>  %13 = extractelement <4 x float> %12, i32 0
>  %14 = extractelement <4 x float> %12, i32 3
>  %15 = fmul float %2, %13
>  %16 = fmul float %3, %13
>  %17 = fmul float %4, %13
>  %18 = insertelement <4 x float> undef, float %15, i32 0
>  %19 = insertelement <4 x float> %18, float %16, i32 1
>  %20 = insertelement <4 x float> %19, float %17, i32 2
>  %21 = insertelement <4 x float> %20, float %14, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %21, i32 0, i32 0)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>; Function Attrs: readnone
>declare <4 x float> @llvm.AMDGPU.tex(<4 x float>, i32, i32, i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 30 dw -- 3 gprs -- 1 nstack -------------
>shader 33 -- 6
>0000 00000008 A00C0000  ALU 4 @16 
> 0016 00000000 00401910     1      MOV                      R2.x,  R0.x
> 0018 00000400 20401910            MOV                      R2.y,  R0.y
> 0020 800000F8 40401910            MOV                      R2.z,  0
> 0022 800008FE 60401910     2      MOV                      R2.w,  PV.z
>0002 00000006 80800000 CF_NATIVE
>0004 0000000C A0080000  ALU 3 @24 
> 0024 00004800 00400210     3      MUL_IEEE                 R2.x,  R0.z, R2.x
> 0026 00004C00 20400210            MUL_IEEE                 R2.y,  R0.w, R2.x
> 0028 80004001 40400210            MUL_IEEE                 R2.z,  R1.x, R2.x
>0006 C0010000 94600688 CF_NATIVE
>0008 00000000 80200000 CF_NATIVE
>0010 00000000 00000000 CF_NATIVE
>0012 00021010 F00D1002 CF_NATIVE
>0014 68800000 00000000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[19]
>DCL OUT[2], GENERIC[20]
>DCL CONST[0..8]
>DCL TEMP[0..2], LOCAL
>IMM[0] FLT32 {   -0.0300,    10.0000,     1.0000,     0.3000}
>IMM[1] FLT32 {    0.3000,     0.5000,     1.0000,     0.0000}
>  0: MUL TEMP[0], CONST[1], IN[0].xxxx
>  1: MAD TEMP[0], CONST[2], IN[0].yyyy, TEMP[0]
>  2: ADD TEMP[0], TEMP[0], CONST[4]
>  3: MUL TEMP[1], CONST[5], TEMP[0].xxxx
>  4: MAD TEMP[1], CONST[6], TEMP[0].yyyy, TEMP[1]
>  5: MAD TEMP[1], CONST[7], TEMP[0].zzzz, TEMP[1]
>  6: MAD TEMP[1], CONST[8], TEMP[0].wwww, TEMP[1]
>  7: ADD TEMP[0].x, TEMP[0].zzzz, IMM[0].yyyy
>  8: MUL_SAT TEMP[0].x, IMM[0].xxxx, TEMP[0].xxxx
>  9: ADD TEMP[2].x, IMM[0].zzzz, -TEMP[0].xxxx
> 10: MUL TEMP[0].xyz, TEMP[0].xxxx, IMM[1].xyzz
> 11: MAD TEMP[0].xyz, CONST[0].xyzz, TEMP[2].xxxx, TEMP[0].xyzz
> 12: MOV TEMP[2].xy, IN[1].xyxx
> 13: MOV TEMP[2].zw, TEMP[0].yyxy
> 14: MOV TEMP[0].x, TEMP[0].zzzz
> 15: MOV OUT[1], TEMP[2]
> 16: MOV OUT[2], TEMP[0]
> 17: MOV OUT[0], TEMP[1]
> 18: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %9 = extractelement <4 x float> %8, i32 0
>  %10 = fmul float %9, %0
>  %11 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %12 = extractelement <4 x float> %11, i32 1
>  %13 = fmul float %12, %0
>  %14 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %15 = extractelement <4 x float> %14, i32 2
>  %16 = fmul float %15, %0
>  %17 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %18 = extractelement <4 x float> %17, i32 3
>  %19 = fmul float %18, %0
>  %20 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %21 = extractelement <4 x float> %20, i32 0
>  %22 = fmul float %21, %1
>  %23 = fadd float %22, %10
>  %24 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %25 = extractelement <4 x float> %24, i32 1
>  %26 = fmul float %25, %1
>  %27 = fadd float %26, %13
>  %28 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %29 = extractelement <4 x float> %28, i32 2
>  %30 = fmul float %29, %1
>  %31 = fadd float %30, %16
>  %32 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %33 = extractelement <4 x float> %32, i32 3
>  %34 = fmul float %33, %1
>  %35 = fadd float %34, %19
>  %36 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 4)
>  %37 = extractelement <4 x float> %36, i32 0
>  %38 = fadd float %23, %37
>  %39 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 4)
>  %40 = extractelement <4 x float> %39, i32 1
>  %41 = fadd float %27, %40
>  %42 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 4)
>  %43 = extractelement <4 x float> %42, i32 2
>  %44 = fadd float %31, %43
>  %45 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 4)
>  %46 = extractelement <4 x float> %45, i32 3
>  %47 = fadd float %35, %46
>  %48 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 5)
>  %49 = extractelement <4 x float> %48, i32 0
>  %50 = fmul float %49, %38
>  %51 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 5)
>  %52 = extractelement <4 x float> %51, i32 1
>  %53 = fmul float %52, %38
>  %54 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 5)
>  %55 = extractelement <4 x float> %54, i32 2
>  %56 = fmul float %55, %38
>  %57 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 5)
>  %58 = extractelement <4 x float> %57, i32 3
>  %59 = fmul float %58, %38
>  %60 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 6)
>  %61 = extractelement <4 x float> %60, i32 0
>  %62 = fmul float %61, %41
>  %63 = fadd float %62, %50
>  %64 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 6)
>  %65 = extractelement <4 x float> %64, i32 1
>  %66 = fmul float %65, %41
>  %67 = fadd float %66, %53
>  %68 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 6)
>  %69 = extractelement <4 x float> %68, i32 2
>  %70 = fmul float %69, %41
>  %71 = fadd float %70, %56
>  %72 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 6)
>  %73 = extractelement <4 x float> %72, i32 3
>  %74 = fmul float %73, %41
>  %75 = fadd float %74, %59
>  %76 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 7)
>  %77 = extractelement <4 x float> %76, i32 0
>  %78 = fmul float %77, %44
>  %79 = fadd float %78, %63
>  %80 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 7)
>  %81 = extractelement <4 x float> %80, i32 1
>  %82 = fmul float %81, %44
>  %83 = fadd float %82, %67
>  %84 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 7)
>  %85 = extractelement <4 x float> %84, i32 2
>  %86 = fmul float %85, %44
>  %87 = fadd float %86, %71
>  %88 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 7)
>  %89 = extractelement <4 x float> %88, i32 3
>  %90 = fmul float %89, %44
>  %91 = fadd float %90, %75
>  %92 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 8)
>  %93 = extractelement <4 x float> %92, i32 0
>  %94 = fmul float %93, %47
>  %95 = fadd float %94, %79
>  %96 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 8)
>  %97 = extractelement <4 x float> %96, i32 1
>  %98 = fmul float %97, %47
>  %99 = fadd float %98, %83
>  %100 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 8)
>  %101 = extractelement <4 x float> %100, i32 2
>  %102 = fmul float %101, %47
>  %103 = fadd float %102, %87
>  %104 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 8)
>  %105 = extractelement <4 x float> %104, i32 3
>  %106 = fmul float %105, %47
>  %107 = fadd float %106, %91
>  %108 = fadd float %44, 1.000000e+01
>  %109 = fmul float 0xBF9EB851E0000000, %108
>  %110 = call float @llvm.AMDIL.clamp.(float %109, float 0.000000e+00, float 1.000000e+00)
>  %111 = fsub float -0.000000e+00, %110
>  %112 = fadd float 1.000000e+00, %111
>  %113 = fmul float %110, 0x3FD3333340000000
>  %114 = fmul float %110, 5.000000e-01
>  %115 = fmul float %110, 1.000000e+00
>  %116 = load <4 x float> addrspace(8)* null
>  %117 = extractelement <4 x float> %116, i32 0
>  %118 = fmul float %117, %112
>  %119 = fadd float %118, %113
>  %120 = load <4 x float> addrspace(8)* null
>  %121 = extractelement <4 x float> %120, i32 1
>  %122 = fmul float %121, %112
>  %123 = fadd float %122, %114
>  %124 = load <4 x float> addrspace(8)* null
>  %125 = extractelement <4 x float> %124, i32 2
>  %126 = fmul float %125, %112
>  %127 = fadd float %126, %115
>  %128 = insertelement <4 x float> undef, float %95, i32 0
>  %129 = insertelement <4 x float> %128, float %99, i32 1
>  %130 = insertelement <4 x float> %129, float %103, i32 2
>  %131 = insertelement <4 x float> %130, float %107, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %131, i32 60, i32 1)
>  %132 = insertelement <4 x float> undef, float %4, i32 0
>  %133 = insertelement <4 x float> %132, float %5, i32 1
>  %134 = insertelement <4 x float> %133, float %119, i32 2
>  %135 = insertelement <4 x float> %134, float %123, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %135, i32 0, i32 2)
>  %136 = insertelement <4 x float> undef, float %127, i32 0
>  %137 = insertelement <4 x float> %136, float %123, i32 1
>  %138 = insertelement <4 x float> %137, float %127, i32 2
>  %139 = insertelement <4 x float> %138, float %47, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %139, i32 1, i32 2)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 94 dw -- 6 gprs -- 1 nstack -------------
>shader 34 -- 6
>0000 00000000 89800000  CALL_FS @0 
>0002 80000006 A0A00000  ALU 41 @12 KC0[CB0:0-32] 
> 0012 00002C81 00000210     1      MUL_IEEE                 R0.x,  KC0[1].w, R1.x
> 0014 00002481 20000210            MUL_IEEE                 R0.y,  KC0[1].y, R1.x
> 0016 00002881 40000210            MUL_IEEE                 R0.z,  KC0[1].z, R1.x
> 0018 80002081 60000210            MUL_IEEE                 R0.w,  KC0[1].x, R1.x
> 0020 00802C82 002280FE     2      MULADD_IEEE              R1.x,  KC0[2].w, R1.y, PV.x
> 0022 00802482 200284FE            MULADD_IEEE              R0.y,  KC0[2].y, R1.y, PV.y
> 0024 00802882 400288FE            MULADD_IEEE              R0.z,  KC0[2].z, R1.y, PV.z
> 0026 80802082 60028CFE            MULADD_IEEE              R0.w,  KC0[2].x, R1.y, PV.w
> 0028 009084FE 00600010     3      ADD                      R3.x,  PV.y, KC0[4].y
> 0030 011088FE 20600010            ADD                      R3.y,  PV.z, KC0[4].z
> 0032 80108CFE 40600010            ADD                      R3.z,  PV.w, KC0[4].x
> 0034 001FA4FE 00000010     4      ADD                      R0.x,  PV.y, [0x41200000 10.000000]
> 0036 011FCC85 20000210            MUL_IEEE                 R0.y,  KC0[5].w, PV.z
> 0038 011FC085 40000210            MUL_IEEE                 R0.z,  KC0[5].x, PV.z
> 0040 811FC485 60000210            MUL_IEEE                 R0.w,  KC0[5].y, PV.z
> 0042 41200000                                               10.000000 (1092616192)
> 0044 001FA0FE 80000210     5      MUL_IEEE_sat             R0.x,  PV.x, [0xBCF5C28F -0.030000]
> 0046 00006C86 200284FE            MULADD_IEEE              R0.y,  KC0[6].w, R3.x, PV.y
> 0048 00006086 402288FE            MULADD_IEEE              R1.z,  KC0[6].x, R3.x, PV.z
> 0050 80006486 60628CFE            MULADD_IEEE              R3.w,  KC0[6].y, R3.x, PV.w
> 0052 BCF5C28F                                               -0.030000 (-1124744561)
> 0054 001F80FE 00A00210     6      MUL_IEEE                 R5.x,  PV.x, 0.5
> 0056 001F30FE 20800010            ADD                      R4.y,  -PV.x, 1.0
> 0058 001FA0FE 40800210            MUL_IEEE                 R4.z,  PV.x, [0x3E99999A 0.300000]
> 0060 80806C87 602284FE            MULADD_IEEE              R1.w,  KC0[7].w, R3.y, PV.y
> 0062 3E99999A                                               0.300000 (1050253722)
> 0064 009FC880 00028000     7      MULADD_IEEE              R0.x,  KC0[0].z, PV.y, R0.x
> 0066 00806487 20228C03            MULADD_IEEE              R1.y,  KC0[7].y, R3.y, R3.w
> 0068 00806087 40228801            MULADD_IEEE              R1.z,  KC0[7].x, R3.y, R1.z
> 0070 81006885 00800210            MUL_IEEE                 R4.x,  KC0[5].z, R3.z
> 0072 00006886 006280FF     8      MULADD_IEEE              R3.x,  KC0[6].z, R3.x, PS
> 0074 00808480 20028005            MULADD_IEEE              R0.y,  KC0[0].y, R4.y, R5.x
> 0076 00808080 40428804            MULADD_IEEE              R2.z,  KC0[0].x, R4.y, R4.z
> 0078 81908001 60000010            ADD                      R0.w,  R1.x, KC0[4].w
> 0080 00806887 002280FE     9      MULADD_IEEE              R1.x,  KC0[7].z, R3.y, PV.x
> 0082 819FCC88 60628C01            MULADD_IEEE              R3.w,  KC0[8].w, PV.w, R1.w
> 0084 01800088 00628801    10      MULADD_IEEE              R3.x,  KC0[8].x, R0.w, R1.z
> 0086 01800488 20628401            MULADD_IEEE              R3.y,  KC0[8].y, R0.w, R1.y
> 0088 01800888 406280FE            MULADD_IEEE              R3.z,  KC0[8].z, R0.w, PV.x
> 0090 00000400 60401910            MOV                      R2.w,  R0.y
> 0092 80000000 40001910            MOV                      R0.z,  R0.x
>0004 C001A03C 94400688 CF_NATIVE
>0006 C0014000 93C00688 CF_NATIVE
>0008 C0004001 94600688 CF_NATIVE
>0010 00000000 80200000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 0)
>  %1 = call float @llvm.R600.load.input(i32 1)
>  %2 = call float @llvm.R600.load.input(i32 2)
>  %3 = call float @llvm.R600.load.input(i32 3)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %7, i32 0, i32 0)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 4 dw -- 1 gprs -- 1 nstack -------------
>shader 35 -- 6
>0000 C0000000 94600688 CF_NATIVE
>0002 00000000 80200000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[19]
>DCL CONST[0..8]
>DCL TEMP[0..4], LOCAL
>IMM[0] FLT32 {    1.0000,     0.0000,     0.3000,     0.2000}
>IMM[1] FLT32 {    0.0000,    -1.0000,   120.0000,    -0.0400}
>IMM[2] FLT32 {   -0.4034,     0.2590,     0.8776,     0.0000}
>IMM[3] FLT32 {    5.0000,     0.3000,     0.5000,     1.0000}
>  0: LRP TEMP[0].xyz, CONST[0].xxxx, IN[1].xyzz, IN[0].xyzz
>  1: MUL TEMP[1], CONST[1], TEMP[0].xxxx
>  2: MAD TEMP[1], CONST[2], TEMP[0].yyyy, TEMP[1]
>  3: MAD TEMP[0], CONST[3], TEMP[0].zzzz, TEMP[1]
>  4: ADD TEMP[0], TEMP[0], CONST[4]
>  5: MUL TEMP[1], CONST[5], TEMP[0].xxxx
>  6: MAD TEMP[1], CONST[6], TEMP[0].yyyy, TEMP[1]
>  7: MAD TEMP[1], CONST[7], TEMP[0].zzzz, TEMP[1]
>  8: MAD TEMP[1], CONST[8], TEMP[0].wwww, TEMP[1]
>  9: LRP TEMP[2].xyz, CONST[0].xxxx, IN[3].xyzz, IN[2].xyzz
> 10: MUL TEMP[3], CONST[1], TEMP[2].xxxx
> 11: MAD TEMP[3], CONST[2], TEMP[2].yyyy, TEMP[3]
> 12: MAD TEMP[2], CONST[3], TEMP[2].zzzz, TEMP[3]
> 13: MAX TEMP[3].x, IMM[0].yyyy, -IN[2].yyyy
> 14: ADD TEMP[3].x, IMM[0].zzzz, TEMP[3].xxxx
> 15: DP4 TEMP[4].x, -TEMP[2], IMM[1].xxyx
> 16: MAX TEMP[4].x, IMM[0].wwww, TEMP[4].xxxx
> 17: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[4].xxxx
> 18: DP4 TEMP[2].x, TEMP[2], IMM[2]
> 19: ABS TEMP[2].x, TEMP[2].xxxx
> 20: MAX TEMP[2].x, IMM[0].yyyy, TEMP[2].xxxx
> 21: POW TEMP[2].x, TEMP[2].xxxx, IMM[1].zzzz
> 22: ADD TEMP[3].x, TEMP[3].xxxx, TEMP[2].xxxx
> 23: ADD TEMP[0].x, TEMP[0].zzzz, IMM[3].xxxx
> 24: MUL_SAT TEMP[0].x, IMM[1].wwww, TEMP[0].xxxx
> 25: MOV TEMP[2].w, IMM[0].xxxx
> 26: ADD TEMP[4].x, IMM[0].xxxx, -TEMP[0].xxxx
> 27: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[4].xxxx
> 28: MAD TEMP[2].xyz, TEMP[0].xxxx, IMM[3].yzww, TEMP[3].xxxx
> 29: MOV OUT[1], TEMP[2]
> 30: MOV OUT[0], TEMP[1]
> 31: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = call float @llvm.R600.load.input(i32 12)
>  %9 = call float @llvm.R600.load.input(i32 13)
>  %10 = call float @llvm.R600.load.input(i32 14)
>  %11 = call float @llvm.R600.load.input(i32 15)
>  %12 = call float @llvm.R600.load.input(i32 16)
>  %13 = call float @llvm.R600.load.input(i32 17)
>  %14 = call float @llvm.R600.load.input(i32 18)
>  %15 = call float @llvm.R600.load.input(i32 19)
>  %16 = load <4 x float> addrspace(8)* null
>  %17 = extractelement <4 x float> %16, i32 0
>  %18 = call float @llvm.AMDGPU.lrp(float %17, float %4, float %0)
>  %19 = load <4 x float> addrspace(8)* null
>  %20 = extractelement <4 x float> %19, i32 0
>  %21 = call float @llvm.AMDGPU.lrp(float %20, float %5, float %1)
>  %22 = load <4 x float> addrspace(8)* null
>  %23 = extractelement <4 x float> %22, i32 0
>  %24 = call float @llvm.AMDGPU.lrp(float %23, float %6, float %2)
>  %25 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %26 = extractelement <4 x float> %25, i32 0
>  %27 = fmul float %26, %18
>  %28 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %29 = extractelement <4 x float> %28, i32 1
>  %30 = fmul float %29, %18
>  %31 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %32 = extractelement <4 x float> %31, i32 2
>  %33 = fmul float %32, %18
>  %34 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %35 = extractelement <4 x float> %34, i32 3
>  %36 = fmul float %35, %18
>  %37 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %38 = extractelement <4 x float> %37, i32 0
>  %39 = fmul float %38, %21
>  %40 = fadd float %39, %27
>  %41 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %42 = extractelement <4 x float> %41, i32 1
>  %43 = fmul float %42, %21
>  %44 = fadd float %43, %30
>  %45 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %46 = extractelement <4 x float> %45, i32 2
>  %47 = fmul float %46, %21
>  %48 = fadd float %47, %33
>  %49 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %50 = extractelement <4 x float> %49, i32 3
>  %51 = fmul float %50, %21
>  %52 = fadd float %51, %36
>  %53 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %54 = extractelement <4 x float> %53, i32 0
>  %55 = fmul float %54, %24
>  %56 = fadd float %55, %40
>  %57 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %58 = extractelement <4 x float> %57, i32 1
>  %59 = fmul float %58, %24
>  %60 = fadd float %59, %44
>  %61 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %62 = extractelement <4 x float> %61, i32 2
>  %63 = fmul float %62, %24
>  %64 = fadd float %63, %48
>  %65 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %66 = extractelement <4 x float> %65, i32 3
>  %67 = fmul float %66, %24
>  %68 = fadd float %67, %52
>  %69 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 4)
>  %70 = extractelement <4 x float> %69, i32 0
>  %71 = fadd float %56, %70
>  %72 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 4)
>  %73 = extractelement <4 x float> %72, i32 1
>  %74 = fadd float %60, %73
>  %75 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 4)
>  %76 = extractelement <4 x float> %75, i32 2
>  %77 = fadd float %64, %76
>  %78 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 4)
>  %79 = extractelement <4 x float> %78, i32 3
>  %80 = fadd float %68, %79
>  %81 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 5)
>  %82 = extractelement <4 x float> %81, i32 0
>  %83 = fmul float %82, %71
>  %84 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 5)
>  %85 = extractelement <4 x float> %84, i32 1
>  %86 = fmul float %85, %71
>  %87 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 5)
>  %88 = extractelement <4 x float> %87, i32 2
>  %89 = fmul float %88, %71
>  %90 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 5)
>  %91 = extractelement <4 x float> %90, i32 3
>  %92 = fmul float %91, %71
>  %93 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 6)
>  %94 = extractelement <4 x float> %93, i32 0
>  %95 = fmul float %94, %74
>  %96 = fadd float %95, %83
>  %97 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 6)
>  %98 = extractelement <4 x float> %97, i32 1
>  %99 = fmul float %98, %74
>  %100 = fadd float %99, %86
>  %101 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 6)
>  %102 = extractelement <4 x float> %101, i32 2
>  %103 = fmul float %102, %74
>  %104 = fadd float %103, %89
>  %105 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 6)
>  %106 = extractelement <4 x float> %105, i32 3
>  %107 = fmul float %106, %74
>  %108 = fadd float %107, %92
>  %109 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 7)
>  %110 = extractelement <4 x float> %109, i32 0
>  %111 = fmul float %110, %77
>  %112 = fadd float %111, %96
>  %113 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 7)
>  %114 = extractelement <4 x float> %113, i32 1
>  %115 = fmul float %114, %77
>  %116 = fadd float %115, %100
>  %117 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 7)
>  %118 = extractelement <4 x float> %117, i32 2
>  %119 = fmul float %118, %77
>  %120 = fadd float %119, %104
>  %121 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 7)
>  %122 = extractelement <4 x float> %121, i32 3
>  %123 = fmul float %122, %77
>  %124 = fadd float %123, %108
>  %125 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 8)
>  %126 = extractelement <4 x float> %125, i32 0
>  %127 = fmul float %126, %80
>  %128 = fadd float %127, %112
>  %129 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 8)
>  %130 = extractelement <4 x float> %129, i32 1
>  %131 = fmul float %130, %80
>  %132 = fadd float %131, %116
>  %133 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 8)
>  %134 = extractelement <4 x float> %133, i32 2
>  %135 = fmul float %134, %80
>  %136 = fadd float %135, %120
>  %137 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 8)
>  %138 = extractelement <4 x float> %137, i32 3
>  %139 = fmul float %138, %80
>  %140 = fadd float %139, %124
>  %141 = load <4 x float> addrspace(8)* null
>  %142 = extractelement <4 x float> %141, i32 0
>  %143 = call float @llvm.AMDGPU.lrp(float %142, float %12, float %8)
>  %144 = load <4 x float> addrspace(8)* null
>  %145 = extractelement <4 x float> %144, i32 0
>  %146 = call float @llvm.AMDGPU.lrp(float %145, float %13, float %9)
>  %147 = load <4 x float> addrspace(8)* null
>  %148 = extractelement <4 x float> %147, i32 0
>  %149 = call float @llvm.AMDGPU.lrp(float %148, float %14, float %10)
>  %150 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %151 = extractelement <4 x float> %150, i32 0
>  %152 = fmul float %151, %143
>  %153 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %154 = extractelement <4 x float> %153, i32 1
>  %155 = fmul float %154, %143
>  %156 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %157 = extractelement <4 x float> %156, i32 2
>  %158 = fmul float %157, %143
>  %159 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %160 = extractelement <4 x float> %159, i32 3
>  %161 = fmul float %160, %143
>  %162 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %163 = extractelement <4 x float> %162, i32 0
>  %164 = fmul float %163, %146
>  %165 = fadd float %164, %152
>  %166 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %167 = extractelement <4 x float> %166, i32 1
>  %168 = fmul float %167, %146
>  %169 = fadd float %168, %155
>  %170 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %171 = extractelement <4 x float> %170, i32 2
>  %172 = fmul float %171, %146
>  %173 = fadd float %172, %158
>  %174 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %175 = extractelement <4 x float> %174, i32 3
>  %176 = fmul float %175, %146
>  %177 = fadd float %176, %161
>  %178 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %179 = extractelement <4 x float> %178, i32 0
>  %180 = fmul float %179, %149
>  %181 = fadd float %180, %165
>  %182 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %183 = extractelement <4 x float> %182, i32 1
>  %184 = fmul float %183, %149
>  %185 = fadd float %184, %169
>  %186 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %187 = extractelement <4 x float> %186, i32 2
>  %188 = fmul float %187, %149
>  %189 = fadd float %188, %173
>  %190 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %191 = extractelement <4 x float> %190, i32 3
>  %192 = fmul float %191, %149
>  %193 = fadd float %192, %177
>  %194 = fsub float -0.000000e+00, %9
>  %195 = fcmp uge float 0.000000e+00, %194
>  %196 = select i1 %195, float 0.000000e+00, float %194
>  %197 = fadd float 0x3FD3333340000000, %196
>  %198 = fsub float -0.000000e+00, %181
>  %199 = fsub float -0.000000e+00, %185
>  %200 = fsub float -0.000000e+00, %189
>  %201 = fsub float -0.000000e+00, %193
>  %202 = insertelement <4 x float> undef, float %198, i32 0
>  %203 = insertelement <4 x float> %202, float %199, i32 1
>  %204 = insertelement <4 x float> %203, float %200, i32 2
>  %205 = insertelement <4 x float> %204, float %201, i32 3
>  %206 = call float @llvm.AMDGPU.dp4(<4 x float> %205, <4 x float> <float 0.000000e+00, float 0.000000e+00, float -1.000000e+00, float 0.000000e+00>)
>  %207 = fcmp uge float 0x3FC99999A0000000, %206
>  %208 = select i1 %207, float 0x3FC99999A0000000, float %206
>  %209 = fmul float %197, %208
>  %210 = insertelement <4 x float> undef, float %181, i32 0
>  %211 = insertelement <4 x float> %210, float %185, i32 1
>  %212 = insertelement <4 x float> %211, float %189, i32 2
>  %213 = insertelement <4 x float> %212, float %193, i32 3
>  %214 = call float @llvm.AMDGPU.dp4(<4 x float> %213, <4 x float> <float 0xBFD9D14E40000000, float 0x3FD09374C0000000, float 0x3FEC154CA0000000, float 0.000000e+00>)
>  %215 = call float @fabs(float %214)
>  %216 = fcmp uge float 0.000000e+00, %215
>  %217 = select i1 %216, float 0.000000e+00, float %215
>  %218 = call float @llvm.pow.f32(float %217, float 1.200000e+02)
>  %219 = fadd float %209, %218
>  %220 = fadd float %77, 5.000000e+00
>  %221 = fmul float 0xBFA47AE140000000, %220
>  %222 = call float @llvm.AMDIL.clamp.(float %221, float 0.000000e+00, float 1.000000e+00)
>  %223 = fsub float -0.000000e+00, %222
>  %224 = fadd float 1.000000e+00, %223
>  %225 = fmul float %219, %224
>  %226 = fmul float %222, 0x3FD3333340000000
>  %227 = fadd float %226, %225
>  %228 = fmul float %222, 5.000000e-01
>  %229 = fadd float %228, %225
>  %230 = fmul float %222, 1.000000e+00
>  %231 = fadd float %230, %225
>  %232 = insertelement <4 x float> undef, float %128, i32 0
>  %233 = insertelement <4 x float> %232, float %132, i32 1
>  %234 = insertelement <4 x float> %233, float %136, i32 2
>  %235 = insertelement <4 x float> %234, float %140, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %235, i32 60, i32 1)
>  %236 = insertelement <4 x float> undef, float %227, i32 0
>  %237 = insertelement <4 x float> %236, float %229, i32 1
>  %238 = insertelement <4 x float> %237, float %231, i32 2
>  %239 = insertelement <4 x float> %238, float 1.000000e+00, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %239, i32 0, i32 2)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDGPU.lrp(float, float, float) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDGPU.dp4(<4 x float>, <4 x float>) #1
>
>; Function Attrs: readonly
>declare float @fabs(float) #2
>
>; Function Attrs: nounwind readonly
>declare float @llvm.pow.f32(float, float) #3
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>attributes #2 = { readonly }
>attributes #3 = { nounwind readonly }
>--------------------------------------------------------------
>bytecode 214 dw -- 8 gprs -- 1 nstack -------------
>shader 36 -- 6
>0000 00000000 89800000  CALL_FS @0 
>0002 80000006 A1900000  ALU 101 @12 KC0[CB0:0-32] 
> 0012 02807403 000320F8     1      CNDGT                    R0.x,  -R3.y, -R3.y, 0
> 0014 001F3080 20A00010            ADD                      R5.y,  -KC0[0].x, 1.0
> 0016 800000FD 40C01910            MOV                      R6.z,  [0x3F60AA65 0.877600]
> 0018 3F60AA65                                               0.877600 (1063299685)
> 0020 001FA0FE 00A00010     2      ADD                      R5.x,  PV.x, [0x3E99999A 0.300000]
> 0022 010024FE 20000210            MUL_IEEE                 R0.y,  PV.y, R1.z
> 0024 008024FE 40000210            MUL_IEEE                 R0.z,  PV.y, R1.y
> 0026 800024FE 60000210            MUL_IEEE                 R0.w,  PV.y, R1.x
> 0028 3E99999A                                               0.300000 (1050253722)
> 0030 01004080 000684FE     3      MULADD_IEEE              R0.x,  KC0[0].x, R2.z, PV.y  BS:1
> 0032 00804080 200288FE            MULADD_IEEE              R0.y,  KC0[0].x, R2.y, PV.z
> 0034 00004080 40028CFE            MULADD_IEEE              R0.z,  KC0[0].x, R2.x, PV.w
> 0036 81006405 60000210            MUL_IEEE                 R0.w,  R5.y, R3.z
> 0038 011FCC81 00200210     4      MUL_IEEE                 R1.x,  KC0[1].w, PV.z
> 0040 011FC481 20200210            MUL_IEEE                 R1.y,  KC0[1].y, PV.z
> 0042 011FC081 40200210            MUL_IEEE                 R1.z,  KC0[1].x, PV.z
> 0044 811FC881 60200210            MUL_IEEE                 R1.w,  KC0[1].z, PV.z
> 0046 00800C82 002280FE     5      MULADD_IEEE              R1.x,  KC0[2].w, R0.y, PV.x
> 0048 00800482 202284FE            MULADD_IEEE              R1.y,  KC0[2].y, R0.y, PV.y
> 0050 00800082 400288FE            MULADD_IEEE              R0.z,  KC0[2].x, R0.y, PV.z
> 0052 80800882 60228CFE            MULADD_IEEE              R1.w,  KC0[2].z, R0.y, PV.w
> 0054 00000C83 002280FE     6      MULADD_IEEE              R1.x,  KC0[3].w, R0.x, PV.x
> 0056 00000483 200284FE            MULADD_IEEE              R0.y,  KC0[3].y, R0.x, PV.y
> 0058 00000083 400288FE            MULADD_IEEE              R0.z,  KC0[3].x, R0.x, PV.z
> 0060 80000883 60228CFE            MULADD_IEEE              R1.w,  KC0[3].z, R0.x, PV.w
> 0062 019080FE 00E00010     7      ADD                      R7.x,  PV.x, KC0[4].w
> 0064 009084FE 20000010            ADD                      R0.y,  PV.y, KC0[4].y
> 0066 001088FE 40000010            ADD                      R0.z,  PV.z, KC0[4].x
> 0068 81108CFE 60200010            ADD                      R1.w,  PV.w, KC0[4].z
> 0070 011FC885 00000210     8      MUL_IEEE                 R0.x,  KC0[5].z, PV.z
> 0072 011FC085 20200210            MUL_IEEE                 R1.y,  KC0[5].x, PV.z
> 0074 011FC485 40200210            MUL_IEEE                 R1.z,  KC0[5].y, PV.z
> 0076 811FCC85 60400210            MUL_IEEE                 R2.w,  KC0[5].w, PV.z
> 0078 00800886 000280FE     9      MULADD_IEEE              R0.x,  KC0[6].z, R0.y, PV.x
> 0080 00800086 202284FE            MULADD_IEEE              R1.y,  KC0[6].x, R0.y, PV.y
> 0082 00800486 400288FE            MULADD_IEEE              R0.z,  KC0[6].y, R0.y, PV.z
> 0084 80800C86 60428CFE            MULADD_IEEE              R2.w,  KC0[6].w, R0.y, PV.w
> 0086 01802887 004280FE    10      MULADD_IEEE              R2.x,  KC0[7].z, R1.w, PV.x
> 0088 01802087 20E284FE            MULADD_IEEE              R7.y,  KC0[7].x, R1.w, PV.y
> 0090 01802487 402288FE            MULADD_IEEE              R1.z,  KC0[7].y, R1.w, PV.z
> 0092 01802C87 60428CFE            MULADD_IEEE              R2.w,  KC0[7].w, R1.w, PV.w
> 0094 801FAC01 00200010            ADD                      R1.x,  R1.w, [0x40A00000 5.000000]
> 0096 40A00000                                               5.000000 (1084227584)
> 0098 001FA0FF 80200210    11      MUL_IEEE_sat             R1.x,  PS, [0xBD23D70A -0.040000]
> 0100 01008080 20228C00            MULADD_IEEE              R1.y,  KC0[0].x, R4.z, R0.w
> 0102 00806405 40400210            MUL_IEEE                 R2.z,  R5.y, R3.y
> 0104 8000EC88 60028CFE            MULADD_IEEE              R0.w,  KC0[8].w, R7.x, PV.w
> 0106 BD23D70A                                               -0.040000 (-1121724662)
> 0108 00808080 204288FE    12      MULADD_IEEE              R2.y,  KC0[0].x, R4.y, PV.z
> 0110 0000E888 400A8002            MULADD_IEEE              R0.z,  KC0[8].z, R7.x, R2.x  BS:2
> 0112 80006405 60200210            MUL_IEEE                 R1.w,  R5.y, R3.x
> 0114 001F3001 00400010    13      ADD                      R2.x,  -R1.x, 1.0
> 0116 0000E488 20068801            MULADD_IEEE              R0.y,  KC0[8].y, R7.x, R1.z  BS:1
> 0118 00008080 40228CFE            MULADD_IEEE              R1.z,  KC0[0].x, R4.x, PV.w
> 0120 8000E088 00068407            MULADD_IEEE              R0.x,  KC0[8].x, R7.x, R7.y  BS:1
> 0122 011FC081 20600210    14      MUL_IEEE                 R3.y,  KC0[1].x, PV.z
> 0124 811FC481 40400210            MUL_IEEE                 R2.z,  KC0[1].y, PV.z
> 0126 00804082 006284FE    15      MULADD_IEEE              R3.x,  KC0[2].x, R2.y, PV.y
> 0128 00804482 206288FE            MULADD_IEEE              R3.y,  KC0[2].y, R2.y, PV.z
> 0130 01002C81 40400210            MUL_IEEE                 R2.z,  KC0[1].w, R1.z
> 0132 81002881 60200210            MUL_IEEE                 R1.w,  KC0[1].z, R1.z
> 0134 00804C82 008288FE    16      MULADD_IEEE              R4.x,  KC0[2].w, R2.y, PV.z
> 0136 00804882 20428CFE            MULADD_IEEE              R2.y,  KC0[2].z, R2.y, PV.w
> 0138 800000FD 20C01910            MOV                      R6.y,  [0x3E849BA6 0.259000]
> 0140 3E849BA6                                               0.259000 (1048877990)
> 0142 000000FD 00C01910    17      MOV                      R6.x,  [0xBECE8A72 -0.403400]
> 0144 00802883 408284FE            MULADD_IEEE              R4.z,  KC0[3].z, R1.y, PV.y
> 0146 00802C83 608280FE            MULADD_IEEE              R4.w,  KC0[3].w, R1.y, PV.x
> 0148 80802083 00868003            MULADD_IEEE              R4.x,  KC0[3].x, R1.y, R3.x  BS:1
> 0150 BECE8A72                                               -0.403400 (-1093760398)
> 0152 00802483 20828403    18      MULADD_IEEE              R4.y,  KC0[3].y, R1.y, R3.y
> 0154 800000F8 60C01910            MOV                      R6.w,  0
> 0156 0000C004 00205000    19      DOT4                     __.x,  R4.x, R6.x
> 0158 0080C4FE 20205010            DOT4                     R1.y,  PV.y, R6.y
> 0160 0100C804 40205000            DOT4                     __.z,  R4.z, R6.z
> 0162 819FCC04 60205000            DOT4                     __.w,  R4.w, PV.w
> 0164 000000FE 00601911    20      MOV                      R3.x,  |PV.x|
> 0166 000010F9 40C01910            MOV                      R6.z,  -1.0
> 0168 80001C04 60E01910            MOV                      R7.w,  -R4.w
> 0170 801FC0FE 006320F8    21      CNDGT                    R3.x,  PV.x, PV.x, 0
> 0172 800000FE 00606310    22      LOG_IEEE                 R3.x,  PV.x
> 0174 801FE0FD 00600110    23      MUL                      R3.x,  [0x42F00000 120.000000], PS
> 0176 42F00000                                               120.000000 (1123024896)
> 0178 00000C06 00C01910    24      MOV                      R6.x,  R6.w
> 0180 800000FE 00606110            EXP_IEEE                 R3.x,  PV.x
> 0182 00001004 00E01910    25      MOV                      R7.x,  -R4.x
> 0184 00000C06 20C01910            MOV                      R6.y,  R6.w
> 0186 00001804 40E01910            MOV                      R7.z,  -R4.z
> 0188 80001404 20E01910            MOV                      R7.y,  -R4.y
> 0190 0000C0FE 00205000    26      DOT4                     __.x,  PV.x, R6.x
> 0192 009FC0FF 20205010            DOT4                     R1.y,  PS, PV.y
> 0194 0100C8FE 40205000            DOT4                     __.z,  PV.z, R6.z
> 0196 8180CC07 60205000            DOT4                     __.w,  R7.w, R6.w
> 0198 801FA0FE 00800310    27      MAX                      R4.x,  PV.x, [0x3E4CCCCD 0.200000]
> 0200 3E4CCCCD                                               0.200000 (1045220557)
> 0202 801FC005 00828003    28      MULADD_IEEE              R4.x,  R5.x, PV.x, R3.x
> 0204 000040FE 00600210    29      MUL_IEEE                 R3.x,  PV.x, R2.x
> 0206 800040FE 40428001            MULADD_IEEE              R2.z,  PV.x, R2.x, R1.x
> 0208 001FA001 004280FE    30      MULADD_IEEE              R2.x,  R1.x, [0x3E99999A 0.300000], PV.x
> 0210 801F8001 204280FE            MULADD_IEEE              R2.y,  R1.x, 0.5, PV.x
> 0212 3E99999A                                               0.300000 (1050253722)
>0004 C000203C 94400688 CF_NATIVE
>0006 C0014000 94600A88 CF_NATIVE
>0008 00000000 80200000 CF_NATIVE
>0010 00000000 00000000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32_FLOAT, }
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 1, src_format = PIPE_FORMAT_R32G32B32_FLOAT, }
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 2, src_format = PIPE_FORMAT_R32G32B32_FLOAT, }
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 3, src_format = PIPE_FORMAT_R32G32B32_FLOAT, }
>bytecode 20 dw -- 5 gprs -- 0 nstack -------------
>shader 37 -- 6
>0000 00000002 81000C00  VTX 4 @4 
> 0004 7C00A000 8C151001 00080000   VFETCH         R1.xyz1, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:48 NUM:0 COMP:0 MODE:1)
> 0008 7C00A100 8C151002 00080000   VFETCH         R2.xyz1, R0.x,  RID:161 VERTEX MFC:31 UCF:0 FMT(DTA:48 NUM:0 COMP:0 MODE:1)
> 0012 7C00A200 8C151003 00080000   VFETCH         R3.xyz1, R0.x,  RID:162 VERTEX MFC:31 UCF:0 FMT(DTA:48 NUM:0 COMP:0 MODE:1)
> 0016 7C00A300 8C151004 00080000   VFETCH         R4.xyz1, R0.x,  RID:163 VERTEX MFC:31 UCF:0 FMT(DTA:48 NUM:0 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32_FLOAT, }
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 1, src_format = PIPE_FORMAT_R32G32_FLOAT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 38 -- 6
>0000 00000002 81000400  VTX 2 @4 
> 0004 7C00A000 87961001 00080000   VFETCH         R1.xy01, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:30 NUM:0 COMP:0 MODE:1)
> 0008 7C00A100 87961002 00080000   VFETCH         R2.xy01, R0.x,  RID:161 VERTEX MFC:31 UCF:0 FMT(DTA:30 NUM:0 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 39 -- 6
>0000 00000002 81000400  VTX 2 @4 
> 0004 7C00A000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C00A000 88CD1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_SINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 40 -- 6
>0000 00000002 81000400  VTX 2 @4 
> 0004 7C00A000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C00A000 D88D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:1 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, }
>   {src_offset = 16, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_UINT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 41 -- 6
>0000 00000002 81000400  VTX 2 @4 
> 0004 7C00A000 88CD1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:35 NUM:0 COMP:0 MODE:1)
> 0008 7C00A000 988D1002 00080010   VFETCH         R2.xyzw, R0.x +16b,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 42 -- 6
>0000 00000002 81000000  VTX 1 @4 
> 0004 7C00A000 93564001 00080000   VFETCH         R1.x001, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:13 NUM:1 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 43 -- 6
>0000 00000002 81000000  VTX 1 @4 
> 0004 7C00A000 97561001 00080000   VFETCH         R1.xy01, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:29 NUM:1 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 44 -- 6
>0000 00000002 81000000  VTX 1 @4 
> 0004 7C00A000 9BD51001 00080000   VFETCH         R1.xyz1, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:47 NUM:1 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_UINT, }
>bytecode 8 dw -- 2 gprs -- 0 nstack -------------
>shader 45 -- 6
>0000 00000002 81000000  VTX 1 @4 
> 0004 7C00A000 988D1001 00080000   VFETCH         R1.xyzw, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:34 NUM:1 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  %12 = insertelement <4 x float> undef, float %4, i32 0
>  %13 = insertelement <4 x float> %12, float %5, i32 1
>  %14 = insertelement <4 x float> %13, float %6, i32 2
>  %15 = insertelement <4 x float> %14, float %7, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %15, i32 0, i32 2)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 8 dw -- 3 gprs -- 1 nstack -------------
>shader 46 -- 6
>0000 00000000 89800000  CALL_FS @0 
>0002 C000A03C 94400688 CF_NATIVE
>0004 C0014000 94600688 CF_NATIVE
>0006 00000000 80200000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>  0: MOV OUT[0], IN[0]
>  1: END
>STREAMOUT
>  0: MEM_STREAM0_BUF0[0..0] <- OUT[0].x
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.stream.output(<4 x float> %7, i32 0, i32 0, i32 1)
>  %8 = insertelement <4 x float> undef, float %0, i32 0
>  %9 = insertelement <4 x float> %8, float %1, i32 1
>  %10 = insertelement <4 x float> %9, float %2, i32 2
>  %11 = insertelement <4 x float> %10, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %11, i32 60, i32 1)
>  call void @llvm.R600.store.dummy(i32 2)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.stream.output(<4 x float>, i32, i32, i32)
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 12 dw -- 2 gprs -- 1 nstack -------------
>shader 47 -- 6
>0000 00000000 89800000  CALL_FS @0 
>0002 00008000 90401FFF CF_NATIVE
>0004 C000A03C 94400688 CF_NATIVE
>0006 C0004000 94600FFF CF_NATIVE
>0008 00000000 80200000 CF_NATIVE
>0010 00000000 00000000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 0)
>  %1 = call float @llvm.R600.load.input(i32 1)
>  %2 = call float @llvm.R600.load.input(i32 2)
>  %3 = call float @llvm.R600.load.input(i32 3)
>  call void @llvm.R600.store.dummy(i32 0)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.dummy(i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 4 dw -- 1 gprs -- 1 nstack -------------
>shader 48 -- 6
>0000 C0000000 94600FFF CF_NATIVE
>0002 00000000 80200000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], COLOR, COLOR
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 0)
>  %1 = call float @llvm.R600.load.input(i32 1)
>  %2 = call float @llvm.R600.load.input(i32 2)
>  %3 = call float @llvm.R600.load.input(i32 3)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %7, i32 0, i32 0)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 4 dw -- 1 gprs -- 1 nstack -------------
>shader 49 -- 6
>0000 C0000000 94600688 CF_NATIVE
>0002 00000000 80200000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = load <4 x float> addrspace(8)* null
>  %9 = extractelement <4 x float> %8, i32 0
>  %10 = fmul float %0, %9
>  %11 = load <4 x float> addrspace(8)* null
>  %12 = extractelement <4 x float> %11, i32 1
>  %13 = fmul float %0, %12
>  %14 = load <4 x float> addrspace(8)* null
>  %15 = extractelement <4 x float> %14, i32 2
>  %16 = fmul float %0, %15
>  %17 = load <4 x float> addrspace(8)* null
>  %18 = extractelement <4 x float> %17, i32 3
>  %19 = fmul float %0, %18
>  %20 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %21 = extractelement <4 x float> %20, i32 0
>  %22 = fmul float %1, %21
>  %23 = fadd float %22, %10
>  %24 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %25 = extractelement <4 x float> %24, i32 1
>  %26 = fmul float %1, %25
>  %27 = fadd float %26, %13
>  %28 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %29 = extractelement <4 x float> %28, i32 2
>  %30 = fmul float %1, %29
>  %31 = fadd float %30, %16
>  %32 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %33 = extractelement <4 x float> %32, i32 3
>  %34 = fmul float %1, %33
>  %35 = fadd float %34, %19
>  %36 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %37 = extractelement <4 x float> %36, i32 0
>  %38 = fmul float %2, %37
>  %39 = fadd float %38, %23
>  %40 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %41 = extractelement <4 x float> %40, i32 1
>  %42 = fmul float %2, %41
>  %43 = fadd float %42, %27
>  %44 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %45 = extractelement <4 x float> %44, i32 2
>  %46 = fmul float %2, %45
>  %47 = fadd float %46, %31
>  %48 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %49 = extractelement <4 x float> %48, i32 3
>  %50 = fmul float %2, %49
>  %51 = fadd float %50, %35
>  %52 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %53 = extractelement <4 x float> %52, i32 0
>  %54 = fmul float %3, %53
>  %55 = fadd float %54, %39
>  %56 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %57 = extractelement <4 x float> %56, i32 1
>  %58 = fmul float %3, %57
>  %59 = fadd float %58, %43
>  %60 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %61 = extractelement <4 x float> %60, i32 2
>  %62 = fmul float %3, %61
>  %63 = fadd float %62, %47
>  %64 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %65 = extractelement <4 x float> %64, i32 3
>  %66 = fmul float %3, %65
>  %67 = fadd float %66, %51
>  %68 = call float @llvm.AMDIL.clamp.(float %4, float 0.000000e+00, float 1.000000e+00)
>  %69 = call float @llvm.AMDIL.clamp.(float %5, float 0.000000e+00, float 1.000000e+00)
>  %70 = call float @llvm.AMDIL.clamp.(float %6, float 0.000000e+00, float 1.000000e+00)
>  %71 = call float @llvm.AMDIL.clamp.(float %7, float 0.000000e+00, float 1.000000e+00)
>  %72 = insertelement <4 x float> undef, float %55, i32 0
>  %73 = insertelement <4 x float> %72, float %59, i32 1
>  %74 = insertelement <4 x float> %73, float %63, i32 2
>  %75 = insertelement <4 x float> %74, float %67, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %75, i32 60, i32 1)
>  %76 = insertelement <4 x float> undef, float %68, i32 0
>  %77 = insertelement <4 x float> %76, float %69, i32 1
>  %78 = insertelement <4 x float> %77, float %70, i32 2
>  %79 = insertelement <4 x float> %78, float %71, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %79, i32 0, i32 2)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 52 dw -- 5 gprs -- 1 nstack -------------
>shader 50 -- 6
>0000 00000000 89800000  CALL_FS @0 
>0002 80000006 A04C0000  ALU 20 @12 KC0[CB0:0-32] 
> 0012 00100001 00000210     1      MUL_IEEE                 R0.x,  R1.x, KC0[0].x
> 0014 00900001 20000210            MUL_IEEE                 R0.y,  R1.x, KC0[0].y
> 0016 01100001 40000210            MUL_IEEE                 R0.z,  R1.x, KC0[0].z
> 0018 81900001 60000210            MUL_IEEE                 R0.w,  R1.x, KC0[0].w
> 0020 00102401 000280FE     2      MULADD_IEEE              R0.x,  R1.y, KC0[1].x, PV.x
> 0022 00902401 200284FE            MULADD_IEEE              R0.y,  R1.y, KC0[1].y, PV.y
> 0024 01102401 400288FE            MULADD_IEEE              R0.z,  R1.y, KC0[1].z, PV.z
> 0026 81902401 60028CFE            MULADD_IEEE              R0.w,  R1.y, KC0[1].w, PV.w
> 0028 00104801 002280FE     3      MULADD_IEEE              R1.x,  R1.z, KC0[2].x, PV.x
> 0030 00904801 202284FE            MULADD_IEEE              R1.y,  R1.z, KC0[2].y, PV.y
> 0032 01104801 408288FE            MULADD_IEEE              R4.z,  R1.z, KC0[2].z, PV.z
> 0034 01904801 60628CFE            MULADD_IEEE              R3.w,  R1.z, KC0[2].w, PV.w
> 0036 80000002 80001910            MOV_sat                  R0.x,  R2.x
> 0038 00106C01 006280FE     4      MULADD_IEEE              R3.x,  R1.w, KC0[3].x, PV.x
> 0040 00906C01 206284FE            MULADD_IEEE              R3.y,  R1.w, KC0[3].y, PV.y
> 0042 01106C01 406288FE            MULADD_IEEE              R3.z,  R1.w, KC0[3].z, PV.z
> 0044 01906C01 60628CFE            MULADD_IEEE              R3.w,  R1.w, KC0[3].w, PV.w
> 0046 80000402 A0001910            MOV_sat                  R0.y,  R2.y
> 0048 00000802 C0001910     5      MOV_sat                  R0.z,  R2.z
> 0050 80000C02 E0001910            MOV_sat                  R0.w,  R2.w
>0004 C001A03C 94400688 CF_NATIVE
>0006 C0004000 94600688 CF_NATIVE
>0008 00000000 80200000 CF_NATIVE
>0010 00000000 00000000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 0)
>  %1 = call float @llvm.R600.load.input(i32 1)
>  %2 = call float @llvm.R600.load.input(i32 2)
>  %3 = call float @llvm.R600.load.input(i32 3)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %7, i32 0, i32 0)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 4 dw -- 1 gprs -- 1 nstack -------------
>shader 51 -- 6
>0000 C0000000 94600688 CF_NATIVE
>0002 00000000 80200000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132754:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 0)
>  %1 = call float @llvm.R600.load.input(i32 1)
>  %2 = call float @llvm.R600.load.input(i32 2)
>  %3 = call float @llvm.R600.load.input(i32 3)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %7, i32 0, i32 0)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 4 dw -- 1 gprs -- 1 nstack -------------
>shader 52 -- 6
>0000 C0000000 94600688 CF_NATIVE
>0002 00000000 80200000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>DCL SAMP[0]
>  0: TEX OUT[0], IN[0], SAMP[0], 2D
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 0)
>  %1 = call float @llvm.R600.load.input(i32 1)
>  %2 = call float @llvm.R600.load.input(i32 2)
>  %3 = call float @llvm.R600.load.input(i32 3)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  %8 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %7, i32 16, i32 0, i32 2)
>  %9 = extractelement <4 x float> %8, i32 0
>  %10 = extractelement <4 x float> %8, i32 1
>  %11 = extractelement <4 x float> %8, i32 2
>  %12 = extractelement <4 x float> %8, i32 3
>  %13 = insertelement <4 x float> undef, float %9, i32 0
>  %14 = insertelement <4 x float> %13, float %10, i32 1
>  %15 = insertelement <4 x float> %14, float %11, i32 2
>  %16 = insertelement <4 x float> %15, float %12, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %16, i32 0, i32 0)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>; Function Attrs: readnone
>declare <4 x float> @llvm.AMDGPU.tex(<4 x float>, i32, i32, i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 12 dw -- 1 gprs -- 1 nstack -------------
>shader 53 -- 6
>0000 00000004 80800000 CF_NATIVE
>0002 C0000000 94600688 CF_NATIVE
>0004 00000000 80200000 CF_NATIVE
>0006 00000000 00000000 CF_NATIVE
>0008 00001010 F00D1000 CF_NATIVE
>0010 68800000 00000000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL TEMP[0..1], LOCAL
>IMM[0] FLT32 {    1.0000,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].w, IMM[0].xxxx
>  1: MOV TEMP[1].xy, IN[0].xyyy
>  2: TEX TEMP[1].xyz, TEMP[1], SAMP[0], 2D
>  3: MOV TEMP[0].xyz, TEMP[1].xyzx
>  4: MOV OUT[0], TEMP[0]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 0)
>  %1 = call float @llvm.R600.load.input(i32 1)
>  %2 = call float @llvm.R600.load.input(i32 2)
>  %3 = call float @llvm.R600.load.input(i32 3)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float 0.000000e+00, i32 2
>  %7 = insertelement <4 x float> %6, float 0.000000e+00, i32 3
>  %8 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %7, i32 16, i32 0, i32 2)
>  %9 = extractelement <4 x float> %8, i32 0
>  %10 = extractelement <4 x float> %8, i32 1
>  %11 = extractelement <4 x float> %8, i32 2
>  %12 = insertelement <4 x float> undef, float %9, i32 0
>  %13 = insertelement <4 x float> %12, float %10, i32 1
>  %14 = insertelement <4 x float> %13, float %11, i32 2
>  %15 = insertelement <4 x float> %14, float 1.000000e+00, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %15, i32 0, i32 0)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>; Function Attrs: readnone
>declare <4 x float> @llvm.AMDGPU.tex(<4 x float>, i32, i32, i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 16 dw -- 1 gprs -- 1 nstack -------------
>shader 54 -- 6
>0000 00000006 A0040000  ALU 2 @12 
> 0012 800000F8 40001910     1      MOV                      R0.z,  0
> 0014 800008FE 60001910     2      MOV                      R0.w,  PV.z
>0002 00000004 80800000 CF_NATIVE
>0004 C0000000 94600A88 CF_NATIVE
>0006 00000000 80200000 CF_NATIVE
>0008 00001010 F00D1000 CF_NATIVE
>0010 68800000 00000000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[19]
>DCL CONST[0..8]
>DCL TEMP[0..2], LOCAL
>IMM[0] FLT32 {   -1.0000,     0.0000,     0.0000,     0.0000}
>  0: ADD TEMP[0].xy, IN[1].xyyy, IMM[0].xxxx
>  1: ABS TEMP[0].xy, TEMP[0].xyyy
>  2: MUL TEMP[1].x, TEMP[0].xxxx, TEMP[0].yyyy
>  3: MUL TEMP[1].xy, TEMP[1].xxxx, CONST[1].xyyy
>  4: MUL TEMP[2].x, IN[1].xxxx, TEMP[0].yyyy
>  5: MAD TEMP[1].xy, TEMP[2].xxxx, CONST[2].xyyy, TEMP[1].xyyy
>  6: MUL TEMP[2].x, IN[1].xxxx, IN[1].yyyy
>  7: MAD TEMP[1].xy, TEMP[2].xxxx, CONST[3].xyyy, TEMP[1].xyyy
>  8: MUL TEMP[0].x, TEMP[0].xxxx, IN[1].yyyy
>  9: MAD TEMP[1].xy, TEMP[0].xxxx, CONST[4].xyyy, TEMP[1].xyyy
> 10: MUL TEMP[0], CONST[5], TEMP[1].xxxx
> 11: MAD TEMP[0], CONST[6], TEMP[1].yyyy, TEMP[0]
> 12: MAD TEMP[0], CONST[7], IN[0].zzzz, TEMP[0]
> 13: MAD TEMP[0], CONST[8], IN[0].wwww, TEMP[0]
> 14: MAD TEMP[1].xy, TEMP[1].xyyy, CONST[0].zwww, CONST[0].xyyy
> 15: MOV OUT[1], TEMP[1]
> 16: MOV OUT[0], TEMP[0]
> 17: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = fadd float %4, -1.000000e+00
>  %9 = fadd float %5, -1.000000e+00
>  %10 = call float @fabs(float %8)
>  %11 = call float @fabs(float %9)
>  %12 = fmul float %10, %11
>  %13 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %14 = extractelement <4 x float> %13, i32 0
>  %15 = fmul float %12, %14
>  %16 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
>  %17 = extractelement <4 x float> %16, i32 1
>  %18 = fmul float %12, %17
>  %19 = fmul float %4, %11
>  %20 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %21 = extractelement <4 x float> %20, i32 0
>  %22 = fmul float %19, %21
>  %23 = fadd float %22, %15
>  %24 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
>  %25 = extractelement <4 x float> %24, i32 1
>  %26 = fmul float %19, %25
>  %27 = fadd float %26, %18
>  %28 = fmul float %4, %5
>  %29 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %30 = extractelement <4 x float> %29, i32 0
>  %31 = fmul float %28, %30
>  %32 = fadd float %31, %23
>  %33 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
>  %34 = extractelement <4 x float> %33, i32 1
>  %35 = fmul float %28, %34
>  %36 = fadd float %35, %27
>  %37 = fmul float %10, %5
>  %38 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 4)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = fmul float %37, %39
>  %41 = fadd float %40, %32
>  %42 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 4)
>  %43 = extractelement <4 x float> %42, i32 1
>  %44 = fmul float %37, %43
>  %45 = fadd float %44, %36
>  %46 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 5)
>  %47 = extractelement <4 x float> %46, i32 0
>  %48 = fmul float %47, %41
>  %49 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 5)
>  %50 = extractelement <4 x float> %49, i32 1
>  %51 = fmul float %50, %41
>  %52 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 5)
>  %53 = extractelement <4 x float> %52, i32 2
>  %54 = fmul float %53, %41
>  %55 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 5)
>  %56 = extractelement <4 x float> %55, i32 3
>  %57 = fmul float %56, %41
>  %58 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 6)
>  %59 = extractelement <4 x float> %58, i32 0
>  %60 = fmul float %59, %45
>  %61 = fadd float %60, %48
>  %62 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 6)
>  %63 = extractelement <4 x float> %62, i32 1
>  %64 = fmul float %63, %45
>  %65 = fadd float %64, %51
>  %66 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 6)
>  %67 = extractelement <4 x float> %66, i32 2
>  %68 = fmul float %67, %45
>  %69 = fadd float %68, %54
>  %70 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 6)
>  %71 = extractelement <4 x float> %70, i32 3
>  %72 = fmul float %71, %45
>  %73 = fadd float %72, %57
>  %74 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 7)
>  %75 = extractelement <4 x float> %74, i32 0
>  %76 = fmul float %75, %2
>  %77 = fadd float %76, %61
>  %78 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 7)
>  %79 = extractelement <4 x float> %78, i32 1
>  %80 = fmul float %79, %2
>  %81 = fadd float %80, %65
>  %82 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 7)
>  %83 = extractelement <4 x float> %82, i32 2
>  %84 = fmul float %83, %2
>  %85 = fadd float %84, %69
>  %86 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 7)
>  %87 = extractelement <4 x float> %86, i32 3
>  %88 = fmul float %87, %2
>  %89 = fadd float %88, %73
>  %90 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 8)
>  %91 = extractelement <4 x float> %90, i32 0
>  %92 = fmul float %91, %3
>  %93 = fadd float %92, %77
>  %94 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 8)
>  %95 = extractelement <4 x float> %94, i32 1
>  %96 = fmul float %95, %3
>  %97 = fadd float %96, %81
>  %98 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 8)
>  %99 = extractelement <4 x float> %98, i32 2
>  %100 = fmul float %99, %3
>  %101 = fadd float %100, %85
>  %102 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 8)
>  %103 = extractelement <4 x float> %102, i32 3
>  %104 = fmul float %103, %3
>  %105 = fadd float %104, %89
>  %106 = load <4 x float> addrspace(8)* null
>  %107 = extractelement <4 x float> %106, i32 2
>  %108 = load <4 x float> addrspace(8)* null
>  %109 = extractelement <4 x float> %108, i32 0
>  %110 = fmul float %41, %107
>  %111 = fadd float %110, %109
>  %112 = load <4 x float> addrspace(8)* null
>  %113 = extractelement <4 x float> %112, i32 3
>  %114 = load <4 x float> addrspace(8)* null
>  %115 = extractelement <4 x float> %114, i32 1
>  %116 = fmul float %45, %113
>  %117 = fadd float %116, %115
>  %118 = insertelement <4 x float> undef, float %93, i32 0
>  %119 = insertelement <4 x float> %118, float %97, i32 1
>  %120 = insertelement <4 x float> %119, float %101, i32 2
>  %121 = insertelement <4 x float> %120, float %105, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %121, i32 60, i32 1)
>  %122 = insertelement <4 x float> undef, float %111, i32 0
>  %123 = insertelement <4 x float> %122, float %117, i32 1
>  %124 = insertelement <4 x float> %123, float 0.000000e+00, i32 2
>  %125 = insertelement <4 x float> %124, float 0.000000e+00, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %125, i32 0, i32 2)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>; Function Attrs: readonly
>declare float @fabs(float) #2
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>attributes #2 = { readonly }
>--------------------------------------------------------------
>bytecode 76 dw -- 4 gprs -- 1 nstack -------------
>shader 55 -- 6
>0000 00000000 89800000  CALL_FS @0 
>0002 80000006 A07C0000  ALU 32 @12 KC0[CB0:0-32] 
> 0012 021F2002 00000010     1      ADD                      R0.x,  R2.x, -1.0
> 0014 00804002 20000210            MUL_IEEE                 R0.y,  R2.x, R2.y
> 0016 821F2402 40000010            ADD                      R0.z,  R2.y, -1.0
> 0018 008040FE 00200211     2      MUL_IEEE                 R1.x,  |PV.x|, R2.y
> 0020 011FC002 20200212            MUL_IEEE                 R1.y,  R2.x, |PV.z|
> 0022 811FC0FE 40000213            MUL_IEEE                 R0.z,  |PV.x|, |PV.z|
> 0024 009028FE 00000210     3      MUL_IEEE                 R0.x,  PV.z, KC0[1].y
> 0026 801028FE 20400210            MUL_IEEE                 R2.y,  PV.z, KC0[1].x
> 0028 00904401 000280FE     4      MULADD_IEEE              R0.x,  R1.y, KC0[2].y, PV.x
> 0030 80104401 202284FE            MULADD_IEEE              R1.y,  R1.y, KC0[2].x, PV.y
> 0032 00906400 000280FE     5      MULADD_IEEE              R0.x,  R0.y, KC0[3].y, PV.x
> 0034 80106400 200284FE            MULADD_IEEE              R0.y,  R0.y, KC0[3].x, PV.y
> 0036 00908001 000280FE     6      MULADD_IEEE              R0.x,  R1.x, KC0[4].y, PV.x
> 0038 80108001 202284FE            MULADD_IEEE              R1.y,  R1.x, KC0[4].x, PV.y
> 0040 009FC085 00200210     7      MUL_IEEE                 R1.x,  KC0[5].x, PV.y
> 0042 009FC485 20000210            MUL_IEEE                 R0.y,  KC0[5].y, PV.y
> 0044 009FC885 40000210            MUL_IEEE                 R0.z,  KC0[5].z, PV.y
> 0046 809FCC85 60000210            MUL_IEEE                 R0.w,  KC0[5].w, PV.y
> 0048 00000086 002280FE     8      MULADD_IEEE              R1.x,  KC0[6].x, R0.x, PV.x
> 0050 00000486 200284FE            MULADD_IEEE              R0.y,  KC0[6].y, R0.x, PV.y
> 0052 00000886 400288FE            MULADD_IEEE              R0.z,  KC0[6].z, R0.x, PV.z
> 0054 80000C86 60028CFE            MULADD_IEEE              R0.w,  KC0[6].w, R0.x, PV.w
> 0056 01002087 002280FE     9      MULADD_IEEE              R1.x,  KC0[7].x, R1.z, PV.x
> 0058 01002487 206284FE            MULADD_IEEE              R3.y,  KC0[7].y, R1.z, PV.y
> 0060 01002887 406288FE            MULADD_IEEE              R3.z,  KC0[7].z, R1.z, PV.z
> 0062 81002C87 60428CFE            MULADD_IEEE              R2.w,  KC0[7].w, R1.z, PV.w
> 0064 01100401 00028080    10      MULADD_IEEE              R0.x,  R1.y, KC0[0].z, KC0[0].x
> 0066 81900000 20028480            MULADD_IEEE              R0.y,  R0.x, KC0[0].w, KC0[0].y
> 0068 01802088 00428001    11      MULADD_IEEE              R2.x,  KC0[8].x, R1.w, R1.x
> 0070 01802488 20428403            MULADD_IEEE              R2.y,  KC0[8].y, R1.w, R3.y
> 0072 01802888 40428803            MULADD_IEEE              R2.z,  KC0[8].z, R1.w, R3.z
> 0074 81802C88 60428C02            MULADD_IEEE              R2.w,  KC0[8].w, R1.w, R2.w
>0004 C001203C 94400688 CF_NATIVE
>0006 C0004000 94600908 CF_NATIVE
>0008 00000000 80200000 CF_NATIVE
>0010 00000000 00000000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32_FLOAT, }
>   {src_offset = 12, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32_FLOAT, }
>bytecode 12 dw -- 3 gprs -- 0 nstack -------------
>shader 56 -- 6
>0000 00000002 81000400  VTX 2 @4 
> 0004 7C00A000 8C151001 00080000   VFETCH         R1.xyz1, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:48 NUM:0 COMP:0 MODE:1)
> 0008 7C00A000 87961002 0008000C   VFETCH         R2.xy01, R0.x +12b,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:30 NUM:0 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL TEMP[0], LOCAL
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MUL TEMP[0], TEMP[0], IN[0].zzzz
>  3: MOV OUT[0], TEMP[0]
>  4: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 0)
>  %1 = call float @llvm.R600.load.input(i32 1)
>  %2 = call float @llvm.R600.load.input(i32 2)
>  %3 = call float @llvm.R600.load.input(i32 3)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float 0.000000e+00, i32 2
>  %7 = insertelement <4 x float> %6, float 0.000000e+00, i32 3
>  %8 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %7, i32 16, i32 0, i32 2)
>  %9 = extractelement <4 x float> %8, i32 0
>  %10 = extractelement <4 x float> %8, i32 1
>  %11 = extractelement <4 x float> %8, i32 2
>  %12 = extractelement <4 x float> %8, i32 3
>  %13 = fmul float %9, %2
>  %14 = fmul float %10, %2
>  %15 = fmul float %11, %2
>  %16 = fmul float %12, %2
>  %17 = insertelement <4 x float> undef, float %13, i32 0
>  %18 = insertelement <4 x float> %17, float %14, i32 1
>  %19 = insertelement <4 x float> %18, float %15, i32 2
>  %20 = insertelement <4 x float> %19, float %16, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %20, i32 0, i32 0)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>; Function Attrs: readnone
>declare <4 x float> @llvm.AMDGPU.tex(<4 x float>, i32, i32, i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 32 dw -- 3 gprs -- 1 nstack -------------
>shader 57 -- 6
>0000 00000008 A00C0000  ALU 4 @16 
> 0016 00000000 00201910     1      MOV                      R1.x,  R0.x
> 0018 00000400 20201910            MOV                      R1.y,  R0.y
> 0020 800000F8 40201910            MOV                      R1.z,  0
> 0022 800008FE 60201910     2      MOV                      R1.w,  PV.z
>0002 00000006 80800000 CF_NATIVE
>0004 0000000C A00C0000  ALU 4 @24 
> 0024 01000001 00400210     3      MUL_IEEE                 R2.x,  R1.x, R0.z
> 0026 01000401 20400210            MUL_IEEE                 R2.y,  R1.y, R0.z
> 0028 01000801 40400210            MUL_IEEE                 R2.z,  R1.z, R0.z
> 0030 81000C01 60400210            MUL_IEEE                 R2.w,  R1.w, R0.z
>0006 C0010000 94600688 CF_NATIVE
>0008 00000000 80200000 CF_NATIVE
>0010 00000000 00000000 CF_NATIVE
>0012 00011010 F00D1001 CF_NATIVE
>0014 68800000 00000000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[19]
>DCL CONST[0..71]
>DCL TEMP[0..3], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    0.2500,     7.0000,     0.0000,     1.0000}
>IMM[1] INT32 {4, 0, 0, 0}
>IMM[2] FLT32 {   31.0000,     0.0000,     0.0000,     0.0000}
>  0: MUL TEMP[0].x, IN[2].xxxx, IMM[0].xxxx
>  1: F2I TEMP[0].x, TEMP[0].xxxx
>  2: I2F TEMP[0].x, TEMP[0].xxxx
>  3: MIN TEMP[0].x, TEMP[0].xxxx, IMM[0].yyyy
>  4: MAX TEMP[0].x, TEMP[0].xxxx, IMM[0].zzzz
>  5: F2I TEMP[0].x, TEMP[0].xxxx
>  6: UMUL TEMP[0].x, TEMP[0].xxxx, IMM[1].xxxx
>  7: MUL TEMP[1].x, IN[2].xxxx, IMM[0].xxxx
>  8: F2I TEMP[1].x, TEMP[1].xxxx
>  9: I2F TEMP[1].x, TEMP[1].xxxx
> 10: MIN TEMP[1].x, TEMP[1].xxxx, IMM[0].yyyy
> 11: MAX TEMP[1].x, TEMP[1].xxxx, IMM[0].zzzz
> 12: F2I TEMP[1].x, TEMP[1].xxxx
> 13: UMUL TEMP[1].x, TEMP[1].xxxx, IMM[1].xxxx
> 14: MUL TEMP[2].x, IN[2].xxxx, IMM[0].xxxx
> 15: F2I TEMP[2].x, TEMP[2].xxxx
> 16: I2F TEMP[2].x, TEMP[2].xxxx
> 17: MIN TEMP[2].x, TEMP[2].xxxx, IMM[0].yyyy
> 18: MAX TEMP[2].x, TEMP[2].xxxx, IMM[0].zzzz
> 19: F2I TEMP[2].x, TEMP[2].xxxx
> 20: UMUL TEMP[2].x, TEMP[2].xxxx, IMM[1].xxxx
> 21: MUL TEMP[3].x, IN[2].xxxx, IMM[0].xxxx
> 22: F2I TEMP[3].x, TEMP[3].xxxx
> 23: I2F TEMP[3].x, TEMP[3].xxxx
> 24: MIN TEMP[3].x, TEMP[3].xxxx, IMM[0].yyyy
> 25: MAX TEMP[3].x, TEMP[3].xxxx, IMM[0].zzzz
> 26: F2I TEMP[3].x, TEMP[3].xxxx
> 27: UMUL TEMP[3].x, TEMP[3].xxxx, IMM[1].xxxx
> 28: UARL ADDR[0].x, TEMP[3].xxxx
> 29: MUL TEMP[3], CONST[ADDR[0].x+40], IN[0].xxxx
> 30: UARL ADDR[0].x, TEMP[2].xxxx
> 31: MAD TEMP[2], CONST[ADDR[0].x+41], IN[0].yyyy, TEMP[3]
> 32: UARL ADDR[0].x, TEMP[1].xxxx
> 33: MAD TEMP[1], CONST[ADDR[0].x+42], IN[0].zzzz, TEMP[2]
> 34: UARL ADDR[0].x, TEMP[0].xxxx
> 35: UARL ADDR[0].x, TEMP[0].xxxx
> 36: MAD TEMP[0], CONST[ADDR[0].x+43], IN[0].wwww, TEMP[1]
> 37: MUL TEMP[1].x, IN[2].xxxx, IMM[0].xxxx
> 38: F2I TEMP[1].x, TEMP[1].xxxx
> 39: I2F TEMP[1].x, TEMP[1].xxxx
> 40: MIN TEMP[1].x, TEMP[1].xxxx, IMM[0].yyyy
> 41: MAX TEMP[1].x, TEMP[1].xxxx, IMM[0].zzzz
> 42: F2I TEMP[1].x, TEMP[1].xxxx
> 43: UARL ADDR[0].x, TEMP[1].xxxx
> 44: MOV TEMP[1], CONST[ADDR[0].x+32]
> 45: MAD TEMP[1].xy, IN[1].xyyy, TEMP[1].zwww, TEMP[1].xyyy
> 46: MOV TEMP[2].x, TEMP[1].xxxx
> 47: ADD TEMP[1].x, IMM[0].wwww, -TEMP[1].yyyy
> 48: MOV TEMP[2].y, TEMP[1].xxxx
> 49: F2I TEMP[1].x, IN[2].xxxx
> 50: I2F TEMP[1].x, TEMP[1].xxxx
> 51: MIN TEMP[1].x, TEMP[1].xxxx, IMM[2].xxxx
> 52: MAX TEMP[1].x, TEMP[1].xxxx, IMM[0].zzzz
> 53: F2I TEMP[1].x, TEMP[1].xxxx
> 54: UARL ADDR[0].x, TEMP[1].xxxx
> 55: MOV TEMP[1].z, CONST[ADDR[0].x].xxxx
> 56: MOV TEMP[1].xy, TEMP[2].xyxx
> 57: MOV OUT[1], TEMP[1]
> 58: MOV OUT[0], TEMP[0]
> 59: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = call float @llvm.R600.load.input(i32 12)
>  %9 = call float @llvm.R600.load.input(i32 13)
>  %10 = call float @llvm.R600.load.input(i32 14)
>  %11 = call float @llvm.R600.load.input(i32 15)
>  %12 = fmul float %8, 2.500000e-01
>  %13 = fptosi float %12 to i32
>  %14 = bitcast i32 %13 to float
>  %15 = bitcast float %14 to i32
>  %16 = sitofp i32 %15 to float
>  %17 = fcmp uge float %16, 7.000000e+00
>  %18 = select i1 %17, float 7.000000e+00, float %16
>  %19 = fcmp uge float %18, 0.000000e+00
>  %20 = select i1 %19, float %18, float 0.000000e+00
>  %21 = fptosi float %20 to i32
>  %22 = bitcast i32 %21 to float
>  %23 = bitcast float %22 to i32
>  %24 = mul i32 %23, 4
>  %25 = bitcast i32 %24 to float
>  %26 = fmul float %8, 2.500000e-01
>  %27 = fptosi float %26 to i32
>  %28 = bitcast i32 %27 to float
>  %29 = bitcast float %28 to i32
>  %30 = sitofp i32 %29 to float
>  %31 = fcmp uge float %30, 7.000000e+00
>  %32 = select i1 %31, float 7.000000e+00, float %30
>  %33 = fcmp uge float %32, 0.000000e+00
>  %34 = select i1 %33, float %32, float 0.000000e+00
>  %35 = fptosi float %34 to i32
>  %36 = bitcast i32 %35 to float
>  %37 = bitcast float %36 to i32
>  %38 = mul i32 %37, 4
>  %39 = bitcast i32 %38 to float
>  %40 = fmul float %8, 2.500000e-01
>  %41 = fptosi float %40 to i32
>  %42 = bitcast i32 %41 to float
>  %43 = bitcast float %42 to i32
>  %44 = sitofp i32 %43 to float
>  %45 = fcmp uge float %44, 7.000000e+00
>  %46 = select i1 %45, float 7.000000e+00, float %44
>  %47 = fcmp uge float %46, 0.000000e+00
>  %48 = select i1 %47, float %46, float 0.000000e+00
>  %49 = fptosi float %48 to i32
>  %50 = bitcast i32 %49 to float
>  %51 = bitcast float %50 to i32
>  %52 = mul i32 %51, 4
>  %53 = bitcast i32 %52 to float
>  %54 = fmul float %8, 2.500000e-01
>  %55 = fptosi float %54 to i32
>  %56 = bitcast i32 %55 to float
>  %57 = bitcast float %56 to i32
>  %58 = sitofp i32 %57 to float
>  %59 = fcmp uge float %58, 7.000000e+00
>  %60 = select i1 %59, float 7.000000e+00, float %58
>  %61 = fcmp uge float %60, 0.000000e+00
>  %62 = select i1 %61, float %60, float 0.000000e+00
>  %63 = fptosi float %62 to i32
>  %64 = bitcast i32 %63 to float
>  %65 = bitcast float %64 to i32
>  %66 = mul i32 %65, 4
>  %67 = bitcast i32 %66 to float
>  %68 = bitcast float %67 to i32
>  %69 = add i32 40, %68
>  %70 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %69
>  %71 = load <4 x float> addrspace(8)* %70
>  %72 = extractelement <4 x float> %71, i32 0
>  %73 = fmul float %72, %0
>  %74 = add i32 40, %68
>  %75 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %74
>  %76 = load <4 x float> addrspace(8)* %75
>  %77 = extractelement <4 x float> %76, i32 1
>  %78 = fmul float %77, %0
>  %79 = add i32 40, %68
>  %80 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %79
>  %81 = load <4 x float> addrspace(8)* %80
>  %82 = extractelement <4 x float> %81, i32 2
>  %83 = fmul float %82, %0
>  %84 = add i32 40, %68
>  %85 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %84
>  %86 = load <4 x float> addrspace(8)* %85
>  %87 = extractelement <4 x float> %86, i32 3
>  %88 = fmul float %87, %0
>  %89 = bitcast float %53 to i32
>  %90 = add i32 41, %89
>  %91 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %90
>  %92 = load <4 x float> addrspace(8)* %91
>  %93 = extractelement <4 x float> %92, i32 0
>  %94 = fmul float %93, %1
>  %95 = fadd float %94, %73
>  %96 = add i32 41, %89
>  %97 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %96
>  %98 = load <4 x float> addrspace(8)* %97
>  %99 = extractelement <4 x float> %98, i32 1
>  %100 = fmul float %99, %1
>  %101 = fadd float %100, %78
>  %102 = add i32 41, %89
>  %103 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %102
>  %104 = load <4 x float> addrspace(8)* %103
>  %105 = extractelement <4 x float> %104, i32 2
>  %106 = fmul float %105, %1
>  %107 = fadd float %106, %83
>  %108 = add i32 41, %89
>  %109 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %108
>  %110 = load <4 x float> addrspace(8)* %109
>  %111 = extractelement <4 x float> %110, i32 3
>  %112 = fmul float %111, %1
>  %113 = fadd float %112, %88
>  %114 = bitcast float %39 to i32
>  %115 = add i32 42, %114
>  %116 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %115
>  %117 = load <4 x float> addrspace(8)* %116
>  %118 = extractelement <4 x float> %117, i32 0
>  %119 = fmul float %118, %2
>  %120 = fadd float %119, %95
>  %121 = add i32 42, %114
>  %122 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %121
>  %123 = load <4 x float> addrspace(8)* %122
>  %124 = extractelement <4 x float> %123, i32 1
>  %125 = fmul float %124, %2
>  %126 = fadd float %125, %101
>  %127 = add i32 42, %114
>  %128 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %127
>  %129 = load <4 x float> addrspace(8)* %128
>  %130 = extractelement <4 x float> %129, i32 2
>  %131 = fmul float %130, %2
>  %132 = fadd float %131, %107
>  %133 = add i32 42, %114
>  %134 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %133
>  %135 = load <4 x float> addrspace(8)* %134
>  %136 = extractelement <4 x float> %135, i32 3
>  %137 = fmul float %136, %2
>  %138 = fadd float %137, %113
>  %139 = bitcast float %25 to i32
>  %140 = add i32 43, %139
>  %141 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %140
>  %142 = load <4 x float> addrspace(8)* %141
>  %143 = extractelement <4 x float> %142, i32 0
>  %144 = fmul float %143, %3
>  %145 = fadd float %144, %120
>  %146 = add i32 43, %139
>  %147 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %146
>  %148 = load <4 x float> addrspace(8)* %147
>  %149 = extractelement <4 x float> %148, i32 1
>  %150 = fmul float %149, %3
>  %151 = fadd float %150, %126
>  %152 = add i32 43, %139
>  %153 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %152
>  %154 = load <4 x float> addrspace(8)* %153
>  %155 = extractelement <4 x float> %154, i32 2
>  %156 = fmul float %155, %3
>  %157 = fadd float %156, %132
>  %158 = add i32 43, %139
>  %159 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %158
>  %160 = load <4 x float> addrspace(8)* %159
>  %161 = extractelement <4 x float> %160, i32 3
>  %162 = fmul float %161, %3
>  %163 = fadd float %162, %138
>  %164 = fmul float %8, 2.500000e-01
>  %165 = fptosi float %164 to i32
>  %166 = bitcast i32 %165 to float
>  %167 = bitcast float %166 to i32
>  %168 = sitofp i32 %167 to float
>  %169 = fcmp uge float %168, 7.000000e+00
>  %170 = select i1 %169, float 7.000000e+00, float %168
>  %171 = fcmp uge float %170, 0.000000e+00
>  %172 = select i1 %171, float %170, float 0.000000e+00
>  %173 = fptosi float %172 to i32
>  %174 = bitcast i32 %173 to float
>  %175 = bitcast float %174 to i32
>  %176 = add i32 32, %175
>  %177 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %176
>  %178 = load <4 x float> addrspace(8)* %177
>  %179 = extractelement <4 x float> %178, i32 0
>  %180 = add i32 32, %175
>  %181 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %180
>  %182 = load <4 x float> addrspace(8)* %181
>  %183 = extractelement <4 x float> %182, i32 1
>  %184 = add i32 32, %175
>  %185 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %184
>  %186 = load <4 x float> addrspace(8)* %185
>  %187 = extractelement <4 x float> %186, i32 2
>  %188 = add i32 32, %175
>  %189 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %188
>  %190 = load <4 x float> addrspace(8)* %189
>  %191 = extractelement <4 x float> %190, i32 3
>  %192 = fmul float %4, %187
>  %193 = fadd float %192, %179
>  %194 = fmul float %5, %191
>  %195 = fadd float %194, %183
>  %196 = fsub float -0.000000e+00, %195
>  %197 = fadd float 1.000000e+00, %196
>  %198 = fptosi float %8 to i32
>  %199 = bitcast i32 %198 to float
>  %200 = bitcast float %199 to i32
>  %201 = sitofp i32 %200 to float
>  %202 = fcmp uge float %201, 3.100000e+01
>  %203 = select i1 %202, float 3.100000e+01, float %201
>  %204 = fcmp uge float %203, 0.000000e+00
>  %205 = select i1 %204, float %203, float 0.000000e+00
>  %206 = fptosi float %205 to i32
>  %207 = bitcast i32 %206 to float
>  %208 = bitcast float %207 to i32
>  %209 = add i32 0, %208
>  %210 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %209
>  %211 = load <4 x float> addrspace(8)* %210
>  %212 = extractelement <4 x float> %211, i32 0
>  %213 = insertelement <4 x float> undef, float %145, i32 0
>  %214 = insertelement <4 x float> %213, float %151, i32 1
>  %215 = insertelement <4 x float> %214, float %157, i32 2
>  %216 = insertelement <4 x float> %215, float %163, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %216, i32 60, i32 1)
>  %217 = insertelement <4 x float> undef, float %193, i32 0
>  %218 = insertelement <4 x float> %217, float %197, i32 1
>  %219 = insertelement <4 x float> %218, float %212, i32 2
>  %220 = insertelement <4 x float> %219, float %191, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %220, i32 0, i32 2)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 144 dw -- 9 gprs -- 1 nstack -------------
>shader 58 -- 6
>0000 00000000 89800000  CALL_FS @0 
>0002 00000014 A07C0000  ALU 32 @40 
> 0040 001FA003 20000210     1      MUL_IEEE                 R0.y,  R3.x, [0x3E800000 0.250000]
> 0042 80000003 00006B10            FLT_TO_INT               R0.x,  R3.x
> 0044 3E800000                                               0.250000 (1048576000)
> 0046 800000FF 00006C10     2      INT_TO_FLT               R0.x,  PS
> 0048 001FA0FF 00000410     3      MIN                      R0.x,  PS, [0x41F80000 31.000000]
> 0050 80000400 20006B10            FLT_TO_INT               R0.y,  R0.y
> 0052 41F80000                                               31.000000 (1106771968)
> 0054 001FC0FE 000340F8     4      CNDGE                    R0.x,  PV.x, PV.x, 0
> 0056 800000FF 20006C10            INT_TO_FLT               R0.y,  PS
> 0058 001FA0FF 20000410     5      MIN                      R0.y,  PS, [0x40E00000 7.000000]
> 0060 800000FE 00006B10            FLT_TO_INT               R0.x,  PV.x
> 0062 40E00000                                               7.000000 (1088421888)
> 0064 809FC4FE 200340F8     6      CNDGE                    R0.y,  PV.y, PV.y, 0
> 0066 800004FE 00806B10     7      FLT_TO_INT               R4.x,  PV.y
> 0068 001FA0FF 00603410     8      ADD_INT                  R3.x,  PS, [0x00000020 0.000000]
> 0070 809FA0FF 20007210            LSHL_INT                 R0.y,  PS, [0x00000002 0.000000]
> 0072 00000020                                               0.000000 (32)
> 0073 00000002                                               0.000000 (2)
> 0074 001FA0FF 00803410     9      ADD_INT                  R4.x,  PS, [0x0000002B 0.000000]
> 0076 009FA0FF 20603410            ADD_INT                  R3.y,  PS, [0x0000002A 0.000000]
> 0078 011FA0FF 40003410            ADD_INT                  R0.z,  PS, [0x00000029 0.000000]
> 0080 819FA0FF 60003410            ADD_INT                  R0.w,  PS, [0x00000028 0.000000]
> 0082 0000002B                                               0.000000 (43)
> 0083 0000002A                                               0.000000 (42)
> 0084 00000029                                               0.000000 (41)
> 0085 00000028                                               0.000000 (40)
> 0086 001FA0FE 00803010    10      AND_INT                  R4.x,  PV.x, [0x0FFFFFFF 0.000000]
> 0088 809FA4FE 00A03010            AND_INT                  R5.x,  PV.y, [0x0FFFFFFE 0.000000]
> 0090 0FFFFFFF                                               0.000000 (268435455)
> 0091 0FFFFFFE                                               0.000000 (268435454)
> 0092 001FA800 00C03010    11      AND_INT                  R6.x,  R0.z, [0x0FFFFFFF 0.000000]
> 0094 809FAC00 00E03010            AND_INT                  R7.x,  R0.w, [0x0FFFFFFC 0.000000]
> 0096 0FFFFFFF                                               0.000000 (268435455)
> 0097 0FFFFFFC                                               0.000000 (268435452)
> 0098 001FA003 01003010    12      AND_INT                  R8.x,  R3.x, [0x0FFFFFFF 0.000000]
> 0100 801FA000 00003010            AND_INT                  R0.x,  R0.x, [0x0FFFFFFF 0.000000]
> 0102 0FFFFFFF                                               0.000000 (268435455)
>0004 00000008 81000400 CF_NATIVE
>0006 0000000C 81000C00 CF_NATIVE
>0008 00000034 A04C0000  ALU 20 @104 
> 0104 00002007 01000210    13      MUL_IEEE                 R8.x,  R7.x, R1.x
> 0106 00002407 21000210            MUL_IEEE                 R8.y,  R7.y, R1.x
> 0108 00002C07 40400210            MUL_IEEE                 R2.z,  R7.w, R1.x
> 0110 80002807 60400210            MUL_IEEE                 R2.w,  R7.z, R1.x
> 0112 00802006 002280FE    14      MULADD_IEEE              R1.x,  R6.x, R1.y, PV.x
> 0114 00802406 20E284FE            MULADD_IEEE              R7.y,  R6.y, R1.y, PV.y
> 0116 00802C06 404288FE            MULADD_IEEE              R2.z,  R6.w, R1.y, PV.z
> 0118 80802806 60428CFE            MULADD_IEEE              R2.w,  R6.z, R1.y, PV.w
> 0120 01002005 002280FE    15      MULADD_IEEE              R1.x,  R5.x, R1.z, PV.x
> 0122 01002405 202A84FE            MULADD_IEEE              R1.y,  R5.y, R1.z, PV.y  BS:2
> 0124 01002C05 404288FE            MULADD_IEEE              R2.z,  R5.w, R1.z, PV.z
> 0126 01002805 60428CFE            MULADD_IEEE              R2.w,  R5.z, R1.z, PV.w
> 0128 81800402 00C28400            MULADD_IEEE              R6.x,  R2.y, R0.w, R0.y
> 0130 01000002 00028000    16      MULADD_IEEE              R0.x,  R2.x, R0.z, R0.x
> 0132 001F30FF 20000010            ADD                      R0.y,  -PS, 1.0
> 0134 01802804 40A28CFE            MULADD_IEEE              R5.z,  R4.z, R1.w, PV.w
> 0136 01802C04 60A288FE            MULADD_IEEE              R5.w,  R4.w, R1.w, PV.z
> 0138 81802404 20A284FE            MULADD_IEEE              R5.y,  R4.y, R1.w, PV.y
> 0140 01802004 00AE8001    17      MULADD_IEEE              R5.x,  R4.x, R1.w, R1.x  BS:3
> 0142 80000003 40001910            MOV                      R0.z,  R3.x
>0010 C002A03C 94400688 CF_NATIVE
>0012 C0004000 94600688 CF_NATIVE
>0014 00000000 80200000 CF_NATIVE
>0016 40040040 E8CD1004 CF_NATIVE
>0018 00080000 00000000 CF_NATIVE
>0020 40000040 E8CD1003 CF_NATIVE
>0022 00080000 00000000 CF_NATIVE
>0024 40080040 E8CD1000 CF_NATIVE
>0026 00080000 00000000 CF_NATIVE
>0028 40070040 E8CD1007 CF_NATIVE
>0030 00080000 00000000 CF_NATIVE
>0032 40060040 E8CD1006 CF_NATIVE
>0034 00080000 00000000 CF_NATIVE
>0036 40050040 E8CD1005 CF_NATIVE
>0038 00080000 00000000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>Vertex elements state:
>   {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32_FLOAT, }
>   {src_offset = 12, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32_FLOAT, }
>   {src_offset = 20, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32_FLOAT, }
>bytecode 16 dw -- 4 gprs -- 0 nstack -------------
>shader 59 -- 6
>0000 00000002 81000800  VTX 3 @4 
> 0004 7C00A000 8C151001 00080000   VFETCH         R1.xyz1, R0.x,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:48 NUM:0 COMP:0 MODE:1)
> 0008 7C00A000 87961002 0008000C   VFETCH         R2.xy01, R0.x +12b,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:30 NUM:0 COMP:0 MODE:1)
> 0012 7C00A000 83964003 00080014   VFETCH         R3.x001, R0.x +20b,  RID:160 VERTEX MFC:31 UCF:0 FMT(DTA:14 NUM:0 COMP:0 MODE:1)
>0002 00000000 8A000000  RET @0 
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL TEMP[0], LOCAL
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MUL TEMP[0], TEMP[0], IN[0].zzzz
>  3: MOV OUT[0], TEMP[0]
>  4: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 0)
>  %1 = call float @llvm.R600.load.input(i32 1)
>  %2 = call float @llvm.R600.load.input(i32 2)
>  %3 = call float @llvm.R600.load.input(i32 3)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float 0.000000e+00, i32 2
>  %7 = insertelement <4 x float> %6, float 0.000000e+00, i32 3
>  %8 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %7, i32 16, i32 0, i32 2)
>  %9 = extractelement <4 x float> %8, i32 0
>  %10 = extractelement <4 x float> %8, i32 1
>  %11 = extractelement <4 x float> %8, i32 2
>  %12 = extractelement <4 x float> %8, i32 3
>  %13 = fmul float %9, %2
>  %14 = fmul float %10, %2
>  %15 = fmul float %11, %2
>  %16 = fmul float %12, %2
>  %17 = insertelement <4 x float> undef, float %13, i32 0
>  %18 = insertelement <4 x float> %17, float %14, i32 1
>  %19 = insertelement <4 x float> %18, float %15, i32 2
>  %20 = insertelement <4 x float> %19, float %16, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %20, i32 0, i32 0)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>; Function Attrs: readnone
>declare <4 x float> @llvm.AMDGPU.tex(<4 x float>, i32, i32, i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 32 dw -- 3 gprs -- 1 nstack -------------
>shader 60 -- 6
>0000 00000008 A00C0000  ALU 4 @16 
> 0016 00000000 00201910     1      MOV                      R1.x,  R0.x
> 0018 00000400 20201910            MOV                      R1.y,  R0.y
> 0020 800000F8 40201910            MOV                      R1.z,  0
> 0022 800008FE 60201910     2      MOV                      R1.w,  PV.z
>0002 00000006 80800000 CF_NATIVE
>0004 0000000C A00C0000  ALU 4 @24 
> 0024 01000001 00400210     3      MUL_IEEE                 R2.x,  R1.x, R0.z
> 0026 01000401 20400210            MUL_IEEE                 R2.y,  R1.y, R0.z
> 0028 01000801 40400210            MUL_IEEE                 R2.z,  R1.z, R0.z
> 0030 81000C01 60400210            MUL_IEEE                 R2.w,  R1.w, R0.z
>0006 C0010000 94600688 CF_NATIVE
>0008 00000000 80200000 CF_NATIVE
>0010 00000000 00000000 CF_NATIVE
>0012 00011010 F00D1001 CF_NATIVE
>0014 68800000 00000000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>--------------------------------------------------------------
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[19]
>DCL CONST[0..71]
>DCL TEMP[0..3], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    0.2500,     7.0000,     0.0000,    31.0000}
>IMM[1] INT32 {4, 0, 0, 0}
>  0: MUL TEMP[0].x, IN[2].xxxx, IMM[0].xxxx
>  1: F2I TEMP[0].x, TEMP[0].xxxx
>  2: I2F TEMP[0].x, TEMP[0].xxxx
>  3: MIN TEMP[0].x, TEMP[0].xxxx, IMM[0].yyyy
>  4: MAX TEMP[0].x, TEMP[0].xxxx, IMM[0].zzzz
>  5: F2I TEMP[0].x, TEMP[0].xxxx
>  6: UMUL TEMP[0].x, TEMP[0].xxxx, IMM[1].xxxx
>  7: MUL TEMP[1].x, IN[2].xxxx, IMM[0].xxxx
>  8: F2I TEMP[1].x, TEMP[1].xxxx
>  9: I2F TEMP[1].x, TEMP[1].xxxx
> 10: MIN TEMP[1].x, TEMP[1].xxxx, IMM[0].yyyy
> 11: MAX TEMP[1].x, TEMP[1].xxxx, IMM[0].zzzz
> 12: F2I TEMP[1].x, TEMP[1].xxxx
> 13: UMUL TEMP[1].x, TEMP[1].xxxx, IMM[1].xxxx
> 14: MUL TEMP[2].x, IN[2].xxxx, IMM[0].xxxx
> 15: F2I TEMP[2].x, TEMP[2].xxxx
> 16: I2F TEMP[2].x, TEMP[2].xxxx
> 17: MIN TEMP[2].x, TEMP[2].xxxx, IMM[0].yyyy
> 18: MAX TEMP[2].x, TEMP[2].xxxx, IMM[0].zzzz
> 19: F2I TEMP[2].x, TEMP[2].xxxx
> 20: UMUL TEMP[2].x, TEMP[2].xxxx, IMM[1].xxxx
> 21: MUL TEMP[3].x, IN[2].xxxx, IMM[0].xxxx
> 22: F2I TEMP[3].x, TEMP[3].xxxx
> 23: I2F TEMP[3].x, TEMP[3].xxxx
> 24: MIN TEMP[3].x, TEMP[3].xxxx, IMM[0].yyyy
> 25: MAX TEMP[3].x, TEMP[3].xxxx, IMM[0].zzzz
> 26: F2I TEMP[3].x, TEMP[3].xxxx
> 27: UMUL TEMP[3].x, TEMP[3].xxxx, IMM[1].xxxx
> 28: UARL ADDR[0].x, TEMP[3].xxxx
> 29: MUL TEMP[3], CONST[ADDR[0].x+40], IN[0].xxxx
> 30: UARL ADDR[0].x, TEMP[2].xxxx
> 31: MAD TEMP[2], CONST[ADDR[0].x+41], IN[0].yyyy, TEMP[3]
> 32: UARL ADDR[0].x, TEMP[1].xxxx
> 33: MAD TEMP[1], CONST[ADDR[0].x+42], IN[0].zzzz, TEMP[2]
> 34: UARL ADDR[0].x, TEMP[0].xxxx
> 35: UARL ADDR[0].x, TEMP[0].xxxx
> 36: MAD TEMP[0], CONST[ADDR[0].x+43], IN[0].wwww, TEMP[1]
> 37: MUL TEMP[1].x, IN[2].xxxx, IMM[0].xxxx
> 38: F2I TEMP[1].x, TEMP[1].xxxx
> 39: I2F TEMP[1].x, TEMP[1].xxxx
> 40: MIN TEMP[1].x, TEMP[1].xxxx, IMM[0].yyyy
> 41: MAX TEMP[1].x, TEMP[1].xxxx, IMM[0].zzzz
> 42: F2I TEMP[1].x, TEMP[1].xxxx
> 43: UARL ADDR[0].x, TEMP[1].xxxx
> 44: MOV TEMP[1], CONST[ADDR[0].x+32]
> 45: F2I TEMP[2].x, IN[2].xxxx
> 46: I2F TEMP[2].x, TEMP[2].xxxx
> 47: MIN TEMP[2].x, TEMP[2].xxxx, IMM[0].wwww
> 48: MAX TEMP[2].x, TEMP[2].xxxx, IMM[0].zzzz
> 49: F2I TEMP[2].x, TEMP[2].xxxx
> 50: UARL ADDR[0].x, TEMP[2].xxxx
> 51: MOV TEMP[2].z, CONST[ADDR[0].x].xxxx
> 52: MAD TEMP[2].xy, IN[1].xyyy, TEMP[1].zwww, TEMP[1].xyyy
> 53: MOV OUT[1], TEMP[2]
> 54: MOV OUT[0], TEMP[0]
> 55: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 4)
>  %1 = call float @llvm.R600.load.input(i32 5)
>  %2 = call float @llvm.R600.load.input(i32 6)
>  %3 = call float @llvm.R600.load.input(i32 7)
>  %4 = call float @llvm.R600.load.input(i32 8)
>  %5 = call float @llvm.R600.load.input(i32 9)
>  %6 = call float @llvm.R600.load.input(i32 10)
>  %7 = call float @llvm.R600.load.input(i32 11)
>  %8 = call float @llvm.R600.load.input(i32 12)
>  %9 = call float @llvm.R600.load.input(i32 13)
>  %10 = call float @llvm.R600.load.input(i32 14)
>  %11 = call float @llvm.R600.load.input(i32 15)
>  %12 = fmul float %8, 2.500000e-01
>  %13 = fptosi float %12 to i32
>  %14 = bitcast i32 %13 to float
>  %15 = bitcast float %14 to i32
>  %16 = sitofp i32 %15 to float
>  %17 = fcmp uge float %16, 7.000000e+00
>  %18 = select i1 %17, float 7.000000e+00, float %16
>  %19 = fcmp uge float %18, 0.000000e+00
>  %20 = select i1 %19, float %18, float 0.000000e+00
>  %21 = fptosi float %20 to i32
>  %22 = bitcast i32 %21 to float
>  %23 = bitcast float %22 to i32
>  %24 = mul i32 %23, 4
>  %25 = bitcast i32 %24 to float
>  %26 = fmul float %8, 2.500000e-01
>  %27 = fptosi float %26 to i32
>  %28 = bitcast i32 %27 to float
>  %29 = bitcast float %28 to i32
>  %30 = sitofp i32 %29 to float
>  %31 = fcmp uge float %30, 7.000000e+00
>  %32 = select i1 %31, float 7.000000e+00, float %30
>  %33 = fcmp uge float %32, 0.000000e+00
>  %34 = select i1 %33, float %32, float 0.000000e+00
>  %35 = fptosi float %34 to i32
>  %36 = bitcast i32 %35 to float
>  %37 = bitcast float %36 to i32
>  %38 = mul i32 %37, 4
>  %39 = bitcast i32 %38 to float
>  %40 = fmul float %8, 2.500000e-01
>  %41 = fptosi float %40 to i32
>  %42 = bitcast i32 %41 to float
>  %43 = bitcast float %42 to i32
>  %44 = sitofp i32 %43 to float
>  %45 = fcmp uge float %44, 7.000000e+00
>  %46 = select i1 %45, float 7.000000e+00, float %44
>  %47 = fcmp uge float %46, 0.000000e+00
>  %48 = select i1 %47, float %46, float 0.000000e+00
>  %49 = fptosi float %48 to i32
>  %50 = bitcast i32 %49 to float
>  %51 = bitcast float %50 to i32
>  %52 = mul i32 %51, 4
>  %53 = bitcast i32 %52 to float
>  %54 = fmul float %8, 2.500000e-01
>  %55 = fptosi float %54 to i32
>  %56 = bitcast i32 %55 to float
>  %57 = bitcast float %56 to i32
>  %58 = sitofp i32 %57 to float
>  %59 = fcmp uge float %58, 7.000000e+00
>  %60 = select i1 %59, float 7.000000e+00, float %58
>  %61 = fcmp uge float %60, 0.000000e+00
>  %62 = select i1 %61, float %60, float 0.000000e+00
>  %63 = fptosi float %62 to i32
>  %64 = bitcast i32 %63 to float
>  %65 = bitcast float %64 to i32
>  %66 = mul i32 %65, 4
>  %67 = bitcast i32 %66 to float
>  %68 = bitcast float %67 to i32
>  %69 = add i32 40, %68
>  %70 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %69
>  %71 = load <4 x float> addrspace(8)* %70
>  %72 = extractelement <4 x float> %71, i32 0
>  %73 = fmul float %72, %0
>  %74 = add i32 40, %68
>  %75 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %74
>  %76 = load <4 x float> addrspace(8)* %75
>  %77 = extractelement <4 x float> %76, i32 1
>  %78 = fmul float %77, %0
>  %79 = add i32 40, %68
>  %80 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %79
>  %81 = load <4 x float> addrspace(8)* %80
>  %82 = extractelement <4 x float> %81, i32 2
>  %83 = fmul float %82, %0
>  %84 = add i32 40, %68
>  %85 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %84
>  %86 = load <4 x float> addrspace(8)* %85
>  %87 = extractelement <4 x float> %86, i32 3
>  %88 = fmul float %87, %0
>  %89 = bitcast float %53 to i32
>  %90 = add i32 41, %89
>  %91 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %90
>  %92 = load <4 x float> addrspace(8)* %91
>  %93 = extractelement <4 x float> %92, i32 0
>  %94 = fmul float %93, %1
>  %95 = fadd float %94, %73
>  %96 = add i32 41, %89
>  %97 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %96
>  %98 = load <4 x float> addrspace(8)* %97
>  %99 = extractelement <4 x float> %98, i32 1
>  %100 = fmul float %99, %1
>  %101 = fadd float %100, %78
>  %102 = add i32 41, %89
>  %103 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %102
>  %104 = load <4 x float> addrspace(8)* %103
>  %105 = extractelement <4 x float> %104, i32 2
>  %106 = fmul float %105, %1
>  %107 = fadd float %106, %83
>  %108 = add i32 41, %89
>  %109 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %108
>  %110 = load <4 x float> addrspace(8)* %109
>  %111 = extractelement <4 x float> %110, i32 3
>  %112 = fmul float %111, %1
>  %113 = fadd float %112, %88
>  %114 = bitcast float %39 to i32
>  %115 = add i32 42, %114
>  %116 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %115
>  %117 = load <4 x float> addrspace(8)* %116
>  %118 = extractelement <4 x float> %117, i32 0
>  %119 = fmul float %118, %2
>  %120 = fadd float %119, %95
>  %121 = add i32 42, %114
>  %122 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %121
>  %123 = load <4 x float> addrspace(8)* %122
>  %124 = extractelement <4 x float> %123, i32 1
>  %125 = fmul float %124, %2
>  %126 = fadd float %125, %101
>  %127 = add i32 42, %114
>  %128 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %127
>  %129 = load <4 x float> addrspace(8)* %128
>  %130 = extractelement <4 x float> %129, i32 2
>  %131 = fmul float %130, %2
>  %132 = fadd float %131, %107
>  %133 = add i32 42, %114
>  %134 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %133
>  %135 = load <4 x float> addrspace(8)* %134
>  %136 = extractelement <4 x float> %135, i32 3
>  %137 = fmul float %136, %2
>  %138 = fadd float %137, %113
>  %139 = bitcast float %25 to i32
>  %140 = add i32 43, %139
>  %141 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %140
>  %142 = load <4 x float> addrspace(8)* %141
>  %143 = extractelement <4 x float> %142, i32 0
>  %144 = fmul float %143, %3
>  %145 = fadd float %144, %120
>  %146 = add i32 43, %139
>  %147 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %146
>  %148 = load <4 x float> addrspace(8)* %147
>  %149 = extractelement <4 x float> %148, i32 1
>  %150 = fmul float %149, %3
>  %151 = fadd float %150, %126
>  %152 = add i32 43, %139
>  %153 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %152
>  %154 = load <4 x float> addrspace(8)* %153
>  %155 = extractelement <4 x float> %154, i32 2
>  %156 = fmul float %155, %3
>  %157 = fadd float %156, %132
>  %158 = add i32 43, %139
>  %159 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %158
>  %160 = load <4 x float> addrspace(8)* %159
>  %161 = extractelement <4 x float> %160, i32 3
>  %162 = fmul float %161, %3
>  %163 = fadd float %162, %138
>  %164 = fmul float %8, 2.500000e-01
>  %165 = fptosi float %164 to i32
>  %166 = bitcast i32 %165 to float
>  %167 = bitcast float %166 to i32
>  %168 = sitofp i32 %167 to float
>  %169 = fcmp uge float %168, 7.000000e+00
>  %170 = select i1 %169, float 7.000000e+00, float %168
>  %171 = fcmp uge float %170, 0.000000e+00
>  %172 = select i1 %171, float %170, float 0.000000e+00
>  %173 = fptosi float %172 to i32
>  %174 = bitcast i32 %173 to float
>  %175 = bitcast float %174 to i32
>  %176 = add i32 32, %175
>  %177 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %176
>  %178 = load <4 x float> addrspace(8)* %177
>  %179 = extractelement <4 x float> %178, i32 0
>  %180 = add i32 32, %175
>  %181 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %180
>  %182 = load <4 x float> addrspace(8)* %181
>  %183 = extractelement <4 x float> %182, i32 1
>  %184 = add i32 32, %175
>  %185 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %184
>  %186 = load <4 x float> addrspace(8)* %185
>  %187 = extractelement <4 x float> %186, i32 2
>  %188 = add i32 32, %175
>  %189 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %188
>  %190 = load <4 x float> addrspace(8)* %189
>  %191 = extractelement <4 x float> %190, i32 3
>  %192 = fptosi float %8 to i32
>  %193 = bitcast i32 %192 to float
>  %194 = bitcast float %193 to i32
>  %195 = sitofp i32 %194 to float
>  %196 = fcmp uge float %195, 3.100000e+01
>  %197 = select i1 %196, float 3.100000e+01, float %195
>  %198 = fcmp uge float %197, 0.000000e+00
>  %199 = select i1 %198, float %197, float 0.000000e+00
>  %200 = fptosi float %199 to i32
>  %201 = bitcast i32 %200 to float
>  %202 = bitcast float %201 to i32
>  %203 = add i32 0, %202
>  %204 = getelementptr [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 %203
>  %205 = load <4 x float> addrspace(8)* %204
>  %206 = extractelement <4 x float> %205, i32 0
>  %207 = fmul float %4, %187
>  %208 = fadd float %207, %179
>  %209 = fmul float %5, %191
>  %210 = fadd float %209, %183
>  %211 = insertelement <4 x float> undef, float %145, i32 0
>  %212 = insertelement <4 x float> %211, float %151, i32 1
>  %213 = insertelement <4 x float> %212, float %157, i32 2
>  %214 = insertelement <4 x float> %213, float %163, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %214, i32 60, i32 1)
>  %215 = insertelement <4 x float> undef, float %208, i32 0
>  %216 = insertelement <4 x float> %215, float %210, i32 1
>  %217 = insertelement <4 x float> %216, float %206, i32 2
>  %218 = insertelement <4 x float> %217, float %113, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %218, i32 0, i32 2)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 142 dw -- 9 gprs -- 1 nstack -------------
>shader 61 -- 6
>0000 00000000 89800000  CALL_FS @0 
>0002 00000014 A07C0000  ALU 32 @40 
> 0040 001FA003 20000210     1      MUL_IEEE                 R0.y,  R3.x, [0x3E800000 0.250000]
> 0042 80000003 00006B10            FLT_TO_INT               R0.x,  R3.x
> 0044 3E800000                                               0.250000 (1048576000)
> 0046 800000FF 00006C10     2      INT_TO_FLT               R0.x,  PS
> 0048 001FA0FF 00000410     3      MIN                      R0.x,  PS, [0x41F80000 31.000000]
> 0050 80000400 20006B10            FLT_TO_INT               R0.y,  R0.y
> 0052 41F80000                                               31.000000 (1106771968)
> 0054 001FC0FE 000340F8     4      CNDGE                    R0.x,  PV.x, PV.x, 0
> 0056 800000FF 20006C10            INT_TO_FLT               R0.y,  PS
> 0058 001FA0FF 20000410     5      MIN                      R0.y,  PS, [0x40E00000 7.000000]
> 0060 800000FE 00006B10            FLT_TO_INT               R0.x,  PV.x
> 0062 40E00000                                               7.000000 (1088421888)
> 0064 809FC4FE 200340F8     6      CNDGE                    R0.y,  PV.y, PV.y, 0
> 0066 800004FE 00806B10     7      FLT_TO_INT               R4.x,  PV.y
> 0068 001FA0FF 00603410     8      ADD_INT                  R3.x,  PS, [0x00000020 0.000000]
> 0070 809FA0FF 20007210            LSHL_INT                 R0.y,  PS, [0x00000002 0.000000]
> 0072 00000020                                               0.000000 (32)
> 0073 00000002                                               0.000000 (2)
> 0074 001FA0FF 00803410     9      ADD_INT                  R4.x,  PS, [0x0000002B 0.000000]
> 0076 009FA0FF 20603410            ADD_INT                  R3.y,  PS, [0x0000002A 0.000000]
> 0078 011FA0FF 40003410            ADD_INT                  R0.z,  PS, [0x00000029 0.000000]
> 0080 819FA0FF 60003410            ADD_INT                  R0.w,  PS, [0x00000028 0.000000]
> 0082 0000002B                                               0.000000 (43)
> 0083 0000002A                                               0.000000 (42)
> 0084 00000029                                               0.000000 (41)
> 0085 00000028                                               0.000000 (40)
> 0086 001FA0FE 00A03010    10      AND_INT                  R5.x,  PV.x, [0x0FFFFFFF 0.000000]
> 0088 809FA4FE 00C03010            AND_INT                  R6.x,  PV.y, [0x0FFFFFFE 0.000000]
> 0090 0FFFFFFF                                               0.000000 (268435455)
> 0091 0FFFFFFE                                               0.000000 (268435454)
> 0092 001FA800 00803010    11      AND_INT                  R4.x,  R0.z, [0x0FFFFFFF 0.000000]
> 0094 809FAC00 00E03010            AND_INT                  R7.x,  R0.w, [0x0FFFFFFC 0.000000]
> 0096 0FFFFFFF                                               0.000000 (268435455)
> 0097 0FFFFFFC                                               0.000000 (268435452)
> 0098 001FA003 01003010    12      AND_INT                  R8.x,  R3.x, [0x0FFFFFFF 0.000000]
> 0100 801FA000 00603010            AND_INT                  R3.x,  R0.x, [0x0FFFFFFF 0.000000]
> 0102 0FFFFFFF                                               0.000000 (268435455)
>0004 00000008 81000400 CF_NATIVE
>0006 0000000C 81000C00 CF_NATIVE
>0008 00000034 A0480000  ALU 19 @104 
> 0104 00002007 01000210    13      MUL_IEEE                 R8.x,  R7.x, R1.x
> 0106 00002407 21000210            MUL_IEEE                 R8.y,  R7.y, R1.x
> 0108 00002C07 40400210            MUL_IEEE                 R2.z,  R7.w, R1.x
> 0110 80002807 60400210            MUL_IEEE                 R2.w,  R7.z, R1.x
> 0112 00802004 002280FE    14      MULADD_IEEE              R1.x,  R4.x, R1.y, PV.x
> 0114 00802404 20E284FE            MULADD_IEEE              R7.y,  R4.y, R1.y, PV.y
> 0116 00802804 40E28CFE            MULADD_IEEE              R7.z,  R4.z, R1.y, PV.w
> 0118 80802C04 608288FE            MULADD_IEEE              R4.w,  R4.w, R1.y, PV.z
> 0120 01002006 002280FE    15      MULADD_IEEE              R1.x,  R6.x, R1.z, PV.x
> 0122 01002406 202A84FE            MULADD_IEEE              R1.y,  R6.y, R1.z, PV.y  BS:2
> 0124 01002806 404288FE            MULADD_IEEE              R2.z,  R6.z, R1.z, PV.z
> 0126 01002C06 60428CFE            MULADD_IEEE              R2.w,  R6.w, R1.z, PV.w
> 0128 8180A402 20828405            MULADD_IEEE              R4.y,  R2.y, R5.w, R5.y
> 0130 0100A002 00868005    16      MULADD_IEEE              R4.x,  R2.x, R5.z, R5.x  BS:1
> 0132 01802400 20C284FE            MULADD_IEEE              R6.y,  R0.y, R1.w, PV.y
> 0134 01802800 40C288FE            MULADD_IEEE              R6.z,  R0.z, R1.w, PV.z
> 0136 01802C00 60C28CFE            MULADD_IEEE              R6.w,  R0.w, R1.w, PV.w
> 0138 80000003 40801910            MOV                      R4.z,  R3.x
> 0140 81802000 00C28001    17      MULADD_IEEE              R6.x,  R0.x, R1.w, R1.x
>0010 C003203C 94400688 CF_NATIVE
>0012 C0024000 94600688 CF_NATIVE
>0014 00000000 80200000 CF_NATIVE
>0016 40050040 E8CD1000 CF_NATIVE
>0018 00080000 00000000 CF_NATIVE
>0020 40030040 E8CD1003 CF_NATIVE
>0022 00080000 00000000 CF_NATIVE
>0024 40080040 E8CD1005 CF_NATIVE
>0026 00080000 00000000 CF_NATIVE
>0028 40070040 E8CD1007 CF_NATIVE
>0030 00080000 00000000 CF_NATIVE
>0032 40040040 E8CD1004 CF_NATIVE
>0034 00080000 00000000 CF_NATIVE
>0036 40060040 E8CD1006 CF_NATIVE
>0038 00080000 00000000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>--------------------------------------------------------------
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>DCL SAMP[0]
>  0: TEX OUT[0], IN[0], SAMP[0], 2D
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main() #0 {
>main_body:
>  %0 = call float @llvm.R600.load.input(i32 0)
>  %1 = call float @llvm.R600.load.input(i32 1)
>  %2 = call float @llvm.R600.load.input(i32 2)
>  %3 = call float @llvm.R600.load.input(i32 3)
>  %4 = insertelement <4 x float> undef, float %0, i32 0
>  %5 = insertelement <4 x float> %4, float %1, i32 1
>  %6 = insertelement <4 x float> %5, float %2, i32 2
>  %7 = insertelement <4 x float> %6, float %3, i32 3
>  %8 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %7, i32 16, i32 0, i32 2)
>  %9 = extractelement <4 x float> %8, i32 0
>  %10 = extractelement <4 x float> %8, i32 1
>  %11 = extractelement <4 x float> %8, i32 2
>  %12 = extractelement <4 x float> %8, i32 3
>  %13 = insertelement <4 x float> undef, float %9, i32 0
>  %14 = insertelement <4 x float> %13, float %10, i32 1
>  %15 = insertelement <4 x float> %14, float %11, i32 2
>  %16 = insertelement <4 x float> %15, float %12, i32 3
>  call void @llvm.R600.store.swizzle(<4 x float> %16, i32 0, i32 0)
>  ret void
>}
>
>; Function Attrs: readnone
>declare float @llvm.R600.load.input(i32) #1
>
>; Function Attrs: readnone
>declare <4 x float> @llvm.AMDGPU.tex(<4 x float>, i32, i32, i32) #1
>
>declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { readnone }
>--------------------------------------------------------------
>bytecode 12 dw -- 1 gprs -- 1 nstack -------------
>shader 62 -- 6
>0000 00000004 80800000 CF_NATIVE
>0002 C0000000 94600688 CF_NATIVE
>0004 00000000 80200000 CF_NATIVE
>0006 00000000 00000000 CF_NATIVE
>0008 00001010 F00D1000 CF_NATIVE
>0010 68800000 00000000 CF_NATIVE
>--------------------------------------
>______________________________________________________________
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:gles2_cmd_decoder.cc(5859)] PERFORMANCE WARNING: Attribute 0 is disabled. This has signficant performance penalty
>[15188:15188:0515/132755:ERROR:logger.cc(44)] Too many GL errors, not reporting any more for this context. use --disable-gl-error-limit to see all errors.

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Attachments on bug 64193: 78827 | 78828 | 78854 | 78855 | 79304 | 79305 | 79339 | 79340

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