Attachment 81038 Details for Bug 65873 – Output from llc -debug-only=isel --march=r600 --mcpu=verde < vload-int.ll

Output from llc -debug-only=isel --march=r600 --mcpu=verde < vload-int.ll

vload-int.ll.err (text/plain), 14.05 KB, created by Aaron Watry on 2013-06-18 20:20:15 UTC

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Creator: Aaron Watry

Created: 2013-06-18 20:20:15 UTC

Size: 14.05 KB

patch

obsolete

>
>
>
>=== vecload2
>Initial selection DAG: BB#0 'vecload2:entry'
>SelectionDAG has 24 nodes:
>  0x1844e08: ch = EntryToken
>
>    0x1844e08: <multiple use>
>    0x1878b40: i64 = Register %vreg0
>
>  0x1878c40: i64,ch = CopyFromReg 0x1844e08, 0x1878b40
>
>  0x1878f40: i64 = undef
>
>    0x1844e08: <multiple use>
>      0x1878c40: <multiple use>
>      0x1878d40: i64 = Constant<36>
>
>    0x1878e40: i64 = add 0x1878c40, 0x1878d40
>
>    0x1878f40: <multiple use>
>  0x1879040: i64,ch = load 0x1844e08, 0x1878e40, 0x1878f40<LD8[undef]>
>
>    0x1844e08: <multiple use>
>        0x1844e08: <multiple use>
>          0x1878c40: <multiple use>
>          0x1879140: i64 = Constant<44>
>
>        0x1879240: i64 = add 0x1878c40, 0x1879140
>
>        0x1878f40: <multiple use>
>      0x1879340: i64,ch = load 0x1844e08, 0x1879240, 0x1878f40<LD8[undef]>
>
>      0x1879440: i64 = Constant<4294967295>
>
>    0x1879540: i64 = and 0x1879340, 0x1879440 [ORD=2]
>
>    0x1878f40: <multiple use>
>  0x1879740: v2i32,ch = load 0x1844e08, 0x1879540, 0x1878f40<LD8[%2](align=4)(tbaa=!"int")> [ORD=4]
>
>  0x1879840: i32 = Constant<0>
>
>  0x187ab00: i32 = Constant<1>
>
>        0x1879740: <multiple use>
>          0x1879740: <multiple use>
>          0x1879640: i64 = Constant<0>
>
>        0x1879940: i32 = extract_vector_elt 0x1879740, 0x1879640 [ORD=5]
>
>        0x1879040: <multiple use>
>        0x1878f40: <multiple use>
>      0x187aa00: ch = store 0x1879740:1, 0x1879940, 0x1879040, 0x1878f40<ST4[%out](tbaa=!"int")> [ORD=6]
>
>        0x1879740: <multiple use>
>        0x187ac00: i64 = Constant<1>
>
>      0x187ad00: i32 = extract_vector_elt 0x1879740, 0x187ac00 [ORD=7]
>
>        0x1879040: <multiple use>
>        0x187ae00: i64 = Constant<4>
>
>      0x187af00: i64 = add 0x1879040, 0x187ae00 [ORD=8]
>
>      0x1878f40: <multiple use>
>    0x187b000: ch = store 0x187aa00, 0x187ad00, 0x187af00, 0x1878f40<ST4[%arrayidx1](tbaa=!"int")> [ORD=9]
>
>  0x187b100: ch = RET_FLAG 0x187b000 [ORD=10]
>
>
>Optimized lowered selection DAG: BB#0 'vecload2:entry'
>SelectionDAG has 20 nodes:
>  0x1844e08: ch = EntryToken
>
>    0x1844e08: <multiple use>
>    0x1878b40: i64 = Register %vreg0
>
>  0x1878c40: i64,ch = CopyFromReg 0x1844e08, 0x1878b40
>
>  0x1878f40: i64 = undef
>
>    0x1844e08: <multiple use>
>      0x1878c40: <multiple use>
>      0x1878d40: i64 = Constant<36>
>
>    0x1878e40: i64 = add 0x1878c40, 0x1878d40
>
>    0x1878f40: <multiple use>
>  0x1879040: i64,ch = load 0x1844e08, 0x1878e40, 0x1878f40<LD8[undef]>
>
>    0x1844e08: <multiple use>
>      0x1844e08: <multiple use>
>        0x1878c40: <multiple use>
>        0x1879140: i64 = Constant<44>
>
>      0x1879240: i64 = add 0x1878c40, 0x1879140
>
>      0x1878f40: <multiple use>
>    0x1879840: i64,ch = load 0x1844e08, 0x1879240, 0x1878f40<LD4[undef](align=8), zext from i32>
>
>    0x1878f40: <multiple use>
>  0x1879740: v2i32,ch = load 0x1844e08, 0x1879840, 0x1878f40<LD8[%2](align=4)(tbaa=!"int")> [ORD=4]
>
>        0x1879740: <multiple use>
>          0x1879740: <multiple use>
>          0x1879640: i64 = Constant<0>
>
>        0x1879940: i32 = extract_vector_elt 0x1879740, 0x1879640 [ORD=5]
>
>        0x1879040: <multiple use>
>        0x1878f40: <multiple use>
>      0x187aa00: ch = store 0x1879740:1, 0x1879940, 0x1879040, 0x1878f40<ST4[%out](tbaa=!"int")> [ORD=6]
>
>        0x1879740: <multiple use>
>        0x187ac00: i64 = Constant<1>
>
>      0x187ad00: i32 = extract_vector_elt 0x1879740, 0x187ac00 [ORD=7]
>
>        0x1879040: <multiple use>
>        0x187ae00: i64 = Constant<4>
>
>      0x187af00: i64 = add 0x1879040, 0x187ae00 [ORD=8]
>
>      0x1878f40: <multiple use>
>    0x187b000: ch = store 0x187aa00, 0x187ad00, 0x187af00, 0x1878f40<ST4[%arrayidx1](tbaa=!"int")> [ORD=9]
>
>  0x187b100: ch = RET_FLAG 0x187b000 [ORD=10]
>
>
>Type-legalized selection DAG: BB#0 'vecload2:entry'
>SelectionDAG has 20 nodes:
>  0x1844e08: ch = EntryToken [ID=-3]
>
>    0x1844e08: <multiple use>
>    0x1878b40: i64 = Register %vreg0 [ID=-3]
>
>  0x1878c40: i64,ch = CopyFromReg 0x1844e08, 0x1878b40 [ID=-3]
>
>  0x1878f40: i64 = undef [ID=-3]
>
>    0x1844e08: <multiple use>
>      0x1878c40: <multiple use>
>      0x1878d40: i64 = Constant<36> [ID=-3]
>
>    0x1878e40: i64 = add 0x1878c40, 0x1878d40 [ID=-3]
>
>    0x1878f40: <multiple use>
>  0x1879040: i64,ch = load 0x1844e08, 0x1878e40, 0x1878f40<LD8[undef]> [ID=-3]
>
>    0x1844e08: <multiple use>
>      0x1844e08: <multiple use>
>        0x1878c40: <multiple use>
>        0x1879140: i64 = Constant<44> [ID=-3]
>
>      0x1879240: i64 = add 0x1878c40, 0x1879140 [ID=-3]
>
>      0x1878f40: <multiple use>
>    0x1879840: i64,ch = load 0x1844e08, 0x1879240, 0x1878f40<LD4[undef](align=8), zext from i32> [ID=-3]
>
>    0x1878f40: <multiple use>
>  0x1879740: v2i32,ch = load 0x1844e08, 0x1879840, 0x1878f40<LD8[%2](align=4)(tbaa=!"int")> [ORD=4] [ID=-3]
>
>        0x1879740: <multiple use>
>          0x1879740: <multiple use>
>          0x1879640: i64 = Constant<0> [ID=-3]
>
>        0x1879940: i32 = extract_vector_elt 0x1879740, 0x1879640 [ORD=5] [ID=-3]
>
>        0x1879040: <multiple use>
>        0x1878f40: <multiple use>
>      0x187aa00: ch = store 0x1879740:1, 0x1879940, 0x1879040, 0x1878f40<ST4[%out](tbaa=!"int")> [ORD=6] [ID=-3]
>
>        0x1879740: <multiple use>
>        0x187ac00: i64 = Constant<1> [ID=-3]
>
>      0x187ad00: i32 = extract_vector_elt 0x1879740, 0x187ac00 [ORD=7] [ID=-3]
>
>        0x1879040: <multiple use>
>        0x187ae00: i64 = Constant<4> [ID=-3]
>
>      0x187af00: i64 = add 0x1879040, 0x187ae00 [ORD=8] [ID=-3]
>
>      0x1878f40: <multiple use>
>    0x187b000: ch = store 0x187aa00, 0x187ad00, 0x187af00, 0x1878f40<ST4[%arrayidx1](tbaa=!"int")> [ORD=9] [ID=-3]
>
>  0x187b100: ch = RET_FLAG 0x187b000 [ORD=10] [ID=-3]
>
>
>Legalized selection DAG: BB#0 'vecload2:entry'
>SelectionDAG has 20 nodes:
>  0x1844e08: ch = EntryToken [ID=0]
>
>  0x1878f40: i64 = undef [ID=3]
>
>    0x1844e08: <multiple use>
>    0x1878b40: i64 = Register %vreg0 [ID=1]
>
>  0x1878c40: i64,ch = CopyFromReg 0x1844e08, 0x1878b40 [ID=8]
>
>    0x1844e08: <multiple use>
>      0x1878c40: <multiple use>
>      0x1878d40: i64 = Constant<36> [ID=2]
>
>    0x1878e40: i64 = add 0x1878c40, 0x1878d40 [ID=10]
>
>    0x1878f40: <multiple use>
>  0x1879040: i64,ch = load 0x1844e08, 0x1878e40, 0x1878f40<LD8[undef]> [ID=12]
>
>    0x1844e08: <multiple use>
>      0x1844e08: <multiple use>
>        0x1878c40: <multiple use>
>        0x1879140: i64 = Constant<44> [ID=4]
>
>      0x1879240: i64 = add 0x1878c40, 0x1879140 [ID=9]
>
>      0x1878f40: <multiple use>
>    0x1879840: i64,ch = load 0x1844e08, 0x1879240, 0x1878f40<LD4[undef](align=8), zext from i32> [ID=11]
>
>    0x1878f40: <multiple use>
>  0x1879740: v2i32,ch = load 0x1844e08, 0x1879840, 0x1878f40<LD8[%2](align=4)(tbaa=!"int")> [ORD=4] [ID=13]
>
>        0x1879740: <multiple use>
>          0x1879740: <multiple use>
>          0x1879640: i64 = Constant<0> [ID=5]
>
>        0x1879940: i32 = extract_vector_elt 0x1879740, 0x1879640 [ORD=5] [ID=16]
>
>        0x1879040: <multiple use>
>        0x1878f40: <multiple use>
>      0x187aa00: ch = store 0x1879740:1, 0x1879940, 0x1879040, 0x1878f40<ST4[%out](tbaa=!"int")> [ORD=6] [ID=17]
>
>        0x1879740: <multiple use>
>        0x187ac00: i64 = Constant<1> [ID=6]
>
>      0x187ad00: i32 = extract_vector_elt 0x1879740, 0x187ac00 [ORD=7] [ID=15]
>
>        0x1879040: <multiple use>
>        0x187ae00: i64 = Constant<4> [ID=7]
>
>      0x187af00: i64 = add 0x1879040, 0x187ae00 [ORD=8] [ID=14]
>
>      0x1878f40: <multiple use>
>    0x187b000: ch = store 0x187aa00, 0x187ad00, 0x187af00, 0x1878f40<ST4[%arrayidx1](tbaa=!"int")> [ORD=9] [ID=18]
>
>  0x187b100: ch = RET_FLAG 0x187b000 [ORD=10] [ID=19]
>
>
>Optimized legalized selection DAG: BB#0 'vecload2:entry'
>SelectionDAG has 20 nodes:
>  0x1844e08: ch = EntryToken [ID=0]
>
>  0x1878f40: i64 = undef [ID=3]
>
>    0x1844e08: <multiple use>
>    0x1878b40: i64 = Register %vreg0 [ID=1]
>
>  0x1878c40: i64,ch = CopyFromReg 0x1844e08, 0x1878b40 [ID=8]
>
>    0x1844e08: <multiple use>
>      0x1878c40: <multiple use>
>      0x1878d40: i64 = Constant<36> [ID=2]
>
>    0x1878e40: i64 = add 0x1878c40, 0x1878d40 [ID=10]
>
>    0x1878f40: <multiple use>
>  0x1879040: i64,ch = load 0x1844e08, 0x1878e40, 0x1878f40<LD8[undef]> [ID=12]
>
>    0x1844e08: <multiple use>
>      0x1844e08: <multiple use>
>        0x1878c40: <multiple use>
>        0x1879140: i64 = Constant<44> [ID=4]
>
>      0x1879240: i64 = add 0x1878c40, 0x1879140 [ID=9]
>
>      0x1878f40: <multiple use>
>    0x1879840: i64,ch = load 0x1844e08, 0x1879240, 0x1878f40<LD4[undef](align=8), zext from i32> [ID=11]
>
>    0x1878f40: <multiple use>
>  0x1879740: v2i32,ch = load 0x1844e08, 0x1879840, 0x1878f40<LD8[%2](align=4)(tbaa=!"int")> [ORD=4] [ID=13]
>
>        0x1879740: <multiple use>
>          0x1879740: <multiple use>
>          0x1879640: i64 = Constant<0> [ID=5]
>
>        0x1879940: i32 = extract_vector_elt 0x1879740, 0x1879640 [ORD=5] [ID=16]
>
>        0x1879040: <multiple use>
>        0x1878f40: <multiple use>
>      0x187aa00: ch = store 0x1879740:1, 0x1879940, 0x1879040, 0x1878f40<ST4[%out](tbaa=!"int")> [ORD=6] [ID=17]
>
>        0x1879740: <multiple use>
>        0x187ac00: i64 = Constant<1> [ID=6]
>
>      0x187ad00: i32 = extract_vector_elt 0x1879740, 0x187ac00 [ORD=7] [ID=15]
>
>        0x1879040: <multiple use>
>        0x187ae00: i64 = Constant<4> [ID=7]
>
>      0x187af00: i64 = add 0x1879040, 0x187ae00 [ORD=8] [ID=14]
>
>      0x1878f40: <multiple use>
>    0x187b000: ch = store 0x187aa00, 0x187ad00, 0x187af00, 0x1878f40<ST4[%arrayidx1](tbaa=!"int")> [ORD=9] [ID=18]
>
>  0x187b100: ch = RET_FLAG 0x187b000 [ORD=10] [ID=19]
>
>
>===== Instruction selection begins: BB#0 'entry'
>ISEL: Starting pattern match on root node: 0x187b100: ch = RET_FLAG 0x187b000 [ORD=10] [ID=19]
>
>  Morphed node: 0x187b100: ch = S_ENDPGM 0x187b000 [ORD=10]
>
>ISEL: Match complete!
>ISEL: Starting pattern match on root node: 0x187b000: ch = store 0x187aa00, 0x187ad00, 0x187af00, 0x1878f40<ST4[%arrayidx1](tbaa=!"int")> [ORD=9] [ID=18]
>
>  Initial Opcode index to 37938
>  Created node: 0x1879440: i128,ch = SI_ADDR64_RSRC 0x1879040, 0x187aa00 [ORD=9]
>
>  Morphed node: 0x187b000: ch = BUFFER_STORE_DWORD 0x187ad00, 0x1879440, 0x187ae00, 0x1879540, 0x1879440:1<Mem:ST4[%arrayidx1](tbaa=!"int")> [ORD=9]
>
>ISEL: Match complete!
>ISEL: Starting pattern match on root node: 0x187aa00: ch = store 0x1879740:1, 0x1879940, 0x1879040, 0x1878f40<ST4[%out](tbaa=!"int")> [ORD=6] [ID=17]
>
>  Initial Opcode index to 37938
>  Match failed at index 37949
>  Continuing at 37987
>  Skipped scope entry (due to false predicate) at index 37991, continuing at 38029
>  Created node: 0x1879340: i128,ch = SI_ADDR64_RSRC 0x187af00, 0x1879740:1 [ORD=6]
>
>  Morphed node: 0x187aa00: ch = BUFFER_STORE_DWORD 0x1879940, 0x1879340, 0x1879040, 0x1879540, 0x1879340:1<Mem:ST4[%out](tbaa=!"int")> [ORD=6]
>
>ISEL: Match complete!
>ISEL: Starting pattern match on root node: 0x1879940: i32 = extract_vector_elt 0x1879740, 0x1879640 [ORD=5] [ID=16]
>
>  Initial Opcode index to 20558
>  Skipped scope entry (due to false predicate) at index 20562, continuing at 20720
>  Morphed node: 0x1879940: i32 = EXTRACT_SUBREG 0x1879740, 0x187ab00 [ORD=5]
>
>ISEL: Match complete!
>ISEL: Starting pattern match on root node: 0x187ad00: i32 = extract_vector_elt 0x1879740, 0x187ac00 [ORD=7] [ID=15]
>
>  Initial Opcode index to 20558
>  Skipped scope entry (due to false predicate) at index 20562, continuing at 20720
>  Skipped scope entry (due to false predicate) at index 20727, continuing at 20746
>  Morphed node: 0x187ad00: i32 = EXTRACT_SUBREG 0x1879740, 0x1879640 [ORD=7]
>
>ISEL: Match complete!
>ISEL: Starting pattern match on root node: 0x1879740: v2i32,ch = load 0x1844e08, 0x1879840, 0x1878f40<LD8[%2](align=4)(tbaa=!"int")> [ORD=4] [ID=13]
>
>  Initial Opcode index to 11945
>  Match failed at index 11951
>  Continuing at 12215
>  Match failed at index 12219
>  Continuing at 12555
>  Skipped scope entry (due to false predicate) at index 12567, continuing at 12605
>  Match failed at index 12608
>  Continuing at 12637
>  Continuing at 12638
>  Match failed at index 12639
>  Continuing at 12674
>  Continuing at 12675
>  Match failed at index 12678
>  Continuing at 12753
>  Match failed at index 12755
>  Continuing at 12864
>  Match failed at index 12868
>  Continuing at 13193
>  Skipped scope entry (due to false predicate) at index 13203, continuing at 13241
>  TypeSwitch[v2i32] from 13244 to 13247
>  Created node: 0x187ac00: i128,ch = SI_ADDR64_RSRC 0x187af00, 0x1844e08 [ORD=4]
>
>  Morphed node: 0x1879740: v2i32,ch = BUFFER_LOAD_DWORDX2_ADDR64 0x187ac00, 0x1879840, 0x1879540, 0x187ac00:1<Mem:LD8[%2](align=4)(tbaa=!"int")> [ORD=4]
>
>ISEL: Match complete!
>ISEL: Starting pattern match on root node: 0x1879040: i64,ch = load 0x1844e08, 0x1878e40, 0x1878f40<LD8[undef]> [ID=12]
>
>  Initial Opcode index to 11945
>  Match failed at index 11951
>  Continuing at 12215
>  TypeSwitch[i64] from 12244 to 12266
>  Morphed node: 0x1879040: i64,ch = S_LOAD_DWORDX2_IMM 0x1878c40, 0x187b300, 0x1844e08<Mem:LD8[undef]>
>
>ISEL: Match complete!
>ISEL: Starting pattern match on root node: 0x1879840: i64,ch = load 0x1844e08, 0x1879240, 0x1878f40<LD4[undef](align=8), zext from i32> [ID=11]
>
>  Initial Opcode index to 11945
>  Match failed at index 11951
>  Continuing at 12215
>  Match failed at index 12240
>  Continuing at 12284
>  Match failed at index 12293
>  Continuing at 12363
>  Match failed at index 12368
>  Continuing at 12422
>  Continuing at 12423
>  Match failed at index 12430
>  Continuing at 12554
>  Continuing at 12555
>  Skipped scope entry (due to false predicate) at index 12563, continuing at 12638
>  Match failed at index 12641
>  Continuing at 12674
>  Continuing at 12675
>  Match failed at index 12696
>  Continuing at 12719
>  Match failed at index 12724
>  Continuing at 12752
>  Continuing at 12753
>  Match failed at index 12755
>  Continuing at 12864
>  Match failed at index 12889
>  Continuing at 12933
>  Match failed at index 12942
>  Continuing at 13006
>  Match failed at index 13011
>  Continuing at 13065
>  Continuing at 13066
>  Match failed at index 13072
>  Continuing at 13192
>  Continuing at 13193
>  Match failed at index 13199
>  Continuing at 13305
>LLVM ERROR: Cannot select: 0x1879840: i64,ch = load 0x1844e08, 0x1879240, 0x1878f40<LD4[undef](align=8), zext from i32> [ID=11]
>  0x1879240: i64 = add 0x1878c40, 0x1879140 [ID=9]
>    0x1878c40: i64,ch = CopyFromReg 0x1844e08, 0x1878b40 [ID=8]
>      0x1878b40: i64 = Register %vreg0 [ID=1]
>    0x1879140: i64 = Constant<44> [ID=4]
>  0x1878f40: i64 = undef [ID=3]
>In function: vecload2

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Attachments on bug 65873: 80970 | 80971 | 80972 | 81037 | 81038

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