Attachment 82331 Details for Bug 66450 – Possible fix v2

[patch] Possible fix v2

0001-radeon-uvd-fall-back-to-shader-based-decoding-for-MP.patch (text/plain), 2.67 KB, created by Christian König on 2013-07-11 11:29:11 UTC

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Creator: Christian König

Created: 2013-07-11 11:29:11 UTC

Size: 2.67 KB

patch

obsolete

>From 311e651ab5f073982988b3bfd07ef8514ef31680 Mon Sep 17 00:00:00 2001
>From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>
>Date: Wed, 10 Jul 2013 15:43:16 +0200
>Subject: [PATCH] radeon/uvd: fall back to shader based decoding for MPEG2 on
> UVD 2.x v2
>MIME-Version: 1.0
>Content-Type: text/plain; charset=UTF-8
>Content-Transfer-Encoding: 8bit
>
>UVD 2.x doesn't support hardware decoding of MPEG2, just use shader
>based decoding for those chipsets.
>
>v2: fix interlacing as well
>
>Signed-off-by: Christian KÃ¶nig <christian.koenig@amd.com>
>---
> src/gallium/drivers/r600/r600_uvd.c     |   19 +++++++++++++++----
> src/gallium/drivers/radeon/radeon_uvd.c |    5 ++++-
> 2 files changed, 19 insertions(+), 5 deletions(-)
>
>diff --git a/src/gallium/drivers/r600/r600_uvd.c b/src/gallium/drivers/r600/r600_uvd.c
>index a077a50..3b4aa84 100644
>--- a/src/gallium/drivers/r600/r600_uvd.c
>+++ b/src/gallium/drivers/r600/r600_uvd.c
>@@ -184,10 +184,21 @@ int r600_uvd_get_video_param(struct pipe_screen *screen,
> {
> 	struct r600_screen *rscreen = (struct r600_screen *)screen;
> 
>-	/* No support for MPEG4 on UVD 2.x */
>-	if (param == PIPE_VIDEO_CAP_SUPPORTED && rscreen->family < CHIP_PALM &&
>-	    u_reduce_video_profile(profile) == PIPE_VIDEO_CODEC_MPEG4)
>-		return false;
>+	/* UVD 2.x limits */
>+	if (rscreen->family < CHIP_PALM) {
>+		enum pipe_video_codec codec = u_reduce_video_profile(profile);
>+		switch (param) {
>+		case PIPE_VIDEO_CAP_SUPPORTED:
>+			/* no support for MPEG4 */
>+	    		return codec != PIPE_VIDEO_CODEC_MPEG4;
>+        	case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
>+        	case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
>+			/* and MPEG2 only with shaders */
>+	    		return codec != PIPE_VIDEO_CODEC_MPEG12;
>+		default:
>+			break;
>+		}
>+	}
> 
> 	return ruvd_get_video_param(screen, profile, param);
> }
>diff --git a/src/gallium/drivers/radeon/radeon_uvd.c b/src/gallium/drivers/radeon/radeon_uvd.c
>index caf3e90..2f98de2 100644
>--- a/src/gallium/drivers/radeon/radeon_uvd.c
>+++ b/src/gallium/drivers/radeon/radeon_uvd.c
>@@ -828,13 +828,16 @@ struct pipe_video_decoder *ruvd_create_decoder(struct pipe_context *context,
> 					       ruvd_set_dtb set_dtb)
> {
> 	unsigned dpb_size = calc_dpb_size(profile, width, height, max_references);
>+	struct radeon_info info;
> 	struct ruvd_decoder *dec;
> 	struct ruvd_msg msg;
> 	int i;
> 
>+	ws->query_info(ws, &info);
>+
> 	switch(u_reduce_video_profile(profile)) {
> 	case PIPE_VIDEO_CODEC_MPEG12:
>-		if (entrypoint > PIPE_VIDEO_ENTRYPOINT_BITSTREAM)
>+		if (entrypoint > PIPE_VIDEO_ENTRYPOINT_BITSTREAM || info.family < CHIP_PALM)
> 			return vl_create_mpeg12_decoder(context, profile, entrypoint,
> 							chroma_format, width,
> 							height, max_references, expect_chunked_decode);
>-- 
>1.7.9.5
>

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