Attachment 82709 Details for Bug 66805 – LLVM Patch #1

[patch] LLVM Patch #1

0001-TargetLowering-Add-getVectorIdxTy-function.patch (text/plain), 34.96 KB, created by Tom Stellard on 2013-07-19 20:27:10 UTC

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Creator: Tom Stellard

Created: 2013-07-19 20:27:10 UTC

Size: 34.96 KB

patch

obsolete

>From e1d97c32460a86aa199c0e8e9193882d88b23239 Mon Sep 17 00:00:00 2001
>From: Tom Stellard <thomas.stellard@amd.com>
>Date: Fri, 19 Jul 2013 08:02:31 -0700
>Subject: [PATCH 1/3] TargetLowering: Add getVectorIdxTy() function
>
>This virtual function can be implemented by targets to specify the type
>to use for the index operand of INSERT_VECTOR_ELT, EXTRACT_VECTOR_ELT,
>INSERT_SUBVECTOR, EXTRACT_SUBVECTOR.  The default implementation returns
>the result from TargetLowering::getPointerTy()
>
>The previous code was using TargetLowering::getPointerTy() for vector
>indices, and I think the reason for this was to make it easier to
>handle non-constant vector indices, which required that the vector be
>stored in memory.
>
>Using TargetLowering::getPointerTy() can be a problem for targets with
>pointer sizes that differ across address spaces, since the address space
>used to store the vector may have a different pointer size than the
>'zero' address space which is what TargetLowering::getPointerTy() uses.
>
>Initially, I wanted to modify the code so that it always used MVT::i32
>as the type for vector indices, since this is the type used in the LLVM
>IR specification.  However, the change was rather invasive, and I ended up
>breaking a lot of the X86 tests.
>
>There is no intended functionality change with this patch.
>---
> include/llvm/Target/TargetLowering.h              |  7 ++
> lib/CodeGen/SelectionDAG/DAGCombiner.cpp          |  4 +-
> lib/CodeGen/SelectionDAG/LegalizeDAG.cpp          | 11 +--
> lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 11 +--
> lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp | 12 ++--
> lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp    |  6 +-
> lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp  | 85 +++++++++++++----------
> lib/CodeGen/SelectionDAG/SelectionDAG.cpp         |  2 +-
> lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp  | 36 +++++-----
> 9 files changed, 102 insertions(+), 72 deletions(-)
>
>diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h
>index 09a93f9..c50ef44 100644
>--- a/include/llvm/Target/TargetLowering.h
>+++ b/include/llvm/Target/TargetLowering.h
>@@ -156,6 +156,13 @@ public:
> 
>   EVT getShiftAmountTy(EVT LHSTy) const;
> 
>+  /// Returns the type to be used for the index operand of:
>+  /// ISD::INSERT_VECTOR_ELT, ISD::EXTRACT_VECTOR_ELT,
>+  /// ISD::INSERT_SUBVECTOR, and ISD::EXTRACT_SUBVECTOR
>+  virtual MVT getVectorIdxTy() const {
>+    return getPointerTy();
>+  }
>+
>   /// Return true if the select operation is expensive for this target.
>   bool isSelectExpensive() const { return SelectIsExpensive; }
> 
>diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
>index 111803f..3cb7f4b 100644
>--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
>+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
>@@ -5448,7 +5448,7 @@ SDValue DAGCombiner::visitTRUNCATE(SDNode *N) {
>     SDValue EltNo = N0->getOperand(1);
>     if (isa<ConstantSDNode>(EltNo) && isTypeLegal(NVT)) {
>       int Elt = cast<ConstantSDNode>(EltNo)->getZExtValue();
>-      EVT IndexTy = N0->getOperand(1).getValueType();
>+      EVT IndexTy = TLI.getVectorIdxTy();
>       int Index = isLE ? (Elt*SizeRatio) : (Elt*SizeRatio + (SizeRatio-1));
> 
>       SDValue V = DAG.getNode(ISD::BITCAST, SDLoc(N),
>@@ -8685,7 +8685,7 @@ SDValue DAGCombiner::visitEXTRACT_VECTOR_ELT(SDNode *N) {
>       OrigElt -= NumElem;
>     }
> 
>-    EVT IndexTy = N->getOperand(1).getValueType();
>+    EVT IndexTy = TLI.getVectorIdxTy();
>     return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N), NVT,
>                        InVec, DAG.getConstant(OrigElt, IndexTy));
>   }
>diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
>index ee12474..bd844e5 100644
>--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
>+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
>@@ -3071,11 +3071,12 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node) {
>       if (Idx < NumElems)
>         Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
>                                   Op0,
>-                                  DAG.getIntPtrConstant(Idx)));
>+                                  DAG.getConstant(Idx, TLI.getVectorIdxTy())));
>       else
>         Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
>                                   Op1,
>-                                  DAG.getIntPtrConstant(Idx - NumElems)));
>+                                  DAG.getConstant(Idx - NumElems,
>+                                                  TLI.getVectorIdxTy())));
>     }
> 
>     Tmp1 = DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], Ops.size());
>@@ -3688,10 +3689,12 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node) {
>     for (unsigned Idx = 0; Idx < NumElem; Idx++) {
>       SDValue Ex = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
>                                VT.getScalarType(),
>-                               Node->getOperand(0), DAG.getIntPtrConstant(Idx));
>+                               Node->getOperand(0), DAG.getConstant(Idx,
>+                                                    TLI.getVectorIdxTy()));
>       SDValue Sh = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
>                                VT.getScalarType(),
>-                               Node->getOperand(1), DAG.getIntPtrConstant(Idx));
>+                               Node->getOperand(1), DAG.getConstant(Idx,
>+                                                    TLI.getVectorIdxTy()));
>       Scalars.push_back(DAG.getNode(Node->getOpcode(), dl,
>                                     VT.getScalarType(), Ex, Sh));
>     }
>diff --git a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
>index 76c028d..20056e4 100644
>--- a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
>+++ b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
>@@ -966,7 +966,7 @@ SDValue DAGTypeLegalizer::PromoteIntOp_INSERT_VECTOR_ELT(SDNode *N,
>   assert(OpNo == 2 && "Different operand and result vector types?");
> 
>   // Promote the index.
>-  SDValue Idx = ZExtPromotedInteger(N->getOperand(2));
>+  SDValue Idx = DAG.getZExtOrTrunc(N->getOperand(2), SDLoc(N), MVT::i32);
>   return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0),
>                                 N->getOperand(1), Idx), 0);
> }
>@@ -2886,7 +2886,7 @@ SDValue DAGTypeLegalizer::PromoteIntRes_EXTRACT_SUBVECTOR(SDNode *N) {
> 
>     // Extract the element from the original vector.
>     SDValue Index = DAG.getNode(ISD::ADD, dl, BaseIdx.getValueType(),
>-      BaseIdx, DAG.getIntPtrConstant(i));
>+      BaseIdx, DAG.getConstant(i, BaseIdx.getValueType()));
>     SDValue Ext = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
>       InVT.getVectorElementType(), N->getOperand(0), Index);
> 
>@@ -2984,7 +2984,8 @@ SDValue DAGTypeLegalizer::PromoteIntRes_CONCAT_VECTORS(SDNode *N) {
>     SDValue Op = N->getOperand(i);
>     for (unsigned j = 0; j < NumElem; ++j) {
>       SDValue Ext = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
>-                                InElemTy, Op, DAG.getIntPtrConstant(j));
>+                                InElemTy, Op, DAG.getConstant(j,
>+                                              TLI.getVectorIdxTy()));
>       Ops[i * NumElem + j] = DAG.getNode(ISD::ANY_EXTEND, dl, OutElemTy, Ext);
>     }
>   }
>@@ -3011,7 +3012,7 @@ SDValue DAGTypeLegalizer::PromoteIntRes_INSERT_VECTOR_ELT(SDNode *N) {
> SDValue DAGTypeLegalizer::PromoteIntOp_EXTRACT_VECTOR_ELT(SDNode *N) {
>   SDLoc dl(N);
>   SDValue V0 = GetPromotedInteger(N->getOperand(0));
>-  SDValue V1 = N->getOperand(1);
>+  SDValue V1 = DAG.getZExtOrTrunc(N->getOperand(1), dl, TLI.getVectorIdxTy());
>   SDValue Ext = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
>     V0->getValueType(0).getScalarType(), V0, V1);
> 
>@@ -3039,7 +3040,7 @@ SDValue DAGTypeLegalizer::PromoteIntOp_CONCAT_VECTORS(SDNode *N) {
>     for (unsigned i=0; i<NumElem; ++i) {
>       // Extract element from incoming vector
>       SDValue Ex = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, SclrTy,
>-      Incoming, DAG.getIntPtrConstant(i));
>+      Incoming, DAG.getConstant(i, TLI.getVectorIdxTy()));
>       SDValue Tr = DAG.getNode(ISD::TRUNCATE, dl, RetSclrTy, Ex);
>       NewOps.push_back(Tr);
>     }
>diff --git a/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp b/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
>index 615d388..b1c38d2 100644
>--- a/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
>+++ b/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
>@@ -80,9 +80,10 @@ void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) {
>       EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
>                                    InVT.getVectorNumElements()/2);
>       Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
>-                       DAG.getIntPtrConstant(0));
>+                       DAG.getConstant(0, TLI.getVectorIdxTy()));
>       Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
>-                       DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
>+                       DAG.getConstant(InNVT.getVectorNumElements(),
>+                                       TLI.getVectorIdxTy()));
>       if (TLI.isBigEndian())
>         std::swap(Lo, Hi);
>       Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
>@@ -115,7 +116,8 @@ void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) {
>       SmallVector<SDValue, 8> Vals;
>       for (unsigned i = 0; i < NumElems; ++i)
>         Vals.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ElemVT,
>-                                   CastInOp, DAG.getIntPtrConstant(i)));
>+                                   CastInOp, DAG.getConstant(i,
>+                                             TLI.getVectorIdxTy())));
> 
>       // Build Lo, Hi pair by pairing extracted elements if needed.
>       unsigned Slot = 0;
>@@ -495,9 +497,9 @@ void DAGTypeLegalizer::SplitRes_SELECT(SDNode *N, SDValue &Lo,
>     unsigned NumElements = Cond.getValueType().getVectorNumElements();
>     EVT VCondTy = EVT::getVectorVT(*DAG.getContext(), MVT::i1, NumElements / 2);
>     CL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VCondTy, Cond,
>-                     DAG.getIntPtrConstant(0));
>+                     DAG.getConstant(0, TLI.getVectorIdxTy()));
>     CH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VCondTy, Cond,
>-                     DAG.getIntPtrConstant(NumElements / 2));
>+                     DAG.getConstant(NumElements / 2, TLI.getVectorIdxTy()));
>   }
> 
>   Lo = DAG.getNode(N->getOpcode(), dl, LL.getValueType(), CL, LL, RL);
>diff --git a/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
>index 7f1351c..bbe11b8 100644
>--- a/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
>+++ b/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
>@@ -551,7 +551,7 @@ SDValue VectorLegalizer::ExpandStore(SDValue Op) {
>   SmallVector<SDValue, 8> Stores;
>   for (unsigned Idx = 0; Idx < NumElem; Idx++) {
>     SDValue Ex = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
>-               RegSclVT, Value, DAG.getIntPtrConstant(Idx));
>+               RegSclVT, Value, DAG.getConstant(Idx, TLI.getVectorIdxTy()));
> 
>     // This scalar TruncStore may be illegal, but we legalize it later.
>     SDValue Store = DAG.getTruncStore(Chain, dl, Ex, BasePTR,
>@@ -755,9 +755,9 @@ SDValue VectorLegalizer::UnrollVSETCC(SDValue Op) {
>   SmallVector<SDValue, 8> Ops(NumElems);
>   for (unsigned i = 0; i < NumElems; ++i) {
>     SDValue LHSElem = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, TmpEltVT, LHS,
>-                                  DAG.getIntPtrConstant(i));
>+                                  DAG.getConstant(i, TLI.getVectorIdxTy()));
>     SDValue RHSElem = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, TmpEltVT, RHS,
>-                                  DAG.getIntPtrConstant(i));
>+                                  DAG.getConstant(i, TLI.getVectorIdxTy()));
>     Ops[i] = DAG.getNode(ISD::SETCC, dl,
>                          TLI.getSetCCResultType(*DAG.getContext(), TmpEltVT),
>                          LHSElem, RHSElem, CC);
>diff --git a/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
>index 75bb609..fdb9b91 100644
>--- a/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
>+++ b/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
>@@ -712,7 +712,8 @@ void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo,
>   Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx);
>   uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
>   Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec,
>-                   DAG.getIntPtrConstant(IdxVal + LoVT.getVectorNumElements()));
>+                   DAG.getConstant(IdxVal + LoVT.getVectorNumElements(),
>+                                   TLI.getVectorIdxTy()));
> }
> 
> void DAGTypeLegalizer::SplitVecRes_FPOWI(SDNode *N, SDValue &Lo,
>@@ -754,7 +755,8 @@ void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo,
>                        Lo.getValueType(), Lo, Elt, Idx);
>     else
>       Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Hi.getValueType(), Hi, Elt,
>-                       DAG.getIntPtrConstant(IdxVal - LoNumElts));
>+                       DAG.getConstant(IdxVal - LoNumElts,
>+                                       TLI.getVectorIdxTy()));
>     return;
>   }
> 
>@@ -853,14 +855,16 @@ void DAGTypeLegalizer::SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi) {
>   EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
>                                LoVT.getVectorNumElements());
>   LL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
>-                   DAG.getIntPtrConstant(0));
>+                   DAG.getConstant(0, TLI.getVectorIdxTy()));
>   LH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
>-                   DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
>+                   DAG.getConstant(InNVT.getVectorNumElements(),
>+                   TLI.getVectorIdxTy()));
> 
>   RL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
>-                   DAG.getIntPtrConstant(0));
>+                   DAG.getConstant(0, TLI.getVectorIdxTy()));
>   RH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
>-                   DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
>+                   DAG.getConstant(InNVT.getVectorNumElements(),
>+                   TLI.getVectorIdxTy()));
> 
>   Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2));
>   Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2));
>@@ -882,9 +886,10 @@ void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo,
>     EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
>                                  LoVT.getVectorNumElements());
>     Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
>-                     DAG.getIntPtrConstant(0));
>+                     DAG.getConstant(0, TLI.getVectorIdxTy()));
>     Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
>-                     DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
>+                     DAG.getConstant(InNVT.getVectorNumElements(),
>+                                     TLI.getVectorIdxTy()));
>   }
> 
>   if (N->getOpcode() == ISD::FP_ROUND) {
>@@ -995,7 +1000,8 @@ void DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N,
> 
>         // Extract the vector element by hand.
>         SVOps.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
>-                                    Inputs[Input], DAG.getIntPtrConstant(Idx)));
>+                                    Inputs[Input], DAG.getConstant(Idx,
>+                                                   TLI.getVectorIdxTy())));
>       }
> 
>       // Construct the Lo/Hi output using a BUILD_VECTOR.
>@@ -1109,8 +1115,8 @@ SDValue DAGTypeLegalizer::SplitVecOp_VSELECT(SDNode *N, unsigned OpNo) {
>   assert(LoNumElts == HiNumElts && "Asymmetric vector split?");
> 
>   LLVMContext &Ctx = *DAG.getContext();
>-  SDValue Zero = DAG.getIntPtrConstant(0);
>-  SDValue LoElts = DAG.getIntPtrConstant(LoNumElts);
>+  SDValue Zero = DAG.getConstant(0, TLI.getVectorIdxTy());
>+  SDValue LoElts = DAG.getConstant(LoNumElts, TLI.getVectorIdxTy());
>   EVT Src0VT = Src0.getValueType();
>   EVT Src0EltTy = Src0VT.getVectorElementType();
>   EVT MaskEltTy = MaskVT.getVectorElementType();
>@@ -1285,7 +1291,7 @@ SDValue DAGTypeLegalizer::SplitVecOp_CONCAT_VECTORS(SDNode *N) {
>     for (unsigned i = 0, e = Op.getValueType().getVectorNumElements();
>          i != e; ++i) {
>       Elts.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT,
>-                                 Op, DAG.getIntPtrConstant(i)));
>+                                 Op, DAG.getConstant(i, TLI.getVectorIdxTy())));
> 
>     }
>   }
>@@ -1334,9 +1340,10 @@ SDValue DAGTypeLegalizer::SplitVecOp_TRUNCATE(SDNode *N) {
>   EVT SplitVT = EVT::getVectorVT(*DAG.getContext(),
>                                  InVT.getVectorElementType(), NumElements/2);
>   SDValue InLoVec = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SplitVT, InVec,
>-                                DAG.getIntPtrConstant(0));
>+                                DAG.getConstant(0, TLI.getVectorIdxTy()));
>   SDValue InHiVec = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SplitVT, InVec,
>-                                DAG.getIntPtrConstant(NumElements/2));
>+                                DAG.getConstant(NumElements/2,
>+                                TLI.getVectorIdxTy()));
>   // Truncate them to 1/2 the element size.
>   EVT HalfElementVT = EVT::getIntegerVT(*DAG.getContext(), InElementSize/2);
>   EVT HalfVT = EVT::getVectorVT(*DAG.getContext(), HalfElementVT,
>@@ -1563,9 +1570,9 @@ SDValue DAGTypeLegalizer::WidenVecRes_Binary(SDNode *N) {
>   while (CurNumElts != 0) {
>     while (CurNumElts >= NumElts) {
>       SDValue EOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp1,
>-                                 DAG.getIntPtrConstant(Idx));
>+                                 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
>       SDValue EOp2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp2,
>-                                 DAG.getIntPtrConstant(Idx));
>+                                 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
>       ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, VT, EOp1, EOp2);
>       Idx += NumElts;
>       CurNumElts -= NumElts;
>@@ -1578,9 +1585,11 @@ SDValue DAGTypeLegalizer::WidenVecRes_Binary(SDNode *N) {
>     if (NumElts == 1) {
>       for (unsigned i = 0; i != CurNumElts; ++i, ++Idx) {
>         SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
>-                                   InOp1, DAG.getIntPtrConstant(Idx));
>+                                   InOp1, DAG.getConstant(Idx,
>+                                                         TLI.getVectorIdxTy()));
>         SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
>-                                   InOp2, DAG.getIntPtrConstant(Idx));
>+                                   InOp2, DAG.getConstant(Idx,
>+                                                         TLI.getVectorIdxTy()));
>         ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, WidenEltVT,
>                                              EOp1, EOp2);
>       }
>@@ -1618,7 +1627,8 @@ SDValue DAGTypeLegalizer::WidenVecRes_Binary(SDNode *N) {
>       unsigned NumToInsert = ConcatEnd - Idx - 1;
>       for (unsigned i = 0, OpIdx = Idx+1; i < NumToInsert; i++, OpIdx++) {
>         VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp,
>-                            ConcatOps[OpIdx], DAG.getIntPtrConstant(i));
>+                            ConcatOps[OpIdx], DAG.getConstant(i,
>+                                                         TLI.getVectorIdxTy()));
>       }
>       ConcatOps[Idx+1] = VecOp;
>       ConcatEnd = Idx + 2;
>@@ -1706,7 +1716,8 @@ SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) {
> 
>     if (InVTNumElts % WidenNumElts == 0) {
>       SDValue InVal = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InWidenVT,
>-                                  InOp, DAG.getIntPtrConstant(0));
>+                                  InOp, DAG.getConstant(0,
>+                                                        TLI.getVectorIdxTy()));
>       // Extract the input and convert the shorten input vector.
>       if (N->getNumOperands() == 1)
>         return DAG.getNode(Opcode, DL, WidenVT, InVal);
>@@ -1721,7 +1732,7 @@ SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) {
>   unsigned i;
>   for (i=0; i < MinElts; ++i) {
>     SDValue Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, InEltVT, InOp,
>-                              DAG.getIntPtrConstant(i));
>+                              DAG.getConstant(i, TLI.getVectorIdxTy()));
>     if (N->getNumOperands() == 1)
>       Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val);
>     else
>@@ -1949,7 +1960,7 @@ SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) {
>       InOp = GetWidenedVector(InOp);
>     for (unsigned j=0; j < NumInElts; ++j)
>       Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
>-                               DAG.getIntPtrConstant(j));
>+                               DAG.getConstant(j, TLI.getVectorIdxTy()));
>   }
>   SDValue UndefVal = DAG.getUNDEF(EltVT);
>   for (; Idx < WidenNumElts; ++Idx)
>@@ -2007,7 +2018,7 @@ SDValue DAGTypeLegalizer::WidenVecRes_CONVERT_RNDSAT(SDNode *N) {
>     if (InVTNumElts % WidenNumElts == 0) {
>       // Extract the input and convert the shorten input vector.
>       InOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InWidenVT, InOp,
>-                         DAG.getIntPtrConstant(0));
>+                         DAG.getConstant(0, TLI.getVectorIdxTy()));
>       return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
>                                   SatOp, CvtCode);
>     }
>@@ -2023,7 +2034,7 @@ SDValue DAGTypeLegalizer::WidenVecRes_CONVERT_RNDSAT(SDNode *N) {
>   unsigned i;
>   for (i=0; i < MinElts; ++i) {
>     SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
>-                                 DAG.getIntPtrConstant(i));
>+                                 DAG.getConstant(i, TLI.getVectorIdxTy()));
>     Ops[i] = DAG.getConvertRndSat(WidenVT, dl, ExtVal, DTyOp, STyOp, RndOp,
>                                   SatOp, CvtCode);
>   }
>@@ -2066,7 +2077,7 @@ SDValue DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
>   unsigned i;
>   for (i=0; i < NumElts; ++i)
>     Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
>-                         DAG.getIntPtrConstant(IdxVal+i));
>+                         DAG.getConstant(IdxVal+i, TLI.getVectorIdxTy()));
> 
>   SDValue UndefVal = DAG.getUNDEF(EltVT);
>   for (; i < WidenNumElts; ++i)
>@@ -2293,7 +2304,7 @@ SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) {
>   for (unsigned i=0; i < NumElts; ++i)
>     Ops[i] = DAG.getNode(Opcode, dl, EltVT,
>                          DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
>-                                     DAG.getIntPtrConstant(i)));
>+                                     DAG.getConstant(i, TLI.getVectorIdxTy())));
> 
>   return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
> }
>@@ -2314,7 +2325,7 @@ SDValue DAGTypeLegalizer::WidenVecOp_BITCAST(SDNode *N) {
>     if (TLI.isTypeLegal(NewVT)) {
>       SDValue BitOp = DAG.getNode(ISD::BITCAST, dl, NewVT, InOp);
>       return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, BitOp,
>-                         DAG.getIntPtrConstant(0));
>+                         DAG.getConstant(0, TLI.getVectorIdxTy()));
>     }
>   }
> 
>@@ -2342,7 +2353,7 @@ SDValue DAGTypeLegalizer::WidenVecOp_CONCAT_VECTORS(SDNode *N) {
>       InOp = GetWidenedVector(InOp);
>     for (unsigned j=0; j < NumInElts; ++j)
>       Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
>-                               DAG.getIntPtrConstant(j));
>+                               DAG.getConstant(j, TLI.getVectorIdxTy()));
>   }
>   return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
> }
>@@ -2397,7 +2408,8 @@ SDValue DAGTypeLegalizer::WidenVecOp_SETCC(SDNode *N) {
>                                SVT.getVectorElementType(),
>                                N->getValueType(0).getVectorNumElements());
>   SDValue CC = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl,
>-                           ResVT, WideSETCC, DAG.getIntPtrConstant(0));
>+                           ResVT, WideSETCC, DAG.getConstant(0,
>+                                             TLI.getVectorIdxTy()));
> 
>   return PromoteTargetBoolean(CC, N->getValueType(0));
> }
>@@ -2470,6 +2482,7 @@ static EVT FindMemType(SelectionDAG& DAG, const TargetLowering &TLI,
> static SDValue BuildVectorFromScalar(SelectionDAG& DAG, EVT VecTy,
>                                      SmallVectorImpl<SDValue> &LdOps,
>                                      unsigned Start, unsigned End) {
>+  const TargetLowering &TLI = DAG.getTargetLoweringInfo();
>   SDLoc dl(LdOps[Start]);
>   EVT LdTy = LdOps[Start].getValueType();
>   unsigned Width = VecTy.getSizeInBits();
>@@ -2490,7 +2503,7 @@ static SDValue BuildVectorFromScalar(SelectionDAG& DAG, EVT VecTy,
>       LdTy = NewLdTy;
>     }
>     VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, VecOp, LdOps[i],
>-                        DAG.getIntPtrConstant(Idx++));
>+                        DAG.getConstant(Idx++, TLI.getVectorIdxTy()));
>   }
>   return DAG.getNode(ISD::BITCAST, dl, VecTy, VecOp);
> }
>@@ -2729,7 +2742,7 @@ void DAGTypeLegalizer::GenWidenVectorStores(SmallVectorImpl<SDValue> &StChain,
>       unsigned NumVTElts = NewVT.getVectorNumElements();
>       do {
>         SDValue EOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp,
>-                                   DAG.getIntPtrConstant(Idx));
>+                                   DAG.getConstant(Idx, TLI.getVectorIdxTy()));
>         StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
>                                     ST->getPointerInfo().getWithOffset(Offset),
>                                        isVolatile, isNonTemporal,
>@@ -2749,7 +2762,7 @@ void DAGTypeLegalizer::GenWidenVectorStores(SmallVectorImpl<SDValue> &StChain,
>       Idx = Idx * ValEltWidth / NewVTWidth;
>       do {
>         SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, VecOp,
>-                      DAG.getIntPtrConstant(Idx++));
>+                      DAG.getConstant(Idx++, TLI.getVectorIdxTy()));
>         StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
>                                     ST->getPointerInfo().getWithOffset(Offset),
>                                        isVolatile, isNonTemporal,
>@@ -2794,7 +2807,7 @@ DAGTypeLegalizer::GenWidenVectorTruncStores(SmallVectorImpl<SDValue> &StChain,
>   unsigned Increment = ValEltVT.getSizeInBits() / 8;
>   unsigned NumElts = StVT.getVectorNumElements();
>   SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
>-                            DAG.getIntPtrConstant(0));
>+                            DAG.getConstant(0, TLI.getVectorIdxTy()));
>   StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, BasePtr,
>                                       ST->getPointerInfo(), StEltVT,
>                                       isVolatile, isNonTemporal, Align));
>@@ -2803,7 +2816,7 @@ DAGTypeLegalizer::GenWidenVectorTruncStores(SmallVectorImpl<SDValue> &StChain,
>     SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
>                                      BasePtr, DAG.getIntPtrConstant(Offset));
>     SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
>-                            DAG.getIntPtrConstant(0));
>+                            DAG.getConstant(0, TLI.getVectorIdxTy()));
>     StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, NewBasePtr,
>                                       ST->getPointerInfo().getWithOffset(Offset),
>                                         StEltVT, isVolatile, isNonTemporal,
>@@ -2840,7 +2853,7 @@ SDValue DAGTypeLegalizer::ModifyToType(SDValue InOp, EVT NVT) {
> 
>   if (WidenNumElts < InNumElts && InNumElts % WidenNumElts)
>     return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NVT, InOp,
>-                       DAG.getIntPtrConstant(0));
>+                       DAG.getConstant(0, TLI.getVectorIdxTy()));
> 
>   // Fall back to extract and build.
>   SmallVector<SDValue, 16> Ops(WidenNumElts);
>@@ -2849,7 +2862,7 @@ SDValue DAGTypeLegalizer::ModifyToType(SDValue InOp, EVT NVT) {
>   unsigned Idx;
>   for (Idx = 0; Idx < MinNumElts; ++Idx)
>     Ops[Idx] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
>-                           DAG.getIntPtrConstant(Idx));
>+                           DAG.getConstant(Idx, TLI.getVectorIdxTy()));
> 
>   SDValue UndefVal = DAG.getUNDEF(EltVT);
>   for ( ; Idx < WidenNumElts; ++Idx)
>diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
>index 81d133a..bc6063c 100644
>--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
>+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
>@@ -6140,7 +6140,7 @@ SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
>         Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
>                               OperandEltVT,
>                               Operand,
>-                              getConstant(i, TLI->getPointerTy()));
>+                              getConstant(i, TLI->getVectorIdxTy()));
>       } else {
>         // A scalar operand; just use it as is.
>         Operands[j] = Operand;
>diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
>index 7d87ea1..54cc021 100644
>--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
>+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
>@@ -281,7 +281,7 @@ static SDValue getCopyFromPartsVector(SelectionDAG &DAG, SDLoc DL,
>       assert(PartEVT.getVectorNumElements() > ValueVT.getVectorNumElements() &&
>              "Cannot narrow, it would be a lossy transformation");
>       return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ValueVT, Val,
>-                         DAG.getIntPtrConstant(0));
>+                         DAG.getConstant(0, TLI.getVectorIdxTy()));
>     }
> 
>     // Vector/Vector bitcast.
>@@ -490,7 +490,8 @@ static void getCopyToPartsVector(SelectionDAG &DAG, SDLoc DL,
>       SmallVector<SDValue, 16> Ops;
>       for (unsigned i = 0, e = ValueVT.getVectorNumElements(); i != e; ++i)
>         Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,
>-                                  ElementVT, Val, DAG.getIntPtrConstant(i)));
>+                                  ElementVT, Val, DAG.getConstant(i,
>+                                                  TLI.getVectorIdxTy())));
> 
>       for (unsigned i = ValueVT.getVectorNumElements(),
>            e = PartVT.getVectorNumElements(); i != e; ++i)
>@@ -516,7 +517,7 @@ static void getCopyToPartsVector(SelectionDAG &DAG, SDLoc DL,
>       assert(ValueVT.getVectorNumElements() == 1 &&
>              "Only trivial vector-to-scalar conversions should get here!");
>       Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,
>-                        PartVT, Val, DAG.getIntPtrConstant(0));
>+                        PartVT, Val, DAG.getConstant(0, TLI.getVectorIdxTy()));
> 
>       bool Smaller = ValueVT.bitsLE(PartVT);
>       Val = DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND),
>@@ -546,10 +547,12 @@ static void getCopyToPartsVector(SelectionDAG &DAG, SDLoc DL,
>     if (IntermediateVT.isVector())
>       Ops[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL,
>                            IntermediateVT, Val,
>-                   DAG.getIntPtrConstant(i * (NumElements / NumIntermediates)));
>+                   DAG.getConstant(i * (NumElements / NumIntermediates),
>+                                   TLI.getVectorIdxTy()));
>     else
>       Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,
>-                           IntermediateVT, Val, DAG.getIntPtrConstant(i));
>+                           IntermediateVT, Val,
>+                           DAG.getConstant(i, TLI.getVectorIdxTy()));
>   }
> 
>   // Split the intermediate operands into legal parts.
>@@ -2857,21 +2860,21 @@ void SelectionDAGBuilder::visitBitCast(const User &I) {
> }
> 
> void SelectionDAGBuilder::visitInsertElement(const User &I) {
>+  const TargetLowering &TLI = DAG.getTargetLoweringInfo();
>   SDValue InVec = getValue(I.getOperand(0));
>   SDValue InVal = getValue(I.getOperand(1));
>-  SDValue InIdx = DAG.getNode(ISD::ZERO_EXTEND, getCurSDLoc(),
>-                              TM.getTargetLowering()->getPointerTy(),
>-                              getValue(I.getOperand(2)));
>+  SDValue InIdx = DAG.getSExtOrTrunc(getValue(I.getOperand(2)),
>+                                     getCurSDLoc(), TLI.getVectorIdxTy());
>   setValue(&I, DAG.getNode(ISD::INSERT_VECTOR_ELT, getCurSDLoc(),
>                            TM.getTargetLowering()->getValueType(I.getType()),
>                            InVec, InVal, InIdx));
> }
> 
> void SelectionDAGBuilder::visitExtractElement(const User &I) {
>+  const TargetLowering &TLI = DAG.getTargetLoweringInfo();
>   SDValue InVec = getValue(I.getOperand(0));
>-  SDValue InIdx = DAG.getNode(ISD::ZERO_EXTEND, getCurSDLoc(),
>-                              TM.getTargetLowering()->getPointerTy(),
>-                              getValue(I.getOperand(1)));
>+  SDValue InIdx = DAG.getSExtOrTrunc(getValue(I.getOperand(1)),
>+                                     getCurSDLoc(), TLI.getVectorIdxTy());
>   setValue(&I, DAG.getNode(ISD::EXTRACT_VECTOR_ELT, getCurSDLoc(),
>                            TM.getTargetLowering()->getValueType(I.getType()),
>                            InVec, InIdx));
>@@ -3019,7 +3022,8 @@ void SelectionDAGBuilder::visitShuffleVector(const User &I) {
>           Src = DAG.getUNDEF(VT);
>         else
>           Src = DAG.getNode(ISD::EXTRACT_SUBVECTOR, getCurSDLoc(), VT,
>-                            Src, DAG.getIntPtrConstant(StartIdx[Input]));
>+                            Src, DAG.getConstant(StartIdx[Input],
>+                                                 TLI->getVectorIdxTy()));
>       }
> 
>       // Calculate new mask.
>@@ -3045,7 +3049,7 @@ void SelectionDAGBuilder::visitShuffleVector(const User &I) {
>   // replacing the shuffle with extract and build vector.
>   // to insert and build vector.
>   EVT EltVT = VT.getVectorElementType();
>-  EVT PtrVT = TLI->getPointerTy();
>+  EVT IdxVT = TLI->getVectorIdxTy();
>   SmallVector<SDValue,8> Ops;
>   for (unsigned i = 0; i != MaskNumElts; ++i) {
>     int Idx = Mask[i];
>@@ -3058,7 +3062,7 @@ void SelectionDAGBuilder::visitShuffleVector(const User &I) {
>       if (Idx >= (int)SrcNumElts) Idx -= SrcNumElts;
> 
>       Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, getCurSDLoc(),
>-                        EltVT, Src, DAG.getConstant(Idx, PtrVT));
>+                        EltVT, Src, DAG.getConstant(Idx, IdxVT));
>     }
> 
>     Ops.push_back(Res);
>@@ -4817,7 +4821,7 @@ SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) {
>     Res = DAG.getNode(ISD::INSERT_SUBVECTOR, sdl, DestVT,
>                       getValue(I.getArgOperand(0)),
>                       getValue(I.getArgOperand(1)),
>-                      DAG.getIntPtrConstant(Idx));
>+                      DAG.getConstant(Idx, TLI->getVectorIdxTy()));
>     setValue(&I, Res);
>     return 0;
>   }
>@@ -4830,7 +4834,7 @@ SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) {
>                    DestVT.getVectorNumElements();
>     Res = DAG.getNode(ISD::EXTRACT_SUBVECTOR, sdl, DestVT,
>                       getValue(I.getArgOperand(0)),
>-                      DAG.getIntPtrConstant(Idx));
>+                      DAG.getConstant(Idx, TLI->getVectorIdxTy()));
>     setValue(&I, Res);
>     return 0;
>   }
>-- 
>1.7.11.4
>

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Attachments on bug 66805: 82327 | 82639 | 82707 | 82708 | 82709 | 82710 | 82711 | 82716 | 82717 | 82852 | 82858 | 82866 | 82875

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