Attachment 82717 Details for Bug 66805 – shader dump from HL2 Ep 2 with RADEON_DUMP_SHADERS=1 with patches applied

shader dump from HL2 Ep 2 with RADEON_DUMP_SHADERS=1 with patches applied

stdout.log (text/plain), 1.82 MB, created by Vladimir Usikov on 2013-07-20 07:39:17 UTC

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Description:

Filename:

MIME Type:

Creator: Vladimir Usikov

Created: 2013-07-20 07:39:17 UTC

Size: 1.82 MB

patch

obsolete

>Running Steam on arch rolling 32-bit
>STEAM_RUNTIME is enabled automatically
>Installing breakpad exception handler for appid(steam)/version(1374261093_client)
>[2013-07-20 11:31:14] Startup - updater built Jul 19 2013 10:21:47
>[2013-07-20 11:31:14] Opted in to client beta 'publicbeta' via beta file
>FRAG
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  call void @llvm.SI.export(i32 0, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  ret void
>}
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, i32, i32, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>SI CODE:
>7e000280
>f8001800
>00000000
>bf810000
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
>  %21 = call float @llvm.SI.fs.constant(i32 1, i32 0, i32 %3)
>  %22 = call float @llvm.SI.fs.constant(i32 2, i32 0, i32 %3)
>  %23 = call float @llvm.SI.fs.constant(i32 3, i32 0, i32 %3)
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %20, float %21, float %22, float %23)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>befe0a7e
>befc0306
>c8020302
>c8060202
>c80a0102
>c80e0002
>f800180f
>00010203
>bf810000
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], GENERIC[0], CONSTANT
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
>  %21 = call float @llvm.SI.fs.constant(i32 1, i32 0, i32 %3)
>  %22 = call float @llvm.SI.fs.constant(i32 2, i32 0, i32 %3)
>  %23 = call float @llvm.SI.fs.constant(i32 3, i32 0, i32 %3)
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %20, float %21, float %22, float %23)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>befe0a7e
>befc0306
>c8020302
>c8060202
>c80a0102
>c80e0002
>f800180f
>00010203
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %10 = load <16 x i8> addrspace(2)* %9, !tbaa !0
>  %11 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %10, i32 0, i32 %5)
>  %12 = extractelement <4 x float> %11, i32 0
>  %13 = extractelement <4 x float> %11, i32 1
>  %14 = extractelement <4 x float> %11, i32 2
>  %15 = extractelement <4 x float> %11, i32 3
>  %16 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %17 = load <16 x i8> addrspace(2)* %16, !tbaa !0
>  %18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %5)
>  %19 = extractelement <4 x float> %18, i32 0
>  %20 = extractelement <4 x float> %18, i32 1
>  %21 = extractelement <4 x float> %18, i32 2
>  %22 = extractelement <4 x float> %18, i32 3
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %19, float %20, float %21, float %22)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %12, float %13, float %14, float %15)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0800704
>bf8c007f
>e00c2000
>80000100
>bf8c0770
>f800020f
>04030201
>c0800700
>bf8c000f
>e00c2000
>80000000
>bf8c0770
>f80008cf
>03020100
>bf810000
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  call void @llvm.SI.export(i32 0, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, i32, i32, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>7e000280
>f8001800
>00000000
>bf810000
>Installing breakpad exception handler for appid(steam)/version(1374261093_client)
>unlinked 0 orphaned pipes
>
>(steam:25780): Gtk-WARNING **: ÐÐ°Ð³ÑÑÐ¶Ð°ÐµÐ¼ÑÐ¹ Ð¼Ð¾Ð´ÑÐ»Ñ ÑÐµÐ¼ Ð½Ðµ Ð½Ð°Ð¹Ð´ÐµÐ½ Ð² module_path: Â«qtcurveÂ»,
>/home/behem0th/.gtkrc-2.0:12: error: scanner: unterminated string constant
>Installing breakpad exception handler for appid(steam)/version(1374261093_client)
>Fontconfig error: "/etc/fonts/conf.d/10-scale-bitmap-fonts.conf", line 70: non-double matrix element
>Fontconfig error: "/etc/fonts/conf.d/10-scale-bitmap-fonts.conf", line 70: non-double matrix element
>Fontconfig warning: "/etc/fonts/conf.d/10-scale-bitmap-fonts.conf", line 78: saw unknown, expected number
>[2013-07-20 11:31:15] ÐÑÐ¾Ð²ÐµÑÐºÐ° ÑÑÑÐ°Ð½Ð¾Ð²ÐºÐ¸...
>[2013-07-20 11:31:15] Verification complete
>FRAG
>  0: END
>[0720/113116:WARNING:proxy_service.cc(958)] PAC support disabled because there is no system implementation
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  call void @llvm.SI.export(i32 0, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  ret void
>}
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, i32, i32, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>SI CODE:
>7e000280
>f8001800
>00000000
>bf810000
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
>  %21 = call float @llvm.SI.fs.constant(i32 1, i32 0, i32 %3)
>  %22 = call float @llvm.SI.fs.constant(i32 2, i32 0, i32 %3)
>  %23 = call float @llvm.SI.fs.constant(i32 3, i32 0, i32 %3)
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %20, float %21, float %22, float %23)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>befe0a7e
>befc0306
>c8020302
>c8060202
>c80a0102
>c80e0002
>f800180f
>00010203
>bf810000
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], GENERIC[0], CONSTANT
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
>  %21 = call float @llvm.SI.fs.constant(i32 1, i32 0, i32 %3)
>  %22 = call float @llvm.SI.fs.constant(i32 2, i32 0, i32 %3)
>  %23 = call float @llvm.SI.fs.constant(i32 3, i32 0, i32 %3)
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %20, float %21, float %22, float %23)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>befe0a7e
>befc0306
>c8020302
>c8060202
>c80a0102
>c80e0002
>f800180f
>00010203
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %10 = load <16 x i8> addrspace(2)* %9, !tbaa !0
>  %11 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %10, i32 0, i32 %5)
>  %12 = extractelement <4 x float> %11, i32 0
>  %13 = extractelement <4 x float> %11, i32 1
>  %14 = extractelement <4 x float> %11, i32 2
>  %15 = extractelement <4 x float> %11, i32 3
>  %16 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %17 = load <16 x i8> addrspace(2)* %16, !tbaa !0
>  %18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %5)
>  %19 = extractelement <4 x float> %18, i32 0
>  %20 = extractelement <4 x float> %18, i32 1
>  %21 = extractelement <4 x float> %18, i32 2
>  %22 = extractelement <4 x float> %18, i32 3
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %19, float %20, float %21, float %22)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %12, float %13, float %14, float %15)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0800704
>bf8c007f
>e00c2000
>80000100
>bf8c0770
>f800020f
>04030201
>c0800700
>bf8c000f
>e00c2000
>80000000
>bf8c0770
>f80008cf
>03020100
>bf810000
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  call void @llvm.SI.export(i32 0, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, i32, i32, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>7e000280
>f8001800
>00000000
>bf810000
>Installing breakpad exception handler for appid(steam)/version(1374261093_client)
>Installing breakpad exception handler for appid(steam)/version(1374261093_client)
>Installing breakpad exception handler for appid(steam)/version(1374261093_client)
>PulseAudio connect failed (used only for Mic Volume Control) with error: Access denied
>Installing breakpad exception handler for appid(steam)/version(1374261093_client)
>Installing breakpad exception handler for appid(steam)/version(1374261093_client)
>Installing breakpad exception handler for appid(steam)/version(1374261093_client)
>Errors in resource/styles/steam.styles:
>Unknown key 'visible' set in style 'html-findbar' in file 'resource/styles/steam.styles'
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>DCL SAMP[0]
>  0: TEX OUT[0], IN[0], SAMP[0], 2D
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %21 = load <32 x i8> addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %23 = load <16 x i8> addrspace(2)* %22, !tbaa !0
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %9)
>  %26 = bitcast float %24 to i32
>  %27 = bitcast float %25 to i32
>  %28 = insertelement <2 x i32> undef, i32 %26, i32 0
>  %29 = insertelement <2 x i32> %28, i32 %27, i32 1
>  %30 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %29, <32 x i8> %21, <16 x i8> %23, i32 2)
>  %31 = extractelement <4 x float> %30, i32 0
>  %32 = extractelement <4 x float> %30, i32 1
>  %33 = extractelement <4 x float> %30, i32 2
>  %34 = extractelement <4 x float> %30, i32 3
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %31, float %32, float %33, float %34)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0800300
>c0c20500
>bf8c007f
>f0800f00
>00010002
>bf8c0770
>f800180f
>03020100
>bf810000
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>DCL SAMP[0]
>  0: TEX OUT[0], IN[0], SAMP[0], 2D
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %21 = load <32 x i8> addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %23 = load <16 x i8> addrspace(2)* %22, !tbaa !0
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %9)
>  %26 = bitcast float %24 to i32
>  %27 = bitcast float %25 to i32
>  %28 = insertelement <2 x i32> undef, i32 %26, i32 0
>  %29 = insertelement <2 x i32> %28, i32 %27, i32 1
>  %30 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %29, <32 x i8> %21, <16 x i8> %23, i32 2)
>  %31 = extractelement <4 x float> %30, i32 0
>  %32 = extractelement <4 x float> %30, i32 1
>  %33 = extractelement <4 x float> %30, i32 2
>  %34 = extractelement <4 x float> %30, i32 3
>  %35 = call i32 @llvm.SI.packf16(float %31, float %32)
>  %36 = bitcast i32 %35 to float
>  %37 = call i32 @llvm.SI.packf16(float %33, float %34)
>  %38 = bitcast i32 %37 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %36, float %38, float %36, float %38)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0800300
>c0c20500
>bf8c007f
>f0800f00
>00010002
>bf8c0770
>5e080702
>5e000300
>f8001c0f
>04000400
>bf810000
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], COLOR, COLOR
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
>  %21 = call float @llvm.SI.fs.constant(i32 1, i32 0, i32 %3)
>  %22 = call float @llvm.SI.fs.constant(i32 2, i32 0, i32 %3)
>  %23 = call float @llvm.SI.fs.constant(i32 3, i32 0, i32 %3)
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %20, float %21, float %22, float %23)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>befe0a7e
>befc0306
>c8020302
>c8060202
>c80a0102
>c80e0002
>f800180f
>00010203
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 3
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 4
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 5
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 6
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 7
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 8
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 9
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 10
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 11
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 12
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 13
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 14
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 15
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %44 = load <16 x i8> addrspace(2)* %43, !tbaa !0
>  %45 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %44, i32 0, i32 %5)
>  %46 = extractelement <4 x float> %45, i32 0
>  %47 = extractelement <4 x float> %45, i32 1
>  %48 = extractelement <4 x float> %45, i32 2
>  %49 = extractelement <4 x float> %45, i32 3
>  %50 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %51 = load <16 x i8> addrspace(2)* %50, !tbaa !0
>  %52 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %51, i32 0, i32 %5)
>  %53 = extractelement <4 x float> %52, i32 0
>  %54 = extractelement <4 x float> %52, i32 1
>  %55 = extractelement <4 x float> %52, i32 2
>  %56 = extractelement <4 x float> %52, i32 3
>  %57 = fmul float %46, %12
>  %58 = fmul float %46, %14
>  %59 = fmul float %46, %16
>  %60 = fmul float %46, %18
>  %61 = fmul float %47, %20
>  %62 = fadd float %61, %57
>  %63 = fmul float %47, %22
>  %64 = fadd float %63, %58
>  %65 = fmul float %47, %24
>  %66 = fadd float %65, %59
>  %67 = fmul float %47, %26
>  %68 = fadd float %67, %60
>  %69 = fmul float %48, %28
>  %70 = fadd float %69, %62
>  %71 = fmul float %48, %30
>  %72 = fadd float %71, %64
>  %73 = fmul float %48, %32
>  %74 = fadd float %73, %66
>  %75 = fmul float %48, %34
>  %76 = fadd float %75, %68
>  %77 = fmul float %49, %36
>  %78 = fadd float %77, %70
>  %79 = fmul float %49, %38
>  %80 = fadd float %79, %72
>  %81 = fmul float %49, %40
>  %82 = fadd float %81, %74
>  %83 = fmul float %49, %42
>  %84 = fadd float %83, %76
>  %85 = call float @llvm.AMDIL.clamp.(float %53, float 0,000000e+00, float 0x3FF0000000000000)
>  %86 = call float @llvm.AMDIL.clamp.(float %54, float 0,000000e+00, float 0x3FF0000000000000)
>  %87 = call float @llvm.AMDIL.clamp.(float %55, float 0,000000e+00, float 0x3FF0000000000000)
>  %88 = call float @llvm.AMDIL.clamp.(float %56, float 0,000000e+00, float 0x3FF0000000000000)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %85, float %86, float %87, float %88)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %78, float %80, float %82, float %84)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840704
>bf8c007f
>e00c2000
>80020100
>bf8c0770
>d2060805
>02010104
>d2060806
>02010103
>d2060807
>02010102
>d2060801
>02010101
>f800020f
>05060701
>c0820700
>bf8c000f
>e00c2000
>80010000
>c0400100
>bf8c0070
>c0010103
>bf8c007f
>10080002
>c0010107
>bf8c007f
>d2820004
>04100501
>c001010b
>bf8c007f
>d2820004
>04100502
>c001010f
>bf8c007f
>d2820004
>04100503
>c0010102
>bf8c007f
>100a0002
>c0010106
>bf8c007f
>d2820005
>04140501
>c001010a
>bf8c007f
>d2820005
>04140502
>c001010e
>bf8c007f
>d2820005
>04140503
>c0010101
>bf8c007f
>100c0002
>c0010105
>bf8c007f
>d2820006
>04180501
>c0010109
>bf8c007f
>d2820006
>04180502
>c001010d
>bf8c007f
>d2820006
>04180503
>c0010100
>bf8c007f
>100e0002
>c0010104
>bf8c007f
>d2820007
>041c0501
>c0010108
>bf8c007f
>d2820007
>041c0502
>c000010c
>bf8c007f
>d2820000
>041c0103
>f80008cf
>04050600
>bf810000
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], GENERIC[0], CONSTANT
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
>  %21 = call float @llvm.SI.fs.constant(i32 1, i32 0, i32 %3)
>  %22 = call float @llvm.SI.fs.constant(i32 2, i32 0, i32 %3)
>  %23 = call float @llvm.SI.fs.constant(i32 3, i32 0, i32 %3)
>  %24 = call i32 @llvm.SI.packf16(float %20, float %21)
>  %25 = bitcast i32 %24 to float
>  %26 = call i32 @llvm.SI.packf16(float %22, float %23)
>  %27 = bitcast i32 %26 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %25, float %27, float %25, float %27)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>befe0a7e
>befc0306
>c8020302
>c8060202
>5e000101
>c8060102
>c80a0002
>5e020302
>f8001c0f
>00010001
>bf810000
>Installing breakpad exception handler for appid(steam)/version(1374261093_client)
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL CONST[1..4]
>DCL TEMP[0], LOCAL
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: MOV TEMP[0].w, IN[0].wwww
>  2: TXP TEMP[0], TEMP[0], SAMP[0], 2D
>  3: MUL TEMP[0], TEMP[0], CONST[4]
>  4: MOV OUT[0], TEMP[0]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 16
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 17
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 18
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 19
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %31 = load <32 x i8> addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %33 = load <16 x i8> addrspace(2)* %32, !tbaa !0
>  %34 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %36 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %3, <2 x i32> %5)
>  %37 = fdiv float %34, %36
>  %38 = fdiv float %35, %36
>  %39 = bitcast float %37 to i32
>  %40 = bitcast float %38 to i32
>  %41 = insertelement <2 x i32> undef, i32 %39, i32 0
>  %42 = insertelement <2 x i32> %41, i32 %40, i32 1
>  %43 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %42, <32 x i8> %31, <16 x i8> %33, i32 2)
>  %44 = extractelement <4 x float> %43, i32 0
>  %45 = extractelement <4 x float> %43, i32 1
>  %46 = extractelement <4 x float> %43, i32 2
>  %47 = extractelement <4 x float> %43, i32 3
>  %48 = fmul float %44, %23
>  %49 = fmul float %45, %25
>  %50 = fmul float %46, %27
>  %51 = fmul float %47, %29
>  %52 = call i32 @llvm.SI.packf16(float %48, float %49)
>  %53 = bitcast i32 %52 to float
>  %54 = call i32 @llvm.SI.packf16(float %50, float %51)
>  %55 = bitcast i32 %54 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %53, float %55, float %53, float %55)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8080100
>c8090101
>c80c0300
>c80d0301
>7e085503
>10060902
>c8140000
>c8150001
>10040905
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430002
>c0400100
>bf8c0070
>c0010113
>bf8c007f
>10080602
>c0010112
>bf8c007f
>100a0402
>5e080905
>c0010111
>bf8c007f
>100a0202
>c0000110
>bf8c007f
>10000000
>5e000b00
>f8001c0f
>04000400
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 3
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 4
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 5
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 6
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 7
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 8
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 9
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 10
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 11
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 12
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 13
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 14
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 15
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %44 = load <16 x i8> addrspace(2)* %43, !tbaa !0
>  %45 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %44, i32 0, i32 %5)
>  %46 = extractelement <4 x float> %45, i32 0
>  %47 = extractelement <4 x float> %45, i32 1
>  %48 = extractelement <4 x float> %45, i32 2
>  %49 = extractelement <4 x float> %45, i32 3
>  %50 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %51 = load <16 x i8> addrspace(2)* %50, !tbaa !0
>  %52 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %51, i32 0, i32 %5)
>  %53 = extractelement <4 x float> %52, i32 0
>  %54 = extractelement <4 x float> %52, i32 1
>  %55 = extractelement <4 x float> %52, i32 2
>  %56 = extractelement <4 x float> %52, i32 3
>  %57 = fmul float %46, %12
>  %58 = fmul float %46, %14
>  %59 = fmul float %46, %16
>  %60 = fmul float %46, %18
>  %61 = fmul float %47, %20
>  %62 = fadd float %61, %57
>  %63 = fmul float %47, %22
>  %64 = fadd float %63, %58
>  %65 = fmul float %47, %24
>  %66 = fadd float %65, %59
>  %67 = fmul float %47, %26
>  %68 = fadd float %67, %60
>  %69 = fmul float %48, %28
>  %70 = fadd float %69, %62
>  %71 = fmul float %48, %30
>  %72 = fadd float %71, %64
>  %73 = fmul float %48, %32
>  %74 = fadd float %73, %66
>  %75 = fmul float %48, %34
>  %76 = fadd float %75, %68
>  %77 = fmul float %49, %36
>  %78 = fadd float %77, %70
>  %79 = fmul float %49, %38
>  %80 = fadd float %79, %72
>  %81 = fmul float %49, %40
>  %82 = fadd float %81, %74
>  %83 = fmul float %49, %42
>  %84 = fadd float %83, %76
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %53, float %54, float %55, float %56)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %78, float %80, float %82, float %84)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840704
>bf8c007f
>e00c2000
>80020100
>bf8c0770
>f800020f
>04030201
>c0820700
>bf8c000f
>e00c2000
>80010000
>c0400100
>bf8c0070
>c0010103
>bf8c007f
>10080002
>c0010107
>bf8c007f
>d2820004
>04100501
>c001010b
>bf8c007f
>d2820004
>04100502
>c001010f
>bf8c007f
>d2820004
>04100503
>c0010102
>bf8c007f
>100a0002
>c0010106
>bf8c007f
>d2820005
>04140501
>c001010a
>bf8c007f
>d2820005
>04140502
>c001010e
>bf8c007f
>d2820005
>04140503
>c0010101
>bf8c007f
>100c0002
>c0010105
>bf8c007f
>d2820006
>04180501
>c0010109
>bf8c007f
>d2820006
>04180502
>c001010d
>bf8c007f
>d2820006
>04180503
>c0010100
>bf8c007f
>100e0002
>c0010104
>bf8c007f
>d2820007
>041c0501
>c0010108
>bf8c007f
>d2820007
>041c0502
>c000010c
>bf8c007f
>d2820000
>041c0103
>f80008cf
>04050600
>bf810000
>Generating new string page texture 6: 48x256, total string texture memory is 49,15 KB
>Generating new string page texture 7: 48x256, total string texture memory is 49,15 KB
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], COLOR, COLOR
>DCL IN[1], GENERIC[0], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL TEMP[0], LOCAL
>  0: MOV TEMP[0].xy, IN[1].xyyy
>  1: MOV TEMP[0].w, IN[1].wwww
>  2: TXP TEMP[0], TEMP[0], SAMP[0], 2D
>  3: MUL TEMP[0], TEMP[0], IN[0]
>  4: MOV OUT[0], TEMP[0]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %21 = load <32 x i8> addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %23 = load <16 x i8> addrspace(2)* %22, !tbaa !0
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %3, <2 x i32> %5)
>  %28 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %29 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %30 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %3, <2 x i32> %5)
>  %31 = fdiv float %28, %30
>  %32 = fdiv float %29, %30
>  %33 = bitcast float %31 to i32
>  %34 = bitcast float %32 to i32
>  %35 = insertelement <2 x i32> undef, i32 %33, i32 0
>  %36 = insertelement <2 x i32> %35, i32 %34, i32 1
>  %37 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %36, <32 x i8> %21, <16 x i8> %23, i32 2)
>  %38 = extractelement <4 x float> %37, i32 0
>  %39 = extractelement <4 x float> %37, i32 1
>  %40 = extractelement <4 x float> %37, i32 2
>  %41 = extractelement <4 x float> %37, i32 3
>  %42 = fmul float %38, %24
>  %43 = fmul float %39, %25
>  %44 = fmul float %40, %26
>  %45 = fmul float %41, %27
>  %46 = call i32 @llvm.SI.packf16(float %42, float %43)
>  %47 = bitcast i32 %46 to float
>  %48 = call i32 @llvm.SI.packf16(float %44, float %45)
>  %49 = bitcast i32 %48 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %47, float %49, float %47, float %49)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8080500
>c8090501
>c80c0700
>c80d0701
>7e085503
>10060902
>c8140400
>c8150401
>10040905
>c0800300
>c0c40500
>bf8c007f
>f0800f00
>00020202
>c8180300
>c8190301
>bf8c0770
>100c0d05
>c81c0200
>c81d0201
>100e0f04
>5e0c0d07
>c81c0100
>c81d0101
>100e0f03
>c8200000
>c8210001
>10001102
>5e000f00
>f8001c0f
>06000600
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], GENERIC[0]
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: MOV OUT[2], IN[2]
>  6: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 3
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 4
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 5
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 6
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 7
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 8
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 9
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 10
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 11
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 12
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 13
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 14
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 15
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %44 = load <16 x i8> addrspace(2)* %43, !tbaa !0
>  %45 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %44, i32 0, i32 %5)
>  %46 = extractelement <4 x float> %45, i32 0
>  %47 = extractelement <4 x float> %45, i32 1
>  %48 = extractelement <4 x float> %45, i32 2
>  %49 = extractelement <4 x float> %45, i32 3
>  %50 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %51 = load <16 x i8> addrspace(2)* %50, !tbaa !0
>  %52 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %51, i32 0, i32 %5)
>  %53 = extractelement <4 x float> %52, i32 0
>  %54 = extractelement <4 x float> %52, i32 1
>  %55 = extractelement <4 x float> %52, i32 2
>  %56 = extractelement <4 x float> %52, i32 3
>  %57 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %58 = load <16 x i8> addrspace(2)* %57, !tbaa !0
>  %59 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %58, i32 0, i32 %5)
>  %60 = extractelement <4 x float> %59, i32 0
>  %61 = extractelement <4 x float> %59, i32 1
>  %62 = extractelement <4 x float> %59, i32 2
>  %63 = extractelement <4 x float> %59, i32 3
>  %64 = fmul float %46, %12
>  %65 = fmul float %46, %14
>  %66 = fmul float %46, %16
>  %67 = fmul float %46, %18
>  %68 = fmul float %47, %20
>  %69 = fadd float %68, %64
>  %70 = fmul float %47, %22
>  %71 = fadd float %70, %65
>  %72 = fmul float %47, %24
>  %73 = fadd float %72, %66
>  %74 = fmul float %47, %26
>  %75 = fadd float %74, %67
>  %76 = fmul float %48, %28
>  %77 = fadd float %76, %69
>  %78 = fmul float %48, %30
>  %79 = fadd float %78, %71
>  %80 = fmul float %48, %32
>  %81 = fadd float %80, %73
>  %82 = fmul float %48, %34
>  %83 = fadd float %82, %75
>  %84 = fmul float %49, %36
>  %85 = fadd float %84, %77
>  %86 = fmul float %49, %38
>  %87 = fadd float %86, %79
>  %88 = fmul float %49, %40
>  %89 = fadd float %88, %81
>  %90 = fmul float %49, %42
>  %91 = fadd float %90, %83
>  %92 = call float @llvm.AMDIL.clamp.(float %53, float 0,000000e+00, float 0x3FF0000000000000)
>  %93 = call float @llvm.AMDIL.clamp.(float %54, float 0,000000e+00, float 0x3FF0000000000000)
>  %94 = call float @llvm.AMDIL.clamp.(float %55, float 0,000000e+00, float 0x3FF0000000000000)
>  %95 = call float @llvm.AMDIL.clamp.(float %56, float 0,000000e+00, float 0x3FF0000000000000)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %92, float %93, float %94, float %95)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %60, float %61, float %62, float %63)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %85, float %87, float %89, float %91)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840704
>bf8c007f
>e00c2000
>80020100
>bf8c0770
>d2060805
>02010104
>d2060806
>02010103
>d2060807
>02010102
>d2060801
>02010101
>f800020f
>05060701
>c0840708
>bf8c000f
>e00c2000
>80020100
>bf8c0770
>f800021f
>04030201
>c0820700
>bf8c000f
>e00c2000
>80010000
>c0400100
>bf8c0070
>c0010103
>bf8c007f
>10080002
>c0010107
>bf8c007f
>d2820004
>04100501
>c001010b
>bf8c007f
>d2820004
>04100502
>c001010f
>bf8c007f
>d2820004
>04100503
>c0010102
>bf8c007f
>100a0002
>c0010106
>bf8c007f
>d2820005
>04140501
>c001010a
>bf8c007f
>d2820005
>04140502
>c001010e
>bf8c007f
>d2820005
>04140503
>c0010101
>bf8c007f
>100c0002
>c0010105
>bf8c007f
>d2820006
>04180501
>c0010109
>bf8c007f
>d2820006
>04180502
>c001010d
>bf8c007f
>d2820006
>04180503
>c0010100
>bf8c007f
>100e0002
>c0010104
>bf8c007f
>d2820007
>041c0501
>c0010108
>bf8c007f
>d2820007
>041c0502
>c000010c
>bf8c007f
>d2820000
>041c0103
>f80008cf
>04050600
>bf810000
>Generating new string page texture 8: 384x256, total string texture memory is 442,37 KB
>Installing breakpad exception handler for appid(steam)/version(1374261093_client)
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>roaming config store loaded successfully - 8533 bytes.
>migrating temporary roaming config store
>Adding license for package 0
>Adding license for package 34
>Adding license for package 783
>Adding license for package 995
>Adding license for package 1259
>Adding license for package 1290
>Adding license for package 1333
>Adding license for package 1507
>Adding license for package 1774
>Adding license for package 2008
>Adding license for package 2075
>Adding license for package 2377
>Adding license for package 2481
>Adding license for package 2832
>Adding license for package 3052
>Adding license for package 4066
>Adding license for package 4097
>Adding license for package 4912
>Adding license for package 6098
>Adding license for package 6146
>Adding license for package 6232
>Adding license for package 6428
>Adding license for package 6443
>Adding license for package 6660
>Adding license for package 6749
>Adding license for package 7150
>Adding license for package 7166
>Adding license for package 7350
>Adding license for package 7431
>Adding license for package 7802
>Adding license for package 7877
>Adding license for package 8009
>Adding license for package 8372
>Adding license for package 8386
>Adding license for package 8535
>Adding license for package 8731
>Adding license for package 11010
>Adding license for package 11072
>Adding license for package 11274
>Adding license for package 11542
>Adding license for package 11591
>Adding license for package 11732
>Adding license for package 11793
>Adding license for package 11850
>Adding license for package 11984
>Adding license for package 12225
>Adding license for package 12288
>Adding license for package 12361
>Adding license for package 12456
>Adding license for package 12544
>Adding license for package 12897
>Adding license for package 12985
>Adding license for package 13054
>Adding license for package 13086
>Adding license for package 13314
>Adding license for package 14188
>Adding license for package 14712
>Adding license for package 15123
>Adding license for package 15349
>Adding license for package 15371
>Adding license for package 15376
>Adding license for package 15479
>Adding license for package 16547
>Adding license for package 16549
>Adding license for package 16699
>Adding license for package 17496
>Adding license for package 17638
>Adding license for package 17919
>Adding license for package 17922
>Adding license for package 17968
>Adding license for package 18207
>Adding license for package 18265
>Adding license for package 18613
>Adding license for package 18777
>Adding license for package 25835
>Adding license for package 26331
>Adding license for package 26375
>Adding license for package 27195
>Adding license for package 27235
>Adding license for package 27531
>Adding license for package 27644
>Adding license for package 28596
>
>** (steam:25780): WARNING **: replace_settings: error updating connection /org/freedesktop/NetworkManager/Settings/0 settings: (1) type
>ExecCommandLine: "/home/behem0th/Steam/ubuntu12_32/steam"
>System startup time: 9,35 seconds
>FRAG
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  call void @llvm.SI.export(i32 0, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  ret void
>}
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, i32, i32, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>SI CODE:
>7e000280
>f8001800
>00000000
>bf810000
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
>  %21 = call float @llvm.SI.fs.constant(i32 1, i32 0, i32 %3)
>  %22 = call float @llvm.SI.fs.constant(i32 2, i32 0, i32 %3)
>  %23 = call float @llvm.SI.fs.constant(i32 3, i32 0, i32 %3)
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %20, float %21, float %22, float %23)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>befe0a7e
>befc0306
>c8020302
>c8060202
>c80a0102
>c80e0002
>f800180f
>00010203
>bf810000
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], GENERIC[0], CONSTANT
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
>  %21 = call float @llvm.SI.fs.constant(i32 1, i32 0, i32 %3)
>  %22 = call float @llvm.SI.fs.constant(i32 2, i32 0, i32 %3)
>  %23 = call float @llvm.SI.fs.constant(i32 3, i32 0, i32 %3)
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %20, float %21, float %22, float %23)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>befe0a7e
>befc0306
>c8020302
>c8060202
>c80a0102
>c80e0002
>f800180f
>00010203
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %10 = load <16 x i8> addrspace(2)* %9, !tbaa !0
>  %11 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %10, i32 0, i32 %5)
>  %12 = extractelement <4 x float> %11, i32 0
>  %13 = extractelement <4 x float> %11, i32 1
>  %14 = extractelement <4 x float> %11, i32 2
>  %15 = extractelement <4 x float> %11, i32 3
>  %16 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %17 = load <16 x i8> addrspace(2)* %16, !tbaa !0
>  %18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %5)
>  %19 = extractelement <4 x float> %18, i32 0
>  %20 = extractelement <4 x float> %18, i32 1
>  %21 = extractelement <4 x float> %18, i32 2
>  %22 = extractelement <4 x float> %18, i32 3
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %19, float %20, float %21, float %22)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %12, float %13, float %14, float %15)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0800704
>bf8c007f
>e00c2000
>80000100
>bf8c0770
>f800020f
>04030201
>c0800700
>bf8c000f
>e00c2000
>80000000
>bf8c0770
>f80008cf
>03020100
>bf810000
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  call void @llvm.SI.export(i32 0, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, i32, i32, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>7e000280
>f8001800
>00000000
>bf810000
>Running Steam on arch rolling 32-bit
>STEAM_RUNTIME has been set by the user to: /home/behem0th/Steam/ubuntu12_32/steam-runtime
>Generating new string page texture 91: 1024x256, total string texture memory is 1,49 MB
>Generating new string page texture 92: 128x256, total string texture memory is 1,62 MB
>Generating new string page texture 93: 256x256, total string texture memory is 311,30 KB
>Generating new string page texture 94: 256x256, total string texture memory is 1,88 MB
>Generating new string page texture 95: 128x256, total string texture memory is 442,37 KB
>Generating new string page texture 96: 24x256, total string texture memory is 1,91 MB
>Generating new string page texture 97: 32x256, total string texture memory is 1,94 MB
>Generating new string page texture 98: 64x256, total string texture memory is 507,90 KB
>Generating new string page texture 99: 64x256, total string texture memory is 2,01 MB
>Generating new string page texture 100: 8x256, total string texture memory is 516,10 KB
>Generating new string page texture 101: 8x256, total string texture memory is 2,02 MB
>ExecCommandLine: "/home/behem0th/.steam/root/ubuntu12_32/steam steam://open/driverhelperready"
>ExecSteamURL: "steam://open/driverhelperready"
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>Generating new string page texture 105: 128x256, total string texture memory is 2,15 MB
>Generating new string page texture 107: 16x256, total string texture memory is 2,16 MB
>Generating new string page texture 108: 128x256, total string texture memory is 2,29 MB
>Installing breakpad exception handler for appid(steam)/version(1374261093_client)
>Game update: AppID 420 "Half-Life 2: Episode Two", ProcID 25906, IP 0.0.0.0:0
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>
>(steam:25780): LIBDBUSMENU-GLIB-WARNING **: Trying to remove a child that doesn't believe we're it's parent.
>FRAG
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  call void @llvm.SI.export(i32 0, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  ret void
>}
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, i32, i32, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>SI CODE:
>7e000280
>f8001800
>00000000
>bf810000
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
>  %21 = call float @llvm.SI.fs.constant(i32 1, i32 0, i32 %3)
>  %22 = call float @llvm.SI.fs.constant(i32 2, i32 0, i32 %3)
>  %23 = call float @llvm.SI.fs.constant(i32 3, i32 0, i32 %3)
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %20, float %21, float %22, float %23)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>befe0a7e
>befc0306
>c8020302
>c8060202
>c80a0102
>c80e0002
>f800180f
>00010203
>bf810000
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], GENERIC[0], CONSTANT
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
>  %21 = call float @llvm.SI.fs.constant(i32 1, i32 0, i32 %3)
>  %22 = call float @llvm.SI.fs.constant(i32 2, i32 0, i32 %3)
>  %23 = call float @llvm.SI.fs.constant(i32 3, i32 0, i32 %3)
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %20, float %21, float %22, float %23)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>befe0a7e
>befc0306
>c8020302
>c8060202
>c80a0102
>c80e0002
>f800180f
>00010203
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %10 = load <16 x i8> addrspace(2)* %9, !tbaa !0
>  %11 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %10, i32 0, i32 %5)
>  %12 = extractelement <4 x float> %11, i32 0
>  %13 = extractelement <4 x float> %11, i32 1
>  %14 = extractelement <4 x float> %11, i32 2
>  %15 = extractelement <4 x float> %11, i32 3
>  %16 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %17 = load <16 x i8> addrspace(2)* %16, !tbaa !0
>  %18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %5)
>  %19 = extractelement <4 x float> %18, i32 0
>  %20 = extractelement <4 x float> %18, i32 1
>  %21 = extractelement <4 x float> %18, i32 2
>  %22 = extractelement <4 x float> %18, i32 3
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %19, float %20, float %21, float %22)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %12, float %13, float %14, float %15)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0800704
>bf8c007f
>e00c2000
>80000100
>bf8c0770
>f800020f
>04030201
>c0800700
>bf8c000f
>e00c2000
>80000000
>bf8c0770
>f80008cf
>03020100
>bf810000
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  call void @llvm.SI.export(i32 0, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, i32, i32, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>7e000280
>f8001800
>00000000
>bf810000
>FRAG
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  call void @llvm.SI.export(i32 0, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  ret void
>}
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, i32, i32, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>SI CODE:
>7e000280
>f8001800
>00000000
>bf810000
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
>  %21 = call float @llvm.SI.fs.constant(i32 1, i32 0, i32 %3)
>  %22 = call float @llvm.SI.fs.constant(i32 2, i32 0, i32 %3)
>  %23 = call float @llvm.SI.fs.constant(i32 3, i32 0, i32 %3)
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %20, float %21, float %22, float %23)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>befe0a7e
>befc0306
>c8020302
>c8060202
>c80a0102
>c80e0002
>f800180f
>00010203
>bf810000
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], GENERIC[0], CONSTANT
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
>  %21 = call float @llvm.SI.fs.constant(i32 1, i32 0, i32 %3)
>  %22 = call float @llvm.SI.fs.constant(i32 2, i32 0, i32 %3)
>  %23 = call float @llvm.SI.fs.constant(i32 3, i32 0, i32 %3)
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %20, float %21, float %22, float %23)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>befe0a7e
>befc0306
>c8020302
>c8060202
>c80a0102
>c80e0002
>f800180f
>00010203
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %10 = load <16 x i8> addrspace(2)* %9, !tbaa !0
>  %11 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %10, i32 0, i32 %5)
>  %12 = extractelement <4 x float> %11, i32 0
>  %13 = extractelement <4 x float> %11, i32 1
>  %14 = extractelement <4 x float> %11, i32 2
>  %15 = extractelement <4 x float> %11, i32 3
>  %16 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %17 = load <16 x i8> addrspace(2)* %16, !tbaa !0
>  %18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %5)
>  %19 = extractelement <4 x float> %18, i32 0
>  %20 = extractelement <4 x float> %18, i32 1
>  %21 = extractelement <4 x float> %18, i32 2
>  %22 = extractelement <4 x float> %18, i32 3
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %19, float %20, float %21, float %22)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %12, float %13, float %14, float %15)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0800704
>bf8c007f
>e00c2000
>80000100
>bf8c0770
>f800020f
>04030201
>c0800700
>bf8c000f
>e00c2000
>80000000
>bf8c0770
>f80008cf
>03020100
>bf810000
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  call void @llvm.SI.export(i32 0, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, i32, i32, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>7e000280
>f8001800
>00000000
>bf810000
>FRAG
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  call void @llvm.SI.export(i32 0, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  ret void
>}
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, i32, i32, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>SI CODE:
>7e000280
>f8001800
>00000000
>bf810000
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
>  %21 = call float @llvm.SI.fs.constant(i32 1, i32 0, i32 %3)
>  %22 = call float @llvm.SI.fs.constant(i32 2, i32 0, i32 %3)
>  %23 = call float @llvm.SI.fs.constant(i32 3, i32 0, i32 %3)
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %20, float %21, float %22, float %23)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>befe0a7e
>befc0306
>c8020302
>c8060202
>c80a0102
>c80e0002
>f800180f
>00010203
>bf810000
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], GENERIC[0], CONSTANT
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
>  %21 = call float @llvm.SI.fs.constant(i32 1, i32 0, i32 %3)
>  %22 = call float @llvm.SI.fs.constant(i32 2, i32 0, i32 %3)
>  %23 = call float @llvm.SI.fs.constant(i32 3, i32 0, i32 %3)
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %20, float %21, float %22, float %23)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>befe0a7e
>befc0306
>c8020302
>c8060202
>c80a0102
>c80e0002
>f800180f
>00010203
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %10 = load <16 x i8> addrspace(2)* %9, !tbaa !0
>  %11 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %10, i32 0, i32 %5)
>  %12 = extractelement <4 x float> %11, i32 0
>  %13 = extractelement <4 x float> %11, i32 1
>  %14 = extractelement <4 x float> %11, i32 2
>  %15 = extractelement <4 x float> %11, i32 3
>  %16 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %17 = load <16 x i8> addrspace(2)* %16, !tbaa !0
>  %18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %5)
>  %19 = extractelement <4 x float> %18, i32 0
>  %20 = extractelement <4 x float> %18, i32 1
>  %21 = extractelement <4 x float> %18, i32 2
>  %22 = extractelement <4 x float> %18, i32 3
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %19, float %20, float %21, float %22)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %12, float %13, float %14, float %15)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0800704
>bf8c007f
>e00c2000
>80000100
>bf8c0770
>f800020f
>04030201
>c0800700
>bf8c000f
>e00c2000
>80000000
>bf8c0770
>f80008cf
>03020100
>bf810000
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  call void @llvm.SI.export(i32 0, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, i32, i32, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>7e000280
>f8001800
>00000000
>bf810000
>SDL video target is 'x11'
>SDL video target is 'x11'
>FRAG
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  call void @llvm.SI.export(i32 0, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  ret void
>}
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, i32, i32, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>SI CODE:
>7e000280
>f8001800
>00000000
>bf810000
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
>  %21 = call float @llvm.SI.fs.constant(i32 1, i32 0, i32 %3)
>  %22 = call float @llvm.SI.fs.constant(i32 2, i32 0, i32 %3)
>  %23 = call float @llvm.SI.fs.constant(i32 3, i32 0, i32 %3)
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %20, float %21, float %22, float %23)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>befe0a7e
>befc0306
>c8020302
>c8060202
>c80a0102
>c80e0002
>f800180f
>00010203
>bf810000
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], GENERIC[0], CONSTANT
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
>  %21 = call float @llvm.SI.fs.constant(i32 1, i32 0, i32 %3)
>  %22 = call float @llvm.SI.fs.constant(i32 2, i32 0, i32 %3)
>  %23 = call float @llvm.SI.fs.constant(i32 3, i32 0, i32 %3)
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %20, float %21, float %22, float %23)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>befe0a7e
>befc0306
>c8020302
>c8060202
>c80a0102
>c80e0002
>f800180f
>00010203
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %10 = load <16 x i8> addrspace(2)* %9, !tbaa !0
>  %11 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %10, i32 0, i32 %5)
>  %12 = extractelement <4 x float> %11, i32 0
>  %13 = extractelement <4 x float> %11, i32 1
>  %14 = extractelement <4 x float> %11, i32 2
>  %15 = extractelement <4 x float> %11, i32 3
>  %16 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %17 = load <16 x i8> addrspace(2)* %16, !tbaa !0
>  %18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %5)
>  %19 = extractelement <4 x float> %18, i32 0
>  %20 = extractelement <4 x float> %18, i32 1
>  %21 = extractelement <4 x float> %18, i32 2
>  %22 = extractelement <4 x float> %18, i32 3
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %19, float %20, float %21, float %22)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %12, float %13, float %14, float %15)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0800704
>bf8c007f
>e00c2000
>80000100
>bf8c0770
>f800020f
>04030201
>c0800700
>bf8c000f
>e00c2000
>80000000
>bf8c0770
>f80008cf
>03020100
>bf810000
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  call void @llvm.SI.export(i32 0, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, i32, i32, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>7e000280
>f8001800
>00000000
>bf810000
>SDL failed to create GL compatibility profile (whichProfile=0)!
>This system supports the OpenGL extension GL_EXT_framebuffer_object.
>This system supports the OpenGL extension GL_EXT_framebuffer_blit.
>This system DOES NOT support the OpenGL extension GL_EXT_framebuffer_multisample.
>This system DOES NOT support the OpenGL extension GL_APPLE_fence.
>This system DOES NOT support the OpenGL extension GL_NV_fence.
>This system supports the OpenGL extension GL_ARB_sync.
>This system supports the OpenGL extension GL_EXT_draw_buffers2.
>This system DOES NOT support the OpenGL extension GL_EXT_bindable_uniform.
>This system DOES NOT support the OpenGL extension GL_APPLE_flush_buffer_range.
>This system supports the OpenGL extension GL_ARB_map_buffer_range.
>This system supports the OpenGL extension GL_ARB_vertex_buffer_object.
>This system supports the OpenGL extension GL_ARB_occlusion_query.
>This system DOES NOT support the OpenGL extension GL_APPLE_texture_range.
>This system DOES NOT support the OpenGL extension GL_APPLE_client_storage.
>This system DOES NOT support the OpenGL extension GL_ARB_uniform_buffer.
>This system supports the OpenGL extension GL_ARB_vertex_array_bgra.
>This system supports the OpenGL extension GL_EXT_vertex_array_bgra.
>This system supports the OpenGL extension GL_ARB_framebuffer_object.
>This system DOES NOT support the OpenGL extension GL_GREMEDY_string_marker.
>This system supports the OpenGL extension GL_ARB_debug_output.
>This system DOES NOT support the OpenGL extension GL_EXT_direct_state_access.
>This system DOES NOT support the OpenGL extension GL_NV_bindless_texture.
>This system DOES NOT support the OpenGL extension GL_AMD_pinned_memory.
>This system DOES NOT support the OpenGL extension GL_EXT_framebuffer_multisample_blit_scaled.
>This system supports the OpenGL extension GL_EXT_texture_sRGB_decode.
>This system DOES NOT support the OpenGL extension GL_NVX_gpu_memory_info.
>This system DOES NOT support the OpenGL extension GL_ATI_meminfo.
>This system supports the OpenGL extension GL_EXT_texture_compression_s3tc.
>This system supports the OpenGL extension GL_EXT_texture_compression_dxt1.
>This system supports the OpenGL extension GL_ANGLE_texture_compression_dxt3.
>This system supports the OpenGL extension GL_ANGLE_texture_compression_dxt5.
>This system DOES NOT support the OpenGL extension GLX_EXT_swap_control_tear.
>GL_NV_bindless_texture: DISABLED
>GL_AMD_pinned_memory: DISABLED
>GL_EXT_texture_sRGB_decode: AVAILABLE
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], COLOR, COLOR
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %21 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %22 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %3, <2 x i32> %5)
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %20, float %21, float %22, float %23)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>befe0a7e
>befc0306
>c8080300
>c8090301
>c80c0200
>c80d0201
>c8100100
>c8110101
>c8140000
>c8150001
>f800180f
>02030405
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 3
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 4
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 5
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 6
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 7
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 8
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 9
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 10
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 11
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 12
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 13
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 14
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 15
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %44 = load <16 x i8> addrspace(2)* %43, !tbaa !0
>  %45 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %44, i32 0, i32 %5)
>  %46 = extractelement <4 x float> %45, i32 0
>  %47 = extractelement <4 x float> %45, i32 1
>  %48 = extractelement <4 x float> %45, i32 2
>  %49 = extractelement <4 x float> %45, i32 3
>  %50 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %51 = load <16 x i8> addrspace(2)* %50, !tbaa !0
>  %52 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %51, i32 0, i32 %5)
>  %53 = extractelement <4 x float> %52, i32 0
>  %54 = extractelement <4 x float> %52, i32 1
>  %55 = extractelement <4 x float> %52, i32 2
>  %56 = extractelement <4 x float> %52, i32 3
>  %57 = fmul float %46, %12
>  %58 = fmul float %46, %14
>  %59 = fmul float %46, %16
>  %60 = fmul float %46, %18
>  %61 = fmul float %47, %20
>  %62 = fadd float %61, %57
>  %63 = fmul float %47, %22
>  %64 = fadd float %63, %58
>  %65 = fmul float %47, %24
>  %66 = fadd float %65, %59
>  %67 = fmul float %47, %26
>  %68 = fadd float %67, %60
>  %69 = fmul float %48, %28
>  %70 = fadd float %69, %62
>  %71 = fmul float %48, %30
>  %72 = fadd float %71, %64
>  %73 = fmul float %48, %32
>  %74 = fadd float %73, %66
>  %75 = fmul float %48, %34
>  %76 = fadd float %75, %68
>  %77 = fmul float %49, %36
>  %78 = fadd float %77, %70
>  %79 = fmul float %49, %38
>  %80 = fadd float %79, %72
>  %81 = fmul float %49, %40
>  %82 = fadd float %81, %74
>  %83 = fmul float %49, %42
>  %84 = fadd float %83, %76
>  %85 = call float @llvm.AMDIL.clamp.(float %53, float 0.000000e+00, float 1.000000e+00)
>  %86 = call float @llvm.AMDIL.clamp.(float %54, float 0.000000e+00, float 1.000000e+00)
>  %87 = call float @llvm.AMDIL.clamp.(float %55, float 0.000000e+00, float 1.000000e+00)
>  %88 = call float @llvm.AMDIL.clamp.(float %56, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %85, float %86, float %87, float %88)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %78, float %80, float %82, float %84)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840704
>bf8c007f
>e00c2000
>80020100
>bf8c0770
>d2060805
>02010104
>d2060806
>02010103
>d2060807
>02010102
>d2060801
>02010101
>f800020f
>05060701
>c0820700
>bf8c000f
>e00c2000
>80010000
>c0400100
>bf8c0070
>c0010103
>bf8c007f
>10080002
>c0010107
>bf8c007f
>d2820004
>04100501
>c001010b
>bf8c007f
>d2820004
>04100502
>c001010f
>bf8c007f
>d2820004
>04100503
>c0010102
>bf8c007f
>100a0002
>c0010106
>bf8c007f
>d2820005
>04140501
>c001010a
>bf8c007f
>d2820005
>04140502
>c001010e
>bf8c007f
>d2820005
>04140503
>c0010101
>bf8c007f
>100c0002
>c0010105
>bf8c007f
>d2820006
>04180501
>c0010109
>bf8c007f
>d2820006
>04180502
>c001010d
>bf8c007f
>d2820006
>04180503
>c0010100
>bf8c007f
>100e0002
>c0010104
>bf8c007f
>d2820007
>041c0501
>c0010108
>bf8c007f
>d2820007
>041c0502
>c000010c
>bf8c007f
>d2820000
>041c0103
>f80008cf
>04050600
>bf810000
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], GENERIC[0], CONSTANT
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
>  %21 = call float @llvm.SI.fs.constant(i32 1, i32 0, i32 %3)
>  %22 = call float @llvm.SI.fs.constant(i32 2, i32 0, i32 %3)
>  %23 = call float @llvm.SI.fs.constant(i32 3, i32 0, i32 %3)
>  %24 = call i32 @llvm.SI.packf16(float %20, float %21)
>  %25 = bitcast i32 %24 to float
>  %26 = call i32 @llvm.SI.packf16(float %22, float %23)
>  %27 = bitcast i32 %26 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %25, float %27, float %25, float %27)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>befe0a7e
>befc0306
>c8020302
>c8060202
>5e000101
>c8060102
>c80a0002
>5e020302
>f8001c0f
>00010001
>bf810000
>Installing breakpad exception handler for appid(gameoverlayui)/version(20130719102159_client)
>Installing breakpad exception handler for appid(gameoverlayui)/version(1.0_client)
>Installing breakpad exception handler for appid(gameoverlayui)/version(1.0_client)
>Installing breakpad exception handler for appid(gameoverlayui)/version(1.0_client)
>Fontconfig error: "/etc/fonts/conf.d/10-scale-bitmap-fonts.conf", line 70: non-double matrix element
>Fontconfig error: "/etc/fonts/conf.d/10-scale-bitmap-fonts.conf", line 70: non-double matrix element
>Fontconfig warning: "/etc/fonts/conf.d/10-scale-bitmap-fonts.conf", line 78: saw unknown, expected number
>
>(gameoverlayui:25940): Gtk-WARNING **: ÐÐ°Ð³ÑÑÐ¶Ð°ÐµÐ¼ÑÐ¹ Ð¼Ð¾Ð´ÑÐ»Ñ ÑÐµÐ¼ Ð½Ðµ Ð½Ð°Ð¹Ð´ÐµÐ½ Ð² module_path: Â«qtcurveÂ»,
>/home/behem0th/.gtkrc-2.0:12: error: scanner: unterminated string constant
>[0720/113131:WARNING:proxy_service.cc(958)] PAC support disabled because there is no system implementation
>Using breakpad crash handler
>Setting breakpad minidump AppID = 420
>Forcing breakpad minidump interfaces to load
>Looking up breakpad interfaces from steamclient
>Calling BreakpadMiniDumpSystemInit
>Looking up breakpad interfaces from steamclient
>Calling BreakpadMiniDumpSystemInit
>Steam_SetMinidumpSteamID:  Caching Steam ID:  76561198026030947 [API loaded yes]
>Steam_SetMinidumpSteamID:  Setting Steam ID:  76561198026030947
>Did not detect any valid joysticks.
>
>(hl2_linux:25915): Gtk-WARNING **: Unable to locate theme engine in module_path: "qtcurve",
>/home/behem0th/.gtkrc-2.0:12: error: scanner: unterminated string constant
>[0720/113134:ERROR:resource_bundle.cc(411)] Failed to load /home/behem0th/Steam/SteamApps/common/Half-Life 2/cef_gtk.pak
>Some features may not be available.
>[0720/113134:WARNING:proxy_service.cc(646)] PAC support disabled because there is no system implementation
>GL_NVX_gpu_memory_info: UNAVAILABLE
>GL_ATI_meminfo: UNAVAILABLE
>GL_MAX_SAMPLES_EXT: 0
>CShaderDeviceMgrBase::GetRecommendedConfigurationInfo: CPU speed: 2200 MHz, Processor: AuthenticAMD
>GlobalMemoryStatus: 4294967295
>CShaderDeviceMgrBase::GetRecommendedConfigurationInfo: CPU speed: 2200 MHz, Processor: AuthenticAMD
>GlobalMemoryStatus: 4294967295
>IDirect3DDevice9::Create: BackBufWidth: 1280, BackBufHeight: 1024, D3DFMT: 3, BackBufCount: 1, MultisampleType: 0, MultisampleQuality: 0
>GL sampler object usage: ENABLED
>GL prefer MapBufferRange: NO
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>DCL SAMP[0]
>  0: TEX OUT[0], IN[0], SAMP[0], 2D
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %21 = load <32 x i8> addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %23 = load <16 x i8> addrspace(2)* %22, !tbaa !0
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %9)
>  %26 = bitcast float %24 to i32
>  %27 = bitcast float %25 to i32
>  %28 = insertelement <2 x i32> undef, i32 %26, i32 0
>  %29 = insertelement <2 x i32> %28, i32 %27, i32 1
>  %30 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %29, <32 x i8> %21, <16 x i8> %23, i32 2)
>  %31 = extractelement <4 x float> %30, i32 0
>  %32 = extractelement <4 x float> %30, i32 1
>  %33 = extractelement <4 x float> %30, i32 2
>  %34 = extractelement <4 x float> %30, i32 3
>  %35 = call i32 @llvm.SI.packf16(float %31, float %32)
>  %36 = bitcast i32 %35 to float
>  %37 = call i32 @llvm.SI.packf16(float %33, float %34)
>  %38 = bitcast i32 %37 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %36, float %38, float %36, float %38)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0800300
>c0c20500
>bf8c007f
>f0800f00
>00010002
>bf8c0770
>5e080702
>5e000300
>f8001c0f
>04000400
>bf810000
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>DCL SAMP[0]
>  0: TEX OUT[0], IN[0], SAMP[0], 2D
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %21 = load <32 x i8> addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %23 = load <16 x i8> addrspace(2)* %22, !tbaa !0
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %9)
>  %26 = bitcast float %24 to i32
>  %27 = bitcast float %25 to i32
>  %28 = insertelement <2 x i32> undef, i32 %26, i32 0
>  %29 = insertelement <2 x i32> %28, i32 %27, i32 1
>  %30 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %29, <32 x i8> %21, <16 x i8> %23, i32 2)
>  %31 = extractelement <4 x float> %30, i32 0
>  %32 = extractelement <4 x float> %30, i32 1
>  %33 = extractelement <4 x float> %30, i32 2
>  %34 = extractelement <4 x float> %30, i32 3
>  %35 = call i32 @llvm.SI.packf16(float %31, float %32)
>  %36 = bitcast i32 %35 to float
>  %37 = call i32 @llvm.SI.packf16(float %33, float %34)
>  %38 = bitcast i32 %37 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %36, float %38, float %36, float %38)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0800300
>c0c20500
>bf8c007f
>f0800f00
>00010002
>bf8c0770
>5e080702
>5e000300
>f8001c0f
>04000400
>bf810000
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL TEMP[0], LOCAL
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MOV OUT[0], TEMP[0]
>  3: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %21 = load <32 x i8> addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %23 = load <16 x i8> addrspace(2)* %22, !tbaa !0
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %26 = bitcast float %24 to i32
>  %27 = bitcast float %25 to i32
>  %28 = insertelement <2 x i32> undef, i32 %26, i32 0
>  %29 = insertelement <2 x i32> %28, i32 %27, i32 1
>  %30 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %29, <32 x i8> %21, <16 x i8> %23, i32 2)
>  %31 = extractelement <4 x float> %30, i32 0
>  %32 = extractelement <4 x float> %30, i32 1
>  %33 = extractelement <4 x float> %30, i32 2
>  %34 = extractelement <4 x float> %30, i32 3
>  %35 = call i32 @llvm.SI.packf16(float %31, float %32)
>  %36 = bitcast i32 %35 to float
>  %37 = call i32 @llvm.SI.packf16(float %33, float %34)
>  %38 = bitcast i32 %37 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %36, float %38, float %36, float %38)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0800300
>c0c20500
>bf8c007f
>f0800f00
>00010002
>bf8c0770
>5e080702
>5e000300
>f8001c0f
>04000400
>bf810000
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[19]
>DCL CONST[0..3]
>DCL TEMP[0], LOCAL
>IMM[0] FLT32 {    0.0000,     0.0000,     0.0000,     0.0000}
>  0: MUL TEMP[0], CONST[0], IN[0].xxxx
>  1: MAD TEMP[0], CONST[1], IN[0].yyyy, TEMP[0]
>  2: MAD TEMP[0], CONST[2], IN[0].zzzz, TEMP[0]
>  3: MAD TEMP[0], CONST[3], IN[0].wwww, TEMP[0]
>  4: MOV OUT[1], IMM[0].xxxx
>  5: MOV OUT[0], TEMP[0]
>  6: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 3
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 4
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 5
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 6
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 7
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 8
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 9
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 10
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 11
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 12
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 13
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 14
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 15
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %44 = load <16 x i8> addrspace(2)* %43, !tbaa !0
>  %45 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %44, i32 0, i32 %5)
>  %46 = extractelement <4 x float> %45, i32 0
>  %47 = extractelement <4 x float> %45, i32 1
>  %48 = extractelement <4 x float> %45, i32 2
>  %49 = extractelement <4 x float> %45, i32 3
>  %50 = fmul float %12, %46
>  %51 = fmul float %14, %46
>  %52 = fmul float %16, %46
>  %53 = fmul float %18, %46
>  %54 = fmul float %20, %47
>  %55 = fadd float %54, %50
>  %56 = fmul float %22, %47
>  %57 = fadd float %56, %51
>  %58 = fmul float %24, %47
>  %59 = fadd float %58, %52
>  %60 = fmul float %26, %47
>  %61 = fadd float %60, %53
>  %62 = fmul float %28, %48
>  %63 = fadd float %62, %55
>  %64 = fmul float %30, %48
>  %65 = fadd float %64, %57
>  %66 = fmul float %32, %48
>  %67 = fadd float %66, %59
>  %68 = fmul float %34, %48
>  %69 = fadd float %68, %61
>  %70 = fmul float %36, %49
>  %71 = fadd float %70, %63
>  %72 = fmul float %38, %49
>  %73 = fadd float %72, %65
>  %74 = fmul float %40, %49
>  %75 = fadd float %74, %67
>  %76 = fmul float %42, %49
>  %77 = fadd float %76, %69
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %71, float %73, float %75, float %77)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>7e020280
>f800020f
>01010101
>c0820700
>bf8c000f
>e00c2000
>80010000
>c0400100
>bf8c0070
>c0010103
>bf8c007f
>10080002
>c0010107
>bf8c007f
>d2820004
>04120202
>c001010b
>bf8c007f
>d2820004
>04120402
>c001010f
>bf8c007f
>d2820004
>04120602
>c0010102
>bf8c007f
>100a0002
>c0010106
>bf8c007f
>d2820005
>04160202
>c001010a
>bf8c007f
>d2820005
>04160402
>c001010e
>bf8c007f
>d2820005
>04160602
>c0010101
>bf8c007f
>100c0002
>c0010105
>bf8c007f
>d2820006
>041a0202
>c0010109
>bf8c007f
>d2820006
>041a0402
>c001010d
>bf8c007f
>d2820006
>041a0602
>c0010100
>bf8c007f
>100e0002
>c0010104
>bf8c007f
>d2820007
>041e0202
>c0010108
>bf8c007f
>d2820007
>041e0402
>c000010c
>bf8c007f
>d2820000
>041e0600
>f80008cf
>04050600
>bf810000
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>DCL SAMP[0]
>  0: TEX OUT[0], IN[0], SAMP[0], CUBE
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %21 = load <32 x i8> addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %23 = load <16 x i8> addrspace(2)* %22, !tbaa !0
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %9)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %3, <2 x i32> %9)
>  %28 = insertelement <4 x float> undef, float %24, i32 0
>  %29 = insertelement <4 x float> %28, float %25, i32 1
>  %30 = insertelement <4 x float> %29, float %26, i32 2
>  %31 = insertelement <4 x float> %30, float %27, i32 3
>  %32 = call <4 x float> @llvm.AMDGPU.cube(<4 x float> %31)
>  %33 = extractelement <4 x float> %32, i32 0
>  %34 = extractelement <4 x float> %32, i32 1
>  %35 = extractelement <4 x float> %32, i32 2
>  %36 = extractelement <4 x float> %32, i32 3
>  %37 = call float @fabs(float %35)
>  %38 = fdiv float 1.000000e+00, %37
>  %39 = fmul float %33, %38
>  %40 = fadd float %39, 1.500000e+00
>  %41 = fmul float %34, %38
>  %42 = fadd float %41, 1.500000e+00
>  %43 = bitcast float %42 to i32
>  %44 = bitcast float %40 to i32
>  %45 = bitcast float %36 to i32
>  %46 = insertelement <4 x i32> undef, i32 %43, i32 0
>  %47 = insertelement <4 x i32> %46, i32 %44, i32 1
>  %48 = insertelement <4 x i32> %47, i32 %45, i32 2
>  %49 = insertelement <4 x i32> %48, i32 undef, i32 3
>  %50 = call <4 x float> @llvm.SI.sample.v4i32(<4 x i32> %49, <32 x i8> %21, <16 x i8> %23, i32 4)
>  %51 = extractelement <4 x float> %50, i32 0
>  %52 = extractelement <4 x float> %50, i32 1
>  %53 = extractelement <4 x float> %50, i32 2
>  %54 = extractelement <4 x float> %50, i32 3
>  %55 = call i32 @llvm.SI.packf16(float %51, float %52)
>  %56 = bitcast i32 %55 to float
>  %57 = call i32 @llvm.SI.packf16(float %53, float %54)
>  %58 = bitcast i32 %57 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %56, float %58, float %56, float %58)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: readnone
>declare <4 x float> @llvm.AMDGPU.cube(<4 x float>) #2
>
>; Function Attrs: readnone
>declare float @fabs(float) #2
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c8100200
>c8110201
>c8140300
>c8150301
>d28a0007
>04120702
>d28c0006
>04120702
>d28e0008
>04120702
>d2880009
>04120702
>d2060100
>02010108
>7e005500
>7e0202ff
>3fc00000
>d2820008
>04060106
>d2820007
>04060107
>c0800300
>c0c20500
>bf8c007f
>f0800f00
>00010007
>bf8c0770
>5e080702
>5e000300
>f8001c0f
>04000400
>bf810000
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>DCL SAMP[0]
>  0: TEX OUT[0], IN[0], SAMP[0], CUBE
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %21 = load <32 x i8> addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %23 = load <16 x i8> addrspace(2)* %22, !tbaa !0
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %9)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %3, <2 x i32> %9)
>  %28 = insertelement <4 x float> undef, float %24, i32 0
>  %29 = insertelement <4 x float> %28, float %25, i32 1
>  %30 = insertelement <4 x float> %29, float %26, i32 2
>  %31 = insertelement <4 x float> %30, float %27, i32 3
>  %32 = call <4 x float> @llvm.AMDGPU.cube(<4 x float> %31)
>  %33 = extractelement <4 x float> %32, i32 0
>  %34 = extractelement <4 x float> %32, i32 1
>  %35 = extractelement <4 x float> %32, i32 2
>  %36 = extractelement <4 x float> %32, i32 3
>  %37 = call float @fabs(float %35)
>  %38 = fdiv float 1.000000e+00, %37
>  %39 = fmul float %33, %38
>  %40 = fadd float %39, 1.500000e+00
>  %41 = fmul float %34, %38
>  %42 = fadd float %41, 1.500000e+00
>  %43 = bitcast float %42 to i32
>  %44 = bitcast float %40 to i32
>  %45 = bitcast float %36 to i32
>  %46 = insertelement <4 x i32> undef, i32 %43, i32 0
>  %47 = insertelement <4 x i32> %46, i32 %44, i32 1
>  %48 = insertelement <4 x i32> %47, i32 %45, i32 2
>  %49 = insertelement <4 x i32> %48, i32 undef, i32 3
>  %50 = call <4 x float> @llvm.SI.sample.v4i32(<4 x i32> %49, <32 x i8> %21, <16 x i8> %23, i32 4)
>  %51 = extractelement <4 x float> %50, i32 0
>  %52 = extractelement <4 x float> %50, i32 1
>  %53 = extractelement <4 x float> %50, i32 2
>  %54 = extractelement <4 x float> %50, i32 3
>  %55 = call i32 @llvm.SI.packf16(float %51, float %52)
>  %56 = bitcast i32 %55 to float
>  %57 = call i32 @llvm.SI.packf16(float %53, float %54)
>  %58 = bitcast i32 %57 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %56, float %58, float %56, float %58)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: readnone
>declare <4 x float> @llvm.AMDGPU.cube(<4 x float>) #2
>
>; Function Attrs: readnone
>declare float @fabs(float) #2
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c8100200
>c8110201
>c8140300
>c8150301
>d28a0007
>04120702
>d28c0006
>04120702
>d28e0008
>04120702
>d2880009
>04120702
>d2060100
>02010108
>7e005500
>7e0202ff
>3fc00000
>d2820008
>04060106
>d2820007
>04060107
>c0800300
>c0c20500
>bf8c007f
>f0800f00
>00010007
>bf8c0770
>5e080702
>5e000300
>f8001c0f
>04000400
>bf810000
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL TEMP[0], LOCAL
>  0: MOV TEMP[0].xyz, IN[0].xyzz
>  1: TEX TEMP[0], TEMP[0], SAMP[0], CUBE
>  2: MOV OUT[0], TEMP[0]
>  3: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %21 = load <32 x i8> addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %23 = load <16 x i8> addrspace(2)* %22, !tbaa !0
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %27 = insertelement <4 x float> undef, float %24, i32 0
>  %28 = insertelement <4 x float> %27, float %25, i32 1
>  %29 = insertelement <4 x float> %28, float %26, i32 2
>  %30 = insertelement <4 x float> %29, float 0.000000e+00, i32 3
>  %31 = call <4 x float> @llvm.AMDGPU.cube(<4 x float> %30)
>  %32 = extractelement <4 x float> %31, i32 0
>  %33 = extractelement <4 x float> %31, i32 1
>  %34 = extractelement <4 x float> %31, i32 2
>  %35 = extractelement <4 x float> %31, i32 3
>  %36 = call float @fabs(float %34)
>  %37 = fdiv float 1.000000e+00, %36
>  %38 = fmul float %32, %37
>  %39 = fadd float %38, 1.500000e+00
>  %40 = fmul float %33, %37
>  %41 = fadd float %40, 1.500000e+00
>  %42 = bitcast float %41 to i32
>  %43 = bitcast float %39 to i32
>  %44 = bitcast float %35 to i32
>  %45 = insertelement <4 x i32> undef, i32 %42, i32 0
>  %46 = insertelement <4 x i32> %45, i32 %43, i32 1
>  %47 = insertelement <4 x i32> %46, i32 %44, i32 2
>  %48 = insertelement <4 x i32> %47, i32 undef, i32 3
>  %49 = call <4 x float> @llvm.SI.sample.v4i32(<4 x i32> %48, <32 x i8> %21, <16 x i8> %23, i32 4)
>  %50 = extractelement <4 x float> %49, i32 0
>  %51 = extractelement <4 x float> %49, i32 1
>  %52 = extractelement <4 x float> %49, i32 2
>  %53 = extractelement <4 x float> %49, i32 3
>  %54 = call i32 @llvm.SI.packf16(float %50, float %51)
>  %55 = bitcast i32 %54 to float
>  %56 = call i32 @llvm.SI.packf16(float %52, float %53)
>  %57 = bitcast i32 %56 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %55, float %57, float %55, float %57)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: readnone
>declare <4 x float> @llvm.AMDGPU.cube(<4 x float>) #2
>
>; Function Attrs: readnone
>declare float @fabs(float) #2
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c8100200
>c8110201
>7e0a0280
>d28a0007
>04120702
>d28c0006
>04120702
>d28e0008
>04120702
>d2880009
>04120702
>d2060100
>02010108
>7e005500
>7e0202ff
>3fc00000
>d2820008
>04060106
>d2820007
>04060107
>c0800300
>c0c20500
>bf8c007f
>f0800f00
>00010007
>bf8c0770
>5e080702
>5e000300
>f8001c0f
>04000400
>bf810000
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[19]
>DCL CONST[0..3]
>DCL TEMP[0], LOCAL
>IMM[0] FLT32 {    0.0000,     0.0000,     0.0000,     0.0000}
>  0: MUL TEMP[0], CONST[0], IN[0].xxxx
>  1: MAD TEMP[0], CONST[1], IN[0].yyyy, TEMP[0]
>  2: MAD TEMP[0], CONST[2], IN[0].zzzz, TEMP[0]
>  3: MAD TEMP[0], CONST[3], IN[0].wwww, TEMP[0]
>  4: MOV OUT[1], IMM[0].xxxx
>  5: MOV OUT[0], TEMP[0]
>  6: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 3
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 4
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 5
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 6
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 7
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 8
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 9
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 10
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 11
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 12
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 13
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 14
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 15
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %44 = load <16 x i8> addrspace(2)* %43, !tbaa !0
>  %45 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %44, i32 0, i32 %5)
>  %46 = extractelement <4 x float> %45, i32 0
>  %47 = extractelement <4 x float> %45, i32 1
>  %48 = extractelement <4 x float> %45, i32 2
>  %49 = extractelement <4 x float> %45, i32 3
>  %50 = fmul float %12, %46
>  %51 = fmul float %14, %46
>  %52 = fmul float %16, %46
>  %53 = fmul float %18, %46
>  %54 = fmul float %20, %47
>  %55 = fadd float %54, %50
>  %56 = fmul float %22, %47
>  %57 = fadd float %56, %51
>  %58 = fmul float %24, %47
>  %59 = fadd float %58, %52
>  %60 = fmul float %26, %47
>  %61 = fadd float %60, %53
>  %62 = fmul float %28, %48
>  %63 = fadd float %62, %55
>  %64 = fmul float %30, %48
>  %65 = fadd float %64, %57
>  %66 = fmul float %32, %48
>  %67 = fadd float %66, %59
>  %68 = fmul float %34, %48
>  %69 = fadd float %68, %61
>  %70 = fmul float %36, %49
>  %71 = fadd float %70, %63
>  %72 = fmul float %38, %49
>  %73 = fadd float %72, %65
>  %74 = fmul float %40, %49
>  %75 = fadd float %74, %67
>  %76 = fmul float %42, %49
>  %77 = fadd float %76, %69
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %71, float %73, float %75, float %77)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>7e020280
>f800020f
>01010101
>c0820700
>bf8c000f
>e00c2000
>80010000
>c0400100
>bf8c0070
>c0010103
>bf8c007f
>10080002
>c0010107
>bf8c007f
>d2820004
>04120202
>c001010b
>bf8c007f
>d2820004
>04120402
>c001010f
>bf8c007f
>d2820004
>04120602
>c0010102
>bf8c007f
>100a0002
>c0010106
>bf8c007f
>d2820005
>04160202
>c001010a
>bf8c007f
>d2820005
>04160402
>c001010e
>bf8c007f
>d2820005
>04160602
>c0010101
>bf8c007f
>100c0002
>c0010105
>bf8c007f
>d2820006
>041a0202
>c0010109
>bf8c007f
>d2820006
>041a0402
>c001010d
>bf8c007f
>d2820006
>041a0602
>c0010100
>bf8c007f
>100e0002
>c0010104
>bf8c007f
>d2820007
>041e0202
>c0010108
>bf8c007f
>d2820007
>041e0402
>c000010c
>bf8c007f
>d2820000
>041e0600
>f80008cf
>04050600
>bf810000
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL OUT[0], COLOR
>DCL CONST[0..3]
>  0: MOV OUT[0], CONST[3]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 12
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 13
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 14
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 15
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = call i32 @llvm.SI.packf16(float %23, float %25)
>  %31 = bitcast i32 %30 to float
>  %32 = call i32 @llvm.SI.packf16(float %27, float %29)
>  %33 = bitcast i32 %32 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %31, float %33, float %31, float %33)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0400100
>bf8c007f
>c001010e
>c001810f
>bf8c007f
>7e000203
>d25e0000
>02020002
>c001010c
>c000010d
>bf8c007f
>7e020200
>d25e0001
>02020202
>f8001c0f
>00010001
>bf810000
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 3
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 4
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 5
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 6
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 7
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 8
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 9
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 10
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 11
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 12
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 13
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 14
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 15
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %44 = load <16 x i8> addrspace(2)* %43, !tbaa !0
>  %45 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %44, i32 0, i32 %5)
>  %46 = extractelement <4 x float> %45, i32 0
>  %47 = extractelement <4 x float> %45, i32 1
>  %48 = extractelement <4 x float> %45, i32 2
>  %49 = extractelement <4 x float> %45, i32 3
>  %50 = fmul float %46, %12
>  %51 = fmul float %46, %14
>  %52 = fmul float %46, %16
>  %53 = fmul float %46, %18
>  %54 = fmul float %47, %20
>  %55 = fadd float %54, %50
>  %56 = fmul float %47, %22
>  %57 = fadd float %56, %51
>  %58 = fmul float %47, %24
>  %59 = fadd float %58, %52
>  %60 = fmul float %47, %26
>  %61 = fadd float %60, %53
>  %62 = fmul float %48, %28
>  %63 = fadd float %62, %55
>  %64 = fmul float %48, %30
>  %65 = fadd float %64, %57
>  %66 = fmul float %48, %32
>  %67 = fadd float %66, %59
>  %68 = fmul float %48, %34
>  %69 = fadd float %68, %61
>  %70 = fmul float %49, %36
>  %71 = fadd float %70, %63
>  %72 = fmul float %49, %38
>  %73 = fadd float %72, %65
>  %74 = fmul float %49, %40
>  %75 = fadd float %74, %67
>  %76 = fmul float %49, %42
>  %77 = fadd float %76, %69
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %71, float %73, float %75, float %77)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0820700
>bf8c007f
>e00c2000
>80010000
>c0400100
>bf8c0070
>c0010103
>bf8c007f
>10080002
>c0010107
>bf8c007f
>d2820004
>04100501
>c001010b
>bf8c007f
>d2820004
>04100502
>c001010f
>bf8c007f
>d2820004
>04100503
>c0010102
>bf8c007f
>100a0002
>c0010106
>bf8c007f
>d2820005
>04140501
>c001010a
>bf8c007f
>d2820005
>04140502
>c001010e
>bf8c007f
>d2820005
>04140503
>c0010101
>bf8c007f
>100c0002
>c0010105
>bf8c007f
>d2820006
>04180501
>c0010109
>bf8c007f
>d2820006
>04180502
>c001010d
>bf8c007f
>d2820006
>04180503
>c0010100
>bf8c007f
>100e0002
>c0010104
>bf8c007f
>d2820007
>041c0501
>c0010108
>bf8c007f
>d2820007
>041c0502
>c000010c
>bf8c007f
>d2820000
>041c0103
>f80008cf
>04050600
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL CONST[0..29]
>DCL TEMP[0..3], LOCAL
>DCL TEMP[4], ARRAY(1), LOCAL
>IMM[0] FLT32 {    1.0000,     1.1641,     0.0000,     2.0178}
>IMM[1] FLT32 {    1.1641,     1.5958,     0.0000,    -0.8707}
>IMM[2] FLT32 {    1.1641,    -0.8135,    -0.3914,     0.5297}
>IMM[3] FLT32 {    1.1641,     0.0000,     2.0178,    -1.0817}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0].x, TEMP[0], SAMP[0], 2D
>  2: MOV TEMP[0].x, TEMP[0].xxxx
>  3: MOV TEMP[1].xy, IN[0].xyyy
>  4: TEX TEMP[1].x, TEMP[1], SAMP[1], 2D
>  5: MOV TEMP[2].xy, IN[0].xyyy
>  6: TEX TEMP[2].x, TEMP[2], SAMP[2], 2D
>  7: MOV TEMP[0].y, TEMP[1].xxxx
>  8: MOV TEMP[0].z, TEMP[2].xxxx
>  9: MOV TEMP[0].w, IMM[0].xxxx
> 10: MAD TEMP[2].x, IN[1].wwww, CONST[12].wwww, -CONST[12].xxxx
> 11: DP4 TEMP[1].x, TEMP[0], IMM[1]
> 12: MIN TEMP[2].x, TEMP[2].xxxx, CONST[12].zzzz
> 13: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 14: DP4 TEMP[3].x, TEMP[0], IMM[2]
> 15: MOV TEMP[1].y, TEMP[3].xxxx
> 16: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
> 17: DP4 TEMP[3].x, TEMP[0], IMM[3]
> 18: MOV TEMP[1].z, TEMP[3].xxxx
> 19: ADD TEMP[3].xyz, CONST[29].xyzz, -TEMP[1].xyzz
> 20: MAD TEMP[0].xyz, TEMP[2].xxxx, TEMP[3].xyzz, TEMP[1].xyzz
> 21: MOV TEMP[0].w, IMM[0].xxxx
> 22: MOV TEMP[4], TEMP[0]
> 23: MOV OUT[0], TEMP[4]
> 24: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 48
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 50
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 51
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 116
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 117
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 118
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %35 = load <32 x i8> addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %37 = load <16 x i8> addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %39 = load <32 x i8> addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %41 = load <16 x i8> addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr <32 x i8> addrspace(2)* %2, i32 2
>  %43 = load <32 x i8> addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr <16 x i8> addrspace(2)* %1, i32 2
>  %45 = load <16 x i8> addrspace(2)* %44, !tbaa !0
>  %46 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %47 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %48 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %3, <2 x i32> %5)
>  %49 = bitcast float %46 to i32
>  %50 = bitcast float %47 to i32
>  %51 = insertelement <2 x i32> undef, i32 %49, i32 0
>  %52 = insertelement <2 x i32> %51, i32 %50, i32 1
>  %53 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %52, <32 x i8> %35, <16 x i8> %37, i32 2)
>  %54 = extractelement <4 x float> %53, i32 0
>  %55 = bitcast float %46 to i32
>  %56 = bitcast float %47 to i32
>  %57 = insertelement <2 x i32> undef, i32 %55, i32 0
>  %58 = insertelement <2 x i32> %57, i32 %56, i32 1
>  %59 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %58, <32 x i8> %39, <16 x i8> %41, i32 2)
>  %60 = extractelement <4 x float> %59, i32 0
>  %61 = bitcast float %46 to i32
>  %62 = bitcast float %47 to i32
>  %63 = insertelement <2 x i32> undef, i32 %61, i32 0
>  %64 = insertelement <2 x i32> %63, i32 %62, i32 1
>  %65 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %64, <32 x i8> %43, <16 x i8> %45, i32 2)
>  %66 = extractelement <4 x float> %65, i32 0
>  %67 = fsub float -0.000000e+00, %23
>  %68 = fmul float %48, %27
>  %69 = fadd float %68, %67
>  %70 = fmul float %54, 0x3FF2A04000000000
>  %71 = fmul float %60, 0x3FF9886000000000
>  %72 = fadd float %70, %71
>  %73 = fmul float %66, 0.000000e+00
>  %74 = fadd float %72, %73
>  %75 = fmul float 1.000000e+00, 0xBFEBDC6800000000
>  %76 = fadd float %74, %75
>  %77 = fcmp uge float %69, %25
>  %78 = select i1 %77, float %25, float %69
>  %79 = call float @llvm.AMDIL.clamp.(float %78, float 0.000000e+00, float 1.000000e+00)
>  %80 = fmul float %54, 0x3FF2A04000000000
>  %81 = fmul float %60, 0xBFEA080000000000
>  %82 = fadd float %80, %81
>  %83 = fmul float %66, 0xBFD90D8000000000
>  %84 = fadd float %82, %83
>  %85 = fmul float 1.000000e+00, 0x3FE0F35800000000
>  %86 = fadd float %84, %85
>  %87 = fmul float %79, %79
>  %88 = fmul float %54, 0x3FF2A04000000000
>  %89 = fmul float %60, 0.000000e+00
>  %90 = fadd float %88, %89
>  %91 = fmul float %66, 0x4000248000000000
>  %92 = fadd float %90, %91
>  %93 = fmul float 1.000000e+00, 0xBFF14E8400000000
>  %94 = fadd float %92, %93
>  %95 = fsub float -0.000000e+00, %76
>  %96 = fadd float %29, %95
>  %97 = fsub float -0.000000e+00, %86
>  %98 = fadd float %31, %97
>  %99 = fsub float -0.000000e+00, %94
>  %100 = fadd float %33, %99
>  %101 = fmul float %87, %96
>  %102 = fadd float %101, %76
>  %103 = fmul float %87, %98
>  %104 = fadd float %103, %86
>  %105 = fmul float %87, %100
>  %106 = fadd float %105, %94
>  %107 = call i32 @llvm.SI.packf16(float %102, float %104)
>  %108 = bitcast i32 %107 to float
>  %109 = call i32 @llvm.SI.packf16(float %106, float 1.000000e+00)
>  %110 = bitcast i32 %109 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %108, float %110, float %108, float %110)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8180100
>c8190101
>c8140000
>c8150001
>c0840300
>c0c60500
>bf8c007f
>f0800100
>00430205
>c0840304
>c0c60508
>bf8c0070
>f0800100
>00430305
>bf8c0770
>100e06ff
>bf504000
>7e0802ff
>3f950200
>d2820007
>041e0902
>c0840308
>c0c60510
>bf8c007f
>f0800100
>00430505
>7e0c02ff
>bec86c00
>bf8c0770
>d2820006
>041e0d05
>060c0cff
>3f079ac0
>c0400100
>bf8c007f
>c0010175
>bf8c007f
>080e0c02
>c8200700
>c8210701
>c0010133
>bf8c007f
>10001002
>c0010130
>bf8c007f
>0a000002
>c0010132
>bf8c007f
>d00c0004
>02000500
>7e020202
>d2000000
>00120300
>d2060800
>02010100
>10000100
>d2820001
>041a0f00
>100c06ff
>3fcc4300
>d2820006
>041a0902
>d2820006
>04190105
>060c0cff
>bf5ee340
>c0010174
>bf8c007f
>080e0c02
>d2820006
>041a0f00
>5e020306
>10060680
>d2820002
>040e0902
>7e0602ff
>40012400
>d2820002
>040a0705
>060404ff
>bf8a7420
>c0000176
>bf8c007f
>08060400
>d2820000
>040a0700
>d25e0000
>0201e500
>f8001c0f
>00010001
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL OUT[3], GENERIC[20]
>DCL CONST[0..20]
>DCL TEMP[0..6], LOCAL
>  0: MAD TEMP[0], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  1: DP4 TEMP[1].x, TEMP[0], CONST[4]
>  2: DP4 TEMP[2].x, TEMP[0], CONST[5]
>  3: MOV TEMP[1].y, TEMP[2].xxxx
>  4: DP4 TEMP[3].x, TEMP[0], CONST[17]
>  5: DP4 TEMP[4].x, TEMP[0], CONST[18]
>  6: MOV TEMP[3].y, TEMP[4].xxxx
>  7: DP4 TEMP[4].x, TEMP[0], CONST[19]
>  8: MOV TEMP[3].z, TEMP[4].xxxx
>  9: DP4 TEMP[4].x, TEMP[0], CONST[7]
> 10: MOV TEMP[5].w, TEMP[4].xxxx
> 11: DP4 TEMP[0].x, TEMP[0], CONST[6]
> 12: MOV TEMP[5].z, TEMP[0].xxxx
> 13: MOV TEMP[1].zw, TEMP[5].wwzw
> 14: MOV TEMP[3].w, TEMP[0].xxxx
> 15: MOV TEMP[5].xy, IN[1].xyxx
> 16: MOV TEMP[6], TEMP[1]
> 17: MAD TEMP[0].x, TEMP[0].xxxx, CONST[0].zzzz, -TEMP[4].xxxx
> 18: MOV TEMP[1].z, TEMP[0].xxxx
> 19: MOV TEMP[1].y, -TEMP[2].xxxx
> 20: MAD TEMP[1].xy, CONST[20].xyyy, TEMP[4].xxxx, TEMP[1].xyyy
> 21: MOV OUT[2], TEMP[5]
> 22: MOV OUT[3], TEMP[3]
> 23: MOV OUT[0], TEMP[1]
> 24: MOV OUT[1], TEMP[6]
> 25: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 16
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 17
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 18
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 19
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 20
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 21
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 22
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 23
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 24
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 25
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 26
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 27
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 28
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 29
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 30
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 31
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 68
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 69
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 70
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 71
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 72
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 73
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 74
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 75
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 76
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 77
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 78
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 79
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 80
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 81
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %78 = load <16 x i8> addrspace(2)* %77, !tbaa !0
>  %79 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %78, i32 0, i32 %5)
>  %80 = extractelement <4 x float> %79, i32 0
>  %81 = extractelement <4 x float> %79, i32 1
>  %82 = extractelement <4 x float> %79, i32 2
>  %83 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %84 = load <16 x i8> addrspace(2)* %83, !tbaa !0
>  %85 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %84, i32 0, i32 %5)
>  %86 = extractelement <4 x float> %85, i32 0
>  %87 = extractelement <4 x float> %85, i32 1
>  %88 = fmul float %80, %14
>  %89 = fadd float %88, %12
>  %90 = fmul float %81, %14
>  %91 = fadd float %90, %12
>  %92 = fmul float %82, %14
>  %93 = fadd float %92, %12
>  %94 = fmul float %80, %12
>  %95 = fadd float %94, %14
>  %96 = fmul float %89, %18
>  %97 = fmul float %91, %20
>  %98 = fadd float %96, %97
>  %99 = fmul float %93, %22
>  %100 = fadd float %98, %99
>  %101 = fmul float %95, %24
>  %102 = fadd float %100, %101
>  %103 = fmul float %89, %26
>  %104 = fmul float %91, %28
>  %105 = fadd float %103, %104
>  %106 = fmul float %93, %30
>  %107 = fadd float %105, %106
>  %108 = fmul float %95, %32
>  %109 = fadd float %107, %108
>  %110 = fmul float %89, %50
>  %111 = fmul float %91, %52
>  %112 = fadd float %110, %111
>  %113 = fmul float %93, %54
>  %114 = fadd float %112, %113
>  %115 = fmul float %95, %56
>  %116 = fadd float %114, %115
>  %117 = fmul float %89, %58
>  %118 = fmul float %91, %60
>  %119 = fadd float %117, %118
>  %120 = fmul float %93, %62
>  %121 = fadd float %119, %120
>  %122 = fmul float %95, %64
>  %123 = fadd float %121, %122
>  %124 = fmul float %89, %66
>  %125 = fmul float %91, %68
>  %126 = fadd float %124, %125
>  %127 = fmul float %93, %70
>  %128 = fadd float %126, %127
>  %129 = fmul float %95, %72
>  %130 = fadd float %128, %129
>  %131 = fmul float %89, %42
>  %132 = fmul float %91, %44
>  %133 = fadd float %131, %132
>  %134 = fmul float %93, %46
>  %135 = fadd float %133, %134
>  %136 = fmul float %95, %48
>  %137 = fadd float %135, %136
>  %138 = fmul float %89, %34
>  %139 = fmul float %91, %36
>  %140 = fadd float %138, %139
>  %141 = fmul float %93, %38
>  %142 = fadd float %140, %141
>  %143 = fmul float %95, %40
>  %144 = fadd float %142, %143
>  %145 = fsub float -0.000000e+00, %137
>  %146 = fmul float %144, %16
>  %147 = fadd float %146, %145
>  %148 = fsub float -0.000000e+00, %109
>  %149 = fmul float %74, %137
>  %150 = fadd float %149, %102
>  %151 = fmul float %76, %137
>  %152 = fadd float %151, %148
>  %153 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %154 = load float addrspace(2)* addrspace(2)* %153, !tbaa !0
>  %155 = getelementptr float addrspace(2)* %154, i32 0
>  %156 = load float addrspace(2)* %155, !tbaa !0
>  %157 = fmul float %156, %102
>  %158 = getelementptr float addrspace(2)* %154, i32 1
>  %159 = load float addrspace(2)* %158, !tbaa !0
>  %160 = fmul float %159, %109
>  %161 = fadd float %157, %160
>  %162 = getelementptr float addrspace(2)* %154, i32 2
>  %163 = load float addrspace(2)* %162, !tbaa !0
>  %164 = fmul float %163, %144
>  %165 = fadd float %161, %164
>  %166 = getelementptr float addrspace(2)* %154, i32 3
>  %167 = load float addrspace(2)* %166, !tbaa !0
>  %168 = fmul float %167, %137
>  %169 = fadd float %165, %168
>  %170 = getelementptr float addrspace(2)* %154, i32 4
>  %171 = load float addrspace(2)* %170, !tbaa !0
>  %172 = fmul float %171, %102
>  %173 = getelementptr float addrspace(2)* %154, i32 5
>  %174 = load float addrspace(2)* %173, !tbaa !0
>  %175 = fmul float %174, %109
>  %176 = fadd float %172, %175
>  %177 = getelementptr float addrspace(2)* %154, i32 6
>  %178 = load float addrspace(2)* %177, !tbaa !0
>  %179 = fmul float %178, %144
>  %180 = fadd float %176, %179
>  %181 = getelementptr float addrspace(2)* %154, i32 7
>  %182 = load float addrspace(2)* %181, !tbaa !0
>  %183 = fmul float %182, %137
>  %184 = fadd float %180, %183
>  %185 = getelementptr float addrspace(2)* %154, i32 8
>  %186 = load float addrspace(2)* %185, !tbaa !0
>  %187 = fmul float %186, %102
>  %188 = getelementptr float addrspace(2)* %154, i32 9
>  %189 = load float addrspace(2)* %188, !tbaa !0
>  %190 = fmul float %189, %109
>  %191 = fadd float %187, %190
>  %192 = getelementptr float addrspace(2)* %154, i32 10
>  %193 = load float addrspace(2)* %192, !tbaa !0
>  %194 = fmul float %193, %144
>  %195 = fadd float %191, %194
>  %196 = getelementptr float addrspace(2)* %154, i32 11
>  %197 = load float addrspace(2)* %196, !tbaa !0
>  %198 = fmul float %197, %137
>  %199 = fadd float %195, %198
>  %200 = getelementptr float addrspace(2)* %154, i32 12
>  %201 = load float addrspace(2)* %200, !tbaa !0
>  %202 = fmul float %201, %102
>  %203 = getelementptr float addrspace(2)* %154, i32 13
>  %204 = load float addrspace(2)* %203, !tbaa !0
>  %205 = fmul float %204, %109
>  %206 = fadd float %202, %205
>  %207 = getelementptr float addrspace(2)* %154, i32 14
>  %208 = load float addrspace(2)* %207, !tbaa !0
>  %209 = fmul float %208, %144
>  %210 = fadd float %206, %209
>  %211 = getelementptr float addrspace(2)* %154, i32 15
>  %212 = load float addrspace(2)* %211, !tbaa !0
>  %213 = fmul float %212, %137
>  %214 = fadd float %210, %213
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %169, float %184, float %199, float %214)
>  %215 = getelementptr float addrspace(2)* %154, i32 16
>  %216 = load float addrspace(2)* %215, !tbaa !0
>  %217 = fmul float %216, %102
>  %218 = getelementptr float addrspace(2)* %154, i32 17
>  %219 = load float addrspace(2)* %218, !tbaa !0
>  %220 = fmul float %219, %109
>  %221 = fadd float %217, %220
>  %222 = getelementptr float addrspace(2)* %154, i32 18
>  %223 = load float addrspace(2)* %222, !tbaa !0
>  %224 = fmul float %223, %144
>  %225 = fadd float %221, %224
>  %226 = getelementptr float addrspace(2)* %154, i32 19
>  %227 = load float addrspace(2)* %226, !tbaa !0
>  %228 = fmul float %227, %137
>  %229 = fadd float %225, %228
>  %230 = getelementptr float addrspace(2)* %154, i32 20
>  %231 = load float addrspace(2)* %230, !tbaa !0
>  %232 = fmul float %231, %102
>  %233 = getelementptr float addrspace(2)* %154, i32 21
>  %234 = load float addrspace(2)* %233, !tbaa !0
>  %235 = fmul float %234, %109
>  %236 = fadd float %232, %235
>  %237 = getelementptr float addrspace(2)* %154, i32 22
>  %238 = load float addrspace(2)* %237, !tbaa !0
>  %239 = fmul float %238, %144
>  %240 = fadd float %236, %239
>  %241 = getelementptr float addrspace(2)* %154, i32 23
>  %242 = load float addrspace(2)* %241, !tbaa !0
>  %243 = fmul float %242, %137
>  %244 = fadd float %240, %243
>  %245 = getelementptr float addrspace(2)* %154, i32 24
>  %246 = load float addrspace(2)* %245, !tbaa !0
>  %247 = fmul float %246, %102
>  %248 = getelementptr float addrspace(2)* %154, i32 25
>  %249 = load float addrspace(2)* %248, !tbaa !0
>  %250 = fmul float %249, %109
>  %251 = fadd float %247, %250
>  %252 = getelementptr float addrspace(2)* %154, i32 26
>  %253 = load float addrspace(2)* %252, !tbaa !0
>  %254 = fmul float %253, %144
>  %255 = fadd float %251, %254
>  %256 = getelementptr float addrspace(2)* %154, i32 27
>  %257 = load float addrspace(2)* %256, !tbaa !0
>  %258 = fmul float %257, %137
>  %259 = fadd float %255, %258
>  %260 = getelementptr float addrspace(2)* %154, i32 28
>  %261 = load float addrspace(2)* %260, !tbaa !0
>  %262 = fmul float %261, %102
>  %263 = getelementptr float addrspace(2)* %154, i32 29
>  %264 = load float addrspace(2)* %263, !tbaa !0
>  %265 = fmul float %264, %109
>  %266 = fadd float %262, %265
>  %267 = getelementptr float addrspace(2)* %154, i32 30
>  %268 = load float addrspace(2)* %267, !tbaa !0
>  %269 = fmul float %268, %144
>  %270 = fadd float %266, %269
>  %271 = getelementptr float addrspace(2)* %154, i32 31
>  %272 = load float addrspace(2)* %271, !tbaa !0
>  %273 = fmul float %272, %137
>  %274 = fadd float %270, %273
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %229, float %244, float %259, float %274)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %86, float %87, float %144, float %137)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %116, float %123, float %130, float %144)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %150, float %152, float %147, float %137)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840700
>bf8c007f
>e00c2000
>80020400
>c0410100
>bf8c0070
>c0020301
>c0028300
>bf8c007f
>7e060205
>d2820001
>040c0904
>d2820002
>040c0905
>c0040311
>bf8c007f
>10100408
>c0040310
>bf8c007f
>d2820008
>04201101
>d2820003
>040c0906
>c0040312
>bf8c007f
>d2820008
>04201103
>7e120204
>d2820005
>04240b04
>c0020313
>bf8c007f
>d2820004
>04200905
>c0020315
>bf8c007f
>100c0404
>c0020314
>bf8c007f
>d2820006
>04180901
>c0020316
>bf8c007f
>d2820006
>04180903
>c0020317
>bf8c007f
>d2820006
>04180905
>c0400102
>bf8c007f
>c002010d
>bf8c007f
>100e0c04
>c002010c
>bf8c007f
>d2820008
>041e0804
>c0020319
>bf8c007f
>100e0404
>c0020318
>bf8c007f
>d2820007
>041c0901
>c002031a
>bf8c007f
>d2820007
>041c0903
>c002031b
>bf8c007f
>d2820007
>041c0905
>c002010e
>bf8c007f
>d2820009
>04220e04
>c002031d
>bf8c007f
>10100404
>c002031c
>bf8c007f
>d2820008
>04200901
>c002031e
>bf8c007f
>d2820008
>04200903
>c002031f
>bf8c007f
>d2820008
>04200905
>c002010f
>bf8c007f
>d2820009
>04261004
>c0020109
>bf8c007f
>10140c04
>c0020108
>bf8c007f
>d282000a
>042a0804
>c002010a
>bf8c007f
>d282000a
>042a0e04
>c002010b
>bf8c007f
>d282000a
>042a1004
>c0020105
>bf8c007f
>10160c04
>c0020104
>bf8c007f
>d282000b
>042e0804
>c0020106
>bf8c007f
>d282000b
>042e0e04
>c0020107
>bf8c007f
>d282000b
>042e1004
>c0020101
>bf8c007f
>10180c04
>c0020100
>bf8c007f
>d282000c
>04320804
>c0020102
>bf8c007f
>d282000c
>04320e04
>c0020103
>bf8c007f
>d282000c
>04321004
>f80000ef
>090a0b0c
>c002011d
>bf8c000f
>10120c04
>c002011c
>bf8c007f
>d2820009
>04260804
>c002011e
>bf8c007f
>d2820009
>04260e04
>c002011f
>bf8c007f
>d2820009
>04261004
>c0020119
>bf8c007f
>10140c04
>c0020118
>bf8c007f
>d282000a
>042a0804
>c002011a
>bf8c007f
>d282000a
>042a0e04
>c002011b
>bf8c007f
>d282000a
>042a1004
>c0020115
>bf8c007f
>10160c04
>c0020114
>bf8c007f
>d282000b
>042e0804
>c0020116
>bf8c007f
>d282000b
>042e0e04
>c0020117
>bf8c007f
>d282000b
>042e1004
>c0020111
>bf8c007f
>10180c04
>c0020110
>bf8c007f
>d282000c
>04320804
>c0020112
>bf8c007f
>d282000c
>04320e04
>c0000113
>bf8c007f
>d282000c
>04321000
>f80000ff
>090a0b0c
>c0820704
>bf8c000f
>e00c2000
>80010900
>bf8c0770
>f800020f
>08070a09
>c000034d
>bf8c000f
>10000400
>c000034c
>bf8c007f
>d2820000
>04000101
>c000034e
>bf8c007f
>d2820000
>04000103
>c000034f
>bf8c007f
>d2820000
>04000105
>c0000349
>bf8c007f
>10120400
>c0000348
>bf8c007f
>d2820009
>04240101
>c000034a
>bf8c007f
>d2820009
>04240103
>c000034b
>bf8c007f
>d2820009
>04240105
>c0000345
>bf8c007f
>10040400
>c0000344
>bf8c007f
>d2820001
>04080101
>c0000346
>bf8c007f
>d2820001
>04040103
>c0000347
>bf8c007f
>d2820001
>04040105
>f800021f
>07000901
>c0000350
>bf8c000f
>d2820000
>04121000
>c0000302
>bf8c007f
>10020e00
>08021101
>c0000351
>bf8c007f
>10041000
>08040d02
>f80008cf
>08010200
>bf810000
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 3
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 4
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 5
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 6
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 7
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 8
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 9
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 10
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 11
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 12
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 13
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 14
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 15
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %44 = load <16 x i8> addrspace(2)* %43, !tbaa !0
>  %45 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %44, i32 0, i32 %5)
>  %46 = extractelement <4 x float> %45, i32 0
>  %47 = extractelement <4 x float> %45, i32 1
>  %48 = extractelement <4 x float> %45, i32 2
>  %49 = extractelement <4 x float> %45, i32 3
>  %50 = fmul float %46, %12
>  %51 = fmul float %46, %14
>  %52 = fmul float %46, %16
>  %53 = fmul float %46, %18
>  %54 = fmul float %47, %20
>  %55 = fadd float %54, %50
>  %56 = fmul float %47, %22
>  %57 = fadd float %56, %51
>  %58 = fmul float %47, %24
>  %59 = fadd float %58, %52
>  %60 = fmul float %47, %26
>  %61 = fadd float %60, %53
>  %62 = fmul float %48, %28
>  %63 = fadd float %62, %55
>  %64 = fmul float %48, %30
>  %65 = fadd float %64, %57
>  %66 = fmul float %48, %32
>  %67 = fadd float %66, %59
>  %68 = fmul float %48, %34
>  %69 = fadd float %68, %61
>  %70 = fmul float %49, %36
>  %71 = fadd float %70, %63
>  %72 = fmul float %49, %38
>  %73 = fadd float %72, %65
>  %74 = fmul float %49, %40
>  %75 = fadd float %74, %67
>  %76 = fmul float %49, %42
>  %77 = fadd float %76, %69
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %71, float %73, float %75, float %77)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0820700
>bf8c007f
>e00c2000
>80010000
>c0400100
>bf8c0070
>c0010103
>bf8c007f
>10080002
>c0010107
>bf8c007f
>d2820004
>04100501
>c001010b
>bf8c007f
>d2820004
>04100502
>c001010f
>bf8c007f
>d2820004
>04100503
>c0010102
>bf8c007f
>100a0002
>c0010106
>bf8c007f
>d2820005
>04140501
>c001010a
>bf8c007f
>d2820005
>04140502
>c001010e
>bf8c007f
>d2820005
>04140503
>c0010101
>bf8c007f
>100c0002
>c0010105
>bf8c007f
>d2820006
>04180501
>c0010109
>bf8c007f
>d2820006
>04180502
>c001010d
>bf8c007f
>d2820006
>04180503
>c0010100
>bf8c007f
>100e0002
>c0010104
>bf8c007f
>d2820007
>041c0501
>c0010108
>bf8c007f
>d2820007
>041c0502
>c000010c
>bf8c007f
>d2820000
>041c0103
>f80008cf
>04050600
>bf810000
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL CONST[1..4]
>DCL TEMP[0], LOCAL
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: MOV TEMP[0].w, IN[0].wwww
>  2: TXP TEMP[0], TEMP[0], SAMP[0], 2D
>  3: MUL TEMP[0], TEMP[0], CONST[4]
>  4: MOV OUT[0], TEMP[0]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 16
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 17
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 18
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 19
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %31 = load <32 x i8> addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %33 = load <16 x i8> addrspace(2)* %32, !tbaa !0
>  %34 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %36 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %3, <2 x i32> %5)
>  %37 = fdiv float %34, %36
>  %38 = fdiv float %35, %36
>  %39 = bitcast float %37 to i32
>  %40 = bitcast float %38 to i32
>  %41 = insertelement <2 x i32> undef, i32 %39, i32 0
>  %42 = insertelement <2 x i32> %41, i32 %40, i32 1
>  %43 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %42, <32 x i8> %31, <16 x i8> %33, i32 2)
>  %44 = extractelement <4 x float> %43, i32 0
>  %45 = extractelement <4 x float> %43, i32 1
>  %46 = extractelement <4 x float> %43, i32 2
>  %47 = extractelement <4 x float> %43, i32 3
>  %48 = fmul float %44, %23
>  %49 = fmul float %45, %25
>  %50 = fmul float %46, %27
>  %51 = fmul float %47, %29
>  %52 = call i32 @llvm.SI.packf16(float %48, float %49)
>  %53 = bitcast i32 %52 to float
>  %54 = call i32 @llvm.SI.packf16(float %50, float %51)
>  %55 = bitcast i32 %54 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %53, float %55, float %53, float %55)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8080100
>c8090101
>c80c0300
>c80d0301
>7e085503
>10060902
>c8140000
>c8150001
>10040905
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430002
>c0400100
>bf8c0070
>c0010113
>bf8c007f
>10080602
>c0010112
>bf8c007f
>100a0402
>5e080905
>c0010111
>bf8c007f
>100a0202
>c0000110
>bf8c007f
>10000000
>5e000b00
>f8001c0f
>04000400
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL CONST[0..7]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MUL TEMP[0], IN[1].xxxx, CONST[4]
>  5: MAD TEMP[0], IN[1].yyyy, CONST[5], TEMP[0]
>  6: MAD TEMP[0], IN[1].zzzz, CONST[6], TEMP[0]
>  7: MAD OUT[1], IN[1].wwww, CONST[7], TEMP[0]
>  8: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 3
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 4
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 5
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 6
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 7
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 8
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 9
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 10
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 11
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 12
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 13
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 14
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 15
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 16
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 17
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 18
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 19
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 20
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 21
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 22
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 23
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 24
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 25
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 26
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 27
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 28
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 29
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 30
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 31
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %76 = load <16 x i8> addrspace(2)* %75, !tbaa !0
>  %77 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %76, i32 0, i32 %5)
>  %78 = extractelement <4 x float> %77, i32 0
>  %79 = extractelement <4 x float> %77, i32 1
>  %80 = extractelement <4 x float> %77, i32 2
>  %81 = extractelement <4 x float> %77, i32 3
>  %82 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %83 = load <16 x i8> addrspace(2)* %82, !tbaa !0
>  %84 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %83, i32 0, i32 %5)
>  %85 = extractelement <4 x float> %84, i32 0
>  %86 = extractelement <4 x float> %84, i32 1
>  %87 = extractelement <4 x float> %84, i32 2
>  %88 = extractelement <4 x float> %84, i32 3
>  %89 = fmul float %78, %12
>  %90 = fmul float %78, %14
>  %91 = fmul float %78, %16
>  %92 = fmul float %78, %18
>  %93 = fmul float %79, %20
>  %94 = fadd float %93, %89
>  %95 = fmul float %79, %22
>  %96 = fadd float %95, %90
>  %97 = fmul float %79, %24
>  %98 = fadd float %97, %91
>  %99 = fmul float %79, %26
>  %100 = fadd float %99, %92
>  %101 = fmul float %80, %28
>  %102 = fadd float %101, %94
>  %103 = fmul float %80, %30
>  %104 = fadd float %103, %96
>  %105 = fmul float %80, %32
>  %106 = fadd float %105, %98
>  %107 = fmul float %80, %34
>  %108 = fadd float %107, %100
>  %109 = fmul float %81, %36
>  %110 = fadd float %109, %102
>  %111 = fmul float %81, %38
>  %112 = fadd float %111, %104
>  %113 = fmul float %81, %40
>  %114 = fadd float %113, %106
>  %115 = fmul float %81, %42
>  %116 = fadd float %115, %108
>  %117 = fmul float %85, %44
>  %118 = fmul float %85, %46
>  %119 = fmul float %85, %48
>  %120 = fmul float %85, %50
>  %121 = fmul float %86, %52
>  %122 = fadd float %121, %117
>  %123 = fmul float %86, %54
>  %124 = fadd float %123, %118
>  %125 = fmul float %86, %56
>  %126 = fadd float %125, %119
>  %127 = fmul float %86, %58
>  %128 = fadd float %127, %120
>  %129 = fmul float %87, %60
>  %130 = fadd float %129, %122
>  %131 = fmul float %87, %62
>  %132 = fadd float %131, %124
>  %133 = fmul float %87, %64
>  %134 = fadd float %133, %126
>  %135 = fmul float %87, %66
>  %136 = fadd float %135, %128
>  %137 = fmul float %88, %68
>  %138 = fadd float %137, %130
>  %139 = fmul float %88, %70
>  %140 = fadd float %139, %132
>  %141 = fmul float %88, %72
>  %142 = fadd float %141, %134
>  %143 = fmul float %88, %74
>  %144 = fadd float %143, %136
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %138, float %140, float %142, float %144)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %110, float %112, float %114, float %116)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840704
>bf8c007f
>e00c2000
>80020100
>c0400100
>bf8c0070
>c0010113
>bf8c007f
>100a0202
>c0010117
>bf8c007f
>d2820005
>04140502
>c001011b
>bf8c007f
>d2820005
>04140503
>c001011f
>bf8c007f
>d2820005
>04140504
>c0010112
>bf8c007f
>100c0202
>c0010116
>bf8c007f
>d2820006
>04180502
>c001011a
>bf8c007f
>d2820006
>04180503
>c001011e
>bf8c007f
>d2820006
>04180504
>c0010111
>bf8c007f
>100e0202
>c0010115
>bf8c007f
>d2820007
>041c0502
>c0010119
>bf8c007f
>d2820007
>041c0503
>c001011d
>bf8c007f
>d2820007
>041c0504
>c0010110
>bf8c007f
>10100202
>c0010114
>bf8c007f
>d2820008
>04200502
>c0010118
>bf8c007f
>d2820008
>04200503
>c001011c
>bf8c007f
>d2820001
>04200504
>f800020f
>05060701
>c0820700
>bf8c000f
>e00c2000
>80010000
>c0010103
>bf8c0070
>10080002
>c0010107
>bf8c007f
>d2820004
>04100501
>c001010b
>bf8c007f
>d2820004
>04100502
>c001010f
>bf8c007f
>d2820004
>04100503
>c0010102
>bf8c007f
>100a0002
>c0010106
>bf8c007f
>d2820005
>04140501
>c001010a
>bf8c007f
>d2820005
>04140502
>c001010e
>bf8c007f
>d2820005
>04140503
>c0010101
>bf8c007f
>100c0002
>c0010105
>bf8c007f
>d2820006
>04180501
>c0010109
>bf8c007f
>d2820006
>04180502
>c001010d
>bf8c007f
>d2820006
>04180503
>c0010100
>bf8c007f
>100e0002
>c0010104
>bf8c007f
>d2820007
>041c0501
>c0010108
>bf8c007f
>d2820007
>041c0502
>c000010c
>bf8c007f
>d2820000
>041c0103
>f80008cf
>04050600
>bf810000
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], COLOR, COLOR
>DCL IN[1], GENERIC[0], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL TEMP[0], LOCAL
>  0: MOV TEMP[0].xy, IN[1].xyyy
>  1: MOV TEMP[0].w, IN[1].wwww
>  2: TXP TEMP[0], TEMP[0], SAMP[0], 2D
>  3: MUL TEMP[0], TEMP[0], IN[0]
>  4: MOV OUT[0], TEMP[0]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %21 = load <32 x i8> addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %23 = load <16 x i8> addrspace(2)* %22, !tbaa !0
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %3, <2 x i32> %5)
>  %28 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %29 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %30 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %3, <2 x i32> %5)
>  %31 = fdiv float %28, %30
>  %32 = fdiv float %29, %30
>  %33 = bitcast float %31 to i32
>  %34 = bitcast float %32 to i32
>  %35 = insertelement <2 x i32> undef, i32 %33, i32 0
>  %36 = insertelement <2 x i32> %35, i32 %34, i32 1
>  %37 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %36, <32 x i8> %21, <16 x i8> %23, i32 2)
>  %38 = extractelement <4 x float> %37, i32 0
>  %39 = extractelement <4 x float> %37, i32 1
>  %40 = extractelement <4 x float> %37, i32 2
>  %41 = extractelement <4 x float> %37, i32 3
>  %42 = fmul float %38, %24
>  %43 = fmul float %39, %25
>  %44 = fmul float %40, %26
>  %45 = fmul float %41, %27
>  %46 = call i32 @llvm.SI.packf16(float %42, float %43)
>  %47 = bitcast i32 %46 to float
>  %48 = call i32 @llvm.SI.packf16(float %44, float %45)
>  %49 = bitcast i32 %48 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %47, float %49, float %47, float %49)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8080500
>c8090501
>c80c0700
>c80d0701
>7e085503
>10060902
>c8140400
>c8150401
>10040905
>c0800300
>c0c40500
>bf8c007f
>f0800f00
>00020202
>c8180300
>c8190301
>bf8c0770
>100c0d05
>c81c0200
>c81d0201
>100e0f04
>5e0c0d07
>c81c0100
>c81d0101
>100e0f03
>c8200000
>c8210001
>10001102
>5e000f00
>f8001c0f
>06000600
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], GENERIC[0]
>DCL CONST[0..7]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: MUL TEMP[0], IN[2].xxxx, CONST[4]
>  6: MAD TEMP[0], IN[2].yyyy, CONST[5], TEMP[0]
>  7: MAD TEMP[0], IN[2].zzzz, CONST[6], TEMP[0]
>  8: MAD OUT[2], IN[2].wwww, CONST[7], TEMP[0]
>  9: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 3
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 4
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 5
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 6
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 7
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 8
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 9
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 10
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 11
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 12
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 13
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 14
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 15
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 16
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 17
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 18
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 19
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 20
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 21
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 22
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 23
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 24
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 25
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 26
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 27
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 28
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 29
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 30
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 31
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %76 = load <16 x i8> addrspace(2)* %75, !tbaa !0
>  %77 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %76, i32 0, i32 %5)
>  %78 = extractelement <4 x float> %77, i32 0
>  %79 = extractelement <4 x float> %77, i32 1
>  %80 = extractelement <4 x float> %77, i32 2
>  %81 = extractelement <4 x float> %77, i32 3
>  %82 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %83 = load <16 x i8> addrspace(2)* %82, !tbaa !0
>  %84 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %83, i32 0, i32 %5)
>  %85 = extractelement <4 x float> %84, i32 0
>  %86 = extractelement <4 x float> %84, i32 1
>  %87 = extractelement <4 x float> %84, i32 2
>  %88 = extractelement <4 x float> %84, i32 3
>  %89 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %90 = load <16 x i8> addrspace(2)* %89, !tbaa !0
>  %91 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %90, i32 0, i32 %5)
>  %92 = extractelement <4 x float> %91, i32 0
>  %93 = extractelement <4 x float> %91, i32 1
>  %94 = extractelement <4 x float> %91, i32 2
>  %95 = extractelement <4 x float> %91, i32 3
>  %96 = fmul float %78, %12
>  %97 = fmul float %78, %14
>  %98 = fmul float %78, %16
>  %99 = fmul float %78, %18
>  %100 = fmul float %79, %20
>  %101 = fadd float %100, %96
>  %102 = fmul float %79, %22
>  %103 = fadd float %102, %97
>  %104 = fmul float %79, %24
>  %105 = fadd float %104, %98
>  %106 = fmul float %79, %26
>  %107 = fadd float %106, %99
>  %108 = fmul float %80, %28
>  %109 = fadd float %108, %101
>  %110 = fmul float %80, %30
>  %111 = fadd float %110, %103
>  %112 = fmul float %80, %32
>  %113 = fadd float %112, %105
>  %114 = fmul float %80, %34
>  %115 = fadd float %114, %107
>  %116 = fmul float %81, %36
>  %117 = fadd float %116, %109
>  %118 = fmul float %81, %38
>  %119 = fadd float %118, %111
>  %120 = fmul float %81, %40
>  %121 = fadd float %120, %113
>  %122 = fmul float %81, %42
>  %123 = fadd float %122, %115
>  %124 = call float @llvm.AMDIL.clamp.(float %85, float 0.000000e+00, float 1.000000e+00)
>  %125 = call float @llvm.AMDIL.clamp.(float %86, float 0.000000e+00, float 1.000000e+00)
>  %126 = call float @llvm.AMDIL.clamp.(float %87, float 0.000000e+00, float 1.000000e+00)
>  %127 = call float @llvm.AMDIL.clamp.(float %88, float 0.000000e+00, float 1.000000e+00)
>  %128 = fmul float %92, %44
>  %129 = fmul float %92, %46
>  %130 = fmul float %92, %48
>  %131 = fmul float %92, %50
>  %132 = fmul float %93, %52
>  %133 = fadd float %132, %128
>  %134 = fmul float %93, %54
>  %135 = fadd float %134, %129
>  %136 = fmul float %93, %56
>  %137 = fadd float %136, %130
>  %138 = fmul float %93, %58
>  %139 = fadd float %138, %131
>  %140 = fmul float %94, %60
>  %141 = fadd float %140, %133
>  %142 = fmul float %94, %62
>  %143 = fadd float %142, %135
>  %144 = fmul float %94, %64
>  %145 = fadd float %144, %137
>  %146 = fmul float %94, %66
>  %147 = fadd float %146, %139
>  %148 = fmul float %95, %68
>  %149 = fadd float %148, %141
>  %150 = fmul float %95, %70
>  %151 = fadd float %150, %143
>  %152 = fmul float %95, %72
>  %153 = fadd float %152, %145
>  %154 = fmul float %95, %74
>  %155 = fadd float %154, %147
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %124, float %125, float %126, float %127)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %149, float %151, float %153, float %155)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %117, float %119, float %121, float %123)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840704
>bf8c007f
>e00c2000
>80020100
>bf8c0770
>d2060805
>02010104
>d2060806
>02010103
>d2060807
>02010102
>d2060801
>02010101
>f800020f
>05060701
>c0840708
>bf8c000f
>e00c2000
>80020100
>c0400100
>bf8c0070
>c0010113
>bf8c007f
>100a0202
>c0010117
>bf8c007f
>d2820005
>04140502
>c001011b
>bf8c007f
>d2820005
>04140503
>c001011f
>bf8c007f
>d2820005
>04140504
>c0010112
>bf8c007f
>100c0202
>c0010116
>bf8c007f
>d2820006
>04180502
>c001011a
>bf8c007f
>d2820006
>04180503
>c001011e
>bf8c007f
>d2820006
>04180504
>c0010111
>bf8c007f
>100e0202
>c0010115
>bf8c007f
>d2820007
>041c0502
>c0010119
>bf8c007f
>d2820007
>041c0503
>c001011d
>bf8c007f
>d2820007
>041c0504
>c0010110
>bf8c007f
>10100202
>c0010114
>bf8c007f
>d2820008
>04200502
>c0010118
>bf8c007f
>d2820008
>04200503
>c001011c
>bf8c007f
>d2820001
>04200504
>f800021f
>05060701
>c0820700
>bf8c000f
>e00c2000
>80010000
>c0010103
>bf8c0070
>10080002
>c0010107
>bf8c007f
>d2820004
>04100501
>c001010b
>bf8c007f
>d2820004
>04100502
>c001010f
>bf8c007f
>d2820004
>04100503
>c0010102
>bf8c007f
>100a0002
>c0010106
>bf8c007f
>d2820005
>04140501
>c001010a
>bf8c007f
>d2820005
>04140502
>c001010e
>bf8c007f
>d2820005
>04140503
>c0010101
>bf8c007f
>100c0002
>c0010105
>bf8c007f
>d2820006
>04180501
>c0010109
>bf8c007f
>d2820006
>04180502
>c001010d
>bf8c007f
>d2820006
>04180503
>c0010100
>bf8c007f
>100e0002
>c0010104
>bf8c007f
>d2820007
>041c0501
>c0010108
>bf8c007f
>d2820007
>041c0502
>c000010c
>bf8c007f
>d2820000
>041c0103
>f80008cf
>04050600
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 3
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 4
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 5
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 6
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 7
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 8
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 9
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 10
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 11
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 12
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 13
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 14
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 15
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %44 = load <16 x i8> addrspace(2)* %43, !tbaa !0
>  %45 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %44, i32 0, i32 %5)
>  %46 = extractelement <4 x float> %45, i32 0
>  %47 = extractelement <4 x float> %45, i32 1
>  %48 = extractelement <4 x float> %45, i32 2
>  %49 = extractelement <4 x float> %45, i32 3
>  %50 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %51 = load <16 x i8> addrspace(2)* %50, !tbaa !0
>  %52 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %51, i32 0, i32 %5)
>  %53 = extractelement <4 x float> %52, i32 0
>  %54 = extractelement <4 x float> %52, i32 1
>  %55 = extractelement <4 x float> %52, i32 2
>  %56 = extractelement <4 x float> %52, i32 3
>  %57 = fmul float %46, %12
>  %58 = fmul float %46, %14
>  %59 = fmul float %46, %16
>  %60 = fmul float %46, %18
>  %61 = fmul float %47, %20
>  %62 = fadd float %61, %57
>  %63 = fmul float %47, %22
>  %64 = fadd float %63, %58
>  %65 = fmul float %47, %24
>  %66 = fadd float %65, %59
>  %67 = fmul float %47, %26
>  %68 = fadd float %67, %60
>  %69 = fmul float %48, %28
>  %70 = fadd float %69, %62
>  %71 = fmul float %48, %30
>  %72 = fadd float %71, %64
>  %73 = fmul float %48, %32
>  %74 = fadd float %73, %66
>  %75 = fmul float %48, %34
>  %76 = fadd float %75, %68
>  %77 = fmul float %49, %36
>  %78 = fadd float %77, %70
>  %79 = fmul float %49, %38
>  %80 = fadd float %79, %72
>  %81 = fmul float %49, %40
>  %82 = fadd float %81, %74
>  %83 = fmul float %49, %42
>  %84 = fadd float %83, %76
>  %85 = call float @llvm.AMDIL.clamp.(float %53, float 0.000000e+00, float 1.000000e+00)
>  %86 = call float @llvm.AMDIL.clamp.(float %54, float 0.000000e+00, float 1.000000e+00)
>  %87 = call float @llvm.AMDIL.clamp.(float %55, float 0.000000e+00, float 1.000000e+00)
>  %88 = call float @llvm.AMDIL.clamp.(float %56, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %85, float %86, float %87, float %88)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %78, float %80, float %82, float %84)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840704
>bf8c007f
>e00c2000
>80020100
>bf8c0770
>d2060805
>02010104
>d2060806
>02010103
>d2060807
>02010102
>d2060801
>02010101
>f800020f
>05060701
>c0820700
>bf8c000f
>e00c2000
>80010000
>c0400100
>bf8c0070
>c0010103
>bf8c007f
>10080002
>c0010107
>bf8c007f
>d2820004
>04100501
>c001010b
>bf8c007f
>d2820004
>04100502
>c001010f
>bf8c007f
>d2820004
>04100503
>c0010102
>bf8c007f
>100a0002
>c0010106
>bf8c007f
>d2820005
>04140501
>c001010a
>bf8c007f
>d2820005
>04140502
>c001010e
>bf8c007f
>d2820005
>04140503
>c0010101
>bf8c007f
>100c0002
>c0010105
>bf8c007f
>d2820006
>04180501
>c0010109
>bf8c007f
>d2820006
>04180502
>c001010d
>bf8c007f
>d2820006
>04180503
>c0010100
>bf8c007f
>100e0002
>c0010104
>bf8c007f
>d2820007
>041c0501
>c0010108
>bf8c007f
>d2820007
>041c0502
>c000010c
>bf8c007f
>d2820000
>041c0103
>f80008cf
>04050600
>bf810000
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>DCL SAMP[0]
>  0: TEX OUT[0], IN[0], SAMP[0], 2D
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %21 = load <32 x i8> addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %23 = load <16 x i8> addrspace(2)* %22, !tbaa !0
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %9)
>  %26 = bitcast float %24 to i32
>  %27 = bitcast float %25 to i32
>  %28 = insertelement <2 x i32> undef, i32 %26, i32 0
>  %29 = insertelement <2 x i32> %28, i32 %27, i32 1
>  %30 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %29, <32 x i8> %21, <16 x i8> %23, i32 2)
>  %31 = extractelement <4 x float> %30, i32 0
>  %32 = extractelement <4 x float> %30, i32 1
>  %33 = extractelement <4 x float> %30, i32 2
>  %34 = extractelement <4 x float> %30, i32 3
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %31, float %32, float %33, float %34)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0800300
>c0c20500
>bf8c007f
>f0800f00
>00010002
>bf8c0770
>f800180f
>03020100
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL IN[2], GENERIC[21], PERSPECTIVE
>DCL IN[3], GENERIC[22], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL CONST[0..30]
>DCL TEMP[0..5], LOCAL
>DCL TEMP[6], ARRAY(1), LOCAL
>IMM[0] FLT32 {    0.0000,     1.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MAD TEMP[1].x, CONST[12].xxxx, CONST[21].yyyy, -IN[3].zzzz
>  3: MAD TEMP[2].x, CONST[12].xxxx, CONST[20].zzzz, -IN[3].zzzz
>  4: RCP TEMP[3].x, TEMP[2].xxxx
>  5: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
>  6: MUL TEMP[3].x, TEMP[1].xxxx, TEMP[3].xxxx
>  7: MOV_SAT TEMP[3].x, TEMP[3].xxxx
>  8: SGE TEMP[2].x, -TEMP[2].xxxx, IMM[0].xxxx
>  9: F2I TEMP[2].x, -TEMP[2]
> 10: UIF TEMP[2].xxxx :0
> 11:   MOV TEMP[2].x, IMM[0].yyyy
> 12: ELSE :0
> 13:   MOV TEMP[2].x, TEMP[3].xxxx
> 14: ENDIF
> 15: MUL TEMP[3].x, IN[2].zzzz, CONST[21].wwww
> 16: MAD TEMP[2].x, TEMP[3].xxxx, TEMP[2].xxxx, -CONST[21].xxxx
> 17: MIN TEMP[2].x, TEMP[2].xxxx, CONST[21].zzzz
> 18: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 19: MAD TEMP[3].x, TEMP[2].xxxx, -TEMP[2].xxxx, TEMP[2].xxxx
> 20: MUL TEMP[3].x, TEMP[3].xxxx, CONST[12].xxxx
> 21: MAD TEMP[3].x, TEMP[2].xxxx, TEMP[2].xxxx, TEMP[3].xxxx
> 22: MUL TEMP[4].x, TEMP[0].wwww, CONST[1].wwww
> 23: MAD TEMP[5].x, TEMP[4].xxxx, IN[1].wwww, -TEMP[4].xxxx
> 24: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[1].xyzz
> 25: MAD TEMP[4].x, CONST[12].wwww, TEMP[5].xxxx, TEMP[4].xxxx
> 26: MAD TEMP[1].xyz, TEMP[0].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 27: ADD TEMP[2].x, TEMP[2].xxxx, -TEMP[4].xxxx
> 28: MAD TEMP[2].x, CONST[12].zzzz, TEMP[2].xxxx, TEMP[4].xxxx
> 29: MUL TEMP[1].xyz, TEMP[3].xxxx, TEMP[1].xyzz
> 30: MAD TEMP[3].x, IN[2].zzzz, CONST[29].wwww, -TEMP[2].xxxx
> 31: MAD TEMP[0].xyz, TEMP[0].xyzz, CONST[30].xxxx, TEMP[1].xyzz
> 32: MAD TEMP[1].x, CONST[12].yyyy, TEMP[3].xxxx, TEMP[2].xxxx
> 33: MOV TEMP[0].w, TEMP[1].xxxx
> 34: MOV TEMP[6], TEMP[0]
> 35: MOV OUT[0], TEMP[6]
> 36: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 4
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 5
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 6
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 7
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 48
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 49
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 50
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 51
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 82
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 84
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 85
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr float addrspace(2)* %21, i32 86
>  %45 = load float addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr float addrspace(2)* %21, i32 87
>  %47 = load float addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr float addrspace(2)* %21, i32 116
>  %49 = load float addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr float addrspace(2)* %21, i32 117
>  %51 = load float addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr float addrspace(2)* %21, i32 118
>  %53 = load float addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr float addrspace(2)* %21, i32 119
>  %55 = load float addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr float addrspace(2)* %21, i32 120
>  %57 = load float addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %59 = load <32 x i8> addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %61 = load <16 x i8> addrspace(2)* %60, !tbaa !0
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %64 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %3, <2 x i32> %5)
>  %65 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %3, <2 x i32> %5)
>  %66 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %3, <2 x i32> %5)
>  %67 = bitcast float %62 to i32
>  %68 = bitcast float %63 to i32
>  %69 = insertelement <2 x i32> undef, i32 %67, i32 0
>  %70 = insertelement <2 x i32> %69, i32 %68, i32 1
>  %71 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %70, <32 x i8> %59, <16 x i8> %61, i32 2)
>  %72 = extractelement <4 x float> %71, i32 0
>  %73 = extractelement <4 x float> %71, i32 1
>  %74 = extractelement <4 x float> %71, i32 2
>  %75 = extractelement <4 x float> %71, i32 3
>  %76 = fsub float -0.000000e+00, %66
>  %77 = fmul float %31, %43
>  %78 = fadd float %77, %76
>  %79 = fsub float -0.000000e+00, %66
>  %80 = fmul float %31, %39
>  %81 = fadd float %80, %79
>  %82 = fdiv float 1.000000e+00, %81
>  %83 = fmul float %81, %81
>  %84 = fmul float %78, %82
>  %85 = call float @llvm.AMDIL.clamp.(float %84, float 0.000000e+00, float 1.000000e+00)
>  %86 = fsub float -0.000000e+00, %83
>  %87 = fcmp uge float %86, 0.000000e+00
>  %88 = select i1 %87, float 1.000000e+00, float 0.000000e+00
>  %89 = fsub float -0.000000e+00, %88
>  %90 = fptosi float %89 to i32
>  %91 = bitcast i32 %90 to float
>  %92 = bitcast float %91 to i32
>  %93 = icmp ne i32 %92, 0
>  %. = select i1 %93, float 1.000000e+00, float %85
>  %94 = fmul float %65, %47
>  %95 = fsub float -0.000000e+00, %41
>  %96 = fmul float %94, %.
>  %97 = fadd float %96, %95
>  %98 = fcmp uge float %97, %45
>  %99 = select i1 %98, float %45, float %97
>  %100 = call float @llvm.AMDIL.clamp.(float %99, float 0.000000e+00, float 1.000000e+00)
>  %101 = fsub float -0.000000e+00, %100
>  %102 = fmul float %100, %101
>  %103 = fadd float %102, %100
>  %104 = fmul float %103, %31
>  %105 = fmul float %100, %100
>  %106 = fadd float %105, %104
>  %107 = fmul float %75, %29
>  %108 = fsub float -0.000000e+00, %107
>  %109 = fmul float %107, %64
>  %110 = fadd float %109, %108
>  %111 = fmul float %72, %23
>  %112 = fmul float %73, %25
>  %113 = fmul float %74, %27
>  %114 = fmul float %37, %110
>  %115 = fadd float %114, %107
>  %116 = fsub float -0.000000e+00, %57
>  %117 = fmul float %111, %116
>  %118 = fadd float %117, %49
>  %119 = fsub float -0.000000e+00, %57
>  %120 = fmul float %112, %119
>  %121 = fadd float %120, %51
>  %122 = fsub float -0.000000e+00, %57
>  %123 = fmul float %113, %122
>  %124 = fadd float %123, %53
>  %125 = fsub float -0.000000e+00, %115
>  %126 = fadd float %100, %125
>  %127 = fmul float %35, %126
>  %128 = fadd float %127, %115
>  %129 = fmul float %106, %118
>  %130 = fmul float %106, %121
>  %131 = fmul float %106, %124
>  %132 = fsub float -0.000000e+00, %128
>  %133 = fmul float %65, %55
>  %134 = fadd float %133, %132
>  %135 = fmul float %111, %57
>  %136 = fadd float %135, %129
>  %137 = fmul float %112, %57
>  %138 = fadd float %137, %130
>  %139 = fmul float %113, %57
>  %140 = fadd float %139, %131
>  %141 = fmul float %33, %134
>  %142 = fadd float %141, %128
>  %143 = call i32 @llvm.SI.packf16(float %136, float %138)
>  %144 = bitcast i32 %143 to float
>  %145 = call i32 @llvm.SI.packf16(float %140, float %142)
>  %146 = bitcast i32 %145 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %144, float %146, float %144, float %146)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430202
>c0400100
>bf8c0070
>c0010107
>bf8c007f
>100c0a02
>c81c0700
>c81d0701
>100e0f06
>080e0d07
>c0010133
>bf8c007f
>d2820006
>041a0e02
>c81c0e00
>c81d0e01
>c0010130
>c0018155
>bf8c007f
>7e100203
>d2100008
>02021002
>08100f08
>c0018152
>bf8c007f
>7e120203
>d2100009
>02021202
>08120f09
>7e0e5509
>100e0f08
>d2060807
>02010107
>10101309
>d2060008
>22010108
>d00c0004
>02010108
>d2000008
>0011e480
>d2060008
>22010108
>7e101108
>d10a0004
>02010108
>d2000008
>0011e507
>c81c0a00
>c81d0a01
>c0018157
>bf8c007f
>10000e03
>10001100
>c0018154
>bf8c007f
>0a000003
>c0018156
>bf8c007f
>d00c0004
>02000700
>7e020203
>d2000000
>00120300
>d2060800
>02010100
>08020d00
>c0018132
>bf8c007f
>d2820001
>041a0203
>c0018177
>bf8c007f
>100c0e03
>080c0306
>c0018131
>bf8c007f
>d2820001
>04060c03
>100c0100
>080c0d00
>100c0c02
>d2820000
>041a0100
>c0010106
>bf8c007f
>100c0802
>c0010178
>bf8c007f
>100e0c02
>c0018176
>bf8c007f
>080e0e03
>100e0f00
>d2820006
>041c0506
>5e020306
>c0018105
>bf8c007f
>100c0603
>100e0c02
>c0018175
>bf8c007f
>080e0e03
>100e0f00
>d2820006
>041c0506
>c0018104
>bf8c007f
>10040403
>10060402
>c0000174
>bf8c007f
>08060600
>10000700
>d2820000
>04000502
>5e000d00
>f8001c0f
>01000100
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL OUT[3], GENERIC[20]
>DCL OUT[4], GENERIC[21]
>DCL OUT[5], GENERIC[22]
>DCL CONST[0..57]
>DCL TEMP[0..6], LOCAL
>  0: DP4 TEMP[0].x, IN[1], CONST[48]
>  1: DP4 TEMP[1].x, IN[1], CONST[49]
>  2: MOV TEMP[0].y, TEMP[1].xxxx
>  3: MAD TEMP[2].xyz, IN[2].xyzz, CONST[3].xxxx, IN[0].xyzz
>  4: MOV TEMP[2].w, IN[0].wwww
>  5: DP4 TEMP[1].x, TEMP[2], CONST[54]
>  6: DP4 TEMP[3].x, TEMP[2], CONST[55]
>  7: MOV TEMP[1].y, TEMP[3].xxxx
>  8: DP4 TEMP[3].x, TEMP[2], CONST[56]
>  9: MOV TEMP[1].z, TEMP[3].xxxx
> 10: MOV TEMP[1].w, CONST[0].yyyy
> 11: DP4 TEMP[3].x, TEMP[1], CONST[10]
> 12: MOV TEMP[2].z, TEMP[3].xxxx
> 13: DP4 TEMP[2].x, TEMP[1], CONST[8]
> 14: DP4 TEMP[3].x, TEMP[1], CONST[9]
> 15: MOV TEMP[2].y, TEMP[3].xxxx
> 16: DP4 TEMP[3].x, TEMP[1], CONST[11]
> 17: MOV TEMP[2].w, TEMP[3].xxxx
> 18: DP4 TEMP[3].x, TEMP[1], CONST[13]
> 19: MOV TEMP[4].z, TEMP[3].xxxx
> 20: MOV TEMP[1].xyz, TEMP[1].xyzx
> 21: MOV TEMP[5], TEMP[2]
> 22: MOV TEMP[6].xy, TEMP[2].xyxx
> 23: MOV TEMP[6].zw, TEMP[4].wwzw
> 24: MOV TEMP[1].w, TEMP[3].xxxx
> 25: MOV TEMP[3], TEMP[5]
> 26: MAD TEMP[4].x, TEMP[2].zzzz, CONST[0].zzzz, -TEMP[2].wwww
> 27: MOV TEMP[5].z, TEMP[4].xxxx
> 28: MOV TEMP[5].y, -TEMP[2].yyyy
> 29: MAD TEMP[5].xy, CONST[57].xyyy, TEMP[2].wwww, TEMP[5].xyyy
> 30: MOV OUT[2], TEMP[0]
> 31: MOV OUT[3], CONST[0].xxxx
> 32: MOV OUT[0], TEMP[5]
> 33: MOV OUT[1], TEMP[3]
> 34: MOV OUT[4], TEMP[6]
> 35: MOV OUT[5], TEMP[1]
> 36: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 12
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 32
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 33
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 34
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 35
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 36
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 37
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 38
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 39
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 40
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 41
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 42
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 43
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 44
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 45
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 46
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 47
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 52
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 53
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 54
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 55
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 192
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 193
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 194
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 195
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 196
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 197
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 198
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 199
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 216
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 217
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 218
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 219
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 220
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 221
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 222
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 223
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 224
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 225
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr float addrspace(2)* %10, i32 226
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = getelementptr float addrspace(2)* %10, i32 227
>  %98 = load float addrspace(2)* %97, !tbaa !0
>  %99 = getelementptr float addrspace(2)* %10, i32 228
>  %100 = load float addrspace(2)* %99, !tbaa !0
>  %101 = getelementptr float addrspace(2)* %10, i32 229
>  %102 = load float addrspace(2)* %101, !tbaa !0
>  %103 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %104 = load <16 x i8> addrspace(2)* %103, !tbaa !0
>  %105 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %104, i32 0, i32 %5)
>  %106 = extractelement <4 x float> %105, i32 0
>  %107 = extractelement <4 x float> %105, i32 1
>  %108 = extractelement <4 x float> %105, i32 2
>  %109 = extractelement <4 x float> %105, i32 3
>  %110 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %111 = load <16 x i8> addrspace(2)* %110, !tbaa !0
>  %112 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %111, i32 0, i32 %5)
>  %113 = extractelement <4 x float> %112, i32 0
>  %114 = extractelement <4 x float> %112, i32 1
>  %115 = extractelement <4 x float> %112, i32 2
>  %116 = extractelement <4 x float> %112, i32 3
>  %117 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %118 = load <16 x i8> addrspace(2)* %117, !tbaa !0
>  %119 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %118, i32 0, i32 %5)
>  %120 = extractelement <4 x float> %119, i32 0
>  %121 = extractelement <4 x float> %119, i32 1
>  %122 = extractelement <4 x float> %119, i32 2
>  %123 = fmul float %113, %60
>  %124 = fmul float %114, %62
>  %125 = fadd float %123, %124
>  %126 = fmul float %115, %64
>  %127 = fadd float %125, %126
>  %128 = fmul float %116, %66
>  %129 = fadd float %127, %128
>  %130 = fmul float %113, %68
>  %131 = fmul float %114, %70
>  %132 = fadd float %130, %131
>  %133 = fmul float %115, %72
>  %134 = fadd float %132, %133
>  %135 = fmul float %116, %74
>  %136 = fadd float %134, %135
>  %137 = fmul float %120, %18
>  %138 = fadd float %137, %106
>  %139 = fmul float %121, %18
>  %140 = fadd float %139, %107
>  %141 = fmul float %122, %18
>  %142 = fadd float %141, %108
>  %143 = fmul float %138, %76
>  %144 = fmul float %140, %78
>  %145 = fadd float %143, %144
>  %146 = fmul float %142, %80
>  %147 = fadd float %145, %146
>  %148 = fmul float %109, %82
>  %149 = fadd float %147, %148
>  %150 = fmul float %138, %84
>  %151 = fmul float %140, %86
>  %152 = fadd float %150, %151
>  %153 = fmul float %142, %88
>  %154 = fadd float %152, %153
>  %155 = fmul float %109, %90
>  %156 = fadd float %154, %155
>  %157 = fmul float %138, %92
>  %158 = fmul float %140, %94
>  %159 = fadd float %157, %158
>  %160 = fmul float %142, %96
>  %161 = fadd float %159, %160
>  %162 = fmul float %109, %98
>  %163 = fadd float %161, %162
>  %164 = fmul float %149, %36
>  %165 = fmul float %156, %38
>  %166 = fadd float %164, %165
>  %167 = fmul float %163, %40
>  %168 = fadd float %166, %167
>  %169 = fmul float %14, %42
>  %170 = fadd float %168, %169
>  %171 = fmul float %149, %20
>  %172 = fmul float %156, %22
>  %173 = fadd float %171, %172
>  %174 = fmul float %163, %24
>  %175 = fadd float %173, %174
>  %176 = fmul float %14, %26
>  %177 = fadd float %175, %176
>  %178 = fmul float %149, %28
>  %179 = fmul float %156, %30
>  %180 = fadd float %178, %179
>  %181 = fmul float %163, %32
>  %182 = fadd float %180, %181
>  %183 = fmul float %14, %34
>  %184 = fadd float %182, %183
>  %185 = fmul float %149, %44
>  %186 = fmul float %156, %46
>  %187 = fadd float %185, %186
>  %188 = fmul float %163, %48
>  %189 = fadd float %187, %188
>  %190 = fmul float %14, %50
>  %191 = fadd float %189, %190
>  %192 = fmul float %149, %52
>  %193 = fmul float %156, %54
>  %194 = fadd float %192, %193
>  %195 = fmul float %163, %56
>  %196 = fadd float %194, %195
>  %197 = fmul float %14, %58
>  %198 = fadd float %196, %197
>  %199 = fsub float -0.000000e+00, %191
>  %200 = fmul float %170, %16
>  %201 = fadd float %200, %199
>  %202 = fsub float -0.000000e+00, %184
>  %203 = fmul float %100, %191
>  %204 = fadd float %203, %177
>  %205 = fmul float %102, %191
>  %206 = fadd float %205, %202
>  %207 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %208 = load float addrspace(2)* addrspace(2)* %207, !tbaa !0
>  %209 = getelementptr float addrspace(2)* %208, i32 0
>  %210 = load float addrspace(2)* %209, !tbaa !0
>  %211 = fmul float %210, %177
>  %212 = getelementptr float addrspace(2)* %208, i32 1
>  %213 = load float addrspace(2)* %212, !tbaa !0
>  %214 = fmul float %213, %184
>  %215 = fadd float %211, %214
>  %216 = getelementptr float addrspace(2)* %208, i32 2
>  %217 = load float addrspace(2)* %216, !tbaa !0
>  %218 = fmul float %217, %170
>  %219 = fadd float %215, %218
>  %220 = getelementptr float addrspace(2)* %208, i32 3
>  %221 = load float addrspace(2)* %220, !tbaa !0
>  %222 = fmul float %221, %191
>  %223 = fadd float %219, %222
>  %224 = getelementptr float addrspace(2)* %208, i32 4
>  %225 = load float addrspace(2)* %224, !tbaa !0
>  %226 = fmul float %225, %177
>  %227 = getelementptr float addrspace(2)* %208, i32 5
>  %228 = load float addrspace(2)* %227, !tbaa !0
>  %229 = fmul float %228, %184
>  %230 = fadd float %226, %229
>  %231 = getelementptr float addrspace(2)* %208, i32 6
>  %232 = load float addrspace(2)* %231, !tbaa !0
>  %233 = fmul float %232, %170
>  %234 = fadd float %230, %233
>  %235 = getelementptr float addrspace(2)* %208, i32 7
>  %236 = load float addrspace(2)* %235, !tbaa !0
>  %237 = fmul float %236, %191
>  %238 = fadd float %234, %237
>  %239 = getelementptr float addrspace(2)* %208, i32 8
>  %240 = load float addrspace(2)* %239, !tbaa !0
>  %241 = fmul float %240, %177
>  %242 = getelementptr float addrspace(2)* %208, i32 9
>  %243 = load float addrspace(2)* %242, !tbaa !0
>  %244 = fmul float %243, %184
>  %245 = fadd float %241, %244
>  %246 = getelementptr float addrspace(2)* %208, i32 10
>  %247 = load float addrspace(2)* %246, !tbaa !0
>  %248 = fmul float %247, %170
>  %249 = fadd float %245, %248
>  %250 = getelementptr float addrspace(2)* %208, i32 11
>  %251 = load float addrspace(2)* %250, !tbaa !0
>  %252 = fmul float %251, %191
>  %253 = fadd float %249, %252
>  %254 = getelementptr float addrspace(2)* %208, i32 12
>  %255 = load float addrspace(2)* %254, !tbaa !0
>  %256 = fmul float %255, %177
>  %257 = getelementptr float addrspace(2)* %208, i32 13
>  %258 = load float addrspace(2)* %257, !tbaa !0
>  %259 = fmul float %258, %184
>  %260 = fadd float %256, %259
>  %261 = getelementptr float addrspace(2)* %208, i32 14
>  %262 = load float addrspace(2)* %261, !tbaa !0
>  %263 = fmul float %262, %170
>  %264 = fadd float %260, %263
>  %265 = getelementptr float addrspace(2)* %208, i32 15
>  %266 = load float addrspace(2)* %265, !tbaa !0
>  %267 = fmul float %266, %191
>  %268 = fadd float %264, %267
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %223, float %238, float %253, float %268)
>  %269 = getelementptr float addrspace(2)* %208, i32 16
>  %270 = load float addrspace(2)* %269, !tbaa !0
>  %271 = fmul float %270, %177
>  %272 = getelementptr float addrspace(2)* %208, i32 17
>  %273 = load float addrspace(2)* %272, !tbaa !0
>  %274 = fmul float %273, %184
>  %275 = fadd float %271, %274
>  %276 = getelementptr float addrspace(2)* %208, i32 18
>  %277 = load float addrspace(2)* %276, !tbaa !0
>  %278 = fmul float %277, %170
>  %279 = fadd float %275, %278
>  %280 = getelementptr float addrspace(2)* %208, i32 19
>  %281 = load float addrspace(2)* %280, !tbaa !0
>  %282 = fmul float %281, %191
>  %283 = fadd float %279, %282
>  %284 = getelementptr float addrspace(2)* %208, i32 20
>  %285 = load float addrspace(2)* %284, !tbaa !0
>  %286 = fmul float %285, %177
>  %287 = getelementptr float addrspace(2)* %208, i32 21
>  %288 = load float addrspace(2)* %287, !tbaa !0
>  %289 = fmul float %288, %184
>  %290 = fadd float %286, %289
>  %291 = getelementptr float addrspace(2)* %208, i32 22
>  %292 = load float addrspace(2)* %291, !tbaa !0
>  %293 = fmul float %292, %170
>  %294 = fadd float %290, %293
>  %295 = getelementptr float addrspace(2)* %208, i32 23
>  %296 = load float addrspace(2)* %295, !tbaa !0
>  %297 = fmul float %296, %191
>  %298 = fadd float %294, %297
>  %299 = getelementptr float addrspace(2)* %208, i32 24
>  %300 = load float addrspace(2)* %299, !tbaa !0
>  %301 = fmul float %300, %177
>  %302 = getelementptr float addrspace(2)* %208, i32 25
>  %303 = load float addrspace(2)* %302, !tbaa !0
>  %304 = fmul float %303, %184
>  %305 = fadd float %301, %304
>  %306 = getelementptr float addrspace(2)* %208, i32 26
>  %307 = load float addrspace(2)* %306, !tbaa !0
>  %308 = fmul float %307, %170
>  %309 = fadd float %305, %308
>  %310 = getelementptr float addrspace(2)* %208, i32 27
>  %311 = load float addrspace(2)* %310, !tbaa !0
>  %312 = fmul float %311, %191
>  %313 = fadd float %309, %312
>  %314 = getelementptr float addrspace(2)* %208, i32 28
>  %315 = load float addrspace(2)* %314, !tbaa !0
>  %316 = fmul float %315, %177
>  %317 = getelementptr float addrspace(2)* %208, i32 29
>  %318 = load float addrspace(2)* %317, !tbaa !0
>  %319 = fmul float %318, %184
>  %320 = fadd float %316, %319
>  %321 = getelementptr float addrspace(2)* %208, i32 30
>  %322 = load float addrspace(2)* %321, !tbaa !0
>  %323 = fmul float %322, %170
>  %324 = fadd float %320, %323
>  %325 = getelementptr float addrspace(2)* %208, i32 31
>  %326 = load float addrspace(2)* %325, !tbaa !0
>  %327 = fmul float %326, %191
>  %328 = fadd float %324, %327
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %283, float %298, float %313, float %328)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %129, float %136, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %12, float %12, float %12, float %12)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %177, float %184, float %198, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %149, float %156, float %163, float %198)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %204, float %206, float %201, float %191)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840700
>bf8c007f
>e00c2000
>80020300
>c0840708
>bf8c0070
>e00c2000
>80020900
>c0410100
>bf8c0070
>c002030c
>bf8c007f
>d2820007
>040c0909
>d2820008
>0410090a
>c00283d9
>bf8c007f
>10021005
>c00283d8
>bf8c007f
>d2820001
>04040b07
>d2820009
>0414090b
>c00203da
>bf8c007f
>d2820001
>04040909
>c00203db
>bf8c007f
>d2820001
>04040906
>c00203dd
>bf8c007f
>10041004
>c00203dc
>bf8c007f
>d2820002
>04080907
>c00203de
>bf8c007f
>d2820002
>04080909
>c00203df
>bf8c007f
>d2820002
>04080906
>c0020321
>bf8c007f
>10140404
>c0020320
>bf8c007f
>d282000a
>04280901
>c00203e1
>bf8c007f
>10101004
>c00203e0
>bf8c007f
>d2820007
>04200907
>c00203e2
>bf8c007f
>d2820007
>041c0909
>c00203e3
>bf8c007f
>d2820003
>041c0906
>c0020322
>bf8c007f
>d2820004
>04280903
>c0020301
>c0028323
>bf8c007f
>7e0a0205
>d2820004
>04120a04
>c0028325
>bf8c007f
>100a0405
>c0028324
>bf8c007f
>d2820005
>04140b01
>c0028326
>bf8c007f
>d2820005
>04140b03
>c0028327
>bf8c007f
>7e0c0205
>d2820005
>04160c04
>c0400102
>bf8c007f
>c002810d
>bf8c007f
>100c0a05
>c002810c
>bf8c007f
>d2820007
>041a0805
>c0028329
>bf8c007f
>100c0405
>c0028328
>bf8c007f
>d2820006
>04180b01
>c002832a
>bf8c007f
>d2820006
>04180b03
>c002832b
>bf8c007f
>7e100205
>d2820006
>041a1004
>c002810e
>bf8c007f
>d2820008
>041e0c05
>c002832d
>bf8c007f
>100e0405
>c002832c
>bf8c007f
>d2820007
>041c0b01
>c002832e
>bf8c007f
>d2820007
>041c0b03
>c002832f
>bf8c007f
>7e120205
>d2820007
>041e1204
>c002810f
>bf8c007f
>d2820008
>04220e05
>c0028109
>bf8c007f
>10120a05
>c0028108
>bf8c007f
>d2820009
>04260805
>c002810a
>bf8c007f
>d2820009
>04260c05
>c002810b
>bf8c007f
>d2820009
>04260e05
>c0028105
>bf8c007f
>10140a05
>c0028104
>bf8c007f
>d282000a
>042a0805
>c0028106
>bf8c007f
>d282000a
>042a0c05
>c0028107
>bf8c007f
>d282000a
>042a0e05
>c0028101
>bf8c007f
>10160a05
>c0028100
>bf8c007f
>d282000b
>042e0805
>c0028102
>bf8c007f
>d282000b
>042e0c05
>c0028103
>bf8c007f
>d282000b
>042e0e05
>f80000ef
>08090a0b
>c002811d
>bf8c000f
>10100a05
>c002811c
>bf8c007f
>d2820008
>04220805
>c002811e
>bf8c007f
>d2820008
>04220c05
>c002811f
>bf8c007f
>d2820008
>04220e05
>c0028119
>bf8c007f
>10120a05
>c0028118
>bf8c007f
>d2820009
>04260805
>c002811a
>bf8c007f
>d2820009
>04260c05
>c002811b
>bf8c007f
>d2820009
>04260e05
>c0028115
>bf8c007f
>10140a05
>c0028114
>bf8c007f
>d282000a
>042a0805
>c0028116
>bf8c007f
>d282000a
>042a0c05
>c0028117
>bf8c007f
>d282000a
>042a0e05
>c0028111
>bf8c007f
>10160a05
>c0028110
>bf8c007f
>d282000b
>042e0805
>c0028112
>bf8c007f
>d282000b
>042e0c05
>c0000113
>bf8c007f
>d282000b
>042e0e00
>f80000ff
>08090a0b
>c0840704
>bf8c000f
>e00c2000
>80020800
>c00003c5
>bf8c0070
>10001200
>c00003c4
>bf8c007f
>d2820000
>04000108
>c00003c6
>bf8c007f
>d2820000
>0400010a
>c00003c7
>bf8c007f
>d282000c
>0400010b
>c00003c1
>bf8c007f
>10001200
>c00003c0
>bf8c007f
>d2820000
>04000108
>c00003c2
>bf8c007f
>d2820000
>0400010a
>c00003c3
>bf8c007f
>d2820008
>0400010b
>7e000280
>f800020f
>00000c08
>c0000300
>bf8c000f
>7e100200
>7e120200
>7e140200
>7e160200
>f800021f
>0b0a0908
>c0000335
>bf8c000f
>10100400
>c0000334
>bf8c007f
>d2820008
>04200101
>c0000336
>bf8c007f
>d2820008
>04200103
>c0000337
>bf8c007f
>7e120200
>d2820008
>04221204
>f800022f
>00080504
>f800023f
>08030201
>c00003e4
>bf8c000f
>d2820000
>04120e00
>c0000302
>bf8c007f
>10020c00
>08020f01
>c00003e5
>bf8c007f
>10040e00
>08040b02
>f80008cf
>07010200
>bf810000
>Could not load program cache file glbaseshaders.cfg
>Could not find base GL shader cache file
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 96 ps-combo 0
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 96 ps-combo 1
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 96 ps-combo 2
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 96 ps-combo 3
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 100 ps-combo 0
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 100 ps-combo 1
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 100 ps-combo 2
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 100 ps-combo 3
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 104 ps-combo 0
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 104 ps-combo 1
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 104 ps-combo 2
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 104 ps-combo 3
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file teeth_flashlight_ps20b ps-index 0 ps-combo 0
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file teeth_flashlight_ps20b ps-index 0 ps-combo 1
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file teeth_flashlight_ps20b ps-index 0 ps-combo 2
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file teeth_flashlight_ps20b ps-index 0 ps-combo 3
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 4 ps-combo 0
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 4 ps-combo 1
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 4 ps-combo 2
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 4 ps-combo 3
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 8 ps-combo 0
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid maskLoaded program cache file "glshaders.cfg", total keyvalues: 257, total successfully linked: 257
>Precache: Took 21106 ms, Vertex 911, Pixel 1241
>ConVarRef mat_dxlevel doesn't point to an existing ConVar
>Game.so loaded for "Half-Life 2"
>Setting breakpad minidump AppID = 220
>Fontconfig error: "/etc/fonts/conf.d/10-scale-bitmap-fonts.conf", line 70: non-double matrix element
>Fontconfig error: "/etc/fonts/conf.d/10-scale-bitmap-fonts.conf", line 70: non-double matrix element
>Fontconfig warning: "/etc/fonts/conf.d/10-scale-bitmap-fonts.conf", line 78: saw unknown, expected number
> (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 8 ps-combo 1
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 8 ps-combo 2
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 8 ps-combo 3
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 40 ps-combo 0
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 40 ps-combo 1
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 40 ps-combo 2
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 40 ps-combo 3
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 0 ps-combo 0
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 0 ps-combo 1
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 0 ps-combo 2
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 0 ps-combo 3
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 24 ps-combo 0
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 24 ps-combo 1
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 24 ps-combo 2
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file flashlight_ps20b ps-index 24 ps-combo 3
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file eyes_flashlight_ps20b ps-index 0 ps-combo 0
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file eyes_flashlight_ps20b ps-index 0 ps-combo 1
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file eyes_flashlight_ps20b ps-index 0 ps-combo 2
>IDirect3DDevice9::CreatePixelShader: shaderapi's centroid mask (0x00000000) differs from mask derived from shader name (0x0000000C) for shader ps-file eyes_flashlight_ps20b ps-index 0 ps-combo 3
>Unable to remove /home/behem0th/Steam/SteamApps/common/Half-Life 2/ep2/gamestats.log!
>Unable to remove /home/behem0th/Steam/SteamApps/common/Half-Life 2/ep2/gamestats.log!
>maxplayers set to 1
>Error: Material "debug/debugluxels" uses unknown shader "DebugLuxels"
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>DCL SAMP[0]
>  0: TEX OUT[0], IN[0], SAMP[0], 3D
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %21 = load <32 x i8> addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %23 = load <16 x i8> addrspace(2)* %22, !tbaa !0
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %9)
>  %27 = bitcast float %24 to i32
>  %28 = bitcast float %25 to i32
>  %29 = bitcast float %26 to i32
>  %30 = insertelement <4 x i32> undef, i32 %27, i32 0
>  %31 = insertelement <4 x i32> %30, i32 %28, i32 1
>  %32 = insertelement <4 x i32> %31, i32 %29, i32 2
>  %33 = insertelement <4 x i32> %32, i32 undef, i32 3
>  %34 = call <4 x float> @llvm.SI.sample.v4i32(<4 x i32> %33, <32 x i8> %21, <16 x i8> %23, i32 3)
>  %35 = extractelement <4 x float> %34, i32 0
>  %36 = extractelement <4 x float> %34, i32 1
>  %37 = extractelement <4 x float> %34, i32 2
>  %38 = extractelement <4 x float> %34, i32 3
>  %39 = call i32 @llvm.SI.packf16(float %35, float %36)
>  %40 = bitcast i32 %39 to float
>  %41 = call i32 @llvm.SI.packf16(float %37, float %38)
>  %42 = bitcast i32 %41 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %40, float %42, float %40, float %42)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c8100200
>c8110201
>c0800300
>c0c20500
>bf8c007f
>f0800f00
>00010002
>bf8c0770
>5e080702
>5e000300
>f8001c0f
>04000400
>bf810000
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>DCL SAMP[0]
>  0: TEX OUT[0], IN[0], SAMP[0], 3D
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %21 = load <32 x i8> addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %23 = load <16 x i8> addrspace(2)* %22, !tbaa !0
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %9)
>  %27 = bitcast float %24 to i32
>  %28 = bitcast float %25 to i32
>  %29 = bitcast float %26 to i32
>  %30 = insertelement <4 x i32> undef, i32 %27, i32 0
>  %31 = insertelement <4 x i32> %30, i32 %28, i32 1
>  %32 = insertelement <4 x i32> %31, i32 %29, i32 2
>  %33 = insertelement <4 x i32> %32, i32 undef, i32 3
>  %34 = call <4 x float> @llvm.SI.sample.v4i32(<4 x i32> %33, <32 x i8> %21, <16 x i8> %23, i32 3)
>  %35 = extractelement <4 x float> %34, i32 0
>  %36 = extractelement <4 x float> %34, i32 1
>  %37 = extractelement <4 x float> %34, i32 2
>  %38 = extractelement <4 x float> %34, i32 3
>  %39 = call i32 @llvm.SI.packf16(float %35, float %36)
>  %40 = bitcast i32 %39 to float
>  %41 = call i32 @llvm.SI.packf16(float %37, float %38)
>  %42 = bitcast i32 %41 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %40, float %42, float %40, float %42)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c8100200
>c8110201
>c0800300
>c0c20500
>bf8c007f
>f0800f00
>00010002
>bf8c0770
>5e080702
>5e000300
>f8001c0f
>04000400
>bf810000
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL TEMP[0], LOCAL
>  0: MOV TEMP[0].xyz, IN[0].xyzz
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 3D
>  2: MOV OUT[0], TEMP[0]
>  3: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %21 = load <32 x i8> addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %23 = load <16 x i8> addrspace(2)* %22, !tbaa !0
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %27 = bitcast float %24 to i32
>  %28 = bitcast float %25 to i32
>  %29 = bitcast float %26 to i32
>  %30 = insertelement <4 x i32> undef, i32 %27, i32 0
>  %31 = insertelement <4 x i32> %30, i32 %28, i32 1
>  %32 = insertelement <4 x i32> %31, i32 %29, i32 2
>  %33 = insertelement <4 x i32> %32, i32 undef, i32 3
>  %34 = call <4 x float> @llvm.SI.sample.v4i32(<4 x i32> %33, <32 x i8> %21, <16 x i8> %23, i32 3)
>  %35 = extractelement <4 x float> %34, i32 0
>  %36 = extractelement <4 x float> %34, i32 1
>  %37 = extractelement <4 x float> %34, i32 2
>  %38 = extractelement <4 x float> %34, i32 3
>  %39 = call i32 @llvm.SI.packf16(float %35, float %36)
>  %40 = bitcast i32 %39 to float
>  %41 = call i32 @llvm.SI.packf16(float %37, float %38)
>  %42 = bitcast i32 %41 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %40, float %42, float %40, float %42)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c8100200
>c8110201
>c0800300
>c0c20500
>bf8c007f
>f0800f00
>00010002
>bf8c0770
>5e080702
>5e000300
>f8001c0f
>04000400
>bf810000
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[19]
>DCL CONST[0..3]
>DCL TEMP[0], LOCAL
>IMM[0] FLT32 {    0.0000,     0.0000,     0.0000,     0.0000}
>  0: MUL TEMP[0], CONST[0], IN[0].xxxx
>  1: MAD TEMP[0], CONST[1], IN[0].yyyy, TEMP[0]
>  2: MAD TEMP[0], CONST[2], IN[0].zzzz, TEMP[0]
>  3: MAD TEMP[0], CONST[3], IN[0].wwww, TEMP[0]
>  4: MOV OUT[1], IMM[0].xxxx
>  5: MOV OUT[0], TEMP[0]
>  6: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 3
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 4
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 5
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 6
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 7
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 8
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 9
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 10
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 11
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 12
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 13
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 14
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 15
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %44 = load <16 x i8> addrspace(2)* %43, !tbaa !0
>  %45 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %44, i32 0, i32 %5)
>  %46 = extractelement <4 x float> %45, i32 0
>  %47 = extractelement <4 x float> %45, i32 1
>  %48 = extractelement <4 x float> %45, i32 2
>  %49 = extractelement <4 x float> %45, i32 3
>  %50 = fmul float %12, %46
>  %51 = fmul float %14, %46
>  %52 = fmul float %16, %46
>  %53 = fmul float %18, %46
>  %54 = fmul float %20, %47
>  %55 = fadd float %54, %50
>  %56 = fmul float %22, %47
>  %57 = fadd float %56, %51
>  %58 = fmul float %24, %47
>  %59 = fadd float %58, %52
>  %60 = fmul float %26, %47
>  %61 = fadd float %60, %53
>  %62 = fmul float %28, %48
>  %63 = fadd float %62, %55
>  %64 = fmul float %30, %48
>  %65 = fadd float %64, %57
>  %66 = fmul float %32, %48
>  %67 = fadd float %66, %59
>  %68 = fmul float %34, %48
>  %69 = fadd float %68, %61
>  %70 = fmul float %36, %49
>  %71 = fadd float %70, %63
>  %72 = fmul float %38, %49
>  %73 = fadd float %72, %65
>  %74 = fmul float %40, %49
>  %75 = fadd float %74, %67
>  %76 = fmul float %42, %49
>  %77 = fadd float %76, %69
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %71, float %73, float %75, float %77)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>7e020280
>f800020f
>01010101
>c0820700
>bf8c000f
>e00c2000
>80010000
>c0400100
>bf8c0070
>c0010103
>bf8c007f
>10080002
>c0010107
>bf8c007f
>d2820004
>04120202
>c001010b
>bf8c007f
>d2820004
>04120402
>c001010f
>bf8c007f
>d2820004
>04120602
>c0010102
>bf8c007f
>100a0002
>c0010106
>bf8c007f
>d2820005
>04160202
>c001010a
>bf8c007f
>d2820005
>04160402
>c001010e
>bf8c007f
>d2820005
>04160602
>c0010101
>bf8c007f
>100c0002
>c0010105
>bf8c007f
>d2820006
>041a0202
>c0010109
>bf8c007f
>d2820006
>041a0402
>c001010d
>bf8c007f
>d2820006
>041a0602
>c0010100
>bf8c007f
>100e0002
>c0010104
>bf8c007f
>d2820007
>041e0202
>c0010108
>bf8c007f
>d2820007
>041e0402
>c000010c
>bf8c007f
>d2820000
>041e0600
>f80008cf
>04050600
>bf810000
>Error: Material "___fillrate_0" uses unknown shader "FillRate"
>Error: Material "___debugnormalmap_1" uses unknown shader "DebugNormalMap"
>Error: Material "___debugdrawenvmapmask_2" uses unknown shader "DebugDrawEnvmapMask"
>Error: Material "___debugdepth_3" uses unknown shader "DebugDepth"
>Error: Material "___debugdepth_4" uses unknown shader "DebugDepth"
>Steam config directory: /home/behem0th/Steam/SteamApps/common/Half-Life 2/platform/config
>CClientSteamContext logged on = 1
>Hud element 'CMapOverview' doesn't have an entry 'overview' in scripts/HudLayout.res
>FRAG
>  0: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  call void @llvm.SI.export(i32 0, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  ret void
>}
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, i32, i32, i32, i32)
>
>attributes #0 = { "ShaderType"="0" }
>SI CODE:
>7e000280
>f8001800
>00000000
>bf810000
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>DCL OUT[1], POSITION
>DCL SAMP[0]
>IMM[0] FLT32 {    0.0000,     1.0000,     0.0000,     0.0000}
>  0: MOV OUT[0], IMM[0].xxxy
>  1: TEX OUT[1].z, IN[0], SAMP[0], 2D
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %21 = load <32 x i8> addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %23 = load <16 x i8> addrspace(2)* %22, !tbaa !0
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %9)
>  %26 = bitcast float %24 to i32
>  %27 = bitcast float %25 to i32
>  %28 = insertelement <2 x i32> undef, i32 %26, i32 0
>  %29 = insertelement <2 x i32> %28, i32 %27, i32 1
>  %30 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %29, <32 x i8> %21, <16 x i8> %23, i32 2)
>  %31 = extractelement <4 x float> %30, i32 2
>  %32 = call i32 @llvm.SI.packf16(float 0.000000e+00, float 0.000000e+00)
>  %33 = bitcast i32 %32 to float
>  %34 = call i32 @llvm.SI.packf16(float 0.000000e+00, float 1.000000e+00)
>  %35 = bitcast i32 %34 to float
>  call void @llvm.SI.export(i32 1, i32 0, i32 0, i32 8, i32 0, float %31, float %31, float %31, float %31)
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %33, float %35, float %33, float %35)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0800300
>c0c20500
>bf8c007f
>f0800400
>00010002
>bf8c0770
>f8000081
>00000000
>bf8c070f
>d25e0000
>0201e480
>d25e0001
>02010080
>f8001c0f
>00010001
>bf810000
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>DCL OUT[1], POSITION
>DCL SAMP[0]
>IMM[0] FLT32 {    0.0000,     1.0000,     0.0000,     0.0000}
>  0: MOV OUT[0], IMM[0].xxxy
>  1: TEX OUT[1].z, IN[0], SAMP[0], 2D
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %21 = load <32 x i8> addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %23 = load <16 x i8> addrspace(2)* %22, !tbaa !0
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %9)
>  %26 = bitcast float %24 to i32
>  %27 = bitcast float %25 to i32
>  %28 = insertelement <2 x i32> undef, i32 %26, i32 0
>  %29 = insertelement <2 x i32> %28, i32 %27, i32 1
>  %30 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %29, <32 x i8> %21, <16 x i8> %23, i32 2)
>  %31 = extractelement <4 x float> %30, i32 2
>  call void @llvm.SI.export(i32 1, i32 0, i32 0, i32 8, i32 0, float %31, float %31, float %31, float %31)
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0800300
>c0c20500
>bf8c007f
>f0800400
>00010002
>bf8c0770
>f8000081
>00000000
>bf8c070f
>7e0002f2
>7e020280
>f800180f
>00010101
>bf810000
>JOY_AXIS_X:  mapped to Turn (absolute)
>JOY_AXIS_Y:  mapped to Look (absolute)
>JOY_AXIS_Z:  unmapped
>JOY_AXIS_R:  mapped to Forward (absolute)
>JOY_AXIS_U:  mapped to Side (absolute)
>JOY_AXIS_V:  unmapped
>Advanced Joystick settings initialized
>Can't use cheat cvar cam_snapto in multiplayer, unless the server has sv_cheats set to 1.
>Can't use cheat cvar cam_ideallag in multiplayer, unless the server has sv_cheats set to 1.
>Can't use cheat cvar cam_idealdelta in multiplayer, unless the server has sv_cheats set to 1.
>Can't use cheat cvar cam_idealyaw in multiplayer, unless the server has sv_cheats set to 1.
>Can't use cheat cvar cam_idealpitch in multiplayer, unless the server has sv_cheats set to 1.
>Can't use cheat cvar cam_idealdist in multiplayer, unless the server has sv_cheats set to 1.
>Can't use cheat cvar cam_idealdistright in multiplayer, unless the server has sv_cheats set to 1.
>Can't use cheat cvar cam_idealdistup in multiplayer, unless the server has sv_cheats set to 1.
>Can't use cheat cvar cam_collision in multiplayer, unless the server has sv_cheats set to 1.
>Can't use cheat cvar c_maxpitch in multiplayer, unless the server has sv_cheats set to 1.
>Can't use cheat cvar c_minpitch in multiplayer, unless the server has sv_cheats set to 1.
>Can't use cheat cvar c_maxyaw in multiplayer, unless the server has sv_cheats set to 1.
>Can't use cheat cvar c_minyaw in multiplayer, unless the server has sv_cheats set to 1.
>Can't use cheat cvar c_maxdistance in multiplayer, unless the server has sv_cheats set to 1.
>Can't use cheat cvar c_mindistance in multiplayer, unless the server has sv_cheats set to 1.
>Can't use cheat cvar c_orthowidth in multiplayer, unless the server has sv_cheats set to 1.
>Can't use cheat cvar c_orthoheight in multiplayer, unless the server has sv_cheats set to 1.
>Unknown command "cl_thirdperson"
>Unknown command "sv_backspeed"
>Did not detect any valid joysticks.
>Not playing a local game.
>
>Console initialized.
>--- Missing Vgui material vgui/servers/icon_replay
>--- Missing Vgui material vgui/servers/icon_replay_column
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL IN[2], GENERIC[21], PERSPECTIVE
>DCL IN[3], GENERIC[22], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL CONST[0..30]
>DCL TEMP[0..5], LOCAL
>DCL TEMP[6], ARRAY(1), LOCAL
>IMM[0] FLT32 {    0.0000,     1.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MAD TEMP[1].x, CONST[12].xxxx, CONST[21].yyyy, -IN[3].zzzz
>  3: MAD TEMP[2].x, CONST[12].xxxx, CONST[20].zzzz, -IN[3].zzzz
>  4: RCP TEMP[3].x, TEMP[2].xxxx
>  5: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
>  6: MUL TEMP[3].x, TEMP[1].xxxx, TEMP[3].xxxx
>  7: MOV_SAT TEMP[3].x, TEMP[3].xxxx
>  8: SGE TEMP[2].x, -TEMP[2].xxxx, IMM[0].xxxx
>  9: F2I TEMP[2].x, -TEMP[2]
> 10: UIF TEMP[2].xxxx :0
> 11:   MOV TEMP[2].x, IMM[0].yyyy
> 12: ELSE :0
> 13:   MOV TEMP[2].x, TEMP[3].xxxx
> 14: ENDIF
> 15: MUL TEMP[3].x, IN[2].zzzz, CONST[21].wwww
> 16: MAD TEMP[2].x, TEMP[3].xxxx, TEMP[2].xxxx, -CONST[21].xxxx
> 17: MIN TEMP[2].x, TEMP[2].xxxx, CONST[21].zzzz
> 18: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 19: MAD TEMP[3].x, TEMP[2].xxxx, -TEMP[2].xxxx, TEMP[2].xxxx
> 20: MUL TEMP[3].x, TEMP[3].xxxx, CONST[12].xxxx
> 21: MAD TEMP[3].x, TEMP[2].xxxx, TEMP[2].xxxx, TEMP[3].xxxx
> 22: MUL TEMP[4].x, TEMP[0].wwww, CONST[1].wwww
> 23: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[1].xyzz
> 24: MAD TEMP[5].x, TEMP[4].xxxx, IN[1].wwww, -TEMP[4].xxxx
> 25: MUL TEMP[0].xyz, TEMP[0].xyzz, IN[1].xyzz
> 26: MAD TEMP[4].x, CONST[12].wwww, TEMP[5].xxxx, TEMP[4].xxxx
> 27: MAD TEMP[1].xyz, TEMP[0].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 28: ADD TEMP[2].x, TEMP[2].xxxx, -TEMP[4].xxxx
> 29: MAD TEMP[2].x, CONST[12].zzzz, TEMP[2].xxxx, TEMP[4].xxxx
> 30: MUL TEMP[1].xyz, TEMP[3].xxxx, TEMP[1].xyzz
> 31: MAD TEMP[3].x, IN[2].zzzz, CONST[29].wwww, -TEMP[2].xxxx
> 32: MAD TEMP[0].xyz, TEMP[0].xyzz, CONST[30].xxxx, TEMP[1].xyzz
> 33: MAD TEMP[1].x, CONST[12].yyyy, TEMP[3].xxxx, TEMP[2].xxxx
> 34: MOV TEMP[0].w, TEMP[1].xxxx
> 35: MOV TEMP[6], TEMP[0]
> 36: MOV OUT[0], TEMP[6]
> 37: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 4
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 5
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 6
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 7
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 48
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 49
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 50
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 51
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 82
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 84
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 85
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr float addrspace(2)* %21, i32 86
>  %45 = load float addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr float addrspace(2)* %21, i32 87
>  %47 = load float addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr float addrspace(2)* %21, i32 116
>  %49 = load float addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr float addrspace(2)* %21, i32 117
>  %51 = load float addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr float addrspace(2)* %21, i32 118
>  %53 = load float addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr float addrspace(2)* %21, i32 119
>  %55 = load float addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr float addrspace(2)* %21, i32 120
>  %57 = load float addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %59 = load <32 x i8> addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %61 = load <16 x i8> addrspace(2)* %60, !tbaa !0
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %64 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %65 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %66 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %3, <2 x i32> %5)
>  %67 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %3, <2 x i32> %5)
>  %68 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %3, <2 x i32> %5)
>  %69 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %3, <2 x i32> %5)
>  %70 = bitcast float %62 to i32
>  %71 = bitcast float %63 to i32
>  %72 = insertelement <2 x i32> undef, i32 %70, i32 0
>  %73 = insertelement <2 x i32> %72, i32 %71, i32 1
>  %74 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %73, <32 x i8> %59, <16 x i8> %61, i32 2)
>  %75 = extractelement <4 x float> %74, i32 0
>  %76 = extractelement <4 x float> %74, i32 1
>  %77 = extractelement <4 x float> %74, i32 2
>  %78 = extractelement <4 x float> %74, i32 3
>  %79 = fsub float -0.000000e+00, %69
>  %80 = fmul float %31, %43
>  %81 = fadd float %80, %79
>  %82 = fsub float -0.000000e+00, %69
>  %83 = fmul float %31, %39
>  %84 = fadd float %83, %82
>  %85 = fdiv float 1.000000e+00, %84
>  %86 = fmul float %84, %84
>  %87 = fmul float %81, %85
>  %88 = call float @llvm.AMDIL.clamp.(float %87, float 0.000000e+00, float 1.000000e+00)
>  %89 = fsub float -0.000000e+00, %86
>  %90 = fcmp uge float %89, 0.000000e+00
>  %91 = select i1 %90, float 1.000000e+00, float 0.000000e+00
>  %92 = fsub float -0.000000e+00, %91
>  %93 = fptosi float %92 to i32
>  %94 = bitcast i32 %93 to float
>  %95 = bitcast float %94 to i32
>  %96 = icmp ne i32 %95, 0
>  %. = select i1 %96, float 1.000000e+00, float %88
>  %97 = fmul float %68, %47
>  %98 = fsub float -0.000000e+00, %41
>  %99 = fmul float %97, %.
>  %100 = fadd float %99, %98
>  %101 = fcmp uge float %100, %45
>  %102 = select i1 %101, float %45, float %100
>  %103 = call float @llvm.AMDIL.clamp.(float %102, float 0.000000e+00, float 1.000000e+00)
>  %104 = fsub float -0.000000e+00, %103
>  %105 = fmul float %103, %104
>  %106 = fadd float %105, %103
>  %107 = fmul float %106, %31
>  %108 = fmul float %103, %103
>  %109 = fadd float %108, %107
>  %110 = fmul float %78, %29
>  %111 = fmul float %75, %23
>  %112 = fmul float %76, %25
>  %113 = fmul float %77, %27
>  %114 = fsub float -0.000000e+00, %110
>  %115 = fmul float %110, %67
>  %116 = fadd float %115, %114
>  %117 = fmul float %111, %64
>  %118 = fmul float %112, %65
>  %119 = fmul float %113, %66
>  %120 = fmul float %37, %116
>  %121 = fadd float %120, %110
>  %122 = fsub float -0.000000e+00, %57
>  %123 = fmul float %117, %122
>  %124 = fadd float %123, %49
>  %125 = fsub float -0.000000e+00, %57
>  %126 = fmul float %118, %125
>  %127 = fadd float %126, %51
>  %128 = fsub float -0.000000e+00, %57
>  %129 = fmul float %119, %128
>  %130 = fadd float %129, %53
>  %131 = fsub float -0.000000e+00, %121
>  %132 = fadd float %103, %131
>  %133 = fmul float %35, %132
>  %134 = fadd float %133, %121
>  %135 = fmul float %109, %124
>  %136 = fmul float %109, %127
>  %137 = fmul float %109, %130
>  %138 = fsub float -0.000000e+00, %134
>  %139 = fmul float %68, %55
>  %140 = fadd float %139, %138
>  %141 = fmul float %117, %57
>  %142 = fadd float %141, %135
>  %143 = fmul float %118, %57
>  %144 = fadd float %143, %136
>  %145 = fmul float %119, %57
>  %146 = fadd float %145, %137
>  %147 = fmul float %33, %140
>  %148 = fadd float %147, %134
>  %149 = call i32 @llvm.SI.packf16(float %142, float %144)
>  %150 = bitcast i32 %149 to float
>  %151 = call i32 @llvm.SI.packf16(float %146, float %148)
>  %152 = bitcast i32 %151 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %150, float %152, float %150, float %152)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430202
>c0400100
>bf8c0070
>c0010107
>bf8c007f
>100c0a02
>c81c0700
>c81d0701
>100e0f06
>080e0d07
>c0010133
>bf8c007f
>d2820006
>041a0e02
>c81c0e00
>c81d0e01
>c0010130
>c0018155
>bf8c007f
>7e100203
>d2100008
>02021002
>08100f08
>c0018152
>bf8c007f
>7e120203
>d2100009
>02021202
>08120f09
>7e0e5509
>100e0f08
>d2060807
>02010107
>10101309
>d2060008
>22010108
>d00c0004
>02010108
>d2000008
>0011e480
>d2060008
>22010108
>7e101108
>d10a0004
>02010108
>d2000008
>0011e507
>c81c0a00
>c81d0a01
>c0018157
>bf8c007f
>10120e03
>10101109
>c0018154
>bf8c007f
>0a101003
>c0018156
>bf8c007f
>d00c0004
>02000708
>7e120203
>d2000008
>00121308
>d2060808
>02010108
>08120d08
>c0018132
>bf8c007f
>d2820006
>041a1203
>c0018177
>bf8c007f
>100e0e03
>080e0d07
>c0018131
>bf8c007f
>d2820007
>041a0e03
>100c1108
>080c0d08
>100c0c02
>d2820006
>041a1108
>c0010106
>bf8c007f
>10100802
>c8240600
>c8250601
>10101308
>c0010178
>bf8c007f
>10121002
>c0018176
>bf8c007f
>08121203
>10121306
>d2820008
>04240508
>5e0e0f08
>c0018105
>bf8c007f
>10100603
>c8240500
>c8250501
>10101308
>10121002
>c0018175
>bf8c007f
>08121203
>10121306
>d2820008
>04240508
>c0018104
>bf8c007f
>10040403
>c80c0400
>c80d0401
>10000702
>10020002
>c0000174
>bf8c007f
>08020200
>10020306
>d2820000
>04040500
>5e001100
>f8001c0f
>07000700
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL OUT[3], GENERIC[20]
>DCL OUT[4], GENERIC[21]
>DCL OUT[5], GENERIC[22]
>DCL CONST[0..57]
>DCL TEMP[0..7], LOCAL
>IMM[0] FLT32 {    2.2000,     0.0000,     0.0000,     0.0000}
>  0: LG2 TEMP[0].x, IN[1].xxxx
>  1: LG2 TEMP[1].x, IN[1].yyyy
>  2: MOV TEMP[0].y, TEMP[1].xxxx
>  3: LG2 TEMP[1].x, IN[1].zzzz
>  4: MOV TEMP[0].z, TEMP[1].xxxx
>  5: MUL TEMP[0].xyz, TEMP[0].xyzz, IMM[0].xxxx
>  6: EX2 TEMP[1].x, TEMP[0].xxxx
>  7: EX2 TEMP[2].x, TEMP[0].yyyy
>  8: MOV TEMP[1].y, TEMP[2].xxxx
>  9: EX2 TEMP[2].x, TEMP[0].zzzz
> 10: MOV TEMP[1].z, TEMP[2].xxxx
> 11: DP4 TEMP[2].x, IN[2], CONST[48]
> 12: DP4 TEMP[3].x, IN[2], CONST[49]
> 13: MOV TEMP[2].y, TEMP[3].xxxx
> 14: MAD TEMP[0].xyz, IN[3].xyzz, CONST[3].xxxx, IN[0].xyzz
> 15: MOV TEMP[0].w, IN[0].wwww
> 16: DP4 TEMP[3].x, TEMP[0], CONST[54]
> 17: DP4 TEMP[4].x, TEMP[0], CONST[55]
> 18: MOV TEMP[3].y, TEMP[4].xxxx
> 19: DP4 TEMP[4].x, TEMP[0], CONST[56]
> 20: MOV TEMP[3].z, TEMP[4].xxxx
> 21: MOV TEMP[3].w, CONST[0].yyyy
> 22: DP4 TEMP[4].x, TEMP[3], CONST[10]
> 23: MOV TEMP[0].z, TEMP[4].xxxx
> 24: DP4 TEMP[0].x, TEMP[3], CONST[8]
> 25: DP4 TEMP[4].x, TEMP[3], CONST[9]
> 26: MOV TEMP[0].y, TEMP[4].xxxx
> 27: DP4 TEMP[4].x, TEMP[3], CONST[11]
> 28: MOV TEMP[0].w, TEMP[4].xxxx
> 29: DP4 TEMP[4].x, TEMP[3], CONST[13]
> 30: MOV TEMP[5].z, TEMP[4].xxxx
> 31: MOV TEMP[3].xyz, TEMP[3].xyzx
> 32: MOV TEMP[6], TEMP[0]
> 33: MOV TEMP[7].xy, TEMP[0].xyxx
> 34: MOV TEMP[1].w, IN[1].wwww
> 35: MOV TEMP[7].zw, TEMP[5].wwzw
> 36: MOV TEMP[3].w, TEMP[4].xxxx
> 37: MOV TEMP[4], TEMP[6]
> 38: MAD TEMP[5].x, TEMP[0].zzzz, CONST[0].zzzz, -TEMP[0].wwww
> 39: MOV TEMP[6].z, TEMP[5].xxxx
> 40: MOV TEMP[6].y, -TEMP[0].yyyy
> 41: MAD TEMP[6].xy, CONST[57].xyyy, TEMP[0].wwww, TEMP[6].xyyy
> 42: MOV OUT[2], TEMP[2]
> 43: MOV OUT[3], TEMP[1]
> 44: MOV OUT[0], TEMP[6]
> 45: MOV OUT[1], TEMP[4]
> 46: MOV OUT[4], TEMP[7]
> 47: MOV OUT[5], TEMP[3]
> 48: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 1
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 2
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 12
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 32
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 33
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 34
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 35
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 36
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 37
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 38
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 39
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 40
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 41
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 42
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 43
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 44
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 45
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 46
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 47
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 52
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 53
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 54
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 55
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 192
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 193
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 194
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 195
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 196
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 197
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 198
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 199
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 216
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 217
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 218
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 219
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 220
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 221
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 222
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 223
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 224
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 225
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 226
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr float addrspace(2)* %10, i32 227
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = getelementptr float addrspace(2)* %10, i32 228
>  %98 = load float addrspace(2)* %97, !tbaa !0
>  %99 = getelementptr float addrspace(2)* %10, i32 229
>  %100 = load float addrspace(2)* %99, !tbaa !0
>  %101 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %102 = load <16 x i8> addrspace(2)* %101, !tbaa !0
>  %103 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %102, i32 0, i32 %5)
>  %104 = extractelement <4 x float> %103, i32 0
>  %105 = extractelement <4 x float> %103, i32 1
>  %106 = extractelement <4 x float> %103, i32 2
>  %107 = extractelement <4 x float> %103, i32 3
>  %108 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %109 = load <16 x i8> addrspace(2)* %108, !tbaa !0
>  %110 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %109, i32 0, i32 %5)
>  %111 = extractelement <4 x float> %110, i32 0
>  %112 = extractelement <4 x float> %110, i32 1
>  %113 = extractelement <4 x float> %110, i32 2
>  %114 = extractelement <4 x float> %110, i32 3
>  %115 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %116 = load <16 x i8> addrspace(2)* %115, !tbaa !0
>  %117 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %116, i32 0, i32 %5)
>  %118 = extractelement <4 x float> %117, i32 0
>  %119 = extractelement <4 x float> %117, i32 1
>  %120 = extractelement <4 x float> %117, i32 2
>  %121 = extractelement <4 x float> %117, i32 3
>  %122 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %123 = load <16 x i8> addrspace(2)* %122, !tbaa !0
>  %124 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %123, i32 0, i32 %5)
>  %125 = extractelement <4 x float> %124, i32 0
>  %126 = extractelement <4 x float> %124, i32 1
>  %127 = extractelement <4 x float> %124, i32 2
>  %128 = call float @llvm.log2.f32(float %111)
>  %129 = call float @llvm.log2.f32(float %112)
>  %130 = call float @llvm.log2.f32(float %113)
>  %131 = fmul float %128, 0x40019999A0000000
>  %132 = fmul float %129, 0x40019999A0000000
>  %133 = fmul float %130, 0x40019999A0000000
>  %134 = call float @llvm.AMDIL.exp.(float %131)
>  %135 = call float @llvm.AMDIL.exp.(float %132)
>  %136 = call float @llvm.AMDIL.exp.(float %133)
>  %137 = fmul float %118, %58
>  %138 = fmul float %119, %60
>  %139 = fadd float %137, %138
>  %140 = fmul float %120, %62
>  %141 = fadd float %139, %140
>  %142 = fmul float %121, %64
>  %143 = fadd float %141, %142
>  %144 = fmul float %118, %66
>  %145 = fmul float %119, %68
>  %146 = fadd float %144, %145
>  %147 = fmul float %120, %70
>  %148 = fadd float %146, %147
>  %149 = fmul float %121, %72
>  %150 = fadd float %148, %149
>  %151 = fmul float %125, %16
>  %152 = fadd float %151, %104
>  %153 = fmul float %126, %16
>  %154 = fadd float %153, %105
>  %155 = fmul float %127, %16
>  %156 = fadd float %155, %106
>  %157 = fmul float %152, %74
>  %158 = fmul float %154, %76
>  %159 = fadd float %157, %158
>  %160 = fmul float %156, %78
>  %161 = fadd float %159, %160
>  %162 = fmul float %107, %80
>  %163 = fadd float %161, %162
>  %164 = fmul float %152, %82
>  %165 = fmul float %154, %84
>  %166 = fadd float %164, %165
>  %167 = fmul float %156, %86
>  %168 = fadd float %166, %167
>  %169 = fmul float %107, %88
>  %170 = fadd float %168, %169
>  %171 = fmul float %152, %90
>  %172 = fmul float %154, %92
>  %173 = fadd float %171, %172
>  %174 = fmul float %156, %94
>  %175 = fadd float %173, %174
>  %176 = fmul float %107, %96
>  %177 = fadd float %175, %176
>  %178 = fmul float %163, %34
>  %179 = fmul float %170, %36
>  %180 = fadd float %178, %179
>  %181 = fmul float %177, %38
>  %182 = fadd float %180, %181
>  %183 = fmul float %12, %40
>  %184 = fadd float %182, %183
>  %185 = fmul float %163, %18
>  %186 = fmul float %170, %20
>  %187 = fadd float %185, %186
>  %188 = fmul float %177, %22
>  %189 = fadd float %187, %188
>  %190 = fmul float %12, %24
>  %191 = fadd float %189, %190
>  %192 = fmul float %163, %26
>  %193 = fmul float %170, %28
>  %194 = fadd float %192, %193
>  %195 = fmul float %177, %30
>  %196 = fadd float %194, %195
>  %197 = fmul float %12, %32
>  %198 = fadd float %196, %197
>  %199 = fmul float %163, %42
>  %200 = fmul float %170, %44
>  %201 = fadd float %199, %200
>  %202 = fmul float %177, %46
>  %203 = fadd float %201, %202
>  %204 = fmul float %12, %48
>  %205 = fadd float %203, %204
>  %206 = fmul float %163, %50
>  %207 = fmul float %170, %52
>  %208 = fadd float %206, %207
>  %209 = fmul float %177, %54
>  %210 = fadd float %208, %209
>  %211 = fmul float %12, %56
>  %212 = fadd float %210, %211
>  %213 = fsub float -0.000000e+00, %205
>  %214 = fmul float %184, %14
>  %215 = fadd float %214, %213
>  %216 = fsub float -0.000000e+00, %198
>  %217 = fmul float %98, %205
>  %218 = fadd float %217, %191
>  %219 = fmul float %100, %205
>  %220 = fadd float %219, %216
>  %221 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %222 = load float addrspace(2)* addrspace(2)* %221, !tbaa !0
>  %223 = getelementptr float addrspace(2)* %222, i32 0
>  %224 = load float addrspace(2)* %223, !tbaa !0
>  %225 = fmul float %224, %191
>  %226 = getelementptr float addrspace(2)* %222, i32 1
>  %227 = load float addrspace(2)* %226, !tbaa !0
>  %228 = fmul float %227, %198
>  %229 = fadd float %225, %228
>  %230 = getelementptr float addrspace(2)* %222, i32 2
>  %231 = load float addrspace(2)* %230, !tbaa !0
>  %232 = fmul float %231, %184
>  %233 = fadd float %229, %232
>  %234 = getelementptr float addrspace(2)* %222, i32 3
>  %235 = load float addrspace(2)* %234, !tbaa !0
>  %236 = fmul float %235, %205
>  %237 = fadd float %233, %236
>  %238 = getelementptr float addrspace(2)* %222, i32 4
>  %239 = load float addrspace(2)* %238, !tbaa !0
>  %240 = fmul float %239, %191
>  %241 = getelementptr float addrspace(2)* %222, i32 5
>  %242 = load float addrspace(2)* %241, !tbaa !0
>  %243 = fmul float %242, %198
>  %244 = fadd float %240, %243
>  %245 = getelementptr float addrspace(2)* %222, i32 6
>  %246 = load float addrspace(2)* %245, !tbaa !0
>  %247 = fmul float %246, %184
>  %248 = fadd float %244, %247
>  %249 = getelementptr float addrspace(2)* %222, i32 7
>  %250 = load float addrspace(2)* %249, !tbaa !0
>  %251 = fmul float %250, %205
>  %252 = fadd float %248, %251
>  %253 = getelementptr float addrspace(2)* %222, i32 8
>  %254 = load float addrspace(2)* %253, !tbaa !0
>  %255 = fmul float %254, %191
>  %256 = getelementptr float addrspace(2)* %222, i32 9
>  %257 = load float addrspace(2)* %256, !tbaa !0
>  %258 = fmul float %257, %198
>  %259 = fadd float %255, %258
>  %260 = getelementptr float addrspace(2)* %222, i32 10
>  %261 = load float addrspace(2)* %260, !tbaa !0
>  %262 = fmul float %261, %184
>  %263 = fadd float %259, %262
>  %264 = getelementptr float addrspace(2)* %222, i32 11
>  %265 = load float addrspace(2)* %264, !tbaa !0
>  %266 = fmul float %265, %205
>  %267 = fadd float %263, %266
>  %268 = getelementptr float addrspace(2)* %222, i32 12
>  %269 = load float addrspace(2)* %268, !tbaa !0
>  %270 = fmul float %269, %191
>  %271 = getelementptr float addrspace(2)* %222, i32 13
>  %272 = load float addrspace(2)* %271, !tbaa !0
>  %273 = fmul float %272, %198
>  %274 = fadd float %270, %273
>  %275 = getelementptr float addrspace(2)* %222, i32 14
>  %276 = load float addrspace(2)* %275, !tbaa !0
>  %277 = fmul float %276, %184
>  %278 = fadd float %274, %277
>  %279 = getelementptr float addrspace(2)* %222, i32 15
>  %280 = load float addrspace(2)* %279, !tbaa !0
>  %281 = fmul float %280, %205
>  %282 = fadd float %278, %281
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %237, float %252, float %267, float %282)
>  %283 = getelementptr float addrspace(2)* %222, i32 16
>  %284 = load float addrspace(2)* %283, !tbaa !0
>  %285 = fmul float %284, %191
>  %286 = getelementptr float addrspace(2)* %222, i32 17
>  %287 = load float addrspace(2)* %286, !tbaa !0
>  %288 = fmul float %287, %198
>  %289 = fadd float %285, %288
>  %290 = getelementptr float addrspace(2)* %222, i32 18
>  %291 = load float addrspace(2)* %290, !tbaa !0
>  %292 = fmul float %291, %184
>  %293 = fadd float %289, %292
>  %294 = getelementptr float addrspace(2)* %222, i32 19
>  %295 = load float addrspace(2)* %294, !tbaa !0
>  %296 = fmul float %295, %205
>  %297 = fadd float %293, %296
>  %298 = getelementptr float addrspace(2)* %222, i32 20
>  %299 = load float addrspace(2)* %298, !tbaa !0
>  %300 = fmul float %299, %191
>  %301 = getelementptr float addrspace(2)* %222, i32 21
>  %302 = load float addrspace(2)* %301, !tbaa !0
>  %303 = fmul float %302, %198
>  %304 = fadd float %300, %303
>  %305 = getelementptr float addrspace(2)* %222, i32 22
>  %306 = load float addrspace(2)* %305, !tbaa !0
>  %307 = fmul float %306, %184
>  %308 = fadd float %304, %307
>  %309 = getelementptr float addrspace(2)* %222, i32 23
>  %310 = load float addrspace(2)* %309, !tbaa !0
>  %311 = fmul float %310, %205
>  %312 = fadd float %308, %311
>  %313 = getelementptr float addrspace(2)* %222, i32 24
>  %314 = load float addrspace(2)* %313, !tbaa !0
>  %315 = fmul float %314, %191
>  %316 = getelementptr float addrspace(2)* %222, i32 25
>  %317 = load float addrspace(2)* %316, !tbaa !0
>  %318 = fmul float %317, %198
>  %319 = fadd float %315, %318
>  %320 = getelementptr float addrspace(2)* %222, i32 26
>  %321 = load float addrspace(2)* %320, !tbaa !0
>  %322 = fmul float %321, %184
>  %323 = fadd float %319, %322
>  %324 = getelementptr float addrspace(2)* %222, i32 27
>  %325 = load float addrspace(2)* %324, !tbaa !0
>  %326 = fmul float %325, %205
>  %327 = fadd float %323, %326
>  %328 = getelementptr float addrspace(2)* %222, i32 28
>  %329 = load float addrspace(2)* %328, !tbaa !0
>  %330 = fmul float %329, %191
>  %331 = getelementptr float addrspace(2)* %222, i32 29
>  %332 = load float addrspace(2)* %331, !tbaa !0
>  %333 = fmul float %332, %198
>  %334 = fadd float %330, %333
>  %335 = getelementptr float addrspace(2)* %222, i32 30
>  %336 = load float addrspace(2)* %335, !tbaa !0
>  %337 = fmul float %336, %184
>  %338 = fadd float %334, %337
>  %339 = getelementptr float addrspace(2)* %222, i32 31
>  %340 = load float addrspace(2)* %339, !tbaa !0
>  %341 = fmul float %340, %205
>  %342 = fadd float %338, %341
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %297, float %312, float %327, float %342)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %143, float %150, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %134, float %135, float %136, float %114)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %191, float %198, float %212, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %163, float %170, float %177, float %212)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %218, float %220, float %215, float %205)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: nounwind readonly
>declare float @llvm.log2.f32(float) #2
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.exp.(float) #3
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { nounwind readonly }
>attributes #3 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840700
>bf8c007f
>e00c2000
>80020300
>c084070c
>bf8c0070
>e00c2000
>80020900
>c0410100
>bf8c0070
>c002030c
>bf8c007f
>d2820007
>040c0909
>d2820008
>0410090a
>c00283d9
>bf8c007f
>10021005
>c00283d8
>bf8c007f
>d2820001
>04040b07
>d2820009
>0414090b
>c00203da
>bf8c007f
>d2820001
>04040909
>c00203db
>bf8c007f
>d2820001
>04040906
>c00203dd
>bf8c007f
>10041004
>c00203dc
>bf8c007f
>d2820002
>04080907
>c00203de
>bf8c007f
>d2820002
>04080909
>c00203df
>bf8c007f
>d2820002
>04080906
>c0020321
>bf8c007f
>10140404
>c0020320
>bf8c007f
>d282000a
>04280901
>c00203e1
>bf8c007f
>10101004
>c00203e0
>bf8c007f
>d2820007
>04200907
>c00203e2
>bf8c007f
>d2820007
>041c0909
>c00203e3
>bf8c007f
>d2820003
>041c0906
>c0020322
>bf8c007f
>d2820004
>04280903
>c0020301
>c0028323
>bf8c007f
>7e0a0205
>d2820004
>04120a04
>c0028325
>bf8c007f
>100a0405
>c0028324
>bf8c007f
>d2820005
>04140b01
>c0028326
>bf8c007f
>d2820005
>04140b03
>c0028327
>bf8c007f
>7e0c0205
>d2820005
>04160c04
>c0400102
>bf8c007f
>c002810d
>bf8c007f
>100c0a05
>c002810c
>bf8c007f
>d2820007
>041a0805
>c0028329
>bf8c007f
>100c0405
>c0028328
>bf8c007f
>d2820006
>04180b01
>c002832a
>bf8c007f
>d2820006
>04180b03
>c002832b
>bf8c007f
>7e100205
>d2820006
>041a1004
>c002810e
>bf8c007f
>d2820008
>041e0c05
>c002832d
>bf8c007f
>100e0405
>c002832c
>bf8c007f
>d2820007
>041c0b01
>c002832e
>bf8c007f
>d2820007
>041c0b03
>c002832f
>bf8c007f
>7e120205
>d2820007
>041e1204
>c002810f
>bf8c007f
>d2820008
>04220e05
>c0028109
>bf8c007f
>10120a05
>c0028108
>bf8c007f
>d2820009
>04260805
>c002810a
>bf8c007f
>d2820009
>04260c05
>c002810b
>bf8c007f
>d2820009
>04260e05
>c0028105
>bf8c007f
>10140a05
>c0028104
>bf8c007f
>d282000a
>042a0805
>c0028106
>bf8c007f
>d282000a
>042a0c05
>c0028107
>bf8c007f
>d282000a
>042a0e05
>c0028101
>bf8c007f
>10160a05
>c0028100
>bf8c007f
>d282000b
>042e0805
>c0028102
>bf8c007f
>d282000b
>042e0c05
>c0028103
>bf8c007f
>d282000b
>042e0e05
>f80000ef
>08090a0b
>c002811d
>bf8c000f
>10100a05
>c002811c
>bf8c007f
>d2820008
>04220805
>c002811e
>bf8c007f
>d2820008
>04220c05
>c002811f
>bf8c007f
>d2820008
>04220e05
>c0028119
>bf8c007f
>10120a05
>c0028118
>bf8c007f
>d2820009
>04260805
>c002811a
>bf8c007f
>d2820009
>04260c05
>c002811b
>bf8c007f
>d2820009
>04260e05
>c0028115
>bf8c007f
>10140a05
>c0028114
>bf8c007f
>d282000a
>042a0805
>c0028116
>bf8c007f
>d282000a
>042a0c05
>c0028117
>bf8c007f
>d282000a
>042a0e05
>c0028111
>bf8c007f
>10160a05
>c0028110
>bf8c007f
>d282000b
>042e0805
>c0028112
>bf8c007f
>d282000b
>042e0c05
>c0000113
>bf8c007f
>d282000b
>042e0e00
>f80000ff
>08090a0b
>c0840708
>bf8c000f
>e00c2000
>80020800
>c00003c5
>bf8c0070
>10181200
>c00003c4
>bf8c007f
>d282000c
>04300108
>c00003c6
>bf8c007f
>d282000c
>0430010a
>c00003c7
>bf8c007f
>d282000c
>0430010b
>c00003c1
>bf8c007f
>101a1200
>c00003c0
>bf8c007f
>d282000d
>04340108
>c00003c2
>bf8c007f
>d282000d
>0434010a
>c00003c3
>bf8c007f
>d2820009
>0434010b
>7e100280
>f800020f
>08080c09
>c0840704
>bf8c000f
>e00c2000
>80020900
>bf8c0770
>7e004f0b
>100000ff
>400ccccd
>7e004b00
>7e1a4f0a
>101a1aff
>400ccccd
>7e1a4b0d
>7e1c4f09
>101c1cff
>400ccccd
>7e1c4b0e
>f800021f
>0c000d0e
>c0000335
>bf8c000f
>10000400
>c0000334
>bf8c007f
>d2820000
>04000101
>c0000336
>bf8c007f
>d2820000
>04000103
>c0000337
>bf8c007f
>7e120200
>d2820000
>04021204
>f800022f
>08000504
>f800023f
>00030201
>c00003e4
>bf8c000f
>d2820000
>04120e00
>c0000302
>bf8c007f
>10020c00
>08020f01
>c00003e5
>bf8c007f
>10040e00
>08040b02
>f80008cf
>07010200
>bf810000
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 3
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 4
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 5
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 6
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 7
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 8
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 9
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 10
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 11
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 12
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 13
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 14
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 15
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %44 = load <16 x i8> addrspace(2)* %43, !tbaa !0
>  %45 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %44, i32 0, i32 %5)
>  %46 = extractelement <4 x float> %45, i32 0
>  %47 = extractelement <4 x float> %45, i32 1
>  %48 = extractelement <4 x float> %45, i32 2
>  %49 = extractelement <4 x float> %45, i32 3
>  %50 = fmul float %46, %12
>  %51 = fmul float %46, %14
>  %52 = fmul float %46, %16
>  %53 = fmul float %46, %18
>  %54 = fmul float %47, %20
>  %55 = fadd float %54, %50
>  %56 = fmul float %47, %22
>  %57 = fadd float %56, %51
>  %58 = fmul float %47, %24
>  %59 = fadd float %58, %52
>  %60 = fmul float %47, %26
>  %61 = fadd float %60, %53
>  %62 = fmul float %48, %28
>  %63 = fadd float %62, %55
>  %64 = fmul float %48, %30
>  %65 = fadd float %64, %57
>  %66 = fmul float %48, %32
>  %67 = fadd float %66, %59
>  %68 = fmul float %48, %34
>  %69 = fadd float %68, %61
>  %70 = fmul float %49, %36
>  %71 = fadd float %70, %63
>  %72 = fmul float %49, %38
>  %73 = fadd float %72, %65
>  %74 = fmul float %49, %40
>  %75 = fadd float %74, %67
>  %76 = fmul float %49, %42
>  %77 = fadd float %76, %69
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %71, float %73, float %75, float %77)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0820700
>bf8c007f
>e00c2000
>80010000
>c0400100
>bf8c0070
>c0010103
>bf8c007f
>10080002
>c0010107
>bf8c007f
>d2820004
>04100501
>c001010b
>bf8c007f
>d2820004
>04100502
>c001010f
>bf8c007f
>d2820004
>04100503
>c0010102
>bf8c007f
>100a0002
>c0010106
>bf8c007f
>d2820005
>04140501
>c001010a
>bf8c007f
>d2820005
>04140502
>c001010e
>bf8c007f
>d2820005
>04140503
>c0010101
>bf8c007f
>100c0002
>c0010105
>bf8c007f
>d2820006
>04180501
>c0010109
>bf8c007f
>d2820006
>04180502
>c001010d
>bf8c007f
>d2820006
>04180503
>c0010100
>bf8c007f
>100e0002
>c0010104
>bf8c007f
>d2820007
>041c0501
>c0010108
>bf8c007f
>d2820007
>041c0502
>c000010c
>bf8c007f
>d2820000
>041c0103
>f80008cf
>04050600
>bf810000
>Can't use cheat cvar fog_start in multiplayer, unless the server has sv_cheats set to 1.
>Can't use cheat cvar fog_end in multiplayer, unless the server has sv_cheats set to 1.
>Can't use cheat cvar fog_startskybox in multiplayer, unless the server has sv_cheats set to 1.
>Can't use cheat cvar fog_endskybox in multiplayer, unless the server has sv_cheats set to 1.
>Can't use cheat cvar r_farz in multiplayer, unless the server has sv_cheats set to 1.
>Error: Material "___fillrate_0" uses unknown shader "FillRate"
>Error: Material "___debugnormalmap_1" uses unknown shader "DebugNormalMap"
>Error: Material "___debugdrawenvmapmask_2" uses unknown shader "DebugDrawEnvmapMask"
>Error: Material "___debugdepth_3" uses unknown shader "DebugDepth"
>Error: Material "___debugdepth_4" uses unknown shader "DebugDepth"
>Error: Material "debug/debugluxels" uses unknown shader "DebugLuxels"
>info_particle_system (fx_portal_storm_5) has no particle system name specified!
>info_particle_system (fx_portal_storm_3_branch1) has no particle system name specified!
>info_particle_system (fx_portal_storm_3_branch2) has no particle system name specified!
>info_particle_system (fx_portal_storm_3_branch3) has no particle system name specified!
>'cfg/motd.txt' not found; not loaded
>'cfg/motd_text.txt' not found; not loaded
>Dead end link: track.sound.2
>DataTable warning: env_sprite: Out-of-range value (128.000000) in SendPropFloat 'm_flGlowProxySize', clamping.
>Requesting texture value from var "$basetexture" which is not a texture value (material: dev/bloomadd)
>Requesting texture value from var "$basetexture" which is not a texture value (material: dev/no_pixel_write)
>Requesting texture value from var "$basetexture" which is not a texture value (material: dev/lumcompare)
>JOY_AXIS_X:  mapped to Turn (absolute)
>JOY_AXIS_Y:  mapped to Look (absolute)
>JOY_AXIS_Z:  unmapped
>JOY_AXIS_R:  mapped to Forward (absolute)
>JOY_AXIS_U:  mapped to Side (absolute)
>JOY_AXIS_V:  unmapped
>Advanced Joystick settings initialized
>Redownloading all lightmaps
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], GENERIC[0], CONSTANT
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
>  %21 = call float @llvm.SI.fs.constant(i32 1, i32 0, i32 %3)
>  %22 = call float @llvm.SI.fs.constant(i32 2, i32 0, i32 %3)
>  %23 = call float @llvm.SI.fs.constant(i32 3, i32 0, i32 %3)
>  %24 = call i32 @llvm.SI.packf16(float %20, float %21)
>  %25 = bitcast i32 %24 to float
>  %26 = call i32 @llvm.SI.packf16(float %22, float %23)
>  %27 = bitcast i32 %26 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %25, float %27, float %25, float %27)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>SI CODE:
>befe0a7e
>befc0306
>c8020302
>c8060202
>5e000101
>c8060102
>c80a0002
>5e020302
>f8001c0f
>00010001
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %10 = load <16 x i8> addrspace(2)* %9, !tbaa !0
>  %11 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %10, i32 0, i32 %5)
>  %12 = extractelement <4 x float> %11, i32 0
>  %13 = extractelement <4 x float> %11, i32 1
>  %14 = extractelement <4 x float> %11, i32 2
>  %15 = extractelement <4 x float> %11, i32 3
>  %16 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %17 = load <16 x i8> addrspace(2)* %16, !tbaa !0
>  %18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %5)
>  %19 = extractelement <4 x float> %18, i32 0
>  %20 = extractelement <4 x float> %18, i32 1
>  %21 = extractelement <4 x float> %18, i32 2
>  %22 = extractelement <4 x float> %18, i32 3
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %19, float %20, float %21, float %22)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %12, float %13, float %14, float %15)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0800704
>bf8c007f
>e00c2000
>80000100
>bf8c0770
>f800020f
>04030201
>c0800700
>bf8c000f
>e00c2000
>80000000
>bf8c0770
>f80008cf
>03020100
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], GENERIC[19], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL TEMP[0], LOCAL
>DCL TEMP[1], ARRAY(1), LOCAL
>IMM[0] FLT32 {    1.0000,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[1].xyyy
>  1: TEX TEMP[0].w, TEMP[0], SAMP[0], 2D
>  2: MUL TEMP[0].x, TEMP[0].wwww, IN[0].wwww
>  3: MOV TEMP[0].w, TEMP[0].xxxx
>  4: MOV TEMP[0].xyz, IMM[0].xxxx
>  5: MOV TEMP[1], TEMP[0]
>  6: MOV OUT[0], TEMP[1]
>  7: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %21 = load <32 x i8> addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %23 = load <16 x i8> addrspace(2)* %22, !tbaa !0
>  %24 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %3, <2 x i32> %5)
>  %25 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %26 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %27 = bitcast float %25 to i32
>  %28 = bitcast float %26 to i32
>  %29 = insertelement <2 x i32> undef, i32 %27, i32 0
>  %30 = insertelement <2 x i32> %29, i32 %28, i32 1
>  %31 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %30, <32 x i8> %21, <16 x i8> %23, i32 2)
>  %32 = extractelement <4 x float> %31, i32 3
>  %33 = fmul float %32, %24
>  %34 = call i32 @llvm.SI.packf16(float 1.000000e+00, float 1.000000e+00)
>  %35 = bitcast i32 %34 to float
>  %36 = call i32 @llvm.SI.packf16(float 1.000000e+00, float %33)
>  %37 = bitcast i32 %36 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %35, float %37, float %35, float %37)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0500
>c80d0501
>c8080400
>c8090401
>c0800300
>c0c40500
>bf8c007f
>f0800800
>00020202
>c80c0300
>c80d0301
>bf8c0770
>10000702
>5e0000f2
>d25e0001
>0201e4f2
>f8001c0f
>00010001
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], CLIPVERTEX
>DCL OUT[3], GENERIC[19]
>DCL CONST[0..57]
>DCL TEMP[0..5], LOCAL
>  0: MOV TEMP[0].w, CONST[0].yyyy
>  1: DP4 TEMP[0].x, IN[0], CONST[54]
>  2: DP4 TEMP[1].x, IN[0], CONST[55]
>  3: MOV TEMP[0].y, TEMP[1].xxxx
>  4: DP4 TEMP[1].x, IN[0], CONST[56]
>  5: MOV TEMP[0].z, TEMP[1].xxxx
>  6: DP4 TEMP[1].x, TEMP[0], CONST[8]
>  7: DP4 TEMP[2].x, TEMP[0], CONST[9]
>  8: MOV TEMP[1].y, TEMP[2].xxxx
>  9: DP4 TEMP[3].x, TEMP[0], CONST[10]
> 10: MOV TEMP[1].z, TEMP[3].xxxx
> 11: DP4 TEMP[0].x, TEMP[0], CONST[11]
> 12: MOV TEMP[1].w, TEMP[0].xxxx
> 13: MUL TEMP[4].xy, IN[1].yyyy, CONST[49].xyyy
> 14: MAD TEMP[4].xy, IN[1].xxxx, CONST[48].xyyy, TEMP[4].xyyy
> 15: MOV TEMP[5], TEMP[1]
> 16: MAD TEMP[3].x, TEMP[3].xxxx, CONST[0].zzzz, -TEMP[0].xxxx
> 17: MOV TEMP[1].z, TEMP[3].xxxx
> 18: MOV TEMP[1].y, -TEMP[2].xxxx
> 19: MAD TEMP[1].xy, CONST[57].xyyy, TEMP[0].xxxx, TEMP[1].xyyy
> 20: MOV OUT[3], TEMP[4]
> 21: MOV OUT[0], TEMP[1]
> 22: MOV OUT[2], TEMP[5]
> 23: MOV_SAT OUT[1], CONST[47]
> 24: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 1
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 2
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 32
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 33
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 34
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 35
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 36
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 37
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 38
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 39
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 40
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 41
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 42
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 43
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 44
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 45
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 46
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 47
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 188
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 189
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 190
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 191
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 192
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 193
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 196
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 197
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 216
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 217
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 218
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 219
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 220
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 221
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 222
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 223
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 224
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 225
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 226
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 227
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 228
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 229
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %92 = load <16 x i8> addrspace(2)* %91, !tbaa !0
>  %93 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %92, i32 0, i32 %5)
>  %94 = extractelement <4 x float> %93, i32 0
>  %95 = extractelement <4 x float> %93, i32 1
>  %96 = extractelement <4 x float> %93, i32 2
>  %97 = extractelement <4 x float> %93, i32 3
>  %98 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %99 = load <16 x i8> addrspace(2)* %98, !tbaa !0
>  %100 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %99, i32 0, i32 %5)
>  %101 = extractelement <4 x float> %100, i32 0
>  %102 = extractelement <4 x float> %100, i32 1
>  %103 = fmul float %94, %64
>  %104 = fmul float %95, %66
>  %105 = fadd float %103, %104
>  %106 = fmul float %96, %68
>  %107 = fadd float %105, %106
>  %108 = fmul float %97, %70
>  %109 = fadd float %107, %108
>  %110 = fmul float %94, %72
>  %111 = fmul float %95, %74
>  %112 = fadd float %110, %111
>  %113 = fmul float %96, %76
>  %114 = fadd float %112, %113
>  %115 = fmul float %97, %78
>  %116 = fadd float %114, %115
>  %117 = fmul float %94, %80
>  %118 = fmul float %95, %82
>  %119 = fadd float %117, %118
>  %120 = fmul float %96, %84
>  %121 = fadd float %119, %120
>  %122 = fmul float %97, %86
>  %123 = fadd float %121, %122
>  %124 = fmul float %109, %16
>  %125 = fmul float %116, %18
>  %126 = fadd float %124, %125
>  %127 = fmul float %123, %20
>  %128 = fadd float %126, %127
>  %129 = fmul float %12, %22
>  %130 = fadd float %128, %129
>  %131 = fmul float %109, %24
>  %132 = fmul float %116, %26
>  %133 = fadd float %131, %132
>  %134 = fmul float %123, %28
>  %135 = fadd float %133, %134
>  %136 = fmul float %12, %30
>  %137 = fadd float %135, %136
>  %138 = fmul float %109, %32
>  %139 = fmul float %116, %34
>  %140 = fadd float %138, %139
>  %141 = fmul float %123, %36
>  %142 = fadd float %140, %141
>  %143 = fmul float %12, %38
>  %144 = fadd float %142, %143
>  %145 = fmul float %109, %40
>  %146 = fmul float %116, %42
>  %147 = fadd float %145, %146
>  %148 = fmul float %123, %44
>  %149 = fadd float %147, %148
>  %150 = fmul float %12, %46
>  %151 = fadd float %149, %150
>  %152 = fmul float %102, %60
>  %153 = fmul float %102, %62
>  %154 = fmul float %101, %56
>  %155 = fadd float %154, %152
>  %156 = fmul float %101, %58
>  %157 = fadd float %156, %153
>  %158 = fsub float -0.000000e+00, %151
>  %159 = fmul float %144, %14
>  %160 = fadd float %159, %158
>  %161 = fsub float -0.000000e+00, %137
>  %162 = fmul float %88, %151
>  %163 = fadd float %162, %130
>  %164 = fmul float %90, %151
>  %165 = fadd float %164, %161
>  %166 = call float @llvm.AMDIL.clamp.(float %48, float 0.000000e+00, float 1.000000e+00)
>  %167 = call float @llvm.AMDIL.clamp.(float %50, float 0.000000e+00, float 1.000000e+00)
>  %168 = call float @llvm.AMDIL.clamp.(float %52, float 0.000000e+00, float 1.000000e+00)
>  %169 = call float @llvm.AMDIL.clamp.(float %54, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %166, float %167, float %168, float %169)
>  %170 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %171 = load float addrspace(2)* addrspace(2)* %170, !tbaa !0
>  %172 = getelementptr float addrspace(2)* %171, i32 0
>  %173 = load float addrspace(2)* %172, !tbaa !0
>  %174 = fmul float %173, %130
>  %175 = getelementptr float addrspace(2)* %171, i32 1
>  %176 = load float addrspace(2)* %175, !tbaa !0
>  %177 = fmul float %176, %137
>  %178 = fadd float %174, %177
>  %179 = getelementptr float addrspace(2)* %171, i32 2
>  %180 = load float addrspace(2)* %179, !tbaa !0
>  %181 = fmul float %180, %144
>  %182 = fadd float %178, %181
>  %183 = getelementptr float addrspace(2)* %171, i32 3
>  %184 = load float addrspace(2)* %183, !tbaa !0
>  %185 = fmul float %184, %151
>  %186 = fadd float %182, %185
>  %187 = getelementptr float addrspace(2)* %171, i32 4
>  %188 = load float addrspace(2)* %187, !tbaa !0
>  %189 = fmul float %188, %130
>  %190 = getelementptr float addrspace(2)* %171, i32 5
>  %191 = load float addrspace(2)* %190, !tbaa !0
>  %192 = fmul float %191, %137
>  %193 = fadd float %189, %192
>  %194 = getelementptr float addrspace(2)* %171, i32 6
>  %195 = load float addrspace(2)* %194, !tbaa !0
>  %196 = fmul float %195, %144
>  %197 = fadd float %193, %196
>  %198 = getelementptr float addrspace(2)* %171, i32 7
>  %199 = load float addrspace(2)* %198, !tbaa !0
>  %200 = fmul float %199, %151
>  %201 = fadd float %197, %200
>  %202 = getelementptr float addrspace(2)* %171, i32 8
>  %203 = load float addrspace(2)* %202, !tbaa !0
>  %204 = fmul float %203, %130
>  %205 = getelementptr float addrspace(2)* %171, i32 9
>  %206 = load float addrspace(2)* %205, !tbaa !0
>  %207 = fmul float %206, %137
>  %208 = fadd float %204, %207
>  %209 = getelementptr float addrspace(2)* %171, i32 10
>  %210 = load float addrspace(2)* %209, !tbaa !0
>  %211 = fmul float %210, %144
>  %212 = fadd float %208, %211
>  %213 = getelementptr float addrspace(2)* %171, i32 11
>  %214 = load float addrspace(2)* %213, !tbaa !0
>  %215 = fmul float %214, %151
>  %216 = fadd float %212, %215
>  %217 = getelementptr float addrspace(2)* %171, i32 12
>  %218 = load float addrspace(2)* %217, !tbaa !0
>  %219 = fmul float %218, %130
>  %220 = getelementptr float addrspace(2)* %171, i32 13
>  %221 = load float addrspace(2)* %220, !tbaa !0
>  %222 = fmul float %221, %137
>  %223 = fadd float %219, %222
>  %224 = getelementptr float addrspace(2)* %171, i32 14
>  %225 = load float addrspace(2)* %224, !tbaa !0
>  %226 = fmul float %225, %144
>  %227 = fadd float %223, %226
>  %228 = getelementptr float addrspace(2)* %171, i32 15
>  %229 = load float addrspace(2)* %228, !tbaa !0
>  %230 = fmul float %229, %151
>  %231 = fadd float %227, %230
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %186, float %201, float %216, float %231)
>  %232 = getelementptr float addrspace(2)* %171, i32 16
>  %233 = load float addrspace(2)* %232, !tbaa !0
>  %234 = fmul float %233, %130
>  %235 = getelementptr float addrspace(2)* %171, i32 17
>  %236 = load float addrspace(2)* %235, !tbaa !0
>  %237 = fmul float %236, %137
>  %238 = fadd float %234, %237
>  %239 = getelementptr float addrspace(2)* %171, i32 18
>  %240 = load float addrspace(2)* %239, !tbaa !0
>  %241 = fmul float %240, %144
>  %242 = fadd float %238, %241
>  %243 = getelementptr float addrspace(2)* %171, i32 19
>  %244 = load float addrspace(2)* %243, !tbaa !0
>  %245 = fmul float %244, %151
>  %246 = fadd float %242, %245
>  %247 = getelementptr float addrspace(2)* %171, i32 20
>  %248 = load float addrspace(2)* %247, !tbaa !0
>  %249 = fmul float %248, %130
>  %250 = getelementptr float addrspace(2)* %171, i32 21
>  %251 = load float addrspace(2)* %250, !tbaa !0
>  %252 = fmul float %251, %137
>  %253 = fadd float %249, %252
>  %254 = getelementptr float addrspace(2)* %171, i32 22
>  %255 = load float addrspace(2)* %254, !tbaa !0
>  %256 = fmul float %255, %144
>  %257 = fadd float %253, %256
>  %258 = getelementptr float addrspace(2)* %171, i32 23
>  %259 = load float addrspace(2)* %258, !tbaa !0
>  %260 = fmul float %259, %151
>  %261 = fadd float %257, %260
>  %262 = getelementptr float addrspace(2)* %171, i32 24
>  %263 = load float addrspace(2)* %262, !tbaa !0
>  %264 = fmul float %263, %130
>  %265 = getelementptr float addrspace(2)* %171, i32 25
>  %266 = load float addrspace(2)* %265, !tbaa !0
>  %267 = fmul float %266, %137
>  %268 = fadd float %264, %267
>  %269 = getelementptr float addrspace(2)* %171, i32 26
>  %270 = load float addrspace(2)* %269, !tbaa !0
>  %271 = fmul float %270, %144
>  %272 = fadd float %268, %271
>  %273 = getelementptr float addrspace(2)* %171, i32 27
>  %274 = load float addrspace(2)* %273, !tbaa !0
>  %275 = fmul float %274, %151
>  %276 = fadd float %272, %275
>  %277 = getelementptr float addrspace(2)* %171, i32 28
>  %278 = load float addrspace(2)* %277, !tbaa !0
>  %279 = fmul float %278, %130
>  %280 = getelementptr float addrspace(2)* %171, i32 29
>  %281 = load float addrspace(2)* %280, !tbaa !0
>  %282 = fmul float %281, %137
>  %283 = fadd float %279, %282
>  %284 = getelementptr float addrspace(2)* %171, i32 30
>  %285 = load float addrspace(2)* %284, !tbaa !0
>  %286 = fmul float %285, %144
>  %287 = fadd float %283, %286
>  %288 = getelementptr float addrspace(2)* %171, i32 31
>  %289 = load float addrspace(2)* %288, !tbaa !0
>  %290 = fmul float %289, %151
>  %291 = fadd float %287, %290
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %246, float %261, float %276, float %291)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %155, float %157, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %163, float %165, float %160, float %151)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0410100
>bf8c007f
>c00203bf
>bf8c007f
>d2060801
>02010004
>c00203be
>bf8c007f
>d2060802
>02010004
>c00203bd
>bf8c007f
>d2060803
>02010004
>c00203bc
>bf8c007f
>d2060804
>02010004
>f800020f
>01020304
>c0840700
>bf8c000f
>e00c2000
>80020600
>c00203d9
>bf8c0070
>10020e04
>c00203d8
>bf8c007f
>d2820001
>04040906
>c00203da
>bf8c007f
>d2820001
>04040908
>c00203db
>bf8c007f
>d2820004
>04040909
>c00203dd
>bf8c007f
>10020e04
>c00203dc
>bf8c007f
>d2820001
>04040906
>c00203de
>bf8c007f
>d2820001
>04040908
>c00203df
>bf8c007f
>d2820005
>04040909
>c0020321
>bf8c007f
>10020a04
>c0020320
>bf8c007f
>d2820001
>04040904
>c00203e1
>bf8c007f
>10040e04
>c00203e0
>bf8c007f
>d2820002
>04080906
>c00203e2
>bf8c007f
>d2820002
>04080908
>c00203e3
>bf8c007f
>d2820006
>04080909
>c0020322
>bf8c007f
>d2820001
>04040906
>c0020301
>c0028323
>bf8c007f
>7e040205
>d2820001
>04060404
>c0028325
>bf8c007f
>10040a05
>c0028324
>bf8c007f
>d2820002
>04080b04
>c0028326
>bf8c007f
>d2820002
>04080b06
>c0028327
>bf8c007f
>7e060205
>d2820002
>040a0604
>c0400102
>bf8c007f
>c002810d
>bf8c007f
>10060405
>c002810c
>bf8c007f
>d2820007
>040e0205
>c0028329
>bf8c007f
>10060a05
>c0028328
>bf8c007f
>d2820003
>040c0b04
>c002832a
>bf8c007f
>d2820003
>040c0b06
>c002832b
>bf8c007f
>7e100205
>d2820003
>040e1004
>c002810e
>bf8c007f
>d2820007
>041e0605
>c002832d
>bf8c007f
>100a0a05
>c002832c
>bf8c007f
>d2820004
>04140b04
>c002832e
>bf8c007f
>d2820004
>04100b06
>c002832f
>bf8c007f
>7e0a0205
>d2820004
>04120a04
>c002010f
>bf8c007f
>d2820005
>041e0804
>c0020109
>bf8c007f
>100c0404
>c0020108
>bf8c007f
>d2820006
>041a0204
>c002010a
>bf8c007f
>d2820006
>041a0604
>c002010b
>bf8c007f
>d2820006
>041a0804
>c0020105
>bf8c007f
>100e0404
>c0020104
>bf8c007f
>d2820007
>041e0204
>c0020106
>bf8c007f
>d2820007
>041e0604
>c0020107
>bf8c007f
>d2820007
>041e0804
>c0020101
>bf8c007f
>10100404
>c0020100
>bf8c007f
>d2820008
>04220204
>c0020102
>bf8c007f
>d2820008
>04220604
>c0020103
>bf8c007f
>d2820008
>04220804
>f80000ef
>05060708
>c002011d
>bf8c000f
>100a0404
>c002011c
>bf8c007f
>d2820005
>04160204
>c002011e
>bf8c007f
>d2820005
>04160604
>c002011f
>bf8c007f
>d2820005
>04160804
>c0020119
>bf8c007f
>100c0404
>c0020118
>bf8c007f
>d2820006
>041a0204
>c002011a
>bf8c007f
>d2820006
>041a0604
>c002011b
>bf8c007f
>d2820006
>041a0804
>c0020115
>bf8c007f
>100e0404
>c0020114
>bf8c007f
>d2820007
>041e0204
>c0020116
>bf8c007f
>d2820007
>041e0604
>c0020117
>bf8c007f
>d2820007
>041e0804
>c0020111
>bf8c007f
>10100404
>c0020110
>bf8c007f
>d2820008
>04220204
>c0020112
>bf8c007f
>d2820008
>04220604
>c0000113
>bf8c007f
>d2820008
>04220800
>f80000ff
>05060708
>c0820704
>bf8c000f
>e00c2000
>80010500
>c00003c5
>bf8c0070
>10000c00
>c00003c1
>bf8c007f
>d2820000
>04000105
>c00003c4
>bf8c007f
>10120c00
>c00003c0
>bf8c007f
>d2820005
>04240105
>7e0c0280
>f800021f
>06060005
>c00003e4
>bf8c000f
>d2820000
>04060800
>c0000302
>bf8c007f
>10020600
>08020901
>c00003e5
>bf8c007f
>10060800
>08040503
>f80008cf
>04010200
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL IN[2], GENERIC[21], PERSPECTIVE
>DCL IN[3], GENERIC[22], PERSPECTIVE
>DCL IN[4], GENERIC[23], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL CONST[0..30]
>DCL TEMP[0..4], LOCAL
>DCL TEMP[5], ARRAY(1), LOCAL
>IMM[0] FLT32 {100000002004087734272.0000,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[2].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MOV TEMP[1].xy, IN[0].xyyy
>  3: TEX TEMP[1], TEMP[1], SAMP[0], 2D
>  4: MOV TEMP[2].xy, IN[3].xyyy
>  5: TEX TEMP[2], TEMP[2], SAMP[0], 2D
>  6: MOV TEMP[3].xy, IN[1].xyyy
>  7: TEX TEMP[3], TEMP[3], SAMP[0], 2D
>  8: MUL TEMP[1].xyz, TEMP[1].wwww, TEMP[1].xyzz
>  9: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[0].wwww, -TEMP[1].xyzz
> 10: FRC TEMP[4].xy, IN[4].xyyy
> 11: MAD TEMP[0].xyz, TEMP[4].xxxx, TEMP[0].xyzz, TEMP[1].xyzz
> 12: MUL TEMP[3].xyz, TEMP[3].wwww, TEMP[3].xyzz
> 13: MAD TEMP[1].xyz, TEMP[2].xyzz, TEMP[2].wwww, -TEMP[3].xyzz
> 14: MAD TEMP[3].xyz, TEMP[4].xxxx, TEMP[1].xyzz, TEMP[3].xyzz
> 15: ADD TEMP[2].xyz, TEMP[3].xyzz, -TEMP[0].xyzz
> 16: MAD TEMP[1].xyz, TEMP[4].yyyy, TEMP[2].xyzz, TEMP[0].xyzz
> 17: MUL TEMP[1].xyz, TEMP[1].xyzz, CONST[0].xyzz
> 18: MUL TEMP[1].xyz, TEMP[1].xyzz, CONST[30].xxxx
> 19: MUL TEMP[0].x, CONST[29].wwww, IMM[0].xxxx
> 20: MOV TEMP[1].w, TEMP[0].xxxx
> 21: MOV TEMP[5], TEMP[1]
> 22: MOV OUT[0], TEMP[5]
> 23: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 0
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 1
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 2
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 119
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 120
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %33 = load <32 x i8> addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %35 = load <16 x i8> addrspace(2)* %34, !tbaa !0
>  %36 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %37 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %38 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %39 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %40 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %41 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %42 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %3, <2 x i32> %5)
>  %43 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %3, <2 x i32> %5)
>  %44 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %3, <2 x i32> %5)
>  %45 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %3, <2 x i32> %5)
>  %46 = bitcast float %40 to i32
>  %47 = bitcast float %41 to i32
>  %48 = insertelement <2 x i32> undef, i32 %46, i32 0
>  %49 = insertelement <2 x i32> %48, i32 %47, i32 1
>  %50 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %49, <32 x i8> %33, <16 x i8> %35, i32 2)
>  %51 = extractelement <4 x float> %50, i32 0
>  %52 = extractelement <4 x float> %50, i32 1
>  %53 = extractelement <4 x float> %50, i32 2
>  %54 = extractelement <4 x float> %50, i32 3
>  %55 = bitcast float %36 to i32
>  %56 = bitcast float %37 to i32
>  %57 = insertelement <2 x i32> undef, i32 %55, i32 0
>  %58 = insertelement <2 x i32> %57, i32 %56, i32 1
>  %59 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %58, <32 x i8> %33, <16 x i8> %35, i32 2)
>  %60 = extractelement <4 x float> %59, i32 0
>  %61 = extractelement <4 x float> %59, i32 1
>  %62 = extractelement <4 x float> %59, i32 2
>  %63 = extractelement <4 x float> %59, i32 3
>  %64 = bitcast float %42 to i32
>  %65 = bitcast float %43 to i32
>  %66 = insertelement <2 x i32> undef, i32 %64, i32 0
>  %67 = insertelement <2 x i32> %66, i32 %65, i32 1
>  %68 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %67, <32 x i8> %33, <16 x i8> %35, i32 2)
>  %69 = extractelement <4 x float> %68, i32 0
>  %70 = extractelement <4 x float> %68, i32 1
>  %71 = extractelement <4 x float> %68, i32 2
>  %72 = extractelement <4 x float> %68, i32 3
>  %73 = bitcast float %38 to i32
>  %74 = bitcast float %39 to i32
>  %75 = insertelement <2 x i32> undef, i32 %73, i32 0
>  %76 = insertelement <2 x i32> %75, i32 %74, i32 1
>  %77 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %76, <32 x i8> %33, <16 x i8> %35, i32 2)
>  %78 = extractelement <4 x float> %77, i32 0
>  %79 = extractelement <4 x float> %77, i32 1
>  %80 = extractelement <4 x float> %77, i32 2
>  %81 = extractelement <4 x float> %77, i32 3
>  %82 = fmul float %63, %60
>  %83 = fmul float %63, %61
>  %84 = fmul float %63, %62
>  %85 = fsub float -0.000000e+00, %82
>  %86 = fmul float %51, %54
>  %87 = fadd float %86, %85
>  %88 = fsub float -0.000000e+00, %83
>  %89 = fmul float %52, %54
>  %90 = fadd float %89, %88
>  %91 = fsub float -0.000000e+00, %84
>  %92 = fmul float %53, %54
>  %93 = fadd float %92, %91
>  %94 = call float @llvm.AMDIL.fraction.(float %44)
>  %95 = call float @llvm.AMDIL.fraction.(float %45)
>  %96 = fmul float %94, %87
>  %97 = fadd float %96, %82
>  %98 = fmul float %94, %90
>  %99 = fadd float %98, %83
>  %100 = fmul float %94, %93
>  %101 = fadd float %100, %84
>  %102 = fmul float %81, %78
>  %103 = fmul float %81, %79
>  %104 = fmul float %81, %80
>  %105 = fsub float -0.000000e+00, %102
>  %106 = fmul float %69, %72
>  %107 = fadd float %106, %105
>  %108 = fsub float -0.000000e+00, %103
>  %109 = fmul float %70, %72
>  %110 = fadd float %109, %108
>  %111 = fsub float -0.000000e+00, %104
>  %112 = fmul float %71, %72
>  %113 = fadd float %112, %111
>  %114 = fmul float %94, %107
>  %115 = fadd float %114, %102
>  %116 = fmul float %94, %110
>  %117 = fadd float %116, %103
>  %118 = fmul float %94, %113
>  %119 = fadd float %118, %104
>  %120 = fsub float -0.000000e+00, %97
>  %121 = fadd float %115, %120
>  %122 = fsub float -0.000000e+00, %99
>  %123 = fadd float %117, %122
>  %124 = fsub float -0.000000e+00, %101
>  %125 = fadd float %119, %124
>  %126 = fmul float %95, %121
>  %127 = fadd float %126, %97
>  %128 = fmul float %95, %123
>  %129 = fadd float %128, %99
>  %130 = fmul float %95, %125
>  %131 = fadd float %130, %101
>  %132 = fmul float %127, %23
>  %133 = fmul float %129, %25
>  %134 = fmul float %131, %27
>  %135 = fmul float %132, %31
>  %136 = fmul float %133, %31
>  %137 = fmul float %134, %31
>  %138 = fmul float %29, 0x4415AF1D80000000
>  %139 = call i32 @llvm.SI.packf16(float %135, float %136)
>  %140 = bitcast i32 %139 to float
>  %141 = call i32 @llvm.SI.packf16(float %137, float %138)
>  %142 = bitcast i32 %141 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %140, float %142, float %140, float %142)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.fraction.(float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430202
>bf8c0770
>10160705
>c81c0900
>c81d0901
>c8180800
>c8190801
>f0800f00
>00430606
>bf8c0770
>10141307
>0818170a
>c8281000
>c8291001
>7e14410a
>d2820013
>042e190a
>c8300500
>c8310501
>c82c0400
>c82d0401
>f0800f00
>00430b0b
>bf8c0770
>1028190e
>c8400d00
>c8410d01
>c83c0c00
>c83d0c01
>f0800f00
>00430f0f
>bf8c0770
>102a2510
>082a2915
>d2820014
>04522b0a
>08282714
>c8541100
>c8551101
>7e004115
>d2820001
>044e2900
>c0400100
>bf8c007f
>c0010101
>bf8c007f
>10020202
>c0010178
>bf8c007f
>10020202
>10260505
>10281306
>08282714
>d2820013
>044e290a
>1028170e
>102a250f
>082a2915
>d2820014
>04522b0a
>08282714
>d2820013
>044e2900
>c0018100
>bf8c007f
>10262603
>10262602
>5e020313
>10040905
>10061308
>08060503
>d2820002
>040a070a
>10061b0e
>10082511
>08080704
>d2820003
>040e090a
>08060503
>d2820000
>040a0700
>c0018102
>bf8c007f
>10000003
>10000002
>c0000177
>7e0402ff
>60ad78ec
>bf8c007f
>10040400
>5e000500
>f8001c0f
>00010001
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL OUT[3], GENERIC[20]
>DCL OUT[4], GENERIC[21]
>DCL OUT[5], GENERIC[22]
>DCL OUT[6], GENERIC[23]
>DCL CONST[0..51]
>DCL TEMP[0..9], LOCAL
>  0: DP4 TEMP[0].x, IN[0], CONST[4]
>  1: DP4 TEMP[1].x, IN[0], CONST[5]
>  2: MOV TEMP[0].y, TEMP[1].xxxx
>  3: DP4 TEMP[2].x, IN[0], CONST[6]
>  4: MOV TEMP[0].z, TEMP[2].xxxx
>  5: MAD TEMP[3].xyz, IN[1].xyxx, CONST[0].yyxx, CONST[0].xxyy
>  6: DP4 TEMP[4].x, IN[0], CONST[7]
>  7: MOV TEMP[0].w, TEMP[4].xxxx
>  8: DP3 TEMP[5].x, TEMP[3].xyzz, CONST[49].xyww
>  9: DP3 TEMP[6].x, TEMP[3].xyzz, CONST[50].xyww
> 10: ADD TEMP[7].x, TEMP[5].xxxx, -CONST[48].xxxx
> 11: MOV TEMP[3].y, TEMP[7].xxxx
> 12: ADD TEMP[3].x, TEMP[5].xxxx, CONST[48].xxxx
> 13: ADD TEMP[5].x, TEMP[6].xxxx, -CONST[48].yyyy
> 14: MOV TEMP[3].z, TEMP[5].xxxx
> 15: ADD TEMP[5].x, TEMP[6].xxxx, CONST[48].yyyy
> 16: MOV TEMP[3].w, TEMP[5].xxxx
> 17: MUL TEMP[5].xy, TEMP[3].yzzz, CONST[48].zwww
> 18: MOV TEMP[6].xy, TEMP[3].yzyy
> 19: MOV TEMP[7].xy, TEMP[3].ywyy
> 20: MOV TEMP[8].xy, TEMP[3].xwxx
> 21: MOV TEMP[3].xy, TEMP[3].xzxx
> 22: MOV TEMP[9], TEMP[0]
> 23: MAD TEMP[2].x, TEMP[2].xxxx, CONST[0].zzzz, -TEMP[4].xxxx
> 24: MOV TEMP[0].z, TEMP[2].xxxx
> 25: MOV TEMP[0].y, -TEMP[1].xxxx
> 26: MAD TEMP[0].xy, CONST[51].xyyy, TEMP[4].xxxx, TEMP[0].xyyy
> 27: MOV OUT[2], TEMP[6]
> 28: MOV OUT[3], TEMP[7]
> 29: MOV OUT[4], TEMP[3]
> 30: MOV OUT[5], TEMP[8]
> 31: MOV OUT[0], TEMP[0]
> 32: MOV OUT[6], TEMP[5]
> 33: MOV OUT[1], TEMP[9]
> 34: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 16
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 17
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 18
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 19
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 20
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 21
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 22
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 23
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 24
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 25
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 26
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 27
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 28
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 29
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 30
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 31
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 192
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 193
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 194
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 195
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 196
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 197
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 199
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 200
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 201
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 203
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 204
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 205
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %74 = load <16 x i8> addrspace(2)* %73, !tbaa !0
>  %75 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %74, i32 0, i32 %5)
>  %76 = extractelement <4 x float> %75, i32 0
>  %77 = extractelement <4 x float> %75, i32 1
>  %78 = extractelement <4 x float> %75, i32 2
>  %79 = extractelement <4 x float> %75, i32 3
>  %80 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %81 = load <16 x i8> addrspace(2)* %80, !tbaa !0
>  %82 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %81, i32 0, i32 %5)
>  %83 = extractelement <4 x float> %82, i32 0
>  %84 = extractelement <4 x float> %82, i32 1
>  %85 = fmul float %76, %18
>  %86 = fmul float %77, %20
>  %87 = fadd float %85, %86
>  %88 = fmul float %78, %22
>  %89 = fadd float %87, %88
>  %90 = fmul float %79, %24
>  %91 = fadd float %89, %90
>  %92 = fmul float %76, %26
>  %93 = fmul float %77, %28
>  %94 = fadd float %92, %93
>  %95 = fmul float %78, %30
>  %96 = fadd float %94, %95
>  %97 = fmul float %79, %32
>  %98 = fadd float %96, %97
>  %99 = fmul float %76, %34
>  %100 = fmul float %77, %36
>  %101 = fadd float %99, %100
>  %102 = fmul float %78, %38
>  %103 = fadd float %101, %102
>  %104 = fmul float %79, %40
>  %105 = fadd float %103, %104
>  %106 = fmul float %83, %14
>  %107 = fadd float %106, %12
>  %108 = fmul float %84, %14
>  %109 = fadd float %108, %12
>  %110 = fmul float %83, %12
>  %111 = fadd float %110, %14
>  %112 = fmul float %76, %42
>  %113 = fmul float %77, %44
>  %114 = fadd float %112, %113
>  %115 = fmul float %78, %46
>  %116 = fadd float %114, %115
>  %117 = fmul float %79, %48
>  %118 = fadd float %116, %117
>  %119 = fmul float %107, %58
>  %120 = fmul float %109, %60
>  %121 = fadd float %120, %119
>  %122 = fmul float %111, %62
>  %123 = fadd float %121, %122
>  %124 = fmul float %107, %64
>  %125 = fmul float %109, %66
>  %126 = fadd float %125, %124
>  %127 = fmul float %111, %68
>  %128 = fadd float %126, %127
>  %129 = fsub float -0.000000e+00, %50
>  %130 = fadd float %123, %129
>  %131 = fadd float %123, %50
>  %132 = fsub float -0.000000e+00, %52
>  %133 = fadd float %128, %132
>  %134 = fadd float %128, %52
>  %135 = fmul float %130, %54
>  %136 = fmul float %133, %56
>  %137 = fsub float -0.000000e+00, %118
>  %138 = fmul float %105, %16
>  %139 = fadd float %138, %137
>  %140 = fsub float -0.000000e+00, %98
>  %141 = fmul float %70, %118
>  %142 = fadd float %141, %91
>  %143 = fmul float %72, %118
>  %144 = fadd float %143, %140
>  %145 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %146 = load float addrspace(2)* addrspace(2)* %145, !tbaa !0
>  %147 = getelementptr float addrspace(2)* %146, i32 0
>  %148 = load float addrspace(2)* %147, !tbaa !0
>  %149 = fmul float %148, %91
>  %150 = getelementptr float addrspace(2)* %146, i32 1
>  %151 = load float addrspace(2)* %150, !tbaa !0
>  %152 = fmul float %151, %98
>  %153 = fadd float %149, %152
>  %154 = getelementptr float addrspace(2)* %146, i32 2
>  %155 = load float addrspace(2)* %154, !tbaa !0
>  %156 = fmul float %155, %105
>  %157 = fadd float %153, %156
>  %158 = getelementptr float addrspace(2)* %146, i32 3
>  %159 = load float addrspace(2)* %158, !tbaa !0
>  %160 = fmul float %159, %118
>  %161 = fadd float %157, %160
>  %162 = getelementptr float addrspace(2)* %146, i32 4
>  %163 = load float addrspace(2)* %162, !tbaa !0
>  %164 = fmul float %163, %91
>  %165 = getelementptr float addrspace(2)* %146, i32 5
>  %166 = load float addrspace(2)* %165, !tbaa !0
>  %167 = fmul float %166, %98
>  %168 = fadd float %164, %167
>  %169 = getelementptr float addrspace(2)* %146, i32 6
>  %170 = load float addrspace(2)* %169, !tbaa !0
>  %171 = fmul float %170, %105
>  %172 = fadd float %168, %171
>  %173 = getelementptr float addrspace(2)* %146, i32 7
>  %174 = load float addrspace(2)* %173, !tbaa !0
>  %175 = fmul float %174, %118
>  %176 = fadd float %172, %175
>  %177 = getelementptr float addrspace(2)* %146, i32 8
>  %178 = load float addrspace(2)* %177, !tbaa !0
>  %179 = fmul float %178, %91
>  %180 = getelementptr float addrspace(2)* %146, i32 9
>  %181 = load float addrspace(2)* %180, !tbaa !0
>  %182 = fmul float %181, %98
>  %183 = fadd float %179, %182
>  %184 = getelementptr float addrspace(2)* %146, i32 10
>  %185 = load float addrspace(2)* %184, !tbaa !0
>  %186 = fmul float %185, %105
>  %187 = fadd float %183, %186
>  %188 = getelementptr float addrspace(2)* %146, i32 11
>  %189 = load float addrspace(2)* %188, !tbaa !0
>  %190 = fmul float %189, %118
>  %191 = fadd float %187, %190
>  %192 = getelementptr float addrspace(2)* %146, i32 12
>  %193 = load float addrspace(2)* %192, !tbaa !0
>  %194 = fmul float %193, %91
>  %195 = getelementptr float addrspace(2)* %146, i32 13
>  %196 = load float addrspace(2)* %195, !tbaa !0
>  %197 = fmul float %196, %98
>  %198 = fadd float %194, %197
>  %199 = getelementptr float addrspace(2)* %146, i32 14
>  %200 = load float addrspace(2)* %199, !tbaa !0
>  %201 = fmul float %200, %105
>  %202 = fadd float %198, %201
>  %203 = getelementptr float addrspace(2)* %146, i32 15
>  %204 = load float addrspace(2)* %203, !tbaa !0
>  %205 = fmul float %204, %118
>  %206 = fadd float %202, %205
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %161, float %176, float %191, float %206)
>  %207 = getelementptr float addrspace(2)* %146, i32 16
>  %208 = load float addrspace(2)* %207, !tbaa !0
>  %209 = fmul float %208, %91
>  %210 = getelementptr float addrspace(2)* %146, i32 17
>  %211 = load float addrspace(2)* %210, !tbaa !0
>  %212 = fmul float %211, %98
>  %213 = fadd float %209, %212
>  %214 = getelementptr float addrspace(2)* %146, i32 18
>  %215 = load float addrspace(2)* %214, !tbaa !0
>  %216 = fmul float %215, %105
>  %217 = fadd float %213, %216
>  %218 = getelementptr float addrspace(2)* %146, i32 19
>  %219 = load float addrspace(2)* %218, !tbaa !0
>  %220 = fmul float %219, %118
>  %221 = fadd float %217, %220
>  %222 = getelementptr float addrspace(2)* %146, i32 20
>  %223 = load float addrspace(2)* %222, !tbaa !0
>  %224 = fmul float %223, %91
>  %225 = getelementptr float addrspace(2)* %146, i32 21
>  %226 = load float addrspace(2)* %225, !tbaa !0
>  %227 = fmul float %226, %98
>  %228 = fadd float %224, %227
>  %229 = getelementptr float addrspace(2)* %146, i32 22
>  %230 = load float addrspace(2)* %229, !tbaa !0
>  %231 = fmul float %230, %105
>  %232 = fadd float %228, %231
>  %233 = getelementptr float addrspace(2)* %146, i32 23
>  %234 = load float addrspace(2)* %233, !tbaa !0
>  %235 = fmul float %234, %118
>  %236 = fadd float %232, %235
>  %237 = getelementptr float addrspace(2)* %146, i32 24
>  %238 = load float addrspace(2)* %237, !tbaa !0
>  %239 = fmul float %238, %91
>  %240 = getelementptr float addrspace(2)* %146, i32 25
>  %241 = load float addrspace(2)* %240, !tbaa !0
>  %242 = fmul float %241, %98
>  %243 = fadd float %239, %242
>  %244 = getelementptr float addrspace(2)* %146, i32 26
>  %245 = load float addrspace(2)* %244, !tbaa !0
>  %246 = fmul float %245, %105
>  %247 = fadd float %243, %246
>  %248 = getelementptr float addrspace(2)* %146, i32 27
>  %249 = load float addrspace(2)* %248, !tbaa !0
>  %250 = fmul float %249, %118
>  %251 = fadd float %247, %250
>  %252 = getelementptr float addrspace(2)* %146, i32 28
>  %253 = load float addrspace(2)* %252, !tbaa !0
>  %254 = fmul float %253, %91
>  %255 = getelementptr float addrspace(2)* %146, i32 29
>  %256 = load float addrspace(2)* %255, !tbaa !0
>  %257 = fmul float %256, %98
>  %258 = fadd float %254, %257
>  %259 = getelementptr float addrspace(2)* %146, i32 30
>  %260 = load float addrspace(2)* %259, !tbaa !0
>  %261 = fmul float %260, %105
>  %262 = fadd float %258, %261
>  %263 = getelementptr float addrspace(2)* %146, i32 31
>  %264 = load float addrspace(2)* %263, !tbaa !0
>  %265 = fmul float %264, %118
>  %266 = fadd float %262, %265
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %221, float %236, float %251, float %266)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %130, float %133, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %130, float %134, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %131, float %133, float %133, float %134)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %131, float %134, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %135, float %136, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %142, float %144, float %139, float %118)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840700
>bf8c007f
>e00c2000
>80020400
>c0410100
>bf8c0070
>c0020311
>bf8c007f
>10020a04
>c0020310
>bf8c007f
>d2820001
>04040904
>c0020312
>bf8c007f
>d2820001
>04040906
>c0020313
>bf8c007f
>d2820001
>04040907
>c0020315
>bf8c007f
>10040a04
>c0020314
>bf8c007f
>d2820002
>04080904
>c0020316
>bf8c007f
>d2820002
>04080906
>c0020317
>bf8c007f
>d2820002
>04080907
>c0400102
>bf8c007f
>c002010d
>bf8c007f
>10060404
>c002010c
>bf8c007f
>d2820008
>040e0204
>c0020319
>bf8c007f
>10060a04
>c0020318
>bf8c007f
>d2820003
>040c0904
>c002031a
>bf8c007f
>d2820003
>040c0906
>c002031b
>bf8c007f
>d2820003
>040c0907
>c002010e
>bf8c007f
>d2820008
>04220604
>c002031d
>bf8c007f
>10120a04
>c002031c
>bf8c007f
>d2820009
>04240904
>c002031e
>bf8c007f
>d2820009
>04240906
>c002031f
>bf8c007f
>d2820004
>04240907
>c002010f
>bf8c007f
>d2820005
>04220804
>c0020109
>bf8c007f
>100c0404
>c0020108
>bf8c007f
>d2820006
>041a0204
>c002010a
>bf8c007f
>d2820006
>041a0604
>c002010b
>bf8c007f
>d2820006
>041a0804
>c0020105
>bf8c007f
>100e0404
>c0020104
>bf8c007f
>d2820007
>041e0204
>c0020106
>bf8c007f
>d2820007
>041e0604
>c0020107
>bf8c007f
>d2820007
>041e0804
>c0020101
>bf8c007f
>10100404
>c0020100
>bf8c007f
>d2820008
>04220204
>c0020102
>bf8c007f
>d2820008
>04220604
>c0020103
>bf8c007f
>d2820008
>04220804
>f80000ef
>05060708
>c002011d
>bf8c000f
>100a0404
>c002011c
>bf8c007f
>d2820005
>04160204
>c002011e
>bf8c007f
>d2820005
>04160604
>c002011f
>bf8c007f
>d2820005
>04160804
>c0020119
>bf8c007f
>100c0404
>c0020118
>bf8c007f
>d2820006
>041a0204
>c002011a
>bf8c007f
>d2820006
>041a0604
>c002011b
>bf8c007f
>d2820006
>041a0804
>c0020115
>bf8c007f
>100e0404
>c0020114
>bf8c007f
>d2820007
>041e0204
>c0020116
>bf8c007f
>d2820007
>041e0604
>c0020117
>bf8c007f
>d2820007
>041e0804
>c0020111
>bf8c007f
>10100404
>c0020110
>bf8c007f
>d2820008
>04220204
>c0020112
>bf8c007f
>d2820008
>04220604
>c0000113
>bf8c007f
>d2820008
>04220800
>f80000ff
>05060708
>c0820704
>bf8c000f
>e00c2000
>80010600
>c0000301
>c0008300
>bf8c0070
>7e000201
>d2820005
>04000107
>d282000a
>04000106
>c00203c8
>bf8c007f
>10001404
>c00203c9
>bf8c007f
>d2820000
>04000905
>7e160200
>d2820007
>042c0306
>c00003cb
>bf8c007f
>d2820006
>04000107
>c00003c1
>bf8c007f
>0a000c00
>c00083c4
>bf8c007f
>10101401
>c00083c5
>bf8c007f
>d2820005
>04200305
>c00083c7
>bf8c007f
>d2820008
>04140307
>c00083c0
>bf8c007f
>0a0a1001
>7e0e0280
>f800020f
>07070005
>060c0c00
>f800021f
>07070605
>06101001
>f800022f
>06000008
>f800023f
>07070608
>c00003c3
>bf8c000f
>10000000
>c00003c2
>bf8c007f
>100a0a00
>f800024f
>07070005
>c00003cc
>bf8c000f
>d2820000
>04060800
>c0000302
>bf8c007f
>10020600
>08020901
>c00003cd
>bf8c007f
>10060800
>08040503
>f80008cf
>04010200
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL IN[2], GENERIC[21], PERSPECTIVE
>DCL IN[3], GENERIC[22], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL CONST[0..30]
>DCL TEMP[0..5], LOCAL
>DCL TEMP[6], ARRAY(1), LOCAL
>IMM[0] FLT32 {    0.0000,     1.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MAD TEMP[1].x, CONST[12].xxxx, CONST[21].yyyy, -IN[3].zzzz
>  3: MAD TEMP[2].x, CONST[12].xxxx, CONST[20].zzzz, -IN[3].zzzz
>  4: RCP TEMP[3].x, TEMP[2].xxxx
>  5: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
>  6: MUL TEMP[3].x, TEMP[1].xxxx, TEMP[3].xxxx
>  7: MOV_SAT TEMP[3].x, TEMP[3].xxxx
>  8: SGE TEMP[2].x, -TEMP[2].xxxx, IMM[0].xxxx
>  9: F2I TEMP[2].x, -TEMP[2]
> 10: UIF TEMP[2].xxxx :0
> 11:   MOV TEMP[2].x, IMM[0].yyyy
> 12: ELSE :0
> 13:   MOV TEMP[2].x, TEMP[3].xxxx
> 14: ENDIF
> 15: MUL TEMP[3].x, IN[2].zzzz, CONST[21].wwww
> 16: MAD TEMP[2].x, TEMP[3].xxxx, TEMP[2].xxxx, -CONST[21].xxxx
> 17: MIN TEMP[2].x, TEMP[2].xxxx, CONST[21].zzzz
> 18: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 19: MAD TEMP[3].x, TEMP[2].xxxx, -TEMP[2].xxxx, TEMP[2].xxxx
> 20: MUL TEMP[3].x, TEMP[3].xxxx, CONST[12].xxxx
> 21: MAD TEMP[3].x, TEMP[2].xxxx, TEMP[2].xxxx, TEMP[3].xxxx
> 22: MUL TEMP[4].x, TEMP[0].wwww, CONST[1].wwww
> 23: MAD TEMP[5].x, TEMP[4].xxxx, IN[1].wwww, -TEMP[4].xxxx
> 24: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[1].xyzz
> 25: MAD TEMP[4].x, CONST[12].wwww, TEMP[5].xxxx, TEMP[4].xxxx
> 26: MAD TEMP[1].xyz, TEMP[0].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 27: ADD TEMP[2].x, TEMP[2].xxxx, -TEMP[4].xxxx
> 28: MAD TEMP[2].x, CONST[12].zzzz, TEMP[2].xxxx, TEMP[4].xxxx
> 29: MUL TEMP[1].xyz, TEMP[3].xxxx, TEMP[1].xyzz
> 30: MAD TEMP[3].x, IN[2].zzzz, CONST[29].wwww, -TEMP[2].xxxx
> 31: MAD TEMP[0].xyz, TEMP[0].xyzz, CONST[30].xxxx, TEMP[1].xyzz
> 32: MAD TEMP[1].x, CONST[12].yyyy, TEMP[3].xxxx, TEMP[2].xxxx
> 33: MOV TEMP[0].w, TEMP[1].xxxx
> 34: MOV TEMP[6], TEMP[0]
> 35: MOV OUT[0], TEMP[6]
> 36: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 4
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 5
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 6
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 7
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 48
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 49
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 50
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 51
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 82
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 84
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 85
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr float addrspace(2)* %21, i32 86
>  %45 = load float addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr float addrspace(2)* %21, i32 87
>  %47 = load float addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr float addrspace(2)* %21, i32 116
>  %49 = load float addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr float addrspace(2)* %21, i32 117
>  %51 = load float addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr float addrspace(2)* %21, i32 118
>  %53 = load float addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr float addrspace(2)* %21, i32 119
>  %55 = load float addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr float addrspace(2)* %21, i32 120
>  %57 = load float addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %59 = load <32 x i8> addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %61 = load <16 x i8> addrspace(2)* %60, !tbaa !0
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %64 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %3, <2 x i32> %5)
>  %65 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %3, <2 x i32> %5)
>  %66 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %3, <2 x i32> %5)
>  %67 = bitcast float %62 to i32
>  %68 = bitcast float %63 to i32
>  %69 = insertelement <2 x i32> undef, i32 %67, i32 0
>  %70 = insertelement <2 x i32> %69, i32 %68, i32 1
>  %71 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %70, <32 x i8> %59, <16 x i8> %61, i32 2)
>  %72 = extractelement <4 x float> %71, i32 0
>  %73 = extractelement <4 x float> %71, i32 1
>  %74 = extractelement <4 x float> %71, i32 2
>  %75 = extractelement <4 x float> %71, i32 3
>  %76 = fsub float -0.000000e+00, %66
>  %77 = fmul float %31, %43
>  %78 = fadd float %77, %76
>  %79 = fsub float -0.000000e+00, %66
>  %80 = fmul float %31, %39
>  %81 = fadd float %80, %79
>  %82 = fdiv float 1.000000e+00, %81
>  %83 = fmul float %81, %81
>  %84 = fmul float %78, %82
>  %85 = call float @llvm.AMDIL.clamp.(float %84, float 0.000000e+00, float 1.000000e+00)
>  %86 = fsub float -0.000000e+00, %83
>  %87 = fcmp uge float %86, 0.000000e+00
>  %88 = select i1 %87, float 1.000000e+00, float 0.000000e+00
>  %89 = fsub float -0.000000e+00, %88
>  %90 = fptosi float %89 to i32
>  %91 = bitcast i32 %90 to float
>  %92 = bitcast float %91 to i32
>  %93 = icmp ne i32 %92, 0
>  %. = select i1 %93, float 1.000000e+00, float %85
>  %94 = fmul float %65, %47
>  %95 = fsub float -0.000000e+00, %41
>  %96 = fmul float %94, %.
>  %97 = fadd float %96, %95
>  %98 = fcmp uge float %97, %45
>  %99 = select i1 %98, float %45, float %97
>  %100 = call float @llvm.AMDIL.clamp.(float %99, float 0.000000e+00, float 1.000000e+00)
>  %101 = fsub float -0.000000e+00, %100
>  %102 = fmul float %100, %101
>  %103 = fadd float %102, %100
>  %104 = fmul float %103, %31
>  %105 = fmul float %100, %100
>  %106 = fadd float %105, %104
>  %107 = fmul float %75, %29
>  %108 = fsub float -0.000000e+00, %107
>  %109 = fmul float %107, %64
>  %110 = fadd float %109, %108
>  %111 = fmul float %72, %23
>  %112 = fmul float %73, %25
>  %113 = fmul float %74, %27
>  %114 = fmul float %37, %110
>  %115 = fadd float %114, %107
>  %116 = fsub float -0.000000e+00, %57
>  %117 = fmul float %111, %116
>  %118 = fadd float %117, %49
>  %119 = fsub float -0.000000e+00, %57
>  %120 = fmul float %112, %119
>  %121 = fadd float %120, %51
>  %122 = fsub float -0.000000e+00, %57
>  %123 = fmul float %113, %122
>  %124 = fadd float %123, %53
>  %125 = fsub float -0.000000e+00, %115
>  %126 = fadd float %100, %125
>  %127 = fmul float %35, %126
>  %128 = fadd float %127, %115
>  %129 = fmul float %106, %118
>  %130 = fmul float %106, %121
>  %131 = fmul float %106, %124
>  %132 = fsub float -0.000000e+00, %128
>  %133 = fmul float %65, %55
>  %134 = fadd float %133, %132
>  %135 = fmul float %111, %57
>  %136 = fadd float %135, %129
>  %137 = fmul float %112, %57
>  %138 = fadd float %137, %130
>  %139 = fmul float %113, %57
>  %140 = fadd float %139, %131
>  %141 = fmul float %33, %134
>  %142 = fadd float %141, %128
>  %143 = fcmp uge float %142, 0x3FE6565660000000
>  %144 = sext i1 %143 to i32
>  %145 = trunc i32 %144 to i1
>  %146 = select i1 %145, float 1.000000e+00, float -1.000000e+00
>  call void @llvm.AMDGPU.kill(float %146)
>  %147 = call i32 @llvm.SI.packf16(float %136, float %138)
>  %148 = bitcast i32 %147 to float
>  %149 = call i32 @llvm.SI.packf16(float %140, float %142)
>  %150 = bitcast i32 %149 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %148, float %150, float %148, float %150)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.AMDGPU.kill(float)
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430202
>c0400100
>bf8c0070
>c0010107
>bf8c007f
>100c0a02
>c81c0700
>c81d0701
>100e0f06
>080e0d07
>c0010133
>bf8c007f
>d2820006
>041a0e02
>c81c0e00
>c81d0e01
>c0010130
>c0018155
>bf8c007f
>7e100203
>d2100008
>02021002
>08100f08
>c0018152
>bf8c007f
>7e120203
>d2100009
>02021202
>08120f09
>7e0e5509
>100e0f08
>d2060807
>02010107
>10101309
>d2060008
>22010108
>d00c0004
>02010108
>d2000008
>0011e480
>d2060008
>22010108
>7e101108
>d10a0004
>02010108
>d2000008
>0011e507
>c81c0a00
>c81d0a01
>c0018157
>bf8c007f
>10000e03
>10001100
>c0018154
>bf8c007f
>0a000003
>c0018156
>bf8c007f
>d00c0004
>02000700
>7e020203
>d2000000
>00120300
>d2060800
>02010100
>08020d00
>c0018132
>bf8c007f
>d2820001
>041a0203
>c0018177
>bf8c007f
>100c0e03
>080c0306
>c0018131
>bf8c007f
>d2820001
>04060c03
>7e0c02ff
>3f32b2b3
>d00c0004
>02020d01
>d2000006
>0011e4f3
>7c260c80
>100c0100
>080c0d00
>100c0c02
>d2820000
>041a0100
>c0010106
>bf8c007f
>100c0802
>c0010178
>bf8c007f
>100e0c02
>c0018176
>bf8c007f
>080e0e03
>100e0f00
>d2820006
>041c0506
>5e020306
>c0018105
>bf8c007f
>100c0603
>100e0c02
>c0018175
>bf8c007f
>080e0e03
>100e0f00
>d2820006
>041c0506
>c0018104
>bf8c007f
>10040403
>10060402
>c0000174
>bf8c007f
>08060600
>10000700
>d2820000
>04000502
>5e000d00
>f8001c0f
>01000100
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL IN[2], GENERIC[21], PERSPECTIVE
>DCL IN[3], GENERIC[22], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL CONST[0..30]
>DCL TEMP[0..5], LOCAL
>DCL TEMP[6], ARRAY(1), LOCAL
>IMM[0] FLT32 {    0.0000,     1.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MAD TEMP[1].x, CONST[12].xxxx, CONST[21].yyyy, -IN[3].zzzz
>  3: MAD TEMP[2].x, CONST[12].xxxx, CONST[20].zzzz, -IN[3].zzzz
>  4: RCP TEMP[3].x, TEMP[2].xxxx
>  5: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
>  6: MUL TEMP[3].x, TEMP[1].xxxx, TEMP[3].xxxx
>  7: MOV_SAT TEMP[3].x, TEMP[3].xxxx
>  8: SGE TEMP[2].x, -TEMP[2].xxxx, IMM[0].xxxx
>  9: F2I TEMP[2].x, -TEMP[2]
> 10: UIF TEMP[2].xxxx :0
> 11:   MOV TEMP[2].x, IMM[0].yyyy
> 12: ELSE :0
> 13:   MOV TEMP[2].x, TEMP[3].xxxx
> 14: ENDIF
> 15: MUL TEMP[3].x, IN[2].zzzz, CONST[21].wwww
> 16: MAD TEMP[2].x, TEMP[3].xxxx, TEMP[2].xxxx, -CONST[21].xxxx
> 17: MIN TEMP[2].x, TEMP[2].xxxx, CONST[21].zzzz
> 18: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 19: MAD TEMP[3].x, TEMP[2].xxxx, -TEMP[2].xxxx, TEMP[2].xxxx
> 20: MUL TEMP[3].x, TEMP[3].xxxx, CONST[12].xxxx
> 21: MAD TEMP[3].x, TEMP[2].xxxx, TEMP[2].xxxx, TEMP[3].xxxx
> 22: MUL TEMP[4].x, TEMP[0].wwww, CONST[1].wwww
> 23: MAD TEMP[5].x, TEMP[4].xxxx, IN[1].wwww, -TEMP[4].xxxx
> 24: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[1].xyzz
> 25: MAD TEMP[4].x, CONST[12].wwww, TEMP[5].xxxx, TEMP[4].xxxx
> 26: MAD TEMP[1].xyz, TEMP[0].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 27: ADD TEMP[2].x, TEMP[2].xxxx, -TEMP[4].xxxx
> 28: MAD TEMP[2].x, CONST[12].zzzz, TEMP[2].xxxx, TEMP[4].xxxx
> 29: MUL TEMP[1].xyz, TEMP[3].xxxx, TEMP[1].xyzz
> 30: MAD TEMP[3].x, IN[2].zzzz, CONST[29].wwww, -TEMP[2].xxxx
> 31: MAD TEMP[0].xyz, TEMP[0].xyzz, CONST[30].xxxx, TEMP[1].xyzz
> 32: MAD TEMP[1].x, CONST[12].yyyy, TEMP[3].xxxx, TEMP[2].xxxx
> 33: MOV TEMP[0].w, TEMP[1].xxxx
> 34: MOV TEMP[6], TEMP[0]
> 35: MOV OUT[0], TEMP[6]
> 36: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 4
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 5
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 6
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 7
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 48
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 49
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 50
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 51
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 82
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 84
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 85
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr float addrspace(2)* %21, i32 86
>  %45 = load float addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr float addrspace(2)* %21, i32 87
>  %47 = load float addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr float addrspace(2)* %21, i32 116
>  %49 = load float addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr float addrspace(2)* %21, i32 117
>  %51 = load float addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr float addrspace(2)* %21, i32 118
>  %53 = load float addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr float addrspace(2)* %21, i32 119
>  %55 = load float addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr float addrspace(2)* %21, i32 120
>  %57 = load float addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %59 = load <32 x i8> addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %61 = load <16 x i8> addrspace(2)* %60, !tbaa !0
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %64 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %3, <2 x i32> %5)
>  %65 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %3, <2 x i32> %5)
>  %66 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %3, <2 x i32> %5)
>  %67 = bitcast float %62 to i32
>  %68 = bitcast float %63 to i32
>  %69 = insertelement <2 x i32> undef, i32 %67, i32 0
>  %70 = insertelement <2 x i32> %69, i32 %68, i32 1
>  %71 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %70, <32 x i8> %59, <16 x i8> %61, i32 2)
>  %72 = extractelement <4 x float> %71, i32 0
>  %73 = extractelement <4 x float> %71, i32 1
>  %74 = extractelement <4 x float> %71, i32 2
>  %75 = extractelement <4 x float> %71, i32 3
>  %76 = fsub float -0.000000e+00, %66
>  %77 = fmul float %31, %43
>  %78 = fadd float %77, %76
>  %79 = fsub float -0.000000e+00, %66
>  %80 = fmul float %31, %39
>  %81 = fadd float %80, %79
>  %82 = fdiv float 1.000000e+00, %81
>  %83 = fmul float %81, %81
>  %84 = fmul float %78, %82
>  %85 = call float @llvm.AMDIL.clamp.(float %84, float 0.000000e+00, float 1.000000e+00)
>  %86 = fsub float -0.000000e+00, %83
>  %87 = fcmp uge float %86, 0.000000e+00
>  %88 = select i1 %87, float 1.000000e+00, float 0.000000e+00
>  %89 = fsub float -0.000000e+00, %88
>  %90 = fptosi float %89 to i32
>  %91 = bitcast i32 %90 to float
>  %92 = bitcast float %91 to i32
>  %93 = icmp ne i32 %92, 0
>  %. = select i1 %93, float 1.000000e+00, float %85
>  %94 = fmul float %65, %47
>  %95 = fsub float -0.000000e+00, %41
>  %96 = fmul float %94, %.
>  %97 = fadd float %96, %95
>  %98 = fcmp uge float %97, %45
>  %99 = select i1 %98, float %45, float %97
>  %100 = call float @llvm.AMDIL.clamp.(float %99, float 0.000000e+00, float 1.000000e+00)
>  %101 = fsub float -0.000000e+00, %100
>  %102 = fmul float %100, %101
>  %103 = fadd float %102, %100
>  %104 = fmul float %103, %31
>  %105 = fmul float %100, %100
>  %106 = fadd float %105, %104
>  %107 = fmul float %75, %29
>  %108 = fsub float -0.000000e+00, %107
>  %109 = fmul float %107, %64
>  %110 = fadd float %109, %108
>  %111 = fmul float %72, %23
>  %112 = fmul float %73, %25
>  %113 = fmul float %74, %27
>  %114 = fmul float %37, %110
>  %115 = fadd float %114, %107
>  %116 = fsub float -0.000000e+00, %57
>  %117 = fmul float %111, %116
>  %118 = fadd float %117, %49
>  %119 = fsub float -0.000000e+00, %57
>  %120 = fmul float %112, %119
>  %121 = fadd float %120, %51
>  %122 = fsub float -0.000000e+00, %57
>  %123 = fmul float %113, %122
>  %124 = fadd float %123, %53
>  %125 = fsub float -0.000000e+00, %115
>  %126 = fadd float %100, %125
>  %127 = fmul float %35, %126
>  %128 = fadd float %127, %115
>  %129 = fmul float %106, %118
>  %130 = fmul float %106, %121
>  %131 = fmul float %106, %124
>  %132 = fsub float -0.000000e+00, %128
>  %133 = fmul float %65, %55
>  %134 = fadd float %133, %132
>  %135 = fmul float %111, %57
>  %136 = fadd float %135, %129
>  %137 = fmul float %112, %57
>  %138 = fadd float %137, %130
>  %139 = fmul float %113, %57
>  %140 = fadd float %139, %131
>  %141 = fmul float %33, %134
>  %142 = fadd float %141, %128
>  %143 = call i32 @llvm.SI.packf16(float %136, float %138)
>  %144 = bitcast i32 %143 to float
>  %145 = call i32 @llvm.SI.packf16(float %140, float %142)
>  %146 = bitcast i32 %145 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %144, float %146, float %144, float %146)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430202
>c0400100
>bf8c0070
>c0010107
>bf8c007f
>100c0a02
>c81c0700
>c81d0701
>100e0f06
>080e0d07
>c0010133
>bf8c007f
>d2820006
>041a0e02
>c81c0e00
>c81d0e01
>c0010130
>c0018155
>bf8c007f
>7e100203
>d2100008
>02021002
>08100f08
>c0018152
>bf8c007f
>7e120203
>d2100009
>02021202
>08120f09
>7e0e5509
>100e0f08
>d2060807
>02010107
>10101309
>d2060008
>22010108
>d00c0004
>02010108
>d2000008
>0011e480
>d2060008
>22010108
>7e101108
>d10a0004
>02010108
>d2000008
>0011e507
>c81c0a00
>c81d0a01
>c0018157
>bf8c007f
>10000e03
>10001100
>c0018154
>bf8c007f
>0a000003
>c0018156
>bf8c007f
>d00c0004
>02000700
>7e020203
>d2000000
>00120300
>d2060800
>02010100
>08020d00
>c0018132
>bf8c007f
>d2820001
>041a0203
>c0018177
>bf8c007f
>100c0e03
>080c0306
>c0018131
>bf8c007f
>d2820001
>04060c03
>100c0100
>080c0d00
>100c0c02
>d2820000
>041a0100
>c0010106
>bf8c007f
>100c0802
>c0010178
>bf8c007f
>100e0c02
>c0018176
>bf8c007f
>080e0e03
>100e0f00
>d2820006
>041c0506
>5e020306
>c0018105
>bf8c007f
>100c0603
>100e0c02
>c0018175
>bf8c007f
>080e0e03
>100e0f00
>d2820006
>041c0506
>c0018104
>bf8c007f
>10040403
>10060402
>c0000174
>bf8c007f
>08060600
>10000700
>d2820000
>04000502
>5e000d00
>f8001c0f
>01000100
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL OUT[3], GENERIC[20]
>DCL OUT[4], GENERIC[21]
>DCL OUT[5], GENERIC[22]
>DCL CONST[0..57]
>DCL TEMP[0..6], LOCAL
>  0: DP4 TEMP[0].x, IN[1], CONST[48]
>  1: DP4 TEMP[1].x, IN[1], CONST[49]
>  2: MOV TEMP[0].y, TEMP[1].xxxx
>  3: MAD TEMP[2].xyz, IN[2].xyzz, CONST[3].xxxx, IN[0].xyzz
>  4: MOV TEMP[2].w, IN[0].wwww
>  5: DP4 TEMP[1].x, TEMP[2], CONST[54]
>  6: DP4 TEMP[3].x, TEMP[2], CONST[55]
>  7: MOV TEMP[1].y, TEMP[3].xxxx
>  8: DP4 TEMP[3].x, TEMP[2], CONST[56]
>  9: MOV TEMP[1].z, TEMP[3].xxxx
> 10: MOV TEMP[1].w, CONST[0].yyyy
> 11: DP4 TEMP[3].x, TEMP[1], CONST[10]
> 12: MOV TEMP[2].z, TEMP[3].xxxx
> 13: DP4 TEMP[2].x, TEMP[1], CONST[8]
> 14: DP4 TEMP[3].x, TEMP[1], CONST[9]
> 15: MOV TEMP[2].y, TEMP[3].xxxx
> 16: DP4 TEMP[3].x, TEMP[1], CONST[11]
> 17: MOV TEMP[2].w, TEMP[3].xxxx
> 18: DP4 TEMP[3].x, TEMP[1], CONST[13]
> 19: MOV TEMP[4].z, TEMP[3].xxxx
> 20: MOV TEMP[1].xyz, TEMP[1].xyzx
> 21: MOV TEMP[5], TEMP[2]
> 22: MOV TEMP[6].xy, TEMP[2].xyxx
> 23: MOV TEMP[6].zw, TEMP[4].wwzw
> 24: MOV TEMP[1].w, TEMP[3].xxxx
> 25: MOV TEMP[3], TEMP[5]
> 26: MAD TEMP[4].x, TEMP[2].zzzz, CONST[0].zzzz, -TEMP[2].wwww
> 27: MOV TEMP[5].z, TEMP[4].xxxx
> 28: MOV TEMP[5].y, -TEMP[2].yyyy
> 29: MAD TEMP[5].xy, CONST[57].xyyy, TEMP[2].wwww, TEMP[5].xyyy
> 30: MOV OUT[2], TEMP[0]
> 31: MOV OUT[3], CONST[0].xxxx
> 32: MOV OUT[0], TEMP[5]
> 33: MOV OUT[1], TEMP[3]
> 34: MOV OUT[4], TEMP[6]
> 35: MOV OUT[5], TEMP[1]
> 36: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 12
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 32
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 33
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 34
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 35
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 36
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 37
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 38
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 39
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 40
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 41
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 42
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 43
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 44
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 45
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 46
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 47
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 52
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 53
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 54
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 55
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 192
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 193
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 194
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 195
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 196
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 197
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 198
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 199
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 216
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 217
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 218
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 219
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 220
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 221
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 222
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 223
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 224
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 225
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr float addrspace(2)* %10, i32 226
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = getelementptr float addrspace(2)* %10, i32 227
>  %98 = load float addrspace(2)* %97, !tbaa !0
>  %99 = getelementptr float addrspace(2)* %10, i32 228
>  %100 = load float addrspace(2)* %99, !tbaa !0
>  %101 = getelementptr float addrspace(2)* %10, i32 229
>  %102 = load float addrspace(2)* %101, !tbaa !0
>  %103 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %104 = load <16 x i8> addrspace(2)* %103, !tbaa !0
>  %105 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %104, i32 0, i32 %5)
>  %106 = extractelement <4 x float> %105, i32 0
>  %107 = extractelement <4 x float> %105, i32 1
>  %108 = extractelement <4 x float> %105, i32 2
>  %109 = extractelement <4 x float> %105, i32 3
>  %110 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %111 = load <16 x i8> addrspace(2)* %110, !tbaa !0
>  %112 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %111, i32 0, i32 %5)
>  %113 = extractelement <4 x float> %112, i32 0
>  %114 = extractelement <4 x float> %112, i32 1
>  %115 = extractelement <4 x float> %112, i32 2
>  %116 = extractelement <4 x float> %112, i32 3
>  %117 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %118 = load <16 x i8> addrspace(2)* %117, !tbaa !0
>  %119 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %118, i32 0, i32 %5)
>  %120 = extractelement <4 x float> %119, i32 0
>  %121 = extractelement <4 x float> %119, i32 1
>  %122 = extractelement <4 x float> %119, i32 2
>  %123 = fmul float %113, %60
>  %124 = fmul float %114, %62
>  %125 = fadd float %123, %124
>  %126 = fmul float %115, %64
>  %127 = fadd float %125, %126
>  %128 = fmul float %116, %66
>  %129 = fadd float %127, %128
>  %130 = fmul float %113, %68
>  %131 = fmul float %114, %70
>  %132 = fadd float %130, %131
>  %133 = fmul float %115, %72
>  %134 = fadd float %132, %133
>  %135 = fmul float %116, %74
>  %136 = fadd float %134, %135
>  %137 = fmul float %120, %18
>  %138 = fadd float %137, %106
>  %139 = fmul float %121, %18
>  %140 = fadd float %139, %107
>  %141 = fmul float %122, %18
>  %142 = fadd float %141, %108
>  %143 = fmul float %138, %76
>  %144 = fmul float %140, %78
>  %145 = fadd float %143, %144
>  %146 = fmul float %142, %80
>  %147 = fadd float %145, %146
>  %148 = fmul float %109, %82
>  %149 = fadd float %147, %148
>  %150 = fmul float %138, %84
>  %151 = fmul float %140, %86
>  %152 = fadd float %150, %151
>  %153 = fmul float %142, %88
>  %154 = fadd float %152, %153
>  %155 = fmul float %109, %90
>  %156 = fadd float %154, %155
>  %157 = fmul float %138, %92
>  %158 = fmul float %140, %94
>  %159 = fadd float %157, %158
>  %160 = fmul float %142, %96
>  %161 = fadd float %159, %160
>  %162 = fmul float %109, %98
>  %163 = fadd float %161, %162
>  %164 = fmul float %149, %36
>  %165 = fmul float %156, %38
>  %166 = fadd float %164, %165
>  %167 = fmul float %163, %40
>  %168 = fadd float %166, %167
>  %169 = fmul float %14, %42
>  %170 = fadd float %168, %169
>  %171 = fmul float %149, %20
>  %172 = fmul float %156, %22
>  %173 = fadd float %171, %172
>  %174 = fmul float %163, %24
>  %175 = fadd float %173, %174
>  %176 = fmul float %14, %26
>  %177 = fadd float %175, %176
>  %178 = fmul float %149, %28
>  %179 = fmul float %156, %30
>  %180 = fadd float %178, %179
>  %181 = fmul float %163, %32
>  %182 = fadd float %180, %181
>  %183 = fmul float %14, %34
>  %184 = fadd float %182, %183
>  %185 = fmul float %149, %44
>  %186 = fmul float %156, %46
>  %187 = fadd float %185, %186
>  %188 = fmul float %163, %48
>  %189 = fadd float %187, %188
>  %190 = fmul float %14, %50
>  %191 = fadd float %189, %190
>  %192 = fmul float %149, %52
>  %193 = fmul float %156, %54
>  %194 = fadd float %192, %193
>  %195 = fmul float %163, %56
>  %196 = fadd float %194, %195
>  %197 = fmul float %14, %58
>  %198 = fadd float %196, %197
>  %199 = fsub float -0.000000e+00, %191
>  %200 = fmul float %170, %16
>  %201 = fadd float %200, %199
>  %202 = fsub float -0.000000e+00, %184
>  %203 = fmul float %100, %191
>  %204 = fadd float %203, %177
>  %205 = fmul float %102, %191
>  %206 = fadd float %205, %202
>  %207 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %208 = load float addrspace(2)* addrspace(2)* %207, !tbaa !0
>  %209 = getelementptr float addrspace(2)* %208, i32 0
>  %210 = load float addrspace(2)* %209, !tbaa !0
>  %211 = fmul float %210, %177
>  %212 = getelementptr float addrspace(2)* %208, i32 1
>  %213 = load float addrspace(2)* %212, !tbaa !0
>  %214 = fmul float %213, %184
>  %215 = fadd float %211, %214
>  %216 = getelementptr float addrspace(2)* %208, i32 2
>  %217 = load float addrspace(2)* %216, !tbaa !0
>  %218 = fmul float %217, %170
>  %219 = fadd float %215, %218
>  %220 = getelementptr float addrspace(2)* %208, i32 3
>  %221 = load float addrspace(2)* %220, !tbaa !0
>  %222 = fmul float %221, %191
>  %223 = fadd float %219, %222
>  %224 = getelementptr float addrspace(2)* %208, i32 4
>  %225 = load float addrspace(2)* %224, !tbaa !0
>  %226 = fmul float %225, %177
>  %227 = getelementptr float addrspace(2)* %208, i32 5
>  %228 = load float addrspace(2)* %227, !tbaa !0
>  %229 = fmul float %228, %184
>  %230 = fadd float %226, %229
>  %231 = getelementptr float addrspace(2)* %208, i32 6
>  %232 = load float addrspace(2)* %231, !tbaa !0
>  %233 = fmul float %232, %170
>  %234 = fadd float %230, %233
>  %235 = getelementptr float addrspace(2)* %208, i32 7
>  %236 = load float addrspace(2)* %235, !tbaa !0
>  %237 = fmul float %236, %191
>  %238 = fadd float %234, %237
>  %239 = getelementptr float addrspace(2)* %208, i32 8
>  %240 = load float addrspace(2)* %239, !tbaa !0
>  %241 = fmul float %240, %177
>  %242 = getelementptr float addrspace(2)* %208, i32 9
>  %243 = load float addrspace(2)* %242, !tbaa !0
>  %244 = fmul float %243, %184
>  %245 = fadd float %241, %244
>  %246 = getelementptr float addrspace(2)* %208, i32 10
>  %247 = load float addrspace(2)* %246, !tbaa !0
>  %248 = fmul float %247, %170
>  %249 = fadd float %245, %248
>  %250 = getelementptr float addrspace(2)* %208, i32 11
>  %251 = load float addrspace(2)* %250, !tbaa !0
>  %252 = fmul float %251, %191
>  %253 = fadd float %249, %252
>  %254 = getelementptr float addrspace(2)* %208, i32 12
>  %255 = load float addrspace(2)* %254, !tbaa !0
>  %256 = fmul float %255, %177
>  %257 = getelementptr float addrspace(2)* %208, i32 13
>  %258 = load float addrspace(2)* %257, !tbaa !0
>  %259 = fmul float %258, %184
>  %260 = fadd float %256, %259
>  %261 = getelementptr float addrspace(2)* %208, i32 14
>  %262 = load float addrspace(2)* %261, !tbaa !0
>  %263 = fmul float %262, %170
>  %264 = fadd float %260, %263
>  %265 = getelementptr float addrspace(2)* %208, i32 15
>  %266 = load float addrspace(2)* %265, !tbaa !0
>  %267 = fmul float %266, %191
>  %268 = fadd float %264, %267
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %223, float %238, float %253, float %268)
>  %269 = getelementptr float addrspace(2)* %208, i32 16
>  %270 = load float addrspace(2)* %269, !tbaa !0
>  %271 = fmul float %270, %177
>  %272 = getelementptr float addrspace(2)* %208, i32 17
>  %273 = load float addrspace(2)* %272, !tbaa !0
>  %274 = fmul float %273, %184
>  %275 = fadd float %271, %274
>  %276 = getelementptr float addrspace(2)* %208, i32 18
>  %277 = load float addrspace(2)* %276, !tbaa !0
>  %278 = fmul float %277, %170
>  %279 = fadd float %275, %278
>  %280 = getelementptr float addrspace(2)* %208, i32 19
>  %281 = load float addrspace(2)* %280, !tbaa !0
>  %282 = fmul float %281, %191
>  %283 = fadd float %279, %282
>  %284 = getelementptr float addrspace(2)* %208, i32 20
>  %285 = load float addrspace(2)* %284, !tbaa !0
>  %286 = fmul float %285, %177
>  %287 = getelementptr float addrspace(2)* %208, i32 21
>  %288 = load float addrspace(2)* %287, !tbaa !0
>  %289 = fmul float %288, %184
>  %290 = fadd float %286, %289
>  %291 = getelementptr float addrspace(2)* %208, i32 22
>  %292 = load float addrspace(2)* %291, !tbaa !0
>  %293 = fmul float %292, %170
>  %294 = fadd float %290, %293
>  %295 = getelementptr float addrspace(2)* %208, i32 23
>  %296 = load float addrspace(2)* %295, !tbaa !0
>  %297 = fmul float %296, %191
>  %298 = fadd float %294, %297
>  %299 = getelementptr float addrspace(2)* %208, i32 24
>  %300 = load float addrspace(2)* %299, !tbaa !0
>  %301 = fmul float %300, %177
>  %302 = getelementptr float addrspace(2)* %208, i32 25
>  %303 = load float addrspace(2)* %302, !tbaa !0
>  %304 = fmul float %303, %184
>  %305 = fadd float %301, %304
>  %306 = getelementptr float addrspace(2)* %208, i32 26
>  %307 = load float addrspace(2)* %306, !tbaa !0
>  %308 = fmul float %307, %170
>  %309 = fadd float %305, %308
>  %310 = getelementptr float addrspace(2)* %208, i32 27
>  %311 = load float addrspace(2)* %310, !tbaa !0
>  %312 = fmul float %311, %191
>  %313 = fadd float %309, %312
>  %314 = getelementptr float addrspace(2)* %208, i32 28
>  %315 = load float addrspace(2)* %314, !tbaa !0
>  %316 = fmul float %315, %177
>  %317 = getelementptr float addrspace(2)* %208, i32 29
>  %318 = load float addrspace(2)* %317, !tbaa !0
>  %319 = fmul float %318, %184
>  %320 = fadd float %316, %319
>  %321 = getelementptr float addrspace(2)* %208, i32 30
>  %322 = load float addrspace(2)* %321, !tbaa !0
>  %323 = fmul float %322, %170
>  %324 = fadd float %320, %323
>  %325 = getelementptr float addrspace(2)* %208, i32 31
>  %326 = load float addrspace(2)* %325, !tbaa !0
>  %327 = fmul float %326, %191
>  %328 = fadd float %324, %327
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %283, float %298, float %313, float %328)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %129, float %136, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %12, float %12, float %12, float %12)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %177, float %184, float %198, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %149, float %156, float %163, float %198)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %204, float %206, float %201, float %191)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840700
>bf8c007f
>e00c2000
>80020300
>c0840708
>bf8c0070
>e00c2000
>80020900
>c0410100
>bf8c0070
>c002030c
>bf8c007f
>d2820007
>040c0909
>d2820008
>0410090a
>c00283d9
>bf8c007f
>10021005
>c00283d8
>bf8c007f
>d2820001
>04040b07
>d2820009
>0414090b
>c00203da
>bf8c007f
>d2820001
>04040909
>c00203db
>bf8c007f
>d2820001
>04040906
>c00203dd
>bf8c007f
>10041004
>c00203dc
>bf8c007f
>d2820002
>04080907
>c00203de
>bf8c007f
>d2820002
>04080909
>c00203df
>bf8c007f
>d2820002
>04080906
>c0020321
>bf8c007f
>10140404
>c0020320
>bf8c007f
>d282000a
>04280901
>c00203e1
>bf8c007f
>10101004
>c00203e0
>bf8c007f
>d2820007
>04200907
>c00203e2
>bf8c007f
>d2820007
>041c0909
>c00203e3
>bf8c007f
>d2820003
>041c0906
>c0020322
>bf8c007f
>d2820004
>04280903
>c0020301
>c0028323
>bf8c007f
>7e0a0205
>d2820004
>04120a04
>c0028325
>bf8c007f
>100a0405
>c0028324
>bf8c007f
>d2820005
>04140b01
>c0028326
>bf8c007f
>d2820005
>04140b03
>c0028327
>bf8c007f
>7e0c0205
>d2820005
>04160c04
>c0400102
>bf8c007f
>c002810d
>bf8c007f
>100c0a05
>c002810c
>bf8c007f
>d2820007
>041a0805
>c0028329
>bf8c007f
>100c0405
>c0028328
>bf8c007f
>d2820006
>04180b01
>c002832a
>bf8c007f
>d2820006
>04180b03
>c002832b
>bf8c007f
>7e100205
>d2820006
>041a1004
>c002810e
>bf8c007f
>d2820008
>041e0c05
>c002832d
>bf8c007f
>100e0405
>c002832c
>bf8c007f
>d2820007
>041c0b01
>c002832e
>bf8c007f
>d2820007
>041c0b03
>c002832f
>bf8c007f
>7e120205
>d2820007
>041e1204
>c002810f
>bf8c007f
>d2820008
>04220e05
>c0028109
>bf8c007f
>10120a05
>c0028108
>bf8c007f
>d2820009
>04260805
>c002810a
>bf8c007f
>d2820009
>04260c05
>c002810b
>bf8c007f
>d2820009
>04260e05
>c0028105
>bf8c007f
>10140a05
>c0028104
>bf8c007f
>d282000a
>042a0805
>c0028106
>bf8c007f
>d282000a
>042a0c05
>c0028107
>bf8c007f
>d282000a
>042a0e05
>c0028101
>bf8c007f
>10160a05
>c0028100
>bf8c007f
>d282000b
>042e0805
>c0028102
>bf8c007f
>d282000b
>042e0c05
>c0028103
>bf8c007f
>d282000b
>042e0e05
>f80000ef
>08090a0b
>c002811d
>bf8c000f
>10100a05
>c002811c
>bf8c007f
>d2820008
>04220805
>c002811e
>bf8c007f
>d2820008
>04220c05
>c002811f
>bf8c007f
>d2820008
>04220e05
>c0028119
>bf8c007f
>10120a05
>c0028118
>bf8c007f
>d2820009
>04260805
>c002811a
>bf8c007f
>d2820009
>04260c05
>c002811b
>bf8c007f
>d2820009
>04260e05
>c0028115
>bf8c007f
>10140a05
>c0028114
>bf8c007f
>d282000a
>042a0805
>c0028116
>bf8c007f
>d282000a
>042a0c05
>c0028117
>bf8c007f
>d282000a
>042a0e05
>c0028111
>bf8c007f
>10160a05
>c0028110
>bf8c007f
>d282000b
>042e0805
>c0028112
>bf8c007f
>d282000b
>042e0c05
>c0000113
>bf8c007f
>d282000b
>042e0e00
>f80000ff
>08090a0b
>c0840704
>bf8c000f
>e00c2000
>80020800
>c00003c5
>bf8c0070
>10001200
>c00003c4
>bf8c007f
>d2820000
>04000108
>c00003c6
>bf8c007f
>d2820000
>0400010a
>c00003c7
>bf8c007f
>d282000c
>0400010b
>c00003c1
>bf8c007f
>10001200
>c00003c0
>bf8c007f
>d2820000
>04000108
>c00003c2
>bf8c007f
>d2820000
>0400010a
>c00003c3
>bf8c007f
>d2820008
>0400010b
>7e000280
>f800020f
>00000c08
>c0000300
>bf8c000f
>7e100200
>7e120200
>7e140200
>7e160200
>f800021f
>0b0a0908
>c0000335
>bf8c000f
>10100400
>c0000334
>bf8c007f
>d2820008
>04200101
>c0000336
>bf8c007f
>d2820008
>04200103
>c0000337
>bf8c007f
>7e120200
>d2820008
>04221204
>f800022f
>00080504
>f800023f
>08030201
>c00003e4
>bf8c000f
>d2820000
>04120e00
>c0000302
>bf8c007f
>10020c00
>08020f01
>c00003e5
>bf8c007f
>10040e00
>08040b02
>f80008cf
>07010200
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL IN[2], GENERIC[21], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL CONST[0..30]
>DCL TEMP[0..12], LOCAL
>DCL TEMP[13], ARRAY(1), LOCAL
>IMM[0] FLT32 {    0.0050,     1.0000,     0.8625,     0.0000}
>  0: MOV_SAT TEMP[0].xy, IN[2].wzzz
>  1: MOV_SAT TEMP[1].xy, IN[1].wzzz
>  2: MOV_SAT TEMP[2].xy, IN[1].xyyy
>  3: MAD TEMP[3].xy, IN[0].wzzz, IMM[0].xxxx, IN[1].wzzz
>  4: MOV_SAT TEMP[3].xy, TEMP[3].xyyy
>  5: MAD TEMP[4].xy, IN[0].xyyy, IMM[0].xxxx, IN[1].xyyy
>  6: MOV_SAT TEMP[4].xy, TEMP[4].xyyy
>  7: MAD TEMP[5].xy, IN[2].xyyy, IMM[0].xxxx, IN[2].wzzz
>  8: MOV_SAT TEMP[5].xy, TEMP[5].xyyy
>  9: MOV TEMP[0].xy, TEMP[0].xyyy
> 10: TEX TEMP[0], TEMP[0], SAMP[2], 2D
> 11: MOV TEMP[6].xy, TEMP[1].xyyy
> 12: TEX TEMP[6], TEMP[6], SAMP[1], 2D
> 13: MOV TEMP[7].xy, TEMP[2].xyyy
> 14: TEX TEMP[7], TEMP[7], SAMP[0], 2D
> 15: MOV TEMP[8].xy, TEMP[3].xyyy
> 16: TEX TEMP[8], TEMP[8], SAMP[1], 2D
> 17: MOV TEMP[9].xy, TEMP[4].xyyy
> 18: TEX TEMP[9], TEMP[9], SAMP[0], 2D
> 19: MOV TEMP[10].xy, TEMP[5].xyyy
> 20: TEX TEMP[10], TEMP[10], SAMP[2], 2D
> 21: ADD TEMP[11].x, -TEMP[0].wwww, IMM[0].yyyy
> 22: ADD TEMP[12].x, -TEMP[6].wwww, IMM[0].yyyy
> 23: MUL TEMP[11].x, TEMP[11].xxxx, TEMP[12].xxxx
> 24: ADD TEMP[12].x, -TEMP[7].wwww, IMM[0].yyyy
> 25: MAD TEMP[11].x, TEMP[11].xxxx, -TEMP[12].xxxx, IMM[0].yyyy
> 26: MUL TEMP[12].x, TEMP[11].xxxx, TEMP[11].xxxx
> 27: MUL TEMP[12].x, TEMP[12].xxxx, TEMP[12].xxxx
> 28: MUL TEMP[11].x, TEMP[11].xxxx, TEMP[12].xxxx
> 29: MOV_SAT TEMP[11].x, TEMP[11].xxxx
> 30: ADD TEMP[11].x, -TEMP[11].xxxx, IMM[0].yyyy
> 31: MUL TEMP[1].xyz, TEMP[6].wwww, TEMP[6].xyzz
> 32: ADD TEMP[6].x, -TEMP[8].wwww, IMM[0].yyyy
> 33: MAD TEMP[2].xyz, TEMP[7].xyzz, TEMP[7].wwww, TEMP[1].xyzz
> 34: ADD TEMP[1].x, -TEMP[9].wwww, IMM[0].yyyy
> 35: MUL TEMP[3].xyz, TEMP[8].wwww, TEMP[8].xyzz
> 36: ADD TEMP[7].x, -TEMP[10].wwww, IMM[0].yyyy
> 37: MAD TEMP[4].xyz, TEMP[9].xyzz, TEMP[9].wwww, TEMP[3].xyzz
> 38: MUL TEMP[3].x, TEMP[6].xxxx, TEMP[7].xxxx
> 39: MAD TEMP[5].xyz, TEMP[10].xyzz, TEMP[10].wwww, TEMP[4].xyzz
> 40: MAD TEMP[1].x, TEMP[3].xxxx, -TEMP[1].xxxx, IMM[0].yyyy
> 41: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[0].wwww, TEMP[2].xyzz
> 42: POW TEMP[1].x, TEMP[1].xxxx, IMM[0].zzzz
> 43: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 44: MAD TEMP[0].xyz, TEMP[5].xyzz, TEMP[11].xxxx, TEMP[0].xyzz
> 45: ADD TEMP[1].x, -TEMP[1].xxxx, IMM[0].yyyy
> 46: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[30].xxxx
> 47: MAD TEMP[1].x, TEMP[1].xxxx, -TEMP[11].xxxx, IMM[0].yyyy
> 48: MOV TEMP[0].w, TEMP[1].xxxx
> 49: MOV TEMP[13], TEMP[0]
> 50: MOV OUT[0], TEMP[13]
> 51: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 120
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %25 = load <32 x i8> addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %27 = load <16 x i8> addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %29 = load <32 x i8> addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %31 = load <16 x i8> addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr <32 x i8> addrspace(2)* %2, i32 2
>  %33 = load <32 x i8> addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr <16 x i8> addrspace(2)* %1, i32 2
>  %35 = load <16 x i8> addrspace(2)* %34, !tbaa !0
>  %36 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %37 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %38 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %39 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %3, <2 x i32> %5)
>  %40 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %41 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %42 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %3, <2 x i32> %5)
>  %43 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %3, <2 x i32> %5)
>  %44 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %45 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %46 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %3, <2 x i32> %5)
>  %47 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %3, <2 x i32> %5)
>  %48 = call float @llvm.AMDIL.clamp.(float %47, float 0.000000e+00, float 1.000000e+00)
>  %49 = call float @llvm.AMDIL.clamp.(float %46, float 0.000000e+00, float 1.000000e+00)
>  %50 = call float @llvm.AMDIL.clamp.(float %43, float 0.000000e+00, float 1.000000e+00)
>  %51 = call float @llvm.AMDIL.clamp.(float %42, float 0.000000e+00, float 1.000000e+00)
>  %52 = call float @llvm.AMDIL.clamp.(float %40, float 0.000000e+00, float 1.000000e+00)
>  %53 = call float @llvm.AMDIL.clamp.(float %41, float 0.000000e+00, float 1.000000e+00)
>  %54 = fmul float %39, 0x3F747AE140000000
>  %55 = fadd float %54, %43
>  %56 = fmul float %38, 0x3F747AE140000000
>  %57 = fadd float %56, %42
>  %58 = call float @llvm.AMDIL.clamp.(float %55, float 0.000000e+00, float 1.000000e+00)
>  %59 = call float @llvm.AMDIL.clamp.(float %57, float 0.000000e+00, float 1.000000e+00)
>  %60 = fmul float %36, 0x3F747AE140000000
>  %61 = fadd float %60, %40
>  %62 = fmul float %37, 0x3F747AE140000000
>  %63 = fadd float %62, %41
>  %64 = call float @llvm.AMDIL.clamp.(float %61, float 0.000000e+00, float 1.000000e+00)
>  %65 = call float @llvm.AMDIL.clamp.(float %63, float 0.000000e+00, float 1.000000e+00)
>  %66 = fmul float %44, 0x3F747AE140000000
>  %67 = fadd float %66, %47
>  %68 = fmul float %45, 0x3F747AE140000000
>  %69 = fadd float %68, %46
>  %70 = call float @llvm.AMDIL.clamp.(float %67, float 0.000000e+00, float 1.000000e+00)
>  %71 = call float @llvm.AMDIL.clamp.(float %69, float 0.000000e+00, float 1.000000e+00)
>  %72 = bitcast float %48 to i32
>  %73 = bitcast float %49 to i32
>  %74 = insertelement <2 x i32> undef, i32 %72, i32 0
>  %75 = insertelement <2 x i32> %74, i32 %73, i32 1
>  %76 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %75, <32 x i8> %33, <16 x i8> %35, i32 2)
>  %77 = extractelement <4 x float> %76, i32 0
>  %78 = extractelement <4 x float> %76, i32 1
>  %79 = extractelement <4 x float> %76, i32 2
>  %80 = extractelement <4 x float> %76, i32 3
>  %81 = bitcast float %50 to i32
>  %82 = bitcast float %51 to i32
>  %83 = insertelement <2 x i32> undef, i32 %81, i32 0
>  %84 = insertelement <2 x i32> %83, i32 %82, i32 1
>  %85 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %84, <32 x i8> %29, <16 x i8> %31, i32 2)
>  %86 = extractelement <4 x float> %85, i32 0
>  %87 = extractelement <4 x float> %85, i32 1
>  %88 = extractelement <4 x float> %85, i32 2
>  %89 = extractelement <4 x float> %85, i32 3
>  %90 = bitcast float %52 to i32
>  %91 = bitcast float %53 to i32
>  %92 = insertelement <2 x i32> undef, i32 %90, i32 0
>  %93 = insertelement <2 x i32> %92, i32 %91, i32 1
>  %94 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %93, <32 x i8> %25, <16 x i8> %27, i32 2)
>  %95 = extractelement <4 x float> %94, i32 0
>  %96 = extractelement <4 x float> %94, i32 1
>  %97 = extractelement <4 x float> %94, i32 2
>  %98 = extractelement <4 x float> %94, i32 3
>  %99 = bitcast float %58 to i32
>  %100 = bitcast float %59 to i32
>  %101 = insertelement <2 x i32> undef, i32 %99, i32 0
>  %102 = insertelement <2 x i32> %101, i32 %100, i32 1
>  %103 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %102, <32 x i8> %29, <16 x i8> %31, i32 2)
>  %104 = extractelement <4 x float> %103, i32 0
>  %105 = extractelement <4 x float> %103, i32 1
>  %106 = extractelement <4 x float> %103, i32 2
>  %107 = extractelement <4 x float> %103, i32 3
>  %108 = bitcast float %64 to i32
>  %109 = bitcast float %65 to i32
>  %110 = insertelement <2 x i32> undef, i32 %108, i32 0
>  %111 = insertelement <2 x i32> %110, i32 %109, i32 1
>  %112 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %111, <32 x i8> %25, <16 x i8> %27, i32 2)
>  %113 = extractelement <4 x float> %112, i32 0
>  %114 = extractelement <4 x float> %112, i32 1
>  %115 = extractelement <4 x float> %112, i32 2
>  %116 = extractelement <4 x float> %112, i32 3
>  %117 = bitcast float %70 to i32
>  %118 = bitcast float %71 to i32
>  %119 = insertelement <2 x i32> undef, i32 %117, i32 0
>  %120 = insertelement <2 x i32> %119, i32 %118, i32 1
>  %121 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %120, <32 x i8> %33, <16 x i8> %35, i32 2)
>  %122 = extractelement <4 x float> %121, i32 0
>  %123 = extractelement <4 x float> %121, i32 1
>  %124 = extractelement <4 x float> %121, i32 2
>  %125 = extractelement <4 x float> %121, i32 3
>  %126 = fsub float -0.000000e+00, %80
>  %127 = fadd float %126, 1.000000e+00
>  %128 = fsub float -0.000000e+00, %89
>  %129 = fadd float %128, 1.000000e+00
>  %130 = fmul float %127, %129
>  %131 = fsub float -0.000000e+00, %98
>  %132 = fadd float %131, 1.000000e+00
>  %133 = fsub float -0.000000e+00, %132
>  %134 = fmul float %130, %133
>  %135 = fadd float %134, 1.000000e+00
>  %136 = fmul float %135, %135
>  %137 = fmul float %136, %136
>  %138 = fmul float %135, %137
>  %139 = call float @llvm.AMDIL.clamp.(float %138, float 0.000000e+00, float 1.000000e+00)
>  %140 = fsub float -0.000000e+00, %139
>  %141 = fadd float %140, 1.000000e+00
>  %142 = fmul float %89, %86
>  %143 = fmul float %89, %87
>  %144 = fmul float %89, %88
>  %145 = fsub float -0.000000e+00, %107
>  %146 = fadd float %145, 1.000000e+00
>  %147 = fmul float %95, %98
>  %148 = fadd float %147, %142
>  %149 = fmul float %96, %98
>  %150 = fadd float %149, %143
>  %151 = fmul float %97, %98
>  %152 = fadd float %151, %144
>  %153 = fsub float -0.000000e+00, %116
>  %154 = fadd float %153, 1.000000e+00
>  %155 = fmul float %107, %104
>  %156 = fmul float %107, %105
>  %157 = fmul float %107, %106
>  %158 = fsub float -0.000000e+00, %125
>  %159 = fadd float %158, 1.000000e+00
>  %160 = fmul float %113, %116
>  %161 = fadd float %160, %155
>  %162 = fmul float %114, %116
>  %163 = fadd float %162, %156
>  %164 = fmul float %115, %116
>  %165 = fadd float %164, %157
>  %166 = fmul float %146, %159
>  %167 = fmul float %122, %125
>  %168 = fadd float %167, %161
>  %169 = fmul float %123, %125
>  %170 = fadd float %169, %163
>  %171 = fmul float %124, %125
>  %172 = fadd float %171, %165
>  %173 = fsub float -0.000000e+00, %154
>  %174 = fmul float %166, %173
>  %175 = fadd float %174, 1.000000e+00
>  %176 = fmul float %77, %80
>  %177 = fadd float %176, %148
>  %178 = fmul float %78, %80
>  %179 = fadd float %178, %150
>  %180 = fmul float %79, %80
>  %181 = fadd float %180, %152
>  %182 = call float @llvm.pow.f32(float %175, float 0x3FEB9999A0000000)
>  %183 = call float @llvm.AMDIL.clamp.(float %182, float 0.000000e+00, float 1.000000e+00)
>  %184 = fmul float %168, %141
>  %185 = fadd float %184, %177
>  %186 = fmul float %170, %141
>  %187 = fadd float %186, %179
>  %188 = fmul float %172, %141
>  %189 = fadd float %188, %181
>  %190 = fsub float -0.000000e+00, %183
>  %191 = fadd float %190, 1.000000e+00
>  %192 = fmul float %185, %23
>  %193 = fmul float %187, %23
>  %194 = fmul float %189, %23
>  %195 = fsub float -0.000000e+00, %141
>  %196 = fmul float %191, %195
>  %197 = fadd float %196, 1.000000e+00
>  %198 = call i32 @llvm.SI.packf16(float %192, float %193)
>  %199 = bitcast i32 %198 to float
>  %200 = call i32 @llvm.SI.packf16(float %194, float %197)
>  %201 = bitcast i32 %200 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %199, float %201, float %199, float %201)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: nounwind readonly
>declare float @llvm.pow.f32(float, float) #3
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>attributes #3 = { nounwind readonly }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8280700
>c8290701
>c8080300
>c8090301
>7e1a02ff
>3ba3d70a
>d2820002
>042a1b02
>d2060802
>02010102
>c82c0600
>c82d0601
>c8100200
>c8110201
>d2820004
>042e1b04
>d2060803
>02010104
>c0840304
>c0c60508
>bf8c007f
>f0800f00
>00430202
>bf8c0770
>101c0705
>c8300400
>c8310401
>c8180000
>c8190001
>d2820006
>04321b06
>d2060806
>02010106
>c8440500
>c8450501
>c8200100
>c8210101
>d2820008
>04461b08
>d2060807
>02010108
>c08a0300
>c0cc0500
>bf8c007f
>f0800f00
>00a60606
>bf8c0770
>d2820012
>043a1307
>c8580b00
>c8590b01
>c8380800
>c8390801
>d282000e
>045a1b0e
>d206080e
>0201010e
>c85c0a00
>c85d0a01
>c8400900
>c8410901
>d2820000
>045e1b10
>d206080f
>02010100
>c0900308
>c0d20510
>bf8c007f
>f0800f00
>01090d0e
>bf8c0770
>d2820001
>044a210e
>d2060812
>0201010a
>d2060813
>0201010b
>f0800f00
>00431212
>bf8c0770
>08002af2
>d206080a
>02010116
>d206080b
>02010117
>f0800f00
>0109160a
>bf8c0770
>081432f2
>1000010a
>d206080a
>0201010c
>d206080b
>02010111
>f0800f00
>00a61a0a
>bf8c0770
>08143af2
>10001500
>080000f2
>10140100
>1014150a
>10001500
>d2060800
>02010100
>080000f2
>10142715
>d282000a
>042a3b1b
>d282000a
>042a3317
>d2820001
>042a0101
>c0400100
>bf8c007f
>c0000178
>bf8c007f
>10020200
>10140505
>d282000a
>042a1306
>d282000a
>042a210d
>10162515
>d282000b
>042e3b1a
>d282000b
>042e3316
>d282000a
>042e010a
>10141400
>5e02030a
>10140905
>d282000a
>042a1308
>d282000a
>042a210f
>10162915
>d282000b
>042e3b1c
>d282000b
>042e3318
>d282000a
>042e010a
>10141400
>081620f2
>08040af2
>10041702
>080612f2
>10040702
>080404f2
>7e044f02
>0e0404ff
>3f5ccccd
>7e044b02
>d2060802
>02010102
>080404f2
>10000102
>080000f2
>5e00010a
>f8001c0f
>00010001
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL OUT[3], GENERIC[20]
>DCL OUT[4], GENERIC[21]
>DCL CONST[0..52]
>DCL TEMP[0..13], LOCAL
>IMM[0] FLT32 {    0.1592,     0.5000,  -128.0000,     1.0000}
>IMM[1] FLT32 {    6.2832,    -3.1416,   -64.0000,    -0.0159}
>IMM[2] FLT32 {    0.0159,    -0.0000,    -0.0000,    -0.5000}
>IMM[3] FLT32 {    0.0003,     0.0026,    -0.0208,    -0.1250}
>  0: MOV TEMP[0].w, CONST[0].yyyy
>  1: DP4 TEMP[0].x, IN[0], CONST[49]
>  2: DP4 TEMP[1].x, IN[0], CONST[50]
>  3: MOV TEMP[0].y, TEMP[1].xxxx
>  4: DP4 TEMP[1].x, IN[0], CONST[51]
>  5: MOV TEMP[0].z, TEMP[1].xxxx
>  6: DP4 TEMP[1].x, TEMP[0], CONST[8]
>  7: DP4 TEMP[2].x, TEMP[0], CONST[9]
>  8: MOV TEMP[1].y, TEMP[2].xxxx
>  9: DP4 TEMP[3].x, TEMP[0], CONST[10]
> 10: MOV TEMP[1].z, TEMP[3].xxxx
> 11: DP4 TEMP[4].x, TEMP[0], CONST[11]
> 12: MOV TEMP[1].w, TEMP[4].xxxx
> 13: ADD TEMP[5].xyz, TEMP[0].xyzz, -CONST[2].xyzz
> 14: MAD TEMP[0].xyz, CONST[48].zyxx, IMM[0].xxxx, IMM[0].yyyy
> 15: ADD TEMP[6], IN[1], IMM[0].zzzz
> 16: SLT TEMP[7], TEMP[6], CONST[0].xxxx
> 17: F2I TEMP[7], -TEMP[7]
> 18: AND TEMP[7], TEMP[7], IMM[0].wwww
> 19: FRC TEMP[8].xyz, TEMP[0].xyzz
> 20: MAD TEMP[8].xyz, TEMP[8].xyzz, IMM[1].xxxx, IMM[1].yyyy
> 21: MAD TEMP[9].xyz, CONST[0].zzzz, -TEMP[7].xzww, CONST[0].yyyy
> 22: ABS TEMP[6], TEMP[6]
> 23: ADD TEMP[6], TEMP[6], -TEMP[7]
> 24: ADD TEMP[6], TEMP[6], IMM[1].zzzz
> 25: SLT TEMP[7], TEMP[6], CONST[0].xxxx
> 26: F2I TEMP[7], -TEMP[7]
> 27: AND TEMP[7], TEMP[7], IMM[0].wwww
> 28: ABS TEMP[6], TEMP[6]
> 29: ADD TEMP[6], TEMP[6], -TEMP[7]
> 30: MAD TEMP[0], CONST[0].zzzz, -TEMP[7], CONST[0].yyyy
> 31: MAD TEMP[10].xy, TEMP[6].xzzz, IMM[1].wwww, IMM[0].wwww
> 32: MUL TEMP[11], TEMP[6].zwxy, IMM[2].xxxx
> 33: MOV TEMP[12].xy, TEMP[11].xyxw
> 34: MAD TEMP[13].x, TEMP[6].yyyy, IMM[1].wwww, TEMP[10].xxxx
> 35: MOV TEMP[7].z, TEMP[13].xxxx
> 36: MOV TEMP[7].xy, TEMP[11].zwzz
> 37: MAD TEMP[6].x, TEMP[6].wwww, IMM[1].wwww, TEMP[10].yyyy
> 38: MOV TEMP[12].z, TEMP[6].xxxx
> 39: DP3 TEMP[6].x, TEMP[7].xyzz, TEMP[7].xyzz
> 40: RSQ TEMP[6].x, TEMP[6].xxxx
> 41: MUL TEMP[6].xyz, TEMP[7].xyzz, TEMP[6].xxxx
> 42: MUL TEMP[10].xy, TEMP[0].xyyy, TEMP[6].xyyy
> 43: MUL TEMP[6].x, TEMP[9].xxxx, TEMP[6].zzzz
> 44: MOV TEMP[10].z, TEMP[6].xxxx
> 45: DP3 TEMP[7].x, TEMP[10].xyzz, CONST[49].xyzz
> 46: DP3 TEMP[6].x, TEMP[10].xyzz, CONST[50].xyzz
> 47: MOV TEMP[7].y, TEMP[6].xxxx
> 48: DP3 TEMP[6].x, TEMP[12].xyzz, TEMP[12].xyzz
> 49: RSQ TEMP[6].x, TEMP[6].xxxx
> 50: MUL TEMP[6].xyz, TEMP[12].xyzz, TEMP[6].xxxx
> 51: MUL TEMP[0].xy, TEMP[0].zwww, TEMP[6].xyyy
> 52: MUL TEMP[6].x, TEMP[9].yyyy, TEMP[6].zzzz
> 53: MOV TEMP[0].z, TEMP[6].xxxx
> 54: DP3 TEMP[6].x, TEMP[10].xyzz, CONST[51].xyzz
> 55: MOV TEMP[7].z, TEMP[6].xxxx
> 56: DP3 TEMP[6].x, TEMP[0].xyzz, CONST[49].xyzz
> 57: DP3 TEMP[11].x, TEMP[0].xyzz, CONST[50].xyzz
> 58: MOV TEMP[6].y, TEMP[11].xxxx
> 59: DP3 TEMP[11].x, TEMP[0].xyzz, CONST[51].xyzz
> 60: MOV TEMP[6].z, TEMP[11].xxxx
> 61: MUL TEMP[11].x, TEMP[8].xxxx, TEMP[8].xxxx
> 62: MAD TEMP[13].xy, TEMP[11].xxxx, IMM[2].yzzz, IMM[3].xyyy
> 63: MAD TEMP[13].xy, TEMP[13].xyyy, TEMP[11].xxxx, IMM[3].zwww
> 64: MAD TEMP[13].xy, TEMP[13].xyyy, TEMP[11].xxxx, IMM[0].ywww
> 65: MUL TEMP[13].x, TEMP[13].xxxx, TEMP[8].xxxx
> 66: MUL TEMP[13].xy, TEMP[13].xyyy, TEMP[13].xxxx
> 67: ADD TEMP[13].xy, TEMP[13].xyyy, TEMP[13].xyyy
> 68: ADD TEMP[13].x, -TEMP[13].xxxx, IMM[0].wwww
> 69: MUL TEMP[12].xyz, TEMP[7].zxyy, TEMP[6].yzxx
> 70: ADD TEMP[9].xy, IN[2].xyyy, IMM[2].wwww
> 71: MAD TEMP[12].xyz, TEMP[7].yzxx, TEMP[6].zxyy, -TEMP[12].xyzz
> 72: DP3 TEMP[11].x, TEMP[7].xyzz, TEMP[7].xyzz
> 73: RSQ TEMP[11].x, TEMP[11].xxxx
> 74: MUL TEMP[10].xyz, TEMP[7].xyzz, TEMP[11].xxxx
> 75: MUL TEMP[7].xyz, TEMP[9].zzzz, TEMP[12].xyzz
> 76: DP3 TEMP[11].x, TEMP[7].xyzz, TEMP[7].xyzz
> 77: RSQ TEMP[11].x, TEMP[11].xxxx
> 78: MUL TEMP[12].xyz, TEMP[7].xyzz, TEMP[11].xxxx
> 79: DP3 TEMP[11].x, TEMP[5].xyzz, TEMP[5].xyzz
> 80: RSQ TEMP[11].x, TEMP[11].xxxx
> 81: MUL TEMP[7].xyz, TEMP[5].xyzz, TEMP[11].xxxx
> 82: DP3 TEMP[11].x, TEMP[6].xyzz, TEMP[6].xyzz
> 83: RSQ TEMP[11].x, TEMP[11].xxxx
> 84: MUL TEMP[5].xyz, TEMP[6].xyzz, TEMP[11].xxxx
> 85: DP3 TEMP[6].x, TEMP[7].xyzz, TEMP[12].xyzz
> 86: MOV TEMP[12].y, TEMP[6].xxxx
> 87: DP3 TEMP[6].x, TEMP[7].xyzz, TEMP[10].xyzz
> 88: MOV TEMP[12].z, TEMP[6].xxxx
> 89: DP3 TEMP[12].x, TEMP[7].xyzz, TEMP[5].xyzz
> 90: MUL TEMP[7].xyz, TEMP[13].xyxx, TEMP[9].xxyy
> 91: DP3 TEMP[8].x, TEMP[12].xyzz, TEMP[12].xyzz
> 92: MAD TEMP[7].x, TEMP[9].yyyy, -TEMP[13].yyyy, TEMP[7].xxxx
> 93: ADD TEMP[6].x, TEMP[7].zzzz, TEMP[7].yyyy
> 94: MOV TEMP[7].y, TEMP[6].xxxx
> 95: RSQ TEMP[6].x, TEMP[8].xxxx
> 96: MUL TEMP[5].xy, TEMP[12].xyyy, TEMP[6].xxxx
> 97: ADD TEMP[6].xy, TEMP[7].xyyy, CONST[0].wwww
> 98: MUL TEMP[7].xyz, TEMP[13].xyxx, TEMP[5].xxyy
> 99: MAD TEMP[10].x, TEMP[5].yyyy, -TEMP[13].yyyy, TEMP[7].xxxx
>100: MUL TEMP[11].x, TEMP[8].yyyy, TEMP[8].yyyy
>101: MAD TEMP[13].xy, TEMP[11].xxxx, IMM[2].yzzz, IMM[3].xyyy
>102: MAD TEMP[13].xy, TEMP[13].xyyy, TEMP[11].xxxx, IMM[3].zwww
>103: MAD TEMP[13].xy, TEMP[13].xyyy, TEMP[11].xxxx, IMM[0].ywww
>104: MUL TEMP[13].x, TEMP[13].xxxx, TEMP[8].yyyy
>105: MUL TEMP[13].xy, TEMP[13].xyyy, TEMP[13].xxxx
>106: ADD TEMP[13].xy, TEMP[13].xyyy, TEMP[13].xyyy
>107: ADD TEMP[13].x, -TEMP[13].xxxx, IMM[0].wwww
>108: MOV TEMP[12].xy, TEMP[13].xyxx
>109: ADD TEMP[11].x, TEMP[7].zzzz, TEMP[7].yyyy
>110: MOV TEMP[10].y, TEMP[11].xxxx
>111: MUL TEMP[7].xyz, TEMP[9].xxyy, TEMP[13].xyxx
>112: MUL TEMP[11].x, TEMP[8].zzzz, TEMP[8].zzzz
>113: MAD TEMP[13].xy, TEMP[11].xxxx, IMM[2].yzzz, IMM[3].xyyy
>114: MAD TEMP[13].xy, TEMP[13].xyyy, TEMP[11].xxxx, IMM[3].zwww
>115: MAD TEMP[13].xy, TEMP[13].xyyy, TEMP[11].xxxx, IMM[0].ywww
>116: MUL TEMP[13].x, TEMP[13].xxxx, TEMP[8].zzzz
>117: MUL TEMP[13].xy, TEMP[13].xyyy, TEMP[13].xxxx
>118: ADD TEMP[13].xy, TEMP[13].xyyy, TEMP[13].xyyy
>119: ADD TEMP[13].x, -TEMP[13].xxxx, IMM[0].wwww
>120: MAD TEMP[8].x, TEMP[9].yyyy, -TEMP[12].yyyy, TEMP[7].xxxx
>121: MOV TEMP[0].w, TEMP[8].xxxx
>122: ADD TEMP[8].x, TEMP[7].zzzz, TEMP[7].yyyy
>123: MOV TEMP[0].z, TEMP[8].xxxx
>124: MUL TEMP[7].xyz, TEMP[5].xxyy, TEMP[12].xyxx
>125: ADD TEMP[8].xy, TEMP[0].zwww, CONST[0].wwww
>126: MOV TEMP[6].zw, TEMP[8].yyxy
>127: MAD TEMP[8].x, TEMP[5].yyyy, -TEMP[12].yyyy, TEMP[7].xxxx
>128: MOV TEMP[10].w, TEMP[8].xxxx
>129: ADD TEMP[7].x, TEMP[7].zzzz, TEMP[7].yyyy
>130: MOV TEMP[10].z, TEMP[7].xxxx
>131: MUL TEMP[12].xyz, TEMP[9].xxyy, TEMP[13].xyxx
>132: MAD TEMP[7].x, TEMP[9].yyyy, -TEMP[13].yyyy, TEMP[12].xxxx
>133: MOV TEMP[0].w, TEMP[7].xxxx
>134: ADD TEMP[7].x, TEMP[12].zzzz, TEMP[12].yyyy
>135: MOV TEMP[0].z, TEMP[7].xxxx
>136: ADD TEMP[0].xy, TEMP[0].zwww, CONST[0].wwww
>137: MOV TEMP[0].zw, TEMP[0].yyxy
>138: MUL TEMP[12].xyz, TEMP[5].xxyy, TEMP[13].xyxx
>139: MAD TEMP[0].x, TEMP[5].yyyy, -TEMP[13].yyyy, TEMP[12].xxxx
>140: ADD TEMP[5].x, TEMP[12].zzzz, TEMP[12].yyyy
>141: MOV TEMP[0].y, TEMP[5].xxxx
>142: MOV TEMP[5], TEMP[1]
>143: MAD TEMP[3].x, TEMP[3].xxxx, CONST[0].zzzz, -TEMP[4].xxxx
>144: MOV TEMP[1].z, TEMP[3].xxxx
>145: MOV TEMP[1].y, -TEMP[2].xxxx
>146: MAD TEMP[1].xy, CONST[52].xyyy, TEMP[4].xxxx, TEMP[1].xyyy
>147: MOV OUT[2], TEMP[10]
>148: MOV OUT[3], TEMP[6]
>149: MOV OUT[4], TEMP[0]
>150: MOV OUT[0], TEMP[1]
>151: MOV OUT[1], TEMP[5]
>152: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 3
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 8
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 9
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 10
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 32
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 33
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 34
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 35
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 36
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 37
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 38
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 39
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 40
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 41
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 42
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 43
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 44
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 45
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 46
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 47
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 192
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 193
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 194
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 196
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 197
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 198
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 199
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 200
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 201
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 202
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 203
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 204
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 205
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 206
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 207
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 208
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 209
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %92 = load <16 x i8> addrspace(2)* %91, !tbaa !0
>  %93 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %92, i32 0, i32 %5)
>  %94 = extractelement <4 x float> %93, i32 0
>  %95 = extractelement <4 x float> %93, i32 1
>  %96 = extractelement <4 x float> %93, i32 2
>  %97 = extractelement <4 x float> %93, i32 3
>  %98 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %99 = load <16 x i8> addrspace(2)* %98, !tbaa !0
>  %100 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %99, i32 0, i32 %5)
>  %101 = extractelement <4 x float> %100, i32 0
>  %102 = extractelement <4 x float> %100, i32 1
>  %103 = extractelement <4 x float> %100, i32 2
>  %104 = extractelement <4 x float> %100, i32 3
>  %105 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %106 = load <16 x i8> addrspace(2)* %105, !tbaa !0
>  %107 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %106, i32 0, i32 %5)
>  %108 = extractelement <4 x float> %107, i32 0
>  %109 = extractelement <4 x float> %107, i32 1
>  %110 = fmul float %94, %64
>  %111 = fmul float %95, %66
>  %112 = fadd float %110, %111
>  %113 = fmul float %96, %68
>  %114 = fadd float %112, %113
>  %115 = fmul float %97, %70
>  %116 = fadd float %114, %115
>  %117 = fmul float %94, %72
>  %118 = fmul float %95, %74
>  %119 = fadd float %117, %118
>  %120 = fmul float %96, %76
>  %121 = fadd float %119, %120
>  %122 = fmul float %97, %78
>  %123 = fadd float %121, %122
>  %124 = fmul float %94, %80
>  %125 = fmul float %95, %82
>  %126 = fadd float %124, %125
>  %127 = fmul float %96, %84
>  %128 = fadd float %126, %127
>  %129 = fmul float %97, %86
>  %130 = fadd float %128, %129
>  %131 = fmul float %116, %26
>  %132 = fmul float %123, %28
>  %133 = fadd float %131, %132
>  %134 = fmul float %130, %30
>  %135 = fadd float %133, %134
>  %136 = fmul float %14, %32
>  %137 = fadd float %135, %136
>  %138 = fmul float %116, %34
>  %139 = fmul float %123, %36
>  %140 = fadd float %138, %139
>  %141 = fmul float %130, %38
>  %142 = fadd float %140, %141
>  %143 = fmul float %14, %40
>  %144 = fadd float %142, %143
>  %145 = fmul float %116, %42
>  %146 = fmul float %123, %44
>  %147 = fadd float %145, %146
>  %148 = fmul float %130, %46
>  %149 = fadd float %147, %148
>  %150 = fmul float %14, %48
>  %151 = fadd float %149, %150
>  %152 = fmul float %116, %50
>  %153 = fmul float %123, %52
>  %154 = fadd float %152, %153
>  %155 = fmul float %130, %54
>  %156 = fadd float %154, %155
>  %157 = fmul float %14, %56
>  %158 = fadd float %156, %157
>  %159 = fsub float -0.000000e+00, %20
>  %160 = fadd float %116, %159
>  %161 = fsub float -0.000000e+00, %22
>  %162 = fadd float %123, %161
>  %163 = fsub float -0.000000e+00, %24
>  %164 = fadd float %130, %163
>  %165 = fmul float %62, 0x3FC45F3060000000
>  %166 = fadd float %165, 5.000000e-01
>  %167 = fmul float %60, 0x3FC45F3060000000
>  %168 = fadd float %167, 5.000000e-01
>  %169 = fmul float %58, 0x3FC45F3060000000
>  %170 = fadd float %169, 5.000000e-01
>  %171 = fadd float %101, -1.280000e+02
>  %172 = fadd float %102, -1.280000e+02
>  %173 = fadd float %103, -1.280000e+02
>  %174 = fadd float %104, -1.280000e+02
>  %175 = fcmp ult float %171, %12
>  %176 = select i1 %175, float 1.000000e+00, float 0.000000e+00
>  %177 = fcmp ult float %172, %12
>  %178 = select i1 %177, float 1.000000e+00, float 0.000000e+00
>  %179 = fcmp ult float %173, %12
>  %180 = select i1 %179, float 1.000000e+00, float 0.000000e+00
>  %181 = fcmp ult float %174, %12
>  %182 = select i1 %181, float 1.000000e+00, float 0.000000e+00
>  %183 = fsub float -0.000000e+00, %176
>  %184 = fptosi float %183 to i32
>  %185 = fsub float -0.000000e+00, %178
>  %186 = fptosi float %185 to i32
>  %187 = fsub float -0.000000e+00, %180
>  %188 = fptosi float %187 to i32
>  %189 = fsub float -0.000000e+00, %182
>  %190 = fptosi float %189 to i32
>  %191 = bitcast i32 %184 to float
>  %192 = bitcast i32 %186 to float
>  %193 = bitcast i32 %188 to float
>  %194 = bitcast i32 %190 to float
>  %195 = bitcast float %191 to i32
>  %196 = and i32 %195, 1065353216
>  %197 = bitcast float %192 to i32
>  %198 = and i32 %197, 1065353216
>  %199 = bitcast float %193 to i32
>  %200 = and i32 %199, 1065353216
>  %201 = bitcast float %194 to i32
>  %202 = and i32 %201, 1065353216
>  %203 = bitcast i32 %196 to float
>  %204 = bitcast i32 %198 to float
>  %205 = bitcast i32 %200 to float
>  %206 = bitcast i32 %202 to float
>  %207 = call float @llvm.AMDIL.fraction.(float %166)
>  %208 = call float @llvm.AMDIL.fraction.(float %168)
>  %209 = call float @llvm.AMDIL.fraction.(float %170)
>  %210 = fmul float %207, 0x401921FB60000000
>  %211 = fadd float %210, 0xC00921FB60000000
>  %212 = fmul float %208, 0x401921FB60000000
>  %213 = fadd float %212, 0xC00921FB60000000
>  %214 = fmul float %209, 0x401921FB60000000
>  %215 = fadd float %214, 0xC00921FB60000000
>  %216 = fsub float -0.000000e+00, %203
>  %217 = fmul float %16, %216
>  %218 = fadd float %217, %14
>  %219 = fsub float -0.000000e+00, %205
>  %220 = fmul float %16, %219
>  %221 = fadd float %220, %14
>  %222 = fsub float -0.000000e+00, %206
>  %223 = fmul float %16, %222
>  %224 = fadd float %223, %14
>  %225 = call float @fabs(float %171)
>  %226 = call float @fabs(float %172)
>  %227 = call float @fabs(float %173)
>  %228 = call float @fabs(float %174)
>  %229 = fsub float -0.000000e+00, %203
>  %230 = fadd float %225, %229
>  %231 = fsub float -0.000000e+00, %204
>  %232 = fadd float %226, %231
>  %233 = fsub float -0.000000e+00, %205
>  %234 = fadd float %227, %233
>  %235 = fsub float -0.000000e+00, %206
>  %236 = fadd float %228, %235
>  %237 = fadd float %230, -6.400000e+01
>  %238 = fadd float %232, -6.400000e+01
>  %239 = fadd float %234, -6.400000e+01
>  %240 = fadd float %236, -6.400000e+01
>  %241 = fcmp ult float %237, %12
>  %242 = select i1 %241, float 1.000000e+00, float 0.000000e+00
>  %243 = fcmp ult float %238, %12
>  %244 = select i1 %243, float 1.000000e+00, float 0.000000e+00
>  %245 = fcmp ult float %239, %12
>  %246 = select i1 %245, float 1.000000e+00, float 0.000000e+00
>  %247 = fcmp ult float %240, %12
>  %248 = select i1 %247, float 1.000000e+00, float 0.000000e+00
>  %249 = fsub float -0.000000e+00, %242
>  %250 = fptosi float %249 to i32
>  %251 = fsub float -0.000000e+00, %244
>  %252 = fptosi float %251 to i32
>  %253 = fsub float -0.000000e+00, %246
>  %254 = fptosi float %253 to i32
>  %255 = fsub float -0.000000e+00, %248
>  %256 = fptosi float %255 to i32
>  %257 = bitcast i32 %250 to float
>  %258 = bitcast i32 %252 to float
>  %259 = bitcast i32 %254 to float
>  %260 = bitcast i32 %256 to float
>  %261 = bitcast float %257 to i32
>  %262 = and i32 %261, 1065353216
>  %263 = bitcast float %258 to i32
>  %264 = and i32 %263, 1065353216
>  %265 = bitcast float %259 to i32
>  %266 = and i32 %265, 1065353216
>  %267 = bitcast float %260 to i32
>  %268 = and i32 %267, 1065353216
>  %269 = bitcast i32 %262 to float
>  %270 = bitcast i32 %264 to float
>  %271 = bitcast i32 %266 to float
>  %272 = bitcast i32 %268 to float
>  %273 = call float @fabs(float %237)
>  %274 = call float @fabs(float %238)
>  %275 = call float @fabs(float %239)
>  %276 = call float @fabs(float %240)
>  %277 = fsub float -0.000000e+00, %269
>  %278 = fadd float %273, %277
>  %279 = fsub float -0.000000e+00, %270
>  %280 = fadd float %274, %279
>  %281 = fsub float -0.000000e+00, %271
>  %282 = fadd float %275, %281
>  %283 = fsub float -0.000000e+00, %272
>  %284 = fadd float %276, %283
>  %285 = fsub float -0.000000e+00, %269
>  %286 = fmul float %16, %285
>  %287 = fadd float %286, %14
>  %288 = fsub float -0.000000e+00, %270
>  %289 = fmul float %16, %288
>  %290 = fadd float %289, %14
>  %291 = fsub float -0.000000e+00, %271
>  %292 = fmul float %16, %291
>  %293 = fadd float %292, %14
>  %294 = fsub float -0.000000e+00, %272
>  %295 = fmul float %16, %294
>  %296 = fadd float %295, %14
>  %297 = fmul float %278, 0xBF90410420000000
>  %298 = fadd float %297, 1.000000e+00
>  %299 = fmul float %282, 0xBF90410420000000
>  %300 = fadd float %299, 1.000000e+00
>  %301 = fmul float %282, 0x3F90410420000000
>  %302 = fmul float %284, 0x3F90410420000000
>  %303 = fmul float %278, 0x3F90410420000000
>  %304 = fmul float %280, 0x3F90410420000000
>  %305 = fmul float %280, 0xBF90410420000000
>  %306 = fadd float %305, %298
>  %307 = fmul float %284, 0xBF90410420000000
>  %308 = fadd float %307, %300
>  %309 = fmul float %303, %303
>  %310 = fmul float %304, %304
>  %311 = fadd float %310, %309
>  %312 = fmul float %306, %306
>  %313 = fadd float %311, %312
>  %314 = call float @llvm.AMDGPU.rsq(float %313)
>  %315 = fmul float %303, %314
>  %316 = fmul float %304, %314
>  %317 = fmul float %306, %314
>  %318 = fmul float %287, %315
>  %319 = fmul float %290, %316
>  %320 = fmul float %218, %317
>  %321 = fmul float %318, %64
>  %322 = fmul float %319, %66
>  %323 = fadd float %322, %321
>  %324 = fmul float %320, %68
>  %325 = fadd float %323, %324
>  %326 = fmul float %318, %72
>  %327 = fmul float %319, %74
>  %328 = fadd float %327, %326
>  %329 = fmul float %320, %76
>  %330 = fadd float %328, %329
>  %331 = fmul float %301, %301
>  %332 = fmul float %302, %302
>  %333 = fadd float %332, %331
>  %334 = fmul float %308, %308
>  %335 = fadd float %333, %334
>  %336 = call float @llvm.AMDGPU.rsq(float %335)
>  %337 = fmul float %301, %336
>  %338 = fmul float %302, %336
>  %339 = fmul float %308, %336
>  %340 = fmul float %293, %337
>  %341 = fmul float %296, %338
>  %342 = fmul float %221, %339
>  %343 = fmul float %318, %80
>  %344 = fmul float %319, %82
>  %345 = fadd float %344, %343
>  %346 = fmul float %320, %84
>  %347 = fadd float %345, %346
>  %348 = fmul float %340, %64
>  %349 = fmul float %341, %66
>  %350 = fadd float %349, %348
>  %351 = fmul float %342, %68
>  %352 = fadd float %350, %351
>  %353 = fmul float %340, %72
>  %354 = fmul float %341, %74
>  %355 = fadd float %354, %353
>  %356 = fmul float %342, %76
>  %357 = fadd float %355, %356
>  %358 = fmul float %340, %80
>  %359 = fmul float %341, %82
>  %360 = fadd float %359, %358
>  %361 = fmul float %342, %84
>  %362 = fadd float %360, %361
>  %363 = fmul float %211, %211
>  %364 = fmul float %363, 0xBEBA01A020000000
>  %365 = fadd float %364, 0x3F31111120000000
>  %366 = fmul float %363, 0xBEF6C16C20000000
>  %367 = fadd float %366, 0x3F65555560000000
>  %368 = fmul float %365, %363
>  %369 = fadd float %368, 0xBF95555560000000
>  %370 = fmul float %367, %363
>  %371 = fadd float %370, -1.250000e-01
>  %372 = fmul float %369, %363
>  %373 = fadd float %372, 5.000000e-01
>  %374 = fmul float %371, %363
>  %375 = fadd float %374, 1.000000e+00
>  %376 = fmul float %373, %211
>  %377 = fmul float %376, %376
>  %378 = fmul float %375, %376
>  %379 = fadd float %377, %377
>  %380 = fadd float %378, %378
>  %381 = fsub float -0.000000e+00, %379
>  %382 = fadd float %381, 1.000000e+00
>  %383 = fmul float %347, %357
>  %384 = fmul float %325, %362
>  %385 = fmul float %330, %352
>  %386 = fadd float %108, -5.000000e-01
>  %387 = fadd float %109, -5.000000e-01
>  %388 = fsub float -0.000000e+00, %383
>  %389 = fmul float %330, %362
>  %390 = fadd float %389, %388
>  %391 = fsub float -0.000000e+00, %384
>  %392 = fmul float %347, %352
>  %393 = fadd float %392, %391
>  %394 = fsub float -0.000000e+00, %385
>  %395 = fmul float %325, %357
>  %396 = fadd float %395, %394
>  %397 = fmul float %325, %325
>  %398 = fmul float %330, %330
>  %399 = fadd float %398, %397
>  %400 = fmul float %347, %347
>  %401 = fadd float %399, %400
>  %402 = call float @llvm.AMDGPU.rsq(float %401)
>  %403 = fmul float %325, %402
>  %404 = fmul float %330, %402
>  %405 = fmul float %347, %402
>  %406 = fmul float %224, %390
>  %407 = fmul float %224, %393
>  %408 = fmul float %224, %396
>  %409 = fmul float %406, %406
>  %410 = fmul float %407, %407
>  %411 = fadd float %410, %409
>  %412 = fmul float %408, %408
>  %413 = fadd float %411, %412
>  %414 = call float @llvm.AMDGPU.rsq(float %413)
>  %415 = fmul float %406, %414
>  %416 = fmul float %407, %414
>  %417 = fmul float %408, %414
>  %418 = fmul float %160, %160
>  %419 = fmul float %162, %162
>  %420 = fadd float %419, %418
>  %421 = fmul float %164, %164
>  %422 = fadd float %420, %421
>  %423 = call float @llvm.AMDGPU.rsq(float %422)
>  %424 = fmul float %160, %423
>  %425 = fmul float %162, %423
>  %426 = fmul float %164, %423
>  %427 = fmul float %352, %352
>  %428 = fmul float %357, %357
>  %429 = fadd float %428, %427
>  %430 = fmul float %362, %362
>  %431 = fadd float %429, %430
>  %432 = call float @llvm.AMDGPU.rsq(float %431)
>  %433 = fmul float %352, %432
>  %434 = fmul float %357, %432
>  %435 = fmul float %362, %432
>  %436 = fmul float %424, %415
>  %437 = fmul float %425, %416
>  %438 = fadd float %437, %436
>  %439 = fmul float %426, %417
>  %440 = fadd float %438, %439
>  %441 = fmul float %424, %403
>  %442 = fmul float %425, %404
>  %443 = fadd float %442, %441
>  %444 = fmul float %426, %405
>  %445 = fadd float %443, %444
>  %446 = fmul float %424, %433
>  %447 = fmul float %425, %434
>  %448 = fadd float %447, %446
>  %449 = fmul float %426, %435
>  %450 = fadd float %448, %449
>  %451 = fmul float %382, %386
>  %452 = fmul float %380, %386
>  %453 = fmul float %382, %387
>  %454 = fmul float %450, %450
>  %455 = fmul float %440, %440
>  %456 = fadd float %455, %454
>  %457 = fmul float %445, %445
>  %458 = fadd float %456, %457
>  %459 = fsub float -0.000000e+00, %380
>  %460 = fmul float %387, %459
>  %461 = fadd float %460, %451
>  %462 = fadd float %453, %452
>  %463 = call float @llvm.AMDGPU.rsq(float %458)
>  %464 = fmul float %450, %463
>  %465 = fmul float %440, %463
>  %466 = fadd float %461, %18
>  %467 = fadd float %462, %18
>  %468 = fmul float %382, %464
>  %469 = fmul float %380, %464
>  %470 = fmul float %382, %465
>  %471 = fsub float -0.000000e+00, %380
>  %472 = fmul float %465, %471
>  %473 = fadd float %472, %468
>  %474 = fmul float %213, %213
>  %475 = fmul float %474, 0xBEBA01A020000000
>  %476 = fadd float %475, 0x3F31111120000000
>  %477 = fmul float %474, 0xBEF6C16C20000000
>  %478 = fadd float %477, 0x3F65555560000000
>  %479 = fmul float %476, %474
>  %480 = fadd float %479, 0xBF95555560000000
>  %481 = fmul float %478, %474
>  %482 = fadd float %481, -1.250000e-01
>  %483 = fmul float %480, %474
>  %484 = fadd float %483, 5.000000e-01
>  %485 = fmul float %482, %474
>  %486 = fadd float %485, 1.000000e+00
>  %487 = fmul float %484, %213
>  %488 = fmul float %487, %487
>  %489 = fmul float %486, %487
>  %490 = fadd float %488, %488
>  %491 = fadd float %489, %489
>  %492 = fsub float -0.000000e+00, %490
>  %493 = fadd float %492, 1.000000e+00
>  %494 = fadd float %470, %469
>  %495 = fmul float %386, %493
>  %496 = fmul float %386, %491
>  %497 = fmul float %387, %493
>  %498 = fmul float %215, %215
>  %499 = fmul float %498, 0xBEBA01A020000000
>  %500 = fadd float %499, 0x3F31111120000000
>  %501 = fmul float %498, 0xBEF6C16C20000000
>  %502 = fadd float %501, 0x3F65555560000000
>  %503 = fmul float %500, %498
>  %504 = fadd float %503, 0xBF95555560000000
>  %505 = fmul float %502, %498
>  %506 = fadd float %505, -1.250000e-01
>  %507 = fmul float %504, %498
>  %508 = fadd float %507, 5.000000e-01
>  %509 = fmul float %506, %498
>  %510 = fadd float %509, 1.000000e+00
>  %511 = fmul float %508, %215
>  %512 = fmul float %511, %511
>  %513 = fmul float %510, %511
>  %514 = fadd float %512, %512
>  %515 = fadd float %513, %513
>  %516 = fsub float -0.000000e+00, %514
>  %517 = fadd float %516, 1.000000e+00
>  %518 = fsub float -0.000000e+00, %491
>  %519 = fmul float %387, %518
>  %520 = fadd float %519, %495
>  %521 = fadd float %497, %496
>  %522 = fmul float %464, %493
>  %523 = fmul float %464, %491
>  %524 = fmul float %465, %493
>  %525 = fadd float %521, %18
>  %526 = fadd float %520, %18
>  %527 = fsub float -0.000000e+00, %491
>  %528 = fmul float %465, %527
>  %529 = fadd float %528, %522
>  %530 = fadd float %524, %523
>  %531 = fmul float %386, %517
>  %532 = fmul float %386, %515
>  %533 = fmul float %387, %517
>  %534 = fsub float -0.000000e+00, %515
>  %535 = fmul float %387, %534
>  %536 = fadd float %535, %531
>  %537 = fadd float %533, %532
>  %538 = fadd float %537, %18
>  %539 = fadd float %536, %18
>  %540 = fmul float %464, %517
>  %541 = fmul float %464, %515
>  %542 = fmul float %465, %517
>  %543 = fsub float -0.000000e+00, %515
>  %544 = fmul float %465, %543
>  %545 = fadd float %544, %540
>  %546 = fadd float %542, %541
>  %547 = fsub float -0.000000e+00, %158
>  %548 = fmul float %151, %16
>  %549 = fadd float %548, %547
>  %550 = fsub float -0.000000e+00, %144
>  %551 = fmul float %88, %158
>  %552 = fadd float %551, %137
>  %553 = fmul float %90, %158
>  %554 = fadd float %553, %550
>  %555 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %556 = load float addrspace(2)* addrspace(2)* %555, !tbaa !0
>  %557 = getelementptr float addrspace(2)* %556, i32 0
>  %558 = load float addrspace(2)* %557, !tbaa !0
>  %559 = fmul float %558, %137
>  %560 = getelementptr float addrspace(2)* %556, i32 1
>  %561 = load float addrspace(2)* %560, !tbaa !0
>  %562 = fmul float %561, %144
>  %563 = fadd float %559, %562
>  %564 = getelementptr float addrspace(2)* %556, i32 2
>  %565 = load float addrspace(2)* %564, !tbaa !0
>  %566 = fmul float %565, %151
>  %567 = fadd float %563, %566
>  %568 = getelementptr float addrspace(2)* %556, i32 3
>  %569 = load float addrspace(2)* %568, !tbaa !0
>  %570 = fmul float %569, %158
>  %571 = fadd float %567, %570
>  %572 = getelementptr float addrspace(2)* %556, i32 4
>  %573 = load float addrspace(2)* %572, !tbaa !0
>  %574 = fmul float %573, %137
>  %575 = getelementptr float addrspace(2)* %556, i32 5
>  %576 = load float addrspace(2)* %575, !tbaa !0
>  %577 = fmul float %576, %144
>  %578 = fadd float %574, %577
>  %579 = getelementptr float addrspace(2)* %556, i32 6
>  %580 = load float addrspace(2)* %579, !tbaa !0
>  %581 = fmul float %580, %151
>  %582 = fadd float %578, %581
>  %583 = getelementptr float addrspace(2)* %556, i32 7
>  %584 = load float addrspace(2)* %583, !tbaa !0
>  %585 = fmul float %584, %158
>  %586 = fadd float %582, %585
>  %587 = getelementptr float addrspace(2)* %556, i32 8
>  %588 = load float addrspace(2)* %587, !tbaa !0
>  %589 = fmul float %588, %137
>  %590 = getelementptr float addrspace(2)* %556, i32 9
>  %591 = load float addrspace(2)* %590, !tbaa !0
>  %592 = fmul float %591, %144
>  %593 = fadd float %589, %592
>  %594 = getelementptr float addrspace(2)* %556, i32 10
>  %595 = load float addrspace(2)* %594, !tbaa !0
>  %596 = fmul float %595, %151
>  %597 = fadd float %593, %596
>  %598 = getelementptr float addrspace(2)* %556, i32 11
>  %599 = load float addrspace(2)* %598, !tbaa !0
>  %600 = fmul float %599, %158
>  %601 = fadd float %597, %600
>  %602 = getelementptr float addrspace(2)* %556, i32 12
>  %603 = load float addrspace(2)* %602, !tbaa !0
>  %604 = fmul float %603, %137
>  %605 = getelementptr float addrspace(2)* %556, i32 13
>  %606 = load float addrspace(2)* %605, !tbaa !0
>  %607 = fmul float %606, %144
>  %608 = fadd float %604, %607
>  %609 = getelementptr float addrspace(2)* %556, i32 14
>  %610 = load float addrspace(2)* %609, !tbaa !0
>  %611 = fmul float %610, %151
>  %612 = fadd float %608, %611
>  %613 = getelementptr float addrspace(2)* %556, i32 15
>  %614 = load float addrspace(2)* %613, !tbaa !0
>  %615 = fmul float %614, %158
>  %616 = fadd float %612, %615
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %571, float %586, float %601, float %616)
>  %617 = getelementptr float addrspace(2)* %556, i32 16
>  %618 = load float addrspace(2)* %617, !tbaa !0
>  %619 = fmul float %618, %137
>  %620 = getelementptr float addrspace(2)* %556, i32 17
>  %621 = load float addrspace(2)* %620, !tbaa !0
>  %622 = fmul float %621, %144
>  %623 = fadd float %619, %622
>  %624 = getelementptr float addrspace(2)* %556, i32 18
>  %625 = load float addrspace(2)* %624, !tbaa !0
>  %626 = fmul float %625, %151
>  %627 = fadd float %623, %626
>  %628 = getelementptr float addrspace(2)* %556, i32 19
>  %629 = load float addrspace(2)* %628, !tbaa !0
>  %630 = fmul float %629, %158
>  %631 = fadd float %627, %630
>  %632 = getelementptr float addrspace(2)* %556, i32 20
>  %633 = load float addrspace(2)* %632, !tbaa !0
>  %634 = fmul float %633, %137
>  %635 = getelementptr float addrspace(2)* %556, i32 21
>  %636 = load float addrspace(2)* %635, !tbaa !0
>  %637 = fmul float %636, %144
>  %638 = fadd float %634, %637
>  %639 = getelementptr float addrspace(2)* %556, i32 22
>  %640 = load float addrspace(2)* %639, !tbaa !0
>  %641 = fmul float %640, %151
>  %642 = fadd float %638, %641
>  %643 = getelementptr float addrspace(2)* %556, i32 23
>  %644 = load float addrspace(2)* %643, !tbaa !0
>  %645 = fmul float %644, %158
>  %646 = fadd float %642, %645
>  %647 = getelementptr float addrspace(2)* %556, i32 24
>  %648 = load float addrspace(2)* %647, !tbaa !0
>  %649 = fmul float %648, %137
>  %650 = getelementptr float addrspace(2)* %556, i32 25
>  %651 = load float addrspace(2)* %650, !tbaa !0
>  %652 = fmul float %651, %144
>  %653 = fadd float %649, %652
>  %654 = getelementptr float addrspace(2)* %556, i32 26
>  %655 = load float addrspace(2)* %654, !tbaa !0
>  %656 = fmul float %655, %151
>  %657 = fadd float %653, %656
>  %658 = getelementptr float addrspace(2)* %556, i32 27
>  %659 = load float addrspace(2)* %658, !tbaa !0
>  %660 = fmul float %659, %158
>  %661 = fadd float %657, %660
>  %662 = getelementptr float addrspace(2)* %556, i32 28
>  %663 = load float addrspace(2)* %662, !tbaa !0
>  %664 = fmul float %663, %137
>  %665 = getelementptr float addrspace(2)* %556, i32 29
>  %666 = load float addrspace(2)* %665, !tbaa !0
>  %667 = fmul float %666, %144
>  %668 = fadd float %664, %667
>  %669 = getelementptr float addrspace(2)* %556, i32 30
>  %670 = load float addrspace(2)* %669, !tbaa !0
>  %671 = fmul float %670, %151
>  %672 = fadd float %668, %671
>  %673 = getelementptr float addrspace(2)* %556, i32 31
>  %674 = load float addrspace(2)* %673, !tbaa !0
>  %675 = fmul float %674, %158
>  %676 = fadd float %672, %675
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %631, float %646, float %661, float %676)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %473, float %494, float %530, float %529)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %466, float %467, float %525, float %526)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %545, float %546, float %538, float %539)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %552, float %554, float %549, float %158)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.fraction.(float) #2
>
>; Function Attrs: readonly
>declare float @fabs(float) #3
>
>; Function Attrs: readnone
>declare float @llvm.AMDGPU.rsq(float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>attributes #3 = { readonly }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840700
>bf8c007f
>e00c2000
>80020100
>c0410100
>bf8c0070
>c00483c5
>bf8c007f
>100a0409
>c00503c4
>bf8c007f
>d2820005
>04141501
>c00583c6
>bf8c007f
>d2820005
>04141703
>c00203c7
>bf8c007f
>d2820005
>04140904
>c00203c9
>bf8c007f
>100c0404
>c00283c8
>bf8c007f
>d2820006
>04180b01
>c00403ca
>bf8c007f
>d2820006
>04181103
>c00603cb
>bf8c007f
>d2820006
>04181904
>c0060321
>bf8c007f
>100e0c0c
>c0060320
>bf8c007f
>d2820008
>041c1905
>c00603cd
>bf8c007f
>100e040c
>c00683cc
>bf8c007f
>d2820007
>041c1b01
>c00703ce
>bf8c007f
>d2820007
>041c1d03
>c00783cf
>bf8c007f
>d2820007
>041c1f04
>c0078322
>bf8c007f
>d2820001
>04201f07
>c0078301
>c0080323
>bf8c007f
>7e040210
>d2820001
>0406040f
>c0080325
>bf8c007f
>10040c10
>c0080324
>bf8c007f
>d2820002
>04082105
>c0080326
>bf8c007f
>d2820002
>04082107
>c0080327
>bf8c007f
>7e060210
>d2820002
>040a060f
>c0400102
>bf8c007f
>c008010d
>bf8c007f
>10060410
>c008010c
>bf8c007f
>d2820004
>040e0210
>c0080329
>bf8c007f
>10060c10
>c0080328
>bf8c007f
>d2820003
>040c2105
>c008032a
>bf8c007f
>d2820003
>040c2107
>c008032b
>bf8c007f
>7e100210
>d2820003
>040e100f
>c008010e
>bf8c007f
>d2820008
>04120610
>c008032d
>bf8c007f
>10080c10
>c008032c
>bf8c007f
>d2820004
>04102105
>c008032e
>bf8c007f
>d2820004
>04102107
>c008032f
>bf8c007f
>7e120210
>d2820004
>0412120f
>c008010f
>bf8c007f
>d2820008
>04220810
>c0080109
>bf8c007f
>10120410
>c0080108
>bf8c007f
>d2820009
>04260210
>c008010a
>bf8c007f
>d2820009
>04260610
>c008010b
>bf8c007f
>d2820009
>04260810
>c0080105
>bf8c007f
>10140410
>c0080104
>bf8c007f
>d282000a
>042a0210
>c0080106
>bf8c007f
>d282000a
>042a0610
>c0080107
>bf8c007f
>d282000a
>042a0810
>c0080101
>bf8c007f
>10160410
>c0080100
>bf8c007f
>d282000b
>042e0210
>c0080102
>bf8c007f
>d282000b
>042e0610
>c0080103
>bf8c007f
>d282000b
>042e0810
>f80000ef
>08090a0b
>c008011d
>bf8c000f
>10100410
>c008011c
>bf8c007f
>d2820008
>04220210
>c008011e
>bf8c007f
>d2820008
>04220610
>c008011f
>bf8c007f
>d2820008
>04220810
>c0080119
>bf8c007f
>10120410
>c0080118
>bf8c007f
>d2820009
>04260210
>c008011a
>bf8c007f
>d2820009
>04260610
>c008011b
>bf8c007f
>d2820009
>04260810
>c0080115
>bf8c007f
>10140410
>c0080114
>bf8c007f
>d282000a
>042a0210
>c0080116
>bf8c007f
>d282000a
>042a0610
>c0080117
>bf8c007f
>d282000a
>042a0810
>c0080111
>bf8c007f
>10160410
>c0080110
>bf8c007f
>d282000b
>042e0210
>c0080112
>bf8c007f
>d282000b
>042e0610
>c0000113
>bf8c007f
>d282000b
>042e0800
>f80000ff
>08090a0b
>c0880704
>bf8c000f
>e00c2000
>80040b00
>bf8c0770
>06101cff
>c3000000
>d2060109
>02010108
>c0008300
>bf8c007f
>d0020010
>02000308
>d2000008
>0041e480
>d2060008
>22010108
>7e101108
>361010f2
>08121109
>061412ff
>c2800000
>d2060109
>0201010a
>d0020010
>0200030a
>d200000a
>0041e480
>d206000a
>2201010a
>7e14110a
>361414f2
>081e1509
>06121aff
>c3000000
>d2060110
>02010109
>d0020010
>02000309
>d2000009
>0041e480
>d2060009
>22010109
>7e121109
>361212f2
>08201310
>062220ff
>c2800000
>d2060110
>02010111
>d0020010
>02000311
>d2000011
>0041e480
>d2060011
>22010111
>7e221111
>362422f2
>08262510
>7e2202ff
>bc820821
>d2820010
>03ca2313
>d2820010
>0442230f
>10281eff
>3c820821
>101e26ff
>3c820821
>10261f0f
>d2820013
>044e2914
>d2820013
>044e2110
>7e265b13
>10282714
>c0000302
>bf8c007f
>10141400
>0814140f
>1014290a
>101e270f
>10242400
>0824240f
>101e1f12
>10241e0d
>d2820012
>0448190a
>10202710
>10121200
>0812120f
>10202109
>d2820009
>04481d10
>062618ff
>c3000000
>d2060112
>02010113
>d0020010
>02000313
>d2000013
>0041e480
>d2060013
>22010113
>7e261113
>362626f2
>08242712
>062424ff
>c2800000
>d2060113
>02010112
>d0020010
>02000312
>d2000012
>0041e480
>d2060012
>22010112
>7e241112
>362424f2
>08262513
>061616ff
>c3000000
>d206010c
>0201010b
>d0020010
>0200030b
>d200000b
>0041e480
>d206000b
>2201010b
>7e16110b
>361616f2
>0818170c
>061a18ff
>c2800000
>d206010c
>0201010d
>d0020010
>0200030d
>d200000d
>0041e480
>d206000d
>2201010d
>7e1a110d
>361a1af2
>08281b0c
>d282000c
>03ca2314
>d282000c
>04322313
>101c26ff
>3c820821
>102228ff
>3c820821
>10262311
>d2820013
>044e1d0e
>d2820013
>044e190c
>7e265b13
>101c270e
>10242400
>0824240f
>101c1d12
>10222711
>101a1a00
>081a1a0f
>1022230d
>101a220a
>d282000d
>0434130e
>1018270c
>10161600
>0816160f
>1024190b
>d282000b
>04341712
>1026130b
>10181e0a
>d282000c
>0430130a
>d282000d
>04301710
>1018220d
>d282000c
>0430190e
>d282000c
>04301d12
>10281b0c
>08262714
>10101000
>0828100f
>10262714
>10101e05
>d2820008
>0420090a
>d282000a
>04201110
>101e150c
>10102205
>d2820008
>0420090e
>d2820008
>04201112
>101c1308
>081c1f0e
>10221d14
>101c2311
>d282000f
>043a2713
>101c1b08
>1020150b
>081c1d10
>101c1d14
>d282000f
>043e1d0e
>7e1e5b0f
>10201f13
>10221f11
>c0008309
>bf8c007f
>0a0c0c01
>c0008308
>bf8c007f
>0a0a0a01
>10240b05
>d2820013
>044a0d06
>c000830a
>bf8c007f
>0a240e01
>d2820007
>044e2512
>7e265b07
>100a2705
>10222305
>100e2706
>d2820006
>04462107
>101e1f0e
>101c2712
>d2820006
>041a1f0e
>101e1b0d
>d282000f
>043e150a
>d282000f
>043e1309
>7e1e5b0f
>10141f0a
>101a1f0d
>101a1b05
>d282000a
>04361507
>10121f09
>d2820009
>042a130e
>10141309
>d282000a
>042a0d06
>101a170b
>d282000d
>04361108
>d282000d
>0436190c
>7e1a5b0d
>10101b08
>10161b0b
>100a1705
>d2820005
>04161107
>100e1b0c
>d2820005
>04160f0e
>d2820005
>042a0b05
>7e0e5b05
>100a0f06
>100c0f09
>c00083c1
>7e0e02ff
>3e22f983
>bf8c007f
>d2820008
>03c20e01
>7e144108
>7e1002ff
>c0490fdb
>7e1202ff
>40c90fdb
>d2820010
>0422130a
>10222110
>7e1402ff
>3b2aaaab
>7e1602ff
>b7b60b61
>d282000d
>042a1711
>7e1802ff
>be000000
>d282000d
>0432230d
>d2820012
>03ca230d
>7e1a02ff
>39888889
>7e1c02ff
>b5d00d01
>d2820013
>04361d11
>7e1e02ff
>bcaaaaab
>d2820013
>043e2313
>d2820011
>03c22313
>10222111
>10202312
>d2820010
>04422312
>10242106
>10262311
>d2820011
>044e2311
>082222f2
>d2820012
>044a2305
>c00083c2
>bf8c007f
>d2820013
>03c20e01
>7e264113
>d2820013
>04221313
>10282713
>d2820015
>042a1714
>d2820015
>04322915
>d2820015
>03ca2915
>d2820016
>04361d14
>d2820016
>043e2916
>d2820014
>03c22916
>10282714
>10262915
>d2820013
>044e2915
>102a0d13
>102c2914
>d2820014
>045a2914
>082828f2
>d2820015
>04560b14
>102c2105
>102e2306
>082c2d17
>102e2705
>10300d14
>082e2f18
>f800020f
>16121517
>c0820708
>bf8c000f
>e00c2000
>80011500
>bf8c0770
>06002af1
>10322100
>06242cf1
>d2820015
>04662312
>c0008303
>bf8c007f
>062a2a01
>102c0113
>d2820016
>045a2514
>062c2c01
>10202112
>10222300
>08202111
>06202001
>10222712
>10260114
>08222313
>06222201
>f800021f
>10151611
>c00203c0
>bf8c000f
>d2820007
>03c20e04
>7e0e4107
>d2820007
>04221307
>10100f07
>d2820009
>042a1708
>d2820009
>04321109
>d2820009
>03ca1109
>d282000a
>04361d08
>d282000a
>043e110a
>d2820008
>03c2110a
>10100f08
>100e1109
>d2820007
>041e1109
>10140f06
>10121108
>d2820008
>04261108
>081210f2
>d2820008
>042a1305
>100a0f05
>100c1306
>080a0b06
>100c0f00
>d2820006
>041a1312
>060c0c01
>100e0f12
>10001300
>08000f00
>06000001
>f800022f
>00060805
>c00083d0
>bf8c000f
>d2820000
>04060801
>10020600
>08020901
>c00003d1
>bf8c007f
>10060800
>08040503
>f80008cf
>04010200
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], GENERIC[19], PERSPECTIVE
>DCL IN[2], GENERIC[20], PERSPECTIVE
>DCL IN[3], GENERIC[21], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL CONST[0..30]
>DCL TEMP[0..3], LOCAL
>DCL TEMP[4], ARRAY(1), LOCAL
>  0: MOV TEMP[0].xy, IN[1].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MOV TEMP[1].xy, IN[3].xyyy
>  3: TEX TEMP[2].xyz, TEMP[1], SAMP[1], 2D
>  4: MUL TEMP[2].xyz, TEMP[2].xyzz, CONST[12].xyzz
>  5: MAD TEMP[3].x, IN[2].wwww, CONST[11].wwww, -CONST[11].xxxx
>  6: MUL TEMP[1].xyz, TEMP[0].xyzz, IN[0].xyzz
>  7: MIN TEMP[3].x, TEMP[3].xxxx, CONST[11].zzzz
>  8: MOV_SAT TEMP[3].x, TEMP[3].xxxx
>  9: MUL TEMP[1].xyz, TEMP[2].xyzz, TEMP[1].xyzz
> 10: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[3].xxxx
> 11: MAD TEMP[2].xyz, TEMP[1].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 12: MUL TEMP[2].xyz, TEMP[3].xxxx, TEMP[2].xyzz
> 13: MUL TEMP[3].x, IN[0].wwww, CONST[12].wwww
> 14: MAD TEMP[1].xyz, TEMP[1].xyzz, CONST[30].xxxx, TEMP[2].xyzz
> 15: MUL TEMP[0].x, TEMP[0].wwww, TEMP[3].xxxx
> 16: MOV TEMP[1].w, TEMP[0].xxxx
> 17: MOV TEMP[4], TEMP[1]
> 18: MOV OUT[0], TEMP[4]
> 19: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 44
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 46
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 47
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 48
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 49
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 50
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 51
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 116
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 117
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 118
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 120
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %45 = load <32 x i8> addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %47 = load <16 x i8> addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %49 = load <32 x i8> addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %51 = load <16 x i8> addrspace(2)* %50, !tbaa !0
>  %52 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %53 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %54 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %55 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %3, <2 x i32> %5)
>  %56 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %57 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %58 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %3, <2 x i32> %5)
>  %59 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %3, <2 x i32> %6)
>  %60 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %3, <2 x i32> %6)
>  %61 = bitcast float %56 to i32
>  %62 = bitcast float %57 to i32
>  %63 = insertelement <2 x i32> undef, i32 %61, i32 0
>  %64 = insertelement <2 x i32> %63, i32 %62, i32 1
>  %65 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %64, <32 x i8> %45, <16 x i8> %47, i32 2)
>  %66 = extractelement <4 x float> %65, i32 0
>  %67 = extractelement <4 x float> %65, i32 1
>  %68 = extractelement <4 x float> %65, i32 2
>  %69 = extractelement <4 x float> %65, i32 3
>  %70 = bitcast float %59 to i32
>  %71 = bitcast float %60 to i32
>  %72 = insertelement <2 x i32> undef, i32 %70, i32 0
>  %73 = insertelement <2 x i32> %72, i32 %71, i32 1
>  %74 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %73, <32 x i8> %49, <16 x i8> %51, i32 2)
>  %75 = extractelement <4 x float> %74, i32 0
>  %76 = extractelement <4 x float> %74, i32 1
>  %77 = extractelement <4 x float> %74, i32 2
>  %78 = fmul float %75, %29
>  %79 = fmul float %76, %31
>  %80 = fmul float %77, %33
>  %81 = fsub float -0.000000e+00, %23
>  %82 = fmul float %58, %27
>  %83 = fadd float %82, %81
>  %84 = fmul float %66, %52
>  %85 = fmul float %67, %53
>  %86 = fmul float %68, %54
>  %87 = fcmp uge float %83, %25
>  %88 = select i1 %87, float %25, float %83
>  %89 = call float @llvm.AMDIL.clamp.(float %88, float 0.000000e+00, float 1.000000e+00)
>  %90 = fmul float %78, %84
>  %91 = fmul float %79, %85
>  %92 = fmul float %80, %86
>  %93 = fmul float %89, %89
>  %94 = fsub float -0.000000e+00, %43
>  %95 = fmul float %90, %94
>  %96 = fadd float %95, %37
>  %97 = fsub float -0.000000e+00, %43
>  %98 = fmul float %91, %97
>  %99 = fadd float %98, %39
>  %100 = fsub float -0.000000e+00, %43
>  %101 = fmul float %92, %100
>  %102 = fadd float %101, %41
>  %103 = fmul float %93, %96
>  %104 = fmul float %93, %99
>  %105 = fmul float %93, %102
>  %106 = fmul float %55, %35
>  %107 = fmul float %90, %43
>  %108 = fadd float %107, %103
>  %109 = fmul float %91, %43
>  %110 = fadd float %109, %104
>  %111 = fmul float %92, %43
>  %112 = fadd float %111, %105
>  %113 = fmul float %69, %106
>  %114 = call i32 @llvm.SI.packf16(float %108, float %110)
>  %115 = bitcast i32 %114 to float
>  %116 = call i32 @llvm.SI.packf16(float %112, float %113)
>  %117 = bitcast i32 %116 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %115, float %117, float %115, float %117)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8140500
>c8150501
>c8100400
>c8110401
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430404
>c8200100
>c8210101
>bf8c0770
>10161105
>c8240d02
>c8250d03
>c8200c02
>c8210c03
>c0840304
>c0c60508
>bf8c007f
>f0800700
>00430808
>c0400100
>bf8c0070
>c0010131
>bf8c007f
>10041202
>10061702
>c0010178
>bf8c007f
>10040602
>c0018175
>bf8c007f
>08160403
>c8080b00
>c8090b01
>c001812f
>bf8c007f
>10040403
>c001812c
>bf8c007f
>0a040403
>c001812e
>bf8c007f
>d00c0004
>02000702
>7e180203
>d2000002
>00121902
>d2060802
>02010102
>10040502
>10161702
>d2820003
>042c0503
>c82c0000
>c82d0001
>10161704
>c0018130
>bf8c007f
>10181003
>1016170c
>10181602
>c0018174
>bf8c007f
>08181803
>10181902
>d282000b
>0430050b
>5e06070b
>c82c0200
>c82d0201
>10161706
>c0018132
>bf8c007f
>10101403
>10101708
>10121002
>c0018176
>bf8c007f
>08121203
>10041302
>d2820002
>04080508
>c8200300
>c8210301
>c0000133
>bf8c007f
>10001000
>10000107
>5e000102
>f8001c0f
>00030003
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], CLIPVERTEX
>DCL OUT[3], GENERIC[19]
>DCL OUT[4], GENERIC[20]
>DCL OUT[5], GENERIC[21]
>DCL CONST[0..51]
>DCL TEMP[0..8], LOCAL
>  0: MAD TEMP[0], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  1: DP4 TEMP[1].x, TEMP[0], CONST[48]
>  2: DP4 TEMP[2].x, TEMP[0], CONST[49]
>  3: MOV TEMP[1].y, TEMP[2].xxxx
>  4: DP4 TEMP[2].x, TEMP[0], CONST[50]
>  5: MOV TEMP[1].z, TEMP[2].xxxx
>  6: DP4 TEMP[2].x, TEMP[0], CONST[4]
>  7: DP4 TEMP[3].x, TEMP[0], CONST[5]
>  8: MOV TEMP[2].y, TEMP[3].xxxx
>  9: DP4 TEMP[4].x, TEMP[0], CONST[12]
> 10: DP4 TEMP[5].x, TEMP[0], CONST[6]
> 11: MOV TEMP[2].z, TEMP[5].xxxx
> 12: DP4 TEMP[0].x, TEMP[0], CONST[7]
> 13: MOV TEMP[2].w, TEMP[0].xxxx
> 14: MOV TEMP[1].w, TEMP[4].xxxx
> 15: MOV TEMP[4].xy, IN[1].xyxx
> 16: MUL TEMP[6], IN[2].xyxx, CONST[0].yyxx
> 17: MAD TEMP[7], CONST[47].wwww, CONST[0].xxxy, CONST[0].yyyx
> 18: MOV TEMP[8], TEMP[2]
> 19: MAD TEMP[5].x, TEMP[5].xxxx, CONST[0].zzzz, -TEMP[0].xxxx
> 20: MOV TEMP[2].z, TEMP[5].xxxx
> 21: MOV TEMP[2].y, -TEMP[3].xxxx
> 22: MAD TEMP[2].xy, CONST[51].xyyy, TEMP[0].xxxx, TEMP[2].xyyy
> 23: MOV OUT[3], TEMP[4]
> 24: MOV OUT[5], TEMP[6]
> 25: MOV OUT[0], TEMP[2]
> 26: MOV OUT[4], TEMP[1]
> 27: MOV OUT[2], TEMP[8]
> 28: MOV_SAT OUT[1], TEMP[7]
> 29: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 16
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 17
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 18
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 19
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 20
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 21
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 22
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 23
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 24
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 25
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 26
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 27
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 28
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 29
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 30
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 31
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 48
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 49
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 50
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 51
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 191
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 192
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 193
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 194
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 195
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 196
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 197
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 198
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 199
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 200
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 201
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 202
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 203
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 204
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 205
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %88 = load <16 x i8> addrspace(2)* %87, !tbaa !0
>  %89 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %88, i32 0, i32 %5)
>  %90 = extractelement <4 x float> %89, i32 0
>  %91 = extractelement <4 x float> %89, i32 1
>  %92 = extractelement <4 x float> %89, i32 2
>  %93 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %94 = load <16 x i8> addrspace(2)* %93, !tbaa !0
>  %95 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %94, i32 0, i32 %5)
>  %96 = extractelement <4 x float> %95, i32 0
>  %97 = extractelement <4 x float> %95, i32 1
>  %98 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %99 = load <16 x i8> addrspace(2)* %98, !tbaa !0
>  %100 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %99, i32 0, i32 %5)
>  %101 = extractelement <4 x float> %100, i32 0
>  %102 = extractelement <4 x float> %100, i32 1
>  %103 = fmul float %90, %14
>  %104 = fadd float %103, %12
>  %105 = fmul float %91, %14
>  %106 = fadd float %105, %12
>  %107 = fmul float %92, %14
>  %108 = fadd float %107, %12
>  %109 = fmul float %90, %12
>  %110 = fadd float %109, %14
>  %111 = fmul float %104, %60
>  %112 = fmul float %106, %62
>  %113 = fadd float %111, %112
>  %114 = fmul float %108, %64
>  %115 = fadd float %113, %114
>  %116 = fmul float %110, %66
>  %117 = fadd float %115, %116
>  %118 = fmul float %104, %68
>  %119 = fmul float %106, %70
>  %120 = fadd float %118, %119
>  %121 = fmul float %108, %72
>  %122 = fadd float %120, %121
>  %123 = fmul float %110, %74
>  %124 = fadd float %122, %123
>  %125 = fmul float %104, %76
>  %126 = fmul float %106, %78
>  %127 = fadd float %125, %126
>  %128 = fmul float %108, %80
>  %129 = fadd float %127, %128
>  %130 = fmul float %110, %82
>  %131 = fadd float %129, %130
>  %132 = fmul float %104, %18
>  %133 = fmul float %106, %20
>  %134 = fadd float %132, %133
>  %135 = fmul float %108, %22
>  %136 = fadd float %134, %135
>  %137 = fmul float %110, %24
>  %138 = fadd float %136, %137
>  %139 = fmul float %104, %26
>  %140 = fmul float %106, %28
>  %141 = fadd float %139, %140
>  %142 = fmul float %108, %30
>  %143 = fadd float %141, %142
>  %144 = fmul float %110, %32
>  %145 = fadd float %143, %144
>  %146 = fmul float %104, %50
>  %147 = fmul float %106, %52
>  %148 = fadd float %146, %147
>  %149 = fmul float %108, %54
>  %150 = fadd float %148, %149
>  %151 = fmul float %110, %56
>  %152 = fadd float %150, %151
>  %153 = fmul float %104, %34
>  %154 = fmul float %106, %36
>  %155 = fadd float %153, %154
>  %156 = fmul float %108, %38
>  %157 = fadd float %155, %156
>  %158 = fmul float %110, %40
>  %159 = fadd float %157, %158
>  %160 = fmul float %104, %42
>  %161 = fmul float %106, %44
>  %162 = fadd float %160, %161
>  %163 = fmul float %108, %46
>  %164 = fadd float %162, %163
>  %165 = fmul float %110, %48
>  %166 = fadd float %164, %165
>  %167 = fmul float %101, %14
>  %168 = fmul float %102, %14
>  %169 = fmul float %101, %12
>  %170 = fmul float %101, %12
>  %171 = fmul float %58, %12
>  %172 = fadd float %171, %14
>  %173 = fmul float %58, %12
>  %174 = fadd float %173, %14
>  %175 = fmul float %58, %12
>  %176 = fadd float %175, %14
>  %177 = fmul float %58, %14
>  %178 = fadd float %177, %12
>  %179 = fsub float -0.000000e+00, %166
>  %180 = fmul float %159, %16
>  %181 = fadd float %180, %179
>  %182 = fsub float -0.000000e+00, %145
>  %183 = fmul float %84, %166
>  %184 = fadd float %183, %138
>  %185 = fmul float %86, %166
>  %186 = fadd float %185, %182
>  %187 = call float @llvm.AMDIL.clamp.(float %172, float 0.000000e+00, float 1.000000e+00)
>  %188 = call float @llvm.AMDIL.clamp.(float %174, float 0.000000e+00, float 1.000000e+00)
>  %189 = call float @llvm.AMDIL.clamp.(float %176, float 0.000000e+00, float 1.000000e+00)
>  %190 = call float @llvm.AMDIL.clamp.(float %178, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %187, float %188, float %189, float %190)
>  %191 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %192 = load float addrspace(2)* addrspace(2)* %191, !tbaa !0
>  %193 = getelementptr float addrspace(2)* %192, i32 0
>  %194 = load float addrspace(2)* %193, !tbaa !0
>  %195 = fmul float %194, %138
>  %196 = getelementptr float addrspace(2)* %192, i32 1
>  %197 = load float addrspace(2)* %196, !tbaa !0
>  %198 = fmul float %197, %145
>  %199 = fadd float %195, %198
>  %200 = getelementptr float addrspace(2)* %192, i32 2
>  %201 = load float addrspace(2)* %200, !tbaa !0
>  %202 = fmul float %201, %159
>  %203 = fadd float %199, %202
>  %204 = getelementptr float addrspace(2)* %192, i32 3
>  %205 = load float addrspace(2)* %204, !tbaa !0
>  %206 = fmul float %205, %166
>  %207 = fadd float %203, %206
>  %208 = getelementptr float addrspace(2)* %192, i32 4
>  %209 = load float addrspace(2)* %208, !tbaa !0
>  %210 = fmul float %209, %138
>  %211 = getelementptr float addrspace(2)* %192, i32 5
>  %212 = load float addrspace(2)* %211, !tbaa !0
>  %213 = fmul float %212, %145
>  %214 = fadd float %210, %213
>  %215 = getelementptr float addrspace(2)* %192, i32 6
>  %216 = load float addrspace(2)* %215, !tbaa !0
>  %217 = fmul float %216, %159
>  %218 = fadd float %214, %217
>  %219 = getelementptr float addrspace(2)* %192, i32 7
>  %220 = load float addrspace(2)* %219, !tbaa !0
>  %221 = fmul float %220, %166
>  %222 = fadd float %218, %221
>  %223 = getelementptr float addrspace(2)* %192, i32 8
>  %224 = load float addrspace(2)* %223, !tbaa !0
>  %225 = fmul float %224, %138
>  %226 = getelementptr float addrspace(2)* %192, i32 9
>  %227 = load float addrspace(2)* %226, !tbaa !0
>  %228 = fmul float %227, %145
>  %229 = fadd float %225, %228
>  %230 = getelementptr float addrspace(2)* %192, i32 10
>  %231 = load float addrspace(2)* %230, !tbaa !0
>  %232 = fmul float %231, %159
>  %233 = fadd float %229, %232
>  %234 = getelementptr float addrspace(2)* %192, i32 11
>  %235 = load float addrspace(2)* %234, !tbaa !0
>  %236 = fmul float %235, %166
>  %237 = fadd float %233, %236
>  %238 = getelementptr float addrspace(2)* %192, i32 12
>  %239 = load float addrspace(2)* %238, !tbaa !0
>  %240 = fmul float %239, %138
>  %241 = getelementptr float addrspace(2)* %192, i32 13
>  %242 = load float addrspace(2)* %241, !tbaa !0
>  %243 = fmul float %242, %145
>  %244 = fadd float %240, %243
>  %245 = getelementptr float addrspace(2)* %192, i32 14
>  %246 = load float addrspace(2)* %245, !tbaa !0
>  %247 = fmul float %246, %159
>  %248 = fadd float %244, %247
>  %249 = getelementptr float addrspace(2)* %192, i32 15
>  %250 = load float addrspace(2)* %249, !tbaa !0
>  %251 = fmul float %250, %166
>  %252 = fadd float %248, %251
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %207, float %222, float %237, float %252)
>  %253 = getelementptr float addrspace(2)* %192, i32 16
>  %254 = load float addrspace(2)* %253, !tbaa !0
>  %255 = fmul float %254, %138
>  %256 = getelementptr float addrspace(2)* %192, i32 17
>  %257 = load float addrspace(2)* %256, !tbaa !0
>  %258 = fmul float %257, %145
>  %259 = fadd float %255, %258
>  %260 = getelementptr float addrspace(2)* %192, i32 18
>  %261 = load float addrspace(2)* %260, !tbaa !0
>  %262 = fmul float %261, %159
>  %263 = fadd float %259, %262
>  %264 = getelementptr float addrspace(2)* %192, i32 19
>  %265 = load float addrspace(2)* %264, !tbaa !0
>  %266 = fmul float %265, %166
>  %267 = fadd float %263, %266
>  %268 = getelementptr float addrspace(2)* %192, i32 20
>  %269 = load float addrspace(2)* %268, !tbaa !0
>  %270 = fmul float %269, %138
>  %271 = getelementptr float addrspace(2)* %192, i32 21
>  %272 = load float addrspace(2)* %271, !tbaa !0
>  %273 = fmul float %272, %145
>  %274 = fadd float %270, %273
>  %275 = getelementptr float addrspace(2)* %192, i32 22
>  %276 = load float addrspace(2)* %275, !tbaa !0
>  %277 = fmul float %276, %159
>  %278 = fadd float %274, %277
>  %279 = getelementptr float addrspace(2)* %192, i32 23
>  %280 = load float addrspace(2)* %279, !tbaa !0
>  %281 = fmul float %280, %166
>  %282 = fadd float %278, %281
>  %283 = getelementptr float addrspace(2)* %192, i32 24
>  %284 = load float addrspace(2)* %283, !tbaa !0
>  %285 = fmul float %284, %138
>  %286 = getelementptr float addrspace(2)* %192, i32 25
>  %287 = load float addrspace(2)* %286, !tbaa !0
>  %288 = fmul float %287, %145
>  %289 = fadd float %285, %288
>  %290 = getelementptr float addrspace(2)* %192, i32 26
>  %291 = load float addrspace(2)* %290, !tbaa !0
>  %292 = fmul float %291, %159
>  %293 = fadd float %289, %292
>  %294 = getelementptr float addrspace(2)* %192, i32 27
>  %295 = load float addrspace(2)* %294, !tbaa !0
>  %296 = fmul float %295, %166
>  %297 = fadd float %293, %296
>  %298 = getelementptr float addrspace(2)* %192, i32 28
>  %299 = load float addrspace(2)* %298, !tbaa !0
>  %300 = fmul float %299, %138
>  %301 = getelementptr float addrspace(2)* %192, i32 29
>  %302 = load float addrspace(2)* %301, !tbaa !0
>  %303 = fmul float %302, %145
>  %304 = fadd float %300, %303
>  %305 = getelementptr float addrspace(2)* %192, i32 30
>  %306 = load float addrspace(2)* %305, !tbaa !0
>  %307 = fmul float %306, %159
>  %308 = fadd float %304, %307
>  %309 = getelementptr float addrspace(2)* %192, i32 31
>  %310 = load float addrspace(2)* %309, !tbaa !0
>  %311 = fmul float %310, %166
>  %312 = fadd float %308, %311
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %267, float %282, float %297, float %312)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %96, float %97, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %117, float %124, float %131, float %152)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %167, float %168, float %169, float %170)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %184, float %186, float %181, float %166)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0410100
>bf8c007f
>c00403bf
>c0028300
>bf8c007f
>7e060205
>c0020301
>bf8c007f
>7e020204
>d2820002
>040e0208
>d2060802
>02010102
>d2820004
>04060608
>d2060804
>02010104
>f800020f
>02040404
>c0840700
>bf8c000f
>e00c2000
>80020600
>bf8c0770
>d2820002
>040c0906
>d2820004
>040c0907
>c0040311
>bf8c007f
>100a0808
>c0040310
>bf8c007f
>d282000a
>04141102
>d2820005
>040c0908
>c0040312
>bf8c007f
>d2820003
>04281105
>d2820006
>04040b06
>c0040313
>bf8c007f
>d2820001
>040c1106
>c0040315
>bf8c007f
>10060808
>c0040314
>bf8c007f
>d2820003
>040c1102
>c0040316
>bf8c007f
>d2820003
>040c1105
>c0040317
>bf8c007f
>d2820003
>040c1106
>c0400102
>bf8c007f
>c004010d
>bf8c007f
>100e0608
>c004010c
>bf8c007f
>d2820008
>041e0208
>c0040319
>bf8c007f
>100e0808
>c0040318
>bf8c007f
>d2820007
>041c1102
>c004031a
>bf8c007f
>d2820007
>041c1105
>c004031b
>bf8c007f
>d2820007
>041c1106
>c004010e
>bf8c007f
>d2820009
>04220e08
>c004031d
>bf8c007f
>10100808
>c004031c
>bf8c007f
>d2820008
>04201102
>c004031e
>bf8c007f
>d2820008
>04201105
>c004031f
>bf8c007f
>d2820008
>04201106
>c004010f
>bf8c007f
>d2820009
>04261008
>c0040109
>bf8c007f
>10140608
>c0040108
>bf8c007f
>d282000a
>042a0208
>c004010a
>bf8c007f
>d282000a
>042a0e08
>c004010b
>bf8c007f
>d282000a
>042a1008
>c0040105
>bf8c007f
>10160608
>c0040104
>bf8c007f
>d282000b
>042e0208
>c0040106
>bf8c007f
>d282000b
>042e0e08
>c0040107
>bf8c007f
>d282000b
>042e1008
>c0040101
>bf8c007f
>10180608
>c0040100
>bf8c007f
>d282000c
>04320208
>c0040102
>bf8c007f
>d282000c
>04320e08
>c0040103
>bf8c007f
>d282000c
>04321008
>f80000ef
>090a0b0c
>c004011d
>bf8c000f
>10120608
>c004011c
>bf8c007f
>d2820009
>04260208
>c004011e
>bf8c007f
>d2820009
>04260e08
>c004011f
>bf8c007f
>d2820009
>04261008
>c0040119
>bf8c007f
>10140608
>c0040118
>bf8c007f
>d282000a
>042a0208
>c004011a
>bf8c007f
>d282000a
>042a0e08
>c004011b
>bf8c007f
>d282000a
>042a1008
>c0040115
>bf8c007f
>10160608
>c0040114
>bf8c007f
>d282000b
>042e0208
>c0040116
>bf8c007f
>d282000b
>042e0e08
>c0040117
>bf8c007f
>d282000b
>042e1008
>c0040111
>bf8c007f
>10180608
>c0040110
>bf8c007f
>d282000c
>04320208
>c0040112
>bf8c007f
>d282000c
>04320e08
>c0000113
>bf8c007f
>d282000c
>04321000
>f80000ff
>090a0b0c
>c0840704
>bf8c000f
>e00c2000
>80020900
>7e1a0280
>bf8c0770
>f800021f
>0d0d0a09
>c0000331
>bf8c000f
>10120800
>c0000330
>bf8c007f
>d2820009
>04240102
>c0000332
>bf8c007f
>d2820009
>04240105
>c0000333
>bf8c007f
>d2820009
>04240106
>c00003c9
>bf8c007f
>10140800
>c00003c8
>bf8c007f
>d282000a
>04280102
>c00003ca
>bf8c007f
>d282000a
>04280105
>c00003cb
>bf8c007f
>d282000a
>04280106
>c00003c5
>bf8c007f
>10160800
>c00003c4
>bf8c007f
>d282000b
>042c0102
>c00003c6
>bf8c007f
>d282000b
>042c0105
>c00003c7
>bf8c007f
>d282000b
>042c0106
>c00003c1
>bf8c007f
>10080800
>c00003c0
>bf8c007f
>d2820002
>04100102
>c00003c2
>bf8c007f
>d2820002
>04080105
>c00003c3
>bf8c007f
>d2820002
>04080106
>f800022f
>090a0b02
>c0840708
>bf8c000f
>e00c2000
>80020900
>bf8c0770
>10001205
>10041404
>10081204
>f800023f
>00000204
>c00003cc
>bf8c000f
>d2820000
>04061000
>c0000302
>bf8c007f
>10020e00
>08021101
>c00003cd
>bf8c007f
>10041000
>08040702
>f80008cf
>08010200
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], GENERIC[19], PERSPECTIVE
>DCL IN[2], GENERIC[20], PERSPECTIVE
>DCL IN[3], GENERIC[21], PERSPECTIVE
>DCL IN[4], GENERIC[22], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL CONST[0..30]
>DCL TEMP[0..4], LOCAL
>DCL TEMP[5], ARRAY(1), LOCAL
>IMM[0] FLT32 {   -0.7500,     4.0000,    -2.0000,     3.0000}
>  0: RCP TEMP[0].x, IN[4].wwww
>  1: MUL TEMP[0].xy, TEMP[0].xxxx, IN[4].xyyy
>  2: MOV TEMP[1].xy, TEMP[0].xyyy
>  3: TEX TEMP[1].w, TEMP[1], SAMP[1], 2D
>  4: MOV TEMP[2].xy, IN[1].xyyy
>  5: TEX TEMP[2], TEMP[2], SAMP[0], 2D
>  6: ADD TEMP[3].x, TEMP[1].wwww, IMM[0].xxxx
>  7: MAD TEMP[1].x, IN[4].zzzz, -CONST[29].wwww, TEMP[1].wwww
>  8: MUL TEMP[3].x, TEMP[3].xxxx, IMM[0].yyyy
>  9: MOV_SAT TEMP[3].x, TEMP[3].xxxx
> 10: MAD TEMP[4].x, TEMP[3].xxxx, IMM[0].zzzz, IMM[0].wwww
> 11: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[3].xxxx
> 12: MUL TEMP[3].x, TEMP[4].xxxx, TEMP[3].xxxx
> 13: ABS TEMP[1].x, TEMP[1].xxxx
> 14: MUL TEMP[1].x, TEMP[1].xxxx, CONST[2].xxxx
> 15: MAX TEMP[1].x, TEMP[3].xxxx, TEMP[1].xxxx
> 16: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 17: MOV TEMP[3].xy, IN[2].xyyy
> 18: TEX TEMP[3], TEMP[3], SAMP[0], 2D
> 19: ADD TEMP[3], TEMP[3], -TEMP[2]
> 20: MAD TEMP[2], IN[3].xxxx, TEMP[3], TEMP[2]
> 21: MOV TEMP[0].w, TEMP[2].wwww
> 22: MUL TEMP[1].x, TEMP[1].xxxx, IN[0].wwww
> 23: MOV TEMP[1].w, TEMP[1].xxxx
> 24: MUL TEMP[0].xyz, TEMP[2].xyzz, CONST[0].yyyy
> 25: MOV TEMP[1].xyz, IN[0].xyzx
> 26: MUL TEMP[1], TEMP[0], TEMP[1]
> 27: MOV TEMP[0].w, TEMP[1].wwww
> 28: MUL TEMP[0].xyz, TEMP[1].xyzz, CONST[30].xxxx
> 29: MOV TEMP[5], TEMP[0]
> 30: MOV OUT[0], TEMP[5]
> 31: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 1
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 8
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 119
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 120
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %31 = load <32 x i8> addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %33 = load <16 x i8> addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %35 = load <32 x i8> addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %37 = load <16 x i8> addrspace(2)* %36, !tbaa !0
>  %38 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %39 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %41 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %3, <2 x i32> %5)
>  %42 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %43 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %44 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %45 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %46 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %3, <2 x i32> %5)
>  %47 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %3, <2 x i32> %5)
>  %48 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %3, <2 x i32> %5)
>  %49 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %3, <2 x i32> %5)
>  %50 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %3, <2 x i32> %5)
>  %51 = fdiv float 1.000000e+00, %50
>  %52 = fmul float %51, %47
>  %53 = fmul float %51, %48
>  %54 = bitcast float %52 to i32
>  %55 = bitcast float %53 to i32
>  %56 = insertelement <2 x i32> undef, i32 %54, i32 0
>  %57 = insertelement <2 x i32> %56, i32 %55, i32 1
>  %58 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %57, <32 x i8> %35, <16 x i8> %37, i32 2)
>  %59 = extractelement <4 x float> %58, i32 3
>  %60 = bitcast float %42 to i32
>  %61 = bitcast float %43 to i32
>  %62 = insertelement <2 x i32> undef, i32 %60, i32 0
>  %63 = insertelement <2 x i32> %62, i32 %61, i32 1
>  %64 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %63, <32 x i8> %31, <16 x i8> %33, i32 2)
>  %65 = extractelement <4 x float> %64, i32 0
>  %66 = extractelement <4 x float> %64, i32 1
>  %67 = extractelement <4 x float> %64, i32 2
>  %68 = extractelement <4 x float> %64, i32 3
>  %69 = fadd float %59, -7.500000e-01
>  %70 = fsub float -0.000000e+00, %27
>  %71 = fmul float %49, %70
>  %72 = fadd float %71, %59
>  %73 = fmul float %69, 4.000000e+00
>  %74 = call float @llvm.AMDIL.clamp.(float %73, float 0.000000e+00, float 1.000000e+00)
>  %75 = fmul float %74, -2.000000e+00
>  %76 = fadd float %75, 3.000000e+00
>  %77 = fmul float %74, %74
>  %78 = fmul float %76, %77
>  %79 = call float @fabs(float %72)
>  %80 = fmul float %79, %25
>  %81 = fcmp uge float %78, %80
>  %82 = select i1 %81, float %78, float %80
>  %83 = call float @llvm.AMDIL.clamp.(float %82, float 0.000000e+00, float 1.000000e+00)
>  %84 = bitcast float %44 to i32
>  %85 = bitcast float %45 to i32
>  %86 = insertelement <2 x i32> undef, i32 %84, i32 0
>  %87 = insertelement <2 x i32> %86, i32 %85, i32 1
>  %88 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %87, <32 x i8> %31, <16 x i8> %33, i32 2)
>  %89 = extractelement <4 x float> %88, i32 0
>  %90 = extractelement <4 x float> %88, i32 1
>  %91 = extractelement <4 x float> %88, i32 2
>  %92 = extractelement <4 x float> %88, i32 3
>  %93 = fsub float -0.000000e+00, %65
>  %94 = fadd float %89, %93
>  %95 = fsub float -0.000000e+00, %66
>  %96 = fadd float %90, %95
>  %97 = fsub float -0.000000e+00, %67
>  %98 = fadd float %91, %97
>  %99 = fsub float -0.000000e+00, %68
>  %100 = fadd float %92, %99
>  %101 = fmul float %46, %94
>  %102 = fadd float %101, %65
>  %103 = fmul float %46, %96
>  %104 = fadd float %103, %66
>  %105 = fmul float %46, %98
>  %106 = fadd float %105, %67
>  %107 = fmul float %46, %100
>  %108 = fadd float %107, %68
>  %109 = fmul float %83, %41
>  %110 = fmul float %102, %23
>  %111 = fmul float %104, %23
>  %112 = fmul float %106, %23
>  %113 = fmul float %110, %38
>  %114 = fmul float %111, %39
>  %115 = fmul float %112, %40
>  %116 = fmul float %108, %109
>  %117 = fmul float %113, %29
>  %118 = fmul float %114, %29
>  %119 = fmul float %115, %29
>  %120 = fcmp ugt float %116, 0x3F80101020000000
>  %121 = sext i1 %120 to i32
>  %122 = trunc i32 %121 to i1
>  %123 = select i1 %122, float 1.000000e+00, float -1.000000e+00
>  call void @llvm.AMDGPU.kill(float %123)
>  %124 = call i32 @llvm.SI.packf16(float %117, float %118)
>  %125 = bitcast i32 %124 to float
>  %126 = call i32 @llvm.SI.packf16(float %119, float %116)
>  %127 = bitcast i32 %126 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %125, float %127, float %125, float %127)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: readonly
>declare float @fabs(float) #3
>
>declare void @llvm.AMDGPU.kill(float)
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>attributes #3 = { readonly }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8081100
>c8091101
>c80c1300
>c80d1301
>7e085503
>10060504
>c8141000
>c8151001
>10040b04
>c0840304
>c0c60508
>bf8c007f
>f0800800
>00430202
>bf8c0770
>060604ff
>bf400000
>100606f6
>d2060803
>02010103
>7e0802ff
>40400000
>d2820004
>0411eb03
>10060703
>10060704
>c8101200
>c8111201
>c0400100
>bf8c007f
>c0038177
>bf8c007f
>10080807
>08040902
>d2060102
>02010102
>c0038108
>bf8c007f
>10040407
>d00c0008
>02020503
>d2000002
>00220702
>d2060802
>02010102
>c80c0300
>c80d0301
>10140702
>c80c0500
>c80d0501
>c8080400
>c8090401
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430202
>c81c0900
>c81d0901
>c8180800
>c8190801
>f0800f00
>00430606
>bf8c0770
>08180b09
>c82c0c00
>c82d0c01
>d282000c
>0416190b
>1014150c
>7e1802ff
>3c008081
>d0080002
>0202190a
>d200000c
>0009e4f3
>7c261880
>08180908
>d282000c
>0412190b
>c0010101
>bf8c007f
>10181802
>c8340200
>c8350201
>10181b0c
>c0000178
>bf8c007f
>10181800
>5e14150c
>08180707
>d282000c
>040e190b
>10181802
>c8340100
>c8350101
>10181b0c
>10181800
>080c0506
>d2820002
>040a0d0b
>10040402
>c80c0000
>c80d0001
>10000702
>10000000
>5e001900
>f8001c0f
>0a000a00
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL IN[4]
>DCL IN[5]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], CLIPVERTEX
>DCL OUT[3], GENERIC[19]
>DCL OUT[4], GENERIC[20]
>DCL OUT[5], GENERIC[21]
>DCL OUT[6], GENERIC[22]
>DCL CONST[0..61]
>DCL TEMP[0..12], LOCAL
>IMM[0] FLT32 {    2.2000,     1.0000,     0.1592,     0.5000}
>IMM[1] FLT32 {    6.2832,    -3.1416,    -0.0000,    -0.0000}
>IMM[2] FLT32 {    0.0003,     0.0026,    -0.0208,    -0.1250}
>IMM[3] FLT32 {    2.0000,    -1.0000,     0.0000,     0.0000}
>  0: DP4 TEMP[0].x, IN[1], CONST[58]
>  1: DP4 TEMP[1].x, IN[1], CONST[59]
>  2: MOV TEMP[0].y, TEMP[1].xxxx
>  3: DP4 TEMP[1].x, IN[1], CONST[60]
>  4: MOV TEMP[0].z, TEMP[1].xxxx
>  5: ADD TEMP[0].xyz, TEMP[0].xyzz, -CONST[2].xyzz
>  6: DP3 TEMP[0].x, TEMP[0].xyzz, TEMP[0].xyzz
>  7: RSQ TEMP[1].x, TEMP[0].xxxx
>  8: LG2 TEMP[0].x, IN[0].xxxx
>  9: LG2 TEMP[2].x, IN[0].yyyy
> 10: MOV TEMP[0].y, TEMP[2].xxxx
> 11: LG2 TEMP[2].x, IN[0].zzzz
> 12: MOV TEMP[0].z, TEMP[2].xxxx
> 13: RCP TEMP[1].x, TEMP[1].xxxx
> 14: MUL TEMP[0].xyz, TEMP[0].xyzz, IMM[0].xxxx
> 15: MUL TEMP[2], TEMP[1].xxxx, CONST[56].xzwy
> 16: EX2 TEMP[3].x, TEMP[0].xxxx
> 17: EX2 TEMP[4].x, TEMP[0].yyyy
> 18: MOV TEMP[3].y, TEMP[4].xxxx
> 19: EX2 TEMP[4].x, TEMP[0].zzzz
> 20: MOV TEMP[3].z, TEMP[4].xxxx
> 21: MAD TEMP[4].x, CONST[56].wwww, TEMP[1].xxxx, -TEMP[2].yyyy
> 22: RCP TEMP[4].x, TEMP[4].xxxx
> 23: MAX TEMP[5].x, TEMP[2].xxxx, IN[4].zzzz
> 24: MAD TEMP[6].x, CONST[56].zzzz, -TEMP[1].xxxx, TEMP[5].xxxx
> 25: ADD TEMP[7].x, TEMP[1].xxxx, -CONST[57].xxxx
> 26: MAD TEMP[6].x, TEMP[6].xxxx, -TEMP[4].xxxx, CONST[0].yyyy
> 27: MOV TEMP[3].w, IN[0].wwww
> 28: MUL TEMP[0], TEMP[3], TEMP[6].xxxx
> 29: MUL TEMP[6].x, TEMP[7].xxxx, CONST[57].yyyy
> 30: SLT TEMP[7].xy, TEMP[2].yzzz, TEMP[5].xxxx
> 31: F2I TEMP[7].xy, -TEMP[7]
> 32: AND TEMP[2].xy, TEMP[7].xyyy, IMM[0].yyyy
> 33: MAX TEMP[6].x, TEMP[6].xxxx, CONST[0].xxxx
> 34: MAD TEMP[1], TEMP[2].yyyy, -TEMP[0], TEMP[0]
> 35: MIN TEMP[6].x, TEMP[6].xxxx, CONST[0].yyyy
> 36: ADD TEMP[7], TEMP[1], -TEMP[3]
> 37: MAD TEMP[7], TEMP[2].xxxx, TEMP[7], TEMP[3]
> 38: ADD TEMP[6].x, -TEMP[6].xxxx, CONST[0].yyyy
> 39: MUL TEMP[7], TEMP[7], TEMP[6].xxxx
> 40: SGE TEMP[6].x, CONST[0].xxxx, TEMP[6].xxxx
> 41: F2I TEMP[6].x, -TEMP[6]
> 42: AND TEMP[6].x, TEMP[6].xxxx, IMM[0].yyyy
> 43: ADD TEMP[1].xy, -IN[2].zwww, IN[2].xyyy
> 44: ADD TEMP[0].xy, -IN[3].zwww, IN[3].xyyy
> 45: MAD TEMP[8].xy, IN[5].xyyy, TEMP[1].xyyy, IN[2].zwww
> 46: MAD TEMP[9].xy, IN[5].xyyy, TEMP[0].xyyy, IN[3].zwww
> 47: MUL TEMP[10].x, -TEMP[5].xxxx, TEMP[2].yyyy
> 48: MAD TEMP[0].xy, IN[4].wyyy, IMM[0].zzzz, IMM[0].wwww
> 49: MAD TEMP[10].x, TEMP[2].xxxx, TEMP[10].xxxx, TEMP[5].xxxx
> 50: FRC TEMP[11].xy, TEMP[0].xyyy
> 51: MAD TEMP[6].x, TEMP[6].xxxx, -TEMP[10].xxxx, TEMP[10].xxxx
> 52: MAD TEMP[5].xy, TEMP[11].xyyy, IMM[1].xxxx, IMM[1].yyyy
> 53: MUL TEMP[10].x, TEMP[5].yyyy, TEMP[5].yyyy
> 54: MAD TEMP[11].xy, TEMP[10].xxxx, IMM[1].zwww, IMM[2].xyyy
> 55: MAD TEMP[11].xy, TEMP[11].xyyy, TEMP[10].xxxx, IMM[2].zwww
> 56: MAD TEMP[11].xy, TEMP[11].xyyy, TEMP[10].xxxx, IMM[0].wyyy
> 57: MUL TEMP[11].x, TEMP[11].xxxx, TEMP[5].yyyy
> 58: MUL TEMP[11].xy, TEMP[11].xyyy, TEMP[11].xxxx
> 59: ADD TEMP[11].xy, TEMP[11].xyyy, TEMP[11].xyyy
> 60: ADD TEMP[11].x, -TEMP[11].xxxx, IMM[0].yyyy
> 61: MOV TEMP[0].x, TEMP[11].xyxx
> 62: MAD TEMP[4].xy, IMM[3].xxxx, IN[5].xyyy, IMM[3].yyyy
> 63: MIN TEMP[6].x, TEMP[2].wwww, TEMP[6].xxxx
> 64: MUL TEMP[10].xyz, TEMP[11].xyyy, TEMP[4].xyxx
> 65: MUL TEMP[12].x, TEMP[5].xxxx, TEMP[5].xxxx
> 66: MAD TEMP[11].xy, TEMP[12].xxxx, IMM[1].zwww, IMM[2].xyyy
> 67: MAD TEMP[11].xy, TEMP[11].xyyy, TEMP[12].xxxx, IMM[2].zwww
> 68: MAD TEMP[11].xy, TEMP[11].xyyy, TEMP[12].xxxx, IMM[0].wyyy
> 69: MUL TEMP[11].x, TEMP[11].xxxx, TEMP[5].xxxx
> 70: MUL TEMP[11].xy, TEMP[11].xyyy, TEMP[11].xxxx
> 71: ADD TEMP[11].xy, TEMP[11].xyyy, TEMP[11].xyyy
> 72: ADD TEMP[11].x, -TEMP[11].xxxx, IMM[0].yyyy
> 73: ADD TEMP[5].x, TEMP[10].yyyy, TEMP[10].xxxx
> 74: MAD TEMP[4].x, TEMP[4].yyyy, TEMP[0].xxxx, -TEMP[10].zzzz
> 75: MOV TEMP[0].y, TEMP[4].xxxx
> 76: MUL TEMP[4].xy, TEMP[11].xyyy, -TEMP[5].xxxx
> 77: MOV TEMP[0].x, TEMP[4].xxxy
> 78: MOV TEMP[0].z, -TEMP[4].yyyy
> 79: DP4 TEMP[2].x, IN[1], CONST[48]
> 80: DP4 TEMP[4].x, IN[1], CONST[49]
> 81: MOV TEMP[2].y, TEMP[4].xxxx
> 82: DP4 TEMP[4].x, IN[1], CONST[50]
> 83: MOV TEMP[2].z, TEMP[4].xxxx
> 84: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[6].xxxx, TEMP[2].xyzz
> 85: MOV TEMP[0].w, CONST[0].yyyy
> 86: DP4 TEMP[4].x, TEMP[0], CONST[52]
> 87: MOV TEMP[2].y, TEMP[4].xxxx
> 88: MOV TEMP[1].y, -TEMP[4].xxxx
> 89: DP4 TEMP[1].x, TEMP[0], CONST[51]
> 90: DP4 TEMP[5].x, TEMP[0], CONST[54]
> 91: MOV TEMP[2].w, TEMP[5].xxxx
> 92: DP4 TEMP[6].x, TEMP[0], CONST[53]
> 93: MOV TEMP[2].z, TEMP[6].xxxx
> 94: ADD TEMP[0].xy, TEMP[1].xyyy, TEMP[5].xxxx
> 95: MUL TEMP[0].xy, TEMP[0].xyyy, CONST[14].xyyy
> 96: MUL TEMP[3].xy, TEMP[5].xxxx, CONST[14].zwww
> 97: MOV TEMP[1].x, TEMP[1].xxxx
> 98: MAD TEMP[0].xy, TEMP[0].xyyy, CONST[0].wwww, TEMP[3].xyyy
> 99: MOV TEMP[1].yzw, TEMP[2].zyzw
>100: MOV TEMP[0].zw, TEMP[2].wwzw
>101: MUL TEMP[2], IN[4].xxxx, CONST[0].yxxx
>102: MOV TEMP[3], TEMP[1]
>103: MAD TEMP[6].x, TEMP[6].xxxx, CONST[0].zzzz, -TEMP[5].xxxx
>104: MOV TEMP[1].z, TEMP[6].xxxx
>105: MOV TEMP[1].y, -TEMP[4].xxxx
>106: MAD TEMP[1].xy, CONST[61].xyyy, TEMP[5].xxxx, TEMP[1].xyyy
>107: MOV OUT[3], TEMP[8]
>108: MOV OUT[4], TEMP[9]
>109: MOV OUT[5], TEMP[2]
>110: MOV OUT[0], TEMP[1]
>111: MOV OUT[2], TEMP[3]
>112: MOV OUT[6], TEMP[0]
>113: MOV_SAT OUT[1], TEMP[7]
>114: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 3
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 8
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 9
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 10
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 56
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 57
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 58
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 59
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 192
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 193
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 194
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 195
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 196
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 197
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 198
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 199
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 200
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 201
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 202
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 203
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 204
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 205
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 206
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 207
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 208
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 209
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 210
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 211
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 212
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 213
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 214
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 215
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 216
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 217
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 218
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 219
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 224
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 225
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 226
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr float addrspace(2)* %10, i32 227
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = getelementptr float addrspace(2)* %10, i32 228
>  %98 = load float addrspace(2)* %97, !tbaa !0
>  %99 = getelementptr float addrspace(2)* %10, i32 229
>  %100 = load float addrspace(2)* %99, !tbaa !0
>  %101 = getelementptr float addrspace(2)* %10, i32 232
>  %102 = load float addrspace(2)* %101, !tbaa !0
>  %103 = getelementptr float addrspace(2)* %10, i32 233
>  %104 = load float addrspace(2)* %103, !tbaa !0
>  %105 = getelementptr float addrspace(2)* %10, i32 234
>  %106 = load float addrspace(2)* %105, !tbaa !0
>  %107 = getelementptr float addrspace(2)* %10, i32 235
>  %108 = load float addrspace(2)* %107, !tbaa !0
>  %109 = getelementptr float addrspace(2)* %10, i32 236
>  %110 = load float addrspace(2)* %109, !tbaa !0
>  %111 = getelementptr float addrspace(2)* %10, i32 237
>  %112 = load float addrspace(2)* %111, !tbaa !0
>  %113 = getelementptr float addrspace(2)* %10, i32 238
>  %114 = load float addrspace(2)* %113, !tbaa !0
>  %115 = getelementptr float addrspace(2)* %10, i32 239
>  %116 = load float addrspace(2)* %115, !tbaa !0
>  %117 = getelementptr float addrspace(2)* %10, i32 240
>  %118 = load float addrspace(2)* %117, !tbaa !0
>  %119 = getelementptr float addrspace(2)* %10, i32 241
>  %120 = load float addrspace(2)* %119, !tbaa !0
>  %121 = getelementptr float addrspace(2)* %10, i32 242
>  %122 = load float addrspace(2)* %121, !tbaa !0
>  %123 = getelementptr float addrspace(2)* %10, i32 243
>  %124 = load float addrspace(2)* %123, !tbaa !0
>  %125 = getelementptr float addrspace(2)* %10, i32 244
>  %126 = load float addrspace(2)* %125, !tbaa !0
>  %127 = getelementptr float addrspace(2)* %10, i32 245
>  %128 = load float addrspace(2)* %127, !tbaa !0
>  %129 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %130 = load <16 x i8> addrspace(2)* %129, !tbaa !0
>  %131 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %130, i32 0, i32 %5)
>  %132 = extractelement <4 x float> %131, i32 0
>  %133 = extractelement <4 x float> %131, i32 1
>  %134 = extractelement <4 x float> %131, i32 2
>  %135 = extractelement <4 x float> %131, i32 3
>  %136 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %137 = load <16 x i8> addrspace(2)* %136, !tbaa !0
>  %138 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %137, i32 0, i32 %5)
>  %139 = extractelement <4 x float> %138, i32 0
>  %140 = extractelement <4 x float> %138, i32 1
>  %141 = extractelement <4 x float> %138, i32 2
>  %142 = extractelement <4 x float> %138, i32 3
>  %143 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %144 = load <16 x i8> addrspace(2)* %143, !tbaa !0
>  %145 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %144, i32 0, i32 %5)
>  %146 = extractelement <4 x float> %145, i32 0
>  %147 = extractelement <4 x float> %145, i32 1
>  %148 = extractelement <4 x float> %145, i32 2
>  %149 = extractelement <4 x float> %145, i32 3
>  %150 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %151 = load <16 x i8> addrspace(2)* %150, !tbaa !0
>  %152 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %151, i32 0, i32 %5)
>  %153 = extractelement <4 x float> %152, i32 0
>  %154 = extractelement <4 x float> %152, i32 1
>  %155 = extractelement <4 x float> %152, i32 2
>  %156 = extractelement <4 x float> %152, i32 3
>  %157 = getelementptr <16 x i8> addrspace(2)* %3, i32 4
>  %158 = load <16 x i8> addrspace(2)* %157, !tbaa !0
>  %159 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %158, i32 0, i32 %5)
>  %160 = extractelement <4 x float> %159, i32 0
>  %161 = extractelement <4 x float> %159, i32 1
>  %162 = extractelement <4 x float> %159, i32 2
>  %163 = extractelement <4 x float> %159, i32 3
>  %164 = getelementptr <16 x i8> addrspace(2)* %3, i32 5
>  %165 = load <16 x i8> addrspace(2)* %164, !tbaa !0
>  %166 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %165, i32 0, i32 %5)
>  %167 = extractelement <4 x float> %166, i32 0
>  %168 = extractelement <4 x float> %166, i32 1
>  %169 = fmul float %139, %102
>  %170 = fmul float %140, %104
>  %171 = fadd float %169, %170
>  %172 = fmul float %141, %106
>  %173 = fadd float %171, %172
>  %174 = fmul float %142, %108
>  %175 = fadd float %173, %174
>  %176 = fmul float %139, %110
>  %177 = fmul float %140, %112
>  %178 = fadd float %176, %177
>  %179 = fmul float %141, %114
>  %180 = fadd float %178, %179
>  %181 = fmul float %142, %116
>  %182 = fadd float %180, %181
>  %183 = fmul float %139, %118
>  %184 = fmul float %140, %120
>  %185 = fadd float %183, %184
>  %186 = fmul float %141, %122
>  %187 = fadd float %185, %186
>  %188 = fmul float %142, %124
>  %189 = fadd float %187, %188
>  %190 = fsub float -0.000000e+00, %20
>  %191 = fadd float %175, %190
>  %192 = fsub float -0.000000e+00, %22
>  %193 = fadd float %182, %192
>  %194 = fsub float -0.000000e+00, %24
>  %195 = fadd float %189, %194
>  %196 = fmul float %191, %191
>  %197 = fmul float %193, %193
>  %198 = fadd float %197, %196
>  %199 = fmul float %195, %195
>  %200 = fadd float %198, %199
>  %201 = call float @llvm.AMDGPU.rsq(float %200)
>  %202 = call float @llvm.log2.f32(float %132)
>  %203 = call float @llvm.log2.f32(float %133)
>  %204 = call float @llvm.log2.f32(float %134)
>  %205 = fdiv float 1.000000e+00, %201
>  %206 = fmul float %202, 0x40019999A0000000
>  %207 = fmul float %203, 0x40019999A0000000
>  %208 = fmul float %204, 0x40019999A0000000
>  %209 = fmul float %205, %90
>  %210 = fmul float %205, %94
>  %211 = fmul float %205, %96
>  %212 = fmul float %205, %92
>  %213 = call float @llvm.AMDIL.exp.(float %206)
>  %214 = call float @llvm.AMDIL.exp.(float %207)
>  %215 = call float @llvm.AMDIL.exp.(float %208)
>  %216 = fsub float -0.000000e+00, %210
>  %217 = fmul float %96, %205
>  %218 = fadd float %217, %216
>  %219 = fdiv float 1.000000e+00, %218
>  %220 = fcmp uge float %209, %162
>  %221 = select i1 %220, float %209, float %162
>  %222 = fsub float -0.000000e+00, %205
>  %223 = fmul float %94, %222
>  %224 = fadd float %223, %221
>  %225 = fsub float -0.000000e+00, %98
>  %226 = fadd float %205, %225
>  %227 = fsub float -0.000000e+00, %219
>  %228 = fmul float %224, %227
>  %229 = fadd float %228, %14
>  %230 = fmul float %213, %229
>  %231 = fmul float %214, %229
>  %232 = fmul float %215, %229
>  %233 = fmul float %135, %229
>  %234 = fmul float %226, %100
>  %235 = fcmp ult float %210, %221
>  %236 = select i1 %235, float 1.000000e+00, float 0.000000e+00
>  %237 = fcmp ult float %211, %221
>  %238 = select i1 %237, float 1.000000e+00, float 0.000000e+00
>  %239 = fsub float -0.000000e+00, %236
>  %240 = fptosi float %239 to i32
>  %241 = fsub float -0.000000e+00, %238
>  %242 = fptosi float %241 to i32
>  %243 = bitcast i32 %240 to float
>  %244 = bitcast i32 %242 to float
>  %245 = bitcast float %243 to i32
>  %246 = and i32 %245, 1065353216
>  %247 = bitcast float %244 to i32
>  %248 = and i32 %247, 1065353216
>  %249 = bitcast i32 %246 to float
>  %250 = bitcast i32 %248 to float
>  %251 = fcmp uge float %234, %12
>  %252 = select i1 %251, float %234, float %12
>  %253 = fsub float -0.000000e+00, %230
>  %254 = fmul float %250, %253
>  %255 = fadd float %254, %230
>  %256 = fsub float -0.000000e+00, %231
>  %257 = fmul float %250, %256
>  %258 = fadd float %257, %231
>  %259 = fsub float -0.000000e+00, %232
>  %260 = fmul float %250, %259
>  %261 = fadd float %260, %232
>  %262 = fsub float -0.000000e+00, %233
>  %263 = fmul float %250, %262
>  %264 = fadd float %263, %233
>  %265 = fcmp uge float %252, %14
>  %266 = select i1 %265, float %14, float %252
>  %267 = fsub float -0.000000e+00, %213
>  %268 = fadd float %255, %267
>  %269 = fsub float -0.000000e+00, %214
>  %270 = fadd float %258, %269
>  %271 = fsub float -0.000000e+00, %215
>  %272 = fadd float %261, %271
>  %273 = fsub float -0.000000e+00, %135
>  %274 = fadd float %264, %273
>  %275 = fmul float %249, %268
>  %276 = fadd float %275, %213
>  %277 = fmul float %249, %270
>  %278 = fadd float %277, %214
>  %279 = fmul float %249, %272
>  %280 = fadd float %279, %215
>  %281 = fmul float %249, %274
>  %282 = fadd float %281, %135
>  %283 = fsub float -0.000000e+00, %266
>  %284 = fadd float %283, %14
>  %285 = fmul float %276, %284
>  %286 = fmul float %278, %284
>  %287 = fmul float %280, %284
>  %288 = fmul float %282, %284
>  %289 = fcmp uge float %12, %284
>  %290 = select i1 %289, float 1.000000e+00, float 0.000000e+00
>  %291 = fsub float -0.000000e+00, %290
>  %292 = fptosi float %291 to i32
>  %293 = bitcast i32 %292 to float
>  %294 = bitcast float %293 to i32
>  %295 = and i32 %294, 1065353216
>  %296 = bitcast i32 %295 to float
>  %297 = fsub float -0.000000e+00, %148
>  %298 = fadd float %297, %146
>  %299 = fsub float -0.000000e+00, %149
>  %300 = fadd float %299, %147
>  %301 = fsub float -0.000000e+00, %155
>  %302 = fadd float %301, %153
>  %303 = fsub float -0.000000e+00, %156
>  %304 = fadd float %303, %154
>  %305 = fmul float %167, %298
>  %306 = fadd float %305, %148
>  %307 = fmul float %168, %300
>  %308 = fadd float %307, %149
>  %309 = fmul float %167, %302
>  %310 = fadd float %309, %155
>  %311 = fmul float %168, %304
>  %312 = fadd float %311, %156
>  %313 = fsub float -0.000000e+00, %221
>  %314 = fmul float %313, %250
>  %315 = fmul float %163, 0x3FC45F3060000000
>  %316 = fadd float %315, 5.000000e-01
>  %317 = fmul float %161, 0x3FC45F3060000000
>  %318 = fadd float %317, 5.000000e-01
>  %319 = fmul float %249, %314
>  %320 = fadd float %319, %221
>  %321 = call float @llvm.AMDIL.fraction.(float %316)
>  %322 = call float @llvm.AMDIL.fraction.(float %318)
>  %323 = fsub float -0.000000e+00, %320
>  %324 = fmul float %296, %323
>  %325 = fadd float %324, %320
>  %326 = fmul float %321, 0x401921FB60000000
>  %327 = fadd float %326, 0xC00921FB60000000
>  %328 = fmul float %322, 0x401921FB60000000
>  %329 = fadd float %328, 0xC00921FB60000000
>  %330 = fmul float %329, %329
>  %331 = fmul float %330, 0xBEBA01A020000000
>  %332 = fadd float %331, 0x3F31111120000000
>  %333 = fmul float %330, 0xBEF6C16C20000000
>  %334 = fadd float %333, 0x3F65555560000000
>  %335 = fmul float %332, %330
>  %336 = fadd float %335, 0xBF95555560000000
>  %337 = fmul float %334, %330
>  %338 = fadd float %337, -1.250000e-01
>  %339 = fmul float %336, %330
>  %340 = fadd float %339, 5.000000e-01
>  %341 = fmul float %338, %330
>  %342 = fadd float %341, 1.000000e+00
>  %343 = fmul float %340, %329
>  %344 = fmul float %343, %343
>  %345 = fmul float %342, %343
>  %346 = fadd float %344, %344
>  %347 = fadd float %345, %345
>  %348 = fsub float -0.000000e+00, %346
>  %349 = fadd float %348, 1.000000e+00
>  %350 = fmul float 2.000000e+00, %167
>  %351 = fadd float %350, -1.000000e+00
>  %352 = fmul float 2.000000e+00, %168
>  %353 = fadd float %352, -1.000000e+00
>  %354 = fcmp uge float %212, %325
>  %355 = select i1 %354, float %325, float %212
>  %356 = fmul float %349, %351
>  %357 = fmul float %347, %353
>  %358 = fmul float %347, %351
>  %359 = fmul float %327, %327
>  %360 = fmul float %359, 0xBEBA01A020000000
>  %361 = fadd float %360, 0x3F31111120000000
>  %362 = fmul float %359, 0xBEF6C16C20000000
>  %363 = fadd float %362, 0x3F65555560000000
>  %364 = fmul float %361, %359
>  %365 = fadd float %364, 0xBF95555560000000
>  %366 = fmul float %363, %359
>  %367 = fadd float %366, -1.250000e-01
>  %368 = fmul float %365, %359
>  %369 = fadd float %368, 5.000000e-01
>  %370 = fmul float %367, %359
>  %371 = fadd float %370, 1.000000e+00
>  %372 = fmul float %369, %327
>  %373 = fmul float %372, %372
>  %374 = fmul float %371, %372
>  %375 = fadd float %373, %373
>  %376 = fadd float %374, %374
>  %377 = fsub float -0.000000e+00, %375
>  %378 = fadd float %377, 1.000000e+00
>  %379 = fadd float %357, %356
>  %380 = fsub float -0.000000e+00, %358
>  %381 = fmul float %353, %349
>  %382 = fadd float %381, %380
>  %383 = fsub float -0.000000e+00, %379
>  %384 = fmul float %378, %383
>  %385 = fsub float -0.000000e+00, %379
>  %386 = fmul float %376, %385
>  %387 = fsub float -0.000000e+00, %386
>  %388 = fmul float %139, %34
>  %389 = fmul float %140, %36
>  %390 = fadd float %388, %389
>  %391 = fmul float %141, %38
>  %392 = fadd float %390, %391
>  %393 = fmul float %142, %40
>  %394 = fadd float %392, %393
>  %395 = fmul float %139, %42
>  %396 = fmul float %140, %44
>  %397 = fadd float %395, %396
>  %398 = fmul float %141, %46
>  %399 = fadd float %397, %398
>  %400 = fmul float %142, %48
>  %401 = fadd float %399, %400
>  %402 = fmul float %139, %50
>  %403 = fmul float %140, %52
>  %404 = fadd float %402, %403
>  %405 = fmul float %141, %54
>  %406 = fadd float %404, %405
>  %407 = fmul float %142, %56
>  %408 = fadd float %406, %407
>  %409 = fmul float %384, %355
>  %410 = fadd float %409, %394
>  %411 = fmul float %382, %355
>  %412 = fadd float %411, %401
>  %413 = fmul float %387, %355
>  %414 = fadd float %413, %408
>  %415 = fmul float %410, %66
>  %416 = fmul float %412, %68
>  %417 = fadd float %415, %416
>  %418 = fmul float %414, %70
>  %419 = fadd float %417, %418
>  %420 = fmul float %14, %72
>  %421 = fadd float %419, %420
>  %422 = fsub float -0.000000e+00, %421
>  %423 = fmul float %410, %58
>  %424 = fmul float %412, %60
>  %425 = fadd float %423, %424
>  %426 = fmul float %414, %62
>  %427 = fadd float %425, %426
>  %428 = fmul float %14, %64
>  %429 = fadd float %427, %428
>  %430 = fmul float %410, %82
>  %431 = fmul float %412, %84
>  %432 = fadd float %430, %431
>  %433 = fmul float %414, %86
>  %434 = fadd float %432, %433
>  %435 = fmul float %14, %88
>  %436 = fadd float %434, %435
>  %437 = fmul float %410, %74
>  %438 = fmul float %412, %76
>  %439 = fadd float %437, %438
>  %440 = fmul float %414, %78
>  %441 = fadd float %439, %440
>  %442 = fmul float %14, %80
>  %443 = fadd float %441, %442
>  %444 = fadd float %429, %436
>  %445 = fadd float %422, %436
>  %446 = fmul float %444, %26
>  %447 = fmul float %445, %28
>  %448 = fmul float %436, %30
>  %449 = fmul float %436, %32
>  %450 = fmul float %446, %18
>  %451 = fadd float %450, %448
>  %452 = fmul float %447, %18
>  %453 = fadd float %452, %449
>  %454 = fmul float %160, %14
>  %455 = fmul float %160, %12
>  %456 = fmul float %160, %12
>  %457 = fmul float %160, %12
>  %458 = fsub float -0.000000e+00, %436
>  %459 = fmul float %443, %16
>  %460 = fadd float %459, %458
>  %461 = fsub float -0.000000e+00, %421
>  %462 = fmul float %126, %436
>  %463 = fadd float %462, %429
>  %464 = fmul float %128, %436
>  %465 = fadd float %464, %461
>  %466 = call float @llvm.AMDIL.clamp.(float %285, float 0.000000e+00, float 1.000000e+00)
>  %467 = call float @llvm.AMDIL.clamp.(float %286, float 0.000000e+00, float 1.000000e+00)
>  %468 = call float @llvm.AMDIL.clamp.(float %287, float 0.000000e+00, float 1.000000e+00)
>  %469 = call float @llvm.AMDIL.clamp.(float %288, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %466, float %467, float %468, float %469)
>  %470 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %471 = load float addrspace(2)* addrspace(2)* %470, !tbaa !0
>  %472 = getelementptr float addrspace(2)* %471, i32 0
>  %473 = load float addrspace(2)* %472, !tbaa !0
>  %474 = fmul float %473, %429
>  %475 = getelementptr float addrspace(2)* %471, i32 1
>  %476 = load float addrspace(2)* %475, !tbaa !0
>  %477 = fmul float %476, %421
>  %478 = fadd float %474, %477
>  %479 = getelementptr float addrspace(2)* %471, i32 2
>  %480 = load float addrspace(2)* %479, !tbaa !0
>  %481 = fmul float %480, %443
>  %482 = fadd float %478, %481
>  %483 = getelementptr float addrspace(2)* %471, i32 3
>  %484 = load float addrspace(2)* %483, !tbaa !0
>  %485 = fmul float %484, %436
>  %486 = fadd float %482, %485
>  %487 = getelementptr float addrspace(2)* %471, i32 4
>  %488 = load float addrspace(2)* %487, !tbaa !0
>  %489 = fmul float %488, %429
>  %490 = getelementptr float addrspace(2)* %471, i32 5
>  %491 = load float addrspace(2)* %490, !tbaa !0
>  %492 = fmul float %491, %421
>  %493 = fadd float %489, %492
>  %494 = getelementptr float addrspace(2)* %471, i32 6
>  %495 = load float addrspace(2)* %494, !tbaa !0
>  %496 = fmul float %495, %443
>  %497 = fadd float %493, %496
>  %498 = getelementptr float addrspace(2)* %471, i32 7
>  %499 = load float addrspace(2)* %498, !tbaa !0
>  %500 = fmul float %499, %436
>  %501 = fadd float %497, %500
>  %502 = getelementptr float addrspace(2)* %471, i32 8
>  %503 = load float addrspace(2)* %502, !tbaa !0
>  %504 = fmul float %503, %429
>  %505 = getelementptr float addrspace(2)* %471, i32 9
>  %506 = load float addrspace(2)* %505, !tbaa !0
>  %507 = fmul float %506, %421
>  %508 = fadd float %504, %507
>  %509 = getelementptr float addrspace(2)* %471, i32 10
>  %510 = load float addrspace(2)* %509, !tbaa !0
>  %511 = fmul float %510, %443
>  %512 = fadd float %508, %511
>  %513 = getelementptr float addrspace(2)* %471, i32 11
>  %514 = load float addrspace(2)* %513, !tbaa !0
>  %515 = fmul float %514, %436
>  %516 = fadd float %512, %515
>  %517 = getelementptr float addrspace(2)* %471, i32 12
>  %518 = load float addrspace(2)* %517, !tbaa !0
>  %519 = fmul float %518, %429
>  %520 = getelementptr float addrspace(2)* %471, i32 13
>  %521 = load float addrspace(2)* %520, !tbaa !0
>  %522 = fmul float %521, %421
>  %523 = fadd float %519, %522
>  %524 = getelementptr float addrspace(2)* %471, i32 14
>  %525 = load float addrspace(2)* %524, !tbaa !0
>  %526 = fmul float %525, %443
>  %527 = fadd float %523, %526
>  %528 = getelementptr float addrspace(2)* %471, i32 15
>  %529 = load float addrspace(2)* %528, !tbaa !0
>  %530 = fmul float %529, %436
>  %531 = fadd float %527, %530
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %486, float %501, float %516, float %531)
>  %532 = getelementptr float addrspace(2)* %471, i32 16
>  %533 = load float addrspace(2)* %532, !tbaa !0
>  %534 = fmul float %533, %429
>  %535 = getelementptr float addrspace(2)* %471, i32 17
>  %536 = load float addrspace(2)* %535, !tbaa !0
>  %537 = fmul float %536, %421
>  %538 = fadd float %534, %537
>  %539 = getelementptr float addrspace(2)* %471, i32 18
>  %540 = load float addrspace(2)* %539, !tbaa !0
>  %541 = fmul float %540, %443
>  %542 = fadd float %538, %541
>  %543 = getelementptr float addrspace(2)* %471, i32 19
>  %544 = load float addrspace(2)* %543, !tbaa !0
>  %545 = fmul float %544, %436
>  %546 = fadd float %542, %545
>  %547 = getelementptr float addrspace(2)* %471, i32 20
>  %548 = load float addrspace(2)* %547, !tbaa !0
>  %549 = fmul float %548, %429
>  %550 = getelementptr float addrspace(2)* %471, i32 21
>  %551 = load float addrspace(2)* %550, !tbaa !0
>  %552 = fmul float %551, %421
>  %553 = fadd float %549, %552
>  %554 = getelementptr float addrspace(2)* %471, i32 22
>  %555 = load float addrspace(2)* %554, !tbaa !0
>  %556 = fmul float %555, %443
>  %557 = fadd float %553, %556
>  %558 = getelementptr float addrspace(2)* %471, i32 23
>  %559 = load float addrspace(2)* %558, !tbaa !0
>  %560 = fmul float %559, %436
>  %561 = fadd float %557, %560
>  %562 = getelementptr float addrspace(2)* %471, i32 24
>  %563 = load float addrspace(2)* %562, !tbaa !0
>  %564 = fmul float %563, %429
>  %565 = getelementptr float addrspace(2)* %471, i32 25
>  %566 = load float addrspace(2)* %565, !tbaa !0
>  %567 = fmul float %566, %421
>  %568 = fadd float %564, %567
>  %569 = getelementptr float addrspace(2)* %471, i32 26
>  %570 = load float addrspace(2)* %569, !tbaa !0
>  %571 = fmul float %570, %443
>  %572 = fadd float %568, %571
>  %573 = getelementptr float addrspace(2)* %471, i32 27
>  %574 = load float addrspace(2)* %573, !tbaa !0
>  %575 = fmul float %574, %436
>  %576 = fadd float %572, %575
>  %577 = getelementptr float addrspace(2)* %471, i32 28
>  %578 = load float addrspace(2)* %577, !tbaa !0
>  %579 = fmul float %578, %429
>  %580 = getelementptr float addrspace(2)* %471, i32 29
>  %581 = load float addrspace(2)* %580, !tbaa !0
>  %582 = fmul float %581, %421
>  %583 = fadd float %579, %582
>  %584 = getelementptr float addrspace(2)* %471, i32 30
>  %585 = load float addrspace(2)* %584, !tbaa !0
>  %586 = fmul float %585, %443
>  %587 = fadd float %583, %586
>  %588 = getelementptr float addrspace(2)* %471, i32 31
>  %589 = load float addrspace(2)* %588, !tbaa !0
>  %590 = fmul float %589, %436
>  %591 = fadd float %587, %590
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %546, float %561, float %576, float %591)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %306, float %308, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %310, float %312, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %454, float %455, float %456, float %457)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %451, float %453, float %443, float %436)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %463, float %465, float %460, float %436)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDGPU.rsq(float) #2
>
>; Function Attrs: nounwind readonly
>declare float @llvm.log2.f32(float) #3
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.exp.(float) #2
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.fraction.(float) #2
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>attributes #3 = { nounwind readonly }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840704
>bf8c007f
>e00c2000
>80020500
>c0410100
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>c00203ed
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>d282000e
>043a0a08
>c004010a
>bf8c007f
>d282000e
>043a0e08
>c004010b
>bf8c007f
>d282000e
>043a1008
>c0040105
>bf8c007f
>101e0c08
>c0040104
>bf8c007f
>d282000f
>043e0a08
>c0040106
>bf8c007f
>d282000f
>043e0e08
>c0040107
>bf8c007f
>d282000f
>043e1008
>c0040101
>bf8c007f
>10200c08
>c0040100
>bf8c007f
>d2820010
>04420a08
>c0040102
>bf8c007f
>d2820010
>04420e08
>c0040103
>bf8c007f
>d2820010
>04421008
>f80000ef
>0d0e0f10
>c004011d
>bf8c000f
>101a0c08
>c004011c
>bf8c007f
>d282000d
>04360a08
>c004011e
>bf8c007f
>d282000d
>04360e08
>c004011f
>bf8c007f
>d282000d
>04361008
>c0040119
>bf8c007f
>101c0c08
>c0040118
>bf8c007f
>d282000e
>043a0a08
>c004011a
>bf8c007f
>d282000e
>043a0e08
>c004011b
>bf8c007f
>d282000e
>043a1008
>c0040115
>bf8c007f
>101e0c08
>c0040114
>bf8c007f
>d282000f
>043e0a08
>c0040116
>bf8c007f
>d282000f
>043e0e08
>c0040117
>bf8c007f
>d282000f
>043e1008
>c0040111
>bf8c007f
>10200c08
>c0040110
>bf8c007f
>d2820010
>04420a08
>c0040112
>bf8c007f
>d2820010
>04420e08
>c0000113
>bf8c007f
>d2820010
>04421000
>f80000ff
>0d0e0f10
>c0840708
>bf8c000f
>e00c2000
>80020d00
>bf8c0770
>0822210e
>d2820011
>0442230a
>08241f0d
>d282000e
>043e2509
>7e1a0280
>f800021f
>0d0d110e
>c084070c
>bf8c000f
>e00c2000
>80020e00
>bf8c0770
>0800230f
>d2820000
>0446010a
>0824210e
>d2820009
>04422509
>f800022f
>0d0d0009
>bf8c070f
>10000205
>10020204
>f800023f
>00000001
>bf8c070f
>08000d08
>c0000339
>bf8c007f
>10000000
>c000033b
>bf8c007f
>10021000
>c0000303
>bf8c007f
>d2820000
>04040100
>06021105
>c0008338
>bf8c007f
>10020201
>c000833a
>bf8c007f
>10041001
>d2820001
>04080101
>f800024f
>08070001
>c00003f4
>bf8c000f
>d2820000
>04161000
>c0000302
>bf8c007f
>10020e00
>08021101
>c00003f5
>bf8c007f
>10041000
>08040d02
>f80008cf
>08010200
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], GENERIC[19], PERSPECTIVE
>DCL IN[2], GENERIC[20], PERSPECTIVE
>DCL IN[3], GENERIC[21], PERSPECTIVE
>DCL IN[4], GENERIC[22], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL CONST[0..30]
>DCL TEMP[0..5], LOCAL
>DCL TEMP[6], ARRAY(1), LOCAL
>IMM[0] FLT32 {   -0.7500,     4.0000,    -2.0000,     3.0000}
>  0: RCP TEMP[0].x, IN[4].wwww
>  1: MUL TEMP[0].xy, TEMP[0].xxxx, IN[4].xyyy
>  2: MOV TEMP[1].xy, TEMP[0].xyyy
>  3: TEX TEMP[1].w, TEMP[1], SAMP[1], 2D
>  4: MOV TEMP[2].xy, IN[1].xyyy
>  5: TEX TEMP[2], TEMP[2], SAMP[0], 2D
>  6: MOV TEMP[3].xy, IN[2].xyyy
>  7: TEX TEMP[3], TEMP[3], SAMP[0], 2D
>  8: ADD TEMP[4].x, TEMP[1].wwww, IMM[0].xxxx
>  9: MAD TEMP[1].x, IN[4].zzzz, -CONST[29].wwww, TEMP[1].wwww
> 10: MUL TEMP[4].x, TEMP[4].xxxx, IMM[0].yyyy
> 11: MOV_SAT TEMP[4].x, TEMP[4].xxxx
> 12: MAD TEMP[5].x, TEMP[4].xxxx, IMM[0].zzzz, IMM[0].wwww
> 13: MUL TEMP[4].x, TEMP[4].xxxx, TEMP[4].xxxx
> 14: MUL TEMP[4].x, TEMP[5].xxxx, TEMP[4].xxxx
> 15: ABS TEMP[1].x, TEMP[1].xxxx
> 16: MUL TEMP[1].x, TEMP[1].xxxx, CONST[2].xxxx
> 17: MAX TEMP[1].x, TEMP[4].xxxx, TEMP[1].xxxx
> 18: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 19: MUL TEMP[1].x, TEMP[1].xxxx, IN[0].wwww
> 20: MUL TEMP[4].x, CONST[0].zzzz, CONST[0].yyyy
> 21: ADD TEMP[3], TEMP[3], -TEMP[2]
> 22: MAD TEMP[2], IN[3].xxxx, TEMP[3], TEMP[2]
> 23: MUL TEMP[3].x, TEMP[1].xxxx, TEMP[2].wwww
> 24: MOV TEMP[0].w, TEMP[3].xxxx
> 25: MUL TEMP[0].xyz, TEMP[2].xyzz, CONST[0].yyyy
> 26: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[4].xxxx
> 27: MUL TEMP[0].xyz, TEMP[3].xxxx, TEMP[0].xyzz
> 28: MAD TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, TEMP[0].xyzz
> 29: MUL TEMP[0].xyz, TEMP[0].xyzz, IN[0].xyzz
> 30: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[30].xxxx
> 31: MOV TEMP[6], TEMP[0]
> 32: MOV OUT[0], TEMP[6]
> 33: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 1
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 2
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 8
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 119
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 120
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %33 = load <32 x i8> addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %35 = load <16 x i8> addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %37 = load <32 x i8> addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %39 = load <16 x i8> addrspace(2)* %38, !tbaa !0
>  %40 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %41 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %42 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %43 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %3, <2 x i32> %5)
>  %44 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %45 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %46 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %47 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %48 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %3, <2 x i32> %5)
>  %49 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %3, <2 x i32> %5)
>  %50 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %3, <2 x i32> %5)
>  %51 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %3, <2 x i32> %5)
>  %52 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %3, <2 x i32> %5)
>  %53 = fdiv float 1.000000e+00, %52
>  %54 = fmul float %53, %49
>  %55 = fmul float %53, %50
>  %56 = bitcast float %54 to i32
>  %57 = bitcast float %55 to i32
>  %58 = insertelement <2 x i32> undef, i32 %56, i32 0
>  %59 = insertelement <2 x i32> %58, i32 %57, i32 1
>  %60 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %59, <32 x i8> %37, <16 x i8> %39, i32 2)
>  %61 = extractelement <4 x float> %60, i32 3
>  %62 = bitcast float %44 to i32
>  %63 = bitcast float %45 to i32
>  %64 = insertelement <2 x i32> undef, i32 %62, i32 0
>  %65 = insertelement <2 x i32> %64, i32 %63, i32 1
>  %66 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %65, <32 x i8> %33, <16 x i8> %35, i32 2)
>  %67 = extractelement <4 x float> %66, i32 0
>  %68 = extractelement <4 x float> %66, i32 1
>  %69 = extractelement <4 x float> %66, i32 2
>  %70 = extractelement <4 x float> %66, i32 3
>  %71 = bitcast float %46 to i32
>  %72 = bitcast float %47 to i32
>  %73 = insertelement <2 x i32> undef, i32 %71, i32 0
>  %74 = insertelement <2 x i32> %73, i32 %72, i32 1
>  %75 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %74, <32 x i8> %33, <16 x i8> %35, i32 2)
>  %76 = extractelement <4 x float> %75, i32 0
>  %77 = extractelement <4 x float> %75, i32 1
>  %78 = extractelement <4 x float> %75, i32 2
>  %79 = extractelement <4 x float> %75, i32 3
>  %80 = fadd float %61, -7.500000e-01
>  %81 = fsub float -0.000000e+00, %29
>  %82 = fmul float %51, %81
>  %83 = fadd float %82, %61
>  %84 = fmul float %80, 4.000000e+00
>  %85 = call float @llvm.AMDIL.clamp.(float %84, float 0.000000e+00, float 1.000000e+00)
>  %86 = fmul float %85, -2.000000e+00
>  %87 = fadd float %86, 3.000000e+00
>  %88 = fmul float %85, %85
>  %89 = fmul float %87, %88
>  %90 = call float @fabs(float %83)
>  %91 = fmul float %90, %27
>  %92 = fcmp uge float %89, %91
>  %93 = select i1 %92, float %89, float %91
>  %94 = call float @llvm.AMDIL.clamp.(float %93, float 0.000000e+00, float 1.000000e+00)
>  %95 = fmul float %94, %43
>  %96 = fmul float %25, %23
>  %97 = fsub float -0.000000e+00, %67
>  %98 = fadd float %76, %97
>  %99 = fsub float -0.000000e+00, %68
>  %100 = fadd float %77, %99
>  %101 = fsub float -0.000000e+00, %69
>  %102 = fadd float %78, %101
>  %103 = fsub float -0.000000e+00, %70
>  %104 = fadd float %79, %103
>  %105 = fmul float %48, %98
>  %106 = fadd float %105, %67
>  %107 = fmul float %48, %100
>  %108 = fadd float %107, %68
>  %109 = fmul float %48, %102
>  %110 = fadd float %109, %69
>  %111 = fmul float %48, %104
>  %112 = fadd float %111, %70
>  %113 = fmul float %95, %112
>  %114 = fmul float %106, %23
>  %115 = fmul float %108, %23
>  %116 = fmul float %110, %23
>  %117 = fmul float %95, %96
>  %118 = fmul float %113, %114
>  %119 = fmul float %113, %115
>  %120 = fmul float %113, %116
>  %121 = fmul float %117, %118
>  %122 = fadd float %121, %118
>  %123 = fmul float %117, %119
>  %124 = fadd float %123, %119
>  %125 = fmul float %117, %120
>  %126 = fadd float %125, %120
>  %127 = fmul float %122, %40
>  %128 = fmul float %124, %41
>  %129 = fmul float %126, %42
>  %130 = fmul float %127, %31
>  %131 = fmul float %128, %31
>  %132 = fmul float %129, %31
>  %133 = call i32 @llvm.SI.packf16(float %130, float %131)
>  %134 = bitcast i32 %133 to float
>  %135 = call i32 @llvm.SI.packf16(float %132, float %113)
>  %136 = bitcast i32 %135 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %134, float %136, float %134, float %136)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: readonly
>declare float @fabs(float) #3
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>attributes #3 = { readonly }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8081100
>c8091101
>c80c1300
>c80d1301
>7e085503
>10060504
>c8141000
>c8151001
>10040b04
>c0840304
>c0c60508
>bf8c007f
>f0800800
>00430202
>bf8c0770
>060604ff
>bf400000
>100606f6
>d2060803
>02010103
>7e0802ff
>40400000
>d2820004
>0411eb03
>10060703
>10060704
>c8101200
>c8111201
>c0440100
>bf8c007f
>c0000977
>bf8c007f
>10080800
>08040902
>d2060102
>02010102
>c0000908
>bf8c007f
>10040400
>d00c0000
>02020503
>d2000002
>00020702
>d2060802
>02010102
>c80c0300
>c80d0301
>100e0702
>c0008902
>c0000901
>bf8c007f
>7e040200
>d2100002
>02020401
>10040507
>c8100500
>c8110501
>c80c0400
>c80d0401
>c0860300
>c0c80500
>bf8c007f
>f0800f00
>00640303
>c8240900
>c8250901
>c8200800
>c8210801
>f0800f00
>00640808
>bf8c0770
>081a0d0b
>c8300c00
>c8310c01
>d282000d
>041a1b0c
>100e1b07
>081a0909
>d282000d
>04121b0c
>101a1a00
>101a1b07
>d282000d
>04361b02
>c8380100
>c8390101
>101a1d0d
>c0008978
>bf8c007f
>101a1a01
>081c0708
>d282000e
>040e1d0c
>101c1c00
>101c1d07
>d282000e
>043a1d02
>c83c0000
>c83d0001
>101c1f0e
>101c1c01
>5e1a1b0e
>08100b0a
>d2820003
>0416110c
>10060600
>10060707
>d2820002
>040e0702
>c80c0200
>c80d0201
>10000702
>10000001
>5e000f00
>f8001c0f
>000d000d
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL IN[4]
>DCL IN[5]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], CLIPVERTEX
>DCL OUT[3], GENERIC[19]
>DCL OUT[4], GENERIC[20]
>DCL OUT[5], GENERIC[21]
>DCL OUT[6], GENERIC[22]
>DCL CONST[0..61]
>DCL TEMP[0..12], LOCAL
>IMM[0] FLT32 {    2.2000,     1.0000,     0.1592,     0.5000}
>IMM[1] FLT32 {    6.2832,    -3.1416,    -0.0000,    -0.0000}
>IMM[2] FLT32 {    0.0003,     0.0026,    -0.0208,    -0.1250}
>IMM[3] FLT32 {    2.0000,    -1.0000,     0.0000,     0.0000}
>  0: DP4 TEMP[0].x, IN[1], CONST[58]
>  1: DP4 TEMP[1].x, IN[1], CONST[59]
>  2: MOV TEMP[0].y, TEMP[1].xxxx
>  3: DP4 TEMP[1].x, IN[1], CONST[60]
>  4: MOV TEMP[0].z, TEMP[1].xxxx
>  5: ADD TEMP[0].xyz, TEMP[0].xyzz, -CONST[2].xyzz
>  6: DP3 TEMP[0].x, TEMP[0].xyzz, TEMP[0].xyzz
>  7: RSQ TEMP[1].x, TEMP[0].xxxx
>  8: LG2 TEMP[0].x, IN[0].xxxx
>  9: LG2 TEMP[2].x, IN[0].yyyy
> 10: MOV TEMP[0].y, TEMP[2].xxxx
> 11: LG2 TEMP[2].x, IN[0].zzzz
> 12: MOV TEMP[0].z, TEMP[2].xxxx
> 13: RCP TEMP[1].x, TEMP[1].xxxx
> 14: MUL TEMP[0].xyz, TEMP[0].xyzz, IMM[0].xxxx
> 15: MUL TEMP[2], TEMP[1].xxxx, CONST[56].xzwy
> 16: EX2 TEMP[3].x, TEMP[0].xxxx
> 17: EX2 TEMP[4].x, TEMP[0].yyyy
> 18: MOV TEMP[3].y, TEMP[4].xxxx
> 19: EX2 TEMP[4].x, TEMP[0].zzzz
> 20: MOV TEMP[3].z, TEMP[4].xxxx
> 21: MAD TEMP[4].x, CONST[56].wwww, TEMP[1].xxxx, -TEMP[2].yyyy
> 22: RCP TEMP[4].x, TEMP[4].xxxx
> 23: MAX TEMP[5].x, TEMP[2].xxxx, IN[4].zzzz
> 24: MAD TEMP[6].x, CONST[56].zzzz, -TEMP[1].xxxx, TEMP[5].xxxx
> 25: ADD TEMP[7].x, TEMP[1].xxxx, -CONST[57].xxxx
> 26: MAD TEMP[6].x, TEMP[6].xxxx, -TEMP[4].xxxx, CONST[0].yyyy
> 27: MOV TEMP[3].w, IN[0].wwww
> 28: MUL TEMP[0], TEMP[3], TEMP[6].xxxx
> 29: MUL TEMP[6].x, TEMP[7].xxxx, CONST[57].yyyy
> 30: SLT TEMP[7].xy, TEMP[2].yzzz, TEMP[5].xxxx
> 31: F2I TEMP[7].xy, -TEMP[7]
> 32: AND TEMP[2].xy, TEMP[7].xyyy, IMM[0].yyyy
> 33: MAX TEMP[6].x, TEMP[6].xxxx, CONST[0].xxxx
> 34: MAD TEMP[1], TEMP[2].yyyy, -TEMP[0], TEMP[0]
> 35: MIN TEMP[6].x, TEMP[6].xxxx, CONST[0].yyyy
> 36: ADD TEMP[7], TEMP[1], -TEMP[3]
> 37: MAD TEMP[7], TEMP[2].xxxx, TEMP[7], TEMP[3]
> 38: ADD TEMP[6].x, -TEMP[6].xxxx, CONST[0].yyyy
> 39: MUL TEMP[7], TEMP[7], TEMP[6].xxxx
> 40: SGE TEMP[6].x, CONST[0].xxxx, TEMP[6].xxxx
> 41: F2I TEMP[6].x, -TEMP[6]
> 42: AND TEMP[6].x, TEMP[6].xxxx, IMM[0].yyyy
> 43: ADD TEMP[1].xy, -IN[2].zwww, IN[2].xyyy
> 44: ADD TEMP[0].xy, -IN[3].zwww, IN[3].xyyy
> 45: MAD TEMP[8].xy, IN[5].xyyy, TEMP[1].xyyy, IN[2].zwww
> 46: MAD TEMP[9].xy, IN[5].xyyy, TEMP[0].xyyy, IN[3].zwww
> 47: MUL TEMP[10].x, -TEMP[5].xxxx, TEMP[2].yyyy
> 48: MAD TEMP[0].xy, IN[4].wyyy, IMM[0].zzzz, IMM[0].wwww
> 49: MAD TEMP[10].x, TEMP[2].xxxx, TEMP[10].xxxx, TEMP[5].xxxx
> 50: FRC TEMP[11].xy, TEMP[0].xyyy
> 51: MAD TEMP[6].x, TEMP[6].xxxx, -TEMP[10].xxxx, TEMP[10].xxxx
> 52: MAD TEMP[5].xy, TEMP[11].xyyy, IMM[1].xxxx, IMM[1].yyyy
> 53: MUL TEMP[10].x, TEMP[5].yyyy, TEMP[5].yyyy
> 54: MAD TEMP[11].xy, TEMP[10].xxxx, IMM[1].zwww, IMM[2].xyyy
> 55: MAD TEMP[11].xy, TEMP[11].xyyy, TEMP[10].xxxx, IMM[2].zwww
> 56: MAD TEMP[11].xy, TEMP[11].xyyy, TEMP[10].xxxx, IMM[0].wyyy
> 57: MUL TEMP[11].x, TEMP[11].xxxx, TEMP[5].yyyy
> 58: MUL TEMP[11].xy, TEMP[11].xyyy, TEMP[11].xxxx
> 59: ADD TEMP[11].xy, TEMP[11].xyyy, TEMP[11].xyyy
> 60: ADD TEMP[11].x, -TEMP[11].xxxx, IMM[0].yyyy
> 61: MOV TEMP[0].x, TEMP[11].xyxx
> 62: MAD TEMP[4].xy, IMM[3].xxxx, IN[5].xyyy, IMM[3].yyyy
> 63: MIN TEMP[6].x, TEMP[2].wwww, TEMP[6].xxxx
> 64: MUL TEMP[10].xyz, TEMP[11].xyyy, TEMP[4].xyxx
> 65: MUL TEMP[12].x, TEMP[5].xxxx, TEMP[5].xxxx
> 66: MAD TEMP[11].xy, TEMP[12].xxxx, IMM[1].zwww, IMM[2].xyyy
> 67: MAD TEMP[11].xy, TEMP[11].xyyy, TEMP[12].xxxx, IMM[2].zwww
> 68: MAD TEMP[11].xy, TEMP[11].xyyy, TEMP[12].xxxx, IMM[0].wyyy
> 69: MUL TEMP[11].x, TEMP[11].xxxx, TEMP[5].xxxx
> 70: MUL TEMP[11].xy, TEMP[11].xyyy, TEMP[11].xxxx
> 71: ADD TEMP[11].xy, TEMP[11].xyyy, TEMP[11].xyyy
> 72: ADD TEMP[11].x, -TEMP[11].xxxx, IMM[0].yyyy
> 73: ADD TEMP[5].x, TEMP[10].yyyy, TEMP[10].xxxx
> 74: MAD TEMP[4].x, TEMP[4].yyyy, TEMP[0].xxxx, -TEMP[10].zzzz
> 75: MOV TEMP[0].y, TEMP[4].xxxx
> 76: MUL TEMP[4].xy, TEMP[11].xyyy, -TEMP[5].xxxx
> 77: MOV TEMP[0].x, TEMP[4].xxxy
> 78: MOV TEMP[0].z, -TEMP[4].yyyy
> 79: DP4 TEMP[2].x, IN[1], CONST[48]
> 80: DP4 TEMP[4].x, IN[1], CONST[49]
> 81: MOV TEMP[2].y, TEMP[4].xxxx
> 82: DP4 TEMP[4].x, IN[1], CONST[50]
> 83: MOV TEMP[2].z, TEMP[4].xxxx
> 84: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[6].xxxx, TEMP[2].xyzz
> 85: MOV TEMP[0].w, CONST[0].yyyy
> 86: DP4 TEMP[4].x, TEMP[0], CONST[52]
> 87: MOV TEMP[2].y, TEMP[4].xxxx
> 88: MOV TEMP[1].y, -TEMP[4].xxxx
> 89: DP4 TEMP[1].x, TEMP[0], CONST[51]
> 90: DP4 TEMP[5].x, TEMP[0], CONST[54]
> 91: MOV TEMP[2].w, TEMP[5].xxxx
> 92: DP4 TEMP[6].x, TEMP[0], CONST[53]
> 93: MOV TEMP[2].z, TEMP[6].xxxx
> 94: ADD TEMP[0].xy, TEMP[1].xyyy, TEMP[5].xxxx
> 95: MUL TEMP[0].xy, TEMP[0].xyyy, CONST[14].xyyy
> 96: MUL TEMP[3].xy, TEMP[5].xxxx, CONST[14].zwww
> 97: MOV TEMP[1].x, TEMP[1].xxxx
> 98: MAD TEMP[0].xy, TEMP[0].xyyy, CONST[0].wwww, TEMP[3].xyyy
> 99: MOV TEMP[1].yzw, TEMP[2].zyzw
>100: MOV TEMP[0].zw, TEMP[2].wwzw
>101: MUL TEMP[2], IN[4].xxxx, CONST[0].yxxx
>102: MOV TEMP[3], TEMP[1]
>103: MAD TEMP[6].x, TEMP[6].xxxx, CONST[0].zzzz, -TEMP[5].xxxx
>104: MOV TEMP[1].z, TEMP[6].xxxx
>105: MOV TEMP[1].y, -TEMP[4].xxxx
>106: MAD TEMP[1].xy, CONST[61].xyyy, TEMP[5].xxxx, TEMP[1].xyyy
>107: MOV OUT[3], TEMP[8]
>108: MOV OUT[4], TEMP[9]
>109: MOV OUT[5], TEMP[2]
>110: MOV OUT[0], TEMP[1]
>111: MOV OUT[2], TEMP[3]
>112: MOV OUT[6], TEMP[0]
>113: MOV_SAT OUT[1], TEMP[7]
>114: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 3
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 8
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 9
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 10
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 56
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 57
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 58
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 59
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 192
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 193
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 194
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 195
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 196
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 197
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 198
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 199
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 200
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 201
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 202
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 203
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 204
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 205
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 206
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 207
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 208
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 209
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 210
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 211
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 212
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 213
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 214
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 215
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 216
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 217
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 218
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 219
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 224
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 225
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 226
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr float addrspace(2)* %10, i32 227
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = getelementptr float addrspace(2)* %10, i32 228
>  %98 = load float addrspace(2)* %97, !tbaa !0
>  %99 = getelementptr float addrspace(2)* %10, i32 229
>  %100 = load float addrspace(2)* %99, !tbaa !0
>  %101 = getelementptr float addrspace(2)* %10, i32 232
>  %102 = load float addrspace(2)* %101, !tbaa !0
>  %103 = getelementptr float addrspace(2)* %10, i32 233
>  %104 = load float addrspace(2)* %103, !tbaa !0
>  %105 = getelementptr float addrspace(2)* %10, i32 234
>  %106 = load float addrspace(2)* %105, !tbaa !0
>  %107 = getelementptr float addrspace(2)* %10, i32 235
>  %108 = load float addrspace(2)* %107, !tbaa !0
>  %109 = getelementptr float addrspace(2)* %10, i32 236
>  %110 = load float addrspace(2)* %109, !tbaa !0
>  %111 = getelementptr float addrspace(2)* %10, i32 237
>  %112 = load float addrspace(2)* %111, !tbaa !0
>  %113 = getelementptr float addrspace(2)* %10, i32 238
>  %114 = load float addrspace(2)* %113, !tbaa !0
>  %115 = getelementptr float addrspace(2)* %10, i32 239
>  %116 = load float addrspace(2)* %115, !tbaa !0
>  %117 = getelementptr float addrspace(2)* %10, i32 240
>  %118 = load float addrspace(2)* %117, !tbaa !0
>  %119 = getelementptr float addrspace(2)* %10, i32 241
>  %120 = load float addrspace(2)* %119, !tbaa !0
>  %121 = getelementptr float addrspace(2)* %10, i32 242
>  %122 = load float addrspace(2)* %121, !tbaa !0
>  %123 = getelementptr float addrspace(2)* %10, i32 243
>  %124 = load float addrspace(2)* %123, !tbaa !0
>  %125 = getelementptr float addrspace(2)* %10, i32 244
>  %126 = load float addrspace(2)* %125, !tbaa !0
>  %127 = getelementptr float addrspace(2)* %10, i32 245
>  %128 = load float addrspace(2)* %127, !tbaa !0
>  %129 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %130 = load <16 x i8> addrspace(2)* %129, !tbaa !0
>  %131 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %130, i32 0, i32 %5)
>  %132 = extractelement <4 x float> %131, i32 0
>  %133 = extractelement <4 x float> %131, i32 1
>  %134 = extractelement <4 x float> %131, i32 2
>  %135 = extractelement <4 x float> %131, i32 3
>  %136 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %137 = load <16 x i8> addrspace(2)* %136, !tbaa !0
>  %138 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %137, i32 0, i32 %5)
>  %139 = extractelement <4 x float> %138, i32 0
>  %140 = extractelement <4 x float> %138, i32 1
>  %141 = extractelement <4 x float> %138, i32 2
>  %142 = extractelement <4 x float> %138, i32 3
>  %143 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %144 = load <16 x i8> addrspace(2)* %143, !tbaa !0
>  %145 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %144, i32 0, i32 %5)
>  %146 = extractelement <4 x float> %145, i32 0
>  %147 = extractelement <4 x float> %145, i32 1
>  %148 = extractelement <4 x float> %145, i32 2
>  %149 = extractelement <4 x float> %145, i32 3
>  %150 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %151 = load <16 x i8> addrspace(2)* %150, !tbaa !0
>  %152 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %151, i32 0, i32 %5)
>  %153 = extractelement <4 x float> %152, i32 0
>  %154 = extractelement <4 x float> %152, i32 1
>  %155 = extractelement <4 x float> %152, i32 2
>  %156 = extractelement <4 x float> %152, i32 3
>  %157 = getelementptr <16 x i8> addrspace(2)* %3, i32 4
>  %158 = load <16 x i8> addrspace(2)* %157, !tbaa !0
>  %159 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %158, i32 0, i32 %5)
>  %160 = extractelement <4 x float> %159, i32 0
>  %161 = extractelement <4 x float> %159, i32 1
>  %162 = extractelement <4 x float> %159, i32 2
>  %163 = extractelement <4 x float> %159, i32 3
>  %164 = getelementptr <16 x i8> addrspace(2)* %3, i32 5
>  %165 = load <16 x i8> addrspace(2)* %164, !tbaa !0
>  %166 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %165, i32 0, i32 %5)
>  %167 = extractelement <4 x float> %166, i32 0
>  %168 = extractelement <4 x float> %166, i32 1
>  %169 = fmul float %139, %102
>  %170 = fmul float %140, %104
>  %171 = fadd float %169, %170
>  %172 = fmul float %141, %106
>  %173 = fadd float %171, %172
>  %174 = fmul float %142, %108
>  %175 = fadd float %173, %174
>  %176 = fmul float %139, %110
>  %177 = fmul float %140, %112
>  %178 = fadd float %176, %177
>  %179 = fmul float %141, %114
>  %180 = fadd float %178, %179
>  %181 = fmul float %142, %116
>  %182 = fadd float %180, %181
>  %183 = fmul float %139, %118
>  %184 = fmul float %140, %120
>  %185 = fadd float %183, %184
>  %186 = fmul float %141, %122
>  %187 = fadd float %185, %186
>  %188 = fmul float %142, %124
>  %189 = fadd float %187, %188
>  %190 = fsub float -0.000000e+00, %20
>  %191 = fadd float %175, %190
>  %192 = fsub float -0.000000e+00, %22
>  %193 = fadd float %182, %192
>  %194 = fsub float -0.000000e+00, %24
>  %195 = fadd float %189, %194
>  %196 = fmul float %191, %191
>  %197 = fmul float %193, %193
>  %198 = fadd float %197, %196
>  %199 = fmul float %195, %195
>  %200 = fadd float %198, %199
>  %201 = call float @llvm.AMDGPU.rsq(float %200)
>  %202 = call float @llvm.log2.f32(float %132)
>  %203 = call float @llvm.log2.f32(float %133)
>  %204 = call float @llvm.log2.f32(float %134)
>  %205 = fdiv float 1.000000e+00, %201
>  %206 = fmul float %202, 0x40019999A0000000
>  %207 = fmul float %203, 0x40019999A0000000
>  %208 = fmul float %204, 0x40019999A0000000
>  %209 = fmul float %205, %90
>  %210 = fmul float %205, %94
>  %211 = fmul float %205, %96
>  %212 = fmul float %205, %92
>  %213 = call float @llvm.AMDIL.exp.(float %206)
>  %214 = call float @llvm.AMDIL.exp.(float %207)
>  %215 = call float @llvm.AMDIL.exp.(float %208)
>  %216 = fsub float -0.000000e+00, %210
>  %217 = fmul float %96, %205
>  %218 = fadd float %217, %216
>  %219 = fdiv float 1.000000e+00, %218
>  %220 = fcmp uge float %209, %162
>  %221 = select i1 %220, float %209, float %162
>  %222 = fsub float -0.000000e+00, %205
>  %223 = fmul float %94, %222
>  %224 = fadd float %223, %221
>  %225 = fsub float -0.000000e+00, %98
>  %226 = fadd float %205, %225
>  %227 = fsub float -0.000000e+00, %219
>  %228 = fmul float %224, %227
>  %229 = fadd float %228, %14
>  %230 = fmul float %213, %229
>  %231 = fmul float %214, %229
>  %232 = fmul float %215, %229
>  %233 = fmul float %135, %229
>  %234 = fmul float %226, %100
>  %235 = fcmp ult float %210, %221
>  %236 = select i1 %235, float 1.000000e+00, float 0.000000e+00
>  %237 = fcmp ult float %211, %221
>  %238 = select i1 %237, float 1.000000e+00, float 0.000000e+00
>  %239 = fsub float -0.000000e+00, %236
>  %240 = fptosi float %239 to i32
>  %241 = fsub float -0.000000e+00, %238
>  %242 = fptosi float %241 to i32
>  %243 = bitcast i32 %240 to float
>  %244 = bitcast i32 %242 to float
>  %245 = bitcast float %243 to i32
>  %246 = and i32 %245, 1065353216
>  %247 = bitcast float %244 to i32
>  %248 = and i32 %247, 1065353216
>  %249 = bitcast i32 %246 to float
>  %250 = bitcast i32 %248 to float
>  %251 = fcmp uge float %234, %12
>  %252 = select i1 %251, float %234, float %12
>  %253 = fsub float -0.000000e+00, %230
>  %254 = fmul float %250, %253
>  %255 = fadd float %254, %230
>  %256 = fsub float -0.000000e+00, %231
>  %257 = fmul float %250, %256
>  %258 = fadd float %257, %231
>  %259 = fsub float -0.000000e+00, %232
>  %260 = fmul float %250, %259
>  %261 = fadd float %260, %232
>  %262 = fsub float -0.000000e+00, %233
>  %263 = fmul float %250, %262
>  %264 = fadd float %263, %233
>  %265 = fcmp uge float %252, %14
>  %266 = select i1 %265, float %14, float %252
>  %267 = fsub float -0.000000e+00, %213
>  %268 = fadd float %255, %267
>  %269 = fsub float -0.000000e+00, %214
>  %270 = fadd float %258, %269
>  %271 = fsub float -0.000000e+00, %215
>  %272 = fadd float %261, %271
>  %273 = fsub float -0.000000e+00, %135
>  %274 = fadd float %264, %273
>  %275 = fmul float %249, %268
>  %276 = fadd float %275, %213
>  %277 = fmul float %249, %270
>  %278 = fadd float %277, %214
>  %279 = fmul float %249, %272
>  %280 = fadd float %279, %215
>  %281 = fmul float %249, %274
>  %282 = fadd float %281, %135
>  %283 = fsub float -0.000000e+00, %266
>  %284 = fadd float %283, %14
>  %285 = fmul float %276, %284
>  %286 = fmul float %278, %284
>  %287 = fmul float %280, %284
>  %288 = fmul float %282, %284
>  %289 = fcmp uge float %12, %284
>  %290 = select i1 %289, float 1.000000e+00, float 0.000000e+00
>  %291 = fsub float -0.000000e+00, %290
>  %292 = fptosi float %291 to i32
>  %293 = bitcast i32 %292 to float
>  %294 = bitcast float %293 to i32
>  %295 = and i32 %294, 1065353216
>  %296 = bitcast i32 %295 to float
>  %297 = fsub float -0.000000e+00, %148
>  %298 = fadd float %297, %146
>  %299 = fsub float -0.000000e+00, %149
>  %300 = fadd float %299, %147
>  %301 = fsub float -0.000000e+00, %155
>  %302 = fadd float %301, %153
>  %303 = fsub float -0.000000e+00, %156
>  %304 = fadd float %303, %154
>  %305 = fmul float %167, %298
>  %306 = fadd float %305, %148
>  %307 = fmul float %168, %300
>  %308 = fadd float %307, %149
>  %309 = fmul float %167, %302
>  %310 = fadd float %309, %155
>  %311 = fmul float %168, %304
>  %312 = fadd float %311, %156
>  %313 = fsub float -0.000000e+00, %221
>  %314 = fmul float %313, %250
>  %315 = fmul float %163, 0x3FC45F3060000000
>  %316 = fadd float %315, 5.000000e-01
>  %317 = fmul float %161, 0x3FC45F3060000000
>  %318 = fadd float %317, 5.000000e-01
>  %319 = fmul float %249, %314
>  %320 = fadd float %319, %221
>  %321 = call float @llvm.AMDIL.fraction.(float %316)
>  %322 = call float @llvm.AMDIL.fraction.(float %318)
>  %323 = fsub float -0.000000e+00, %320
>  %324 = fmul float %296, %323
>  %325 = fadd float %324, %320
>  %326 = fmul float %321, 0x401921FB60000000
>  %327 = fadd float %326, 0xC00921FB60000000
>  %328 = fmul float %322, 0x401921FB60000000
>  %329 = fadd float %328, 0xC00921FB60000000
>  %330 = fmul float %329, %329
>  %331 = fmul float %330, 0xBEBA01A020000000
>  %332 = fadd float %331, 0x3F31111120000000
>  %333 = fmul float %330, 0xBEF6C16C20000000
>  %334 = fadd float %333, 0x3F65555560000000
>  %335 = fmul float %332, %330
>  %336 = fadd float %335, 0xBF95555560000000
>  %337 = fmul float %334, %330
>  %338 = fadd float %337, -1.250000e-01
>  %339 = fmul float %336, %330
>  %340 = fadd float %339, 5.000000e-01
>  %341 = fmul float %338, %330
>  %342 = fadd float %341, 1.000000e+00
>  %343 = fmul float %340, %329
>  %344 = fmul float %343, %343
>  %345 = fmul float %342, %343
>  %346 = fadd float %344, %344
>  %347 = fadd float %345, %345
>  %348 = fsub float -0.000000e+00, %346
>  %349 = fadd float %348, 1.000000e+00
>  %350 = fmul float 2.000000e+00, %167
>  %351 = fadd float %350, -1.000000e+00
>  %352 = fmul float 2.000000e+00, %168
>  %353 = fadd float %352, -1.000000e+00
>  %354 = fcmp uge float %212, %325
>  %355 = select i1 %354, float %325, float %212
>  %356 = fmul float %349, %351
>  %357 = fmul float %347, %353
>  %358 = fmul float %347, %351
>  %359 = fmul float %327, %327
>  %360 = fmul float %359, 0xBEBA01A020000000
>  %361 = fadd float %360, 0x3F31111120000000
>  %362 = fmul float %359, 0xBEF6C16C20000000
>  %363 = fadd float %362, 0x3F65555560000000
>  %364 = fmul float %361, %359
>  %365 = fadd float %364, 0xBF95555560000000
>  %366 = fmul float %363, %359
>  %367 = fadd float %366, -1.250000e-01
>  %368 = fmul float %365, %359
>  %369 = fadd float %368, 5.000000e-01
>  %370 = fmul float %367, %359
>  %371 = fadd float %370, 1.000000e+00
>  %372 = fmul float %369, %327
>  %373 = fmul float %372, %372
>  %374 = fmul float %371, %372
>  %375 = fadd float %373, %373
>  %376 = fadd float %374, %374
>  %377 = fsub float -0.000000e+00, %375
>  %378 = fadd float %377, 1.000000e+00
>  %379 = fadd float %357, %356
>  %380 = fsub float -0.000000e+00, %358
>  %381 = fmul float %353, %349
>  %382 = fadd float %381, %380
>  %383 = fsub float -0.000000e+00, %379
>  %384 = fmul float %378, %383
>  %385 = fsub float -0.000000e+00, %379
>  %386 = fmul float %376, %385
>  %387 = fsub float -0.000000e+00, %386
>  %388 = fmul float %139, %34
>  %389 = fmul float %140, %36
>  %390 = fadd float %388, %389
>  %391 = fmul float %141, %38
>  %392 = fadd float %390, %391
>  %393 = fmul float %142, %40
>  %394 = fadd float %392, %393
>  %395 = fmul float %139, %42
>  %396 = fmul float %140, %44
>  %397 = fadd float %395, %396
>  %398 = fmul float %141, %46
>  %399 = fadd float %397, %398
>  %400 = fmul float %142, %48
>  %401 = fadd float %399, %400
>  %402 = fmul float %139, %50
>  %403 = fmul float %140, %52
>  %404 = fadd float %402, %403
>  %405 = fmul float %141, %54
>  %406 = fadd float %404, %405
>  %407 = fmul float %142, %56
>  %408 = fadd float %406, %407
>  %409 = fmul float %384, %355
>  %410 = fadd float %409, %394
>  %411 = fmul float %382, %355
>  %412 = fadd float %411, %401
>  %413 = fmul float %387, %355
>  %414 = fadd float %413, %408
>  %415 = fmul float %410, %66
>  %416 = fmul float %412, %68
>  %417 = fadd float %415, %416
>  %418 = fmul float %414, %70
>  %419 = fadd float %417, %418
>  %420 = fmul float %14, %72
>  %421 = fadd float %419, %420
>  %422 = fsub float -0.000000e+00, %421
>  %423 = fmul float %410, %58
>  %424 = fmul float %412, %60
>  %425 = fadd float %423, %424
>  %426 = fmul float %414, %62
>  %427 = fadd float %425, %426
>  %428 = fmul float %14, %64
>  %429 = fadd float %427, %428
>  %430 = fmul float %410, %82
>  %431 = fmul float %412, %84
>  %432 = fadd float %430, %431
>  %433 = fmul float %414, %86
>  %434 = fadd float %432, %433
>  %435 = fmul float %14, %88
>  %436 = fadd float %434, %435
>  %437 = fmul float %410, %74
>  %438 = fmul float %412, %76
>  %439 = fadd float %437, %438
>  %440 = fmul float %414, %78
>  %441 = fadd float %439, %440
>  %442 = fmul float %14, %80
>  %443 = fadd float %441, %442
>  %444 = fadd float %429, %436
>  %445 = fadd float %422, %436
>  %446 = fmul float %444, %26
>  %447 = fmul float %445, %28
>  %448 = fmul float %436, %30
>  %449 = fmul float %436, %32
>  %450 = fmul float %446, %18
>  %451 = fadd float %450, %448
>  %452 = fmul float %447, %18
>  %453 = fadd float %452, %449
>  %454 = fmul float %160, %14
>  %455 = fmul float %160, %12
>  %456 = fmul float %160, %12
>  %457 = fmul float %160, %12
>  %458 = fsub float -0.000000e+00, %436
>  %459 = fmul float %443, %16
>  %460 = fadd float %459, %458
>  %461 = fsub float -0.000000e+00, %421
>  %462 = fmul float %126, %436
>  %463 = fadd float %462, %429
>  %464 = fmul float %128, %436
>  %465 = fadd float %464, %461
>  %466 = call float @llvm.AMDIL.clamp.(float %285, float 0.000000e+00, float 1.000000e+00)
>  %467 = call float @llvm.AMDIL.clamp.(float %286, float 0.000000e+00, float 1.000000e+00)
>  %468 = call float @llvm.AMDIL.clamp.(float %287, float 0.000000e+00, float 1.000000e+00)
>  %469 = call float @llvm.AMDIL.clamp.(float %288, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %466, float %467, float %468, float %469)
>  %470 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %471 = load float addrspace(2)* addrspace(2)* %470, !tbaa !0
>  %472 = getelementptr float addrspace(2)* %471, i32 0
>  %473 = load float addrspace(2)* %472, !tbaa !0
>  %474 = fmul float %473, %429
>  %475 = getelementptr float addrspace(2)* %471, i32 1
>  %476 = load float addrspace(2)* %475, !tbaa !0
>  %477 = fmul float %476, %421
>  %478 = fadd float %474, %477
>  %479 = getelementptr float addrspace(2)* %471, i32 2
>  %480 = load float addrspace(2)* %479, !tbaa !0
>  %481 = fmul float %480, %443
>  %482 = fadd float %478, %481
>  %483 = getelementptr float addrspace(2)* %471, i32 3
>  %484 = load float addrspace(2)* %483, !tbaa !0
>  %485 = fmul float %484, %436
>  %486 = fadd float %482, %485
>  %487 = getelementptr float addrspace(2)* %471, i32 4
>  %488 = load float addrspace(2)* %487, !tbaa !0
>  %489 = fmul float %488, %429
>  %490 = getelementptr float addrspace(2)* %471, i32 5
>  %491 = load float addrspace(2)* %490, !tbaa !0
>  %492 = fmul float %491, %421
>  %493 = fadd float %489, %492
>  %494 = getelementptr float addrspace(2)* %471, i32 6
>  %495 = load float addrspace(2)* %494, !tbaa !0
>  %496 = fmul float %495, %443
>  %497 = fadd float %493, %496
>  %498 = getelementptr float addrspace(2)* %471, i32 7
>  %499 = load float addrspace(2)* %498, !tbaa !0
>  %500 = fmul float %499, %436
>  %501 = fadd float %497, %500
>  %502 = getelementptr float addrspace(2)* %471, i32 8
>  %503 = load float addrspace(2)* %502, !tbaa !0
>  %504 = fmul float %503, %429
>  %505 = getelementptr float addrspace(2)* %471, i32 9
>  %506 = load float addrspace(2)* %505, !tbaa !0
>  %507 = fmul float %506, %421
>  %508 = fadd float %504, %507
>  %509 = getelementptr float addrspace(2)* %471, i32 10
>  %510 = load float addrspace(2)* %509, !tbaa !0
>  %511 = fmul float %510, %443
>  %512 = fadd float %508, %511
>  %513 = getelementptr float addrspace(2)* %471, i32 11
>  %514 = load float addrspace(2)* %513, !tbaa !0
>  %515 = fmul float %514, %436
>  %516 = fadd float %512, %515
>  %517 = getelementptr float addrspace(2)* %471, i32 12
>  %518 = load float addrspace(2)* %517, !tbaa !0
>  %519 = fmul float %518, %429
>  %520 = getelementptr float addrspace(2)* %471, i32 13
>  %521 = load float addrspace(2)* %520, !tbaa !0
>  %522 = fmul float %521, %421
>  %523 = fadd float %519, %522
>  %524 = getelementptr float addrspace(2)* %471, i32 14
>  %525 = load float addrspace(2)* %524, !tbaa !0
>  %526 = fmul float %525, %443
>  %527 = fadd float %523, %526
>  %528 = getelementptr float addrspace(2)* %471, i32 15
>  %529 = load float addrspace(2)* %528, !tbaa !0
>  %530 = fmul float %529, %436
>  %531 = fadd float %527, %530
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %486, float %501, float %516, float %531)
>  %532 = getelementptr float addrspace(2)* %471, i32 16
>  %533 = load float addrspace(2)* %532, !tbaa !0
>  %534 = fmul float %533, %429
>  %535 = getelementptr float addrspace(2)* %471, i32 17
>  %536 = load float addrspace(2)* %535, !tbaa !0
>  %537 = fmul float %536, %421
>  %538 = fadd float %534, %537
>  %539 = getelementptr float addrspace(2)* %471, i32 18
>  %540 = load float addrspace(2)* %539, !tbaa !0
>  %541 = fmul float %540, %443
>  %542 = fadd float %538, %541
>  %543 = getelementptr float addrspace(2)* %471, i32 19
>  %544 = load float addrspace(2)* %543, !tbaa !0
>  %545 = fmul float %544, %436
>  %546 = fadd float %542, %545
>  %547 = getelementptr float addrspace(2)* %471, i32 20
>  %548 = load float addrspace(2)* %547, !tbaa !0
>  %549 = fmul float %548, %429
>  %550 = getelementptr float addrspace(2)* %471, i32 21
>  %551 = load float addrspace(2)* %550, !tbaa !0
>  %552 = fmul float %551, %421
>  %553 = fadd float %549, %552
>  %554 = getelementptr float addrspace(2)* %471, i32 22
>  %555 = load float addrspace(2)* %554, !tbaa !0
>  %556 = fmul float %555, %443
>  %557 = fadd float %553, %556
>  %558 = getelementptr float addrspace(2)* %471, i32 23
>  %559 = load float addrspace(2)* %558, !tbaa !0
>  %560 = fmul float %559, %436
>  %561 = fadd float %557, %560
>  %562 = getelementptr float addrspace(2)* %471, i32 24
>  %563 = load float addrspace(2)* %562, !tbaa !0
>  %564 = fmul float %563, %429
>  %565 = getelementptr float addrspace(2)* %471, i32 25
>  %566 = load float addrspace(2)* %565, !tbaa !0
>  %567 = fmul float %566, %421
>  %568 = fadd float %564, %567
>  %569 = getelementptr float addrspace(2)* %471, i32 26
>  %570 = load float addrspace(2)* %569, !tbaa !0
>  %571 = fmul float %570, %443
>  %572 = fadd float %568, %571
>  %573 = getelementptr float addrspace(2)* %471, i32 27
>  %574 = load float addrspace(2)* %573, !tbaa !0
>  %575 = fmul float %574, %436
>  %576 = fadd float %572, %575
>  %577 = getelementptr float addrspace(2)* %471, i32 28
>  %578 = load float addrspace(2)* %577, !tbaa !0
>  %579 = fmul float %578, %429
>  %580 = getelementptr float addrspace(2)* %471, i32 29
>  %581 = load float addrspace(2)* %580, !tbaa !0
>  %582 = fmul float %581, %421
>  %583 = fadd float %579, %582
>  %584 = getelementptr float addrspace(2)* %471, i32 30
>  %585 = load float addrspace(2)* %584, !tbaa !0
>  %586 = fmul float %585, %443
>  %587 = fadd float %583, %586
>  %588 = getelementptr float addrspace(2)* %471, i32 31
>  %589 = load float addrspace(2)* %588, !tbaa !0
>  %590 = fmul float %589, %436
>  %591 = fadd float %587, %590
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %546, float %561, float %576, float %591)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %306, float %308, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %310, float %312, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %454, float %455, float %456, float %457)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %451, float %453, float %443, float %436)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %463, float %465, float %460, float %436)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDGPU.rsq(float) #2
>
>; Function Attrs: nounwind readonly
>declare float @llvm.log2.f32(float) #3
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.exp.(float) #2
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.fraction.(float) #2
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>attributes #3 = { nounwind readonly }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840704
>bf8c007f
>e00c2000
>80020500
>c0410100
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>041c1112
>c00403d6
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>7e1e0208
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>04360e08
>c00403d9
>bf8c007f
>101c1c08
>c00403d8
>bf8c007f
>d282000e
>04381112
>c00403da
>bf8c007f
>d2820008
>04381108
>c00403db
>bf8c007f
>7e1c0208
>d2820008
>04221c04
>c004010f
>bf8c007f
>d282000d
>04361008
>c0040109
>bf8c007f
>101c0c08
>c0040108
>bf8c007f
>d282000e
>043a0a08
>c004010a
>bf8c007f
>d282000e
>043a0e08
>c004010b
>bf8c007f
>d282000e
>043a1008
>c0040105
>bf8c007f
>101e0c08
>c0040104
>bf8c007f
>d282000f
>043e0a08
>c0040106
>bf8c007f
>d282000f
>043e0e08
>c0040107
>bf8c007f
>d282000f
>043e1008
>c0040101
>bf8c007f
>10200c08
>c0040100
>bf8c007f
>d2820010
>04420a08
>c0040102
>bf8c007f
>d2820010
>04420e08
>c0040103
>bf8c007f
>d2820010
>04421008
>f80000ef
>0d0e0f10
>c004011d
>bf8c000f
>101a0c08
>c004011c
>bf8c007f
>d282000d
>04360a08
>c004011e
>bf8c007f
>d282000d
>04360e08
>c004011f
>bf8c007f
>d282000d
>04361008
>c0040119
>bf8c007f
>101c0c08
>c0040118
>bf8c007f
>d282000e
>043a0a08
>c004011a
>bf8c007f
>d282000e
>043a0e08
>c004011b
>bf8c007f
>d282000e
>043a1008
>c0040115
>bf8c007f
>101e0c08
>c0040114
>bf8c007f
>d282000f
>043e0a08
>c0040116
>bf8c007f
>d282000f
>043e0e08
>c0040117
>bf8c007f
>d282000f
>043e1008
>c0040111
>bf8c007f
>10200c08
>c0040110
>bf8c007f
>d2820010
>04420a08
>c0040112
>bf8c007f
>d2820010
>04420e08
>c0000113
>bf8c007f
>d2820010
>04421000
>f80000ff
>0d0e0f10
>c0840708
>bf8c000f
>e00c2000
>80020d00
>bf8c0770
>0822210e
>d2820011
>0442230a
>08241f0d
>d282000e
>043e2509
>7e1a0280
>f800021f
>0d0d110e
>c084070c
>bf8c000f
>e00c2000
>80020e00
>bf8c0770
>0800230f
>d2820000
>0446010a
>0824210e
>d2820009
>04422509
>f800022f
>0d0d0009
>bf8c070f
>10000205
>10020204
>f800023f
>00000001
>bf8c070f
>08000d08
>c0000339
>bf8c007f
>10000000
>c000033b
>bf8c007f
>10021000
>c0000303
>bf8c007f
>d2820000
>04040100
>06021105
>c0008338
>bf8c007f
>10020201
>c000833a
>bf8c007f
>10041001
>d2820001
>04080101
>f800024f
>08070001
>c00003f4
>bf8c000f
>d2820000
>04161000
>c0000302
>bf8c007f
>10020e00
>08021101
>c00003f5
>bf8c007f
>10041000
>08040d02
>f80008cf
>08010200
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL IN[2], GENERIC[21], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL CONST[0..30]
>DCL TEMP[0..2], LOCAL
>DCL TEMP[3], ARRAY(1), LOCAL
>  0: MAD TEMP[0].x, IN[2].wwww, CONST[12].wwww, -CONST[12].xxxx
>  1: MOV TEMP[1].xy, IN[0].xyyy
>  2: TEX TEMP[1], TEMP[1], SAMP[0], 2D
>  3: MUL TEMP[1], TEMP[1], IN[1]
>  4: MUL TEMP[1], TEMP[1], CONST[0]
>  5: MIN TEMP[0].x, TEMP[0].xxxx, CONST[12].zzzz
>  6: MOV_SAT TEMP[2].x, TEMP[0].xxxx
>  7: MUL TEMP[1].xyz, TEMP[1].xyzz, CONST[1].xxxx
>  8: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
>  9: MAD TEMP[0].xyz, TEMP[1].xyzz, -CONST[30].wwww, CONST[29].xyzz
> 10: MUL TEMP[0].xyz, TEMP[2].xxxx, TEMP[0].xyzz
> 11: MAD TEMP[1].xyz, TEMP[1].xyzz, CONST[30].wwww, TEMP[0].xyzz
> 12: MOV TEMP[3], TEMP[1]
> 13: MOV OUT[0], TEMP[3]
> 14: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 0
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 1
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 2
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 3
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 4
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 48
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 50
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 51
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 116
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 117
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 118
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr float addrspace(2)* %21, i32 123
>  %45 = load float addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %47 = load <32 x i8> addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %49 = load <16 x i8> addrspace(2)* %48, !tbaa !0
>  %50 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %51 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %52 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %53 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %54 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %3, <2 x i32> %5)
>  %55 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %3, <2 x i32> %5)
>  %56 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %3, <2 x i32> %5)
>  %57 = fsub float -0.000000e+00, %33
>  %58 = fmul float %56, %37
>  %59 = fadd float %58, %57
>  %60 = bitcast float %50 to i32
>  %61 = bitcast float %51 to i32
>  %62 = insertelement <2 x i32> undef, i32 %60, i32 0
>  %63 = insertelement <2 x i32> %62, i32 %61, i32 1
>  %64 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %63, <32 x i8> %47, <16 x i8> %49, i32 2)
>  %65 = extractelement <4 x float> %64, i32 0
>  %66 = extractelement <4 x float> %64, i32 1
>  %67 = extractelement <4 x float> %64, i32 2
>  %68 = extractelement <4 x float> %64, i32 3
>  %69 = fmul float %65, %52
>  %70 = fmul float %66, %53
>  %71 = fmul float %67, %54
>  %72 = fmul float %68, %55
>  %73 = fmul float %69, %23
>  %74 = fmul float %70, %25
>  %75 = fmul float %71, %27
>  %76 = fmul float %72, %29
>  %77 = fcmp uge float %59, %35
>  %78 = select i1 %77, float %35, float %59
>  %79 = call float @llvm.AMDIL.clamp.(float %78, float 0.000000e+00, float 1.000000e+00)
>  %80 = fmul float %73, %31
>  %81 = fmul float %74, %31
>  %82 = fmul float %75, %31
>  %83 = fmul float %79, %79
>  %84 = fsub float -0.000000e+00, %45
>  %85 = fmul float %80, %84
>  %86 = fadd float %85, %39
>  %87 = fsub float -0.000000e+00, %45
>  %88 = fmul float %81, %87
>  %89 = fadd float %88, %41
>  %90 = fsub float -0.000000e+00, %45
>  %91 = fmul float %82, %90
>  %92 = fadd float %91, %43
>  %93 = fmul float %83, %86
>  %94 = fmul float %83, %89
>  %95 = fmul float %83, %92
>  %96 = fmul float %80, %45
>  %97 = fadd float %96, %93
>  %98 = fmul float %81, %45
>  %99 = fadd float %98, %94
>  %100 = fmul float %82, %45
>  %101 = fadd float %100, %95
>  %102 = call i32 @llvm.SI.packf16(float %97, float %99)
>  %103 = bitcast i32 %102 to float
>  %104 = call i32 @llvm.SI.packf16(float %101, float %76)
>  %105 = bitcast i32 %104 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %103, float %105, float %103, float %105)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430202
>c8180500
>c8190501
>bf8c0770
>100c0d03
>c0400100
>bf8c007f
>c0010101
>bf8c007f
>100c0c02
>c0018104
>bf8c007f
>100e0c03
>c001017b
>bf8c007f
>100c0e02
>c0020175
>bf8c007f
>08100c04
>c8180b00
>c8190b01
>c0020133
>bf8c007f
>100c0c04
>c0020130
>bf8c007f
>0a0c0c04
>c0020132
>bf8c007f
>d00c0008
>02000906
>7e120204
>d2000006
>00221306
>d2060806
>02010106
>100c0d06
>10101106
>d2820007
>04200507
>c8200400
>c8210401
>10101102
>c0020100
>bf8c007f
>10101004
>10101003
>10121002
>c0020174
>bf8c007f
>08121204
>10121306
>d2820008
>04240508
>5e0e0f08
>c8200600
>c8210601
>10101104
>c0020102
>bf8c007f
>10101004
>10101003
>10121002
>c0018176
>bf8c007f
>08121203
>100c1306
>d2820006
>04180508
>c8200700
>c8210701
>10001105
>c0000103
>bf8c007f
>10000000
>5e000106
>f8001c0f
>00070007
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL OUT[3], GENERIC[20]
>DCL OUT[4], GENERIC[21]
>DCL CONST[0..20]
>DCL TEMP[0..6], LOCAL
>  0: MOV TEMP[0].w, CONST[0].yyyy
>  1: DP4 TEMP[0].x, IN[0], CONST[17]
>  2: DP4 TEMP[1].x, IN[0], CONST[18]
>  3: MOV TEMP[0].y, TEMP[1].xxxx
>  4: DP4 TEMP[1].x, IN[0], CONST[19]
>  5: MOV TEMP[0].z, TEMP[1].xxxx
>  6: DP4 TEMP[1].x, TEMP[0], CONST[8]
>  7: DP4 TEMP[2].x, TEMP[0], CONST[9]
>  8: MOV TEMP[1].y, TEMP[2].xxxx
>  9: DP4 TEMP[3].x, TEMP[0], CONST[10]
> 10: MOV TEMP[1].z, TEMP[3].xxxx
> 11: DP4 TEMP[4].x, TEMP[0], CONST[11]
> 12: MOV TEMP[1].w, TEMP[4].xxxx
> 13: DP4 TEMP[5].x, TEMP[0], CONST[13]
> 14: MOV TEMP[0].xyz, TEMP[0].xyzx
> 15: MOV TEMP[0].w, TEMP[5].xxxx
> 16: MOV TEMP[5].xy, IN[2].xyxx
> 17: MOV TEMP[6], TEMP[1]
> 18: MAD TEMP[3].x, TEMP[3].xxxx, CONST[0].zzzz, -TEMP[4].xxxx
> 19: MOV TEMP[1].z, TEMP[3].xxxx
> 20: MOV TEMP[1].y, -TEMP[2].xxxx
> 21: MAD TEMP[1].xy, CONST[20].xyyy, TEMP[4].xxxx, TEMP[1].xyyy
> 22: MOV OUT[2], TEMP[5]
> 23: MOV OUT[3], IN[1]
> 24: MOV OUT[0], TEMP[1]
> 25: MOV OUT[1], TEMP[6]
> 26: MOV OUT[4], TEMP[0]
> 27: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 1
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 2
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 32
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 33
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 34
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 35
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 36
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 37
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 38
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 39
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 40
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 41
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 42
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 43
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 44
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 45
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 46
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 47
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 52
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 53
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 54
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 55
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 68
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 69
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 70
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 71
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 72
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 73
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 74
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 75
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 76
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 77
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 78
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 79
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 80
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 81
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %84 = load <16 x i8> addrspace(2)* %83, !tbaa !0
>  %85 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %84, i32 0, i32 %5)
>  %86 = extractelement <4 x float> %85, i32 0
>  %87 = extractelement <4 x float> %85, i32 1
>  %88 = extractelement <4 x float> %85, i32 2
>  %89 = extractelement <4 x float> %85, i32 3
>  %90 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %91 = load <16 x i8> addrspace(2)* %90, !tbaa !0
>  %92 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %91, i32 0, i32 %5)
>  %93 = extractelement <4 x float> %92, i32 0
>  %94 = extractelement <4 x float> %92, i32 1
>  %95 = extractelement <4 x float> %92, i32 2
>  %96 = extractelement <4 x float> %92, i32 3
>  %97 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %98 = load <16 x i8> addrspace(2)* %97, !tbaa !0
>  %99 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %98, i32 0, i32 %5)
>  %100 = extractelement <4 x float> %99, i32 0
>  %101 = extractelement <4 x float> %99, i32 1
>  %102 = fmul float %86, %56
>  %103 = fmul float %87, %58
>  %104 = fadd float %102, %103
>  %105 = fmul float %88, %60
>  %106 = fadd float %104, %105
>  %107 = fmul float %89, %62
>  %108 = fadd float %106, %107
>  %109 = fmul float %86, %64
>  %110 = fmul float %87, %66
>  %111 = fadd float %109, %110
>  %112 = fmul float %88, %68
>  %113 = fadd float %111, %112
>  %114 = fmul float %89, %70
>  %115 = fadd float %113, %114
>  %116 = fmul float %86, %72
>  %117 = fmul float %87, %74
>  %118 = fadd float %116, %117
>  %119 = fmul float %88, %76
>  %120 = fadd float %118, %119
>  %121 = fmul float %89, %78
>  %122 = fadd float %120, %121
>  %123 = fmul float %108, %16
>  %124 = fmul float %115, %18
>  %125 = fadd float %123, %124
>  %126 = fmul float %122, %20
>  %127 = fadd float %125, %126
>  %128 = fmul float %12, %22
>  %129 = fadd float %127, %128
>  %130 = fmul float %108, %24
>  %131 = fmul float %115, %26
>  %132 = fadd float %130, %131
>  %133 = fmul float %122, %28
>  %134 = fadd float %132, %133
>  %135 = fmul float %12, %30
>  %136 = fadd float %134, %135
>  %137 = fmul float %108, %32
>  %138 = fmul float %115, %34
>  %139 = fadd float %137, %138
>  %140 = fmul float %122, %36
>  %141 = fadd float %139, %140
>  %142 = fmul float %12, %38
>  %143 = fadd float %141, %142
>  %144 = fmul float %108, %40
>  %145 = fmul float %115, %42
>  %146 = fadd float %144, %145
>  %147 = fmul float %122, %44
>  %148 = fadd float %146, %147
>  %149 = fmul float %12, %46
>  %150 = fadd float %148, %149
>  %151 = fmul float %108, %48
>  %152 = fmul float %115, %50
>  %153 = fadd float %151, %152
>  %154 = fmul float %122, %52
>  %155 = fadd float %153, %154
>  %156 = fmul float %12, %54
>  %157 = fadd float %155, %156
>  %158 = fsub float -0.000000e+00, %150
>  %159 = fmul float %143, %14
>  %160 = fadd float %159, %158
>  %161 = fsub float -0.000000e+00, %136
>  %162 = fmul float %80, %150
>  %163 = fadd float %162, %129
>  %164 = fmul float %82, %150
>  %165 = fadd float %164, %161
>  %166 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %167 = load float addrspace(2)* addrspace(2)* %166, !tbaa !0
>  %168 = getelementptr float addrspace(2)* %167, i32 0
>  %169 = load float addrspace(2)* %168, !tbaa !0
>  %170 = fmul float %169, %129
>  %171 = getelementptr float addrspace(2)* %167, i32 1
>  %172 = load float addrspace(2)* %171, !tbaa !0
>  %173 = fmul float %172, %136
>  %174 = fadd float %170, %173
>  %175 = getelementptr float addrspace(2)* %167, i32 2
>  %176 = load float addrspace(2)* %175, !tbaa !0
>  %177 = fmul float %176, %143
>  %178 = fadd float %174, %177
>  %179 = getelementptr float addrspace(2)* %167, i32 3
>  %180 = load float addrspace(2)* %179, !tbaa !0
>  %181 = fmul float %180, %150
>  %182 = fadd float %178, %181
>  %183 = getelementptr float addrspace(2)* %167, i32 4
>  %184 = load float addrspace(2)* %183, !tbaa !0
>  %185 = fmul float %184, %129
>  %186 = getelementptr float addrspace(2)* %167, i32 5
>  %187 = load float addrspace(2)* %186, !tbaa !0
>  %188 = fmul float %187, %136
>  %189 = fadd float %185, %188
>  %190 = getelementptr float addrspace(2)* %167, i32 6
>  %191 = load float addrspace(2)* %190, !tbaa !0
>  %192 = fmul float %191, %143
>  %193 = fadd float %189, %192
>  %194 = getelementptr float addrspace(2)* %167, i32 7
>  %195 = load float addrspace(2)* %194, !tbaa !0
>  %196 = fmul float %195, %150
>  %197 = fadd float %193, %196
>  %198 = getelementptr float addrspace(2)* %167, i32 8
>  %199 = load float addrspace(2)* %198, !tbaa !0
>  %200 = fmul float %199, %129
>  %201 = getelementptr float addrspace(2)* %167, i32 9
>  %202 = load float addrspace(2)* %201, !tbaa !0
>  %203 = fmul float %202, %136
>  %204 = fadd float %200, %203
>  %205 = getelementptr float addrspace(2)* %167, i32 10
>  %206 = load float addrspace(2)* %205, !tbaa !0
>  %207 = fmul float %206, %143
>  %208 = fadd float %204, %207
>  %209 = getelementptr float addrspace(2)* %167, i32 11
>  %210 = load float addrspace(2)* %209, !tbaa !0
>  %211 = fmul float %210, %150
>  %212 = fadd float %208, %211
>  %213 = getelementptr float addrspace(2)* %167, i32 12
>  %214 = load float addrspace(2)* %213, !tbaa !0
>  %215 = fmul float %214, %129
>  %216 = getelementptr float addrspace(2)* %167, i32 13
>  %217 = load float addrspace(2)* %216, !tbaa !0
>  %218 = fmul float %217, %136
>  %219 = fadd float %215, %218
>  %220 = getelementptr float addrspace(2)* %167, i32 14
>  %221 = load float addrspace(2)* %220, !tbaa !0
>  %222 = fmul float %221, %143
>  %223 = fadd float %219, %222
>  %224 = getelementptr float addrspace(2)* %167, i32 15
>  %225 = load float addrspace(2)* %224, !tbaa !0
>  %226 = fmul float %225, %150
>  %227 = fadd float %223, %226
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %182, float %197, float %212, float %227)
>  %228 = getelementptr float addrspace(2)* %167, i32 16
>  %229 = load float addrspace(2)* %228, !tbaa !0
>  %230 = fmul float %229, %129
>  %231 = getelementptr float addrspace(2)* %167, i32 17
>  %232 = load float addrspace(2)* %231, !tbaa !0
>  %233 = fmul float %232, %136
>  %234 = fadd float %230, %233
>  %235 = getelementptr float addrspace(2)* %167, i32 18
>  %236 = load float addrspace(2)* %235, !tbaa !0
>  %237 = fmul float %236, %143
>  %238 = fadd float %234, %237
>  %239 = getelementptr float addrspace(2)* %167, i32 19
>  %240 = load float addrspace(2)* %239, !tbaa !0
>  %241 = fmul float %240, %150
>  %242 = fadd float %238, %241
>  %243 = getelementptr float addrspace(2)* %167, i32 20
>  %244 = load float addrspace(2)* %243, !tbaa !0
>  %245 = fmul float %244, %129
>  %246 = getelementptr float addrspace(2)* %167, i32 21
>  %247 = load float addrspace(2)* %246, !tbaa !0
>  %248 = fmul float %247, %136
>  %249 = fadd float %245, %248
>  %250 = getelementptr float addrspace(2)* %167, i32 22
>  %251 = load float addrspace(2)* %250, !tbaa !0
>  %252 = fmul float %251, %143
>  %253 = fadd float %249, %252
>  %254 = getelementptr float addrspace(2)* %167, i32 23
>  %255 = load float addrspace(2)* %254, !tbaa !0
>  %256 = fmul float %255, %150
>  %257 = fadd float %253, %256
>  %258 = getelementptr float addrspace(2)* %167, i32 24
>  %259 = load float addrspace(2)* %258, !tbaa !0
>  %260 = fmul float %259, %129
>  %261 = getelementptr float addrspace(2)* %167, i32 25
>  %262 = load float addrspace(2)* %261, !tbaa !0
>  %263 = fmul float %262, %136
>  %264 = fadd float %260, %263
>  %265 = getelementptr float addrspace(2)* %167, i32 26
>  %266 = load float addrspace(2)* %265, !tbaa !0
>  %267 = fmul float %266, %143
>  %268 = fadd float %264, %267
>  %269 = getelementptr float addrspace(2)* %167, i32 27
>  %270 = load float addrspace(2)* %269, !tbaa !0
>  %271 = fmul float %270, %150
>  %272 = fadd float %268, %271
>  %273 = getelementptr float addrspace(2)* %167, i32 28
>  %274 = load float addrspace(2)* %273, !tbaa !0
>  %275 = fmul float %274, %129
>  %276 = getelementptr float addrspace(2)* %167, i32 29
>  %277 = load float addrspace(2)* %276, !tbaa !0
>  %278 = fmul float %277, %136
>  %279 = fadd float %275, %278
>  %280 = getelementptr float addrspace(2)* %167, i32 30
>  %281 = load float addrspace(2)* %280, !tbaa !0
>  %282 = fmul float %281, %143
>  %283 = fadd float %279, %282
>  %284 = getelementptr float addrspace(2)* %167, i32 31
>  %285 = load float addrspace(2)* %284, !tbaa !0
>  %286 = fmul float %285, %150
>  %287 = fadd float %283, %286
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %242, float %257, float %272, float %287)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %100, float %101, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %93, float %94, float %95, float %96)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %108, float %115, float %122, float %157)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %163, float %165, float %160, float %150)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840700
>bf8c007f
>e00c2000
>80020300
>c0410100
>bf8c0070
>c0020345
>bf8c007f
>10020804
>c0020344
>bf8c007f
>d2820001
>04040903
>c0020346
>bf8c007f
>d2820001
>04040905
>c0020347
>bf8c007f
>d2820001
>04040906
>c0020349
>bf8c007f
>10040804
>c0020348
>bf8c007f
>d2820002
>04080903
>c002034a
>bf8c007f
>d2820002
>04080905
>c002034b
>bf8c007f
>d2820002
>04080906
>c0020321
>bf8c007f
>100e0404
>c0020320
>bf8c007f
>d2820007
>041c0901
>c002034d
>bf8c007f
>10100804
>c002034c
>bf8c007f
>d2820008
>04200903
>c002034e
>bf8c007f
>d2820008
>04200905
>c002034f
>bf8c007f
>d2820003
>04200906
>c0020322
>bf8c007f
>d2820004
>041c0903
>c0020301
>c0028323
>bf8c007f
>7e0a0205
>d2820004
>04120a04
>c0028325
>bf8c007f
>100a0405
>c0028324
>bf8c007f
>d2820005
>04140b01
>c0028326
>bf8c007f
>d2820005
>04140b03
>c0028327
>bf8c007f
>7e0c0205
>d2820005
>04160c04
>c0400102
>bf8c007f
>c002810d
>bf8c007f
>100c0a05
>c002810c
>bf8c007f
>d2820007
>041a0805
>c0028329
>bf8c007f
>100c0405
>c0028328
>bf8c007f
>d2820006
>04180b01
>c002832a
>bf8c007f
>d2820006
>04180b03
>c002832b
>bf8c007f
>7e100205
>d2820006
>041a1004
>c002810e
>bf8c007f
>d2820008
>041e0c05
>c002832d
>bf8c007f
>100e0405
>c002832c
>bf8c007f
>d2820007
>041c0b01
>c002832e
>bf8c007f
>d2820007
>041c0b03
>c002832f
>bf8c007f
>7e120205
>d2820007
>041e1204
>c002810f
>bf8c007f
>d2820008
>04220e05
>c0028109
>bf8c007f
>10120a05
>c0028108
>bf8c007f
>d2820009
>04260805
>c002810a
>bf8c007f
>d2820009
>04260c05
>c002810b
>bf8c007f
>d2820009
>04260e05
>c0028105
>bf8c007f
>10140a05
>c0028104
>bf8c007f
>d282000a
>042a0805
>c0028106
>bf8c007f
>d282000a
>042a0c05
>c0028107
>bf8c007f
>d282000a
>042a0e05
>c0028101
>bf8c007f
>10160a05
>c0028100
>bf8c007f
>d282000b
>042e0805
>c0028102
>bf8c007f
>d282000b
>042e0c05
>c0028103
>bf8c007f
>d282000b
>042e0e05
>f80000ef
>08090a0b
>c002811d
>bf8c000f
>10100a05
>c002811c
>bf8c007f
>d2820008
>04220805
>c002811e
>bf8c007f
>d2820008
>04220c05
>c002811f
>bf8c007f
>d2820008
>04220e05
>c0028119
>bf8c007f
>10120a05
>c0028118
>bf8c007f
>d2820009
>04260805
>c002811a
>bf8c007f
>d2820009
>04260c05
>c002811b
>bf8c007f
>d2820009
>04260e05
>c0028115
>bf8c007f
>10140a05
>c0028114
>bf8c007f
>d282000a
>042a0805
>c0028116
>bf8c007f
>d282000a
>042a0c05
>c0028117
>bf8c007f
>d282000a
>042a0e05
>c0028111
>bf8c007f
>10160a05
>c0028110
>bf8c007f
>d282000b
>042e0805
>c0028112
>bf8c007f
>d282000b
>042e0c05
>c0000113
>bf8c007f
>d282000b
>042e0e00
>f80000ff
>08090a0b
>c0840708
>bf8c000f
>e00c2000
>80020800
>7e180280
>bf8c0770
>f800020f
>0c0c0908
>c0840704
>bf8c000f
>e00c2000
>80020800
>bf8c0770
>f800021f
>0b0a0908
>c0000335
>bf8c000f
>10000400
>c0000334
>bf8c007f
>d2820000
>04000101
>c0000336
>bf8c007f
>d2820000
>04000103
>c0000337
>bf8c007f
>7e100200
>d2820000
>04021004
>f800022f
>00030201
>c0000350
>bf8c000f
>d2820000
>04120e00
>c0000302
>bf8c007f
>10020c00
>08020f01
>c0000351
>bf8c007f
>10040e00
>08040b02
>f80008cf
>07010200
>bf810000
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 3
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 4
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 5
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 6
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 7
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 8
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 9
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 10
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 11
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 12
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 13
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 14
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 15
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %44 = load <16 x i8> addrspace(2)* %43, !tbaa !0
>  %45 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %44, i32 0, i32 %5)
>  %46 = extractelement <4 x float> %45, i32 0
>  %47 = extractelement <4 x float> %45, i32 1
>  %48 = extractelement <4 x float> %45, i32 2
>  %49 = extractelement <4 x float> %45, i32 3
>  %50 = fmul float %46, %12
>  %51 = fmul float %46, %14
>  %52 = fmul float %46, %16
>  %53 = fmul float %46, %18
>  %54 = fmul float %47, %20
>  %55 = fadd float %54, %50
>  %56 = fmul float %47, %22
>  %57 = fadd float %56, %51
>  %58 = fmul float %47, %24
>  %59 = fadd float %58, %52
>  %60 = fmul float %47, %26
>  %61 = fadd float %60, %53
>  %62 = fmul float %48, %28
>  %63 = fadd float %62, %55
>  %64 = fmul float %48, %30
>  %65 = fadd float %64, %57
>  %66 = fmul float %48, %32
>  %67 = fadd float %66, %59
>  %68 = fmul float %48, %34
>  %69 = fadd float %68, %61
>  %70 = fmul float %49, %36
>  %71 = fadd float %70, %63
>  %72 = fmul float %49, %38
>  %73 = fadd float %72, %65
>  %74 = fmul float %49, %40
>  %75 = fadd float %74, %67
>  %76 = fmul float %49, %42
>  %77 = fadd float %76, %69
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %71, float %73, float %75, float %77)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0820700
>bf8c007f
>e00c2000
>80010000
>c0400100
>bf8c0070
>c0010103
>bf8c007f
>10080002
>c0010107
>bf8c007f
>d2820004
>04100501
>c001010b
>bf8c007f
>d2820004
>04100502
>c001010f
>bf8c007f
>d2820004
>04100503
>c0010102
>bf8c007f
>100a0002
>c0010106
>bf8c007f
>d2820005
>04140501
>c001010a
>bf8c007f
>d2820005
>04140502
>c001010e
>bf8c007f
>d2820005
>04140503
>c0010101
>bf8c007f
>100c0002
>c0010105
>bf8c007f
>d2820006
>04180501
>c0010109
>bf8c007f
>d2820006
>04180502
>c001010d
>bf8c007f
>d2820006
>04180503
>c0010100
>bf8c007f
>100e0002
>c0010104
>bf8c007f
>d2820007
>041c0501
>c0010108
>bf8c007f
>d2820007
>041c0502
>c000010c
>bf8c007f
>d2820000
>041c0103
>f80008cf
>04050600
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], GENERIC[19], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL TEMP[0], LOCAL
>DCL TEMP[1], ARRAY(1), LOCAL
>IMM[0] FLT32 {    1.0000,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[1].xyyy
>  1: TEX TEMP[0].w, TEMP[0], SAMP[0], 2D
>  2: MUL TEMP[0].x, TEMP[0].wwww, IN[0].wwww
>  3: MOV TEMP[0].w, TEMP[0].xxxx
>  4: MOV TEMP[0].xyz, IMM[0].xxxx
>  5: MOV TEMP[1], TEMP[0]
>  6: MOV OUT[0], TEMP[1]
>  7: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %21 = load <32 x i8> addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %23 = load <16 x i8> addrspace(2)* %22, !tbaa !0
>  %24 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %3, <2 x i32> %5)
>  %25 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %26 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %27 = bitcast float %25 to i32
>  %28 = bitcast float %26 to i32
>  %29 = insertelement <2 x i32> undef, i32 %27, i32 0
>  %30 = insertelement <2 x i32> %29, i32 %28, i32 1
>  %31 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %30, <32 x i8> %21, <16 x i8> %23, i32 2)
>  %32 = extractelement <4 x float> %31, i32 3
>  %33 = fmul float %32, %24
>  %34 = call i32 @llvm.SI.packf16(float 1.000000e+00, float 1.000000e+00)
>  %35 = bitcast i32 %34 to float
>  %36 = call i32 @llvm.SI.packf16(float 1.000000e+00, float %33)
>  %37 = bitcast i32 %36 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %35, float %37, float %35, float %37)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0500
>c80d0501
>c8080400
>c8090401
>c0800300
>c0c40500
>bf8c007f
>f0800800
>00020202
>c80c0300
>c80d0301
>bf8c0770
>10000702
>5e0000f2
>d25e0001
>0201e4f2
>f8001c0f
>00010001
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], CLIPVERTEX
>DCL OUT[3], GENERIC[19]
>DCL CONST[0..215]
>DCL TEMP[0..7], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {  765.0059,     0.0000,     0.0000,     0.0000}
>IMM[1] INT32 {2, 1, 0, 0}
>  0: ADD TEMP[0].xy, IN[1].xyyy, CONST[0].yyyy
>  1: MUL TEMP[1].xyz, IN[2].zyxx, IMM[0].xxxx
>  2: MUL TEMP[2].xy, TEMP[0].xyyy, IMM[0].yyyy
>  3: MOV TEMP[3].x, TEMP[1].xyzx
>  4: ADD TEMP[4].x, TEMP[2].yyyy, TEMP[2].xxxx
>  5: F2I TEMP[5].x, TEMP[1].yyyy
>  6: UARL ADDR[0].x, TEMP[5].xxxx
>  7: UARL ADDR[0].x, TEMP[5].xxxx
>  8: MUL TEMP[5], TEMP[2].yyyy, CONST[ADDR[0].x+54]
>  9: ADD TEMP[4].x, -TEMP[4].xxxx, CONST[0].yyyy
> 10: F2I TEMP[6].x, TEMP[1].zzzz
> 11: F2I TEMP[7].x, TEMP[1].xxxx
> 12: UARL ADDR[0].x, TEMP[7].xxxx
> 13: MAD TEMP[5], CONST[ADDR[0].x+54], TEMP[2].xxxx, TEMP[5]
> 14: UARL ADDR[0].x, TEMP[6].xxxx
> 15: MAD TEMP[5], CONST[ADDR[0].x+54], TEMP[4].xxxx, TEMP[5]
> 16: DP4 TEMP[1].x, IN[0], TEMP[5]
> 17: F2I TEMP[5].x, TEMP[1].yyyy
> 18: UADD TEMP[5].x, TEMP[5].xxxx, IMM[1].xxxx
> 19: F2I TEMP[6].x, TEMP[3].xxxx
> 20: UADD TEMP[6].x, TEMP[6].xxxx, IMM[1].xxxx
> 21: UARL ADDR[0].x, TEMP[6].xxxx
> 22: MUL TEMP[6], CONST[ADDR[0].x+54], TEMP[2].xxxx
> 23: UARL ADDR[0].x, TEMP[5].xxxx
> 24: UARL ADDR[0].x, TEMP[5].xxxx
> 25: MAD TEMP[0], TEMP[2].yyyy, CONST[ADDR[0].x+54], TEMP[6]
> 26: F2I TEMP[5].x, TEMP[1].zzzz
> 27: UADD TEMP[5].x, TEMP[5].xxxx, IMM[1].yyyy
> 28: F2I TEMP[6].x, TEMP[1].yyyy
> 29: UADD TEMP[6].x, TEMP[6].xxxx, IMM[1].yyyy
> 30: F2I TEMP[3].x, TEMP[3].xxxx
> 31: UADD TEMP[3].x, TEMP[3].xxxx, IMM[1].yyyy
> 32: UARL ADDR[0].x, TEMP[3].xxxx
> 33: MUL TEMP[3], CONST[ADDR[0].x+54], TEMP[2].xxxx
> 34: UARL ADDR[0].x, TEMP[6].xxxx
> 35: MAD TEMP[2], TEMP[2].yyyy, CONST[ADDR[0].x+54], TEMP[3]
> 36: UARL ADDR[0].x, TEMP[5].xxxx
> 37: MAD TEMP[2], CONST[ADDR[0].x+54], TEMP[4].xxxx, TEMP[2]
> 38: DP4 TEMP[2].x, IN[0], TEMP[2]
> 39: MOV TEMP[1].y, TEMP[2].xxxx
> 40: F2I TEMP[2].x, TEMP[1].zzzz
> 41: UADD TEMP[2].x, TEMP[2].xxxx, IMM[1].xxxx
> 42: UARL ADDR[0].x, TEMP[2].xxxx
> 43: UARL ADDR[0].x, TEMP[2].xxxx
> 44: MAD TEMP[2], CONST[ADDR[0].x+54], TEMP[4].xxxx, TEMP[0]
> 45: DP4 TEMP[2].x, IN[0], TEMP[2]
> 46: MOV TEMP[1].z, TEMP[2].xxxx
> 47: MOV TEMP[1].w, CONST[0].yyyy
> 48: DP4 TEMP[2].x, TEMP[1], CONST[8]
> 49: DP4 TEMP[3].x, TEMP[1], CONST[9]
> 50: MOV TEMP[2].y, TEMP[3].xxxx
> 51: DP4 TEMP[4].x, TEMP[1], CONST[10]
> 52: MOV TEMP[2].z, TEMP[4].xxxx
> 53: DP4 TEMP[1].x, TEMP[1], CONST[11]
> 54: MOV TEMP[2].w, TEMP[1].xxxx
> 55: MUL TEMP[0].xy, IN[3].yyyy, CONST[49].xyyy
> 56: MAD TEMP[0].xy, IN[3].xxxx, CONST[48].xyyy, TEMP[0].xyyy
> 57: MOV TEMP[5], TEMP[2]
> 58: MAD TEMP[4].x, TEMP[4].xxxx, CONST[0].zzzz, -TEMP[1].xxxx
> 59: MOV TEMP[2].z, TEMP[4].xxxx
> 60: MOV TEMP[2].y, -TEMP[3].xxxx
> 61: MAD TEMP[2].xy, CONST[215].xyyy, TEMP[1].xxxx, TEMP[2].xyyy
> 62: MOV OUT[3], TEMP[0]
> 63: MOV OUT[0], TEMP[2]
> 64: MOV OUT[2], TEMP[5]
> 65: MOV_SAT OUT[1], CONST[47]
> 66: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 1
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 2
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 32
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 33
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 34
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 35
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 36
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 37
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 38
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 39
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 40
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 41
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 42
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 43
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 44
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 45
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 46
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 47
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 188
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 189
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 190
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 191
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 192
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 193
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 196
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 197
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 860
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 861
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %68 = load <16 x i8> addrspace(2)* %67, !tbaa !0
>  %69 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %68, i32 0, i32 %5)
>  %70 = extractelement <4 x float> %69, i32 0
>  %71 = extractelement <4 x float> %69, i32 1
>  %72 = extractelement <4 x float> %69, i32 2
>  %73 = extractelement <4 x float> %69, i32 3
>  %74 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %75 = load <16 x i8> addrspace(2)* %74, !tbaa !0
>  %76 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %75, i32 0, i32 %5)
>  %77 = extractelement <4 x float> %76, i32 0
>  %78 = extractelement <4 x float> %76, i32 1
>  %79 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %80 = load <16 x i8> addrspace(2)* %79, !tbaa !0
>  %81 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %80, i32 0, i32 %5)
>  %82 = extractelement <4 x float> %81, i32 0
>  %83 = extractelement <4 x float> %81, i32 1
>  %84 = extractelement <4 x float> %81, i32 2
>  %85 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %86 = load <16 x i8> addrspace(2)* %85, !tbaa !0
>  %87 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %86, i32 0, i32 %5)
>  %88 = extractelement <4 x float> %87, i32 0
>  %89 = extractelement <4 x float> %87, i32 1
>  %90 = fadd float %77, %12
>  %91 = fadd float %78, %12
>  %92 = fmul float %84, 0x4087E80C00000000
>  %93 = fmul float %83, 0x4087E80C00000000
>  %94 = fmul float %82, 0x4087E80C00000000
>  %95 = fmul float %90, 0x3F00000000000000
>  %96 = fmul float %91, 0x3F00000000000000
>  %97 = fadd float %96, %95
>  %98 = fptosi float %93 to i32
>  %99 = bitcast i32 %98 to float
>  %100 = bitcast float %99 to i32
>  %101 = shl i32 %100, 4
>  %102 = add i32 %101, 864
>  %103 = udiv i32 %102, 4
>  %104 = getelementptr float addrspace(2)* %10, i32 %103
>  %105 = load float addrspace(2)* %104, !tbaa !0
>  %106 = fmul float %96, %105
>  %107 = shl i32 %100, 4
>  %108 = add i32 %107, 868
>  %109 = udiv i32 %108, 4
>  %110 = getelementptr float addrspace(2)* %10, i32 %109
>  %111 = load float addrspace(2)* %110, !tbaa !0
>  %112 = fmul float %96, %111
>  %113 = shl i32 %100, 4
>  %114 = add i32 %113, 872
>  %115 = udiv i32 %114, 4
>  %116 = getelementptr float addrspace(2)* %10, i32 %115
>  %117 = load float addrspace(2)* %116, !tbaa !0
>  %118 = fmul float %96, %117
>  %119 = shl i32 %100, 4
>  %120 = add i32 %119, 876
>  %121 = udiv i32 %120, 4
>  %122 = getelementptr float addrspace(2)* %10, i32 %121
>  %123 = load float addrspace(2)* %122, !tbaa !0
>  %124 = fmul float %96, %123
>  %125 = fsub float -0.000000e+00, %97
>  %126 = fadd float %125, %12
>  %127 = fptosi float %94 to i32
>  %128 = bitcast i32 %127 to float
>  %129 = fptosi float %92 to i32
>  %130 = bitcast i32 %129 to float
>  %131 = bitcast float %130 to i32
>  %132 = shl i32 %131, 4
>  %133 = add i32 %132, 864
>  %134 = udiv i32 %133, 4
>  %135 = getelementptr float addrspace(2)* %10, i32 %134
>  %136 = load float addrspace(2)* %135, !tbaa !0
>  %137 = fmul float %136, %95
>  %138 = fadd float %137, %106
>  %139 = shl i32 %131, 4
>  %140 = add i32 %139, 868
>  %141 = udiv i32 %140, 4
>  %142 = getelementptr float addrspace(2)* %10, i32 %141
>  %143 = load float addrspace(2)* %142, !tbaa !0
>  %144 = fmul float %143, %95
>  %145 = fadd float %144, %112
>  %146 = shl i32 %131, 4
>  %147 = add i32 %146, 872
>  %148 = udiv i32 %147, 4
>  %149 = getelementptr float addrspace(2)* %10, i32 %148
>  %150 = load float addrspace(2)* %149, !tbaa !0
>  %151 = fmul float %150, %95
>  %152 = fadd float %151, %118
>  %153 = shl i32 %131, 4
>  %154 = add i32 %153, 876
>  %155 = udiv i32 %154, 4
>  %156 = getelementptr float addrspace(2)* %10, i32 %155
>  %157 = load float addrspace(2)* %156, !tbaa !0
>  %158 = fmul float %157, %95
>  %159 = fadd float %158, %124
>  %160 = bitcast float %128 to i32
>  %161 = shl i32 %160, 4
>  %162 = add i32 %161, 864
>  %163 = udiv i32 %162, 4
>  %164 = getelementptr float addrspace(2)* %10, i32 %163
>  %165 = load float addrspace(2)* %164, !tbaa !0
>  %166 = fmul float %165, %126
>  %167 = fadd float %166, %138
>  %168 = shl i32 %160, 4
>  %169 = add i32 %168, 868
>  %170 = udiv i32 %169, 4
>  %171 = getelementptr float addrspace(2)* %10, i32 %170
>  %172 = load float addrspace(2)* %171, !tbaa !0
>  %173 = fmul float %172, %126
>  %174 = fadd float %173, %145
>  %175 = shl i32 %160, 4
>  %176 = add i32 %175, 872
>  %177 = udiv i32 %176, 4
>  %178 = getelementptr float addrspace(2)* %10, i32 %177
>  %179 = load float addrspace(2)* %178, !tbaa !0
>  %180 = fmul float %179, %126
>  %181 = fadd float %180, %152
>  %182 = shl i32 %160, 4
>  %183 = add i32 %182, 876
>  %184 = udiv i32 %183, 4
>  %185 = getelementptr float addrspace(2)* %10, i32 %184
>  %186 = load float addrspace(2)* %185, !tbaa !0
>  %187 = fmul float %186, %126
>  %188 = fadd float %187, %159
>  %189 = fmul float %70, %167
>  %190 = fmul float %71, %174
>  %191 = fadd float %189, %190
>  %192 = fmul float %72, %181
>  %193 = fadd float %191, %192
>  %194 = fmul float %73, %188
>  %195 = fadd float %193, %194
>  %196 = fptosi float %93 to i32
>  %197 = bitcast i32 %196 to float
>  %198 = bitcast float %197 to i32
>  %199 = add i32 %198, 2
>  %200 = bitcast i32 %199 to float
>  %201 = fptosi float %92 to i32
>  %202 = bitcast i32 %201 to float
>  %203 = bitcast float %202 to i32
>  %204 = add i32 %203, 2
>  %205 = bitcast i32 %204 to float
>  %206 = bitcast float %205 to i32
>  %207 = shl i32 %206, 4
>  %208 = add i32 %207, 864
>  %209 = udiv i32 %208, 4
>  %210 = getelementptr float addrspace(2)* %10, i32 %209
>  %211 = load float addrspace(2)* %210, !tbaa !0
>  %212 = fmul float %211, %95
>  %213 = shl i32 %206, 4
>  %214 = add i32 %213, 868
>  %215 = udiv i32 %214, 4
>  %216 = getelementptr float addrspace(2)* %10, i32 %215
>  %217 = load float addrspace(2)* %216, !tbaa !0
>  %218 = fmul float %217, %95
>  %219 = shl i32 %206, 4
>  %220 = add i32 %219, 872
>  %221 = udiv i32 %220, 4
>  %222 = getelementptr float addrspace(2)* %10, i32 %221
>  %223 = load float addrspace(2)* %222, !tbaa !0
>  %224 = fmul float %223, %95
>  %225 = shl i32 %206, 4
>  %226 = add i32 %225, 876
>  %227 = udiv i32 %226, 4
>  %228 = getelementptr float addrspace(2)* %10, i32 %227
>  %229 = load float addrspace(2)* %228, !tbaa !0
>  %230 = fmul float %229, %95
>  %231 = bitcast float %200 to i32
>  %232 = shl i32 %231, 4
>  %233 = add i32 %232, 864
>  %234 = udiv i32 %233, 4
>  %235 = getelementptr float addrspace(2)* %10, i32 %234
>  %236 = load float addrspace(2)* %235, !tbaa !0
>  %237 = fmul float %96, %236
>  %238 = fadd float %237, %212
>  %239 = shl i32 %231, 4
>  %240 = add i32 %239, 868
>  %241 = udiv i32 %240, 4
>  %242 = getelementptr float addrspace(2)* %10, i32 %241
>  %243 = load float addrspace(2)* %242, !tbaa !0
>  %244 = fmul float %96, %243
>  %245 = fadd float %244, %218
>  %246 = shl i32 %231, 4
>  %247 = add i32 %246, 872
>  %248 = udiv i32 %247, 4
>  %249 = getelementptr float addrspace(2)* %10, i32 %248
>  %250 = load float addrspace(2)* %249, !tbaa !0
>  %251 = fmul float %96, %250
>  %252 = fadd float %251, %224
>  %253 = shl i32 %231, 4
>  %254 = add i32 %253, 876
>  %255 = udiv i32 %254, 4
>  %256 = getelementptr float addrspace(2)* %10, i32 %255
>  %257 = load float addrspace(2)* %256, !tbaa !0
>  %258 = fmul float %96, %257
>  %259 = fadd float %258, %230
>  %260 = fptosi float %94 to i32
>  %261 = bitcast i32 %260 to float
>  %262 = bitcast float %261 to i32
>  %263 = add i32 %262, 1
>  %264 = bitcast i32 %263 to float
>  %265 = fptosi float %93 to i32
>  %266 = bitcast i32 %265 to float
>  %267 = bitcast float %266 to i32
>  %268 = add i32 %267, 1
>  %269 = bitcast i32 %268 to float
>  %270 = fptosi float %92 to i32
>  %271 = bitcast i32 %270 to float
>  %272 = bitcast float %271 to i32
>  %273 = add i32 %272, 1
>  %274 = bitcast i32 %273 to float
>  %275 = bitcast float %274 to i32
>  %276 = shl i32 %275, 4
>  %277 = add i32 %276, 864
>  %278 = udiv i32 %277, 4
>  %279 = getelementptr float addrspace(2)* %10, i32 %278
>  %280 = load float addrspace(2)* %279, !tbaa !0
>  %281 = fmul float %280, %95
>  %282 = shl i32 %275, 4
>  %283 = add i32 %282, 868
>  %284 = udiv i32 %283, 4
>  %285 = getelementptr float addrspace(2)* %10, i32 %284
>  %286 = load float addrspace(2)* %285, !tbaa !0
>  %287 = fmul float %286, %95
>  %288 = shl i32 %275, 4
>  %289 = add i32 %288, 872
>  %290 = udiv i32 %289, 4
>  %291 = getelementptr float addrspace(2)* %10, i32 %290
>  %292 = load float addrspace(2)* %291, !tbaa !0
>  %293 = fmul float %292, %95
>  %294 = shl i32 %275, 4
>  %295 = add i32 %294, 876
>  %296 = udiv i32 %295, 4
>  %297 = getelementptr float addrspace(2)* %10, i32 %296
>  %298 = load float addrspace(2)* %297, !tbaa !0
>  %299 = fmul float %298, %95
>  %300 = bitcast float %269 to i32
>  %301 = shl i32 %300, 4
>  %302 = add i32 %301, 864
>  %303 = udiv i32 %302, 4
>  %304 = getelementptr float addrspace(2)* %10, i32 %303
>  %305 = load float addrspace(2)* %304, !tbaa !0
>  %306 = fmul float %96, %305
>  %307 = fadd float %306, %281
>  %308 = shl i32 %300, 4
>  %309 = add i32 %308, 868
>  %310 = udiv i32 %309, 4
>  %311 = getelementptr float addrspace(2)* %10, i32 %310
>  %312 = load float addrspace(2)* %311, !tbaa !0
>  %313 = fmul float %96, %312
>  %314 = fadd float %313, %287
>  %315 = shl i32 %300, 4
>  %316 = add i32 %315, 872
>  %317 = udiv i32 %316, 4
>  %318 = getelementptr float addrspace(2)* %10, i32 %317
>  %319 = load float addrspace(2)* %318, !tbaa !0
>  %320 = fmul float %96, %319
>  %321 = fadd float %320, %293
>  %322 = shl i32 %300, 4
>  %323 = add i32 %322, 876
>  %324 = udiv i32 %323, 4
>  %325 = getelementptr float addrspace(2)* %10, i32 %324
>  %326 = load float addrspace(2)* %325, !tbaa !0
>  %327 = fmul float %96, %326
>  %328 = fadd float %327, %299
>  %329 = bitcast float %264 to i32
>  %330 = shl i32 %329, 4
>  %331 = add i32 %330, 864
>  %332 = udiv i32 %331, 4
>  %333 = getelementptr float addrspace(2)* %10, i32 %332
>  %334 = load float addrspace(2)* %333, !tbaa !0
>  %335 = fmul float %334, %126
>  %336 = fadd float %335, %307
>  %337 = shl i32 %329, 4
>  %338 = add i32 %337, 868
>  %339 = udiv i32 %338, 4
>  %340 = getelementptr float addrspace(2)* %10, i32 %339
>  %341 = load float addrspace(2)* %340, !tbaa !0
>  %342 = fmul float %341, %126
>  %343 = fadd float %342, %314
>  %344 = shl i32 %329, 4
>  %345 = add i32 %344, 872
>  %346 = udiv i32 %345, 4
>  %347 = getelementptr float addrspace(2)* %10, i32 %346
>  %348 = load float addrspace(2)* %347, !tbaa !0
>  %349 = fmul float %348, %126
>  %350 = fadd float %349, %321
>  %351 = shl i32 %329, 4
>  %352 = add i32 %351, 876
>  %353 = udiv i32 %352, 4
>  %354 = getelementptr float addrspace(2)* %10, i32 %353
>  %355 = load float addrspace(2)* %354, !tbaa !0
>  %356 = fmul float %355, %126
>  %357 = fadd float %356, %328
>  %358 = fmul float %70, %336
>  %359 = fmul float %71, %343
>  %360 = fadd float %358, %359
>  %361 = fmul float %72, %350
>  %362 = fadd float %360, %361
>  %363 = fmul float %73, %357
>  %364 = fadd float %362, %363
>  %365 = fptosi float %94 to i32
>  %366 = bitcast i32 %365 to float
>  %367 = bitcast float %366 to i32
>  %368 = add i32 %367, 2
>  %369 = bitcast i32 %368 to float
>  %370 = bitcast float %369 to i32
>  %371 = shl i32 %370, 4
>  %372 = add i32 %371, 864
>  %373 = udiv i32 %372, 4
>  %374 = getelementptr float addrspace(2)* %10, i32 %373
>  %375 = load float addrspace(2)* %374, !tbaa !0
>  %376 = fmul float %375, %126
>  %377 = fadd float %376, %238
>  %378 = shl i32 %370, 4
>  %379 = add i32 %378, 868
>  %380 = udiv i32 %379, 4
>  %381 = getelementptr float addrspace(2)* %10, i32 %380
>  %382 = load float addrspace(2)* %381, !tbaa !0
>  %383 = fmul float %382, %126
>  %384 = fadd float %383, %245
>  %385 = shl i32 %370, 4
>  %386 = add i32 %385, 872
>  %387 = udiv i32 %386, 4
>  %388 = getelementptr float addrspace(2)* %10, i32 %387
>  %389 = load float addrspace(2)* %388, !tbaa !0
>  %390 = fmul float %389, %126
>  %391 = fadd float %390, %252
>  %392 = shl i32 %370, 4
>  %393 = add i32 %392, 876
>  %394 = udiv i32 %393, 4
>  %395 = getelementptr float addrspace(2)* %10, i32 %394
>  %396 = load float addrspace(2)* %395, !tbaa !0
>  %397 = fmul float %396, %126
>  %398 = fadd float %397, %259
>  %399 = fmul float %70, %377
>  %400 = fmul float %71, %384
>  %401 = fadd float %399, %400
>  %402 = fmul float %72, %391
>  %403 = fadd float %401, %402
>  %404 = fmul float %73, %398
>  %405 = fadd float %403, %404
>  %406 = fmul float %195, %16
>  %407 = fmul float %364, %18
>  %408 = fadd float %406, %407
>  %409 = fmul float %405, %20
>  %410 = fadd float %408, %409
>  %411 = fmul float %12, %22
>  %412 = fadd float %410, %411
>  %413 = fmul float %195, %24
>  %414 = fmul float %364, %26
>  %415 = fadd float %413, %414
>  %416 = fmul float %405, %28
>  %417 = fadd float %415, %416
>  %418 = fmul float %12, %30
>  %419 = fadd float %417, %418
>  %420 = fmul float %195, %32
>  %421 = fmul float %364, %34
>  %422 = fadd float %420, %421
>  %423 = fmul float %405, %36
>  %424 = fadd float %422, %423
>  %425 = fmul float %12, %38
>  %426 = fadd float %424, %425
>  %427 = fmul float %195, %40
>  %428 = fmul float %364, %42
>  %429 = fadd float %427, %428
>  %430 = fmul float %405, %44
>  %431 = fadd float %429, %430
>  %432 = fmul float %12, %46
>  %433 = fadd float %431, %432
>  %434 = fmul float %89, %60
>  %435 = fmul float %89, %62
>  %436 = fmul float %88, %56
>  %437 = fadd float %436, %434
>  %438 = fmul float %88, %58
>  %439 = fadd float %438, %435
>  %440 = fsub float -0.000000e+00, %433
>  %441 = fmul float %426, %14
>  %442 = fadd float %441, %440
>  %443 = fsub float -0.000000e+00, %419
>  %444 = fmul float %64, %433
>  %445 = fadd float %444, %412
>  %446 = fmul float %66, %433
>  %447 = fadd float %446, %443
>  %448 = call float @llvm.AMDIL.clamp.(float %48, float 0.000000e+00, float 1.000000e+00)
>  %449 = call float @llvm.AMDIL.clamp.(float %50, float 0.000000e+00, float 1.000000e+00)
>  %450 = call float @llvm.AMDIL.clamp.(float %52, float 0.000000e+00, float 1.000000e+00)
>  %451 = call float @llvm.AMDIL.clamp.(float %54, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %448, float %449, float %450, float %451)
>  %452 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %453 = load float addrspace(2)* addrspace(2)* %452, !tbaa !0
>  %454 = getelementptr float addrspace(2)* %453, i32 0
>  %455 = load float addrspace(2)* %454, !tbaa !0
>  %456 = fmul float %455, %412
>  %457 = getelementptr float addrspace(2)* %453, i32 1
>  %458 = load float addrspace(2)* %457, !tbaa !0
>  %459 = fmul float %458, %419
>  %460 = fadd float %456, %459
>  %461 = getelementptr float addrspace(2)* %453, i32 2
>  %462 = load float addrspace(2)* %461, !tbaa !0
>  %463 = fmul float %462, %426
>  %464 = fadd float %460, %463
>  %465 = getelementptr float addrspace(2)* %453, i32 3
>  %466 = load float addrspace(2)* %465, !tbaa !0
>  %467 = fmul float %466, %433
>  %468 = fadd float %464, %467
>  %469 = getelementptr float addrspace(2)* %453, i32 4
>  %470 = load float addrspace(2)* %469, !tbaa !0
>  %471 = fmul float %470, %412
>  %472 = getelementptr float addrspace(2)* %453, i32 5
>  %473 = load float addrspace(2)* %472, !tbaa !0
>  %474 = fmul float %473, %419
>  %475 = fadd float %471, %474
>  %476 = getelementptr float addrspace(2)* %453, i32 6
>  %477 = load float addrspace(2)* %476, !tbaa !0
>  %478 = fmul float %477, %426
>  %479 = fadd float %475, %478
>  %480 = getelementptr float addrspace(2)* %453, i32 7
>  %481 = load float addrspace(2)* %480, !tbaa !0
>  %482 = fmul float %481, %433
>  %483 = fadd float %479, %482
>  %484 = getelementptr float addrspace(2)* %453, i32 8
>  %485 = load float addrspace(2)* %484, !tbaa !0
>  %486 = fmul float %485, %412
>  %487 = getelementptr float addrspace(2)* %453, i32 9
>  %488 = load float addrspace(2)* %487, !tbaa !0
>  %489 = fmul float %488, %419
>  %490 = fadd float %486, %489
>  %491 = getelementptr float addrspace(2)* %453, i32 10
>  %492 = load float addrspace(2)* %491, !tbaa !0
>  %493 = fmul float %492, %426
>  %494 = fadd float %490, %493
>  %495 = getelementptr float addrspace(2)* %453, i32 11
>  %496 = load float addrspace(2)* %495, !tbaa !0
>  %497 = fmul float %496, %433
>  %498 = fadd float %494, %497
>  %499 = getelementptr float addrspace(2)* %453, i32 12
>  %500 = load float addrspace(2)* %499, !tbaa !0
>  %501 = fmul float %500, %412
>  %502 = getelementptr float addrspace(2)* %453, i32 13
>  %503 = load float addrspace(2)* %502, !tbaa !0
>  %504 = fmul float %503, %419
>  %505 = fadd float %501, %504
>  %506 = getelementptr float addrspace(2)* %453, i32 14
>  %507 = load float addrspace(2)* %506, !tbaa !0
>  %508 = fmul float %507, %426
>  %509 = fadd float %505, %508
>  %510 = getelementptr float addrspace(2)* %453, i32 15
>  %511 = load float addrspace(2)* %510, !tbaa !0
>  %512 = fmul float %511, %433
>  %513 = fadd float %509, %512
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %468, float %483, float %498, float %513)
>  %514 = getelementptr float addrspace(2)* %453, i32 16
>  %515 = load float addrspace(2)* %514, !tbaa !0
>  %516 = fmul float %515, %412
>  %517 = getelementptr float addrspace(2)* %453, i32 17
>  %518 = load float addrspace(2)* %517, !tbaa !0
>  %519 = fmul float %518, %419
>  %520 = fadd float %516, %519
>  %521 = getelementptr float addrspace(2)* %453, i32 18
>  %522 = load float addrspace(2)* %521, !tbaa !0
>  %523 = fmul float %522, %426
>  %524 = fadd float %520, %523
>  %525 = getelementptr float addrspace(2)* %453, i32 19
>  %526 = load float addrspace(2)* %525, !tbaa !0
>  %527 = fmul float %526, %433
>  %528 = fadd float %524, %527
>  %529 = getelementptr float addrspace(2)* %453, i32 20
>  %530 = load float addrspace(2)* %529, !tbaa !0
>  %531 = fmul float %530, %412
>  %532 = getelementptr float addrspace(2)* %453, i32 21
>  %533 = load float addrspace(2)* %532, !tbaa !0
>  %534 = fmul float %533, %419
>  %535 = fadd float %531, %534
>  %536 = getelementptr float addrspace(2)* %453, i32 22
>  %537 = load float addrspace(2)* %536, !tbaa !0
>  %538 = fmul float %537, %426
>  %539 = fadd float %535, %538
>  %540 = getelementptr float addrspace(2)* %453, i32 23
>  %541 = load float addrspace(2)* %540, !tbaa !0
>  %542 = fmul float %541, %433
>  %543 = fadd float %539, %542
>  %544 = getelementptr float addrspace(2)* %453, i32 24
>  %545 = load float addrspace(2)* %544, !tbaa !0
>  %546 = fmul float %545, %412
>  %547 = getelementptr float addrspace(2)* %453, i32 25
>  %548 = load float addrspace(2)* %547, !tbaa !0
>  %549 = fmul float %548, %419
>  %550 = fadd float %546, %549
>  %551 = getelementptr float addrspace(2)* %453, i32 26
>  %552 = load float addrspace(2)* %551, !tbaa !0
>  %553 = fmul float %552, %426
>  %554 = fadd float %550, %553
>  %555 = getelementptr float addrspace(2)* %453, i32 27
>  %556 = load float addrspace(2)* %555, !tbaa !0
>  %557 = fmul float %556, %433
>  %558 = fadd float %554, %557
>  %559 = getelementptr float addrspace(2)* %453, i32 28
>  %560 = load float addrspace(2)* %559, !tbaa !0
>  %561 = fmul float %560, %412
>  %562 = getelementptr float addrspace(2)* %453, i32 29
>  %563 = load float addrspace(2)* %562, !tbaa !0
>  %564 = fmul float %563, %419
>  %565 = fadd float %561, %564
>  %566 = getelementptr float addrspace(2)* %453, i32 30
>  %567 = load float addrspace(2)* %566, !tbaa !0
>  %568 = fmul float %567, %426
>  %569 = fadd float %565, %568
>  %570 = getelementptr float addrspace(2)* %453, i32 31
>  %571 = load float addrspace(2)* %570, !tbaa !0
>  %572 = fmul float %571, %433
>  %573 = fadd float %569, %572
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %528, float %543, float %558, float %573)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %437, float %439, float %252, float %259)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %445, float %447, float %442, float %433)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
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>e0308000
>80021111
>bf8c0770
>10220b11
>4a2420ff
>00000364
>2c022482
>d2c20012
>02010501
>e0308000
>80021212
>bf8c0770
>d2820011
>04462503
>4a2418ff
>00000364
>2c022482
>d2c20012
>02010501
>e0308000
>80021212
>bf8c0770
>d2820011
>04460912
>10222307
>d2820011
>04461506
>4a141aff
>00000368
>2c021482
>d2c20012
>02010501
>e0308000
>80020a12
>bf8c0770
>10140b0a
>4a2420ff
>00000368
>2c022482
>d2c20012
>02010501
>e0308000
>80021212
>bf8c0770
>d282000a
>042a2503
>4a2418ff
>00000368
>2c022482
>d2c20012
>02010501
>e0308000
>80021212
>bf8c0770
>d2820012
>042a0912
>d2820011
>04462508
>4a1a1aff
>0000036c
>2c021a82
>d2c20012
>02010501
>e0308000
>80020d12
>bf8c0770
>100a0b0d
>4a1a20ff
>0000036c
>2c021a82
>d2c20012
>02010501
>e0308000
>80020d12
>bf8c0770
>d2820003
>04161b03
>4a0a18ff
>0000036c
>2c020a82
>d2c20001
>02010501
>e0308000
>80020101
>bf8c0770
>d2820001
>040e0901
>d2820005
>04460309
>c0028322
>bf8c007f
>d2820001
>043c0b05
>c0028323
>bf8c007f
>7e040205
>d2820001
>04060404
>c0028325
>bf8c007f
>10041c05
>c0028324
>bf8c007f
>d2820002
>04080b0b
>c0028326
>bf8c007f
>d2820002
>04080b05
>c0028327
>bf8c007f
>7e080205
>d2820002
>040a0804
>c0400102
>bf8c007f
>c002810d
>bf8c007f
>10080405
>c002810c
>bf8c007f
>d2820006
>04120205
>c0028329
>bf8c007f
>10081c05
>c0028328
>bf8c007f
>d2820004
>04100b0b
>c002832a
>bf8c007f
>d2820004
>04100b05
>c002832b
>bf8c007f
>7e0e0205
>d2820004
>04120e04
>c002810e
>bf8c007f
>d2820006
>041a0805
>c002832d
>bf8c007f
>100e1c05
>c002832c
>bf8c007f
>d2820007
>041c0b0b
>c002832e
>bf8c007f
>d2820005
>041c0b05
>c002832f
>bf8c007f
>7e0e0205
>d2820005
>04160e04
>c002010f
>bf8c007f
>d2820006
>041a0a04
>c0020109
>bf8c007f
>100e0404
>c0020108
>bf8c007f
>d2820007
>041e0204
>c002010a
>bf8c007f
>d2820007
>041e0804
>c002010b
>bf8c007f
>d2820007
>041e0a04
>c0020105
>bf8c007f
>10100404
>c0020104
>bf8c007f
>d2820008
>04220204
>c0020106
>bf8c007f
>d2820008
>04220804
>c0020107
>bf8c007f
>d2820008
>04220a04
>c0020101
>bf8c007f
>10120404
>c0020100
>bf8c007f
>d2820009
>04260204
>c0020102
>bf8c007f
>d2820009
>04260804
>c0020103
>bf8c007f
>d2820009
>04260a04
>f80000ef
>06070809
>c002011d
>bf8c000f
>100c0404
>c002011c
>bf8c007f
>d2820006
>041a0204
>c002011e
>bf8c007f
>d2820006
>041a0804
>c002011f
>bf8c007f
>d2820006
>041a0a04
>c0020119
>bf8c007f
>100e0404
>c0020118
>bf8c007f
>d2820007
>041e0204
>c002011a
>bf8c007f
>d2820007
>041e0804
>c002011b
>bf8c007f
>d2820007
>041e0a04
>c0020115
>bf8c007f
>10100404
>c0020114
>bf8c007f
>d2820008
>04220204
>c0020116
>bf8c007f
>d2820008
>04220804
>c0020117
>bf8c007f
>d2820008
>04220a04
>c0020111
>bf8c007f
>10120404
>c0020110
>bf8c007f
>d2820009
>04260204
>c0020112
>bf8c007f
>d2820009
>04260804
>c0000113
>bf8c007f
>d2820009
>04260a00
>f80000ff
>06070809
>c082070c
>bf8c000f
>e00c2000
>80010600
>c00003c5
>bf8c0070
>10000e00
>c00003c1
>bf8c007f
>d2820000
>04000106
>c00003c4
>bf8c007f
>10160e00
>c00003c0
>bf8c007f
>d2820006
>042c0106
>f800021f
>030a0006
>be8003ff
>00000d70
>c0000200
>bf8c000f
>d2820000
>04060a00
>c0000302
>bf8c007f
>10020800
>08020b01
>be8003ff
>00000d74
>c0000200
>bf8c007f
>10060a00
>08040503
>f80008cf
>05010200
>bf810000
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 3
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 4
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 5
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 6
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 7
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 8
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 9
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 10
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 11
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 12
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 13
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 14
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 15
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %44 = load <16 x i8> addrspace(2)* %43, !tbaa !0
>  %45 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %44, i32 0, i32 %5)
>  %46 = extractelement <4 x float> %45, i32 0
>  %47 = extractelement <4 x float> %45, i32 1
>  %48 = extractelement <4 x float> %45, i32 2
>  %49 = extractelement <4 x float> %45, i32 3
>  %50 = fmul float %46, %12
>  %51 = fmul float %46, %14
>  %52 = fmul float %46, %16
>  %53 = fmul float %46, %18
>  %54 = fmul float %47, %20
>  %55 = fadd float %54, %50
>  %56 = fmul float %47, %22
>  %57 = fadd float %56, %51
>  %58 = fmul float %47, %24
>  %59 = fadd float %58, %52
>  %60 = fmul float %47, %26
>  %61 = fadd float %60, %53
>  %62 = fmul float %48, %28
>  %63 = fadd float %62, %55
>  %64 = fmul float %48, %30
>  %65 = fadd float %64, %57
>  %66 = fmul float %48, %32
>  %67 = fadd float %66, %59
>  %68 = fmul float %48, %34
>  %69 = fadd float %68, %61
>  %70 = fmul float %49, %36
>  %71 = fadd float %70, %63
>  %72 = fmul float %49, %38
>  %73 = fadd float %72, %65
>  %74 = fmul float %49, %40
>  %75 = fadd float %74, %67
>  %76 = fmul float %49, %42
>  %77 = fadd float %76, %69
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %71, float %73, float %75, float %77)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0820700
>bf8c007f
>e00c2000
>80010000
>c0400100
>bf8c0070
>c0010103
>bf8c007f
>10080002
>c0010107
>bf8c007f
>d2820004
>04100501
>c001010b
>bf8c007f
>d2820004
>04100502
>c001010f
>bf8c007f
>d2820004
>04100503
>c0010102
>bf8c007f
>100a0002
>c0010106
>bf8c007f
>d2820005
>04140501
>c001010a
>bf8c007f
>d2820005
>04140502
>c001010e
>bf8c007f
>d2820005
>04140503
>c0010101
>bf8c007f
>100c0002
>c0010105
>bf8c007f
>d2820006
>04180501
>c0010109
>bf8c007f
>d2820006
>04180502
>c001010d
>bf8c007f
>d2820006
>04180503
>c0010100
>bf8c007f
>100e0002
>c0010104
>bf8c007f
>d2820007
>041c0501
>c0010108
>bf8c007f
>d2820007
>041c0502
>c000010c
>bf8c007f
>d2820000
>041c0103
>f80008cf
>04050600
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL IN[2], GENERIC[21], PERSPECTIVE
>DCL IN[3], GENERIC[22], PERSPECTIVE
>DCL IN[4], GENERIC[23], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL CONST[0..30]
>DCL TEMP[0..4], LOCAL
>DCL TEMP[5], ARRAY(1), LOCAL
>IMM[0] FLT32 {    1.0000,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[2].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MOV TEMP[1].xy, IN[0].xyyy
>  3: TEX TEMP[1], TEMP[1], SAMP[0], 2D
>  4: MOV TEMP[2].xy, IN[3].xyyy
>  5: TEX TEMP[2], TEMP[2], SAMP[0], 2D
>  6: MOV TEMP[3].xy, IN[1].xyyy
>  7: TEX TEMP[3], TEMP[3], SAMP[0], 2D
>  8: MUL TEMP[1].xyz, TEMP[1].wwww, TEMP[1].xyzz
>  9: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[0].wwww, -TEMP[1].xyzz
> 10: FRC TEMP[4].xy, IN[4].xyyy
> 11: MAD TEMP[0].xyz, TEMP[4].xxxx, TEMP[0].xyzz, TEMP[1].xyzz
> 12: MUL TEMP[3].xyz, TEMP[3].wwww, TEMP[3].xyzz
> 13: MAD TEMP[1].xyz, TEMP[2].xyzz, TEMP[2].wwww, -TEMP[3].xyzz
> 14: MAD TEMP[3].xyz, TEMP[4].xxxx, TEMP[1].xyzz, TEMP[3].xyzz
> 15: ADD TEMP[2].xyz, TEMP[3].xyzz, -TEMP[0].xyzz
> 16: MAD TEMP[1].xyz, TEMP[4].yyyy, TEMP[2].xyzz, TEMP[0].xyzz
> 17: MUL TEMP[1].xyz, TEMP[1].xyzz, CONST[0].xyzz
> 18: MUL TEMP[1].xyz, TEMP[1].xyzz, CONST[30].xxxx
> 19: MOV TEMP[1].w, IMM[0].xxxx
> 20: MOV TEMP[5], TEMP[1]
> 21: MOV OUT[0], TEMP[5]
> 22: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 0
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 1
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 2
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 120
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %31 = load <32 x i8> addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %33 = load <16 x i8> addrspace(2)* %32, !tbaa !0
>  %34 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %36 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %37 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %38 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %39 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %40 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %3, <2 x i32> %5)
>  %41 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %3, <2 x i32> %5)
>  %42 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %3, <2 x i32> %5)
>  %43 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %3, <2 x i32> %5)
>  %44 = bitcast float %38 to i32
>  %45 = bitcast float %39 to i32
>  %46 = insertelement <2 x i32> undef, i32 %44, i32 0
>  %47 = insertelement <2 x i32> %46, i32 %45, i32 1
>  %48 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %47, <32 x i8> %31, <16 x i8> %33, i32 2)
>  %49 = extractelement <4 x float> %48, i32 0
>  %50 = extractelement <4 x float> %48, i32 1
>  %51 = extractelement <4 x float> %48, i32 2
>  %52 = extractelement <4 x float> %48, i32 3
>  %53 = bitcast float %34 to i32
>  %54 = bitcast float %35 to i32
>  %55 = insertelement <2 x i32> undef, i32 %53, i32 0
>  %56 = insertelement <2 x i32> %55, i32 %54, i32 1
>  %57 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %56, <32 x i8> %31, <16 x i8> %33, i32 2)
>  %58 = extractelement <4 x float> %57, i32 0
>  %59 = extractelement <4 x float> %57, i32 1
>  %60 = extractelement <4 x float> %57, i32 2
>  %61 = extractelement <4 x float> %57, i32 3
>  %62 = bitcast float %40 to i32
>  %63 = bitcast float %41 to i32
>  %64 = insertelement <2 x i32> undef, i32 %62, i32 0
>  %65 = insertelement <2 x i32> %64, i32 %63, i32 1
>  %66 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %65, <32 x i8> %31, <16 x i8> %33, i32 2)
>  %67 = extractelement <4 x float> %66, i32 0
>  %68 = extractelement <4 x float> %66, i32 1
>  %69 = extractelement <4 x float> %66, i32 2
>  %70 = extractelement <4 x float> %66, i32 3
>  %71 = bitcast float %36 to i32
>  %72 = bitcast float %37 to i32
>  %73 = insertelement <2 x i32> undef, i32 %71, i32 0
>  %74 = insertelement <2 x i32> %73, i32 %72, i32 1
>  %75 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %74, <32 x i8> %31, <16 x i8> %33, i32 2)
>  %76 = extractelement <4 x float> %75, i32 0
>  %77 = extractelement <4 x float> %75, i32 1
>  %78 = extractelement <4 x float> %75, i32 2
>  %79 = extractelement <4 x float> %75, i32 3
>  %80 = fmul float %61, %58
>  %81 = fmul float %61, %59
>  %82 = fmul float %61, %60
>  %83 = fsub float -0.000000e+00, %80
>  %84 = fmul float %49, %52
>  %85 = fadd float %84, %83
>  %86 = fsub float -0.000000e+00, %81
>  %87 = fmul float %50, %52
>  %88 = fadd float %87, %86
>  %89 = fsub float -0.000000e+00, %82
>  %90 = fmul float %51, %52
>  %91 = fadd float %90, %89
>  %92 = call float @llvm.AMDIL.fraction.(float %42)
>  %93 = call float @llvm.AMDIL.fraction.(float %43)
>  %94 = fmul float %92, %85
>  %95 = fadd float %94, %80
>  %96 = fmul float %92, %88
>  %97 = fadd float %96, %81
>  %98 = fmul float %92, %91
>  %99 = fadd float %98, %82
>  %100 = fmul float %79, %76
>  %101 = fmul float %79, %77
>  %102 = fmul float %79, %78
>  %103 = fsub float -0.000000e+00, %100
>  %104 = fmul float %67, %70
>  %105 = fadd float %104, %103
>  %106 = fsub float -0.000000e+00, %101
>  %107 = fmul float %68, %70
>  %108 = fadd float %107, %106
>  %109 = fsub float -0.000000e+00, %102
>  %110 = fmul float %69, %70
>  %111 = fadd float %110, %109
>  %112 = fmul float %92, %105
>  %113 = fadd float %112, %100
>  %114 = fmul float %92, %108
>  %115 = fadd float %114, %101
>  %116 = fmul float %92, %111
>  %117 = fadd float %116, %102
>  %118 = fsub float -0.000000e+00, %95
>  %119 = fadd float %113, %118
>  %120 = fsub float -0.000000e+00, %97
>  %121 = fadd float %115, %120
>  %122 = fsub float -0.000000e+00, %99
>  %123 = fadd float %117, %122
>  %124 = fmul float %93, %119
>  %125 = fadd float %124, %95
>  %126 = fmul float %93, %121
>  %127 = fadd float %126, %97
>  %128 = fmul float %93, %123
>  %129 = fadd float %128, %99
>  %130 = fmul float %125, %23
>  %131 = fmul float %127, %25
>  %132 = fmul float %129, %27
>  %133 = fmul float %130, %29
>  %134 = fmul float %131, %29
>  %135 = fmul float %132, %29
>  %136 = call i32 @llvm.SI.packf16(float %133, float %134)
>  %137 = bitcast i32 %136 to float
>  %138 = call i32 @llvm.SI.packf16(float %135, float 1.000000e+00)
>  %139 = bitcast i32 %138 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %137, float %139, float %137, float %139)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.fraction.(float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430202
>bf8c0770
>10160705
>c81c0900
>c81d0901
>c8180800
>c8190801
>f0800f00
>00430606
>bf8c0770
>10141307
>0818170a
>c8281000
>c8291001
>7e14410a
>d2820013
>042e190a
>c8300500
>c8310501
>c82c0400
>c82d0401
>f0800f00
>00430b0b
>bf8c0770
>1028190e
>c8400d00
>c8410d01
>c83c0c00
>c83d0c01
>f0800f00
>00430f0f
>bf8c0770
>102a2510
>082a2915
>d2820014
>04522b0a
>08282714
>c8541100
>c8551101
>7e004115
>d2820001
>044e2900
>c0400100
>bf8c007f
>c0010101
>bf8c007f
>10020202
>c0010178
>bf8c007f
>10020202
>10260505
>10281306
>08282714
>d2820013
>044e290a
>1028170e
>102a250f
>082a2915
>d2820014
>04522b0a
>08282714
>d2820013
>044e2900
>c0018100
>bf8c007f
>10262603
>10262602
>5e020313
>10040905
>10061308
>08060503
>d2820002
>040a070a
>10061b0e
>10082511
>08080704
>d2820003
>040e090a
>08060503
>d2820000
>040a0700
>c0000102
>bf8c007f
>10000000
>10000002
>d25e0000
>0201e500
>f8001c0f
>00010001
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL OUT[3], GENERIC[20]
>DCL OUT[4], GENERIC[21]
>DCL OUT[5], GENERIC[22]
>DCL OUT[6], GENERIC[23]
>DCL CONST[0..51]
>DCL TEMP[0..9], LOCAL
>  0: DP4 TEMP[0].x, IN[0], CONST[4]
>  1: DP4 TEMP[1].x, IN[0], CONST[5]
>  2: MOV TEMP[0].y, TEMP[1].xxxx
>  3: DP4 TEMP[2].x, IN[0], CONST[6]
>  4: MOV TEMP[0].z, TEMP[2].xxxx
>  5: MAD TEMP[3].xyz, IN[1].xyxx, CONST[0].yyxx, CONST[0].xxyy
>  6: DP4 TEMP[4].x, IN[0], CONST[7]
>  7: MOV TEMP[0].w, TEMP[4].xxxx
>  8: DP3 TEMP[5].x, TEMP[3].xyzz, CONST[49].xyww
>  9: DP3 TEMP[6].x, TEMP[3].xyzz, CONST[50].xyww
> 10: ADD TEMP[7].x, TEMP[5].xxxx, -CONST[48].xxxx
> 11: MOV TEMP[3].y, TEMP[7].xxxx
> 12: ADD TEMP[3].x, TEMP[5].xxxx, CONST[48].xxxx
> 13: ADD TEMP[5].x, TEMP[6].xxxx, -CONST[48].yyyy
> 14: MOV TEMP[3].z, TEMP[5].xxxx
> 15: ADD TEMP[5].x, TEMP[6].xxxx, CONST[48].yyyy
> 16: MOV TEMP[3].w, TEMP[5].xxxx
> 17: MUL TEMP[5].xy, TEMP[3].yzzz, CONST[48].zwww
> 18: MOV TEMP[6].xy, TEMP[3].yzyy
> 19: MOV TEMP[7].xy, TEMP[3].ywyy
> 20: MOV TEMP[8].xy, TEMP[3].xwxx
> 21: MOV TEMP[3].xy, TEMP[3].xzxx
> 22: MOV TEMP[9], TEMP[0]
> 23: MAD TEMP[2].x, TEMP[2].xxxx, CONST[0].zzzz, -TEMP[4].xxxx
> 24: MOV TEMP[0].z, TEMP[2].xxxx
> 25: MOV TEMP[0].y, -TEMP[1].xxxx
> 26: MAD TEMP[0].xy, CONST[51].xyyy, TEMP[4].xxxx, TEMP[0].xyyy
> 27: MOV OUT[2], TEMP[6]
> 28: MOV OUT[3], TEMP[7]
> 29: MOV OUT[4], TEMP[3]
> 30: MOV OUT[5], TEMP[8]
> 31: MOV OUT[0], TEMP[0]
> 32: MOV OUT[6], TEMP[5]
> 33: MOV OUT[1], TEMP[9]
> 34: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 16
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 17
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 18
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 19
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 20
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 21
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 22
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 23
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 24
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 25
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 26
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 27
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 28
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 29
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 30
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 31
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 192
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 193
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 194
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 195
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 196
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 197
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 199
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 200
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 201
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 203
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 204
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 205
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %74 = load <16 x i8> addrspace(2)* %73, !tbaa !0
>  %75 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %74, i32 0, i32 %5)
>  %76 = extractelement <4 x float> %75, i32 0
>  %77 = extractelement <4 x float> %75, i32 1
>  %78 = extractelement <4 x float> %75, i32 2
>  %79 = extractelement <4 x float> %75, i32 3
>  %80 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %81 = load <16 x i8> addrspace(2)* %80, !tbaa !0
>  %82 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %81, i32 0, i32 %5)
>  %83 = extractelement <4 x float> %82, i32 0
>  %84 = extractelement <4 x float> %82, i32 1
>  %85 = fmul float %76, %18
>  %86 = fmul float %77, %20
>  %87 = fadd float %85, %86
>  %88 = fmul float %78, %22
>  %89 = fadd float %87, %88
>  %90 = fmul float %79, %24
>  %91 = fadd float %89, %90
>  %92 = fmul float %76, %26
>  %93 = fmul float %77, %28
>  %94 = fadd float %92, %93
>  %95 = fmul float %78, %30
>  %96 = fadd float %94, %95
>  %97 = fmul float %79, %32
>  %98 = fadd float %96, %97
>  %99 = fmul float %76, %34
>  %100 = fmul float %77, %36
>  %101 = fadd float %99, %100
>  %102 = fmul float %78, %38
>  %103 = fadd float %101, %102
>  %104 = fmul float %79, %40
>  %105 = fadd float %103, %104
>  %106 = fmul float %83, %14
>  %107 = fadd float %106, %12
>  %108 = fmul float %84, %14
>  %109 = fadd float %108, %12
>  %110 = fmul float %83, %12
>  %111 = fadd float %110, %14
>  %112 = fmul float %76, %42
>  %113 = fmul float %77, %44
>  %114 = fadd float %112, %113
>  %115 = fmul float %78, %46
>  %116 = fadd float %114, %115
>  %117 = fmul float %79, %48
>  %118 = fadd float %116, %117
>  %119 = fmul float %107, %58
>  %120 = fmul float %109, %60
>  %121 = fadd float %120, %119
>  %122 = fmul float %111, %62
>  %123 = fadd float %121, %122
>  %124 = fmul float %107, %64
>  %125 = fmul float %109, %66
>  %126 = fadd float %125, %124
>  %127 = fmul float %111, %68
>  %128 = fadd float %126, %127
>  %129 = fsub float -0.000000e+00, %50
>  %130 = fadd float %123, %129
>  %131 = fadd float %123, %50
>  %132 = fsub float -0.000000e+00, %52
>  %133 = fadd float %128, %132
>  %134 = fadd float %128, %52
>  %135 = fmul float %130, %54
>  %136 = fmul float %133, %56
>  %137 = fsub float -0.000000e+00, %118
>  %138 = fmul float %105, %16
>  %139 = fadd float %138, %137
>  %140 = fsub float -0.000000e+00, %98
>  %141 = fmul float %70, %118
>  %142 = fadd float %141, %91
>  %143 = fmul float %72, %118
>  %144 = fadd float %143, %140
>  %145 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %146 = load float addrspace(2)* addrspace(2)* %145, !tbaa !0
>  %147 = getelementptr float addrspace(2)* %146, i32 0
>  %148 = load float addrspace(2)* %147, !tbaa !0
>  %149 = fmul float %148, %91
>  %150 = getelementptr float addrspace(2)* %146, i32 1
>  %151 = load float addrspace(2)* %150, !tbaa !0
>  %152 = fmul float %151, %98
>  %153 = fadd float %149, %152
>  %154 = getelementptr float addrspace(2)* %146, i32 2
>  %155 = load float addrspace(2)* %154, !tbaa !0
>  %156 = fmul float %155, %105
>  %157 = fadd float %153, %156
>  %158 = getelementptr float addrspace(2)* %146, i32 3
>  %159 = load float addrspace(2)* %158, !tbaa !0
>  %160 = fmul float %159, %118
>  %161 = fadd float %157, %160
>  %162 = getelementptr float addrspace(2)* %146, i32 4
>  %163 = load float addrspace(2)* %162, !tbaa !0
>  %164 = fmul float %163, %91
>  %165 = getelementptr float addrspace(2)* %146, i32 5
>  %166 = load float addrspace(2)* %165, !tbaa !0
>  %167 = fmul float %166, %98
>  %168 = fadd float %164, %167
>  %169 = getelementptr float addrspace(2)* %146, i32 6
>  %170 = load float addrspace(2)* %169, !tbaa !0
>  %171 = fmul float %170, %105
>  %172 = fadd float %168, %171
>  %173 = getelementptr float addrspace(2)* %146, i32 7
>  %174 = load float addrspace(2)* %173, !tbaa !0
>  %175 = fmul float %174, %118
>  %176 = fadd float %172, %175
>  %177 = getelementptr float addrspace(2)* %146, i32 8
>  %178 = load float addrspace(2)* %177, !tbaa !0
>  %179 = fmul float %178, %91
>  %180 = getelementptr float addrspace(2)* %146, i32 9
>  %181 = load float addrspace(2)* %180, !tbaa !0
>  %182 = fmul float %181, %98
>  %183 = fadd float %179, %182
>  %184 = getelementptr float addrspace(2)* %146, i32 10
>  %185 = load float addrspace(2)* %184, !tbaa !0
>  %186 = fmul float %185, %105
>  %187 = fadd float %183, %186
>  %188 = getelementptr float addrspace(2)* %146, i32 11
>  %189 = load float addrspace(2)* %188, !tbaa !0
>  %190 = fmul float %189, %118
>  %191 = fadd float %187, %190
>  %192 = getelementptr float addrspace(2)* %146, i32 12
>  %193 = load float addrspace(2)* %192, !tbaa !0
>  %194 = fmul float %193, %91
>  %195 = getelementptr float addrspace(2)* %146, i32 13
>  %196 = load float addrspace(2)* %195, !tbaa !0
>  %197 = fmul float %196, %98
>  %198 = fadd float %194, %197
>  %199 = getelementptr float addrspace(2)* %146, i32 14
>  %200 = load float addrspace(2)* %199, !tbaa !0
>  %201 = fmul float %200, %105
>  %202 = fadd float %198, %201
>  %203 = getelementptr float addrspace(2)* %146, i32 15
>  %204 = load float addrspace(2)* %203, !tbaa !0
>  %205 = fmul float %204, %118
>  %206 = fadd float %202, %205
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %161, float %176, float %191, float %206)
>  %207 = getelementptr float addrspace(2)* %146, i32 16
>  %208 = load float addrspace(2)* %207, !tbaa !0
>  %209 = fmul float %208, %91
>  %210 = getelementptr float addrspace(2)* %146, i32 17
>  %211 = load float addrspace(2)* %210, !tbaa !0
>  %212 = fmul float %211, %98
>  %213 = fadd float %209, %212
>  %214 = getelementptr float addrspace(2)* %146, i32 18
>  %215 = load float addrspace(2)* %214, !tbaa !0
>  %216 = fmul float %215, %105
>  %217 = fadd float %213, %216
>  %218 = getelementptr float addrspace(2)* %146, i32 19
>  %219 = load float addrspace(2)* %218, !tbaa !0
>  %220 = fmul float %219, %118
>  %221 = fadd float %217, %220
>  %222 = getelementptr float addrspace(2)* %146, i32 20
>  %223 = load float addrspace(2)* %222, !tbaa !0
>  %224 = fmul float %223, %91
>  %225 = getelementptr float addrspace(2)* %146, i32 21
>  %226 = load float addrspace(2)* %225, !tbaa !0
>  %227 = fmul float %226, %98
>  %228 = fadd float %224, %227
>  %229 = getelementptr float addrspace(2)* %146, i32 22
>  %230 = load float addrspace(2)* %229, !tbaa !0
>  %231 = fmul float %230, %105
>  %232 = fadd float %228, %231
>  %233 = getelementptr float addrspace(2)* %146, i32 23
>  %234 = load float addrspace(2)* %233, !tbaa !0
>  %235 = fmul float %234, %118
>  %236 = fadd float %232, %235
>  %237 = getelementptr float addrspace(2)* %146, i32 24
>  %238 = load float addrspace(2)* %237, !tbaa !0
>  %239 = fmul float %238, %91
>  %240 = getelementptr float addrspace(2)* %146, i32 25
>  %241 = load float addrspace(2)* %240, !tbaa !0
>  %242 = fmul float %241, %98
>  %243 = fadd float %239, %242
>  %244 = getelementptr float addrspace(2)* %146, i32 26
>  %245 = load float addrspace(2)* %244, !tbaa !0
>  %246 = fmul float %245, %105
>  %247 = fadd float %243, %246
>  %248 = getelementptr float addrspace(2)* %146, i32 27
>  %249 = load float addrspace(2)* %248, !tbaa !0
>  %250 = fmul float %249, %118
>  %251 = fadd float %247, %250
>  %252 = getelementptr float addrspace(2)* %146, i32 28
>  %253 = load float addrspace(2)* %252, !tbaa !0
>  %254 = fmul float %253, %91
>  %255 = getelementptr float addrspace(2)* %146, i32 29
>  %256 = load float addrspace(2)* %255, !tbaa !0
>  %257 = fmul float %256, %98
>  %258 = fadd float %254, %257
>  %259 = getelementptr float addrspace(2)* %146, i32 30
>  %260 = load float addrspace(2)* %259, !tbaa !0
>  %261 = fmul float %260, %105
>  %262 = fadd float %258, %261
>  %263 = getelementptr float addrspace(2)* %146, i32 31
>  %264 = load float addrspace(2)* %263, !tbaa !0
>  %265 = fmul float %264, %118
>  %266 = fadd float %262, %265
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %221, float %236, float %251, float %266)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %130, float %133, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %130, float %134, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %131, float %133, float %133, float %134)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %131, float %134, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %135, float %136, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %142, float %144, float %139, float %118)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840700
>bf8c007f
>e00c2000
>80020400
>c0410100
>bf8c0070
>c0020311
>bf8c007f
>10020a04
>c0020310
>bf8c007f
>d2820001
>04040904
>c0020312
>bf8c007f
>d2820001
>04040906
>c0020313
>bf8c007f
>d2820001
>04040907
>c0020315
>bf8c007f
>10040a04
>c0020314
>bf8c007f
>d2820002
>04080904
>c0020316
>bf8c007f
>d2820002
>04080906
>c0020317
>bf8c007f
>d2820002
>04080907
>c0400102
>bf8c007f
>c002010d
>bf8c007f
>10060404
>c002010c
>bf8c007f
>d2820008
>040e0204
>c0020319
>bf8c007f
>10060a04
>c0020318
>bf8c007f
>d2820003
>040c0904
>c002031a
>bf8c007f
>d2820003
>040c0906
>c002031b
>bf8c007f
>d2820003
>040c0907
>c002010e
>bf8c007f
>d2820008
>04220604
>c002031d
>bf8c007f
>10120a04
>c002031c
>bf8c007f
>d2820009
>04240904
>c002031e
>bf8c007f
>d2820009
>04240906
>c002031f
>bf8c007f
>d2820004
>04240907
>c002010f
>bf8c007f
>d2820005
>04220804
>c0020109
>bf8c007f
>100c0404
>c0020108
>bf8c007f
>d2820006
>041a0204
>c002010a
>bf8c007f
>d2820006
>041a0604
>c002010b
>bf8c007f
>d2820006
>041a0804
>c0020105
>bf8c007f
>100e0404
>c0020104
>bf8c007f
>d2820007
>041e0204
>c0020106
>bf8c007f
>d2820007
>041e0604
>c0020107
>bf8c007f
>d2820007
>041e0804
>c0020101
>bf8c007f
>10100404
>c0020100
>bf8c007f
>d2820008
>04220204
>c0020102
>bf8c007f
>d2820008
>04220604
>c0020103
>bf8c007f
>d2820008
>04220804
>f80000ef
>05060708
>c002011d
>bf8c000f
>100a0404
>c002011c
>bf8c007f
>d2820005
>04160204
>c002011e
>bf8c007f
>d2820005
>04160604
>c002011f
>bf8c007f
>d2820005
>04160804
>c0020119
>bf8c007f
>100c0404
>c0020118
>bf8c007f
>d2820006
>041a0204
>c002011a
>bf8c007f
>d2820006
>041a0604
>c002011b
>bf8c007f
>d2820006
>041a0804
>c0020115
>bf8c007f
>100e0404
>c0020114
>bf8c007f
>d2820007
>041e0204
>c0020116
>bf8c007f
>d2820007
>041e0604
>c0020117
>bf8c007f
>d2820007
>041e0804
>c0020111
>bf8c007f
>10100404
>c0020110
>bf8c007f
>d2820008
>04220204
>c0020112
>bf8c007f
>d2820008
>04220604
>c0000113
>bf8c007f
>d2820008
>04220800
>f80000ff
>05060708
>c0820704
>bf8c000f
>e00c2000
>80010600
>c0000301
>c0008300
>bf8c0070
>7e000201
>d2820005
>04000107
>d282000a
>04000106
>c00203c8
>bf8c007f
>10001404
>c00203c9
>bf8c007f
>d2820000
>04000905
>7e160200
>d2820007
>042c0306
>c00003cb
>bf8c007f
>d2820006
>04000107
>c00003c1
>bf8c007f
>0a000c00
>c00083c4
>bf8c007f
>10101401
>c00083c5
>bf8c007f
>d2820005
>04200305
>c00083c7
>bf8c007f
>d2820008
>04140307
>c00083c0
>bf8c007f
>0a0a1001
>7e0e0280
>f800020f
>07070005
>060c0c00
>f800021f
>07070605
>06101001
>f800022f
>06000008
>f800023f
>07070608
>c00003c3
>bf8c000f
>10000000
>c00003c2
>bf8c007f
>100a0a00
>f800024f
>07070005
>c00003cc
>bf8c000f
>d2820000
>04060800
>c0000302
>bf8c007f
>10020600
>08020901
>c00003cd
>bf8c007f
>10060800
>08040503
>f80008cf
>04010200
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], GENERIC[19], PERSPECTIVE
>DCL IN[2], GENERIC[20], PERSPECTIVE
>DCL IN[3], GENERIC[21], PERSPECTIVE
>DCL IN[4], GENERIC[22], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL CONST[0..30]
>DCL TEMP[0..3], LOCAL
>DCL TEMP[4], ARRAY(1), LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[2].xyyy
>  1: TEX TEMP[0].xyz, TEMP[0], SAMP[2], 2D
>  2: MOV TEMP[1].xy, IN[1].xyyy
>  3: TEX TEMP[1], TEMP[1], SAMP[0], 2D
>  4: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[8].xyzz
>  5: MAD TEMP[0].xyz, IMM[0].xxxx, TEMP[0].xyzz, IMM[0].yyyy
>  6: MAD TEMP[0].xyz, CONST[8].wwww, TEMP[0].xyzz, IMM[0].zzzz
>  7: MUL TEMP[0].xyz, TEMP[1].xyzz, TEMP[0].xyzz
>  8: MUL TEMP[0].xyz, TEMP[0].xyzz, IN[0].xyzz
>  9: MAD TEMP[2].x, IN[3].wwww, CONST[11].wwww, -CONST[11].xxxx
> 10: MOV TEMP[3].xy, IN[4].xyyy
> 11: TEX TEMP[3].xyz, TEMP[3], SAMP[1], 2D
> 12: MUL TEMP[3].xyz, TEMP[3].xyzz, CONST[12].xyzz
> 13: MIN TEMP[2].x, TEMP[2].xxxx, CONST[11].zzzz
> 14: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 15: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[3].xyzz
> 16: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
> 17: MAD TEMP[3].xyz, TEMP[0].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 18: MUL TEMP[3].xyz, TEMP[2].xxxx, TEMP[3].xyzz
> 19: MUL TEMP[2].x, IN[0].wwww, CONST[12].wwww
> 20: MAD TEMP[0].xyz, TEMP[0].xyzz, CONST[30].xxxx, TEMP[3].xyzz
> 21: MUL TEMP[1].x, TEMP[1].wwww, TEMP[2].xxxx
> 22: MOV TEMP[0].w, TEMP[1].xxxx
> 23: MOV TEMP[4], TEMP[0]
> 24: MOV OUT[0], TEMP[4]
> 25: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 32
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 33
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 34
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 35
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 44
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 46
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 47
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 48
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 49
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 50
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 51
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr float addrspace(2)* %21, i32 116
>  %45 = load float addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr float addrspace(2)* %21, i32 117
>  %47 = load float addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr float addrspace(2)* %21, i32 118
>  %49 = load float addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr float addrspace(2)* %21, i32 120
>  %51 = load float addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %53 = load <32 x i8> addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %55 = load <16 x i8> addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %57 = load <32 x i8> addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %59 = load <16 x i8> addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr <32 x i8> addrspace(2)* %2, i32 2
>  %61 = load <32 x i8> addrspace(2)* %60, !tbaa !0
>  %62 = getelementptr <16 x i8> addrspace(2)* %1, i32 2
>  %63 = load <16 x i8> addrspace(2)* %62, !tbaa !0
>  %64 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %65 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %66 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %67 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %3, <2 x i32> %5)
>  %68 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %69 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %70 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %71 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %72 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %3, <2 x i32> %5)
>  %73 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %3, <2 x i32> %6)
>  %74 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %3, <2 x i32> %6)
>  %75 = bitcast float %70 to i32
>  %76 = bitcast float %71 to i32
>  %77 = insertelement <2 x i32> undef, i32 %75, i32 0
>  %78 = insertelement <2 x i32> %77, i32 %76, i32 1
>  %79 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %78, <32 x i8> %61, <16 x i8> %63, i32 2)
>  %80 = extractelement <4 x float> %79, i32 0
>  %81 = extractelement <4 x float> %79, i32 1
>  %82 = extractelement <4 x float> %79, i32 2
>  %83 = bitcast float %68 to i32
>  %84 = bitcast float %69 to i32
>  %85 = insertelement <2 x i32> undef, i32 %83, i32 0
>  %86 = insertelement <2 x i32> %85, i32 %84, i32 1
>  %87 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %86, <32 x i8> %53, <16 x i8> %55, i32 2)
>  %88 = extractelement <4 x float> %87, i32 0
>  %89 = extractelement <4 x float> %87, i32 1
>  %90 = extractelement <4 x float> %87, i32 2
>  %91 = extractelement <4 x float> %87, i32 3
>  %92 = fmul float %80, %23
>  %93 = fmul float %81, %25
>  %94 = fmul float %82, %27
>  %95 = fmul float 2.000000e+00, %92
>  %96 = fadd float %95, -1.000000e+00
>  %97 = fmul float 2.000000e+00, %93
>  %98 = fadd float %97, -1.000000e+00
>  %99 = fmul float 2.000000e+00, %94
>  %100 = fadd float %99, -1.000000e+00
>  %101 = fmul float %29, %96
>  %102 = fadd float %101, 1.000000e+00
>  %103 = fmul float %29, %98
>  %104 = fadd float %103, 1.000000e+00
>  %105 = fmul float %29, %100
>  %106 = fadd float %105, 1.000000e+00
>  %107 = fmul float %88, %102
>  %108 = fmul float %89, %104
>  %109 = fmul float %90, %106
>  %110 = fmul float %107, %64
>  %111 = fmul float %108, %65
>  %112 = fmul float %109, %66
>  %113 = fsub float -0.000000e+00, %31
>  %114 = fmul float %72, %35
>  %115 = fadd float %114, %113
>  %116 = bitcast float %73 to i32
>  %117 = bitcast float %74 to i32
>  %118 = insertelement <2 x i32> undef, i32 %116, i32 0
>  %119 = insertelement <2 x i32> %118, i32 %117, i32 1
>  %120 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %119, <32 x i8> %57, <16 x i8> %59, i32 2)
>  %121 = extractelement <4 x float> %120, i32 0
>  %122 = extractelement <4 x float> %120, i32 1
>  %123 = extractelement <4 x float> %120, i32 2
>  %124 = fmul float %121, %37
>  %125 = fmul float %122, %39
>  %126 = fmul float %123, %41
>  %127 = fcmp uge float %115, %33
>  %128 = select i1 %127, float %33, float %115
>  %129 = call float @llvm.AMDIL.clamp.(float %128, float 0.000000e+00, float 1.000000e+00)
>  %130 = fmul float %110, %124
>  %131 = fmul float %111, %125
>  %132 = fmul float %112, %126
>  %133 = fmul float %129, %129
>  %134 = fsub float -0.000000e+00, %51
>  %135 = fmul float %130, %134
>  %136 = fadd float %135, %45
>  %137 = fsub float -0.000000e+00, %51
>  %138 = fmul float %131, %137
>  %139 = fadd float %138, %47
>  %140 = fsub float -0.000000e+00, %51
>  %141 = fmul float %132, %140
>  %142 = fadd float %141, %49
>  %143 = fmul float %133, %136
>  %144 = fmul float %133, %139
>  %145 = fmul float %133, %142
>  %146 = fmul float %67, %43
>  %147 = fmul float %130, %51
>  %148 = fadd float %147, %143
>  %149 = fmul float %131, %51
>  %150 = fadd float %149, %144
>  %151 = fmul float %132, %51
>  %152 = fadd float %151, %145
>  %153 = fmul float %91, %146
>  %154 = call i32 @llvm.SI.packf16(float %148, float %150)
>  %155 = bitcast i32 %154 to float
>  %156 = call i32 @llvm.SI.packf16(float %152, float %153)
>  %157 = bitcast i32 %156 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %155, float %157, float %155, float %157)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8140900
>c8150901
>c8100800
>c8110801
>c0840308
>c0c60510
>bf8c007f
>f0800700
>00430804
>c0400100
>bf8c0070
>c0038121
>bf8c007f
>10081207
>d2820004
>04100f09
>060808f3
>c0038123
>bf8c007f
>d282000b
>03ca0807
>c8140500
>c8150501
>c8100400
>c8110401
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430404
>bf8c0770
>10161705
>c8300100
>c8310101
>101c190b
>c8301102
>c8311103
>c82c1002
>c82d1003
>c0840304
>c0c60508
>bf8c007f
>f0800700
>00430b0b
>c0010131
>bf8c0070
>10041802
>1006050e
>c0010178
>bf8c007f
>10040602
>c0018175
>bf8c007f
>081c0403
>c8080f00
>c8090f01
>c001812f
>bf8c007f
>10040403
>c001812c
>bf8c007f
>0a040403
>c001812e
>bf8c007f
>d00c0004
>02000702
>7e1e0203
>d2000002
>00121f02
>d2060802
>02010102
>10040502
>101c1d02
>d2820003
>04380503
>c0018120
>bf8c007f
>101c1003
>d282000e
>04380708
>061c1cf3
>d282000e
>03ca1c07
>101c1d04
>c83c0000
>c83d0001
>101c1f0e
>c0018130
>bf8c007f
>101e1603
>101c1f0e
>101e1c02
>c0018174
>bf8c007f
>081e1e03
>101e1f02
>d282000e
>043c050e
>5e06070e
>c0018122
>bf8c007f
>101c1403
>d2820008
>0438070a
>061010f3
>d2820008
>03ca1007
>10101106
>c8240200
>c8250201
>10101308
>c0018132
>bf8c007f
>10121a03
>10101308
>10121002
>c0018176
>bf8c007f
>08121203
>10041302
>d2820002
>04080508
>c8200300
>c8210301
>c0000133
>bf8c007f
>10001000
>10000107
>5e000102
>f8001c0f
>00030003
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], CLIPVERTEX
>DCL OUT[3], GENERIC[19]
>DCL OUT[4], GENERIC[20]
>DCL OUT[5], GENERIC[21]
>DCL OUT[6], GENERIC[22]
>DCL CONST[0..55]
>DCL TEMP[0..9], LOCAL
>  0: MAD TEMP[0], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  1: DP4 TEMP[1].x, TEMP[0], CONST[52]
>  2: DP4 TEMP[2].x, TEMP[0], CONST[53]
>  3: MOV TEMP[1].y, TEMP[2].xxxx
>  4: DP4 TEMP[2].x, TEMP[0], CONST[54]
>  5: MOV TEMP[1].z, TEMP[2].xxxx
>  6: DP4 TEMP[2].x, TEMP[0], CONST[4]
>  7: DP4 TEMP[3].x, TEMP[0], CONST[5]
>  8: MOV TEMP[2].y, TEMP[3].xxxx
>  9: DP4 TEMP[4].x, TEMP[0], CONST[6]
> 10: MOV TEMP[2].z, TEMP[4].xxxx
> 11: DP4 TEMP[5].x, TEMP[0], CONST[7]
> 12: MOV TEMP[2].w, TEMP[5].xxxx
> 13: DP4 TEMP[6].x, TEMP[0], CONST[12]
> 14: MUL TEMP[0].xy, IN[1].xyyy, CONST[48].xyyy
> 15: ADD TEMP[7].x, TEMP[0].yyyy, TEMP[0].xxxx
> 16: MUL TEMP[0].xy, IN[1].xyyy, CONST[49].xyyy
> 17: ADD TEMP[7].x, TEMP[7].xxxx, CONST[48].wwww
> 18: ADD TEMP[8].x, TEMP[0].yyyy, TEMP[0].xxxx
> 19: ADD TEMP[8].x, TEMP[8].xxxx, CONST[49].wwww
> 20: MOV TEMP[7].y, TEMP[8].xxxx
> 21: MUL TEMP[0].xy, IN[1].xyyy, CONST[50].xyyy
> 22: ADD TEMP[8].x, TEMP[0].yyyy, TEMP[0].xxxx
> 23: MUL TEMP[0].xy, IN[1].xyyy, CONST[51].xyyy
> 24: ADD TEMP[8].x, TEMP[8].xxxx, CONST[50].wwww
> 25: ADD TEMP[0].x, TEMP[0].yyyy, TEMP[0].xxxx
> 26: ADD TEMP[0].x, TEMP[0].xxxx, CONST[51].wwww
> 27: MOV TEMP[8].y, TEMP[0].xxxx
> 28: MOV TEMP[1].w, TEMP[6].xxxx
> 29: MOV TEMP[8].zw, CONST[0].xxxx
> 30: MUL TEMP[0], IN[2].xyxx, CONST[0].yyxx
> 31: MAD TEMP[6], CONST[47].wwww, CONST[0].xxxy, CONST[0].yyyx
> 32: MOV TEMP[9], TEMP[2]
> 33: MAD TEMP[4].x, TEMP[4].xxxx, CONST[0].zzzz, -TEMP[5].xxxx
> 34: MOV TEMP[2].z, TEMP[4].xxxx
> 35: MOV TEMP[2].y, -TEMP[3].xxxx
> 36: MAD TEMP[2].xy, CONST[55].xyyy, TEMP[5].xxxx, TEMP[2].xyyy
> 37: MOV OUT[3], TEMP[7]
> 38: MOV OUT[4], TEMP[8]
> 39: MOV OUT[6], TEMP[0]
> 40: MOV OUT[0], TEMP[2]
> 41: MOV OUT[5], TEMP[1]
> 42: MOV OUT[2], TEMP[9]
> 43: MOV_SAT OUT[1], TEMP[6]
> 44: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 16
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 17
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 18
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 19
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 20
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 21
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 22
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 23
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 24
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 25
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 26
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 27
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 28
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 29
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 30
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 31
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 48
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 49
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 50
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 51
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 191
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 192
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 193
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 195
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 196
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 197
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 199
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 200
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 201
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 203
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 204
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 205
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 207
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 208
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 209
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 210
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 211
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 212
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 213
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr float addrspace(2)* %10, i32 214
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = getelementptr float addrspace(2)* %10, i32 215
>  %98 = load float addrspace(2)* %97, !tbaa !0
>  %99 = getelementptr float addrspace(2)* %10, i32 216
>  %100 = load float addrspace(2)* %99, !tbaa !0
>  %101 = getelementptr float addrspace(2)* %10, i32 217
>  %102 = load float addrspace(2)* %101, !tbaa !0
>  %103 = getelementptr float addrspace(2)* %10, i32 218
>  %104 = load float addrspace(2)* %103, !tbaa !0
>  %105 = getelementptr float addrspace(2)* %10, i32 219
>  %106 = load float addrspace(2)* %105, !tbaa !0
>  %107 = getelementptr float addrspace(2)* %10, i32 220
>  %108 = load float addrspace(2)* %107, !tbaa !0
>  %109 = getelementptr float addrspace(2)* %10, i32 221
>  %110 = load float addrspace(2)* %109, !tbaa !0
>  %111 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %112 = load <16 x i8> addrspace(2)* %111, !tbaa !0
>  %113 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %112, i32 0, i32 %5)
>  %114 = extractelement <4 x float> %113, i32 0
>  %115 = extractelement <4 x float> %113, i32 1
>  %116 = extractelement <4 x float> %113, i32 2
>  %117 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %118 = load <16 x i8> addrspace(2)* %117, !tbaa !0
>  %119 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %118, i32 0, i32 %5)
>  %120 = extractelement <4 x float> %119, i32 0
>  %121 = extractelement <4 x float> %119, i32 1
>  %122 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %123 = load <16 x i8> addrspace(2)* %122, !tbaa !0
>  %124 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %123, i32 0, i32 %5)
>  %125 = extractelement <4 x float> %124, i32 0
>  %126 = extractelement <4 x float> %124, i32 1
>  %127 = fmul float %114, %14
>  %128 = fadd float %127, %12
>  %129 = fmul float %115, %14
>  %130 = fadd float %129, %12
>  %131 = fmul float %116, %14
>  %132 = fadd float %131, %12
>  %133 = fmul float %114, %12
>  %134 = fadd float %133, %14
>  %135 = fmul float %128, %84
>  %136 = fmul float %130, %86
>  %137 = fadd float %135, %136
>  %138 = fmul float %132, %88
>  %139 = fadd float %137, %138
>  %140 = fmul float %134, %90
>  %141 = fadd float %139, %140
>  %142 = fmul float %128, %92
>  %143 = fmul float %130, %94
>  %144 = fadd float %142, %143
>  %145 = fmul float %132, %96
>  %146 = fadd float %144, %145
>  %147 = fmul float %134, %98
>  %148 = fadd float %146, %147
>  %149 = fmul float %128, %100
>  %150 = fmul float %130, %102
>  %151 = fadd float %149, %150
>  %152 = fmul float %132, %104
>  %153 = fadd float %151, %152
>  %154 = fmul float %134, %106
>  %155 = fadd float %153, %154
>  %156 = fmul float %128, %18
>  %157 = fmul float %130, %20
>  %158 = fadd float %156, %157
>  %159 = fmul float %132, %22
>  %160 = fadd float %158, %159
>  %161 = fmul float %134, %24
>  %162 = fadd float %160, %161
>  %163 = fmul float %128, %26
>  %164 = fmul float %130, %28
>  %165 = fadd float %163, %164
>  %166 = fmul float %132, %30
>  %167 = fadd float %165, %166
>  %168 = fmul float %134, %32
>  %169 = fadd float %167, %168
>  %170 = fmul float %128, %34
>  %171 = fmul float %130, %36
>  %172 = fadd float %170, %171
>  %173 = fmul float %132, %38
>  %174 = fadd float %172, %173
>  %175 = fmul float %134, %40
>  %176 = fadd float %174, %175
>  %177 = fmul float %128, %42
>  %178 = fmul float %130, %44
>  %179 = fadd float %177, %178
>  %180 = fmul float %132, %46
>  %181 = fadd float %179, %180
>  %182 = fmul float %134, %48
>  %183 = fadd float %181, %182
>  %184 = fmul float %128, %50
>  %185 = fmul float %130, %52
>  %186 = fadd float %184, %185
>  %187 = fmul float %132, %54
>  %188 = fadd float %186, %187
>  %189 = fmul float %134, %56
>  %190 = fadd float %188, %189
>  %191 = fmul float %120, %60
>  %192 = fmul float %121, %62
>  %193 = fadd float %192, %191
>  %194 = fmul float %120, %66
>  %195 = fmul float %121, %68
>  %196 = fadd float %193, %64
>  %197 = fadd float %195, %194
>  %198 = fadd float %197, %70
>  %199 = fmul float %120, %72
>  %200 = fmul float %121, %74
>  %201 = fadd float %200, %199
>  %202 = fmul float %120, %78
>  %203 = fmul float %121, %80
>  %204 = fadd float %201, %76
>  %205 = fadd float %203, %202
>  %206 = fadd float %205, %82
>  %207 = fmul float %125, %14
>  %208 = fmul float %126, %14
>  %209 = fmul float %125, %12
>  %210 = fmul float %125, %12
>  %211 = fmul float %58, %12
>  %212 = fadd float %211, %14
>  %213 = fmul float %58, %12
>  %214 = fadd float %213, %14
>  %215 = fmul float %58, %12
>  %216 = fadd float %215, %14
>  %217 = fmul float %58, %14
>  %218 = fadd float %217, %12
>  %219 = fsub float -0.000000e+00, %183
>  %220 = fmul float %176, %16
>  %221 = fadd float %220, %219
>  %222 = fsub float -0.000000e+00, %169
>  %223 = fmul float %108, %183
>  %224 = fadd float %223, %162
>  %225 = fmul float %110, %183
>  %226 = fadd float %225, %222
>  %227 = call float @llvm.AMDIL.clamp.(float %212, float 0.000000e+00, float 1.000000e+00)
>  %228 = call float @llvm.AMDIL.clamp.(float %214, float 0.000000e+00, float 1.000000e+00)
>  %229 = call float @llvm.AMDIL.clamp.(float %216, float 0.000000e+00, float 1.000000e+00)
>  %230 = call float @llvm.AMDIL.clamp.(float %218, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %227, float %228, float %229, float %230)
>  %231 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %232 = load float addrspace(2)* addrspace(2)* %231, !tbaa !0
>  %233 = getelementptr float addrspace(2)* %232, i32 0
>  %234 = load float addrspace(2)* %233, !tbaa !0
>  %235 = fmul float %234, %162
>  %236 = getelementptr float addrspace(2)* %232, i32 1
>  %237 = load float addrspace(2)* %236, !tbaa !0
>  %238 = fmul float %237, %169
>  %239 = fadd float %235, %238
>  %240 = getelementptr float addrspace(2)* %232, i32 2
>  %241 = load float addrspace(2)* %240, !tbaa !0
>  %242 = fmul float %241, %176
>  %243 = fadd float %239, %242
>  %244 = getelementptr float addrspace(2)* %232, i32 3
>  %245 = load float addrspace(2)* %244, !tbaa !0
>  %246 = fmul float %245, %183
>  %247 = fadd float %243, %246
>  %248 = getelementptr float addrspace(2)* %232, i32 4
>  %249 = load float addrspace(2)* %248, !tbaa !0
>  %250 = fmul float %249, %162
>  %251 = getelementptr float addrspace(2)* %232, i32 5
>  %252 = load float addrspace(2)* %251, !tbaa !0
>  %253 = fmul float %252, %169
>  %254 = fadd float %250, %253
>  %255 = getelementptr float addrspace(2)* %232, i32 6
>  %256 = load float addrspace(2)* %255, !tbaa !0
>  %257 = fmul float %256, %176
>  %258 = fadd float %254, %257
>  %259 = getelementptr float addrspace(2)* %232, i32 7
>  %260 = load float addrspace(2)* %259, !tbaa !0
>  %261 = fmul float %260, %183
>  %262 = fadd float %258, %261
>  %263 = getelementptr float addrspace(2)* %232, i32 8
>  %264 = load float addrspace(2)* %263, !tbaa !0
>  %265 = fmul float %264, %162
>  %266 = getelementptr float addrspace(2)* %232, i32 9
>  %267 = load float addrspace(2)* %266, !tbaa !0
>  %268 = fmul float %267, %169
>  %269 = fadd float %265, %268
>  %270 = getelementptr float addrspace(2)* %232, i32 10
>  %271 = load float addrspace(2)* %270, !tbaa !0
>  %272 = fmul float %271, %176
>  %273 = fadd float %269, %272
>  %274 = getelementptr float addrspace(2)* %232, i32 11
>  %275 = load float addrspace(2)* %274, !tbaa !0
>  %276 = fmul float %275, %183
>  %277 = fadd float %273, %276
>  %278 = getelementptr float addrspace(2)* %232, i32 12
>  %279 = load float addrspace(2)* %278, !tbaa !0
>  %280 = fmul float %279, %162
>  %281 = getelementptr float addrspace(2)* %232, i32 13
>  %282 = load float addrspace(2)* %281, !tbaa !0
>  %283 = fmul float %282, %169
>  %284 = fadd float %280, %283
>  %285 = getelementptr float addrspace(2)* %232, i32 14
>  %286 = load float addrspace(2)* %285, !tbaa !0
>  %287 = fmul float %286, %176
>  %288 = fadd float %284, %287
>  %289 = getelementptr float addrspace(2)* %232, i32 15
>  %290 = load float addrspace(2)* %289, !tbaa !0
>  %291 = fmul float %290, %183
>  %292 = fadd float %288, %291
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %247, float %262, float %277, float %292)
>  %293 = getelementptr float addrspace(2)* %232, i32 16
>  %294 = load float addrspace(2)* %293, !tbaa !0
>  %295 = fmul float %294, %162
>  %296 = getelementptr float addrspace(2)* %232, i32 17
>  %297 = load float addrspace(2)* %296, !tbaa !0
>  %298 = fmul float %297, %169
>  %299 = fadd float %295, %298
>  %300 = getelementptr float addrspace(2)* %232, i32 18
>  %301 = load float addrspace(2)* %300, !tbaa !0
>  %302 = fmul float %301, %176
>  %303 = fadd float %299, %302
>  %304 = getelementptr float addrspace(2)* %232, i32 19
>  %305 = load float addrspace(2)* %304, !tbaa !0
>  %306 = fmul float %305, %183
>  %307 = fadd float %303, %306
>  %308 = getelementptr float addrspace(2)* %232, i32 20
>  %309 = load float addrspace(2)* %308, !tbaa !0
>  %310 = fmul float %309, %162
>  %311 = getelementptr float addrspace(2)* %232, i32 21
>  %312 = load float addrspace(2)* %311, !tbaa !0
>  %313 = fmul float %312, %169
>  %314 = fadd float %310, %313
>  %315 = getelementptr float addrspace(2)* %232, i32 22
>  %316 = load float addrspace(2)* %315, !tbaa !0
>  %317 = fmul float %316, %176
>  %318 = fadd float %314, %317
>  %319 = getelementptr float addrspace(2)* %232, i32 23
>  %320 = load float addrspace(2)* %319, !tbaa !0
>  %321 = fmul float %320, %183
>  %322 = fadd float %318, %321
>  %323 = getelementptr float addrspace(2)* %232, i32 24
>  %324 = load float addrspace(2)* %323, !tbaa !0
>  %325 = fmul float %324, %162
>  %326 = getelementptr float addrspace(2)* %232, i32 25
>  %327 = load float addrspace(2)* %326, !tbaa !0
>  %328 = fmul float %327, %169
>  %329 = fadd float %325, %328
>  %330 = getelementptr float addrspace(2)* %232, i32 26
>  %331 = load float addrspace(2)* %330, !tbaa !0
>  %332 = fmul float %331, %176
>  %333 = fadd float %329, %332
>  %334 = getelementptr float addrspace(2)* %232, i32 27
>  %335 = load float addrspace(2)* %334, !tbaa !0
>  %336 = fmul float %335, %183
>  %337 = fadd float %333, %336
>  %338 = getelementptr float addrspace(2)* %232, i32 28
>  %339 = load float addrspace(2)* %338, !tbaa !0
>  %340 = fmul float %339, %162
>  %341 = getelementptr float addrspace(2)* %232, i32 29
>  %342 = load float addrspace(2)* %341, !tbaa !0
>  %343 = fmul float %342, %169
>  %344 = fadd float %340, %343
>  %345 = getelementptr float addrspace(2)* %232, i32 30
>  %346 = load float addrspace(2)* %345, !tbaa !0
>  %347 = fmul float %346, %176
>  %348 = fadd float %344, %347
>  %349 = getelementptr float addrspace(2)* %232, i32 31
>  %350 = load float addrspace(2)* %349, !tbaa !0
>  %351 = fmul float %350, %183
>  %352 = fadd float %348, %351
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %307, float %322, float %337, float %352)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %196, float %198, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %204, float %206, float %12, float %12)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %141, float %148, float %155, float %190)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %207, float %208, float %209, float %210)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %224, float %226, float %221, float %183)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0410100
>bf8c007f
>c00403bf
>c0028300
>bf8c007f
>7e060205
>c0020301
>bf8c007f
>7e020204
>d2820002
>040e0208
>d2060802
>02010102
>d2820004
>04060608
>d2060804
>02010104
>f800020f
>02040404
>c0840700
>bf8c000f
>e00c2000
>80020600
>bf8c0770
>d2820002
>040c0906
>d2820004
>040c0907
>c0040311
>bf8c007f
>100a0808
>c0040310
>bf8c007f
>d282000a
>04141102
>d2820005
>040c0908
>c0040312
>bf8c007f
>d2820003
>04281105
>d2820006
>04040b06
>c0040313
>bf8c007f
>d2820001
>040c1106
>c0040315
>bf8c007f
>10060808
>c0040314
>bf8c007f
>d2820003
>040c1102
>c0040316
>bf8c007f
>d2820003
>040c1105
>c0040317
>bf8c007f
>d2820003
>040c1106
>c0400102
>bf8c007f
>c004010d
>bf8c007f
>100e0608
>c004010c
>bf8c007f
>d2820008
>041e0208
>c0040319
>bf8c007f
>100e0808
>c0040318
>bf8c007f
>d2820007
>041c1102
>c004031a
>bf8c007f
>d2820007
>041c1105
>c004031b
>bf8c007f
>d2820007
>041c1106
>c004010e
>bf8c007f
>d2820009
>04220e08
>c004031d
>bf8c007f
>10100808
>c004031c
>bf8c007f
>d2820008
>04201102
>c004031e
>bf8c007f
>d2820008
>04201105
>c004031f
>bf8c007f
>d2820008
>04201106
>c004010f
>bf8c007f
>d2820009
>04261008
>c0040109
>bf8c007f
>10140608
>c0040108
>bf8c007f
>d282000a
>042a0208
>c004010a
>bf8c007f
>d282000a
>042a0e08
>c004010b
>bf8c007f
>d282000a
>042a1008
>c0040105
>bf8c007f
>10160608
>c0040104
>bf8c007f
>d282000b
>042e0208
>c0040106
>bf8c007f
>d282000b
>042e0e08
>c0040107
>bf8c007f
>d282000b
>042e1008
>c0040101
>bf8c007f
>10180608
>c0040100
>bf8c007f
>d282000c
>04320208
>c0040102
>bf8c007f
>d282000c
>04320e08
>c0040103
>bf8c007f
>d282000c
>04321008
>f80000ef
>090a0b0c
>c004011d
>bf8c000f
>10120608
>c004011c
>bf8c007f
>d2820009
>04260208
>c004011e
>bf8c007f
>d2820009
>04260e08
>c004011f
>bf8c007f
>d2820009
>04261008
>c0040119
>bf8c007f
>10140608
>c0040118
>bf8c007f
>d282000a
>042a0208
>c004011a
>bf8c007f
>d282000a
>042a0e08
>c004011b
>bf8c007f
>d282000a
>042a1008
>c0040115
>bf8c007f
>10160608
>c0040114
>bf8c007f
>d282000b
>042e0208
>c0040116
>bf8c007f
>d282000b
>042e0e08
>c0040117
>bf8c007f
>d282000b
>042e1008
>c0040111
>bf8c007f
>10180608
>c0040110
>bf8c007f
>d282000c
>04320208
>c0040112
>bf8c007f
>d282000c
>04320e08
>c0000113
>bf8c007f
>d282000c
>04321000
>f80000ff
>090a0b0c
>c0840704
>bf8c000f
>e00c2000
>80020900
>c00003c4
>bf8c0070
>101a1200
>c00003c5
>bf8c007f
>d282000d
>0434010a
>c00003c7
>bf8c007f
>061a1a00
>c00003c0
>bf8c007f
>101c1200
>c00003c1
>bf8c007f
>d282000e
>0438010a
>c00003c3
>bf8c007f
>061c1c00
>7e1e0280
>f800021f
>0f0f0d0e
>c00003cc
>bf8c000f
>101a1200
>c00003cd
>bf8c007f
>d282000d
>0434010a
>c00003cf
>bf8c007f
>061a1a00
>c00003c8
>bf8c007f
>101c1200
>c00003c9
>bf8c007f
>d2820009
>0438010a
>c00003cb
>bf8c007f
>06121200
>7e140205
>7e160205
>f800022f
>0b0a0d09
>c0000331
>bf8c000f
>10120800
>c0000330
>bf8c007f
>d2820009
>04240102
>c0000332
>bf8c007f
>d2820009
>04240105
>c0000333
>bf8c007f
>d2820009
>04240106
>c00003d9
>bf8c007f
>10140800
>c00003d8
>bf8c007f
>d282000a
>04280102
>c00003da
>bf8c007f
>d282000a
>04280105
>c00003db
>bf8c007f
>d282000a
>04280106
>c00003d5
>bf8c007f
>10160800
>c00003d4
>bf8c007f
>d282000b
>042c0102
>c00003d6
>bf8c007f
>d282000b
>042c0105
>c00003d7
>bf8c007f
>d282000b
>042c0106
>c00003d1
>bf8c007f
>10080800
>c00003d0
>bf8c007f
>d2820002
>04100102
>c00003d2
>bf8c007f
>d2820002
>04080105
>c00003d3
>bf8c007f
>d2820002
>04080106
>f800023f
>090a0b02
>c0840708
>bf8c000f
>e00c2000
>80020900
>bf8c0770
>10001205
>10041404
>10081204
>f800024f
>00000204
>c00003dc
>bf8c000f
>d2820000
>04061000
>c0000302
>bf8c007f
>10020e00
>08021101
>c00003dd
>bf8c007f
>10041000
>08040702
>f80008cf
>08010200
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], GENERIC[19], PERSPECTIVE
>DCL IN[2], GENERIC[20], PERSPECTIVE
>DCL IN[3], GENERIC[21], PERSPECTIVE
>DCL IN[4], GENERIC[22], PERSPECTIVE, CENTROID
>DCL IN[5], GENERIC[23], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL CONST[0..30]
>DCL TEMP[0..5], LOCAL
>DCL TEMP[6], ARRAY(1), LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[4].xyyy
>  1: TEX TEMP[0].xyz, TEMP[0], SAMP[1], 2D
>  2: MOV TEMP[1].xy, IN[4].wzzz
>  3: TEX TEMP[1].xyz, TEMP[1], SAMP[1], 2D
>  4: MOV TEMP[2].xy, IN[1].xyyy
>  5: TEX TEMP[2].xyz, TEMP[2], SAMP[2], 2D
>  6: MOV TEMP[3].xy, IN[5].xyyy
>  7: TEX TEMP[3].xyz, TEMP[3], SAMP[1], 2D
>  8: MOV TEMP[4].xy, IN[2].xyyy
>  9: TEX TEMP[4].xyz, TEMP[4], SAMP[3], 2D
> 10: MOV TEMP[5].xy, IN[1].xyyy
> 11: TEX TEMP[5], TEMP[5], SAMP[0], 2D
> 12: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[2].yyyy
> 13: MAD TEMP[0].xyz, TEMP[2].xxxx, TEMP[0].xyzz, TEMP[1].xyzz
> 14: MAD TEMP[0].xyz, TEMP[2].zzzz, TEMP[3].xyzz, TEMP[0].xyzz
> 15: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[12].xyzz
> 16: MUL TEMP[1].xyz, TEMP[4].xyzz, CONST[8].xyzz
> 17: MAD TEMP[1].xyz, IMM[0].xxxx, TEMP[1].xyzz, IMM[0].yyyy
> 18: MAD TEMP[1].xyz, CONST[8].wwww, TEMP[1].xyzz, IMM[0].zzzz
> 19: MUL TEMP[2].xyz, TEMP[5].xyzz, TEMP[1].xyzz
> 20: MUL TEMP[2].xyz, TEMP[2].xyzz, IN[0].xyzz
> 21: MAD TEMP[3].x, IN[3].wwww, CONST[11].wwww, -CONST[11].xxxx
> 22: MUL TEMP[2].xyz, TEMP[0].xyzz, TEMP[2].xyzz
> 23: MIN TEMP[0].x, TEMP[3].xxxx, CONST[11].zzzz
> 24: MOV_SAT TEMP[0].x, TEMP[0].xxxx
> 25: MAD TEMP[1].xyz, TEMP[2].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 26: MUL TEMP[0].x, TEMP[0].xxxx, TEMP[0].xxxx
> 27: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[0].xxxx
> 28: MUL TEMP[0].x, IN[0].wwww, CONST[12].wwww
> 29: MAD TEMP[2].xyz, TEMP[2].xyzz, CONST[30].xxxx, TEMP[1].xyzz
> 30: MUL TEMP[0].x, TEMP[5].wwww, TEMP[0].xxxx
> 31: MOV TEMP[2].w, TEMP[0].xxxx
> 32: MOV TEMP[6], TEMP[2]
> 33: MOV OUT[0], TEMP[6]
> 34: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 32
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 33
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 34
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 35
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 44
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 46
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 47
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 48
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 49
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 50
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 51
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr float addrspace(2)* %21, i32 116
>  %45 = load float addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr float addrspace(2)* %21, i32 117
>  %47 = load float addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr float addrspace(2)* %21, i32 118
>  %49 = load float addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr float addrspace(2)* %21, i32 120
>  %51 = load float addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %53 = load <32 x i8> addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %55 = load <16 x i8> addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %57 = load <32 x i8> addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %59 = load <16 x i8> addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr <32 x i8> addrspace(2)* %2, i32 2
>  %61 = load <32 x i8> addrspace(2)* %60, !tbaa !0
>  %62 = getelementptr <16 x i8> addrspace(2)* %1, i32 2
>  %63 = load <16 x i8> addrspace(2)* %62, !tbaa !0
>  %64 = getelementptr <32 x i8> addrspace(2)* %2, i32 3
>  %65 = load <32 x i8> addrspace(2)* %64, !tbaa !0
>  %66 = getelementptr <16 x i8> addrspace(2)* %1, i32 3
>  %67 = load <16 x i8> addrspace(2)* %66, !tbaa !0
>  %68 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %69 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %70 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %71 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %3, <2 x i32> %5)
>  %72 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %73 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %74 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %75 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %76 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %3, <2 x i32> %5)
>  %77 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %3, <2 x i32> %6)
>  %78 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %3, <2 x i32> %6)
>  %79 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %3, <2 x i32> %6)
>  %80 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %3, <2 x i32> %6)
>  %81 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %3, <2 x i32> %6)
>  %82 = call float @llvm.SI.fs.interp(i32 1, i32 5, i32 %3, <2 x i32> %6)
>  %83 = bitcast float %77 to i32
>  %84 = bitcast float %78 to i32
>  %85 = insertelement <2 x i32> undef, i32 %83, i32 0
>  %86 = insertelement <2 x i32> %85, i32 %84, i32 1
>  %87 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %86, <32 x i8> %57, <16 x i8> %59, i32 2)
>  %88 = extractelement <4 x float> %87, i32 0
>  %89 = extractelement <4 x float> %87, i32 1
>  %90 = extractelement <4 x float> %87, i32 2
>  %91 = bitcast float %80 to i32
>  %92 = bitcast float %79 to i32
>  %93 = insertelement <2 x i32> undef, i32 %91, i32 0
>  %94 = insertelement <2 x i32> %93, i32 %92, i32 1
>  %95 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %94, <32 x i8> %57, <16 x i8> %59, i32 2)
>  %96 = extractelement <4 x float> %95, i32 0
>  %97 = extractelement <4 x float> %95, i32 1
>  %98 = extractelement <4 x float> %95, i32 2
>  %99 = bitcast float %72 to i32
>  %100 = bitcast float %73 to i32
>  %101 = insertelement <2 x i32> undef, i32 %99, i32 0
>  %102 = insertelement <2 x i32> %101, i32 %100, i32 1
>  %103 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %102, <32 x i8> %61, <16 x i8> %63, i32 2)
>  %104 = extractelement <4 x float> %103, i32 0
>  %105 = extractelement <4 x float> %103, i32 1
>  %106 = extractelement <4 x float> %103, i32 2
>  %107 = bitcast float %81 to i32
>  %108 = bitcast float %82 to i32
>  %109 = insertelement <2 x i32> undef, i32 %107, i32 0
>  %110 = insertelement <2 x i32> %109, i32 %108, i32 1
>  %111 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %110, <32 x i8> %57, <16 x i8> %59, i32 2)
>  %112 = extractelement <4 x float> %111, i32 0
>  %113 = extractelement <4 x float> %111, i32 1
>  %114 = extractelement <4 x float> %111, i32 2
>  %115 = bitcast float %74 to i32
>  %116 = bitcast float %75 to i32
>  %117 = insertelement <2 x i32> undef, i32 %115, i32 0
>  %118 = insertelement <2 x i32> %117, i32 %116, i32 1
>  %119 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %118, <32 x i8> %65, <16 x i8> %67, i32 2)
>  %120 = extractelement <4 x float> %119, i32 0
>  %121 = extractelement <4 x float> %119, i32 1
>  %122 = extractelement <4 x float> %119, i32 2
>  %123 = bitcast float %72 to i32
>  %124 = bitcast float %73 to i32
>  %125 = insertelement <2 x i32> undef, i32 %123, i32 0
>  %126 = insertelement <2 x i32> %125, i32 %124, i32 1
>  %127 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %126, <32 x i8> %53, <16 x i8> %55, i32 2)
>  %128 = extractelement <4 x float> %127, i32 0
>  %129 = extractelement <4 x float> %127, i32 1
>  %130 = extractelement <4 x float> %127, i32 2
>  %131 = extractelement <4 x float> %127, i32 3
>  %132 = fmul float %96, %105
>  %133 = fmul float %97, %105
>  %134 = fmul float %98, %105
>  %135 = fmul float %104, %88
>  %136 = fadd float %135, %132
>  %137 = fmul float %104, %89
>  %138 = fadd float %137, %133
>  %139 = fmul float %104, %90
>  %140 = fadd float %139, %134
>  %141 = fmul float %106, %112
>  %142 = fadd float %141, %136
>  %143 = fmul float %106, %113
>  %144 = fadd float %143, %138
>  %145 = fmul float %106, %114
>  %146 = fadd float %145, %140
>  %147 = fmul float %142, %37
>  %148 = fmul float %144, %39
>  %149 = fmul float %146, %41
>  %150 = fmul float %120, %23
>  %151 = fmul float %121, %25
>  %152 = fmul float %122, %27
>  %153 = fmul float 2.000000e+00, %150
>  %154 = fadd float %153, -1.000000e+00
>  %155 = fmul float 2.000000e+00, %151
>  %156 = fadd float %155, -1.000000e+00
>  %157 = fmul float 2.000000e+00, %152
>  %158 = fadd float %157, -1.000000e+00
>  %159 = fmul float %29, %154
>  %160 = fadd float %159, 1.000000e+00
>  %161 = fmul float %29, %156
>  %162 = fadd float %161, 1.000000e+00
>  %163 = fmul float %29, %158
>  %164 = fadd float %163, 1.000000e+00
>  %165 = fmul float %128, %160
>  %166 = fmul float %129, %162
>  %167 = fmul float %130, %164
>  %168 = fmul float %165, %68
>  %169 = fmul float %166, %69
>  %170 = fmul float %167, %70
>  %171 = fsub float -0.000000e+00, %31
>  %172 = fmul float %76, %35
>  %173 = fadd float %172, %171
>  %174 = fmul float %147, %168
>  %175 = fmul float %148, %169
>  %176 = fmul float %149, %170
>  %177 = fcmp uge float %173, %33
>  %178 = select i1 %177, float %33, float %173
>  %179 = call float @llvm.AMDIL.clamp.(float %178, float 0.000000e+00, float 1.000000e+00)
>  %180 = fsub float -0.000000e+00, %51
>  %181 = fmul float %174, %180
>  %182 = fadd float %181, %45
>  %183 = fsub float -0.000000e+00, %51
>  %184 = fmul float %175, %183
>  %185 = fadd float %184, %47
>  %186 = fsub float -0.000000e+00, %51
>  %187 = fmul float %176, %186
>  %188 = fadd float %187, %49
>  %189 = fmul float %179, %179
>  %190 = fmul float %182, %189
>  %191 = fmul float %185, %189
>  %192 = fmul float %188, %189
>  %193 = fmul float %71, %43
>  %194 = fmul float %174, %51
>  %195 = fadd float %194, %190
>  %196 = fmul float %175, %51
>  %197 = fadd float %196, %191
>  %198 = fmul float %176, %51
>  %199 = fadd float %198, %192
>  %200 = fmul float %131, %193
>  %201 = call i32 @llvm.SI.packf16(float %195, float %197)
>  %202 = bitcast i32 %201 to float
>  %203 = call i32 @llvm.SI.packf16(float %199, float %200)
>  %204 = bitcast i32 %203 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %202, float %204, float %202, float %204)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8380500
>c8390501
>c8340400
>c8350401
>c0840308
>c0c60510
>bf8c007f
>f0800700
>0043040d
>c8201202
>c8211203
>c81c1302
>c81d1303
>c0840304
>c0c60508
>bf8c0070
>f0800700
>00430707
>bf8c0770
>101e0b08
>c82c1102
>c82d1103
>c8281002
>c8291003
>f0800700
>00430a0a
>bf8c0770
>d2820012
>043e1704
>c8401502
>c8411503
>c83c1402
>c83d1403
>f0800700
>00430f0f
>bf8c0770
>d2820002
>044a2106
>c0400100
>bf8c007f
>c0038131
>bf8c007f
>10040407
>c84c0900
>c84d0901
>c8480800
>c8490801
>c084030c
>c0c60518
>bf8c007f
>f0800700
>00431612
>c0038121
>bf8c0070
>10062e07
>d2820003
>040c0f17
>060606f3
>c0038123
>bf8c007f
>d2820003
>03ca0607
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>0043120d
>bf8c0770
>10060713
>c8340100
>c8350101
>10061b03
>10060702
>c0010178
>bf8c007f
>10040602
>c0018175
>bf8c007f
>081a0403
>c8080f00
>c8090f01
>c001812f
>bf8c007f
>10040403
>c001812c
>bf8c007f
>0a040403
>c001812e
>bf8c007f
>d00c0004
>02000702
>7e1c0203
>d2000002
>00121d02
>d2060802
>02010102
>10040502
>101a050d
>d2820003
>04340503
>101a0b07
>d282000d
>04361504
>d282000d
>04361f06
>c0018130
>bf8c007f
>101a1a03
>c0018120
>bf8c007f
>101c2c03
>d282000e
>04380716
>061c1cf3
>d282000e
>03ca1c07
>101c1d12
>c8640000
>c8650001
>101c330e
>101a1d0d
>101c1a02
>c0018174
>bf8c007f
>081c1c03
>101c050e
>d282000d
>0438050d
>5e06070d
>100e0b09
>d2820007
>041e1904
>d2820004
>041e2306
>c0018132
>bf8c007f
>10080803
>c0018122
>bf8c007f
>100a3003
>d2820005
>04140718
>060a0af3
>d2820005
>03ca0a07
>100a0b14
>c8180200
>c8190201
>100a0d05
>10080b04
>100a0802
>c0018176
>bf8c007f
>080a0a03
>10040505
>d2820002
>04080504
>c8100300
>c8110301
>c0000133
>bf8c007f
>10000800
>10000115
>5e000102
>f8001c0f
>00030003
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], CLIPVERTEX
>DCL OUT[3], GENERIC[19]
>DCL OUT[4], GENERIC[20]
>DCL OUT[5], GENERIC[21]
>DCL OUT[6], GENERIC[22]
>DCL OUT[7], GENERIC[23]
>DCL CONST[0..55]
>DCL TEMP[0..11], LOCAL
>  0: MAD TEMP[0], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  1: DP4 TEMP[1].x, TEMP[0], CONST[52]
>  2: DP4 TEMP[2].x, TEMP[0], CONST[53]
>  3: MOV TEMP[1].y, TEMP[2].xxxx
>  4: DP4 TEMP[2].x, TEMP[0], CONST[54]
>  5: MOV TEMP[1].z, TEMP[2].xxxx
>  6: DP4 TEMP[2].x, TEMP[0], CONST[4]
>  7: DP4 TEMP[3].x, TEMP[0], CONST[5]
>  8: MOV TEMP[2].y, TEMP[3].xxxx
>  9: DP4 TEMP[4].x, TEMP[0], CONST[6]
> 10: MOV TEMP[2].z, TEMP[4].xxxx
> 11: MUL TEMP[5].xy, IN[1].xyyy, CONST[48].xyyy
> 12: DP4 TEMP[6].x, TEMP[0], CONST[7]
> 13: MOV TEMP[2].w, TEMP[6].xxxx
> 14: ADD TEMP[7].x, TEMP[5].yyyy, TEMP[5].xxxx
> 15: DP4 TEMP[8].x, TEMP[0], CONST[12]
> 16: ADD TEMP[7].x, TEMP[7].xxxx, CONST[48].wwww
> 17: MUL TEMP[5].xy, IN[1].xyyy, CONST[49].xyyy
> 18: MUL TEMP[0].xy, IN[1].xyyy, CONST[50].xyyy
> 19: ADD TEMP[9].x, TEMP[5].yyyy, TEMP[5].xxxx
> 20: ADD TEMP[10].x, TEMP[0].yyyy, TEMP[0].xxxx
> 21: ADD TEMP[9].x, TEMP[9].xxxx, CONST[49].wwww
> 22: MOV TEMP[7].y, TEMP[9].xxxx
> 23: ADD TEMP[9].x, TEMP[10].xxxx, CONST[50].wwww
> 24: MUL TEMP[5].xy, IN[1].xyyy, CONST[51].xyyy
> 25: MUL TEMP[0].xy, IN[1].xyyy, CONST[14].xyyy
> 26: ADD TEMP[10].x, TEMP[5].yyyy, TEMP[5].xxxx
> 27: ADD TEMP[11].x, TEMP[0].yyyy, TEMP[0].xxxx
> 28: ADD TEMP[10].x, TEMP[10].xxxx, CONST[51].wwww
> 29: MOV TEMP[9].y, TEMP[10].xxxx
> 30: ADD TEMP[10].x, TEMP[11].xxxx, CONST[14].wwww
> 31: MOV TEMP[10].z, TEMP[10].xxxx
> 32: MUL TEMP[5].xy, IN[1].xyyy, CONST[15].xyyy
> 33: ADD TEMP[0].xy, IN[3].xyyy, IN[2].xyyy
> 34: ADD TEMP[5].x, TEMP[5].yyyy, TEMP[5].xxxx
> 35: ADD TEMP[11].xy, TEMP[0].yxxx, IN[3].yxxx
> 36: MOV TEMP[0].zw, TEMP[11].yyxy
> 37: ADD TEMP[5].x, TEMP[5].xxxx, CONST[15].wwww
> 38: MOV TEMP[10].w, TEMP[5].xxxx
> 39: MOV TEMP[0], TEMP[0]
> 40: ADD TEMP[10].xy, TEMP[11].yxxx, IN[3].xyyy
> 41: MOV TEMP[1].w, TEMP[8].xxxx
> 42: MOV TEMP[9].zw, CONST[0].xxxx
> 43: MAD TEMP[5], CONST[47].wwww, CONST[0].xxxy, CONST[0].yyyx
> 44: MOV TEMP[8], TEMP[2]
> 45: MAD TEMP[4].x, TEMP[4].xxxx, CONST[0].zzzz, -TEMP[6].xxxx
> 46: MOV TEMP[2].z, TEMP[4].xxxx
> 47: MOV TEMP[2].y, -TEMP[3].xxxx
> 48: MAD TEMP[2].xy, CONST[55].xyyy, TEMP[6].xxxx, TEMP[2].xyyy
> 49: MOV OUT[3], TEMP[7]
> 50: MOV OUT[4], TEMP[9]
> 51: MOV OUT[6], TEMP[0]
> 52: MOV OUT[7], TEMP[10]
> 53: MOV OUT[0], TEMP[2]
> 54: MOV OUT[5], TEMP[1]
> 55: MOV OUT[2], TEMP[8]
> 56: MOV_SAT OUT[1], TEMP[5]
> 57: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 16
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 17
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 18
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 19
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 20
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 21
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 22
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 23
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 24
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 25
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 26
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 27
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 28
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 29
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 30
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 31
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 48
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 49
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 50
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 51
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 56
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 57
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 59
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 60
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 61
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 63
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 191
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 192
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 193
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 195
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 196
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 197
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 199
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 200
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 201
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 203
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 204
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 205
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 207
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr float addrspace(2)* %10, i32 208
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = getelementptr float addrspace(2)* %10, i32 209
>  %98 = load float addrspace(2)* %97, !tbaa !0
>  %99 = getelementptr float addrspace(2)* %10, i32 210
>  %100 = load float addrspace(2)* %99, !tbaa !0
>  %101 = getelementptr float addrspace(2)* %10, i32 211
>  %102 = load float addrspace(2)* %101, !tbaa !0
>  %103 = getelementptr float addrspace(2)* %10, i32 212
>  %104 = load float addrspace(2)* %103, !tbaa !0
>  %105 = getelementptr float addrspace(2)* %10, i32 213
>  %106 = load float addrspace(2)* %105, !tbaa !0
>  %107 = getelementptr float addrspace(2)* %10, i32 214
>  %108 = load float addrspace(2)* %107, !tbaa !0
>  %109 = getelementptr float addrspace(2)* %10, i32 215
>  %110 = load float addrspace(2)* %109, !tbaa !0
>  %111 = getelementptr float addrspace(2)* %10, i32 216
>  %112 = load float addrspace(2)* %111, !tbaa !0
>  %113 = getelementptr float addrspace(2)* %10, i32 217
>  %114 = load float addrspace(2)* %113, !tbaa !0
>  %115 = getelementptr float addrspace(2)* %10, i32 218
>  %116 = load float addrspace(2)* %115, !tbaa !0
>  %117 = getelementptr float addrspace(2)* %10, i32 219
>  %118 = load float addrspace(2)* %117, !tbaa !0
>  %119 = getelementptr float addrspace(2)* %10, i32 220
>  %120 = load float addrspace(2)* %119, !tbaa !0
>  %121 = getelementptr float addrspace(2)* %10, i32 221
>  %122 = load float addrspace(2)* %121, !tbaa !0
>  %123 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %124 = load <16 x i8> addrspace(2)* %123, !tbaa !0
>  %125 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %124, i32 0, i32 %5)
>  %126 = extractelement <4 x float> %125, i32 0
>  %127 = extractelement <4 x float> %125, i32 1
>  %128 = extractelement <4 x float> %125, i32 2
>  %129 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %130 = load <16 x i8> addrspace(2)* %129, !tbaa !0
>  %131 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %130, i32 0, i32 %5)
>  %132 = extractelement <4 x float> %131, i32 0
>  %133 = extractelement <4 x float> %131, i32 1
>  %134 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %135 = load <16 x i8> addrspace(2)* %134, !tbaa !0
>  %136 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %135, i32 0, i32 %5)
>  %137 = extractelement <4 x float> %136, i32 0
>  %138 = extractelement <4 x float> %136, i32 1
>  %139 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %140 = load <16 x i8> addrspace(2)* %139, !tbaa !0
>  %141 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %140, i32 0, i32 %5)
>  %142 = extractelement <4 x float> %141, i32 0
>  %143 = extractelement <4 x float> %141, i32 1
>  %144 = fmul float %126, %14
>  %145 = fadd float %144, %12
>  %146 = fmul float %127, %14
>  %147 = fadd float %146, %12
>  %148 = fmul float %128, %14
>  %149 = fadd float %148, %12
>  %150 = fmul float %126, %12
>  %151 = fadd float %150, %14
>  %152 = fmul float %145, %96
>  %153 = fmul float %147, %98
>  %154 = fadd float %152, %153
>  %155 = fmul float %149, %100
>  %156 = fadd float %154, %155
>  %157 = fmul float %151, %102
>  %158 = fadd float %156, %157
>  %159 = fmul float %145, %104
>  %160 = fmul float %147, %106
>  %161 = fadd float %159, %160
>  %162 = fmul float %149, %108
>  %163 = fadd float %161, %162
>  %164 = fmul float %151, %110
>  %165 = fadd float %163, %164
>  %166 = fmul float %145, %112
>  %167 = fmul float %147, %114
>  %168 = fadd float %166, %167
>  %169 = fmul float %149, %116
>  %170 = fadd float %168, %169
>  %171 = fmul float %151, %118
>  %172 = fadd float %170, %171
>  %173 = fmul float %145, %18
>  %174 = fmul float %147, %20
>  %175 = fadd float %173, %174
>  %176 = fmul float %149, %22
>  %177 = fadd float %175, %176
>  %178 = fmul float %151, %24
>  %179 = fadd float %177, %178
>  %180 = fmul float %145, %26
>  %181 = fmul float %147, %28
>  %182 = fadd float %180, %181
>  %183 = fmul float %149, %30
>  %184 = fadd float %182, %183
>  %185 = fmul float %151, %32
>  %186 = fadd float %184, %185
>  %187 = fmul float %145, %34
>  %188 = fmul float %147, %36
>  %189 = fadd float %187, %188
>  %190 = fmul float %149, %38
>  %191 = fadd float %189, %190
>  %192 = fmul float %151, %40
>  %193 = fadd float %191, %192
>  %194 = fmul float %132, %72
>  %195 = fmul float %133, %74
>  %196 = fmul float %145, %42
>  %197 = fmul float %147, %44
>  %198 = fadd float %196, %197
>  %199 = fmul float %149, %46
>  %200 = fadd float %198, %199
>  %201 = fmul float %151, %48
>  %202 = fadd float %200, %201
>  %203 = fadd float %195, %194
>  %204 = fmul float %145, %50
>  %205 = fmul float %147, %52
>  %206 = fadd float %204, %205
>  %207 = fmul float %149, %54
>  %208 = fadd float %206, %207
>  %209 = fmul float %151, %56
>  %210 = fadd float %208, %209
>  %211 = fadd float %203, %76
>  %212 = fmul float %132, %78
>  %213 = fmul float %133, %80
>  %214 = fmul float %132, %84
>  %215 = fmul float %133, %86
>  %216 = fadd float %213, %212
>  %217 = fadd float %215, %214
>  %218 = fadd float %216, %82
>  %219 = fadd float %217, %88
>  %220 = fmul float %132, %90
>  %221 = fmul float %133, %92
>  %222 = fmul float %132, %58
>  %223 = fmul float %133, %60
>  %224 = fadd float %221, %220
>  %225 = fadd float %223, %222
>  %226 = fadd float %224, %94
>  %227 = fadd float %225, %62
>  %228 = fmul float %132, %64
>  %229 = fmul float %133, %66
>  %230 = fadd float %142, %137
>  %231 = fadd float %143, %138
>  %232 = fadd float %229, %228
>  %233 = fadd float %231, %143
>  %234 = fadd float %230, %142
>  %235 = fadd float %232, %68
>  %236 = fadd float %234, %142
>  %237 = fadd float %233, %143
>  %238 = fmul float %70, %12
>  %239 = fadd float %238, %14
>  %240 = fmul float %70, %12
>  %241 = fadd float %240, %14
>  %242 = fmul float %70, %12
>  %243 = fadd float %242, %14
>  %244 = fmul float %70, %14
>  %245 = fadd float %244, %12
>  %246 = fsub float -0.000000e+00, %202
>  %247 = fmul float %193, %16
>  %248 = fadd float %247, %246
>  %249 = fsub float -0.000000e+00, %186
>  %250 = fmul float %120, %202
>  %251 = fadd float %250, %179
>  %252 = fmul float %122, %202
>  %253 = fadd float %252, %249
>  %254 = call float @llvm.AMDIL.clamp.(float %239, float 0.000000e+00, float 1.000000e+00)
>  %255 = call float @llvm.AMDIL.clamp.(float %241, float 0.000000e+00, float 1.000000e+00)
>  %256 = call float @llvm.AMDIL.clamp.(float %243, float 0.000000e+00, float 1.000000e+00)
>  %257 = call float @llvm.AMDIL.clamp.(float %245, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %254, float %255, float %256, float %257)
>  %258 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %259 = load float addrspace(2)* addrspace(2)* %258, !tbaa !0
>  %260 = getelementptr float addrspace(2)* %259, i32 0
>  %261 = load float addrspace(2)* %260, !tbaa !0
>  %262 = fmul float %261, %179
>  %263 = getelementptr float addrspace(2)* %259, i32 1
>  %264 = load float addrspace(2)* %263, !tbaa !0
>  %265 = fmul float %264, %186
>  %266 = fadd float %262, %265
>  %267 = getelementptr float addrspace(2)* %259, i32 2
>  %268 = load float addrspace(2)* %267, !tbaa !0
>  %269 = fmul float %268, %193
>  %270 = fadd float %266, %269
>  %271 = getelementptr float addrspace(2)* %259, i32 3
>  %272 = load float addrspace(2)* %271, !tbaa !0
>  %273 = fmul float %272, %202
>  %274 = fadd float %270, %273
>  %275 = getelementptr float addrspace(2)* %259, i32 4
>  %276 = load float addrspace(2)* %275, !tbaa !0
>  %277 = fmul float %276, %179
>  %278 = getelementptr float addrspace(2)* %259, i32 5
>  %279 = load float addrspace(2)* %278, !tbaa !0
>  %280 = fmul float %279, %186
>  %281 = fadd float %277, %280
>  %282 = getelementptr float addrspace(2)* %259, i32 6
>  %283 = load float addrspace(2)* %282, !tbaa !0
>  %284 = fmul float %283, %193
>  %285 = fadd float %281, %284
>  %286 = getelementptr float addrspace(2)* %259, i32 7
>  %287 = load float addrspace(2)* %286, !tbaa !0
>  %288 = fmul float %287, %202
>  %289 = fadd float %285, %288
>  %290 = getelementptr float addrspace(2)* %259, i32 8
>  %291 = load float addrspace(2)* %290, !tbaa !0
>  %292 = fmul float %291, %179
>  %293 = getelementptr float addrspace(2)* %259, i32 9
>  %294 = load float addrspace(2)* %293, !tbaa !0
>  %295 = fmul float %294, %186
>  %296 = fadd float %292, %295
>  %297 = getelementptr float addrspace(2)* %259, i32 10
>  %298 = load float addrspace(2)* %297, !tbaa !0
>  %299 = fmul float %298, %193
>  %300 = fadd float %296, %299
>  %301 = getelementptr float addrspace(2)* %259, i32 11
>  %302 = load float addrspace(2)* %301, !tbaa !0
>  %303 = fmul float %302, %202
>  %304 = fadd float %300, %303
>  %305 = getelementptr float addrspace(2)* %259, i32 12
>  %306 = load float addrspace(2)* %305, !tbaa !0
>  %307 = fmul float %306, %179
>  %308 = getelementptr float addrspace(2)* %259, i32 13
>  %309 = load float addrspace(2)* %308, !tbaa !0
>  %310 = fmul float %309, %186
>  %311 = fadd float %307, %310
>  %312 = getelementptr float addrspace(2)* %259, i32 14
>  %313 = load float addrspace(2)* %312, !tbaa !0
>  %314 = fmul float %313, %193
>  %315 = fadd float %311, %314
>  %316 = getelementptr float addrspace(2)* %259, i32 15
>  %317 = load float addrspace(2)* %316, !tbaa !0
>  %318 = fmul float %317, %202
>  %319 = fadd float %315, %318
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %274, float %289, float %304, float %319)
>  %320 = getelementptr float addrspace(2)* %259, i32 16
>  %321 = load float addrspace(2)* %320, !tbaa !0
>  %322 = fmul float %321, %179
>  %323 = getelementptr float addrspace(2)* %259, i32 17
>  %324 = load float addrspace(2)* %323, !tbaa !0
>  %325 = fmul float %324, %186
>  %326 = fadd float %322, %325
>  %327 = getelementptr float addrspace(2)* %259, i32 18
>  %328 = load float addrspace(2)* %327, !tbaa !0
>  %329 = fmul float %328, %193
>  %330 = fadd float %326, %329
>  %331 = getelementptr float addrspace(2)* %259, i32 19
>  %332 = load float addrspace(2)* %331, !tbaa !0
>  %333 = fmul float %332, %202
>  %334 = fadd float %330, %333
>  %335 = getelementptr float addrspace(2)* %259, i32 20
>  %336 = load float addrspace(2)* %335, !tbaa !0
>  %337 = fmul float %336, %179
>  %338 = getelementptr float addrspace(2)* %259, i32 21
>  %339 = load float addrspace(2)* %338, !tbaa !0
>  %340 = fmul float %339, %186
>  %341 = fadd float %337, %340
>  %342 = getelementptr float addrspace(2)* %259, i32 22
>  %343 = load float addrspace(2)* %342, !tbaa !0
>  %344 = fmul float %343, %193
>  %345 = fadd float %341, %344
>  %346 = getelementptr float addrspace(2)* %259, i32 23
>  %347 = load float addrspace(2)* %346, !tbaa !0
>  %348 = fmul float %347, %202
>  %349 = fadd float %345, %348
>  %350 = getelementptr float addrspace(2)* %259, i32 24
>  %351 = load float addrspace(2)* %350, !tbaa !0
>  %352 = fmul float %351, %179
>  %353 = getelementptr float addrspace(2)* %259, i32 25
>  %354 = load float addrspace(2)* %353, !tbaa !0
>  %355 = fmul float %354, %186
>  %356 = fadd float %352, %355
>  %357 = getelementptr float addrspace(2)* %259, i32 26
>  %358 = load float addrspace(2)* %357, !tbaa !0
>  %359 = fmul float %358, %193
>  %360 = fadd float %356, %359
>  %361 = getelementptr float addrspace(2)* %259, i32 27
>  %362 = load float addrspace(2)* %361, !tbaa !0
>  %363 = fmul float %362, %202
>  %364 = fadd float %360, %363
>  %365 = getelementptr float addrspace(2)* %259, i32 28
>  %366 = load float addrspace(2)* %365, !tbaa !0
>  %367 = fmul float %366, %179
>  %368 = getelementptr float addrspace(2)* %259, i32 29
>  %369 = load float addrspace(2)* %368, !tbaa !0
>  %370 = fmul float %369, %186
>  %371 = fadd float %367, %370
>  %372 = getelementptr float addrspace(2)* %259, i32 30
>  %373 = load float addrspace(2)* %372, !tbaa !0
>  %374 = fmul float %373, %193
>  %375 = fadd float %371, %374
>  %376 = getelementptr float addrspace(2)* %259, i32 31
>  %377 = load float addrspace(2)* %376, !tbaa !0
>  %378 = fmul float %377, %202
>  %379 = fadd float %375, %378
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %334, float %349, float %364, float %379)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %211, float %218, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %219, float %226, float %12, float %12)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %158, float %165, float %172, float %210)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %230, float %231, float %233, float %234)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 37, i32 0, float %236, float %237, float %227, float %235)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %251, float %253, float %248, float %202)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0410100
>bf8c007f
>c00403bf
>c0020300
>bf8c007f
>7e040204
>c0028301
>bf8c007f
>7e020205
>d2820003
>040a0208
>d2060803
>02010103
>d2820004
>04060408
>d2060804
>02010104
>f800020f
>03040404
>c0840700
>bf8c000f
>e00c2000
>80020800
>bf8c0770
>d2820004
>04080b08
>d2820006
>04080b09
>c0040311
>bf8c007f
>10060c08
>c0040310
>bf8c007f
>d2820003
>040c1104
>d2820007
>04080b0a
>c0028312
>bf8c007f
>d2820002
>040c0b07
>d2820008
>04040908
>c0028313
>bf8c007f
>d2820001
>04080b08
>c0028315
>bf8c007f
>10040c05
>c0028314
>bf8c007f
>d2820002
>04080b04
>c0028316
>bf8c007f
>d2820002
>04080b07
>c0028317
>bf8c007f
>d2820002
>04080b08
>c0400102
>bf8c007f
>c002810d
>bf8c007f
>10060405
>c002810c
>bf8c007f
>d2820005
>040e0205
>c0028319
>bf8c007f
>10060c05
>c0028318
>bf8c007f
>d2820003
>040c0b04
>c002831a
>bf8c007f
>d2820003
>040c0b07
>c002831b
>bf8c007f
>d2820003
>040c0b08
>c002810e
>bf8c007f
>d2820009
>04160605
>c002831d
>bf8c007f
>100a0c05
>c002831c
>bf8c007f
>d2820005
>04140b04
>c002831e
>bf8c007f
>d2820005
>04140b07
>c002831f
>bf8c007f
>d2820005
>04140b08
>c002810f
>bf8c007f
>d2820009
>04260a05
>c0028109
>bf8c007f
>10140405
>c0028108
>bf8c007f
>d282000a
>042a0205
>c002810a
>bf8c007f
>d282000a
>042a0605
>c002810b
>bf8c007f
>d282000a
>042a0a05
>c0028105
>bf8c007f
>10160405
>c0028104
>bf8c007f
>d282000b
>042e0205
>c0028106
>bf8c007f
>d282000b
>042e0605
>c0028107
>bf8c007f
>d282000b
>042e0a05
>c0028101
>bf8c007f
>10180405
>c0028100
>bf8c007f
>d282000c
>04320205
>c0028102
>bf8c007f
>d282000c
>04320605
>c0028103
>bf8c007f
>d282000c
>04320a05
>f80000ef
>090a0b0c
>c002811d
>bf8c000f
>10120405
>c002811c
>bf8c007f
>d2820009
>04260205
>c002811e
>bf8c007f
>d2820009
>04260605
>c002811f
>bf8c007f
>d2820009
>04260a05
>c0028119
>bf8c007f
>10140405
>c0028118
>bf8c007f
>d282000a
>042a0205
>c002811a
>bf8c007f
>d282000a
>042a0605
>c002811b
>bf8c007f
>d282000a
>042a0a05
>c0028115
>bf8c007f
>10160405
>c0028114
>bf8c007f
>d282000b
>042e0205
>c0028116
>bf8c007f
>d282000b
>042e0605
>c0028117
>bf8c007f
>d282000b
>042e0a05
>c0028111
>bf8c007f
>10180405
>c0028110
>bf8c007f
>d282000c
>04320205
>c0028112
>bf8c007f
>d282000c
>04320605
>c0000113
>bf8c007f
>d282000c
>04320a00
>f80000ff
>090a0b0c
>c0840704
>bf8c000f
>e00c2000
>80020900
>c00003c4
>bf8c0070
>101a1200
>c00003c5
>bf8c007f
>d282000d
>0434010a
>c00003c7
>bf8c007f
>061a1a00
>c00003c0
>bf8c007f
>101c1200
>c00003c1
>bf8c007f
>d282000e
>0438010a
>c00003c3
>bf8c007f
>061c1c00
>7e1e0280
>f800021f
>0f0f0d0e
>c00003cc
>bf8c000f
>101a1200
>c00003cd
>bf8c007f
>d282000d
>0434010a
>c00003cf
>bf8c007f
>061a1a00
>c00003c8
>bf8c007f
>101c1200
>c00003c9
>bf8c007f
>d282000e
>0438010a
>c00003cb
>bf8c007f
>061c1c00
>7e1e0204
>7e200204
>f800022f
>100f0d0e
>c0000331
>bf8c000f
>101a0c00
>c0000330
>bf8c007f
>d282000d
>04340104
>c0000332
>bf8c007f
>d282000d
>04340107
>c0000333
>bf8c007f
>d282000d
>04340108
>c00003d9
>bf8c007f
>101c0c00
>c00003d8
>bf8c007f
>d282000e
>04380104
>c00003da
>bf8c007f
>d282000e
>04380107
>c00003db
>bf8c007f
>d282000e
>04380108
>c00003d5
>bf8c007f
>101e0c00
>c00003d4
>bf8c007f
>d282000f
>043c0104
>c00003d6
>bf8c007f
>d282000f
>043c0107
>c00003d7
>bf8c007f
>d282000f
>043c0108
>c00003d1
>bf8c007f
>100c0c00
>c00003d0
>bf8c007f
>d2820004
>04180104
>c00003d2
>bf8c007f
>d2820004
>04100107
>c00003d3
>bf8c007f
>d2820004
>04100108
>f800023f
>0d0e0f04
>c0840708
>bf8c000f
>e00c2000
>80021100
>c082070c
>bf8c0070
>e00c2000
>80010d00
>bf8c0770
>060c230d
>06001b06
>060e250e
>06081d07
>f800024f
>00040706
>c000033c
>bf8c000f
>100c1200
>c000033d
>bf8c007f
>d2820006
>0418010a
>c000033f
>bf8c007f
>060c0c00
>c0000338
>bf8c007f
>100e1200
>c0000339
>bf8c007f
>d2820007
>041c010a
>c000033b
>bf8c007f
>060e0e00
>06081d04
>06001b00
>f800025f
>06070400
>c00003dc
>bf8c000f
>d2820000
>04060a00
>c0000302
>bf8c007f
>10020600
>08020b01
>c00003dd
>bf8c007f
>10060a00
>08040503
>f80008cf
>05010200
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], COLOR[1], COLOR
>DCL IN[2], GENERIC[19], PERSPECTIVE
>DCL IN[3], GENERIC[20], PERSPECTIVE
>DCL IN[4], GENERIC[21], PERSPECTIVE
>DCL IN[5], GENERIC[22], PERSPECTIVE, CENTROID
>DCL IN[6], GENERIC[23], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL CONST[0..30]
>DCL TEMP[0..9], LOCAL
>DCL TEMP[10], ARRAY(1), LOCAL
>IMM[0] FLT32 {   -2.0000,     3.0000,     2.0000,    -1.0000}
>IMM[1] FLT32 {    0.8165,     0.0000,     0.5774,     1.0000}
>IMM[2] FLT32 {   -0.4082,     0.7071,     0.5774,    -0.4082}
>IMM[3] FLT32 {   -0.4082,    -0.7071,     0.5774,     0.0000}
>  0: MOV TEMP[0].xy, IN[6].zwww
>  1: TEX TEMP[0].xy, TEMP[0], SAMP[2], 2D
>  2: MOV TEMP[1].xy, IN[2].xyyy
>  3: TEX TEMP[1].xyz, TEMP[1], SAMP[3], 2D
>  4: MOV TEMP[2].xy, IN[3].xyyy
>  5: TEX TEMP[2].xyz, TEMP[2], SAMP[4], 2D
>  6: MOV TEMP[3].xy, IN[5].wzzz
>  7: TEX TEMP[3].xyz, TEMP[3], SAMP[1], 2D
>  8: MOV TEMP[4].xy, IN[5].xyyy
>  9: TEX TEMP[4].xyz, TEMP[4], SAMP[1], 2D
> 10: MOV TEMP[5].xy, IN[6].xyyy
> 11: TEX TEMP[5].xyz, TEMP[5], SAMP[1], 2D
> 12: MOV TEMP[6].xy, IN[2].xyyy
> 13: TEX TEMP[6].xyz, TEMP[6], SAMP[5], 2D
> 14: MOV TEMP[7].xy, IN[2].xyyy
> 15: TEX TEMP[7], TEMP[7], SAMP[0], 2D
> 16: ADD TEMP[8].x, TEMP[0].xxxx, TEMP[0].yyyy
> 17: ADD TEMP[9].x, -TEMP[0].xxxx, TEMP[0].yyyy
> 18: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 19: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 20: ADD TEMP[8].x, TEMP[8].xxxx, -TEMP[9].xxxx
> 21: ADD TEMP[9].x, -TEMP[9].xxxx, IN[1].xxxx
> 22: RCP TEMP[8].x, TEMP[8].xxxx
> 23: MUL TEMP[8].x, TEMP[9].xxxx, TEMP[8].xxxx
> 24: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 25: MAD TEMP[9].x, TEMP[8].xxxx, IMM[0].xxxx, IMM[0].yyyy
> 26: MUL TEMP[8].x, TEMP[8].xxxx, TEMP[8].xxxx
> 27: MAD TEMP[0].xyz, IMM[0].zzzz, TEMP[1].xyzz, IMM[0].wwww
> 28: MUL TEMP[8].x, TEMP[9].xxxx, TEMP[8].xxxx
> 29: MAD TEMP[1].xyz, IMM[0].zzzz, TEMP[2].xyzz, IMM[0].wwww
> 30: ADD TEMP[9].xyz, TEMP[1].xyzz, -TEMP[0].xyzz
> 31: MAD TEMP[0].xyz, TEMP[8].xxxx, TEMP[9].xyzz, TEMP[0].xyzz
> 32: DP3 TEMP[1].x, TEMP[0].xyzz, IMM[1].xyzz
> 33: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 34: DP3 TEMP[9].x, TEMP[0].xyzz, IMM[2].xyzz
> 35: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 36: MOV TEMP[1].y, TEMP[9].xxxx
> 37: DP3 TEMP[9].x, TEMP[0].xyzz, IMM[3].xyzz
> 38: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 39: MOV TEMP[1].z, TEMP[9].xxxx
> 40: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[1].xyzz
> 41: MUL TEMP[0].xyz, TEMP[3].xyzz, TEMP[1].yyyy
> 42: MAD TEMP[0].xyz, TEMP[1].xxxx, TEMP[4].xyzz, TEMP[0].xyzz
> 43: DP3 TEMP[3].x, TEMP[1].xyzz, IMM[1].wwww
> 44: MAD TEMP[1].xyz, TEMP[1].zzzz, TEMP[5].xyzz, TEMP[0].xyzz
> 45: RCP TEMP[3].x, TEMP[3].xxxx
> 46: MUL TEMP[0].xyz, TEMP[3].xxxx, CONST[12].xyzz
> 47: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[0].xyzz
> 48: ADD TEMP[3].xyz, TEMP[6].xyzz, -TEMP[7].xyzz
> 49: MAD TEMP[0].xyz, TEMP[8].xxxx, TEMP[3].xyzz, TEMP[7].xyzz
> 50: MUL TEMP[2].xyz, TEMP[0].xyzz, IN[0].xyzz
> 51: MAD TEMP[3].x, IN[4].wwww, CONST[11].wwww, -CONST[11].xxxx
> 52: MUL TEMP[2].xyz, TEMP[1].xyzz, TEMP[2].xyzz
> 53: MIN TEMP[1].x, TEMP[3].xxxx, CONST[11].zzzz
> 54: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 55: MAD TEMP[0].xyz, TEMP[2].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 56: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 57: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xxxx
> 58: MUL TEMP[1].x, IN[0].wwww, CONST[12].wwww
> 59: MAD TEMP[2].xyz, TEMP[2].xyzz, CONST[30].xxxx, TEMP[0].xyzz
> 60: MUL TEMP[0].x, TEMP[7].wwww, TEMP[1].xxxx
> 61: MOV TEMP[2].w, TEMP[0].xxxx
> 62: MOV TEMP[10], TEMP[2]
> 63: MOV OUT[0], TEMP[10]
> 64: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 44
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 46
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 47
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 48
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 49
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 50
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 51
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 116
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 117
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 118
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 120
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %45 = load <32 x i8> addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %47 = load <16 x i8> addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %49 = load <32 x i8> addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %51 = load <16 x i8> addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr <32 x i8> addrspace(2)* %2, i32 2
>  %53 = load <32 x i8> addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr <16 x i8> addrspace(2)* %1, i32 2
>  %55 = load <16 x i8> addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr <32 x i8> addrspace(2)* %2, i32 3
>  %57 = load <32 x i8> addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr <16 x i8> addrspace(2)* %1, i32 3
>  %59 = load <16 x i8> addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr <32 x i8> addrspace(2)* %2, i32 4
>  %61 = load <32 x i8> addrspace(2)* %60, !tbaa !0
>  %62 = getelementptr <16 x i8> addrspace(2)* %1, i32 4
>  %63 = load <16 x i8> addrspace(2)* %62, !tbaa !0
>  %64 = getelementptr <32 x i8> addrspace(2)* %2, i32 5
>  %65 = load <32 x i8> addrspace(2)* %64, !tbaa !0
>  %66 = getelementptr <16 x i8> addrspace(2)* %1, i32 5
>  %67 = load <16 x i8> addrspace(2)* %66, !tbaa !0
>  %68 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %69 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %70 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %71 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %3, <2 x i32> %5)
>  %72 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %73 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %74 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %75 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %3, <2 x i32> %5)
>  %76 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %3, <2 x i32> %5)
>  %77 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %3, <2 x i32> %5)
>  %78 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %3, <2 x i32> %6)
>  %79 = call float @llvm.SI.fs.interp(i32 1, i32 5, i32 %3, <2 x i32> %6)
>  %80 = call float @llvm.SI.fs.interp(i32 2, i32 5, i32 %3, <2 x i32> %6)
>  %81 = call float @llvm.SI.fs.interp(i32 3, i32 5, i32 %3, <2 x i32> %6)
>  %82 = call float @llvm.SI.fs.interp(i32 0, i32 6, i32 %3, <2 x i32> %6)
>  %83 = call float @llvm.SI.fs.interp(i32 1, i32 6, i32 %3, <2 x i32> %6)
>  %84 = call float @llvm.SI.fs.interp(i32 2, i32 6, i32 %3, <2 x i32> %6)
>  %85 = call float @llvm.SI.fs.interp(i32 3, i32 6, i32 %3, <2 x i32> %6)
>  %86 = bitcast float %84 to i32
>  %87 = bitcast float %85 to i32
>  %88 = insertelement <2 x i32> undef, i32 %86, i32 0
>  %89 = insertelement <2 x i32> %88, i32 %87, i32 1
>  %90 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %89, <32 x i8> %53, <16 x i8> %55, i32 2)
>  %91 = extractelement <4 x float> %90, i32 0
>  %92 = extractelement <4 x float> %90, i32 1
>  %93 = bitcast float %73 to i32
>  %94 = bitcast float %74 to i32
>  %95 = insertelement <2 x i32> undef, i32 %93, i32 0
>  %96 = insertelement <2 x i32> %95, i32 %94, i32 1
>  %97 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %96, <32 x i8> %57, <16 x i8> %59, i32 2)
>  %98 = extractelement <4 x float> %97, i32 0
>  %99 = extractelement <4 x float> %97, i32 1
>  %100 = extractelement <4 x float> %97, i32 2
>  %101 = bitcast float %75 to i32
>  %102 = bitcast float %76 to i32
>  %103 = insertelement <2 x i32> undef, i32 %101, i32 0
>  %104 = insertelement <2 x i32> %103, i32 %102, i32 1
>  %105 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %104, <32 x i8> %61, <16 x i8> %63, i32 2)
>  %106 = extractelement <4 x float> %105, i32 0
>  %107 = extractelement <4 x float> %105, i32 1
>  %108 = extractelement <4 x float> %105, i32 2
>  %109 = bitcast float %81 to i32
>  %110 = bitcast float %80 to i32
>  %111 = insertelement <2 x i32> undef, i32 %109, i32 0
>  %112 = insertelement <2 x i32> %111, i32 %110, i32 1
>  %113 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %112, <32 x i8> %49, <16 x i8> %51, i32 2)
>  %114 = extractelement <4 x float> %113, i32 0
>  %115 = extractelement <4 x float> %113, i32 1
>  %116 = extractelement <4 x float> %113, i32 2
>  %117 = bitcast float %78 to i32
>  %118 = bitcast float %79 to i32
>  %119 = insertelement <2 x i32> undef, i32 %117, i32 0
>  %120 = insertelement <2 x i32> %119, i32 %118, i32 1
>  %121 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %120, <32 x i8> %49, <16 x i8> %51, i32 2)
>  %122 = extractelement <4 x float> %121, i32 0
>  %123 = extractelement <4 x float> %121, i32 1
>  %124 = extractelement <4 x float> %121, i32 2
>  %125 = bitcast float %82 to i32
>  %126 = bitcast float %83 to i32
>  %127 = insertelement <2 x i32> undef, i32 %125, i32 0
>  %128 = insertelement <2 x i32> %127, i32 %126, i32 1
>  %129 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %128, <32 x i8> %49, <16 x i8> %51, i32 2)
>  %130 = extractelement <4 x float> %129, i32 0
>  %131 = extractelement <4 x float> %129, i32 1
>  %132 = extractelement <4 x float> %129, i32 2
>  %133 = bitcast float %73 to i32
>  %134 = bitcast float %74 to i32
>  %135 = insertelement <2 x i32> undef, i32 %133, i32 0
>  %136 = insertelement <2 x i32> %135, i32 %134, i32 1
>  %137 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %136, <32 x i8> %65, <16 x i8> %67, i32 2)
>  %138 = extractelement <4 x float> %137, i32 0
>  %139 = extractelement <4 x float> %137, i32 1
>  %140 = extractelement <4 x float> %137, i32 2
>  %141 = bitcast float %73 to i32
>  %142 = bitcast float %74 to i32
>  %143 = insertelement <2 x i32> undef, i32 %141, i32 0
>  %144 = insertelement <2 x i32> %143, i32 %142, i32 1
>  %145 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %144, <32 x i8> %45, <16 x i8> %47, i32 2)
>  %146 = extractelement <4 x float> %145, i32 0
>  %147 = extractelement <4 x float> %145, i32 1
>  %148 = extractelement <4 x float> %145, i32 2
>  %149 = extractelement <4 x float> %145, i32 3
>  %150 = fadd float %91, %92
>  %151 = fsub float -0.000000e+00, %91
>  %152 = fadd float %151, %92
>  %153 = call float @llvm.AMDIL.clamp.(float %152, float 0.000000e+00, float 1.000000e+00)
>  %154 = call float @llvm.AMDIL.clamp.(float %150, float 0.000000e+00, float 1.000000e+00)
>  %155 = fsub float -0.000000e+00, %153
>  %156 = fadd float %154, %155
>  %157 = fsub float -0.000000e+00, %153
>  %158 = fadd float %157, %72
>  %159 = fdiv float 1.000000e+00, %156
>  %160 = fmul float %158, %159
>  %161 = call float @llvm.AMDIL.clamp.(float %160, float 0.000000e+00, float 1.000000e+00)
>  %162 = fmul float %161, -2.000000e+00
>  %163 = fadd float %162, 3.000000e+00
>  %164 = fmul float %161, %161
>  %165 = fmul float 2.000000e+00, %98
>  %166 = fadd float %165, -1.000000e+00
>  %167 = fmul float 2.000000e+00, %99
>  %168 = fadd float %167, -1.000000e+00
>  %169 = fmul float 2.000000e+00, %100
>  %170 = fadd float %169, -1.000000e+00
>  %171 = fmul float %163, %164
>  %172 = fmul float 2.000000e+00, %106
>  %173 = fadd float %172, -1.000000e+00
>  %174 = fmul float 2.000000e+00, %107
>  %175 = fadd float %174, -1.000000e+00
>  %176 = fmul float 2.000000e+00, %108
>  %177 = fadd float %176, -1.000000e+00
>  %178 = fsub float -0.000000e+00, %166
>  %179 = fadd float %173, %178
>  %180 = fsub float -0.000000e+00, %168
>  %181 = fadd float %175, %180
>  %182 = fsub float -0.000000e+00, %170
>  %183 = fadd float %177, %182
>  %184 = fmul float %171, %179
>  %185 = fadd float %184, %166
>  %186 = fmul float %171, %181
>  %187 = fadd float %186, %168
>  %188 = fmul float %171, %183
>  %189 = fadd float %188, %170
>  %190 = fmul float %185, 0x3FEA20BD80000000
>  %191 = fmul float %187, 0.000000e+00
>  %192 = fadd float %191, %190
>  %193 = fmul float %189, 0x3FE279A740000000
>  %194 = fadd float %192, %193
>  %195 = call float @llvm.AMDIL.clamp.(float %194, float 0.000000e+00, float 1.000000e+00)
>  %196 = fmul float %185, 0xBFDA20BDA0000000
>  %197 = fmul float %187, 0x3FE6A09E60000000
>  %198 = fadd float %197, %196
>  %199 = fmul float %189, 0x3FE279A740000000
>  %200 = fadd float %198, %199
>  %201 = call float @llvm.AMDIL.clamp.(float %200, float 0.000000e+00, float 1.000000e+00)
>  %202 = fmul float %185, 0xBFDA20BD20000000
>  %203 = fmul float %187, 0xBFE6A09E80000000
>  %204 = fadd float %203, %202
>  %205 = fmul float %189, 0x3FE279A740000000
>  %206 = fadd float %204, %205
>  %207 = call float @llvm.AMDIL.clamp.(float %206, float 0.000000e+00, float 1.000000e+00)
>  %208 = fmul float %195, %195
>  %209 = fmul float %201, %201
>  %210 = fmul float %207, %207
>  %211 = fmul float %114, %209
>  %212 = fmul float %115, %209
>  %213 = fmul float %116, %209
>  %214 = fmul float %208, %122
>  %215 = fadd float %214, %211
>  %216 = fmul float %208, %123
>  %217 = fadd float %216, %212
>  %218 = fmul float %208, %124
>  %219 = fadd float %218, %213
>  %220 = fmul float %208, 1.000000e+00
>  %221 = fmul float %209, 1.000000e+00
>  %222 = fadd float %221, %220
>  %223 = fmul float %210, 1.000000e+00
>  %224 = fadd float %222, %223
>  %225 = fmul float %210, %130
>  %226 = fadd float %225, %215
>  %227 = fmul float %210, %131
>  %228 = fadd float %227, %217
>  %229 = fmul float %210, %132
>  %230 = fadd float %229, %219
>  %231 = fdiv float 1.000000e+00, %224
>  %232 = fmul float %231, %29
>  %233 = fmul float %231, %31
>  %234 = fmul float %231, %33
>  %235 = fmul float %226, %232
>  %236 = fmul float %228, %233
>  %237 = fmul float %230, %234
>  %238 = fsub float -0.000000e+00, %146
>  %239 = fadd float %138, %238
>  %240 = fsub float -0.000000e+00, %147
>  %241 = fadd float %139, %240
>  %242 = fsub float -0.000000e+00, %148
>  %243 = fadd float %140, %242
>  %244 = fmul float %171, %239
>  %245 = fadd float %244, %146
>  %246 = fmul float %171, %241
>  %247 = fadd float %246, %147
>  %248 = fmul float %171, %243
>  %249 = fadd float %248, %148
>  %250 = fmul float %245, %68
>  %251 = fmul float %247, %69
>  %252 = fmul float %249, %70
>  %253 = fsub float -0.000000e+00, %23
>  %254 = fmul float %77, %27
>  %255 = fadd float %254, %253
>  %256 = fmul float %235, %250
>  %257 = fmul float %236, %251
>  %258 = fmul float %237, %252
>  %259 = fcmp uge float %255, %25
>  %260 = select i1 %259, float %25, float %255
>  %261 = call float @llvm.AMDIL.clamp.(float %260, float 0.000000e+00, float 1.000000e+00)
>  %262 = fsub float -0.000000e+00, %43
>  %263 = fmul float %256, %262
>  %264 = fadd float %263, %37
>  %265 = fsub float -0.000000e+00, %43
>  %266 = fmul float %257, %265
>  %267 = fadd float %266, %39
>  %268 = fsub float -0.000000e+00, %43
>  %269 = fmul float %258, %268
>  %270 = fadd float %269, %41
>  %271 = fmul float %261, %261
>  %272 = fmul float %264, %271
>  %273 = fmul float %267, %271
>  %274 = fmul float %270, %271
>  %275 = fmul float %71, %35
>  %276 = fmul float %256, %43
>  %277 = fadd float %276, %272
>  %278 = fmul float %257, %43
>  %279 = fadd float %278, %273
>  %280 = fmul float %258, %43
>  %281 = fadd float %280, %274
>  %282 = fmul float %149, %275
>  %283 = call i32 @llvm.SI.packf16(float %277, float %279)
>  %284 = bitcast i32 %283 to float
>  %285 = call i32 @llvm.SI.packf16(float %281, float %282)
>  %286 = bitcast i32 %285 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %284, float %286, float %284, float %286)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8141b02
>c8151b03
>c8101a02
>c8111a03
>c0840308
>c0c60510
>bf8c007f
>f0800300
>00430504
>bf8c0770
>08080b06
>d2060804
>02010104
>060a0d05
>d2060805
>02010105
>080a0905
>7e0a5505
>c8180400
>c8190401
>08080906
>10080b04
>d2060804
>02010104
>7e0a02ff
>40400000
>d2820005
>0415eb04
>10080904
>10080905
>c8180900
>c8190901
>c8140800
>c8150801
>c084030c
>c0c60518
>bf8c007f
>f0800700
>00430705
>bf8c0770
>06141108
>061414f3
>c8300d00
>c8310d01
>c82c0c00
>c82d0c01
>c0840310
>c0c60520
>bf8c007f
>f0800700
>00430b0b
>bf8c0770
>061c190c
>061c1cf3
>081c150e
>d282000f
>042a1d04
>06140f07
>061414f3
>061c170b
>061c1cf3
>081c150e
>d2820011
>042a1d04
>101422ff
>bed105ed
>7e1c02ff
>3f3504f3
>d282000a
>042a1d0f
>060e1309
>060e0ef3
>06101b0d
>061010f3
>08100f08
>d2820012
>041e1104
>7e2602ff
>3f13cd3a
>d2820007
>042a2712
>d2060810
>02010107
>100e2110
>c8241602
>c8251603
>c8201702
>c8211703
>c0840304
>c0c60508
>bf8c007f
>f0800700
>00430808
>bf8c0770
>10280f09
>101622ff
>3f5105ec
>d282000b
>042d010f
>d282000b
>042e2712
>d206080b
>0201010b
>1016170b
>c8341502
>c8351503
>c8301402
>c8311403
>f0800700
>00430c0c
>bf8c0770
>d2820017
>04521b0b
>102222ff
>bed105e9
>7e2802ff
>bf3504f4
>d282000f
>0446290f
>d282000f
>043e2712
>d206080f
>0201010f
>10261f0f
>c8481902
>c8491903
>c8441802
>c8451803
>f0800700
>00431411
>bf8c0770
>d2820003
>045e2b13
>d2820002
>042e2110
>d2820002
>040a1f0f
>7e045502
>c0400100
>bf8c007f
>c0038131
>bf8c007f
>101e0407
>10061f03
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430f05
>c0840314
>c0c60528
>bf8c0070
>f0800700
>00431705
>bf8c0770
>080a2118
>d2820005
>04420b04
>c8180100
>c8190101
>100a0d05
>100a0b03
>c0010178
>bf8c007f
>10060a02
>c0018175
>bf8c007f
>080c0603
>c80c1300
>c80d1301
>c001812f
>bf8c007f
>10060603
>c001812c
>bf8c007f
>0a060603
>c001812e
>bf8c007f
>d00c0004
>02000703
>7e340203
>d2000003
>00123503
>d2060803
>02010103
>10060703
>100c0706
>d2820005
>04180505
>100c0f08
>d2820006
>041a190b
>d2820006
>041a2913
>c0018130
>bf8c007f
>10340403
>100c3506
>08341f17
>d282001a
>043e3504
>c86c0000
>c86d0001
>1034371a
>100c3506
>10340c02
>c0018174
>bf8c007f
>08343403
>1034071a
>d2820006
>04680506
>5e0a0b06
>100c0f0a
>d2820006
>041a1d0b
>d2820006
>041a2d13
>c0018132
>bf8c007f
>10040403
>10040506
>080c2319
>d2820004
>04460d04
>c8180200
>c8190201
>10080d04
>10040902
>10080402
>c0018176
>bf8c007f
>08080803
>10060704
>d2820002
>040c0502
>c80c0300
>c80d0301
>c0000133
>bf8c007f
>10000600
>10000112
>5e000102
>f8001c0f
>00050005
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL IN[4]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], COLOR[1]
>DCL OUT[3], CLIPVERTEX
>DCL OUT[4], GENERIC[19]
>DCL OUT[5], GENERIC[20]
>DCL OUT[6], GENERIC[21]
>DCL OUT[7], GENERIC[22]
>DCL OUT[8], GENERIC[23]
>DCL CONST[0..51]
>DCL TEMP[0..11], LOCAL
>  0: MAD TEMP[0], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  1: DP4 TEMP[1].x, TEMP[0], CONST[48]
>  2: DP4 TEMP[2].x, TEMP[0], CONST[49]
>  3: MOV TEMP[1].y, TEMP[2].xxxx
>  4: DP4 TEMP[2].x, TEMP[0], CONST[50]
>  5: MOV TEMP[1].z, TEMP[2].xxxx
>  6: DP4 TEMP[2].x, TEMP[0], CONST[4]
>  7: DP4 TEMP[3].x, TEMP[0], CONST[5]
>  8: MOV TEMP[2].y, TEMP[3].xxxx
>  9: DP4 TEMP[4].x, TEMP[0], CONST[6]
> 10: MOV TEMP[2].z, TEMP[4].xxxx
> 11: DP4 TEMP[5].x, TEMP[0], CONST[7]
> 12: MOV TEMP[2].w, TEMP[5].xxxx
> 13: ADD TEMP[6].xy, IN[3].xyyy, IN[2].xyyy
> 14: DP4 TEMP[0].x, TEMP[0], CONST[12]
> 15: ADD TEMP[7].xy, TEMP[6].yxxx, IN[3].yxxx
> 16: MOV TEMP[6].zw, TEMP[7].yyxy
> 17: MOV TEMP[6], TEMP[6]
> 18: MAD TEMP[8].x, -TEMP[0].xxxx, CONST[16].wwww, CONST[16].xxxx
> 19: ADD TEMP[7].xy, TEMP[7].yxxx, IN[3].xyyy
> 20: MAX TEMP[8].xyz, TEMP[8].xxxx, CONST[16].zzzz
> 21: MOV TEMP[1].w, TEMP[0].xxxx
> 22: MOV TEMP[0].yzw, TEMP[8].yxyz
> 23: MOV TEMP[8].xy, IN[1].xyxx
> 24: MUL TEMP[9], IN[1].xyxx, CONST[0].yyxx
> 25: MOV TEMP[7].zw, IN[1].yyxy
> 26: MAD TEMP[10], CONST[47].wwww, CONST[0].xxxy, CONST[0].yyyx
> 27: MOV TEMP[0].x, IN[4].wwww
> 28: MOV TEMP[11], TEMP[2]
> 29: MAD TEMP[4].x, TEMP[4].xxxx, CONST[0].zzzz, -TEMP[5].xxxx
> 30: MOV TEMP[2].z, TEMP[4].xxxx
> 31: MOV TEMP[2].y, -TEMP[3].xxxx
> 32: MAD TEMP[2].xy, CONST[51].xyyy, TEMP[5].xxxx, TEMP[2].xyyy
> 33: MOV_SAT OUT[2], TEMP[0]
> 34: MOV OUT[4], TEMP[8]
> 35: MOV OUT[5], TEMP[9]
> 36: MOV OUT[7], TEMP[6]
> 37: MOV OUT[8], TEMP[7]
> 38: MOV OUT[0], TEMP[2]
> 39: MOV OUT[6], TEMP[1]
> 40: MOV OUT[3], TEMP[11]
> 41: MOV_SAT OUT[1], TEMP[10]
> 42: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 16
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 17
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 18
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 19
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 20
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 21
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 22
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 23
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 24
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 25
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 26
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 27
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 28
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 29
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 30
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 31
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 48
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 49
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 50
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 51
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 64
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 66
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 67
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 191
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 192
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 193
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 194
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 195
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 196
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 197
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 198
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 199
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 200
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 201
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 202
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 203
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 204
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 205
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %94 = load <16 x i8> addrspace(2)* %93, !tbaa !0
>  %95 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %94, i32 0, i32 %5)
>  %96 = extractelement <4 x float> %95, i32 0
>  %97 = extractelement <4 x float> %95, i32 1
>  %98 = extractelement <4 x float> %95, i32 2
>  %99 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %100 = load <16 x i8> addrspace(2)* %99, !tbaa !0
>  %101 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %100, i32 0, i32 %5)
>  %102 = extractelement <4 x float> %101, i32 0
>  %103 = extractelement <4 x float> %101, i32 1
>  %104 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %105 = load <16 x i8> addrspace(2)* %104, !tbaa !0
>  %106 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %105, i32 0, i32 %5)
>  %107 = extractelement <4 x float> %106, i32 0
>  %108 = extractelement <4 x float> %106, i32 1
>  %109 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %110 = load <16 x i8> addrspace(2)* %109, !tbaa !0
>  %111 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %110, i32 0, i32 %5)
>  %112 = extractelement <4 x float> %111, i32 0
>  %113 = extractelement <4 x float> %111, i32 1
>  %114 = getelementptr <16 x i8> addrspace(2)* %3, i32 4
>  %115 = load <16 x i8> addrspace(2)* %114, !tbaa !0
>  %116 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %115, i32 0, i32 %5)
>  %117 = extractelement <4 x float> %116, i32 3
>  %118 = fmul float %96, %14
>  %119 = fadd float %118, %12
>  %120 = fmul float %97, %14
>  %121 = fadd float %120, %12
>  %122 = fmul float %98, %14
>  %123 = fadd float %122, %12
>  %124 = fmul float %96, %12
>  %125 = fadd float %124, %14
>  %126 = fmul float %119, %66
>  %127 = fmul float %121, %68
>  %128 = fadd float %126, %127
>  %129 = fmul float %123, %70
>  %130 = fadd float %128, %129
>  %131 = fmul float %125, %72
>  %132 = fadd float %130, %131
>  %133 = fmul float %119, %74
>  %134 = fmul float %121, %76
>  %135 = fadd float %133, %134
>  %136 = fmul float %123, %78
>  %137 = fadd float %135, %136
>  %138 = fmul float %125, %80
>  %139 = fadd float %137, %138
>  %140 = fmul float %119, %82
>  %141 = fmul float %121, %84
>  %142 = fadd float %140, %141
>  %143 = fmul float %123, %86
>  %144 = fadd float %142, %143
>  %145 = fmul float %125, %88
>  %146 = fadd float %144, %145
>  %147 = fmul float %119, %18
>  %148 = fmul float %121, %20
>  %149 = fadd float %147, %148
>  %150 = fmul float %123, %22
>  %151 = fadd float %149, %150
>  %152 = fmul float %125, %24
>  %153 = fadd float %151, %152
>  %154 = fmul float %119, %26
>  %155 = fmul float %121, %28
>  %156 = fadd float %154, %155
>  %157 = fmul float %123, %30
>  %158 = fadd float %156, %157
>  %159 = fmul float %125, %32
>  %160 = fadd float %158, %159
>  %161 = fmul float %119, %34
>  %162 = fmul float %121, %36
>  %163 = fadd float %161, %162
>  %164 = fmul float %123, %38
>  %165 = fadd float %163, %164
>  %166 = fmul float %125, %40
>  %167 = fadd float %165, %166
>  %168 = fmul float %119, %42
>  %169 = fmul float %121, %44
>  %170 = fadd float %168, %169
>  %171 = fmul float %123, %46
>  %172 = fadd float %170, %171
>  %173 = fmul float %125, %48
>  %174 = fadd float %172, %173
>  %175 = fadd float %112, %107
>  %176 = fadd float %113, %108
>  %177 = fmul float %119, %50
>  %178 = fmul float %121, %52
>  %179 = fadd float %177, %178
>  %180 = fmul float %123, %54
>  %181 = fadd float %179, %180
>  %182 = fmul float %125, %56
>  %183 = fadd float %181, %182
>  %184 = fadd float %176, %113
>  %185 = fadd float %175, %112
>  %186 = fsub float -0.000000e+00, %183
>  %187 = fmul float %186, %62
>  %188 = fadd float %187, %58
>  %189 = fadd float %185, %112
>  %190 = fadd float %184, %113
>  %191 = fcmp uge float %188, %60
>  %192 = select i1 %191, float %188, float %60
>  %193 = fcmp uge float %188, %60
>  %194 = select i1 %193, float %188, float %60
>  %195 = fcmp uge float %188, %60
>  %196 = select i1 %195, float %188, float %60
>  %197 = fmul float %102, %14
>  %198 = fmul float %103, %14
>  %199 = fmul float %102, %12
>  %200 = fmul float %102, %12
>  %201 = fmul float %64, %12
>  %202 = fadd float %201, %14
>  %203 = fmul float %64, %12
>  %204 = fadd float %203, %14
>  %205 = fmul float %64, %12
>  %206 = fadd float %205, %14
>  %207 = fmul float %64, %14
>  %208 = fadd float %207, %12
>  %209 = fsub float -0.000000e+00, %174
>  %210 = fmul float %167, %16
>  %211 = fadd float %210, %209
>  %212 = fsub float -0.000000e+00, %160
>  %213 = fmul float %90, %174
>  %214 = fadd float %213, %153
>  %215 = fmul float %92, %174
>  %216 = fadd float %215, %212
>  %217 = call float @llvm.AMDIL.clamp.(float %117, float 0.000000e+00, float 1.000000e+00)
>  %218 = call float @llvm.AMDIL.clamp.(float %192, float 0.000000e+00, float 1.000000e+00)
>  %219 = call float @llvm.AMDIL.clamp.(float %194, float 0.000000e+00, float 1.000000e+00)
>  %220 = call float @llvm.AMDIL.clamp.(float %196, float 0.000000e+00, float 1.000000e+00)
>  %221 = call float @llvm.AMDIL.clamp.(float %202, float 0.000000e+00, float 1.000000e+00)
>  %222 = call float @llvm.AMDIL.clamp.(float %204, float 0.000000e+00, float 1.000000e+00)
>  %223 = call float @llvm.AMDIL.clamp.(float %206, float 0.000000e+00, float 1.000000e+00)
>  %224 = call float @llvm.AMDIL.clamp.(float %208, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %221, float %222, float %223, float %224)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %217, float %218, float %219, float %220)
>  %225 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %226 = load float addrspace(2)* addrspace(2)* %225, !tbaa !0
>  %227 = getelementptr float addrspace(2)* %226, i32 0
>  %228 = load float addrspace(2)* %227, !tbaa !0
>  %229 = fmul float %228, %153
>  %230 = getelementptr float addrspace(2)* %226, i32 1
>  %231 = load float addrspace(2)* %230, !tbaa !0
>  %232 = fmul float %231, %160
>  %233 = fadd float %229, %232
>  %234 = getelementptr float addrspace(2)* %226, i32 2
>  %235 = load float addrspace(2)* %234, !tbaa !0
>  %236 = fmul float %235, %167
>  %237 = fadd float %233, %236
>  %238 = getelementptr float addrspace(2)* %226, i32 3
>  %239 = load float addrspace(2)* %238, !tbaa !0
>  %240 = fmul float %239, %174
>  %241 = fadd float %237, %240
>  %242 = getelementptr float addrspace(2)* %226, i32 4
>  %243 = load float addrspace(2)* %242, !tbaa !0
>  %244 = fmul float %243, %153
>  %245 = getelementptr float addrspace(2)* %226, i32 5
>  %246 = load float addrspace(2)* %245, !tbaa !0
>  %247 = fmul float %246, %160
>  %248 = fadd float %244, %247
>  %249 = getelementptr float addrspace(2)* %226, i32 6
>  %250 = load float addrspace(2)* %249, !tbaa !0
>  %251 = fmul float %250, %167
>  %252 = fadd float %248, %251
>  %253 = getelementptr float addrspace(2)* %226, i32 7
>  %254 = load float addrspace(2)* %253, !tbaa !0
>  %255 = fmul float %254, %174
>  %256 = fadd float %252, %255
>  %257 = getelementptr float addrspace(2)* %226, i32 8
>  %258 = load float addrspace(2)* %257, !tbaa !0
>  %259 = fmul float %258, %153
>  %260 = getelementptr float addrspace(2)* %226, i32 9
>  %261 = load float addrspace(2)* %260, !tbaa !0
>  %262 = fmul float %261, %160
>  %263 = fadd float %259, %262
>  %264 = getelementptr float addrspace(2)* %226, i32 10
>  %265 = load float addrspace(2)* %264, !tbaa !0
>  %266 = fmul float %265, %167
>  %267 = fadd float %263, %266
>  %268 = getelementptr float addrspace(2)* %226, i32 11
>  %269 = load float addrspace(2)* %268, !tbaa !0
>  %270 = fmul float %269, %174
>  %271 = fadd float %267, %270
>  %272 = getelementptr float addrspace(2)* %226, i32 12
>  %273 = load float addrspace(2)* %272, !tbaa !0
>  %274 = fmul float %273, %153
>  %275 = getelementptr float addrspace(2)* %226, i32 13
>  %276 = load float addrspace(2)* %275, !tbaa !0
>  %277 = fmul float %276, %160
>  %278 = fadd float %274, %277
>  %279 = getelementptr float addrspace(2)* %226, i32 14
>  %280 = load float addrspace(2)* %279, !tbaa !0
>  %281 = fmul float %280, %167
>  %282 = fadd float %278, %281
>  %283 = getelementptr float addrspace(2)* %226, i32 15
>  %284 = load float addrspace(2)* %283, !tbaa !0
>  %285 = fmul float %284, %174
>  %286 = fadd float %282, %285
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %241, float %256, float %271, float %286)
>  %287 = getelementptr float addrspace(2)* %226, i32 16
>  %288 = load float addrspace(2)* %287, !tbaa !0
>  %289 = fmul float %288, %153
>  %290 = getelementptr float addrspace(2)* %226, i32 17
>  %291 = load float addrspace(2)* %290, !tbaa !0
>  %292 = fmul float %291, %160
>  %293 = fadd float %289, %292
>  %294 = getelementptr float addrspace(2)* %226, i32 18
>  %295 = load float addrspace(2)* %294, !tbaa !0
>  %296 = fmul float %295, %167
>  %297 = fadd float %293, %296
>  %298 = getelementptr float addrspace(2)* %226, i32 19
>  %299 = load float addrspace(2)* %298, !tbaa !0
>  %300 = fmul float %299, %174
>  %301 = fadd float %297, %300
>  %302 = getelementptr float addrspace(2)* %226, i32 20
>  %303 = load float addrspace(2)* %302, !tbaa !0
>  %304 = fmul float %303, %153
>  %305 = getelementptr float addrspace(2)* %226, i32 21
>  %306 = load float addrspace(2)* %305, !tbaa !0
>  %307 = fmul float %306, %160
>  %308 = fadd float %304, %307
>  %309 = getelementptr float addrspace(2)* %226, i32 22
>  %310 = load float addrspace(2)* %309, !tbaa !0
>  %311 = fmul float %310, %167
>  %312 = fadd float %308, %311
>  %313 = getelementptr float addrspace(2)* %226, i32 23
>  %314 = load float addrspace(2)* %313, !tbaa !0
>  %315 = fmul float %314, %174
>  %316 = fadd float %312, %315
>  %317 = getelementptr float addrspace(2)* %226, i32 24
>  %318 = load float addrspace(2)* %317, !tbaa !0
>  %319 = fmul float %318, %153
>  %320 = getelementptr float addrspace(2)* %226, i32 25
>  %321 = load float addrspace(2)* %320, !tbaa !0
>  %322 = fmul float %321, %160
>  %323 = fadd float %319, %322
>  %324 = getelementptr float addrspace(2)* %226, i32 26
>  %325 = load float addrspace(2)* %324, !tbaa !0
>  %326 = fmul float %325, %167
>  %327 = fadd float %323, %326
>  %328 = getelementptr float addrspace(2)* %226, i32 27
>  %329 = load float addrspace(2)* %328, !tbaa !0
>  %330 = fmul float %329, %174
>  %331 = fadd float %327, %330
>  %332 = getelementptr float addrspace(2)* %226, i32 28
>  %333 = load float addrspace(2)* %332, !tbaa !0
>  %334 = fmul float %333, %153
>  %335 = getelementptr float addrspace(2)* %226, i32 29
>  %336 = load float addrspace(2)* %335, !tbaa !0
>  %337 = fmul float %336, %160
>  %338 = fadd float %334, %337
>  %339 = getelementptr float addrspace(2)* %226, i32 30
>  %340 = load float addrspace(2)* %339, !tbaa !0
>  %341 = fmul float %340, %167
>  %342 = fadd float %338, %341
>  %343 = getelementptr float addrspace(2)* %226, i32 31
>  %344 = load float addrspace(2)* %343, !tbaa !0
>  %345 = fmul float %344, %174
>  %346 = fadd float %342, %345
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %301, float %316, float %331, float %346)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %102, float %103, float %196, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %197, float %198, float %199, float %200)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %132, float %139, float %146, float %183)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 37, i32 0, float %175, float %176, float %184, float %185)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 38, i32 0, float %189, float %190, float %102, float %103)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %214, float %216, float %211, float %174)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0410100
>bf8c007f
>c00403bf
>c0020300
>bf8c007f
>7e060204
>c0028301
>bf8c007f
>7e080205
>d2820001
>040e0808
>d2060801
>02010101
>d2820002
>04120608
>d2060802
>02010102
>f800020f
>01020202
>c0840700
>bf8c000f
>e00c2000
>80020500
>bf8c0770
>d2820001
>040c0b05
>d2820002
>040c0b06
>c0040331
>bf8c007f
>10120408
>c0040330
>bf8c007f
>d2820009
>04241101
>d2820003
>040c0b07
>c0040332
>bf8c007f
>d2820009
>04241103
>d2820004
>04100905
>c0040333
>bf8c007f
>d2820005
>04241104
>c0040343
>bf8c007f
>100c0a08
>c0040340
>bf8c007f
>080c0c08
>c0040342
>bf8c007f
>d00c000a
>02001106
>7e0e0208
>d200000a
>002a0d07
>d2060806
>0201010a
>c0840710
>bf8c007f
>e00c2000
>80020b00
>bf8c0770
>d2060807
>0201010e
>f800021f
>06060607
>c0040311
>bf8c000f
>100c0408
>c0040310
>bf8c007f
>d2820006
>04181101
>c0040312
>bf8c007f
>d2820006
>04181103
>c0040313
>bf8c007f
>d2820006
>04181104
>c0040315
>bf8c007f
>100e0408
>c0040314
>bf8c007f
>d2820007
>041c1101
>c0040316
>bf8c007f
>d2820007
>041c1103
>c0040317
>bf8c007f
>d2820007
>041c1104
>c0400102
>bf8c007f
>c004010d
>bf8c007f
>10100e08
>c004010c
>bf8c007f
>d2820009
>04220c08
>c0040319
>bf8c007f
>10100408
>c0040318
>bf8c007f
>d2820008
>04201101
>c004031a
>bf8c007f
>d2820008
>04201103
>c004031b
>bf8c007f
>d2820008
>04201104
>c004010e
>bf8c007f
>d282000b
>04261008
>c004031d
>bf8c007f
>10120408
>c004031c
>bf8c007f
>d2820009
>04241101
>c004031e
>bf8c007f
>d2820009
>04241103
>c004031f
>bf8c007f
>d2820009
>04241104
>c004010f
>bf8c007f
>d282000b
>042e1208
>c0040109
>bf8c007f
>10180e08
>c0040108
>bf8c007f
>d282000c
>04320c08
>c004010a
>bf8c007f
>d282000c
>04321008
>c004010b
>bf8c007f
>d282000c
>04321208
>c0040105
>bf8c007f
>101a0e08
>c0040104
>bf8c007f
>d282000d
>04360c08
>c0040106
>bf8c007f
>d282000d
>04361008
>c0040107
>bf8c007f
>d282000d
>04361208
>c0040101
>bf8c007f
>101c0e08
>c0040100
>bf8c007f
>d282000e
>043a0c08
>c0040102
>bf8c007f
>d282000e
>043a1008
>c0040103
>bf8c007f
>d282000e
>043a1208
>f80000ef
>0b0c0d0e
>c004011d
>bf8c000f
>10160e08
>c004011c
>bf8c007f
>d282000b
>042e0c08
>c004011e
>bf8c007f
>d282000b
>042e1008
>c004011f
>bf8c007f
>d282000b
>042e1208
>c0040119
>bf8c007f
>10180e08
>c0040118
>bf8c007f
>d282000c
>04320c08
>c004011a
>bf8c007f
>d282000c
>04321008
>c004011b
>bf8c007f
>d282000c
>04321208
>c0040115
>bf8c007f
>101a0e08
>c0040114
>bf8c007f
>d282000d
>04360c08
>c0040116
>bf8c007f
>d282000d
>04361008
>c0040117
>bf8c007f
>d282000d
>04361208
>c0040111
>bf8c007f
>101c0e08
>c0040110
>bf8c007f
>d282000e
>043a0c08
>c0040112
>bf8c007f
>d282000e
>043a1008
>c0000113
>bf8c007f
>d282000e
>043a1200
>f80000ff
>0b0c0d0e
>c0840704
>bf8c000f
>e00c2000
>80020b00
>7e1e0280
>bf8c0770
>f800022f
>0f0a0c0b
>bf8c070f
>10141604
>101e1805
>10201605
>f800023f
>0a0a0f10
>c00003c9
>bf8c000f
>10140400
>c00003c8
>bf8c007f
>d282000a
>04280101
>c00003ca
>bf8c007f
>d282000a
>04280103
>c00003cb
>bf8c007f
>d282000a
>04280104
>c00003c5
>bf8c007f
>101e0400
>c00003c4
>bf8c007f
>d282000f
>043c0101
>c00003c6
>bf8c007f
>d282000f
>043c0103
>c00003c7
>bf8c007f
>d282000f
>043c0104
>c00003c1
>bf8c007f
>10040400
>c00003c0
>bf8c007f
>d2820001
>04080101
>c00003c2
>bf8c007f
>d2820001
>04040103
>c00003c3
>bf8c007f
>d2820001
>04040104
>f800024f
>050a0f01
>c0840708
>bf8c000f
>e00c2000
>80020f00
>c082070c
>bf8c0070
>e00c2000
>80010000
>bf8c0770
>060a1f00
>06080105
>06142101
>061e030a
>f800025f
>040f0a05
>bf8c070f
>060a030f
>06000104
>f800026f
>0c0b0500
>c00003cc
>bf8c000f
>d2820000
>041a1200
>c0000302
>bf8c007f
>10021000
>08021301
>c00003cd
>bf8c007f
>10041200
>08040f02
>f80008cf
>09010200
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], COLOR[1], COLOR
>DCL IN[2], GENERIC[19], PERSPECTIVE
>DCL IN[3], GENERIC[20], PERSPECTIVE
>DCL IN[4], GENERIC[21], PERSPECTIVE, CENTROID
>DCL IN[5], GENERIC[22], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL CONST[0..30]
>DCL TEMP[0..5], LOCAL
>DCL TEMP[6], ARRAY(1), LOCAL
>IMM[0] FLT32 {   -2.0000,     3.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[5].zwww
>  1: TEX TEMP[0].xy, TEMP[0], SAMP[2], 2D
>  2: MOV TEMP[1].xy, IN[2].xyyy
>  3: TEX TEMP[1].xyz, TEMP[1], SAMP[3], 2D
>  4: MOV TEMP[2].xy, IN[2].xyyy
>  5: TEX TEMP[2], TEMP[2], SAMP[0], 2D
>  6: MOV TEMP[3].xy, IN[4].xyyy
>  7: TEX TEMP[3].xyz, TEMP[3], SAMP[1], 2D
>  8: ADD TEMP[4].x, TEMP[0].xxxx, TEMP[0].yyyy
>  9: ADD TEMP[5].x, -TEMP[0].xxxx, TEMP[0].yyyy
> 10: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 11: MOV_SAT TEMP[4].x, TEMP[4].xxxx
> 12: ADD TEMP[4].x, TEMP[4].xxxx, -TEMP[5].xxxx
> 13: ADD TEMP[5].x, -TEMP[5].xxxx, IN[1].xxxx
> 14: RCP TEMP[4].x, TEMP[4].xxxx
> 15: MUL TEMP[4].x, TEMP[5].xxxx, TEMP[4].xxxx
> 16: MOV_SAT TEMP[4].x, TEMP[4].xxxx
> 17: MAD TEMP[5].x, TEMP[4].xxxx, IMM[0].xxxx, IMM[0].yyyy
> 18: MUL TEMP[4].x, TEMP[4].xxxx, TEMP[4].xxxx
> 19: MUL TEMP[4].x, TEMP[5].xxxx, TEMP[4].xxxx
> 20: ADD TEMP[5].xyz, TEMP[1].xyzz, -TEMP[2].xyzz
> 21: MAD TEMP[0].xyz, TEMP[4].xxxx, TEMP[5].xyzz, TEMP[2].xyzz
> 22: MUL TEMP[0].xyz, TEMP[0].xyzz, IN[0].xyzz
> 23: MUL TEMP[1].xyz, TEMP[3].xyzz, CONST[12].xyzz
> 24: MAD TEMP[3].x, IN[3].wwww, CONST[11].wwww, -CONST[11].xxxx
> 25: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xyzz
> 26: MIN TEMP[3].x, TEMP[3].xxxx, CONST[11].zzzz
> 27: MOV_SAT TEMP[3].x, TEMP[3].xxxx
> 28: MAD TEMP[1].xyz, TEMP[0].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 29: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[3].xxxx
> 30: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 31: MUL TEMP[3].x, IN[0].wwww, CONST[12].wwww
> 32: MAD TEMP[0].xyz, TEMP[0].xyzz, CONST[30].xxxx, TEMP[1].xyzz
> 33: MUL TEMP[1].x, TEMP[2].wwww, TEMP[3].xxxx
> 34: MOV TEMP[0].w, TEMP[1].xxxx
> 35: MOV TEMP[6], TEMP[0]
> 36: MOV OUT[0], TEMP[6]
> 37: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 44
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 46
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 47
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 48
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 49
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 50
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 51
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 116
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 117
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 118
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 120
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %45 = load <32 x i8> addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %47 = load <16 x i8> addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %49 = load <32 x i8> addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %51 = load <16 x i8> addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr <32 x i8> addrspace(2)* %2, i32 2
>  %53 = load <32 x i8> addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr <16 x i8> addrspace(2)* %1, i32 2
>  %55 = load <16 x i8> addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr <32 x i8> addrspace(2)* %2, i32 3
>  %57 = load <32 x i8> addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr <16 x i8> addrspace(2)* %1, i32 3
>  %59 = load <16 x i8> addrspace(2)* %58, !tbaa !0
>  %60 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %61 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %62 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %63 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %3, <2 x i32> %5)
>  %64 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %65 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %66 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %67 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %3, <2 x i32> %5)
>  %68 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %3, <2 x i32> %6)
>  %69 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %3, <2 x i32> %6)
>  %70 = call float @llvm.SI.fs.interp(i32 2, i32 5, i32 %3, <2 x i32> %6)
>  %71 = call float @llvm.SI.fs.interp(i32 3, i32 5, i32 %3, <2 x i32> %6)
>  %72 = bitcast float %70 to i32
>  %73 = bitcast float %71 to i32
>  %74 = insertelement <2 x i32> undef, i32 %72, i32 0
>  %75 = insertelement <2 x i32> %74, i32 %73, i32 1
>  %76 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %75, <32 x i8> %53, <16 x i8> %55, i32 2)
>  %77 = extractelement <4 x float> %76, i32 0
>  %78 = extractelement <4 x float> %76, i32 1
>  %79 = bitcast float %65 to i32
>  %80 = bitcast float %66 to i32
>  %81 = insertelement <2 x i32> undef, i32 %79, i32 0
>  %82 = insertelement <2 x i32> %81, i32 %80, i32 1
>  %83 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %82, <32 x i8> %57, <16 x i8> %59, i32 2)
>  %84 = extractelement <4 x float> %83, i32 0
>  %85 = extractelement <4 x float> %83, i32 1
>  %86 = extractelement <4 x float> %83, i32 2
>  %87 = bitcast float %65 to i32
>  %88 = bitcast float %66 to i32
>  %89 = insertelement <2 x i32> undef, i32 %87, i32 0
>  %90 = insertelement <2 x i32> %89, i32 %88, i32 1
>  %91 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %90, <32 x i8> %45, <16 x i8> %47, i32 2)
>  %92 = extractelement <4 x float> %91, i32 0
>  %93 = extractelement <4 x float> %91, i32 1
>  %94 = extractelement <4 x float> %91, i32 2
>  %95 = extractelement <4 x float> %91, i32 3
>  %96 = bitcast float %68 to i32
>  %97 = bitcast float %69 to i32
>  %98 = insertelement <2 x i32> undef, i32 %96, i32 0
>  %99 = insertelement <2 x i32> %98, i32 %97, i32 1
>  %100 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %99, <32 x i8> %49, <16 x i8> %51, i32 2)
>  %101 = extractelement <4 x float> %100, i32 0
>  %102 = extractelement <4 x float> %100, i32 1
>  %103 = extractelement <4 x float> %100, i32 2
>  %104 = fadd float %77, %78
>  %105 = fsub float -0.000000e+00, %77
>  %106 = fadd float %105, %78
>  %107 = call float @llvm.AMDIL.clamp.(float %106, float 0.000000e+00, float 1.000000e+00)
>  %108 = call float @llvm.AMDIL.clamp.(float %104, float 0.000000e+00, float 1.000000e+00)
>  %109 = fsub float -0.000000e+00, %107
>  %110 = fadd float %108, %109
>  %111 = fsub float -0.000000e+00, %107
>  %112 = fadd float %111, %64
>  %113 = fdiv float 1.000000e+00, %110
>  %114 = fmul float %112, %113
>  %115 = call float @llvm.AMDIL.clamp.(float %114, float 0.000000e+00, float 1.000000e+00)
>  %116 = fmul float %115, -2.000000e+00
>  %117 = fadd float %116, 3.000000e+00
>  %118 = fmul float %115, %115
>  %119 = fmul float %117, %118
>  %120 = fsub float -0.000000e+00, %92
>  %121 = fadd float %84, %120
>  %122 = fsub float -0.000000e+00, %93
>  %123 = fadd float %85, %122
>  %124 = fsub float -0.000000e+00, %94
>  %125 = fadd float %86, %124
>  %126 = fmul float %119, %121
>  %127 = fadd float %126, %92
>  %128 = fmul float %119, %123
>  %129 = fadd float %128, %93
>  %130 = fmul float %119, %125
>  %131 = fadd float %130, %94
>  %132 = fmul float %127, %60
>  %133 = fmul float %129, %61
>  %134 = fmul float %131, %62
>  %135 = fmul float %101, %29
>  %136 = fmul float %102, %31
>  %137 = fmul float %103, %33
>  %138 = fsub float -0.000000e+00, %23
>  %139 = fmul float %67, %27
>  %140 = fadd float %139, %138
>  %141 = fmul float %132, %135
>  %142 = fmul float %133, %136
>  %143 = fmul float %134, %137
>  %144 = fcmp uge float %140, %25
>  %145 = select i1 %144, float %25, float %140
>  %146 = call float @llvm.AMDIL.clamp.(float %145, float 0.000000e+00, float 1.000000e+00)
>  %147 = fsub float -0.000000e+00, %43
>  %148 = fmul float %141, %147
>  %149 = fadd float %148, %37
>  %150 = fsub float -0.000000e+00, %43
>  %151 = fmul float %142, %150
>  %152 = fadd float %151, %39
>  %153 = fsub float -0.000000e+00, %43
>  %154 = fmul float %143, %153
>  %155 = fadd float %154, %41
>  %156 = fmul float %146, %146
>  %157 = fmul float %149, %156
>  %158 = fmul float %152, %156
>  %159 = fmul float %155, %156
>  %160 = fmul float %63, %35
>  %161 = fmul float %141, %43
>  %162 = fadd float %161, %157
>  %163 = fmul float %142, %43
>  %164 = fadd float %163, %158
>  %165 = fmul float %143, %43
>  %166 = fadd float %165, %159
>  %167 = fmul float %95, %160
>  %168 = call i32 @llvm.SI.packf16(float %162, float %164)
>  %169 = bitcast i32 %168 to float
>  %170 = call i32 @llvm.SI.packf16(float %166, float %167)
>  %171 = bitcast i32 %170 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %169, float %171, float %169, float %171)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8141702
>c8151703
>c8101602
>c8111603
>c0840308
>c0c60510
>bf8c007f
>f0800300
>00430504
>bf8c0770
>08080b06
>d2060804
>02010104
>060a0d05
>d2060805
>02010105
>080a0905
>7e0a5505
>c8180400
>c8190401
>08080906
>10080b04
>d2060804
>02010104
>7e0a02ff
>40400000
>d2820005
>0415eb04
>10080904
>10100905
>c8280900
>c8290901
>c8240800
>c8250801
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430409
>c084030c
>c0c60518
>bf8c0070
>f0800700
>00430909
>bf8c0770
>08180b0a
>d282000c
>04161908
>c8340100
>c8350101
>101e1b0c
>c8341102
>c8351103
>c8301002
>c8311003
>c0840304
>c0c60508
>bf8c007f
>f0800700
>00430c0c
>c0400100
>bf8c0070
>c0010131
>bf8c007f
>10041a02
>1006050f
>c0010178
>bf8c007f
>10040602
>c0018175
>bf8c007f
>081e0403
>c8080f00
>c8090f01
>c001812f
>bf8c007f
>10040403
>c001812c
>bf8c007f
>0a040403
>c001812e
>bf8c007f
>d00c0004
>02000702
>7e200203
>d2000002
>00122102
>d2060802
>02010102
>10040502
>101e050f
>d2820003
>043c0503
>081e0909
>d282000f
>04121f08
>c8400000
>c8410001
>101e210f
>c0018130
>bf8c007f
>10201803
>101e210f
>10201e02
>c0018174
>bf8c007f
>08202003
>10200510
>d282000f
>0440050f
>5e06070f
>08120d0b
>d2820008
>041a1308
>c8240200
>c8250201
>10101308
>c0018132
>bf8c007f
>10121c03
>10101308
>10121002
>c0018176
>bf8c007f
>08121203
>10040509
>d2820002
>04080508
>c8200300
>c8210301
>c0000133
>bf8c007f
>10001000
>10000107
>5e000102
>f8001c0f
>00030003
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], COLOR[1]
>DCL OUT[3], CLIPVERTEX
>DCL OUT[4], GENERIC[19]
>DCL OUT[5], GENERIC[20]
>DCL OUT[6], GENERIC[21]
>DCL OUT[7], GENERIC[22]
>DCL CONST[0..51]
>DCL TEMP[0..10], LOCAL
>  0: MAD TEMP[0], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  1: DP4 TEMP[1].x, TEMP[0], CONST[48]
>  2: DP4 TEMP[2].x, TEMP[0], CONST[49]
>  3: MOV TEMP[1].y, TEMP[2].xxxx
>  4: DP4 TEMP[2].x, TEMP[0], CONST[50]
>  5: MOV TEMP[1].z, TEMP[2].xxxx
>  6: DP4 TEMP[2].x, TEMP[0], CONST[4]
>  7: DP4 TEMP[3].x, TEMP[0], CONST[5]
>  8: MOV TEMP[2].y, TEMP[3].xxxx
>  9: DP4 TEMP[4].x, TEMP[0], CONST[6]
> 10: MOV TEMP[2].z, TEMP[4].xxxx
> 11: DP4 TEMP[5].x, TEMP[0], CONST[12]
> 12: DP4 TEMP[0].x, TEMP[0], CONST[7]
> 13: MOV TEMP[2].w, TEMP[0].xxxx
> 14: MAD TEMP[6].x, -TEMP[5].xxxx, CONST[16].wwww, CONST[16].xxxx
> 15: MOV TEMP[1].w, TEMP[5].xxxx
> 16: MAX TEMP[5].xyz, TEMP[6].xxxx, CONST[16].zzzz
> 17: MOV TEMP[5].yzw, TEMP[5].yxyz
> 18: MOV TEMP[6].xy, IN[1].xyxx
> 19: MUL TEMP[7], IN[2].xyxx, CONST[0].yyxx
> 20: MUL TEMP[8], IN[1].xxxy, CONST[0].xxyy
> 21: MAD TEMP[9], CONST[47].wwww, CONST[0].xxxy, CONST[0].yyyx
> 22: MOV TEMP[5].x, IN[3].wwww
> 23: MOV TEMP[10], TEMP[2]
> 24: MAD TEMP[4].x, TEMP[4].xxxx, CONST[0].zzzz, -TEMP[0].xxxx
> 25: MOV TEMP[2].z, TEMP[4].xxxx
> 26: MOV TEMP[2].y, -TEMP[3].xxxx
> 27: MAD TEMP[2].xy, CONST[51].xyyy, TEMP[0].xxxx, TEMP[2].xyyy
> 28: MOV_SAT OUT[2], TEMP[5]
> 29: MOV OUT[4], TEMP[6]
> 30: MOV OUT[6], TEMP[7]
> 31: MOV OUT[7], TEMP[8]
> 32: MOV OUT[0], TEMP[2]
> 33: MOV OUT[5], TEMP[1]
> 34: MOV OUT[3], TEMP[10]
> 35: MOV_SAT OUT[1], TEMP[9]
> 36: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 16
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 17
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 18
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 19
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 20
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 21
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 22
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 23
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 24
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 25
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 26
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 27
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 28
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 29
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 30
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 31
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 48
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 49
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 50
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 51
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 64
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 66
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 67
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 191
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 192
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 193
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 194
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 195
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 196
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 197
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 198
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 199
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 200
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 201
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 202
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 203
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 204
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 205
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %94 = load <16 x i8> addrspace(2)* %93, !tbaa !0
>  %95 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %94, i32 0, i32 %5)
>  %96 = extractelement <4 x float> %95, i32 0
>  %97 = extractelement <4 x float> %95, i32 1
>  %98 = extractelement <4 x float> %95, i32 2
>  %99 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %100 = load <16 x i8> addrspace(2)* %99, !tbaa !0
>  %101 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %100, i32 0, i32 %5)
>  %102 = extractelement <4 x float> %101, i32 0
>  %103 = extractelement <4 x float> %101, i32 1
>  %104 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %105 = load <16 x i8> addrspace(2)* %104, !tbaa !0
>  %106 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %105, i32 0, i32 %5)
>  %107 = extractelement <4 x float> %106, i32 0
>  %108 = extractelement <4 x float> %106, i32 1
>  %109 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %110 = load <16 x i8> addrspace(2)* %109, !tbaa !0
>  %111 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %110, i32 0, i32 %5)
>  %112 = extractelement <4 x float> %111, i32 3
>  %113 = fmul float %96, %14
>  %114 = fadd float %113, %12
>  %115 = fmul float %97, %14
>  %116 = fadd float %115, %12
>  %117 = fmul float %98, %14
>  %118 = fadd float %117, %12
>  %119 = fmul float %96, %12
>  %120 = fadd float %119, %14
>  %121 = fmul float %114, %66
>  %122 = fmul float %116, %68
>  %123 = fadd float %121, %122
>  %124 = fmul float %118, %70
>  %125 = fadd float %123, %124
>  %126 = fmul float %120, %72
>  %127 = fadd float %125, %126
>  %128 = fmul float %114, %74
>  %129 = fmul float %116, %76
>  %130 = fadd float %128, %129
>  %131 = fmul float %118, %78
>  %132 = fadd float %130, %131
>  %133 = fmul float %120, %80
>  %134 = fadd float %132, %133
>  %135 = fmul float %114, %82
>  %136 = fmul float %116, %84
>  %137 = fadd float %135, %136
>  %138 = fmul float %118, %86
>  %139 = fadd float %137, %138
>  %140 = fmul float %120, %88
>  %141 = fadd float %139, %140
>  %142 = fmul float %114, %18
>  %143 = fmul float %116, %20
>  %144 = fadd float %142, %143
>  %145 = fmul float %118, %22
>  %146 = fadd float %144, %145
>  %147 = fmul float %120, %24
>  %148 = fadd float %146, %147
>  %149 = fmul float %114, %26
>  %150 = fmul float %116, %28
>  %151 = fadd float %149, %150
>  %152 = fmul float %118, %30
>  %153 = fadd float %151, %152
>  %154 = fmul float %120, %32
>  %155 = fadd float %153, %154
>  %156 = fmul float %114, %34
>  %157 = fmul float %116, %36
>  %158 = fadd float %156, %157
>  %159 = fmul float %118, %38
>  %160 = fadd float %158, %159
>  %161 = fmul float %120, %40
>  %162 = fadd float %160, %161
>  %163 = fmul float %114, %50
>  %164 = fmul float %116, %52
>  %165 = fadd float %163, %164
>  %166 = fmul float %118, %54
>  %167 = fadd float %165, %166
>  %168 = fmul float %120, %56
>  %169 = fadd float %167, %168
>  %170 = fmul float %114, %42
>  %171 = fmul float %116, %44
>  %172 = fadd float %170, %171
>  %173 = fmul float %118, %46
>  %174 = fadd float %172, %173
>  %175 = fmul float %120, %48
>  %176 = fadd float %174, %175
>  %177 = fsub float -0.000000e+00, %169
>  %178 = fmul float %177, %62
>  %179 = fadd float %178, %58
>  %180 = fcmp uge float %179, %60
>  %181 = select i1 %180, float %179, float %60
>  %182 = fcmp uge float %179, %60
>  %183 = select i1 %182, float %179, float %60
>  %184 = fcmp uge float %179, %60
>  %185 = select i1 %184, float %179, float %60
>  %186 = fmul float %107, %14
>  %187 = fmul float %108, %14
>  %188 = fmul float %107, %12
>  %189 = fmul float %107, %12
>  %190 = fmul float %102, %12
>  %191 = fmul float %102, %12
>  %192 = fmul float %102, %14
>  %193 = fmul float %103, %14
>  %194 = fmul float %64, %12
>  %195 = fadd float %194, %14
>  %196 = fmul float %64, %12
>  %197 = fadd float %196, %14
>  %198 = fmul float %64, %12
>  %199 = fadd float %198, %14
>  %200 = fmul float %64, %14
>  %201 = fadd float %200, %12
>  %202 = fsub float -0.000000e+00, %176
>  %203 = fmul float %162, %16
>  %204 = fadd float %203, %202
>  %205 = fsub float -0.000000e+00, %155
>  %206 = fmul float %90, %176
>  %207 = fadd float %206, %148
>  %208 = fmul float %92, %176
>  %209 = fadd float %208, %205
>  %210 = call float @llvm.AMDIL.clamp.(float %112, float 0.000000e+00, float 1.000000e+00)
>  %211 = call float @llvm.AMDIL.clamp.(float %181, float 0.000000e+00, float 1.000000e+00)
>  %212 = call float @llvm.AMDIL.clamp.(float %183, float 0.000000e+00, float 1.000000e+00)
>  %213 = call float @llvm.AMDIL.clamp.(float %185, float 0.000000e+00, float 1.000000e+00)
>  %214 = call float @llvm.AMDIL.clamp.(float %195, float 0.000000e+00, float 1.000000e+00)
>  %215 = call float @llvm.AMDIL.clamp.(float %197, float 0.000000e+00, float 1.000000e+00)
>  %216 = call float @llvm.AMDIL.clamp.(float %199, float 0.000000e+00, float 1.000000e+00)
>  %217 = call float @llvm.AMDIL.clamp.(float %201, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %214, float %215, float %216, float %217)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %210, float %211, float %212, float %213)
>  %218 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %219 = load float addrspace(2)* addrspace(2)* %218, !tbaa !0
>  %220 = getelementptr float addrspace(2)* %219, i32 0
>  %221 = load float addrspace(2)* %220, !tbaa !0
>  %222 = fmul float %221, %148
>  %223 = getelementptr float addrspace(2)* %219, i32 1
>  %224 = load float addrspace(2)* %223, !tbaa !0
>  %225 = fmul float %224, %155
>  %226 = fadd float %222, %225
>  %227 = getelementptr float addrspace(2)* %219, i32 2
>  %228 = load float addrspace(2)* %227, !tbaa !0
>  %229 = fmul float %228, %162
>  %230 = fadd float %226, %229
>  %231 = getelementptr float addrspace(2)* %219, i32 3
>  %232 = load float addrspace(2)* %231, !tbaa !0
>  %233 = fmul float %232, %176
>  %234 = fadd float %230, %233
>  %235 = getelementptr float addrspace(2)* %219, i32 4
>  %236 = load float addrspace(2)* %235, !tbaa !0
>  %237 = fmul float %236, %148
>  %238 = getelementptr float addrspace(2)* %219, i32 5
>  %239 = load float addrspace(2)* %238, !tbaa !0
>  %240 = fmul float %239, %155
>  %241 = fadd float %237, %240
>  %242 = getelementptr float addrspace(2)* %219, i32 6
>  %243 = load float addrspace(2)* %242, !tbaa !0
>  %244 = fmul float %243, %162
>  %245 = fadd float %241, %244
>  %246 = getelementptr float addrspace(2)* %219, i32 7
>  %247 = load float addrspace(2)* %246, !tbaa !0
>  %248 = fmul float %247, %176
>  %249 = fadd float %245, %248
>  %250 = getelementptr float addrspace(2)* %219, i32 8
>  %251 = load float addrspace(2)* %250, !tbaa !0
>  %252 = fmul float %251, %148
>  %253 = getelementptr float addrspace(2)* %219, i32 9
>  %254 = load float addrspace(2)* %253, !tbaa !0
>  %255 = fmul float %254, %155
>  %256 = fadd float %252, %255
>  %257 = getelementptr float addrspace(2)* %219, i32 10
>  %258 = load float addrspace(2)* %257, !tbaa !0
>  %259 = fmul float %258, %162
>  %260 = fadd float %256, %259
>  %261 = getelementptr float addrspace(2)* %219, i32 11
>  %262 = load float addrspace(2)* %261, !tbaa !0
>  %263 = fmul float %262, %176
>  %264 = fadd float %260, %263
>  %265 = getelementptr float addrspace(2)* %219, i32 12
>  %266 = load float addrspace(2)* %265, !tbaa !0
>  %267 = fmul float %266, %148
>  %268 = getelementptr float addrspace(2)* %219, i32 13
>  %269 = load float addrspace(2)* %268, !tbaa !0
>  %270 = fmul float %269, %155
>  %271 = fadd float %267, %270
>  %272 = getelementptr float addrspace(2)* %219, i32 14
>  %273 = load float addrspace(2)* %272, !tbaa !0
>  %274 = fmul float %273, %162
>  %275 = fadd float %271, %274
>  %276 = getelementptr float addrspace(2)* %219, i32 15
>  %277 = load float addrspace(2)* %276, !tbaa !0
>  %278 = fmul float %277, %176
>  %279 = fadd float %275, %278
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %234, float %249, float %264, float %279)
>  %280 = getelementptr float addrspace(2)* %219, i32 16
>  %281 = load float addrspace(2)* %280, !tbaa !0
>  %282 = fmul float %281, %148
>  %283 = getelementptr float addrspace(2)* %219, i32 17
>  %284 = load float addrspace(2)* %283, !tbaa !0
>  %285 = fmul float %284, %155
>  %286 = fadd float %282, %285
>  %287 = getelementptr float addrspace(2)* %219, i32 18
>  %288 = load float addrspace(2)* %287, !tbaa !0
>  %289 = fmul float %288, %162
>  %290 = fadd float %286, %289
>  %291 = getelementptr float addrspace(2)* %219, i32 19
>  %292 = load float addrspace(2)* %291, !tbaa !0
>  %293 = fmul float %292, %176
>  %294 = fadd float %290, %293
>  %295 = getelementptr float addrspace(2)* %219, i32 20
>  %296 = load float addrspace(2)* %295, !tbaa !0
>  %297 = fmul float %296, %148
>  %298 = getelementptr float addrspace(2)* %219, i32 21
>  %299 = load float addrspace(2)* %298, !tbaa !0
>  %300 = fmul float %299, %155
>  %301 = fadd float %297, %300
>  %302 = getelementptr float addrspace(2)* %219, i32 22
>  %303 = load float addrspace(2)* %302, !tbaa !0
>  %304 = fmul float %303, %162
>  %305 = fadd float %301, %304
>  %306 = getelementptr float addrspace(2)* %219, i32 23
>  %307 = load float addrspace(2)* %306, !tbaa !0
>  %308 = fmul float %307, %176
>  %309 = fadd float %305, %308
>  %310 = getelementptr float addrspace(2)* %219, i32 24
>  %311 = load float addrspace(2)* %310, !tbaa !0
>  %312 = fmul float %311, %148
>  %313 = getelementptr float addrspace(2)* %219, i32 25
>  %314 = load float addrspace(2)* %313, !tbaa !0
>  %315 = fmul float %314, %155
>  %316 = fadd float %312, %315
>  %317 = getelementptr float addrspace(2)* %219, i32 26
>  %318 = load float addrspace(2)* %317, !tbaa !0
>  %319 = fmul float %318, %162
>  %320 = fadd float %316, %319
>  %321 = getelementptr float addrspace(2)* %219, i32 27
>  %322 = load float addrspace(2)* %321, !tbaa !0
>  %323 = fmul float %322, %176
>  %324 = fadd float %320, %323
>  %325 = getelementptr float addrspace(2)* %219, i32 28
>  %326 = load float addrspace(2)* %325, !tbaa !0
>  %327 = fmul float %326, %148
>  %328 = getelementptr float addrspace(2)* %219, i32 29
>  %329 = load float addrspace(2)* %328, !tbaa !0
>  %330 = fmul float %329, %155
>  %331 = fadd float %327, %330
>  %332 = getelementptr float addrspace(2)* %219, i32 30
>  %333 = load float addrspace(2)* %332, !tbaa !0
>  %334 = fmul float %333, %162
>  %335 = fadd float %331, %334
>  %336 = getelementptr float addrspace(2)* %219, i32 31
>  %337 = load float addrspace(2)* %336, !tbaa !0
>  %338 = fmul float %337, %176
>  %339 = fadd float %335, %338
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %294, float %309, float %324, float %339)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %102, float %103, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %127, float %134, float %141, float %169)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %186, float %187, float %188, float %189)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 37, i32 0, float %190, float %191, float %192, float %193)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %207, float %209, float %204, float %176)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0410100
>bf8c007f
>c00403bf
>c0020300
>bf8c007f
>7e060204
>c0028301
>bf8c007f
>7e080205
>d2820001
>040e0808
>d2060801
>02010101
>d2820002
>04120608
>d2060802
>02010102
>f800020f
>01020202
>c0840700
>bf8c000f
>e00c2000
>80020500
>bf8c0770
>d2820001
>040c0b05
>d2820002
>040c0b06
>c0040331
>bf8c007f
>10120408
>c0040330
>bf8c007f
>d2820009
>04241101
>d2820003
>040c0b07
>c0040332
>bf8c007f
>d2820009
>04241103
>d2820004
>04100905
>c0040333
>bf8c007f
>d2820005
>04241104
>c0040343
>bf8c007f
>100c0a08
>c0040340
>bf8c007f
>080c0c08
>c0040342
>bf8c007f
>d00c000a
>02001106
>7e0e0208
>d2000006
>002a0d07
>d2060806
>02010106
>c084070c
>bf8c007f
>e00c2000
>80020700
>bf8c0770
>d2060807
>0201010a
>f800021f
>06060607
>c0040311
>bf8c000f
>100c0408
>c0040310
>bf8c007f
>d2820006
>04181101
>c0040312
>bf8c007f
>d2820006
>04181103
>c0040313
>bf8c007f
>d2820006
>04181104
>c0040315
>bf8c007f
>100e0408
>c0040314
>bf8c007f
>d2820007
>041c1101
>c0040316
>bf8c007f
>d2820007
>041c1103
>c0040317
>bf8c007f
>d2820007
>041c1104
>c0400102
>bf8c007f
>c004010d
>bf8c007f
>10100e08
>c004010c
>bf8c007f
>d2820009
>04220c08
>c0040319
>bf8c007f
>10100408
>c0040318
>bf8c007f
>d2820008
>04201101
>c004031a
>bf8c007f
>d2820008
>04201103
>c004031b
>bf8c007f
>d2820008
>04201104
>c004010e
>bf8c007f
>d282000a
>04261008
>c004031d
>bf8c007f
>10120408
>c004031c
>bf8c007f
>d2820009
>04241101
>c004031e
>bf8c007f
>d2820009
>04241103
>c004031f
>bf8c007f
>d2820009
>04241104
>c004010f
>bf8c007f
>d282000a
>042a1208
>c0040109
>bf8c007f
>10160e08
>c0040108
>bf8c007f
>d282000b
>042e0c08
>c004010a
>bf8c007f
>d282000b
>042e1008
>c004010b
>bf8c007f
>d282000b
>042e1208
>c0040105
>bf8c007f
>10180e08
>c0040104
>bf8c007f
>d282000c
>04320c08
>c0040106
>bf8c007f
>d282000c
>04321008
>c0040107
>bf8c007f
>d282000c
>04321208
>c0040101
>bf8c007f
>101a0e08
>c0040100
>bf8c007f
>d282000d
>04360c08
>c0040102
>bf8c007f
>d282000d
>04361008
>c0040103
>bf8c007f
>d282000d
>04361208
>f80000ef
>0a0b0c0d
>c004011d
>bf8c000f
>10140e08
>c004011c
>bf8c007f
>d282000a
>042a0c08
>c004011e
>bf8c007f
>d282000a
>042a1008
>c004011f
>bf8c007f
>d282000a
>042a1208
>c0040119
>bf8c007f
>10160e08
>c0040118
>bf8c007f
>d282000b
>042e0c08
>c004011a
>bf8c007f
>d282000b
>042e1008
>c004011b
>bf8c007f
>d282000b
>042e1208
>c0040115
>bf8c007f
>10180e08
>c0040114
>bf8c007f
>d282000c
>04320c08
>c0040116
>bf8c007f
>d282000c
>04321008
>c0040117
>bf8c007f
>d282000c
>04321208
>c0040111
>bf8c007f
>101a0e08
>c0040110
>bf8c007f
>d282000d
>04360c08
>c0040112
>bf8c007f
>d282000d
>04361008
>c0000113
>bf8c007f
>d282000d
>04361200
>f80000ff
>0a0b0c0d
>c0840704
>bf8c000f
>e00c2000
>80020a00
>7e1c0280
>bf8c0770
>f800022f
>0e0e0b0a
>c00003c9
>bf8c000f
>101c0400
>c00003c8
>bf8c007f
>d282000e
>04380101
>c00003ca
>bf8c007f
>d282000e
>04380103
>c00003cb
>bf8c007f
>d282000e
>04380104
>c00003c5
>bf8c007f
>101e0400
>c00003c4
>bf8c007f
>d282000f
>043c0101
>c00003c6
>bf8c007f
>d282000f
>043c0103
>c00003c7
>bf8c007f
>d282000f
>043c0104
>c00003c1
>bf8c007f
>10040400
>c00003c0
>bf8c007f
>d2820001
>04080101
>c00003c2
>bf8c007f
>d2820001
>04040103
>c00003c3
>bf8c007f
>d2820001
>04040104
>f800023f
>050e0f01
>c0840708
>bf8c000f
>e00c2000
>80020000
>bf8c0770
>10080004
>100a0205
>10000005
>f800024f
>04040500
>bf8c070f
>10001605
>10021405
>10041404
>f800025f
>00010202
>c00003cc
>bf8c000f
>d2820000
>041a1200
>c0000302
>bf8c007f
>10021000
>08021301
>c00003cd
>bf8c007f
>10041200
>08040f02
>f80008cf
>09010200
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], GENERIC[19], PERSPECTIVE
>DCL IN[2], GENERIC[20], PERSPECTIVE
>DCL IN[3], GENERIC[21], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL CONST[0..30]
>DCL TEMP[0..3], LOCAL
>DCL TEMP[4], ARRAY(1), LOCAL
>  0: MOV TEMP[0].xy, IN[1].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MOV TEMP[1].xy, IN[3].xyyy
>  3: TEX TEMP[2].xyz, TEMP[1], SAMP[1], 2D
>  4: MUL TEMP[2].xyz, TEMP[2].xyzz, CONST[12].xyzz
>  5: MAD TEMP[3].x, IN[2].wwww, CONST[11].wwww, -CONST[11].xxxx
>  6: MUL TEMP[1].xyz, TEMP[0].xyzz, IN[0].xyzz
>  7: MIN TEMP[3].x, TEMP[3].xxxx, CONST[11].zzzz
>  8: MOV_SAT TEMP[3].x, TEMP[3].xxxx
>  9: MUL TEMP[1].xyz, TEMP[2].xyzz, TEMP[1].xyzz
> 10: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[3].xxxx
> 11: MAD TEMP[2].xyz, TEMP[1].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 12: MUL TEMP[2].xyz, TEMP[3].xxxx, TEMP[2].xyzz
> 13: MUL TEMP[3].x, IN[0].wwww, CONST[12].wwww
> 14: MAD TEMP[1].xyz, TEMP[1].xyzz, CONST[30].xxxx, TEMP[2].xyzz
> 15: MUL TEMP[0].x, TEMP[0].wwww, TEMP[3].xxxx
> 16: MOV TEMP[1].w, TEMP[0].xxxx
> 17: MOV TEMP[4], TEMP[1]
> 18: MOV OUT[0], TEMP[4]
> 19: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 44
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 46
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 47
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 48
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 49
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 50
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 51
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 116
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 117
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 118
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 120
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %45 = load <32 x i8> addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %47 = load <16 x i8> addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %49 = load <32 x i8> addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %51 = load <16 x i8> addrspace(2)* %50, !tbaa !0
>  %52 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %53 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %54 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %55 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %3, <2 x i32> %5)
>  %56 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %57 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %58 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %3, <2 x i32> %5)
>  %59 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %3, <2 x i32> %6)
>  %60 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %3, <2 x i32> %6)
>  %61 = bitcast float %56 to i32
>  %62 = bitcast float %57 to i32
>  %63 = insertelement <2 x i32> undef, i32 %61, i32 0
>  %64 = insertelement <2 x i32> %63, i32 %62, i32 1
>  %65 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %64, <32 x i8> %45, <16 x i8> %47, i32 2)
>  %66 = extractelement <4 x float> %65, i32 0
>  %67 = extractelement <4 x float> %65, i32 1
>  %68 = extractelement <4 x float> %65, i32 2
>  %69 = extractelement <4 x float> %65, i32 3
>  %70 = bitcast float %59 to i32
>  %71 = bitcast float %60 to i32
>  %72 = insertelement <2 x i32> undef, i32 %70, i32 0
>  %73 = insertelement <2 x i32> %72, i32 %71, i32 1
>  %74 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %73, <32 x i8> %49, <16 x i8> %51, i32 2)
>  %75 = extractelement <4 x float> %74, i32 0
>  %76 = extractelement <4 x float> %74, i32 1
>  %77 = extractelement <4 x float> %74, i32 2
>  %78 = fmul float %75, %29
>  %79 = fmul float %76, %31
>  %80 = fmul float %77, %33
>  %81 = fsub float -0.000000e+00, %23
>  %82 = fmul float %58, %27
>  %83 = fadd float %82, %81
>  %84 = fmul float %66, %52
>  %85 = fmul float %67, %53
>  %86 = fmul float %68, %54
>  %87 = fcmp uge float %83, %25
>  %88 = select i1 %87, float %25, float %83
>  %89 = call float @llvm.AMDIL.clamp.(float %88, float 0.000000e+00, float 1.000000e+00)
>  %90 = fmul float %78, %84
>  %91 = fmul float %79, %85
>  %92 = fmul float %80, %86
>  %93 = fmul float %89, %89
>  %94 = fsub float -0.000000e+00, %43
>  %95 = fmul float %90, %94
>  %96 = fadd float %95, %37
>  %97 = fsub float -0.000000e+00, %43
>  %98 = fmul float %91, %97
>  %99 = fadd float %98, %39
>  %100 = fsub float -0.000000e+00, %43
>  %101 = fmul float %92, %100
>  %102 = fadd float %101, %41
>  %103 = fmul float %93, %96
>  %104 = fmul float %93, %99
>  %105 = fmul float %93, %102
>  %106 = fmul float %55, %35
>  %107 = fmul float %90, %43
>  %108 = fadd float %107, %103
>  %109 = fmul float %91, %43
>  %110 = fadd float %109, %104
>  %111 = fmul float %92, %43
>  %112 = fadd float %111, %105
>  %113 = fmul float %69, %106
>  %114 = fcmp uge float %113, 0x3FDFDFE000000000
>  %115 = sext i1 %114 to i32
>  %116 = trunc i32 %115 to i1
>  %117 = select i1 %116, float 1.000000e+00, float -1.000000e+00
>  call void @llvm.AMDGPU.kill(float %117)
>  %118 = call i32 @llvm.SI.packf16(float %108, float %110)
>  %119 = bitcast i32 %118 to float
>  %120 = call i32 @llvm.SI.packf16(float %112, float %113)
>  %121 = bitcast i32 %120 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %119, float %121, float %119, float %121)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.AMDGPU.kill(float)
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8140500
>c8150501
>c8100400
>c8110401
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430404
>c8200300
>c8210301
>c0400100
>bf8c0070
>c0038133
>bf8c007f
>10101007
>10101107
>7e1202ff
>3efeff00
>d00c0008
>02021308
>d2000009
>0021e4f3
>7c261280
>c8240100
>c8250101
>10181305
>c8280d02
>c8290d03
>c8240c02
>c8250c03
>c0840304
>c0c60508
>bf8c007f
>f0800700
>00430909
>c0010131
>bf8c0070
>10041402
>10061902
>c0010178
>bf8c007f
>10040602
>c0018175
>bf8c007f
>08180403
>c8080b00
>c8090b01
>c001812f
>bf8c007f
>10040403
>c001812c
>bf8c007f
>0a040403
>c001812e
>bf8c007f
>d00c0004
>02000702
>7e1a0203
>d2000002
>00121b02
>d2060802
>02010102
>10040502
>10181902
>d2820003
>04300503
>c8300000
>c8310001
>10181904
>c0018130
>bf8c007f
>101a1203
>1018190d
>101a1802
>c0018174
>bf8c007f
>081a1a03
>101a1b02
>d282000c
>0434050c
>5e06070c
>c8300200
>c8310201
>10001906
>c0018132
>bf8c007f
>10021603
>10000101
>10020002
>c0000176
>bf8c007f
>08020200
>10020302
>d2820000
>04040500
>5e001100
>f8001c0f
>00030003
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], GENERIC[19], PERSPECTIVE
>DCL IN[2], GENERIC[20], PERSPECTIVE, CENTROID
>DCL IN[3], GENERIC[21], PERSPECTIVE, CENTROID
>DCL IN[4], GENERIC[22], PERSPECTIVE, CENTROID
>DCL IN[5], GENERIC[23], PERSPECTIVE, CENTROID
>DCL IN[6], GENERIC[24], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL CONST[0..3]
>DCL TEMP[0..4], LOCAL
>DCL TEMP[5], ARRAY(1), LOCAL
>IMM[0] FLT32 {    0.2000,     1.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[2].xyyy
>  1: TEX TEMP[0].w, TEMP[0], SAMP[0], 2D
>  2: MOV TEMP[1].xy, IN[4].xyyy
>  3: TEX TEMP[1].w, TEMP[1], SAMP[0], 2D
>  4: MOV TEMP[2].xy, IN[5].xyyy
>  5: TEX TEMP[2].w, TEMP[2], SAMP[0], 2D
>  6: MOV TEMP[3].xy, IN[6].xyyy
>  7: TEX TEMP[3].w, TEMP[3], SAMP[0], 2D
>  8: MOV TEMP[4].xy, IN[3].xyyy
>  9: TEX TEMP[4].w, TEMP[4], SAMP[0], 2D
> 10: ADD TEMP[4].x, TEMP[0].wwww, TEMP[4].wwww
> 11: ADD TEMP[1].x, TEMP[1].wwww, TEMP[4].xxxx
> 12: ADD TEMP[1].x, TEMP[2].wwww, TEMP[1].xxxx
> 13: ADD TEMP[1].x, TEMP[3].wwww, TEMP[1].xxxx
> 14: MAD TEMP[1].x, TEMP[1].xxxx, IMM[0].xxxx, -IN[0].wwww
> 15: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 16: MAD TEMP[2].x, IN[1].wwww, CONST[3].wwww, -CONST[3].xxxx
> 17: MIN TEMP[2].x, TEMP[2].xxxx, CONST[3].zzzz
> 18: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 19: MAD TEMP[0].xyz, TEMP[1].xxxx, CONST[1].xyzz, -TEMP[1].xxxx
> 20: ADD TEMP[1].x, -TEMP[2].xxxx, IMM[0].yyyy
> 21: ADD TEMP[0].xyz, TEMP[0].xyzz, IMM[0].yyyy
> 22: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 23: ADD TEMP[0].xyz, -TEMP[0].xyzz, IMM[0].yyyy
> 24: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 25: MAD TEMP[0].xyz, TEMP[0].xyzz, -TEMP[1].xxxx, IMM[0].yyyy
> 26: MOV TEMP[0].w, IMM[0].yyyy
> 27: MOV TEMP[5], TEMP[0]
> 28: MOV OUT[0], TEMP[5]
> 29: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 4
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 5
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 6
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 12
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 14
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 15
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %35 = load <32 x i8> addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %37 = load <16 x i8> addrspace(2)* %36, !tbaa !0
>  %38 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %3, <2 x i32> %5)
>  %39 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %3, <2 x i32> %5)
>  %40 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %6)
>  %41 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %6)
>  %42 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %3, <2 x i32> %6)
>  %43 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %3, <2 x i32> %6)
>  %44 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %3, <2 x i32> %6)
>  %45 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %3, <2 x i32> %6)
>  %46 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %3, <2 x i32> %6)
>  %47 = call float @llvm.SI.fs.interp(i32 1, i32 5, i32 %3, <2 x i32> %6)
>  %48 = call float @llvm.SI.fs.interp(i32 0, i32 6, i32 %3, <2 x i32> %6)
>  %49 = call float @llvm.SI.fs.interp(i32 1, i32 6, i32 %3, <2 x i32> %6)
>  %50 = bitcast float %40 to i32
>  %51 = bitcast float %41 to i32
>  %52 = insertelement <2 x i32> undef, i32 %50, i32 0
>  %53 = insertelement <2 x i32> %52, i32 %51, i32 1
>  %54 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %53, <32 x i8> %35, <16 x i8> %37, i32 2)
>  %55 = extractelement <4 x float> %54, i32 3
>  %56 = bitcast float %44 to i32
>  %57 = bitcast float %45 to i32
>  %58 = insertelement <2 x i32> undef, i32 %56, i32 0
>  %59 = insertelement <2 x i32> %58, i32 %57, i32 1
>  %60 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %59, <32 x i8> %35, <16 x i8> %37, i32 2)
>  %61 = extractelement <4 x float> %60, i32 3
>  %62 = bitcast float %46 to i32
>  %63 = bitcast float %47 to i32
>  %64 = insertelement <2 x i32> undef, i32 %62, i32 0
>  %65 = insertelement <2 x i32> %64, i32 %63, i32 1
>  %66 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %65, <32 x i8> %35, <16 x i8> %37, i32 2)
>  %67 = extractelement <4 x float> %66, i32 3
>  %68 = bitcast float %48 to i32
>  %69 = bitcast float %49 to i32
>  %70 = insertelement <2 x i32> undef, i32 %68, i32 0
>  %71 = insertelement <2 x i32> %70, i32 %69, i32 1
>  %72 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %71, <32 x i8> %35, <16 x i8> %37, i32 2)
>  %73 = extractelement <4 x float> %72, i32 3
>  %74 = bitcast float %42 to i32
>  %75 = bitcast float %43 to i32
>  %76 = insertelement <2 x i32> undef, i32 %74, i32 0
>  %77 = insertelement <2 x i32> %76, i32 %75, i32 1
>  %78 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %77, <32 x i8> %35, <16 x i8> %37, i32 2)
>  %79 = extractelement <4 x float> %78, i32 3
>  %80 = fadd float %55, %79
>  %81 = fadd float %61, %80
>  %82 = fadd float %67, %81
>  %83 = fadd float %73, %82
>  %84 = fsub float -0.000000e+00, %38
>  %85 = fmul float %83, 0x3FC99999A0000000
>  %86 = fadd float %85, %84
>  %87 = call float @llvm.AMDIL.clamp.(float %86, float 0.000000e+00, float 1.000000e+00)
>  %88 = fsub float -0.000000e+00, %29
>  %89 = fmul float %39, %33
>  %90 = fadd float %89, %88
>  %91 = fcmp uge float %90, %31
>  %92 = select i1 %91, float %31, float %90
>  %93 = call float @llvm.AMDIL.clamp.(float %92, float 0.000000e+00, float 1.000000e+00)
>  %94 = fsub float -0.000000e+00, %87
>  %95 = fmul float %87, %23
>  %96 = fadd float %95, %94
>  %97 = fsub float -0.000000e+00, %87
>  %98 = fmul float %87, %25
>  %99 = fadd float %98, %97
>  %100 = fsub float -0.000000e+00, %87
>  %101 = fmul float %87, %27
>  %102 = fadd float %101, %100
>  %103 = fsub float -0.000000e+00, %93
>  %104 = fadd float %103, 1.000000e+00
>  %105 = fadd float %96, 1.000000e+00
>  %106 = fadd float %99, 1.000000e+00
>  %107 = fadd float %102, 1.000000e+00
>  %108 = fmul float %104, %104
>  %109 = fsub float -0.000000e+00, %105
>  %110 = fadd float %109, 1.000000e+00
>  %111 = fsub float -0.000000e+00, %106
>  %112 = fadd float %111, 1.000000e+00
>  %113 = fsub float -0.000000e+00, %107
>  %114 = fadd float %113, 1.000000e+00
>  %115 = fmul float %108, %108
>  %116 = fsub float -0.000000e+00, %115
>  %117 = fmul float %110, %116
>  %118 = fadd float %117, 1.000000e+00
>  %119 = fsub float -0.000000e+00, %115
>  %120 = fmul float %112, %119
>  %121 = fadd float %120, 1.000000e+00
>  %122 = fsub float -0.000000e+00, %115
>  %123 = fmul float %114, %122
>  %124 = fadd float %123, 1.000000e+00
>  %125 = call i32 @llvm.SI.packf16(float %118, float %121)
>  %126 = bitcast i32 %125 to float
>  %127 = call i32 @llvm.SI.packf16(float %124, float 1.000000e+00)
>  %128 = bitcast i32 %127 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %126, float %128, float %126, float %128)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8140d02
>c8150d03
>c8100c02
>c8110c03
>c0840300
>c0c60500
>bf8c007f
>f0800800
>00430404
>c8180902
>c8190903
>c8140802
>c8150803
>f0800800
>00430505
>bf8c0770
>06080905
>c8181102
>c8191103
>c8141002
>c8151003
>f0800800
>00430505
>bf8c0770
>06080905
>c8181502
>c8191503
>c8141402
>c8151403
>f0800800
>00430505
>bf8c0770
>06080905
>c8181902
>c8191903
>c8141802
>c8151803
>f0800800
>00430205
>bf8c0770
>06040902
>100404ff
>3e4ccccd
>c80c0300
>c80d0301
>08040702
>d2060802
>02010102
>c0400100
>bf8c007f
>c0010105
>bf8c007f
>10060402
>08060503
>060606f2
>080606f2
>c8100700
>c8110701
>c001010f
>bf8c007f
>10000802
>c001010c
>bf8c007f
>0a000002
>c001010e
>bf8c007f
>d00c0004
>02000500
>7e020202
>d2000000
>00120300
>d2060800
>02010100
>080000f2
>10000100
>10000100
>10020103
>080202f2
>c0010104
>bf8c007f
>10060402
>08060503
>060606f2
>080606f2
>10060103
>080606f2
>5e020303
>c0000106
>bf8c007f
>10060400
>08040503
>060404f2
>080404f2
>10000102
>080000f2
>d25e0000
>0201e500
>f8001c0f
>00010001
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], CLIPVERTEX
>DCL OUT[3], GENERIC[19]
>DCL OUT[4], GENERIC[20]
>DCL OUT[5], GENERIC[21]
>DCL OUT[6], GENERIC[22]
>DCL OUT[7], GENERIC[23]
>DCL OUT[8], GENERIC[24]
>DCL CONST[0..55]
>DCL TEMP[0..10], LOCAL
>  0: MOV TEMP[0].w, CONST[0].yyyy
>  1: DP4 TEMP[0].x, IN[0], CONST[52]
>  2: DP4 TEMP[1].x, IN[0], CONST[53]
>  3: MOV TEMP[0].y, TEMP[1].xxxx
>  4: DP4 TEMP[1].x, IN[0], CONST[54]
>  5: MOV TEMP[0].z, TEMP[1].xxxx
>  6: DP4 TEMP[1].x, TEMP[0], CONST[8]
>  7: DP4 TEMP[2].x, TEMP[0], CONST[9]
>  8: MOV TEMP[1].y, TEMP[2].xxxx
>  9: DP4 TEMP[3].x, TEMP[0], CONST[10]
> 10: MOV TEMP[1].z, TEMP[3].xxxx
> 11: DP4 TEMP[4].x, TEMP[0], CONST[11]
> 12: MOV TEMP[1].w, TEMP[4].xxxx
> 13: DP4 TEMP[5].x, TEMP[0], CONST[13]
> 14: DP4 TEMP[6].x, IN[2], CONST[48]
> 15: DP4 TEMP[7].x, IN[2], CONST[49]
> 16: MOV TEMP[6].y, TEMP[7].xxxx
> 17: MOV TEMP[0].xyz, TEMP[0].xyzx
> 18: ADD TEMP[7].xy, TEMP[6].xyyy, CONST[50].xyyy
> 19: ADD TEMP[8].xy, TEMP[6].xyyy, -CONST[50].xyyy
> 20: ADD TEMP[9].xy, TEMP[6].xyyy, CONST[51].xyyy
> 21: ADD TEMP[10].xy, TEMP[6].xyyy, -CONST[51].xyyy
> 22: MOV TEMP[6].xy, TEMP[6].xyxx
> 23: MOV TEMP[0].w, TEMP[5].xxxx
> 24: MOV TEMP[5], TEMP[1]
> 25: MAD TEMP[3].x, TEMP[3].xxxx, CONST[0].zzzz, -TEMP[4].xxxx
> 26: MOV TEMP[1].z, TEMP[3].xxxx
> 27: MOV TEMP[1].y, -TEMP[2].xxxx
> 28: MAD TEMP[1].xy, CONST[55].xyyy, TEMP[4].xxxx, TEMP[1].xyyy
> 29: MOV OUT[4], TEMP[6]
> 30: MOV OUT[5], TEMP[7]
> 31: MOV OUT[6], TEMP[8]
> 32: MOV OUT[7], TEMP[9]
> 33: MOV OUT[0], TEMP[1]
> 34: MOV OUT[8], TEMP[10]
> 35: MOV OUT[2], TEMP[5]
> 36: MOV OUT[3], TEMP[0]
> 37: MOV_SAT OUT[1], IN[1]
> 38: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 1
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 2
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 32
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 33
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 34
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 35
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 36
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 37
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 38
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 39
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 40
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 41
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 42
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 43
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 44
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 45
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 46
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 47
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 52
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 53
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 54
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 55
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 192
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 193
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 194
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 195
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 196
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 197
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 198
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 199
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 200
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 201
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 204
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 205
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 208
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 209
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 210
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 211
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 212
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 213
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 214
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 215
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr float addrspace(2)* %10, i32 216
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = getelementptr float addrspace(2)* %10, i32 217
>  %98 = load float addrspace(2)* %97, !tbaa !0
>  %99 = getelementptr float addrspace(2)* %10, i32 218
>  %100 = load float addrspace(2)* %99, !tbaa !0
>  %101 = getelementptr float addrspace(2)* %10, i32 219
>  %102 = load float addrspace(2)* %101, !tbaa !0
>  %103 = getelementptr float addrspace(2)* %10, i32 220
>  %104 = load float addrspace(2)* %103, !tbaa !0
>  %105 = getelementptr float addrspace(2)* %10, i32 221
>  %106 = load float addrspace(2)* %105, !tbaa !0
>  %107 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %108 = load <16 x i8> addrspace(2)* %107, !tbaa !0
>  %109 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %108, i32 0, i32 %5)
>  %110 = extractelement <4 x float> %109, i32 0
>  %111 = extractelement <4 x float> %109, i32 1
>  %112 = extractelement <4 x float> %109, i32 2
>  %113 = extractelement <4 x float> %109, i32 3
>  %114 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %115 = load <16 x i8> addrspace(2)* %114, !tbaa !0
>  %116 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %115, i32 0, i32 %5)
>  %117 = extractelement <4 x float> %116, i32 0
>  %118 = extractelement <4 x float> %116, i32 1
>  %119 = extractelement <4 x float> %116, i32 2
>  %120 = extractelement <4 x float> %116, i32 3
>  %121 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %122 = load <16 x i8> addrspace(2)* %121, !tbaa !0
>  %123 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %122, i32 0, i32 %5)
>  %124 = extractelement <4 x float> %123, i32 0
>  %125 = extractelement <4 x float> %123, i32 1
>  %126 = extractelement <4 x float> %123, i32 2
>  %127 = extractelement <4 x float> %123, i32 3
>  %128 = fmul float %110, %80
>  %129 = fmul float %111, %82
>  %130 = fadd float %128, %129
>  %131 = fmul float %112, %84
>  %132 = fadd float %130, %131
>  %133 = fmul float %113, %86
>  %134 = fadd float %132, %133
>  %135 = fmul float %110, %88
>  %136 = fmul float %111, %90
>  %137 = fadd float %135, %136
>  %138 = fmul float %112, %92
>  %139 = fadd float %137, %138
>  %140 = fmul float %113, %94
>  %141 = fadd float %139, %140
>  %142 = fmul float %110, %96
>  %143 = fmul float %111, %98
>  %144 = fadd float %142, %143
>  %145 = fmul float %112, %100
>  %146 = fadd float %144, %145
>  %147 = fmul float %113, %102
>  %148 = fadd float %146, %147
>  %149 = fmul float %134, %16
>  %150 = fmul float %141, %18
>  %151 = fadd float %149, %150
>  %152 = fmul float %148, %20
>  %153 = fadd float %151, %152
>  %154 = fmul float %12, %22
>  %155 = fadd float %153, %154
>  %156 = fmul float %134, %24
>  %157 = fmul float %141, %26
>  %158 = fadd float %156, %157
>  %159 = fmul float %148, %28
>  %160 = fadd float %158, %159
>  %161 = fmul float %12, %30
>  %162 = fadd float %160, %161
>  %163 = fmul float %134, %32
>  %164 = fmul float %141, %34
>  %165 = fadd float %163, %164
>  %166 = fmul float %148, %36
>  %167 = fadd float %165, %166
>  %168 = fmul float %12, %38
>  %169 = fadd float %167, %168
>  %170 = fmul float %134, %40
>  %171 = fmul float %141, %42
>  %172 = fadd float %170, %171
>  %173 = fmul float %148, %44
>  %174 = fadd float %172, %173
>  %175 = fmul float %12, %46
>  %176 = fadd float %174, %175
>  %177 = fmul float %134, %48
>  %178 = fmul float %141, %50
>  %179 = fadd float %177, %178
>  %180 = fmul float %148, %52
>  %181 = fadd float %179, %180
>  %182 = fmul float %12, %54
>  %183 = fadd float %181, %182
>  %184 = fmul float %124, %56
>  %185 = fmul float %125, %58
>  %186 = fadd float %184, %185
>  %187 = fmul float %126, %60
>  %188 = fadd float %186, %187
>  %189 = fmul float %127, %62
>  %190 = fadd float %188, %189
>  %191 = fmul float %124, %64
>  %192 = fmul float %125, %66
>  %193 = fadd float %191, %192
>  %194 = fmul float %126, %68
>  %195 = fadd float %193, %194
>  %196 = fmul float %127, %70
>  %197 = fadd float %195, %196
>  %198 = fadd float %190, %72
>  %199 = fadd float %197, %74
>  %200 = fsub float -0.000000e+00, %72
>  %201 = fadd float %190, %200
>  %202 = fsub float -0.000000e+00, %74
>  %203 = fadd float %197, %202
>  %204 = fadd float %190, %76
>  %205 = fadd float %197, %78
>  %206 = fsub float -0.000000e+00, %76
>  %207 = fadd float %190, %206
>  %208 = fsub float -0.000000e+00, %78
>  %209 = fadd float %197, %208
>  %210 = fsub float -0.000000e+00, %176
>  %211 = fmul float %169, %14
>  %212 = fadd float %211, %210
>  %213 = fsub float -0.000000e+00, %162
>  %214 = fmul float %104, %176
>  %215 = fadd float %214, %155
>  %216 = fmul float %106, %176
>  %217 = fadd float %216, %213
>  %218 = call float @llvm.AMDIL.clamp.(float %117, float 0.000000e+00, float 1.000000e+00)
>  %219 = call float @llvm.AMDIL.clamp.(float %118, float 0.000000e+00, float 1.000000e+00)
>  %220 = call float @llvm.AMDIL.clamp.(float %119, float 0.000000e+00, float 1.000000e+00)
>  %221 = call float @llvm.AMDIL.clamp.(float %120, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %218, float %219, float %220, float %221)
>  %222 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %223 = load float addrspace(2)* addrspace(2)* %222, !tbaa !0
>  %224 = getelementptr float addrspace(2)* %223, i32 0
>  %225 = load float addrspace(2)* %224, !tbaa !0
>  %226 = fmul float %225, %155
>  %227 = getelementptr float addrspace(2)* %223, i32 1
>  %228 = load float addrspace(2)* %227, !tbaa !0
>  %229 = fmul float %228, %162
>  %230 = fadd float %226, %229
>  %231 = getelementptr float addrspace(2)* %223, i32 2
>  %232 = load float addrspace(2)* %231, !tbaa !0
>  %233 = fmul float %232, %169
>  %234 = fadd float %230, %233
>  %235 = getelementptr float addrspace(2)* %223, i32 3
>  %236 = load float addrspace(2)* %235, !tbaa !0
>  %237 = fmul float %236, %176
>  %238 = fadd float %234, %237
>  %239 = getelementptr float addrspace(2)* %223, i32 4
>  %240 = load float addrspace(2)* %239, !tbaa !0
>  %241 = fmul float %240, %155
>  %242 = getelementptr float addrspace(2)* %223, i32 5
>  %243 = load float addrspace(2)* %242, !tbaa !0
>  %244 = fmul float %243, %162
>  %245 = fadd float %241, %244
>  %246 = getelementptr float addrspace(2)* %223, i32 6
>  %247 = load float addrspace(2)* %246, !tbaa !0
>  %248 = fmul float %247, %169
>  %249 = fadd float %245, %248
>  %250 = getelementptr float addrspace(2)* %223, i32 7
>  %251 = load float addrspace(2)* %250, !tbaa !0
>  %252 = fmul float %251, %176
>  %253 = fadd float %249, %252
>  %254 = getelementptr float addrspace(2)* %223, i32 8
>  %255 = load float addrspace(2)* %254, !tbaa !0
>  %256 = fmul float %255, %155
>  %257 = getelementptr float addrspace(2)* %223, i32 9
>  %258 = load float addrspace(2)* %257, !tbaa !0
>  %259 = fmul float %258, %162
>  %260 = fadd float %256, %259
>  %261 = getelementptr float addrspace(2)* %223, i32 10
>  %262 = load float addrspace(2)* %261, !tbaa !0
>  %263 = fmul float %262, %169
>  %264 = fadd float %260, %263
>  %265 = getelementptr float addrspace(2)* %223, i32 11
>  %266 = load float addrspace(2)* %265, !tbaa !0
>  %267 = fmul float %266, %176
>  %268 = fadd float %264, %267
>  %269 = getelementptr float addrspace(2)* %223, i32 12
>  %270 = load float addrspace(2)* %269, !tbaa !0
>  %271 = fmul float %270, %155
>  %272 = getelementptr float addrspace(2)* %223, i32 13
>  %273 = load float addrspace(2)* %272, !tbaa !0
>  %274 = fmul float %273, %162
>  %275 = fadd float %271, %274
>  %276 = getelementptr float addrspace(2)* %223, i32 14
>  %277 = load float addrspace(2)* %276, !tbaa !0
>  %278 = fmul float %277, %169
>  %279 = fadd float %275, %278
>  %280 = getelementptr float addrspace(2)* %223, i32 15
>  %281 = load float addrspace(2)* %280, !tbaa !0
>  %282 = fmul float %281, %176
>  %283 = fadd float %279, %282
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %238, float %253, float %268, float %283)
>  %284 = getelementptr float addrspace(2)* %223, i32 16
>  %285 = load float addrspace(2)* %284, !tbaa !0
>  %286 = fmul float %285, %155
>  %287 = getelementptr float addrspace(2)* %223, i32 17
>  %288 = load float addrspace(2)* %287, !tbaa !0
>  %289 = fmul float %288, %162
>  %290 = fadd float %286, %289
>  %291 = getelementptr float addrspace(2)* %223, i32 18
>  %292 = load float addrspace(2)* %291, !tbaa !0
>  %293 = fmul float %292, %169
>  %294 = fadd float %290, %293
>  %295 = getelementptr float addrspace(2)* %223, i32 19
>  %296 = load float addrspace(2)* %295, !tbaa !0
>  %297 = fmul float %296, %176
>  %298 = fadd float %294, %297
>  %299 = getelementptr float addrspace(2)* %223, i32 20
>  %300 = load float addrspace(2)* %299, !tbaa !0
>  %301 = fmul float %300, %155
>  %302 = getelementptr float addrspace(2)* %223, i32 21
>  %303 = load float addrspace(2)* %302, !tbaa !0
>  %304 = fmul float %303, %162
>  %305 = fadd float %301, %304
>  %306 = getelementptr float addrspace(2)* %223, i32 22
>  %307 = load float addrspace(2)* %306, !tbaa !0
>  %308 = fmul float %307, %169
>  %309 = fadd float %305, %308
>  %310 = getelementptr float addrspace(2)* %223, i32 23
>  %311 = load float addrspace(2)* %310, !tbaa !0
>  %312 = fmul float %311, %176
>  %313 = fadd float %309, %312
>  %314 = getelementptr float addrspace(2)* %223, i32 24
>  %315 = load float addrspace(2)* %314, !tbaa !0
>  %316 = fmul float %315, %155
>  %317 = getelementptr float addrspace(2)* %223, i32 25
>  %318 = load float addrspace(2)* %317, !tbaa !0
>  %319 = fmul float %318, %162
>  %320 = fadd float %316, %319
>  %321 = getelementptr float addrspace(2)* %223, i32 26
>  %322 = load float addrspace(2)* %321, !tbaa !0
>  %323 = fmul float %322, %169
>  %324 = fadd float %320, %323
>  %325 = getelementptr float addrspace(2)* %223, i32 27
>  %326 = load float addrspace(2)* %325, !tbaa !0
>  %327 = fmul float %326, %176
>  %328 = fadd float %324, %327
>  %329 = getelementptr float addrspace(2)* %223, i32 28
>  %330 = load float addrspace(2)* %329, !tbaa !0
>  %331 = fmul float %330, %155
>  %332 = getelementptr float addrspace(2)* %223, i32 29
>  %333 = load float addrspace(2)* %332, !tbaa !0
>  %334 = fmul float %333, %162
>  %335 = fadd float %331, %334
>  %336 = getelementptr float addrspace(2)* %223, i32 30
>  %337 = load float addrspace(2)* %336, !tbaa !0
>  %338 = fmul float %337, %169
>  %339 = fadd float %335, %338
>  %340 = getelementptr float addrspace(2)* %223, i32 31
>  %341 = load float addrspace(2)* %340, !tbaa !0
>  %342 = fmul float %341, %176
>  %343 = fadd float %339, %342
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %298, float %313, float %328, float %343)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %134, float %141, float %148, float %183)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %190, float %197, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %198, float %199, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %201, float %203, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 37, i32 0, float %204, float %205, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 38, i32 0, float %207, float %209, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %215, float %217, float %212, float %176)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840704
>bf8c007f
>e00c2000
>80020100
>bf8c0770
>d2060805
>02010104
>d2060806
>02010103
>d2060807
>02010102
>d2060801
>02010101
>f800020f
>05060701
>c0840700
>bf8c000f
>e00c2000
>80020600
>c0410100
>bf8c0070
>c00203d1
>bf8c007f
>10020e04
>c00203d0
>bf8c007f
>d2820001
>04040906
>c00203d2
>bf8c007f
>d2820001
>04040908
>c00203d3
>bf8c007f
>d2820003
>04040909
>c00203d5
>bf8c007f
>10020e04
>c00203d4
>bf8c007f
>d2820001
>04040906
>c00203d6
>bf8c007f
>d2820001
>04040908
>c00203d7
>bf8c007f
>d2820005
>04040909
>c0020321
>bf8c007f
>10020a04
>c0020320
>bf8c007f
>d2820001
>04040903
>c00203d9
>bf8c007f
>10040e04
>c00203d8
>bf8c007f
>d2820002
>04080906
>c00203da
>bf8c007f
>d2820002
>04080908
>c00203db
>bf8c007f
>d2820007
>04080909
>c0020322
>bf8c007f
>d2820001
>04040907
>c0020301
>c0028323
>bf8c007f
>7e040205
>d2820001
>04060404
>c0028325
>bf8c007f
>10040a05
>c0028324
>bf8c007f
>d2820002
>04080b03
>c0028326
>bf8c007f
>d2820002
>04080b07
>c0028327
>bf8c007f
>7e080205
>d2820002
>040a0804
>c0400102
>bf8c007f
>c002810d
>bf8c007f
>10080405
>c002810c
>bf8c007f
>d2820006
>04120205
>c0028329
>bf8c007f
>10080a05
>c0028328
>bf8c007f
>d2820004
>04100b03
>c002832a
>bf8c007f
>d2820004
>04100b07
>c002832b
>bf8c007f
>7e100205
>d2820004
>04121004
>c002810e
>bf8c007f
>d2820008
>041a0805
>c002832d
>bf8c007f
>100c0a05
>c002832c
>bf8c007f
>d2820006
>04180b03
>c002832e
>bf8c007f
>d2820006
>04180b07
>c002832f
>bf8c007f
>7e120205
>d2820006
>041a1204
>c002810f
>bf8c007f
>d2820008
>04220c05
>c0028109
>bf8c007f
>10120405
>c0028108
>bf8c007f
>d2820009
>04260205
>c002810a
>bf8c007f
>d2820009
>04260805
>c002810b
>bf8c007f
>d2820009
>04260c05
>c0028105
>bf8c007f
>10140405
>c0028104
>bf8c007f
>d282000a
>042a0205
>c0028106
>bf8c007f
>d282000a
>042a0805
>c0028107
>bf8c007f
>d282000a
>042a0c05
>c0028101
>bf8c007f
>10160405
>c0028100
>bf8c007f
>d282000b
>042e0205
>c0028102
>bf8c007f
>d282000b
>042e0805
>c0028103
>bf8c007f
>d282000b
>042e0c05
>f80000ef
>08090a0b
>c002811d
>bf8c000f
>10100405
>c002811c
>bf8c007f
>d2820008
>04220205
>c002811e
>bf8c007f
>d2820008
>04220805
>c002811f
>bf8c007f
>d2820008
>04220c05
>c0028119
>bf8c007f
>10120405
>c0028118
>bf8c007f
>d2820009
>04260205
>c002811a
>bf8c007f
>d2820009
>04260805
>c002811b
>bf8c007f
>d2820009
>04260c05
>c0028115
>bf8c007f
>10140405
>c0028114
>bf8c007f
>d282000a
>042a0205
>c0028116
>bf8c007f
>d282000a
>042a0805
>c0028117
>bf8c007f
>d282000a
>042a0c05
>c0028111
>bf8c007f
>10160405
>c0028110
>bf8c007f
>d282000b
>042e0205
>c0028112
>bf8c007f
>d282000b
>042e0805
>c0000113
>bf8c007f
>d282000b
>042e0c00
>f80000ff
>08090a0b
>c0000335
>bf8c000f
>10100a00
>c0000334
>bf8c007f
>d2820008
>04200103
>c0000336
>bf8c007f
>d2820008
>04200107
>c0000337
>bf8c007f
>7e120200
>d2820008
>04221204
>f800021f
>08070503
>c0820708
>bf8c000f
>e00c2000
>80010700
>c00003c5
>bf8c0070
>10001000
>c00003c4
>bf8c007f
>d2820000
>04000107
>c00003c6
>bf8c007f
>d2820000
>04000109
>c00003c7
>bf8c007f
>d2820000
>0400010a
>c00003c1
>bf8c007f
>10061000
>c00003c0
>bf8c007f
>d2820003
>040c0107
>c00003c2
>bf8c007f
>d2820003
>040c0109
>c00003c3
>bf8c007f
>d2820003
>040c010a
>7e0a0280
>f800022f
>05050003
>c00003c9
>bf8c000f
>060e0000
>c00083c8
>bf8c007f
>06100601
>f800023f
>05050708
>bf8c070f
>0a0e0000
>0a100601
>f800024f
>05050708
>c00003cd
>bf8c000f
>060e0000
>c00083cc
>bf8c007f
>06100601
>f800025f
>05050708
>0a000000
>0a060601
>f800026f
>05050003
>c00003dc
>bf8c000f
>d2820000
>04060c00
>c0000302
>bf8c007f
>10020800
>08020d01
>c00003dd
>bf8c007f
>10060c00
>08040503
>f80008cf
>06010200
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL IN[2], GENERIC[21], PERSPECTIVE
>DCL IN[3], GENERIC[22], PERSPECTIVE
>DCL IN[4], GENERIC[23], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL CONST[0..30]
>DCL TEMP[0..5], LOCAL
>DCL TEMP[6], ARRAY(1), LOCAL
>IMM[0] FLT32 {    0.0000,     1.0000,     2.0000,    -1.0000}
>  0: MOV TEMP[0].xy, IN[1].xyyy
>  1: TEX TEMP[0].xyz, TEMP[0], SAMP[1], 2D
>  2: MOV TEMP[1].xy, IN[0].xyyy
>  3: TEX TEMP[1], TEMP[1], SAMP[0], 2D
>  4: MAD TEMP[2].x, CONST[12].xxxx, CONST[21].yyyy, -IN[4].zzzz
>  5: MAD TEMP[3].x, CONST[12].xxxx, CONST[20].zzzz, -IN[4].zzzz
>  6: RCP TEMP[4].x, TEMP[3].xxxx
>  7: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[3].xxxx
>  8: MUL TEMP[4].x, TEMP[2].xxxx, TEMP[4].xxxx
>  9: MOV_SAT TEMP[4].x, TEMP[4].xxxx
> 10: SGE TEMP[3].x, -TEMP[3].xxxx, IMM[0].xxxx
> 11: F2I TEMP[3].x, -TEMP[3]
> 12: UIF TEMP[3].xxxx :0
> 13:   MOV TEMP[3].x, IMM[0].yyyy
> 14: ELSE :0
> 15:   MOV TEMP[3].x, TEMP[4].xxxx
> 16: ENDIF
> 17: MUL TEMP[4].x, IN[3].zzzz, CONST[21].wwww
> 18: MAD TEMP[3].x, TEMP[4].xxxx, TEMP[3].xxxx, -CONST[21].xxxx
> 19: MIN TEMP[3].x, TEMP[3].xxxx, CONST[21].zzzz
> 20: MOV_SAT TEMP[3].x, TEMP[3].xxxx
> 21: MAD TEMP[4].x, TEMP[3].xxxx, -TEMP[3].xxxx, TEMP[3].xxxx
> 22: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[10].xyzz
> 23: MUL TEMP[4].x, TEMP[4].xxxx, CONST[12].xxxx
> 24: MAD TEMP[0].xyz, IMM[0].zzzz, TEMP[0].xyzz, IMM[0].wwww
> 25: MAD TEMP[4].x, TEMP[3].xxxx, TEMP[3].xxxx, TEMP[4].xxxx
> 26: MAD TEMP[0].xyz, CONST[4].wwww, TEMP[0].xyzz, IMM[0].yyyy
> 27: MUL TEMP[2].xyz, TEMP[1].xyzz, TEMP[0].xyzz
> 28: MUL TEMP[1].x, TEMP[1].wwww, CONST[1].wwww
> 29: MUL TEMP[2].xyz, TEMP[2].xyzz, CONST[1].xyzz
> 30: MAD TEMP[5].x, TEMP[1].xxxx, IN[2].wwww, -TEMP[1].xxxx
> 31: MUL TEMP[2].xyz, TEMP[2].xyzz, IN[2].xyzz
> 32: MAD TEMP[1].x, CONST[12].wwww, TEMP[5].xxxx, TEMP[1].xxxx
> 33: MAD TEMP[0].xyz, TEMP[2].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 34: ADD TEMP[3].x, TEMP[3].xxxx, -TEMP[1].xxxx
> 35: MAD TEMP[1].x, CONST[12].zzzz, TEMP[3].xxxx, TEMP[1].xxxx
> 36: MUL TEMP[0].xyz, TEMP[4].xxxx, TEMP[0].xyzz
> 37: MAD TEMP[3].x, IN[3].zzzz, CONST[29].wwww, -TEMP[1].xxxx
> 38: MAD TEMP[2].xyz, TEMP[2].xyzz, CONST[30].xxxx, TEMP[0].xyzz
> 39: MAD TEMP[0].x, CONST[12].yyyy, TEMP[3].xxxx, TEMP[1].xxxx
> 40: MOV TEMP[2].w, TEMP[0].xxxx
> 41: MOV TEMP[6], TEMP[2]
> 42: MOV OUT[0], TEMP[6]
> 43: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 4
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 5
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 6
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 7
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 19
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 40
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 41
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 42
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 48
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 49
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 50
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr float addrspace(2)* %21, i32 51
>  %45 = load float addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr float addrspace(2)* %21, i32 82
>  %47 = load float addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr float addrspace(2)* %21, i32 84
>  %49 = load float addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr float addrspace(2)* %21, i32 85
>  %51 = load float addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr float addrspace(2)* %21, i32 86
>  %53 = load float addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr float addrspace(2)* %21, i32 87
>  %55 = load float addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr float addrspace(2)* %21, i32 116
>  %57 = load float addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr float addrspace(2)* %21, i32 117
>  %59 = load float addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr float addrspace(2)* %21, i32 118
>  %61 = load float addrspace(2)* %60, !tbaa !0
>  %62 = getelementptr float addrspace(2)* %21, i32 119
>  %63 = load float addrspace(2)* %62, !tbaa !0
>  %64 = getelementptr float addrspace(2)* %21, i32 120
>  %65 = load float addrspace(2)* %64, !tbaa !0
>  %66 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %67 = load <32 x i8> addrspace(2)* %66, !tbaa !0
>  %68 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %69 = load <16 x i8> addrspace(2)* %68, !tbaa !0
>  %70 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %71 = load <32 x i8> addrspace(2)* %70, !tbaa !0
>  %72 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %73 = load <16 x i8> addrspace(2)* %72, !tbaa !0
>  %74 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %75 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %76 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %77 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %78 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %79 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %80 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %3, <2 x i32> %5)
>  %81 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %3, <2 x i32> %5)
>  %82 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %3, <2 x i32> %5)
>  %83 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %3, <2 x i32> %5)
>  %84 = bitcast float %76 to i32
>  %85 = bitcast float %77 to i32
>  %86 = insertelement <2 x i32> undef, i32 %84, i32 0
>  %87 = insertelement <2 x i32> %86, i32 %85, i32 1
>  %88 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %87, <32 x i8> %71, <16 x i8> %73, i32 2)
>  %89 = extractelement <4 x float> %88, i32 0
>  %90 = extractelement <4 x float> %88, i32 1
>  %91 = extractelement <4 x float> %88, i32 2
>  %92 = bitcast float %74 to i32
>  %93 = bitcast float %75 to i32
>  %94 = insertelement <2 x i32> undef, i32 %92, i32 0
>  %95 = insertelement <2 x i32> %94, i32 %93, i32 1
>  %96 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %95, <32 x i8> %67, <16 x i8> %69, i32 2)
>  %97 = extractelement <4 x float> %96, i32 0
>  %98 = extractelement <4 x float> %96, i32 1
>  %99 = extractelement <4 x float> %96, i32 2
>  %100 = extractelement <4 x float> %96, i32 3
>  %101 = fsub float -0.000000e+00, %83
>  %102 = fmul float %39, %51
>  %103 = fadd float %102, %101
>  %104 = fsub float -0.000000e+00, %83
>  %105 = fmul float %39, %47
>  %106 = fadd float %105, %104
>  %107 = fdiv float 1.000000e+00, %106
>  %108 = fmul float %106, %106
>  %109 = fmul float %103, %107
>  %110 = call float @llvm.AMDIL.clamp.(float %109, float 0.000000e+00, float 1.000000e+00)
>  %111 = fsub float -0.000000e+00, %108
>  %112 = fcmp uge float %111, 0.000000e+00
>  %113 = select i1 %112, float 1.000000e+00, float 0.000000e+00
>  %114 = fsub float -0.000000e+00, %113
>  %115 = fptosi float %114 to i32
>  %116 = bitcast i32 %115 to float
>  %117 = bitcast float %116 to i32
>  %118 = icmp ne i32 %117, 0
>  %. = select i1 %118, float 1.000000e+00, float %110
>  %119 = fmul float %82, %55
>  %120 = fsub float -0.000000e+00, %49
>  %121 = fmul float %119, %.
>  %122 = fadd float %121, %120
>  %123 = fcmp uge float %122, %53
>  %124 = select i1 %123, float %53, float %122
>  %125 = call float @llvm.AMDIL.clamp.(float %124, float 0.000000e+00, float 1.000000e+00)
>  %126 = fsub float -0.000000e+00, %125
>  %127 = fmul float %125, %126
>  %128 = fadd float %127, %125
>  %129 = fmul float %89, %33
>  %130 = fmul float %90, %35
>  %131 = fmul float %91, %37
>  %132 = fmul float %128, %39
>  %133 = fmul float 2.000000e+00, %129
>  %134 = fadd float %133, -1.000000e+00
>  %135 = fmul float 2.000000e+00, %130
>  %136 = fadd float %135, -1.000000e+00
>  %137 = fmul float 2.000000e+00, %131
>  %138 = fadd float %137, -1.000000e+00
>  %139 = fmul float %125, %125
>  %140 = fadd float %139, %132
>  %141 = fmul float %31, %134
>  %142 = fadd float %141, 1.000000e+00
>  %143 = fmul float %31, %136
>  %144 = fadd float %143, 1.000000e+00
>  %145 = fmul float %31, %138
>  %146 = fadd float %145, 1.000000e+00
>  %147 = fmul float %97, %142
>  %148 = fmul float %98, %144
>  %149 = fmul float %99, %146
>  %150 = fmul float %100, %29
>  %151 = fmul float %147, %23
>  %152 = fmul float %148, %25
>  %153 = fmul float %149, %27
>  %154 = fsub float -0.000000e+00, %150
>  %155 = fmul float %150, %81
>  %156 = fadd float %155, %154
>  %157 = fmul float %151, %78
>  %158 = fmul float %152, %79
>  %159 = fmul float %153, %80
>  %160 = fmul float %45, %156
>  %161 = fadd float %160, %150
>  %162 = fsub float -0.000000e+00, %65
>  %163 = fmul float %157, %162
>  %164 = fadd float %163, %57
>  %165 = fsub float -0.000000e+00, %65
>  %166 = fmul float %158, %165
>  %167 = fadd float %166, %59
>  %168 = fsub float -0.000000e+00, %65
>  %169 = fmul float %159, %168
>  %170 = fadd float %169, %61
>  %171 = fsub float -0.000000e+00, %161
>  %172 = fadd float %125, %171
>  %173 = fmul float %43, %172
>  %174 = fadd float %173, %161
>  %175 = fmul float %140, %164
>  %176 = fmul float %140, %167
>  %177 = fmul float %140, %170
>  %178 = fsub float -0.000000e+00, %174
>  %179 = fmul float %82, %63
>  %180 = fadd float %179, %178
>  %181 = fmul float %157, %65
>  %182 = fadd float %181, %175
>  %183 = fmul float %158, %65
>  %184 = fadd float %183, %176
>  %185 = fmul float %159, %65
>  %186 = fadd float %185, %177
>  %187 = fmul float %41, %180
>  %188 = fadd float %187, %174
>  %189 = call i32 @llvm.SI.packf16(float %182, float %184)
>  %190 = bitcast i32 %189 to float
>  %191 = call i32 @llvm.SI.packf16(float %186, float %188)
>  %192 = bitcast i32 %191 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %190, float %192, float %190, float %192)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430202
>c0400100
>bf8c0070
>c0038107
>bf8c007f
>100c0a07
>c81c0b00
>c81d0b01
>100e0f06
>080e0d07
>c0038133
>bf8c007f
>d2820006
>041a0e07
>c81c1200
>c81d1201
>c0038130
>c0040155
>bf8c007f
>7e100208
>d2100008
>02021007
>08100f08
>c0040152
>bf8c007f
>7e120208
>d2100009
>02021207
>08120f09
>7e0e5509
>100e0f08
>d2060807
>02010107
>10101309
>d2060008
>22010108
>d00c0008
>02010108
>d2000008
>0021e480
>d2060008
>22010108
>7e101108
>d10a0008
>02010108
>d2000008
>0021e507
>c81c0e00
>c81d0e01
>c0040157
>bf8c007f
>10120e08
>10101109
>c0040154
>bf8c007f
>0a101008
>c0040156
>bf8c007f
>d00c000a
>02001108
>7e120208
>d2000008
>002a1308
>d2060808
>02010108
>08120d08
>c0040132
>bf8c007f
>d2820006
>041a1208
>c0040177
>bf8c007f
>100e0e08
>080e0d07
>c0040131
>bf8c007f
>d282000a
>041a0e08
>100c1108
>080c0d08
>100c0c07
>d2820006
>041a1108
>c8200500
>c8210501
>c81c0400
>c81d0401
>c0840304
>c0c60508
>bf8c007f
>f0800700
>00430707
>c001012a
>bf8c0070
>10161202
>d282000b
>042c0509
>061616f3
>c0018113
>bf8c007f
>d282000b
>03ca1603
>10161704
>c0010106
>bf8c007f
>10161602
>c8300a00
>c8310a01
>1016190b
>c0010178
>bf8c007f
>10181602
>c0020176
>bf8c007f
>08181804
>10181906
>d282000b
>0430050b
>5e14150b
>c0020129
>bf8c007f
>10161004
>d282000b
>042c0908
>061616f3
>d282000b
>03ca1603
>10161703
>c0020105
>bf8c007f
>10161604
>c8300900
>c8310901
>1016190b
>10181602
>c0020175
>bf8c007f
>08181804
>10181906
>d282000b
>0430050b
>c0020128
>bf8c007f
>10180e04
>d2820007
>04300907
>060e0ef3
>d2820007
>03ca0e03
>10040f02
>c0018104
>bf8c007f
>10040403
>c80c0800
>c80d0801
>10000702
>10020002
>c0000174
>bf8c007f
>08020200
>10020306
>d2820000
>04040500
>5e001700
>f8001c0f
>0a000a00
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL IN[4]
>DCL IN[5]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL OUT[3], GENERIC[20]
>DCL OUT[4], GENERIC[21]
>DCL OUT[5], GENERIC[22]
>DCL OUT[6], GENERIC[23]
>DCL CONST[0..57]
>DCL TEMP[0..8], LOCAL
>IMM[0] FLT32 { -128.0000,     1.0000,   -64.0000,    -2.0000}
>IMM[1] FLT32 {   -0.0159,     0.0159,     2.2000,     0.0000}
>  0: ADD TEMP[0].xyz, IN[2].xyzz, IN[2].xyzz
>  1: LG2 TEMP[0].x, TEMP[0].xxxx
>  2: LG2 TEMP[1].x, TEMP[0].yyyy
>  3: MOV TEMP[0].y, TEMP[1].xxxx
>  4: LG2 TEMP[2].x, TEMP[0].zzzz
>  5: MOV TEMP[0].z, TEMP[2].xxxx
>  6: MUL TEMP[0].xyz, TEMP[0].xyzz, IMM[1].zzzz
>  7: EX2 TEMP[3].x, TEMP[0].xxxx
>  8: EX2 TEMP[4].x, TEMP[0].yyyy
>  9: MOV TEMP[3].y, TEMP[4].xxxx
> 10: EX2 TEMP[4].x, TEMP[0].zzzz
> 11: MOV TEMP[3].z, TEMP[4].xxxx
> 12: DP4 TEMP[4].x, IN[3], CONST[48]
> 13: DP4 TEMP[5].x, IN[3], CONST[49]
> 14: MOV TEMP[4].y, TEMP[5].xxxx
> 15: DP4 TEMP[5].x, IN[3], CONST[52]
> 16: DP4 TEMP[6].x, IN[3], CONST[53]
> 17: MOV TEMP[5].y, TEMP[6].xxxx
> 18: MAD TEMP[0].xyz, IN[4].xyzz, CONST[3].xxxx, IN[0].xyzz
> 19: MOV TEMP[0].w, IN[0].wwww
> 20: DP4 TEMP[1].x, TEMP[0], CONST[54]
> 21: DP4 TEMP[6].x, TEMP[0], CONST[55]
> 22: MOV TEMP[1].y, TEMP[6].xxxx
> 23: DP4 TEMP[6].x, TEMP[0], CONST[56]
> 24: MOV TEMP[1].z, TEMP[6].xxxx
> 25: MOV TEMP[1].w, CONST[0].yyyy
> 26: DP4 TEMP[6].x, TEMP[1], CONST[10]
> 27: MOV TEMP[0].z, TEMP[6].xxxx
> 28: DP4 TEMP[0].x, TEMP[1], CONST[8]
> 29: DP4 TEMP[6].x, TEMP[1], CONST[9]
> 30: MOV TEMP[0].y, TEMP[6].xxxx
> 31: DP4 TEMP[6].x, TEMP[1], CONST[11]
> 32: MOV TEMP[0].w, TEMP[6].xxxx
> 33: DP4 TEMP[6].x, TEMP[1], CONST[13]
> 34: MOV TEMP[2].z, TEMP[6].xxxx
> 35: MOV TEMP[1].xyz, TEMP[1].xyzx
> 36: MOV TEMP[7], TEMP[0]
> 37: MOV TEMP[8].xy, TEMP[0].xyxx
> 38: MOV TEMP[3].w, CONST[0].xxxx
> 39: MOV TEMP[8].zw, TEMP[2].wwzw
> 40: MOV TEMP[1].w, TEMP[6].xxxx
> 41: MOV TEMP[2], TEMP[7]
> 42: MAD TEMP[6].x, TEMP[0].zzzz, CONST[0].zzzz, -TEMP[0].wwww
> 43: MOV TEMP[7].z, TEMP[6].xxxx
> 44: MOV TEMP[7].y, -TEMP[0].yyyy
> 45: MAD TEMP[7].xy, CONST[57].xyyy, TEMP[0].wwww, TEMP[7].xyyy
> 46: MOV OUT[2], TEMP[4]
> 47: MOV OUT[3], TEMP[5]
> 48: MOV OUT[4], TEMP[3]
> 49: MOV OUT[0], TEMP[7]
> 50: MOV OUT[1], TEMP[2]
> 51: MOV OUT[5], TEMP[8]
> 52: MOV OUT[6], TEMP[1]
> 53: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 12
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 32
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 33
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 34
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 35
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 36
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 37
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 38
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 39
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 40
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 41
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 42
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 43
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 44
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 45
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 46
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 47
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 52
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 53
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 54
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 55
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 192
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 193
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 194
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 195
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 196
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 197
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 198
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 199
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 208
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 209
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 210
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 211
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 212
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 213
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 214
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 215
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 216
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 217
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr float addrspace(2)* %10, i32 218
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = getelementptr float addrspace(2)* %10, i32 219
>  %98 = load float addrspace(2)* %97, !tbaa !0
>  %99 = getelementptr float addrspace(2)* %10, i32 220
>  %100 = load float addrspace(2)* %99, !tbaa !0
>  %101 = getelementptr float addrspace(2)* %10, i32 221
>  %102 = load float addrspace(2)* %101, !tbaa !0
>  %103 = getelementptr float addrspace(2)* %10, i32 222
>  %104 = load float addrspace(2)* %103, !tbaa !0
>  %105 = getelementptr float addrspace(2)* %10, i32 223
>  %106 = load float addrspace(2)* %105, !tbaa !0
>  %107 = getelementptr float addrspace(2)* %10, i32 224
>  %108 = load float addrspace(2)* %107, !tbaa !0
>  %109 = getelementptr float addrspace(2)* %10, i32 225
>  %110 = load float addrspace(2)* %109, !tbaa !0
>  %111 = getelementptr float addrspace(2)* %10, i32 226
>  %112 = load float addrspace(2)* %111, !tbaa !0
>  %113 = getelementptr float addrspace(2)* %10, i32 227
>  %114 = load float addrspace(2)* %113, !tbaa !0
>  %115 = getelementptr float addrspace(2)* %10, i32 228
>  %116 = load float addrspace(2)* %115, !tbaa !0
>  %117 = getelementptr float addrspace(2)* %10, i32 229
>  %118 = load float addrspace(2)* %117, !tbaa !0
>  %119 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %120 = load <16 x i8> addrspace(2)* %119, !tbaa !0
>  %121 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %120, i32 0, i32 %5)
>  %122 = extractelement <4 x float> %121, i32 0
>  %123 = extractelement <4 x float> %121, i32 1
>  %124 = extractelement <4 x float> %121, i32 2
>  %125 = extractelement <4 x float> %121, i32 3
>  %126 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %127 = load <16 x i8> addrspace(2)* %126, !tbaa !0
>  %128 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %127, i32 0, i32 %5)
>  %129 = extractelement <4 x float> %128, i32 0
>  %130 = extractelement <4 x float> %128, i32 1
>  %131 = extractelement <4 x float> %128, i32 2
>  %132 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %133 = load <16 x i8> addrspace(2)* %132, !tbaa !0
>  %134 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %133, i32 0, i32 %5)
>  %135 = extractelement <4 x float> %134, i32 0
>  %136 = extractelement <4 x float> %134, i32 1
>  %137 = extractelement <4 x float> %134, i32 2
>  %138 = extractelement <4 x float> %134, i32 3
>  %139 = getelementptr <16 x i8> addrspace(2)* %3, i32 4
>  %140 = load <16 x i8> addrspace(2)* %139, !tbaa !0
>  %141 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %140, i32 0, i32 %5)
>  %142 = extractelement <4 x float> %141, i32 0
>  %143 = extractelement <4 x float> %141, i32 1
>  %144 = extractelement <4 x float> %141, i32 2
>  %145 = fadd float %129, %129
>  %146 = fadd float %130, %130
>  %147 = fadd float %131, %131
>  %148 = call float @llvm.log2.f32(float %145)
>  %149 = call float @llvm.log2.f32(float %146)
>  %150 = call float @llvm.log2.f32(float %147)
>  %151 = fmul float %148, 0x40019999A0000000
>  %152 = fmul float %149, 0x40019999A0000000
>  %153 = fmul float %150, 0x40019999A0000000
>  %154 = call float @llvm.AMDIL.exp.(float %151)
>  %155 = call float @llvm.AMDIL.exp.(float %152)
>  %156 = call float @llvm.AMDIL.exp.(float %153)
>  %157 = fmul float %135, %60
>  %158 = fmul float %136, %62
>  %159 = fadd float %157, %158
>  %160 = fmul float %137, %64
>  %161 = fadd float %159, %160
>  %162 = fmul float %138, %66
>  %163 = fadd float %161, %162
>  %164 = fmul float %135, %68
>  %165 = fmul float %136, %70
>  %166 = fadd float %164, %165
>  %167 = fmul float %137, %72
>  %168 = fadd float %166, %167
>  %169 = fmul float %138, %74
>  %170 = fadd float %168, %169
>  %171 = fmul float %135, %76
>  %172 = fmul float %136, %78
>  %173 = fadd float %171, %172
>  %174 = fmul float %137, %80
>  %175 = fadd float %173, %174
>  %176 = fmul float %138, %82
>  %177 = fadd float %175, %176
>  %178 = fmul float %135, %84
>  %179 = fmul float %136, %86
>  %180 = fadd float %178, %179
>  %181 = fmul float %137, %88
>  %182 = fadd float %180, %181
>  %183 = fmul float %138, %90
>  %184 = fadd float %182, %183
>  %185 = fmul float %142, %18
>  %186 = fadd float %185, %122
>  %187 = fmul float %143, %18
>  %188 = fadd float %187, %123
>  %189 = fmul float %144, %18
>  %190 = fadd float %189, %124
>  %191 = fmul float %186, %92
>  %192 = fmul float %188, %94
>  %193 = fadd float %191, %192
>  %194 = fmul float %190, %96
>  %195 = fadd float %193, %194
>  %196 = fmul float %125, %98
>  %197 = fadd float %195, %196
>  %198 = fmul float %186, %100
>  %199 = fmul float %188, %102
>  %200 = fadd float %198, %199
>  %201 = fmul float %190, %104
>  %202 = fadd float %200, %201
>  %203 = fmul float %125, %106
>  %204 = fadd float %202, %203
>  %205 = fmul float %186, %108
>  %206 = fmul float %188, %110
>  %207 = fadd float %205, %206
>  %208 = fmul float %190, %112
>  %209 = fadd float %207, %208
>  %210 = fmul float %125, %114
>  %211 = fadd float %209, %210
>  %212 = fmul float %197, %36
>  %213 = fmul float %204, %38
>  %214 = fadd float %212, %213
>  %215 = fmul float %211, %40
>  %216 = fadd float %214, %215
>  %217 = fmul float %14, %42
>  %218 = fadd float %216, %217
>  %219 = fmul float %197, %20
>  %220 = fmul float %204, %22
>  %221 = fadd float %219, %220
>  %222 = fmul float %211, %24
>  %223 = fadd float %221, %222
>  %224 = fmul float %14, %26
>  %225 = fadd float %223, %224
>  %226 = fmul float %197, %28
>  %227 = fmul float %204, %30
>  %228 = fadd float %226, %227
>  %229 = fmul float %211, %32
>  %230 = fadd float %228, %229
>  %231 = fmul float %14, %34
>  %232 = fadd float %230, %231
>  %233 = fmul float %197, %44
>  %234 = fmul float %204, %46
>  %235 = fadd float %233, %234
>  %236 = fmul float %211, %48
>  %237 = fadd float %235, %236
>  %238 = fmul float %14, %50
>  %239 = fadd float %237, %238
>  %240 = fmul float %197, %52
>  %241 = fmul float %204, %54
>  %242 = fadd float %240, %241
>  %243 = fmul float %211, %56
>  %244 = fadd float %242, %243
>  %245 = fmul float %14, %58
>  %246 = fadd float %244, %245
>  %247 = fsub float -0.000000e+00, %239
>  %248 = fmul float %218, %16
>  %249 = fadd float %248, %247
>  %250 = fsub float -0.000000e+00, %232
>  %251 = fmul float %116, %239
>  %252 = fadd float %251, %225
>  %253 = fmul float %118, %239
>  %254 = fadd float %253, %250
>  %255 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %256 = load float addrspace(2)* addrspace(2)* %255, !tbaa !0
>  %257 = getelementptr float addrspace(2)* %256, i32 0
>  %258 = load float addrspace(2)* %257, !tbaa !0
>  %259 = fmul float %258, %225
>  %260 = getelementptr float addrspace(2)* %256, i32 1
>  %261 = load float addrspace(2)* %260, !tbaa !0
>  %262 = fmul float %261, %232
>  %263 = fadd float %259, %262
>  %264 = getelementptr float addrspace(2)* %256, i32 2
>  %265 = load float addrspace(2)* %264, !tbaa !0
>  %266 = fmul float %265, %218
>  %267 = fadd float %263, %266
>  %268 = getelementptr float addrspace(2)* %256, i32 3
>  %269 = load float addrspace(2)* %268, !tbaa !0
>  %270 = fmul float %269, %239
>  %271 = fadd float %267, %270
>  %272 = getelementptr float addrspace(2)* %256, i32 4
>  %273 = load float addrspace(2)* %272, !tbaa !0
>  %274 = fmul float %273, %225
>  %275 = getelementptr float addrspace(2)* %256, i32 5
>  %276 = load float addrspace(2)* %275, !tbaa !0
>  %277 = fmul float %276, %232
>  %278 = fadd float %274, %277
>  %279 = getelementptr float addrspace(2)* %256, i32 6
>  %280 = load float addrspace(2)* %279, !tbaa !0
>  %281 = fmul float %280, %218
>  %282 = fadd float %278, %281
>  %283 = getelementptr float addrspace(2)* %256, i32 7
>  %284 = load float addrspace(2)* %283, !tbaa !0
>  %285 = fmul float %284, %239
>  %286 = fadd float %282, %285
>  %287 = getelementptr float addrspace(2)* %256, i32 8
>  %288 = load float addrspace(2)* %287, !tbaa !0
>  %289 = fmul float %288, %225
>  %290 = getelementptr float addrspace(2)* %256, i32 9
>  %291 = load float addrspace(2)* %290, !tbaa !0
>  %292 = fmul float %291, %232
>  %293 = fadd float %289, %292
>  %294 = getelementptr float addrspace(2)* %256, i32 10
>  %295 = load float addrspace(2)* %294, !tbaa !0
>  %296 = fmul float %295, %218
>  %297 = fadd float %293, %296
>  %298 = getelementptr float addrspace(2)* %256, i32 11
>  %299 = load float addrspace(2)* %298, !tbaa !0
>  %300 = fmul float %299, %239
>  %301 = fadd float %297, %300
>  %302 = getelementptr float addrspace(2)* %256, i32 12
>  %303 = load float addrspace(2)* %302, !tbaa !0
>  %304 = fmul float %303, %225
>  %305 = getelementptr float addrspace(2)* %256, i32 13
>  %306 = load float addrspace(2)* %305, !tbaa !0
>  %307 = fmul float %306, %232
>  %308 = fadd float %304, %307
>  %309 = getelementptr float addrspace(2)* %256, i32 14
>  %310 = load float addrspace(2)* %309, !tbaa !0
>  %311 = fmul float %310, %218
>  %312 = fadd float %308, %311
>  %313 = getelementptr float addrspace(2)* %256, i32 15
>  %314 = load float addrspace(2)* %313, !tbaa !0
>  %315 = fmul float %314, %239
>  %316 = fadd float %312, %315
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %271, float %286, float %301, float %316)
>  %317 = getelementptr float addrspace(2)* %256, i32 16
>  %318 = load float addrspace(2)* %317, !tbaa !0
>  %319 = fmul float %318, %225
>  %320 = getelementptr float addrspace(2)* %256, i32 17
>  %321 = load float addrspace(2)* %320, !tbaa !0
>  %322 = fmul float %321, %232
>  %323 = fadd float %319, %322
>  %324 = getelementptr float addrspace(2)* %256, i32 18
>  %325 = load float addrspace(2)* %324, !tbaa !0
>  %326 = fmul float %325, %218
>  %327 = fadd float %323, %326
>  %328 = getelementptr float addrspace(2)* %256, i32 19
>  %329 = load float addrspace(2)* %328, !tbaa !0
>  %330 = fmul float %329, %239
>  %331 = fadd float %327, %330
>  %332 = getelementptr float addrspace(2)* %256, i32 20
>  %333 = load float addrspace(2)* %332, !tbaa !0
>  %334 = fmul float %333, %225
>  %335 = getelementptr float addrspace(2)* %256, i32 21
>  %336 = load float addrspace(2)* %335, !tbaa !0
>  %337 = fmul float %336, %232
>  %338 = fadd float %334, %337
>  %339 = getelementptr float addrspace(2)* %256, i32 22
>  %340 = load float addrspace(2)* %339, !tbaa !0
>  %341 = fmul float %340, %218
>  %342 = fadd float %338, %341
>  %343 = getelementptr float addrspace(2)* %256, i32 23
>  %344 = load float addrspace(2)* %343, !tbaa !0
>  %345 = fmul float %344, %239
>  %346 = fadd float %342, %345
>  %347 = getelementptr float addrspace(2)* %256, i32 24
>  %348 = load float addrspace(2)* %347, !tbaa !0
>  %349 = fmul float %348, %225
>  %350 = getelementptr float addrspace(2)* %256, i32 25
>  %351 = load float addrspace(2)* %350, !tbaa !0
>  %352 = fmul float %351, %232
>  %353 = fadd float %349, %352
>  %354 = getelementptr float addrspace(2)* %256, i32 26
>  %355 = load float addrspace(2)* %354, !tbaa !0
>  %356 = fmul float %355, %218
>  %357 = fadd float %353, %356
>  %358 = getelementptr float addrspace(2)* %256, i32 27
>  %359 = load float addrspace(2)* %358, !tbaa !0
>  %360 = fmul float %359, %239
>  %361 = fadd float %357, %360
>  %362 = getelementptr float addrspace(2)* %256, i32 28
>  %363 = load float addrspace(2)* %362, !tbaa !0
>  %364 = fmul float %363, %225
>  %365 = getelementptr float addrspace(2)* %256, i32 29
>  %366 = load float addrspace(2)* %365, !tbaa !0
>  %367 = fmul float %366, %232
>  %368 = fadd float %364, %367
>  %369 = getelementptr float addrspace(2)* %256, i32 30
>  %370 = load float addrspace(2)* %369, !tbaa !0
>  %371 = fmul float %370, %218
>  %372 = fadd float %368, %371
>  %373 = getelementptr float addrspace(2)* %256, i32 31
>  %374 = load float addrspace(2)* %373, !tbaa !0
>  %375 = fmul float %374, %239
>  %376 = fadd float %372, %375
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %331, float %346, float %361, float %376)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %163, float %170, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %177, float %184, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %154, float %155, float %156, float %12)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %225, float %232, float %246, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %197, float %204, float %211, float %246)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %252, float %254, float %249, float %239)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: nounwind readonly
>declare float @llvm.log2.f32(float) #2
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.exp.(float) #3
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { nounwind readonly }
>attributes #3 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840700
>bf8c007f
>e00c2000
>80020300
>c0840710
>bf8c0070
>e00c2000
>80020900
>c0410100
>bf8c0070
>c002030c
>bf8c007f
>d2820007
>040c0909
>d2820008
>0410090a
>c00283d9
>bf8c007f
>10021005
>c00283d8
>bf8c007f
>d2820001
>04040b07
>d2820009
>0414090b
>c00203da
>bf8c007f
>d2820001
>04040909
>c00203db
>bf8c007f
>d2820001
>04040906
>c00203dd
>bf8c007f
>10041004
>c00203dc
>bf8c007f
>d2820002
>04080907
>c00203de
>bf8c007f
>d2820002
>04080909
>c00203df
>bf8c007f
>d2820002
>04080906
>c0020321
>bf8c007f
>10140404
>c0020320
>bf8c007f
>d282000a
>04280901
>c00203e1
>bf8c007f
>10101004
>c00203e0
>bf8c007f
>d2820007
>04200907
>c00203e2
>bf8c007f
>d2820007
>041c0909
>c00203e3
>bf8c007f
>d2820003
>041c0906
>c0020322
>bf8c007f
>d2820004
>04280903
>c0020301
>c0028323
>bf8c007f
>7e0a0205
>d2820004
>04120a04
>c0028325
>bf8c007f
>100a0405
>c0028324
>bf8c007f
>d2820005
>04140b01
>c0028326
>bf8c007f
>d2820005
>04140b03
>c0028327
>bf8c007f
>7e0c0205
>d2820005
>04160c04
>c0400102
>bf8c007f
>c002810d
>bf8c007f
>100c0a05
>c002810c
>bf8c007f
>d2820007
>041a0805
>c0028329
>bf8c007f
>100c0405
>c0028328
>bf8c007f
>d2820006
>04180b01
>c002832a
>bf8c007f
>d2820006
>04180b03
>c002832b
>bf8c007f
>7e100205
>d2820006
>041a1004
>c002810e
>bf8c007f
>d2820008
>041e0c05
>c002832d
>bf8c007f
>100e0405
>c002832c
>bf8c007f
>d2820007
>041c0b01
>c002832e
>bf8c007f
>d2820007
>041c0b03
>c002832f
>bf8c007f
>7e120205
>d2820007
>041e1204
>c002810f
>bf8c007f
>d2820008
>04220e05
>c0028109
>bf8c007f
>10120a05
>c0028108
>bf8c007f
>d2820009
>04260805
>c002810a
>bf8c007f
>d2820009
>04260c05
>c002810b
>bf8c007f
>d2820009
>04260e05
>c0028105
>bf8c007f
>10140a05
>c0028104
>bf8c007f
>d282000a
>042a0805
>c0028106
>bf8c007f
>d282000a
>042a0c05
>c0028107
>bf8c007f
>d282000a
>042a0e05
>c0028101
>bf8c007f
>10160a05
>c0028100
>bf8c007f
>d282000b
>042e0805
>c0028102
>bf8c007f
>d282000b
>042e0c05
>c0028103
>bf8c007f
>d282000b
>042e0e05
>f80000ef
>08090a0b
>c002811d
>bf8c000f
>10100a05
>c002811c
>bf8c007f
>d2820008
>04220805
>c002811e
>bf8c007f
>d2820008
>04220c05
>c002811f
>bf8c007f
>d2820008
>04220e05
>c0028119
>bf8c007f
>10120a05
>c0028118
>bf8c007f
>d2820009
>04260805
>c002811a
>bf8c007f
>d2820009
>04260c05
>c002811b
>bf8c007f
>d2820009
>04260e05
>c0028115
>bf8c007f
>10140a05
>c0028114
>bf8c007f
>d282000a
>042a0805
>c0028116
>bf8c007f
>d282000a
>042a0c05
>c0028117
>bf8c007f
>d282000a
>042a0e05
>c0028111
>bf8c007f
>10160a05
>c0028110
>bf8c007f
>d282000b
>042e0805
>c0028112
>bf8c007f
>d282000b
>042e0c05
>c0000113
>bf8c007f
>d282000b
>042e0e00
>f80000ff
>08090a0b
>c084070c
>bf8c000f
>e00c2000
>80020900
>c00003c5
>bf8c0070
>10101400
>c00003c4
>bf8c007f
>d2820008
>04200109
>c00003c6
>bf8c007f
>d2820008
>0420010b
>c00003c7
>bf8c007f
>d282000d
>0420010c
>c00003c1
>bf8c007f
>10101400
>c00003c0
>bf8c007f
>d2820008
>04200109
>c00003c2
>bf8c007f
>d2820008
>0420010b
>c00003c3
>bf8c007f
>d282000e
>0420010c
>7e100280
>f800020f
>08080d0e
>c00003d5
>bf8c000f
>101a1400
>c00003d4
>bf8c007f
>d282000d
>04340109
>c00003d6
>bf8c007f
>d282000d
>0434010b
>c00003d7
>bf8c007f
>d282000d
>0434010c
>c00003d1
>bf8c007f
>101c1400
>c00003d0
>bf8c007f
>d282000e
>04380109
>c00003d2
>bf8c007f
>d282000e
>0438010b
>c00003d3
>bf8c007f
>d2820009
>0438010c
>f800021f
>08080d09
>c0840708
>bf8c000f
>e00c2000
>80020900
>bf8c0770
>0600170b
>7e004f00
>100000ff
>400ccccd
>7e004b00
>061a150a
>7e1a4f0d
>101a1aff
>400ccccd
>7e1a4b0d
>06121309
>7e124f09
>101212ff
>400ccccd
>7e124b09
>c0000300
>bf8c007f
>7e140200
>f800022f
>0a000d09
>c0000335
>bf8c000f
>10000400
>c0000334
>bf8c007f
>d2820000
>04000101
>c0000336
>bf8c007f
>d2820000
>04000103
>c0000337
>bf8c007f
>7e120200
>d2820000
>04021204
>f800023f
>08000504
>f800024f
>00030201
>c00003e4
>bf8c000f
>d2820000
>04120e00
>c0000302
>bf8c007f
>10020c00
>08020f01
>c00003e5
>bf8c007f
>10040e00
>08040b02
>f80008cf
>07010200
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL IN[2], GENERIC[21], PERSPECTIVE
>DCL IN[3], GENERIC[22], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL CONST[0..30]
>DCL TEMP[0..5], LOCAL
>DCL TEMP[6], ARRAY(1), LOCAL
>IMM[0] FLT32 {    0.0000,     1.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MAD TEMP[1].x, CONST[12].xxxx, CONST[21].yyyy, -IN[3].zzzz
>  3: MAD TEMP[2].x, CONST[12].xxxx, CONST[20].zzzz, -IN[3].zzzz
>  4: RCP TEMP[3].x, TEMP[2].xxxx
>  5: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
>  6: MUL TEMP[3].x, TEMP[1].xxxx, TEMP[3].xxxx
>  7: MOV_SAT TEMP[3].x, TEMP[3].xxxx
>  8: SGE TEMP[2].x, -TEMP[2].xxxx, IMM[0].xxxx
>  9: F2I TEMP[2].x, -TEMP[2]
> 10: UIF TEMP[2].xxxx :0
> 11:   MOV TEMP[2].x, IMM[0].yyyy
> 12: ELSE :0
> 13:   MOV TEMP[2].x, TEMP[3].xxxx
> 14: ENDIF
> 15: MUL TEMP[3].x, IN[2].zzzz, CONST[21].wwww
> 16: MAD TEMP[2].x, TEMP[3].xxxx, TEMP[2].xxxx, -CONST[21].xxxx
> 17: MIN TEMP[2].x, TEMP[2].xxxx, CONST[21].zzzz
> 18: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 19: MAD TEMP[3].x, TEMP[2].xxxx, -TEMP[2].xxxx, TEMP[2].xxxx
> 20: MUL TEMP[3].x, TEMP[3].xxxx, CONST[12].xxxx
> 21: MAD TEMP[3].x, TEMP[2].xxxx, TEMP[2].xxxx, TEMP[3].xxxx
> 22: MUL TEMP[4].x, TEMP[0].wwww, CONST[1].wwww
> 23: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[1].xyzz
> 24: MAD TEMP[5].x, TEMP[4].xxxx, IN[1].wwww, -TEMP[4].xxxx
> 25: MUL TEMP[0].xyz, TEMP[0].xyzz, IN[1].xyzz
> 26: MAD TEMP[4].x, CONST[12].wwww, TEMP[5].xxxx, TEMP[4].xxxx
> 27: MAD TEMP[1].xyz, TEMP[0].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 28: ADD TEMP[2].x, TEMP[2].xxxx, -TEMP[4].xxxx
> 29: MAD TEMP[2].x, CONST[12].zzzz, TEMP[2].xxxx, TEMP[4].xxxx
> 30: MUL TEMP[1].xyz, TEMP[3].xxxx, TEMP[1].xyzz
> 31: MAD TEMP[3].x, IN[2].zzzz, CONST[29].wwww, -TEMP[2].xxxx
> 32: MAD TEMP[0].xyz, TEMP[0].xyzz, CONST[30].xxxx, TEMP[1].xyzz
> 33: MAD TEMP[1].x, CONST[12].yyyy, TEMP[3].xxxx, TEMP[2].xxxx
> 34: MOV TEMP[0].w, TEMP[1].xxxx
> 35: MOV TEMP[6], TEMP[0]
> 36: MOV OUT[0], TEMP[6]
> 37: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 4
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 5
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 6
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 7
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 48
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 49
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 50
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 51
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 82
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 84
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 85
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr float addrspace(2)* %21, i32 86
>  %45 = load float addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr float addrspace(2)* %21, i32 87
>  %47 = load float addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr float addrspace(2)* %21, i32 116
>  %49 = load float addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr float addrspace(2)* %21, i32 117
>  %51 = load float addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr float addrspace(2)* %21, i32 118
>  %53 = load float addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr float addrspace(2)* %21, i32 119
>  %55 = load float addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr float addrspace(2)* %21, i32 120
>  %57 = load float addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %59 = load <32 x i8> addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %61 = load <16 x i8> addrspace(2)* %60, !tbaa !0
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %64 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %65 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %66 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %3, <2 x i32> %5)
>  %67 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %3, <2 x i32> %5)
>  %68 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %3, <2 x i32> %5)
>  %69 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %3, <2 x i32> %5)
>  %70 = bitcast float %62 to i32
>  %71 = bitcast float %63 to i32
>  %72 = insertelement <2 x i32> undef, i32 %70, i32 0
>  %73 = insertelement <2 x i32> %72, i32 %71, i32 1
>  %74 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %73, <32 x i8> %59, <16 x i8> %61, i32 2)
>  %75 = extractelement <4 x float> %74, i32 0
>  %76 = extractelement <4 x float> %74, i32 1
>  %77 = extractelement <4 x float> %74, i32 2
>  %78 = extractelement <4 x float> %74, i32 3
>  %79 = fsub float -0.000000e+00, %69
>  %80 = fmul float %31, %43
>  %81 = fadd float %80, %79
>  %82 = fsub float -0.000000e+00, %69
>  %83 = fmul float %31, %39
>  %84 = fadd float %83, %82
>  %85 = fdiv float 1.000000e+00, %84
>  %86 = fmul float %84, %84
>  %87 = fmul float %81, %85
>  %88 = call float @llvm.AMDIL.clamp.(float %87, float 0.000000e+00, float 1.000000e+00)
>  %89 = fsub float -0.000000e+00, %86
>  %90 = fcmp uge float %89, 0.000000e+00
>  %91 = select i1 %90, float 1.000000e+00, float 0.000000e+00
>  %92 = fsub float -0.000000e+00, %91
>  %93 = fptosi float %92 to i32
>  %94 = bitcast i32 %93 to float
>  %95 = bitcast float %94 to i32
>  %96 = icmp ne i32 %95, 0
>  %. = select i1 %96, float 1.000000e+00, float %88
>  %97 = fmul float %68, %47
>  %98 = fsub float -0.000000e+00, %41
>  %99 = fmul float %97, %.
>  %100 = fadd float %99, %98
>  %101 = fcmp uge float %100, %45
>  %102 = select i1 %101, float %45, float %100
>  %103 = call float @llvm.AMDIL.clamp.(float %102, float 0.000000e+00, float 1.000000e+00)
>  %104 = fsub float -0.000000e+00, %103
>  %105 = fmul float %103, %104
>  %106 = fadd float %105, %103
>  %107 = fmul float %106, %31
>  %108 = fmul float %103, %103
>  %109 = fadd float %108, %107
>  %110 = fmul float %78, %29
>  %111 = fmul float %75, %23
>  %112 = fmul float %76, %25
>  %113 = fmul float %77, %27
>  %114 = fsub float -0.000000e+00, %110
>  %115 = fmul float %110, %67
>  %116 = fadd float %115, %114
>  %117 = fmul float %111, %64
>  %118 = fmul float %112, %65
>  %119 = fmul float %113, %66
>  %120 = fmul float %37, %116
>  %121 = fadd float %120, %110
>  %122 = fsub float -0.000000e+00, %57
>  %123 = fmul float %117, %122
>  %124 = fadd float %123, %49
>  %125 = fsub float -0.000000e+00, %57
>  %126 = fmul float %118, %125
>  %127 = fadd float %126, %51
>  %128 = fsub float -0.000000e+00, %57
>  %129 = fmul float %119, %128
>  %130 = fadd float %129, %53
>  %131 = fsub float -0.000000e+00, %121
>  %132 = fadd float %103, %131
>  %133 = fmul float %35, %132
>  %134 = fadd float %133, %121
>  %135 = fmul float %109, %124
>  %136 = fmul float %109, %127
>  %137 = fmul float %109, %130
>  %138 = fsub float -0.000000e+00, %134
>  %139 = fmul float %68, %55
>  %140 = fadd float %139, %138
>  %141 = fmul float %117, %57
>  %142 = fadd float %141, %135
>  %143 = fmul float %118, %57
>  %144 = fadd float %143, %136
>  %145 = fmul float %119, %57
>  %146 = fadd float %145, %137
>  %147 = fmul float %33, %140
>  %148 = fadd float %147, %134
>  %149 = fcmp uge float %148, 0x3FDFDFE000000000
>  %150 = sext i1 %149 to i32
>  %151 = trunc i32 %150 to i1
>  %152 = select i1 %151, float 1.000000e+00, float -1.000000e+00
>  call void @llvm.AMDGPU.kill(float %152)
>  %153 = call i32 @llvm.SI.packf16(float %142, float %144)
>  %154 = bitcast i32 %153 to float
>  %155 = call i32 @llvm.SI.packf16(float %146, float %148)
>  %156 = bitcast i32 %155 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %154, float %156, float %154, float %156)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.AMDGPU.kill(float)
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430202
>c0400100
>bf8c0070
>c0010107
>bf8c007f
>100c0a02
>c81c0700
>c81d0701
>100e0f06
>080e0d07
>c0010133
>bf8c007f
>d2820006
>041a0e02
>c81c0e00
>c81d0e01
>c0010130
>c0018155
>bf8c007f
>7e100203
>d2100008
>02021002
>08100f08
>c0018152
>bf8c007f
>7e120203
>d2100009
>02021202
>08120f09
>7e0e5509
>100e0f08
>d2060807
>02010107
>10101309
>d2060008
>22010108
>d00c0004
>02010108
>d2000008
>0011e480
>d2060008
>22010108
>7e101108
>d10a0004
>02010108
>d2000008
>0011e507
>c81c0a00
>c81d0a01
>c0018157
>bf8c007f
>10120e03
>10101109
>c0018154
>bf8c007f
>0a101003
>c0018156
>bf8c007f
>d00c0004
>02000708
>7e120203
>d2000008
>00121308
>d2060808
>02010108
>08120d08
>c0018132
>bf8c007f
>d2820006
>041a1203
>c0018177
>bf8c007f
>100e0e03
>080e0d07
>c0018131
>bf8c007f
>d2820007
>041a0e03
>7e0c02ff
>3efeff00
>d00c0004
>02020d07
>d2000006
>0011e4f3
>7c260c80
>100c1108
>080c0d08
>100c0c02
>d2820006
>041a1108
>c0010106
>bf8c007f
>10100802
>c8240600
>c8250601
>10101308
>c0010178
>bf8c007f
>10121002
>c0018176
>bf8c007f
>08121203
>10121306
>d2820008
>04240508
>5e0e0f08
>c0018105
>bf8c007f
>10100603
>c8240500
>c8250501
>10101308
>10121002
>c0018175
>bf8c007f
>08121203
>10121306
>d2820008
>04240508
>c0018104
>bf8c007f
>10040403
>c80c0400
>c80d0401
>10000702
>10020002
>c0000174
>bf8c007f
>08020200
>10020306
>d2820000
>04040500
>5e001100
>f8001c0f
>07000700
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL IN[4]
>DCL IN[5]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL OUT[3], GENERIC[20]
>DCL OUT[4], GENERIC[21]
>DCL OUT[5], GENERIC[22]
>DCL CONST[0..57]
>DCL TEMP[0..7], LOCAL
>IMM[0] FLT32 { -128.0000,     1.0000,   -64.0000,    -2.0000}
>IMM[1] FLT32 {   -0.0159,     0.0159,     2.2000,     0.0000}
>  0: ADD TEMP[0].xyz, IN[2].xyzz, IN[2].xyzz
>  1: LG2 TEMP[0].x, TEMP[0].xxxx
>  2: LG2 TEMP[1].x, TEMP[0].yyyy
>  3: MOV TEMP[0].y, TEMP[1].xxxx
>  4: LG2 TEMP[2].x, TEMP[0].zzzz
>  5: MOV TEMP[0].z, TEMP[2].xxxx
>  6: MUL TEMP[0].xyz, TEMP[0].xyzz, IMM[1].zzzz
>  7: EX2 TEMP[3].x, TEMP[0].xxxx
>  8: EX2 TEMP[4].x, TEMP[0].yyyy
>  9: MOV TEMP[3].y, TEMP[4].xxxx
> 10: EX2 TEMP[4].x, TEMP[0].zzzz
> 11: MOV TEMP[3].z, TEMP[4].xxxx
> 12: DP4 TEMP[4].x, IN[3], CONST[48]
> 13: DP4 TEMP[5].x, IN[3], CONST[49]
> 14: MOV TEMP[4].y, TEMP[5].xxxx
> 15: MAD TEMP[0].xyz, IN[4].xyzz, CONST[3].xxxx, IN[0].xyzz
> 16: MOV TEMP[0].w, IN[0].wwww
> 17: DP4 TEMP[1].x, TEMP[0], CONST[54]
> 18: DP4 TEMP[5].x, TEMP[0], CONST[55]
> 19: MOV TEMP[1].y, TEMP[5].xxxx
> 20: DP4 TEMP[5].x, TEMP[0], CONST[56]
> 21: MOV TEMP[1].z, TEMP[5].xxxx
> 22: MOV TEMP[1].w, CONST[0].yyyy
> 23: DP4 TEMP[5].x, TEMP[1], CONST[10]
> 24: MOV TEMP[0].z, TEMP[5].xxxx
> 25: DP4 TEMP[0].x, TEMP[1], CONST[8]
> 26: DP4 TEMP[5].x, TEMP[1], CONST[9]
> 27: MOV TEMP[0].y, TEMP[5].xxxx
> 28: DP4 TEMP[5].x, TEMP[1], CONST[11]
> 29: MOV TEMP[0].w, TEMP[5].xxxx
> 30: DP4 TEMP[5].x, TEMP[1], CONST[13]
> 31: MOV TEMP[2].z, TEMP[5].xxxx
> 32: MOV TEMP[1].xyz, TEMP[1].xyzx
> 33: MOV TEMP[6], TEMP[0]
> 34: MOV TEMP[7].xy, TEMP[0].xyxx
> 35: MOV TEMP[3].w, CONST[0].xxxx
> 36: MOV TEMP[7].zw, TEMP[2].wwzw
> 37: MOV TEMP[1].w, TEMP[5].xxxx
> 38: MOV TEMP[2], TEMP[6]
> 39: MAD TEMP[5].x, TEMP[0].zzzz, CONST[0].zzzz, -TEMP[0].wwww
> 40: MOV TEMP[6].z, TEMP[5].xxxx
> 41: MOV TEMP[6].y, -TEMP[0].yyyy
> 42: MAD TEMP[6].xy, CONST[57].xyyy, TEMP[0].wwww, TEMP[6].xyyy
> 43: MOV OUT[2], TEMP[4]
> 44: MOV OUT[3], TEMP[3]
> 45: MOV OUT[0], TEMP[6]
> 46: MOV OUT[1], TEMP[2]
> 47: MOV OUT[4], TEMP[7]
> 48: MOV OUT[5], TEMP[1]
> 49: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 12
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 32
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 33
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 34
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 35
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 36
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 37
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 38
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 39
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 40
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 41
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 42
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 43
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 44
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 45
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 46
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 47
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 52
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 53
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 54
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 55
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 192
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 193
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 194
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 195
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 196
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 197
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 198
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 199
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 216
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 217
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 218
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 219
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 220
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 221
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 222
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 223
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 224
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 225
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr float addrspace(2)* %10, i32 226
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = getelementptr float addrspace(2)* %10, i32 227
>  %98 = load float addrspace(2)* %97, !tbaa !0
>  %99 = getelementptr float addrspace(2)* %10, i32 228
>  %100 = load float addrspace(2)* %99, !tbaa !0
>  %101 = getelementptr float addrspace(2)* %10, i32 229
>  %102 = load float addrspace(2)* %101, !tbaa !0
>  %103 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %104 = load <16 x i8> addrspace(2)* %103, !tbaa !0
>  %105 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %104, i32 0, i32 %5)
>  %106 = extractelement <4 x float> %105, i32 0
>  %107 = extractelement <4 x float> %105, i32 1
>  %108 = extractelement <4 x float> %105, i32 2
>  %109 = extractelement <4 x float> %105, i32 3
>  %110 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %111 = load <16 x i8> addrspace(2)* %110, !tbaa !0
>  %112 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %111, i32 0, i32 %5)
>  %113 = extractelement <4 x float> %112, i32 0
>  %114 = extractelement <4 x float> %112, i32 1
>  %115 = extractelement <4 x float> %112, i32 2
>  %116 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %117 = load <16 x i8> addrspace(2)* %116, !tbaa !0
>  %118 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %117, i32 0, i32 %5)
>  %119 = extractelement <4 x float> %118, i32 0
>  %120 = extractelement <4 x float> %118, i32 1
>  %121 = extractelement <4 x float> %118, i32 2
>  %122 = extractelement <4 x float> %118, i32 3
>  %123 = getelementptr <16 x i8> addrspace(2)* %3, i32 4
>  %124 = load <16 x i8> addrspace(2)* %123, !tbaa !0
>  %125 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %124, i32 0, i32 %5)
>  %126 = extractelement <4 x float> %125, i32 0
>  %127 = extractelement <4 x float> %125, i32 1
>  %128 = extractelement <4 x float> %125, i32 2
>  %129 = fadd float %113, %113
>  %130 = fadd float %114, %114
>  %131 = fadd float %115, %115
>  %132 = call float @llvm.log2.f32(float %129)
>  %133 = call float @llvm.log2.f32(float %130)
>  %134 = call float @llvm.log2.f32(float %131)
>  %135 = fmul float %132, 0x40019999A0000000
>  %136 = fmul float %133, 0x40019999A0000000
>  %137 = fmul float %134, 0x40019999A0000000
>  %138 = call float @llvm.AMDIL.exp.(float %135)
>  %139 = call float @llvm.AMDIL.exp.(float %136)
>  %140 = call float @llvm.AMDIL.exp.(float %137)
>  %141 = fmul float %119, %60
>  %142 = fmul float %120, %62
>  %143 = fadd float %141, %142
>  %144 = fmul float %121, %64
>  %145 = fadd float %143, %144
>  %146 = fmul float %122, %66
>  %147 = fadd float %145, %146
>  %148 = fmul float %119, %68
>  %149 = fmul float %120, %70
>  %150 = fadd float %148, %149
>  %151 = fmul float %121, %72
>  %152 = fadd float %150, %151
>  %153 = fmul float %122, %74
>  %154 = fadd float %152, %153
>  %155 = fmul float %126, %18
>  %156 = fadd float %155, %106
>  %157 = fmul float %127, %18
>  %158 = fadd float %157, %107
>  %159 = fmul float %128, %18
>  %160 = fadd float %159, %108
>  %161 = fmul float %156, %76
>  %162 = fmul float %158, %78
>  %163 = fadd float %161, %162
>  %164 = fmul float %160, %80
>  %165 = fadd float %163, %164
>  %166 = fmul float %109, %82
>  %167 = fadd float %165, %166
>  %168 = fmul float %156, %84
>  %169 = fmul float %158, %86
>  %170 = fadd float %168, %169
>  %171 = fmul float %160, %88
>  %172 = fadd float %170, %171
>  %173 = fmul float %109, %90
>  %174 = fadd float %172, %173
>  %175 = fmul float %156, %92
>  %176 = fmul float %158, %94
>  %177 = fadd float %175, %176
>  %178 = fmul float %160, %96
>  %179 = fadd float %177, %178
>  %180 = fmul float %109, %98
>  %181 = fadd float %179, %180
>  %182 = fmul float %167, %36
>  %183 = fmul float %174, %38
>  %184 = fadd float %182, %183
>  %185 = fmul float %181, %40
>  %186 = fadd float %184, %185
>  %187 = fmul float %14, %42
>  %188 = fadd float %186, %187
>  %189 = fmul float %167, %20
>  %190 = fmul float %174, %22
>  %191 = fadd float %189, %190
>  %192 = fmul float %181, %24
>  %193 = fadd float %191, %192
>  %194 = fmul float %14, %26
>  %195 = fadd float %193, %194
>  %196 = fmul float %167, %28
>  %197 = fmul float %174, %30
>  %198 = fadd float %196, %197
>  %199 = fmul float %181, %32
>  %200 = fadd float %198, %199
>  %201 = fmul float %14, %34
>  %202 = fadd float %200, %201
>  %203 = fmul float %167, %44
>  %204 = fmul float %174, %46
>  %205 = fadd float %203, %204
>  %206 = fmul float %181, %48
>  %207 = fadd float %205, %206
>  %208 = fmul float %14, %50
>  %209 = fadd float %207, %208
>  %210 = fmul float %167, %52
>  %211 = fmul float %174, %54
>  %212 = fadd float %210, %211
>  %213 = fmul float %181, %56
>  %214 = fadd float %212, %213
>  %215 = fmul float %14, %58
>  %216 = fadd float %214, %215
>  %217 = fsub float -0.000000e+00, %209
>  %218 = fmul float %188, %16
>  %219 = fadd float %218, %217
>  %220 = fsub float -0.000000e+00, %202
>  %221 = fmul float %100, %209
>  %222 = fadd float %221, %195
>  %223 = fmul float %102, %209
>  %224 = fadd float %223, %220
>  %225 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %226 = load float addrspace(2)* addrspace(2)* %225, !tbaa !0
>  %227 = getelementptr float addrspace(2)* %226, i32 0
>  %228 = load float addrspace(2)* %227, !tbaa !0
>  %229 = fmul float %228, %195
>  %230 = getelementptr float addrspace(2)* %226, i32 1
>  %231 = load float addrspace(2)* %230, !tbaa !0
>  %232 = fmul float %231, %202
>  %233 = fadd float %229, %232
>  %234 = getelementptr float addrspace(2)* %226, i32 2
>  %235 = load float addrspace(2)* %234, !tbaa !0
>  %236 = fmul float %235, %188
>  %237 = fadd float %233, %236
>  %238 = getelementptr float addrspace(2)* %226, i32 3
>  %239 = load float addrspace(2)* %238, !tbaa !0
>  %240 = fmul float %239, %209
>  %241 = fadd float %237, %240
>  %242 = getelementptr float addrspace(2)* %226, i32 4
>  %243 = load float addrspace(2)* %242, !tbaa !0
>  %244 = fmul float %243, %195
>  %245 = getelementptr float addrspace(2)* %226, i32 5
>  %246 = load float addrspace(2)* %245, !tbaa !0
>  %247 = fmul float %246, %202
>  %248 = fadd float %244, %247
>  %249 = getelementptr float addrspace(2)* %226, i32 6
>  %250 = load float addrspace(2)* %249, !tbaa !0
>  %251 = fmul float %250, %188
>  %252 = fadd float %248, %251
>  %253 = getelementptr float addrspace(2)* %226, i32 7
>  %254 = load float addrspace(2)* %253, !tbaa !0
>  %255 = fmul float %254, %209
>  %256 = fadd float %252, %255
>  %257 = getelementptr float addrspace(2)* %226, i32 8
>  %258 = load float addrspace(2)* %257, !tbaa !0
>  %259 = fmul float %258, %195
>  %260 = getelementptr float addrspace(2)* %226, i32 9
>  %261 = load float addrspace(2)* %260, !tbaa !0
>  %262 = fmul float %261, %202
>  %263 = fadd float %259, %262
>  %264 = getelementptr float addrspace(2)* %226, i32 10
>  %265 = load float addrspace(2)* %264, !tbaa !0
>  %266 = fmul float %265, %188
>  %267 = fadd float %263, %266
>  %268 = getelementptr float addrspace(2)* %226, i32 11
>  %269 = load float addrspace(2)* %268, !tbaa !0
>  %270 = fmul float %269, %209
>  %271 = fadd float %267, %270
>  %272 = getelementptr float addrspace(2)* %226, i32 12
>  %273 = load float addrspace(2)* %272, !tbaa !0
>  %274 = fmul float %273, %195
>  %275 = getelementptr float addrspace(2)* %226, i32 13
>  %276 = load float addrspace(2)* %275, !tbaa !0
>  %277 = fmul float %276, %202
>  %278 = fadd float %274, %277
>  %279 = getelementptr float addrspace(2)* %226, i32 14
>  %280 = load float addrspace(2)* %279, !tbaa !0
>  %281 = fmul float %280, %188
>  %282 = fadd float %278, %281
>  %283 = getelementptr float addrspace(2)* %226, i32 15
>  %284 = load float addrspace(2)* %283, !tbaa !0
>  %285 = fmul float %284, %209
>  %286 = fadd float %282, %285
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %241, float %256, float %271, float %286)
>  %287 = getelementptr float addrspace(2)* %226, i32 16
>  %288 = load float addrspace(2)* %287, !tbaa !0
>  %289 = fmul float %288, %195
>  %290 = getelementptr float addrspace(2)* %226, i32 17
>  %291 = load float addrspace(2)* %290, !tbaa !0
>  %292 = fmul float %291, %202
>  %293 = fadd float %289, %292
>  %294 = getelementptr float addrspace(2)* %226, i32 18
>  %295 = load float addrspace(2)* %294, !tbaa !0
>  %296 = fmul float %295, %188
>  %297 = fadd float %293, %296
>  %298 = getelementptr float addrspace(2)* %226, i32 19
>  %299 = load float addrspace(2)* %298, !tbaa !0
>  %300 = fmul float %299, %209
>  %301 = fadd float %297, %300
>  %302 = getelementptr float addrspace(2)* %226, i32 20
>  %303 = load float addrspace(2)* %302, !tbaa !0
>  %304 = fmul float %303, %195
>  %305 = getelementptr float addrspace(2)* %226, i32 21
>  %306 = load float addrspace(2)* %305, !tbaa !0
>  %307 = fmul float %306, %202
>  %308 = fadd float %304, %307
>  %309 = getelementptr float addrspace(2)* %226, i32 22
>  %310 = load float addrspace(2)* %309, !tbaa !0
>  %311 = fmul float %310, %188
>  %312 = fadd float %308, %311
>  %313 = getelementptr float addrspace(2)* %226, i32 23
>  %314 = load float addrspace(2)* %313, !tbaa !0
>  %315 = fmul float %314, %209
>  %316 = fadd float %312, %315
>  %317 = getelementptr float addrspace(2)* %226, i32 24
>  %318 = load float addrspace(2)* %317, !tbaa !0
>  %319 = fmul float %318, %195
>  %320 = getelementptr float addrspace(2)* %226, i32 25
>  %321 = load float addrspace(2)* %320, !tbaa !0
>  %322 = fmul float %321, %202
>  %323 = fadd float %319, %322
>  %324 = getelementptr float addrspace(2)* %226, i32 26
>  %325 = load float addrspace(2)* %324, !tbaa !0
>  %326 = fmul float %325, %188
>  %327 = fadd float %323, %326
>  %328 = getelementptr float addrspace(2)* %226, i32 27
>  %329 = load float addrspace(2)* %328, !tbaa !0
>  %330 = fmul float %329, %209
>  %331 = fadd float %327, %330
>  %332 = getelementptr float addrspace(2)* %226, i32 28
>  %333 = load float addrspace(2)* %332, !tbaa !0
>  %334 = fmul float %333, %195
>  %335 = getelementptr float addrspace(2)* %226, i32 29
>  %336 = load float addrspace(2)* %335, !tbaa !0
>  %337 = fmul float %336, %202
>  %338 = fadd float %334, %337
>  %339 = getelementptr float addrspace(2)* %226, i32 30
>  %340 = load float addrspace(2)* %339, !tbaa !0
>  %341 = fmul float %340, %188
>  %342 = fadd float %338, %341
>  %343 = getelementptr float addrspace(2)* %226, i32 31
>  %344 = load float addrspace(2)* %343, !tbaa !0
>  %345 = fmul float %344, %209
>  %346 = fadd float %342, %345
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %301, float %316, float %331, float %346)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %147, float %154, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %138, float %139, float %140, float %12)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %195, float %202, float %216, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %167, float %174, float %181, float %216)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %222, float %224, float %219, float %209)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: nounwind readonly
>declare float @llvm.log2.f32(float) #2
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.exp.(float) #3
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { nounwind readonly }
>attributes #3 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840700
>bf8c007f
>e00c2000
>80020300
>c0840710
>bf8c0070
>e00c2000
>80020900
>c0410100
>bf8c0070
>c002030c
>bf8c007f
>d2820007
>040c0909
>d2820008
>0410090a
>c00283d9
>bf8c007f
>10021005
>c00283d8
>bf8c007f
>d2820001
>04040b07
>d2820009
>0414090b
>c00203da
>bf8c007f
>d2820001
>04040909
>c00203db
>bf8c007f
>d2820001
>04040906
>c00203dd
>bf8c007f
>10041004
>c00203dc
>bf8c007f
>d2820002
>04080907
>c00203de
>bf8c007f
>d2820002
>04080909
>c00203df
>bf8c007f
>d2820002
>04080906
>c0020321
>bf8c007f
>10140404
>c0020320
>bf8c007f
>d282000a
>04280901
>c00203e1
>bf8c007f
>10101004
>c00203e0
>bf8c007f
>d2820007
>04200907
>c00203e2
>bf8c007f
>d2820007
>041c0909
>c00203e3
>bf8c007f
>d2820003
>041c0906
>c0020322
>bf8c007f
>d2820004
>04280903
>c0020301
>c0028323
>bf8c007f
>7e0a0205
>d2820004
>04120a04
>c0028325
>bf8c007f
>100a0405
>c0028324
>bf8c007f
>d2820005
>04140b01
>c0028326
>bf8c007f
>d2820005
>04140b03
>c0028327
>bf8c007f
>7e0c0205
>d2820005
>04160c04
>c0400102
>bf8c007f
>c002810d
>bf8c007f
>100c0a05
>c002810c
>bf8c007f
>d2820007
>041a0805
>c0028329
>bf8c007f
>100c0405
>c0028328
>bf8c007f
>d2820006
>04180b01
>c002832a
>bf8c007f
>d2820006
>04180b03
>c002832b
>bf8c007f
>7e100205
>d2820006
>041a1004
>c002810e
>bf8c007f
>d2820008
>041e0c05
>c002832d
>bf8c007f
>100e0405
>c002832c
>bf8c007f
>d2820007
>041c0b01
>c002832e
>bf8c007f
>d2820007
>041c0b03
>c002832f
>bf8c007f
>7e120205
>d2820007
>041e1204
>c002810f
>bf8c007f
>d2820008
>04220e05
>c0028109
>bf8c007f
>10120a05
>c0028108
>bf8c007f
>d2820009
>04260805
>c002810a
>bf8c007f
>d2820009
>04260c05
>c002810b
>bf8c007f
>d2820009
>04260e05
>c0028105
>bf8c007f
>10140a05
>c0028104
>bf8c007f
>d282000a
>042a0805
>c0028106
>bf8c007f
>d282000a
>042a0c05
>c0028107
>bf8c007f
>d282000a
>042a0e05
>c0028101
>bf8c007f
>10160a05
>c0028100
>bf8c007f
>d282000b
>042e0805
>c0028102
>bf8c007f
>d282000b
>042e0c05
>c0028103
>bf8c007f
>d282000b
>042e0e05
>f80000ef
>08090a0b
>c002811d
>bf8c000f
>10100a05
>c002811c
>bf8c007f
>d2820008
>04220805
>c002811e
>bf8c007f
>d2820008
>04220c05
>c002811f
>bf8c007f
>d2820008
>04220e05
>c0028119
>bf8c007f
>10120a05
>c0028118
>bf8c007f
>d2820009
>04260805
>c002811a
>bf8c007f
>d2820009
>04260c05
>c002811b
>bf8c007f
>d2820009
>04260e05
>c0028115
>bf8c007f
>10140a05
>c0028114
>bf8c007f
>d282000a
>042a0805
>c0028116
>bf8c007f
>d282000a
>042a0c05
>c0028117
>bf8c007f
>d282000a
>042a0e05
>c0028111
>bf8c007f
>10160a05
>c0028110
>bf8c007f
>d282000b
>042e0805
>c0028112
>bf8c007f
>d282000b
>042e0c05
>c0000113
>bf8c007f
>d282000b
>042e0e00
>f80000ff
>08090a0b
>c084070c
>bf8c000f
>e00c2000
>80020800
>c00003c5
>bf8c0070
>10181200
>c00003c4
>bf8c007f
>d282000c
>04300108
>c00003c6
>bf8c007f
>d282000c
>0430010a
>c00003c7
>bf8c007f
>d282000c
>0430010b
>c00003c1
>bf8c007f
>101a1200
>c00003c0
>bf8c007f
>d282000d
>04340108
>c00003c2
>bf8c007f
>d282000d
>0434010a
>c00003c3
>bf8c007f
>d2820009
>0434010b
>7e100280
>f800020f
>08080c09
>c0840708
>bf8c000f
>e00c2000
>80020900
>bf8c0770
>0600170b
>7e004f00
>100000ff
>400ccccd
>7e004b00
>061a150a
>7e1a4f0d
>101a1aff
>400ccccd
>7e1a4b0d
>06121309
>7e124f09
>101212ff
>400ccccd
>7e124b09
>c0000300
>bf8c007f
>7e140200
>f800021f
>0a000d09
>c0000335
>bf8c000f
>10000400
>c0000334
>bf8c007f
>d2820000
>04000101
>c0000336
>bf8c007f
>d2820000
>04000103
>c0000337
>bf8c007f
>7e120200
>d2820000
>04021204
>f800022f
>08000504
>f800023f
>00030201
>c00003e4
>bf8c000f
>d2820000
>04120e00
>c0000302
>bf8c007f
>10020c00
>08020f01
>c00003e5
>bf8c007f
>10040e00
>08040b02
>f80008cf
>07010200
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL IN[2], GENERIC[21], PERSPECTIVE
>DCL IN[3], GENERIC[22], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL CONST[0..30]
>DCL TEMP[0..5], LOCAL
>DCL TEMP[6], ARRAY(1), LOCAL
>IMM[0] FLT32 {    0.0000,     1.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MAD TEMP[1].x, CONST[12].xxxx, CONST[21].yyyy, -IN[3].zzzz
>  3: MAD TEMP[2].x, CONST[12].xxxx, CONST[20].zzzz, -IN[3].zzzz
>  4: RCP TEMP[3].x, TEMP[2].xxxx
>  5: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
>  6: MUL TEMP[3].x, TEMP[1].xxxx, TEMP[3].xxxx
>  7: MOV_SAT TEMP[3].x, TEMP[3].xxxx
>  8: SGE TEMP[2].x, -TEMP[2].xxxx, IMM[0].xxxx
>  9: F2I TEMP[2].x, -TEMP[2]
> 10: UIF TEMP[2].xxxx :0
> 11:   MOV TEMP[2].x, IMM[0].yyyy
> 12: ELSE :0
> 13:   MOV TEMP[2].x, TEMP[3].xxxx
> 14: ENDIF
> 15: MUL TEMP[3].x, IN[2].zzzz, CONST[21].wwww
> 16: MAD TEMP[2].x, TEMP[3].xxxx, TEMP[2].xxxx, -CONST[21].xxxx
> 17: MIN TEMP[2].x, TEMP[2].xxxx, CONST[21].zzzz
> 18: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 19: MAD TEMP[3].x, TEMP[2].xxxx, -TEMP[2].xxxx, TEMP[2].xxxx
> 20: MUL TEMP[3].x, TEMP[3].xxxx, CONST[12].xxxx
> 21: MAD TEMP[3].x, TEMP[2].xxxx, TEMP[2].xxxx, TEMP[3].xxxx
> 22: MUL TEMP[4].x, TEMP[0].wwww, CONST[1].wwww
> 23: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[1].xyzz
> 24: MAD TEMP[5].x, TEMP[4].xxxx, IN[1].wwww, -TEMP[4].xxxx
> 25: MUL TEMP[0].xyz, TEMP[0].xyzz, IN[1].xyzz
> 26: MAD TEMP[4].x, CONST[12].wwww, TEMP[5].xxxx, TEMP[4].xxxx
> 27: MAD TEMP[1].xyz, TEMP[0].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 28: ADD TEMP[2].x, TEMP[2].xxxx, -TEMP[4].xxxx
> 29: MAD TEMP[2].x, CONST[12].zzzz, TEMP[2].xxxx, TEMP[4].xxxx
> 30: MUL TEMP[1].xyz, TEMP[3].xxxx, TEMP[1].xyzz
> 31: MAD TEMP[3].x, IN[2].zzzz, CONST[29].wwww, -TEMP[2].xxxx
> 32: MAD TEMP[0].xyz, TEMP[0].xyzz, CONST[30].xxxx, TEMP[1].xyzz
> 33: MAD TEMP[1].x, CONST[12].yyyy, TEMP[3].xxxx, TEMP[2].xxxx
> 34: MOV TEMP[0].w, TEMP[1].xxxx
> 35: MOV TEMP[6], TEMP[0]
> 36: MOV OUT[0], TEMP[6]
> 37: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 4
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 5
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 6
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 7
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 48
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 49
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 50
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 51
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 82
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 84
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 85
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr float addrspace(2)* %21, i32 86
>  %45 = load float addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr float addrspace(2)* %21, i32 87
>  %47 = load float addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr float addrspace(2)* %21, i32 116
>  %49 = load float addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr float addrspace(2)* %21, i32 117
>  %51 = load float addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr float addrspace(2)* %21, i32 118
>  %53 = load float addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr float addrspace(2)* %21, i32 119
>  %55 = load float addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr float addrspace(2)* %21, i32 120
>  %57 = load float addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %59 = load <32 x i8> addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %61 = load <16 x i8> addrspace(2)* %60, !tbaa !0
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %64 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %65 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %66 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %3, <2 x i32> %5)
>  %67 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %3, <2 x i32> %5)
>  %68 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %3, <2 x i32> %5)
>  %69 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %3, <2 x i32> %5)
>  %70 = bitcast float %62 to i32
>  %71 = bitcast float %63 to i32
>  %72 = insertelement <2 x i32> undef, i32 %70, i32 0
>  %73 = insertelement <2 x i32> %72, i32 %71, i32 1
>  %74 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %73, <32 x i8> %59, <16 x i8> %61, i32 2)
>  %75 = extractelement <4 x float> %74, i32 0
>  %76 = extractelement <4 x float> %74, i32 1
>  %77 = extractelement <4 x float> %74, i32 2
>  %78 = extractelement <4 x float> %74, i32 3
>  %79 = fsub float -0.000000e+00, %69
>  %80 = fmul float %31, %43
>  %81 = fadd float %80, %79
>  %82 = fsub float -0.000000e+00, %69
>  %83 = fmul float %31, %39
>  %84 = fadd float %83, %82
>  %85 = fdiv float 1.000000e+00, %84
>  %86 = fmul float %84, %84
>  %87 = fmul float %81, %85
>  %88 = call float @llvm.AMDIL.clamp.(float %87, float 0.000000e+00, float 1.000000e+00)
>  %89 = fsub float -0.000000e+00, %86
>  %90 = fcmp uge float %89, 0.000000e+00
>  %91 = select i1 %90, float 1.000000e+00, float 0.000000e+00
>  %92 = fsub float -0.000000e+00, %91
>  %93 = fptosi float %92 to i32
>  %94 = bitcast i32 %93 to float
>  %95 = bitcast float %94 to i32
>  %96 = icmp ne i32 %95, 0
>  %. = select i1 %96, float 1.000000e+00, float %88
>  %97 = fmul float %68, %47
>  %98 = fsub float -0.000000e+00, %41
>  %99 = fmul float %97, %.
>  %100 = fadd float %99, %98
>  %101 = fcmp uge float %100, %45
>  %102 = select i1 %101, float %45, float %100
>  %103 = call float @llvm.AMDIL.clamp.(float %102, float 0.000000e+00, float 1.000000e+00)
>  %104 = fsub float -0.000000e+00, %103
>  %105 = fmul float %103, %104
>  %106 = fadd float %105, %103
>  %107 = fmul float %106, %31
>  %108 = fmul float %103, %103
>  %109 = fadd float %108, %107
>  %110 = fmul float %78, %29
>  %111 = fmul float %75, %23
>  %112 = fmul float %76, %25
>  %113 = fmul float %77, %27
>  %114 = fsub float -0.000000e+00, %110
>  %115 = fmul float %110, %67
>  %116 = fadd float %115, %114
>  %117 = fmul float %111, %64
>  %118 = fmul float %112, %65
>  %119 = fmul float %113, %66
>  %120 = fmul float %37, %116
>  %121 = fadd float %120, %110
>  %122 = fsub float -0.000000e+00, %57
>  %123 = fmul float %117, %122
>  %124 = fadd float %123, %49
>  %125 = fsub float -0.000000e+00, %57
>  %126 = fmul float %118, %125
>  %127 = fadd float %126, %51
>  %128 = fsub float -0.000000e+00, %57
>  %129 = fmul float %119, %128
>  %130 = fadd float %129, %53
>  %131 = fsub float -0.000000e+00, %121
>  %132 = fadd float %103, %131
>  %133 = fmul float %35, %132
>  %134 = fadd float %133, %121
>  %135 = fmul float %109, %124
>  %136 = fmul float %109, %127
>  %137 = fmul float %109, %130
>  %138 = fsub float -0.000000e+00, %134
>  %139 = fmul float %68, %55
>  %140 = fadd float %139, %138
>  %141 = fmul float %117, %57
>  %142 = fadd float %141, %135
>  %143 = fmul float %118, %57
>  %144 = fadd float %143, %136
>  %145 = fmul float %119, %57
>  %146 = fadd float %145, %137
>  %147 = fmul float %33, %140
>  %148 = fadd float %147, %134
>  %149 = fcmp uge float %148, 0x3FE6565660000000
>  %150 = sext i1 %149 to i32
>  %151 = trunc i32 %150 to i1
>  %152 = select i1 %151, float 1.000000e+00, float -1.000000e+00
>  call void @llvm.AMDGPU.kill(float %152)
>  %153 = call i32 @llvm.SI.packf16(float %142, float %144)
>  %154 = bitcast i32 %153 to float
>  %155 = call i32 @llvm.SI.packf16(float %146, float %148)
>  %156 = bitcast i32 %155 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %154, float %156, float %154, float %156)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.AMDGPU.kill(float)
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430202
>c0400100
>bf8c0070
>c0010107
>bf8c007f
>100c0a02
>c81c0700
>c81d0701
>100e0f06
>080e0d07
>c0010133
>bf8c007f
>d2820006
>041a0e02
>c81c0e00
>c81d0e01
>c0010130
>c0018155
>bf8c007f
>7e100203
>d2100008
>02021002
>08100f08
>c0018152
>bf8c007f
>7e120203
>d2100009
>02021202
>08120f09
>7e0e5509
>100e0f08
>d2060807
>02010107
>10101309
>d2060008
>22010108
>d00c0004
>02010108
>d2000008
>0011e480
>d2060008
>22010108
>7e101108
>d10a0004
>02010108
>d2000008
>0011e507
>c81c0a00
>c81d0a01
>c0018157
>bf8c007f
>10120e03
>10101109
>c0018154
>bf8c007f
>0a101003
>c0018156
>bf8c007f
>d00c0004
>02000708
>7e120203
>d2000008
>00121308
>d2060808
>02010108
>08120d08
>c0018132
>bf8c007f
>d2820006
>041a1203
>c0018177
>bf8c007f
>100e0e03
>080e0d07
>c0018131
>bf8c007f
>d2820007
>041a0e03
>7e0c02ff
>3f32b2b3
>d00c0004
>02020d07
>d2000006
>0011e4f3
>7c260c80
>100c1108
>080c0d08
>100c0c02
>d2820006
>041a1108
>c0010106
>bf8c007f
>10100802
>c8240600
>c8250601
>10101308
>c0010178
>bf8c007f
>10121002
>c0018176
>bf8c007f
>08121203
>10121306
>d2820008
>04240508
>5e0e0f08
>c0018105
>bf8c007f
>10100603
>c8240500
>c8250501
>10101308
>10121002
>c0018175
>bf8c007f
>08121203
>10121306
>d2820008
>04240508
>c0018104
>bf8c007f
>10040403
>c80c0400
>c80d0401
>10000702
>10020002
>c0000174
>bf8c007f
>08020200
>10020306
>d2820000
>04040500
>5e001100
>f8001c0f
>07000700
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], GENERIC[19], PERSPECTIVE
>DCL IN[2], GENERIC[20], PERSPECTIVE
>DCL IN[3], GENERIC[21], PERSPECTIVE
>DCL IN[4], GENERIC[22], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL CONST[0..30]
>DCL TEMP[0..4], LOCAL
>DCL TEMP[5], ARRAY(1), LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[2].xyyy
>  1: TEX TEMP[0].xyz, TEMP[0], SAMP[2], 2D
>  2: MOV TEMP[1].xy, IN[4].xyyy
>  3: TEX TEMP[1].xyz, TEMP[1], SAMP[1], 2D
>  4: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[8].xyzz
>  5: MAD TEMP[0].xyz, IMM[0].xxxx, TEMP[0].xyzz, IMM[0].yyyy
>  6: ADD TEMP[2].x, -IN[3].zzzz, CONST[10].zzzz
>  7: MAD TEMP[0].xyz, CONST[8].wwww, TEMP[0].xyzz, IMM[0].zzzz
>  8: RCP TEMP[2].x, TEMP[2].xxxx
>  9: MOV TEMP[3].xy, IN[1].xyyy
> 10: TEX TEMP[4].xyz, TEMP[3], SAMP[0], 2D
> 11: MUL TEMP[3].xyz, TEMP[4].xyzz, TEMP[0].xyzz
> 12: ADD TEMP[4].x, -IN[3].zzzz, CONST[11].yyyy
> 13: MUL TEMP[3].xyz, TEMP[3].xyzz, IN[0].xyzz
> 14: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[4].xxxx
> 15: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 16: MUL TEMP[0].xyz, TEMP[1].xyzz, CONST[12].xyzz
> 17: MUL TEMP[1].x, TEMP[2].xxxx, IN[3].wwww
> 18: MUL TEMP[0].xyz, TEMP[3].xyzz, TEMP[0].xyzz
> 19: MUL TEMP[1].x, TEMP[1].xxxx, CONST[11].wwww
> 20: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 21: MOV TEMP[0].w, TEMP[1].xxxx
> 22: MAD TEMP[3].xyz, TEMP[0].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 23: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 24: MUL TEMP[3].xyz, TEMP[3].xyzz, TEMP[1].xxxx
> 25: MAD TEMP[0].xyz, TEMP[0].xyzz, CONST[30].xxxx, TEMP[3].xyzz
> 26: MOV TEMP[5], TEMP[0]
> 27: MOV OUT[0], TEMP[5]
> 28: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 32
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 33
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 34
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 35
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 42
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 45
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 47
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 48
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 49
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 50
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 116
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr float addrspace(2)* %21, i32 117
>  %45 = load float addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr float addrspace(2)* %21, i32 118
>  %47 = load float addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr float addrspace(2)* %21, i32 120
>  %49 = load float addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %51 = load <32 x i8> addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %53 = load <16 x i8> addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %55 = load <32 x i8> addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %57 = load <16 x i8> addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr <32 x i8> addrspace(2)* %2, i32 2
>  %59 = load <32 x i8> addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr <16 x i8> addrspace(2)* %1, i32 2
>  %61 = load <16 x i8> addrspace(2)* %60, !tbaa !0
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %64 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %65 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %66 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %67 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %68 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %69 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %3, <2 x i32> %5)
>  %70 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %3, <2 x i32> %5)
>  %71 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %3, <2 x i32> %6)
>  %72 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %3, <2 x i32> %6)
>  %73 = bitcast float %67 to i32
>  %74 = bitcast float %68 to i32
>  %75 = insertelement <2 x i32> undef, i32 %73, i32 0
>  %76 = insertelement <2 x i32> %75, i32 %74, i32 1
>  %77 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %76, <32 x i8> %59, <16 x i8> %61, i32 2)
>  %78 = extractelement <4 x float> %77, i32 0
>  %79 = extractelement <4 x float> %77, i32 1
>  %80 = extractelement <4 x float> %77, i32 2
>  %81 = bitcast float %71 to i32
>  %82 = bitcast float %72 to i32
>  %83 = insertelement <2 x i32> undef, i32 %81, i32 0
>  %84 = insertelement <2 x i32> %83, i32 %82, i32 1
>  %85 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %84, <32 x i8> %55, <16 x i8> %57, i32 2)
>  %86 = extractelement <4 x float> %85, i32 0
>  %87 = extractelement <4 x float> %85, i32 1
>  %88 = extractelement <4 x float> %85, i32 2
>  %89 = fmul float %78, %23
>  %90 = fmul float %79, %25
>  %91 = fmul float %80, %27
>  %92 = fmul float 2.000000e+00, %89
>  %93 = fadd float %92, -1.000000e+00
>  %94 = fmul float 2.000000e+00, %90
>  %95 = fadd float %94, -1.000000e+00
>  %96 = fmul float 2.000000e+00, %91
>  %97 = fadd float %96, -1.000000e+00
>  %98 = fsub float -0.000000e+00, %69
>  %99 = fadd float %98, %31
>  %100 = fmul float %29, %93
>  %101 = fadd float %100, 1.000000e+00
>  %102 = fmul float %29, %95
>  %103 = fadd float %102, 1.000000e+00
>  %104 = fmul float %29, %97
>  %105 = fadd float %104, 1.000000e+00
>  %106 = fdiv float 1.000000e+00, %99
>  %107 = bitcast float %65 to i32
>  %108 = bitcast float %66 to i32
>  %109 = insertelement <2 x i32> undef, i32 %107, i32 0
>  %110 = insertelement <2 x i32> %109, i32 %108, i32 1
>  %111 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %110, <32 x i8> %51, <16 x i8> %53, i32 2)
>  %112 = extractelement <4 x float> %111, i32 0
>  %113 = extractelement <4 x float> %111, i32 1
>  %114 = extractelement <4 x float> %111, i32 2
>  %115 = fmul float %112, %101
>  %116 = fmul float %113, %103
>  %117 = fmul float %114, %105
>  %118 = fsub float -0.000000e+00, %69
>  %119 = fadd float %118, %33
>  %120 = fmul float %115, %62
>  %121 = fmul float %116, %63
>  %122 = fmul float %117, %64
>  %123 = fmul float %106, %119
>  %124 = call float @llvm.AMDIL.clamp.(float %123, float 0.000000e+00, float 1.000000e+00)
>  %125 = fmul float %86, %37
>  %126 = fmul float %87, %39
>  %127 = fmul float %88, %41
>  %128 = fmul float %124, %70
>  %129 = fmul float %120, %125
>  %130 = fmul float %121, %126
>  %131 = fmul float %122, %127
>  %132 = fmul float %128, %35
>  %133 = call float @llvm.AMDIL.clamp.(float %132, float 0.000000e+00, float 1.000000e+00)
>  %134 = fsub float -0.000000e+00, %49
>  %135 = fmul float %129, %134
>  %136 = fadd float %135, %43
>  %137 = fsub float -0.000000e+00, %49
>  %138 = fmul float %130, %137
>  %139 = fadd float %138, %45
>  %140 = fsub float -0.000000e+00, %49
>  %141 = fmul float %131, %140
>  %142 = fadd float %141, %47
>  %143 = call float @llvm.AMDIL.clamp.(float %133, float 0.000000e+00, float 1.000000e+00)
>  %144 = fmul float %136, %143
>  %145 = fmul float %139, %143
>  %146 = fmul float %142, %143
>  %147 = fmul float %129, %49
>  %148 = fadd float %147, %144
>  %149 = fmul float %130, %49
>  %150 = fadd float %149, %145
>  %151 = fmul float %131, %49
>  %152 = fadd float %151, %146
>  %153 = call i32 @llvm.SI.packf16(float %148, float %150)
>  %154 = bitcast i32 %153 to float
>  %155 = call i32 @llvm.SI.packf16(float %152, float %133)
>  %156 = bitcast i32 %155 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %154, float %156, float %154, float %156)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8140900
>c8150901
>c8100800
>c8110801
>c0840308
>c0c60510
>bf8c007f
>f0800700
>00430404
>c0400100
>bf8c0070
>c0038121
>bf8c007f
>100e0a07
>d2820007
>041c0f05
>060e0ef3
>c0038123
>bf8c007f
>d282000a
>03ca0e07
>c8200500
>c8210501
>c81c0400
>c81d0401
>c0840300
>c0c60500
>bf8c007f
>f0800700
>00430707
>bf8c0770
>10141508
>c82c0100
>c82d0101
>101a170a
>c82c1102
>c82d1103
>c8281002
>c8291003
>c0840304
>c0c60508
>bf8c007f
>f0800700
>00430a0a
>c0010131
>bf8c0070
>10041602
>101a050d
>c0010178
>bf8c007f
>10041a02
>c0018175
>bf8c007f
>081c0403
>c8080e00
>c8090e01
>c001812d
>bf8c007f
>08060403
>c001812a
>bf8c007f
>08040403
>7e045502
>10040702
>d2060802
>02010102
>c80c0f00
>c80d0f01
>10040702
>c001812f
>bf8c007f
>10040403
>d2060802
>02010102
>d2060803
>02010102
>101c070e
>d282000d
>0438050d
>c0018120
>bf8c007f
>101c0803
>d282000e
>04380704
>061c1cf3
>d282000e
>03ca1c07
>101c1d07
>c83c0000
>c83d0001
>101c1f0e
>c0018130
>bf8c007f
>101e1403
>101c1f0e
>101e1c02
>c0018174
>bf8c007f
>081e1e03
>101e070f
>d282000e
>043c050e
>5e1a1b0e
>c0018122
>bf8c007f
>101c0c03
>d2820004
>04380706
>060808f3
>d2820004
>03ca0807
>10080909
>c8140200
>c8150201
>10000b04
>c0018132
>bf8c007f
>10021803
>10000300
>10020002
>c0000176
>bf8c007f
>08020200
>10020701
>d2820000
>04040500
>5e000500
>f8001c0f
>000d000d
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], CLIPVERTEX
>DCL OUT[3], GENERIC[19]
>DCL OUT[4], GENERIC[20]
>DCL OUT[5], GENERIC[21]
>DCL OUT[6], GENERIC[22]
>DCL CONST[0..55]
>DCL TEMP[0..9], LOCAL
>  0: MAD TEMP[0], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  1: DP4 TEMP[1].x, TEMP[0], CONST[52]
>  2: DP4 TEMP[2].x, TEMP[0], CONST[53]
>  3: MOV TEMP[1].y, TEMP[2].xxxx
>  4: DP4 TEMP[2].x, TEMP[0], CONST[4]
>  5: DP4 TEMP[3].x, TEMP[0], CONST[5]
>  6: MOV TEMP[2].y, TEMP[3].xxxx
>  7: DP4 TEMP[4].x, TEMP[0], CONST[6]
>  8: MOV TEMP[2].z, TEMP[4].xxxx
>  9: MUL TEMP[5].xy, IN[1].xyyy, CONST[48].xyyy
> 10: DP4 TEMP[6].x, TEMP[0], CONST[7]
> 11: MOV TEMP[2].w, TEMP[6].xxxx
> 12: ADD TEMP[7].x, TEMP[5].yyyy, TEMP[5].xxxx
> 13: ADD TEMP[7].x, TEMP[7].xxxx, CONST[48].wwww
> 14: MUL TEMP[5].xy, IN[1].xyyy, CONST[49].xyyy
> 15: ADD TEMP[8].x, TEMP[5].yyyy, TEMP[5].xxxx
> 16: MUL TEMP[5].xy, IN[1].xyyy, CONST[50].xyyy
> 17: ADD TEMP[8].x, TEMP[8].xxxx, CONST[49].wwww
> 18: MOV TEMP[7].y, TEMP[8].xxxx
> 19: ADD TEMP[8].x, TEMP[5].yyyy, TEMP[5].xxxx
> 20: ADD TEMP[8].x, TEMP[8].xxxx, CONST[50].wwww
> 21: MUL TEMP[5].xy, IN[1].xyyy, CONST[51].xyyy
> 22: ADD TEMP[9].x, TEMP[5].yyyy, TEMP[5].xxxx
> 23: ADD TEMP[9].x, TEMP[9].xxxx, CONST[51].wwww
> 24: MOV TEMP[8].y, TEMP[9].xxxx
> 25: DP4 TEMP[9].x, TEMP[0], CONST[54]
> 26: MOV TEMP[5].z, TEMP[9].xxxx
> 27: DP4 TEMP[0].x, TEMP[0], CONST[12]
> 28: MOV TEMP[5].w, TEMP[0].xxxx
> 29: MOV TEMP[1].zw, TEMP[5].wwzw
> 30: MOV TEMP[8].zw, CONST[0].xxxx
> 31: MUL TEMP[0], IN[2].xyxx, CONST[0].yyxx
> 32: MAD TEMP[5], CONST[47].wwww, CONST[0].xxxy, CONST[0].yyyx
> 33: MOV TEMP[9], TEMP[2]
> 34: MAD TEMP[4].x, TEMP[4].xxxx, CONST[0].zzzz, -TEMP[6].xxxx
> 35: MOV TEMP[2].z, TEMP[4].xxxx
> 36: MOV TEMP[2].y, -TEMP[3].xxxx
> 37: MAD TEMP[2].xy, CONST[55].xyyy, TEMP[6].xxxx, TEMP[2].xyyy
> 38: MOV OUT[3], TEMP[7]
> 39: MOV OUT[4], TEMP[8]
> 40: MOV OUT[6], TEMP[0]
> 41: MOV OUT[0], TEMP[2]
> 42: MOV OUT[5], TEMP[1]
> 43: MOV OUT[2], TEMP[9]
> 44: MOV_SAT OUT[1], TEMP[5]
> 45: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 16
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 17
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 18
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 19
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 20
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 21
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 22
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 23
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 24
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 25
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 26
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 27
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 28
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 29
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 30
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 31
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 48
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 49
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 50
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 51
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 191
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 192
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 193
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 195
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 196
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 197
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 199
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 200
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 201
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 203
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 204
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 205
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 207
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 208
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 209
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 210
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 211
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 212
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 213
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr float addrspace(2)* %10, i32 214
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = getelementptr float addrspace(2)* %10, i32 215
>  %98 = load float addrspace(2)* %97, !tbaa !0
>  %99 = getelementptr float addrspace(2)* %10, i32 216
>  %100 = load float addrspace(2)* %99, !tbaa !0
>  %101 = getelementptr float addrspace(2)* %10, i32 217
>  %102 = load float addrspace(2)* %101, !tbaa !0
>  %103 = getelementptr float addrspace(2)* %10, i32 218
>  %104 = load float addrspace(2)* %103, !tbaa !0
>  %105 = getelementptr float addrspace(2)* %10, i32 219
>  %106 = load float addrspace(2)* %105, !tbaa !0
>  %107 = getelementptr float addrspace(2)* %10, i32 220
>  %108 = load float addrspace(2)* %107, !tbaa !0
>  %109 = getelementptr float addrspace(2)* %10, i32 221
>  %110 = load float addrspace(2)* %109, !tbaa !0
>  %111 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %112 = load <16 x i8> addrspace(2)* %111, !tbaa !0
>  %113 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %112, i32 0, i32 %5)
>  %114 = extractelement <4 x float> %113, i32 0
>  %115 = extractelement <4 x float> %113, i32 1
>  %116 = extractelement <4 x float> %113, i32 2
>  %117 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %118 = load <16 x i8> addrspace(2)* %117, !tbaa !0
>  %119 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %118, i32 0, i32 %5)
>  %120 = extractelement <4 x float> %119, i32 0
>  %121 = extractelement <4 x float> %119, i32 1
>  %122 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %123 = load <16 x i8> addrspace(2)* %122, !tbaa !0
>  %124 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %123, i32 0, i32 %5)
>  %125 = extractelement <4 x float> %124, i32 0
>  %126 = extractelement <4 x float> %124, i32 1
>  %127 = fmul float %114, %14
>  %128 = fadd float %127, %12
>  %129 = fmul float %115, %14
>  %130 = fadd float %129, %12
>  %131 = fmul float %116, %14
>  %132 = fadd float %131, %12
>  %133 = fmul float %114, %12
>  %134 = fadd float %133, %14
>  %135 = fmul float %128, %84
>  %136 = fmul float %130, %86
>  %137 = fadd float %135, %136
>  %138 = fmul float %132, %88
>  %139 = fadd float %137, %138
>  %140 = fmul float %134, %90
>  %141 = fadd float %139, %140
>  %142 = fmul float %128, %92
>  %143 = fmul float %130, %94
>  %144 = fadd float %142, %143
>  %145 = fmul float %132, %96
>  %146 = fadd float %144, %145
>  %147 = fmul float %134, %98
>  %148 = fadd float %146, %147
>  %149 = fmul float %128, %18
>  %150 = fmul float %130, %20
>  %151 = fadd float %149, %150
>  %152 = fmul float %132, %22
>  %153 = fadd float %151, %152
>  %154 = fmul float %134, %24
>  %155 = fadd float %153, %154
>  %156 = fmul float %128, %26
>  %157 = fmul float %130, %28
>  %158 = fadd float %156, %157
>  %159 = fmul float %132, %30
>  %160 = fadd float %158, %159
>  %161 = fmul float %134, %32
>  %162 = fadd float %160, %161
>  %163 = fmul float %128, %34
>  %164 = fmul float %130, %36
>  %165 = fadd float %163, %164
>  %166 = fmul float %132, %38
>  %167 = fadd float %165, %166
>  %168 = fmul float %134, %40
>  %169 = fadd float %167, %168
>  %170 = fmul float %120, %60
>  %171 = fmul float %121, %62
>  %172 = fmul float %128, %42
>  %173 = fmul float %130, %44
>  %174 = fadd float %172, %173
>  %175 = fmul float %132, %46
>  %176 = fadd float %174, %175
>  %177 = fmul float %134, %48
>  %178 = fadd float %176, %177
>  %179 = fadd float %171, %170
>  %180 = fadd float %179, %64
>  %181 = fmul float %120, %66
>  %182 = fmul float %121, %68
>  %183 = fadd float %182, %181
>  %184 = fmul float %120, %72
>  %185 = fmul float %121, %74
>  %186 = fadd float %183, %70
>  %187 = fadd float %185, %184
>  %188 = fadd float %187, %76
>  %189 = fmul float %120, %78
>  %190 = fmul float %121, %80
>  %191 = fadd float %190, %189
>  %192 = fadd float %191, %82
>  %193 = fmul float %128, %100
>  %194 = fmul float %130, %102
>  %195 = fadd float %193, %194
>  %196 = fmul float %132, %104
>  %197 = fadd float %195, %196
>  %198 = fmul float %134, %106
>  %199 = fadd float %197, %198
>  %200 = fmul float %128, %50
>  %201 = fmul float %130, %52
>  %202 = fadd float %200, %201
>  %203 = fmul float %132, %54
>  %204 = fadd float %202, %203
>  %205 = fmul float %134, %56
>  %206 = fadd float %204, %205
>  %207 = fmul float %125, %14
>  %208 = fmul float %126, %14
>  %209 = fmul float %125, %12
>  %210 = fmul float %125, %12
>  %211 = fmul float %58, %12
>  %212 = fadd float %211, %14
>  %213 = fmul float %58, %12
>  %214 = fadd float %213, %14
>  %215 = fmul float %58, %12
>  %216 = fadd float %215, %14
>  %217 = fmul float %58, %14
>  %218 = fadd float %217, %12
>  %219 = fsub float -0.000000e+00, %178
>  %220 = fmul float %169, %16
>  %221 = fadd float %220, %219
>  %222 = fsub float -0.000000e+00, %162
>  %223 = fmul float %108, %178
>  %224 = fadd float %223, %155
>  %225 = fmul float %110, %178
>  %226 = fadd float %225, %222
>  %227 = call float @llvm.AMDIL.clamp.(float %212, float 0.000000e+00, float 1.000000e+00)
>  %228 = call float @llvm.AMDIL.clamp.(float %214, float 0.000000e+00, float 1.000000e+00)
>  %229 = call float @llvm.AMDIL.clamp.(float %216, float 0.000000e+00, float 1.000000e+00)
>  %230 = call float @llvm.AMDIL.clamp.(float %218, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %227, float %228, float %229, float %230)
>  %231 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %232 = load float addrspace(2)* addrspace(2)* %231, !tbaa !0
>  %233 = getelementptr float addrspace(2)* %232, i32 0
>  %234 = load float addrspace(2)* %233, !tbaa !0
>  %235 = fmul float %234, %155
>  %236 = getelementptr float addrspace(2)* %232, i32 1
>  %237 = load float addrspace(2)* %236, !tbaa !0
>  %238 = fmul float %237, %162
>  %239 = fadd float %235, %238
>  %240 = getelementptr float addrspace(2)* %232, i32 2
>  %241 = load float addrspace(2)* %240, !tbaa !0
>  %242 = fmul float %241, %169
>  %243 = fadd float %239, %242
>  %244 = getelementptr float addrspace(2)* %232, i32 3
>  %245 = load float addrspace(2)* %244, !tbaa !0
>  %246 = fmul float %245, %178
>  %247 = fadd float %243, %246
>  %248 = getelementptr float addrspace(2)* %232, i32 4
>  %249 = load float addrspace(2)* %248, !tbaa !0
>  %250 = fmul float %249, %155
>  %251 = getelementptr float addrspace(2)* %232, i32 5
>  %252 = load float addrspace(2)* %251, !tbaa !0
>  %253 = fmul float %252, %162
>  %254 = fadd float %250, %253
>  %255 = getelementptr float addrspace(2)* %232, i32 6
>  %256 = load float addrspace(2)* %255, !tbaa !0
>  %257 = fmul float %256, %169
>  %258 = fadd float %254, %257
>  %259 = getelementptr float addrspace(2)* %232, i32 7
>  %260 = load float addrspace(2)* %259, !tbaa !0
>  %261 = fmul float %260, %178
>  %262 = fadd float %258, %261
>  %263 = getelementptr float addrspace(2)* %232, i32 8
>  %264 = load float addrspace(2)* %263, !tbaa !0
>  %265 = fmul float %264, %155
>  %266 = getelementptr float addrspace(2)* %232, i32 9
>  %267 = load float addrspace(2)* %266, !tbaa !0
>  %268 = fmul float %267, %162
>  %269 = fadd float %265, %268
>  %270 = getelementptr float addrspace(2)* %232, i32 10
>  %271 = load float addrspace(2)* %270, !tbaa !0
>  %272 = fmul float %271, %169
>  %273 = fadd float %269, %272
>  %274 = getelementptr float addrspace(2)* %232, i32 11
>  %275 = load float addrspace(2)* %274, !tbaa !0
>  %276 = fmul float %275, %178
>  %277 = fadd float %273, %276
>  %278 = getelementptr float addrspace(2)* %232, i32 12
>  %279 = load float addrspace(2)* %278, !tbaa !0
>  %280 = fmul float %279, %155
>  %281 = getelementptr float addrspace(2)* %232, i32 13
>  %282 = load float addrspace(2)* %281, !tbaa !0
>  %283 = fmul float %282, %162
>  %284 = fadd float %280, %283
>  %285 = getelementptr float addrspace(2)* %232, i32 14
>  %286 = load float addrspace(2)* %285, !tbaa !0
>  %287 = fmul float %286, %169
>  %288 = fadd float %284, %287
>  %289 = getelementptr float addrspace(2)* %232, i32 15
>  %290 = load float addrspace(2)* %289, !tbaa !0
>  %291 = fmul float %290, %178
>  %292 = fadd float %288, %291
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %247, float %262, float %277, float %292)
>  %293 = getelementptr float addrspace(2)* %232, i32 16
>  %294 = load float addrspace(2)* %293, !tbaa !0
>  %295 = fmul float %294, %155
>  %296 = getelementptr float addrspace(2)* %232, i32 17
>  %297 = load float addrspace(2)* %296, !tbaa !0
>  %298 = fmul float %297, %162
>  %299 = fadd float %295, %298
>  %300 = getelementptr float addrspace(2)* %232, i32 18
>  %301 = load float addrspace(2)* %300, !tbaa !0
>  %302 = fmul float %301, %169
>  %303 = fadd float %299, %302
>  %304 = getelementptr float addrspace(2)* %232, i32 19
>  %305 = load float addrspace(2)* %304, !tbaa !0
>  %306 = fmul float %305, %178
>  %307 = fadd float %303, %306
>  %308 = getelementptr float addrspace(2)* %232, i32 20
>  %309 = load float addrspace(2)* %308, !tbaa !0
>  %310 = fmul float %309, %155
>  %311 = getelementptr float addrspace(2)* %232, i32 21
>  %312 = load float addrspace(2)* %311, !tbaa !0
>  %313 = fmul float %312, %162
>  %314 = fadd float %310, %313
>  %315 = getelementptr float addrspace(2)* %232, i32 22
>  %316 = load float addrspace(2)* %315, !tbaa !0
>  %317 = fmul float %316, %169
>  %318 = fadd float %314, %317
>  %319 = getelementptr float addrspace(2)* %232, i32 23
>  %320 = load float addrspace(2)* %319, !tbaa !0
>  %321 = fmul float %320, %178
>  %322 = fadd float %318, %321
>  %323 = getelementptr float addrspace(2)* %232, i32 24
>  %324 = load float addrspace(2)* %323, !tbaa !0
>  %325 = fmul float %324, %155
>  %326 = getelementptr float addrspace(2)* %232, i32 25
>  %327 = load float addrspace(2)* %326, !tbaa !0
>  %328 = fmul float %327, %162
>  %329 = fadd float %325, %328
>  %330 = getelementptr float addrspace(2)* %232, i32 26
>  %331 = load float addrspace(2)* %330, !tbaa !0
>  %332 = fmul float %331, %169
>  %333 = fadd float %329, %332
>  %334 = getelementptr float addrspace(2)* %232, i32 27
>  %335 = load float addrspace(2)* %334, !tbaa !0
>  %336 = fmul float %335, %178
>  %337 = fadd float %333, %336
>  %338 = getelementptr float addrspace(2)* %232, i32 28
>  %339 = load float addrspace(2)* %338, !tbaa !0
>  %340 = fmul float %339, %155
>  %341 = getelementptr float addrspace(2)* %232, i32 29
>  %342 = load float addrspace(2)* %341, !tbaa !0
>  %343 = fmul float %342, %162
>  %344 = fadd float %340, %343
>  %345 = getelementptr float addrspace(2)* %232, i32 30
>  %346 = load float addrspace(2)* %345, !tbaa !0
>  %347 = fmul float %346, %169
>  %348 = fadd float %344, %347
>  %349 = getelementptr float addrspace(2)* %232, i32 31
>  %350 = load float addrspace(2)* %349, !tbaa !0
>  %351 = fmul float %350, %178
>  %352 = fadd float %348, %351
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %307, float %322, float %337, float %352)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %180, float %186, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %188, float %192, float %12, float %12)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %141, float %148, float %199, float %206)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %207, float %208, float %209, float %210)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %224, float %226, float %221, float %178)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0410100
>bf8c007f
>c00403bf
>c0028300
>bf8c007f
>7e060205
>c0020301
>bf8c007f
>7e020204
>d2820002
>040e0208
>d2060802
>02010102
>d2820004
>04060608
>d2060804
>02010104
>f800020f
>02040404
>c0840700
>bf8c000f
>e00c2000
>80020600
>bf8c0770
>d2820002
>040c0906
>d2820004
>040c0907
>c0040311
>bf8c007f
>100a0808
>c0040310
>bf8c007f
>d282000a
>04141102
>d2820005
>040c0908
>c0040312
>bf8c007f
>d2820003
>04281105
>d2820006
>04040b06
>c0040313
>bf8c007f
>d2820001
>040c1106
>c0040315
>bf8c007f
>10060808
>c0040314
>bf8c007f
>d2820003
>040c1102
>c0040316
>bf8c007f
>d2820003
>040c1105
>c0040317
>bf8c007f
>d2820003
>040c1106
>c0400102
>bf8c007f
>c004010d
>bf8c007f
>100e0608
>c004010c
>bf8c007f
>d2820008
>041e0208
>c0040319
>bf8c007f
>100e0808
>c0040318
>bf8c007f
>d2820007
>041c1102
>c004031a
>bf8c007f
>d2820007
>041c1105
>c004031b
>bf8c007f
>d2820007
>041c1106
>c004010e
>bf8c007f
>d2820009
>04220e08
>c004031d
>bf8c007f
>10100808
>c004031c
>bf8c007f
>d2820008
>04201102
>c004031e
>bf8c007f
>d2820008
>04201105
>c004031f
>bf8c007f
>d2820008
>04201106
>c004010f
>bf8c007f
>d2820009
>04261008
>c0040109
>bf8c007f
>10140608
>c0040108
>bf8c007f
>d282000a
>042a0208
>c004010a
>bf8c007f
>d282000a
>042a0e08
>c004010b
>bf8c007f
>d282000a
>042a1008
>c0040105
>bf8c007f
>10160608
>c0040104
>bf8c007f
>d282000b
>042e0208
>c0040106
>bf8c007f
>d282000b
>042e0e08
>c0040107
>bf8c007f
>d282000b
>042e1008
>c0040101
>bf8c007f
>10180608
>c0040100
>bf8c007f
>d282000c
>04320208
>c0040102
>bf8c007f
>d282000c
>04320e08
>c0040103
>bf8c007f
>d282000c
>04321008
>f80000ef
>090a0b0c
>c004011d
>bf8c000f
>10120608
>c004011c
>bf8c007f
>d2820009
>04260208
>c004011e
>bf8c007f
>d2820009
>04260e08
>c004011f
>bf8c007f
>d2820009
>04261008
>c0040119
>bf8c007f
>10140608
>c0040118
>bf8c007f
>d282000a
>042a0208
>c004011a
>bf8c007f
>d282000a
>042a0e08
>c004011b
>bf8c007f
>d282000a
>042a1008
>c0040115
>bf8c007f
>10160608
>c0040114
>bf8c007f
>d282000b
>042e0208
>c0040116
>bf8c007f
>d282000b
>042e0e08
>c0040117
>bf8c007f
>d282000b
>042e1008
>c0040111
>bf8c007f
>10180608
>c0040110
>bf8c007f
>d282000c
>04320208
>c0040112
>bf8c007f
>d282000c
>04320e08
>c0000113
>bf8c007f
>d282000c
>04321000
>f80000ff
>090a0b0c
>c0840704
>bf8c000f
>e00c2000
>80020900
>c00003c4
>bf8c0070
>101a1200
>c00003c5
>bf8c007f
>d282000d
>0434010a
>c00003c7
>bf8c007f
>061a1a00
>c00003c0
>bf8c007f
>101c1200
>c00003c1
>bf8c007f
>d282000e
>0438010a
>c00003c3
>bf8c007f
>061c1c00
>7e1e0280
>f800021f
>0f0f0d0e
>c00003cc
>bf8c000f
>101a1200
>c00003cd
>bf8c007f
>d282000d
>0434010a
>c00003cf
>bf8c007f
>061a1a00
>c00003c8
>bf8c007f
>101c1200
>c00003c9
>bf8c007f
>d2820009
>0438010a
>c00003cb
>bf8c007f
>06121200
>7e140205
>7e160205
>f800022f
>0b0a0d09
>c0000331
>bf8c000f
>10120800
>c0000330
>bf8c007f
>d2820009
>04240102
>c0000332
>bf8c007f
>d2820009
>04240105
>c0000333
>bf8c007f
>d2820009
>04240106
>c00003d9
>bf8c007f
>10140800
>c00003d8
>bf8c007f
>d282000a
>04280102
>c00003da
>bf8c007f
>d282000a
>04280105
>c00003db
>bf8c007f
>d282000a
>04280106
>c00003d5
>bf8c007f
>10160800
>c00003d4
>bf8c007f
>d282000b
>042c0102
>c00003d6
>bf8c007f
>d282000b
>042c0105
>c00003d7
>bf8c007f
>d282000b
>042c0106
>c00003d1
>bf8c007f
>10080800
>c00003d0
>bf8c007f
>d2820002
>04100102
>c00003d2
>bf8c007f
>d2820002
>04080105
>c00003d3
>bf8c007f
>d2820002
>04080106
>f800023f
>090a0b02
>c0840708
>bf8c000f
>e00c2000
>80020900
>bf8c0770
>10001205
>10041404
>10081204
>f800024f
>00000204
>c00003dc
>bf8c000f
>d2820000
>04061000
>c0000302
>bf8c007f
>10020e00
>08021101
>c00003dd
>bf8c007f
>10041000
>08040702
>f80008cf
>08010200
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], GENERIC[19], PERSPECTIVE
>DCL IN[2], GENERIC[20], PERSPECTIVE
>DCL IN[3], GENERIC[21], PERSPECTIVE
>DCL IN[4], GENERIC[22], PERSPECTIVE, CENTROID
>DCL IN[5], GENERIC[23], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL CONST[0..30]
>DCL TEMP[0..5], LOCAL
>DCL TEMP[6], ARRAY(1), LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[4].xyyy
>  1: TEX TEMP[0].xyz, TEMP[0], SAMP[1], 2D
>  2: MOV TEMP[1].xy, IN[4].wzzz
>  3: TEX TEMP[1].xyz, TEMP[1], SAMP[1], 2D
>  4: MOV TEMP[2].xy, IN[1].xyyy
>  5: TEX TEMP[2].xyz, TEMP[2], SAMP[2], 2D
>  6: MOV TEMP[3].xy, IN[5].xyyy
>  7: TEX TEMP[3].xyz, TEMP[3], SAMP[1], 2D
>  8: MOV TEMP[4].xy, IN[2].xyyy
>  9: TEX TEMP[4].xyz, TEMP[4], SAMP[3], 2D
> 10: MOV TEMP[5].xy, IN[1].xyyy
> 11: TEX TEMP[5].xyz, TEMP[5], SAMP[0], 2D
> 12: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[2].yyyy
> 13: MAD TEMP[0].xyz, TEMP[2].xxxx, TEMP[0].xyzz, TEMP[1].xyzz
> 14: MAD TEMP[0].xyz, TEMP[2].zzzz, TEMP[3].xyzz, TEMP[0].xyzz
> 15: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[12].xyzz
> 16: MUL TEMP[1].xyz, TEMP[4].xyzz, CONST[8].xyzz
> 17: ADD TEMP[3].x, -IN[3].zzzz, CONST[10].zzzz
> 18: MAD TEMP[1].xyz, IMM[0].xxxx, TEMP[1].xyzz, IMM[0].yyyy
> 19: RCP TEMP[3].x, TEMP[3].xxxx
> 20: MAD TEMP[1].xyz, CONST[8].wwww, TEMP[1].xyzz, IMM[0].zzzz
> 21: ADD TEMP[4].x, -IN[3].zzzz, CONST[11].yyyy
> 22: MUL TEMP[2].xyz, TEMP[5].xyzz, TEMP[1].xyzz
> 23: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[4].xxxx
> 24: MOV_SAT TEMP[3].x, TEMP[3].xxxx
> 25: MUL TEMP[2].xyz, TEMP[2].xyzz, IN[0].xyzz
> 26: MUL TEMP[3].x, TEMP[3].xxxx, IN[3].wwww
> 27: MUL TEMP[2].xyz, TEMP[0].xyzz, TEMP[2].xyzz
> 28: MUL TEMP[0].x, TEMP[3].xxxx, CONST[11].wwww
> 29: MOV_SAT TEMP[0].x, TEMP[0].xxxx
> 30: MOV TEMP[2].w, TEMP[0].xxxx
> 31: MAD TEMP[1].xyz, TEMP[2].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 32: MOV_SAT TEMP[0].x, TEMP[0].xxxx
> 33: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[0].xxxx
> 34: MAD TEMP[2].xyz, TEMP[2].xyzz, CONST[30].xxxx, TEMP[1].xyzz
> 35: MOV TEMP[6], TEMP[2]
> 36: MOV OUT[0], TEMP[6]
> 37: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 32
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 33
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 34
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 35
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 42
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 45
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 47
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 48
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 49
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 50
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 116
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr float addrspace(2)* %21, i32 117
>  %45 = load float addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr float addrspace(2)* %21, i32 118
>  %47 = load float addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr float addrspace(2)* %21, i32 120
>  %49 = load float addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %51 = load <32 x i8> addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %53 = load <16 x i8> addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %55 = load <32 x i8> addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %57 = load <16 x i8> addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr <32 x i8> addrspace(2)* %2, i32 2
>  %59 = load <32 x i8> addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr <16 x i8> addrspace(2)* %1, i32 2
>  %61 = load <16 x i8> addrspace(2)* %60, !tbaa !0
>  %62 = getelementptr <32 x i8> addrspace(2)* %2, i32 3
>  %63 = load <32 x i8> addrspace(2)* %62, !tbaa !0
>  %64 = getelementptr <16 x i8> addrspace(2)* %1, i32 3
>  %65 = load <16 x i8> addrspace(2)* %64, !tbaa !0
>  %66 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %67 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %68 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %69 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %70 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %71 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %72 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %73 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %3, <2 x i32> %5)
>  %74 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %3, <2 x i32> %5)
>  %75 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %3, <2 x i32> %6)
>  %76 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %3, <2 x i32> %6)
>  %77 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %3, <2 x i32> %6)
>  %78 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %3, <2 x i32> %6)
>  %79 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %3, <2 x i32> %6)
>  %80 = call float @llvm.SI.fs.interp(i32 1, i32 5, i32 %3, <2 x i32> %6)
>  %81 = bitcast float %75 to i32
>  %82 = bitcast float %76 to i32
>  %83 = insertelement <2 x i32> undef, i32 %81, i32 0
>  %84 = insertelement <2 x i32> %83, i32 %82, i32 1
>  %85 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %84, <32 x i8> %55, <16 x i8> %57, i32 2)
>  %86 = extractelement <4 x float> %85, i32 0
>  %87 = extractelement <4 x float> %85, i32 1
>  %88 = extractelement <4 x float> %85, i32 2
>  %89 = bitcast float %78 to i32
>  %90 = bitcast float %77 to i32
>  %91 = insertelement <2 x i32> undef, i32 %89, i32 0
>  %92 = insertelement <2 x i32> %91, i32 %90, i32 1
>  %93 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %92, <32 x i8> %55, <16 x i8> %57, i32 2)
>  %94 = extractelement <4 x float> %93, i32 0
>  %95 = extractelement <4 x float> %93, i32 1
>  %96 = extractelement <4 x float> %93, i32 2
>  %97 = bitcast float %69 to i32
>  %98 = bitcast float %70 to i32
>  %99 = insertelement <2 x i32> undef, i32 %97, i32 0
>  %100 = insertelement <2 x i32> %99, i32 %98, i32 1
>  %101 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %100, <32 x i8> %59, <16 x i8> %61, i32 2)
>  %102 = extractelement <4 x float> %101, i32 0
>  %103 = extractelement <4 x float> %101, i32 1
>  %104 = extractelement <4 x float> %101, i32 2
>  %105 = bitcast float %79 to i32
>  %106 = bitcast float %80 to i32
>  %107 = insertelement <2 x i32> undef, i32 %105, i32 0
>  %108 = insertelement <2 x i32> %107, i32 %106, i32 1
>  %109 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %108, <32 x i8> %55, <16 x i8> %57, i32 2)
>  %110 = extractelement <4 x float> %109, i32 0
>  %111 = extractelement <4 x float> %109, i32 1
>  %112 = extractelement <4 x float> %109, i32 2
>  %113 = bitcast float %71 to i32
>  %114 = bitcast float %72 to i32
>  %115 = insertelement <2 x i32> undef, i32 %113, i32 0
>  %116 = insertelement <2 x i32> %115, i32 %114, i32 1
>  %117 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %116, <32 x i8> %63, <16 x i8> %65, i32 2)
>  %118 = extractelement <4 x float> %117, i32 0
>  %119 = extractelement <4 x float> %117, i32 1
>  %120 = extractelement <4 x float> %117, i32 2
>  %121 = bitcast float %69 to i32
>  %122 = bitcast float %70 to i32
>  %123 = insertelement <2 x i32> undef, i32 %121, i32 0
>  %124 = insertelement <2 x i32> %123, i32 %122, i32 1
>  %125 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %124, <32 x i8> %51, <16 x i8> %53, i32 2)
>  %126 = extractelement <4 x float> %125, i32 0
>  %127 = extractelement <4 x float> %125, i32 1
>  %128 = extractelement <4 x float> %125, i32 2
>  %129 = fmul float %94, %103
>  %130 = fmul float %95, %103
>  %131 = fmul float %96, %103
>  %132 = fmul float %102, %86
>  %133 = fadd float %132, %129
>  %134 = fmul float %102, %87
>  %135 = fadd float %134, %130
>  %136 = fmul float %102, %88
>  %137 = fadd float %136, %131
>  %138 = fmul float %104, %110
>  %139 = fadd float %138, %133
>  %140 = fmul float %104, %111
>  %141 = fadd float %140, %135
>  %142 = fmul float %104, %112
>  %143 = fadd float %142, %137
>  %144 = fmul float %139, %37
>  %145 = fmul float %141, %39
>  %146 = fmul float %143, %41
>  %147 = fmul float %118, %23
>  %148 = fmul float %119, %25
>  %149 = fmul float %120, %27
>  %150 = fsub float -0.000000e+00, %73
>  %151 = fadd float %150, %31
>  %152 = fmul float 2.000000e+00, %147
>  %153 = fadd float %152, -1.000000e+00
>  %154 = fmul float 2.000000e+00, %148
>  %155 = fadd float %154, -1.000000e+00
>  %156 = fmul float 2.000000e+00, %149
>  %157 = fadd float %156, -1.000000e+00
>  %158 = fdiv float 1.000000e+00, %151
>  %159 = fmul float %29, %153
>  %160 = fadd float %159, 1.000000e+00
>  %161 = fmul float %29, %155
>  %162 = fadd float %161, 1.000000e+00
>  %163 = fmul float %29, %157
>  %164 = fadd float %163, 1.000000e+00
>  %165 = fsub float -0.000000e+00, %73
>  %166 = fadd float %165, %33
>  %167 = fmul float %126, %160
>  %168 = fmul float %127, %162
>  %169 = fmul float %128, %164
>  %170 = fmul float %158, %166
>  %171 = call float @llvm.AMDIL.clamp.(float %170, float 0.000000e+00, float 1.000000e+00)
>  %172 = fmul float %167, %66
>  %173 = fmul float %168, %67
>  %174 = fmul float %169, %68
>  %175 = fmul float %171, %74
>  %176 = fmul float %144, %172
>  %177 = fmul float %145, %173
>  %178 = fmul float %146, %174
>  %179 = fmul float %175, %35
>  %180 = call float @llvm.AMDIL.clamp.(float %179, float 0.000000e+00, float 1.000000e+00)
>  %181 = fsub float -0.000000e+00, %49
>  %182 = fmul float %176, %181
>  %183 = fadd float %182, %43
>  %184 = fsub float -0.000000e+00, %49
>  %185 = fmul float %177, %184
>  %186 = fadd float %185, %45
>  %187 = fsub float -0.000000e+00, %49
>  %188 = fmul float %178, %187
>  %189 = fadd float %188, %47
>  %190 = call float @llvm.AMDIL.clamp.(float %180, float 0.000000e+00, float 1.000000e+00)
>  %191 = fmul float %183, %190
>  %192 = fmul float %186, %190
>  %193 = fmul float %189, %190
>  %194 = fmul float %176, %49
>  %195 = fadd float %194, %191
>  %196 = fmul float %177, %49
>  %197 = fadd float %196, %192
>  %198 = fmul float %178, %49
>  %199 = fadd float %198, %193
>  %200 = call i32 @llvm.SI.packf16(float %195, float %197)
>  %201 = bitcast i32 %200 to float
>  %202 = call i32 @llvm.SI.packf16(float %199, float %180)
>  %203 = bitcast i32 %202 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %201, float %203, float %201, float %203)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8440500
>c8450501
>c8400400
>c8410401
>c0840308
>c0c60510
>bf8c007f
>f0800700
>00430410
>c8201202
>c8211203
>c81c1302
>c81d1303
>c0840304
>c0c60508
>bf8c0070
>f0800700
>00430707
>bf8c0770
>101a0b08
>c82c1102
>c82d1103
>c8281002
>c8291003
>f0800700
>00430a0a
>bf8c0770
>d2820012
>04361704
>c8381502
>c8391503
>c8341402
>c8351403
>f0800700
>00430d0d
>bf8c0770
>d2820002
>044a1d06
>c0400100
>bf8c007f
>c0038131
>bf8c007f
>10040407
>c84c0900
>c84d0901
>c8480800
>c8490801
>c084030c
>c0c60518
>bf8c007f
>f0800700
>00431212
>c0038121
>bf8c0070
>10062607
>d2820003
>040c0f13
>060606f3
>c0038123
>bf8c007f
>d2820003
>03ca0607
>c0840300
>c0c60500
>bf8c007f
>f0800700
>00431510
>bf8c0770
>10060716
>c8400100
>c8410101
>10062103
>10200702
>c0010178
>bf8c007f
>10042002
>c0018175
>bf8c007f
>08220403
>c8080e00
>c8090e01
>c001812d
>bf8c007f
>08060403
>c001812a
>bf8c007f
>08040403
>7e045502
>10040702
>d2060802
>02010102
>c80c0f00
>c80d0f01
>10040702
>c001812f
>bf8c007f
>10040403
>d2060802
>02010102
>d2060803
>02010102
>10220711
>d2820010
>04440510
>10220b07
>d2820011
>04461504
>d2820011
>04461b06
>c0018130
>bf8c007f
>10222203
>c0018120
>bf8c007f
>10302403
>d2820018
>04600712
>063030f3
>d2820018
>03ca3007
>10303115
>c8640000
>c8650001
>10303318
>10223111
>10302202
>c0018174
>bf8c007f
>08303003
>10300718
>d2820011
>04600511
>5e202111
>100e0b09
>d2820007
>041e1904
>d2820004
>041e1f06
>c0018132
>bf8c007f
>10080803
>c0018122
>bf8c007f
>100a2803
>d2820005
>04140714
>060a0af3
>d2820005
>03ca0a07
>100a0b17
>c8180200
>c8190201
>10000d05
>10000104
>10020002
>c0000176
>bf8c007f
>08020200
>10020701
>d2820000
>04040500
>5e000500
>f8001c0f
>00100010
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], CLIPVERTEX
>DCL OUT[3], GENERIC[19]
>DCL OUT[4], GENERIC[20]
>DCL OUT[5], GENERIC[21]
>DCL OUT[6], GENERIC[22]
>DCL OUT[7], GENERIC[23]
>DCL CONST[0..55]
>DCL TEMP[0..11], LOCAL
>  0: MAD TEMP[0], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  1: DP4 TEMP[1].x, TEMP[0], CONST[52]
>  2: DP4 TEMP[2].x, TEMP[0], CONST[53]
>  3: MOV TEMP[1].y, TEMP[2].xxxx
>  4: DP4 TEMP[2].x, TEMP[0], CONST[4]
>  5: DP4 TEMP[3].x, TEMP[0], CONST[5]
>  6: MOV TEMP[2].y, TEMP[3].xxxx
>  7: DP4 TEMP[4].x, TEMP[0], CONST[6]
>  8: MOV TEMP[2].z, TEMP[4].xxxx
>  9: DP4 TEMP[5].x, TEMP[0], CONST[7]
> 10: MOV TEMP[2].w, TEMP[5].xxxx
> 11: MUL TEMP[6].xy, IN[1].xyyy, CONST[48].xyyy
> 12: MUL TEMP[7].xy, IN[1].xyyy, CONST[49].xyyy
> 13: ADD TEMP[8].x, TEMP[6].yyyy, TEMP[6].xxxx
> 14: ADD TEMP[9].x, TEMP[7].yyyy, TEMP[7].xxxx
> 15: ADD TEMP[8].x, TEMP[8].xxxx, CONST[48].wwww
> 16: ADD TEMP[9].x, TEMP[9].xxxx, CONST[49].wwww
> 17: MOV TEMP[8].y, TEMP[9].xxxx
> 18: MUL TEMP[6].xy, IN[1].xyyy, CONST[50].xyyy
> 19: MUL TEMP[7].xy, IN[1].xyyy, CONST[51].xyyy
> 20: ADD TEMP[9].x, TEMP[6].yyyy, TEMP[6].xxxx
> 21: ADD TEMP[10].x, TEMP[7].yyyy, TEMP[7].xxxx
> 22: ADD TEMP[9].x, TEMP[9].xxxx, CONST[50].wwww
> 23: ADD TEMP[10].x, TEMP[10].xxxx, CONST[51].wwww
> 24: MOV TEMP[9].y, TEMP[10].xxxx
> 25: MUL TEMP[6].xy, IN[1].xyyy, CONST[14].xyyy
> 26: MUL TEMP[7].xy, IN[1].xyyy, CONST[15].xyyy
> 27: ADD TEMP[10].x, TEMP[6].yyyy, TEMP[6].xxxx
> 28: ADD TEMP[11].x, TEMP[7].yyyy, TEMP[7].xxxx
> 29: ADD TEMP[10].x, TEMP[10].xxxx, CONST[14].wwww
> 30: MOV TEMP[10].z, TEMP[10].xxxx
> 31: ADD TEMP[11].x, TEMP[11].xxxx, CONST[15].wwww
> 32: MOV TEMP[10].w, TEMP[11].xxxx
> 33: ADD TEMP[7].xy, IN[3].xyyy, IN[2].xyyy
> 34: DP4 TEMP[11].x, TEMP[0], CONST[54]
> 35: MOV TEMP[6].z, TEMP[11].xxxx
> 36: ADD TEMP[11].xy, TEMP[7].yxxx, IN[3].yxxx
> 37: MOV TEMP[7].zw, TEMP[11].yyxy
> 38: DP4 TEMP[0].x, TEMP[0], CONST[12]
> 39: MOV TEMP[6].w, TEMP[0].xxxx
> 40: MOV TEMP[0], TEMP[7]
> 41: ADD TEMP[10].xy, TEMP[11].yxxx, IN[3].xyyy
> 42: MOV TEMP[1].zw, TEMP[6].wwzw
> 43: MOV TEMP[9].zw, CONST[0].xxxx
> 44: MAD TEMP[6], CONST[47].wwww, CONST[0].xxxy, CONST[0].yyyx
> 45: MOV TEMP[7], TEMP[2]
> 46: MAD TEMP[4].x, TEMP[4].xxxx, CONST[0].zzzz, -TEMP[5].xxxx
> 47: MOV TEMP[2].z, TEMP[4].xxxx
> 48: MOV TEMP[2].y, -TEMP[3].xxxx
> 49: MAD TEMP[2].xy, CONST[55].xyyy, TEMP[5].xxxx, TEMP[2].xyyy
> 50: MOV OUT[3], TEMP[8]
> 51: MOV OUT[4], TEMP[9]
> 52: MOV OUT[6], TEMP[0]
> 53: MOV OUT[7], TEMP[10]
> 54: MOV OUT[0], TEMP[2]
> 55: MOV OUT[5], TEMP[1]
> 56: MOV OUT[2], TEMP[7]
> 57: MOV_SAT OUT[1], TEMP[6]
> 58: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 16
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 17
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 18
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 19
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 20
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 21
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 22
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 23
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 24
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 25
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 26
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 27
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 28
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 29
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 30
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 31
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 48
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 49
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 50
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 51
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 56
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 57
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 59
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 60
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 61
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 63
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 191
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 192
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 193
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 195
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 196
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 197
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 199
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 200
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 201
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 203
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 204
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 205
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 207
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr float addrspace(2)* %10, i32 208
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = getelementptr float addrspace(2)* %10, i32 209
>  %98 = load float addrspace(2)* %97, !tbaa !0
>  %99 = getelementptr float addrspace(2)* %10, i32 210
>  %100 = load float addrspace(2)* %99, !tbaa !0
>  %101 = getelementptr float addrspace(2)* %10, i32 211
>  %102 = load float addrspace(2)* %101, !tbaa !0
>  %103 = getelementptr float addrspace(2)* %10, i32 212
>  %104 = load float addrspace(2)* %103, !tbaa !0
>  %105 = getelementptr float addrspace(2)* %10, i32 213
>  %106 = load float addrspace(2)* %105, !tbaa !0
>  %107 = getelementptr float addrspace(2)* %10, i32 214
>  %108 = load float addrspace(2)* %107, !tbaa !0
>  %109 = getelementptr float addrspace(2)* %10, i32 215
>  %110 = load float addrspace(2)* %109, !tbaa !0
>  %111 = getelementptr float addrspace(2)* %10, i32 216
>  %112 = load float addrspace(2)* %111, !tbaa !0
>  %113 = getelementptr float addrspace(2)* %10, i32 217
>  %114 = load float addrspace(2)* %113, !tbaa !0
>  %115 = getelementptr float addrspace(2)* %10, i32 218
>  %116 = load float addrspace(2)* %115, !tbaa !0
>  %117 = getelementptr float addrspace(2)* %10, i32 219
>  %118 = load float addrspace(2)* %117, !tbaa !0
>  %119 = getelementptr float addrspace(2)* %10, i32 220
>  %120 = load float addrspace(2)* %119, !tbaa !0
>  %121 = getelementptr float addrspace(2)* %10, i32 221
>  %122 = load float addrspace(2)* %121, !tbaa !0
>  %123 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %124 = load <16 x i8> addrspace(2)* %123, !tbaa !0
>  %125 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %124, i32 0, i32 %5)
>  %126 = extractelement <4 x float> %125, i32 0
>  %127 = extractelement <4 x float> %125, i32 1
>  %128 = extractelement <4 x float> %125, i32 2
>  %129 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %130 = load <16 x i8> addrspace(2)* %129, !tbaa !0
>  %131 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %130, i32 0, i32 %5)
>  %132 = extractelement <4 x float> %131, i32 0
>  %133 = extractelement <4 x float> %131, i32 1
>  %134 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %135 = load <16 x i8> addrspace(2)* %134, !tbaa !0
>  %136 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %135, i32 0, i32 %5)
>  %137 = extractelement <4 x float> %136, i32 0
>  %138 = extractelement <4 x float> %136, i32 1
>  %139 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %140 = load <16 x i8> addrspace(2)* %139, !tbaa !0
>  %141 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %140, i32 0, i32 %5)
>  %142 = extractelement <4 x float> %141, i32 0
>  %143 = extractelement <4 x float> %141, i32 1
>  %144 = fmul float %126, %14
>  %145 = fadd float %144, %12
>  %146 = fmul float %127, %14
>  %147 = fadd float %146, %12
>  %148 = fmul float %128, %14
>  %149 = fadd float %148, %12
>  %150 = fmul float %126, %12
>  %151 = fadd float %150, %14
>  %152 = fmul float %145, %96
>  %153 = fmul float %147, %98
>  %154 = fadd float %152, %153
>  %155 = fmul float %149, %100
>  %156 = fadd float %154, %155
>  %157 = fmul float %151, %102
>  %158 = fadd float %156, %157
>  %159 = fmul float %145, %104
>  %160 = fmul float %147, %106
>  %161 = fadd float %159, %160
>  %162 = fmul float %149, %108
>  %163 = fadd float %161, %162
>  %164 = fmul float %151, %110
>  %165 = fadd float %163, %164
>  %166 = fmul float %145, %18
>  %167 = fmul float %147, %20
>  %168 = fadd float %166, %167
>  %169 = fmul float %149, %22
>  %170 = fadd float %168, %169
>  %171 = fmul float %151, %24
>  %172 = fadd float %170, %171
>  %173 = fmul float %145, %26
>  %174 = fmul float %147, %28
>  %175 = fadd float %173, %174
>  %176 = fmul float %149, %30
>  %177 = fadd float %175, %176
>  %178 = fmul float %151, %32
>  %179 = fadd float %177, %178
>  %180 = fmul float %145, %34
>  %181 = fmul float %147, %36
>  %182 = fadd float %180, %181
>  %183 = fmul float %149, %38
>  %184 = fadd float %182, %183
>  %185 = fmul float %151, %40
>  %186 = fadd float %184, %185
>  %187 = fmul float %145, %42
>  %188 = fmul float %147, %44
>  %189 = fadd float %187, %188
>  %190 = fmul float %149, %46
>  %191 = fadd float %189, %190
>  %192 = fmul float %151, %48
>  %193 = fadd float %191, %192
>  %194 = fmul float %132, %72
>  %195 = fmul float %133, %74
>  %196 = fmul float %132, %78
>  %197 = fmul float %133, %80
>  %198 = fadd float %195, %194
>  %199 = fadd float %197, %196
>  %200 = fadd float %198, %76
>  %201 = fadd float %199, %82
>  %202 = fmul float %132, %84
>  %203 = fmul float %133, %86
>  %204 = fmul float %132, %90
>  %205 = fmul float %133, %92
>  %206 = fadd float %203, %202
>  %207 = fadd float %205, %204
>  %208 = fadd float %206, %88
>  %209 = fadd float %207, %94
>  %210 = fmul float %132, %58
>  %211 = fmul float %133, %60
>  %212 = fmul float %132, %64
>  %213 = fmul float %133, %66
>  %214 = fadd float %211, %210
>  %215 = fadd float %213, %212
>  %216 = fadd float %214, %62
>  %217 = fadd float %215, %68
>  %218 = fadd float %142, %137
>  %219 = fadd float %143, %138
>  %220 = fmul float %145, %112
>  %221 = fmul float %147, %114
>  %222 = fadd float %220, %221
>  %223 = fmul float %149, %116
>  %224 = fadd float %222, %223
>  %225 = fmul float %151, %118
>  %226 = fadd float %224, %225
>  %227 = fadd float %219, %143
>  %228 = fadd float %218, %142
>  %229 = fmul float %145, %50
>  %230 = fmul float %147, %52
>  %231 = fadd float %229, %230
>  %232 = fmul float %149, %54
>  %233 = fadd float %231, %232
>  %234 = fmul float %151, %56
>  %235 = fadd float %233, %234
>  %236 = fadd float %228, %142
>  %237 = fadd float %227, %143
>  %238 = fmul float %70, %12
>  %239 = fadd float %238, %14
>  %240 = fmul float %70, %12
>  %241 = fadd float %240, %14
>  %242 = fmul float %70, %12
>  %243 = fadd float %242, %14
>  %244 = fmul float %70, %14
>  %245 = fadd float %244, %12
>  %246 = fsub float -0.000000e+00, %193
>  %247 = fmul float %186, %16
>  %248 = fadd float %247, %246
>  %249 = fsub float -0.000000e+00, %179
>  %250 = fmul float %120, %193
>  %251 = fadd float %250, %172
>  %252 = fmul float %122, %193
>  %253 = fadd float %252, %249
>  %254 = call float @llvm.AMDIL.clamp.(float %239, float 0.000000e+00, float 1.000000e+00)
>  %255 = call float @llvm.AMDIL.clamp.(float %241, float 0.000000e+00, float 1.000000e+00)
>  %256 = call float @llvm.AMDIL.clamp.(float %243, float 0.000000e+00, float 1.000000e+00)
>  %257 = call float @llvm.AMDIL.clamp.(float %245, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %254, float %255, float %256, float %257)
>  %258 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %259 = load float addrspace(2)* addrspace(2)* %258, !tbaa !0
>  %260 = getelementptr float addrspace(2)* %259, i32 0
>  %261 = load float addrspace(2)* %260, !tbaa !0
>  %262 = fmul float %261, %172
>  %263 = getelementptr float addrspace(2)* %259, i32 1
>  %264 = load float addrspace(2)* %263, !tbaa !0
>  %265 = fmul float %264, %179
>  %266 = fadd float %262, %265
>  %267 = getelementptr float addrspace(2)* %259, i32 2
>  %268 = load float addrspace(2)* %267, !tbaa !0
>  %269 = fmul float %268, %186
>  %270 = fadd float %266, %269
>  %271 = getelementptr float addrspace(2)* %259, i32 3
>  %272 = load float addrspace(2)* %271, !tbaa !0
>  %273 = fmul float %272, %193
>  %274 = fadd float %270, %273
>  %275 = getelementptr float addrspace(2)* %259, i32 4
>  %276 = load float addrspace(2)* %275, !tbaa !0
>  %277 = fmul float %276, %172
>  %278 = getelementptr float addrspace(2)* %259, i32 5
>  %279 = load float addrspace(2)* %278, !tbaa !0
>  %280 = fmul float %279, %179
>  %281 = fadd float %277, %280
>  %282 = getelementptr float addrspace(2)* %259, i32 6
>  %283 = load float addrspace(2)* %282, !tbaa !0
>  %284 = fmul float %283, %186
>  %285 = fadd float %281, %284
>  %286 = getelementptr float addrspace(2)* %259, i32 7
>  %287 = load float addrspace(2)* %286, !tbaa !0
>  %288 = fmul float %287, %193
>  %289 = fadd float %285, %288
>  %290 = getelementptr float addrspace(2)* %259, i32 8
>  %291 = load float addrspace(2)* %290, !tbaa !0
>  %292 = fmul float %291, %172
>  %293 = getelementptr float addrspace(2)* %259, i32 9
>  %294 = load float addrspace(2)* %293, !tbaa !0
>  %295 = fmul float %294, %179
>  %296 = fadd float %292, %295
>  %297 = getelementptr float addrspace(2)* %259, i32 10
>  %298 = load float addrspace(2)* %297, !tbaa !0
>  %299 = fmul float %298, %186
>  %300 = fadd float %296, %299
>  %301 = getelementptr float addrspace(2)* %259, i32 11
>  %302 = load float addrspace(2)* %301, !tbaa !0
>  %303 = fmul float %302, %193
>  %304 = fadd float %300, %303
>  %305 = getelementptr float addrspace(2)* %259, i32 12
>  %306 = load float addrspace(2)* %305, !tbaa !0
>  %307 = fmul float %306, %172
>  %308 = getelementptr float addrspace(2)* %259, i32 13
>  %309 = load float addrspace(2)* %308, !tbaa !0
>  %310 = fmul float %309, %179
>  %311 = fadd float %307, %310
>  %312 = getelementptr float addrspace(2)* %259, i32 14
>  %313 = load float addrspace(2)* %312, !tbaa !0
>  %314 = fmul float %313, %186
>  %315 = fadd float %311, %314
>  %316 = getelementptr float addrspace(2)* %259, i32 15
>  %317 = load float addrspace(2)* %316, !tbaa !0
>  %318 = fmul float %317, %193
>  %319 = fadd float %315, %318
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %274, float %289, float %304, float %319)
>  %320 = getelementptr float addrspace(2)* %259, i32 16
>  %321 = load float addrspace(2)* %320, !tbaa !0
>  %322 = fmul float %321, %172
>  %323 = getelementptr float addrspace(2)* %259, i32 17
>  %324 = load float addrspace(2)* %323, !tbaa !0
>  %325 = fmul float %324, %179
>  %326 = fadd float %322, %325
>  %327 = getelementptr float addrspace(2)* %259, i32 18
>  %328 = load float addrspace(2)* %327, !tbaa !0
>  %329 = fmul float %328, %186
>  %330 = fadd float %326, %329
>  %331 = getelementptr float addrspace(2)* %259, i32 19
>  %332 = load float addrspace(2)* %331, !tbaa !0
>  %333 = fmul float %332, %193
>  %334 = fadd float %330, %333
>  %335 = getelementptr float addrspace(2)* %259, i32 20
>  %336 = load float addrspace(2)* %335, !tbaa !0
>  %337 = fmul float %336, %172
>  %338 = getelementptr float addrspace(2)* %259, i32 21
>  %339 = load float addrspace(2)* %338, !tbaa !0
>  %340 = fmul float %339, %179
>  %341 = fadd float %337, %340
>  %342 = getelementptr float addrspace(2)* %259, i32 22
>  %343 = load float addrspace(2)* %342, !tbaa !0
>  %344 = fmul float %343, %186
>  %345 = fadd float %341, %344
>  %346 = getelementptr float addrspace(2)* %259, i32 23
>  %347 = load float addrspace(2)* %346, !tbaa !0
>  %348 = fmul float %347, %193
>  %349 = fadd float %345, %348
>  %350 = getelementptr float addrspace(2)* %259, i32 24
>  %351 = load float addrspace(2)* %350, !tbaa !0
>  %352 = fmul float %351, %172
>  %353 = getelementptr float addrspace(2)* %259, i32 25
>  %354 = load float addrspace(2)* %353, !tbaa !0
>  %355 = fmul float %354, %179
>  %356 = fadd float %352, %355
>  %357 = getelementptr float addrspace(2)* %259, i32 26
>  %358 = load float addrspace(2)* %357, !tbaa !0
>  %359 = fmul float %358, %186
>  %360 = fadd float %356, %359
>  %361 = getelementptr float addrspace(2)* %259, i32 27
>  %362 = load float addrspace(2)* %361, !tbaa !0
>  %363 = fmul float %362, %193
>  %364 = fadd float %360, %363
>  %365 = getelementptr float addrspace(2)* %259, i32 28
>  %366 = load float addrspace(2)* %365, !tbaa !0
>  %367 = fmul float %366, %172
>  %368 = getelementptr float addrspace(2)* %259, i32 29
>  %369 = load float addrspace(2)* %368, !tbaa !0
>  %370 = fmul float %369, %179
>  %371 = fadd float %367, %370
>  %372 = getelementptr float addrspace(2)* %259, i32 30
>  %373 = load float addrspace(2)* %372, !tbaa !0
>  %374 = fmul float %373, %186
>  %375 = fadd float %371, %374
>  %376 = getelementptr float addrspace(2)* %259, i32 31
>  %377 = load float addrspace(2)* %376, !tbaa !0
>  %378 = fmul float %377, %193
>  %379 = fadd float %375, %378
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %334, float %349, float %364, float %379)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %200, float %201, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %208, float %209, float %12, float %12)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %158, float %165, float %226, float %235)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %218, float %219, float %227, float %228)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 37, i32 0, float %236, float %237, float %216, float %217)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %251, float %253, float %248, float %193)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0410100
>bf8c007f
>c00403bf
>c0020300
>bf8c007f
>7e040204
>c0028301
>bf8c007f
>7e020205
>d2820003
>040a0208
>d2060803
>02010103
>d2820004
>04060408
>d2060804
>02010104
>f800020f
>03040404
>c0840700
>bf8c000f
>e00c2000
>80020800
>bf8c0770
>d2820004
>04080b08
>d2820006
>04080b09
>c0040311
>bf8c007f
>10060c08
>c0040310
>bf8c007f
>d2820003
>040c1104
>d2820007
>04080b0a
>c0028312
>bf8c007f
>d2820002
>040c0b07
>d2820008
>04040908
>c0028313
>bf8c007f
>d2820001
>04080b08
>c0028315
>bf8c007f
>10040c05
>c0028314
>bf8c007f
>d2820002
>04080b04
>c0028316
>bf8c007f
>d2820002
>04080b07
>c0028317
>bf8c007f
>d2820002
>04080b08
>c0400102
>bf8c007f
>c002810d
>bf8c007f
>10060405
>c002810c
>bf8c007f
>d2820005
>040e0205
>c0028319
>bf8c007f
>10060c05
>c0028318
>bf8c007f
>d2820003
>040c0b04
>c002831a
>bf8c007f
>d2820003
>040c0b07
>c002831b
>bf8c007f
>d2820003
>040c0b08
>c002810e
>bf8c007f
>d2820009
>04160605
>c002831d
>bf8c007f
>100a0c05
>c002831c
>bf8c007f
>d2820005
>04140b04
>c002831e
>bf8c007f
>d2820005
>04140b07
>c002831f
>bf8c007f
>d2820005
>04140b08
>c002810f
>bf8c007f
>d2820009
>04260a05
>c0028109
>bf8c007f
>10140405
>c0028108
>bf8c007f
>d282000a
>042a0205
>c002810a
>bf8c007f
>d282000a
>042a0605
>c002810b
>bf8c007f
>d282000a
>042a0a05
>c0028105
>bf8c007f
>10160405
>c0028104
>bf8c007f
>d282000b
>042e0205
>c0028106
>bf8c007f
>d282000b
>042e0605
>c0028107
>bf8c007f
>d282000b
>042e0a05
>c0028101
>bf8c007f
>10180405
>c0028100
>bf8c007f
>d282000c
>04320205
>c0028102
>bf8c007f
>d282000c
>04320605
>c0028103
>bf8c007f
>d282000c
>04320a05
>f80000ef
>090a0b0c
>c002811d
>bf8c000f
>10120405
>c002811c
>bf8c007f
>d2820009
>04260205
>c002811e
>bf8c007f
>d2820009
>04260605
>c002811f
>bf8c007f
>d2820009
>04260a05
>c0028119
>bf8c007f
>10140405
>c0028118
>bf8c007f
>d282000a
>042a0205
>c002811a
>bf8c007f
>d282000a
>042a0605
>c002811b
>bf8c007f
>d282000a
>042a0a05
>c0028115
>bf8c007f
>10160405
>c0028114
>bf8c007f
>d282000b
>042e0205
>c0028116
>bf8c007f
>d282000b
>042e0605
>c0028117
>bf8c007f
>d282000b
>042e0a05
>c0028111
>bf8c007f
>10180405
>c0028110
>bf8c007f
>d282000c
>04320205
>c0028112
>bf8c007f
>d282000c
>04320605
>c0000113
>bf8c007f
>d282000c
>04320a00
>f80000ff
>090a0b0c
>c0840704
>bf8c000f
>e00c2000
>80020900
>c00003c4
>bf8c0070
>101a1200
>c00003c5
>bf8c007f
>d282000d
>0434010a
>c00003c7
>bf8c007f
>061a1a00
>c00003c0
>bf8c007f
>101c1200
>c00003c1
>bf8c007f
>d282000e
>0438010a
>c00003c3
>bf8c007f
>061c1c00
>7e1e0280
>f800021f
>0f0f0d0e
>c00003cc
>bf8c000f
>101a1200
>c00003cd
>bf8c007f
>d282000d
>0434010a
>c00003cf
>bf8c007f
>061a1a00
>c00003c8
>bf8c007f
>101c1200
>c00003c9
>bf8c007f
>d282000e
>0438010a
>c00003cb
>bf8c007f
>061c1c00
>7e1e0204
>7e200204
>f800022f
>100f0d0e
>c0000331
>bf8c000f
>101a0c00
>c0000330
>bf8c007f
>d282000d
>04340104
>c0000332
>bf8c007f
>d282000d
>04340107
>c0000333
>bf8c007f
>d282000d
>04340108
>c00003d9
>bf8c007f
>101c0c00
>c00003d8
>bf8c007f
>d282000e
>04380104
>c00003da
>bf8c007f
>d282000e
>04380107
>c00003db
>bf8c007f
>d282000e
>04380108
>c00003d5
>bf8c007f
>101e0c00
>c00003d4
>bf8c007f
>d282000f
>043c0104
>c00003d6
>bf8c007f
>d282000f
>043c0107
>c00003d7
>bf8c007f
>d282000f
>043c0108
>c00003d1
>bf8c007f
>100c0c00
>c00003d0
>bf8c007f
>d2820004
>04180104
>c00003d2
>bf8c007f
>d2820004
>04100107
>c00003d3
>bf8c007f
>d2820004
>04100108
>f800023f
>0d0e0f04
>c0840708
>bf8c000f
>e00c2000
>80021100
>c082070c
>bf8c0070
>e00c2000
>80010d00
>bf8c0770
>060c230d
>06001b06
>060e250e
>06081d07
>f800024f
>00040706
>c000033c
>bf8c000f
>100c1200
>c000033d
>bf8c007f
>d2820006
>0418010a
>c000033f
>bf8c007f
>060c0c00
>c0000338
>bf8c007f
>100e1200
>c0000339
>bf8c007f
>d2820007
>041c010a
>c000033b
>bf8c007f
>060e0e00
>06081d04
>06001b00
>f800025f
>06070400
>c00003dc
>bf8c000f
>d2820000
>04060a00
>c0000302
>bf8c007f
>10020600
>08020b01
>c00003dd
>bf8c007f
>10060a00
>08040503
>f80008cf
>05010200
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], COLOR[1], COLOR
>DCL IN[2], GENERIC[19], PERSPECTIVE
>DCL IN[3], GENERIC[20], PERSPECTIVE
>DCL IN[4], GENERIC[21], PERSPECTIVE
>DCL IN[5], GENERIC[22], PERSPECTIVE, CENTROID
>DCL IN[6], GENERIC[23], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL CONST[0..30]
>DCL TEMP[0..8], LOCAL
>DCL TEMP[9], ARRAY(1), LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0000,    -0.7071}
>IMM[1] FLT32 {    0.8165,     0.0000,     0.5774,    -0.4082}
>IMM[2] FLT32 {   -0.4082,     0.7071,     0.5774,    -0.4082}
>IMM[3] FLT32 {   -0.4082,    -0.7071,     0.5774,     0.0000}
>  0: MOV TEMP[0].xy, IN[5].wzzz
>  1: TEX TEMP[0].xyz, TEMP[0], SAMP[1], 2D
>  2: MOV TEMP[1].xy, IN[2].xyyy
>  3: TEX TEMP[1].xyz, TEMP[1], SAMP[2], 2D
>  4: MOV TEMP[2].xy, IN[3].xyyy
>  5: TEX TEMP[2].xyz, TEMP[2], SAMP[3], 2D
>  6: MOV TEMP[3].xy, IN[5].xyyy
>  7: TEX TEMP[3].xyz, TEMP[3], SAMP[1], 2D
>  8: MOV TEMP[4].xy, IN[6].xyyy
>  9: TEX TEMP[4].xyz, TEMP[4], SAMP[1], 2D
> 10: MOV TEMP[5].xy, IN[2].xyyy
> 11: TEX TEMP[5].xyz, TEMP[5], SAMP[0], 2D
> 12: MOV TEMP[6].xy, IN[2].xyyy
> 13: TEX TEMP[6].xyz, TEMP[6], SAMP[4], 2D
> 14: MAD TEMP[7].xyz, IMM[0].xxxx, TEMP[1].xyzz, IMM[0].yyyy
> 15: MAD TEMP[2].xyz, IMM[0].xxxx, TEMP[2].xyzz, IMM[0].yyyy
> 16: ADD TEMP[8].xyz, TEMP[2].xyzz, -TEMP[7].xyzz
> 17: MAD TEMP[1].xyz, IN[1].xxxx, TEMP[8].xyzz, TEMP[7].xyzz
> 18: DP3 TEMP[2].x, TEMP[1].xyzz, IMM[1].xyzz
> 19: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 20: DP3 TEMP[7].x, TEMP[1].xyzz, IMM[2].xyzz
> 21: MOV_SAT TEMP[7].x, TEMP[7].xxxx
> 22: MOV TEMP[2].y, TEMP[7].xxxx
> 23: DP3 TEMP[7].x, TEMP[1].xyzz, IMM[3].xyzz
> 24: MOV_SAT TEMP[7].x, TEMP[7].xxxx
> 25: MOV TEMP[2].z, TEMP[7].xxxx
> 26: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[2].xyzz
> 27: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[2].yyyy
> 28: DP3 TEMP[7].x, TEMP[2].xyzz, IMM[0].zzzz
> 29: MAD TEMP[0].xyz, TEMP[2].xxxx, TEMP[3].xyzz, TEMP[0].xyzz
> 30: RCP TEMP[3].x, TEMP[7].xxxx
> 31: MAD TEMP[1].xyz, TEMP[2].zzzz, TEMP[4].xyzz, TEMP[0].xyzz
> 32: ADD TEMP[4].x, -IN[4].zzzz, CONST[10].zzzz
> 33: MUL TEMP[0].xyz, TEMP[3].xxxx, CONST[12].xyzz
> 34: RCP TEMP[3].x, TEMP[4].xxxx
> 35: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[0].xyzz
> 36: ADD TEMP[4].x, -IN[4].zzzz, CONST[11].yyyy
> 37: ADD TEMP[6].xyz, TEMP[6].xyzz, -TEMP[5].xyzz
> 38: MAD TEMP[0].xyz, IN[1].xxxx, TEMP[6].xyzz, TEMP[5].xyzz
> 39: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[4].xxxx
> 40: MOV_SAT TEMP[3].x, TEMP[3].xxxx
> 41: MUL TEMP[2].xyz, TEMP[0].xyzz, IN[0].xyzz
> 42: MUL TEMP[3].x, TEMP[3].xxxx, IN[4].wwww
> 43: MUL TEMP[2].xyz, TEMP[1].xyzz, TEMP[2].xyzz
> 44: MUL TEMP[1].x, TEMP[3].xxxx, CONST[11].wwww
> 45: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 46: MOV TEMP[2].w, TEMP[1].xxxx
> 47: MAD TEMP[0].xyz, TEMP[2].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 48: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 49: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xxxx
> 50: MAD TEMP[2].xyz, TEMP[2].xyzz, CONST[30].xxxx, TEMP[0].xyzz
> 51: MOV TEMP[9], TEMP[2]
> 52: MOV OUT[0], TEMP[9]
> 53: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 42
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 45
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 47
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 48
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 49
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 50
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 116
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 117
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 118
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 120
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %43 = load <32 x i8> addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %45 = load <16 x i8> addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %47 = load <32 x i8> addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %49 = load <16 x i8> addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr <32 x i8> addrspace(2)* %2, i32 2
>  %51 = load <32 x i8> addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr <16 x i8> addrspace(2)* %1, i32 2
>  %53 = load <16 x i8> addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr <32 x i8> addrspace(2)* %2, i32 3
>  %55 = load <32 x i8> addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr <16 x i8> addrspace(2)* %1, i32 3
>  %57 = load <16 x i8> addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr <32 x i8> addrspace(2)* %2, i32 4
>  %59 = load <32 x i8> addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr <16 x i8> addrspace(2)* %1, i32 4
>  %61 = load <16 x i8> addrspace(2)* %60, !tbaa !0
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %64 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %65 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %66 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %67 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %68 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %3, <2 x i32> %5)
>  %69 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %3, <2 x i32> %5)
>  %70 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %3, <2 x i32> %5)
>  %71 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %3, <2 x i32> %5)
>  %72 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %3, <2 x i32> %6)
>  %73 = call float @llvm.SI.fs.interp(i32 1, i32 5, i32 %3, <2 x i32> %6)
>  %74 = call float @llvm.SI.fs.interp(i32 2, i32 5, i32 %3, <2 x i32> %6)
>  %75 = call float @llvm.SI.fs.interp(i32 3, i32 5, i32 %3, <2 x i32> %6)
>  %76 = call float @llvm.SI.fs.interp(i32 0, i32 6, i32 %3, <2 x i32> %6)
>  %77 = call float @llvm.SI.fs.interp(i32 1, i32 6, i32 %3, <2 x i32> %6)
>  %78 = bitcast float %75 to i32
>  %79 = bitcast float %74 to i32
>  %80 = insertelement <2 x i32> undef, i32 %78, i32 0
>  %81 = insertelement <2 x i32> %80, i32 %79, i32 1
>  %82 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %81, <32 x i8> %47, <16 x i8> %49, i32 2)
>  %83 = extractelement <4 x float> %82, i32 0
>  %84 = extractelement <4 x float> %82, i32 1
>  %85 = extractelement <4 x float> %82, i32 2
>  %86 = bitcast float %66 to i32
>  %87 = bitcast float %67 to i32
>  %88 = insertelement <2 x i32> undef, i32 %86, i32 0
>  %89 = insertelement <2 x i32> %88, i32 %87, i32 1
>  %90 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %89, <32 x i8> %51, <16 x i8> %53, i32 2)
>  %91 = extractelement <4 x float> %90, i32 0
>  %92 = extractelement <4 x float> %90, i32 1
>  %93 = extractelement <4 x float> %90, i32 2
>  %94 = bitcast float %68 to i32
>  %95 = bitcast float %69 to i32
>  %96 = insertelement <2 x i32> undef, i32 %94, i32 0
>  %97 = insertelement <2 x i32> %96, i32 %95, i32 1
>  %98 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %97, <32 x i8> %55, <16 x i8> %57, i32 2)
>  %99 = extractelement <4 x float> %98, i32 0
>  %100 = extractelement <4 x float> %98, i32 1
>  %101 = extractelement <4 x float> %98, i32 2
>  %102 = bitcast float %72 to i32
>  %103 = bitcast float %73 to i32
>  %104 = insertelement <2 x i32> undef, i32 %102, i32 0
>  %105 = insertelement <2 x i32> %104, i32 %103, i32 1
>  %106 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %105, <32 x i8> %47, <16 x i8> %49, i32 2)
>  %107 = extractelement <4 x float> %106, i32 0
>  %108 = extractelement <4 x float> %106, i32 1
>  %109 = extractelement <4 x float> %106, i32 2
>  %110 = bitcast float %76 to i32
>  %111 = bitcast float %77 to i32
>  %112 = insertelement <2 x i32> undef, i32 %110, i32 0
>  %113 = insertelement <2 x i32> %112, i32 %111, i32 1
>  %114 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %113, <32 x i8> %47, <16 x i8> %49, i32 2)
>  %115 = extractelement <4 x float> %114, i32 0
>  %116 = extractelement <4 x float> %114, i32 1
>  %117 = extractelement <4 x float> %114, i32 2
>  %118 = bitcast float %66 to i32
>  %119 = bitcast float %67 to i32
>  %120 = insertelement <2 x i32> undef, i32 %118, i32 0
>  %121 = insertelement <2 x i32> %120, i32 %119, i32 1
>  %122 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %121, <32 x i8> %43, <16 x i8> %45, i32 2)
>  %123 = extractelement <4 x float> %122, i32 0
>  %124 = extractelement <4 x float> %122, i32 1
>  %125 = extractelement <4 x float> %122, i32 2
>  %126 = bitcast float %66 to i32
>  %127 = bitcast float %67 to i32
>  %128 = insertelement <2 x i32> undef, i32 %126, i32 0
>  %129 = insertelement <2 x i32> %128, i32 %127, i32 1
>  %130 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %129, <32 x i8> %59, <16 x i8> %61, i32 2)
>  %131 = extractelement <4 x float> %130, i32 0
>  %132 = extractelement <4 x float> %130, i32 1
>  %133 = extractelement <4 x float> %130, i32 2
>  %134 = fmul float 2.000000e+00, %91
>  %135 = fadd float %134, -1.000000e+00
>  %136 = fmul float 2.000000e+00, %92
>  %137 = fadd float %136, -1.000000e+00
>  %138 = fmul float 2.000000e+00, %93
>  %139 = fadd float %138, -1.000000e+00
>  %140 = fmul float 2.000000e+00, %99
>  %141 = fadd float %140, -1.000000e+00
>  %142 = fmul float 2.000000e+00, %100
>  %143 = fadd float %142, -1.000000e+00
>  %144 = fmul float 2.000000e+00, %101
>  %145 = fadd float %144, -1.000000e+00
>  %146 = fsub float -0.000000e+00, %135
>  %147 = fadd float %141, %146
>  %148 = fsub float -0.000000e+00, %137
>  %149 = fadd float %143, %148
>  %150 = fsub float -0.000000e+00, %139
>  %151 = fadd float %145, %150
>  %152 = fmul float %65, %147
>  %153 = fadd float %152, %135
>  %154 = fmul float %65, %149
>  %155 = fadd float %154, %137
>  %156 = fmul float %65, %151
>  %157 = fadd float %156, %139
>  %158 = fmul float %153, 0x3FEA20BD80000000
>  %159 = fmul float %155, 0.000000e+00
>  %160 = fadd float %159, %158
>  %161 = fmul float %157, 0x3FE279A740000000
>  %162 = fadd float %160, %161
>  %163 = call float @llvm.AMDIL.clamp.(float %162, float 0.000000e+00, float 1.000000e+00)
>  %164 = fmul float %153, 0xBFDA20BDA0000000
>  %165 = fmul float %155, 0x3FE6A09E60000000
>  %166 = fadd float %165, %164
>  %167 = fmul float %157, 0x3FE279A740000000
>  %168 = fadd float %166, %167
>  %169 = call float @llvm.AMDIL.clamp.(float %168, float 0.000000e+00, float 1.000000e+00)
>  %170 = fmul float %153, 0xBFDA20BD20000000
>  %171 = fmul float %155, 0xBFE6A09E80000000
>  %172 = fadd float %171, %170
>  %173 = fmul float %157, 0x3FE279A740000000
>  %174 = fadd float %172, %173
>  %175 = call float @llvm.AMDIL.clamp.(float %174, float 0.000000e+00, float 1.000000e+00)
>  %176 = fmul float %163, %163
>  %177 = fmul float %169, %169
>  %178 = fmul float %175, %175
>  %179 = fmul float %83, %177
>  %180 = fmul float %84, %177
>  %181 = fmul float %85, %177
>  %182 = fmul float %176, 1.000000e+00
>  %183 = fmul float %177, 1.000000e+00
>  %184 = fadd float %183, %182
>  %185 = fmul float %178, 1.000000e+00
>  %186 = fadd float %184, %185
>  %187 = fmul float %176, %107
>  %188 = fadd float %187, %179
>  %189 = fmul float %176, %108
>  %190 = fadd float %189, %180
>  %191 = fmul float %176, %109
>  %192 = fadd float %191, %181
>  %193 = fdiv float 1.000000e+00, %186
>  %194 = fmul float %178, %115
>  %195 = fadd float %194, %188
>  %196 = fmul float %178, %116
>  %197 = fadd float %196, %190
>  %198 = fmul float %178, %117
>  %199 = fadd float %198, %192
>  %200 = fsub float -0.000000e+00, %70
>  %201 = fadd float %200, %23
>  %202 = fmul float %193, %29
>  %203 = fmul float %193, %31
>  %204 = fmul float %193, %33
>  %205 = fdiv float 1.000000e+00, %201
>  %206 = fmul float %195, %202
>  %207 = fmul float %197, %203
>  %208 = fmul float %199, %204
>  %209 = fsub float -0.000000e+00, %70
>  %210 = fadd float %209, %25
>  %211 = fsub float -0.000000e+00, %123
>  %212 = fadd float %131, %211
>  %213 = fsub float -0.000000e+00, %124
>  %214 = fadd float %132, %213
>  %215 = fsub float -0.000000e+00, %125
>  %216 = fadd float %133, %215
>  %217 = fmul float %65, %212
>  %218 = fadd float %217, %123
>  %219 = fmul float %65, %214
>  %220 = fadd float %219, %124
>  %221 = fmul float %65, %216
>  %222 = fadd float %221, %125
>  %223 = fmul float %205, %210
>  %224 = call float @llvm.AMDIL.clamp.(float %223, float 0.000000e+00, float 1.000000e+00)
>  %225 = fmul float %218, %62
>  %226 = fmul float %220, %63
>  %227 = fmul float %222, %64
>  %228 = fmul float %224, %71
>  %229 = fmul float %206, %225
>  %230 = fmul float %207, %226
>  %231 = fmul float %208, %227
>  %232 = fmul float %228, %27
>  %233 = call float @llvm.AMDIL.clamp.(float %232, float 0.000000e+00, float 1.000000e+00)
>  %234 = fsub float -0.000000e+00, %41
>  %235 = fmul float %229, %234
>  %236 = fadd float %235, %35
>  %237 = fsub float -0.000000e+00, %41
>  %238 = fmul float %230, %237
>  %239 = fadd float %238, %37
>  %240 = fsub float -0.000000e+00, %41
>  %241 = fmul float %231, %240
>  %242 = fadd float %241, %39
>  %243 = call float @llvm.AMDIL.clamp.(float %233, float 0.000000e+00, float 1.000000e+00)
>  %244 = fmul float %236, %243
>  %245 = fmul float %239, %243
>  %246 = fmul float %242, %243
>  %247 = fmul float %229, %41
>  %248 = fadd float %247, %244
>  %249 = fmul float %230, %41
>  %250 = fadd float %249, %245
>  %251 = fmul float %231, %41
>  %252 = fadd float %251, %246
>  %253 = call i32 @llvm.SI.packf16(float %248, float %250)
>  %254 = bitcast i32 %253 to float
>  %255 = call i32 @llvm.SI.packf16(float %252, float %233)
>  %256 = bitcast i32 %255 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %254, float %256, float %254, float %256)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8180900
>c8190901
>c8140800
>c8150801
>c0840308
>c0c60510
>bf8c007f
>f0800700
>00430705
>bf8c0770
>06081108
>061408f3
>c8300d00
>c8310d01
>c82c0c00
>c82d0c01
>c084030c
>c0c60518
>bf8c007f
>f0800700
>00430b0b
>bf8c0770
>0608190c
>060808f3
>081c1504
>c8100400
>c8110401
>d282000f
>042a1d04
>06140f07
>061414f3
>061c170b
>061c1cf3
>081c150e
>d2820010
>042a1d04
>101420ff
>bed105ed
>7e1c02ff
>3f3504f3
>d282000a
>042a1d0f
>060e1309
>060e0ef3
>06101b0d
>061010f3
>08100f08
>d2820011
>041e1104
>7e2402ff
>3f13cd3a
>d2820007
>042a2511
>d2060813
>02010107
>100e2713
>c8241602
>c8251603
>c8201702
>c8211703
>c0840304
>c0c60508
>bf8c007f
>f0800700
>00430808
>bf8c0770
>10280f09
>101620ff
>3f5105ec
>d282000b
>042d010f
>d282000b
>042e2511
>d206080b
>0201010b
>1016170b
>c8341502
>c8351503
>c8301402
>c8311403
>f0800700
>00430c0c
>bf8c0770
>d2820014
>04521b0b
>102020ff
>bed105e9
>7e2a02ff
>bf3504f4
>d282000f
>04422b0f
>d282000f
>043e2511
>d2060815
>0201010f
>101e2b15
>c8441902
>c8451903
>c8401802
>c8411803
>f0800700
>00431010
>bf8c0770
>d2820003
>0452230f
>d2820002
>042e2713
>d2820002
>040a2b15
>7e045502
>c0400100
>bf8c007f
>c0038131
>bf8c007f
>10260407
>10062703
>c0840300
>c0c60500
>bf8c007f
>f0800700
>00431305
>c0840310
>c0c60520
>bf8c0070
>f0800700
>00431605
>bf8c0770
>080a2917
>d2820005
>04520b04
>c8180100
>c8190101
>100a0d05
>100c0b03
>c0010178
>bf8c007f
>10060c02
>c0018175
>bf8c007f
>08320603
>c80c1200
>c80d1201
>c001812d
>bf8c007f
>080a0603
>c001812a
>bf8c007f
>08060603
>7e065503
>10060b03
>d2060803
>02010103
>c8141300
>c8151301
>10060b03
>c001812f
>bf8c007f
>10060603
>d2060803
>02010103
>d2060805
>02010103
>10320b19
>d2820006
>04640506
>10320f08
>d2820019
>0466190b
>d2820019
>0466210f
>c0018130
>bf8c007f
>10340403
>10323519
>08342716
>d282001a
>044e3504
>c86c0000
>c86d0001
>1034371a
>10323519
>10343202
>c0018174
>bf8c007f
>08343403
>10340b1a
>d2820019
>04680519
>5e0c0d19
>100e0f0a
>d2820007
>041e1d0b
>d2820007
>041e250f
>c0018132
>bf8c007f
>10040403
>10040507
>080e2b18
>d2820004
>04560f04
>c81c0200
>c81d0201
>10000f04
>10000102
>10020002
>c0000176
>bf8c007f
>08020200
>10020b01
>d2820000
>04040500
>5e000700
>f8001c0f
>00060006
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL IN[4]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], COLOR[1]
>DCL OUT[3], CLIPVERTEX
>DCL OUT[4], GENERIC[19]
>DCL OUT[5], GENERIC[20]
>DCL OUT[6], GENERIC[21]
>DCL OUT[7], GENERIC[22]
>DCL OUT[8], GENERIC[23]
>DCL CONST[0..51]
>DCL TEMP[0..11], LOCAL
>  0: MAD TEMP[0], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  1: DP4 TEMP[1].x, TEMP[0], CONST[48]
>  2: DP4 TEMP[2].x, TEMP[0], CONST[49]
>  3: MOV TEMP[1].y, TEMP[2].xxxx
>  4: DP4 TEMP[2].x, TEMP[0], CONST[4]
>  5: DP4 TEMP[3].x, TEMP[0], CONST[5]
>  6: MOV TEMP[2].y, TEMP[3].xxxx
>  7: DP4 TEMP[4].x, TEMP[0], CONST[6]
>  8: MOV TEMP[2].z, TEMP[4].xxxx
>  9: DP4 TEMP[5].x, TEMP[0], CONST[7]
> 10: MOV TEMP[2].w, TEMP[5].xxxx
> 11: DP4 TEMP[6].x, TEMP[0], CONST[50]
> 12: MOV TEMP[7].z, TEMP[6].xxxx
> 13: ADD TEMP[8].xy, IN[3].xyyy, IN[2].xyyy
> 14: ADD TEMP[7].xy, -TEMP[6].xxxx, CONST[2].wzzz
> 15: MAX TEMP[6].x, TEMP[7].xxxx, CONST[0].xxxx
> 16: RCP TEMP[9].x, TEMP[7].yyyy
> 17: DP4 TEMP[0].x, TEMP[0], CONST[12]
> 18: MOV TEMP[7].w, TEMP[0].xxxx
> 19: MUL TEMP[6].x, TEMP[6].xxxx, TEMP[9].xxxx
> 20: ADD TEMP[9].xy, TEMP[8].yxxx, IN[3].yxxx
> 21: MOV TEMP[8].zw, TEMP[9].yyxy
> 22: MUL TEMP[0].x, TEMP[0].xxxx, TEMP[6].xxxx
> 23: MOV TEMP[6], TEMP[8]
> 24: MAD TEMP[0].x, -TEMP[0].xxxx, CONST[16].wwww, CONST[16].yyyy
> 25: ADD TEMP[8].xy, TEMP[9].yxxx, IN[3].xyyy
> 26: MAX TEMP[0].xyz, TEMP[0].xxxx, CONST[16].zzzz
> 27: MOV TEMP[1].zw, TEMP[7].wwzw
> 28: MOV TEMP[0].yzw, TEMP[0].yxyz
> 29: MOV TEMP[7].xy, IN[1].xyxx
> 30: MUL TEMP[9], IN[1].xyxx, CONST[0].yyxx
> 31: MOV TEMP[8].zw, IN[1].yyxy
> 32: MAD TEMP[10], CONST[47].wwww, CONST[0].xxxy, CONST[0].yyyx
> 33: MOV TEMP[0].x, IN[4].wwww
> 34: MOV TEMP[11], TEMP[2]
> 35: MAD TEMP[4].x, TEMP[4].xxxx, CONST[0].zzzz, -TEMP[5].xxxx
> 36: MOV TEMP[2].z, TEMP[4].xxxx
> 37: MOV TEMP[2].y, -TEMP[3].xxxx
> 38: MAD TEMP[2].xy, CONST[51].xyyy, TEMP[5].xxxx, TEMP[2].xyyy
> 39: MOV_SAT OUT[2], TEMP[0]
> 40: MOV OUT[4], TEMP[7]
> 41: MOV OUT[5], TEMP[9]
> 42: MOV OUT[7], TEMP[6]
> 43: MOV OUT[8], TEMP[8]
> 44: MOV OUT[0], TEMP[2]
> 45: MOV OUT[6], TEMP[1]
> 46: MOV OUT[3], TEMP[11]
> 47: MOV_SAT OUT[1], TEMP[10]
> 48: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 10
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 11
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 16
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 17
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 18
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 19
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 20
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 21
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 22
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 23
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 24
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 25
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 26
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 27
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 28
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 29
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 30
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 31
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 48
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 49
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 50
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 51
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 65
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 66
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 67
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 191
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 192
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 193
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 194
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 195
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 196
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 197
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 198
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 199
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 200
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 201
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 202
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 203
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 204
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr float addrspace(2)* %10, i32 205
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %98 = load <16 x i8> addrspace(2)* %97, !tbaa !0
>  %99 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %98, i32 0, i32 %5)
>  %100 = extractelement <4 x float> %99, i32 0
>  %101 = extractelement <4 x float> %99, i32 1
>  %102 = extractelement <4 x float> %99, i32 2
>  %103 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %104 = load <16 x i8> addrspace(2)* %103, !tbaa !0
>  %105 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %104, i32 0, i32 %5)
>  %106 = extractelement <4 x float> %105, i32 0
>  %107 = extractelement <4 x float> %105, i32 1
>  %108 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %109 = load <16 x i8> addrspace(2)* %108, !tbaa !0
>  %110 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %109, i32 0, i32 %5)
>  %111 = extractelement <4 x float> %110, i32 0
>  %112 = extractelement <4 x float> %110, i32 1
>  %113 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %114 = load <16 x i8> addrspace(2)* %113, !tbaa !0
>  %115 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %114, i32 0, i32 %5)
>  %116 = extractelement <4 x float> %115, i32 0
>  %117 = extractelement <4 x float> %115, i32 1
>  %118 = getelementptr <16 x i8> addrspace(2)* %3, i32 4
>  %119 = load <16 x i8> addrspace(2)* %118, !tbaa !0
>  %120 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %119, i32 0, i32 %5)
>  %121 = extractelement <4 x float> %120, i32 3
>  %122 = fmul float %100, %14
>  %123 = fadd float %122, %12
>  %124 = fmul float %101, %14
>  %125 = fadd float %124, %12
>  %126 = fmul float %102, %14
>  %127 = fadd float %126, %12
>  %128 = fmul float %100, %12
>  %129 = fadd float %128, %14
>  %130 = fmul float %123, %70
>  %131 = fmul float %125, %72
>  %132 = fadd float %130, %131
>  %133 = fmul float %127, %74
>  %134 = fadd float %132, %133
>  %135 = fmul float %129, %76
>  %136 = fadd float %134, %135
>  %137 = fmul float %123, %78
>  %138 = fmul float %125, %80
>  %139 = fadd float %137, %138
>  %140 = fmul float %127, %82
>  %141 = fadd float %139, %140
>  %142 = fmul float %129, %84
>  %143 = fadd float %141, %142
>  %144 = fmul float %123, %22
>  %145 = fmul float %125, %24
>  %146 = fadd float %144, %145
>  %147 = fmul float %127, %26
>  %148 = fadd float %146, %147
>  %149 = fmul float %129, %28
>  %150 = fadd float %148, %149
>  %151 = fmul float %123, %30
>  %152 = fmul float %125, %32
>  %153 = fadd float %151, %152
>  %154 = fmul float %127, %34
>  %155 = fadd float %153, %154
>  %156 = fmul float %129, %36
>  %157 = fadd float %155, %156
>  %158 = fmul float %123, %38
>  %159 = fmul float %125, %40
>  %160 = fadd float %158, %159
>  %161 = fmul float %127, %42
>  %162 = fadd float %160, %161
>  %163 = fmul float %129, %44
>  %164 = fadd float %162, %163
>  %165 = fmul float %123, %46
>  %166 = fmul float %125, %48
>  %167 = fadd float %165, %166
>  %168 = fmul float %127, %50
>  %169 = fadd float %167, %168
>  %170 = fmul float %129, %52
>  %171 = fadd float %169, %170
>  %172 = fmul float %123, %86
>  %173 = fmul float %125, %88
>  %174 = fadd float %172, %173
>  %175 = fmul float %127, %90
>  %176 = fadd float %174, %175
>  %177 = fmul float %129, %92
>  %178 = fadd float %176, %177
>  %179 = fadd float %116, %111
>  %180 = fadd float %117, %112
>  %181 = fsub float -0.000000e+00, %178
>  %182 = fadd float %181, %20
>  %183 = fsub float -0.000000e+00, %178
>  %184 = fadd float %183, %18
>  %185 = fcmp uge float %182, %12
>  %186 = select i1 %185, float %182, float %12
>  %187 = fdiv float 1.000000e+00, %184
>  %188 = fmul float %123, %54
>  %189 = fmul float %125, %56
>  %190 = fadd float %188, %189
>  %191 = fmul float %127, %58
>  %192 = fadd float %190, %191
>  %193 = fmul float %129, %60
>  %194 = fadd float %192, %193
>  %195 = fmul float %186, %187
>  %196 = fadd float %180, %117
>  %197 = fadd float %179, %116
>  %198 = fmul float %194, %195
>  %199 = fsub float -0.000000e+00, %198
>  %200 = fmul float %199, %66
>  %201 = fadd float %200, %62
>  %202 = fadd float %197, %116
>  %203 = fadd float %196, %117
>  %204 = fcmp uge float %201, %64
>  %205 = select i1 %204, float %201, float %64
>  %206 = fcmp uge float %201, %64
>  %207 = select i1 %206, float %201, float %64
>  %208 = fcmp uge float %201, %64
>  %209 = select i1 %208, float %201, float %64
>  %210 = fmul float %106, %14
>  %211 = fmul float %107, %14
>  %212 = fmul float %106, %12
>  %213 = fmul float %106, %12
>  %214 = fmul float %68, %12
>  %215 = fadd float %214, %14
>  %216 = fmul float %68, %12
>  %217 = fadd float %216, %14
>  %218 = fmul float %68, %12
>  %219 = fadd float %218, %14
>  %220 = fmul float %68, %14
>  %221 = fadd float %220, %12
>  %222 = fsub float -0.000000e+00, %171
>  %223 = fmul float %164, %16
>  %224 = fadd float %223, %222
>  %225 = fsub float -0.000000e+00, %157
>  %226 = fmul float %94, %171
>  %227 = fadd float %226, %150
>  %228 = fmul float %96, %171
>  %229 = fadd float %228, %225
>  %230 = call float @llvm.AMDIL.clamp.(float %121, float 0.000000e+00, float 1.000000e+00)
>  %231 = call float @llvm.AMDIL.clamp.(float %205, float 0.000000e+00, float 1.000000e+00)
>  %232 = call float @llvm.AMDIL.clamp.(float %207, float 0.000000e+00, float 1.000000e+00)
>  %233 = call float @llvm.AMDIL.clamp.(float %209, float 0.000000e+00, float 1.000000e+00)
>  %234 = call float @llvm.AMDIL.clamp.(float %215, float 0.000000e+00, float 1.000000e+00)
>  %235 = call float @llvm.AMDIL.clamp.(float %217, float 0.000000e+00, float 1.000000e+00)
>  %236 = call float @llvm.AMDIL.clamp.(float %219, float 0.000000e+00, float 1.000000e+00)
>  %237 = call float @llvm.AMDIL.clamp.(float %221, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %234, float %235, float %236, float %237)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %230, float %231, float %232, float %233)
>  %238 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %239 = load float addrspace(2)* addrspace(2)* %238, !tbaa !0
>  %240 = getelementptr float addrspace(2)* %239, i32 0
>  %241 = load float addrspace(2)* %240, !tbaa !0
>  %242 = fmul float %241, %150
>  %243 = getelementptr float addrspace(2)* %239, i32 1
>  %244 = load float addrspace(2)* %243, !tbaa !0
>  %245 = fmul float %244, %157
>  %246 = fadd float %242, %245
>  %247 = getelementptr float addrspace(2)* %239, i32 2
>  %248 = load float addrspace(2)* %247, !tbaa !0
>  %249 = fmul float %248, %164
>  %250 = fadd float %246, %249
>  %251 = getelementptr float addrspace(2)* %239, i32 3
>  %252 = load float addrspace(2)* %251, !tbaa !0
>  %253 = fmul float %252, %171
>  %254 = fadd float %250, %253
>  %255 = getelementptr float addrspace(2)* %239, i32 4
>  %256 = load float addrspace(2)* %255, !tbaa !0
>  %257 = fmul float %256, %150
>  %258 = getelementptr float addrspace(2)* %239, i32 5
>  %259 = load float addrspace(2)* %258, !tbaa !0
>  %260 = fmul float %259, %157
>  %261 = fadd float %257, %260
>  %262 = getelementptr float addrspace(2)* %239, i32 6
>  %263 = load float addrspace(2)* %262, !tbaa !0
>  %264 = fmul float %263, %164
>  %265 = fadd float %261, %264
>  %266 = getelementptr float addrspace(2)* %239, i32 7
>  %267 = load float addrspace(2)* %266, !tbaa !0
>  %268 = fmul float %267, %171
>  %269 = fadd float %265, %268
>  %270 = getelementptr float addrspace(2)* %239, i32 8
>  %271 = load float addrspace(2)* %270, !tbaa !0
>  %272 = fmul float %271, %150
>  %273 = getelementptr float addrspace(2)* %239, i32 9
>  %274 = load float addrspace(2)* %273, !tbaa !0
>  %275 = fmul float %274, %157
>  %276 = fadd float %272, %275
>  %277 = getelementptr float addrspace(2)* %239, i32 10
>  %278 = load float addrspace(2)* %277, !tbaa !0
>  %279 = fmul float %278, %164
>  %280 = fadd float %276, %279
>  %281 = getelementptr float addrspace(2)* %239, i32 11
>  %282 = load float addrspace(2)* %281, !tbaa !0
>  %283 = fmul float %282, %171
>  %284 = fadd float %280, %283
>  %285 = getelementptr float addrspace(2)* %239, i32 12
>  %286 = load float addrspace(2)* %285, !tbaa !0
>  %287 = fmul float %286, %150
>  %288 = getelementptr float addrspace(2)* %239, i32 13
>  %289 = load float addrspace(2)* %288, !tbaa !0
>  %290 = fmul float %289, %157
>  %291 = fadd float %287, %290
>  %292 = getelementptr float addrspace(2)* %239, i32 14
>  %293 = load float addrspace(2)* %292, !tbaa !0
>  %294 = fmul float %293, %164
>  %295 = fadd float %291, %294
>  %296 = getelementptr float addrspace(2)* %239, i32 15
>  %297 = load float addrspace(2)* %296, !tbaa !0
>  %298 = fmul float %297, %171
>  %299 = fadd float %295, %298
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %254, float %269, float %284, float %299)
>  %300 = getelementptr float addrspace(2)* %239, i32 16
>  %301 = load float addrspace(2)* %300, !tbaa !0
>  %302 = fmul float %301, %150
>  %303 = getelementptr float addrspace(2)* %239, i32 17
>  %304 = load float addrspace(2)* %303, !tbaa !0
>  %305 = fmul float %304, %157
>  %306 = fadd float %302, %305
>  %307 = getelementptr float addrspace(2)* %239, i32 18
>  %308 = load float addrspace(2)* %307, !tbaa !0
>  %309 = fmul float %308, %164
>  %310 = fadd float %306, %309
>  %311 = getelementptr float addrspace(2)* %239, i32 19
>  %312 = load float addrspace(2)* %311, !tbaa !0
>  %313 = fmul float %312, %171
>  %314 = fadd float %310, %313
>  %315 = getelementptr float addrspace(2)* %239, i32 20
>  %316 = load float addrspace(2)* %315, !tbaa !0
>  %317 = fmul float %316, %150
>  %318 = getelementptr float addrspace(2)* %239, i32 21
>  %319 = load float addrspace(2)* %318, !tbaa !0
>  %320 = fmul float %319, %157
>  %321 = fadd float %317, %320
>  %322 = getelementptr float addrspace(2)* %239, i32 22
>  %323 = load float addrspace(2)* %322, !tbaa !0
>  %324 = fmul float %323, %164
>  %325 = fadd float %321, %324
>  %326 = getelementptr float addrspace(2)* %239, i32 23
>  %327 = load float addrspace(2)* %326, !tbaa !0
>  %328 = fmul float %327, %171
>  %329 = fadd float %325, %328
>  %330 = getelementptr float addrspace(2)* %239, i32 24
>  %331 = load float addrspace(2)* %330, !tbaa !0
>  %332 = fmul float %331, %150
>  %333 = getelementptr float addrspace(2)* %239, i32 25
>  %334 = load float addrspace(2)* %333, !tbaa !0
>  %335 = fmul float %334, %157
>  %336 = fadd float %332, %335
>  %337 = getelementptr float addrspace(2)* %239, i32 26
>  %338 = load float addrspace(2)* %337, !tbaa !0
>  %339 = fmul float %338, %164
>  %340 = fadd float %336, %339
>  %341 = getelementptr float addrspace(2)* %239, i32 27
>  %342 = load float addrspace(2)* %341, !tbaa !0
>  %343 = fmul float %342, %171
>  %344 = fadd float %340, %343
>  %345 = getelementptr float addrspace(2)* %239, i32 28
>  %346 = load float addrspace(2)* %345, !tbaa !0
>  %347 = fmul float %346, %150
>  %348 = getelementptr float addrspace(2)* %239, i32 29
>  %349 = load float addrspace(2)* %348, !tbaa !0
>  %350 = fmul float %349, %157
>  %351 = fadd float %347, %350
>  %352 = getelementptr float addrspace(2)* %239, i32 30
>  %353 = load float addrspace(2)* %352, !tbaa !0
>  %354 = fmul float %353, %164
>  %355 = fadd float %351, %354
>  %356 = getelementptr float addrspace(2)* %239, i32 31
>  %357 = load float addrspace(2)* %356, !tbaa !0
>  %358 = fmul float %357, %171
>  %359 = fadd float %355, %358
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %314, float %329, float %344, float %359)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %106, float %107, float %178, float %194)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %210, float %211, float %212, float %213)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %136, float %143, float %178, float %194)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 37, i32 0, float %179, float %180, float %196, float %197)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 38, i32 0, float %202, float %203, float %106, float %107)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %227, float %229, float %224, float %171)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0410100
>bf8c007f
>c00403bf
>c0020300
>bf8c007f
>7e0c0204
>c0028301
>bf8c007f
>7e080205
>d2820001
>041a0808
>d2060801
>02010101
>d2820002
>04120c08
>d2060802
>02010102
>f800020f
>01020202
>c0840700
>bf8c000f
>e00c2000
>80020700
>bf8c0770
>d2820001
>04180b07
>d2820002
>04180b08
>c00403c9
>bf8c007f
>10060408
>c00403c8
>bf8c007f
>d2820005
>040c1101
>d2820003
>04180b09
>c00403ca
>bf8c007f
>d2820005
>04141103
>d2820004
>04100907
>c00403cb
>bf8c007f
>d2820005
>04141104
>c004030b
>bf8c007f
>080e0a08
>d00c0008
>02000907
>d2000006
>00220f06
>c004030a
>bf8c007f
>080e0a08
>7e0e5507
>100e0f06
>c0040331
>bf8c007f
>100c0408
>c0040330
>bf8c007f
>d2820006
>04181101
>c0040332
>bf8c007f
>d2820006
>04181103
>c0040333
>bf8c007f
>d2820006
>04181104
>100e0f06
>c0040343
>bf8c007f
>100e0e08
>c0040341
>bf8c007f
>080e0e08
>c0040342
>bf8c007f
>d00c000a
>02001107
>7e100208
>d2000007
>002a0f08
>d2060807
>02010107
>c0840710
>bf8c007f
>e00c2000
>80020800
>bf8c0770
>d2060808
>0201010b
>f800021f
>07070708
>c0040311
>bf8c000f
>100e0408
>c0040310
>bf8c007f
>d2820007
>041c1101
>c0040312
>bf8c007f
>d2820007
>041c1103
>c0040313
>bf8c007f
>d2820007
>041c1104
>c0040315
>bf8c007f
>10100408
>c0040314
>bf8c007f
>d2820008
>04201101
>c0040316
>bf8c007f
>d2820008
>04201103
>c0040317
>bf8c007f
>d2820008
>04201104
>c0400102
>bf8c007f
>c004010d
>bf8c007f
>10121008
>c004010c
>bf8c007f
>d282000a
>04260e08
>c0040319
>bf8c007f
>10120408
>c0040318
>bf8c007f
>d2820009
>04241101
>c004031a
>bf8c007f
>d2820009
>04241103
>c004031b
>bf8c007f
>d2820009
>04241104
>c004010e
>bf8c007f
>d282000b
>042a1208
>c004031d
>bf8c007f
>10140408
>c004031c
>bf8c007f
>d282000a
>04281101
>c004031e
>bf8c007f
>d282000a
>04281103
>c004031f
>bf8c007f
>d282000a
>04281104
>c004010f
>bf8c007f
>d282000b
>042e1408
>c0040109
>bf8c007f
>10181008
>c0040108
>bf8c007f
>d282000c
>04320e08
>c004010a
>bf8c007f
>d282000c
>04321208
>c004010b
>bf8c007f
>d282000c
>04321408
>c0040105
>bf8c007f
>101a1008
>c0040104
>bf8c007f
>d282000d
>04360e08
>c0040106
>bf8c007f
>d282000d
>04361208
>c0040107
>bf8c007f
>d282000d
>04361408
>c0040101
>bf8c007f
>101c1008
>c0040100
>bf8c007f
>d282000e
>043a0e08
>c0040102
>bf8c007f
>d282000e
>043a1208
>c0040103
>bf8c007f
>d282000e
>043a1408
>f80000ef
>0b0c0d0e
>c004011d
>bf8c000f
>10161008
>c004011c
>bf8c007f
>d282000b
>042e0e08
>c004011e
>bf8c007f
>d282000b
>042e1208
>c004011f
>bf8c007f
>d282000b
>042e1408
>c0040119
>bf8c007f
>10181008
>c0040118
>bf8c007f
>d282000c
>04320e08
>c004011a
>bf8c007f
>d282000c
>04321208
>c004011b
>bf8c007f
>d282000c
>04321408
>c0040115
>bf8c007f
>101a1008
>c0040114
>bf8c007f
>d282000d
>04360e08
>c0040116
>bf8c007f
>d282000d
>04361208
>c0040117
>bf8c007f
>d282000d
>04361408
>c0040111
>bf8c007f
>101c1008
>c0040110
>bf8c007f
>d282000e
>043a0e08
>c0040112
>bf8c007f
>d282000e
>043a1208
>c0000113
>bf8c007f
>d282000e
>043a1400
>f80000ff
>0b0c0d0e
>c0840704
>bf8c000f
>e00c2000
>80020b00
>bf8c0770
>f800022f
>06050c0b
>101e1604
>10201805
>10221605
>f800023f
>0f0f1011
>c00003c5
>bf8c000f
>101e0400
>c00003c4
>bf8c007f
>d282000f
>043c0101
>c00003c6
>bf8c007f
>d282000f
>043c0103
>c00003c7
>bf8c007f
>d282000f
>043c0104
>c00003c1
>bf8c007f
>10040400
>c00003c0
>bf8c007f
>d2820001
>04080101
>c00003c2
>bf8c007f
>d2820001
>04040103
>c00003c3
>bf8c007f
>d2820001
>04040104
>f800024f
>06050f01
>c0840708
>bf8c000f
>e00c2000
>80020f00
>c082070c
>bf8c0070
>e00c2000
>80010000
>bf8c0770
>060a1f00
>06080105
>060c2101
>061e0306
>f800025f
>040f0605
>bf8c070f
>060a030f
>06000104
>f800026f
>0c0b0500
>c00003cc
>bf8c000f
>d2820000
>041e1400
>c0000302
>bf8c007f
>10021200
>08021501
>c00003cd
>bf8c007f
>10041400
>08041102
>f80008cf
>0a010200
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], COLOR[1], COLOR
>DCL IN[2], GENERIC[19], PERSPECTIVE
>DCL IN[3], GENERIC[20], PERSPECTIVE
>DCL IN[4], GENERIC[21], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL CONST[0..30]
>DCL TEMP[0..5], LOCAL
>DCL TEMP[6], ARRAY(1), LOCAL
>  0: MOV TEMP[0].xy, IN[2].xyyy
>  1: TEX TEMP[0].xyz, TEMP[0], SAMP[0], 2D
>  2: MOV TEMP[1].xy, IN[4].xyyy
>  3: TEX TEMP[1].xyz, TEMP[1], SAMP[1], 2D
>  4: ADD TEMP[2].x, -IN[3].zzzz, CONST[10].zzzz
>  5: RCP TEMP[2].x, TEMP[2].xxxx
>  6: MOV TEMP[3].xy, IN[2].xyyy
>  7: TEX TEMP[4].xyz, TEMP[3], SAMP[2], 2D
>  8: ADD TEMP[4].xyz, TEMP[4].xyzz, -TEMP[0].xyzz
>  9: MAD TEMP[4].xyz, IN[1].xxxx, TEMP[4].xyzz, TEMP[0].xyzz
> 10: ADD TEMP[5].x, -IN[3].zzzz, CONST[11].yyyy
> 11: MUL TEMP[3].xyz, TEMP[4].xyzz, IN[0].xyzz
> 12: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[5].xxxx
> 13: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 14: MUL TEMP[0].xyz, TEMP[1].xyzz, CONST[12].xyzz
> 15: MUL TEMP[1].x, TEMP[2].xxxx, IN[3].wwww
> 16: MUL TEMP[0].xyz, TEMP[3].xyzz, TEMP[0].xyzz
> 17: MUL TEMP[1].x, TEMP[1].xxxx, CONST[11].wwww
> 18: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 19: MOV TEMP[0].w, TEMP[1].xxxx
> 20: MAD TEMP[3].xyz, TEMP[0].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 21: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 22: MUL TEMP[3].xyz, TEMP[3].xyzz, TEMP[1].xxxx
> 23: MAD TEMP[0].xyz, TEMP[0].xyzz, CONST[30].xxxx, TEMP[3].xyzz
> 24: MOV TEMP[6], TEMP[0]
> 25: MOV OUT[0], TEMP[6]
> 26: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 42
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 45
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 47
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 48
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 49
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 50
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 116
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 117
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 118
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 120
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %43 = load <32 x i8> addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %45 = load <16 x i8> addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %47 = load <32 x i8> addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %49 = load <16 x i8> addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr <32 x i8> addrspace(2)* %2, i32 2
>  %51 = load <32 x i8> addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr <16 x i8> addrspace(2)* %1, i32 2
>  %53 = load <16 x i8> addrspace(2)* %52, !tbaa !0
>  %54 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %55 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %56 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %57 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %58 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %59 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %60 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %3, <2 x i32> %5)
>  %61 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %3, <2 x i32> %5)
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %3, <2 x i32> %6)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %3, <2 x i32> %6)
>  %64 = bitcast float %58 to i32
>  %65 = bitcast float %59 to i32
>  %66 = insertelement <2 x i32> undef, i32 %64, i32 0
>  %67 = insertelement <2 x i32> %66, i32 %65, i32 1
>  %68 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %67, <32 x i8> %43, <16 x i8> %45, i32 2)
>  %69 = extractelement <4 x float> %68, i32 0
>  %70 = extractelement <4 x float> %68, i32 1
>  %71 = extractelement <4 x float> %68, i32 2
>  %72 = bitcast float %62 to i32
>  %73 = bitcast float %63 to i32
>  %74 = insertelement <2 x i32> undef, i32 %72, i32 0
>  %75 = insertelement <2 x i32> %74, i32 %73, i32 1
>  %76 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %75, <32 x i8> %47, <16 x i8> %49, i32 2)
>  %77 = extractelement <4 x float> %76, i32 0
>  %78 = extractelement <4 x float> %76, i32 1
>  %79 = extractelement <4 x float> %76, i32 2
>  %80 = fsub float -0.000000e+00, %60
>  %81 = fadd float %80, %23
>  %82 = fdiv float 1.000000e+00, %81
>  %83 = bitcast float %58 to i32
>  %84 = bitcast float %59 to i32
>  %85 = insertelement <2 x i32> undef, i32 %83, i32 0
>  %86 = insertelement <2 x i32> %85, i32 %84, i32 1
>  %87 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %86, <32 x i8> %51, <16 x i8> %53, i32 2)
>  %88 = extractelement <4 x float> %87, i32 0
>  %89 = extractelement <4 x float> %87, i32 1
>  %90 = extractelement <4 x float> %87, i32 2
>  %91 = fsub float -0.000000e+00, %69
>  %92 = fadd float %88, %91
>  %93 = fsub float -0.000000e+00, %70
>  %94 = fadd float %89, %93
>  %95 = fsub float -0.000000e+00, %71
>  %96 = fadd float %90, %95
>  %97 = fmul float %57, %92
>  %98 = fadd float %97, %69
>  %99 = fmul float %57, %94
>  %100 = fadd float %99, %70
>  %101 = fmul float %57, %96
>  %102 = fadd float %101, %71
>  %103 = fsub float -0.000000e+00, %60
>  %104 = fadd float %103, %25
>  %105 = fmul float %98, %54
>  %106 = fmul float %100, %55
>  %107 = fmul float %102, %56
>  %108 = fmul float %82, %104
>  %109 = call float @llvm.AMDIL.clamp.(float %108, float 0.000000e+00, float 1.000000e+00)
>  %110 = fmul float %77, %29
>  %111 = fmul float %78, %31
>  %112 = fmul float %79, %33
>  %113 = fmul float %109, %61
>  %114 = fmul float %105, %110
>  %115 = fmul float %106, %111
>  %116 = fmul float %107, %112
>  %117 = fmul float %113, %27
>  %118 = call float @llvm.AMDIL.clamp.(float %117, float 0.000000e+00, float 1.000000e+00)
>  %119 = fsub float -0.000000e+00, %41
>  %120 = fmul float %114, %119
>  %121 = fadd float %120, %35
>  %122 = fsub float -0.000000e+00, %41
>  %123 = fmul float %115, %122
>  %124 = fadd float %123, %37
>  %125 = fsub float -0.000000e+00, %41
>  %126 = fmul float %116, %125
>  %127 = fadd float %126, %39
>  %128 = call float @llvm.AMDIL.clamp.(float %118, float 0.000000e+00, float 1.000000e+00)
>  %129 = fmul float %121, %128
>  %130 = fmul float %124, %128
>  %131 = fmul float %127, %128
>  %132 = fmul float %114, %41
>  %133 = fadd float %132, %129
>  %134 = fmul float %115, %41
>  %135 = fadd float %134, %130
>  %136 = fmul float %116, %41
>  %137 = fadd float %136, %131
>  %138 = call i32 @llvm.SI.packf16(float %133, float %135)
>  %139 = bitcast i32 %138 to float
>  %140 = call i32 @llvm.SI.packf16(float %137, float %118)
>  %141 = bitcast i32 %140 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %139, float %141, float %139, float %141)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8200900
>c8210901
>c81c0800
>c81d0801
>c0840300
>c0c60500
>bf8c007f
>f0800700
>00430407
>c0840308
>c0c60510
>bf8c0070
>f0800700
>00430707
>bf8c0770
>08160b08
>c8280400
>c8290401
>d282000b
>0416170a
>c8300100
>c8310101
>101c190b
>c8301102
>c8311103
>c82c1002
>c82d1003
>c0840304
>c0c60508
>bf8c007f
>f0800700
>00430b0b
>c0400100
>bf8c0070
>c0010131
>bf8c007f
>10041802
>101c050e
>c0010178
>bf8c007f
>10041c02
>c0018175
>bf8c007f
>081e0403
>c8080e00
>c8090e01
>c001812d
>bf8c007f
>08060403
>c001812a
>bf8c007f
>08040403
>7e045502
>10040702
>d2060802
>02010102
>c80c0f00
>c80d0f01
>10040702
>c001812f
>bf8c007f
>10040403
>d2060802
>02010102
>d2060803
>02010102
>101e070f
>d282000e
>043c050e
>081e0907
>d282000f
>04121f0a
>c8400000
>c8410001
>101e210f
>c0018130
>bf8c007f
>10201603
>101e210f
>10201e02
>c0018174
>bf8c007f
>08202003
>10200710
>d282000f
>0440050f
>5e1c1d0f
>080e0d09
>d2820004
>041a0f0a
>c8140200
>c8150201
>10000b04
>c0018132
>bf8c007f
>10021a03
>10000300
>10020002
>c0000176
>bf8c007f
>08020200
>10020701
>d2820000
>04040500
>5e000500
>f8001c0f
>000e000e
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], COLOR[1]
>DCL OUT[3], CLIPVERTEX
>DCL OUT[4], GENERIC[19]
>DCL OUT[5], GENERIC[20]
>DCL OUT[6], GENERIC[21]
>DCL CONST[0..51]
>DCL TEMP[0..9], LOCAL
>  0: MAD TEMP[0], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  1: DP4 TEMP[1].x, TEMP[0], CONST[48]
>  2: DP4 TEMP[2].x, TEMP[0], CONST[49]
>  3: MOV TEMP[1].y, TEMP[2].xxxx
>  4: DP4 TEMP[2].x, TEMP[0], CONST[4]
>  5: DP4 TEMP[3].x, TEMP[0], CONST[50]
>  6: MOV TEMP[4].z, TEMP[3].xxxx
>  7: DP4 TEMP[5].x, TEMP[0], CONST[5]
>  8: MOV TEMP[2].y, TEMP[5].xxxx
>  9: ADD TEMP[4].xy, -TEMP[3].xxxx, CONST[2].wzzz
> 10: MAX TEMP[3].x, TEMP[4].xxxx, CONST[0].xxxx
> 11: RCP TEMP[6].x, TEMP[4].yyyy
> 12: DP4 TEMP[7].x, TEMP[0], CONST[12]
> 13: MOV TEMP[4].w, TEMP[7].xxxx
> 14: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[6].xxxx
> 15: DP4 TEMP[6].x, TEMP[0], CONST[6]
> 16: MOV TEMP[2].z, TEMP[6].xxxx
> 17: MUL TEMP[3].x, TEMP[7].xxxx, TEMP[3].xxxx
> 18: DP4 TEMP[0].x, TEMP[0], CONST[7]
> 19: MOV TEMP[2].w, TEMP[0].xxxx
> 20: MAD TEMP[3].x, -TEMP[3].xxxx, CONST[16].wwww, CONST[16].yyyy
> 21: MOV TEMP[1].zw, TEMP[4].wwzw
> 22: MAX TEMP[3].xyz, TEMP[3].xxxx, CONST[16].zzzz
> 23: MOV TEMP[3].yzw, TEMP[3].yxyz
> 24: MOV TEMP[4].xy, IN[1].xyxx
> 25: MUL TEMP[7], IN[2].xyxx, CONST[0].yyxx
> 26: MAD TEMP[8], CONST[47].wwww, CONST[0].xxxy, CONST[0].yyyx
> 27: MOV TEMP[3].x, IN[3].wwww
> 28: MOV TEMP[9], TEMP[2]
> 29: MAD TEMP[6].x, TEMP[6].xxxx, CONST[0].zzzz, -TEMP[0].xxxx
> 30: MOV TEMP[2].z, TEMP[6].xxxx
> 31: MOV TEMP[2].y, -TEMP[5].xxxx
> 32: MAD TEMP[2].xy, CONST[51].xyyy, TEMP[0].xxxx, TEMP[2].xyyy
> 33: MOV_SAT OUT[2], TEMP[3]
> 34: MOV OUT[4], TEMP[4]
> 35: MOV OUT[6], TEMP[7]
> 36: MOV OUT[0], TEMP[2]
> 37: MOV OUT[5], TEMP[1]
> 38: MOV OUT[3], TEMP[9]
> 39: MOV_SAT OUT[1], TEMP[8]
> 40: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 10
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 11
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 16
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 17
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 18
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 19
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 20
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 21
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 22
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 23
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 24
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 25
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 26
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 27
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 28
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 29
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 30
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 31
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 48
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 49
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 50
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 51
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 65
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 66
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 67
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 191
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 192
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 193
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 194
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 195
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 196
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 197
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 198
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 199
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 200
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 201
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 202
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 203
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 204
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr float addrspace(2)* %10, i32 205
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %98 = load <16 x i8> addrspace(2)* %97, !tbaa !0
>  %99 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %98, i32 0, i32 %5)
>  %100 = extractelement <4 x float> %99, i32 0
>  %101 = extractelement <4 x float> %99, i32 1
>  %102 = extractelement <4 x float> %99, i32 2
>  %103 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %104 = load <16 x i8> addrspace(2)* %103, !tbaa !0
>  %105 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %104, i32 0, i32 %5)
>  %106 = extractelement <4 x float> %105, i32 0
>  %107 = extractelement <4 x float> %105, i32 1
>  %108 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %109 = load <16 x i8> addrspace(2)* %108, !tbaa !0
>  %110 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %109, i32 0, i32 %5)
>  %111 = extractelement <4 x float> %110, i32 0
>  %112 = extractelement <4 x float> %110, i32 1
>  %113 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %114 = load <16 x i8> addrspace(2)* %113, !tbaa !0
>  %115 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %114, i32 0, i32 %5)
>  %116 = extractelement <4 x float> %115, i32 3
>  %117 = fmul float %100, %14
>  %118 = fadd float %117, %12
>  %119 = fmul float %101, %14
>  %120 = fadd float %119, %12
>  %121 = fmul float %102, %14
>  %122 = fadd float %121, %12
>  %123 = fmul float %100, %12
>  %124 = fadd float %123, %14
>  %125 = fmul float %118, %70
>  %126 = fmul float %120, %72
>  %127 = fadd float %125, %126
>  %128 = fmul float %122, %74
>  %129 = fadd float %127, %128
>  %130 = fmul float %124, %76
>  %131 = fadd float %129, %130
>  %132 = fmul float %118, %78
>  %133 = fmul float %120, %80
>  %134 = fadd float %132, %133
>  %135 = fmul float %122, %82
>  %136 = fadd float %134, %135
>  %137 = fmul float %124, %84
>  %138 = fadd float %136, %137
>  %139 = fmul float %118, %22
>  %140 = fmul float %120, %24
>  %141 = fadd float %139, %140
>  %142 = fmul float %122, %26
>  %143 = fadd float %141, %142
>  %144 = fmul float %124, %28
>  %145 = fadd float %143, %144
>  %146 = fmul float %118, %86
>  %147 = fmul float %120, %88
>  %148 = fadd float %146, %147
>  %149 = fmul float %122, %90
>  %150 = fadd float %148, %149
>  %151 = fmul float %124, %92
>  %152 = fadd float %150, %151
>  %153 = fmul float %118, %30
>  %154 = fmul float %120, %32
>  %155 = fadd float %153, %154
>  %156 = fmul float %122, %34
>  %157 = fadd float %155, %156
>  %158 = fmul float %124, %36
>  %159 = fadd float %157, %158
>  %160 = fsub float -0.000000e+00, %152
>  %161 = fadd float %160, %20
>  %162 = fsub float -0.000000e+00, %152
>  %163 = fadd float %162, %18
>  %164 = fcmp uge float %161, %12
>  %165 = select i1 %164, float %161, float %12
>  %166 = fdiv float 1.000000e+00, %163
>  %167 = fmul float %118, %54
>  %168 = fmul float %120, %56
>  %169 = fadd float %167, %168
>  %170 = fmul float %122, %58
>  %171 = fadd float %169, %170
>  %172 = fmul float %124, %60
>  %173 = fadd float %171, %172
>  %174 = fmul float %165, %166
>  %175 = fmul float %118, %38
>  %176 = fmul float %120, %40
>  %177 = fadd float %175, %176
>  %178 = fmul float %122, %42
>  %179 = fadd float %177, %178
>  %180 = fmul float %124, %44
>  %181 = fadd float %179, %180
>  %182 = fmul float %173, %174
>  %183 = fmul float %118, %46
>  %184 = fmul float %120, %48
>  %185 = fadd float %183, %184
>  %186 = fmul float %122, %50
>  %187 = fadd float %185, %186
>  %188 = fmul float %124, %52
>  %189 = fadd float %187, %188
>  %190 = fsub float -0.000000e+00, %182
>  %191 = fmul float %190, %66
>  %192 = fadd float %191, %62
>  %193 = fcmp uge float %192, %64
>  %194 = select i1 %193, float %192, float %64
>  %195 = fcmp uge float %192, %64
>  %196 = select i1 %195, float %192, float %64
>  %197 = fcmp uge float %192, %64
>  %198 = select i1 %197, float %192, float %64
>  %199 = fmul float %111, %14
>  %200 = fmul float %112, %14
>  %201 = fmul float %111, %12
>  %202 = fmul float %111, %12
>  %203 = fmul float %68, %12
>  %204 = fadd float %203, %14
>  %205 = fmul float %68, %12
>  %206 = fadd float %205, %14
>  %207 = fmul float %68, %12
>  %208 = fadd float %207, %14
>  %209 = fmul float %68, %14
>  %210 = fadd float %209, %12
>  %211 = fsub float -0.000000e+00, %189
>  %212 = fmul float %181, %16
>  %213 = fadd float %212, %211
>  %214 = fsub float -0.000000e+00, %159
>  %215 = fmul float %94, %189
>  %216 = fadd float %215, %145
>  %217 = fmul float %96, %189
>  %218 = fadd float %217, %214
>  %219 = call float @llvm.AMDIL.clamp.(float %116, float 0.000000e+00, float 1.000000e+00)
>  %220 = call float @llvm.AMDIL.clamp.(float %194, float 0.000000e+00, float 1.000000e+00)
>  %221 = call float @llvm.AMDIL.clamp.(float %196, float 0.000000e+00, float 1.000000e+00)
>  %222 = call float @llvm.AMDIL.clamp.(float %198, float 0.000000e+00, float 1.000000e+00)
>  %223 = call float @llvm.AMDIL.clamp.(float %204, float 0.000000e+00, float 1.000000e+00)
>  %224 = call float @llvm.AMDIL.clamp.(float %206, float 0.000000e+00, float 1.000000e+00)
>  %225 = call float @llvm.AMDIL.clamp.(float %208, float 0.000000e+00, float 1.000000e+00)
>  %226 = call float @llvm.AMDIL.clamp.(float %210, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %223, float %224, float %225, float %226)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %219, float %220, float %221, float %222)
>  %227 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %228 = load float addrspace(2)* addrspace(2)* %227, !tbaa !0
>  %229 = getelementptr float addrspace(2)* %228, i32 0
>  %230 = load float addrspace(2)* %229, !tbaa !0
>  %231 = fmul float %230, %145
>  %232 = getelementptr float addrspace(2)* %228, i32 1
>  %233 = load float addrspace(2)* %232, !tbaa !0
>  %234 = fmul float %233, %159
>  %235 = fadd float %231, %234
>  %236 = getelementptr float addrspace(2)* %228, i32 2
>  %237 = load float addrspace(2)* %236, !tbaa !0
>  %238 = fmul float %237, %181
>  %239 = fadd float %235, %238
>  %240 = getelementptr float addrspace(2)* %228, i32 3
>  %241 = load float addrspace(2)* %240, !tbaa !0
>  %242 = fmul float %241, %189
>  %243 = fadd float %239, %242
>  %244 = getelementptr float addrspace(2)* %228, i32 4
>  %245 = load float addrspace(2)* %244, !tbaa !0
>  %246 = fmul float %245, %145
>  %247 = getelementptr float addrspace(2)* %228, i32 5
>  %248 = load float addrspace(2)* %247, !tbaa !0
>  %249 = fmul float %248, %159
>  %250 = fadd float %246, %249
>  %251 = getelementptr float addrspace(2)* %228, i32 6
>  %252 = load float addrspace(2)* %251, !tbaa !0
>  %253 = fmul float %252, %181
>  %254 = fadd float %250, %253
>  %255 = getelementptr float addrspace(2)* %228, i32 7
>  %256 = load float addrspace(2)* %255, !tbaa !0
>  %257 = fmul float %256, %189
>  %258 = fadd float %254, %257
>  %259 = getelementptr float addrspace(2)* %228, i32 8
>  %260 = load float addrspace(2)* %259, !tbaa !0
>  %261 = fmul float %260, %145
>  %262 = getelementptr float addrspace(2)* %228, i32 9
>  %263 = load float addrspace(2)* %262, !tbaa !0
>  %264 = fmul float %263, %159
>  %265 = fadd float %261, %264
>  %266 = getelementptr float addrspace(2)* %228, i32 10
>  %267 = load float addrspace(2)* %266, !tbaa !0
>  %268 = fmul float %267, %181
>  %269 = fadd float %265, %268
>  %270 = getelementptr float addrspace(2)* %228, i32 11
>  %271 = load float addrspace(2)* %270, !tbaa !0
>  %272 = fmul float %271, %189
>  %273 = fadd float %269, %272
>  %274 = getelementptr float addrspace(2)* %228, i32 12
>  %275 = load float addrspace(2)* %274, !tbaa !0
>  %276 = fmul float %275, %145
>  %277 = getelementptr float addrspace(2)* %228, i32 13
>  %278 = load float addrspace(2)* %277, !tbaa !0
>  %279 = fmul float %278, %159
>  %280 = fadd float %276, %279
>  %281 = getelementptr float addrspace(2)* %228, i32 14
>  %282 = load float addrspace(2)* %281, !tbaa !0
>  %283 = fmul float %282, %181
>  %284 = fadd float %280, %283
>  %285 = getelementptr float addrspace(2)* %228, i32 15
>  %286 = load float addrspace(2)* %285, !tbaa !0
>  %287 = fmul float %286, %189
>  %288 = fadd float %284, %287
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %243, float %258, float %273, float %288)
>  %289 = getelementptr float addrspace(2)* %228, i32 16
>  %290 = load float addrspace(2)* %289, !tbaa !0
>  %291 = fmul float %290, %145
>  %292 = getelementptr float addrspace(2)* %228, i32 17
>  %293 = load float addrspace(2)* %292, !tbaa !0
>  %294 = fmul float %293, %159
>  %295 = fadd float %291, %294
>  %296 = getelementptr float addrspace(2)* %228, i32 18
>  %297 = load float addrspace(2)* %296, !tbaa !0
>  %298 = fmul float %297, %181
>  %299 = fadd float %295, %298
>  %300 = getelementptr float addrspace(2)* %228, i32 19
>  %301 = load float addrspace(2)* %300, !tbaa !0
>  %302 = fmul float %301, %189
>  %303 = fadd float %299, %302
>  %304 = getelementptr float addrspace(2)* %228, i32 20
>  %305 = load float addrspace(2)* %304, !tbaa !0
>  %306 = fmul float %305, %145
>  %307 = getelementptr float addrspace(2)* %228, i32 21
>  %308 = load float addrspace(2)* %307, !tbaa !0
>  %309 = fmul float %308, %159
>  %310 = fadd float %306, %309
>  %311 = getelementptr float addrspace(2)* %228, i32 22
>  %312 = load float addrspace(2)* %311, !tbaa !0
>  %313 = fmul float %312, %181
>  %314 = fadd float %310, %313
>  %315 = getelementptr float addrspace(2)* %228, i32 23
>  %316 = load float addrspace(2)* %315, !tbaa !0
>  %317 = fmul float %316, %189
>  %318 = fadd float %314, %317
>  %319 = getelementptr float addrspace(2)* %228, i32 24
>  %320 = load float addrspace(2)* %319, !tbaa !0
>  %321 = fmul float %320, %145
>  %322 = getelementptr float addrspace(2)* %228, i32 25
>  %323 = load float addrspace(2)* %322, !tbaa !0
>  %324 = fmul float %323, %159
>  %325 = fadd float %321, %324
>  %326 = getelementptr float addrspace(2)* %228, i32 26
>  %327 = load float addrspace(2)* %326, !tbaa !0
>  %328 = fmul float %327, %181
>  %329 = fadd float %325, %328
>  %330 = getelementptr float addrspace(2)* %228, i32 27
>  %331 = load float addrspace(2)* %330, !tbaa !0
>  %332 = fmul float %331, %189
>  %333 = fadd float %329, %332
>  %334 = getelementptr float addrspace(2)* %228, i32 28
>  %335 = load float addrspace(2)* %334, !tbaa !0
>  %336 = fmul float %335, %145
>  %337 = getelementptr float addrspace(2)* %228, i32 29
>  %338 = load float addrspace(2)* %337, !tbaa !0
>  %339 = fmul float %338, %159
>  %340 = fadd float %336, %339
>  %341 = getelementptr float addrspace(2)* %228, i32 30
>  %342 = load float addrspace(2)* %341, !tbaa !0
>  %343 = fmul float %342, %181
>  %344 = fadd float %340, %343
>  %345 = getelementptr float addrspace(2)* %228, i32 31
>  %346 = load float addrspace(2)* %345, !tbaa !0
>  %347 = fmul float %346, %189
>  %348 = fadd float %344, %347
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %303, float %318, float %333, float %348)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %106, float %107, float %152, float %173)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %131, float %138, float %152, float %173)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %199, float %200, float %201, float %202)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %216, float %218, float %213, float %189)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0410100
>bf8c007f
>c00403bf
>c0028300
>bf8c007f
>7e0c0205
>c0020301
>bf8c007f
>7e080204
>d2820001
>041a0808
>d2060801
>02010101
>d2820002
>04120c08
>d2060802
>02010102
>f800020f
>01020202
>c0840700
>bf8c000f
>e00c2000
>80020700
>bf8c0770
>d2820001
>04180907
>d2820002
>04180908
>c00403c9
>bf8c007f
>10060408
>c00403c8
>bf8c007f
>d2820005
>040c1101
>d2820003
>04180909
>c00403ca
>bf8c007f
>d2820005
>04141103
>d2820004
>04100b07
>c00403cb
>bf8c007f
>d2820005
>04141104
>c004030b
>bf8c007f
>080e0a08
>d00c0008
>02000b07
>d2000006
>00220f06
>c004030a
>bf8c007f
>080e0a08
>7e0e5507
>100e0f06
>c0040331
>bf8c007f
>100c0408
>c0040330
>bf8c007f
>d2820006
>04181101
>c0040332
>bf8c007f
>d2820006
>04181103
>c0040333
>bf8c007f
>d2820006
>04181104
>100e0f06
>c0040343
>bf8c007f
>100e0e08
>c0040341
>bf8c007f
>080e0e08
>c0040342
>bf8c007f
>d00c000a
>02001107
>7e100208
>d2000007
>002a0f08
>d2060807
>02010107
>c084070c
>bf8c007f
>e00c2000
>80020800
>bf8c0770
>d2060808
>0201010b
>f800021f
>07070708
>c0040311
>bf8c000f
>100e0408
>c0040310
>bf8c007f
>d2820007
>041c1101
>c0040312
>bf8c007f
>d2820007
>041c1103
>c0040313
>bf8c007f
>d2820007
>041c1104
>c0040315
>bf8c007f
>10100408
>c0040314
>bf8c007f
>d2820008
>04201101
>c0040316
>bf8c007f
>d2820008
>04201103
>c0040317
>bf8c007f
>d2820008
>04201104
>c0400102
>bf8c007f
>c004010d
>bf8c007f
>10121008
>c004010c
>bf8c007f
>d282000a
>04260e08
>c0040319
>bf8c007f
>10120408
>c0040318
>bf8c007f
>d2820009
>04241101
>c004031a
>bf8c007f
>d2820009
>04241103
>c004031b
>bf8c007f
>d2820009
>04241104
>c004010e
>bf8c007f
>d282000b
>042a1208
>c004031d
>bf8c007f
>10140408
>c004031c
>bf8c007f
>d282000a
>04281101
>c004031e
>bf8c007f
>d282000a
>04281103
>c004031f
>bf8c007f
>d282000a
>04281104
>c004010f
>bf8c007f
>d282000b
>042e1408
>c0040109
>bf8c007f
>10181008
>c0040108
>bf8c007f
>d282000c
>04320e08
>c004010a
>bf8c007f
>d282000c
>04321208
>c004010b
>bf8c007f
>d282000c
>04321408
>c0040105
>bf8c007f
>101a1008
>c0040104
>bf8c007f
>d282000d
>04360e08
>c0040106
>bf8c007f
>d282000d
>04361208
>c0040107
>bf8c007f
>d282000d
>04361408
>c0040101
>bf8c007f
>101c1008
>c0040100
>bf8c007f
>d282000e
>043a0e08
>c0040102
>bf8c007f
>d282000e
>043a1208
>c0040103
>bf8c007f
>d282000e
>043a1408
>f80000ef
>0b0c0d0e
>c004011d
>bf8c000f
>10161008
>c004011c
>bf8c007f
>d282000b
>042e0e08
>c004011e
>bf8c007f
>d282000b
>042e1208
>c004011f
>bf8c007f
>d282000b
>042e1408
>c0040119
>bf8c007f
>10181008
>c0040118
>bf8c007f
>d282000c
>04320e08
>c004011a
>bf8c007f
>d282000c
>04321208
>c004011b
>bf8c007f
>d282000c
>04321408
>c0040115
>bf8c007f
>101a1008
>c0040114
>bf8c007f
>d282000d
>04360e08
>c0040116
>bf8c007f
>d282000d
>04361208
>c0040117
>bf8c007f
>d282000d
>04361408
>c0040111
>bf8c007f
>101c1008
>c0040110
>bf8c007f
>d282000e
>043a0e08
>c0040112
>bf8c007f
>d282000e
>043a1208
>c0000113
>bf8c007f
>d282000e
>043a1400
>f80000ff
>0b0c0d0e
>c0840704
>bf8c000f
>e00c2000
>80020b00
>bf8c0770
>f800022f
>06050c0b
>c00003c5
>bf8c000f
>10160400
>c00003c4
>bf8c007f
>d282000b
>042c0101
>c00003c6
>bf8c007f
>d282000b
>042c0103
>c00003c7
>bf8c007f
>d282000b
>042c0104
>c00003c1
>bf8c007f
>10040400
>c00003c0
>bf8c007f
>d2820001
>04080101
>c00003c2
>bf8c007f
>d2820001
>04040103
>c00003c3
>bf8c007f
>d2820001
>04040104
>f800023f
>06050b01
>c0840708
>bf8c000f
>e00c2000
>80020000
>bf8c0770
>10080005
>100a0204
>10000004
>f800024f
>04040500
>c00003cc
>bf8c000f
>d2820000
>041e1400
>c0000302
>bf8c007f
>10021200
>08021501
>c00003cd
>bf8c007f
>10041400
>08041102
>f80008cf
>0a010200
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL IN[2], GENERIC[21], PERSPECTIVE
>DCL IN[3], GENERIC[22], PERSPECTIVE
>DCL IN[4], GENERIC[23], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL CONST[0..30]
>DCL TEMP[0..5], LOCAL
>DCL TEMP[6], ARRAY(1), LOCAL
>IMM[0] FLT32 {    0.0000,     1.0000,     2.0000,    -1.0000}
>  0: MOV TEMP[0].xy, IN[1].xyyy
>  1: TEX TEMP[0].xyz, TEMP[0], SAMP[1], 2D
>  2: MOV TEMP[1].xy, IN[0].xyyy
>  3: TEX TEMP[1], TEMP[1], SAMP[0], 2D
>  4: MAD TEMP[2].x, CONST[12].xxxx, CONST[21].yyyy, -IN[4].zzzz
>  5: MAD TEMP[3].x, CONST[12].xxxx, CONST[20].zzzz, -IN[4].zzzz
>  6: RCP TEMP[4].x, TEMP[3].xxxx
>  7: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[3].xxxx
>  8: MUL TEMP[4].x, TEMP[2].xxxx, TEMP[4].xxxx
>  9: MOV_SAT TEMP[4].x, TEMP[4].xxxx
> 10: SGE TEMP[3].x, -TEMP[3].xxxx, IMM[0].xxxx
> 11: F2I TEMP[3].x, -TEMP[3]
> 12: UIF TEMP[3].xxxx :0
> 13:   MOV TEMP[3].x, IMM[0].yyyy
> 14: ELSE :0
> 15:   MOV TEMP[3].x, TEMP[4].xxxx
> 16: ENDIF
> 17: MUL TEMP[4].x, IN[3].zzzz, CONST[21].wwww
> 18: MAD TEMP[3].x, TEMP[4].xxxx, TEMP[3].xxxx, -CONST[21].xxxx
> 19: MIN TEMP[3].x, TEMP[3].xxxx, CONST[21].zzzz
> 20: MOV_SAT TEMP[3].x, TEMP[3].xxxx
> 21: MAD TEMP[4].x, TEMP[3].xxxx, -TEMP[3].xxxx, TEMP[3].xxxx
> 22: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[10].xyzz
> 23: MUL TEMP[4].x, TEMP[4].xxxx, CONST[12].xxxx
> 24: MAD TEMP[0].xyz, IMM[0].zzzz, TEMP[0].xyzz, IMM[0].wwww
> 25: MAD TEMP[4].x, TEMP[3].xxxx, TEMP[3].xxxx, TEMP[4].xxxx
> 26: MAD TEMP[0].xyz, CONST[4].wwww, TEMP[0].xyzz, IMM[0].yyyy
> 27: MUL TEMP[2].xyz, TEMP[1].xyzz, TEMP[0].xyzz
> 28: MUL TEMP[1].x, TEMP[1].wwww, CONST[1].wwww
> 29: MUL TEMP[2].xyz, TEMP[2].xyzz, CONST[1].xyzz
> 30: MAD TEMP[5].x, TEMP[1].xxxx, IN[2].wwww, -TEMP[1].xxxx
> 31: MUL TEMP[2].xyz, TEMP[2].xyzz, IN[2].xyzz
> 32: MAD TEMP[1].x, CONST[12].wwww, TEMP[5].xxxx, TEMP[1].xxxx
> 33: MAD TEMP[0].xyz, TEMP[2].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 34: ADD TEMP[3].x, TEMP[3].xxxx, -TEMP[1].xxxx
> 35: MAD TEMP[1].x, CONST[12].zzzz, TEMP[3].xxxx, TEMP[1].xxxx
> 36: MUL TEMP[0].xyz, TEMP[4].xxxx, TEMP[0].xyzz
> 37: MAD TEMP[3].x, IN[3].zzzz, CONST[29].wwww, -TEMP[1].xxxx
> 38: MAD TEMP[2].xyz, TEMP[2].xyzz, CONST[30].xxxx, TEMP[0].xyzz
> 39: MAD TEMP[0].x, CONST[12].yyyy, TEMP[3].xxxx, TEMP[1].xxxx
> 40: MOV TEMP[2].w, TEMP[0].xxxx
> 41: MOV TEMP[6], TEMP[2]
> 42: MOV OUT[0], TEMP[6]
> 43: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 4
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 5
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 6
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 7
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 19
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 40
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 41
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 42
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 48
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 49
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 50
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr float addrspace(2)* %21, i32 51
>  %45 = load float addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr float addrspace(2)* %21, i32 82
>  %47 = load float addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr float addrspace(2)* %21, i32 84
>  %49 = load float addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr float addrspace(2)* %21, i32 85
>  %51 = load float addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr float addrspace(2)* %21, i32 86
>  %53 = load float addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr float addrspace(2)* %21, i32 87
>  %55 = load float addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr float addrspace(2)* %21, i32 116
>  %57 = load float addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr float addrspace(2)* %21, i32 117
>  %59 = load float addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr float addrspace(2)* %21, i32 118
>  %61 = load float addrspace(2)* %60, !tbaa !0
>  %62 = getelementptr float addrspace(2)* %21, i32 119
>  %63 = load float addrspace(2)* %62, !tbaa !0
>  %64 = getelementptr float addrspace(2)* %21, i32 120
>  %65 = load float addrspace(2)* %64, !tbaa !0
>  %66 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %67 = load <32 x i8> addrspace(2)* %66, !tbaa !0
>  %68 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %69 = load <16 x i8> addrspace(2)* %68, !tbaa !0
>  %70 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %71 = load <32 x i8> addrspace(2)* %70, !tbaa !0
>  %72 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %73 = load <16 x i8> addrspace(2)* %72, !tbaa !0
>  %74 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %75 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %76 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %77 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %78 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %79 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %80 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %3, <2 x i32> %5)
>  %81 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %3, <2 x i32> %5)
>  %82 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %3, <2 x i32> %5)
>  %83 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %3, <2 x i32> %5)
>  %84 = bitcast float %76 to i32
>  %85 = bitcast float %77 to i32
>  %86 = insertelement <2 x i32> undef, i32 %84, i32 0
>  %87 = insertelement <2 x i32> %86, i32 %85, i32 1
>  %88 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %87, <32 x i8> %71, <16 x i8> %73, i32 2)
>  %89 = extractelement <4 x float> %88, i32 0
>  %90 = extractelement <4 x float> %88, i32 1
>  %91 = extractelement <4 x float> %88, i32 2
>  %92 = bitcast float %74 to i32
>  %93 = bitcast float %75 to i32
>  %94 = insertelement <2 x i32> undef, i32 %92, i32 0
>  %95 = insertelement <2 x i32> %94, i32 %93, i32 1
>  %96 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %95, <32 x i8> %67, <16 x i8> %69, i32 2)
>  %97 = extractelement <4 x float> %96, i32 0
>  %98 = extractelement <4 x float> %96, i32 1
>  %99 = extractelement <4 x float> %96, i32 2
>  %100 = extractelement <4 x float> %96, i32 3
>  %101 = fsub float -0.000000e+00, %83
>  %102 = fmul float %39, %51
>  %103 = fadd float %102, %101
>  %104 = fsub float -0.000000e+00, %83
>  %105 = fmul float %39, %47
>  %106 = fadd float %105, %104
>  %107 = fdiv float 1.000000e+00, %106
>  %108 = fmul float %106, %106
>  %109 = fmul float %103, %107
>  %110 = call float @llvm.AMDIL.clamp.(float %109, float 0.000000e+00, float 1.000000e+00)
>  %111 = fsub float -0.000000e+00, %108
>  %112 = fcmp uge float %111, 0.000000e+00
>  %113 = select i1 %112, float 1.000000e+00, float 0.000000e+00
>  %114 = fsub float -0.000000e+00, %113
>  %115 = fptosi float %114 to i32
>  %116 = bitcast i32 %115 to float
>  %117 = bitcast float %116 to i32
>  %118 = icmp ne i32 %117, 0
>  %. = select i1 %118, float 1.000000e+00, float %110
>  %119 = fmul float %82, %55
>  %120 = fsub float -0.000000e+00, %49
>  %121 = fmul float %119, %.
>  %122 = fadd float %121, %120
>  %123 = fcmp uge float %122, %53
>  %124 = select i1 %123, float %53, float %122
>  %125 = call float @llvm.AMDIL.clamp.(float %124, float 0.000000e+00, float 1.000000e+00)
>  %126 = fsub float -0.000000e+00, %125
>  %127 = fmul float %125, %126
>  %128 = fadd float %127, %125
>  %129 = fmul float %89, %33
>  %130 = fmul float %90, %35
>  %131 = fmul float %91, %37
>  %132 = fmul float %128, %39
>  %133 = fmul float 2.000000e+00, %129
>  %134 = fadd float %133, -1.000000e+00
>  %135 = fmul float 2.000000e+00, %130
>  %136 = fadd float %135, -1.000000e+00
>  %137 = fmul float 2.000000e+00, %131
>  %138 = fadd float %137, -1.000000e+00
>  %139 = fmul float %125, %125
>  %140 = fadd float %139, %132
>  %141 = fmul float %31, %134
>  %142 = fadd float %141, 1.000000e+00
>  %143 = fmul float %31, %136
>  %144 = fadd float %143, 1.000000e+00
>  %145 = fmul float %31, %138
>  %146 = fadd float %145, 1.000000e+00
>  %147 = fmul float %97, %142
>  %148 = fmul float %98, %144
>  %149 = fmul float %99, %146
>  %150 = fmul float %100, %29
>  %151 = fmul float %147, %23
>  %152 = fmul float %148, %25
>  %153 = fmul float %149, %27
>  %154 = fsub float -0.000000e+00, %150
>  %155 = fmul float %150, %81
>  %156 = fadd float %155, %154
>  %157 = fmul float %151, %78
>  %158 = fmul float %152, %79
>  %159 = fmul float %153, %80
>  %160 = fmul float %45, %156
>  %161 = fadd float %160, %150
>  %162 = fsub float -0.000000e+00, %65
>  %163 = fmul float %157, %162
>  %164 = fadd float %163, %57
>  %165 = fsub float -0.000000e+00, %65
>  %166 = fmul float %158, %165
>  %167 = fadd float %166, %59
>  %168 = fsub float -0.000000e+00, %65
>  %169 = fmul float %159, %168
>  %170 = fadd float %169, %61
>  %171 = fsub float -0.000000e+00, %161
>  %172 = fadd float %125, %171
>  %173 = fmul float %43, %172
>  %174 = fadd float %173, %161
>  %175 = fmul float %140, %164
>  %176 = fmul float %140, %167
>  %177 = fmul float %140, %170
>  %178 = fsub float -0.000000e+00, %174
>  %179 = fmul float %82, %63
>  %180 = fadd float %179, %178
>  %181 = fmul float %157, %65
>  %182 = fadd float %181, %175
>  %183 = fmul float %158, %65
>  %184 = fadd float %183, %176
>  %185 = fmul float %159, %65
>  %186 = fadd float %185, %177
>  %187 = fmul float %41, %180
>  %188 = fadd float %187, %174
>  %189 = call i32 @llvm.SI.packf16(float %182, float %184)
>  %190 = bitcast i32 %189 to float
>  %191 = call i32 @llvm.SI.packf16(float %186, float %188)
>  %192 = bitcast i32 %191 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %190, float %192, float %190, float %192)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430202
>c0400100
>bf8c0070
>c0038107
>bf8c007f
>100c0a07
>c81c0b00
>c81d0b01
>100e0f06
>080e0d07
>c0038133
>bf8c007f
>d2820006
>041a0e07
>c81c1200
>c81d1201
>c0038130
>c0040155
>bf8c007f
>7e100208
>d2100008
>02021007
>08100f08
>c0040152
>bf8c007f
>7e120208
>d2100009
>02021207
>08120f09
>7e0e5509
>100e0f08
>d2060807
>02010107
>10101309
>d2060008
>22010108
>d00c0008
>02010108
>d2000008
>0021e480
>d2060008
>22010108
>7e101108
>d10a0008
>02010108
>d2000008
>0021e507
>c81c0e00
>c81d0e01
>c0040157
>bf8c007f
>10120e08
>10101109
>c0040154
>bf8c007f
>0a101008
>c0040156
>bf8c007f
>d00c000a
>02001108
>7e120208
>d2000008
>002a1308
>d2060808
>02010108
>08120d08
>c0040132
>bf8c007f
>d2820006
>041a1208
>c0040177
>bf8c007f
>100e0e08
>080e0d07
>c0040131
>bf8c007f
>d282000a
>041a0e08
>100c1108
>080c0d08
>100c0c07
>d2820006
>041a1108
>c8200500
>c8210501
>c81c0400
>c81d0401
>c0840304
>c0c60508
>bf8c007f
>f0800700
>00430707
>c001012a
>bf8c0070
>10161202
>d282000b
>042c0509
>061616f3
>c0018113
>bf8c007f
>d282000b
>03ca1603
>10161704
>c0010106
>bf8c007f
>10161602
>c8300a00
>c8310a01
>1016190b
>c0010178
>bf8c007f
>10181602
>c0020176
>bf8c007f
>08181804
>10181906
>d282000b
>0430050b
>5e14150b
>c0020129
>bf8c007f
>10161004
>d282000b
>042c0908
>061616f3
>d282000b
>03ca1603
>10161703
>c0020105
>bf8c007f
>10161604
>c8300900
>c8310901
>1016190b
>10181602
>c0020175
>bf8c007f
>08181804
>10181906
>d282000b
>0430050b
>c0020128
>bf8c007f
>10180e04
>d2820007
>04300907
>060e0ef3
>d2820007
>03ca0e03
>10040f02
>c0018104
>bf8c007f
>10040403
>c80c0800
>c80d0801
>10000702
>10020002
>c0000174
>bf8c007f
>08020200
>10020306
>d2820000
>04040500
>5e001700
>f8001c0f
>0a000a00
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL IN[4]
>DCL IN[5]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL OUT[3], GENERIC[20]
>DCL OUT[4], GENERIC[21]
>DCL OUT[5], GENERIC[22]
>DCL OUT[6], GENERIC[23]
>DCL CONST[0..57]
>DCL TEMP[0..8], LOCAL
>IMM[0] FLT32 { -128.0000,     1.0000,   -64.0000,    -2.0000}
>IMM[1] FLT32 {   -0.0159,     0.0159,     2.2000,     0.0000}
>  0: ADD TEMP[0].xyz, IN[2].xyzz, IN[2].xyzz
>  1: LG2 TEMP[0].x, TEMP[0].xxxx
>  2: LG2 TEMP[1].x, TEMP[0].yyyy
>  3: MOV TEMP[0].y, TEMP[1].xxxx
>  4: LG2 TEMP[2].x, TEMP[0].zzzz
>  5: MOV TEMP[0].z, TEMP[2].xxxx
>  6: MUL TEMP[0].xyz, TEMP[0].xyzz, IMM[1].zzzz
>  7: EX2 TEMP[3].x, TEMP[0].xxxx
>  8: EX2 TEMP[4].x, TEMP[0].yyyy
>  9: MOV TEMP[3].y, TEMP[4].xxxx
> 10: EX2 TEMP[4].x, TEMP[0].zzzz
> 11: MOV TEMP[3].z, TEMP[4].xxxx
> 12: DP4 TEMP[4].x, IN[3], CONST[48]
> 13: DP4 TEMP[5].x, IN[3], CONST[49]
> 14: MOV TEMP[4].y, TEMP[5].xxxx
> 15: DP4 TEMP[5].x, IN[3], CONST[52]
> 16: MAD TEMP[0].xyz, IN[4].xyzz, CONST[3].xxxx, IN[0].xyzz
> 17: MOV TEMP[0].w, IN[0].wwww
> 18: DP4 TEMP[1].x, TEMP[0], CONST[54]
> 19: DP4 TEMP[6].x, TEMP[0], CONST[55]
> 20: MOV TEMP[1].y, TEMP[6].xxxx
> 21: DP4 TEMP[6].x, TEMP[0], CONST[56]
> 22: MOV TEMP[1].z, TEMP[6].xxxx
> 23: MOV TEMP[1].w, CONST[0].yyyy
> 24: DP4 TEMP[7].x, IN[3], CONST[53]
> 25: MOV TEMP[5].y, TEMP[7].xxxx
> 26: DP4 TEMP[7].x, TEMP[1], CONST[10]
> 27: MOV TEMP[0].z, TEMP[7].xxxx
> 28: DP4 TEMP[0].x, TEMP[1], CONST[8]
> 29: DP4 TEMP[7].x, TEMP[1], CONST[9]
> 30: MOV TEMP[0].y, TEMP[7].xxxx
> 31: DP4 TEMP[7].x, TEMP[1], CONST[11]
> 32: MOV TEMP[0].w, TEMP[7].xxxx
> 33: ADD TEMP[2].x, -TEMP[6].xxxx, CONST[2].wzzz
> 34: MAX TEMP[6].x, TEMP[2].xxxx, CONST[0].xxxx
> 35: MOV TEMP[2].w, TEMP[6].xxxx
> 36: DP4 TEMP[6].x, TEMP[1], CONST[13]
> 37: MOV TEMP[2].z, TEMP[6].xxxx
> 38: MOV TEMP[1].xyz, TEMP[1].xyzx
> 39: MOV TEMP[7], TEMP[0]
> 40: MOV TEMP[8].xy, TEMP[0].xyxx
> 41: MOV TEMP[3].w, CONST[0].xxxx
> 42: MOV TEMP[8].zw, TEMP[2].wwzw
> 43: MOV TEMP[1].w, TEMP[6].xxxx
> 44: MOV TEMP[2], TEMP[7]
> 45: MAD TEMP[6].x, TEMP[0].zzzz, CONST[0].zzzz, -TEMP[0].wwww
> 46: MOV TEMP[7].z, TEMP[6].xxxx
> 47: MOV TEMP[7].y, -TEMP[0].yyyy
> 48: MAD TEMP[7].xy, CONST[57].xyyy, TEMP[0].wwww, TEMP[7].xyyy
> 49: MOV OUT[2], TEMP[4]
> 50: MOV OUT[3], TEMP[5]
> 51: MOV OUT[4], TEMP[3]
> 52: MOV OUT[0], TEMP[7]
> 53: MOV OUT[1], TEMP[2]
> 54: MOV OUT[5], TEMP[8]
> 55: MOV OUT[6], TEMP[1]
> 56: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 11
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 12
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 32
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 33
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 34
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 35
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 36
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 37
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 38
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 39
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 40
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 41
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 42
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 43
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 44
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 45
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 46
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 47
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 52
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 53
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 54
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 55
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 192
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 193
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 194
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 195
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 196
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 197
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 198
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 199
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 208
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 209
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 210
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 211
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 212
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 213
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 214
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 215
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 216
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr float addrspace(2)* %10, i32 217
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = getelementptr float addrspace(2)* %10, i32 218
>  %98 = load float addrspace(2)* %97, !tbaa !0
>  %99 = getelementptr float addrspace(2)* %10, i32 219
>  %100 = load float addrspace(2)* %99, !tbaa !0
>  %101 = getelementptr float addrspace(2)* %10, i32 220
>  %102 = load float addrspace(2)* %101, !tbaa !0
>  %103 = getelementptr float addrspace(2)* %10, i32 221
>  %104 = load float addrspace(2)* %103, !tbaa !0
>  %105 = getelementptr float addrspace(2)* %10, i32 222
>  %106 = load float addrspace(2)* %105, !tbaa !0
>  %107 = getelementptr float addrspace(2)* %10, i32 223
>  %108 = load float addrspace(2)* %107, !tbaa !0
>  %109 = getelementptr float addrspace(2)* %10, i32 224
>  %110 = load float addrspace(2)* %109, !tbaa !0
>  %111 = getelementptr float addrspace(2)* %10, i32 225
>  %112 = load float addrspace(2)* %111, !tbaa !0
>  %113 = getelementptr float addrspace(2)* %10, i32 226
>  %114 = load float addrspace(2)* %113, !tbaa !0
>  %115 = getelementptr float addrspace(2)* %10, i32 227
>  %116 = load float addrspace(2)* %115, !tbaa !0
>  %117 = getelementptr float addrspace(2)* %10, i32 228
>  %118 = load float addrspace(2)* %117, !tbaa !0
>  %119 = getelementptr float addrspace(2)* %10, i32 229
>  %120 = load float addrspace(2)* %119, !tbaa !0
>  %121 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %122 = load <16 x i8> addrspace(2)* %121, !tbaa !0
>  %123 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %122, i32 0, i32 %5)
>  %124 = extractelement <4 x float> %123, i32 0
>  %125 = extractelement <4 x float> %123, i32 1
>  %126 = extractelement <4 x float> %123, i32 2
>  %127 = extractelement <4 x float> %123, i32 3
>  %128 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %129 = load <16 x i8> addrspace(2)* %128, !tbaa !0
>  %130 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %129, i32 0, i32 %5)
>  %131 = extractelement <4 x float> %130, i32 0
>  %132 = extractelement <4 x float> %130, i32 1
>  %133 = extractelement <4 x float> %130, i32 2
>  %134 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %135 = load <16 x i8> addrspace(2)* %134, !tbaa !0
>  %136 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %135, i32 0, i32 %5)
>  %137 = extractelement <4 x float> %136, i32 0
>  %138 = extractelement <4 x float> %136, i32 1
>  %139 = extractelement <4 x float> %136, i32 2
>  %140 = extractelement <4 x float> %136, i32 3
>  %141 = getelementptr <16 x i8> addrspace(2)* %3, i32 4
>  %142 = load <16 x i8> addrspace(2)* %141, !tbaa !0
>  %143 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %142, i32 0, i32 %5)
>  %144 = extractelement <4 x float> %143, i32 0
>  %145 = extractelement <4 x float> %143, i32 1
>  %146 = extractelement <4 x float> %143, i32 2
>  %147 = fadd float %131, %131
>  %148 = fadd float %132, %132
>  %149 = fadd float %133, %133
>  %150 = call float @llvm.log2.f32(float %147)
>  %151 = call float @llvm.log2.f32(float %148)
>  %152 = call float @llvm.log2.f32(float %149)
>  %153 = fmul float %150, 0x40019999A0000000
>  %154 = fmul float %151, 0x40019999A0000000
>  %155 = fmul float %152, 0x40019999A0000000
>  %156 = call float @llvm.AMDIL.exp.(float %153)
>  %157 = call float @llvm.AMDIL.exp.(float %154)
>  %158 = call float @llvm.AMDIL.exp.(float %155)
>  %159 = fmul float %137, %62
>  %160 = fmul float %138, %64
>  %161 = fadd float %159, %160
>  %162 = fmul float %139, %66
>  %163 = fadd float %161, %162
>  %164 = fmul float %140, %68
>  %165 = fadd float %163, %164
>  %166 = fmul float %137, %70
>  %167 = fmul float %138, %72
>  %168 = fadd float %166, %167
>  %169 = fmul float %139, %74
>  %170 = fadd float %168, %169
>  %171 = fmul float %140, %76
>  %172 = fadd float %170, %171
>  %173 = fmul float %137, %78
>  %174 = fmul float %138, %80
>  %175 = fadd float %173, %174
>  %176 = fmul float %139, %82
>  %177 = fadd float %175, %176
>  %178 = fmul float %140, %84
>  %179 = fadd float %177, %178
>  %180 = fmul float %144, %20
>  %181 = fadd float %180, %124
>  %182 = fmul float %145, %20
>  %183 = fadd float %182, %125
>  %184 = fmul float %146, %20
>  %185 = fadd float %184, %126
>  %186 = fmul float %181, %94
>  %187 = fmul float %183, %96
>  %188 = fadd float %186, %187
>  %189 = fmul float %185, %98
>  %190 = fadd float %188, %189
>  %191 = fmul float %127, %100
>  %192 = fadd float %190, %191
>  %193 = fmul float %181, %102
>  %194 = fmul float %183, %104
>  %195 = fadd float %193, %194
>  %196 = fmul float %185, %106
>  %197 = fadd float %195, %196
>  %198 = fmul float %127, %108
>  %199 = fadd float %197, %198
>  %200 = fmul float %181, %110
>  %201 = fmul float %183, %112
>  %202 = fadd float %200, %201
>  %203 = fmul float %185, %114
>  %204 = fadd float %202, %203
>  %205 = fmul float %127, %116
>  %206 = fadd float %204, %205
>  %207 = fmul float %137, %86
>  %208 = fmul float %138, %88
>  %209 = fadd float %207, %208
>  %210 = fmul float %139, %90
>  %211 = fadd float %209, %210
>  %212 = fmul float %140, %92
>  %213 = fadd float %211, %212
>  %214 = fmul float %192, %38
>  %215 = fmul float %199, %40
>  %216 = fadd float %214, %215
>  %217 = fmul float %206, %42
>  %218 = fadd float %216, %217
>  %219 = fmul float %14, %44
>  %220 = fadd float %218, %219
>  %221 = fmul float %192, %22
>  %222 = fmul float %199, %24
>  %223 = fadd float %221, %222
>  %224 = fmul float %206, %26
>  %225 = fadd float %223, %224
>  %226 = fmul float %14, %28
>  %227 = fadd float %225, %226
>  %228 = fmul float %192, %30
>  %229 = fmul float %199, %32
>  %230 = fadd float %228, %229
>  %231 = fmul float %206, %34
>  %232 = fadd float %230, %231
>  %233 = fmul float %14, %36
>  %234 = fadd float %232, %233
>  %235 = fmul float %192, %46
>  %236 = fmul float %199, %48
>  %237 = fadd float %235, %236
>  %238 = fmul float %206, %50
>  %239 = fadd float %237, %238
>  %240 = fmul float %14, %52
>  %241 = fadd float %239, %240
>  %242 = fsub float -0.000000e+00, %206
>  %243 = fadd float %242, %18
>  %244 = fcmp uge float %243, %12
>  %245 = select i1 %244, float %243, float %12
>  %246 = fmul float %192, %54
>  %247 = fmul float %199, %56
>  %248 = fadd float %246, %247
>  %249 = fmul float %206, %58
>  %250 = fadd float %248, %249
>  %251 = fmul float %14, %60
>  %252 = fadd float %250, %251
>  %253 = fsub float -0.000000e+00, %241
>  %254 = fmul float %220, %16
>  %255 = fadd float %254, %253
>  %256 = fsub float -0.000000e+00, %234
>  %257 = fmul float %118, %241
>  %258 = fadd float %257, %227
>  %259 = fmul float %120, %241
>  %260 = fadd float %259, %256
>  %261 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %262 = load float addrspace(2)* addrspace(2)* %261, !tbaa !0
>  %263 = getelementptr float addrspace(2)* %262, i32 0
>  %264 = load float addrspace(2)* %263, !tbaa !0
>  %265 = fmul float %264, %227
>  %266 = getelementptr float addrspace(2)* %262, i32 1
>  %267 = load float addrspace(2)* %266, !tbaa !0
>  %268 = fmul float %267, %234
>  %269 = fadd float %265, %268
>  %270 = getelementptr float addrspace(2)* %262, i32 2
>  %271 = load float addrspace(2)* %270, !tbaa !0
>  %272 = fmul float %271, %220
>  %273 = fadd float %269, %272
>  %274 = getelementptr float addrspace(2)* %262, i32 3
>  %275 = load float addrspace(2)* %274, !tbaa !0
>  %276 = fmul float %275, %241
>  %277 = fadd float %273, %276
>  %278 = getelementptr float addrspace(2)* %262, i32 4
>  %279 = load float addrspace(2)* %278, !tbaa !0
>  %280 = fmul float %279, %227
>  %281 = getelementptr float addrspace(2)* %262, i32 5
>  %282 = load float addrspace(2)* %281, !tbaa !0
>  %283 = fmul float %282, %234
>  %284 = fadd float %280, %283
>  %285 = getelementptr float addrspace(2)* %262, i32 6
>  %286 = load float addrspace(2)* %285, !tbaa !0
>  %287 = fmul float %286, %220
>  %288 = fadd float %284, %287
>  %289 = getelementptr float addrspace(2)* %262, i32 7
>  %290 = load float addrspace(2)* %289, !tbaa !0
>  %291 = fmul float %290, %241
>  %292 = fadd float %288, %291
>  %293 = getelementptr float addrspace(2)* %262, i32 8
>  %294 = load float addrspace(2)* %293, !tbaa !0
>  %295 = fmul float %294, %227
>  %296 = getelementptr float addrspace(2)* %262, i32 9
>  %297 = load float addrspace(2)* %296, !tbaa !0
>  %298 = fmul float %297, %234
>  %299 = fadd float %295, %298
>  %300 = getelementptr float addrspace(2)* %262, i32 10
>  %301 = load float addrspace(2)* %300, !tbaa !0
>  %302 = fmul float %301, %220
>  %303 = fadd float %299, %302
>  %304 = getelementptr float addrspace(2)* %262, i32 11
>  %305 = load float addrspace(2)* %304, !tbaa !0
>  %306 = fmul float %305, %241
>  %307 = fadd float %303, %306
>  %308 = getelementptr float addrspace(2)* %262, i32 12
>  %309 = load float addrspace(2)* %308, !tbaa !0
>  %310 = fmul float %309, %227
>  %311 = getelementptr float addrspace(2)* %262, i32 13
>  %312 = load float addrspace(2)* %311, !tbaa !0
>  %313 = fmul float %312, %234
>  %314 = fadd float %310, %313
>  %315 = getelementptr float addrspace(2)* %262, i32 14
>  %316 = load float addrspace(2)* %315, !tbaa !0
>  %317 = fmul float %316, %220
>  %318 = fadd float %314, %317
>  %319 = getelementptr float addrspace(2)* %262, i32 15
>  %320 = load float addrspace(2)* %319, !tbaa !0
>  %321 = fmul float %320, %241
>  %322 = fadd float %318, %321
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %277, float %292, float %307, float %322)
>  %323 = getelementptr float addrspace(2)* %262, i32 16
>  %324 = load float addrspace(2)* %323, !tbaa !0
>  %325 = fmul float %324, %227
>  %326 = getelementptr float addrspace(2)* %262, i32 17
>  %327 = load float addrspace(2)* %326, !tbaa !0
>  %328 = fmul float %327, %234
>  %329 = fadd float %325, %328
>  %330 = getelementptr float addrspace(2)* %262, i32 18
>  %331 = load float addrspace(2)* %330, !tbaa !0
>  %332 = fmul float %331, %220
>  %333 = fadd float %329, %332
>  %334 = getelementptr float addrspace(2)* %262, i32 19
>  %335 = load float addrspace(2)* %334, !tbaa !0
>  %336 = fmul float %335, %241
>  %337 = fadd float %333, %336
>  %338 = getelementptr float addrspace(2)* %262, i32 20
>  %339 = load float addrspace(2)* %338, !tbaa !0
>  %340 = fmul float %339, %227
>  %341 = getelementptr float addrspace(2)* %262, i32 21
>  %342 = load float addrspace(2)* %341, !tbaa !0
>  %343 = fmul float %342, %234
>  %344 = fadd float %340, %343
>  %345 = getelementptr float addrspace(2)* %262, i32 22
>  %346 = load float addrspace(2)* %345, !tbaa !0
>  %347 = fmul float %346, %220
>  %348 = fadd float %344, %347
>  %349 = getelementptr float addrspace(2)* %262, i32 23
>  %350 = load float addrspace(2)* %349, !tbaa !0
>  %351 = fmul float %350, %241
>  %352 = fadd float %348, %351
>  %353 = getelementptr float addrspace(2)* %262, i32 24
>  %354 = load float addrspace(2)* %353, !tbaa !0
>  %355 = fmul float %354, %227
>  %356 = getelementptr float addrspace(2)* %262, i32 25
>  %357 = load float addrspace(2)* %356, !tbaa !0
>  %358 = fmul float %357, %234
>  %359 = fadd float %355, %358
>  %360 = getelementptr float addrspace(2)* %262, i32 26
>  %361 = load float addrspace(2)* %360, !tbaa !0
>  %362 = fmul float %361, %220
>  %363 = fadd float %359, %362
>  %364 = getelementptr float addrspace(2)* %262, i32 27
>  %365 = load float addrspace(2)* %364, !tbaa !0
>  %366 = fmul float %365, %241
>  %367 = fadd float %363, %366
>  %368 = getelementptr float addrspace(2)* %262, i32 28
>  %369 = load float addrspace(2)* %368, !tbaa !0
>  %370 = fmul float %369, %227
>  %371 = getelementptr float addrspace(2)* %262, i32 29
>  %372 = load float addrspace(2)* %371, !tbaa !0
>  %373 = fmul float %372, %234
>  %374 = fadd float %370, %373
>  %375 = getelementptr float addrspace(2)* %262, i32 30
>  %376 = load float addrspace(2)* %375, !tbaa !0
>  %377 = fmul float %376, %220
>  %378 = fadd float %374, %377
>  %379 = getelementptr float addrspace(2)* %262, i32 31
>  %380 = load float addrspace(2)* %379, !tbaa !0
>  %381 = fmul float %380, %241
>  %382 = fadd float %378, %381
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %337, float %352, float %367, float %382)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %165, float %172, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %179, float %213, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %156, float %157, float %158, float %12)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %227, float %234, float %252, float %245)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %192, float %199, float %206, float %252)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %258, float %260, float %255, float %241)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: nounwind readonly
>declare float @llvm.log2.f32(float) #2
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.exp.(float) #3
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { nounwind readonly }
>attributes #3 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840700
>bf8c007f
>e00c2000
>80020300
>c0840710
>bf8c0070
>e00c2000
>80020900
>c0410100
>bf8c0070
>c002030c
>bf8c007f
>d2820007
>040c0909
>d2820008
>0410090a
>c00283d9
>bf8c007f
>10021005
>c00283d8
>bf8c007f
>d2820001
>04040b07
>d2820009
>0414090b
>c00203da
>bf8c007f
>d2820001
>04040909
>c00203db
>bf8c007f
>d2820001
>04040906
>c00203dd
>bf8c007f
>10041004
>c00203dc
>bf8c007f
>d2820002
>04080907
>c00203de
>bf8c007f
>d2820002
>04080909
>c00203df
>bf8c007f
>d2820002
>04080906
>c0020321
>bf8c007f
>10140404
>c0020320
>bf8c007f
>d282000a
>04280901
>c00203e1
>bf8c007f
>10101004
>c00203e0
>bf8c007f
>d2820007
>04200907
>c00203e2
>bf8c007f
>d2820007
>041c0909
>c00203e3
>bf8c007f
>d2820003
>041c0906
>c0020322
>bf8c007f
>d2820004
>04280903
>c0020301
>c0028323
>bf8c007f
>7e0a0205
>d2820004
>04120a04
>c0028325
>bf8c007f
>100a0405
>c0028324
>bf8c007f
>d2820005
>04140b01
>c0028326
>bf8c007f
>d2820005
>04140b03
>c0028327
>bf8c007f
>7e0c0205
>d2820005
>04160c04
>c0400102
>bf8c007f
>c002810d
>bf8c007f
>100c0a05
>c002810c
>bf8c007f
>d2820007
>041a0805
>c0028329
>bf8c007f
>100c0405
>c0028328
>bf8c007f
>d2820006
>04180b01
>c002832a
>bf8c007f
>d2820006
>04180b03
>c002832b
>bf8c007f
>7e100205
>d2820006
>041a1004
>c002810e
>bf8c007f
>d2820008
>041e0c05
>c002832d
>bf8c007f
>100e0405
>c002832c
>bf8c007f
>d2820007
>041c0b01
>c002832e
>bf8c007f
>d2820007
>041c0b03
>c002832f
>bf8c007f
>7e120205
>d2820007
>041e1204
>c002810f
>bf8c007f
>d2820008
>04220e05
>c0028109
>bf8c007f
>10120a05
>c0028108
>bf8c007f
>d2820009
>04260805
>c002810a
>bf8c007f
>d2820009
>04260c05
>c002810b
>bf8c007f
>d2820009
>04260e05
>c0028105
>bf8c007f
>10140a05
>c0028104
>bf8c007f
>d282000a
>042a0805
>c0028106
>bf8c007f
>d282000a
>042a0c05
>c0028107
>bf8c007f
>d282000a
>042a0e05
>c0028101
>bf8c007f
>10160a05
>c0028100
>bf8c007f
>d282000b
>042e0805
>c0028102
>bf8c007f
>d282000b
>042e0c05
>c0028103
>bf8c007f
>d282000b
>042e0e05
>f80000ef
>08090a0b
>c002811d
>bf8c000f
>10100a05
>c002811c
>bf8c007f
>d2820008
>04220805
>c002811e
>bf8c007f
>d2820008
>04220c05
>c002811f
>bf8c007f
>d2820008
>04220e05
>c0028119
>bf8c007f
>10120a05
>c0028118
>bf8c007f
>d2820009
>04260805
>c002811a
>bf8c007f
>d2820009
>04260c05
>c002811b
>bf8c007f
>d2820009
>04260e05
>c0028115
>bf8c007f
>10140a05
>c0028114
>bf8c007f
>d282000a
>042a0805
>c0028116
>bf8c007f
>d282000a
>042a0c05
>c0028117
>bf8c007f
>d282000a
>042a0e05
>c0028111
>bf8c007f
>10160a05
>c0028110
>bf8c007f
>d282000b
>042e0805
>c0028112
>bf8c007f
>d282000b
>042e0c05
>c0000113
>bf8c007f
>d282000b
>042e0e00
>f80000ff
>08090a0b
>c084070c
>bf8c000f
>e00c2000
>80020800
>c00003c5
>bf8c0070
>10181200
>c00003c4
>bf8c007f
>d282000c
>04300108
>c00003c6
>bf8c007f
>d282000c
>0430010a
>c00003c7
>bf8c007f
>d282000d
>0430010b
>c00003c1
>bf8c007f
>10181200
>c00003c0
>bf8c007f
>d282000c
>04300108
>c00003c2
>bf8c007f
>d282000c
>0430010a
>c00003c3
>bf8c007f
>d282000e
>0430010b
>7e180280
>f800020f
>0c0c0d0e
>c00003d5
>bf8c000f
>101a1200
>c00003d4
>bf8c007f
>d282000d
>04340108
>c00003d6
>bf8c007f
>d282000d
>0434010a
>c00003d7
>bf8c007f
>d282000d
>0434010b
>c00003d1
>bf8c007f
>101c1200
>c00003d0
>bf8c007f
>d282000e
>04380108
>c00003d2
>bf8c007f
>d282000e
>0438010a
>c00003d3
>bf8c007f
>d2820008
>0438010b
>f800021f
>0c0c0d08
>c0840708
>bf8c000f
>e00c2000
>80020800
>bf8c0770
>0600150a
>7e004f00
>100000ff
>400ccccd
>7e004b00
>06181309
>7e184f0c
>101818ff
>400ccccd
>7e184b0c
>06101108
>7e104f08
>101010ff
>400ccccd
>7e104b08
>c0000300
>bf8c007f
>7e120200
>f800022f
>09000c08
>c000830b
>bf8c000f
>08000601
>d00c0006
>02000100
>7e100200
>d2000000
>001a0108
>c0000335
>bf8c007f
>10100400
>c0000334
>bf8c007f
>d2820008
>04200101
>c0000336
>bf8c007f
>d2820008
>04200103
>c0000337
>bf8c007f
>7e120200
>d2820008
>04221204
>f800023f
>00080504
>f800024f
>08030201
>c00003e4
>bf8c000f
>d2820000
>04120e00
>c0000302
>bf8c007f
>10020c00
>08020f01
>c00003e5
>bf8c007f
>10040e00
>08040b02
>f80008cf
>07010200
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL IN[2], GENERIC[21], PERSPECTIVE
>DCL IN[3], GENERIC[22], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL CONST[0..30]
>DCL TEMP[0..5], LOCAL
>DCL TEMP[6], ARRAY(1), LOCAL
>IMM[0] FLT32 {    0.0000,     1.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MAD TEMP[1].x, CONST[12].xxxx, CONST[21].yyyy, -IN[3].zzzz
>  3: MAD TEMP[2].x, CONST[12].xxxx, CONST[20].zzzz, -IN[3].zzzz
>  4: RCP TEMP[3].x, TEMP[2].xxxx
>  5: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
>  6: MUL TEMP[3].x, TEMP[1].xxxx, TEMP[3].xxxx
>  7: MOV_SAT TEMP[3].x, TEMP[3].xxxx
>  8: SGE TEMP[2].x, -TEMP[2].xxxx, IMM[0].xxxx
>  9: F2I TEMP[2].x, -TEMP[2]
> 10: UIF TEMP[2].xxxx :0
> 11:   MOV TEMP[2].x, IMM[0].yyyy
> 12: ELSE :0
> 13:   MOV TEMP[2].x, TEMP[3].xxxx
> 14: ENDIF
> 15: MUL TEMP[3].x, IN[2].zzzz, CONST[21].wwww
> 16: MAD TEMP[2].x, TEMP[3].xxxx, TEMP[2].xxxx, -CONST[21].xxxx
> 17: MIN TEMP[2].x, TEMP[2].xxxx, CONST[21].zzzz
> 18: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 19: MAD TEMP[3].x, TEMP[2].xxxx, -TEMP[2].xxxx, TEMP[2].xxxx
> 20: MUL TEMP[3].x, TEMP[3].xxxx, CONST[12].xxxx
> 21: MAD TEMP[3].x, TEMP[2].xxxx, TEMP[2].xxxx, TEMP[3].xxxx
> 22: MUL TEMP[4].x, TEMP[0].wwww, CONST[1].wwww
> 23: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[1].xyzz
> 24: MAD TEMP[5].x, TEMP[4].xxxx, IN[1].wwww, -TEMP[4].xxxx
> 25: MUL TEMP[0].xyz, TEMP[0].xyzz, IN[1].xyzz
> 26: MAD TEMP[4].x, CONST[12].wwww, TEMP[5].xxxx, TEMP[4].xxxx
> 27: MAD TEMP[1].xyz, TEMP[0].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 28: ADD TEMP[2].x, TEMP[2].xxxx, -TEMP[4].xxxx
> 29: MAD TEMP[2].x, CONST[12].zzzz, TEMP[2].xxxx, TEMP[4].xxxx
> 30: MUL TEMP[1].xyz, TEMP[3].xxxx, TEMP[1].xyzz
> 31: MAD TEMP[3].x, IN[2].zzzz, CONST[29].wwww, -TEMP[2].xxxx
> 32: MAD TEMP[0].xyz, TEMP[0].xyzz, CONST[30].xxxx, TEMP[1].xyzz
> 33: MAD TEMP[1].x, CONST[12].yyyy, TEMP[3].xxxx, TEMP[2].xxxx
> 34: MOV TEMP[0].w, TEMP[1].xxxx
> 35: MOV TEMP[6], TEMP[0]
> 36: MOV OUT[0], TEMP[6]
> 37: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 4
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 5
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 6
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 7
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 48
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 49
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 50
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 51
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 82
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 84
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 85
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr float addrspace(2)* %21, i32 86
>  %45 = load float addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr float addrspace(2)* %21, i32 87
>  %47 = load float addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr float addrspace(2)* %21, i32 116
>  %49 = load float addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr float addrspace(2)* %21, i32 117
>  %51 = load float addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr float addrspace(2)* %21, i32 118
>  %53 = load float addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr float addrspace(2)* %21, i32 119
>  %55 = load float addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr float addrspace(2)* %21, i32 120
>  %57 = load float addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %59 = load <32 x i8> addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %61 = load <16 x i8> addrspace(2)* %60, !tbaa !0
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %64 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %65 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %66 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %3, <2 x i32> %5)
>  %67 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %3, <2 x i32> %5)
>  %68 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %3, <2 x i32> %5)
>  %69 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %3, <2 x i32> %5)
>  %70 = bitcast float %62 to i32
>  %71 = bitcast float %63 to i32
>  %72 = insertelement <2 x i32> undef, i32 %70, i32 0
>  %73 = insertelement <2 x i32> %72, i32 %71, i32 1
>  %74 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %73, <32 x i8> %59, <16 x i8> %61, i32 2)
>  %75 = extractelement <4 x float> %74, i32 0
>  %76 = extractelement <4 x float> %74, i32 1
>  %77 = extractelement <4 x float> %74, i32 2
>  %78 = extractelement <4 x float> %74, i32 3
>  %79 = fsub float -0.000000e+00, %69
>  %80 = fmul float %31, %43
>  %81 = fadd float %80, %79
>  %82 = fsub float -0.000000e+00, %69
>  %83 = fmul float %31, %39
>  %84 = fadd float %83, %82
>  %85 = fdiv float 1.000000e+00, %84
>  %86 = fmul float %84, %84
>  %87 = fmul float %81, %85
>  %88 = call float @llvm.AMDIL.clamp.(float %87, float 0.000000e+00, float 1.000000e+00)
>  %89 = fsub float -0.000000e+00, %86
>  %90 = fcmp uge float %89, 0.000000e+00
>  %91 = select i1 %90, float 1.000000e+00, float 0.000000e+00
>  %92 = fsub float -0.000000e+00, %91
>  %93 = fptosi float %92 to i32
>  %94 = bitcast i32 %93 to float
>  %95 = bitcast float %94 to i32
>  %96 = icmp ne i32 %95, 0
>  %. = select i1 %96, float 1.000000e+00, float %88
>  %97 = fmul float %68, %47
>  %98 = fsub float -0.000000e+00, %41
>  %99 = fmul float %97, %.
>  %100 = fadd float %99, %98
>  %101 = fcmp uge float %100, %45
>  %102 = select i1 %101, float %45, float %100
>  %103 = call float @llvm.AMDIL.clamp.(float %102, float 0.000000e+00, float 1.000000e+00)
>  %104 = fsub float -0.000000e+00, %103
>  %105 = fmul float %103, %104
>  %106 = fadd float %105, %103
>  %107 = fmul float %106, %31
>  %108 = fmul float %103, %103
>  %109 = fadd float %108, %107
>  %110 = fmul float %78, %29
>  %111 = fmul float %75, %23
>  %112 = fmul float %76, %25
>  %113 = fmul float %77, %27
>  %114 = fsub float -0.000000e+00, %110
>  %115 = fmul float %110, %67
>  %116 = fadd float %115, %114
>  %117 = fmul float %111, %64
>  %118 = fmul float %112, %65
>  %119 = fmul float %113, %66
>  %120 = fmul float %37, %116
>  %121 = fadd float %120, %110
>  %122 = fsub float -0.000000e+00, %57
>  %123 = fmul float %117, %122
>  %124 = fadd float %123, %49
>  %125 = fsub float -0.000000e+00, %57
>  %126 = fmul float %118, %125
>  %127 = fadd float %126, %51
>  %128 = fsub float -0.000000e+00, %57
>  %129 = fmul float %119, %128
>  %130 = fadd float %129, %53
>  %131 = fsub float -0.000000e+00, %121
>  %132 = fadd float %103, %131
>  %133 = fmul float %35, %132
>  %134 = fadd float %133, %121
>  %135 = fmul float %109, %124
>  %136 = fmul float %109, %127
>  %137 = fmul float %109, %130
>  %138 = fsub float -0.000000e+00, %134
>  %139 = fmul float %68, %55
>  %140 = fadd float %139, %138
>  %141 = fmul float %117, %57
>  %142 = fadd float %141, %135
>  %143 = fmul float %118, %57
>  %144 = fadd float %143, %136
>  %145 = fmul float %119, %57
>  %146 = fadd float %145, %137
>  %147 = fmul float %33, %140
>  %148 = fadd float %147, %134
>  %149 = fcmp uge float %148, 0x3FDFDFE000000000
>  %150 = sext i1 %149 to i32
>  %151 = trunc i32 %150 to i1
>  %152 = select i1 %151, float 1.000000e+00, float -1.000000e+00
>  call void @llvm.AMDGPU.kill(float %152)
>  %153 = call i32 @llvm.SI.packf16(float %142, float %144)
>  %154 = bitcast i32 %153 to float
>  %155 = call i32 @llvm.SI.packf16(float %146, float %148)
>  %156 = bitcast i32 %155 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %154, float %156, float %154, float %156)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.AMDGPU.kill(float)
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430202
>c0400100
>bf8c0070
>c0010107
>bf8c007f
>100c0a02
>c81c0700
>c81d0701
>100e0f06
>080e0d07
>c0010133
>bf8c007f
>d2820006
>041a0e02
>c81c0e00
>c81d0e01
>c0010130
>c0018155
>bf8c007f
>7e100203
>d2100008
>02021002
>08100f08
>c0018152
>bf8c007f
>7e120203
>d2100009
>02021202
>08120f09
>7e0e5509
>100e0f08
>d2060807
>02010107
>10101309
>d2060008
>22010108
>d00c0004
>02010108
>d2000008
>0011e480
>d2060008
>22010108
>7e101108
>d10a0004
>02010108
>d2000008
>0011e507
>c81c0a00
>c81d0a01
>c0018157
>bf8c007f
>10120e03
>10101109
>c0018154
>bf8c007f
>0a101003
>c0018156
>bf8c007f
>d00c0004
>02000708
>7e120203
>d2000008
>00121308
>d2060808
>02010108
>08120d08
>c0018132
>bf8c007f
>d2820006
>041a1203
>c0018177
>bf8c007f
>100e0e03
>080e0d07
>c0018131
>bf8c007f
>d2820007
>041a0e03
>7e0c02ff
>3efeff00
>d00c0004
>02020d07
>d2000006
>0011e4f3
>7c260c80
>100c1108
>080c0d08
>100c0c02
>d2820006
>041a1108
>c0010106
>bf8c007f
>10100802
>c8240600
>c8250601
>10101308
>c0010178
>bf8c007f
>10121002
>c0018176
>bf8c007f
>08121203
>10121306
>d2820008
>04240508
>5e0e0f08
>c0018105
>bf8c007f
>10100603
>c8240500
>c8250501
>10101308
>10121002
>c0018175
>bf8c007f
>08121203
>10121306
>d2820008
>04240508
>c0018104
>bf8c007f
>10040403
>c80c0400
>c80d0401
>10000702
>10020002
>c0000174
>bf8c007f
>08020200
>10020306
>d2820000
>04040500
>5e001100
>f8001c0f
>07000700
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL IN[4]
>DCL IN[5]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL OUT[3], GENERIC[20]
>DCL OUT[4], GENERIC[21]
>DCL OUT[5], GENERIC[22]
>DCL CONST[0..57]
>DCL TEMP[0..7], LOCAL
>IMM[0] FLT32 { -128.0000,     1.0000,   -64.0000,    -2.0000}
>IMM[1] FLT32 {   -0.0159,     0.0159,     2.2000,     0.0000}
>  0: ADD TEMP[0].xyz, IN[2].xyzz, IN[2].xyzz
>  1: LG2 TEMP[0].x, TEMP[0].xxxx
>  2: LG2 TEMP[1].x, TEMP[0].yyyy
>  3: MOV TEMP[0].y, TEMP[1].xxxx
>  4: LG2 TEMP[2].x, TEMP[0].zzzz
>  5: MOV TEMP[0].z, TEMP[2].xxxx
>  6: MUL TEMP[0].xyz, TEMP[0].xyzz, IMM[1].zzzz
>  7: EX2 TEMP[3].x, TEMP[0].xxxx
>  8: EX2 TEMP[4].x, TEMP[0].yyyy
>  9: MOV TEMP[3].y, TEMP[4].xxxx
> 10: EX2 TEMP[4].x, TEMP[0].zzzz
> 11: MOV TEMP[3].z, TEMP[4].xxxx
> 12: DP4 TEMP[4].x, IN[3], CONST[48]
> 13: DP4 TEMP[5].x, IN[3], CONST[49]
> 14: MOV TEMP[4].y, TEMP[5].xxxx
> 15: MAD TEMP[0].xyz, IN[4].xyzz, CONST[3].xxxx, IN[0].xyzz
> 16: MOV TEMP[0].w, IN[0].wwww
> 17: DP4 TEMP[1].x, TEMP[0], CONST[54]
> 18: DP4 TEMP[5].x, TEMP[0], CONST[55]
> 19: MOV TEMP[1].y, TEMP[5].xxxx
> 20: DP4 TEMP[5].x, TEMP[0], CONST[56]
> 21: MOV TEMP[1].z, TEMP[5].xxxx
> 22: MOV TEMP[1].w, CONST[0].yyyy
> 23: DP4 TEMP[6].x, TEMP[1], CONST[10]
> 24: MOV TEMP[0].z, TEMP[6].xxxx
> 25: DP4 TEMP[0].x, TEMP[1], CONST[8]
> 26: DP4 TEMP[6].x, TEMP[1], CONST[9]
> 27: MOV TEMP[0].y, TEMP[6].xxxx
> 28: DP4 TEMP[6].x, TEMP[1], CONST[11]
> 29: MOV TEMP[0].w, TEMP[6].xxxx
> 30: ADD TEMP[2].x, -TEMP[5].xxxx, CONST[2].wzzz
> 31: MAX TEMP[5].x, TEMP[2].xxxx, CONST[0].xxxx
> 32: MOV TEMP[2].w, TEMP[5].xxxx
> 33: DP4 TEMP[5].x, TEMP[1], CONST[13]
> 34: MOV TEMP[2].z, TEMP[5].xxxx
> 35: MOV TEMP[1].xyz, TEMP[1].xyzx
> 36: MOV TEMP[6], TEMP[0]
> 37: MOV TEMP[7].xy, TEMP[0].xyxx
> 38: MOV TEMP[3].w, CONST[0].xxxx
> 39: MOV TEMP[7].zw, TEMP[2].wwzw
> 40: MOV TEMP[1].w, TEMP[5].xxxx
> 41: MOV TEMP[2], TEMP[6]
> 42: MAD TEMP[5].x, TEMP[0].zzzz, CONST[0].zzzz, -TEMP[0].wwww
> 43: MOV TEMP[6].z, TEMP[5].xxxx
> 44: MOV TEMP[6].y, -TEMP[0].yyyy
> 45: MAD TEMP[6].xy, CONST[57].xyyy, TEMP[0].wwww, TEMP[6].xyyy
> 46: MOV OUT[2], TEMP[4]
> 47: MOV OUT[3], TEMP[3]
> 48: MOV OUT[0], TEMP[6]
> 49: MOV OUT[1], TEMP[2]
> 50: MOV OUT[4], TEMP[7]
> 51: MOV OUT[5], TEMP[1]
> 52: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 11
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 12
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 32
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 33
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 34
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 35
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 36
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 37
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 38
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 39
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 40
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 41
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 42
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 43
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 44
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 45
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 46
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 47
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 52
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 53
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 54
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 55
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 192
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 193
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 194
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 195
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 196
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 197
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 198
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 199
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 216
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 217
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 218
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 219
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 220
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 221
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 222
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 223
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 224
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr float addrspace(2)* %10, i32 225
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = getelementptr float addrspace(2)* %10, i32 226
>  %98 = load float addrspace(2)* %97, !tbaa !0
>  %99 = getelementptr float addrspace(2)* %10, i32 227
>  %100 = load float addrspace(2)* %99, !tbaa !0
>  %101 = getelementptr float addrspace(2)* %10, i32 228
>  %102 = load float addrspace(2)* %101, !tbaa !0
>  %103 = getelementptr float addrspace(2)* %10, i32 229
>  %104 = load float addrspace(2)* %103, !tbaa !0
>  %105 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %106 = load <16 x i8> addrspace(2)* %105, !tbaa !0
>  %107 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %106, i32 0, i32 %5)
>  %108 = extractelement <4 x float> %107, i32 0
>  %109 = extractelement <4 x float> %107, i32 1
>  %110 = extractelement <4 x float> %107, i32 2
>  %111 = extractelement <4 x float> %107, i32 3
>  %112 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %113 = load <16 x i8> addrspace(2)* %112, !tbaa !0
>  %114 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %113, i32 0, i32 %5)
>  %115 = extractelement <4 x float> %114, i32 0
>  %116 = extractelement <4 x float> %114, i32 1
>  %117 = extractelement <4 x float> %114, i32 2
>  %118 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %119 = load <16 x i8> addrspace(2)* %118, !tbaa !0
>  %120 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %119, i32 0, i32 %5)
>  %121 = extractelement <4 x float> %120, i32 0
>  %122 = extractelement <4 x float> %120, i32 1
>  %123 = extractelement <4 x float> %120, i32 2
>  %124 = extractelement <4 x float> %120, i32 3
>  %125 = getelementptr <16 x i8> addrspace(2)* %3, i32 4
>  %126 = load <16 x i8> addrspace(2)* %125, !tbaa !0
>  %127 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %126, i32 0, i32 %5)
>  %128 = extractelement <4 x float> %127, i32 0
>  %129 = extractelement <4 x float> %127, i32 1
>  %130 = extractelement <4 x float> %127, i32 2
>  %131 = fadd float %115, %115
>  %132 = fadd float %116, %116
>  %133 = fadd float %117, %117
>  %134 = call float @llvm.log2.f32(float %131)
>  %135 = call float @llvm.log2.f32(float %132)
>  %136 = call float @llvm.log2.f32(float %133)
>  %137 = fmul float %134, 0x40019999A0000000
>  %138 = fmul float %135, 0x40019999A0000000
>  %139 = fmul float %136, 0x40019999A0000000
>  %140 = call float @llvm.AMDIL.exp.(float %137)
>  %141 = call float @llvm.AMDIL.exp.(float %138)
>  %142 = call float @llvm.AMDIL.exp.(float %139)
>  %143 = fmul float %121, %62
>  %144 = fmul float %122, %64
>  %145 = fadd float %143, %144
>  %146 = fmul float %123, %66
>  %147 = fadd float %145, %146
>  %148 = fmul float %124, %68
>  %149 = fadd float %147, %148
>  %150 = fmul float %121, %70
>  %151 = fmul float %122, %72
>  %152 = fadd float %150, %151
>  %153 = fmul float %123, %74
>  %154 = fadd float %152, %153
>  %155 = fmul float %124, %76
>  %156 = fadd float %154, %155
>  %157 = fmul float %128, %20
>  %158 = fadd float %157, %108
>  %159 = fmul float %129, %20
>  %160 = fadd float %159, %109
>  %161 = fmul float %130, %20
>  %162 = fadd float %161, %110
>  %163 = fmul float %158, %78
>  %164 = fmul float %160, %80
>  %165 = fadd float %163, %164
>  %166 = fmul float %162, %82
>  %167 = fadd float %165, %166
>  %168 = fmul float %111, %84
>  %169 = fadd float %167, %168
>  %170 = fmul float %158, %86
>  %171 = fmul float %160, %88
>  %172 = fadd float %170, %171
>  %173 = fmul float %162, %90
>  %174 = fadd float %172, %173
>  %175 = fmul float %111, %92
>  %176 = fadd float %174, %175
>  %177 = fmul float %158, %94
>  %178 = fmul float %160, %96
>  %179 = fadd float %177, %178
>  %180 = fmul float %162, %98
>  %181 = fadd float %179, %180
>  %182 = fmul float %111, %100
>  %183 = fadd float %181, %182
>  %184 = fmul float %169, %38
>  %185 = fmul float %176, %40
>  %186 = fadd float %184, %185
>  %187 = fmul float %183, %42
>  %188 = fadd float %186, %187
>  %189 = fmul float %14, %44
>  %190 = fadd float %188, %189
>  %191 = fmul float %169, %22
>  %192 = fmul float %176, %24
>  %193 = fadd float %191, %192
>  %194 = fmul float %183, %26
>  %195 = fadd float %193, %194
>  %196 = fmul float %14, %28
>  %197 = fadd float %195, %196
>  %198 = fmul float %169, %30
>  %199 = fmul float %176, %32
>  %200 = fadd float %198, %199
>  %201 = fmul float %183, %34
>  %202 = fadd float %200, %201
>  %203 = fmul float %14, %36
>  %204 = fadd float %202, %203
>  %205 = fmul float %169, %46
>  %206 = fmul float %176, %48
>  %207 = fadd float %205, %206
>  %208 = fmul float %183, %50
>  %209 = fadd float %207, %208
>  %210 = fmul float %14, %52
>  %211 = fadd float %209, %210
>  %212 = fsub float -0.000000e+00, %183
>  %213 = fadd float %212, %18
>  %214 = fcmp uge float %213, %12
>  %215 = select i1 %214, float %213, float %12
>  %216 = fmul float %169, %54
>  %217 = fmul float %176, %56
>  %218 = fadd float %216, %217
>  %219 = fmul float %183, %58
>  %220 = fadd float %218, %219
>  %221 = fmul float %14, %60
>  %222 = fadd float %220, %221
>  %223 = fsub float -0.000000e+00, %211
>  %224 = fmul float %190, %16
>  %225 = fadd float %224, %223
>  %226 = fsub float -0.000000e+00, %204
>  %227 = fmul float %102, %211
>  %228 = fadd float %227, %197
>  %229 = fmul float %104, %211
>  %230 = fadd float %229, %226
>  %231 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %232 = load float addrspace(2)* addrspace(2)* %231, !tbaa !0
>  %233 = getelementptr float addrspace(2)* %232, i32 0
>  %234 = load float addrspace(2)* %233, !tbaa !0
>  %235 = fmul float %234, %197
>  %236 = getelementptr float addrspace(2)* %232, i32 1
>  %237 = load float addrspace(2)* %236, !tbaa !0
>  %238 = fmul float %237, %204
>  %239 = fadd float %235, %238
>  %240 = getelementptr float addrspace(2)* %232, i32 2
>  %241 = load float addrspace(2)* %240, !tbaa !0
>  %242 = fmul float %241, %190
>  %243 = fadd float %239, %242
>  %244 = getelementptr float addrspace(2)* %232, i32 3
>  %245 = load float addrspace(2)* %244, !tbaa !0
>  %246 = fmul float %245, %211
>  %247 = fadd float %243, %246
>  %248 = getelementptr float addrspace(2)* %232, i32 4
>  %249 = load float addrspace(2)* %248, !tbaa !0
>  %250 = fmul float %249, %197
>  %251 = getelementptr float addrspace(2)* %232, i32 5
>  %252 = load float addrspace(2)* %251, !tbaa !0
>  %253 = fmul float %252, %204
>  %254 = fadd float %250, %253
>  %255 = getelementptr float addrspace(2)* %232, i32 6
>  %256 = load float addrspace(2)* %255, !tbaa !0
>  %257 = fmul float %256, %190
>  %258 = fadd float %254, %257
>  %259 = getelementptr float addrspace(2)* %232, i32 7
>  %260 = load float addrspace(2)* %259, !tbaa !0
>  %261 = fmul float %260, %211
>  %262 = fadd float %258, %261
>  %263 = getelementptr float addrspace(2)* %232, i32 8
>  %264 = load float addrspace(2)* %263, !tbaa !0
>  %265 = fmul float %264, %197
>  %266 = getelementptr float addrspace(2)* %232, i32 9
>  %267 = load float addrspace(2)* %266, !tbaa !0
>  %268 = fmul float %267, %204
>  %269 = fadd float %265, %268
>  %270 = getelementptr float addrspace(2)* %232, i32 10
>  %271 = load float addrspace(2)* %270, !tbaa !0
>  %272 = fmul float %271, %190
>  %273 = fadd float %269, %272
>  %274 = getelementptr float addrspace(2)* %232, i32 11
>  %275 = load float addrspace(2)* %274, !tbaa !0
>  %276 = fmul float %275, %211
>  %277 = fadd float %273, %276
>  %278 = getelementptr float addrspace(2)* %232, i32 12
>  %279 = load float addrspace(2)* %278, !tbaa !0
>  %280 = fmul float %279, %197
>  %281 = getelementptr float addrspace(2)* %232, i32 13
>  %282 = load float addrspace(2)* %281, !tbaa !0
>  %283 = fmul float %282, %204
>  %284 = fadd float %280, %283
>  %285 = getelementptr float addrspace(2)* %232, i32 14
>  %286 = load float addrspace(2)* %285, !tbaa !0
>  %287 = fmul float %286, %190
>  %288 = fadd float %284, %287
>  %289 = getelementptr float addrspace(2)* %232, i32 15
>  %290 = load float addrspace(2)* %289, !tbaa !0
>  %291 = fmul float %290, %211
>  %292 = fadd float %288, %291
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %247, float %262, float %277, float %292)
>  %293 = getelementptr float addrspace(2)* %232, i32 16
>  %294 = load float addrspace(2)* %293, !tbaa !0
>  %295 = fmul float %294, %197
>  %296 = getelementptr float addrspace(2)* %232, i32 17
>  %297 = load float addrspace(2)* %296, !tbaa !0
>  %298 = fmul float %297, %204
>  %299 = fadd float %295, %298
>  %300 = getelementptr float addrspace(2)* %232, i32 18
>  %301 = load float addrspace(2)* %300, !tbaa !0
>  %302 = fmul float %301, %190
>  %303 = fadd float %299, %302
>  %304 = getelementptr float addrspace(2)* %232, i32 19
>  %305 = load float addrspace(2)* %304, !tbaa !0
>  %306 = fmul float %305, %211
>  %307 = fadd float %303, %306
>  %308 = getelementptr float addrspace(2)* %232, i32 20
>  %309 = load float addrspace(2)* %308, !tbaa !0
>  %310 = fmul float %309, %197
>  %311 = getelementptr float addrspace(2)* %232, i32 21
>  %312 = load float addrspace(2)* %311, !tbaa !0
>  %313 = fmul float %312, %204
>  %314 = fadd float %310, %313
>  %315 = getelementptr float addrspace(2)* %232, i32 22
>  %316 = load float addrspace(2)* %315, !tbaa !0
>  %317 = fmul float %316, %190
>  %318 = fadd float %314, %317
>  %319 = getelementptr float addrspace(2)* %232, i32 23
>  %320 = load float addrspace(2)* %319, !tbaa !0
>  %321 = fmul float %320, %211
>  %322 = fadd float %318, %321
>  %323 = getelementptr float addrspace(2)* %232, i32 24
>  %324 = load float addrspace(2)* %323, !tbaa !0
>  %325 = fmul float %324, %197
>  %326 = getelementptr float addrspace(2)* %232, i32 25
>  %327 = load float addrspace(2)* %326, !tbaa !0
>  %328 = fmul float %327, %204
>  %329 = fadd float %325, %328
>  %330 = getelementptr float addrspace(2)* %232, i32 26
>  %331 = load float addrspace(2)* %330, !tbaa !0
>  %332 = fmul float %331, %190
>  %333 = fadd float %329, %332
>  %334 = getelementptr float addrspace(2)* %232, i32 27
>  %335 = load float addrspace(2)* %334, !tbaa !0
>  %336 = fmul float %335, %211
>  %337 = fadd float %333, %336
>  %338 = getelementptr float addrspace(2)* %232, i32 28
>  %339 = load float addrspace(2)* %338, !tbaa !0
>  %340 = fmul float %339, %197
>  %341 = getelementptr float addrspace(2)* %232, i32 29
>  %342 = load float addrspace(2)* %341, !tbaa !0
>  %343 = fmul float %342, %204
>  %344 = fadd float %340, %343
>  %345 = getelementptr float addrspace(2)* %232, i32 30
>  %346 = load float addrspace(2)* %345, !tbaa !0
>  %347 = fmul float %346, %190
>  %348 = fadd float %344, %347
>  %349 = getelementptr float addrspace(2)* %232, i32 31
>  %350 = load float addrspace(2)* %349, !tbaa !0
>  %351 = fmul float %350, %211
>  %352 = fadd float %348, %351
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %307, float %322, float %337, float %352)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %149, float %156, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %140, float %141, float %142, float %12)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %197, float %204, float %222, float %215)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %169, float %176, float %183, float %222)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %228, float %230, float %225, float %211)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: nounwind readonly
>declare float @llvm.log2.f32(float) #2
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.exp.(float) #3
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { nounwind readonly }
>attributes #3 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840700
>bf8c007f
>e00c2000
>80020300
>c0840710
>bf8c0070
>e00c2000
>80020900
>c0410100
>bf8c0070
>c002030c
>bf8c007f
>d2820007
>040c0909
>d2820008
>0410090a
>c00283d9
>bf8c007f
>10021005
>c00283d8
>bf8c007f
>d2820001
>04040b07
>d2820009
>0414090b
>c00203da
>bf8c007f
>d2820001
>04040909
>c00203db
>bf8c007f
>d2820001
>04040906
>c00203dd
>bf8c007f
>10041004
>c00203dc
>bf8c007f
>d2820002
>04080907
>c00203de
>bf8c007f
>d2820002
>04080909
>c00203df
>bf8c007f
>d2820002
>04080906
>c0020321
>bf8c007f
>10140404
>c0020320
>bf8c007f
>d282000a
>04280901
>c00203e1
>bf8c007f
>10101004
>c00203e0
>bf8c007f
>d2820007
>04200907
>c00203e2
>bf8c007f
>d2820007
>041c0909
>c00203e3
>bf8c007f
>d2820003
>041c0906
>c0020322
>bf8c007f
>d2820004
>04280903
>c0020301
>c0028323
>bf8c007f
>7e0a0205
>d2820004
>04120a04
>c0028325
>bf8c007f
>100a0405
>c0028324
>bf8c007f
>d2820005
>04140b01
>c0028326
>bf8c007f
>d2820005
>04140b03
>c0028327
>bf8c007f
>7e0c0205
>d2820005
>04160c04
>c0400102
>bf8c007f
>c002810d
>bf8c007f
>100c0a05
>c002810c
>bf8c007f
>d2820007
>041a0805
>c0028329
>bf8c007f
>100c0405
>c0028328
>bf8c007f
>d2820006
>04180b01
>c002832a
>bf8c007f
>d2820006
>04180b03
>c002832b
>bf8c007f
>7e100205
>d2820006
>041a1004
>c002810e
>bf8c007f
>d2820008
>041e0c05
>c002832d
>bf8c007f
>100e0405
>c002832c
>bf8c007f
>d2820007
>041c0b01
>c002832e
>bf8c007f
>d2820007
>041c0b03
>c002832f
>bf8c007f
>7e120205
>d2820007
>041e1204
>c002810f
>bf8c007f
>d2820008
>04220e05
>c0028109
>bf8c007f
>10120a05
>c0028108
>bf8c007f
>d2820009
>04260805
>c002810a
>bf8c007f
>d2820009
>04260c05
>c002810b
>bf8c007f
>d2820009
>04260e05
>c0028105
>bf8c007f
>10140a05
>c0028104
>bf8c007f
>d282000a
>042a0805
>c0028106
>bf8c007f
>d282000a
>042a0c05
>c0028107
>bf8c007f
>d282000a
>042a0e05
>c0028101
>bf8c007f
>10160a05
>c0028100
>bf8c007f
>d282000b
>042e0805
>c0028102
>bf8c007f
>d282000b
>042e0c05
>c0028103
>bf8c007f
>d282000b
>042e0e05
>f80000ef
>08090a0b
>c002811d
>bf8c000f
>10100a05
>c002811c
>bf8c007f
>d2820008
>04220805
>c002811e
>bf8c007f
>d2820008
>04220c05
>c002811f
>bf8c007f
>d2820008
>04220e05
>c0028119
>bf8c007f
>10120a05
>c0028118
>bf8c007f
>d2820009
>04260805
>c002811a
>bf8c007f
>d2820009
>04260c05
>c002811b
>bf8c007f
>d2820009
>04260e05
>c0028115
>bf8c007f
>10140a05
>c0028114
>bf8c007f
>d282000a
>042a0805
>c0028116
>bf8c007f
>d282000a
>042a0c05
>c0028117
>bf8c007f
>d282000a
>042a0e05
>c0028111
>bf8c007f
>10160a05
>c0028110
>bf8c007f
>d282000b
>042e0805
>c0028112
>bf8c007f
>d282000b
>042e0c05
>c0000113
>bf8c007f
>d282000b
>042e0e00
>f80000ff
>08090a0b
>c084070c
>bf8c000f
>e00c2000
>80020800
>c00003c5
>bf8c0070
>10181200
>c00003c4
>bf8c007f
>d282000c
>04300108
>c00003c6
>bf8c007f
>d282000c
>0430010a
>c00003c7
>bf8c007f
>d282000c
>0430010b
>c00003c1
>bf8c007f
>101a1200
>c00003c0
>bf8c007f
>d282000d
>04340108
>c00003c2
>bf8c007f
>d282000d
>0434010a
>c00003c3
>bf8c007f
>d2820008
>0434010b
>7e120280
>f800020f
>09090c08
>c0840708
>bf8c000f
>e00c2000
>80020800
>bf8c0770
>0600150a
>7e004f00
>100000ff
>400ccccd
>7e004b00
>06181309
>7e184f0c
>101818ff
>400ccccd
>7e184b0c
>06101108
>7e104f08
>101010ff
>400ccccd
>7e104b08
>c0000300
>bf8c007f
>7e120200
>f800021f
>09000c08
>c000830b
>bf8c000f
>08000601
>d00c0006
>02000100
>7e100200
>d2000000
>001a0108
>c0000335
>bf8c007f
>10100400
>c0000334
>bf8c007f
>d2820008
>04200101
>c0000336
>bf8c007f
>d2820008
>04200103
>c0000337
>bf8c007f
>7e120200
>d2820008
>04221204
>f800022f
>00080504
>f800023f
>08030201
>c00003e4
>bf8c000f
>d2820000
>04120e00
>c0000302
>bf8c007f
>10020c00
>08020f01
>c00003e5
>bf8c007f
>10040e00
>08040b02
>f80008cf
>07010200
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL IN[2], GENERIC[21], PERSPECTIVE
>DCL IN[3], GENERIC[22], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL CONST[0..30]
>DCL TEMP[0..5], LOCAL
>DCL TEMP[6], ARRAY(1), LOCAL
>IMM[0] FLT32 {    0.0000,     1.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MAD TEMP[1].x, CONST[12].xxxx, CONST[21].yyyy, -IN[3].zzzz
>  3: MAD TEMP[2].x, CONST[12].xxxx, CONST[20].zzzz, -IN[3].zzzz
>  4: RCP TEMP[3].x, TEMP[2].xxxx
>  5: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
>  6: MUL TEMP[3].x, TEMP[1].xxxx, TEMP[3].xxxx
>  7: MOV_SAT TEMP[3].x, TEMP[3].xxxx
>  8: SGE TEMP[2].x, -TEMP[2].xxxx, IMM[0].xxxx
>  9: F2I TEMP[2].x, -TEMP[2]
> 10: UIF TEMP[2].xxxx :0
> 11:   MOV TEMP[2].x, IMM[0].yyyy
> 12: ELSE :0
> 13:   MOV TEMP[2].x, TEMP[3].xxxx
> 14: ENDIF
> 15: MUL TEMP[3].x, IN[2].zzzz, CONST[21].wwww
> 16: MAD TEMP[2].x, TEMP[3].xxxx, TEMP[2].xxxx, -CONST[21].xxxx
> 17: MIN TEMP[2].x, TEMP[2].xxxx, CONST[21].zzzz
> 18: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 19: MAD TEMP[3].x, TEMP[2].xxxx, -TEMP[2].xxxx, TEMP[2].xxxx
> 20: MUL TEMP[3].x, TEMP[3].xxxx, CONST[12].xxxx
> 21: MAD TEMP[3].x, TEMP[2].xxxx, TEMP[2].xxxx, TEMP[3].xxxx
> 22: MUL TEMP[4].x, TEMP[0].wwww, CONST[1].wwww
> 23: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[1].xyzz
> 24: MAD TEMP[5].x, TEMP[4].xxxx, IN[1].wwww, -TEMP[4].xxxx
> 25: MUL TEMP[0].xyz, TEMP[0].xyzz, IN[1].xyzz
> 26: MAD TEMP[4].x, CONST[12].wwww, TEMP[5].xxxx, TEMP[4].xxxx
> 27: MAD TEMP[1].xyz, TEMP[0].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 28: ADD TEMP[2].x, TEMP[2].xxxx, -TEMP[4].xxxx
> 29: MAD TEMP[2].x, CONST[12].zzzz, TEMP[2].xxxx, TEMP[4].xxxx
> 30: MUL TEMP[1].xyz, TEMP[3].xxxx, TEMP[1].xyzz
> 31: MAD TEMP[3].x, IN[2].zzzz, CONST[29].wwww, -TEMP[2].xxxx
> 32: MAD TEMP[0].xyz, TEMP[0].xyzz, CONST[30].xxxx, TEMP[1].xyzz
> 33: MAD TEMP[1].x, CONST[12].yyyy, TEMP[3].xxxx, TEMP[2].xxxx
> 34: MOV TEMP[0].w, TEMP[1].xxxx
> 35: MOV TEMP[6], TEMP[0]
> 36: MOV OUT[0], TEMP[6]
> 37: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 4
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 5
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 6
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 7
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 48
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 49
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 50
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 51
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 82
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 84
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 85
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr float addrspace(2)* %21, i32 86
>  %45 = load float addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr float addrspace(2)* %21, i32 87
>  %47 = load float addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr float addrspace(2)* %21, i32 116
>  %49 = load float addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr float addrspace(2)* %21, i32 117
>  %51 = load float addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr float addrspace(2)* %21, i32 118
>  %53 = load float addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr float addrspace(2)* %21, i32 119
>  %55 = load float addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr float addrspace(2)* %21, i32 120
>  %57 = load float addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %59 = load <32 x i8> addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %61 = load <16 x i8> addrspace(2)* %60, !tbaa !0
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %64 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %65 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %66 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %3, <2 x i32> %5)
>  %67 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %3, <2 x i32> %5)
>  %68 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %3, <2 x i32> %5)
>  %69 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %3, <2 x i32> %5)
>  %70 = bitcast float %62 to i32
>  %71 = bitcast float %63 to i32
>  %72 = insertelement <2 x i32> undef, i32 %70, i32 0
>  %73 = insertelement <2 x i32> %72, i32 %71, i32 1
>  %74 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %73, <32 x i8> %59, <16 x i8> %61, i32 2)
>  %75 = extractelement <4 x float> %74, i32 0
>  %76 = extractelement <4 x float> %74, i32 1
>  %77 = extractelement <4 x float> %74, i32 2
>  %78 = extractelement <4 x float> %74, i32 3
>  %79 = fsub float -0.000000e+00, %69
>  %80 = fmul float %31, %43
>  %81 = fadd float %80, %79
>  %82 = fsub float -0.000000e+00, %69
>  %83 = fmul float %31, %39
>  %84 = fadd float %83, %82
>  %85 = fdiv float 1.000000e+00, %84
>  %86 = fmul float %84, %84
>  %87 = fmul float %81, %85
>  %88 = call float @llvm.AMDIL.clamp.(float %87, float 0.000000e+00, float 1.000000e+00)
>  %89 = fsub float -0.000000e+00, %86
>  %90 = fcmp uge float %89, 0.000000e+00
>  %91 = select i1 %90, float 1.000000e+00, float 0.000000e+00
>  %92 = fsub float -0.000000e+00, %91
>  %93 = fptosi float %92 to i32
>  %94 = bitcast i32 %93 to float
>  %95 = bitcast float %94 to i32
>  %96 = icmp ne i32 %95, 0
>  %. = select i1 %96, float 1.000000e+00, float %88
>  %97 = fmul float %68, %47
>  %98 = fsub float -0.000000e+00, %41
>  %99 = fmul float %97, %.
>  %100 = fadd float %99, %98
>  %101 = fcmp uge float %100, %45
>  %102 = select i1 %101, float %45, float %100
>  %103 = call float @llvm.AMDIL.clamp.(float %102, float 0.000000e+00, float 1.000000e+00)
>  %104 = fsub float -0.000000e+00, %103
>  %105 = fmul float %103, %104
>  %106 = fadd float %105, %103
>  %107 = fmul float %106, %31
>  %108 = fmul float %103, %103
>  %109 = fadd float %108, %107
>  %110 = fmul float %78, %29
>  %111 = fmul float %75, %23
>  %112 = fmul float %76, %25
>  %113 = fmul float %77, %27
>  %114 = fsub float -0.000000e+00, %110
>  %115 = fmul float %110, %67
>  %116 = fadd float %115, %114
>  %117 = fmul float %111, %64
>  %118 = fmul float %112, %65
>  %119 = fmul float %113, %66
>  %120 = fmul float %37, %116
>  %121 = fadd float %120, %110
>  %122 = fsub float -0.000000e+00, %57
>  %123 = fmul float %117, %122
>  %124 = fadd float %123, %49
>  %125 = fsub float -0.000000e+00, %57
>  %126 = fmul float %118, %125
>  %127 = fadd float %126, %51
>  %128 = fsub float -0.000000e+00, %57
>  %129 = fmul float %119, %128
>  %130 = fadd float %129, %53
>  %131 = fsub float -0.000000e+00, %121
>  %132 = fadd float %103, %131
>  %133 = fmul float %35, %132
>  %134 = fadd float %133, %121
>  %135 = fmul float %109, %124
>  %136 = fmul float %109, %127
>  %137 = fmul float %109, %130
>  %138 = fsub float -0.000000e+00, %134
>  %139 = fmul float %68, %55
>  %140 = fadd float %139, %138
>  %141 = fmul float %117, %57
>  %142 = fadd float %141, %135
>  %143 = fmul float %118, %57
>  %144 = fadd float %143, %136
>  %145 = fmul float %119, %57
>  %146 = fadd float %145, %137
>  %147 = fmul float %33, %140
>  %148 = fadd float %147, %134
>  %149 = call i32 @llvm.SI.packf16(float %142, float %144)
>  %150 = bitcast i32 %149 to float
>  %151 = call i32 @llvm.SI.packf16(float %146, float %148)
>  %152 = bitcast i32 %151 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %150, float %152, float %150, float %152)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430202
>c0400100
>bf8c0070
>c0010107
>bf8c007f
>100c0a02
>c81c0700
>c81d0701
>100e0f06
>080e0d07
>c0010133
>bf8c007f
>d2820006
>041a0e02
>c81c0e00
>c81d0e01
>c0010130
>c0018155
>bf8c007f
>7e100203
>d2100008
>02021002
>08100f08
>c0018152
>bf8c007f
>7e120203
>d2100009
>02021202
>08120f09
>7e0e5509
>100e0f08
>d2060807
>02010107
>10101309
>d2060008
>22010108
>d00c0004
>02010108
>d2000008
>0011e480
>d2060008
>22010108
>7e101108
>d10a0004
>02010108
>d2000008
>0011e507
>c81c0a00
>c81d0a01
>c0018157
>bf8c007f
>10120e03
>10101109
>c0018154
>bf8c007f
>0a101003
>c0018156
>bf8c007f
>d00c0004
>02000708
>7e120203
>d2000008
>00121308
>d2060808
>02010108
>08120d08
>c0018132
>bf8c007f
>d2820006
>041a1203
>c0018177
>bf8c007f
>100e0e03
>080e0d07
>c0018131
>bf8c007f
>d2820007
>041a0e03
>100c1108
>080c0d08
>100c0c02
>d2820006
>041a1108
>c0010106
>bf8c007f
>10100802
>c8240600
>c8250601
>10101308
>c0010178
>bf8c007f
>10121002
>c0018176
>bf8c007f
>08121203
>10121306
>d2820008
>04240508
>5e0e0f08
>c0018105
>bf8c007f
>10100603
>c8240500
>c8250501
>10101308
>10121002
>c0018175
>bf8c007f
>08121203
>10121306
>d2820008
>04240508
>c0018104
>bf8c007f
>10040403
>c80c0400
>c80d0401
>10000702
>10020002
>c0000174
>bf8c007f
>08020200
>10020306
>d2820000
>04040500
>5e001100
>f8001c0f
>07000700
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL OUT[3], GENERIC[20]
>DCL OUT[4], GENERIC[21]
>DCL OUT[5], GENERIC[22]
>DCL CONST[0..57]
>DCL TEMP[0..7], LOCAL
>IMM[0] FLT32 {    2.2000,     0.0000,     0.0000,     0.0000}
>  0: LG2 TEMP[0].x, IN[1].xxxx
>  1: LG2 TEMP[1].x, IN[1].yyyy
>  2: MOV TEMP[0].y, TEMP[1].xxxx
>  3: LG2 TEMP[1].x, IN[1].zzzz
>  4: MOV TEMP[0].z, TEMP[1].xxxx
>  5: MUL TEMP[0].xyz, TEMP[0].xyzz, IMM[0].xxxx
>  6: EX2 TEMP[1].x, TEMP[0].xxxx
>  7: EX2 TEMP[2].x, TEMP[0].yyyy
>  8: MOV TEMP[1].y, TEMP[2].xxxx
>  9: EX2 TEMP[2].x, TEMP[0].zzzz
> 10: MOV TEMP[1].z, TEMP[2].xxxx
> 11: DP4 TEMP[2].x, IN[2], CONST[48]
> 12: DP4 TEMP[3].x, IN[2], CONST[49]
> 13: MOV TEMP[2].y, TEMP[3].xxxx
> 14: MAD TEMP[0].xyz, IN[3].xyzz, CONST[3].xxxx, IN[0].xyzz
> 15: MOV TEMP[0].w, IN[0].wwww
> 16: DP4 TEMP[3].x, TEMP[0], CONST[54]
> 17: DP4 TEMP[4].x, TEMP[0], CONST[55]
> 18: MOV TEMP[3].y, TEMP[4].xxxx
> 19: DP4 TEMP[4].x, TEMP[0], CONST[56]
> 20: MOV TEMP[3].z, TEMP[4].xxxx
> 21: MOV TEMP[3].w, CONST[0].yyyy
> 22: DP4 TEMP[5].x, TEMP[3], CONST[10]
> 23: MOV TEMP[0].z, TEMP[5].xxxx
> 24: DP4 TEMP[0].x, TEMP[3], CONST[8]
> 25: DP4 TEMP[5].x, TEMP[3], CONST[9]
> 26: MOV TEMP[0].y, TEMP[5].xxxx
> 27: DP4 TEMP[5].x, TEMP[3], CONST[11]
> 28: MOV TEMP[0].w, TEMP[5].xxxx
> 29: ADD TEMP[4].x, -TEMP[4].xxxx, CONST[2].wzzz
> 30: MAX TEMP[5].x, TEMP[4].xxxx, CONST[0].xxxx
> 31: MOV TEMP[4].w, TEMP[5].xxxx
> 32: DP4 TEMP[5].x, TEMP[3], CONST[13]
> 33: MOV TEMP[4].z, TEMP[5].xxxx
> 34: MOV TEMP[3].xyz, TEMP[3].xyzx
> 35: MOV TEMP[6], TEMP[0]
> 36: MOV TEMP[7].xy, TEMP[0].xyxx
> 37: MOV TEMP[1].w, IN[1].wwww
> 38: MOV TEMP[7].zw, TEMP[4].wwzw
> 39: MOV TEMP[3].w, TEMP[5].xxxx
> 40: MOV TEMP[4], TEMP[6]
> 41: MAD TEMP[5].x, TEMP[0].zzzz, CONST[0].zzzz, -TEMP[0].wwww
> 42: MOV TEMP[6].z, TEMP[5].xxxx
> 43: MOV TEMP[6].y, -TEMP[0].yyyy
> 44: MAD TEMP[6].xy, CONST[57].xyyy, TEMP[0].wwww, TEMP[6].xyyy
> 45: MOV OUT[2], TEMP[2]
> 46: MOV OUT[3], TEMP[1]
> 47: MOV OUT[0], TEMP[6]
> 48: MOV OUT[1], TEMP[4]
> 49: MOV OUT[4], TEMP[7]
> 50: MOV OUT[5], TEMP[3]
> 51: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 11
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 12
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 32
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 33
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 34
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 35
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 36
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 37
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 38
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 39
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 40
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 41
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 42
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 43
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 44
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 45
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 46
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 47
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 52
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 53
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 54
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 55
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 192
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 193
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 194
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 195
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 196
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 197
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 198
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 199
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 216
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 217
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 218
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 219
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 220
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 221
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 222
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 223
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 224
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr float addrspace(2)* %10, i32 225
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = getelementptr float addrspace(2)* %10, i32 226
>  %98 = load float addrspace(2)* %97, !tbaa !0
>  %99 = getelementptr float addrspace(2)* %10, i32 227
>  %100 = load float addrspace(2)* %99, !tbaa !0
>  %101 = getelementptr float addrspace(2)* %10, i32 228
>  %102 = load float addrspace(2)* %101, !tbaa !0
>  %103 = getelementptr float addrspace(2)* %10, i32 229
>  %104 = load float addrspace(2)* %103, !tbaa !0
>  %105 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %106 = load <16 x i8> addrspace(2)* %105, !tbaa !0
>  %107 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %106, i32 0, i32 %5)
>  %108 = extractelement <4 x float> %107, i32 0
>  %109 = extractelement <4 x float> %107, i32 1
>  %110 = extractelement <4 x float> %107, i32 2
>  %111 = extractelement <4 x float> %107, i32 3
>  %112 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %113 = load <16 x i8> addrspace(2)* %112, !tbaa !0
>  %114 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %113, i32 0, i32 %5)
>  %115 = extractelement <4 x float> %114, i32 0
>  %116 = extractelement <4 x float> %114, i32 1
>  %117 = extractelement <4 x float> %114, i32 2
>  %118 = extractelement <4 x float> %114, i32 3
>  %119 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %120 = load <16 x i8> addrspace(2)* %119, !tbaa !0
>  %121 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %120, i32 0, i32 %5)
>  %122 = extractelement <4 x float> %121, i32 0
>  %123 = extractelement <4 x float> %121, i32 1
>  %124 = extractelement <4 x float> %121, i32 2
>  %125 = extractelement <4 x float> %121, i32 3
>  %126 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %127 = load <16 x i8> addrspace(2)* %126, !tbaa !0
>  %128 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %127, i32 0, i32 %5)
>  %129 = extractelement <4 x float> %128, i32 0
>  %130 = extractelement <4 x float> %128, i32 1
>  %131 = extractelement <4 x float> %128, i32 2
>  %132 = call float @llvm.log2.f32(float %115)
>  %133 = call float @llvm.log2.f32(float %116)
>  %134 = call float @llvm.log2.f32(float %117)
>  %135 = fmul float %132, 0x40019999A0000000
>  %136 = fmul float %133, 0x40019999A0000000
>  %137 = fmul float %134, 0x40019999A0000000
>  %138 = call float @llvm.AMDIL.exp.(float %135)
>  %139 = call float @llvm.AMDIL.exp.(float %136)
>  %140 = call float @llvm.AMDIL.exp.(float %137)
>  %141 = fmul float %122, %62
>  %142 = fmul float %123, %64
>  %143 = fadd float %141, %142
>  %144 = fmul float %124, %66
>  %145 = fadd float %143, %144
>  %146 = fmul float %125, %68
>  %147 = fadd float %145, %146
>  %148 = fmul float %122, %70
>  %149 = fmul float %123, %72
>  %150 = fadd float %148, %149
>  %151 = fmul float %124, %74
>  %152 = fadd float %150, %151
>  %153 = fmul float %125, %76
>  %154 = fadd float %152, %153
>  %155 = fmul float %129, %20
>  %156 = fadd float %155, %108
>  %157 = fmul float %130, %20
>  %158 = fadd float %157, %109
>  %159 = fmul float %131, %20
>  %160 = fadd float %159, %110
>  %161 = fmul float %156, %78
>  %162 = fmul float %158, %80
>  %163 = fadd float %161, %162
>  %164 = fmul float %160, %82
>  %165 = fadd float %163, %164
>  %166 = fmul float %111, %84
>  %167 = fadd float %165, %166
>  %168 = fmul float %156, %86
>  %169 = fmul float %158, %88
>  %170 = fadd float %168, %169
>  %171 = fmul float %160, %90
>  %172 = fadd float %170, %171
>  %173 = fmul float %111, %92
>  %174 = fadd float %172, %173
>  %175 = fmul float %156, %94
>  %176 = fmul float %158, %96
>  %177 = fadd float %175, %176
>  %178 = fmul float %160, %98
>  %179 = fadd float %177, %178
>  %180 = fmul float %111, %100
>  %181 = fadd float %179, %180
>  %182 = fmul float %167, %38
>  %183 = fmul float %174, %40
>  %184 = fadd float %182, %183
>  %185 = fmul float %181, %42
>  %186 = fadd float %184, %185
>  %187 = fmul float %14, %44
>  %188 = fadd float %186, %187
>  %189 = fmul float %167, %22
>  %190 = fmul float %174, %24
>  %191 = fadd float %189, %190
>  %192 = fmul float %181, %26
>  %193 = fadd float %191, %192
>  %194 = fmul float %14, %28
>  %195 = fadd float %193, %194
>  %196 = fmul float %167, %30
>  %197 = fmul float %174, %32
>  %198 = fadd float %196, %197
>  %199 = fmul float %181, %34
>  %200 = fadd float %198, %199
>  %201 = fmul float %14, %36
>  %202 = fadd float %200, %201
>  %203 = fmul float %167, %46
>  %204 = fmul float %174, %48
>  %205 = fadd float %203, %204
>  %206 = fmul float %181, %50
>  %207 = fadd float %205, %206
>  %208 = fmul float %14, %52
>  %209 = fadd float %207, %208
>  %210 = fsub float -0.000000e+00, %181
>  %211 = fadd float %210, %18
>  %212 = fcmp uge float %211, %12
>  %213 = select i1 %212, float %211, float %12
>  %214 = fmul float %167, %54
>  %215 = fmul float %174, %56
>  %216 = fadd float %214, %215
>  %217 = fmul float %181, %58
>  %218 = fadd float %216, %217
>  %219 = fmul float %14, %60
>  %220 = fadd float %218, %219
>  %221 = fsub float -0.000000e+00, %209
>  %222 = fmul float %188, %16
>  %223 = fadd float %222, %221
>  %224 = fsub float -0.000000e+00, %202
>  %225 = fmul float %102, %209
>  %226 = fadd float %225, %195
>  %227 = fmul float %104, %209
>  %228 = fadd float %227, %224
>  %229 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %230 = load float addrspace(2)* addrspace(2)* %229, !tbaa !0
>  %231 = getelementptr float addrspace(2)* %230, i32 0
>  %232 = load float addrspace(2)* %231, !tbaa !0
>  %233 = fmul float %232, %195
>  %234 = getelementptr float addrspace(2)* %230, i32 1
>  %235 = load float addrspace(2)* %234, !tbaa !0
>  %236 = fmul float %235, %202
>  %237 = fadd float %233, %236
>  %238 = getelementptr float addrspace(2)* %230, i32 2
>  %239 = load float addrspace(2)* %238, !tbaa !0
>  %240 = fmul float %239, %188
>  %241 = fadd float %237, %240
>  %242 = getelementptr float addrspace(2)* %230, i32 3
>  %243 = load float addrspace(2)* %242, !tbaa !0
>  %244 = fmul float %243, %209
>  %245 = fadd float %241, %244
>  %246 = getelementptr float addrspace(2)* %230, i32 4
>  %247 = load float addrspace(2)* %246, !tbaa !0
>  %248 = fmul float %247, %195
>  %249 = getelementptr float addrspace(2)* %230, i32 5
>  %250 = load float addrspace(2)* %249, !tbaa !0
>  %251 = fmul float %250, %202
>  %252 = fadd float %248, %251
>  %253 = getelementptr float addrspace(2)* %230, i32 6
>  %254 = load float addrspace(2)* %253, !tbaa !0
>  %255 = fmul float %254, %188
>  %256 = fadd float %252, %255
>  %257 = getelementptr float addrspace(2)* %230, i32 7
>  %258 = load float addrspace(2)* %257, !tbaa !0
>  %259 = fmul float %258, %209
>  %260 = fadd float %256, %259
>  %261 = getelementptr float addrspace(2)* %230, i32 8
>  %262 = load float addrspace(2)* %261, !tbaa !0
>  %263 = fmul float %262, %195
>  %264 = getelementptr float addrspace(2)* %230, i32 9
>  %265 = load float addrspace(2)* %264, !tbaa !0
>  %266 = fmul float %265, %202
>  %267 = fadd float %263, %266
>  %268 = getelementptr float addrspace(2)* %230, i32 10
>  %269 = load float addrspace(2)* %268, !tbaa !0
>  %270 = fmul float %269, %188
>  %271 = fadd float %267, %270
>  %272 = getelementptr float addrspace(2)* %230, i32 11
>  %273 = load float addrspace(2)* %272, !tbaa !0
>  %274 = fmul float %273, %209
>  %275 = fadd float %271, %274
>  %276 = getelementptr float addrspace(2)* %230, i32 12
>  %277 = load float addrspace(2)* %276, !tbaa !0
>  %278 = fmul float %277, %195
>  %279 = getelementptr float addrspace(2)* %230, i32 13
>  %280 = load float addrspace(2)* %279, !tbaa !0
>  %281 = fmul float %280, %202
>  %282 = fadd float %278, %281
>  %283 = getelementptr float addrspace(2)* %230, i32 14
>  %284 = load float addrspace(2)* %283, !tbaa !0
>  %285 = fmul float %284, %188
>  %286 = fadd float %282, %285
>  %287 = getelementptr float addrspace(2)* %230, i32 15
>  %288 = load float addrspace(2)* %287, !tbaa !0
>  %289 = fmul float %288, %209
>  %290 = fadd float %286, %289
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %245, float %260, float %275, float %290)
>  %291 = getelementptr float addrspace(2)* %230, i32 16
>  %292 = load float addrspace(2)* %291, !tbaa !0
>  %293 = fmul float %292, %195
>  %294 = getelementptr float addrspace(2)* %230, i32 17
>  %295 = load float addrspace(2)* %294, !tbaa !0
>  %296 = fmul float %295, %202
>  %297 = fadd float %293, %296
>  %298 = getelementptr float addrspace(2)* %230, i32 18
>  %299 = load float addrspace(2)* %298, !tbaa !0
>  %300 = fmul float %299, %188
>  %301 = fadd float %297, %300
>  %302 = getelementptr float addrspace(2)* %230, i32 19
>  %303 = load float addrspace(2)* %302, !tbaa !0
>  %304 = fmul float %303, %209
>  %305 = fadd float %301, %304
>  %306 = getelementptr float addrspace(2)* %230, i32 20
>  %307 = load float addrspace(2)* %306, !tbaa !0
>  %308 = fmul float %307, %195
>  %309 = getelementptr float addrspace(2)* %230, i32 21
>  %310 = load float addrspace(2)* %309, !tbaa !0
>  %311 = fmul float %310, %202
>  %312 = fadd float %308, %311
>  %313 = getelementptr float addrspace(2)* %230, i32 22
>  %314 = load float addrspace(2)* %313, !tbaa !0
>  %315 = fmul float %314, %188
>  %316 = fadd float %312, %315
>  %317 = getelementptr float addrspace(2)* %230, i32 23
>  %318 = load float addrspace(2)* %317, !tbaa !0
>  %319 = fmul float %318, %209
>  %320 = fadd float %316, %319
>  %321 = getelementptr float addrspace(2)* %230, i32 24
>  %322 = load float addrspace(2)* %321, !tbaa !0
>  %323 = fmul float %322, %195
>  %324 = getelementptr float addrspace(2)* %230, i32 25
>  %325 = load float addrspace(2)* %324, !tbaa !0
>  %326 = fmul float %325, %202
>  %327 = fadd float %323, %326
>  %328 = getelementptr float addrspace(2)* %230, i32 26
>  %329 = load float addrspace(2)* %328, !tbaa !0
>  %330 = fmul float %329, %188
>  %331 = fadd float %327, %330
>  %332 = getelementptr float addrspace(2)* %230, i32 27
>  %333 = load float addrspace(2)* %332, !tbaa !0
>  %334 = fmul float %333, %209
>  %335 = fadd float %331, %334
>  %336 = getelementptr float addrspace(2)* %230, i32 28
>  %337 = load float addrspace(2)* %336, !tbaa !0
>  %338 = fmul float %337, %195
>  %339 = getelementptr float addrspace(2)* %230, i32 29
>  %340 = load float addrspace(2)* %339, !tbaa !0
>  %341 = fmul float %340, %202
>  %342 = fadd float %338, %341
>  %343 = getelementptr float addrspace(2)* %230, i32 30
>  %344 = load float addrspace(2)* %343, !tbaa !0
>  %345 = fmul float %344, %188
>  %346 = fadd float %342, %345
>  %347 = getelementptr float addrspace(2)* %230, i32 31
>  %348 = load float addrspace(2)* %347, !tbaa !0
>  %349 = fmul float %348, %209
>  %350 = fadd float %346, %349
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %305, float %320, float %335, float %350)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %147, float %154, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %138, float %139, float %140, float %118)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %195, float %202, float %220, float %213)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %167, float %174, float %181, float %220)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %226, float %228, float %223, float %209)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: nounwind readonly
>declare float @llvm.log2.f32(float) #2
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.exp.(float) #3
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { nounwind readonly }
>attributes #3 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840700
>bf8c007f
>e00c2000
>80020300
>c084070c
>bf8c0070
>e00c2000
>80020900
>c0410100
>bf8c0070
>c002030c
>bf8c007f
>d2820007
>040c0909
>d2820008
>0410090a
>c00283d9
>bf8c007f
>10021005
>c00283d8
>bf8c007f
>d2820001
>04040b07
>d2820009
>0414090b
>c00203da
>bf8c007f
>d2820001
>04040909
>c00203db
>bf8c007f
>d2820001
>04040906
>c00203dd
>bf8c007f
>10041004
>c00203dc
>bf8c007f
>d2820002
>04080907
>c00203de
>bf8c007f
>d2820002
>04080909
>c00203df
>bf8c007f
>d2820002
>04080906
>c0020321
>bf8c007f
>10140404
>c0020320
>bf8c007f
>d282000a
>04280901
>c00203e1
>bf8c007f
>10101004
>c00203e0
>bf8c007f
>d2820007
>04200907
>c00203e2
>bf8c007f
>d2820007
>041c0909
>c00203e3
>bf8c007f
>d2820003
>041c0906
>c0020322
>bf8c007f
>d2820004
>04280903
>c0020301
>c0028323
>bf8c007f
>7e0a0205
>d2820004
>04120a04
>c0028325
>bf8c007f
>100a0405
>c0028324
>bf8c007f
>d2820005
>04140b01
>c0028326
>bf8c007f
>d2820005
>04140b03
>c0028327
>bf8c007f
>7e0c0205
>d2820005
>04160c04
>c0400102
>bf8c007f
>c002810d
>bf8c007f
>100c0a05
>c002810c
>bf8c007f
>d2820007
>041a0805
>c0028329
>bf8c007f
>100c0405
>c0028328
>bf8c007f
>d2820006
>04180b01
>c002832a
>bf8c007f
>d2820006
>04180b03
>c002832b
>bf8c007f
>7e100205
>d2820006
>041a1004
>c002810e
>bf8c007f
>d2820008
>041e0c05
>c002832d
>bf8c007f
>100e0405
>c002832c
>bf8c007f
>d2820007
>041c0b01
>c002832e
>bf8c007f
>d2820007
>041c0b03
>c002832f
>bf8c007f
>7e120205
>d2820007
>041e1204
>c002810f
>bf8c007f
>d2820008
>04220e05
>c0028109
>bf8c007f
>10120a05
>c0028108
>bf8c007f
>d2820009
>04260805
>c002810a
>bf8c007f
>d2820009
>04260c05
>c002810b
>bf8c007f
>d2820009
>04260e05
>c0028105
>bf8c007f
>10140a05
>c0028104
>bf8c007f
>d282000a
>042a0805
>c0028106
>bf8c007f
>d282000a
>042a0c05
>c0028107
>bf8c007f
>d282000a
>042a0e05
>c0028101
>bf8c007f
>10160a05
>c0028100
>bf8c007f
>d282000b
>042e0805
>c0028102
>bf8c007f
>d282000b
>042e0c05
>c0028103
>bf8c007f
>d282000b
>042e0e05
>f80000ef
>08090a0b
>c002811d
>bf8c000f
>10100a05
>c002811c
>bf8c007f
>d2820008
>04220805
>c002811e
>bf8c007f
>d2820008
>04220c05
>c002811f
>bf8c007f
>d2820008
>04220e05
>c0028119
>bf8c007f
>10120a05
>c0028118
>bf8c007f
>d2820009
>04260805
>c002811a
>bf8c007f
>d2820009
>04260c05
>c002811b
>bf8c007f
>d2820009
>04260e05
>c0028115
>bf8c007f
>10140a05
>c0028114
>bf8c007f
>d282000a
>042a0805
>c0028116
>bf8c007f
>d282000a
>042a0c05
>c0028117
>bf8c007f
>d282000a
>042a0e05
>c0028111
>bf8c007f
>10160a05
>c0028110
>bf8c007f
>d282000b
>042e0805
>c0028112
>bf8c007f
>d282000b
>042e0c05
>c0000113
>bf8c007f
>d282000b
>042e0e00
>f80000ff
>08090a0b
>c0840708
>bf8c000f
>e00c2000
>80020800
>c00003c5
>bf8c0070
>10181200
>c00003c4
>bf8c007f
>d282000c
>04300108
>c00003c6
>bf8c007f
>d282000c
>0430010a
>c00003c7
>bf8c007f
>d282000c
>0430010b
>c00003c1
>bf8c007f
>101a1200
>c00003c0
>bf8c007f
>d282000d
>04340108
>c00003c2
>bf8c007f
>d282000d
>0434010a
>c00003c3
>bf8c007f
>d2820008
>0434010b
>7e120280
>f800020f
>09090c08
>c0840704
>bf8c000f
>e00c2000
>80020800
>bf8c0770
>7e004f0a
>100000ff
>400ccccd
>7e004b00
>7e184f09
>101818ff
>400ccccd
>7e184b0c
>7e1a4f08
>101a1aff
>400ccccd
>7e1a4b0d
>f800021f
>0b000c0d
>c000030b
>bf8c000f
>08000600
>c0000300
>bf8c007f
>d00c0006
>02000100
>7e100200
>d2000000
>001a0108
>c0000335
>bf8c007f
>10100400
>c0000334
>bf8c007f
>d2820008
>04200101
>c0000336
>bf8c007f
>d2820008
>04200103
>c0000337
>bf8c007f
>7e120200
>d2820008
>04221204
>f800022f
>00080504
>f800023f
>08030201
>c00003e4
>bf8c000f
>d2820000
>04120e00
>c0000302
>bf8c007f
>10020c00
>08020f01
>c00003e5
>bf8c007f
>10040e00
>08040b02
>f80008cf
>07010200
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL IN[2], GENERIC[21], PERSPECTIVE
>DCL IN[3], GENERIC[22], PERSPECTIVE
>DCL IN[4], GENERIC[23], PERSPECTIVE
>DCL IN[5], GENERIC[24], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL CONST[0..30]
>DCL TEMP[0..8], LOCAL
>DCL TEMP[9], ARRAY(1), LOCAL
>IMM[0] FLT32 {    0.3300,     0.6600,    -1.0000,    -0.0500}
>IMM[1] FLT32 {   20.0000,     1.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[5].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[2], 2D
>  2: MOV TEMP[1].xy, IN[0].xyyy
>  3: TEX TEMP[1], TEMP[1], SAMP[2], 2D
>  4: ADD TEMP[1], TEMP[1], TEMP[0]
>  5: RCP TEMP[2].x, IN[3].xxxx
>  6: MUL TEMP[0].xy, TEMP[2].xxxx, IN[2].wzzz
>  7: MOV TEMP[3].xy, IN[5].zwww
>  8: TEX TEMP[4], TEMP[3], SAMP[2], 2D
>  9: ADD TEMP[4], TEMP[1], TEMP[4]
> 10: MUL TEMP[5].x, TEMP[4].wwww, IMM[0].xxxx
> 11: MAD TEMP[3].xyz, TEMP[4].xyzz, IMM[0].yyyy, IMM[0].zzzz
> 12: MUL TEMP[4].xy, TEMP[5].xxxx, TEMP[3].yxxx
> 13: MOV TEMP[1].zw, TEMP[4].yyxy
> 14: MUL TEMP[1].xy, TEMP[5].xxxx, TEMP[3].xyyy
> 15: MOV TEMP[4].xy, TEMP[0].xyyy
> 16: TEX TEMP[4].w, TEMP[4], SAMP[0], 2D
> 17: MUL TEMP[4], TEMP[4].wwww, CONST[5]
> 18: MUL TEMP[4], TEMP[1], TEMP[4]
> 19: MAD TEMP[4], TEMP[2].xxxx, IN[2], TEMP[4]
> 20: MOV TEMP[5].xy, TEMP[4].xyyy
> 21: TEX TEMP[5].xyz, TEMP[5], SAMP[1], 2D
> 22: MOV TEMP[4].xy, TEMP[4].wzzz
> 23: TEX TEMP[4], TEMP[4], SAMP[0], 2D
> 24: ADD TEMP[6].x, TEMP[4].wwww, IMM[0].wwww
> 25: DP3 TEMP[7].x, IN[1].xyzz, IN[1].xyzz
> 26: RSQ TEMP[7].x, TEMP[7].xxxx
> 27: MUL TEMP[2].xyz, IN[1].xyzz, TEMP[7].xxxx
> 28: MUL TEMP[7].x, TEMP[6].xxxx, IMM[1].xxxx
> 29: MOV_SAT TEMP[7].x, TEMP[7].xxxx
> 30: DP3 TEMP[2].x, TEMP[2].xyzz, TEMP[3].xyzz
> 31: MOV_SAT TEMP[3].x, TEMP[2].xxxx
> 32: ADD TEMP[3].x, -TEMP[3].xxxx, IMM[1].yyyy
> 33: MUL TEMP[8].x, TEMP[3].xxxx, TEMP[3].xxxx
> 34: MUL TEMP[8].x, TEMP[8].xxxx, TEMP[8].xxxx
> 35: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[8].xxxx
> 36: MAD TEMP[2].xyz, CONST[6].xyzz, CONST[30].xxxx, -TEMP[4].xyzz
> 37: MUL TEMP[3].x, TEMP[7].xxxx, TEMP[3].xxxx
> 38: MOV_SAT TEMP[6].x, TEMP[6].xxxx
> 39: MAD TEMP[0].xyz, TEMP[6].xxxx, TEMP[2].xyzz, TEMP[4].xyzz
> 40: MAD TEMP[2].x, IN[4].zzzz, CONST[8].wwww, -CONST[8].xxxx
> 41: MAD TEMP[1].xyz, TEMP[5].xyzz, CONST[4].xyzz, -TEMP[0].xyzz
> 42: MIN TEMP[2].x, TEMP[2].xxxx, CONST[8].zzzz
> 43: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 44: MAD TEMP[0].xyz, TEMP[3].xxxx, TEMP[1].xyzz, TEMP[0].xyzz
> 45: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
> 46: ADD TEMP[3].xyz, CONST[29].xyzz, -TEMP[0].xyzz
> 47: MAD TEMP[1].xyz, TEMP[2].xxxx, TEMP[3].xyzz, TEMP[0].xyzz
> 48: MUL TEMP[0].x, IN[4].zzzz, CONST[29].wwww
> 49: MOV TEMP[1].w, TEMP[0].xxxx
> 50: MOV TEMP[9], TEMP[1]
> 51: MOV OUT[0], TEMP[9]
> 52: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 16
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 17
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 18
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 20
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 21
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 22
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 23
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 24
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 25
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 26
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 32
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr float addrspace(2)* %21, i32 34
>  %45 = load float addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr float addrspace(2)* %21, i32 35
>  %47 = load float addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr float addrspace(2)* %21, i32 116
>  %49 = load float addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr float addrspace(2)* %21, i32 117
>  %51 = load float addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr float addrspace(2)* %21, i32 118
>  %53 = load float addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr float addrspace(2)* %21, i32 119
>  %55 = load float addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr float addrspace(2)* %21, i32 120
>  %57 = load float addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %59 = load <32 x i8> addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %61 = load <16 x i8> addrspace(2)* %60, !tbaa !0
>  %62 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %63 = load <32 x i8> addrspace(2)* %62, !tbaa !0
>  %64 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %65 = load <16 x i8> addrspace(2)* %64, !tbaa !0
>  %66 = getelementptr <32 x i8> addrspace(2)* %2, i32 2
>  %67 = load <32 x i8> addrspace(2)* %66, !tbaa !0
>  %68 = getelementptr <16 x i8> addrspace(2)* %1, i32 2
>  %69 = load <16 x i8> addrspace(2)* %68, !tbaa !0
>  %70 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %71 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %72 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %73 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %74 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %3, <2 x i32> %5)
>  %75 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %76 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %77 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %3, <2 x i32> %5)
>  %78 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %3, <2 x i32> %5)
>  %79 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %3, <2 x i32> %5)
>  %80 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %3, <2 x i32> %5)
>  %81 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %3, <2 x i32> %6)
>  %82 = call float @llvm.SI.fs.interp(i32 1, i32 5, i32 %3, <2 x i32> %6)
>  %83 = call float @llvm.SI.fs.interp(i32 2, i32 5, i32 %3, <2 x i32> %6)
>  %84 = call float @llvm.SI.fs.interp(i32 3, i32 5, i32 %3, <2 x i32> %6)
>  %85 = bitcast float %81 to i32
>  %86 = bitcast float %82 to i32
>  %87 = insertelement <2 x i32> undef, i32 %85, i32 0
>  %88 = insertelement <2 x i32> %87, i32 %86, i32 1
>  %89 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %88, <32 x i8> %67, <16 x i8> %69, i32 2)
>  %90 = extractelement <4 x float> %89, i32 0
>  %91 = extractelement <4 x float> %89, i32 1
>  %92 = extractelement <4 x float> %89, i32 2
>  %93 = extractelement <4 x float> %89, i32 3
>  %94 = bitcast float %70 to i32
>  %95 = bitcast float %71 to i32
>  %96 = insertelement <2 x i32> undef, i32 %94, i32 0
>  %97 = insertelement <2 x i32> %96, i32 %95, i32 1
>  %98 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %97, <32 x i8> %67, <16 x i8> %69, i32 2)
>  %99 = extractelement <4 x float> %98, i32 0
>  %100 = extractelement <4 x float> %98, i32 1
>  %101 = extractelement <4 x float> %98, i32 2
>  %102 = extractelement <4 x float> %98, i32 3
>  %103 = fadd float %99, %90
>  %104 = fadd float %100, %91
>  %105 = fadd float %101, %92
>  %106 = fadd float %102, %93
>  %107 = fdiv float 1.000000e+00, %79
>  %108 = fmul float %107, %78
>  %109 = fmul float %107, %77
>  %110 = bitcast float %83 to i32
>  %111 = bitcast float %84 to i32
>  %112 = insertelement <2 x i32> undef, i32 %110, i32 0
>  %113 = insertelement <2 x i32> %112, i32 %111, i32 1
>  %114 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %113, <32 x i8> %67, <16 x i8> %69, i32 2)
>  %115 = extractelement <4 x float> %114, i32 0
>  %116 = extractelement <4 x float> %114, i32 1
>  %117 = extractelement <4 x float> %114, i32 2
>  %118 = extractelement <4 x float> %114, i32 3
>  %119 = fadd float %103, %115
>  %120 = fadd float %104, %116
>  %121 = fadd float %105, %117
>  %122 = fadd float %106, %118
>  %123 = fmul float %122, 0x3FD51EB860000000
>  %124 = fmul float %119, 0x3FE51EB860000000
>  %125 = fadd float %124, -1.000000e+00
>  %126 = fmul float %120, 0x3FE51EB860000000
>  %127 = fadd float %126, -1.000000e+00
>  %128 = fmul float %121, 0x3FE51EB860000000
>  %129 = fadd float %128, -1.000000e+00
>  %130 = fmul float %123, %127
>  %131 = fmul float %123, %125
>  %132 = fmul float %123, %125
>  %133 = fmul float %123, %127
>  %134 = bitcast float %108 to i32
>  %135 = bitcast float %109 to i32
>  %136 = insertelement <2 x i32> undef, i32 %134, i32 0
>  %137 = insertelement <2 x i32> %136, i32 %135, i32 1
>  %138 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %137, <32 x i8> %59, <16 x i8> %61, i32 2)
>  %139 = extractelement <4 x float> %138, i32 3
>  %140 = fmul float %139, %29
>  %141 = fmul float %139, %31
>  %142 = fmul float %139, %33
>  %143 = fmul float %139, %35
>  %144 = fmul float %132, %140
>  %145 = fmul float %133, %141
>  %146 = fmul float %130, %142
>  %147 = fmul float %131, %143
>  %148 = fmul float %107, %75
>  %149 = fadd float %148, %144
>  %150 = fmul float %107, %76
>  %151 = fadd float %150, %145
>  %152 = fmul float %107, %77
>  %153 = fadd float %152, %146
>  %154 = fmul float %107, %78
>  %155 = fadd float %154, %147
>  %156 = bitcast float %149 to i32
>  %157 = bitcast float %151 to i32
>  %158 = insertelement <2 x i32> undef, i32 %156, i32 0
>  %159 = insertelement <2 x i32> %158, i32 %157, i32 1
>  %160 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %159, <32 x i8> %63, <16 x i8> %65, i32 2)
>  %161 = extractelement <4 x float> %160, i32 0
>  %162 = extractelement <4 x float> %160, i32 1
>  %163 = extractelement <4 x float> %160, i32 2
>  %164 = bitcast float %155 to i32
>  %165 = bitcast float %153 to i32
>  %166 = insertelement <2 x i32> undef, i32 %164, i32 0
>  %167 = insertelement <2 x i32> %166, i32 %165, i32 1
>  %168 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %167, <32 x i8> %59, <16 x i8> %61, i32 2)
>  %169 = extractelement <4 x float> %168, i32 0
>  %170 = extractelement <4 x float> %168, i32 1
>  %171 = extractelement <4 x float> %168, i32 2
>  %172 = extractelement <4 x float> %168, i32 3
>  %173 = fadd float %172, 0xBFA99999A0000000
>  %174 = fmul float %72, %72
>  %175 = fmul float %73, %73
>  %176 = fadd float %175, %174
>  %177 = fmul float %74, %74
>  %178 = fadd float %176, %177
>  %179 = call float @llvm.AMDGPU.rsq(float %178)
>  %180 = fmul float %72, %179
>  %181 = fmul float %73, %179
>  %182 = fmul float %74, %179
>  %183 = fmul float %173, 2.000000e+01
>  %184 = call float @llvm.AMDIL.clamp.(float %183, float 0.000000e+00, float 1.000000e+00)
>  %185 = fmul float %180, %125
>  %186 = fmul float %181, %127
>  %187 = fadd float %186, %185
>  %188 = fmul float %182, %129
>  %189 = fadd float %187, %188
>  %190 = call float @llvm.AMDIL.clamp.(float %189, float 0.000000e+00, float 1.000000e+00)
>  %191 = fsub float -0.000000e+00, %190
>  %192 = fadd float %191, 1.000000e+00
>  %193 = fmul float %192, %192
>  %194 = fmul float %193, %193
>  %195 = fmul float %192, %194
>  %196 = fsub float -0.000000e+00, %169
>  %197 = fmul float %37, %57
>  %198 = fadd float %197, %196
>  %199 = fsub float -0.000000e+00, %170
>  %200 = fmul float %39, %57
>  %201 = fadd float %200, %199
>  %202 = fsub float -0.000000e+00, %171
>  %203 = fmul float %41, %57
>  %204 = fadd float %203, %202
>  %205 = fmul float %184, %195
>  %206 = call float @llvm.AMDIL.clamp.(float %173, float 0.000000e+00, float 1.000000e+00)
>  %207 = fmul float %206, %198
>  %208 = fadd float %207, %169
>  %209 = fmul float %206, %201
>  %210 = fadd float %209, %170
>  %211 = fmul float %206, %204
>  %212 = fadd float %211, %171
>  %213 = fsub float -0.000000e+00, %43
>  %214 = fmul float %80, %47
>  %215 = fadd float %214, %213
>  %216 = fsub float -0.000000e+00, %208
>  %217 = fmul float %161, %23
>  %218 = fadd float %217, %216
>  %219 = fsub float -0.000000e+00, %210
>  %220 = fmul float %162, %25
>  %221 = fadd float %220, %219
>  %222 = fsub float -0.000000e+00, %212
>  %223 = fmul float %163, %27
>  %224 = fadd float %223, %222
>  %225 = fcmp uge float %215, %45
>  %226 = select i1 %225, float %45, float %215
>  %227 = call float @llvm.AMDIL.clamp.(float %226, float 0.000000e+00, float 1.000000e+00)
>  %228 = fmul float %205, %218
>  %229 = fadd float %228, %208
>  %230 = fmul float %205, %221
>  %231 = fadd float %230, %210
>  %232 = fmul float %205, %224
>  %233 = fadd float %232, %212
>  %234 = fmul float %227, %227
>  %235 = fsub float -0.000000e+00, %229
>  %236 = fadd float %49, %235
>  %237 = fsub float -0.000000e+00, %231
>  %238 = fadd float %51, %237
>  %239 = fsub float -0.000000e+00, %233
>  %240 = fadd float %53, %239
>  %241 = fmul float %234, %236
>  %242 = fadd float %241, %229
>  %243 = fmul float %234, %238
>  %244 = fadd float %243, %231
>  %245 = fmul float %234, %240
>  %246 = fadd float %245, %233
>  %247 = fmul float %80, %55
>  %248 = call i32 @llvm.SI.packf16(float %242, float %244)
>  %249 = bitcast i32 %248 to float
>  %250 = call i32 @llvm.SI.packf16(float %246, float %247)
>  %251 = bitcast i32 %250 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %249, float %251, float %249, float %251)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDGPU.rsq(float) #2
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8141502
>c8151503
>c8101402
>c8111403
>c0840308
>c0c60510
>bf8c007f
>f0800f00
>00430404
>c8240100
>c8250101
>c8200000
>c8210001
>f0800f00
>00430808
>bf8c0770
>06200b09
>c8341702
>c8351703
>c8301602
>c8311603
>f0800f00
>00430c0c
>bf8c0770
>06061b10
>7e0402ff
>3f28f5c3
>d2820003
>03ce0503
>06200f0b
>06201f10
>102020ff
>3ea8f5c3
>102e0710
>c8440a00
>c8450a01
>c8480c00
>c8490c01
>7e2c5512
>10282316
>c8480b00
>c8490b01
>10262516
>c0840300
>c0c60500
>bf8c007f
>f0800800
>00431813
>c0400100
>bf8c0070
>c0038116
>bf8c007f
>10263007
>10262717
>d2820014
>044e2316
>06220908
>06221911
>d2820019
>03ce0511
>10383310
>c0038117
>bf8c007f
>10203007
>1020211c
>d2820013
>04422516
>f0800f00
>00431013
>c0038119
>c0040178
>bf8c0070
>7e280208
>d2100015
>02022807
>08342315
>063626ff
>bd4ccccd
>d2060815
>0201011b
>d282001a
>04463515
>c0038115
>bf8c007f
>103a3007
>102e3b17
>c8740900
>c8750901
>d282001e
>045e3b16
>c0038114
>bf8c007f
>102e3007
>102e2f1c
>c8600800
>c8610801
>d282001d
>045e3116
>c0840304
>c0c60508
>bf8c007f
>f0800700
>0043161d
>c0010111
>bf8c0070
>10382e02
>0838351c
>c8740500
>c8750501
>c87c0400
>c87d0401
>103c3f1f
>d2820020
>047a3b1d
>c8780600
>c8790601
>d2820020
>04823d1e
>7e405b20
>103e411f
>1032331f
>103a411d
>d2820003
>0466071d
>06080d0a
>06081d04
>d2820002
>03ce0504
>1008411e
>d2820002
>040e0504
>d2060802
>02010102
>080404f2
>10060502
>10060703
>10040702
>100636ff
>41a00000
>d2060803
>02010103
>10040503
>d2820004
>046a3902
>c0010175
>bf8c007f
>080a0802
>c80c1200
>c80d1201
>c0010123
>bf8c007f
>10000602
>c0010120
>bf8c007f
>0a000002
>c0010122
>bf8c007f
>d00c0004
>02000500
>7e020202
>d2000000
>00120300
>d2060800
>02010100
>10000100
>d2820001
>04120b00
>c0010118
>bf8c007f
>d2100004
>02022802
>08082104
>d2820004
>04420915
>c0010110
>bf8c007f
>100a2c02
>080a0905
>d2820004
>04120b02
>c0010174
>bf8c007f
>080a0802
>d2820004
>04120b00
>5e020304
>c001011a
>bf8c007f
>d2100004
>02022802
>08082504
>d2820004
>044a0915
>c0010112
>bf8c007f
>100a3002
>080a0905
>d2820002
>04120b02
>c0010176
>bf8c007f
>08080402
>d2820000
>040a0900
>c0000177
>bf8c007f
>10040600
>5e000500
>f8001c0f
>00010001
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL IN[4]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL OUT[3], GENERIC[20]
>DCL OUT[4], GENERIC[21]
>DCL OUT[5], GENERIC[22]
>DCL OUT[6], GENERIC[23]
>DCL OUT[7], GENERIC[24]
>DCL CONST[0..55]
>DCL TEMP[0..8], LOCAL
>IMM[0] FLT32 {    0.1000,     0.4500,     0.0000,     0.0000}
>  0: DP4 TEMP[0].x, IN[0], CONST[5]
>  1: MOV TEMP[1].y, TEMP[0].xxxx
>  2: DP4 TEMP[1].x, IN[0], CONST[4]
>  3: DP4 TEMP[2].x, IN[0], CONST[7]
>  4: MOV TEMP[3].w, TEMP[2].xxxx
>  5: ADD TEMP[3].xy, TEMP[1].xyyy, TEMP[2].xxxx
>  6: MUL TEMP[4].xy, TEMP[3].xyyy, CONST[0].wwww
>  7: MOV TEMP[1].z, -TEMP[0].xxxx
>  8: MOV TEMP[3].xy, TEMP[1].xyxx
>  9: ADD TEMP[0].xy, TEMP[1].zxxx, TEMP[2].xxxx
> 10: DP4 TEMP[1].x, IN[0], CONST[52]
> 11: DP4 TEMP[5].x, IN[0], CONST[53]
> 12: MOV TEMP[1].y, TEMP[5].xxxx
> 13: DP4 TEMP[5].x, IN[0], CONST[54]
> 14: MOV TEMP[1].z, TEMP[5].xxxx
> 15: MUL TEMP[0].xy, TEMP[0].xyyy, CONST[0].wwww
> 16: MOV TEMP[4].zw, TEMP[0].yyxy
> 17: ADD TEMP[1].xyz, -TEMP[1].xyzz, CONST[2].xyzz
> 18: DP3 TEMP[0].x, TEMP[1].xyzz, IN[3].xyzz
> 19: DP3 TEMP[5].x, TEMP[1].xyzz, IN[4].xyzz
> 20: MOV TEMP[0].y, TEMP[5].xxxx
> 21: DP3 TEMP[1].x, TEMP[1].xyzz, IN[1].xyzz
> 22: MOV TEMP[0].z, TEMP[1].xxxx
> 23: DP4 TEMP[1].x, IN[2], CONST[49]
> 24: DP4 TEMP[5].x, IN[2], CONST[50]
> 25: MOV TEMP[1].y, TEMP[5].xxxx
> 26: ADD TEMP[5].x, IN[2].yyyy, IN[2].xxxx
> 27: MAD TEMP[5].x, TEMP[5].xxxx, IMM[0].xxxx, CONST[51].xxxx
> 28: ADD TEMP[6].x, -IN[2].xxxx, IN[2].yyyy
> 29: MAD TEMP[6].x, TEMP[6].xxxx, IMM[0].xxxx, CONST[51].yyyy
> 30: MOV TEMP[5].y, TEMP[6].xxxx
> 31: DP4 TEMP[6].x, IN[0], CONST[6]
> 32: MOV TEMP[3].z, TEMP[6].xxxx
> 33: MAD TEMP[6].xy, IN[2].yxxx, IMM[0].yyyy, CONST[51].zwww
> 34: MOV TEMP[5].zw, TEMP[6].yyxy
> 35: MOV TEMP[6], TEMP[3]
> 36: MOV TEMP[3], TEMP[3]
> 37: MOV TEMP[2].x, TEMP[2].xxxx
> 38: MOV TEMP[7], TEMP[6]
> 39: MAD TEMP[8].x, TEMP[6].zzzz, CONST[0].zzzz, -TEMP[6].wwww
> 40: MOV TEMP[6].z, TEMP[8].xxxx
> 41: MOV TEMP[6].y, -TEMP[6].yyyy
> 42: MAD TEMP[6].xy, CONST[55].xyyy, TEMP[6].wwww, TEMP[6].xyyy
> 43: MOV OUT[2], TEMP[1]
> 44: MOV OUT[3], TEMP[0]
> 45: MOV OUT[4], TEMP[4]
> 46: MOV OUT[5], TEMP[2]
> 47: MOV OUT[0], TEMP[6]
> 48: MOV OUT[6], TEMP[3]
> 49: MOV OUT[1], TEMP[7]
> 50: MOV OUT[7], TEMP[5]
> 51: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 2
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 3
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 8
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 9
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 10
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 16
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 17
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 18
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 19
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 20
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 21
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 22
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 23
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 24
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 25
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 26
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 27
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 28
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 29
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 30
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 31
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 196
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 197
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 198
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 199
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 200
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 201
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 202
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 203
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 204
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 205
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 206
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 207
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 208
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 209
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 210
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 211
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 212
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 213
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 214
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 215
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 216
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr float addrspace(2)* %10, i32 217
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = getelementptr float addrspace(2)* %10, i32 218
>  %98 = load float addrspace(2)* %97, !tbaa !0
>  %99 = getelementptr float addrspace(2)* %10, i32 219
>  %100 = load float addrspace(2)* %99, !tbaa !0
>  %101 = getelementptr float addrspace(2)* %10, i32 220
>  %102 = load float addrspace(2)* %101, !tbaa !0
>  %103 = getelementptr float addrspace(2)* %10, i32 221
>  %104 = load float addrspace(2)* %103, !tbaa !0
>  %105 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %106 = load <16 x i8> addrspace(2)* %105, !tbaa !0
>  %107 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %106, i32 0, i32 %5)
>  %108 = extractelement <4 x float> %107, i32 0
>  %109 = extractelement <4 x float> %107, i32 1
>  %110 = extractelement <4 x float> %107, i32 2
>  %111 = extractelement <4 x float> %107, i32 3
>  %112 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %113 = load <16 x i8> addrspace(2)* %112, !tbaa !0
>  %114 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %113, i32 0, i32 %5)
>  %115 = extractelement <4 x float> %114, i32 0
>  %116 = extractelement <4 x float> %114, i32 1
>  %117 = extractelement <4 x float> %114, i32 2
>  %118 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %119 = load <16 x i8> addrspace(2)* %118, !tbaa !0
>  %120 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %119, i32 0, i32 %5)
>  %121 = extractelement <4 x float> %120, i32 0
>  %122 = extractelement <4 x float> %120, i32 1
>  %123 = extractelement <4 x float> %120, i32 2
>  %124 = extractelement <4 x float> %120, i32 3
>  %125 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %126 = load <16 x i8> addrspace(2)* %125, !tbaa !0
>  %127 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %126, i32 0, i32 %5)
>  %128 = extractelement <4 x float> %127, i32 0
>  %129 = extractelement <4 x float> %127, i32 1
>  %130 = extractelement <4 x float> %127, i32 2
>  %131 = getelementptr <16 x i8> addrspace(2)* %3, i32 4
>  %132 = load <16 x i8> addrspace(2)* %131, !tbaa !0
>  %133 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %132, i32 0, i32 %5)
>  %134 = extractelement <4 x float> %133, i32 0
>  %135 = extractelement <4 x float> %133, i32 1
>  %136 = extractelement <4 x float> %133, i32 2
>  %137 = fmul float %108, %30
>  %138 = fmul float %109, %32
>  %139 = fadd float %137, %138
>  %140 = fmul float %110, %34
>  %141 = fadd float %139, %140
>  %142 = fmul float %111, %36
>  %143 = fadd float %141, %142
>  %144 = fmul float %108, %22
>  %145 = fmul float %109, %24
>  %146 = fadd float %144, %145
>  %147 = fmul float %110, %26
>  %148 = fadd float %146, %147
>  %149 = fmul float %111, %28
>  %150 = fadd float %148, %149
>  %151 = fmul float %108, %46
>  %152 = fmul float %109, %48
>  %153 = fadd float %151, %152
>  %154 = fmul float %110, %50
>  %155 = fadd float %153, %154
>  %156 = fmul float %111, %52
>  %157 = fadd float %155, %156
>  %158 = fadd float %150, %157
>  %159 = fadd float %143, %157
>  %160 = fmul float %158, %14
>  %161 = fmul float %159, %14
>  %162 = fsub float -0.000000e+00, %143
>  %163 = fadd float %162, %157
>  %164 = fadd float %150, %157
>  %165 = fmul float %108, %78
>  %166 = fmul float %109, %80
>  %167 = fadd float %165, %166
>  %168 = fmul float %110, %82
>  %169 = fadd float %167, %168
>  %170 = fmul float %111, %84
>  %171 = fadd float %169, %170
>  %172 = fmul float %108, %86
>  %173 = fmul float %109, %88
>  %174 = fadd float %172, %173
>  %175 = fmul float %110, %90
>  %176 = fadd float %174, %175
>  %177 = fmul float %111, %92
>  %178 = fadd float %176, %177
>  %179 = fmul float %108, %94
>  %180 = fmul float %109, %96
>  %181 = fadd float %179, %180
>  %182 = fmul float %110, %98
>  %183 = fadd float %181, %182
>  %184 = fmul float %111, %100
>  %185 = fadd float %183, %184
>  %186 = fmul float %163, %14
>  %187 = fmul float %164, %14
>  %188 = fsub float -0.000000e+00, %171
>  %189 = fadd float %188, %16
>  %190 = fsub float -0.000000e+00, %178
>  %191 = fadd float %190, %18
>  %192 = fsub float -0.000000e+00, %185
>  %193 = fadd float %192, %20
>  %194 = fmul float %189, %128
>  %195 = fmul float %191, %129
>  %196 = fadd float %195, %194
>  %197 = fmul float %193, %130
>  %198 = fadd float %196, %197
>  %199 = fmul float %189, %134
>  %200 = fmul float %191, %135
>  %201 = fadd float %200, %199
>  %202 = fmul float %193, %136
>  %203 = fadd float %201, %202
>  %204 = fmul float %189, %115
>  %205 = fmul float %191, %116
>  %206 = fadd float %205, %204
>  %207 = fmul float %193, %117
>  %208 = fadd float %206, %207
>  %209 = fmul float %121, %54
>  %210 = fmul float %122, %56
>  %211 = fadd float %209, %210
>  %212 = fmul float %123, %58
>  %213 = fadd float %211, %212
>  %214 = fmul float %124, %60
>  %215 = fadd float %213, %214
>  %216 = fmul float %121, %62
>  %217 = fmul float %122, %64
>  %218 = fadd float %216, %217
>  %219 = fmul float %123, %66
>  %220 = fadd float %218, %219
>  %221 = fmul float %124, %68
>  %222 = fadd float %220, %221
>  %223 = fadd float %122, %121
>  %224 = fmul float %223, 0x3FB99999A0000000
>  %225 = fadd float %224, %70
>  %226 = fsub float -0.000000e+00, %121
>  %227 = fadd float %226, %122
>  %228 = fmul float %227, 0x3FB99999A0000000
>  %229 = fadd float %228, %72
>  %230 = fmul float %108, %38
>  %231 = fmul float %109, %40
>  %232 = fadd float %230, %231
>  %233 = fmul float %110, %42
>  %234 = fadd float %232, %233
>  %235 = fmul float %111, %44
>  %236 = fadd float %234, %235
>  %237 = fmul float %122, 0x3FDCCCCCC0000000
>  %238 = fadd float %237, %74
>  %239 = fmul float %121, 0x3FDCCCCCC0000000
>  %240 = fadd float %239, %76
>  %241 = fsub float -0.000000e+00, %157
>  %242 = fmul float %236, %12
>  %243 = fadd float %242, %241
>  %244 = fsub float -0.000000e+00, %143
>  %245 = fmul float %102, %157
>  %246 = fadd float %245, %150
>  %247 = fmul float %104, %157
>  %248 = fadd float %247, %244
>  %249 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %250 = load float addrspace(2)* addrspace(2)* %249, !tbaa !0
>  %251 = getelementptr float addrspace(2)* %250, i32 0
>  %252 = load float addrspace(2)* %251, !tbaa !0
>  %253 = fmul float %252, %150
>  %254 = getelementptr float addrspace(2)* %250, i32 1
>  %255 = load float addrspace(2)* %254, !tbaa !0
>  %256 = fmul float %255, %143
>  %257 = fadd float %253, %256
>  %258 = getelementptr float addrspace(2)* %250, i32 2
>  %259 = load float addrspace(2)* %258, !tbaa !0
>  %260 = fmul float %259, %236
>  %261 = fadd float %257, %260
>  %262 = getelementptr float addrspace(2)* %250, i32 3
>  %263 = load float addrspace(2)* %262, !tbaa !0
>  %264 = fmul float %263, %157
>  %265 = fadd float %261, %264
>  %266 = getelementptr float addrspace(2)* %250, i32 4
>  %267 = load float addrspace(2)* %266, !tbaa !0
>  %268 = fmul float %267, %150
>  %269 = getelementptr float addrspace(2)* %250, i32 5
>  %270 = load float addrspace(2)* %269, !tbaa !0
>  %271 = fmul float %270, %143
>  %272 = fadd float %268, %271
>  %273 = getelementptr float addrspace(2)* %250, i32 6
>  %274 = load float addrspace(2)* %273, !tbaa !0
>  %275 = fmul float %274, %236
>  %276 = fadd float %272, %275
>  %277 = getelementptr float addrspace(2)* %250, i32 7
>  %278 = load float addrspace(2)* %277, !tbaa !0
>  %279 = fmul float %278, %157
>  %280 = fadd float %276, %279
>  %281 = getelementptr float addrspace(2)* %250, i32 8
>  %282 = load float addrspace(2)* %281, !tbaa !0
>  %283 = fmul float %282, %150
>  %284 = getelementptr float addrspace(2)* %250, i32 9
>  %285 = load float addrspace(2)* %284, !tbaa !0
>  %286 = fmul float %285, %143
>  %287 = fadd float %283, %286
>  %288 = getelementptr float addrspace(2)* %250, i32 10
>  %289 = load float addrspace(2)* %288, !tbaa !0
>  %290 = fmul float %289, %236
>  %291 = fadd float %287, %290
>  %292 = getelementptr float addrspace(2)* %250, i32 11
>  %293 = load float addrspace(2)* %292, !tbaa !0
>  %294 = fmul float %293, %157
>  %295 = fadd float %291, %294
>  %296 = getelementptr float addrspace(2)* %250, i32 12
>  %297 = load float addrspace(2)* %296, !tbaa !0
>  %298 = fmul float %297, %150
>  %299 = getelementptr float addrspace(2)* %250, i32 13
>  %300 = load float addrspace(2)* %299, !tbaa !0
>  %301 = fmul float %300, %143
>  %302 = fadd float %298, %301
>  %303 = getelementptr float addrspace(2)* %250, i32 14
>  %304 = load float addrspace(2)* %303, !tbaa !0
>  %305 = fmul float %304, %236
>  %306 = fadd float %302, %305
>  %307 = getelementptr float addrspace(2)* %250, i32 15
>  %308 = load float addrspace(2)* %307, !tbaa !0
>  %309 = fmul float %308, %157
>  %310 = fadd float %306, %309
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %265, float %280, float %295, float %310)
>  %311 = getelementptr float addrspace(2)* %250, i32 16
>  %312 = load float addrspace(2)* %311, !tbaa !0
>  %313 = fmul float %312, %150
>  %314 = getelementptr float addrspace(2)* %250, i32 17
>  %315 = load float addrspace(2)* %314, !tbaa !0
>  %316 = fmul float %315, %143
>  %317 = fadd float %313, %316
>  %318 = getelementptr float addrspace(2)* %250, i32 18
>  %319 = load float addrspace(2)* %318, !tbaa !0
>  %320 = fmul float %319, %236
>  %321 = fadd float %317, %320
>  %322 = getelementptr float addrspace(2)* %250, i32 19
>  %323 = load float addrspace(2)* %322, !tbaa !0
>  %324 = fmul float %323, %157
>  %325 = fadd float %321, %324
>  %326 = getelementptr float addrspace(2)* %250, i32 20
>  %327 = load float addrspace(2)* %326, !tbaa !0
>  %328 = fmul float %327, %150
>  %329 = getelementptr float addrspace(2)* %250, i32 21
>  %330 = load float addrspace(2)* %329, !tbaa !0
>  %331 = fmul float %330, %143
>  %332 = fadd float %328, %331
>  %333 = getelementptr float addrspace(2)* %250, i32 22
>  %334 = load float addrspace(2)* %333, !tbaa !0
>  %335 = fmul float %334, %236
>  %336 = fadd float %332, %335
>  %337 = getelementptr float addrspace(2)* %250, i32 23
>  %338 = load float addrspace(2)* %337, !tbaa !0
>  %339 = fmul float %338, %157
>  %340 = fadd float %336, %339
>  %341 = getelementptr float addrspace(2)* %250, i32 24
>  %342 = load float addrspace(2)* %341, !tbaa !0
>  %343 = fmul float %342, %150
>  %344 = getelementptr float addrspace(2)* %250, i32 25
>  %345 = load float addrspace(2)* %344, !tbaa !0
>  %346 = fmul float %345, %143
>  %347 = fadd float %343, %346
>  %348 = getelementptr float addrspace(2)* %250, i32 26
>  %349 = load float addrspace(2)* %348, !tbaa !0
>  %350 = fmul float %349, %236
>  %351 = fadd float %347, %350
>  %352 = getelementptr float addrspace(2)* %250, i32 27
>  %353 = load float addrspace(2)* %352, !tbaa !0
>  %354 = fmul float %353, %157
>  %355 = fadd float %351, %354
>  %356 = getelementptr float addrspace(2)* %250, i32 28
>  %357 = load float addrspace(2)* %356, !tbaa !0
>  %358 = fmul float %357, %150
>  %359 = getelementptr float addrspace(2)* %250, i32 29
>  %360 = load float addrspace(2)* %359, !tbaa !0
>  %361 = fmul float %360, %143
>  %362 = fadd float %358, %361
>  %363 = getelementptr float addrspace(2)* %250, i32 30
>  %364 = load float addrspace(2)* %363, !tbaa !0
>  %365 = fmul float %364, %236
>  %366 = fadd float %362, %365
>  %367 = getelementptr float addrspace(2)* %250, i32 31
>  %368 = load float addrspace(2)* %367, !tbaa !0
>  %369 = fmul float %368, %157
>  %370 = fadd float %366, %369
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %325, float %340, float %355, float %370)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %215, float %222, float %193, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %198, float %203, float %208, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %160, float %161, float %186, float %187)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %157, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %150, float %143, float %236, float %157)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 37, i32 0, float %225, float %229, float %238, float %240)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %246, float %248, float %243, float %157)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840700
>bf8c007f
>e00c2000
>80020500
>c0410100
>bf8c0070
>c0020311
>bf8c007f
>10020c04
>c0020310
>bf8c007f
>d2820001
>04040905
>c0020312
>bf8c007f
>d2820001
>04040907
>c0020313
>bf8c007f
>d2820001
>04040908
>c0020315
>bf8c007f
>10040c04
>c0020314
>bf8c007f
>d2820002
>04080905
>c0020316
>bf8c007f
>d2820002
>04080907
>c0020317
>bf8c007f
>d2820002
>04080908
>c0400102
>bf8c007f
>c002010d
>bf8c007f
>10060404
>c002010c
>bf8c007f
>d2820004
>040e0204
>c0020319
>bf8c007f
>10060c04
>c0020318
>bf8c007f
>d2820003
>040c0905
>c002031a
>bf8c007f
>d2820003
>040c0907
>c002031b
>bf8c007f
>d2820003
>040c0908
>c002010e
>bf8c007f
>d2820009
>04120604
>c002031d
>bf8c007f
>10080c04
>c002031c
>bf8c007f
>d2820004
>04100905
>c002031e
>bf8c007f
>d2820004
>04100907
>c002031f
>bf8c007f
>d2820004
>04100908
>c002010f
>bf8c007f
>d2820009
>04260804
>c0020109
>bf8c007f
>10140404
>c0020108
>bf8c007f
>d282000a
>042a0204
>c002010a
>bf8c007f
>d282000a
>042a0604
>c002010b
>bf8c007f
>d282000a
>042a0804
>c0020105
>bf8c007f
>10160404
>c0020104
>bf8c007f
>d282000b
>042e0204
>c0020106
>bf8c007f
>d282000b
>042e0604
>c0020107
>bf8c007f
>d282000b
>042e0804
>c0020101
>bf8c007f
>10180404
>c0020100
>bf8c007f
>d282000c
>04320204
>c0020102
>bf8c007f
>d282000c
>04320604
>c0020103
>bf8c007f
>d282000c
>04320804
>f80000ef
>090a0b0c
>c002011d
>bf8c000f
>10120404
>c002011c
>bf8c007f
>d2820009
>04260204
>c002011e
>bf8c007f
>d2820009
>04260604
>c002011f
>bf8c007f
>d2820009
>04260804
>c0020119
>bf8c007f
>10140404
>c0020118
>bf8c007f
>d282000a
>042a0204
>c002011a
>bf8c007f
>d282000a
>042a0604
>c002011b
>bf8c007f
>d282000a
>042a0804
>c0020115
>bf8c007f
>10160404
>c0020114
>bf8c007f
>d282000b
>042e0204
>c0020116
>bf8c007f
>d282000b
>042e0604
>c0020117
>bf8c007f
>d282000b
>042e0804
>c0020111
>bf8c007f
>10180404
>c0020110
>bf8c007f
>d282000c
>04320204
>c0020112
>bf8c007f
>d282000c
>04320604
>c0000113
>bf8c007f
>d282000c
>04320800
>f80000ff
>090a0b0c
>c0840708
>bf8c000f
>e00c2000
>80020900
>c00003c9
>bf8c0070
>101a1400
>c00003c8
>bf8c007f
>d282000d
>04340109
>c00003ca
>bf8c007f
>d282000d
>0434010b
>c00003cb
>bf8c007f
>d282000f
>0434010c
>c00003c5
>bf8c007f
>101a1400
>c00003c4
>bf8c007f
>d282000d
>04340109
>c00003c6
>bf8c007f
>d282000d
>0434010b
>c00003c7
>bf8c007f
>d2820010
>0434010c
>c00003d9
>bf8c007f
>101a0c00
>c00003d8
>bf8c007f
>d282000d
>04340105
>c00003da
>bf8c007f
>d282000d
>04340107
>c00003db
>bf8c007f
>d282000d
>04340108
>c000030a
>bf8c007f
>081c1a00
>7e1a0280
>f800020f
>0d0e0f10
>c00003d5
>bf8c000f
>101e0c00
>c00003d4
>bf8c007f
>d282000f
>043c0105
>c00003d6
>bf8c007f
>d282000f
>043c0107
>c00003d7
>bf8c007f
>d282000f
>043c0108
>c0000309
>bf8c007f
>081e1e00
>c00003d1
>bf8c007f
>10200c00
>c00003d0
>bf8c007f
>d2820010
>04400105
>c00003d2
>bf8c007f
>d2820010
>04400107
>c00003d3
>bf8c007f
>d2820005
>04400108
>c0000308
>bf8c007f
>080a0a00
>c0840704
>bf8c007f
>e00c2000
>80021000
>bf8c0770
>100c2105
>d2820006
>041a230f
>d2820006
>041a250e
>c0840710
>bf8c007f
>e00c2000
>80021000
>bf8c0770
>100e2105
>d2820007
>041e230f
>d2820007
>041e250e
>c082070c
>bf8c007f
>e00c2000
>80011000
>bf8c0770
>10002105
>d2820000
>0402230f
>d2820000
>0402250e
>f800021f
>0d060700
>bf8c070f
>08000504
>c0000303
>bf8c007f
>10000000
>060a0902
>100a0a00
>060c0901
>100c0c00
>f800022f
>06000506
>f800023f
>0d0d0d04
>f800024f
>04030201
>bf8c070f
>0800130a
>c00003cd
>7e0a02ff
>3dcccccd
>bf8c007f
>d2820000
>00020b00
>060c130a
>c00003cc
>bf8c007f
>d2820005
>00020b06
>c00003cf
>7e0c02ff
>3ee66666
>bf8c007f
>d2820007
>00020d09
>c00003ce
>bf8c007f
>d2820006
>00020d0a
>f800025f
>07060005
>c00003dc
>bf8c000f
>d2820000
>04060800
>c0000302
>bf8c007f
>10020600
>08020901
>c00003dd
>bf8c007f
>10060800
>08040503
>f80008cf
>04010200
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], GENERIC[19], PERSPECTIVE
>DCL IN[2], GENERIC[20], PERSPECTIVE
>DCL IN[3], GENERIC[21], PERSPECTIVE
>DCL IN[4], GENERIC[22], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL CONST[0..30]
>DCL TEMP[0..2], LOCAL
>DCL TEMP[3], ARRAY(1), LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[2].xyyy
>  1: TEX TEMP[0].xyz, TEMP[0], SAMP[2], 2D
>  2: MOV TEMP[1].xy, IN[1].xyyy
>  3: TEX TEMP[1].xyz, TEMP[1], SAMP[0], 2D
>  4: MOV TEMP[2].xy, IN[4].xyyy
>  5: TEX TEMP[2].xyz, TEMP[2], SAMP[1], 2D
>  6: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[8].xyzz
>  7: MAD TEMP[0].xyz, IMM[0].xxxx, TEMP[0].xyzz, IMM[0].yyyy
>  8: MAD TEMP[0].xyz, CONST[8].wwww, TEMP[0].xyzz, IMM[0].zzzz
>  9: MUL TEMP[0].xyz, TEMP[1].xyzz, TEMP[0].xyzz
> 10: MUL TEMP[0].xyz, TEMP[0].xyzz, IN[0].xyzz
> 11: MUL TEMP[1].xyz, TEMP[2].xyzz, CONST[12].xyzz
> 12: MAD TEMP[2].x, IN[3].wwww, CONST[11].wwww, -CONST[11].xxxx
> 13: MUL TEMP[1].xyz, TEMP[0].xyzz, TEMP[1].xyzz
> 14: MIN TEMP[2].x, TEMP[2].xxxx, CONST[11].zzzz
> 15: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 16: MAD TEMP[0].xyz, TEMP[1].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 17: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
> 18: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[2].xxxx
> 19: MAD TEMP[1].xyz, TEMP[1].xyzz, CONST[30].xxxx, TEMP[0].xyzz
> 20: MUL TEMP[0].x, IN[3].wwww, CONST[29].wwww
> 21: MOV TEMP[1].w, TEMP[0].xxxx
> 22: MOV TEMP[3], TEMP[1]
> 23: MOV OUT[0], TEMP[3]
> 24: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 32
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 33
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 34
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 35
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 44
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 46
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 47
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 48
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 49
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 50
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 116
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr float addrspace(2)* %21, i32 117
>  %45 = load float addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr float addrspace(2)* %21, i32 118
>  %47 = load float addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr float addrspace(2)* %21, i32 119
>  %49 = load float addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr float addrspace(2)* %21, i32 120
>  %51 = load float addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %53 = load <32 x i8> addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %55 = load <16 x i8> addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %57 = load <32 x i8> addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %59 = load <16 x i8> addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr <32 x i8> addrspace(2)* %2, i32 2
>  %61 = load <32 x i8> addrspace(2)* %60, !tbaa !0
>  %62 = getelementptr <16 x i8> addrspace(2)* %1, i32 2
>  %63 = load <16 x i8> addrspace(2)* %62, !tbaa !0
>  %64 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %65 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %66 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %67 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %68 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %69 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %70 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %71 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %3, <2 x i32> %5)
>  %72 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %3, <2 x i32> %6)
>  %73 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %3, <2 x i32> %6)
>  %74 = bitcast float %69 to i32
>  %75 = bitcast float %70 to i32
>  %76 = insertelement <2 x i32> undef, i32 %74, i32 0
>  %77 = insertelement <2 x i32> %76, i32 %75, i32 1
>  %78 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %77, <32 x i8> %61, <16 x i8> %63, i32 2)
>  %79 = extractelement <4 x float> %78, i32 0
>  %80 = extractelement <4 x float> %78, i32 1
>  %81 = extractelement <4 x float> %78, i32 2
>  %82 = bitcast float %67 to i32
>  %83 = bitcast float %68 to i32
>  %84 = insertelement <2 x i32> undef, i32 %82, i32 0
>  %85 = insertelement <2 x i32> %84, i32 %83, i32 1
>  %86 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %85, <32 x i8> %53, <16 x i8> %55, i32 2)
>  %87 = extractelement <4 x float> %86, i32 0
>  %88 = extractelement <4 x float> %86, i32 1
>  %89 = extractelement <4 x float> %86, i32 2
>  %90 = bitcast float %72 to i32
>  %91 = bitcast float %73 to i32
>  %92 = insertelement <2 x i32> undef, i32 %90, i32 0
>  %93 = insertelement <2 x i32> %92, i32 %91, i32 1
>  %94 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %93, <32 x i8> %57, <16 x i8> %59, i32 2)
>  %95 = extractelement <4 x float> %94, i32 0
>  %96 = extractelement <4 x float> %94, i32 1
>  %97 = extractelement <4 x float> %94, i32 2
>  %98 = fmul float %79, %23
>  %99 = fmul float %80, %25
>  %100 = fmul float %81, %27
>  %101 = fmul float 2.000000e+00, %98
>  %102 = fadd float %101, -1.000000e+00
>  %103 = fmul float 2.000000e+00, %99
>  %104 = fadd float %103, -1.000000e+00
>  %105 = fmul float 2.000000e+00, %100
>  %106 = fadd float %105, -1.000000e+00
>  %107 = fmul float %29, %102
>  %108 = fadd float %107, 1.000000e+00
>  %109 = fmul float %29, %104
>  %110 = fadd float %109, 1.000000e+00
>  %111 = fmul float %29, %106
>  %112 = fadd float %111, 1.000000e+00
>  %113 = fmul float %87, %108
>  %114 = fmul float %88, %110
>  %115 = fmul float %89, %112
>  %116 = fmul float %113, %64
>  %117 = fmul float %114, %65
>  %118 = fmul float %115, %66
>  %119 = fmul float %95, %37
>  %120 = fmul float %96, %39
>  %121 = fmul float %97, %41
>  %122 = fsub float -0.000000e+00, %31
>  %123 = fmul float %71, %35
>  %124 = fadd float %123, %122
>  %125 = fmul float %116, %119
>  %126 = fmul float %117, %120
>  %127 = fmul float %118, %121
>  %128 = fcmp uge float %124, %33
>  %129 = select i1 %128, float %33, float %124
>  %130 = call float @llvm.AMDIL.clamp.(float %129, float 0.000000e+00, float 1.000000e+00)
>  %131 = fsub float -0.000000e+00, %51
>  %132 = fmul float %125, %131
>  %133 = fadd float %132, %43
>  %134 = fsub float -0.000000e+00, %51
>  %135 = fmul float %126, %134
>  %136 = fadd float %135, %45
>  %137 = fsub float -0.000000e+00, %51
>  %138 = fmul float %127, %137
>  %139 = fadd float %138, %47
>  %140 = fmul float %130, %130
>  %141 = fmul float %133, %140
>  %142 = fmul float %136, %140
>  %143 = fmul float %139, %140
>  %144 = fmul float %125, %51
>  %145 = fadd float %144, %141
>  %146 = fmul float %126, %51
>  %147 = fadd float %146, %142
>  %148 = fmul float %127, %51
>  %149 = fadd float %148, %143
>  %150 = fmul float %71, %49
>  %151 = call i32 @llvm.SI.packf16(float %145, float %147)
>  %152 = bitcast i32 %151 to float
>  %153 = call i32 @llvm.SI.packf16(float %149, float %150)
>  %154 = bitcast i32 %153 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %152, float %154, float %152, float %154)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8140900
>c8150901
>c8100800
>c8110801
>c0840308
>c0c60510
>bf8c007f
>f0800700
>00430404
>c0400100
>bf8c0070
>c0038121
>bf8c007f
>100e0a07
>d2820007
>041c0f05
>060e0ef3
>c0038123
>bf8c007f
>d282000a
>03ca0e07
>c8200500
>c8210501
>c81c0400
>c81d0401
>c0840300
>c0c60500
>bf8c007f
>f0800700
>00430707
>bf8c0770
>10141508
>c82c0100
>c82d0101
>101a170a
>c82c1102
>c82d1103
>c8281002
>c8291003
>c0840304
>c0c60508
>bf8c007f
>f0800700
>00430a0a
>c0010131
>bf8c0070
>10041602
>101a050d
>c0010178
>bf8c007f
>10041a02
>c0018175
>bf8c007f
>081c0403
>c8080f00
>c8090f01
>c001812f
>bf8c007f
>10060403
>c001812c
>bf8c007f
>0a060603
>c001812e
>bf8c007f
>d00c0004
>02000703
>7e1e0203
>d2000003
>00121f03
>d2060803
>02010103
>10060703
>101c070e
>d282000d
>0438050d
>c0018120
>bf8c007f
>101c0803
>d282000e
>04380704
>061c1cf3
>d282000e
>03ca1c07
>101c1d07
>c83c0000
>c83d0001
>101c1f0e
>c0018130
>bf8c007f
>101e1403
>101c1f0e
>101e1c02
>c0018174
>bf8c007f
>081e1e03
>101e070f
>d282000e
>043c050e
>5e1a1b0e
>c0018122
>bf8c007f
>101c0c03
>d2820004
>04380706
>060808f3
>d2820004
>03ca0807
>10080909
>c8140200
>c8150201
>10000b04
>c0018132
>bf8c007f
>10021803
>10000300
>10020002
>c0018176
>bf8c007f
>08020203
>10020701
>d2820000
>04040500
>c0000177
>bf8c007f
>10020400
>5e000300
>f8001c0f
>000d000d
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], CLIPVERTEX
>DCL OUT[3], GENERIC[19]
>DCL OUT[4], GENERIC[20]
>DCL OUT[5], GENERIC[21]
>DCL OUT[6], GENERIC[22]
>DCL CONST[0..55]
>DCL TEMP[0..9], LOCAL
>  0: MAD TEMP[0], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  1: DP4 TEMP[1].x, TEMP[0], CONST[52]
>  2: DP4 TEMP[2].x, TEMP[0], CONST[53]
>  3: MOV TEMP[1].y, TEMP[2].xxxx
>  4: DP4 TEMP[2].x, TEMP[0], CONST[54]
>  5: MOV TEMP[1].z, TEMP[2].xxxx
>  6: DP4 TEMP[2].x, TEMP[0], CONST[4]
>  7: DP4 TEMP[3].x, TEMP[0], CONST[5]
>  8: MOV TEMP[2].y, TEMP[3].xxxx
>  9: DP4 TEMP[4].x, TEMP[0], CONST[6]
> 10: MOV TEMP[2].z, TEMP[4].xxxx
> 11: DP4 TEMP[5].x, TEMP[0], CONST[7]
> 12: MOV TEMP[2].w, TEMP[5].xxxx
> 13: DP4 TEMP[6].x, TEMP[0], CONST[12]
> 14: MUL TEMP[0].xy, IN[1].xyyy, CONST[48].xyyy
> 15: ADD TEMP[7].x, TEMP[0].yyyy, TEMP[0].xxxx
> 16: MUL TEMP[0].xy, IN[1].xyyy, CONST[49].xyyy
> 17: ADD TEMP[7].x, TEMP[7].xxxx, CONST[48].wwww
> 18: ADD TEMP[8].x, TEMP[0].yyyy, TEMP[0].xxxx
> 19: ADD TEMP[8].x, TEMP[8].xxxx, CONST[49].wwww
> 20: MOV TEMP[7].y, TEMP[8].xxxx
> 21: MUL TEMP[0].xy, IN[1].xyyy, CONST[50].xyyy
> 22: ADD TEMP[8].x, TEMP[0].yyyy, TEMP[0].xxxx
> 23: MUL TEMP[0].xy, IN[1].xyyy, CONST[51].xyyy
> 24: ADD TEMP[8].x, TEMP[8].xxxx, CONST[50].wwww
> 25: ADD TEMP[0].x, TEMP[0].yyyy, TEMP[0].xxxx
> 26: ADD TEMP[0].x, TEMP[0].xxxx, CONST[51].wwww
> 27: MOV TEMP[8].y, TEMP[0].xxxx
> 28: MOV TEMP[1].w, TEMP[6].xxxx
> 29: MOV TEMP[8].zw, CONST[0].xxxx
> 30: MUL TEMP[0], IN[2].xyxx, CONST[0].yyxx
> 31: MAD TEMP[6], CONST[47].wwww, CONST[0].xxxy, CONST[0].yyyx
> 32: MOV TEMP[9], TEMP[2]
> 33: MAD TEMP[4].x, TEMP[4].xxxx, CONST[0].zzzz, -TEMP[5].xxxx
> 34: MOV TEMP[2].z, TEMP[4].xxxx
> 35: MOV TEMP[2].y, -TEMP[3].xxxx
> 36: MAD TEMP[2].xy, CONST[55].xyyy, TEMP[5].xxxx, TEMP[2].xyyy
> 37: MOV OUT[3], TEMP[7]
> 38: MOV OUT[4], TEMP[8]
> 39: MOV OUT[6], TEMP[0]
> 40: MOV OUT[0], TEMP[2]
> 41: MOV OUT[5], TEMP[1]
> 42: MOV OUT[2], TEMP[9]
> 43: MOV_SAT OUT[1], TEMP[6]
> 44: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 16
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 17
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 18
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 19
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 20
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 21
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 22
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 23
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 24
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 25
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 26
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 27
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 28
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 29
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 30
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 31
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 48
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 49
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 50
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 51
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 191
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 192
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 193
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 195
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 196
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 197
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 199
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 200
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 201
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 203
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 204
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 205
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 207
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 208
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 209
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 210
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 211
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 212
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 213
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr float addrspace(2)* %10, i32 214
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = getelementptr float addrspace(2)* %10, i32 215
>  %98 = load float addrspace(2)* %97, !tbaa !0
>  %99 = getelementptr float addrspace(2)* %10, i32 216
>  %100 = load float addrspace(2)* %99, !tbaa !0
>  %101 = getelementptr float addrspace(2)* %10, i32 217
>  %102 = load float addrspace(2)* %101, !tbaa !0
>  %103 = getelementptr float addrspace(2)* %10, i32 218
>  %104 = load float addrspace(2)* %103, !tbaa !0
>  %105 = getelementptr float addrspace(2)* %10, i32 219
>  %106 = load float addrspace(2)* %105, !tbaa !0
>  %107 = getelementptr float addrspace(2)* %10, i32 220
>  %108 = load float addrspace(2)* %107, !tbaa !0
>  %109 = getelementptr float addrspace(2)* %10, i32 221
>  %110 = load float addrspace(2)* %109, !tbaa !0
>  %111 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %112 = load <16 x i8> addrspace(2)* %111, !tbaa !0
>  %113 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %112, i32 0, i32 %5)
>  %114 = extractelement <4 x float> %113, i32 0
>  %115 = extractelement <4 x float> %113, i32 1
>  %116 = extractelement <4 x float> %113, i32 2
>  %117 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %118 = load <16 x i8> addrspace(2)* %117, !tbaa !0
>  %119 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %118, i32 0, i32 %5)
>  %120 = extractelement <4 x float> %119, i32 0
>  %121 = extractelement <4 x float> %119, i32 1
>  %122 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %123 = load <16 x i8> addrspace(2)* %122, !tbaa !0
>  %124 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %123, i32 0, i32 %5)
>  %125 = extractelement <4 x float> %124, i32 0
>  %126 = extractelement <4 x float> %124, i32 1
>  %127 = fmul float %114, %14
>  %128 = fadd float %127, %12
>  %129 = fmul float %115, %14
>  %130 = fadd float %129, %12
>  %131 = fmul float %116, %14
>  %132 = fadd float %131, %12
>  %133 = fmul float %114, %12
>  %134 = fadd float %133, %14
>  %135 = fmul float %128, %84
>  %136 = fmul float %130, %86
>  %137 = fadd float %135, %136
>  %138 = fmul float %132, %88
>  %139 = fadd float %137, %138
>  %140 = fmul float %134, %90
>  %141 = fadd float %139, %140
>  %142 = fmul float %128, %92
>  %143 = fmul float %130, %94
>  %144 = fadd float %142, %143
>  %145 = fmul float %132, %96
>  %146 = fadd float %144, %145
>  %147 = fmul float %134, %98
>  %148 = fadd float %146, %147
>  %149 = fmul float %128, %100
>  %150 = fmul float %130, %102
>  %151 = fadd float %149, %150
>  %152 = fmul float %132, %104
>  %153 = fadd float %151, %152
>  %154 = fmul float %134, %106
>  %155 = fadd float %153, %154
>  %156 = fmul float %128, %18
>  %157 = fmul float %130, %20
>  %158 = fadd float %156, %157
>  %159 = fmul float %132, %22
>  %160 = fadd float %158, %159
>  %161 = fmul float %134, %24
>  %162 = fadd float %160, %161
>  %163 = fmul float %128, %26
>  %164 = fmul float %130, %28
>  %165 = fadd float %163, %164
>  %166 = fmul float %132, %30
>  %167 = fadd float %165, %166
>  %168 = fmul float %134, %32
>  %169 = fadd float %167, %168
>  %170 = fmul float %128, %34
>  %171 = fmul float %130, %36
>  %172 = fadd float %170, %171
>  %173 = fmul float %132, %38
>  %174 = fadd float %172, %173
>  %175 = fmul float %134, %40
>  %176 = fadd float %174, %175
>  %177 = fmul float %128, %42
>  %178 = fmul float %130, %44
>  %179 = fadd float %177, %178
>  %180 = fmul float %132, %46
>  %181 = fadd float %179, %180
>  %182 = fmul float %134, %48
>  %183 = fadd float %181, %182
>  %184 = fmul float %128, %50
>  %185 = fmul float %130, %52
>  %186 = fadd float %184, %185
>  %187 = fmul float %132, %54
>  %188 = fadd float %186, %187
>  %189 = fmul float %134, %56
>  %190 = fadd float %188, %189
>  %191 = fmul float %120, %60
>  %192 = fmul float %121, %62
>  %193 = fadd float %192, %191
>  %194 = fmul float %120, %66
>  %195 = fmul float %121, %68
>  %196 = fadd float %193, %64
>  %197 = fadd float %195, %194
>  %198 = fadd float %197, %70
>  %199 = fmul float %120, %72
>  %200 = fmul float %121, %74
>  %201 = fadd float %200, %199
>  %202 = fmul float %120, %78
>  %203 = fmul float %121, %80
>  %204 = fadd float %201, %76
>  %205 = fadd float %203, %202
>  %206 = fadd float %205, %82
>  %207 = fmul float %125, %14
>  %208 = fmul float %126, %14
>  %209 = fmul float %125, %12
>  %210 = fmul float %125, %12
>  %211 = fmul float %58, %12
>  %212 = fadd float %211, %14
>  %213 = fmul float %58, %12
>  %214 = fadd float %213, %14
>  %215 = fmul float %58, %12
>  %216 = fadd float %215, %14
>  %217 = fmul float %58, %14
>  %218 = fadd float %217, %12
>  %219 = fsub float -0.000000e+00, %183
>  %220 = fmul float %176, %16
>  %221 = fadd float %220, %219
>  %222 = fsub float -0.000000e+00, %169
>  %223 = fmul float %108, %183
>  %224 = fadd float %223, %162
>  %225 = fmul float %110, %183
>  %226 = fadd float %225, %222
>  %227 = call float @llvm.AMDIL.clamp.(float %212, float 0.000000e+00, float 1.000000e+00)
>  %228 = call float @llvm.AMDIL.clamp.(float %214, float 0.000000e+00, float 1.000000e+00)
>  %229 = call float @llvm.AMDIL.clamp.(float %216, float 0.000000e+00, float 1.000000e+00)
>  %230 = call float @llvm.AMDIL.clamp.(float %218, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %227, float %228, float %229, float %230)
>  %231 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %232 = load float addrspace(2)* addrspace(2)* %231, !tbaa !0
>  %233 = getelementptr float addrspace(2)* %232, i32 0
>  %234 = load float addrspace(2)* %233, !tbaa !0
>  %235 = fmul float %234, %162
>  %236 = getelementptr float addrspace(2)* %232, i32 1
>  %237 = load float addrspace(2)* %236, !tbaa !0
>  %238 = fmul float %237, %169
>  %239 = fadd float %235, %238
>  %240 = getelementptr float addrspace(2)* %232, i32 2
>  %241 = load float addrspace(2)* %240, !tbaa !0
>  %242 = fmul float %241, %176
>  %243 = fadd float %239, %242
>  %244 = getelementptr float addrspace(2)* %232, i32 3
>  %245 = load float addrspace(2)* %244, !tbaa !0
>  %246 = fmul float %245, %183
>  %247 = fadd float %243, %246
>  %248 = getelementptr float addrspace(2)* %232, i32 4
>  %249 = load float addrspace(2)* %248, !tbaa !0
>  %250 = fmul float %249, %162
>  %251 = getelementptr float addrspace(2)* %232, i32 5
>  %252 = load float addrspace(2)* %251, !tbaa !0
>  %253 = fmul float %252, %169
>  %254 = fadd float %250, %253
>  %255 = getelementptr float addrspace(2)* %232, i32 6
>  %256 = load float addrspace(2)* %255, !tbaa !0
>  %257 = fmul float %256, %176
>  %258 = fadd float %254, %257
>  %259 = getelementptr float addrspace(2)* %232, i32 7
>  %260 = load float addrspace(2)* %259, !tbaa !0
>  %261 = fmul float %260, %183
>  %262 = fadd float %258, %261
>  %263 = getelementptr float addrspace(2)* %232, i32 8
>  %264 = load float addrspace(2)* %263, !tbaa !0
>  %265 = fmul float %264, %162
>  %266 = getelementptr float addrspace(2)* %232, i32 9
>  %267 = load float addrspace(2)* %266, !tbaa !0
>  %268 = fmul float %267, %169
>  %269 = fadd float %265, %268
>  %270 = getelementptr float addrspace(2)* %232, i32 10
>  %271 = load float addrspace(2)* %270, !tbaa !0
>  %272 = fmul float %271, %176
>  %273 = fadd float %269, %272
>  %274 = getelementptr float addrspace(2)* %232, i32 11
>  %275 = load float addrspace(2)* %274, !tbaa !0
>  %276 = fmul float %275, %183
>  %277 = fadd float %273, %276
>  %278 = getelementptr float addrspace(2)* %232, i32 12
>  %279 = load float addrspace(2)* %278, !tbaa !0
>  %280 = fmul float %279, %162
>  %281 = getelementptr float addrspace(2)* %232, i32 13
>  %282 = load float addrspace(2)* %281, !tbaa !0
>  %283 = fmul float %282, %169
>  %284 = fadd float %280, %283
>  %285 = getelementptr float addrspace(2)* %232, i32 14
>  %286 = load float addrspace(2)* %285, !tbaa !0
>  %287 = fmul float %286, %176
>  %288 = fadd float %284, %287
>  %289 = getelementptr float addrspace(2)* %232, i32 15
>  %290 = load float addrspace(2)* %289, !tbaa !0
>  %291 = fmul float %290, %183
>  %292 = fadd float %288, %291
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %247, float %262, float %277, float %292)
>  %293 = getelementptr float addrspace(2)* %232, i32 16
>  %294 = load float addrspace(2)* %293, !tbaa !0
>  %295 = fmul float %294, %162
>  %296 = getelementptr float addrspace(2)* %232, i32 17
>  %297 = load float addrspace(2)* %296, !tbaa !0
>  %298 = fmul float %297, %169
>  %299 = fadd float %295, %298
>  %300 = getelementptr float addrspace(2)* %232, i32 18
>  %301 = load float addrspace(2)* %300, !tbaa !0
>  %302 = fmul float %301, %176
>  %303 = fadd float %299, %302
>  %304 = getelementptr float addrspace(2)* %232, i32 19
>  %305 = load float addrspace(2)* %304, !tbaa !0
>  %306 = fmul float %305, %183
>  %307 = fadd float %303, %306
>  %308 = getelementptr float addrspace(2)* %232, i32 20
>  %309 = load float addrspace(2)* %308, !tbaa !0
>  %310 = fmul float %309, %162
>  %311 = getelementptr float addrspace(2)* %232, i32 21
>  %312 = load float addrspace(2)* %311, !tbaa !0
>  %313 = fmul float %312, %169
>  %314 = fadd float %310, %313
>  %315 = getelementptr float addrspace(2)* %232, i32 22
>  %316 = load float addrspace(2)* %315, !tbaa !0
>  %317 = fmul float %316, %176
>  %318 = fadd float %314, %317
>  %319 = getelementptr float addrspace(2)* %232, i32 23
>  %320 = load float addrspace(2)* %319, !tbaa !0
>  %321 = fmul float %320, %183
>  %322 = fadd float %318, %321
>  %323 = getelementptr float addrspace(2)* %232, i32 24
>  %324 = load float addrspace(2)* %323, !tbaa !0
>  %325 = fmul float %324, %162
>  %326 = getelementptr float addrspace(2)* %232, i32 25
>  %327 = load float addrspace(2)* %326, !tbaa !0
>  %328 = fmul float %327, %169
>  %329 = fadd float %325, %328
>  %330 = getelementptr float addrspace(2)* %232, i32 26
>  %331 = load float addrspace(2)* %330, !tbaa !0
>  %332 = fmul float %331, %176
>  %333 = fadd float %329, %332
>  %334 = getelementptr float addrspace(2)* %232, i32 27
>  %335 = load float addrspace(2)* %334, !tbaa !0
>  %336 = fmul float %335, %183
>  %337 = fadd float %333, %336
>  %338 = getelementptr float addrspace(2)* %232, i32 28
>  %339 = load float addrspace(2)* %338, !tbaa !0
>  %340 = fmul float %339, %162
>  %341 = getelementptr float addrspace(2)* %232, i32 29
>  %342 = load float addrspace(2)* %341, !tbaa !0
>  %343 = fmul float %342, %169
>  %344 = fadd float %340, %343
>  %345 = getelementptr float addrspace(2)* %232, i32 30
>  %346 = load float addrspace(2)* %345, !tbaa !0
>  %347 = fmul float %346, %176
>  %348 = fadd float %344, %347
>  %349 = getelementptr float addrspace(2)* %232, i32 31
>  %350 = load float addrspace(2)* %349, !tbaa !0
>  %351 = fmul float %350, %183
>  %352 = fadd float %348, %351
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %307, float %322, float %337, float %352)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %196, float %198, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %204, float %206, float %12, float %12)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %141, float %148, float %155, float %190)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %207, float %208, float %209, float %210)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %224, float %226, float %221, float %183)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0410100
>bf8c007f
>c00403bf
>c0028300
>bf8c007f
>7e060205
>c0020301
>bf8c007f
>7e020204
>d2820002
>040e0208
>d2060802
>02010102
>d2820004
>04060608
>d2060804
>02010104
>f800020f
>02040404
>c0840700
>bf8c000f
>e00c2000
>80020600
>bf8c0770
>d2820002
>040c0906
>d2820004
>040c0907
>c0040311
>bf8c007f
>100a0808
>c0040310
>bf8c007f
>d282000a
>04141102
>d2820005
>040c0908
>c0040312
>bf8c007f
>d2820003
>04281105
>d2820006
>04040b06
>c0040313
>bf8c007f
>d2820001
>040c1106
>c0040315
>bf8c007f
>10060808
>c0040314
>bf8c007f
>d2820003
>040c1102
>c0040316
>bf8c007f
>d2820003
>040c1105
>c0040317
>bf8c007f
>d2820003
>040c1106
>c0400102
>bf8c007f
>c004010d
>bf8c007f
>100e0608
>c004010c
>bf8c007f
>d2820008
>041e0208
>c0040319
>bf8c007f
>100e0808
>c0040318
>bf8c007f
>d2820007
>041c1102
>c004031a
>bf8c007f
>d2820007
>041c1105
>c004031b
>bf8c007f
>d2820007
>041c1106
>c004010e
>bf8c007f
>d2820009
>04220e08
>c004031d
>bf8c007f
>10100808
>c004031c
>bf8c007f
>d2820008
>04201102
>c004031e
>bf8c007f
>d2820008
>04201105
>c004031f
>bf8c007f
>d2820008
>04201106
>c004010f
>bf8c007f
>d2820009
>04261008
>c0040109
>bf8c007f
>10140608
>c0040108
>bf8c007f
>d282000a
>042a0208
>c004010a
>bf8c007f
>d282000a
>042a0e08
>c004010b
>bf8c007f
>d282000a
>042a1008
>c0040105
>bf8c007f
>10160608
>c0040104
>bf8c007f
>d282000b
>042e0208
>c0040106
>bf8c007f
>d282000b
>042e0e08
>c0040107
>bf8c007f
>d282000b
>042e1008
>c0040101
>bf8c007f
>10180608
>c0040100
>bf8c007f
>d282000c
>04320208
>c0040102
>bf8c007f
>d282000c
>04320e08
>c0040103
>bf8c007f
>d282000c
>04321008
>f80000ef
>090a0b0c
>c004011d
>bf8c000f
>10120608
>c004011c
>bf8c007f
>d2820009
>04260208
>c004011e
>bf8c007f
>d2820009
>04260e08
>c004011f
>bf8c007f
>d2820009
>04261008
>c0040119
>bf8c007f
>10140608
>c0040118
>bf8c007f
>d282000a
>042a0208
>c004011a
>bf8c007f
>d282000a
>042a0e08
>c004011b
>bf8c007f
>d282000a
>042a1008
>c0040115
>bf8c007f
>10160608
>c0040114
>bf8c007f
>d282000b
>042e0208
>c0040116
>bf8c007f
>d282000b
>042e0e08
>c0040117
>bf8c007f
>d282000b
>042e1008
>c0040111
>bf8c007f
>10180608
>c0040110
>bf8c007f
>d282000c
>04320208
>c0040112
>bf8c007f
>d282000c
>04320e08
>c0000113
>bf8c007f
>d282000c
>04321000
>f80000ff
>090a0b0c
>c0840704
>bf8c000f
>e00c2000
>80020900
>c00003c4
>bf8c0070
>101a1200
>c00003c5
>bf8c007f
>d282000d
>0434010a
>c00003c7
>bf8c007f
>061a1a00
>c00003c0
>bf8c007f
>101c1200
>c00003c1
>bf8c007f
>d282000e
>0438010a
>c00003c3
>bf8c007f
>061c1c00
>7e1e0280
>f800021f
>0f0f0d0e
>c00003cc
>bf8c000f
>101a1200
>c00003cd
>bf8c007f
>d282000d
>0434010a
>c00003cf
>bf8c007f
>061a1a00
>c00003c8
>bf8c007f
>101c1200
>c00003c9
>bf8c007f
>d2820009
>0438010a
>c00003cb
>bf8c007f
>06121200
>7e140205
>7e160205
>f800022f
>0b0a0d09
>c0000331
>bf8c000f
>10120800
>c0000330
>bf8c007f
>d2820009
>04240102
>c0000332
>bf8c007f
>d2820009
>04240105
>c0000333
>bf8c007f
>d2820009
>04240106
>c00003d9
>bf8c007f
>10140800
>c00003d8
>bf8c007f
>d282000a
>04280102
>c00003da
>bf8c007f
>d282000a
>04280105
>c00003db
>bf8c007f
>d282000a
>04280106
>c00003d5
>bf8c007f
>10160800
>c00003d4
>bf8c007f
>d282000b
>042c0102
>c00003d6
>bf8c007f
>d282000b
>042c0105
>c00003d7
>bf8c007f
>d282000b
>042c0106
>c00003d1
>bf8c007f
>10080800
>c00003d0
>bf8c007f
>d2820002
>04100102
>c00003d2
>bf8c007f
>d2820002
>04080105
>c00003d3
>bf8c007f
>d2820002
>04080106
>f800023f
>090a0b02
>c0840708
>bf8c000f
>e00c2000
>80020900
>bf8c0770
>10001205
>10041404
>10081204
>f800024f
>00000204
>c00003dc
>bf8c000f
>d2820000
>04061000
>c0000302
>bf8c007f
>10020e00
>08021101
>c00003dd
>bf8c007f
>10041000
>08040702
>f80008cf
>08010200
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], GENERIC[19], PERSPECTIVE
>DCL IN[2], GENERIC[20], PERSPECTIVE
>DCL IN[3], GENERIC[21], PERSPECTIVE
>DCL IN[4], GENERIC[22], PERSPECTIVE, CENTROID
>DCL IN[5], GENERIC[23], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL CONST[0..30]
>DCL TEMP[0..5], LOCAL
>DCL TEMP[6], ARRAY(1), LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[4].xyyy
>  1: TEX TEMP[0].xyz, TEMP[0], SAMP[1], 2D
>  2: MOV TEMP[1].xy, IN[4].wzzz
>  3: TEX TEMP[1].xyz, TEMP[1], SAMP[1], 2D
>  4: MOV TEMP[2].xy, IN[1].xyyy
>  5: TEX TEMP[2].xyz, TEMP[2], SAMP[2], 2D
>  6: MOV TEMP[3].xy, IN[5].xyyy
>  7: TEX TEMP[3].xyz, TEMP[3], SAMP[1], 2D
>  8: MOV TEMP[4].xy, IN[2].xyyy
>  9: TEX TEMP[4].xyz, TEMP[4], SAMP[3], 2D
> 10: MOV TEMP[5].xy, IN[1].xyyy
> 11: TEX TEMP[5].xyz, TEMP[5], SAMP[0], 2D
> 12: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[2].yyyy
> 13: MAD TEMP[0].xyz, TEMP[2].xxxx, TEMP[0].xyzz, TEMP[1].xyzz
> 14: MAD TEMP[0].xyz, TEMP[2].zzzz, TEMP[3].xyzz, TEMP[0].xyzz
> 15: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[12].xyzz
> 16: MUL TEMP[1].xyz, TEMP[4].xyzz, CONST[8].xyzz
> 17: MAD TEMP[1].xyz, IMM[0].xxxx, TEMP[1].xyzz, IMM[0].yyyy
> 18: MAD TEMP[1].xyz, CONST[8].wwww, TEMP[1].xyzz, IMM[0].zzzz
> 19: MUL TEMP[2].xyz, TEMP[5].xyzz, TEMP[1].xyzz
> 20: MUL TEMP[2].xyz, TEMP[2].xyzz, IN[0].xyzz
> 21: MAD TEMP[3].x, IN[3].wwww, CONST[11].wwww, -CONST[11].xxxx
> 22: MUL TEMP[2].xyz, TEMP[0].xyzz, TEMP[2].xyzz
> 23: MIN TEMP[0].x, TEMP[3].xxxx, CONST[11].zzzz
> 24: MOV_SAT TEMP[0].x, TEMP[0].xxxx
> 25: MAD TEMP[1].xyz, TEMP[2].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 26: MUL TEMP[0].x, TEMP[0].xxxx, TEMP[0].xxxx
> 27: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[0].xxxx
> 28: MAD TEMP[2].xyz, TEMP[2].xyzz, CONST[30].xxxx, TEMP[1].xyzz
> 29: MUL TEMP[0].x, IN[3].wwww, CONST[29].wwww
> 30: MOV TEMP[2].w, TEMP[0].xxxx
> 31: MOV TEMP[6], TEMP[2]
> 32: MOV OUT[0], TEMP[6]
> 33: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 32
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 33
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 34
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 35
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 44
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 46
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 47
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 48
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 49
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 50
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 116
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr float addrspace(2)* %21, i32 117
>  %45 = load float addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr float addrspace(2)* %21, i32 118
>  %47 = load float addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr float addrspace(2)* %21, i32 119
>  %49 = load float addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr float addrspace(2)* %21, i32 120
>  %51 = load float addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %53 = load <32 x i8> addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %55 = load <16 x i8> addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %57 = load <32 x i8> addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %59 = load <16 x i8> addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr <32 x i8> addrspace(2)* %2, i32 2
>  %61 = load <32 x i8> addrspace(2)* %60, !tbaa !0
>  %62 = getelementptr <16 x i8> addrspace(2)* %1, i32 2
>  %63 = load <16 x i8> addrspace(2)* %62, !tbaa !0
>  %64 = getelementptr <32 x i8> addrspace(2)* %2, i32 3
>  %65 = load <32 x i8> addrspace(2)* %64, !tbaa !0
>  %66 = getelementptr <16 x i8> addrspace(2)* %1, i32 3
>  %67 = load <16 x i8> addrspace(2)* %66, !tbaa !0
>  %68 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %69 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %70 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %71 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %72 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %73 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %74 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %75 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %3, <2 x i32> %5)
>  %76 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %3, <2 x i32> %6)
>  %77 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %3, <2 x i32> %6)
>  %78 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %3, <2 x i32> %6)
>  %79 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %3, <2 x i32> %6)
>  %80 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %3, <2 x i32> %6)
>  %81 = call float @llvm.SI.fs.interp(i32 1, i32 5, i32 %3, <2 x i32> %6)
>  %82 = bitcast float %76 to i32
>  %83 = bitcast float %77 to i32
>  %84 = insertelement <2 x i32> undef, i32 %82, i32 0
>  %85 = insertelement <2 x i32> %84, i32 %83, i32 1
>  %86 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %85, <32 x i8> %57, <16 x i8> %59, i32 2)
>  %87 = extractelement <4 x float> %86, i32 0
>  %88 = extractelement <4 x float> %86, i32 1
>  %89 = extractelement <4 x float> %86, i32 2
>  %90 = bitcast float %79 to i32
>  %91 = bitcast float %78 to i32
>  %92 = insertelement <2 x i32> undef, i32 %90, i32 0
>  %93 = insertelement <2 x i32> %92, i32 %91, i32 1
>  %94 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %93, <32 x i8> %57, <16 x i8> %59, i32 2)
>  %95 = extractelement <4 x float> %94, i32 0
>  %96 = extractelement <4 x float> %94, i32 1
>  %97 = extractelement <4 x float> %94, i32 2
>  %98 = bitcast float %71 to i32
>  %99 = bitcast float %72 to i32
>  %100 = insertelement <2 x i32> undef, i32 %98, i32 0
>  %101 = insertelement <2 x i32> %100, i32 %99, i32 1
>  %102 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %101, <32 x i8> %61, <16 x i8> %63, i32 2)
>  %103 = extractelement <4 x float> %102, i32 0
>  %104 = extractelement <4 x float> %102, i32 1
>  %105 = extractelement <4 x float> %102, i32 2
>  %106 = bitcast float %80 to i32
>  %107 = bitcast float %81 to i32
>  %108 = insertelement <2 x i32> undef, i32 %106, i32 0
>  %109 = insertelement <2 x i32> %108, i32 %107, i32 1
>  %110 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %109, <32 x i8> %57, <16 x i8> %59, i32 2)
>  %111 = extractelement <4 x float> %110, i32 0
>  %112 = extractelement <4 x float> %110, i32 1
>  %113 = extractelement <4 x float> %110, i32 2
>  %114 = bitcast float %73 to i32
>  %115 = bitcast float %74 to i32
>  %116 = insertelement <2 x i32> undef, i32 %114, i32 0
>  %117 = insertelement <2 x i32> %116, i32 %115, i32 1
>  %118 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %117, <32 x i8> %65, <16 x i8> %67, i32 2)
>  %119 = extractelement <4 x float> %118, i32 0
>  %120 = extractelement <4 x float> %118, i32 1
>  %121 = extractelement <4 x float> %118, i32 2
>  %122 = bitcast float %71 to i32
>  %123 = bitcast float %72 to i32
>  %124 = insertelement <2 x i32> undef, i32 %122, i32 0
>  %125 = insertelement <2 x i32> %124, i32 %123, i32 1
>  %126 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %125, <32 x i8> %53, <16 x i8> %55, i32 2)
>  %127 = extractelement <4 x float> %126, i32 0
>  %128 = extractelement <4 x float> %126, i32 1
>  %129 = extractelement <4 x float> %126, i32 2
>  %130 = fmul float %95, %104
>  %131 = fmul float %96, %104
>  %132 = fmul float %97, %104
>  %133 = fmul float %103, %87
>  %134 = fadd float %133, %130
>  %135 = fmul float %103, %88
>  %136 = fadd float %135, %131
>  %137 = fmul float %103, %89
>  %138 = fadd float %137, %132
>  %139 = fmul float %105, %111
>  %140 = fadd float %139, %134
>  %141 = fmul float %105, %112
>  %142 = fadd float %141, %136
>  %143 = fmul float %105, %113
>  %144 = fadd float %143, %138
>  %145 = fmul float %140, %37
>  %146 = fmul float %142, %39
>  %147 = fmul float %144, %41
>  %148 = fmul float %119, %23
>  %149 = fmul float %120, %25
>  %150 = fmul float %121, %27
>  %151 = fmul float 2.000000e+00, %148
>  %152 = fadd float %151, -1.000000e+00
>  %153 = fmul float 2.000000e+00, %149
>  %154 = fadd float %153, -1.000000e+00
>  %155 = fmul float 2.000000e+00, %150
>  %156 = fadd float %155, -1.000000e+00
>  %157 = fmul float %29, %152
>  %158 = fadd float %157, 1.000000e+00
>  %159 = fmul float %29, %154
>  %160 = fadd float %159, 1.000000e+00
>  %161 = fmul float %29, %156
>  %162 = fadd float %161, 1.000000e+00
>  %163 = fmul float %127, %158
>  %164 = fmul float %128, %160
>  %165 = fmul float %129, %162
>  %166 = fmul float %163, %68
>  %167 = fmul float %164, %69
>  %168 = fmul float %165, %70
>  %169 = fsub float -0.000000e+00, %31
>  %170 = fmul float %75, %35
>  %171 = fadd float %170, %169
>  %172 = fmul float %145, %166
>  %173 = fmul float %146, %167
>  %174 = fmul float %147, %168
>  %175 = fcmp uge float %171, %33
>  %176 = select i1 %175, float %33, float %171
>  %177 = call float @llvm.AMDIL.clamp.(float %176, float 0.000000e+00, float 1.000000e+00)
>  %178 = fsub float -0.000000e+00, %51
>  %179 = fmul float %172, %178
>  %180 = fadd float %179, %43
>  %181 = fsub float -0.000000e+00, %51
>  %182 = fmul float %173, %181
>  %183 = fadd float %182, %45
>  %184 = fsub float -0.000000e+00, %51
>  %185 = fmul float %174, %184
>  %186 = fadd float %185, %47
>  %187 = fmul float %177, %177
>  %188 = fmul float %180, %187
>  %189 = fmul float %183, %187
>  %190 = fmul float %186, %187
>  %191 = fmul float %172, %51
>  %192 = fadd float %191, %188
>  %193 = fmul float %173, %51
>  %194 = fadd float %193, %189
>  %195 = fmul float %174, %51
>  %196 = fadd float %195, %190
>  %197 = fmul float %75, %49
>  %198 = call i32 @llvm.SI.packf16(float %192, float %194)
>  %199 = bitcast i32 %198 to float
>  %200 = call i32 @llvm.SI.packf16(float %196, float %197)
>  %201 = bitcast i32 %200 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %199, float %201, float %199, float %201)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8380500
>c8390501
>c8340400
>c8350401
>c0840308
>c0c60510
>bf8c007f
>f0800700
>0043040d
>c8201202
>c8211203
>c81c1302
>c81d1303
>c0840304
>c0c60508
>bf8c0070
>f0800700
>00430707
>bf8c0770
>101e0b08
>c82c1102
>c82d1103
>c8281002
>c8291003
>f0800700
>00430a0a
>bf8c0770
>d2820012
>043e1704
>c8401502
>c8411503
>c83c1402
>c83d1403
>f0800700
>00430f0f
>bf8c0770
>d2820002
>044a2106
>c0400100
>bf8c007f
>c0038131
>bf8c007f
>10040407
>c84c0900
>c84d0901
>c8480800
>c8490801
>c084030c
>c0c60518
>bf8c007f
>f0800700
>00431212
>c0038121
>bf8c0070
>10062607
>d2820003
>040c0f13
>060606f3
>c0038123
>bf8c007f
>d2820003
>03ca0607
>c0840300
>c0c60500
>bf8c007f
>f0800700
>0043150d
>bf8c0770
>10060716
>c8340100
>c8350101
>10061b03
>101a0702
>c0010178
>bf8c007f
>10041a02
>c0018175
>bf8c007f
>081c0403
>c8080f00
>c8090f01
>c001812f
>bf8c007f
>10060403
>c001812c
>bf8c007f
>0a060603
>c001812e
>bf8c007f
>d00c0004
>02000703
>7e300203
>d2000003
>00123103
>d2060803
>02010103
>10060703
>101c070e
>d282000d
>0438050d
>101c0b07
>d282000e
>043a1504
>d282000e
>043a1f06
>c0018130
>bf8c007f
>101c1c03
>c0018120
>bf8c007f
>10302403
>d2820018
>04600712
>063030f3
>d2820018
>03ca3007
>10303115
>c8640000
>c8650001
>10303318
>101c310e
>10301c02
>c0018174
>bf8c007f
>08303003
>10300718
>d282000e
>0460050e
>5e1a1b0e
>100e0b09
>d2820007
>041e1904
>d2820004
>041e2306
>c0018132
>bf8c007f
>10080803
>c0018122
>bf8c007f
>100a2803
>d2820005
>04140714
>060a0af3
>d2820005
>03ca0a07
>100a0b17
>c8180200
>c8190201
>10000d05
>10000104
>10020002
>c0018176
>bf8c007f
>08020203
>10020701
>d2820000
>04040500
>c0000177
>bf8c007f
>10020400
>5e000300
>f8001c0f
>000d000d
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], CLIPVERTEX
>DCL OUT[3], GENERIC[19]
>DCL OUT[4], GENERIC[20]
>DCL OUT[5], GENERIC[21]
>DCL OUT[6], GENERIC[22]
>DCL OUT[7], GENERIC[23]
>DCL CONST[0..55]
>DCL TEMP[0..11], LOCAL
>  0: MAD TEMP[0], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  1: DP4 TEMP[1].x, TEMP[0], CONST[52]
>  2: DP4 TEMP[2].x, TEMP[0], CONST[53]
>  3: MOV TEMP[1].y, TEMP[2].xxxx
>  4: DP4 TEMP[2].x, TEMP[0], CONST[54]
>  5: MOV TEMP[1].z, TEMP[2].xxxx
>  6: DP4 TEMP[2].x, TEMP[0], CONST[4]
>  7: DP4 TEMP[3].x, TEMP[0], CONST[5]
>  8: MOV TEMP[2].y, TEMP[3].xxxx
>  9: DP4 TEMP[4].x, TEMP[0], CONST[6]
> 10: MOV TEMP[2].z, TEMP[4].xxxx
> 11: MUL TEMP[5].xy, IN[1].xyyy, CONST[48].xyyy
> 12: DP4 TEMP[6].x, TEMP[0], CONST[7]
> 13: MOV TEMP[2].w, TEMP[6].xxxx
> 14: ADD TEMP[7].x, TEMP[5].yyyy, TEMP[5].xxxx
> 15: DP4 TEMP[8].x, TEMP[0], CONST[12]
> 16: ADD TEMP[7].x, TEMP[7].xxxx, CONST[48].wwww
> 17: MUL TEMP[5].xy, IN[1].xyyy, CONST[49].xyyy
> 18: MUL TEMP[0].xy, IN[1].xyyy, CONST[50].xyyy
> 19: ADD TEMP[9].x, TEMP[5].yyyy, TEMP[5].xxxx
> 20: ADD TEMP[10].x, TEMP[0].yyyy, TEMP[0].xxxx
> 21: ADD TEMP[9].x, TEMP[9].xxxx, CONST[49].wwww
> 22: MOV TEMP[7].y, TEMP[9].xxxx
> 23: ADD TEMP[9].x, TEMP[10].xxxx, CONST[50].wwww
> 24: MUL TEMP[5].xy, IN[1].xyyy, CONST[51].xyyy
> 25: MUL TEMP[0].xy, IN[1].xyyy, CONST[14].xyyy
> 26: ADD TEMP[10].x, TEMP[5].yyyy, TEMP[5].xxxx
> 27: ADD TEMP[11].x, TEMP[0].yyyy, TEMP[0].xxxx
> 28: ADD TEMP[10].x, TEMP[10].xxxx, CONST[51].wwww
> 29: MOV TEMP[9].y, TEMP[10].xxxx
> 30: ADD TEMP[10].x, TEMP[11].xxxx, CONST[14].wwww
> 31: MOV TEMP[10].z, TEMP[10].xxxx
> 32: MUL TEMP[5].xy, IN[1].xyyy, CONST[15].xyyy
> 33: ADD TEMP[0].xy, IN[3].xyyy, IN[2].xyyy
> 34: ADD TEMP[5].x, TEMP[5].yyyy, TEMP[5].xxxx
> 35: ADD TEMP[11].xy, TEMP[0].yxxx, IN[3].yxxx
> 36: MOV TEMP[0].zw, TEMP[11].yyxy
> 37: ADD TEMP[5].x, TEMP[5].xxxx, CONST[15].wwww
> 38: MOV TEMP[10].w, TEMP[5].xxxx
> 39: MOV TEMP[0], TEMP[0]
> 40: ADD TEMP[10].xy, TEMP[11].yxxx, IN[3].xyyy
> 41: MOV TEMP[1].w, TEMP[8].xxxx
> 42: MOV TEMP[9].zw, CONST[0].xxxx
> 43: MAD TEMP[5], CONST[47].wwww, CONST[0].xxxy, CONST[0].yyyx
> 44: MOV TEMP[8], TEMP[2]
> 45: MAD TEMP[4].x, TEMP[4].xxxx, CONST[0].zzzz, -TEMP[6].xxxx
> 46: MOV TEMP[2].z, TEMP[4].xxxx
> 47: MOV TEMP[2].y, -TEMP[3].xxxx
> 48: MAD TEMP[2].xy, CONST[55].xyyy, TEMP[6].xxxx, TEMP[2].xyyy
> 49: MOV OUT[3], TEMP[7]
> 50: MOV OUT[4], TEMP[9]
> 51: MOV OUT[6], TEMP[0]
> 52: MOV OUT[7], TEMP[10]
> 53: MOV OUT[0], TEMP[2]
> 54: MOV OUT[5], TEMP[1]
> 55: MOV OUT[2], TEMP[8]
> 56: MOV_SAT OUT[1], TEMP[5]
> 57: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 16
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 17
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 18
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 19
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 20
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 21
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 22
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 23
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 24
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 25
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 26
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 27
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 28
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 29
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 30
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 31
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 48
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 49
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 50
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 51
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 56
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 57
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 59
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 60
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 61
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 63
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 191
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 192
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 193
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 195
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 196
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 197
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 199
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 200
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 201
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 203
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 204
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 205
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 207
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr float addrspace(2)* %10, i32 208
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = getelementptr float addrspace(2)* %10, i32 209
>  %98 = load float addrspace(2)* %97, !tbaa !0
>  %99 = getelementptr float addrspace(2)* %10, i32 210
>  %100 = load float addrspace(2)* %99, !tbaa !0
>  %101 = getelementptr float addrspace(2)* %10, i32 211
>  %102 = load float addrspace(2)* %101, !tbaa !0
>  %103 = getelementptr float addrspace(2)* %10, i32 212
>  %104 = load float addrspace(2)* %103, !tbaa !0
>  %105 = getelementptr float addrspace(2)* %10, i32 213
>  %106 = load float addrspace(2)* %105, !tbaa !0
>  %107 = getelementptr float addrspace(2)* %10, i32 214
>  %108 = load float addrspace(2)* %107, !tbaa !0
>  %109 = getelementptr float addrspace(2)* %10, i32 215
>  %110 = load float addrspace(2)* %109, !tbaa !0
>  %111 = getelementptr float addrspace(2)* %10, i32 216
>  %112 = load float addrspace(2)* %111, !tbaa !0
>  %113 = getelementptr float addrspace(2)* %10, i32 217
>  %114 = load float addrspace(2)* %113, !tbaa !0
>  %115 = getelementptr float addrspace(2)* %10, i32 218
>  %116 = load float addrspace(2)* %115, !tbaa !0
>  %117 = getelementptr float addrspace(2)* %10, i32 219
>  %118 = load float addrspace(2)* %117, !tbaa !0
>  %119 = getelementptr float addrspace(2)* %10, i32 220
>  %120 = load float addrspace(2)* %119, !tbaa !0
>  %121 = getelementptr float addrspace(2)* %10, i32 221
>  %122 = load float addrspace(2)* %121, !tbaa !0
>  %123 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %124 = load <16 x i8> addrspace(2)* %123, !tbaa !0
>  %125 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %124, i32 0, i32 %5)
>  %126 = extractelement <4 x float> %125, i32 0
>  %127 = extractelement <4 x float> %125, i32 1
>  %128 = extractelement <4 x float> %125, i32 2
>  %129 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %130 = load <16 x i8> addrspace(2)* %129, !tbaa !0
>  %131 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %130, i32 0, i32 %5)
>  %132 = extractelement <4 x float> %131, i32 0
>  %133 = extractelement <4 x float> %131, i32 1
>  %134 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %135 = load <16 x i8> addrspace(2)* %134, !tbaa !0
>  %136 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %135, i32 0, i32 %5)
>  %137 = extractelement <4 x float> %136, i32 0
>  %138 = extractelement <4 x float> %136, i32 1
>  %139 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %140 = load <16 x i8> addrspace(2)* %139, !tbaa !0
>  %141 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %140, i32 0, i32 %5)
>  %142 = extractelement <4 x float> %141, i32 0
>  %143 = extractelement <4 x float> %141, i32 1
>  %144 = fmul float %126, %14
>  %145 = fadd float %144, %12
>  %146 = fmul float %127, %14
>  %147 = fadd float %146, %12
>  %148 = fmul float %128, %14
>  %149 = fadd float %148, %12
>  %150 = fmul float %126, %12
>  %151 = fadd float %150, %14
>  %152 = fmul float %145, %96
>  %153 = fmul float %147, %98
>  %154 = fadd float %152, %153
>  %155 = fmul float %149, %100
>  %156 = fadd float %154, %155
>  %157 = fmul float %151, %102
>  %158 = fadd float %156, %157
>  %159 = fmul float %145, %104
>  %160 = fmul float %147, %106
>  %161 = fadd float %159, %160
>  %162 = fmul float %149, %108
>  %163 = fadd float %161, %162
>  %164 = fmul float %151, %110
>  %165 = fadd float %163, %164
>  %166 = fmul float %145, %112
>  %167 = fmul float %147, %114
>  %168 = fadd float %166, %167
>  %169 = fmul float %149, %116
>  %170 = fadd float %168, %169
>  %171 = fmul float %151, %118
>  %172 = fadd float %170, %171
>  %173 = fmul float %145, %18
>  %174 = fmul float %147, %20
>  %175 = fadd float %173, %174
>  %176 = fmul float %149, %22
>  %177 = fadd float %175, %176
>  %178 = fmul float %151, %24
>  %179 = fadd float %177, %178
>  %180 = fmul float %145, %26
>  %181 = fmul float %147, %28
>  %182 = fadd float %180, %181
>  %183 = fmul float %149, %30
>  %184 = fadd float %182, %183
>  %185 = fmul float %151, %32
>  %186 = fadd float %184, %185
>  %187 = fmul float %145, %34
>  %188 = fmul float %147, %36
>  %189 = fadd float %187, %188
>  %190 = fmul float %149, %38
>  %191 = fadd float %189, %190
>  %192 = fmul float %151, %40
>  %193 = fadd float %191, %192
>  %194 = fmul float %132, %72
>  %195 = fmul float %133, %74
>  %196 = fmul float %145, %42
>  %197 = fmul float %147, %44
>  %198 = fadd float %196, %197
>  %199 = fmul float %149, %46
>  %200 = fadd float %198, %199
>  %201 = fmul float %151, %48
>  %202 = fadd float %200, %201
>  %203 = fadd float %195, %194
>  %204 = fmul float %145, %50
>  %205 = fmul float %147, %52
>  %206 = fadd float %204, %205
>  %207 = fmul float %149, %54
>  %208 = fadd float %206, %207
>  %209 = fmul float %151, %56
>  %210 = fadd float %208, %209
>  %211 = fadd float %203, %76
>  %212 = fmul float %132, %78
>  %213 = fmul float %133, %80
>  %214 = fmul float %132, %84
>  %215 = fmul float %133, %86
>  %216 = fadd float %213, %212
>  %217 = fadd float %215, %214
>  %218 = fadd float %216, %82
>  %219 = fadd float %217, %88
>  %220 = fmul float %132, %90
>  %221 = fmul float %133, %92
>  %222 = fmul float %132, %58
>  %223 = fmul float %133, %60
>  %224 = fadd float %221, %220
>  %225 = fadd float %223, %222
>  %226 = fadd float %224, %94
>  %227 = fadd float %225, %62
>  %228 = fmul float %132, %64
>  %229 = fmul float %133, %66
>  %230 = fadd float %142, %137
>  %231 = fadd float %143, %138
>  %232 = fadd float %229, %228
>  %233 = fadd float %231, %143
>  %234 = fadd float %230, %142
>  %235 = fadd float %232, %68
>  %236 = fadd float %234, %142
>  %237 = fadd float %233, %143
>  %238 = fmul float %70, %12
>  %239 = fadd float %238, %14
>  %240 = fmul float %70, %12
>  %241 = fadd float %240, %14
>  %242 = fmul float %70, %12
>  %243 = fadd float %242, %14
>  %244 = fmul float %70, %14
>  %245 = fadd float %244, %12
>  %246 = fsub float -0.000000e+00, %202
>  %247 = fmul float %193, %16
>  %248 = fadd float %247, %246
>  %249 = fsub float -0.000000e+00, %186
>  %250 = fmul float %120, %202
>  %251 = fadd float %250, %179
>  %252 = fmul float %122, %202
>  %253 = fadd float %252, %249
>  %254 = call float @llvm.AMDIL.clamp.(float %239, float 0.000000e+00, float 1.000000e+00)
>  %255 = call float @llvm.AMDIL.clamp.(float %241, float 0.000000e+00, float 1.000000e+00)
>  %256 = call float @llvm.AMDIL.clamp.(float %243, float 0.000000e+00, float 1.000000e+00)
>  %257 = call float @llvm.AMDIL.clamp.(float %245, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %254, float %255, float %256, float %257)
>  %258 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %259 = load float addrspace(2)* addrspace(2)* %258, !tbaa !0
>  %260 = getelementptr float addrspace(2)* %259, i32 0
>  %261 = load float addrspace(2)* %260, !tbaa !0
>  %262 = fmul float %261, %179
>  %263 = getelementptr float addrspace(2)* %259, i32 1
>  %264 = load float addrspace(2)* %263, !tbaa !0
>  %265 = fmul float %264, %186
>  %266 = fadd float %262, %265
>  %267 = getelementptr float addrspace(2)* %259, i32 2
>  %268 = load float addrspace(2)* %267, !tbaa !0
>  %269 = fmul float %268, %193
>  %270 = fadd float %266, %269
>  %271 = getelementptr float addrspace(2)* %259, i32 3
>  %272 = load float addrspace(2)* %271, !tbaa !0
>  %273 = fmul float %272, %202
>  %274 = fadd float %270, %273
>  %275 = getelementptr float addrspace(2)* %259, i32 4
>  %276 = load float addrspace(2)* %275, !tbaa !0
>  %277 = fmul float %276, %179
>  %278 = getelementptr float addrspace(2)* %259, i32 5
>  %279 = load float addrspace(2)* %278, !tbaa !0
>  %280 = fmul float %279, %186
>  %281 = fadd float %277, %280
>  %282 = getelementptr float addrspace(2)* %259, i32 6
>  %283 = load float addrspace(2)* %282, !tbaa !0
>  %284 = fmul float %283, %193
>  %285 = fadd float %281, %284
>  %286 = getelementptr float addrspace(2)* %259, i32 7
>  %287 = load float addrspace(2)* %286, !tbaa !0
>  %288 = fmul float %287, %202
>  %289 = fadd float %285, %288
>  %290 = getelementptr float addrspace(2)* %259, i32 8
>  %291 = load float addrspace(2)* %290, !tbaa !0
>  %292 = fmul float %291, %179
>  %293 = getelementptr float addrspace(2)* %259, i32 9
>  %294 = load float addrspace(2)* %293, !tbaa !0
>  %295 = fmul float %294, %186
>  %296 = fadd float %292, %295
>  %297 = getelementptr float addrspace(2)* %259, i32 10
>  %298 = load float addrspace(2)* %297, !tbaa !0
>  %299 = fmul float %298, %193
>  %300 = fadd float %296, %299
>  %301 = getelementptr float addrspace(2)* %259, i32 11
>  %302 = load float addrspace(2)* %301, !tbaa !0
>  %303 = fmul float %302, %202
>  %304 = fadd float %300, %303
>  %305 = getelementptr float addrspace(2)* %259, i32 12
>  %306 = load float addrspace(2)* %305, !tbaa !0
>  %307 = fmul float %306, %179
>  %308 = getelementptr float addrspace(2)* %259, i32 13
>  %309 = load float addrspace(2)* %308, !tbaa !0
>  %310 = fmul float %309, %186
>  %311 = fadd float %307, %310
>  %312 = getelementptr float addrspace(2)* %259, i32 14
>  %313 = load float addrspace(2)* %312, !tbaa !0
>  %314 = fmul float %313, %193
>  %315 = fadd float %311, %314
>  %316 = getelementptr float addrspace(2)* %259, i32 15
>  %317 = load float addrspace(2)* %316, !tbaa !0
>  %318 = fmul float %317, %202
>  %319 = fadd float %315, %318
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %274, float %289, float %304, float %319)
>  %320 = getelementptr float addrspace(2)* %259, i32 16
>  %321 = load float addrspace(2)* %320, !tbaa !0
>  %322 = fmul float %321, %179
>  %323 = getelementptr float addrspace(2)* %259, i32 17
>  %324 = load float addrspace(2)* %323, !tbaa !0
>  %325 = fmul float %324, %186
>  %326 = fadd float %322, %325
>  %327 = getelementptr float addrspace(2)* %259, i32 18
>  %328 = load float addrspace(2)* %327, !tbaa !0
>  %329 = fmul float %328, %193
>  %330 = fadd float %326, %329
>  %331 = getelementptr float addrspace(2)* %259, i32 19
>  %332 = load float addrspace(2)* %331, !tbaa !0
>  %333 = fmul float %332, %202
>  %334 = fadd float %330, %333
>  %335 = getelementptr float addrspace(2)* %259, i32 20
>  %336 = load float addrspace(2)* %335, !tbaa !0
>  %337 = fmul float %336, %179
>  %338 = getelementptr float addrspace(2)* %259, i32 21
>  %339 = load float addrspace(2)* %338, !tbaa !0
>  %340 = fmul float %339, %186
>  %341 = fadd float %337, %340
>  %342 = getelementptr float addrspace(2)* %259, i32 22
>  %343 = load float addrspace(2)* %342, !tbaa !0
>  %344 = fmul float %343, %193
>  %345 = fadd float %341, %344
>  %346 = getelementptr float addrspace(2)* %259, i32 23
>  %347 = load float addrspace(2)* %346, !tbaa !0
>  %348 = fmul float %347, %202
>  %349 = fadd float %345, %348
>  %350 = getelementptr float addrspace(2)* %259, i32 24
>  %351 = load float addrspace(2)* %350, !tbaa !0
>  %352 = fmul float %351, %179
>  %353 = getelementptr float addrspace(2)* %259, i32 25
>  %354 = load float addrspace(2)* %353, !tbaa !0
>  %355 = fmul float %354, %186
>  %356 = fadd float %352, %355
>  %357 = getelementptr float addrspace(2)* %259, i32 26
>  %358 = load float addrspace(2)* %357, !tbaa !0
>  %359 = fmul float %358, %193
>  %360 = fadd float %356, %359
>  %361 = getelementptr float addrspace(2)* %259, i32 27
>  %362 = load float addrspace(2)* %361, !tbaa !0
>  %363 = fmul float %362, %202
>  %364 = fadd float %360, %363
>  %365 = getelementptr float addrspace(2)* %259, i32 28
>  %366 = load float addrspace(2)* %365, !tbaa !0
>  %367 = fmul float %366, %179
>  %368 = getelementptr float addrspace(2)* %259, i32 29
>  %369 = load float addrspace(2)* %368, !tbaa !0
>  %370 = fmul float %369, %186
>  %371 = fadd float %367, %370
>  %372 = getelementptr float addrspace(2)* %259, i32 30
>  %373 = load float addrspace(2)* %372, !tbaa !0
>  %374 = fmul float %373, %193
>  %375 = fadd float %371, %374
>  %376 = getelementptr float addrspace(2)* %259, i32 31
>  %377 = load float addrspace(2)* %376, !tbaa !0
>  %378 = fmul float %377, %202
>  %379 = fadd float %375, %378
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %334, float %349, float %364, float %379)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %211, float %218, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %219, float %226, float %12, float %12)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %158, float %165, float %172, float %210)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %230, float %231, float %233, float %234)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 37, i32 0, float %236, float %237, float %227, float %235)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %251, float %253, float %248, float %202)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0410100
>bf8c007f
>c00403bf
>c0020300
>bf8c007f
>7e040204
>c0028301
>bf8c007f
>7e020205
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>d2060803
>02010103
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>80020800
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>04080b09
>c0040311
>bf8c007f
>10060c08
>c0040310
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>d2820003
>040c1104
>d2820007
>04080b0a
>c0028312
>bf8c007f
>d2820002
>040c0b07
>d2820008
>04040908
>c0028313
>bf8c007f
>d2820001
>04080b08
>c0028315
>bf8c007f
>10040c05
>c0028314
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>d2820002
>04080b04
>c0028316
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>d2820002
>04080b07
>c0028317
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>d2820002
>04080b08
>c0400102
>bf8c007f
>c002810d
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>10060405
>c002810c
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>d2820005
>040e0205
>c0028319
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>040c0b04
>c002831a
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>d2820003
>040c0b07
>c002831b
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>d2820003
>040c0b08
>c002810e
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>d2820009
>04160605
>c002831d
>bf8c007f
>100a0c05
>c002831c
>bf8c007f
>d2820005
>04140b04
>c002831e
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>04140b07
>c002831f
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>d2820005
>04140b08
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>04260a05
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>10140405
>c0028108
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>d282000a
>042a0205
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>042a0605
>c002810b
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>042a0a05
>c0028105
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>c0028104
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>d282000b
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>c0028106
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>d282000b
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>c0028107
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>d282000b
>042e0a05
>c0028101
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>10180405
>c0028100
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>d282000c
>04320205
>c0028102
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>d282000c
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>c0028103
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>04320a05
>f80000ef
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>c002811d
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>04260205
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>04260a05
>c0028119
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>c002811a
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>d282000a
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>c002811b
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>042a0a05
>c0028115
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>10160405
>c0028114
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>d282000b
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>d282000b
>042e0605
>c0028117
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>10180405
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>0438010a
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>f800021f
>0f0f0d0e
>c00003cc
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>061a1a00
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>06001b06
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>060e0e00
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>f800025f
>06070400
>c00003dc
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>d2820000
>04060a00
>c0000302
>bf8c007f
>10020600
>08020b01
>c00003dd
>bf8c007f
>10060a00
>08040503
>f80008cf
>05010200
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], COLOR[1], COLOR
>DCL IN[2], GENERIC[19], PERSPECTIVE
>DCL IN[3], GENERIC[20], PERSPECTIVE
>DCL IN[4], GENERIC[21], PERSPECTIVE
>DCL IN[5], GENERIC[22], PERSPECTIVE, CENTROID
>DCL IN[6], GENERIC[23], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL CONST[0..30]
>DCL TEMP[0..9], LOCAL
>DCL TEMP[10], ARRAY(1), LOCAL
>IMM[0] FLT32 {   -2.0000,     3.0000,     2.0000,    -1.0000}
>IMM[1] FLT32 {    0.8165,     0.0000,     0.5774,     1.0000}
>IMM[2] FLT32 {   -0.4082,     0.7071,     0.5774,    -0.4082}
>IMM[3] FLT32 {   -0.4082,    -0.7071,     0.5774,     0.0000}
>  0: MOV TEMP[0].xy, IN[6].zwww
>  1: TEX TEMP[0].xy, TEMP[0], SAMP[2], 2D
>  2: MOV TEMP[1].xy, IN[2].xyyy
>  3: TEX TEMP[1].xyz, TEMP[1], SAMP[3], 2D
>  4: MOV TEMP[2].xy, IN[3].xyyy
>  5: TEX TEMP[2].xyz, TEMP[2], SAMP[4], 2D
>  6: MOV TEMP[3].xy, IN[5].wzzz
>  7: TEX TEMP[3].xyz, TEMP[3], SAMP[1], 2D
>  8: MOV TEMP[4].xy, IN[5].xyyy
>  9: TEX TEMP[4].xyz, TEMP[4], SAMP[1], 2D
> 10: MOV TEMP[5].xy, IN[6].xyyy
> 11: TEX TEMP[5].xyz, TEMP[5], SAMP[1], 2D
> 12: MOV TEMP[6].xy, IN[2].xyyy
> 13: TEX TEMP[6].xyz, TEMP[6], SAMP[0], 2D
> 14: MOV TEMP[7].xy, IN[2].xyyy
> 15: TEX TEMP[7].xyz, TEMP[7], SAMP[5], 2D
> 16: ADD TEMP[8].x, TEMP[0].xxxx, TEMP[0].yyyy
> 17: ADD TEMP[9].x, -TEMP[0].xxxx, TEMP[0].yyyy
> 18: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 19: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 20: ADD TEMP[8].x, TEMP[8].xxxx, -TEMP[9].xxxx
> 21: ADD TEMP[9].x, -TEMP[9].xxxx, IN[1].xxxx
> 22: RCP TEMP[8].x, TEMP[8].xxxx
> 23: MUL TEMP[8].x, TEMP[9].xxxx, TEMP[8].xxxx
> 24: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 25: MAD TEMP[9].x, TEMP[8].xxxx, IMM[0].xxxx, IMM[0].yyyy
> 26: MUL TEMP[8].x, TEMP[8].xxxx, TEMP[8].xxxx
> 27: MAD TEMP[0].xyz, IMM[0].zzzz, TEMP[1].xyzz, IMM[0].wwww
> 28: MUL TEMP[8].x, TEMP[9].xxxx, TEMP[8].xxxx
> 29: MAD TEMP[1].xyz, IMM[0].zzzz, TEMP[2].xyzz, IMM[0].wwww
> 30: ADD TEMP[9].xyz, TEMP[1].xyzz, -TEMP[0].xyzz
> 31: MAD TEMP[0].xyz, TEMP[8].xxxx, TEMP[9].xyzz, TEMP[0].xyzz
> 32: DP3 TEMP[1].x, TEMP[0].xyzz, IMM[1].xyzz
> 33: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 34: DP3 TEMP[9].x, TEMP[0].xyzz, IMM[2].xyzz
> 35: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 36: MOV TEMP[1].y, TEMP[9].xxxx
> 37: DP3 TEMP[9].x, TEMP[0].xyzz, IMM[3].xyzz
> 38: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 39: MOV TEMP[1].z, TEMP[9].xxxx
> 40: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[1].xyzz
> 41: MUL TEMP[0].xyz, TEMP[3].xyzz, TEMP[1].yyyy
> 42: MAD TEMP[0].xyz, TEMP[1].xxxx, TEMP[4].xyzz, TEMP[0].xyzz
> 43: DP3 TEMP[3].x, TEMP[1].xyzz, IMM[1].wwww
> 44: MAD TEMP[1].xyz, TEMP[1].zzzz, TEMP[5].xyzz, TEMP[0].xyzz
> 45: RCP TEMP[3].x, TEMP[3].xxxx
> 46: MUL TEMP[0].xyz, TEMP[3].xxxx, CONST[12].xyzz
> 47: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[0].xyzz
> 48: ADD TEMP[3].xyz, TEMP[7].xyzz, -TEMP[6].xyzz
> 49: MAD TEMP[0].xyz, TEMP[8].xxxx, TEMP[3].xyzz, TEMP[6].xyzz
> 50: MUL TEMP[2].xyz, TEMP[0].xyzz, IN[0].xyzz
> 51: MAD TEMP[3].x, IN[4].wwww, CONST[11].wwww, -CONST[11].xxxx
> 52: MUL TEMP[2].xyz, TEMP[1].xyzz, TEMP[2].xyzz
> 53: MIN TEMP[1].x, TEMP[3].xxxx, CONST[11].zzzz
> 54: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 55: MAD TEMP[0].xyz, TEMP[2].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 56: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 57: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xxxx
> 58: MAD TEMP[2].xyz, TEMP[2].xyzz, CONST[30].xxxx, TEMP[0].xyzz
> 59: MUL TEMP[0].x, IN[4].wwww, CONST[29].wwww
> 60: MOV TEMP[2].w, TEMP[0].xxxx
> 61: MOV TEMP[10], TEMP[2]
> 62: MOV OUT[0], TEMP[10]
> 63: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 44
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 46
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 47
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 48
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 49
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 50
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 116
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 117
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 118
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 119
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 120
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %45 = load <32 x i8> addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %47 = load <16 x i8> addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %49 = load <32 x i8> addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %51 = load <16 x i8> addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr <32 x i8> addrspace(2)* %2, i32 2
>  %53 = load <32 x i8> addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr <16 x i8> addrspace(2)* %1, i32 2
>  %55 = load <16 x i8> addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr <32 x i8> addrspace(2)* %2, i32 3
>  %57 = load <32 x i8> addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr <16 x i8> addrspace(2)* %1, i32 3
>  %59 = load <16 x i8> addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr <32 x i8> addrspace(2)* %2, i32 4
>  %61 = load <32 x i8> addrspace(2)* %60, !tbaa !0
>  %62 = getelementptr <16 x i8> addrspace(2)* %1, i32 4
>  %63 = load <16 x i8> addrspace(2)* %62, !tbaa !0
>  %64 = getelementptr <32 x i8> addrspace(2)* %2, i32 5
>  %65 = load <32 x i8> addrspace(2)* %64, !tbaa !0
>  %66 = getelementptr <16 x i8> addrspace(2)* %1, i32 5
>  %67 = load <16 x i8> addrspace(2)* %66, !tbaa !0
>  %68 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %69 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %70 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %71 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %72 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %73 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %74 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %3, <2 x i32> %5)
>  %75 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %3, <2 x i32> %5)
>  %76 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %3, <2 x i32> %5)
>  %77 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %3, <2 x i32> %6)
>  %78 = call float @llvm.SI.fs.interp(i32 1, i32 5, i32 %3, <2 x i32> %6)
>  %79 = call float @llvm.SI.fs.interp(i32 2, i32 5, i32 %3, <2 x i32> %6)
>  %80 = call float @llvm.SI.fs.interp(i32 3, i32 5, i32 %3, <2 x i32> %6)
>  %81 = call float @llvm.SI.fs.interp(i32 0, i32 6, i32 %3, <2 x i32> %6)
>  %82 = call float @llvm.SI.fs.interp(i32 1, i32 6, i32 %3, <2 x i32> %6)
>  %83 = call float @llvm.SI.fs.interp(i32 2, i32 6, i32 %3, <2 x i32> %6)
>  %84 = call float @llvm.SI.fs.interp(i32 3, i32 6, i32 %3, <2 x i32> %6)
>  %85 = bitcast float %83 to i32
>  %86 = bitcast float %84 to i32
>  %87 = insertelement <2 x i32> undef, i32 %85, i32 0
>  %88 = insertelement <2 x i32> %87, i32 %86, i32 1
>  %89 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %88, <32 x i8> %53, <16 x i8> %55, i32 2)
>  %90 = extractelement <4 x float> %89, i32 0
>  %91 = extractelement <4 x float> %89, i32 1
>  %92 = bitcast float %72 to i32
>  %93 = bitcast float %73 to i32
>  %94 = insertelement <2 x i32> undef, i32 %92, i32 0
>  %95 = insertelement <2 x i32> %94, i32 %93, i32 1
>  %96 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %95, <32 x i8> %57, <16 x i8> %59, i32 2)
>  %97 = extractelement <4 x float> %96, i32 0
>  %98 = extractelement <4 x float> %96, i32 1
>  %99 = extractelement <4 x float> %96, i32 2
>  %100 = bitcast float %74 to i32
>  %101 = bitcast float %75 to i32
>  %102 = insertelement <2 x i32> undef, i32 %100, i32 0
>  %103 = insertelement <2 x i32> %102, i32 %101, i32 1
>  %104 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %103, <32 x i8> %61, <16 x i8> %63, i32 2)
>  %105 = extractelement <4 x float> %104, i32 0
>  %106 = extractelement <4 x float> %104, i32 1
>  %107 = extractelement <4 x float> %104, i32 2
>  %108 = bitcast float %80 to i32
>  %109 = bitcast float %79 to i32
>  %110 = insertelement <2 x i32> undef, i32 %108, i32 0
>  %111 = insertelement <2 x i32> %110, i32 %109, i32 1
>  %112 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %111, <32 x i8> %49, <16 x i8> %51, i32 2)
>  %113 = extractelement <4 x float> %112, i32 0
>  %114 = extractelement <4 x float> %112, i32 1
>  %115 = extractelement <4 x float> %112, i32 2
>  %116 = bitcast float %77 to i32
>  %117 = bitcast float %78 to i32
>  %118 = insertelement <2 x i32> undef, i32 %116, i32 0
>  %119 = insertelement <2 x i32> %118, i32 %117, i32 1
>  %120 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %119, <32 x i8> %49, <16 x i8> %51, i32 2)
>  %121 = extractelement <4 x float> %120, i32 0
>  %122 = extractelement <4 x float> %120, i32 1
>  %123 = extractelement <4 x float> %120, i32 2
>  %124 = bitcast float %81 to i32
>  %125 = bitcast float %82 to i32
>  %126 = insertelement <2 x i32> undef, i32 %124, i32 0
>  %127 = insertelement <2 x i32> %126, i32 %125, i32 1
>  %128 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %127, <32 x i8> %49, <16 x i8> %51, i32 2)
>  %129 = extractelement <4 x float> %128, i32 0
>  %130 = extractelement <4 x float> %128, i32 1
>  %131 = extractelement <4 x float> %128, i32 2
>  %132 = bitcast float %72 to i32
>  %133 = bitcast float %73 to i32
>  %134 = insertelement <2 x i32> undef, i32 %132, i32 0
>  %135 = insertelement <2 x i32> %134, i32 %133, i32 1
>  %136 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %135, <32 x i8> %45, <16 x i8> %47, i32 2)
>  %137 = extractelement <4 x float> %136, i32 0
>  %138 = extractelement <4 x float> %136, i32 1
>  %139 = extractelement <4 x float> %136, i32 2
>  %140 = bitcast float %72 to i32
>  %141 = bitcast float %73 to i32
>  %142 = insertelement <2 x i32> undef, i32 %140, i32 0
>  %143 = insertelement <2 x i32> %142, i32 %141, i32 1
>  %144 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %143, <32 x i8> %65, <16 x i8> %67, i32 2)
>  %145 = extractelement <4 x float> %144, i32 0
>  %146 = extractelement <4 x float> %144, i32 1
>  %147 = extractelement <4 x float> %144, i32 2
>  %148 = fadd float %90, %91
>  %149 = fsub float -0.000000e+00, %90
>  %150 = fadd float %149, %91
>  %151 = call float @llvm.AMDIL.clamp.(float %150, float 0.000000e+00, float 1.000000e+00)
>  %152 = call float @llvm.AMDIL.clamp.(float %148, float 0.000000e+00, float 1.000000e+00)
>  %153 = fsub float -0.000000e+00, %151
>  %154 = fadd float %152, %153
>  %155 = fsub float -0.000000e+00, %151
>  %156 = fadd float %155, %71
>  %157 = fdiv float 1.000000e+00, %154
>  %158 = fmul float %156, %157
>  %159 = call float @llvm.AMDIL.clamp.(float %158, float 0.000000e+00, float 1.000000e+00)
>  %160 = fmul float %159, -2.000000e+00
>  %161 = fadd float %160, 3.000000e+00
>  %162 = fmul float %159, %159
>  %163 = fmul float 2.000000e+00, %97
>  %164 = fadd float %163, -1.000000e+00
>  %165 = fmul float 2.000000e+00, %98
>  %166 = fadd float %165, -1.000000e+00
>  %167 = fmul float 2.000000e+00, %99
>  %168 = fadd float %167, -1.000000e+00
>  %169 = fmul float %161, %162
>  %170 = fmul float 2.000000e+00, %105
>  %171 = fadd float %170, -1.000000e+00
>  %172 = fmul float 2.000000e+00, %106
>  %173 = fadd float %172, -1.000000e+00
>  %174 = fmul float 2.000000e+00, %107
>  %175 = fadd float %174, -1.000000e+00
>  %176 = fsub float -0.000000e+00, %164
>  %177 = fadd float %171, %176
>  %178 = fsub float -0.000000e+00, %166
>  %179 = fadd float %173, %178
>  %180 = fsub float -0.000000e+00, %168
>  %181 = fadd float %175, %180
>  %182 = fmul float %169, %177
>  %183 = fadd float %182, %164
>  %184 = fmul float %169, %179
>  %185 = fadd float %184, %166
>  %186 = fmul float %169, %181
>  %187 = fadd float %186, %168
>  %188 = fmul float %183, 0x3FEA20BD80000000
>  %189 = fmul float %185, 0.000000e+00
>  %190 = fadd float %189, %188
>  %191 = fmul float %187, 0x3FE279A740000000
>  %192 = fadd float %190, %191
>  %193 = call float @llvm.AMDIL.clamp.(float %192, float 0.000000e+00, float 1.000000e+00)
>  %194 = fmul float %183, 0xBFDA20BDA0000000
>  %195 = fmul float %185, 0x3FE6A09E60000000
>  %196 = fadd float %195, %194
>  %197 = fmul float %187, 0x3FE279A740000000
>  %198 = fadd float %196, %197
>  %199 = call float @llvm.AMDIL.clamp.(float %198, float 0.000000e+00, float 1.000000e+00)
>  %200 = fmul float %183, 0xBFDA20BD20000000
>  %201 = fmul float %185, 0xBFE6A09E80000000
>  %202 = fadd float %201, %200
>  %203 = fmul float %187, 0x3FE279A740000000
>  %204 = fadd float %202, %203
>  %205 = call float @llvm.AMDIL.clamp.(float %204, float 0.000000e+00, float 1.000000e+00)
>  %206 = fmul float %193, %193
>  %207 = fmul float %199, %199
>  %208 = fmul float %205, %205
>  %209 = fmul float %113, %207
>  %210 = fmul float %114, %207
>  %211 = fmul float %115, %207
>  %212 = fmul float %206, %121
>  %213 = fadd float %212, %209
>  %214 = fmul float %206, %122
>  %215 = fadd float %214, %210
>  %216 = fmul float %206, %123
>  %217 = fadd float %216, %211
>  %218 = fmul float %206, 1.000000e+00
>  %219 = fmul float %207, 1.000000e+00
>  %220 = fadd float %219, %218
>  %221 = fmul float %208, 1.000000e+00
>  %222 = fadd float %220, %221
>  %223 = fmul float %208, %129
>  %224 = fadd float %223, %213
>  %225 = fmul float %208, %130
>  %226 = fadd float %225, %215
>  %227 = fmul float %208, %131
>  %228 = fadd float %227, %217
>  %229 = fdiv float 1.000000e+00, %222
>  %230 = fmul float %229, %29
>  %231 = fmul float %229, %31
>  %232 = fmul float %229, %33
>  %233 = fmul float %224, %230
>  %234 = fmul float %226, %231
>  %235 = fmul float %228, %232
>  %236 = fsub float -0.000000e+00, %137
>  %237 = fadd float %145, %236
>  %238 = fsub float -0.000000e+00, %138
>  %239 = fadd float %146, %238
>  %240 = fsub float -0.000000e+00, %139
>  %241 = fadd float %147, %240
>  %242 = fmul float %169, %237
>  %243 = fadd float %242, %137
>  %244 = fmul float %169, %239
>  %245 = fadd float %244, %138
>  %246 = fmul float %169, %241
>  %247 = fadd float %246, %139
>  %248 = fmul float %243, %68
>  %249 = fmul float %245, %69
>  %250 = fmul float %247, %70
>  %251 = fsub float -0.000000e+00, %23
>  %252 = fmul float %76, %27
>  %253 = fadd float %252, %251
>  %254 = fmul float %233, %248
>  %255 = fmul float %234, %249
>  %256 = fmul float %235, %250
>  %257 = fcmp uge float %253, %25
>  %258 = select i1 %257, float %25, float %253
>  %259 = call float @llvm.AMDIL.clamp.(float %258, float 0.000000e+00, float 1.000000e+00)
>  %260 = fsub float -0.000000e+00, %43
>  %261 = fmul float %254, %260
>  %262 = fadd float %261, %35
>  %263 = fsub float -0.000000e+00, %43
>  %264 = fmul float %255, %263
>  %265 = fadd float %264, %37
>  %266 = fsub float -0.000000e+00, %43
>  %267 = fmul float %256, %266
>  %268 = fadd float %267, %39
>  %269 = fmul float %259, %259
>  %270 = fmul float %262, %269
>  %271 = fmul float %265, %269
>  %272 = fmul float %268, %269
>  %273 = fmul float %254, %43
>  %274 = fadd float %273, %270
>  %275 = fmul float %255, %43
>  %276 = fadd float %275, %271
>  %277 = fmul float %256, %43
>  %278 = fadd float %277, %272
>  %279 = fmul float %76, %41
>  %280 = call i32 @llvm.SI.packf16(float %274, float %276)
>  %281 = bitcast i32 %280 to float
>  %282 = call i32 @llvm.SI.packf16(float %278, float %279)
>  %283 = bitcast i32 %282 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %281, float %283, float %281, float %283)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8141b02
>c8151b03
>c8101a02
>c8111a03
>c0840308
>c0c60510
>bf8c007f
>f0800300
>00430504
>bf8c0770
>08080b06
>d2060804
>02010104
>060a0d05
>d2060805
>02010105
>080a0905
>7e0a5505
>c8180400
>c8190401
>08080906
>10080b04
>d2060804
>02010104
>7e0a02ff
>40400000
>d2820005
>0415eb04
>10080904
>10080905
>c8180900
>c8190901
>c8140800
>c8150801
>c084030c
>c0c60518
>bf8c007f
>f0800700
>00430705
>bf8c0770
>06141108
>061414f3
>c8300d00
>c8310d01
>c82c0c00
>c82d0c01
>c0840310
>c0c60520
>bf8c007f
>f0800700
>00430b0b
>bf8c0770
>061c190c
>061c1cf3
>081c150e
>d282000f
>042a1d04
>06140f07
>061414f3
>061c170b
>061c1cf3
>081c150e
>d2820010
>042a1d04
>101420ff
>bed105ed
>7e1c02ff
>3f3504f3
>d282000a
>042a1d0f
>060e1309
>060e0ef3
>06101b0d
>061010f3
>08100f08
>d2820011
>041e1104
>7e2402ff
>3f13cd3a
>d2820007
>042a2511
>d2060813
>02010107
>100e2713
>c8241602
>c8251603
>c8201702
>c8211703
>c0840304
>c0c60508
>bf8c007f
>f0800700
>00430808
>bf8c0770
>10280f09
>101620ff
>3f5105ec
>d282000b
>042d010f
>d282000b
>042e2511
>d206080b
>0201010b
>1016170b
>c8341502
>c8351503
>c8301402
>c8311403
>f0800700
>00430c0c
>bf8c0770
>d2820014
>04521b0b
>102020ff
>bed105e9
>7e2a02ff
>bf3504f4
>d282000f
>04422b0f
>d282000f
>043e2511
>d2060815
>0201010f
>101e2b15
>c8441902
>c8451903
>c8401802
>c8411803
>f0800700
>00431010
>bf8c0770
>d2820003
>0452230f
>d2820002
>042e2713
>d2820002
>040a2b15
>7e045502
>c0400100
>bf8c007f
>c0038131
>bf8c007f
>10260407
>10062703
>c0840300
>c0c60500
>bf8c007f
>f0800700
>00431305
>c0840314
>c0c60528
>bf8c0070
>f0800700
>00431605
>bf8c0770
>080a2917
>d2820005
>04520b04
>c8180100
>c8190101
>100a0d05
>100c0b03
>c0010178
>bf8c007f
>10060c02
>c0018175
>bf8c007f
>08320603
>c80c1300
>c80d1301
>c001812f
>bf8c007f
>100a0603
>c001812c
>bf8c007f
>0a0a0a03
>c001812e
>bf8c007f
>d00c0004
>02000705
>7e340203
>d2000005
>00123505
>d2060805
>02010105
>100a0b05
>10320b19
>d2820006
>04640506
>10320f08
>d2820019
>0466190b
>d2820019
>0466210f
>c0018130
>bf8c007f
>10340403
>10323519
>08342716
>d282001a
>044e3504
>c86c0000
>c86d0001
>1034371a
>10323519
>10343202
>c0018174
>bf8c007f
>08343403
>10340b1a
>d2820019
>04680519
>5e0c0d19
>100e0f0a
>d2820007
>041e1d0b
>d2820007
>041e250f
>c0018132
>bf8c007f
>10040403
>10040507
>080e2b18
>d2820004
>04560f04
>c81c0200
>c81d0201
>10000f04
>10000102
>10020002
>c0018176
>bf8c007f
>08020203
>10020b01
>d2820000
>04040500
>c0000177
>bf8c007f
>10020600
>5e000300
>f8001c0f
>00060006
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL IN[4]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], COLOR[1]
>DCL OUT[3], CLIPVERTEX
>DCL OUT[4], GENERIC[19]
>DCL OUT[5], GENERIC[20]
>DCL OUT[6], GENERIC[21]
>DCL OUT[7], GENERIC[22]
>DCL OUT[8], GENERIC[23]
>DCL CONST[0..51]
>DCL TEMP[0..11], LOCAL
>  0: MAD TEMP[0], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  1: DP4 TEMP[1].x, TEMP[0], CONST[48]
>  2: DP4 TEMP[2].x, TEMP[0], CONST[49]
>  3: MOV TEMP[1].y, TEMP[2].xxxx
>  4: DP4 TEMP[2].x, TEMP[0], CONST[50]
>  5: MOV TEMP[1].z, TEMP[2].xxxx
>  6: DP4 TEMP[2].x, TEMP[0], CONST[4]
>  7: DP4 TEMP[3].x, TEMP[0], CONST[5]
>  8: MOV TEMP[2].y, TEMP[3].xxxx
>  9: DP4 TEMP[4].x, TEMP[0], CONST[6]
> 10: MOV TEMP[2].z, TEMP[4].xxxx
> 11: DP4 TEMP[5].x, TEMP[0], CONST[7]
> 12: MOV TEMP[2].w, TEMP[5].xxxx
> 13: ADD TEMP[6].xy, IN[3].xyyy, IN[2].xyyy
> 14: DP4 TEMP[0].x, TEMP[0], CONST[12]
> 15: ADD TEMP[7].xy, TEMP[6].yxxx, IN[3].yxxx
> 16: MOV TEMP[6].zw, TEMP[7].yyxy
> 17: MOV TEMP[6], TEMP[6]
> 18: MAD TEMP[8].x, -TEMP[0].xxxx, CONST[16].wwww, CONST[16].xxxx
> 19: ADD TEMP[7].xy, TEMP[7].yxxx, IN[3].xyyy
> 20: MAX TEMP[8].xyz, TEMP[8].xxxx, CONST[16].zzzz
> 21: MOV TEMP[1].w, TEMP[0].xxxx
> 22: MOV TEMP[0].yzw, TEMP[8].yxyz
> 23: MOV TEMP[8].xy, IN[1].xyxx
> 24: MUL TEMP[9], IN[1].xyxx, CONST[0].yyxx
> 25: MOV TEMP[7].zw, IN[1].yyxy
> 26: MAD TEMP[10], CONST[47].wwww, CONST[0].xxxy, CONST[0].yyyx
> 27: MOV TEMP[0].x, IN[4].wwww
> 28: MOV TEMP[11], TEMP[2]
> 29: MAD TEMP[4].x, TEMP[4].xxxx, CONST[0].zzzz, -TEMP[5].xxxx
> 30: MOV TEMP[2].z, TEMP[4].xxxx
> 31: MOV TEMP[2].y, -TEMP[3].xxxx
> 32: MAD TEMP[2].xy, CONST[51].xyyy, TEMP[5].xxxx, TEMP[2].xyyy
> 33: MOV_SAT OUT[2], TEMP[0]
> 34: MOV OUT[4], TEMP[8]
> 35: MOV OUT[5], TEMP[9]
> 36: MOV OUT[7], TEMP[6]
> 37: MOV OUT[8], TEMP[7]
> 38: MOV OUT[0], TEMP[2]
> 39: MOV OUT[6], TEMP[1]
> 40: MOV OUT[3], TEMP[11]
> 41: MOV_SAT OUT[1], TEMP[10]
> 42: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 16
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 17
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 18
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 19
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 20
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 21
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 22
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 23
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 24
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 25
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 26
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 27
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 28
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 29
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 30
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 31
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 48
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 49
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 50
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 51
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 64
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 66
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 67
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 191
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 192
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 193
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 194
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 195
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 196
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 197
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 198
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 199
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 200
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 201
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 202
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 203
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 204
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 205
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %94 = load <16 x i8> addrspace(2)* %93, !tbaa !0
>  %95 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %94, i32 0, i32 %5)
>  %96 = extractelement <4 x float> %95, i32 0
>  %97 = extractelement <4 x float> %95, i32 1
>  %98 = extractelement <4 x float> %95, i32 2
>  %99 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %100 = load <16 x i8> addrspace(2)* %99, !tbaa !0
>  %101 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %100, i32 0, i32 %5)
>  %102 = extractelement <4 x float> %101, i32 0
>  %103 = extractelement <4 x float> %101, i32 1
>  %104 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %105 = load <16 x i8> addrspace(2)* %104, !tbaa !0
>  %106 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %105, i32 0, i32 %5)
>  %107 = extractelement <4 x float> %106, i32 0
>  %108 = extractelement <4 x float> %106, i32 1
>  %109 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %110 = load <16 x i8> addrspace(2)* %109, !tbaa !0
>  %111 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %110, i32 0, i32 %5)
>  %112 = extractelement <4 x float> %111, i32 0
>  %113 = extractelement <4 x float> %111, i32 1
>  %114 = getelementptr <16 x i8> addrspace(2)* %3, i32 4
>  %115 = load <16 x i8> addrspace(2)* %114, !tbaa !0
>  %116 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %115, i32 0, i32 %5)
>  %117 = extractelement <4 x float> %116, i32 3
>  %118 = fmul float %96, %14
>  %119 = fadd float %118, %12
>  %120 = fmul float %97, %14
>  %121 = fadd float %120, %12
>  %122 = fmul float %98, %14
>  %123 = fadd float %122, %12
>  %124 = fmul float %96, %12
>  %125 = fadd float %124, %14
>  %126 = fmul float %119, %66
>  %127 = fmul float %121, %68
>  %128 = fadd float %126, %127
>  %129 = fmul float %123, %70
>  %130 = fadd float %128, %129
>  %131 = fmul float %125, %72
>  %132 = fadd float %130, %131
>  %133 = fmul float %119, %74
>  %134 = fmul float %121, %76
>  %135 = fadd float %133, %134
>  %136 = fmul float %123, %78
>  %137 = fadd float %135, %136
>  %138 = fmul float %125, %80
>  %139 = fadd float %137, %138
>  %140 = fmul float %119, %82
>  %141 = fmul float %121, %84
>  %142 = fadd float %140, %141
>  %143 = fmul float %123, %86
>  %144 = fadd float %142, %143
>  %145 = fmul float %125, %88
>  %146 = fadd float %144, %145
>  %147 = fmul float %119, %18
>  %148 = fmul float %121, %20
>  %149 = fadd float %147, %148
>  %150 = fmul float %123, %22
>  %151 = fadd float %149, %150
>  %152 = fmul float %125, %24
>  %153 = fadd float %151, %152
>  %154 = fmul float %119, %26
>  %155 = fmul float %121, %28
>  %156 = fadd float %154, %155
>  %157 = fmul float %123, %30
>  %158 = fadd float %156, %157
>  %159 = fmul float %125, %32
>  %160 = fadd float %158, %159
>  %161 = fmul float %119, %34
>  %162 = fmul float %121, %36
>  %163 = fadd float %161, %162
>  %164 = fmul float %123, %38
>  %165 = fadd float %163, %164
>  %166 = fmul float %125, %40
>  %167 = fadd float %165, %166
>  %168 = fmul float %119, %42
>  %169 = fmul float %121, %44
>  %170 = fadd float %168, %169
>  %171 = fmul float %123, %46
>  %172 = fadd float %170, %171
>  %173 = fmul float %125, %48
>  %174 = fadd float %172, %173
>  %175 = fadd float %112, %107
>  %176 = fadd float %113, %108
>  %177 = fmul float %119, %50
>  %178 = fmul float %121, %52
>  %179 = fadd float %177, %178
>  %180 = fmul float %123, %54
>  %181 = fadd float %179, %180
>  %182 = fmul float %125, %56
>  %183 = fadd float %181, %182
>  %184 = fadd float %176, %113
>  %185 = fadd float %175, %112
>  %186 = fsub float -0.000000e+00, %183
>  %187 = fmul float %186, %62
>  %188 = fadd float %187, %58
>  %189 = fadd float %185, %112
>  %190 = fadd float %184, %113
>  %191 = fcmp uge float %188, %60
>  %192 = select i1 %191, float %188, float %60
>  %193 = fcmp uge float %188, %60
>  %194 = select i1 %193, float %188, float %60
>  %195 = fcmp uge float %188, %60
>  %196 = select i1 %195, float %188, float %60
>  %197 = fmul float %102, %14
>  %198 = fmul float %103, %14
>  %199 = fmul float %102, %12
>  %200 = fmul float %102, %12
>  %201 = fmul float %64, %12
>  %202 = fadd float %201, %14
>  %203 = fmul float %64, %12
>  %204 = fadd float %203, %14
>  %205 = fmul float %64, %12
>  %206 = fadd float %205, %14
>  %207 = fmul float %64, %14
>  %208 = fadd float %207, %12
>  %209 = fsub float -0.000000e+00, %174
>  %210 = fmul float %167, %16
>  %211 = fadd float %210, %209
>  %212 = fsub float -0.000000e+00, %160
>  %213 = fmul float %90, %174
>  %214 = fadd float %213, %153
>  %215 = fmul float %92, %174
>  %216 = fadd float %215, %212
>  %217 = call float @llvm.AMDIL.clamp.(float %117, float 0.000000e+00, float 1.000000e+00)
>  %218 = call float @llvm.AMDIL.clamp.(float %192, float 0.000000e+00, float 1.000000e+00)
>  %219 = call float @llvm.AMDIL.clamp.(float %194, float 0.000000e+00, float 1.000000e+00)
>  %220 = call float @llvm.AMDIL.clamp.(float %196, float 0.000000e+00, float 1.000000e+00)
>  %221 = call float @llvm.AMDIL.clamp.(float %202, float 0.000000e+00, float 1.000000e+00)
>  %222 = call float @llvm.AMDIL.clamp.(float %204, float 0.000000e+00, float 1.000000e+00)
>  %223 = call float @llvm.AMDIL.clamp.(float %206, float 0.000000e+00, float 1.000000e+00)
>  %224 = call float @llvm.AMDIL.clamp.(float %208, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %221, float %222, float %223, float %224)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %217, float %218, float %219, float %220)
>  %225 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %226 = load float addrspace(2)* addrspace(2)* %225, !tbaa !0
>  %227 = getelementptr float addrspace(2)* %226, i32 0
>  %228 = load float addrspace(2)* %227, !tbaa !0
>  %229 = fmul float %228, %153
>  %230 = getelementptr float addrspace(2)* %226, i32 1
>  %231 = load float addrspace(2)* %230, !tbaa !0
>  %232 = fmul float %231, %160
>  %233 = fadd float %229, %232
>  %234 = getelementptr float addrspace(2)* %226, i32 2
>  %235 = load float addrspace(2)* %234, !tbaa !0
>  %236 = fmul float %235, %167
>  %237 = fadd float %233, %236
>  %238 = getelementptr float addrspace(2)* %226, i32 3
>  %239 = load float addrspace(2)* %238, !tbaa !0
>  %240 = fmul float %239, %174
>  %241 = fadd float %237, %240
>  %242 = getelementptr float addrspace(2)* %226, i32 4
>  %243 = load float addrspace(2)* %242, !tbaa !0
>  %244 = fmul float %243, %153
>  %245 = getelementptr float addrspace(2)* %226, i32 5
>  %246 = load float addrspace(2)* %245, !tbaa !0
>  %247 = fmul float %246, %160
>  %248 = fadd float %244, %247
>  %249 = getelementptr float addrspace(2)* %226, i32 6
>  %250 = load float addrspace(2)* %249, !tbaa !0
>  %251 = fmul float %250, %167
>  %252 = fadd float %248, %251
>  %253 = getelementptr float addrspace(2)* %226, i32 7
>  %254 = load float addrspace(2)* %253, !tbaa !0
>  %255 = fmul float %254, %174
>  %256 = fadd float %252, %255
>  %257 = getelementptr float addrspace(2)* %226, i32 8
>  %258 = load float addrspace(2)* %257, !tbaa !0
>  %259 = fmul float %258, %153
>  %260 = getelementptr float addrspace(2)* %226, i32 9
>  %261 = load float addrspace(2)* %260, !tbaa !0
>  %262 = fmul float %261, %160
>  %263 = fadd float %259, %262
>  %264 = getelementptr float addrspace(2)* %226, i32 10
>  %265 = load float addrspace(2)* %264, !tbaa !0
>  %266 = fmul float %265, %167
>  %267 = fadd float %263, %266
>  %268 = getelementptr float addrspace(2)* %226, i32 11
>  %269 = load float addrspace(2)* %268, !tbaa !0
>  %270 = fmul float %269, %174
>  %271 = fadd float %267, %270
>  %272 = getelementptr float addrspace(2)* %226, i32 12
>  %273 = load float addrspace(2)* %272, !tbaa !0
>  %274 = fmul float %273, %153
>  %275 = getelementptr float addrspace(2)* %226, i32 13
>  %276 = load float addrspace(2)* %275, !tbaa !0
>  %277 = fmul float %276, %160
>  %278 = fadd float %274, %277
>  %279 = getelementptr float addrspace(2)* %226, i32 14
>  %280 = load float addrspace(2)* %279, !tbaa !0
>  %281 = fmul float %280, %167
>  %282 = fadd float %278, %281
>  %283 = getelementptr float addrspace(2)* %226, i32 15
>  %284 = load float addrspace(2)* %283, !tbaa !0
>  %285 = fmul float %284, %174
>  %286 = fadd float %282, %285
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %241, float %256, float %271, float %286)
>  %287 = getelementptr float addrspace(2)* %226, i32 16
>  %288 = load float addrspace(2)* %287, !tbaa !0
>  %289 = fmul float %288, %153
>  %290 = getelementptr float addrspace(2)* %226, i32 17
>  %291 = load float addrspace(2)* %290, !tbaa !0
>  %292 = fmul float %291, %160
>  %293 = fadd float %289, %292
>  %294 = getelementptr float addrspace(2)* %226, i32 18
>  %295 = load float addrspace(2)* %294, !tbaa !0
>  %296 = fmul float %295, %167
>  %297 = fadd float %293, %296
>  %298 = getelementptr float addrspace(2)* %226, i32 19
>  %299 = load float addrspace(2)* %298, !tbaa !0
>  %300 = fmul float %299, %174
>  %301 = fadd float %297, %300
>  %302 = getelementptr float addrspace(2)* %226, i32 20
>  %303 = load float addrspace(2)* %302, !tbaa !0
>  %304 = fmul float %303, %153
>  %305 = getelementptr float addrspace(2)* %226, i32 21
>  %306 = load float addrspace(2)* %305, !tbaa !0
>  %307 = fmul float %306, %160
>  %308 = fadd float %304, %307
>  %309 = getelementptr float addrspace(2)* %226, i32 22
>  %310 = load float addrspace(2)* %309, !tbaa !0
>  %311 = fmul float %310, %167
>  %312 = fadd float %308, %311
>  %313 = getelementptr float addrspace(2)* %226, i32 23
>  %314 = load float addrspace(2)* %313, !tbaa !0
>  %315 = fmul float %314, %174
>  %316 = fadd float %312, %315
>  %317 = getelementptr float addrspace(2)* %226, i32 24
>  %318 = load float addrspace(2)* %317, !tbaa !0
>  %319 = fmul float %318, %153
>  %320 = getelementptr float addrspace(2)* %226, i32 25
>  %321 = load float addrspace(2)* %320, !tbaa !0
>  %322 = fmul float %321, %160
>  %323 = fadd float %319, %322
>  %324 = getelementptr float addrspace(2)* %226, i32 26
>  %325 = load float addrspace(2)* %324, !tbaa !0
>  %326 = fmul float %325, %167
>  %327 = fadd float %323, %326
>  %328 = getelementptr float addrspace(2)* %226, i32 27
>  %329 = load float addrspace(2)* %328, !tbaa !0
>  %330 = fmul float %329, %174
>  %331 = fadd float %327, %330
>  %332 = getelementptr float addrspace(2)* %226, i32 28
>  %333 = load float addrspace(2)* %332, !tbaa !0
>  %334 = fmul float %333, %153
>  %335 = getelementptr float addrspace(2)* %226, i32 29
>  %336 = load float addrspace(2)* %335, !tbaa !0
>  %337 = fmul float %336, %160
>  %338 = fadd float %334, %337
>  %339 = getelementptr float addrspace(2)* %226, i32 30
>  %340 = load float addrspace(2)* %339, !tbaa !0
>  %341 = fmul float %340, %167
>  %342 = fadd float %338, %341
>  %343 = getelementptr float addrspace(2)* %226, i32 31
>  %344 = load float addrspace(2)* %343, !tbaa !0
>  %345 = fmul float %344, %174
>  %346 = fadd float %342, %345
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %301, float %316, float %331, float %346)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %102, float %103, float %196, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %197, float %198, float %199, float %200)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %132, float %139, float %146, float %183)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 37, i32 0, float %175, float %176, float %184, float %185)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 38, i32 0, float %189, float %190, float %102, float %103)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %214, float %216, float %211, float %174)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0410100
>bf8c007f
>c00403bf
>c0020300
>bf8c007f
>7e060204
>c0028301
>bf8c007f
>7e080205
>d2820001
>040e0808
>d2060801
>02010101
>d2820002
>04120608
>d2060802
>02010102
>f800020f
>01020202
>c0840700
>bf8c000f
>e00c2000
>80020500
>bf8c0770
>d2820001
>040c0b05
>d2820002
>040c0b06
>c0040331
>bf8c007f
>10120408
>c0040330
>bf8c007f
>d2820009
>04241101
>d2820003
>040c0b07
>c0040332
>bf8c007f
>d2820009
>04241103
>d2820004
>04100905
>c0040333
>bf8c007f
>d2820005
>04241104
>c0040343
>bf8c007f
>100c0a08
>c0040340
>bf8c007f
>080c0c08
>c0040342
>bf8c007f
>d00c000a
>02001106
>7e0e0208
>d200000a
>002a0d07
>d2060806
>0201010a
>c0840710
>bf8c007f
>e00c2000
>80020b00
>bf8c0770
>d2060807
>0201010e
>f800021f
>06060607
>c0040311
>bf8c000f
>100c0408
>c0040310
>bf8c007f
>d2820006
>04181101
>c0040312
>bf8c007f
>d2820006
>04181103
>c0040313
>bf8c007f
>d2820006
>04181104
>c0040315
>bf8c007f
>100e0408
>c0040314
>bf8c007f
>d2820007
>041c1101
>c0040316
>bf8c007f
>d2820007
>041c1103
>c0040317
>bf8c007f
>d2820007
>041c1104
>c0400102
>bf8c007f
>c004010d
>bf8c007f
>10100e08
>c004010c
>bf8c007f
>d2820009
>04220c08
>c0040319
>bf8c007f
>10100408
>c0040318
>bf8c007f
>d2820008
>04201101
>c004031a
>bf8c007f
>d2820008
>04201103
>c004031b
>bf8c007f
>d2820008
>04201104
>c004010e
>bf8c007f
>d282000b
>04261008
>c004031d
>bf8c007f
>10120408
>c004031c
>bf8c007f
>d2820009
>04241101
>c004031e
>bf8c007f
>d2820009
>04241103
>c004031f
>bf8c007f
>d2820009
>04241104
>c004010f
>bf8c007f
>d282000b
>042e1208
>c0040109
>bf8c007f
>10180e08
>c0040108
>bf8c007f
>d282000c
>04320c08
>c004010a
>bf8c007f
>d282000c
>04321008
>c004010b
>bf8c007f
>d282000c
>04321208
>c0040105
>bf8c007f
>101a0e08
>c0040104
>bf8c007f
>d282000d
>04360c08
>c0040106
>bf8c007f
>d282000d
>04361008
>c0040107
>bf8c007f
>d282000d
>04361208
>c0040101
>bf8c007f
>101c0e08
>c0040100
>bf8c007f
>d282000e
>043a0c08
>c0040102
>bf8c007f
>d282000e
>043a1008
>c0040103
>bf8c007f
>d282000e
>043a1208
>f80000ef
>0b0c0d0e
>c004011d
>bf8c000f
>10160e08
>c004011c
>bf8c007f
>d282000b
>042e0c08
>c004011e
>bf8c007f
>d282000b
>042e1008
>c004011f
>bf8c007f
>d282000b
>042e1208
>c0040119
>bf8c007f
>10180e08
>c0040118
>bf8c007f
>d282000c
>04320c08
>c004011a
>bf8c007f
>d282000c
>04321008
>c004011b
>bf8c007f
>d282000c
>04321208
>c0040115
>bf8c007f
>101a0e08
>c0040114
>bf8c007f
>d282000d
>04360c08
>c0040116
>bf8c007f
>d282000d
>04361008
>c0040117
>bf8c007f
>d282000d
>04361208
>c0040111
>bf8c007f
>101c0e08
>c0040110
>bf8c007f
>d282000e
>043a0c08
>c0040112
>bf8c007f
>d282000e
>043a1008
>c0000113
>bf8c007f
>d282000e
>043a1200
>f80000ff
>0b0c0d0e
>c0840704
>bf8c000f
>e00c2000
>80020b00
>7e1e0280
>bf8c0770
>f800022f
>0f0a0c0b
>bf8c070f
>10141604
>101e1805
>10201605
>f800023f
>0a0a0f10
>c00003c9
>bf8c000f
>10140400
>c00003c8
>bf8c007f
>d282000a
>04280101
>c00003ca
>bf8c007f
>d282000a
>04280103
>c00003cb
>bf8c007f
>d282000a
>04280104
>c00003c5
>bf8c007f
>101e0400
>c00003c4
>bf8c007f
>d282000f
>043c0101
>c00003c6
>bf8c007f
>d282000f
>043c0103
>c00003c7
>bf8c007f
>d282000f
>043c0104
>c00003c1
>bf8c007f
>10040400
>c00003c0
>bf8c007f
>d2820001
>04080101
>c00003c2
>bf8c007f
>d2820001
>04040103
>c00003c3
>bf8c007f
>d2820001
>04040104
>f800024f
>050a0f01
>c0840708
>bf8c000f
>e00c2000
>80020f00
>c082070c
>bf8c0070
>e00c2000
>80010000
>bf8c0770
>060a1f00
>06080105
>06142101
>061e030a
>f800025f
>040f0a05
>bf8c070f
>060a030f
>06000104
>f800026f
>0c0b0500
>c00003cc
>bf8c000f
>d2820000
>041a1200
>c0000302
>bf8c007f
>10021000
>08021301
>c00003cd
>bf8c007f
>10041200
>08040f02
>f80008cf
>09010200
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], COLOR[1], COLOR
>DCL IN[2], GENERIC[19], PERSPECTIVE
>DCL IN[3], GENERIC[20], PERSPECTIVE
>DCL IN[4], GENERIC[21], PERSPECTIVE, CENTROID
>DCL IN[5], GENERIC[22], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL CONST[0..30]
>DCL TEMP[0..5], LOCAL
>DCL TEMP[6], ARRAY(1), LOCAL
>IMM[0] FLT32 {   -2.0000,     3.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[5].zwww
>  1: TEX TEMP[0].xy, TEMP[0], SAMP[2], 2D
>  2: MOV TEMP[1].xy, IN[2].xyyy
>  3: TEX TEMP[1].xyz, TEMP[1], SAMP[0], 2D
>  4: MOV TEMP[2].xy, IN[2].xyyy
>  5: TEX TEMP[2].xyz, TEMP[2], SAMP[3], 2D
>  6: MOV TEMP[3].xy, IN[4].xyyy
>  7: TEX TEMP[3].xyz, TEMP[3], SAMP[1], 2D
>  8: ADD TEMP[4].x, TEMP[0].xxxx, TEMP[0].yyyy
>  9: ADD TEMP[5].x, -TEMP[0].xxxx, TEMP[0].yyyy
> 10: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 11: MOV_SAT TEMP[4].x, TEMP[4].xxxx
> 12: ADD TEMP[4].x, TEMP[4].xxxx, -TEMP[5].xxxx
> 13: ADD TEMP[5].x, -TEMP[5].xxxx, IN[1].xxxx
> 14: RCP TEMP[4].x, TEMP[4].xxxx
> 15: MUL TEMP[4].x, TEMP[5].xxxx, TEMP[4].xxxx
> 16: MOV_SAT TEMP[4].x, TEMP[4].xxxx
> 17: MAD TEMP[5].x, TEMP[4].xxxx, IMM[0].xxxx, IMM[0].yyyy
> 18: MUL TEMP[4].x, TEMP[4].xxxx, TEMP[4].xxxx
> 19: MUL TEMP[4].x, TEMP[5].xxxx, TEMP[4].xxxx
> 20: ADD TEMP[2].xyz, TEMP[2].xyzz, -TEMP[1].xyzz
> 21: MAD TEMP[0].xyz, TEMP[4].xxxx, TEMP[2].xyzz, TEMP[1].xyzz
> 22: MUL TEMP[0].xyz, TEMP[0].xyzz, IN[0].xyzz
> 23: MUL TEMP[1].xyz, TEMP[3].xyzz, CONST[12].xyzz
> 24: MAD TEMP[2].x, IN[3].wwww, CONST[11].wwww, -CONST[11].xxxx
> 25: MUL TEMP[1].xyz, TEMP[0].xyzz, TEMP[1].xyzz
> 26: MIN TEMP[2].x, TEMP[2].xxxx, CONST[11].zzzz
> 27: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 28: MAD TEMP[0].xyz, TEMP[1].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 29: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
> 30: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[2].xxxx
> 31: MAD TEMP[1].xyz, TEMP[1].xyzz, CONST[30].xxxx, TEMP[0].xyzz
> 32: MUL TEMP[0].x, IN[3].wwww, CONST[29].wwww
> 33: MOV TEMP[1].w, TEMP[0].xxxx
> 34: MOV TEMP[6], TEMP[1]
> 35: MOV OUT[0], TEMP[6]
> 36: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 44
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 46
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 47
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 48
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 49
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 50
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 116
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 117
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 118
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 119
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 120
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %45 = load <32 x i8> addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %47 = load <16 x i8> addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %49 = load <32 x i8> addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %51 = load <16 x i8> addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr <32 x i8> addrspace(2)* %2, i32 2
>  %53 = load <32 x i8> addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr <16 x i8> addrspace(2)* %1, i32 2
>  %55 = load <16 x i8> addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr <32 x i8> addrspace(2)* %2, i32 3
>  %57 = load <32 x i8> addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr <16 x i8> addrspace(2)* %1, i32 3
>  %59 = load <16 x i8> addrspace(2)* %58, !tbaa !0
>  %60 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %61 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %62 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %63 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %64 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %65 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %66 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %3, <2 x i32> %5)
>  %67 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %3, <2 x i32> %6)
>  %68 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %3, <2 x i32> %6)
>  %69 = call float @llvm.SI.fs.interp(i32 2, i32 5, i32 %3, <2 x i32> %6)
>  %70 = call float @llvm.SI.fs.interp(i32 3, i32 5, i32 %3, <2 x i32> %6)
>  %71 = bitcast float %69 to i32
>  %72 = bitcast float %70 to i32
>  %73 = insertelement <2 x i32> undef, i32 %71, i32 0
>  %74 = insertelement <2 x i32> %73, i32 %72, i32 1
>  %75 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %74, <32 x i8> %53, <16 x i8> %55, i32 2)
>  %76 = extractelement <4 x float> %75, i32 0
>  %77 = extractelement <4 x float> %75, i32 1
>  %78 = bitcast float %64 to i32
>  %79 = bitcast float %65 to i32
>  %80 = insertelement <2 x i32> undef, i32 %78, i32 0
>  %81 = insertelement <2 x i32> %80, i32 %79, i32 1
>  %82 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %81, <32 x i8> %45, <16 x i8> %47, i32 2)
>  %83 = extractelement <4 x float> %82, i32 0
>  %84 = extractelement <4 x float> %82, i32 1
>  %85 = extractelement <4 x float> %82, i32 2
>  %86 = bitcast float %64 to i32
>  %87 = bitcast float %65 to i32
>  %88 = insertelement <2 x i32> undef, i32 %86, i32 0
>  %89 = insertelement <2 x i32> %88, i32 %87, i32 1
>  %90 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %89, <32 x i8> %57, <16 x i8> %59, i32 2)
>  %91 = extractelement <4 x float> %90, i32 0
>  %92 = extractelement <4 x float> %90, i32 1
>  %93 = extractelement <4 x float> %90, i32 2
>  %94 = bitcast float %67 to i32
>  %95 = bitcast float %68 to i32
>  %96 = insertelement <2 x i32> undef, i32 %94, i32 0
>  %97 = insertelement <2 x i32> %96, i32 %95, i32 1
>  %98 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %97, <32 x i8> %49, <16 x i8> %51, i32 2)
>  %99 = extractelement <4 x float> %98, i32 0
>  %100 = extractelement <4 x float> %98, i32 1
>  %101 = extractelement <4 x float> %98, i32 2
>  %102 = fadd float %76, %77
>  %103 = fsub float -0.000000e+00, %76
>  %104 = fadd float %103, %77
>  %105 = call float @llvm.AMDIL.clamp.(float %104, float 0.000000e+00, float 1.000000e+00)
>  %106 = call float @llvm.AMDIL.clamp.(float %102, float 0.000000e+00, float 1.000000e+00)
>  %107 = fsub float -0.000000e+00, %105
>  %108 = fadd float %106, %107
>  %109 = fsub float -0.000000e+00, %105
>  %110 = fadd float %109, %63
>  %111 = fdiv float 1.000000e+00, %108
>  %112 = fmul float %110, %111
>  %113 = call float @llvm.AMDIL.clamp.(float %112, float 0.000000e+00, float 1.000000e+00)
>  %114 = fmul float %113, -2.000000e+00
>  %115 = fadd float %114, 3.000000e+00
>  %116 = fmul float %113, %113
>  %117 = fmul float %115, %116
>  %118 = fsub float -0.000000e+00, %83
>  %119 = fadd float %91, %118
>  %120 = fsub float -0.000000e+00, %84
>  %121 = fadd float %92, %120
>  %122 = fsub float -0.000000e+00, %85
>  %123 = fadd float %93, %122
>  %124 = fmul float %117, %119
>  %125 = fadd float %124, %83
>  %126 = fmul float %117, %121
>  %127 = fadd float %126, %84
>  %128 = fmul float %117, %123
>  %129 = fadd float %128, %85
>  %130 = fmul float %125, %60
>  %131 = fmul float %127, %61
>  %132 = fmul float %129, %62
>  %133 = fmul float %99, %29
>  %134 = fmul float %100, %31
>  %135 = fmul float %101, %33
>  %136 = fsub float -0.000000e+00, %23
>  %137 = fmul float %66, %27
>  %138 = fadd float %137, %136
>  %139 = fmul float %130, %133
>  %140 = fmul float %131, %134
>  %141 = fmul float %132, %135
>  %142 = fcmp uge float %138, %25
>  %143 = select i1 %142, float %25, float %138
>  %144 = call float @llvm.AMDIL.clamp.(float %143, float 0.000000e+00, float 1.000000e+00)
>  %145 = fsub float -0.000000e+00, %43
>  %146 = fmul float %139, %145
>  %147 = fadd float %146, %35
>  %148 = fsub float -0.000000e+00, %43
>  %149 = fmul float %140, %148
>  %150 = fadd float %149, %37
>  %151 = fsub float -0.000000e+00, %43
>  %152 = fmul float %141, %151
>  %153 = fadd float %152, %39
>  %154 = fmul float %144, %144
>  %155 = fmul float %147, %154
>  %156 = fmul float %150, %154
>  %157 = fmul float %153, %154
>  %158 = fmul float %139, %43
>  %159 = fadd float %158, %155
>  %160 = fmul float %140, %43
>  %161 = fadd float %160, %156
>  %162 = fmul float %141, %43
>  %163 = fadd float %162, %157
>  %164 = fmul float %66, %41
>  %165 = call i32 @llvm.SI.packf16(float %159, float %161)
>  %166 = bitcast i32 %165 to float
>  %167 = call i32 @llvm.SI.packf16(float %163, float %164)
>  %168 = bitcast i32 %167 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %166, float %168, float %166, float %168)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8141702
>c8151703
>c8101602
>c8111603
>c0840308
>c0c60510
>bf8c007f
>f0800300
>00430504
>bf8c0770
>08080b06
>d2060804
>02010104
>060a0d05
>d2060805
>02010105
>080a0905
>7e0a5505
>c8180400
>c8190401
>08080906
>10080b04
>d2060804
>02010104
>7e0a02ff
>40400000
>d2820005
>0415eb04
>10080904
>10080905
>c8240900
>c8250901
>c8200800
>c8210801
>c0840300
>c0c60500
>bf8c007f
>f0800700
>00430508
>c084030c
>c0c60518
>bf8c0070
>f0800700
>00430808
>bf8c0770
>08160d09
>d282000b
>041a1704
>c8300100
>c8310101
>101c190b
>c8301102
>c8311103
>c82c1002
>c82d1003
>c0840304
>c0c60508
>bf8c007f
>f0800700
>00430b0b
>c0400100
>bf8c0070
>c0010131
>bf8c007f
>10041802
>101c050e
>c0010178
>bf8c007f
>10041c02
>c0018175
>bf8c007f
>081e0403
>c8080f00
>c8090f01
>c001812f
>bf8c007f
>10060403
>c001812c
>bf8c007f
>0a060603
>c001812e
>bf8c007f
>d00c0004
>02000703
>7e200203
>d2000003
>00122103
>d2060803
>02010103
>10060703
>101e070f
>d282000e
>043c050e
>081e0b08
>d282000f
>04161f04
>c8400000
>c8410001
>101e210f
>c0018130
>bf8c007f
>10201603
>101e210f
>10201e02
>c0018174
>bf8c007f
>08202003
>10200710
>d282000f
>0440050f
>5e1c1d0f
>08100f0a
>d2820004
>041e1104
>c8140200
>c8150201
>10000b04
>c0018132
>bf8c007f
>10021a03
>10000300
>10020002
>c0018176
>bf8c007f
>08020203
>10020701
>d2820000
>04040500
>c0000177
>bf8c007f
>10020400
>5e000300
>f8001c0f
>000e000e
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], COLOR[1]
>DCL OUT[3], CLIPVERTEX
>DCL OUT[4], GENERIC[19]
>DCL OUT[5], GENERIC[20]
>DCL OUT[6], GENERIC[21]
>DCL OUT[7], GENERIC[22]
>DCL CONST[0..51]
>DCL TEMP[0..10], LOCAL
>  0: MAD TEMP[0], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  1: DP4 TEMP[1].x, TEMP[0], CONST[48]
>  2: DP4 TEMP[2].x, TEMP[0], CONST[49]
>  3: MOV TEMP[1].y, TEMP[2].xxxx
>  4: DP4 TEMP[2].x, TEMP[0], CONST[50]
>  5: MOV TEMP[1].z, TEMP[2].xxxx
>  6: DP4 TEMP[2].x, TEMP[0], CONST[4]
>  7: DP4 TEMP[3].x, TEMP[0], CONST[5]
>  8: MOV TEMP[2].y, TEMP[3].xxxx
>  9: DP4 TEMP[4].x, TEMP[0], CONST[6]
> 10: MOV TEMP[2].z, TEMP[4].xxxx
> 11: DP4 TEMP[5].x, TEMP[0], CONST[12]
> 12: DP4 TEMP[0].x, TEMP[0], CONST[7]
> 13: MOV TEMP[2].w, TEMP[0].xxxx
> 14: MAD TEMP[6].x, -TEMP[5].xxxx, CONST[16].wwww, CONST[16].xxxx
> 15: MOV TEMP[1].w, TEMP[5].xxxx
> 16: MAX TEMP[5].xyz, TEMP[6].xxxx, CONST[16].zzzz
> 17: MOV TEMP[5].yzw, TEMP[5].yxyz
> 18: MOV TEMP[6].xy, IN[1].xyxx
> 19: MUL TEMP[7], IN[2].xyxx, CONST[0].yyxx
> 20: MUL TEMP[8], IN[1].xxxy, CONST[0].xxyy
> 21: MAD TEMP[9], CONST[47].wwww, CONST[0].xxxy, CONST[0].yyyx
> 22: MOV TEMP[5].x, IN[3].wwww
> 23: MOV TEMP[10], TEMP[2]
> 24: MAD TEMP[4].x, TEMP[4].xxxx, CONST[0].zzzz, -TEMP[0].xxxx
> 25: MOV TEMP[2].z, TEMP[4].xxxx
> 26: MOV TEMP[2].y, -TEMP[3].xxxx
> 27: MAD TEMP[2].xy, CONST[51].xyyy, TEMP[0].xxxx, TEMP[2].xyyy
> 28: MOV_SAT OUT[2], TEMP[5]
> 29: MOV OUT[4], TEMP[6]
> 30: MOV OUT[6], TEMP[7]
> 31: MOV OUT[7], TEMP[8]
> 32: MOV OUT[0], TEMP[2]
> 33: MOV OUT[5], TEMP[1]
> 34: MOV OUT[3], TEMP[10]
> 35: MOV_SAT OUT[1], TEMP[9]
> 36: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 16
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 17
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 18
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 19
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 20
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 21
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 22
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 23
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 24
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 25
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 26
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 27
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 28
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 29
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 30
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 31
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 48
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 49
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 50
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 51
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 64
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 66
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 67
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 191
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 192
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 193
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 194
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 195
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 196
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 197
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 198
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 199
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 200
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 201
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 202
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 203
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 204
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 205
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %94 = load <16 x i8> addrspace(2)* %93, !tbaa !0
>  %95 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %94, i32 0, i32 %5)
>  %96 = extractelement <4 x float> %95, i32 0
>  %97 = extractelement <4 x float> %95, i32 1
>  %98 = extractelement <4 x float> %95, i32 2
>  %99 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %100 = load <16 x i8> addrspace(2)* %99, !tbaa !0
>  %101 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %100, i32 0, i32 %5)
>  %102 = extractelement <4 x float> %101, i32 0
>  %103 = extractelement <4 x float> %101, i32 1
>  %104 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %105 = load <16 x i8> addrspace(2)* %104, !tbaa !0
>  %106 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %105, i32 0, i32 %5)
>  %107 = extractelement <4 x float> %106, i32 0
>  %108 = extractelement <4 x float> %106, i32 1
>  %109 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %110 = load <16 x i8> addrspace(2)* %109, !tbaa !0
>  %111 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %110, i32 0, i32 %5)
>  %112 = extractelement <4 x float> %111, i32 3
>  %113 = fmul float %96, %14
>  %114 = fadd float %113, %12
>  %115 = fmul float %97, %14
>  %116 = fadd float %115, %12
>  %117 = fmul float %98, %14
>  %118 = fadd float %117, %12
>  %119 = fmul float %96, %12
>  %120 = fadd float %119, %14
>  %121 = fmul float %114, %66
>  %122 = fmul float %116, %68
>  %123 = fadd float %121, %122
>  %124 = fmul float %118, %70
>  %125 = fadd float %123, %124
>  %126 = fmul float %120, %72
>  %127 = fadd float %125, %126
>  %128 = fmul float %114, %74
>  %129 = fmul float %116, %76
>  %130 = fadd float %128, %129
>  %131 = fmul float %118, %78
>  %132 = fadd float %130, %131
>  %133 = fmul float %120, %80
>  %134 = fadd float %132, %133
>  %135 = fmul float %114, %82
>  %136 = fmul float %116, %84
>  %137 = fadd float %135, %136
>  %138 = fmul float %118, %86
>  %139 = fadd float %137, %138
>  %140 = fmul float %120, %88
>  %141 = fadd float %139, %140
>  %142 = fmul float %114, %18
>  %143 = fmul float %116, %20
>  %144 = fadd float %142, %143
>  %145 = fmul float %118, %22
>  %146 = fadd float %144, %145
>  %147 = fmul float %120, %24
>  %148 = fadd float %146, %147
>  %149 = fmul float %114, %26
>  %150 = fmul float %116, %28
>  %151 = fadd float %149, %150
>  %152 = fmul float %118, %30
>  %153 = fadd float %151, %152
>  %154 = fmul float %120, %32
>  %155 = fadd float %153, %154
>  %156 = fmul float %114, %34
>  %157 = fmul float %116, %36
>  %158 = fadd float %156, %157
>  %159 = fmul float %118, %38
>  %160 = fadd float %158, %159
>  %161 = fmul float %120, %40
>  %162 = fadd float %160, %161
>  %163 = fmul float %114, %50
>  %164 = fmul float %116, %52
>  %165 = fadd float %163, %164
>  %166 = fmul float %118, %54
>  %167 = fadd float %165, %166
>  %168 = fmul float %120, %56
>  %169 = fadd float %167, %168
>  %170 = fmul float %114, %42
>  %171 = fmul float %116, %44
>  %172 = fadd float %170, %171
>  %173 = fmul float %118, %46
>  %174 = fadd float %172, %173
>  %175 = fmul float %120, %48
>  %176 = fadd float %174, %175
>  %177 = fsub float -0.000000e+00, %169
>  %178 = fmul float %177, %62
>  %179 = fadd float %178, %58
>  %180 = fcmp uge float %179, %60
>  %181 = select i1 %180, float %179, float %60
>  %182 = fcmp uge float %179, %60
>  %183 = select i1 %182, float %179, float %60
>  %184 = fcmp uge float %179, %60
>  %185 = select i1 %184, float %179, float %60
>  %186 = fmul float %107, %14
>  %187 = fmul float %108, %14
>  %188 = fmul float %107, %12
>  %189 = fmul float %107, %12
>  %190 = fmul float %102, %12
>  %191 = fmul float %102, %12
>  %192 = fmul float %102, %14
>  %193 = fmul float %103, %14
>  %194 = fmul float %64, %12
>  %195 = fadd float %194, %14
>  %196 = fmul float %64, %12
>  %197 = fadd float %196, %14
>  %198 = fmul float %64, %12
>  %199 = fadd float %198, %14
>  %200 = fmul float %64, %14
>  %201 = fadd float %200, %12
>  %202 = fsub float -0.000000e+00, %176
>  %203 = fmul float %162, %16
>  %204 = fadd float %203, %202
>  %205 = fsub float -0.000000e+00, %155
>  %206 = fmul float %90, %176
>  %207 = fadd float %206, %148
>  %208 = fmul float %92, %176
>  %209 = fadd float %208, %205
>  %210 = call float @llvm.AMDIL.clamp.(float %112, float 0.000000e+00, float 1.000000e+00)
>  %211 = call float @llvm.AMDIL.clamp.(float %181, float 0.000000e+00, float 1.000000e+00)
>  %212 = call float @llvm.AMDIL.clamp.(float %183, float 0.000000e+00, float 1.000000e+00)
>  %213 = call float @llvm.AMDIL.clamp.(float %185, float 0.000000e+00, float 1.000000e+00)
>  %214 = call float @llvm.AMDIL.clamp.(float %195, float 0.000000e+00, float 1.000000e+00)
>  %215 = call float @llvm.AMDIL.clamp.(float %197, float 0.000000e+00, float 1.000000e+00)
>  %216 = call float @llvm.AMDIL.clamp.(float %199, float 0.000000e+00, float 1.000000e+00)
>  %217 = call float @llvm.AMDIL.clamp.(float %201, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %214, float %215, float %216, float %217)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %210, float %211, float %212, float %213)
>  %218 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %219 = load float addrspace(2)* addrspace(2)* %218, !tbaa !0
>  %220 = getelementptr float addrspace(2)* %219, i32 0
>  %221 = load float addrspace(2)* %220, !tbaa !0
>  %222 = fmul float %221, %148
>  %223 = getelementptr float addrspace(2)* %219, i32 1
>  %224 = load float addrspace(2)* %223, !tbaa !0
>  %225 = fmul float %224, %155
>  %226 = fadd float %222, %225
>  %227 = getelementptr float addrspace(2)* %219, i32 2
>  %228 = load float addrspace(2)* %227, !tbaa !0
>  %229 = fmul float %228, %162
>  %230 = fadd float %226, %229
>  %231 = getelementptr float addrspace(2)* %219, i32 3
>  %232 = load float addrspace(2)* %231, !tbaa !0
>  %233 = fmul float %232, %176
>  %234 = fadd float %230, %233
>  %235 = getelementptr float addrspace(2)* %219, i32 4
>  %236 = load float addrspace(2)* %235, !tbaa !0
>  %237 = fmul float %236, %148
>  %238 = getelementptr float addrspace(2)* %219, i32 5
>  %239 = load float addrspace(2)* %238, !tbaa !0
>  %240 = fmul float %239, %155
>  %241 = fadd float %237, %240
>  %242 = getelementptr float addrspace(2)* %219, i32 6
>  %243 = load float addrspace(2)* %242, !tbaa !0
>  %244 = fmul float %243, %162
>  %245 = fadd float %241, %244
>  %246 = getelementptr float addrspace(2)* %219, i32 7
>  %247 = load float addrspace(2)* %246, !tbaa !0
>  %248 = fmul float %247, %176
>  %249 = fadd float %245, %248
>  %250 = getelementptr float addrspace(2)* %219, i32 8
>  %251 = load float addrspace(2)* %250, !tbaa !0
>  %252 = fmul float %251, %148
>  %253 = getelementptr float addrspace(2)* %219, i32 9
>  %254 = load float addrspace(2)* %253, !tbaa !0
>  %255 = fmul float %254, %155
>  %256 = fadd float %252, %255
>  %257 = getelementptr float addrspace(2)* %219, i32 10
>  %258 = load float addrspace(2)* %257, !tbaa !0
>  %259 = fmul float %258, %162
>  %260 = fadd float %256, %259
>  %261 = getelementptr float addrspace(2)* %219, i32 11
>  %262 = load float addrspace(2)* %261, !tbaa !0
>  %263 = fmul float %262, %176
>  %264 = fadd float %260, %263
>  %265 = getelementptr float addrspace(2)* %219, i32 12
>  %266 = load float addrspace(2)* %265, !tbaa !0
>  %267 = fmul float %266, %148
>  %268 = getelementptr float addrspace(2)* %219, i32 13
>  %269 = load float addrspace(2)* %268, !tbaa !0
>  %270 = fmul float %269, %155
>  %271 = fadd float %267, %270
>  %272 = getelementptr float addrspace(2)* %219, i32 14
>  %273 = load float addrspace(2)* %272, !tbaa !0
>  %274 = fmul float %273, %162
>  %275 = fadd float %271, %274
>  %276 = getelementptr float addrspace(2)* %219, i32 15
>  %277 = load float addrspace(2)* %276, !tbaa !0
>  %278 = fmul float %277, %176
>  %279 = fadd float %275, %278
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %234, float %249, float %264, float %279)
>  %280 = getelementptr float addrspace(2)* %219, i32 16
>  %281 = load float addrspace(2)* %280, !tbaa !0
>  %282 = fmul float %281, %148
>  %283 = getelementptr float addrspace(2)* %219, i32 17
>  %284 = load float addrspace(2)* %283, !tbaa !0
>  %285 = fmul float %284, %155
>  %286 = fadd float %282, %285
>  %287 = getelementptr float addrspace(2)* %219, i32 18
>  %288 = load float addrspace(2)* %287, !tbaa !0
>  %289 = fmul float %288, %162
>  %290 = fadd float %286, %289
>  %291 = getelementptr float addrspace(2)* %219, i32 19
>  %292 = load float addrspace(2)* %291, !tbaa !0
>  %293 = fmul float %292, %176
>  %294 = fadd float %290, %293
>  %295 = getelementptr float addrspace(2)* %219, i32 20
>  %296 = load float addrspace(2)* %295, !tbaa !0
>  %297 = fmul float %296, %148
>  %298 = getelementptr float addrspace(2)* %219, i32 21
>  %299 = load float addrspace(2)* %298, !tbaa !0
>  %300 = fmul float %299, %155
>  %301 = fadd float %297, %300
>  %302 = getelementptr float addrspace(2)* %219, i32 22
>  %303 = load float addrspace(2)* %302, !tbaa !0
>  %304 = fmul float %303, %162
>  %305 = fadd float %301, %304
>  %306 = getelementptr float addrspace(2)* %219, i32 23
>  %307 = load float addrspace(2)* %306, !tbaa !0
>  %308 = fmul float %307, %176
>  %309 = fadd float %305, %308
>  %310 = getelementptr float addrspace(2)* %219, i32 24
>  %311 = load float addrspace(2)* %310, !tbaa !0
>  %312 = fmul float %311, %148
>  %313 = getelementptr float addrspace(2)* %219, i32 25
>  %314 = load float addrspace(2)* %313, !tbaa !0
>  %315 = fmul float %314, %155
>  %316 = fadd float %312, %315
>  %317 = getelementptr float addrspace(2)* %219, i32 26
>  %318 = load float addrspace(2)* %317, !tbaa !0
>  %319 = fmul float %318, %162
>  %320 = fadd float %316, %319
>  %321 = getelementptr float addrspace(2)* %219, i32 27
>  %322 = load float addrspace(2)* %321, !tbaa !0
>  %323 = fmul float %322, %176
>  %324 = fadd float %320, %323
>  %325 = getelementptr float addrspace(2)* %219, i32 28
>  %326 = load float addrspace(2)* %325, !tbaa !0
>  %327 = fmul float %326, %148
>  %328 = getelementptr float addrspace(2)* %219, i32 29
>  %329 = load float addrspace(2)* %328, !tbaa !0
>  %330 = fmul float %329, %155
>  %331 = fadd float %327, %330
>  %332 = getelementptr float addrspace(2)* %219, i32 30
>  %333 = load float addrspace(2)* %332, !tbaa !0
>  %334 = fmul float %333, %162
>  %335 = fadd float %331, %334
>  %336 = getelementptr float addrspace(2)* %219, i32 31
>  %337 = load float addrspace(2)* %336, !tbaa !0
>  %338 = fmul float %337, %176
>  %339 = fadd float %335, %338
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %294, float %309, float %324, float %339)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %102, float %103, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %127, float %134, float %141, float %169)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %186, float %187, float %188, float %189)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 37, i32 0, float %190, float %191, float %192, float %193)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %207, float %209, float %204, float %176)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0410100
>bf8c007f
>c00403bf
>c0020300
>bf8c007f
>7e060204
>c0028301
>bf8c007f
>7e080205
>d2820001
>040e0808
>d2060801
>02010101
>d2820002
>04120608
>d2060802
>02010102
>f800020f
>01020202
>c0840700
>bf8c000f
>e00c2000
>80020500
>bf8c0770
>d2820001
>040c0b05
>d2820002
>040c0b06
>c0040331
>bf8c007f
>10120408
>c0040330
>bf8c007f
>d2820009
>04241101
>d2820003
>040c0b07
>c0040332
>bf8c007f
>d2820009
>04241103
>d2820004
>04100905
>c0040333
>bf8c007f
>d2820005
>04241104
>c0040343
>bf8c007f
>100c0a08
>c0040340
>bf8c007f
>080c0c08
>c0040342
>bf8c007f
>d00c000a
>02001106
>7e0e0208
>d2000006
>002a0d07
>d2060806
>02010106
>c084070c
>bf8c007f
>e00c2000
>80020700
>bf8c0770
>d2060807
>0201010a
>f800021f
>06060607
>c0040311
>bf8c000f
>100c0408
>c0040310
>bf8c007f
>d2820006
>04181101
>c0040312
>bf8c007f
>d2820006
>04181103
>c0040313
>bf8c007f
>d2820006
>04181104
>c0040315
>bf8c007f
>100e0408
>c0040314
>bf8c007f
>d2820007
>041c1101
>c0040316
>bf8c007f
>d2820007
>041c1103
>c0040317
>bf8c007f
>d2820007
>041c1104
>c0400102
>bf8c007f
>c004010d
>bf8c007f
>10100e08
>c004010c
>bf8c007f
>d2820009
>04220c08
>c0040319
>bf8c007f
>10100408
>c0040318
>bf8c007f
>d2820008
>04201101
>c004031a
>bf8c007f
>d2820008
>04201103
>c004031b
>bf8c007f
>d2820008
>04201104
>c004010e
>bf8c007f
>d282000a
>04261008
>c004031d
>bf8c007f
>10120408
>c004031c
>bf8c007f
>d2820009
>04241101
>c004031e
>bf8c007f
>d2820009
>04241103
>c004031f
>bf8c007f
>d2820009
>04241104
>c004010f
>bf8c007f
>d282000a
>042a1208
>c0040109
>bf8c007f
>10160e08
>c0040108
>bf8c007f
>d282000b
>042e0c08
>c004010a
>bf8c007f
>d282000b
>042e1008
>c004010b
>bf8c007f
>d282000b
>042e1208
>c0040105
>bf8c007f
>10180e08
>c0040104
>bf8c007f
>d282000c
>04320c08
>c0040106
>bf8c007f
>d282000c
>04321008
>c0040107
>bf8c007f
>d282000c
>04321208
>c0040101
>bf8c007f
>101a0e08
>c0040100
>bf8c007f
>d282000d
>04360c08
>c0040102
>bf8c007f
>d282000d
>04361008
>c0040103
>bf8c007f
>d282000d
>04361208
>f80000ef
>0a0b0c0d
>c004011d
>bf8c000f
>10140e08
>c004011c
>bf8c007f
>d282000a
>042a0c08
>c004011e
>bf8c007f
>d282000a
>042a1008
>c004011f
>bf8c007f
>d282000a
>042a1208
>c0040119
>bf8c007f
>10160e08
>c0040118
>bf8c007f
>d282000b
>042e0c08
>c004011a
>bf8c007f
>d282000b
>042e1008
>c004011b
>bf8c007f
>d282000b
>042e1208
>c0040115
>bf8c007f
>10180e08
>c0040114
>bf8c007f
>d282000c
>04320c08
>c0040116
>bf8c007f
>d282000c
>04321008
>c0040117
>bf8c007f
>d282000c
>04321208
>c0040111
>bf8c007f
>101a0e08
>c0040110
>bf8c007f
>d282000d
>04360c08
>c0040112
>bf8c007f
>d282000d
>04361008
>c0000113
>bf8c007f
>d282000d
>04361200
>f80000ff
>0a0b0c0d
>c0840704
>bf8c000f
>e00c2000
>80020a00
>7e1c0280
>bf8c0770
>f800022f
>0e0e0b0a
>c00003c9
>bf8c000f
>101c0400
>c00003c8
>bf8c007f
>d282000e
>04380101
>c00003ca
>bf8c007f
>d282000e
>04380103
>c00003cb
>bf8c007f
>d282000e
>04380104
>c00003c5
>bf8c007f
>101e0400
>c00003c4
>bf8c007f
>d282000f
>043c0101
>c00003c6
>bf8c007f
>d282000f
>043c0103
>c00003c7
>bf8c007f
>d282000f
>043c0104
>c00003c1
>bf8c007f
>10040400
>c00003c0
>bf8c007f
>d2820001
>04080101
>c00003c2
>bf8c007f
>d2820001
>04040103
>c00003c3
>bf8c007f
>d2820001
>04040104
>f800023f
>050e0f01
>c0840708
>bf8c000f
>e00c2000
>80020000
>bf8c0770
>10080004
>100a0205
>10000005
>f800024f
>04040500
>bf8c070f
>10001605
>10021405
>10041404
>f800025f
>00010202
>c00003cc
>bf8c000f
>d2820000
>041a1200
>c0000302
>bf8c007f
>10021000
>08021301
>c00003cd
>bf8c007f
>10041200
>08040f02
>f80008cf
>09010200
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL CONST[0..29]
>DCL TEMP[0], LOCAL
>DCL TEMP[1], ARRAY(1), LOCAL
>IMM[0] FLT32 {    0.0000,     0.0000,     0.0000,     0.0000}
>  0: MUL TEMP[0].x, IN[0].xxxx, CONST[29].wwww
>  1: MOV TEMP[0].w, TEMP[0].xxxx
>  2: MOV TEMP[0].xyz, IMM[0].xxxx
>  3: MOV TEMP[1], TEMP[0]
>  4: MOV OUT[0], TEMP[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 119
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %25 = fmul float %24, %23
>  %26 = call i32 @llvm.SI.packf16(float 0.000000e+00, float 0.000000e+00)
>  %27 = bitcast i32 %26 to float
>  %28 = call i32 @llvm.SI.packf16(float 0.000000e+00, float %25)
>  %29 = bitcast i32 %28 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %27, float %29, float %27, float %29)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8080000
>c8090001
>c0400100
>bf8c007f
>c0000177
>bf8c007f
>10000400
>5e000080
>d25e0001
>02010080
>f8001c0f
>00010001
>bf810000
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL CONST[0..8]
>DCL TEMP[0..5], LOCAL
>  0: DP4 TEMP[0].x, IN[0], CONST[4]
>  1: DP4 TEMP[1].x, IN[0], CONST[5]
>  2: MOV TEMP[0].y, TEMP[1].xxxx
>  3: DP4 TEMP[2].x, IN[0], CONST[7]
>  4: MOV TEMP[3].w, TEMP[2].xxxx
>  5: DP4 TEMP[4].x, IN[0], CONST[6]
>  6: MOV TEMP[3].z, TEMP[4].xxxx
>  7: MOV TEMP[0].zw, TEMP[3].wwzw
>  8: MOV TEMP[3].x, TEMP[4].xxxx
>  9: MOV TEMP[5], TEMP[0]
> 10: MAD TEMP[4].x, TEMP[4].xxxx, CONST[0].zzzz, -TEMP[2].xxxx
> 11: MOV TEMP[0].z, TEMP[4].xxxx
> 12: MOV TEMP[0].y, -TEMP[1].xxxx
> 13: MAD TEMP[0].xy, CONST[8].xyyy, TEMP[2].xxxx, TEMP[0].xyyy
> 14: MOV OUT[2], TEMP[3]
> 15: MOV OUT[0], TEMP[0]
> 16: MOV OUT[1], TEMP[5]
> 17: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 2
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 16
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 17
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 18
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 19
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 20
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 21
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 22
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 23
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 24
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 25
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 26
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 27
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 28
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 29
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 30
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 31
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 32
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 33
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %50 = load <16 x i8> addrspace(2)* %49, !tbaa !0
>  %51 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %50, i32 0, i32 %5)
>  %52 = extractelement <4 x float> %51, i32 0
>  %53 = extractelement <4 x float> %51, i32 1
>  %54 = extractelement <4 x float> %51, i32 2
>  %55 = extractelement <4 x float> %51, i32 3
>  %56 = fmul float %52, %14
>  %57 = fmul float %53, %16
>  %58 = fadd float %56, %57
>  %59 = fmul float %54, %18
>  %60 = fadd float %58, %59
>  %61 = fmul float %55, %20
>  %62 = fadd float %60, %61
>  %63 = fmul float %52, %22
>  %64 = fmul float %53, %24
>  %65 = fadd float %63, %64
>  %66 = fmul float %54, %26
>  %67 = fadd float %65, %66
>  %68 = fmul float %55, %28
>  %69 = fadd float %67, %68
>  %70 = fmul float %52, %38
>  %71 = fmul float %53, %40
>  %72 = fadd float %70, %71
>  %73 = fmul float %54, %42
>  %74 = fadd float %72, %73
>  %75 = fmul float %55, %44
>  %76 = fadd float %74, %75
>  %77 = fmul float %52, %30
>  %78 = fmul float %53, %32
>  %79 = fadd float %77, %78
>  %80 = fmul float %54, %34
>  %81 = fadd float %79, %80
>  %82 = fmul float %55, %36
>  %83 = fadd float %81, %82
>  %84 = fsub float -0.000000e+00, %76
>  %85 = fmul float %83, %12
>  %86 = fadd float %85, %84
>  %87 = fsub float -0.000000e+00, %69
>  %88 = fmul float %46, %76
>  %89 = fadd float %88, %62
>  %90 = fmul float %48, %76
>  %91 = fadd float %90, %87
>  %92 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %93 = load float addrspace(2)* addrspace(2)* %92, !tbaa !0
>  %94 = getelementptr float addrspace(2)* %93, i32 0
>  %95 = load float addrspace(2)* %94, !tbaa !0
>  %96 = fmul float %95, %62
>  %97 = getelementptr float addrspace(2)* %93, i32 1
>  %98 = load float addrspace(2)* %97, !tbaa !0
>  %99 = fmul float %98, %69
>  %100 = fadd float %96, %99
>  %101 = getelementptr float addrspace(2)* %93, i32 2
>  %102 = load float addrspace(2)* %101, !tbaa !0
>  %103 = fmul float %102, %83
>  %104 = fadd float %100, %103
>  %105 = getelementptr float addrspace(2)* %93, i32 3
>  %106 = load float addrspace(2)* %105, !tbaa !0
>  %107 = fmul float %106, %76
>  %108 = fadd float %104, %107
>  %109 = getelementptr float addrspace(2)* %93, i32 4
>  %110 = load float addrspace(2)* %109, !tbaa !0
>  %111 = fmul float %110, %62
>  %112 = getelementptr float addrspace(2)* %93, i32 5
>  %113 = load float addrspace(2)* %112, !tbaa !0
>  %114 = fmul float %113, %69
>  %115 = fadd float %111, %114
>  %116 = getelementptr float addrspace(2)* %93, i32 6
>  %117 = load float addrspace(2)* %116, !tbaa !0
>  %118 = fmul float %117, %83
>  %119 = fadd float %115, %118
>  %120 = getelementptr float addrspace(2)* %93, i32 7
>  %121 = load float addrspace(2)* %120, !tbaa !0
>  %122 = fmul float %121, %76
>  %123 = fadd float %119, %122
>  %124 = getelementptr float addrspace(2)* %93, i32 8
>  %125 = load float addrspace(2)* %124, !tbaa !0
>  %126 = fmul float %125, %62
>  %127 = getelementptr float addrspace(2)* %93, i32 9
>  %128 = load float addrspace(2)* %127, !tbaa !0
>  %129 = fmul float %128, %69
>  %130 = fadd float %126, %129
>  %131 = getelementptr float addrspace(2)* %93, i32 10
>  %132 = load float addrspace(2)* %131, !tbaa !0
>  %133 = fmul float %132, %83
>  %134 = fadd float %130, %133
>  %135 = getelementptr float addrspace(2)* %93, i32 11
>  %136 = load float addrspace(2)* %135, !tbaa !0
>  %137 = fmul float %136, %76
>  %138 = fadd float %134, %137
>  %139 = getelementptr float addrspace(2)* %93, i32 12
>  %140 = load float addrspace(2)* %139, !tbaa !0
>  %141 = fmul float %140, %62
>  %142 = getelementptr float addrspace(2)* %93, i32 13
>  %143 = load float addrspace(2)* %142, !tbaa !0
>  %144 = fmul float %143, %69
>  %145 = fadd float %141, %144
>  %146 = getelementptr float addrspace(2)* %93, i32 14
>  %147 = load float addrspace(2)* %146, !tbaa !0
>  %148 = fmul float %147, %83
>  %149 = fadd float %145, %148
>  %150 = getelementptr float addrspace(2)* %93, i32 15
>  %151 = load float addrspace(2)* %150, !tbaa !0
>  %152 = fmul float %151, %76
>  %153 = fadd float %149, %152
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %108, float %123, float %138, float %153)
>  %154 = getelementptr float addrspace(2)* %93, i32 16
>  %155 = load float addrspace(2)* %154, !tbaa !0
>  %156 = fmul float %155, %62
>  %157 = getelementptr float addrspace(2)* %93, i32 17
>  %158 = load float addrspace(2)* %157, !tbaa !0
>  %159 = fmul float %158, %69
>  %160 = fadd float %156, %159
>  %161 = getelementptr float addrspace(2)* %93, i32 18
>  %162 = load float addrspace(2)* %161, !tbaa !0
>  %163 = fmul float %162, %83
>  %164 = fadd float %160, %163
>  %165 = getelementptr float addrspace(2)* %93, i32 19
>  %166 = load float addrspace(2)* %165, !tbaa !0
>  %167 = fmul float %166, %76
>  %168 = fadd float %164, %167
>  %169 = getelementptr float addrspace(2)* %93, i32 20
>  %170 = load float addrspace(2)* %169, !tbaa !0
>  %171 = fmul float %170, %62
>  %172 = getelementptr float addrspace(2)* %93, i32 21
>  %173 = load float addrspace(2)* %172, !tbaa !0
>  %174 = fmul float %173, %69
>  %175 = fadd float %171, %174
>  %176 = getelementptr float addrspace(2)* %93, i32 22
>  %177 = load float addrspace(2)* %176, !tbaa !0
>  %178 = fmul float %177, %83
>  %179 = fadd float %175, %178
>  %180 = getelementptr float addrspace(2)* %93, i32 23
>  %181 = load float addrspace(2)* %180, !tbaa !0
>  %182 = fmul float %181, %76
>  %183 = fadd float %179, %182
>  %184 = getelementptr float addrspace(2)* %93, i32 24
>  %185 = load float addrspace(2)* %184, !tbaa !0
>  %186 = fmul float %185, %62
>  %187 = getelementptr float addrspace(2)* %93, i32 25
>  %188 = load float addrspace(2)* %187, !tbaa !0
>  %189 = fmul float %188, %69
>  %190 = fadd float %186, %189
>  %191 = getelementptr float addrspace(2)* %93, i32 26
>  %192 = load float addrspace(2)* %191, !tbaa !0
>  %193 = fmul float %192, %83
>  %194 = fadd float %190, %193
>  %195 = getelementptr float addrspace(2)* %93, i32 27
>  %196 = load float addrspace(2)* %195, !tbaa !0
>  %197 = fmul float %196, %76
>  %198 = fadd float %194, %197
>  %199 = getelementptr float addrspace(2)* %93, i32 28
>  %200 = load float addrspace(2)* %199, !tbaa !0
>  %201 = fmul float %200, %62
>  %202 = getelementptr float addrspace(2)* %93, i32 29
>  %203 = load float addrspace(2)* %202, !tbaa !0
>  %204 = fmul float %203, %69
>  %205 = fadd float %201, %204
>  %206 = getelementptr float addrspace(2)* %93, i32 30
>  %207 = load float addrspace(2)* %206, !tbaa !0
>  %208 = fmul float %207, %83
>  %209 = fadd float %205, %208
>  %210 = getelementptr float addrspace(2)* %93, i32 31
>  %211 = load float addrspace(2)* %210, !tbaa !0
>  %212 = fmul float %211, %76
>  %213 = fadd float %209, %212
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %168, float %183, float %198, float %213)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %83, float 0.000000e+00, float %83, float %76)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %89, float %91, float %86, float %76)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0820700
>bf8c007f
>e00c2000
>80010300
>c0410100
>bf8c0070
>c0020311
>bf8c007f
>10000804
>c0020310
>bf8c007f
>d2820000
>04000903
>c0020312
>bf8c007f
>d2820000
>04000905
>c0020313
>bf8c007f
>d2820000
>04000906
>c0020315
>bf8c007f
>10020804
>c0020314
>bf8c007f
>d2820001
>04040903
>c0020316
>bf8c007f
>d2820001
>04040905
>c0020317
>bf8c007f
>d2820001
>04040906
>c0400102
>bf8c007f
>c002010d
>bf8c007f
>10040204
>c002010c
>bf8c007f
>d2820007
>040a0004
>c0020319
>bf8c007f
>10040804
>c0020318
>bf8c007f
>d2820002
>04080903
>c002031a
>bf8c007f
>d2820002
>04080905
>c002031b
>bf8c007f
>d2820002
>04080906
>c002010e
>bf8c007f
>d2820007
>041e0404
>c002031d
>bf8c007f
>10100804
>c002031c
>bf8c007f
>d2820008
>04200903
>c002031e
>bf8c007f
>d2820008
>04200905
>c002031f
>bf8c007f
>d2820003
>04200906
>c002010f
>bf8c007f
>d2820004
>041e0604
>c0020109
>bf8c007f
>100a0204
>c0020108
>bf8c007f
>d2820005
>04160004
>c002010a
>bf8c007f
>d2820005
>04160404
>c002010b
>bf8c007f
>d2820005
>04160604
>c0020105
>bf8c007f
>100c0204
>c0020104
>bf8c007f
>d2820006
>041a0004
>c0020106
>bf8c007f
>d2820006
>041a0404
>c0020107
>bf8c007f
>d2820006
>041a0604
>c0020101
>bf8c007f
>100e0204
>c0020100
>bf8c007f
>d2820007
>041e0004
>c0020102
>bf8c007f
>d2820007
>041e0404
>c0020103
>bf8c007f
>d2820007
>041e0604
>f80000ef
>04050607
>c002011d
>bf8c000f
>10080204
>c002011c
>bf8c007f
>d2820004
>04120004
>c002011e
>bf8c007f
>d2820004
>04120404
>c002011f
>bf8c007f
>d2820004
>04120604
>c0020119
>bf8c007f
>100a0204
>c0020118
>bf8c007f
>d2820005
>04160004
>c002011a
>bf8c007f
>d2820005
>04160404
>c002011b
>bf8c007f
>d2820005
>04160604
>c0020115
>bf8c007f
>100c0204
>c0020114
>bf8c007f
>d2820006
>041a0004
>c0020116
>bf8c007f
>d2820006
>041a0404
>c0020117
>bf8c007f
>d2820006
>041a0604
>c0020111
>bf8c007f
>100e0204
>c0020110
>bf8c007f
>d2820007
>041e0004
>c0020112
>bf8c007f
>d2820007
>041e0404
>c0000113
>bf8c007f
>d2820007
>041e0600
>f80000ff
>04050607
>bf8c070f
>7e080280
>f800020f
>03020402
>c0000320
>bf8c000f
>d2820000
>04020600
>c0000302
>bf8c007f
>10040400
>08040702
>c0000321
>bf8c007f
>10080600
>08020304
>f80008cf
>03020100
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL IN[2], GENERIC[21], PERSPECTIVE
>DCL IN[3], GENERIC[22], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL CONST[0..30]
>DCL TEMP[0..5], LOCAL
>DCL TEMP[6], ARRAY(1), LOCAL
>IMM[0] FLT32 {    0.0000,     1.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MAD TEMP[1].x, CONST[12].xxxx, CONST[21].yyyy, -IN[3].zzzz
>  3: MAD TEMP[2].x, CONST[12].xxxx, CONST[20].zzzz, -IN[3].zzzz
>  4: RCP TEMP[3].x, TEMP[2].xxxx
>  5: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
>  6: MUL TEMP[3].x, TEMP[1].xxxx, TEMP[3].xxxx
>  7: MOV_SAT TEMP[3].x, TEMP[3].xxxx
>  8: SGE TEMP[2].x, -TEMP[2].xxxx, IMM[0].xxxx
>  9: F2I TEMP[2].x, -TEMP[2]
> 10: UIF TEMP[2].xxxx :0
> 11:   MOV TEMP[2].x, IMM[0].yyyy
> 12: ELSE :0
> 13:   MOV TEMP[2].x, TEMP[3].xxxx
> 14: ENDIF
> 15: MUL TEMP[3].x, IN[2].zzzz, CONST[21].wwww
> 16: MAD TEMP[2].x, TEMP[3].xxxx, TEMP[2].xxxx, -CONST[21].xxxx
> 17: MIN TEMP[2].x, TEMP[2].xxxx, CONST[21].zzzz
> 18: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 19: MAD TEMP[3].x, TEMP[2].xxxx, -TEMP[2].xxxx, TEMP[2].xxxx
> 20: MUL TEMP[3].x, TEMP[3].xxxx, CONST[12].xxxx
> 21: MAD TEMP[3].x, TEMP[2].xxxx, TEMP[2].xxxx, TEMP[3].xxxx
> 22: MUL TEMP[4].x, TEMP[0].wwww, CONST[1].wwww
> 23: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[1].xyzz
> 24: MAD TEMP[5].x, TEMP[4].xxxx, IN[1].wwww, -TEMP[4].xxxx
> 25: MUL TEMP[0].xyz, TEMP[0].xyzz, IN[1].xyzz
> 26: MAD TEMP[4].x, CONST[12].wwww, TEMP[5].xxxx, TEMP[4].xxxx
> 27: MAD TEMP[1].xyz, TEMP[0].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 28: ADD TEMP[2].x, TEMP[2].xxxx, -TEMP[4].xxxx
> 29: MAD TEMP[2].x, CONST[12].zzzz, TEMP[2].xxxx, TEMP[4].xxxx
> 30: MUL TEMP[1].xyz, TEMP[3].xxxx, TEMP[1].xyzz
> 31: MAD TEMP[3].x, IN[2].zzzz, CONST[29].wwww, -TEMP[2].xxxx
> 32: MAD TEMP[0].xyz, TEMP[0].xyzz, CONST[30].xxxx, TEMP[1].xyzz
> 33: MAD TEMP[1].x, CONST[12].yyyy, TEMP[3].xxxx, TEMP[2].xxxx
> 34: MOV TEMP[0].w, TEMP[1].xxxx
> 35: MOV TEMP[6], TEMP[0]
> 36: MOV OUT[0], TEMP[6]
> 37: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 4
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 5
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 6
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 7
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 48
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 49
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 50
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 51
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 82
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 84
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 85
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr float addrspace(2)* %21, i32 86
>  %45 = load float addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr float addrspace(2)* %21, i32 87
>  %47 = load float addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr float addrspace(2)* %21, i32 116
>  %49 = load float addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr float addrspace(2)* %21, i32 117
>  %51 = load float addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr float addrspace(2)* %21, i32 118
>  %53 = load float addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr float addrspace(2)* %21, i32 119
>  %55 = load float addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr float addrspace(2)* %21, i32 120
>  %57 = load float addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %59 = load <32 x i8> addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %61 = load <16 x i8> addrspace(2)* %60, !tbaa !0
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %64 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %65 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %66 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %3, <2 x i32> %5)
>  %67 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %3, <2 x i32> %5)
>  %68 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %3, <2 x i32> %5)
>  %69 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %3, <2 x i32> %5)
>  %70 = bitcast float %62 to i32
>  %71 = bitcast float %63 to i32
>  %72 = insertelement <2 x i32> undef, i32 %70, i32 0
>  %73 = insertelement <2 x i32> %72, i32 %71, i32 1
>  %74 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %73, <32 x i8> %59, <16 x i8> %61, i32 2)
>  %75 = extractelement <4 x float> %74, i32 0
>  %76 = extractelement <4 x float> %74, i32 1
>  %77 = extractelement <4 x float> %74, i32 2
>  %78 = extractelement <4 x float> %74, i32 3
>  %79 = fsub float -0.000000e+00, %69
>  %80 = fmul float %31, %43
>  %81 = fadd float %80, %79
>  %82 = fsub float -0.000000e+00, %69
>  %83 = fmul float %31, %39
>  %84 = fadd float %83, %82
>  %85 = fdiv float 1.000000e+00, %84
>  %86 = fmul float %84, %84
>  %87 = fmul float %81, %85
>  %88 = call float @llvm.AMDIL.clamp.(float %87, float 0.000000e+00, float 1.000000e+00)
>  %89 = fsub float -0.000000e+00, %86
>  %90 = fcmp uge float %89, 0.000000e+00
>  %91 = select i1 %90, float 1.000000e+00, float 0.000000e+00
>  %92 = fsub float -0.000000e+00, %91
>  %93 = fptosi float %92 to i32
>  %94 = bitcast i32 %93 to float
>  %95 = bitcast float %94 to i32
>  %96 = icmp ne i32 %95, 0
>  %. = select i1 %96, float 1.000000e+00, float %88
>  %97 = fmul float %68, %47
>  %98 = fsub float -0.000000e+00, %41
>  %99 = fmul float %97, %.
>  %100 = fadd float %99, %98
>  %101 = fcmp uge float %100, %45
>  %102 = select i1 %101, float %45, float %100
>  %103 = call float @llvm.AMDIL.clamp.(float %102, float 0.000000e+00, float 1.000000e+00)
>  %104 = fsub float -0.000000e+00, %103
>  %105 = fmul float %103, %104
>  %106 = fadd float %105, %103
>  %107 = fmul float %106, %31
>  %108 = fmul float %103, %103
>  %109 = fadd float %108, %107
>  %110 = fmul float %78, %29
>  %111 = fmul float %75, %23
>  %112 = fmul float %76, %25
>  %113 = fmul float %77, %27
>  %114 = fsub float -0.000000e+00, %110
>  %115 = fmul float %110, %67
>  %116 = fadd float %115, %114
>  %117 = fmul float %111, %64
>  %118 = fmul float %112, %65
>  %119 = fmul float %113, %66
>  %120 = fmul float %37, %116
>  %121 = fadd float %120, %110
>  %122 = fsub float -0.000000e+00, %57
>  %123 = fmul float %117, %122
>  %124 = fadd float %123, %49
>  %125 = fsub float -0.000000e+00, %57
>  %126 = fmul float %118, %125
>  %127 = fadd float %126, %51
>  %128 = fsub float -0.000000e+00, %57
>  %129 = fmul float %119, %128
>  %130 = fadd float %129, %53
>  %131 = fsub float -0.000000e+00, %121
>  %132 = fadd float %103, %131
>  %133 = fmul float %35, %132
>  %134 = fadd float %133, %121
>  %135 = fmul float %109, %124
>  %136 = fmul float %109, %127
>  %137 = fmul float %109, %130
>  %138 = fsub float -0.000000e+00, %134
>  %139 = fmul float %68, %55
>  %140 = fadd float %139, %138
>  %141 = fmul float %117, %57
>  %142 = fadd float %141, %135
>  %143 = fmul float %118, %57
>  %144 = fadd float %143, %136
>  %145 = fmul float %119, %57
>  %146 = fadd float %145, %137
>  %147 = fmul float %33, %140
>  %148 = fadd float %147, %134
>  %149 = fcmp uge float %148, 0x3FE6565660000000
>  %150 = sext i1 %149 to i32
>  %151 = trunc i32 %150 to i1
>  %152 = select i1 %151, float 1.000000e+00, float -1.000000e+00
>  call void @llvm.AMDGPU.kill(float %152)
>  %153 = call i32 @llvm.SI.packf16(float %142, float %144)
>  %154 = bitcast i32 %153 to float
>  %155 = call i32 @llvm.SI.packf16(float %146, float %148)
>  %156 = bitcast i32 %155 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %154, float %156, float %154, float %156)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.AMDGPU.kill(float)
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430202
>c0400100
>bf8c0070
>c0010107
>bf8c007f
>100c0a02
>c81c0700
>c81d0701
>100e0f06
>080e0d07
>c0010133
>bf8c007f
>d2820006
>041a0e02
>c81c0e00
>c81d0e01
>c0010130
>c0018155
>bf8c007f
>7e100203
>d2100008
>02021002
>08100f08
>c0018152
>bf8c007f
>7e120203
>d2100009
>02021202
>08120f09
>7e0e5509
>100e0f08
>d2060807
>02010107
>10101309
>d2060008
>22010108
>d00c0004
>02010108
>d2000008
>0011e480
>d2060008
>22010108
>7e101108
>d10a0004
>02010108
>d2000008
>0011e507
>c81c0a00
>c81d0a01
>c0018157
>bf8c007f
>10120e03
>10101109
>c0018154
>bf8c007f
>0a101003
>c0018156
>bf8c007f
>d00c0004
>02000708
>7e120203
>d2000008
>00121308
>d2060808
>02010108
>08120d08
>c0018132
>bf8c007f
>d2820006
>041a1203
>c0018177
>bf8c007f
>100e0e03
>080e0d07
>c0018131
>bf8c007f
>d2820007
>041a0e03
>7e0c02ff
>3f32b2b3
>d00c0004
>02020d07
>d2000006
>0011e4f3
>7c260c80
>100c1108
>080c0d08
>100c0c02
>d2820006
>041a1108
>c0010106
>bf8c007f
>10100802
>c8240600
>c8250601
>10101308
>c0010178
>bf8c007f
>10121002
>c0018176
>bf8c007f
>08121203
>10121306
>d2820008
>04240508
>5e0e0f08
>c0018105
>bf8c007f
>10100603
>c8240500
>c8250501
>10101308
>10121002
>c0018175
>bf8c007f
>08121203
>10121306
>d2820008
>04240508
>c0018104
>bf8c007f
>10040403
>c80c0400
>c80d0401
>10000702
>10020002
>c0000174
>bf8c007f
>08020200
>10020306
>d2820000
>04040500
>5e001100
>f8001c0f
>07000700
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL IN[4]
>DCL IN[5]
>DCL IN[6]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL OUT[3], GENERIC[20]
>DCL OUT[4], GENERIC[21]
>DCL OUT[5], GENERIC[22]
>DCL CONST[0..220]
>DCL TEMP[0..54], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 { -128.0000,     1.0000,   -64.0000,    -2.0000}
>IMM[1] FLT32 {   -0.0159,     0.0159,   765.0059,     0.0000}
>IMM[2] INT32 {2, 1, 0, 29}
>IMM[3] FLT32 {    5.0000,     0.0001,     0.0000,     0.0000}
>IMM[4] INT32 {28, 30, 31, 27}
>IMM[5] INT32 {23, 21, 25, 0}
>  0: DP4 TEMP[0].x, IN[4], CONST[48]
>  1: ADD TEMP[1].xy, IN[3].xyyy, IMM[0].xxxx
>  2: SLT TEMP[2].xy, TEMP[1].xyyy, CONST[0].xxxx
>  3: F2I TEMP[2].xy, -TEMP[2]
>  4: AND TEMP[2].xy, TEMP[2].xyyy, IMM[0].yyyy
>  5: DP4 TEMP[3].x, IN[4], CONST[49]
>  6: MOV TEMP[0].y, TEMP[3].xxxx
>  7: ABS TEMP[3].xy, TEMP[1].xyyy
>  8: ADD TEMP[3].xy, TEMP[3].xyyy, -TEMP[2].xyyy
>  9: ADD TEMP[3].xy, TEMP[3].xyyy, IMM[0].zzzz
> 10: ABS TEMP[4].xy, TEMP[3].xyyy
> 11: SLT TEMP[5].xy, TEMP[3].xyyy, CONST[0].xxxx
> 12: F2I TEMP[5].xy, -TEMP[5]
> 13: AND TEMP[3].xy, TEMP[5].xyyy, IMM[0].yyyy
> 14: ADD TEMP[1].xy, TEMP[4].xyyy, -TEMP[3].xyyy
> 15: MAD TEMP[4].x, TEMP[2].xxxx, IMM[0].wwww, IMM[0].yyyy
> 16: MAD TEMP[5].x, TEMP[1].xxxx, IMM[1].xxxx, IMM[0].yyyy
> 17: MAD TEMP[5].x, TEMP[1].yyyy, IMM[1].xxxx, TEMP[5].xxxx
> 18: MOV TEMP[1].z, TEMP[5].xxxx
> 19: MUL TEMP[1].xy, TEMP[1].xyyy, IMM[1].yyyy
> 20: MAD TEMP[2].xy, TEMP[3].xyyy, IMM[0].wwww, IMM[0].yyyy
> 21: DP3 TEMP[5].x, TEMP[1].xyzz, TEMP[1].xyzz
> 22: RSQ TEMP[5].x, TEMP[5].xxxx
> 23: MUL TEMP[5].xyz, TEMP[1].xyzz, TEMP[5].xxxx
> 24: MUL TEMP[1].xy, TEMP[2].xyyy, TEMP[5].xyyy
> 25: MUL TEMP[4].x, TEMP[4].xxxx, TEMP[5].zzzz
> 26: MOV TEMP[1].z, TEMP[4].xxxx
> 27: ADD TEMP[2].xy, IN[1].xyyy, CONST[0].yyyy
> 28: MUL TEMP[3].xyz, IN[2].zyxx, IMM[1].zzzz
> 29: MUL TEMP[4].xy, TEMP[2].xyyy, IMM[1].wwww
> 30: MOV TEMP[5].xyz, TEMP[3].xyzx
> 31: ADD TEMP[6].x, TEMP[4].yyyy, TEMP[4].xxxx
> 32: ADD TEMP[6].x, -TEMP[6].xxxx, CONST[0].yyyy
> 33: MOV TEMP[7].w, TEMP[6].xxxx
> 34: MAD TEMP[7].xyz, IN[6].xyzz, CONST[3].xxxx, TEMP[1].xyzz
> 35: F2I TEMP[8].x, TEMP[3].zzzz
> 36: UADD TEMP[8].x, TEMP[8].xxxx, IMM[2].xxxx
> 37: F2I TEMP[9].x, TEMP[3].yyyy
> 38: UADD TEMP[9].x, TEMP[9].xxxx, IMM[2].xxxx
> 39: F2I TEMP[10].x, TEMP[3].xxxx
> 40: UADD TEMP[10].x, TEMP[10].xxxx, IMM[2].xxxx
> 41: UARL ADDR[0].x, TEMP[10].xxxx
> 42: MUL TEMP[10], CONST[ADDR[0].x+58], TEMP[4].xxxx
> 43: UARL ADDR[0].x, TEMP[9].xxxx
> 44: MAD TEMP[9], TEMP[4].yyyy, CONST[ADDR[0].x+58], TEMP[10]
> 45: UARL ADDR[0].x, TEMP[8].xxxx
> 46: UARL ADDR[0].x, TEMP[8].xxxx
> 47: MAD TEMP[8], CONST[ADDR[0].x+58], TEMP[6].xxxx, TEMP[9]
> 48: MOV TEMP[9].w, CONST[0].xxxx
> 49: DP3 TEMP[10].x, TEMP[7].xyzz, TEMP[8].xyzz
> 50: MOV TEMP[4].z, TEMP[10].xxxx
> 51: MOV TEMP[3].w, IN[0].wwww
> 52: MAD TEMP[3].xyz, IN[5].xyzz, CONST[3].xxxx, IN[0].xyzz
> 53: F2I TEMP[10].x, TEMP[5].zzzz
> 54: F2I TEMP[11].x, TEMP[5].yyyy
> 55: F2I TEMP[12].x, TEMP[5].xxxx
> 56: UARL ADDR[0].x, TEMP[12].xxxx
> 57: MUL TEMP[12], CONST[ADDR[0].x+58], TEMP[4].xxxx
> 58: UARL ADDR[0].x, TEMP[11].xxxx
> 59: MAD TEMP[11], TEMP[4].yyyy, CONST[ADDR[0].x+58], TEMP[12]
> 60: UARL ADDR[0].x, TEMP[10].xxxx
> 61: UARL ADDR[0].x, TEMP[10].xxxx
> 62: MAD TEMP[10], CONST[ADDR[0].x+58], TEMP[6].xxxx, TEMP[11]
> 63: MOV TEMP[2].w, TEMP[10].xyxw
> 64: F2I TEMP[11].x, TEMP[5].zzzz
> 65: UADD TEMP[11].x, TEMP[11].xxxx, IMM[2].yyyy
> 66: F2I TEMP[12].x, TEMP[5].yyyy
> 67: UADD TEMP[12].x, TEMP[12].xxxx, IMM[2].yyyy
> 68: F2I TEMP[13].x, TEMP[5].xxxx
> 69: UADD TEMP[13].x, TEMP[13].xxxx, IMM[2].yyyy
> 70: UARL ADDR[0].x, TEMP[13].xxxx
> 71: MUL TEMP[13], CONST[ADDR[0].x+58], TEMP[4].xxxx
> 72: UARL ADDR[0].x, TEMP[12].xxxx
> 73: MAD TEMP[12], TEMP[4].yyyy, CONST[ADDR[0].x+58], TEMP[13]
> 74: UARL ADDR[0].x, TEMP[11].xxxx
> 75: UARL ADDR[0].x, TEMP[11].xxxx
> 76: MAD TEMP[6], CONST[ADDR[0].x+58], TEMP[6].xxxx, TEMP[12]
> 77: DP3 TEMP[4].x, TEMP[7].xyzz, TEMP[10].xyzz
> 78: DP3 TEMP[11].x, TEMP[7].xyzz, TEMP[6].xyzz
> 79: MOV TEMP[4].y, TEMP[11].xxxx
> 80: DP4 TEMP[8].x, TEMP[3], TEMP[8]
> 81: MOV TEMP[1].z, TEMP[8].xxxx
> 82: DP3 TEMP[8].x, TEMP[4].xyzz, TEMP[4].xyzz
> 83: RSQ TEMP[8].x, TEMP[8].xxxx
> 84: MUL TEMP[8].xyz, TEMP[4].xyzz, TEMP[8].xxxx
> 85: MOV TEMP[7].xyz, TEMP[8].xyzx
> 86: DP4 TEMP[11].x, TEMP[3], TEMP[6]
> 87: MOV TEMP[1].y, TEMP[11].xxxx
> 88: DP4 TEMP[1].x, TEMP[3], TEMP[10]
> 89: MOV TEMP[1].w, CONST[0].yyyy
> 90: MOV TEMP[10].xyz, TEMP[1].xyzx
> 91: DP4 TEMP[3].x, TEMP[1], CONST[8]
> 92: DP4 TEMP[11].x, TEMP[1], CONST[9]
> 93: MOV TEMP[3].y, TEMP[11].xxxx
> 94: DP4 TEMP[11].x, TEMP[1], CONST[11]
> 95: MOV TEMP[3].w, TEMP[11].xxxx
> 96: MOV TEMP[11].xy, TEMP[3].xyxx
> 97: DP4 TEMP[12].x, TEMP[1], CONST[13]
> 98: MOV TEMP[2].z, TEMP[12].xxxx
> 99: MOV TEMP[11].zw, TEMP[2].wwzw
>100: DP4 TEMP[13].x, TEMP[1], CONST[10]
>101: MOV TEMP[3].z, TEMP[13].xxxx
>102: MOV TEMP[10].w, TEMP[12].xxxx
>103: MOV TEMP[12], TEMP[3]
>104: MUL TEMP[2].xyz, TEMP[8].xyzz, TEMP[8].xyzz
>105: MOV TEMP[3].xyz, CONST[0].xxxx
>106: MOV TEMP[3].w, CONST[0].xxxx
>107: MOV TEMP[13].x, IMM[2].zzzz
>108: BGNLOOP :0
>109:   ISGE TEMP[14].x, TEMP[13].xxxx, CONST[220].xxxx
>110:   UIF TEMP[14].xxxx :0
>111:     BRK
>112:   ENDIF
>113:   MUL TEMP[15].x, TEMP[3].wwww, IMM[3].xxxx
>114:   MOV TEMP[5].w, TEMP[15].xxxx
>115:   F2I TEMP[16].x, TEMP[15].xxxx
>116:   UADD TEMP[17].x, TEMP[16].xxxx, IMM[2].wwww
>117:   UARL ADDR[0].x, TEMP[17].xxxx
>118:   UARL ADDR[0].x, TEMP[17].xxxx
>119:   ADD TEMP[6].xyz, -TEMP[1].xyzz, CONST[ADDR[0].x].xyzz
>120:   DP3 TEMP[18].x, TEMP[6].xyzz, TEMP[6].xyzz
>121:   RSQ TEMP[19].x, TEMP[18].xxxx
>122:   MOV TEMP[20].y, TEMP[19].xxxx
>123:   MUL TEMP[4].xyz, TEMP[6].xyzz, TEMP[19].xxxx
>124:   F2I TEMP[21].x, TEMP[15].xxxx
>125:   UADD TEMP[22].x, TEMP[21].xxxx, IMM[4].xxxx
>126:   UARL ADDR[0].x, TEMP[22].xxxx
>127:   UARL ADDR[0].x, TEMP[22].xxxx
>128:   MAD TEMP[6].xyz, TEMP[6].xyzz, -TEMP[19].xxxx, -CONST[ADDR[0].x].xyzz
>129:   MOV TEMP[18].y, CONST[0].yyyy
>130:   F2I TEMP[23].x, TEMP[15].xxxx
>131:   UADD TEMP[24].x, TEMP[23].xxxx, IMM[4].xxxx
>132:   UARL ADDR[0].x, TEMP[24].xxxx
>133:   DP3 TEMP[25].x, CONST[ADDR[0].x].xyzz, -TEMP[4].xyzz
>134:   F2I TEMP[26].x, TEMP[15].xxxx
>135:   UADD TEMP[27].x, TEMP[26].xxxx, IMM[4].yyyy
>136:   UARL ADDR[0].x, TEMP[27].xxxx
>137:   ADD TEMP[28].x, TEMP[25].xxxx, -CONST[ADDR[0].x].zzzz
>138:   MOV TEMP[20].xz, CONST[0].yyyy
>139:   F2I TEMP[29].x, TEMP[15].xxxx
>140:   UADD TEMP[30].x, TEMP[29].xxxx, IMM[4].yyyy
>141:   UARL ADDR[0].x, TEMP[30].xxxx
>142:   MUL TEMP[31].x, TEMP[28].xxxx, CONST[ADDR[0].x].wwww
>143:   MUL TEMP[20].xyz, TEMP[18].yxxx, TEMP[20].xyzz
>144:   MAX TEMP[32].x, TEMP[31].xxxx, IMM[3].yyyy
>145:   F2I TEMP[33].x, TEMP[15].xxxx
>146:   UADD TEMP[34].x, TEMP[33].xxxx, IMM[4].zzzz
>147:   UARL ADDR[0].x, TEMP[34].xxxx
>148:   UARL ADDR[0].x, TEMP[34].xxxx
>149:   DP3 TEMP[35].x, CONST[ADDR[0].x].xyzz, TEMP[20].xyzz
>150:   MOV TEMP[20].x, TEMP[35].xxxx
>151:   F2I TEMP[36].x, TEMP[15].xxxx
>152:   UADD TEMP[37].x, TEMP[36].xxxx, IMM[4].yyyy
>153:   UARL ADDR[0].x, TEMP[37].xxxx
>154:   POW TEMP[38].x, TEMP[32].xxxx, CONST[ADDR[0].x].xxxx
>155:   RCP TEMP[39].x, TEMP[35].xxxx
>156:   F2I TEMP[40].x, TEMP[15].xxxx
>157:   UADD TEMP[41].x, TEMP[40].xxxx, IMM[4].wwww
>158:   UARL ADDR[0].x, TEMP[41].xxxx
>159:   UARL ADDR[0].x, TEMP[41].xxxx
>160:   MAD TEMP[6].xyz, CONST[ADDR[0].x].wwww, TEMP[6].xyzz, TEMP[4].xyzz
>161:   MIN TEMP[42].x, TEMP[38].xxxx, CONST[0].yyyy
>162:   MAD TEMP[43].x, TEMP[39].xxxx, TEMP[42].xxxx, -TEMP[39].xxxx
>163:   DP3 TEMP[6].x, TEMP[7].xyzz, TEMP[6].xyzz
>164:   F2I TEMP[44].x, TEMP[15].xxxx
>165:   UADD TEMP[45].x, TEMP[44].xxxx, IMM[4].xxxx
>166:   UARL ADDR[0].x, TEMP[45].xxxx
>167:   MAD TEMP[46].x, CONST[ADDR[0].x].wwww, TEMP[43].xxxx, TEMP[39].xxxx
>168:   MOV TEMP[6].w, TEMP[46].xxxx
>169:   ADD TEMP[47].x, -TEMP[46].xxxx, CONST[0].yyyy
>170:   MAX TEMP[48].x, TEMP[6].xxxx, CONST[0].xxxx
>171:   MOV TEMP[2].w, TEMP[48].xxxx
>172:   F2I TEMP[49].x, TEMP[15].xxxx
>173:   UADD TEMP[50].x, TEMP[49].xxxx, IMM[4].wwww
>174:   UARL ADDR[0].x, TEMP[50].xxxx
>175:   MAD TEMP[51].x, CONST[ADDR[0].x].wwww, TEMP[47].xxxx, TEMP[46].xxxx
>176:   MOV TEMP[1].w, TEMP[51].xxxx
>177:   F2I TEMP[52].x, TEMP[15].xxxx
>178:   UADD TEMP[53].x, TEMP[52].xxxx, IMM[4].wwww
>179:   UARL ADDR[0].x, TEMP[53].xxxx
>180:   UARL ADDR[0].x, TEMP[53].xxxx
>181:   MUL TEMP[6].xyz, TEMP[48].xxxx, CONST[ADDR[0].x].xyzz
>182:   MAD TEMP[3].xyz, TEMP[6].xyzz, TEMP[51].xxxx, TEMP[3].xyzz
>183:   ADD TEMP[54].x, TEMP[3].wwww, CONST[0].yyyy
>184:   MOV TEMP[3].w, TEMP[54].xxxx
>185:   UADD TEMP[13].x, TEMP[13].xxxx, IMM[2].yyyy
>186: ENDLOOP :0
>187: SLT TEMP[4].xyz, TEMP[8].xyzz, CONST[0].xxxx
>188: F2I TEMP[4].xyz, -TEMP[4]
>189: AND TEMP[1].xyz, TEMP[4].xyzz, IMM[0].yyyy
>190: MOV TEMP[5].xz, TEMP[1].xyzx
>191: F2I TEMP[4].x, TEMP[1].yyyy
>192: UADD TEMP[4].x, TEMP[4].xxxx, IMM[5].xxxx
>193: UARL ADDR[0].x, TEMP[4].xxxx
>194: UARL ADDR[0].x, TEMP[4].xxxx
>195: MUL TEMP[1].xyz, TEMP[2].yyyy, CONST[ADDR[0].x].xyzz
>196: F2I TEMP[4].x, TEMP[5].xxxx
>197: UADD TEMP[4].x, TEMP[4].xxxx, IMM[5].yyyy
>198: UARL ADDR[0].x, TEMP[4].xxxx
>199: UARL ADDR[0].x, TEMP[4].xxxx
>200: MAD TEMP[1].xyz, TEMP[2].xxxx, CONST[ADDR[0].x].xyzz, TEMP[1].xyzz
>201: F2I TEMP[4].x, TEMP[5].zzzz
>202: UADD TEMP[4].x, TEMP[4].xxxx, IMM[5].zzzz
>203: UARL ADDR[0].x, TEMP[4].xxxx
>204: UARL ADDR[0].x, TEMP[4].xxxx
>205: MAD TEMP[1].xyz, TEMP[2].zzzz, CONST[ADDR[0].x].xyzz, TEMP[1].xyzz
>206: ADD TEMP[9].xyz, TEMP[3].xyzz, TEMP[1].xyzz
>207: MOV TEMP[1], TEMP[12]
>208: MAD TEMP[2].x, TEMP[12].zzzz, CONST[0].zzzz, -TEMP[12].wwww
>209: MOV TEMP[12].z, TEMP[2].xxxx
>210: MOV TEMP[12].y, -TEMP[12].yyyy
>211: MAD TEMP[12].xy, CONST[219].xyyy, TEMP[12].wwww, TEMP[12].xyyy
>212: MOV OUT[2], TEMP[0]
>213: MOV OUT[3], TEMP[9]
>214: MOV OUT[0], TEMP[12]
>215: MOV OUT[1], TEMP[1]
>216: MOV OUT[4], TEMP[11]
>217: MOV OUT[5], TEMP[10]
>218: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 12
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 32
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 33
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 34
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 35
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 36
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 37
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 38
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 39
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 40
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 41
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 42
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 43
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 44
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 45
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 46
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 47
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 52
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 53
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 54
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 55
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 192
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 193
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 194
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 195
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 196
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 197
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 198
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 199
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 876
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 877
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 880
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %82 = load <16 x i8> addrspace(2)* %81, !tbaa !0
>  %83 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %82, i32 0, i32 %5)
>  %84 = extractelement <4 x float> %83, i32 0
>  %85 = extractelement <4 x float> %83, i32 1
>  %86 = extractelement <4 x float> %83, i32 2
>  %87 = extractelement <4 x float> %83, i32 3
>  %88 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %89 = load <16 x i8> addrspace(2)* %88, !tbaa !0
>  %90 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %89, i32 0, i32 %5)
>  %91 = extractelement <4 x float> %90, i32 0
>  %92 = extractelement <4 x float> %90, i32 1
>  %93 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %94 = load <16 x i8> addrspace(2)* %93, !tbaa !0
>  %95 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %94, i32 0, i32 %5)
>  %96 = extractelement <4 x float> %95, i32 0
>  %97 = extractelement <4 x float> %95, i32 1
>  %98 = extractelement <4 x float> %95, i32 2
>  %99 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %100 = load <16 x i8> addrspace(2)* %99, !tbaa !0
>  %101 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %100, i32 0, i32 %5)
>  %102 = extractelement <4 x float> %101, i32 0
>  %103 = extractelement <4 x float> %101, i32 1
>  %104 = getelementptr <16 x i8> addrspace(2)* %3, i32 4
>  %105 = load <16 x i8> addrspace(2)* %104, !tbaa !0
>  %106 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %105, i32 0, i32 %5)
>  %107 = extractelement <4 x float> %106, i32 0
>  %108 = extractelement <4 x float> %106, i32 1
>  %109 = extractelement <4 x float> %106, i32 2
>  %110 = extractelement <4 x float> %106, i32 3
>  %111 = getelementptr <16 x i8> addrspace(2)* %3, i32 5
>  %112 = load <16 x i8> addrspace(2)* %111, !tbaa !0
>  %113 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %112, i32 0, i32 %5)
>  %114 = extractelement <4 x float> %113, i32 0
>  %115 = extractelement <4 x float> %113, i32 1
>  %116 = extractelement <4 x float> %113, i32 2
>  %117 = getelementptr <16 x i8> addrspace(2)* %3, i32 6
>  %118 = load <16 x i8> addrspace(2)* %117, !tbaa !0
>  %119 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %118, i32 0, i32 %5)
>  %120 = extractelement <4 x float> %119, i32 0
>  %121 = extractelement <4 x float> %119, i32 1
>  %122 = extractelement <4 x float> %119, i32 2
>  %123 = fmul float %107, %60
>  %124 = fmul float %108, %62
>  %125 = fadd float %123, %124
>  %126 = fmul float %109, %64
>  %127 = fadd float %125, %126
>  %128 = fmul float %110, %66
>  %129 = fadd float %127, %128
>  %130 = fadd float %102, -1.280000e+02
>  %131 = fadd float %103, -1.280000e+02
>  %132 = fcmp ult float %130, %12
>  %133 = select i1 %132, float 1.000000e+00, float 0.000000e+00
>  %134 = fcmp ult float %131, %12
>  %135 = select i1 %134, float 1.000000e+00, float 0.000000e+00
>  %136 = fsub float -0.000000e+00, %133
>  %137 = fptosi float %136 to i32
>  %138 = fsub float -0.000000e+00, %135
>  %139 = fptosi float %138 to i32
>  %140 = bitcast i32 %137 to float
>  %141 = bitcast i32 %139 to float
>  %142 = bitcast float %140 to i32
>  %143 = and i32 %142, 1065353216
>  %144 = bitcast float %141 to i32
>  %145 = and i32 %144, 1065353216
>  %146 = bitcast i32 %143 to float
>  %147 = bitcast i32 %145 to float
>  %148 = fmul float %107, %68
>  %149 = fmul float %108, %70
>  %150 = fadd float %148, %149
>  %151 = fmul float %109, %72
>  %152 = fadd float %150, %151
>  %153 = fmul float %110, %74
>  %154 = fadd float %152, %153
>  %155 = call float @fabs(float %130)
>  %156 = call float @fabs(float %131)
>  %157 = fsub float -0.000000e+00, %146
>  %158 = fadd float %155, %157
>  %159 = fsub float -0.000000e+00, %147
>  %160 = fadd float %156, %159
>  %161 = fadd float %158, -6.400000e+01
>  %162 = fadd float %160, -6.400000e+01
>  %163 = call float @fabs(float %161)
>  %164 = call float @fabs(float %162)
>  %165 = fcmp ult float %161, %12
>  %166 = select i1 %165, float 1.000000e+00, float 0.000000e+00
>  %167 = fcmp ult float %162, %12
>  %168 = select i1 %167, float 1.000000e+00, float 0.000000e+00
>  %169 = fsub float -0.000000e+00, %166
>  %170 = fptosi float %169 to i32
>  %171 = fsub float -0.000000e+00, %168
>  %172 = fptosi float %171 to i32
>  %173 = bitcast i32 %170 to float
>  %174 = bitcast i32 %172 to float
>  %175 = bitcast float %173 to i32
>  %176 = and i32 %175, 1065353216
>  %177 = bitcast float %174 to i32
>  %178 = and i32 %177, 1065353216
>  %179 = bitcast i32 %176 to float
>  %180 = bitcast i32 %178 to float
>  %181 = fsub float -0.000000e+00, %179
>  %182 = fadd float %163, %181
>  %183 = fsub float -0.000000e+00, %180
>  %184 = fadd float %164, %183
>  %185 = fmul float %146, -2.000000e+00
>  %186 = fadd float %185, 1.000000e+00
>  %187 = fmul float %182, 0xBF90410420000000
>  %188 = fadd float %187, 1.000000e+00
>  %189 = fmul float %184, 0xBF90410420000000
>  %190 = fadd float %189, %188
>  %191 = fmul float %182, 0x3F90410420000000
>  %192 = fmul float %184, 0x3F90410420000000
>  %193 = fmul float %179, -2.000000e+00
>  %194 = fadd float %193, 1.000000e+00
>  %195 = fmul float %180, -2.000000e+00
>  %196 = fadd float %195, 1.000000e+00
>  %197 = fmul float %191, %191
>  %198 = fmul float %192, %192
>  %199 = fadd float %198, %197
>  %200 = fmul float %190, %190
>  %201 = fadd float %199, %200
>  %202 = call float @llvm.AMDGPU.rsq(float %201)
>  %203 = fmul float %191, %202
>  %204 = fmul float %192, %202
>  %205 = fmul float %190, %202
>  %206 = fmul float %194, %203
>  %207 = fmul float %196, %204
>  %208 = fmul float %186, %205
>  %209 = fadd float %91, %14
>  %210 = fadd float %92, %14
>  %211 = fmul float %98, 0x4087E80C00000000
>  %212 = fmul float %97, 0x4087E80C00000000
>  %213 = fmul float %96, 0x4087E80C00000000
>  %214 = fmul float %209, 0x3F00000000000000
>  %215 = fmul float %210, 0x3F00000000000000
>  %216 = fadd float %215, %214
>  %217 = fsub float -0.000000e+00, %216
>  %218 = fadd float %217, %14
>  %219 = fmul float %120, %18
>  %220 = fadd float %219, %206
>  %221 = fmul float %121, %18
>  %222 = fadd float %221, %207
>  %223 = fmul float %122, %18
>  %224 = fadd float %223, %208
>  %225 = fptosi float %213 to i32
>  %226 = bitcast i32 %225 to float
>  %227 = bitcast float %226 to i32
>  %228 = add i32 %227, 2
>  %229 = bitcast i32 %228 to float
>  %230 = fptosi float %212 to i32
>  %231 = bitcast i32 %230 to float
>  %232 = bitcast float %231 to i32
>  %233 = add i32 %232, 2
>  %234 = bitcast i32 %233 to float
>  %235 = fptosi float %211 to i32
>  %236 = bitcast i32 %235 to float
>  %237 = bitcast float %236 to i32
>  %238 = add i32 %237, 2
>  %239 = bitcast i32 %238 to float
>  %240 = bitcast float %239 to i32
>  %241 = shl i32 %240, 4
>  %242 = add i32 %241, 928
>  %243 = udiv i32 %242, 4
>  %244 = getelementptr float addrspace(2)* %10, i32 %243
>  %245 = load float addrspace(2)* %244, !tbaa !0
>  %246 = fmul float %245, %214
>  %247 = shl i32 %240, 4
>  %248 = add i32 %247, 932
>  %249 = udiv i32 %248, 4
>  %250 = getelementptr float addrspace(2)* %10, i32 %249
>  %251 = load float addrspace(2)* %250, !tbaa !0
>  %252 = fmul float %251, %214
>  %253 = shl i32 %240, 4
>  %254 = add i32 %253, 936
>  %255 = udiv i32 %254, 4
>  %256 = getelementptr float addrspace(2)* %10, i32 %255
>  %257 = load float addrspace(2)* %256, !tbaa !0
>  %258 = fmul float %257, %214
>  %259 = shl i32 %240, 4
>  %260 = add i32 %259, 940
>  %261 = udiv i32 %260, 4
>  %262 = getelementptr float addrspace(2)* %10, i32 %261
>  %263 = load float addrspace(2)* %262, !tbaa !0
>  %264 = fmul float %263, %214
>  %265 = bitcast float %234 to i32
>  %266 = shl i32 %265, 4
>  %267 = add i32 %266, 928
>  %268 = udiv i32 %267, 4
>  %269 = getelementptr float addrspace(2)* %10, i32 %268
>  %270 = load float addrspace(2)* %269, !tbaa !0
>  %271 = fmul float %215, %270
>  %272 = fadd float %271, %246
>  %273 = shl i32 %265, 4
>  %274 = add i32 %273, 932
>  %275 = udiv i32 %274, 4
>  %276 = getelementptr float addrspace(2)* %10, i32 %275
>  %277 = load float addrspace(2)* %276, !tbaa !0
>  %278 = fmul float %215, %277
>  %279 = fadd float %278, %252
>  %280 = shl i32 %265, 4
>  %281 = add i32 %280, 936
>  %282 = udiv i32 %281, 4
>  %283 = getelementptr float addrspace(2)* %10, i32 %282
>  %284 = load float addrspace(2)* %283, !tbaa !0
>  %285 = fmul float %215, %284
>  %286 = fadd float %285, %258
>  %287 = shl i32 %265, 4
>  %288 = add i32 %287, 940
>  %289 = udiv i32 %288, 4
>  %290 = getelementptr float addrspace(2)* %10, i32 %289
>  %291 = load float addrspace(2)* %290, !tbaa !0
>  %292 = fmul float %215, %291
>  %293 = fadd float %292, %264
>  %294 = bitcast float %229 to i32
>  %295 = shl i32 %294, 4
>  %296 = add i32 %295, 928
>  %297 = udiv i32 %296, 4
>  %298 = getelementptr float addrspace(2)* %10, i32 %297
>  %299 = load float addrspace(2)* %298, !tbaa !0
>  %300 = fmul float %299, %218
>  %301 = fadd float %300, %272
>  %302 = shl i32 %294, 4
>  %303 = add i32 %302, 932
>  %304 = udiv i32 %303, 4
>  %305 = getelementptr float addrspace(2)* %10, i32 %304
>  %306 = load float addrspace(2)* %305, !tbaa !0
>  %307 = fmul float %306, %218
>  %308 = fadd float %307, %279
>  %309 = shl i32 %294, 4
>  %310 = add i32 %309, 936
>  %311 = udiv i32 %310, 4
>  %312 = getelementptr float addrspace(2)* %10, i32 %311
>  %313 = load float addrspace(2)* %312, !tbaa !0
>  %314 = fmul float %313, %218
>  %315 = fadd float %314, %286
>  %316 = shl i32 %294, 4
>  %317 = add i32 %316, 940
>  %318 = udiv i32 %317, 4
>  %319 = getelementptr float addrspace(2)* %10, i32 %318
>  %320 = load float addrspace(2)* %319, !tbaa !0
>  %321 = fmul float %320, %218
>  %322 = fadd float %321, %293
>  %323 = fmul float %220, %301
>  %324 = fmul float %222, %308
>  %325 = fadd float %324, %323
>  %326 = fmul float %224, %315
>  %327 = fadd float %325, %326
>  %328 = fmul float %114, %18
>  %329 = fadd float %328, %84
>  %330 = fmul float %115, %18
>  %331 = fadd float %330, %85
>  %332 = fmul float %116, %18
>  %333 = fadd float %332, %86
>  %334 = fptosi float %213 to i32
>  %335 = bitcast i32 %334 to float
>  %336 = fptosi float %212 to i32
>  %337 = bitcast i32 %336 to float
>  %338 = fptosi float %211 to i32
>  %339 = bitcast i32 %338 to float
>  %340 = bitcast float %339 to i32
>  %341 = shl i32 %340, 4
>  %342 = add i32 %341, 928
>  %343 = udiv i32 %342, 4
>  %344 = getelementptr float addrspace(2)* %10, i32 %343
>  %345 = load float addrspace(2)* %344, !tbaa !0
>  %346 = fmul float %345, %214
>  %347 = shl i32 %340, 4
>  %348 = add i32 %347, 932
>  %349 = udiv i32 %348, 4
>  %350 = getelementptr float addrspace(2)* %10, i32 %349
>  %351 = load float addrspace(2)* %350, !tbaa !0
>  %352 = fmul float %351, %214
>  %353 = shl i32 %340, 4
>  %354 = add i32 %353, 936
>  %355 = udiv i32 %354, 4
>  %356 = getelementptr float addrspace(2)* %10, i32 %355
>  %357 = load float addrspace(2)* %356, !tbaa !0
>  %358 = fmul float %357, %214
>  %359 = shl i32 %340, 4
>  %360 = add i32 %359, 940
>  %361 = udiv i32 %360, 4
>  %362 = getelementptr float addrspace(2)* %10, i32 %361
>  %363 = load float addrspace(2)* %362, !tbaa !0
>  %364 = fmul float %363, %214
>  %365 = bitcast float %337 to i32
>  %366 = shl i32 %365, 4
>  %367 = add i32 %366, 928
>  %368 = udiv i32 %367, 4
>  %369 = getelementptr float addrspace(2)* %10, i32 %368
>  %370 = load float addrspace(2)* %369, !tbaa !0
>  %371 = fmul float %215, %370
>  %372 = fadd float %371, %346
>  %373 = shl i32 %365, 4
>  %374 = add i32 %373, 932
>  %375 = udiv i32 %374, 4
>  %376 = getelementptr float addrspace(2)* %10, i32 %375
>  %377 = load float addrspace(2)* %376, !tbaa !0
>  %378 = fmul float %215, %377
>  %379 = fadd float %378, %352
>  %380 = shl i32 %365, 4
>  %381 = add i32 %380, 936
>  %382 = udiv i32 %381, 4
>  %383 = getelementptr float addrspace(2)* %10, i32 %382
>  %384 = load float addrspace(2)* %383, !tbaa !0
>  %385 = fmul float %215, %384
>  %386 = fadd float %385, %358
>  %387 = shl i32 %365, 4
>  %388 = add i32 %387, 940
>  %389 = udiv i32 %388, 4
>  %390 = getelementptr float addrspace(2)* %10, i32 %389
>  %391 = load float addrspace(2)* %390, !tbaa !0
>  %392 = fmul float %215, %391
>  %393 = fadd float %392, %364
>  %394 = bitcast float %335 to i32
>  %395 = shl i32 %394, 4
>  %396 = add i32 %395, 928
>  %397 = udiv i32 %396, 4
>  %398 = getelementptr float addrspace(2)* %10, i32 %397
>  %399 = load float addrspace(2)* %398, !tbaa !0
>  %400 = fmul float %399, %218
>  %401 = fadd float %400, %372
>  %402 = shl i32 %394, 4
>  %403 = add i32 %402, 932
>  %404 = udiv i32 %403, 4
>  %405 = getelementptr float addrspace(2)* %10, i32 %404
>  %406 = load float addrspace(2)* %405, !tbaa !0
>  %407 = fmul float %406, %218
>  %408 = fadd float %407, %379
>  %409 = shl i32 %394, 4
>  %410 = add i32 %409, 936
>  %411 = udiv i32 %410, 4
>  %412 = getelementptr float addrspace(2)* %10, i32 %411
>  %413 = load float addrspace(2)* %412, !tbaa !0
>  %414 = fmul float %413, %218
>  %415 = fadd float %414, %386
>  %416 = shl i32 %394, 4
>  %417 = add i32 %416, 940
>  %418 = udiv i32 %417, 4
>  %419 = getelementptr float addrspace(2)* %10, i32 %418
>  %420 = load float addrspace(2)* %419, !tbaa !0
>  %421 = fmul float %420, %218
>  %422 = fadd float %421, %393
>  %423 = fptosi float %213 to i32
>  %424 = bitcast i32 %423 to float
>  %425 = bitcast float %424 to i32
>  %426 = add i32 %425, 1
>  %427 = bitcast i32 %426 to float
>  %428 = fptosi float %212 to i32
>  %429 = bitcast i32 %428 to float
>  %430 = bitcast float %429 to i32
>  %431 = add i32 %430, 1
>  %432 = bitcast i32 %431 to float
>  %433 = fptosi float %211 to i32
>  %434 = bitcast i32 %433 to float
>  %435 = bitcast float %434 to i32
>  %436 = add i32 %435, 1
>  %437 = bitcast i32 %436 to float
>  %438 = bitcast float %437 to i32
>  %439 = shl i32 %438, 4
>  %440 = add i32 %439, 928
>  %441 = udiv i32 %440, 4
>  %442 = getelementptr float addrspace(2)* %10, i32 %441
>  %443 = load float addrspace(2)* %442, !tbaa !0
>  %444 = fmul float %443, %214
>  %445 = shl i32 %438, 4
>  %446 = add i32 %445, 932
>  %447 = udiv i32 %446, 4
>  %448 = getelementptr float addrspace(2)* %10, i32 %447
>  %449 = load float addrspace(2)* %448, !tbaa !0
>  %450 = fmul float %449, %214
>  %451 = shl i32 %438, 4
>  %452 = add i32 %451, 936
>  %453 = udiv i32 %452, 4
>  %454 = getelementptr float addrspace(2)* %10, i32 %453
>  %455 = load float addrspace(2)* %454, !tbaa !0
>  %456 = fmul float %455, %214
>  %457 = shl i32 %438, 4
>  %458 = add i32 %457, 940
>  %459 = udiv i32 %458, 4
>  %460 = getelementptr float addrspace(2)* %10, i32 %459
>  %461 = load float addrspace(2)* %460, !tbaa !0
>  %462 = fmul float %461, %214
>  %463 = bitcast float %432 to i32
>  %464 = shl i32 %463, 4
>  %465 = add i32 %464, 928
>  %466 = udiv i32 %465, 4
>  %467 = getelementptr float addrspace(2)* %10, i32 %466
>  %468 = load float addrspace(2)* %467, !tbaa !0
>  %469 = fmul float %215, %468
>  %470 = fadd float %469, %444
>  %471 = shl i32 %463, 4
>  %472 = add i32 %471, 932
>  %473 = udiv i32 %472, 4
>  %474 = getelementptr float addrspace(2)* %10, i32 %473
>  %475 = load float addrspace(2)* %474, !tbaa !0
>  %476 = fmul float %215, %475
>  %477 = fadd float %476, %450
>  %478 = shl i32 %463, 4
>  %479 = add i32 %478, 936
>  %480 = udiv i32 %479, 4
>  %481 = getelementptr float addrspace(2)* %10, i32 %480
>  %482 = load float addrspace(2)* %481, !tbaa !0
>  %483 = fmul float %215, %482
>  %484 = fadd float %483, %456
>  %485 = shl i32 %463, 4
>  %486 = add i32 %485, 940
>  %487 = udiv i32 %486, 4
>  %488 = getelementptr float addrspace(2)* %10, i32 %487
>  %489 = load float addrspace(2)* %488, !tbaa !0
>  %490 = fmul float %215, %489
>  %491 = fadd float %490, %462
>  %492 = bitcast float %427 to i32
>  %493 = shl i32 %492, 4
>  %494 = add i32 %493, 928
>  %495 = udiv i32 %494, 4
>  %496 = getelementptr float addrspace(2)* %10, i32 %495
>  %497 = load float addrspace(2)* %496, !tbaa !0
>  %498 = fmul float %497, %218
>  %499 = fadd float %498, %470
>  %500 = shl i32 %492, 4
>  %501 = add i32 %500, 932
>  %502 = udiv i32 %501, 4
>  %503 = getelementptr float addrspace(2)* %10, i32 %502
>  %504 = load float addrspace(2)* %503, !tbaa !0
>  %505 = fmul float %504, %218
>  %506 = fadd float %505, %477
>  %507 = shl i32 %492, 4
>  %508 = add i32 %507, 936
>  %509 = udiv i32 %508, 4
>  %510 = getelementptr float addrspace(2)* %10, i32 %509
>  %511 = load float addrspace(2)* %510, !tbaa !0
>  %512 = fmul float %511, %218
>  %513 = fadd float %512, %484
>  %514 = shl i32 %492, 4
>  %515 = add i32 %514, 940
>  %516 = udiv i32 %515, 4
>  %517 = getelementptr float addrspace(2)* %10, i32 %516
>  %518 = load float addrspace(2)* %517, !tbaa !0
>  %519 = fmul float %518, %218
>  %520 = fadd float %519, %491
>  %521 = fmul float %220, %401
>  %522 = fmul float %222, %408
>  %523 = fadd float %522, %521
>  %524 = fmul float %224, %415
>  %525 = fadd float %523, %524
>  %526 = fmul float %220, %499
>  %527 = fmul float %222, %506
>  %528 = fadd float %527, %526
>  %529 = fmul float %224, %513
>  %530 = fadd float %528, %529
>  %531 = fmul float %329, %301
>  %532 = fmul float %331, %308
>  %533 = fadd float %531, %532
>  %534 = fmul float %333, %315
>  %535 = fadd float %533, %534
>  %536 = fmul float %87, %322
>  %537 = fadd float %535, %536
>  %538 = fmul float %525, %525
>  %539 = fmul float %530, %530
>  %540 = fadd float %539, %538
>  %541 = fmul float %327, %327
>  %542 = fadd float %540, %541
>  %543 = call float @llvm.AMDGPU.rsq(float %542)
>  %544 = fmul float %525, %543
>  %545 = fmul float %530, %543
>  %546 = fmul float %327, %543
>  %547 = fmul float %329, %499
>  %548 = fmul float %331, %506
>  %549 = fadd float %547, %548
>  %550 = fmul float %333, %513
>  %551 = fadd float %549, %550
>  %552 = fmul float %87, %520
>  %553 = fadd float %551, %552
>  %554 = fmul float %329, %401
>  %555 = fmul float %331, %408
>  %556 = fadd float %554, %555
>  %557 = fmul float %333, %415
>  %558 = fadd float %556, %557
>  %559 = fmul float %87, %422
>  %560 = fadd float %558, %559
>  %561 = fmul float %560, %20
>  %562 = fmul float %553, %22
>  %563 = fadd float %561, %562
>  %564 = fmul float %537, %24
>  %565 = fadd float %563, %564
>  %566 = fmul float %14, %26
>  %567 = fadd float %565, %566
>  %568 = fmul float %560, %28
>  %569 = fmul float %553, %30
>  %570 = fadd float %568, %569
>  %571 = fmul float %537, %32
>  %572 = fadd float %570, %571
>  %573 = fmul float %14, %34
>  %574 = fadd float %572, %573
>  %575 = fmul float %560, %44
>  %576 = fmul float %553, %46
>  %577 = fadd float %575, %576
>  %578 = fmul float %537, %48
>  %579 = fadd float %577, %578
>  %580 = fmul float %14, %50
>  %581 = fadd float %579, %580
>  %582 = fmul float %560, %52
>  %583 = fmul float %553, %54
>  %584 = fadd float %582, %583
>  %585 = fmul float %537, %56
>  %586 = fadd float %584, %585
>  %587 = fmul float %14, %58
>  %588 = fadd float %586, %587
>  %589 = fmul float %560, %36
>  %590 = fmul float %553, %38
>  %591 = fadd float %589, %590
>  %592 = fmul float %537, %40
>  %593 = fadd float %591, %592
>  %594 = fmul float %14, %42
>  %595 = fadd float %593, %594
>  %596 = fmul float %544, %544
>  %597 = fmul float %545, %545
>  %598 = fmul float %546, %546
>  %599 = bitcast float %80 to i32
>  %600 = fsub float -0.000000e+00, %560
>  %601 = fsub float -0.000000e+00, %553
>  %602 = fsub float -0.000000e+00, %537
>  %603 = fmul float %14, %14
>  br label %LOOP
>
>LOOP:                                             ; preds = %ENDIF, %main_body
>  %temp52.0 = phi float [ 0.000000e+00, %main_body ], [ %1100, %ENDIF ]
>  %temp15.0 = phi float [ %12, %main_body ], [ %1097, %ENDIF ]
>  %temp14.0 = phi float [ %12, %main_body ], [ %1096, %ENDIF ]
>  %temp13.0 = phi float [ %12, %main_body ], [ %1094, %ENDIF ]
>  %temp12.0 = phi float [ %12, %main_body ], [ %1092, %ENDIF ]
>  %604 = bitcast float %temp52.0 to i32
>  %605 = icmp sge i32 %604, %599
>  %606 = sext i1 %605 to i32
>  %607 = bitcast i32 %606 to float
>  %608 = bitcast float %607 to i32
>  %609 = icmp ne i32 %608, 0
>  br i1 %609, label %IF, label %ENDIF
>
>IF:                                               ; preds = %LOOP
>  %610 = fcmp ult float %544, %12
>  %611 = select i1 %610, float 1.000000e+00, float 0.000000e+00
>  %612 = fcmp ult float %545, %12
>  %613 = select i1 %612, float 1.000000e+00, float 0.000000e+00
>  %614 = fcmp ult float %546, %12
>  %615 = select i1 %614, float 1.000000e+00, float 0.000000e+00
>  %616 = fsub float -0.000000e+00, %611
>  %617 = fptosi float %616 to i32
>  %618 = fsub float -0.000000e+00, %613
>  %619 = fptosi float %618 to i32
>  %620 = fsub float -0.000000e+00, %615
>  %621 = fptosi float %620 to i32
>  %622 = bitcast i32 %617 to float
>  %623 = bitcast i32 %619 to float
>  %624 = bitcast i32 %621 to float
>  %625 = bitcast float %622 to i32
>  %626 = and i32 %625, 1065353216
>  %627 = bitcast float %623 to i32
>  %628 = and i32 %627, 1065353216
>  %629 = bitcast float %624 to i32
>  %630 = and i32 %629, 1065353216
>  %631 = bitcast i32 %626 to float
>  %632 = bitcast i32 %628 to float
>  %633 = bitcast i32 %630 to float
>  %634 = fptosi float %632 to i32
>  %635 = bitcast i32 %634 to float
>  %636 = bitcast float %635 to i32
>  %637 = add i32 %636, 23
>  %638 = bitcast i32 %637 to float
>  %639 = bitcast float %638 to i32
>  %640 = shl i32 %639, 4
>  %641 = udiv i32 %640, 4
>  %642 = getelementptr float addrspace(2)* %10, i32 %641
>  %643 = load float addrspace(2)* %642, !tbaa !0
>  %644 = fmul float %597, %643
>  %645 = shl i32 %639, 4
>  %646 = add i32 %645, 4
>  %647 = udiv i32 %646, 4
>  %648 = getelementptr float addrspace(2)* %10, i32 %647
>  %649 = load float addrspace(2)* %648, !tbaa !0
>  %650 = fmul float %597, %649
>  %651 = shl i32 %639, 4
>  %652 = add i32 %651, 8
>  %653 = udiv i32 %652, 4
>  %654 = getelementptr float addrspace(2)* %10, i32 %653
>  %655 = load float addrspace(2)* %654, !tbaa !0
>  %656 = fmul float %597, %655
>  %657 = fptosi float %631 to i32
>  %658 = bitcast i32 %657 to float
>  %659 = bitcast float %658 to i32
>  %660 = add i32 %659, 21
>  %661 = bitcast i32 %660 to float
>  %662 = bitcast float %661 to i32
>  %663 = shl i32 %662, 4
>  %664 = udiv i32 %663, 4
>  %665 = getelementptr float addrspace(2)* %10, i32 %664
>  %666 = load float addrspace(2)* %665, !tbaa !0
>  %667 = fmul float %596, %666
>  %668 = fadd float %667, %644
>  %669 = shl i32 %662, 4
>  %670 = add i32 %669, 4
>  %671 = udiv i32 %670, 4
>  %672 = getelementptr float addrspace(2)* %10, i32 %671
>  %673 = load float addrspace(2)* %672, !tbaa !0
>  %674 = fmul float %596, %673
>  %675 = fadd float %674, %650
>  %676 = shl i32 %662, 4
>  %677 = add i32 %676, 8
>  %678 = udiv i32 %677, 4
>  %679 = getelementptr float addrspace(2)* %10, i32 %678
>  %680 = load float addrspace(2)* %679, !tbaa !0
>  %681 = fmul float %596, %680
>  %682 = fadd float %681, %656
>  %683 = fptosi float %633 to i32
>  %684 = bitcast i32 %683 to float
>  %685 = bitcast float %684 to i32
>  %686 = add i32 %685, 25
>  %687 = bitcast i32 %686 to float
>  %688 = bitcast float %687 to i32
>  %689 = shl i32 %688, 4
>  %690 = udiv i32 %689, 4
>  %691 = getelementptr float addrspace(2)* %10, i32 %690
>  %692 = load float addrspace(2)* %691, !tbaa !0
>  %693 = fmul float %598, %692
>  %694 = fadd float %693, %668
>  %695 = shl i32 %688, 4
>  %696 = add i32 %695, 4
>  %697 = udiv i32 %696, 4
>  %698 = getelementptr float addrspace(2)* %10, i32 %697
>  %699 = load float addrspace(2)* %698, !tbaa !0
>  %700 = fmul float %598, %699
>  %701 = fadd float %700, %675
>  %702 = shl i32 %688, 4
>  %703 = add i32 %702, 8
>  %704 = udiv i32 %703, 4
>  %705 = getelementptr float addrspace(2)* %10, i32 %704
>  %706 = load float addrspace(2)* %705, !tbaa !0
>  %707 = fmul float %598, %706
>  %708 = fadd float %707, %682
>  %709 = fadd float %temp12.0, %694
>  %710 = fadd float %temp13.0, %701
>  %711 = fadd float %temp14.0, %708
>  %712 = fsub float -0.000000e+00, %581
>  %713 = fmul float %595, %16
>  %714 = fadd float %713, %712
>  %715 = fsub float -0.000000e+00, %574
>  %716 = fmul float %76, %581
>  %717 = fadd float %716, %567
>  %718 = fmul float %78, %581
>  %719 = fadd float %718, %715
>  %720 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %721 = load float addrspace(2)* addrspace(2)* %720, !tbaa !0
>  %722 = getelementptr float addrspace(2)* %721, i32 0
>  %723 = load float addrspace(2)* %722, !tbaa !0
>  %724 = fmul float %723, %567
>  %725 = getelementptr float addrspace(2)* %721, i32 1
>  %726 = load float addrspace(2)* %725, !tbaa !0
>  %727 = fmul float %726, %574
>  %728 = fadd float %724, %727
>  %729 = getelementptr float addrspace(2)* %721, i32 2
>  %730 = load float addrspace(2)* %729, !tbaa !0
>  %731 = fmul float %730, %595
>  %732 = fadd float %728, %731
>  %733 = getelementptr float addrspace(2)* %721, i32 3
>  %734 = load float addrspace(2)* %733, !tbaa !0
>  %735 = fmul float %734, %581
>  %736 = fadd float %732, %735
>  %737 = getelementptr float addrspace(2)* %721, i32 4
>  %738 = load float addrspace(2)* %737, !tbaa !0
>  %739 = fmul float %738, %567
>  %740 = getelementptr float addrspace(2)* %721, i32 5
>  %741 = load float addrspace(2)* %740, !tbaa !0
>  %742 = fmul float %741, %574
>  %743 = fadd float %739, %742
>  %744 = getelementptr float addrspace(2)* %721, i32 6
>  %745 = load float addrspace(2)* %744, !tbaa !0
>  %746 = fmul float %745, %595
>  %747 = fadd float %743, %746
>  %748 = getelementptr float addrspace(2)* %721, i32 7
>  %749 = load float addrspace(2)* %748, !tbaa !0
>  %750 = fmul float %749, %581
>  %751 = fadd float %747, %750
>  %752 = getelementptr float addrspace(2)* %721, i32 8
>  %753 = load float addrspace(2)* %752, !tbaa !0
>  %754 = fmul float %753, %567
>  %755 = getelementptr float addrspace(2)* %721, i32 9
>  %756 = load float addrspace(2)* %755, !tbaa !0
>  %757 = fmul float %756, %574
>  %758 = fadd float %754, %757
>  %759 = getelementptr float addrspace(2)* %721, i32 10
>  %760 = load float addrspace(2)* %759, !tbaa !0
>  %761 = fmul float %760, %595
>  %762 = fadd float %758, %761
>  %763 = getelementptr float addrspace(2)* %721, i32 11
>  %764 = load float addrspace(2)* %763, !tbaa !0
>  %765 = fmul float %764, %581
>  %766 = fadd float %762, %765
>  %767 = getelementptr float addrspace(2)* %721, i32 12
>  %768 = load float addrspace(2)* %767, !tbaa !0
>  %769 = fmul float %768, %567
>  %770 = getelementptr float addrspace(2)* %721, i32 13
>  %771 = load float addrspace(2)* %770, !tbaa !0
>  %772 = fmul float %771, %574
>  %773 = fadd float %769, %772
>  %774 = getelementptr float addrspace(2)* %721, i32 14
>  %775 = load float addrspace(2)* %774, !tbaa !0
>  %776 = fmul float %775, %595
>  %777 = fadd float %773, %776
>  %778 = getelementptr float addrspace(2)* %721, i32 15
>  %779 = load float addrspace(2)* %778, !tbaa !0
>  %780 = fmul float %779, %581
>  %781 = fadd float %777, %780
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %736, float %751, float %766, float %781)
>  %782 = getelementptr float addrspace(2)* %721, i32 16
>  %783 = load float addrspace(2)* %782, !tbaa !0
>  %784 = fmul float %783, %567
>  %785 = getelementptr float addrspace(2)* %721, i32 17
>  %786 = load float addrspace(2)* %785, !tbaa !0
>  %787 = fmul float %786, %574
>  %788 = fadd float %784, %787
>  %789 = getelementptr float addrspace(2)* %721, i32 18
>  %790 = load float addrspace(2)* %789, !tbaa !0
>  %791 = fmul float %790, %595
>  %792 = fadd float %788, %791
>  %793 = getelementptr float addrspace(2)* %721, i32 19
>  %794 = load float addrspace(2)* %793, !tbaa !0
>  %795 = fmul float %794, %581
>  %796 = fadd float %792, %795
>  %797 = getelementptr float addrspace(2)* %721, i32 20
>  %798 = load float addrspace(2)* %797, !tbaa !0
>  %799 = fmul float %798, %567
>  %800 = getelementptr float addrspace(2)* %721, i32 21
>  %801 = load float addrspace(2)* %800, !tbaa !0
>  %802 = fmul float %801, %574
>  %803 = fadd float %799, %802
>  %804 = getelementptr float addrspace(2)* %721, i32 22
>  %805 = load float addrspace(2)* %804, !tbaa !0
>  %806 = fmul float %805, %595
>  %807 = fadd float %803, %806
>  %808 = getelementptr float addrspace(2)* %721, i32 23
>  %809 = load float addrspace(2)* %808, !tbaa !0
>  %810 = fmul float %809, %581
>  %811 = fadd float %807, %810
>  %812 = getelementptr float addrspace(2)* %721, i32 24
>  %813 = load float addrspace(2)* %812, !tbaa !0
>  %814 = fmul float %813, %567
>  %815 = getelementptr float addrspace(2)* %721, i32 25
>  %816 = load float addrspace(2)* %815, !tbaa !0
>  %817 = fmul float %816, %574
>  %818 = fadd float %814, %817
>  %819 = getelementptr float addrspace(2)* %721, i32 26
>  %820 = load float addrspace(2)* %819, !tbaa !0
>  %821 = fmul float %820, %595
>  %822 = fadd float %818, %821
>  %823 = getelementptr float addrspace(2)* %721, i32 27
>  %824 = load float addrspace(2)* %823, !tbaa !0
>  %825 = fmul float %824, %581
>  %826 = fadd float %822, %825
>  %827 = getelementptr float addrspace(2)* %721, i32 28
>  %828 = load float addrspace(2)* %827, !tbaa !0
>  %829 = fmul float %828, %567
>  %830 = getelementptr float addrspace(2)* %721, i32 29
>  %831 = load float addrspace(2)* %830, !tbaa !0
>  %832 = fmul float %831, %574
>  %833 = fadd float %829, %832
>  %834 = getelementptr float addrspace(2)* %721, i32 30
>  %835 = load float addrspace(2)* %834, !tbaa !0
>  %836 = fmul float %835, %595
>  %837 = fadd float %833, %836
>  %838 = getelementptr float addrspace(2)* %721, i32 31
>  %839 = load float addrspace(2)* %838, !tbaa !0
>  %840 = fmul float %839, %581
>  %841 = fadd float %837, %840
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %796, float %811, float %826, float %841)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %129, float %154, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %709, float %710, float %711, float %12)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %567, float %574, float %588, float %422)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %560, float %553, float %537, float %588)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %717, float %719, float %714, float %581)
>  ret void
>
>ENDIF:                                            ; preds = %LOOP
>  %842 = fmul float %temp15.0, 5.000000e+00
>  %843 = fptosi float %842 to i32
>  %844 = bitcast i32 %843 to float
>  %845 = bitcast float %844 to i32
>  %846 = add i32 %845, 29
>  %847 = bitcast i32 %846 to float
>  %848 = bitcast float %847 to i32
>  %849 = shl i32 %848, 4
>  %850 = udiv i32 %849, 4
>  %851 = getelementptr float addrspace(2)* %10, i32 %850
>  %852 = load float addrspace(2)* %851, !tbaa !0
>  %853 = fadd float %600, %852
>  %854 = shl i32 %848, 4
>  %855 = add i32 %854, 4
>  %856 = udiv i32 %855, 4
>  %857 = getelementptr float addrspace(2)* %10, i32 %856
>  %858 = load float addrspace(2)* %857, !tbaa !0
>  %859 = fadd float %601, %858
>  %860 = shl i32 %848, 4
>  %861 = add i32 %860, 8
>  %862 = udiv i32 %861, 4
>  %863 = getelementptr float addrspace(2)* %10, i32 %862
>  %864 = load float addrspace(2)* %863, !tbaa !0
>  %865 = fadd float %602, %864
>  %866 = fmul float %853, %853
>  %867 = fmul float %859, %859
>  %868 = fadd float %867, %866
>  %869 = fmul float %865, %865
>  %870 = fadd float %868, %869
>  %871 = call float @llvm.AMDGPU.rsq(float %870)
>  %872 = fmul float %853, %871
>  %873 = fmul float %859, %871
>  %874 = fmul float %865, %871
>  %875 = fptosi float %842 to i32
>  %876 = bitcast i32 %875 to float
>  %877 = bitcast float %876 to i32
>  %878 = add i32 %877, 28
>  %879 = bitcast i32 %878 to float
>  %880 = bitcast float %879 to i32
>  %881 = fsub float -0.000000e+00, %871
>  %882 = shl i32 %880, 4
>  %883 = udiv i32 %882, 4
>  %884 = getelementptr float addrspace(2)* %10, i32 %883
>  %885 = load float addrspace(2)* %884, !tbaa !0
>  %886 = fsub float -0.000000e+00, %885
>  %887 = fmul float %853, %881
>  %888 = fadd float %887, %886
>  %889 = fsub float -0.000000e+00, %871
>  %890 = shl i32 %880, 4
>  %891 = add i32 %890, 4
>  %892 = udiv i32 %891, 4
>  %893 = getelementptr float addrspace(2)* %10, i32 %892
>  %894 = load float addrspace(2)* %893, !tbaa !0
>  %895 = fsub float -0.000000e+00, %894
>  %896 = fmul float %859, %889
>  %897 = fadd float %896, %895
>  %898 = fsub float -0.000000e+00, %871
>  %899 = shl i32 %880, 4
>  %900 = add i32 %899, 8
>  %901 = udiv i32 %900, 4
>  %902 = getelementptr float addrspace(2)* %10, i32 %901
>  %903 = load float addrspace(2)* %902, !tbaa !0
>  %904 = fsub float -0.000000e+00, %903
>  %905 = fmul float %865, %898
>  %906 = fadd float %905, %904
>  %907 = fptosi float %842 to i32
>  %908 = bitcast i32 %907 to float
>  %909 = bitcast float %908 to i32
>  %910 = add i32 %909, 28
>  %911 = bitcast i32 %910 to float
>  %912 = bitcast float %911 to i32
>  %913 = shl i32 %912, 4
>  %914 = udiv i32 %913, 4
>  %915 = getelementptr float addrspace(2)* %10, i32 %914
>  %916 = load float addrspace(2)* %915, !tbaa !0
>  %917 = shl i32 %912, 4
>  %918 = add i32 %917, 4
>  %919 = udiv i32 %918, 4
>  %920 = getelementptr float addrspace(2)* %10, i32 %919
>  %921 = load float addrspace(2)* %920, !tbaa !0
>  %922 = shl i32 %912, 4
>  %923 = add i32 %922, 8
>  %924 = udiv i32 %923, 4
>  %925 = getelementptr float addrspace(2)* %10, i32 %924
>  %926 = load float addrspace(2)* %925, !tbaa !0
>  %927 = fsub float -0.000000e+00, %872
>  %928 = fsub float -0.000000e+00, %873
>  %929 = fsub float -0.000000e+00, %874
>  %930 = fmul float %916, %927
>  %931 = fmul float %921, %928
>  %932 = fadd float %931, %930
>  %933 = fmul float %926, %929
>  %934 = fadd float %932, %933
>  %935 = fptosi float %842 to i32
>  %936 = bitcast i32 %935 to float
>  %937 = bitcast float %936 to i32
>  %938 = add i32 %937, 30
>  %939 = bitcast i32 %938 to float
>  %940 = bitcast float %939 to i32
>  %941 = shl i32 %940, 4
>  %942 = add i32 %941, 8
>  %943 = udiv i32 %942, 4
>  %944 = getelementptr float addrspace(2)* %10, i32 %943
>  %945 = load float addrspace(2)* %944, !tbaa !0
>  %946 = fsub float -0.000000e+00, %945
>  %947 = fadd float %934, %946
>  %948 = fptosi float %842 to i32
>  %949 = bitcast i32 %948 to float
>  %950 = bitcast float %949 to i32
>  %951 = add i32 %950, 30
>  %952 = bitcast i32 %951 to float
>  %953 = bitcast float %952 to i32
>  %954 = shl i32 %953, 4
>  %955 = add i32 %954, 12
>  %956 = udiv i32 %955, 4
>  %957 = getelementptr float addrspace(2)* %10, i32 %956
>  %958 = load float addrspace(2)* %957, !tbaa !0
>  %959 = fmul float %947, %958
>  %960 = fmul float %870, %871
>  %961 = fmul float %870, %14
>  %962 = fcmp uge float %959, 0x3F1A36E2E0000000
>  %963 = select i1 %962, float %959, float 0x3F1A36E2E0000000
>  %964 = fptosi float %842 to i32
>  %965 = bitcast i32 %964 to float
>  %966 = bitcast float %965 to i32
>  %967 = add i32 %966, 31
>  %968 = bitcast i32 %967 to float
>  %969 = bitcast float %968 to i32
>  %970 = shl i32 %969, 4
>  %971 = udiv i32 %970, 4
>  %972 = getelementptr float addrspace(2)* %10, i32 %971
>  %973 = load float addrspace(2)* %972, !tbaa !0
>  %974 = shl i32 %969, 4
>  %975 = add i32 %974, 4
>  %976 = udiv i32 %975, 4
>  %977 = getelementptr float addrspace(2)* %10, i32 %976
>  %978 = load float addrspace(2)* %977, !tbaa !0
>  %979 = shl i32 %969, 4
>  %980 = add i32 %979, 8
>  %981 = udiv i32 %980, 4
>  %982 = getelementptr float addrspace(2)* %10, i32 %981
>  %983 = load float addrspace(2)* %982, !tbaa !0
>  %984 = fmul float %973, %603
>  %985 = fmul float %978, %960
>  %986 = fadd float %985, %984
>  %987 = fmul float %983, %961
>  %988 = fadd float %986, %987
>  %989 = fptosi float %842 to i32
>  %990 = bitcast i32 %989 to float
>  %991 = bitcast float %990 to i32
>  %992 = add i32 %991, 30
>  %993 = bitcast i32 %992 to float
>  %994 = bitcast float %993 to i32
>  %995 = shl i32 %994, 4
>  %996 = udiv i32 %995, 4
>  %997 = getelementptr float addrspace(2)* %10, i32 %996
>  %998 = load float addrspace(2)* %997, !tbaa !0
>  %999 = call float @llvm.pow.f32(float %963, float %998)
>  %1000 = fdiv float 1.000000e+00, %988
>  %1001 = fptosi float %842 to i32
>  %1002 = bitcast i32 %1001 to float
>  %1003 = bitcast float %1002 to i32
>  %1004 = add i32 %1003, 27
>  %1005 = bitcast i32 %1004 to float
>  %1006 = bitcast float %1005 to i32
>  %1007 = shl i32 %1006, 4
>  %1008 = add i32 %1007, 12
>  %1009 = udiv i32 %1008, 4
>  %1010 = getelementptr float addrspace(2)* %10, i32 %1009
>  %1011 = load float addrspace(2)* %1010, !tbaa !0
>  %1012 = fmul float %1011, %888
>  %1013 = fadd float %1012, %872
>  %1014 = shl i32 %1006, 4
>  %1015 = add i32 %1014, 12
>  %1016 = udiv i32 %1015, 4
>  %1017 = getelementptr float addrspace(2)* %10, i32 %1016
>  %1018 = load float addrspace(2)* %1017, !tbaa !0
>  %1019 = fmul float %1018, %897
>  %1020 = fadd float %1019, %873
>  %1021 = shl i32 %1006, 4
>  %1022 = add i32 %1021, 12
>  %1023 = udiv i32 %1022, 4
>  %1024 = getelementptr float addrspace(2)* %10, i32 %1023
>  %1025 = load float addrspace(2)* %1024, !tbaa !0
>  %1026 = fmul float %1025, %906
>  %1027 = fadd float %1026, %874
>  %1028 = fcmp uge float %999, %14
>  %1029 = select i1 %1028, float %14, float %999
>  %1030 = fsub float -0.000000e+00, %1000
>  %1031 = fmul float %1000, %1029
>  %1032 = fadd float %1031, %1030
>  %1033 = fmul float %544, %1013
>  %1034 = fmul float %545, %1020
>  %1035 = fadd float %1034, %1033
>  %1036 = fmul float %546, %1027
>  %1037 = fadd float %1035, %1036
>  %1038 = fptosi float %842 to i32
>  %1039 = bitcast i32 %1038 to float
>  %1040 = bitcast float %1039 to i32
>  %1041 = add i32 %1040, 28
>  %1042 = bitcast i32 %1041 to float
>  %1043 = bitcast float %1042 to i32
>  %1044 = shl i32 %1043, 4
>  %1045 = add i32 %1044, 12
>  %1046 = udiv i32 %1045, 4
>  %1047 = getelementptr float addrspace(2)* %10, i32 %1046
>  %1048 = load float addrspace(2)* %1047, !tbaa !0
>  %1049 = fmul float %1048, %1032
>  %1050 = fadd float %1049, %1000
>  %1051 = fsub float -0.000000e+00, %1050
>  %1052 = fadd float %1051, %14
>  %1053 = fcmp uge float %1037, %12
>  %1054 = select i1 %1053, float %1037, float %12
>  %1055 = fptosi float %842 to i32
>  %1056 = bitcast i32 %1055 to float
>  %1057 = bitcast float %1056 to i32
>  %1058 = add i32 %1057, 27
>  %1059 = bitcast i32 %1058 to float
>  %1060 = bitcast float %1059 to i32
>  %1061 = shl i32 %1060, 4
>  %1062 = add i32 %1061, 12
>  %1063 = udiv i32 %1062, 4
>  %1064 = getelementptr float addrspace(2)* %10, i32 %1063
>  %1065 = load float addrspace(2)* %1064, !tbaa !0
>  %1066 = fmul float %1065, %1052
>  %1067 = fadd float %1066, %1050
>  %1068 = fptosi float %842 to i32
>  %1069 = bitcast i32 %1068 to float
>  %1070 = bitcast float %1069 to i32
>  %1071 = add i32 %1070, 27
>  %1072 = bitcast i32 %1071 to float
>  %1073 = bitcast float %1072 to i32
>  %1074 = shl i32 %1073, 4
>  %1075 = udiv i32 %1074, 4
>  %1076 = getelementptr float addrspace(2)* %10, i32 %1075
>  %1077 = load float addrspace(2)* %1076, !tbaa !0
>  %1078 = fmul float %1054, %1077
>  %1079 = shl i32 %1073, 4
>  %1080 = add i32 %1079, 4
>  %1081 = udiv i32 %1080, 4
>  %1082 = getelementptr float addrspace(2)* %10, i32 %1081
>  %1083 = load float addrspace(2)* %1082, !tbaa !0
>  %1084 = fmul float %1054, %1083
>  %1085 = shl i32 %1073, 4
>  %1086 = add i32 %1085, 8
>  %1087 = udiv i32 %1086, 4
>  %1088 = getelementptr float addrspace(2)* %10, i32 %1087
>  %1089 = load float addrspace(2)* %1088, !tbaa !0
>  %1090 = fmul float %1054, %1089
>  %1091 = fmul float %1078, %1067
>  %1092 = fadd float %1091, %temp12.0
>  %1093 = fmul float %1084, %1067
>  %1094 = fadd float %1093, %temp13.0
>  %1095 = fmul float %1090, %1067
>  %1096 = fadd float %1095, %temp14.0
>  %1097 = fadd float %temp15.0, %14
>  %1098 = bitcast float %temp52.0 to i32
>  %1099 = add i32 %1098, 1
>  %1100 = bitcast i32 %1099 to float
>  br label %LOOP
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readonly
>declare float @fabs(float) #2
>
>; Function Attrs: readnone
>declare float @llvm.AMDGPU.rsq(float) #3
>
>; Function Attrs: nounwind readonly
>declare float @llvm.pow.f32(float, float) #4
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readonly }
>attributes #3 = { readnone }
>attributes #4 = { nounwind readonly }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c084070c
>bf8c007f
>e00c2000
>80020200
>bf8c0770
>060c06ff
>c3000000
>d2060101
>02010106
>c0420100
>bf8c007f
>c0010500
>bf8c007f
>d0020008
>02000506
>d2000006
>0021e480
>d2060006
>22010106
>7e0c1106
>360c0cf2
>08020d01
>060202ff
>c2800000
>d2060106
>02010101
>d0020008
>02000501
>d2000001
>0021e480
>d2060001
>22010101
>7e021101
>360202f2
>080c0306
>060604ff
>c3000000
>d2060102
>02010103
>d0020008
>02000503
>d2000003
>0021e480
>d2060003
>22010103
>7e061103
>360806f2
>08040902
>060404ff
>c2800000
>d2060103
>02010102
>d0020008
>02000502
>d2000002
>0021e480
>d2060002
>22010102
>7e041102
>360404f2
>08060503
>7e0a02ff
>bc820821
>d2820007
>03ca0b03
>d2820005
>041e0b06
>100e0cff
>3c820821
>100606ff
>3c820821
>100c0703
>d2820006
>041a0f07
>d2820006
>041a0b05
>7e0c5b06
>100e0d07
>d2820001
>03c9eb01
>10020f01
>c0840718
>bf8c007f
>e00c2000
>80021300
>c006050c
>bf8c0070
>d2820001
>04041914
>10060d03
>d2820002
>03c9eb02
>10040702
>d2820002
>04081913
>c0840708
>bf8c007f
>e00c2000
>80021700
>bf8c0770
>100632ff
>443f4060
>7e061103
>4a0e0681
>340e0e84
>4a100eff
>000003a0
>2c141082
>7e160280
>d2c20008
>0201050a
>be880404
>be8a0380
>be8b03ff
>0000f000
>e0308000
>80020808
>c0880704
>bf8c0070
>e00c2000
>80041b00
>c0018501
>bf8c0070
>06123603
>101812ff
>38000000
>10121908
>101030ff
>443f4060
>7e101108
>4a1a1081
>341e1a84
>4a1a1eff
>000003a0
>2c141a82
>d2c2000d
>0201050a
>e0308000
>80020d0d
>06203803
>101c20ff
>38000000
>bf8c0770
>d2820011
>04261b0e
>7e1202ff
>38000000
>d2820009
>04321310
>081a1203
>10122eff
>443f4060
>7e121109
>4a201281
>34202084
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>d2c20017
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>d2820011
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>4a240eff
>000003a4
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>d2c20018
>0201050a
>e0308000
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>10241912
>4a301eff
>000003a4
>2c143082
>d2c20018
>0201050a
>e0308000
>80021818
>bf8c0770
>d2820012
>044a310e
>4a3020ff
>000003a4
>2c143082
>d2c20018
>0201050a
>e0308000
>80021818
>bf8c0770
>d2820012
>044a1b18
>d2820017
>045e2501
>100a0d05
>d2820004
>03c9eb04
>10080b04
>d2820006
>04101915
>4a080eff
>000003a8
>2c140882
>d2c20004
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>e0308000
>80020404
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>10081904
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>000003a8
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>d2c20013
>0201050a
>e0308000
>80020513
>bf8c0770
>d2820004
>04120b0e
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>000003a8
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>e0308000
>80020513
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>d2820013
>04121b05
>d2820016
>045e2706
>34080684
>4a0a08ff
>000003a0
>2c140a82
>d2c20014
>0201050a
>e0308000
>80020514
>bf8c0770
>10281905
>340a1084
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>000003a0
>2c142a82
>d2c20017
>0201050a
>e0308000
>80021517
>bf8c0770
>d2820015
>04522b0e
>34281284
>4a2e28ff
>000003a0
>2c142e82
>d2c20017
>0201050a
>e0308000
>80021717
>bf8c0770
>d2820019
>04561b17
>102a3302
>4a2e08ff
>000003a4
>2c142e82
>d2c20017
>0201050a
>e0308000
>80021717
>bf8c0770
>102e1917
>4a300aff
>000003a4
>2c143082
>d2c2001a
>0201050a
>e0308000
>8002181a
>bf8c0770
>d2820017
>045e310e
>4a3028ff
>000003a4
>2c143082
>d2c2001a
>0201050a
>e0308000
>8002181a
>bf8c0770
>d282001b
>045e1b18
>d2820015
>04563701
>4a2e08ff
>000003a8
>2c142e82
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>04562d16
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>342a0684
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>000003a0
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>80020317
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>d2c20020
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>e0308000
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>bf8c0770
>d2820003
>040e110e
>4a101282
>34301084
>4a1030ff
>000003a0
>2c141082
>d2c20008
>0201050a
>e0308000
>80020808
>bf8c0770
>d282001a
>040e1b08
>10043502
>4a062aff
>000003a4
>2c140682
>d2c20008
>0201050a
>e0308000
>80020308
>bf8c0770
>10061903
>4a102eff
>000003a4
>2c141082
>d2c20008
>0201050a
>e0308000
>80020808
>bf8c0770
>d2820003
>040e110e
>4a1030ff
>000003a4
>2c141082
>d2c20008
>0201050a
>e0308000
>80020808
>bf8c0770
>d282001c
>040e1b08
>d2820001
>040a3901
>4a042aff
>000003a8
>2c140482
>d2c20002
>0201050a
>e0308000
>80020202
>bf8c0770
>10041902
>4a062eff
>000003a8
>2c140682
>d2c20008
>0201050a
>e0308000
>80020308
>bf8c0770
>d2820002
>040a070e
>4a0630ff
>000003a8
>2c140682
>d2c20008
>0201050a
>e0308000
>80020308
>bf8c0770
>d2820022
>040a1b03
>d2820001
>04064506
>d2820002
>047e0301
>7e065b02
>100c0701
>10020d06
>10100716
>10041108
>1012071e
>10061309
>c0880700
>bf8c007f
>e00c2000
>80041e00
>c0880714
>bf8c0070
>e00c2000
>80042300
>bf8c0770
>d2820016
>047c1924
>104e3716
>d282001b
>04781923
>d2820027
>049e331b
>d2820019
>04801925
>d282001d
>049e3b19
>4a0808ff
>000003ac
>2c140882
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>80020423
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>4a0a0aff
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>d2820004
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>000003ac
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>e0308000
>80020523
>bf8c0770
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>04121b05
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>d2820011
>044a231b
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>80020712
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>4a1e1eff
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>2c141e82
>d2c20012
>0201050a
>e0308000
>80020f12
>bf8c0770
>d2820007
>041e1f0e
>4a1e20ff
>000003ac
>2c141e82
>d2c2000f
>0201050a
>e0308000
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>385c4081
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>02010531
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>02010531
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>bf8c0770
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>38666081
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>c001010f
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>04621a02
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>bf8c007f
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>bf8c007f
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>04661a02
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>bf8c007f
>d282001a
>046a1e02
>c0010106
>bf8c007f
>d282001a
>046a1602
>c0010107
>bf8c007f
>d282001a
>046a1a02
>c0010101
>bf8c007f
>10361c02
>c0010100
>bf8c007f
>d282001b
>046e1e02
>c0010102
>bf8c007f
>d282001b
>046e1602
>c0010103
>bf8c007f
>d282001b
>046e1a02
>f80000ef
>18191a1b
>c001011d
>bf8c000f
>10301c02
>c001011c
>bf8c007f
>d2820018
>04621e02
>c001011e
>bf8c007f
>d2820018
>04621602
>c001011f
>bf8c007f
>d2820018
>04621a02
>c0010119
>bf8c007f
>10321c02
>c0010118
>bf8c007f
>d2820019
>04661e02
>c001011a
>bf8c007f
>d2820019
>04661602
>c001011b
>bf8c007f
>d2820019
>04661a02
>c0010115
>bf8c007f
>10341c02
>c0010114
>bf8c007f
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>c0010116
>bf8c007f
>d282001a
>046a1602
>c0010117
>bf8c007f
>d282001a
>046a1a02
>c0010111
>bf8c007f
>10361c02
>c0010110
>bf8c007f
>d282001b
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>c0010112
>bf8c007f
>d282001b
>046e1602
>c0000113
>bf8c007f
>d282001b
>046e1a00
>f80000ff
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>d2000009
>0001e480
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>361212f2
>7e121109
>4a121295
>34121284
>bf8c070f
>2c2c1282
>7e2e0280
>d2c20018
>02010516
>e0308000
>80021818
>d0020000
>02022508
>d2000008
>0001e480
>d2060008
>22010108
>7e101108
>361010f2
>7e101108
>4a101097
>34101084
>2c101082
>7e120317
>d2c20019
>02010508
>e0308000
>80021919
>bf8c0770
>10323302
>d282001a
>04663103
>d0020000
>02022506
>d2000006
>0001e480
>d2060006
>22010106
>7e0c1106
>360c0cf2
>7e0c1106
>4a0c0c99
>340c0c84
>2c300c82
>7e320317
>d2c2001b
>02010518
>e0308000
>8002061b
>bf8c0770
>d2820006
>046a0d01
>060c0d15
>38342c82
>7e360317
>d2c2001a
>0201051a
>e0308000
>8002151a
>38341082
>7e360317
>d2c2001a
>0201051a
>e0308000
>80021a1a
>bf8c0770
>10343502
>d2820015
>046a2b03
>38343082
>7e360317
>d2c2001a
>0201051a
>e0308000
>80021a1a
>bf8c0770
>d2820015
>04563501
>06282b14
>382c2c81
>d2c2001a
>02010516
>e0308000
>8002151a
>382c1081
>d2c20008
>02010516
>e0308000
>80020808
>bf8c0770
>10041102
>d2820002
>040a2b03
>382c3081
>d2c20008
>02010516
>e0308000
>80020308
>bf8c0770
>d2820001
>040a0701
>06020313
>f800021f
>12140106
>f800022f
>040c0e0f
>f800023f
>0c0a0705
>bf8c070f
>d2820001
>043e1b11
>1004210b
>08041b02
>10001b00
>08001d00
>f80008cf
>0d020001
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL IN[2], GENERIC[21], PERSPECTIVE
>DCL IN[3], GENERIC[22], PERSPECTIVE
>DCL IN[4], GENERIC[23], PERSPECTIVE
>DCL IN[5], GENERIC[24], PERSPECTIVE
>DCL IN[6], GENERIC[25], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL CONST[0..30]
>DCL TEMP[0..12], LOCAL
>DCL TEMP[13], ARRAY(1), LOCAL
>IMM[0] FLT32 {    0.0300,     2.0000,    -1.0000,     0.5000}
>IMM[1] FLT32 {   -2.0000,     3.0000,    -0.0876,     0.9703}
>IMM[2] FLT32 {    0.4802,     0.5651,     0.1851,     0.1580}
>IMM[3] FLT32 {   -0.2616,    -0.0617,    -0.5477,    -0.6603}
>IMM[4] FLT32 {   -0.5325,     0.0711,    -0.0751,    -0.8954}
>IMM[5] FLT32 {    0.6384,     0.4054,     1.0000,     0.1111}
>IMM[6] FLT32 {    4.0000,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[5].wzzz
>  1: TEX TEMP[0].xy, TEMP[0], SAMP[1], 2D
>  2: MOV TEMP[1].xy, IN[6].wzzz
>  3: TEX TEMP[1].xy, TEMP[1], SAMP[1], 2D
>  4: MAD TEMP[0].xy, TEMP[0].xyyy, IMM[0].xxxx, IN[5].xyyy
>  5: MAD TEMP[1].xy, TEMP[1].xyyy, IMM[0].xxxx, IN[6].xyyy
>  6: MOV TEMP[2].xy, TEMP[0].xyyy
>  7: TEX TEMP[2].xyz, TEMP[2], SAMP[1], 2D
>  8: MOV TEMP[3].xy, TEMP[1].xyyy
>  9: TEX TEMP[3].xyz, TEMP[3], SAMP[1], 2D
> 10: RCP TEMP[4].x, IN[3].zzzz
> 11: ADD TEMP[5].x, -CONST[9].xxxx, CONST[9].yyyy
> 12: RCP TEMP[5].x, TEMP[5].xxxx
> 13: MAD TEMP[0].xyz, IMM[0].yyyy, TEMP[2].xyzz, IMM[0].zzzz
> 14: ADD TEMP[6].x, IN[0].zzzz, -CONST[9].xxxx
> 15: MAD TEMP[1].xyz, IMM[0].yyyy, TEMP[3].xyzz, IMM[0].zzzz
> 16: MUL TEMP[3].x, TEMP[5].xxxx, TEMP[6].xxxx
> 17: MOV_SAT TEMP[3].x, TEMP[3].xxxx
> 18: MAD TEMP[1].xyz, TEMP[1].xyzz, IMM[0].wwww, TEMP[0].xyzz
> 19: MAD TEMP[5].x, TEMP[3].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 20: MUL TEMP[0].xyz, TEMP[1].yyyy, IN[2].xyzz
> 21: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[3].xxxx
> 22: MAD TEMP[0].xyz, TEMP[1].xxxx, IN[1].xyzz, TEMP[0].xyzz
> 23: MUL TEMP[3].x, TEMP[5].xxxx, TEMP[3].xxxx
> 24: DP3 TEMP[5].x, -IN[4].xyzz, IN[0].xyzz
> 25: ADD TEMP[6].x, IMM[0].yyyy, -CONST[8].wwww
> 26: MAD TEMP[1].xyz, TEMP[1].zzzz, IN[0].xyzz, TEMP[0].xyzz
> 27: MUL TEMP[5].x, TEMP[5].xxxx, TEMP[6].xxxx
> 28: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 29: DP3 TEMP[0].x, TEMP[1].xyzz, CONST[0].xyzz
> 30: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[5].xxxx
> 31: DP3 TEMP[5].x, TEMP[1].xyzz, CONST[1].xyzz
> 32: MOV TEMP[0].y, TEMP[5].xxxx
> 33: MUL TEMP[5].x, TEMP[3].xxxx, TEMP[3].xxxx
> 34: MOV TEMP[1].w, TEMP[5].xxxx
> 35: MUL TEMP[1].xy, TEMP[4].xxxx, IN[3].xyyy
> 36: MUL TEMP[4].x, TEMP[5].xxxx, CONST[6].yyyy
> 37: MAD TEMP[4].xy, TEMP[0].xyyy, TEMP[4].xxxx, TEMP[1].xyyy
> 38: MUL TEMP[6].x, TEMP[5].xxxx, CONST[6].xxxx
> 39: MAD TEMP[7].xy, TEMP[6].xxxx, IMM[1].zwww, TEMP[4].xyyy
> 40: MAD TEMP[8].xy, TEMP[6].xxxx, IMM[2].xyyy, TEMP[4].xyyy
> 41: MAD TEMP[9].xy, TEMP[6].xxxx, IMM[2].zwww, TEMP[4].xyyy
> 42: MAD TEMP[10].xy, TEMP[6].xxxx, IMM[3].xyyy, TEMP[4].xyyy
> 43: MAD TEMP[11].xy, TEMP[6].xxxx, IMM[3].zwww, TEMP[4].xyyy
> 44: MAD TEMP[2].xy, TEMP[6].xxxx, IMM[4].xyyy, TEMP[4].xyyy
> 45: MAD TEMP[0].xy, TEMP[6].xxxx, IMM[4].zwww, TEMP[4].xyyy
> 46: MAD TEMP[1].xy, TEMP[6].xxxx, IMM[5].xyyy, TEMP[4].xyyy
> 47: MOV TEMP[4].xy, TEMP[4].xyyy
> 48: TEX TEMP[4].xyz, TEMP[4], SAMP[0], 2D
> 49: MOV TEMP[6].xy, TEMP[7].xyyy
> 50: TEX TEMP[6].xyz, TEMP[6], SAMP[0], 2D
> 51: MOV TEMP[7].xy, TEMP[8].xyyy
> 52: TEX TEMP[7].xyz, TEMP[7], SAMP[0], 2D
> 53: MOV TEMP[8].xy, TEMP[9].xyyy
> 54: TEX TEMP[8].xyz, TEMP[8], SAMP[0], 2D
> 55: MOV TEMP[9].xy, TEMP[10].xyyy
> 56: TEX TEMP[9].xyz, TEMP[9], SAMP[0], 2D
> 57: MOV TEMP[10].xy, TEMP[11].xyyy
> 58: TEX TEMP[10].xyz, TEMP[10], SAMP[0], 2D
> 59: MOV TEMP[2].xy, TEMP[2].xyyy
> 60: TEX TEMP[2].xyz, TEMP[2], SAMP[0], 2D
> 61: MOV TEMP[11].xy, TEMP[0].xyyy
> 62: TEX TEMP[11].xyz, TEMP[11], SAMP[0], 2D
> 63: MOV TEMP[12].xy, TEMP[1].xyyy
> 64: TEX TEMP[12].xyz, TEMP[12], SAMP[0], 2D
> 65: ADD TEMP[1].xyz, TEMP[4].xyzz, TEMP[6].xyzz
> 66: ADD TEMP[1].xyz, TEMP[7].xyzz, TEMP[1].xyzz
> 67: ADD TEMP[1].xyz, TEMP[8].xyzz, TEMP[1].xyzz
> 68: ADD TEMP[1].xyz, TEMP[9].xyzz, TEMP[1].xyzz
> 69: ADD TEMP[1].xyz, TEMP[10].xyzz, TEMP[1].xyzz
> 70: ADD TEMP[1].xyz, TEMP[2].xyzz, TEMP[1].xyzz
> 71: ADD TEMP[1].xyz, TEMP[11].xyzz, TEMP[1].xyzz
> 72: MAD TEMP[2].x, TEMP[3].xxxx, -TEMP[3].xxxx, IMM[5].zzzz
> 73: ADD TEMP[1].xyz, TEMP[12].xyzz, TEMP[1].xyzz
> 74: MUL TEMP[1].xyz, TEMP[1].xyzz, IMM[5].wwww
> 75: RCP TEMP[3].x, CONST[30].xxxx
> 76: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 77: MUL TEMP[3].x, TEMP[5].xxxx, TEMP[2].xxxx
> 78: ADD TEMP[0].xyz, IMM[5].zzzz, -CONST[7].xyzz
> 79: MUL TEMP[3].x, TEMP[3].xxxx, IMM[6].xxxx
> 80: MOV_SAT TEMP[3].x, TEMP[3].xxxx
> 81: MAD TEMP[0].xyz, TEMP[2].xxxx, TEMP[0].xyzz, CONST[7].xyzz
> 82: MUL TEMP[2].x, TEMP[3].xxxx, TEMP[3].xxxx
> 83: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[0].xyzz
> 84: MUL TEMP[2].x, TEMP[3].xxxx, TEMP[2].xxxx
> 85: MUL TEMP[0].xyz, TEMP[2].xxxx, CONST[8].xyzz
> 86: MAD TEMP[1].xyz, TEMP[1].xyzz, TEMP[0].xyzz, TEMP[1].xyzz
> 87: MUL TEMP[1].xyz, TEMP[1].xyzz, CONST[30].xxxx
> 88: MOV TEMP[13], TEMP[1]
> 89: MOV OUT[0], TEMP[13]
> 90: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 0
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 1
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 2
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 4
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 5
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 6
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 24
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 25
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 28
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 29
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 30
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr float addrspace(2)* %21, i32 32
>  %45 = load float addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr float addrspace(2)* %21, i32 33
>  %47 = load float addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr float addrspace(2)* %21, i32 34
>  %49 = load float addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr float addrspace(2)* %21, i32 35
>  %51 = load float addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr float addrspace(2)* %21, i32 36
>  %53 = load float addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr float addrspace(2)* %21, i32 37
>  %55 = load float addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr float addrspace(2)* %21, i32 120
>  %57 = load float addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %59 = load <32 x i8> addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %61 = load <16 x i8> addrspace(2)* %60, !tbaa !0
>  %62 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %63 = load <32 x i8> addrspace(2)* %62, !tbaa !0
>  %64 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %65 = load <16 x i8> addrspace(2)* %64, !tbaa !0
>  %66 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %67 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %68 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %69 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %70 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %71 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %3, <2 x i32> %5)
>  %72 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %73 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %74 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %3, <2 x i32> %5)
>  %75 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %3, <2 x i32> %5)
>  %76 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %3, <2 x i32> %5)
>  %77 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %3, <2 x i32> %5)
>  %78 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %3, <2 x i32> %5)
>  %79 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %3, <2 x i32> %5)
>  %80 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %3, <2 x i32> %5)
>  %81 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %3, <2 x i32> %5)
>  %82 = call float @llvm.SI.fs.interp(i32 1, i32 5, i32 %3, <2 x i32> %5)
>  %83 = call float @llvm.SI.fs.interp(i32 2, i32 5, i32 %3, <2 x i32> %5)
>  %84 = call float @llvm.SI.fs.interp(i32 3, i32 5, i32 %3, <2 x i32> %5)
>  %85 = call float @llvm.SI.fs.interp(i32 0, i32 6, i32 %3, <2 x i32> %5)
>  %86 = call float @llvm.SI.fs.interp(i32 1, i32 6, i32 %3, <2 x i32> %5)
>  %87 = call float @llvm.SI.fs.interp(i32 2, i32 6, i32 %3, <2 x i32> %5)
>  %88 = call float @llvm.SI.fs.interp(i32 3, i32 6, i32 %3, <2 x i32> %5)
>  %89 = bitcast float %84 to i32
>  %90 = bitcast float %83 to i32
>  %91 = insertelement <2 x i32> undef, i32 %89, i32 0
>  %92 = insertelement <2 x i32> %91, i32 %90, i32 1
>  %93 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %92, <32 x i8> %63, <16 x i8> %65, i32 2)
>  %94 = extractelement <4 x float> %93, i32 0
>  %95 = extractelement <4 x float> %93, i32 1
>  %96 = bitcast float %88 to i32
>  %97 = bitcast float %87 to i32
>  %98 = insertelement <2 x i32> undef, i32 %96, i32 0
>  %99 = insertelement <2 x i32> %98, i32 %97, i32 1
>  %100 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %99, <32 x i8> %63, <16 x i8> %65, i32 2)
>  %101 = extractelement <4 x float> %100, i32 0
>  %102 = extractelement <4 x float> %100, i32 1
>  %103 = fmul float %94, 0x3F9EB851E0000000
>  %104 = fadd float %103, %81
>  %105 = fmul float %95, 0x3F9EB851E0000000
>  %106 = fadd float %105, %82
>  %107 = fmul float %101, 0x3F9EB851E0000000
>  %108 = fadd float %107, %85
>  %109 = fmul float %102, 0x3F9EB851E0000000
>  %110 = fadd float %109, %86
>  %111 = bitcast float %104 to i32
>  %112 = bitcast float %106 to i32
>  %113 = insertelement <2 x i32> undef, i32 %111, i32 0
>  %114 = insertelement <2 x i32> %113, i32 %112, i32 1
>  %115 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %114, <32 x i8> %63, <16 x i8> %65, i32 2)
>  %116 = extractelement <4 x float> %115, i32 0
>  %117 = extractelement <4 x float> %115, i32 1
>  %118 = extractelement <4 x float> %115, i32 2
>  %119 = bitcast float %108 to i32
>  %120 = bitcast float %110 to i32
>  %121 = insertelement <2 x i32> undef, i32 %119, i32 0
>  %122 = insertelement <2 x i32> %121, i32 %120, i32 1
>  %123 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %122, <32 x i8> %63, <16 x i8> %65, i32 2)
>  %124 = extractelement <4 x float> %123, i32 0
>  %125 = extractelement <4 x float> %123, i32 1
>  %126 = extractelement <4 x float> %123, i32 2
>  %127 = fdiv float 1.000000e+00, %77
>  %128 = fsub float -0.000000e+00, %53
>  %129 = fadd float %128, %55
>  %130 = fdiv float 1.000000e+00, %129
>  %131 = fmul float 2.000000e+00, %116
>  %132 = fadd float %131, -1.000000e+00
>  %133 = fmul float 2.000000e+00, %117
>  %134 = fadd float %133, -1.000000e+00
>  %135 = fmul float 2.000000e+00, %118
>  %136 = fadd float %135, -1.000000e+00
>  %137 = fsub float -0.000000e+00, %53
>  %138 = fadd float %68, %137
>  %139 = fmul float 2.000000e+00, %124
>  %140 = fadd float %139, -1.000000e+00
>  %141 = fmul float 2.000000e+00, %125
>  %142 = fadd float %141, -1.000000e+00
>  %143 = fmul float 2.000000e+00, %126
>  %144 = fadd float %143, -1.000000e+00
>  %145 = fmul float %130, %138
>  %146 = call float @llvm.AMDIL.clamp.(float %145, float 0.000000e+00, float 1.000000e+00)
>  %147 = fmul float %140, 5.000000e-01
>  %148 = fadd float %147, %132
>  %149 = fmul float %142, 5.000000e-01
>  %150 = fadd float %149, %134
>  %151 = fmul float %144, 5.000000e-01
>  %152 = fadd float %151, %136
>  %153 = fmul float %146, -2.000000e+00
>  %154 = fadd float %153, 3.000000e+00
>  %155 = fmul float %150, %72
>  %156 = fmul float %150, %73
>  %157 = fmul float %150, %74
>  %158 = fmul float %146, %146
>  %159 = fmul float %148, %69
>  %160 = fadd float %159, %155
>  %161 = fmul float %148, %70
>  %162 = fadd float %161, %156
>  %163 = fmul float %148, %71
>  %164 = fadd float %163, %157
>  %165 = fmul float %154, %158
>  %166 = fsub float -0.000000e+00, %78
>  %167 = fsub float -0.000000e+00, %79
>  %168 = fsub float -0.000000e+00, %80
>  %169 = fmul float %166, %66
>  %170 = fmul float %167, %67
>  %171 = fadd float %170, %169
>  %172 = fmul float %168, %68
>  %173 = fadd float %171, %172
>  %174 = fsub float -0.000000e+00, %51
>  %175 = fadd float 2.000000e+00, %174
>  %176 = fmul float %152, %66
>  %177 = fadd float %176, %160
>  %178 = fmul float %152, %67
>  %179 = fadd float %178, %162
>  %180 = fmul float %152, %68
>  %181 = fadd float %180, %164
>  %182 = fmul float %173, %175
>  %183 = call float @llvm.AMDIL.clamp.(float %182, float 0.000000e+00, float 1.000000e+00)
>  %184 = fmul float %177, %23
>  %185 = fmul float %179, %25
>  %186 = fadd float %185, %184
>  %187 = fmul float %181, %27
>  %188 = fadd float %186, %187
>  %189 = fmul float %165, %183
>  %190 = fmul float %177, %29
>  %191 = fmul float %179, %31
>  %192 = fadd float %191, %190
>  %193 = fmul float %181, %33
>  %194 = fadd float %192, %193
>  %195 = fmul float %189, %189
>  %196 = fmul float %127, %75
>  %197 = fmul float %127, %76
>  %198 = fmul float %195, %37
>  %199 = fmul float %188, %198
>  %200 = fadd float %199, %196
>  %201 = fmul float %194, %198
>  %202 = fadd float %201, %197
>  %203 = fmul float %195, %35
>  %204 = fmul float %203, 0xBFB66CF420000000
>  %205 = fadd float %204, %200
>  %206 = fmul float %203, 0x3FEF0CB2A0000000
>  %207 = fadd float %206, %202
>  %208 = fmul float %203, 0x3FDEBB98C0000000
>  %209 = fadd float %208, %200
>  %210 = fmul float %203, 0x3FE2154CA0000000
>  %211 = fadd float %210, %202
>  %212 = fmul float %203, 0x3FC7B15B60000000
>  %213 = fadd float %212, %200
>  %214 = fmul float %203, 0x3FC4395820000000
>  %215 = fadd float %214, %202
>  %216 = fmul float %203, 0xBFD0BE0DE0000000
>  %217 = fadd float %216, %200
>  %218 = fmul float %203, 0xBFAF972480000000
>  %219 = fadd float %218, %202
>  %220 = fmul float %203, 0xBFE186C220000000
>  %221 = fadd float %220, %200
>  %222 = fmul float %203, 0xBFE5212D80000000
>  %223 = fadd float %222, %202
>  %224 = fmul float %203, 0xBFE10A3D80000000
>  %225 = fadd float %224, %200
>  %226 = fmul float %203, 0x3FB2339C00000000
>  %227 = fadd float %226, %202
>  %228 = fmul float %203, 0xBFB339C0E0000000
>  %229 = fadd float %228, %200
>  %230 = fmul float %203, 0xBFECA71DE0000000
>  %231 = fadd float %230, %202
>  %232 = fmul float %203, 0x3FE46DC5E0000000
>  %233 = fadd float %232, %200
>  %234 = fmul float %203, 0x3FD9F212E0000000
>  %235 = fadd float %234, %202
>  %236 = bitcast float %200 to i32
>  %237 = bitcast float %202 to i32
>  %238 = insertelement <2 x i32> undef, i32 %236, i32 0
>  %239 = insertelement <2 x i32> %238, i32 %237, i32 1
>  %240 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %239, <32 x i8> %59, <16 x i8> %61, i32 2)
>  %241 = extractelement <4 x float> %240, i32 0
>  %242 = extractelement <4 x float> %240, i32 1
>  %243 = extractelement <4 x float> %240, i32 2
>  %244 = bitcast float %205 to i32
>  %245 = bitcast float %207 to i32
>  %246 = insertelement <2 x i32> undef, i32 %244, i32 0
>  %247 = insertelement <2 x i32> %246, i32 %245, i32 1
>  %248 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %247, <32 x i8> %59, <16 x i8> %61, i32 2)
>  %249 = extractelement <4 x float> %248, i32 0
>  %250 = extractelement <4 x float> %248, i32 1
>  %251 = extractelement <4 x float> %248, i32 2
>  %252 = bitcast float %209 to i32
>  %253 = bitcast float %211 to i32
>  %254 = insertelement <2 x i32> undef, i32 %252, i32 0
>  %255 = insertelement <2 x i32> %254, i32 %253, i32 1
>  %256 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %255, <32 x i8> %59, <16 x i8> %61, i32 2)
>  %257 = extractelement <4 x float> %256, i32 0
>  %258 = extractelement <4 x float> %256, i32 1
>  %259 = extractelement <4 x float> %256, i32 2
>  %260 = bitcast float %213 to i32
>  %261 = bitcast float %215 to i32
>  %262 = insertelement <2 x i32> undef, i32 %260, i32 0
>  %263 = insertelement <2 x i32> %262, i32 %261, i32 1
>  %264 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %263, <32 x i8> %59, <16 x i8> %61, i32 2)
>  %265 = extractelement <4 x float> %264, i32 0
>  %266 = extractelement <4 x float> %264, i32 1
>  %267 = extractelement <4 x float> %264, i32 2
>  %268 = bitcast float %217 to i32
>  %269 = bitcast float %219 to i32
>  %270 = insertelement <2 x i32> undef, i32 %268, i32 0
>  %271 = insertelement <2 x i32> %270, i32 %269, i32 1
>  %272 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %271, <32 x i8> %59, <16 x i8> %61, i32 2)
>  %273 = extractelement <4 x float> %272, i32 0
>  %274 = extractelement <4 x float> %272, i32 1
>  %275 = extractelement <4 x float> %272, i32 2
>  %276 = bitcast float %221 to i32
>  %277 = bitcast float %223 to i32
>  %278 = insertelement <2 x i32> undef, i32 %276, i32 0
>  %279 = insertelement <2 x i32> %278, i32 %277, i32 1
>  %280 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %279, <32 x i8> %59, <16 x i8> %61, i32 2)
>  %281 = extractelement <4 x float> %280, i32 0
>  %282 = extractelement <4 x float> %280, i32 1
>  %283 = extractelement <4 x float> %280, i32 2
>  %284 = bitcast float %225 to i32
>  %285 = bitcast float %227 to i32
>  %286 = insertelement <2 x i32> undef, i32 %284, i32 0
>  %287 = insertelement <2 x i32> %286, i32 %285, i32 1
>  %288 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %287, <32 x i8> %59, <16 x i8> %61, i32 2)
>  %289 = extractelement <4 x float> %288, i32 0
>  %290 = extractelement <4 x float> %288, i32 1
>  %291 = extractelement <4 x float> %288, i32 2
>  %292 = bitcast float %229 to i32
>  %293 = bitcast float %231 to i32
>  %294 = insertelement <2 x i32> undef, i32 %292, i32 0
>  %295 = insertelement <2 x i32> %294, i32 %293, i32 1
>  %296 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %295, <32 x i8> %59, <16 x i8> %61, i32 2)
>  %297 = extractelement <4 x float> %296, i32 0
>  %298 = extractelement <4 x float> %296, i32 1
>  %299 = extractelement <4 x float> %296, i32 2
>  %300 = bitcast float %233 to i32
>  %301 = bitcast float %235 to i32
>  %302 = insertelement <2 x i32> undef, i32 %300, i32 0
>  %303 = insertelement <2 x i32> %302, i32 %301, i32 1
>  %304 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %303, <32 x i8> %59, <16 x i8> %61, i32 2)
>  %305 = extractelement <4 x float> %304, i32 0
>  %306 = extractelement <4 x float> %304, i32 1
>  %307 = extractelement <4 x float> %304, i32 2
>  %308 = fadd float %241, %249
>  %309 = fadd float %242, %250
>  %310 = fadd float %243, %251
>  %311 = fadd float %257, %308
>  %312 = fadd float %258, %309
>  %313 = fadd float %259, %310
>  %314 = fadd float %265, %311
>  %315 = fadd float %266, %312
>  %316 = fadd float %267, %313
>  %317 = fadd float %273, %314
>  %318 = fadd float %274, %315
>  %319 = fadd float %275, %316
>  %320 = fadd float %281, %317
>  %321 = fadd float %282, %318
>  %322 = fadd float %283, %319
>  %323 = fadd float %289, %320
>  %324 = fadd float %290, %321
>  %325 = fadd float %291, %322
>  %326 = fadd float %297, %323
>  %327 = fadd float %298, %324
>  %328 = fadd float %299, %325
>  %329 = fsub float -0.000000e+00, %189
>  %330 = fmul float %189, %329
>  %331 = fadd float %330, 1.000000e+00
>  %332 = fadd float %305, %326
>  %333 = fadd float %306, %327
>  %334 = fadd float %307, %328
>  %335 = fmul float %332, 0x3FBC71C720000000
>  %336 = fmul float %333, 0x3FBC71C720000000
>  %337 = fmul float %334, 0x3FBC71C720000000
>  %338 = fdiv float 1.000000e+00, %57
>  %339 = fmul float %335, %338
>  %340 = fmul float %336, %338
>  %341 = fmul float %337, %338
>  %342 = fmul float %195, %331
>  %343 = fsub float -0.000000e+00, %39
>  %344 = fadd float 1.000000e+00, %343
>  %345 = fsub float -0.000000e+00, %41
>  %346 = fadd float 1.000000e+00, %345
>  %347 = fsub float -0.000000e+00, %43
>  %348 = fadd float 1.000000e+00, %347
>  %349 = fmul float %342, 4.000000e+00
>  %350 = call float @llvm.AMDIL.clamp.(float %349, float 0.000000e+00, float 1.000000e+00)
>  %351 = fmul float %331, %344
>  %352 = fadd float %351, %39
>  %353 = fmul float %331, %346
>  %354 = fadd float %353, %41
>  %355 = fmul float %331, %348
>  %356 = fadd float %355, %43
>  %357 = fmul float %350, %350
>  %358 = fmul float %339, %352
>  %359 = fmul float %340, %354
>  %360 = fmul float %341, %356
>  %361 = fmul float %350, %357
>  %362 = fmul float %361, %45
>  %363 = fmul float %361, %47
>  %364 = fmul float %361, %49
>  %365 = fmul float %358, %362
>  %366 = fadd float %365, %358
>  %367 = fmul float %359, %363
>  %368 = fadd float %367, %359
>  %369 = fmul float %360, %364
>  %370 = fadd float %369, %360
>  %371 = fmul float %366, %57
>  %372 = fmul float %368, %57
>  %373 = fmul float %370, %57
>  %374 = call i32 @llvm.SI.packf16(float %371, float %372)
>  %375 = bitcast i32 %374 to float
>  %376 = call i32 @llvm.SI.packf16(float %373, float %195)
>  %377 = bitcast i32 %376 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %375, float %377, float %375, float %377)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c1600
>c80d1601
>c8081700
>c8091701
>c0840304
>c0c60508
>bf8c007f
>f0800300
>00430302
>c8141500
>c8151501
>7e0402ff
>3cf5c28f
>bf8c0770
>d2820006
>04160504
>c81c1400
>c81d1401
>d2820005
>041e0503
>f0800700
>00430305
>bf8c0770
>060c0703
>060c0cf3
>c8201a00
>c8211a01
>c81c1b00
>c81d1b01
>f0800300
>00430707
>c8241900
>c8251901
>bf8c0770
>d282000a
>04260508
>c82c1800
>c82d1801
>d2820009
>042e0507
>f0800700
>00430809
>bf8c0770
>06041108
>060404f3
>d2820002
>0419e102
>060c0904
>060c0cf3
>060e1309
>060e0ef3
>d2820007
>0419e107
>c8180900
>c8190901
>100c0d07
>c82c0500
>c82d0501
>d282000b
>041a1702
>06060b05
>060606f3
>0608150a
>060808f3
>d2820005
>040de104
>c8180100
>c8190101
>d2820003
>042e0d05
>c8100800
>c8110801
>10080907
>c8200400
>c8210401
>d2820004
>04121102
>c8200000
>c8210001
>d2820004
>04121105
>c0400100
>bf8c007f
>c0038104
>bf8c007f
>10120807
>c0038105
>bf8c007f
>d2820009
>04240f03
>c8280a00
>c8290a01
>100e1507
>c8280600
>c8290601
>d2820007
>041e1502
>c8080200
>c8090201
>d2820005
>041e0505
>c0038106
>bf8c007f
>d2820007
>04240f05
>c8241000
>c8251001
>10101109
>c8241100
>c8251101
>d2060009
>22010109
>100c0d09
>080c1106
>c8201200
>c8211201
>10100508
>080c1106
>c0038123
>bf8c007f
>d2080008
>02000ef4
>100c1106
>d2060806
>02010106
>c0038124
>bf8c007f
>0a040407
>c0040125
>7e100207
>bf8c007f
>d2080008
>02021008
>7e105508
>10040508
>d2060802
>02010102
>7e1002ff
>40400000
>d2820008
>0421eb02
>10040502
>10040508
>10040d02
>10040502
>c0038119
>bf8c007f
>100c0407
>c8240d00
>c8250d01
>c8200e00
>c8210e01
>7e105508
>10121308
>d2820013
>04260d07
>c0038100
>bf8c007f
>10080807
>c0038101
>bf8c007f
>d2820003
>04100f03
>c0038102
>bf8c007f
>d2820003
>040c0f05
>c8100c00
>c8110c01
>10000908
>d2820012
>04020d03
>c0840300
>c0c60500
>bf8c007f
>f0800700
>00430312
>c0010118
>bf8c0070
>10000402
>7e0202ff
>3f786595
>d2820007
>044e0300
>7e0202ff
>bdb367a1
>d2820006
>044a0300
>f0800700
>00430606
>bf8c0770
>06020f04
>7e1202ff
>3f10aa65
>d282000a
>044e1300
>7e1602ff
>3ef5dcc6
>d2820009
>044a1700
>f0800700
>00430909
>bf8c0770
>0602030a
>7e1802ff
>3e21cac1
>d282000d
>044e1900
>7e1c02ff
>3e3d8adb
>d282000c
>044a1d00
>f0800700
>00430c0c
>bf8c0770
>0602030d
>7e1e02ff
>bd7cb924
>d2820010
>044e1f00
>7e2202ff
>be85f06f
>d282000f
>044a2300
>f0800700
>00430f0f
>bf8c0770
>06020310
>7e2802ff
>bf29096c
>d2820015
>044e2900
>7e2c02ff
>bf0c3611
>d2820014
>044a2d00
>f0800700
>00431414
>bf8c0770
>06020315
>7e2e02ff
>3d919ce0
>d2820018
>044e2f00
>7e3202ff
>bf0851ec
>d2820017
>044a3300
>f0800700
>00431717
>bf8c0770
>06020318
>7e3402ff
>bf6538ef
>d282001b
>044e3500
>7e3802ff
>bd99ce07
>d282001a
>044a3900
>f0800700
>00431a1a
>bf8c0770
>0602031b
>7e3a02ff
>3ecf9097
>d282001e
>044e3b00
>7e3e02ff
>3f236e2f
>d282001d
>044a3f00
>f0800700
>00431d1d
>bf8c0770
>0600031e
>100000ff
>3de38e39
>c0010178
>bf8c007f
>7e025402
>10240300
>080004f2
>c001811d
>bf8c007f
>d2080013
>020006f2
>d2820013
>000e2700
>10262712
>10240102
>102424f6
>d2060812
>02010112
>10402512
>10244112
>c0018121
>bf8c007f
>10402403
>d2820013
>044e4113
>10262602
>06400d03
>06404109
>0640410c
>0640410f
>06404114
>06404117
>0640411a
>0640411d
>104040ff
>3de38e39
>10400320
>c001811c
>bf8c007f
>d2080021
>020006f2
>d2820021
>000e4300
>10404320
>c0018120
>bf8c007f
>10422403
>d2820020
>04824320
>10404002
>5e262720
>06061105
>0606070b
>0606070e
>06060711
>06060716
>06060719
>0606071c
>0606071f
>100606ff
>3de38e39
>10020303
>c001811e
>bf8c007f
>d2080003
>020006f2
>d2820000
>000e0700
>10000101
>c0000122
>bf8c007f
>10022400
>d2820000
>04020300
>10000002
>5e000500
>f8001c0f
>00130013
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL OUT[3], GENERIC[20]
>DCL OUT[4], GENERIC[21]
>DCL OUT[5], GENERIC[22]
>DCL OUT[6], GENERIC[23]
>DCL OUT[7], GENERIC[24]
>DCL OUT[8], GENERIC[25]
>DCL CONST[0..54]
>DCL TEMP[0..14], LOCAL
>IMM[0] FLT32 { -128.0000,     1.0000,   -64.0000,    -2.0000}
>IMM[1] FLT32 {   -0.0159,     0.0159,     0.1000,     0.0400}
>IMM[2] FLT32 {   16.0000,     3.0000,     8.0000,     0.0000}
>  0: ADD TEMP[0].xy, IN[1].xyyy, IMM[0].xxxx
>  1: SLT TEMP[1].xy, TEMP[0].xyyy, CONST[0].xxxx
>  2: F2I TEMP[1].xy, -TEMP[1]
>  3: AND TEMP[1].xy, TEMP[1].xyyy, IMM[0].yyyy
>  4: ABS TEMP[2].xy, TEMP[0].xyyy
>  5: ADD TEMP[2].xy, TEMP[2].xyyy, -TEMP[1].xyyy
>  6: ADD TEMP[2].xy, TEMP[2].xyyy, IMM[0].zzzz
>  7: ABS TEMP[3].xy, TEMP[2].xyyy
>  8: SLT TEMP[4].xy, TEMP[2].xyyy, CONST[0].xxxx
>  9: F2I TEMP[4].xy, -TEMP[4]
> 10: AND TEMP[2].xy, TEMP[4].xyyy, IMM[0].yyyy
> 11: ADD TEMP[0].xy, TEMP[3].xyyy, -TEMP[2].xyyy
> 12: MAD TEMP[3].x, TEMP[1].xxxx, IMM[0].wwww, IMM[0].yyyy
> 13: MAD TEMP[4].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[0].yyyy
> 14: MAD TEMP[4].x, TEMP[0].yyyy, IMM[1].xxxx, TEMP[4].xxxx
> 15: MOV TEMP[0].z, TEMP[4].xxxx
> 16: MUL TEMP[0].xy, TEMP[0].xyyy, IMM[1].yyyy
> 17: MAD TEMP[1].xy, TEMP[2].xyyy, IMM[0].wwww, IMM[0].yyyy
> 18: DP3 TEMP[4].x, TEMP[0].xyzz, TEMP[0].xyzz
> 19: RSQ TEMP[4].x, TEMP[4].xxxx
> 20: MUL TEMP[4].xyz, TEMP[0].xyzz, TEMP[4].xxxx
> 21: MUL TEMP[2].xy, TEMP[1].xyyy, TEMP[4].xyyy
> 22: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[4].zzzz
> 23: MOV TEMP[2].z, TEMP[3].xxxx
> 24: DP3 TEMP[0].x, TEMP[2].xyzz, CONST[51].xyzz
> 25: DP3 TEMP[3].x, TEMP[2].xyzz, CONST[52].xyzz
> 26: MOV TEMP[0].y, TEMP[3].xxxx
> 27: DP3 TEMP[3].x, TEMP[2].xyzz, CONST[53].xyzz
> 28: MOV TEMP[0].z, TEMP[3].xxxx
> 29: DP3 TEMP[2].x, TEMP[0].xyzz, TEMP[0].xyzz
> 30: RSQ TEMP[3].x, TEMP[2].xxxx
> 31: DP3 TEMP[2].x, IN[3].xyzz, CONST[51].xyzz
> 32: DP3 TEMP[4].x, IN[3].xyzz, CONST[52].xyzz
> 33: MOV TEMP[2].y, TEMP[4].xxxx
> 34: DP3 TEMP[4].x, IN[3].xyzz, CONST[53].xyzz
> 35: MOV TEMP[2].z, TEMP[4].xxxx
> 36: MUL TEMP[3].xyz, TEMP[0].xyzz, TEMP[3].xxxx
> 37: MUL TEMP[1].xyz, TEMP[0].zxyy, TEMP[2].yzxx
> 38: MAD TEMP[0].xyz, TEMP[0].yzxx, TEMP[2].zxyy, -TEMP[1].xyzz
> 39: MUL TEMP[1].xyz, TEMP[0].xyzz, IN[3].wwww
> 40: DP3 TEMP[4].x, TEMP[2].xyzz, TEMP[2].xyzz
> 41: RSQ TEMP[4].x, TEMP[4].xxxx
> 42: MUL TEMP[4].xyz, TEMP[2].xyzz, TEMP[4].xxxx
> 43: MOV TEMP[5].xyz, TEMP[4].xyzx
> 44: MOV TEMP[2].w, CONST[0].yyyy
> 45: DP4 TEMP[2].x, IN[0], CONST[51]
> 46: DP4 TEMP[6].x, IN[0], CONST[52]
> 47: MOV TEMP[2].y, TEMP[6].xxxx
> 48: DP4 TEMP[6].x, IN[0], CONST[53]
> 49: MOV TEMP[2].z, TEMP[6].xxxx
> 50: DP4 TEMP[6].x, TEMP[2], CONST[9]
> 51: MOV TEMP[0].y, TEMP[6].xxxx
> 52: DP3 TEMP[7].x, TEMP[1].xyzz, TEMP[1].xyzz
> 53: RSQ TEMP[7].x, TEMP[7].xxxx
> 54: MUL TEMP[4].xyz, TEMP[1].xyzz, TEMP[7].xxxx
> 55: MOV TEMP[7].xyz, TEMP[4].xyzx
> 56: MOV TEMP[1].y, -TEMP[6].xxxx
> 57: DP4 TEMP[1].x, TEMP[2], CONST[8]
> 58: DP4 TEMP[8].x, TEMP[2], CONST[11]
> 59: MOV TEMP[0].w, TEMP[8].xxxx
> 60: DP4 TEMP[9].x, TEMP[2], CONST[10]
> 61: MOV TEMP[0].z, TEMP[9].xxxx
> 62: ADD TEMP[2].xyz, TEMP[2].xyzz, -CONST[2].xyzz
> 63: ADD TEMP[10].xy, TEMP[1].xyyy, TEMP[8].xxxx
> 64: MOV TEMP[11].x, TEMP[1].xxxx
> 65: MUL TEMP[12].xy, TEMP[10].xyyy, CONST[0].wwww
> 66: DP3 TEMP[13].x, TEMP[2].xyzz, TEMP[2].xyzz
> 67: RSQ TEMP[13].x, TEMP[13].xxxx
> 68: MUL TEMP[4].xyz, TEMP[2].xyzz, TEMP[13].xxxx
> 69: MOV TEMP[4].xyz, TEMP[4].xyzx
> 70: MUL TEMP[1].x, CONST[48].xxxx, IMM[1].zwww
> 71: MUL TEMP[2].xy, IN[2].xyyy, CONST[50].xyyy
> 72: ADD TEMP[13].x, TEMP[2].yyyy, TEMP[2].xxxx
> 73: MOV TEMP[2].y, TEMP[13].xxxx
> 74: MUL TEMP[10].xy, IN[2].xyyy, CONST[49].xyyy
> 75: MAD TEMP[14].x, TEMP[13].xxxx, IMM[2].xxxx, -TEMP[1].xxxx
> 76: MOV TEMP[14].z, TEMP[14].xxxx
> 77: ADD TEMP[2].x, TEMP[10].yyyy, TEMP[10].xxxx
> 78: MAD TEMP[1].x, TEMP[13].xxxx, IMM[2].yyyy, -TEMP[1].xxxx
> 79: MOV TEMP[2].z, TEMP[1].xxxx
> 80: MOV TEMP[11].yzw, TEMP[0].zyzw
> 81: MOV TEMP[12].z, TEMP[8].xxxx
> 82: MUL TEMP[0].x, TEMP[2].xxxx, IMM[2].yyyy
> 83: MOV TEMP[2].w, TEMP[0].xxxx
> 84: MUL TEMP[0].xyz, TEMP[2].xyxx, IMM[2].zzxx
> 85: MOV TEMP[14].xyw, TEMP[0].xyxz
> 86: MOV TEMP[0], TEMP[11]
> 87: MAD TEMP[1].x, TEMP[9].xxxx, CONST[0].zzzz, -TEMP[8].xxxx
> 88: MOV TEMP[11].z, TEMP[1].xxxx
> 89: MOV TEMP[11].y, -TEMP[6].xxxx
> 90: MAD TEMP[11].xy, CONST[54].xyyy, TEMP[8].xxxx, TEMP[11].xyyy
> 91: MOV OUT[2], TEMP[3]
> 92: MOV OUT[3], TEMP[5]
> 93: MOV OUT[4], TEMP[7]
> 94: MOV OUT[5], TEMP[12]
> 95: MOV OUT[0], TEMP[11]
> 96: MOV OUT[6], TEMP[4]
> 97: MOV OUT[1], TEMP[0]
> 98: MOV OUT[7], TEMP[2]
> 99: MOV OUT[8], TEMP[14]
>100: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 3
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 8
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 9
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 10
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 32
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 33
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 34
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 35
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 36
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 37
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 38
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 39
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 40
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 41
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 42
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 43
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 44
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 45
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 46
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 47
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 192
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 196
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 197
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 200
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 201
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 204
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 205
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 206
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 207
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 208
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 209
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 210
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 211
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 212
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 213
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 214
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 215
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 216
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 217
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %96 = load <16 x i8> addrspace(2)* %95, !tbaa !0
>  %97 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %96, i32 0, i32 %5)
>  %98 = extractelement <4 x float> %97, i32 0
>  %99 = extractelement <4 x float> %97, i32 1
>  %100 = extractelement <4 x float> %97, i32 2
>  %101 = extractelement <4 x float> %97, i32 3
>  %102 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %103 = load <16 x i8> addrspace(2)* %102, !tbaa !0
>  %104 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %103, i32 0, i32 %5)
>  %105 = extractelement <4 x float> %104, i32 0
>  %106 = extractelement <4 x float> %104, i32 1
>  %107 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %108 = load <16 x i8> addrspace(2)* %107, !tbaa !0
>  %109 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %108, i32 0, i32 %5)
>  %110 = extractelement <4 x float> %109, i32 0
>  %111 = extractelement <4 x float> %109, i32 1
>  %112 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %113 = load <16 x i8> addrspace(2)* %112, !tbaa !0
>  %114 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %113, i32 0, i32 %5)
>  %115 = extractelement <4 x float> %114, i32 0
>  %116 = extractelement <4 x float> %114, i32 1
>  %117 = extractelement <4 x float> %114, i32 2
>  %118 = extractelement <4 x float> %114, i32 3
>  %119 = fadd float %105, -1.280000e+02
>  %120 = fadd float %106, -1.280000e+02
>  %121 = fcmp ult float %119, %12
>  %122 = select i1 %121, float 1.000000e+00, float 0.000000e+00
>  %123 = fcmp ult float %120, %12
>  %124 = select i1 %123, float 1.000000e+00, float 0.000000e+00
>  %125 = fsub float -0.000000e+00, %122
>  %126 = fptosi float %125 to i32
>  %127 = fsub float -0.000000e+00, %124
>  %128 = fptosi float %127 to i32
>  %129 = bitcast i32 %126 to float
>  %130 = bitcast i32 %128 to float
>  %131 = bitcast float %129 to i32
>  %132 = and i32 %131, 1065353216
>  %133 = bitcast float %130 to i32
>  %134 = and i32 %133, 1065353216
>  %135 = bitcast i32 %132 to float
>  %136 = bitcast i32 %134 to float
>  %137 = call float @fabs(float %119)
>  %138 = call float @fabs(float %120)
>  %139 = fsub float -0.000000e+00, %135
>  %140 = fadd float %137, %139
>  %141 = fsub float -0.000000e+00, %136
>  %142 = fadd float %138, %141
>  %143 = fadd float %140, -6.400000e+01
>  %144 = fadd float %142, -6.400000e+01
>  %145 = call float @fabs(float %143)
>  %146 = call float @fabs(float %144)
>  %147 = fcmp ult float %143, %12
>  %148 = select i1 %147, float 1.000000e+00, float 0.000000e+00
>  %149 = fcmp ult float %144, %12
>  %150 = select i1 %149, float 1.000000e+00, float 0.000000e+00
>  %151 = fsub float -0.000000e+00, %148
>  %152 = fptosi float %151 to i32
>  %153 = fsub float -0.000000e+00, %150
>  %154 = fptosi float %153 to i32
>  %155 = bitcast i32 %152 to float
>  %156 = bitcast i32 %154 to float
>  %157 = bitcast float %155 to i32
>  %158 = and i32 %157, 1065353216
>  %159 = bitcast float %156 to i32
>  %160 = and i32 %159, 1065353216
>  %161 = bitcast i32 %158 to float
>  %162 = bitcast i32 %160 to float
>  %163 = fsub float -0.000000e+00, %161
>  %164 = fadd float %145, %163
>  %165 = fsub float -0.000000e+00, %162
>  %166 = fadd float %146, %165
>  %167 = fmul float %135, -2.000000e+00
>  %168 = fadd float %167, 1.000000e+00
>  %169 = fmul float %164, 0xBF90410420000000
>  %170 = fadd float %169, 1.000000e+00
>  %171 = fmul float %166, 0xBF90410420000000
>  %172 = fadd float %171, %170
>  %173 = fmul float %164, 0x3F90410420000000
>  %174 = fmul float %166, 0x3F90410420000000
>  %175 = fmul float %161, -2.000000e+00
>  %176 = fadd float %175, 1.000000e+00
>  %177 = fmul float %162, -2.000000e+00
>  %178 = fadd float %177, 1.000000e+00
>  %179 = fmul float %173, %173
>  %180 = fmul float %174, %174
>  %181 = fadd float %180, %179
>  %182 = fmul float %172, %172
>  %183 = fadd float %181, %182
>  %184 = call float @llvm.AMDGPU.rsq(float %183)
>  %185 = fmul float %173, %184
>  %186 = fmul float %174, %184
>  %187 = fmul float %172, %184
>  %188 = fmul float %176, %185
>  %189 = fmul float %178, %186
>  %190 = fmul float %168, %187
>  %191 = fmul float %188, %68
>  %192 = fmul float %189, %70
>  %193 = fadd float %192, %191
>  %194 = fmul float %190, %72
>  %195 = fadd float %193, %194
>  %196 = fmul float %188, %76
>  %197 = fmul float %189, %78
>  %198 = fadd float %197, %196
>  %199 = fmul float %190, %80
>  %200 = fadd float %198, %199
>  %201 = fmul float %188, %84
>  %202 = fmul float %189, %86
>  %203 = fadd float %202, %201
>  %204 = fmul float %190, %88
>  %205 = fadd float %203, %204
>  %206 = fmul float %195, %195
>  %207 = fmul float %200, %200
>  %208 = fadd float %207, %206
>  %209 = fmul float %205, %205
>  %210 = fadd float %208, %209
>  %211 = call float @llvm.AMDGPU.rsq(float %210)
>  %212 = fmul float %115, %68
>  %213 = fmul float %116, %70
>  %214 = fadd float %213, %212
>  %215 = fmul float %117, %72
>  %216 = fadd float %214, %215
>  %217 = fmul float %115, %76
>  %218 = fmul float %116, %78
>  %219 = fadd float %218, %217
>  %220 = fmul float %117, %80
>  %221 = fadd float %219, %220
>  %222 = fmul float %115, %84
>  %223 = fmul float %116, %86
>  %224 = fadd float %223, %222
>  %225 = fmul float %117, %88
>  %226 = fadd float %224, %225
>  %227 = fmul float %195, %211
>  %228 = fmul float %200, %211
>  %229 = fmul float %205, %211
>  %230 = fmul float %205, %221
>  %231 = fmul float %195, %226
>  %232 = fmul float %200, %216
>  %233 = fsub float -0.000000e+00, %230
>  %234 = fmul float %200, %226
>  %235 = fadd float %234, %233
>  %236 = fsub float -0.000000e+00, %231
>  %237 = fmul float %205, %216
>  %238 = fadd float %237, %236
>  %239 = fsub float -0.000000e+00, %232
>  %240 = fmul float %195, %221
>  %241 = fadd float %240, %239
>  %242 = fmul float %235, %118
>  %243 = fmul float %238, %118
>  %244 = fmul float %241, %118
>  %245 = fmul float %216, %216
>  %246 = fmul float %221, %221
>  %247 = fadd float %246, %245
>  %248 = fmul float %226, %226
>  %249 = fadd float %247, %248
>  %250 = call float @llvm.AMDGPU.rsq(float %249)
>  %251 = fmul float %216, %250
>  %252 = fmul float %221, %250
>  %253 = fmul float %226, %250
>  %254 = fmul float %98, %68
>  %255 = fmul float %99, %70
>  %256 = fadd float %254, %255
>  %257 = fmul float %100, %72
>  %258 = fadd float %256, %257
>  %259 = fmul float %101, %74
>  %260 = fadd float %258, %259
>  %261 = fmul float %98, %76
>  %262 = fmul float %99, %78
>  %263 = fadd float %261, %262
>  %264 = fmul float %100, %80
>  %265 = fadd float %263, %264
>  %266 = fmul float %101, %82
>  %267 = fadd float %265, %266
>  %268 = fmul float %98, %84
>  %269 = fmul float %99, %86
>  %270 = fadd float %268, %269
>  %271 = fmul float %100, %88
>  %272 = fadd float %270, %271
>  %273 = fmul float %101, %90
>  %274 = fadd float %272, %273
>  %275 = fmul float %260, %34
>  %276 = fmul float %267, %36
>  %277 = fadd float %275, %276
>  %278 = fmul float %274, %38
>  %279 = fadd float %277, %278
>  %280 = fmul float %14, %40
>  %281 = fadd float %279, %280
>  %282 = fmul float %242, %242
>  %283 = fmul float %243, %243
>  %284 = fadd float %283, %282
>  %285 = fmul float %244, %244
>  %286 = fadd float %284, %285
>  %287 = call float @llvm.AMDGPU.rsq(float %286)
>  %288 = fmul float %242, %287
>  %289 = fmul float %243, %287
>  %290 = fmul float %244, %287
>  %291 = fsub float -0.000000e+00, %281
>  %292 = fmul float %260, %26
>  %293 = fmul float %267, %28
>  %294 = fadd float %292, %293
>  %295 = fmul float %274, %30
>  %296 = fadd float %294, %295
>  %297 = fmul float %14, %32
>  %298 = fadd float %296, %297
>  %299 = fmul float %260, %50
>  %300 = fmul float %267, %52
>  %301 = fadd float %299, %300
>  %302 = fmul float %274, %54
>  %303 = fadd float %301, %302
>  %304 = fmul float %14, %56
>  %305 = fadd float %303, %304
>  %306 = fmul float %260, %42
>  %307 = fmul float %267, %44
>  %308 = fadd float %306, %307
>  %309 = fmul float %274, %46
>  %310 = fadd float %308, %309
>  %311 = fmul float %14, %48
>  %312 = fadd float %310, %311
>  %313 = fsub float -0.000000e+00, %20
>  %314 = fadd float %260, %313
>  %315 = fsub float -0.000000e+00, %22
>  %316 = fadd float %267, %315
>  %317 = fsub float -0.000000e+00, %24
>  %318 = fadd float %274, %317
>  %319 = fadd float %298, %305
>  %320 = fadd float %291, %305
>  %321 = fmul float %319, %18
>  %322 = fmul float %320, %18
>  %323 = fmul float %314, %314
>  %324 = fmul float %316, %316
>  %325 = fadd float %324, %323
>  %326 = fmul float %318, %318
>  %327 = fadd float %325, %326
>  %328 = call float @llvm.AMDGPU.rsq(float %327)
>  %329 = fmul float %314, %328
>  %330 = fmul float %316, %328
>  %331 = fmul float %318, %328
>  %332 = fmul float %58, 0x3FB99999A0000000
>  %333 = fmul float %110, %64
>  %334 = fmul float %111, %66
>  %335 = fadd float %334, %333
>  %336 = fmul float %110, %60
>  %337 = fmul float %111, %62
>  %338 = fsub float -0.000000e+00, %332
>  %339 = fmul float %335, 1.600000e+01
>  %340 = fadd float %339, %338
>  %341 = fadd float %337, %336
>  %342 = fsub float -0.000000e+00, %332
>  %343 = fmul float %335, 3.000000e+00
>  %344 = fadd float %343, %342
>  %345 = fmul float %341, 3.000000e+00
>  %346 = fmul float %341, 8.000000e+00
>  %347 = fmul float %335, 8.000000e+00
>  %348 = fmul float %341, 1.600000e+01
>  %349 = fsub float -0.000000e+00, %305
>  %350 = fmul float %312, %16
>  %351 = fadd float %350, %349
>  %352 = fsub float -0.000000e+00, %281
>  %353 = fmul float %92, %305
>  %354 = fadd float %353, %298
>  %355 = fmul float %94, %305
>  %356 = fadd float %355, %352
>  %357 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %358 = load float addrspace(2)* addrspace(2)* %357, !tbaa !0
>  %359 = getelementptr float addrspace(2)* %358, i32 0
>  %360 = load float addrspace(2)* %359, !tbaa !0
>  %361 = fmul float %360, %298
>  %362 = getelementptr float addrspace(2)* %358, i32 1
>  %363 = load float addrspace(2)* %362, !tbaa !0
>  %364 = fmul float %363, %281
>  %365 = fadd float %361, %364
>  %366 = getelementptr float addrspace(2)* %358, i32 2
>  %367 = load float addrspace(2)* %366, !tbaa !0
>  %368 = fmul float %367, %312
>  %369 = fadd float %365, %368
>  %370 = getelementptr float addrspace(2)* %358, i32 3
>  %371 = load float addrspace(2)* %370, !tbaa !0
>  %372 = fmul float %371, %305
>  %373 = fadd float %369, %372
>  %374 = getelementptr float addrspace(2)* %358, i32 4
>  %375 = load float addrspace(2)* %374, !tbaa !0
>  %376 = fmul float %375, %298
>  %377 = getelementptr float addrspace(2)* %358, i32 5
>  %378 = load float addrspace(2)* %377, !tbaa !0
>  %379 = fmul float %378, %281
>  %380 = fadd float %376, %379
>  %381 = getelementptr float addrspace(2)* %358, i32 6
>  %382 = load float addrspace(2)* %381, !tbaa !0
>  %383 = fmul float %382, %312
>  %384 = fadd float %380, %383
>  %385 = getelementptr float addrspace(2)* %358, i32 7
>  %386 = load float addrspace(2)* %385, !tbaa !0
>  %387 = fmul float %386, %305
>  %388 = fadd float %384, %387
>  %389 = getelementptr float addrspace(2)* %358, i32 8
>  %390 = load float addrspace(2)* %389, !tbaa !0
>  %391 = fmul float %390, %298
>  %392 = getelementptr float addrspace(2)* %358, i32 9
>  %393 = load float addrspace(2)* %392, !tbaa !0
>  %394 = fmul float %393, %281
>  %395 = fadd float %391, %394
>  %396 = getelementptr float addrspace(2)* %358, i32 10
>  %397 = load float addrspace(2)* %396, !tbaa !0
>  %398 = fmul float %397, %312
>  %399 = fadd float %395, %398
>  %400 = getelementptr float addrspace(2)* %358, i32 11
>  %401 = load float addrspace(2)* %400, !tbaa !0
>  %402 = fmul float %401, %305
>  %403 = fadd float %399, %402
>  %404 = getelementptr float addrspace(2)* %358, i32 12
>  %405 = load float addrspace(2)* %404, !tbaa !0
>  %406 = fmul float %405, %298
>  %407 = getelementptr float addrspace(2)* %358, i32 13
>  %408 = load float addrspace(2)* %407, !tbaa !0
>  %409 = fmul float %408, %281
>  %410 = fadd float %406, %409
>  %411 = getelementptr float addrspace(2)* %358, i32 14
>  %412 = load float addrspace(2)* %411, !tbaa !0
>  %413 = fmul float %412, %312
>  %414 = fadd float %410, %413
>  %415 = getelementptr float addrspace(2)* %358, i32 15
>  %416 = load float addrspace(2)* %415, !tbaa !0
>  %417 = fmul float %416, %305
>  %418 = fadd float %414, %417
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %373, float %388, float %403, float %418)
>  %419 = getelementptr float addrspace(2)* %358, i32 16
>  %420 = load float addrspace(2)* %419, !tbaa !0
>  %421 = fmul float %420, %298
>  %422 = getelementptr float addrspace(2)* %358, i32 17
>  %423 = load float addrspace(2)* %422, !tbaa !0
>  %424 = fmul float %423, %281
>  %425 = fadd float %421, %424
>  %426 = getelementptr float addrspace(2)* %358, i32 18
>  %427 = load float addrspace(2)* %426, !tbaa !0
>  %428 = fmul float %427, %312
>  %429 = fadd float %425, %428
>  %430 = getelementptr float addrspace(2)* %358, i32 19
>  %431 = load float addrspace(2)* %430, !tbaa !0
>  %432 = fmul float %431, %305
>  %433 = fadd float %429, %432
>  %434 = getelementptr float addrspace(2)* %358, i32 20
>  %435 = load float addrspace(2)* %434, !tbaa !0
>  %436 = fmul float %435, %298
>  %437 = getelementptr float addrspace(2)* %358, i32 21
>  %438 = load float addrspace(2)* %437, !tbaa !0
>  %439 = fmul float %438, %281
>  %440 = fadd float %436, %439
>  %441 = getelementptr float addrspace(2)* %358, i32 22
>  %442 = load float addrspace(2)* %441, !tbaa !0
>  %443 = fmul float %442, %312
>  %444 = fadd float %440, %443
>  %445 = getelementptr float addrspace(2)* %358, i32 23
>  %446 = load float addrspace(2)* %445, !tbaa !0
>  %447 = fmul float %446, %305
>  %448 = fadd float %444, %447
>  %449 = getelementptr float addrspace(2)* %358, i32 24
>  %450 = load float addrspace(2)* %449, !tbaa !0
>  %451 = fmul float %450, %298
>  %452 = getelementptr float addrspace(2)* %358, i32 25
>  %453 = load float addrspace(2)* %452, !tbaa !0
>  %454 = fmul float %453, %281
>  %455 = fadd float %451, %454
>  %456 = getelementptr float addrspace(2)* %358, i32 26
>  %457 = load float addrspace(2)* %456, !tbaa !0
>  %458 = fmul float %457, %312
>  %459 = fadd float %455, %458
>  %460 = getelementptr float addrspace(2)* %358, i32 27
>  %461 = load float addrspace(2)* %460, !tbaa !0
>  %462 = fmul float %461, %305
>  %463 = fadd float %459, %462
>  %464 = getelementptr float addrspace(2)* %358, i32 28
>  %465 = load float addrspace(2)* %464, !tbaa !0
>  %466 = fmul float %465, %298
>  %467 = getelementptr float addrspace(2)* %358, i32 29
>  %468 = load float addrspace(2)* %467, !tbaa !0
>  %469 = fmul float %468, %281
>  %470 = fadd float %466, %469
>  %471 = getelementptr float addrspace(2)* %358, i32 30
>  %472 = load float addrspace(2)* %471, !tbaa !0
>  %473 = fmul float %472, %312
>  %474 = fadd float %470, %473
>  %475 = getelementptr float addrspace(2)* %358, i32 31
>  %476 = load float addrspace(2)* %475, !tbaa !0
>  %477 = fmul float %476, %305
>  %478 = fadd float %474, %477
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %433, float %448, float %463, float %478)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %227, float %228, float %229, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %251, float %252, float %253, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %288, float %289, float %290, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %321, float %322, float %305, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %329, float %330, float %331, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 37, i32 0, float %341, float %335, float %344, float %345)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 38, i32 0, float %346, float %347, float %340, float %348)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %354, float %356, float %351, float %305)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readonly
>declare float @fabs(float) #2
>
>; Function Attrs: readnone
>declare float @llvm.AMDGPU.rsq(float) #3
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readonly }
>attributes #3 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840700
>bf8c007f
>e00c2000
>80020500
>c0410100
>bf8c0070
>c00203cd
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>10020c04
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>04040b05
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>04041107
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>04041308
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>10020c09
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>04041905
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>04041507
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>04041708
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>1002080b
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>04041703
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>04220e0f
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>1012040f
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>0426020f
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>f80000ef
>08090a0b
>c007811d
>bf8c000f
>1010040f
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>d2820008
>0422020f
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>1012040f
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>c0078110
>bf8c007f
>d282000b
>042e020f
>c0078112
>bf8c007f
>d282000b
>042e0a0f
>c0000113
>bf8c007f
>d282000b
>042e0e00
>f80000ff
>08090a0b
>c0880704
>bf8c000f
>e00c2000
>80040b00
>bf8c0770
>061218ff
>c3000000
>d2060108
>02010109
>c0000300
>bf8c007f
>d0020010
>02000109
>d2000009
>0041e480
>d2060009
>22010109
>7e121109
>361212f2
>08101308
>061010ff
>c2800000
>d2060109
>02010108
>d0020010
>02000108
>d2000008
>0041e480
>d2060008
>22010108
>7e101108
>361010f2
>08141109
>061216ff
>c3000000
>d206010b
>02010109
>d0020010
>02000109
>d2000009
>0041e480
>d2060009
>22010109
>7e121109
>361212f2
>0816130b
>061616ff
>c2800000
>d206010c
>0201010b
>d0020000
>0200010b
>d200000b
>0001e480
>d206000b
>2201010b
>7e16110b
>361616f2
>081a170c
>7e1802ff
>bc820821
>d282000e
>03ca190d
>d282000c
>043a190a
>101c14ff
>3c820821
>101a1aff
>3c820821
>10141b0d
>d282000a
>042a1d0e
>d282000a
>042a190c
>7e145b0a
>101c150e
>d2820008
>03c9eb08
>10101d08
>101a150d
>d282000b
>03c9eb0b
>10161b0b
>101a160c
>d282000d
>04341308
>1014150c
>d2820009
>03c9eb09
>10181509
>d2820009
>0434150c
>10141605
>d282000a
>04280908
>d282000a
>0428110c
>101a150a
>d282000d
>04361309
>1016160d
>d2820008
>042c1708
>d282000b
>04201d0c
>d2820008
>0436170b
>7e105b08
>1018110b
>101a1109
>101c110a
>7e100280
>f800020f
>080c0d0e
>c088070c
>bf8c000f
>e00c2000
>80040c00
>bf8c0770
>1020180c
>d2820010
>0440130d
>d2820010
>0440150e
>10221805
>d2820011
>0444090d
>d2820011
>0444110e
>10242311
>d2820012
>044a2110
>1026180d
>d2820013
>044c170d
>d2820013
>044c1d0e
>d2820012
>044a2713
>7e245b12
>10282513
>102a2510
>10242511
>f800021f
>08141512
>bf8c070f
>1024270a
>1028230b
>08242514
>10241f12
>1016210b
>10262709
>08161713
>10161f0b
>1026170b
>d2820013
>044e2512
>10122309
>1014210a
>0812130a
>10121f09
>d282000a
>044e1309
>7e145b0a
>10121509
>10181512
>1014150b
>f800022f
>08090c0a
>bf8c070f
>08120507
>c0000303
>bf8c007f
>10121200
>06140f01
>10141400
>f800023f
>0807090a
>c0000309
>bf8c000f
>0a080800
>c0000308
>bf8c007f
>0a060600
>10120703
>d2820009
>04260904
>c000030a
>bf8c007f
>0a0c0c00
>d2820009
>04260d06
>7e125b09
>100c1306
>10081304
>10061303
>f800024f
>08060403
>c0820708
>bf8c000f
>e00c2000
>80010800
>c00003c8
>bf8c0070
>10001000
>c00003c9
>bf8c007f
>d2820000
>04000109
>c00003c0
>7e0602ff
>bdcccccd
>bf8c007f
>10060600
>7e0802ff
>40400000
>d2820006
>040e0900
>c00003c4
>bf8c007f
>10081000
>c00003c5
>bf8c007f
>d2820004
>04100109
>101008ff
>40400000
>f800025f
>08060004
>bf8c070f
>7e0c02ff
>41800000
>d2820003
>040e0d00
>100c08ff
>41800000
>100000ff
>41000000
>100808ff
>41000000
>f800026f
>06030004
>c00003d8
>bf8c000f
>d2820000
>04060e00
>c0000302
>bf8c007f
>10020a00
>08020f01
>c00003d9
>bf8c007f
>10060e00
>08040503
>f80008cf
>07010200
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL TEMP[0], LOCAL
>DCL TEMP[1], ARRAY(1), LOCAL
>IMM[0] FLT32 {    1.0000,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0].xyz, TEMP[0], SAMP[0], 2D
>  2: MOV TEMP[0].xyz, TEMP[0].xyzx
>  3: MOV TEMP[0].w, IMM[0].xxxx
>  4: MOV TEMP[1], TEMP[0]
>  5: MOV OUT[0], TEMP[1]
>  6: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %21 = load <32 x i8> addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %23 = load <16 x i8> addrspace(2)* %22, !tbaa !0
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %26 = bitcast float %24 to i32
>  %27 = bitcast float %25 to i32
>  %28 = insertelement <2 x i32> undef, i32 %26, i32 0
>  %29 = insertelement <2 x i32> %28, i32 %27, i32 1
>  %30 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %29, <32 x i8> %21, <16 x i8> %23, i32 2)
>  %31 = extractelement <4 x float> %30, i32 0
>  %32 = extractelement <4 x float> %30, i32 1
>  %33 = extractelement <4 x float> %30, i32 2
>  %34 = call i32 @llvm.SI.packf16(float %31, float %32)
>  %35 = bitcast i32 %34 to float
>  %36 = call i32 @llvm.SI.packf16(float %33, float 1.000000e+00)
>  %37 = bitcast i32 %36 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %35, float %37, float %35, float %37)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0800300
>c0c20500
>bf8c007f
>f0800700
>00010002
>bf8c0770
>5e060300
>d25e0000
>0201e502
>f8001c0f
>00030003
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL CONST[0..1]
>DCL TEMP[0..3], LOCAL
>  0: MAD TEMP[0], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  1: MOV TEMP[1].xw, TEMP[0].xxxw
>  2: MOV TEMP[2].xy, IN[1].xyxx
>  3: MAD TEMP[3].x, TEMP[0].zzzz, CONST[0].zzzz, -TEMP[0].wwww
>  4: MOV TEMP[1].z, TEMP[3].xxxx
>  5: MOV TEMP[1].y, -TEMP[0].yyyy
>  6: MAD TEMP[1].xy, CONST[1].xyyy, TEMP[0].wwww, TEMP[1].xyyy
>  7: MOV OUT[2], TEMP[2]
>  8: MOV OUT[0], TEMP[1]
>  9: MOV OUT[1], TEMP[0]
> 10: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 4
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 5
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %22 = load <16 x i8> addrspace(2)* %21, !tbaa !0
>  %23 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %22, i32 0, i32 %5)
>  %24 = extractelement <4 x float> %23, i32 0
>  %25 = extractelement <4 x float> %23, i32 1
>  %26 = extractelement <4 x float> %23, i32 2
>  %27 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %28 = load <16 x i8> addrspace(2)* %27, !tbaa !0
>  %29 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %28, i32 0, i32 %5)
>  %30 = extractelement <4 x float> %29, i32 0
>  %31 = extractelement <4 x float> %29, i32 1
>  %32 = fmul float %24, %14
>  %33 = fadd float %32, %12
>  %34 = fmul float %25, %14
>  %35 = fadd float %34, %12
>  %36 = fmul float %26, %14
>  %37 = fadd float %36, %12
>  %38 = fmul float %24, %12
>  %39 = fadd float %38, %14
>  %40 = fsub float -0.000000e+00, %39
>  %41 = fmul float %37, %16
>  %42 = fadd float %41, %40
>  %43 = fsub float -0.000000e+00, %35
>  %44 = fmul float %18, %39
>  %45 = fadd float %44, %33
>  %46 = fmul float %20, %39
>  %47 = fadd float %46, %43
>  %48 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %49 = load float addrspace(2)* addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr float addrspace(2)* %49, i32 0
>  %51 = load float addrspace(2)* %50, !tbaa !0
>  %52 = fmul float %51, %33
>  %53 = getelementptr float addrspace(2)* %49, i32 1
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = fmul float %54, %35
>  %56 = fadd float %52, %55
>  %57 = getelementptr float addrspace(2)* %49, i32 2
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = fmul float %58, %37
>  %60 = fadd float %56, %59
>  %61 = getelementptr float addrspace(2)* %49, i32 3
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = fmul float %62, %39
>  %64 = fadd float %60, %63
>  %65 = getelementptr float addrspace(2)* %49, i32 4
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = fmul float %66, %33
>  %68 = getelementptr float addrspace(2)* %49, i32 5
>  %69 = load float addrspace(2)* %68, !tbaa !0
>  %70 = fmul float %69, %35
>  %71 = fadd float %67, %70
>  %72 = getelementptr float addrspace(2)* %49, i32 6
>  %73 = load float addrspace(2)* %72, !tbaa !0
>  %74 = fmul float %73, %37
>  %75 = fadd float %71, %74
>  %76 = getelementptr float addrspace(2)* %49, i32 7
>  %77 = load float addrspace(2)* %76, !tbaa !0
>  %78 = fmul float %77, %39
>  %79 = fadd float %75, %78
>  %80 = getelementptr float addrspace(2)* %49, i32 8
>  %81 = load float addrspace(2)* %80, !tbaa !0
>  %82 = fmul float %81, %33
>  %83 = getelementptr float addrspace(2)* %49, i32 9
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = fmul float %84, %35
>  %86 = fadd float %82, %85
>  %87 = getelementptr float addrspace(2)* %49, i32 10
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = fmul float %88, %37
>  %90 = fadd float %86, %89
>  %91 = getelementptr float addrspace(2)* %49, i32 11
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = fmul float %92, %39
>  %94 = fadd float %90, %93
>  %95 = getelementptr float addrspace(2)* %49, i32 12
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = fmul float %96, %33
>  %98 = getelementptr float addrspace(2)* %49, i32 13
>  %99 = load float addrspace(2)* %98, !tbaa !0
>  %100 = fmul float %99, %35
>  %101 = fadd float %97, %100
>  %102 = getelementptr float addrspace(2)* %49, i32 14
>  %103 = load float addrspace(2)* %102, !tbaa !0
>  %104 = fmul float %103, %37
>  %105 = fadd float %101, %104
>  %106 = getelementptr float addrspace(2)* %49, i32 15
>  %107 = load float addrspace(2)* %106, !tbaa !0
>  %108 = fmul float %107, %39
>  %109 = fadd float %105, %108
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %64, float %79, float %94, float %109)
>  %110 = getelementptr float addrspace(2)* %49, i32 16
>  %111 = load float addrspace(2)* %110, !tbaa !0
>  %112 = fmul float %111, %33
>  %113 = getelementptr float addrspace(2)* %49, i32 17
>  %114 = load float addrspace(2)* %113, !tbaa !0
>  %115 = fmul float %114, %35
>  %116 = fadd float %112, %115
>  %117 = getelementptr float addrspace(2)* %49, i32 18
>  %118 = load float addrspace(2)* %117, !tbaa !0
>  %119 = fmul float %118, %37
>  %120 = fadd float %116, %119
>  %121 = getelementptr float addrspace(2)* %49, i32 19
>  %122 = load float addrspace(2)* %121, !tbaa !0
>  %123 = fmul float %122, %39
>  %124 = fadd float %120, %123
>  %125 = getelementptr float addrspace(2)* %49, i32 20
>  %126 = load float addrspace(2)* %125, !tbaa !0
>  %127 = fmul float %126, %33
>  %128 = getelementptr float addrspace(2)* %49, i32 21
>  %129 = load float addrspace(2)* %128, !tbaa !0
>  %130 = fmul float %129, %35
>  %131 = fadd float %127, %130
>  %132 = getelementptr float addrspace(2)* %49, i32 22
>  %133 = load float addrspace(2)* %132, !tbaa !0
>  %134 = fmul float %133, %37
>  %135 = fadd float %131, %134
>  %136 = getelementptr float addrspace(2)* %49, i32 23
>  %137 = load float addrspace(2)* %136, !tbaa !0
>  %138 = fmul float %137, %39
>  %139 = fadd float %135, %138
>  %140 = getelementptr float addrspace(2)* %49, i32 24
>  %141 = load float addrspace(2)* %140, !tbaa !0
>  %142 = fmul float %141, %33
>  %143 = getelementptr float addrspace(2)* %49, i32 25
>  %144 = load float addrspace(2)* %143, !tbaa !0
>  %145 = fmul float %144, %35
>  %146 = fadd float %142, %145
>  %147 = getelementptr float addrspace(2)* %49, i32 26
>  %148 = load float addrspace(2)* %147, !tbaa !0
>  %149 = fmul float %148, %37
>  %150 = fadd float %146, %149
>  %151 = getelementptr float addrspace(2)* %49, i32 27
>  %152 = load float addrspace(2)* %151, !tbaa !0
>  %153 = fmul float %152, %39
>  %154 = fadd float %150, %153
>  %155 = getelementptr float addrspace(2)* %49, i32 28
>  %156 = load float addrspace(2)* %155, !tbaa !0
>  %157 = fmul float %156, %33
>  %158 = getelementptr float addrspace(2)* %49, i32 29
>  %159 = load float addrspace(2)* %158, !tbaa !0
>  %160 = fmul float %159, %35
>  %161 = fadd float %157, %160
>  %162 = getelementptr float addrspace(2)* %49, i32 30
>  %163 = load float addrspace(2)* %162, !tbaa !0
>  %164 = fmul float %163, %37
>  %165 = fadd float %161, %164
>  %166 = getelementptr float addrspace(2)* %49, i32 31
>  %167 = load float addrspace(2)* %166, !tbaa !0
>  %168 = fmul float %167, %39
>  %169 = fadd float %165, %168
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %124, float %139, float %154, float %169)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %30, float %31, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %45, float %47, float %42, float %39)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840700
>bf8c007f
>e00c2000
>80020500
>c0410100
>bf8c0070
>c0020301
>c0028300
>bf8c007f
>7e060205
>d2820002
>040c0905
>d2820001
>040c0906
>c0400102
>bf8c007f
>c004010d
>bf8c007f
>10080208
>c004010c
>bf8c007f
>d2820009
>04120408
>d2820004
>040c0907
>c004010e
>bf8c007f
>d2820009
>04260808
>7e060204
>d2820003
>040c0b05
>c002010f
>bf8c007f
>d2820005
>04260604
>c0020109
>bf8c007f
>100c0204
>c0020108
>bf8c007f
>d2820006
>041a0404
>c002010a
>bf8c007f
>d2820006
>041a0804
>c002010b
>bf8c007f
>d2820006
>041a0604
>c0020105
>bf8c007f
>100e0204
>c0020104
>bf8c007f
>d2820007
>041e0404
>c0020106
>bf8c007f
>d2820007
>041e0804
>c0020107
>bf8c007f
>d2820007
>041e0604
>c0020101
>bf8c007f
>10100204
>c0020100
>bf8c007f
>d2820008
>04220404
>c0020102
>bf8c007f
>d2820008
>04220804
>c0020103
>bf8c007f
>d2820008
>04220604
>f80000ef
>05060708
>c002011d
>bf8c000f
>100a0204
>c002011c
>bf8c007f
>d2820005
>04160404
>c002011e
>bf8c007f
>d2820005
>04160804
>c002011f
>bf8c007f
>d2820005
>04160604
>c0020119
>bf8c007f
>100c0204
>c0020118
>bf8c007f
>d2820006
>041a0404
>c002011a
>bf8c007f
>d2820006
>041a0804
>c002011b
>bf8c007f
>d2820006
>041a0604
>c0020115
>bf8c007f
>100e0204
>c0020114
>bf8c007f
>d2820007
>041e0404
>c0020116
>bf8c007f
>d2820007
>041e0804
>c0020117
>bf8c007f
>d2820007
>041e0604
>c0020111
>bf8c007f
>10100204
>c0020110
>bf8c007f
>d2820008
>04220404
>c0020112
>bf8c007f
>d2820008
>04220804
>c0000113
>bf8c007f
>d2820008
>04220600
>f80000ff
>05060708
>c0820704
>bf8c000f
>e00c2000
>80010500
>7e000280
>bf8c0770
>f800020f
>00000605
>c0000304
>bf8c000f
>d2820000
>040a0600
>c0000302
>bf8c007f
>10040800
>08040702
>c0000305
>bf8c007f
>10080600
>08020304
>f80008cf
>03020100
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL SAMP[0]
>DCL CONST[0]
>DCL TEMP[0..3], LOCAL
>DCL TEMP[4], ARRAY(1), LOCAL
>IMM[0] FLT32 {    0.2125,     0.7154,     0.0721,     0.0000}
>IMM[1] FLT32 {    1.0000,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0].xyz, TEMP[0], SAMP[0], 2D
>  2: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[0].zzzz
>  3: DP3 TEMP[1].x, TEMP[0].xyzz, IMM[0].xyzz
>  4: MOV TEMP[0].x, TEMP[1].xxxx
>  5: ADD TEMP[2].x, TEMP[1].xxxx, -CONST[0].xxxx
>  6: MOV TEMP[0].w, TEMP[2].xxxx
>  7: ADD TEMP[1].x, -TEMP[1].xxxx, CONST[0].yyyy
>  8: MOV TEMP[3].xyz, TEMP[0]
>  9: SGE TEMP[2].x, TEMP[2].xxxx, IMM[0].wwww
> 10: F2I TEMP[2].x, -TEMP[2]
> 11: UIF TEMP[2].xxxx :0
> 12:   MOV TEMP[2].x, IMM[1].xxxx
> 13: ELSE :0
> 14:   MOV TEMP[2].x, IMM[0].wwww
> 15: ENDIF
> 16: MOV TEMP[3].w, TEMP[2].xxxx
> 17: MOV TEMP[0].w, TEMP[3]
> 18: SGE TEMP[1].x, TEMP[1].xxxx, IMM[0].wwww
> 19: F2I TEMP[1].x, -TEMP[1]
> 20: UIF TEMP[1].xxxx :0
> 21:   MOV TEMP[1].x, IMM[1].xxxx
> 22: ELSE :0
> 23:   MOV TEMP[1].x, IMM[0].wwww
> 24: ENDIF
> 25: MUL TEMP[0], TEMP[0].wwww, TEMP[1].xxxx
> 26: MOV TEMP[4], TEMP[0]
> 27: MOV OUT[1], TEMP[4]
> 28: MOV OUT[0].z, IMM[0].wwww
> 29: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 0
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 1
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 2
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %29 = load <32 x i8> addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %31 = load <16 x i8> addrspace(2)* %30, !tbaa !0
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %33 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %34 = bitcast float %32 to i32
>  %35 = bitcast float %33 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %37, <32 x i8> %29, <16 x i8> %31, i32 2)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 1
>  %41 = extractelement <4 x float> %38, i32 2
>  %42 = fmul float %39, %27
>  %43 = fmul float %40, %27
>  %44 = fmul float %41, %27
>  %45 = fmul float %42, 0x3FCB333340000000
>  %46 = fmul float %43, 0x3FE6E48E80000000
>  %47 = fadd float %46, %45
>  %48 = fmul float %44, 0x3FB2752540000000
>  %49 = fadd float %47, %48
>  %50 = fsub float -0.000000e+00, %23
>  %51 = fadd float %49, %50
>  %52 = fsub float -0.000000e+00, %49
>  %53 = fadd float %52, %25
>  %54 = fcmp uge float %51, 0.000000e+00
>  %55 = select i1 %54, float 1.000000e+00, float 0.000000e+00
>  %56 = fsub float -0.000000e+00, %55
>  %57 = fptosi float %56 to i32
>  %58 = bitcast i32 %57 to float
>  %59 = bitcast float %58 to i32
>  %60 = icmp ne i32 %59, 0
>  %. = select i1 %60, float 1.000000e+00, float 0.000000e+00
>  %61 = fcmp uge float %53, 0.000000e+00
>  %62 = select i1 %61, float 1.000000e+00, float 0.000000e+00
>  %63 = fsub float -0.000000e+00, %62
>  %64 = fptosi float %63 to i32
>  %65 = bitcast i32 %64 to float
>  %66 = bitcast float %65 to i32
>  %67 = icmp ne i32 %66, 0
>  %temp4.0 = select i1 %67, float 1.000000e+00, float 0.000000e+00
>  %68 = fmul float %., %temp4.0
>  %69 = fmul float %., %temp4.0
>  %70 = fmul float %., %temp4.0
>  %71 = fmul float %., %temp4.0
>  %72 = fcmp ugt float %71, 0.000000e+00
>  %73 = sext i1 %72 to i32
>  %74 = trunc i32 %73 to i1
>  %75 = select i1 %74, float 1.000000e+00, float -1.000000e+00
>  call void @llvm.AMDGPU.kill(float %75)
>  %76 = call i32 @llvm.SI.packf16(float %68, float %69)
>  %77 = bitcast i32 %76 to float
>  %78 = call i32 @llvm.SI.packf16(float %70, float %71)
>  %79 = bitcast i32 %78 to float
>  call void @llvm.SI.export(i32 1, i32 0, i32 0, i32 8, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %77, float %79, float %77, float %79)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>declare void @llvm.AMDGPU.kill(float)
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0840300
>c0c60500
>bf8c007f
>f0800700
>00430002
>c0400100
>bf8c0070
>c0010102
>bf8c007f
>10060202
>10080002
>100808ff
>3e59999a
>7e0a02ff
>3f372474
>d2820003
>04120b03
>10000402
>7e0202ff
>3d93a92a
>d2820000
>040e0300
>c0010101
>bf8c007f
>08020002
>d00c0002
>02010101
>d2000001
>0009e480
>d2060001
>22010101
>7e021101
>d10a0002
>02010101
>d2000001
>0009e480
>c0000100
>bf8c007f
>0a000000
>d00c0000
>02010100
>d2000000
>0001e480
>d2060000
>22010100
>7e001100
>d10a0000
>02010100
>d2000000
>0001e480
>10000300
>d0080000
>02010100
>d2000001
>0001e4f3
>7c260280
>7e020280
>f8000081
>01010101
>5e000100
>f8001c0f
>00000000
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL CONST[0..49]
>DCL TEMP[0..3], LOCAL
>  0: MAD TEMP[0], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  1: MOV TEMP[1].xw, TEMP[0].xxxw
>  2: MOV TEMP[2].xy, IN[1].xyxx
>  3: MAD TEMP[3].x, TEMP[0].zzzz, CONST[0].zzzz, -TEMP[0].wwww
>  4: MOV TEMP[1].z, TEMP[3].xxxx
>  5: MOV TEMP[1].y, -TEMP[0].yyyy
>  6: MAD TEMP[1].xy, CONST[49].xyyy, TEMP[0].wwww, TEMP[1].xyyy
>  7: MOV OUT[2], TEMP[2]
>  8: MOV OUT[0], TEMP[1]
>  9: MOV OUT[1], TEMP[0]
> 10: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 196
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 197
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %22 = load <16 x i8> addrspace(2)* %21, !tbaa !0
>  %23 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %22, i32 0, i32 %5)
>  %24 = extractelement <4 x float> %23, i32 0
>  %25 = extractelement <4 x float> %23, i32 1
>  %26 = extractelement <4 x float> %23, i32 2
>  %27 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %28 = load <16 x i8> addrspace(2)* %27, !tbaa !0
>  %29 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %28, i32 0, i32 %5)
>  %30 = extractelement <4 x float> %29, i32 0
>  %31 = extractelement <4 x float> %29, i32 1
>  %32 = fmul float %24, %14
>  %33 = fadd float %32, %12
>  %34 = fmul float %25, %14
>  %35 = fadd float %34, %12
>  %36 = fmul float %26, %14
>  %37 = fadd float %36, %12
>  %38 = fmul float %24, %12
>  %39 = fadd float %38, %14
>  %40 = fsub float -0.000000e+00, %39
>  %41 = fmul float %37, %16
>  %42 = fadd float %41, %40
>  %43 = fsub float -0.000000e+00, %35
>  %44 = fmul float %18, %39
>  %45 = fadd float %44, %33
>  %46 = fmul float %20, %39
>  %47 = fadd float %46, %43
>  %48 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %49 = load float addrspace(2)* addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr float addrspace(2)* %49, i32 0
>  %51 = load float addrspace(2)* %50, !tbaa !0
>  %52 = fmul float %51, %33
>  %53 = getelementptr float addrspace(2)* %49, i32 1
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = fmul float %54, %35
>  %56 = fadd float %52, %55
>  %57 = getelementptr float addrspace(2)* %49, i32 2
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = fmul float %58, %37
>  %60 = fadd float %56, %59
>  %61 = getelementptr float addrspace(2)* %49, i32 3
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = fmul float %62, %39
>  %64 = fadd float %60, %63
>  %65 = getelementptr float addrspace(2)* %49, i32 4
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = fmul float %66, %33
>  %68 = getelementptr float addrspace(2)* %49, i32 5
>  %69 = load float addrspace(2)* %68, !tbaa !0
>  %70 = fmul float %69, %35
>  %71 = fadd float %67, %70
>  %72 = getelementptr float addrspace(2)* %49, i32 6
>  %73 = load float addrspace(2)* %72, !tbaa !0
>  %74 = fmul float %73, %37
>  %75 = fadd float %71, %74
>  %76 = getelementptr float addrspace(2)* %49, i32 7
>  %77 = load float addrspace(2)* %76, !tbaa !0
>  %78 = fmul float %77, %39
>  %79 = fadd float %75, %78
>  %80 = getelementptr float addrspace(2)* %49, i32 8
>  %81 = load float addrspace(2)* %80, !tbaa !0
>  %82 = fmul float %81, %33
>  %83 = getelementptr float addrspace(2)* %49, i32 9
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = fmul float %84, %35
>  %86 = fadd float %82, %85
>  %87 = getelementptr float addrspace(2)* %49, i32 10
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = fmul float %88, %37
>  %90 = fadd float %86, %89
>  %91 = getelementptr float addrspace(2)* %49, i32 11
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = fmul float %92, %39
>  %94 = fadd float %90, %93
>  %95 = getelementptr float addrspace(2)* %49, i32 12
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = fmul float %96, %33
>  %98 = getelementptr float addrspace(2)* %49, i32 13
>  %99 = load float addrspace(2)* %98, !tbaa !0
>  %100 = fmul float %99, %35
>  %101 = fadd float %97, %100
>  %102 = getelementptr float addrspace(2)* %49, i32 14
>  %103 = load float addrspace(2)* %102, !tbaa !0
>  %104 = fmul float %103, %37
>  %105 = fadd float %101, %104
>  %106 = getelementptr float addrspace(2)* %49, i32 15
>  %107 = load float addrspace(2)* %106, !tbaa !0
>  %108 = fmul float %107, %39
>  %109 = fadd float %105, %108
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %64, float %79, float %94, float %109)
>  %110 = getelementptr float addrspace(2)* %49, i32 16
>  %111 = load float addrspace(2)* %110, !tbaa !0
>  %112 = fmul float %111, %33
>  %113 = getelementptr float addrspace(2)* %49, i32 17
>  %114 = load float addrspace(2)* %113, !tbaa !0
>  %115 = fmul float %114, %35
>  %116 = fadd float %112, %115
>  %117 = getelementptr float addrspace(2)* %49, i32 18
>  %118 = load float addrspace(2)* %117, !tbaa !0
>  %119 = fmul float %118, %37
>  %120 = fadd float %116, %119
>  %121 = getelementptr float addrspace(2)* %49, i32 19
>  %122 = load float addrspace(2)* %121, !tbaa !0
>  %123 = fmul float %122, %39
>  %124 = fadd float %120, %123
>  %125 = getelementptr float addrspace(2)* %49, i32 20
>  %126 = load float addrspace(2)* %125, !tbaa !0
>  %127 = fmul float %126, %33
>  %128 = getelementptr float addrspace(2)* %49, i32 21
>  %129 = load float addrspace(2)* %128, !tbaa !0
>  %130 = fmul float %129, %35
>  %131 = fadd float %127, %130
>  %132 = getelementptr float addrspace(2)* %49, i32 22
>  %133 = load float addrspace(2)* %132, !tbaa !0
>  %134 = fmul float %133, %37
>  %135 = fadd float %131, %134
>  %136 = getelementptr float addrspace(2)* %49, i32 23
>  %137 = load float addrspace(2)* %136, !tbaa !0
>  %138 = fmul float %137, %39
>  %139 = fadd float %135, %138
>  %140 = getelementptr float addrspace(2)* %49, i32 24
>  %141 = load float addrspace(2)* %140, !tbaa !0
>  %142 = fmul float %141, %33
>  %143 = getelementptr float addrspace(2)* %49, i32 25
>  %144 = load float addrspace(2)* %143, !tbaa !0
>  %145 = fmul float %144, %35
>  %146 = fadd float %142, %145
>  %147 = getelementptr float addrspace(2)* %49, i32 26
>  %148 = load float addrspace(2)* %147, !tbaa !0
>  %149 = fmul float %148, %37
>  %150 = fadd float %146, %149
>  %151 = getelementptr float addrspace(2)* %49, i32 27
>  %152 = load float addrspace(2)* %151, !tbaa !0
>  %153 = fmul float %152, %39
>  %154 = fadd float %150, %153
>  %155 = getelementptr float addrspace(2)* %49, i32 28
>  %156 = load float addrspace(2)* %155, !tbaa !0
>  %157 = fmul float %156, %33
>  %158 = getelementptr float addrspace(2)* %49, i32 29
>  %159 = load float addrspace(2)* %158, !tbaa !0
>  %160 = fmul float %159, %35
>  %161 = fadd float %157, %160
>  %162 = getelementptr float addrspace(2)* %49, i32 30
>  %163 = load float addrspace(2)* %162, !tbaa !0
>  %164 = fmul float %163, %37
>  %165 = fadd float %161, %164
>  %166 = getelementptr float addrspace(2)* %49, i32 31
>  %167 = load float addrspace(2)* %166, !tbaa !0
>  %168 = fmul float %167, %39
>  %169 = fadd float %165, %168
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %124, float %139, float %154, float %169)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %30, float %31, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %45, float %47, float %42, float %39)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840700
>bf8c007f
>e00c2000
>80020500
>c0410100
>bf8c0070
>c0020301
>c0028300
>bf8c007f
>7e060205
>d2820002
>040c0905
>d2820001
>040c0906
>c0400102
>bf8c007f
>c004010d
>bf8c007f
>10080208
>c004010c
>bf8c007f
>d2820009
>04120408
>d2820004
>040c0907
>c004010e
>bf8c007f
>d2820009
>04260808
>7e060204
>d2820003
>040c0b05
>c002010f
>bf8c007f
>d2820005
>04260604
>c0020109
>bf8c007f
>100c0204
>c0020108
>bf8c007f
>d2820006
>041a0404
>c002010a
>bf8c007f
>d2820006
>041a0804
>c002010b
>bf8c007f
>d2820006
>041a0604
>c0020105
>bf8c007f
>100e0204
>c0020104
>bf8c007f
>d2820007
>041e0404
>c0020106
>bf8c007f
>d2820007
>041e0804
>c0020107
>bf8c007f
>d2820007
>041e0604
>c0020101
>bf8c007f
>10100204
>c0020100
>bf8c007f
>d2820008
>04220404
>c0020102
>bf8c007f
>d2820008
>04220804
>c0020103
>bf8c007f
>d2820008
>04220604
>f80000ef
>05060708
>c002011d
>bf8c000f
>100a0204
>c002011c
>bf8c007f
>d2820005
>04160404
>c002011e
>bf8c007f
>d2820005
>04160804
>c002011f
>bf8c007f
>d2820005
>04160604
>c0020119
>bf8c007f
>100c0204
>c0020118
>bf8c007f
>d2820006
>041a0404
>c002011a
>bf8c007f
>d2820006
>041a0804
>c002011b
>bf8c007f
>d2820006
>041a0604
>c0020115
>bf8c007f
>100e0204
>c0020114
>bf8c007f
>d2820007
>041e0404
>c0020116
>bf8c007f
>d2820007
>041e0804
>c0020117
>bf8c007f
>d2820007
>041e0604
>c0020111
>bf8c007f
>10100204
>c0020110
>bf8c007f
>d2820008
>04220404
>c0020112
>bf8c007f
>d2820008
>04220804
>c0000113
>bf8c007f
>d2820008
>04220600
>f80000ff
>05060708
>c0820704
>bf8c000f
>e00c2000
>80010500
>7e000280
>bf8c0770
>f800020f
>00000605
>c00003c4
>bf8c000f
>d2820000
>040a0600
>c0000302
>bf8c007f
>10040800
>08040702
>c00003c5
>bf8c007f
>10080600
>08020304
>f80008cf
>03020100
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL IN[2], GENERIC[21], PERSPECTIVE
>DCL IN[3], GENERIC[22], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL CONST[0]
>DCL TEMP[0..9], LOCAL
>DCL TEMP[10], ARRAY(1), LOCAL
>IMM[0] FLT32 {    0.2500,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MOV TEMP[1].w, TEMP[0].wwww
>  3: MOV TEMP[2].xy, IN[1].xyyy
>  4: TEX TEMP[2], TEMP[2], SAMP[0], 2D
>  5: MOV TEMP[3].w, TEMP[2].wwww
>  6: MOV TEMP[4].xy, IN[2].xyyy
>  7: TEX TEMP[4], TEMP[4], SAMP[0], 2D
>  8: MOV TEMP[5].w, TEMP[4].wwww
>  9: MOV TEMP[6].xy, IN[3].xyyy
> 10: TEX TEMP[6], TEMP[6], SAMP[0], 2D
> 11: MOV TEMP[7].w, TEMP[6].wwww
> 12: LG2 TEMP[8].x, TEMP[0].xxxx
> 13: LG2 TEMP[9].x, TEMP[0].yyyy
> 14: MOV TEMP[8].y, TEMP[9].xxxx
> 15: LG2 TEMP[9].x, TEMP[0].zzzz
> 16: MOV TEMP[8].z, TEMP[9].xxxx
> 17: MUL TEMP[8].xyz, TEMP[8].xyzz, CONST[0].wwww
> 18: EX2 TEMP[8].x, TEMP[8].xxxx
> 19: EX2 TEMP[9].x, TEMP[8].yyyy
> 20: MOV TEMP[8].y, TEMP[9].xxxx
> 21: EX2 TEMP[9].x, TEMP[8].zzzz
> 22: MOV TEMP[8].z, TEMP[9].xxxx
> 23: DP3 TEMP[0].x, TEMP[0].xyzz, CONST[0].xyzz
> 24: MUL TEMP[1].xyz, TEMP[8].xyzz, TEMP[0].xxxx
> 25: LG2 TEMP[8].x, TEMP[2].xxxx
> 26: LG2 TEMP[0].x, TEMP[2].yyyy
> 27: MOV TEMP[8].y, TEMP[0].xxxx
> 28: LG2 TEMP[0].x, TEMP[2].zzzz
> 29: MOV TEMP[8].z, TEMP[0].xxxx
> 30: MUL TEMP[8].xyz, TEMP[8].xyzz, CONST[0].wwww
> 31: EX2 TEMP[8].x, TEMP[8].xxxx
> 32: EX2 TEMP[0].x, TEMP[8].yyyy
> 33: MOV TEMP[8].y, TEMP[0].xxxx
> 34: EX2 TEMP[0].x, TEMP[8].zzzz
> 35: MOV TEMP[8].z, TEMP[0].xxxx
> 36: DP3 TEMP[0].x, TEMP[2].xyzz, CONST[0].xyzz
> 37: MUL TEMP[3].xyz, TEMP[8].xyzz, TEMP[0].xxxx
> 38: ADD TEMP[1], TEMP[1], TEMP[3]
> 39: LG2 TEMP[3].x, TEMP[4].xxxx
> 40: LG2 TEMP[0].x, TEMP[4].yyyy
> 41: MOV TEMP[3].y, TEMP[0].xxxx
> 42: LG2 TEMP[0].x, TEMP[4].zzzz
> 43: MOV TEMP[3].z, TEMP[0].xxxx
> 44: MUL TEMP[3].xyz, TEMP[3].xyzz, CONST[0].wwww
> 45: EX2 TEMP[3].x, TEMP[3].xxxx
> 46: EX2 TEMP[0].x, TEMP[3].yyyy
> 47: MOV TEMP[3].y, TEMP[0].xxxx
> 48: EX2 TEMP[0].x, TEMP[3].zzzz
> 49: MOV TEMP[3].z, TEMP[0].xxxx
> 50: DP3 TEMP[0].x, TEMP[4].xyzz, CONST[0].xyzz
> 51: MUL TEMP[5].xyz, TEMP[3].xyzz, TEMP[0].xxxx
> 52: ADD TEMP[1], TEMP[5], TEMP[1]
> 53: LG2 TEMP[5].x, TEMP[6].xxxx
> 54: LG2 TEMP[0].x, TEMP[6].yyyy
> 55: MOV TEMP[5].y, TEMP[0].xxxx
> 56: LG2 TEMP[0].x, TEMP[6].zzzz
> 57: MOV TEMP[5].z, TEMP[0].xxxx
> 58: MUL TEMP[5].xyz, TEMP[5].xyzz, CONST[0].wwww
> 59: EX2 TEMP[5].x, TEMP[5].xxxx
> 60: EX2 TEMP[0].x, TEMP[5].yyyy
> 61: MOV TEMP[5].y, TEMP[0].xxxx
> 62: EX2 TEMP[0].x, TEMP[5].zzzz
> 63: MOV TEMP[5].z, TEMP[0].xxxx
> 64: DP3 TEMP[0].x, TEMP[6].xyzz, CONST[0].xyzz
> 65: MUL TEMP[7].xyz, TEMP[5].xyzz, TEMP[0].xxxx
> 66: ADD TEMP[0], TEMP[7], TEMP[1]
> 67: MUL TEMP[0], TEMP[0], IMM[0].xxxx
> 68: MOV TEMP[10], TEMP[0]
> 69: MOV OUT[0], TEMP[10]
> 70: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 0
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 1
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 2
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 3
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %31 = load <32 x i8> addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %33 = load <16 x i8> addrspace(2)* %32, !tbaa !0
>  %34 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %36 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %37 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %38 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %39 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %40 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %3, <2 x i32> %5)
>  %41 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %3, <2 x i32> %5)
>  %42 = bitcast float %34 to i32
>  %43 = bitcast float %35 to i32
>  %44 = insertelement <2 x i32> undef, i32 %42, i32 0
>  %45 = insertelement <2 x i32> %44, i32 %43, i32 1
>  %46 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %45, <32 x i8> %31, <16 x i8> %33, i32 2)
>  %47 = extractelement <4 x float> %46, i32 0
>  %48 = extractelement <4 x float> %46, i32 1
>  %49 = extractelement <4 x float> %46, i32 2
>  %50 = extractelement <4 x float> %46, i32 3
>  %51 = bitcast float %36 to i32
>  %52 = bitcast float %37 to i32
>  %53 = insertelement <2 x i32> undef, i32 %51, i32 0
>  %54 = insertelement <2 x i32> %53, i32 %52, i32 1
>  %55 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %54, <32 x i8> %31, <16 x i8> %33, i32 2)
>  %56 = extractelement <4 x float> %55, i32 0
>  %57 = extractelement <4 x float> %55, i32 1
>  %58 = extractelement <4 x float> %55, i32 2
>  %59 = extractelement <4 x float> %55, i32 3
>  %60 = bitcast float %38 to i32
>  %61 = bitcast float %39 to i32
>  %62 = insertelement <2 x i32> undef, i32 %60, i32 0
>  %63 = insertelement <2 x i32> %62, i32 %61, i32 1
>  %64 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %63, <32 x i8> %31, <16 x i8> %33, i32 2)
>  %65 = extractelement <4 x float> %64, i32 0
>  %66 = extractelement <4 x float> %64, i32 1
>  %67 = extractelement <4 x float> %64, i32 2
>  %68 = extractelement <4 x float> %64, i32 3
>  %69 = bitcast float %40 to i32
>  %70 = bitcast float %41 to i32
>  %71 = insertelement <2 x i32> undef, i32 %69, i32 0
>  %72 = insertelement <2 x i32> %71, i32 %70, i32 1
>  %73 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %72, <32 x i8> %31, <16 x i8> %33, i32 2)
>  %74 = extractelement <4 x float> %73, i32 0
>  %75 = extractelement <4 x float> %73, i32 1
>  %76 = extractelement <4 x float> %73, i32 2
>  %77 = extractelement <4 x float> %73, i32 3
>  %78 = call float @llvm.log2.f32(float %47)
>  %79 = call float @llvm.log2.f32(float %48)
>  %80 = call float @llvm.log2.f32(float %49)
>  %81 = fmul float %78, %29
>  %82 = fmul float %79, %29
>  %83 = fmul float %80, %29
>  %84 = call float @llvm.AMDIL.exp.(float %81)
>  %85 = call float @llvm.AMDIL.exp.(float %82)
>  %86 = call float @llvm.AMDIL.exp.(float %83)
>  %87 = fmul float %47, %23
>  %88 = fmul float %48, %25
>  %89 = fadd float %88, %87
>  %90 = fmul float %49, %27
>  %91 = fadd float %89, %90
>  %92 = fmul float %84, %91
>  %93 = fmul float %85, %91
>  %94 = fmul float %86, %91
>  %95 = call float @llvm.log2.f32(float %56)
>  %96 = call float @llvm.log2.f32(float %57)
>  %97 = call float @llvm.log2.f32(float %58)
>  %98 = fmul float %95, %29
>  %99 = fmul float %96, %29
>  %100 = fmul float %97, %29
>  %101 = call float @llvm.AMDIL.exp.(float %98)
>  %102 = call float @llvm.AMDIL.exp.(float %99)
>  %103 = call float @llvm.AMDIL.exp.(float %100)
>  %104 = fmul float %56, %23
>  %105 = fmul float %57, %25
>  %106 = fadd float %105, %104
>  %107 = fmul float %58, %27
>  %108 = fadd float %106, %107
>  %109 = fmul float %101, %108
>  %110 = fmul float %102, %108
>  %111 = fmul float %103, %108
>  %112 = fadd float %92, %109
>  %113 = fadd float %93, %110
>  %114 = fadd float %94, %111
>  %115 = fadd float %50, %59
>  %116 = call float @llvm.log2.f32(float %65)
>  %117 = call float @llvm.log2.f32(float %66)
>  %118 = call float @llvm.log2.f32(float %67)
>  %119 = fmul float %116, %29
>  %120 = fmul float %117, %29
>  %121 = fmul float %118, %29
>  %122 = call float @llvm.AMDIL.exp.(float %119)
>  %123 = call float @llvm.AMDIL.exp.(float %120)
>  %124 = call float @llvm.AMDIL.exp.(float %121)
>  %125 = fmul float %65, %23
>  %126 = fmul float %66, %25
>  %127 = fadd float %126, %125
>  %128 = fmul float %67, %27
>  %129 = fadd float %127, %128
>  %130 = fmul float %122, %129
>  %131 = fmul float %123, %129
>  %132 = fmul float %124, %129
>  %133 = fadd float %130, %112
>  %134 = fadd float %131, %113
>  %135 = fadd float %132, %114
>  %136 = fadd float %68, %115
>  %137 = call float @llvm.log2.f32(float %74)
>  %138 = call float @llvm.log2.f32(float %75)
>  %139 = call float @llvm.log2.f32(float %76)
>  %140 = fmul float %137, %29
>  %141 = fmul float %138, %29
>  %142 = fmul float %139, %29
>  %143 = call float @llvm.AMDIL.exp.(float %140)
>  %144 = call float @llvm.AMDIL.exp.(float %141)
>  %145 = call float @llvm.AMDIL.exp.(float %142)
>  %146 = fmul float %74, %23
>  %147 = fmul float %75, %25
>  %148 = fadd float %147, %146
>  %149 = fmul float %76, %27
>  %150 = fadd float %148, %149
>  %151 = fmul float %143, %150
>  %152 = fmul float %144, %150
>  %153 = fmul float %145, %150
>  %154 = fadd float %151, %133
>  %155 = fadd float %152, %134
>  %156 = fadd float %153, %135
>  %157 = fadd float %77, %136
>  %158 = fmul float %154, 2.500000e-01
>  %159 = fmul float %155, 2.500000e-01
>  %160 = fmul float %156, 2.500000e-01
>  %161 = fmul float %157, 2.500000e-01
>  %162 = call i32 @llvm.SI.packf16(float %158, float %159)
>  %163 = bitcast i32 %162 to float
>  %164 = call i32 @llvm.SI.packf16(float %160, float %161)
>  %165 = bitcast i32 %164 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %163, float %165, float %163, float %165)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: nounwind readonly
>declare float @llvm.log2.f32(float) #2
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.exp.(float) #3
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { nounwind readonly }
>attributes #3 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430202
>c0420100
>bf8c0070
>c0008500
>bf8c007f
>100c0401
>c0010501
>bf8c007f
>d2820006
>04180503
>c0018502
>bf8c007f
>d2820006
>04180704
>c8200500
>c8210501
>c81c0400
>c81d0401
>f0800f00
>00430707
>bf8c0770
>10160e01
>d282000b
>042c0508
>d282000b
>042c0709
>7e184f08
>c0000503
>bf8c007f
>10181800
>7e184b0c
>1018170c
>7e1a4f03
>101a1a00
>7e1a4b0d
>d2820011
>04320d0d
>c8340900
>c8350901
>c8300800
>c8310801
>f0800f00
>00430c0c
>bf8c0770
>10201801
>d2820010
>0440050d
>d2820010
>0440070e
>7e244f0d
>10242400
>7e244b12
>d2820015
>04462112
>c8480d00
>c8490d01
>c8440c00
>c8450c01
>f0800f00
>00431111
>bf8c0770
>10002201
>d2820000
>04000512
>d2820000
>04000713
>7e024f12
>10020200
>7e024b01
>d2820001
>04560101
>100202ff
>3e800000
>7e2a4f07
>102a2a00
>7e2a4b15
>102a1715
>7e2c4f02
>102c2c00
>7e2c4b16
>d2820015
>04560d16
>7e2c4f0c
>102c2c00
>7e2c4b16
>d2820015
>04562116
>7e2c4f11
>102c2c00
>7e2c4b16
>d2820015
>04560116
>102a2aff
>3e800000
>5e020315
>7e2a4f09
>102a2a00
>7e2a4b15
>10161715
>7e2a4f04
>102a2a00
>7e2a4b15
>d2820006
>042e0d15
>7e164f0e
>10161600
>7e164b0b
>d2820006
>041a210b
>7e164f13
>10161600
>7e164b0b
>d2820000
>041a010b
>100000ff
>3e800000
>06041505
>0604050f
>06040514
>100404ff
>3e800000
>5e000500
>f8001c0f
>00010001
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL OUT[3], GENERIC[20]
>DCL OUT[4], GENERIC[21]
>DCL OUT[5], GENERIC[22]
>DCL CONST[0..52]
>DCL TEMP[0..6], LOCAL
>  0: ADD TEMP[0].xy, IN[1].xyyy, CONST[48].xyyy
>  1: ADD TEMP[1].xy, IN[1].xyyy, CONST[49].xyyy
>  2: ADD TEMP[2].xy, IN[1].xyyy, CONST[50].xyyy
>  3: ADD TEMP[3].xy, IN[1].xyyy, CONST[51].xyyy
>  4: MAD TEMP[4], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  5: MOV TEMP[5].xw, TEMP[4].xxxw
>  6: MAD TEMP[6].x, TEMP[4].zzzz, CONST[0].zzzz, -TEMP[4].wwww
>  7: MOV TEMP[5].z, TEMP[6].xxxx
>  8: MOV TEMP[5].y, -TEMP[4].yyyy
>  9: MAD TEMP[5].xy, CONST[52].xyyy, TEMP[4].wwww, TEMP[5].xyyy
> 10: MOV OUT[2], TEMP[0]
> 11: MOV OUT[3], TEMP[1]
> 12: MOV OUT[4], TEMP[2]
> 13: MOV OUT[5], TEMP[3]
> 14: MOV OUT[0], TEMP[5]
> 15: MOV OUT[1], TEMP[4]
> 16: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 192
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 193
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 196
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 197
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 200
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 201
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 204
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 205
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 208
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 209
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %38 = load <16 x i8> addrspace(2)* %37, !tbaa !0
>  %39 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %38, i32 0, i32 %5)
>  %40 = extractelement <4 x float> %39, i32 0
>  %41 = extractelement <4 x float> %39, i32 1
>  %42 = extractelement <4 x float> %39, i32 2
>  %43 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %44 = load <16 x i8> addrspace(2)* %43, !tbaa !0
>  %45 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %44, i32 0, i32 %5)
>  %46 = extractelement <4 x float> %45, i32 0
>  %47 = extractelement <4 x float> %45, i32 1
>  %48 = fadd float %46, %18
>  %49 = fadd float %47, %20
>  %50 = fadd float %46, %22
>  %51 = fadd float %47, %24
>  %52 = fadd float %46, %26
>  %53 = fadd float %47, %28
>  %54 = fadd float %46, %30
>  %55 = fadd float %47, %32
>  %56 = fmul float %40, %14
>  %57 = fadd float %56, %12
>  %58 = fmul float %41, %14
>  %59 = fadd float %58, %12
>  %60 = fmul float %42, %14
>  %61 = fadd float %60, %12
>  %62 = fmul float %40, %12
>  %63 = fadd float %62, %14
>  %64 = fsub float -0.000000e+00, %63
>  %65 = fmul float %61, %16
>  %66 = fadd float %65, %64
>  %67 = fsub float -0.000000e+00, %59
>  %68 = fmul float %34, %63
>  %69 = fadd float %68, %57
>  %70 = fmul float %36, %63
>  %71 = fadd float %70, %67
>  %72 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %73 = load float addrspace(2)* addrspace(2)* %72, !tbaa !0
>  %74 = getelementptr float addrspace(2)* %73, i32 0
>  %75 = load float addrspace(2)* %74, !tbaa !0
>  %76 = fmul float %75, %57
>  %77 = getelementptr float addrspace(2)* %73, i32 1
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = fmul float %78, %59
>  %80 = fadd float %76, %79
>  %81 = getelementptr float addrspace(2)* %73, i32 2
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = fmul float %82, %61
>  %84 = fadd float %80, %83
>  %85 = getelementptr float addrspace(2)* %73, i32 3
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = fmul float %86, %63
>  %88 = fadd float %84, %87
>  %89 = getelementptr float addrspace(2)* %73, i32 4
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = fmul float %90, %57
>  %92 = getelementptr float addrspace(2)* %73, i32 5
>  %93 = load float addrspace(2)* %92, !tbaa !0
>  %94 = fmul float %93, %59
>  %95 = fadd float %91, %94
>  %96 = getelementptr float addrspace(2)* %73, i32 6
>  %97 = load float addrspace(2)* %96, !tbaa !0
>  %98 = fmul float %97, %61
>  %99 = fadd float %95, %98
>  %100 = getelementptr float addrspace(2)* %73, i32 7
>  %101 = load float addrspace(2)* %100, !tbaa !0
>  %102 = fmul float %101, %63
>  %103 = fadd float %99, %102
>  %104 = getelementptr float addrspace(2)* %73, i32 8
>  %105 = load float addrspace(2)* %104, !tbaa !0
>  %106 = fmul float %105, %57
>  %107 = getelementptr float addrspace(2)* %73, i32 9
>  %108 = load float addrspace(2)* %107, !tbaa !0
>  %109 = fmul float %108, %59
>  %110 = fadd float %106, %109
>  %111 = getelementptr float addrspace(2)* %73, i32 10
>  %112 = load float addrspace(2)* %111, !tbaa !0
>  %113 = fmul float %112, %61
>  %114 = fadd float %110, %113
>  %115 = getelementptr float addrspace(2)* %73, i32 11
>  %116 = load float addrspace(2)* %115, !tbaa !0
>  %117 = fmul float %116, %63
>  %118 = fadd float %114, %117
>  %119 = getelementptr float addrspace(2)* %73, i32 12
>  %120 = load float addrspace(2)* %119, !tbaa !0
>  %121 = fmul float %120, %57
>  %122 = getelementptr float addrspace(2)* %73, i32 13
>  %123 = load float addrspace(2)* %122, !tbaa !0
>  %124 = fmul float %123, %59
>  %125 = fadd float %121, %124
>  %126 = getelementptr float addrspace(2)* %73, i32 14
>  %127 = load float addrspace(2)* %126, !tbaa !0
>  %128 = fmul float %127, %61
>  %129 = fadd float %125, %128
>  %130 = getelementptr float addrspace(2)* %73, i32 15
>  %131 = load float addrspace(2)* %130, !tbaa !0
>  %132 = fmul float %131, %63
>  %133 = fadd float %129, %132
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %88, float %103, float %118, float %133)
>  %134 = getelementptr float addrspace(2)* %73, i32 16
>  %135 = load float addrspace(2)* %134, !tbaa !0
>  %136 = fmul float %135, %57
>  %137 = getelementptr float addrspace(2)* %73, i32 17
>  %138 = load float addrspace(2)* %137, !tbaa !0
>  %139 = fmul float %138, %59
>  %140 = fadd float %136, %139
>  %141 = getelementptr float addrspace(2)* %73, i32 18
>  %142 = load float addrspace(2)* %141, !tbaa !0
>  %143 = fmul float %142, %61
>  %144 = fadd float %140, %143
>  %145 = getelementptr float addrspace(2)* %73, i32 19
>  %146 = load float addrspace(2)* %145, !tbaa !0
>  %147 = fmul float %146, %63
>  %148 = fadd float %144, %147
>  %149 = getelementptr float addrspace(2)* %73, i32 20
>  %150 = load float addrspace(2)* %149, !tbaa !0
>  %151 = fmul float %150, %57
>  %152 = getelementptr float addrspace(2)* %73, i32 21
>  %153 = load float addrspace(2)* %152, !tbaa !0
>  %154 = fmul float %153, %59
>  %155 = fadd float %151, %154
>  %156 = getelementptr float addrspace(2)* %73, i32 22
>  %157 = load float addrspace(2)* %156, !tbaa !0
>  %158 = fmul float %157, %61
>  %159 = fadd float %155, %158
>  %160 = getelementptr float addrspace(2)* %73, i32 23
>  %161 = load float addrspace(2)* %160, !tbaa !0
>  %162 = fmul float %161, %63
>  %163 = fadd float %159, %162
>  %164 = getelementptr float addrspace(2)* %73, i32 24
>  %165 = load float addrspace(2)* %164, !tbaa !0
>  %166 = fmul float %165, %57
>  %167 = getelementptr float addrspace(2)* %73, i32 25
>  %168 = load float addrspace(2)* %167, !tbaa !0
>  %169 = fmul float %168, %59
>  %170 = fadd float %166, %169
>  %171 = getelementptr float addrspace(2)* %73, i32 26
>  %172 = load float addrspace(2)* %171, !tbaa !0
>  %173 = fmul float %172, %61
>  %174 = fadd float %170, %173
>  %175 = getelementptr float addrspace(2)* %73, i32 27
>  %176 = load float addrspace(2)* %175, !tbaa !0
>  %177 = fmul float %176, %63
>  %178 = fadd float %174, %177
>  %179 = getelementptr float addrspace(2)* %73, i32 28
>  %180 = load float addrspace(2)* %179, !tbaa !0
>  %181 = fmul float %180, %57
>  %182 = getelementptr float addrspace(2)* %73, i32 29
>  %183 = load float addrspace(2)* %182, !tbaa !0
>  %184 = fmul float %183, %59
>  %185 = fadd float %181, %184
>  %186 = getelementptr float addrspace(2)* %73, i32 30
>  %187 = load float addrspace(2)* %186, !tbaa !0
>  %188 = fmul float %187, %61
>  %189 = fadd float %185, %188
>  %190 = getelementptr float addrspace(2)* %73, i32 31
>  %191 = load float addrspace(2)* %190, !tbaa !0
>  %192 = fmul float %191, %63
>  %193 = fadd float %189, %192
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %148, float %163, float %178, float %193)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %48, float %49, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %50, float %51, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %52, float %53, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %54, float %55, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %69, float %71, float %66, float %63)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840700
>bf8c007f
>e00c2000
>80020500
>c0410100
>bf8c0070
>c0020301
>c0028300
>bf8c007f
>7e060205
>d2820002
>040c0905
>d2820001
>040c0906
>c0400102
>bf8c007f
>c004010d
>bf8c007f
>10080208
>c004010c
>bf8c007f
>d2820009
>04120408
>d2820004
>040c0907
>c004010e
>bf8c007f
>d2820009
>04260808
>7e060204
>d2820003
>040c0b05
>c002010f
>bf8c007f
>d2820005
>04260604
>c0020109
>bf8c007f
>100c0204
>c0020108
>bf8c007f
>d2820006
>041a0404
>c002010a
>bf8c007f
>d2820006
>041a0804
>c002010b
>bf8c007f
>d2820006
>041a0604
>c0020105
>bf8c007f
>100e0204
>c0020104
>bf8c007f
>d2820007
>041e0404
>c0020106
>bf8c007f
>d2820007
>041e0804
>c0020107
>bf8c007f
>d2820007
>041e0604
>c0020101
>bf8c007f
>10100204
>c0020100
>bf8c007f
>d2820008
>04220404
>c0020102
>bf8c007f
>d2820008
>04220804
>c0020103
>bf8c007f
>d2820008
>04220604
>f80000ef
>05060708
>c002011d
>bf8c000f
>100a0204
>c002011c
>bf8c007f
>d2820005
>04160404
>c002011e
>bf8c007f
>d2820005
>04160804
>c002011f
>bf8c007f
>d2820005
>04160604
>c0020119
>bf8c007f
>100c0204
>c0020118
>bf8c007f
>d2820006
>041a0404
>c002011a
>bf8c007f
>d2820006
>041a0804
>c002011b
>bf8c007f
>d2820006
>041a0604
>c0020115
>bf8c007f
>100e0204
>c0020114
>bf8c007f
>d2820007
>041e0404
>c0020116
>bf8c007f
>d2820007
>041e0804
>c0020117
>bf8c007f
>d2820007
>041e0604
>c0020111
>bf8c007f
>10100204
>c0020110
>bf8c007f
>d2820008
>04220404
>c0020112
>bf8c007f
>d2820008
>04220804
>c0000113
>bf8c007f
>d2820008
>04220600
>f80000ff
>05060708
>c0820704
>bf8c000f
>e00c2000
>80010500
>c00003c1
>bf8c0070
>06120c00
>c00003c0
>bf8c007f
>06140a00
>7e000280
>f800020f
>0000090a
>c00003c5
>bf8c000f
>06120c00
>c00003c4
>bf8c007f
>06140a00
>f800021f
>0000090a
>c00003c9
>bf8c000f
>06120c00
>c00003c8
>bf8c007f
>06140a00
>f800022f
>0000090a
>c00003cd
>bf8c000f
>06120c00
>c00003cc
>bf8c007f
>060a0a00
>f800023f
>00000905
>c00003d0
>bf8c000f
>d2820000
>040a0600
>c0000302
>bf8c007f
>10040800
>08040702
>c00003d1
>bf8c007f
>10080600
>08020304
>f80008cf
>03020100
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL IN[2], GENERIC[21], PERSPECTIVE
>DCL IN[3], GENERIC[22], PERSPECTIVE
>DCL IN[4], GENERIC[23], PERSPECTIVE
>DCL IN[5], GENERIC[24], PERSPECTIVE
>DCL IN[6], GENERIC[25], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL CONST[0..3]
>DCL TEMP[0..7], LOCAL
>DCL TEMP[8], ARRAY(1), LOCAL
>IMM[0] FLT32 {    0.2185,     0.2013,     0.0821,     0.0262}
>IMM[1] FLT32 {    0.0461,     0.0162,     0.0102,     0.0000}
>  0: MOV TEMP[0].xy, IN[4].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MOV TEMP[1].xy, IN[5].xyyy
>  3: TEX TEMP[1], TEMP[1], SAMP[0], 2D
>  4: MOV TEMP[2].xy, IN[6].xyyy
>  5: TEX TEMP[2], TEMP[2], SAMP[0], 2D
>  6: MOV TEMP[3].xy, IN[1].xyyy
>  7: TEX TEMP[3], TEMP[3], SAMP[0], 2D
>  8: ADD TEMP[3], TEMP[3], TEMP[0]
>  9: MOV TEMP[4].xy, IN[0].xyyy
> 10: TEX TEMP[4], TEMP[4], SAMP[0], 2D
> 11: MUL TEMP[4], TEMP[4], IMM[0].yyyy
> 12: MAD TEMP[3], TEMP[3], IMM[0].xxxx, TEMP[4]
> 13: MOV TEMP[4].xy, IN[2].xyyy
> 14: TEX TEMP[4], TEMP[4], SAMP[0], 2D
> 15: ADD TEMP[4], TEMP[4], TEMP[1]
> 16: MAD TEMP[4], TEMP[4], IMM[0].zzzz, TEMP[3]
> 17: MOV TEMP[5].xy, IN[3].xyyy
> 18: TEX TEMP[6], TEMP[5], SAMP[0], 2D
> 19: ADD TEMP[6], TEMP[6], TEMP[2]
> 20: ADD TEMP[3].xy, IN[0].xyyy, CONST[0].xyyy
> 21: ADD TEMP[0].xy, IN[0].xyyy, -CONST[0].xyyy
> 22: ADD TEMP[5].xy, IN[0].xyyy, CONST[1].xyyy
> 23: ADD TEMP[1].xy, IN[0].xyyy, -CONST[1].xyyy
> 24: ADD TEMP[7].xy, IN[0].xyyy, CONST[2].xyyy
> 25: ADD TEMP[2].xy, IN[0].xyyy, -CONST[2].xyyy
> 26: MOV TEMP[0].xy, TEMP[0].xyyy
> 27: TEX TEMP[0], TEMP[0], SAMP[0], 2D
> 28: MOV TEMP[1].xy, TEMP[1].xyyy
> 29: TEX TEMP[1], TEMP[1], SAMP[0], 2D
> 30: MOV TEMP[2].xy, TEMP[2].xyyy
> 31: TEX TEMP[2], TEMP[2], SAMP[0], 2D
> 32: MOV TEMP[3].xy, TEMP[3].xyyy
> 33: TEX TEMP[3], TEMP[3], SAMP[0], 2D
> 34: ADD TEMP[0], TEMP[3], TEMP[0]
> 35: MAD TEMP[3], TEMP[6], IMM[1].xxxx, TEMP[4]
> 36: MAD TEMP[0], TEMP[0], IMM[0].wwww, TEMP[3]
> 37: MOV TEMP[3].xy, TEMP[5].xyyy
> 38: TEX TEMP[3], TEMP[3], SAMP[0], 2D
> 39: ADD TEMP[1], TEMP[3], TEMP[1]
> 40: MAD TEMP[0], TEMP[1], IMM[1].yyyy, TEMP[0]
> 41: MOV TEMP[1].xy, TEMP[7].xyyy
> 42: TEX TEMP[1], TEMP[1], SAMP[0], 2D
> 43: ADD TEMP[1], TEMP[1], TEMP[2]
> 44: MAD TEMP[0], TEMP[1], IMM[1].zzzz, TEMP[0]
> 45: MOV TEMP[7].w, TEMP[0].wwww
> 46: MUL TEMP[7].xyz, TEMP[0].xyzz, CONST[3].xyzz
> 47: MOV TEMP[8], TEMP[7]
> 48: MOV OUT[0], TEMP[8]
> 49: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 0
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 1
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 4
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 5
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 8
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 9
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 12
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 13
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 14
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %41 = load <32 x i8> addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %43 = load <16 x i8> addrspace(2)* %42, !tbaa !0
>  %44 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %45 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %46 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %47 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %48 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %49 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %50 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %3, <2 x i32> %5)
>  %51 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %3, <2 x i32> %5)
>  %52 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %3, <2 x i32> %5)
>  %53 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %3, <2 x i32> %5)
>  %54 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %3, <2 x i32> %5)
>  %55 = call float @llvm.SI.fs.interp(i32 1, i32 5, i32 %3, <2 x i32> %5)
>  %56 = call float @llvm.SI.fs.interp(i32 0, i32 6, i32 %3, <2 x i32> %5)
>  %57 = call float @llvm.SI.fs.interp(i32 1, i32 6, i32 %3, <2 x i32> %5)
>  %58 = bitcast float %52 to i32
>  %59 = bitcast float %53 to i32
>  %60 = insertelement <2 x i32> undef, i32 %58, i32 0
>  %61 = insertelement <2 x i32> %60, i32 %59, i32 1
>  %62 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %61, <32 x i8> %41, <16 x i8> %43, i32 2)
>  %63 = extractelement <4 x float> %62, i32 0
>  %64 = extractelement <4 x float> %62, i32 1
>  %65 = extractelement <4 x float> %62, i32 2
>  %66 = extractelement <4 x float> %62, i32 3
>  %67 = bitcast float %54 to i32
>  %68 = bitcast float %55 to i32
>  %69 = insertelement <2 x i32> undef, i32 %67, i32 0
>  %70 = insertelement <2 x i32> %69, i32 %68, i32 1
>  %71 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %70, <32 x i8> %41, <16 x i8> %43, i32 2)
>  %72 = extractelement <4 x float> %71, i32 0
>  %73 = extractelement <4 x float> %71, i32 1
>  %74 = extractelement <4 x float> %71, i32 2
>  %75 = extractelement <4 x float> %71, i32 3
>  %76 = bitcast float %56 to i32
>  %77 = bitcast float %57 to i32
>  %78 = insertelement <2 x i32> undef, i32 %76, i32 0
>  %79 = insertelement <2 x i32> %78, i32 %77, i32 1
>  %80 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %79, <32 x i8> %41, <16 x i8> %43, i32 2)
>  %81 = extractelement <4 x float> %80, i32 0
>  %82 = extractelement <4 x float> %80, i32 1
>  %83 = extractelement <4 x float> %80, i32 2
>  %84 = extractelement <4 x float> %80, i32 3
>  %85 = bitcast float %46 to i32
>  %86 = bitcast float %47 to i32
>  %87 = insertelement <2 x i32> undef, i32 %85, i32 0
>  %88 = insertelement <2 x i32> %87, i32 %86, i32 1
>  %89 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %88, <32 x i8> %41, <16 x i8> %43, i32 2)
>  %90 = extractelement <4 x float> %89, i32 0
>  %91 = extractelement <4 x float> %89, i32 1
>  %92 = extractelement <4 x float> %89, i32 2
>  %93 = extractelement <4 x float> %89, i32 3
>  %94 = fadd float %90, %63
>  %95 = fadd float %91, %64
>  %96 = fadd float %92, %65
>  %97 = fadd float %93, %66
>  %98 = bitcast float %44 to i32
>  %99 = bitcast float %45 to i32
>  %100 = insertelement <2 x i32> undef, i32 %98, i32 0
>  %101 = insertelement <2 x i32> %100, i32 %99, i32 1
>  %102 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %101, <32 x i8> %41, <16 x i8> %43, i32 2)
>  %103 = extractelement <4 x float> %102, i32 0
>  %104 = extractelement <4 x float> %102, i32 1
>  %105 = extractelement <4 x float> %102, i32 2
>  %106 = extractelement <4 x float> %102, i32 3
>  %107 = fmul float %103, 0x3FC9C432C0000000
>  %108 = fmul float %104, 0x3FC9C432C0000000
>  %109 = fmul float %105, 0x3FC9C432C0000000
>  %110 = fmul float %106, 0x3FC9C432C0000000
>  %111 = fmul float %94, 0x3FCBF7CEE0000000
>  %112 = fadd float %111, %107
>  %113 = fmul float %95, 0x3FCBF7CEE0000000
>  %114 = fadd float %113, %108
>  %115 = fmul float %96, 0x3FCBF7CEE0000000
>  %116 = fadd float %115, %109
>  %117 = fmul float %97, 0x3FCBF7CEE0000000
>  %118 = fadd float %117, %110
>  %119 = bitcast float %48 to i32
>  %120 = bitcast float %49 to i32
>  %121 = insertelement <2 x i32> undef, i32 %119, i32 0
>  %122 = insertelement <2 x i32> %121, i32 %120, i32 1
>  %123 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %122, <32 x i8> %41, <16 x i8> %43, i32 2)
>  %124 = extractelement <4 x float> %123, i32 0
>  %125 = extractelement <4 x float> %123, i32 1
>  %126 = extractelement <4 x float> %123, i32 2
>  %127 = extractelement <4 x float> %123, i32 3
>  %128 = fadd float %124, %72
>  %129 = fadd float %125, %73
>  %130 = fadd float %126, %74
>  %131 = fadd float %127, %75
>  %132 = fmul float %128, 0x3FB5048160000000
>  %133 = fadd float %132, %112
>  %134 = fmul float %129, 0x3FB5048160000000
>  %135 = fadd float %134, %114
>  %136 = fmul float %130, 0x3FB5048160000000
>  %137 = fadd float %136, %116
>  %138 = fmul float %131, 0x3FB5048160000000
>  %139 = fadd float %138, %118
>  %140 = bitcast float %50 to i32
>  %141 = bitcast float %51 to i32
>  %142 = insertelement <2 x i32> undef, i32 %140, i32 0
>  %143 = insertelement <2 x i32> %142, i32 %141, i32 1
>  %144 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %143, <32 x i8> %41, <16 x i8> %43, i32 2)
>  %145 = extractelement <4 x float> %144, i32 0
>  %146 = extractelement <4 x float> %144, i32 1
>  %147 = extractelement <4 x float> %144, i32 2
>  %148 = extractelement <4 x float> %144, i32 3
>  %149 = fadd float %145, %81
>  %150 = fadd float %146, %82
>  %151 = fadd float %147, %83
>  %152 = fadd float %148, %84
>  %153 = fadd float %44, %23
>  %154 = fadd float %45, %25
>  %155 = fsub float -0.000000e+00, %23
>  %156 = fadd float %44, %155
>  %157 = fsub float -0.000000e+00, %25
>  %158 = fadd float %45, %157
>  %159 = fadd float %44, %27
>  %160 = fadd float %45, %29
>  %161 = fsub float -0.000000e+00, %27
>  %162 = fadd float %44, %161
>  %163 = fsub float -0.000000e+00, %29
>  %164 = fadd float %45, %163
>  %165 = fadd float %44, %31
>  %166 = fadd float %45, %33
>  %167 = fsub float -0.000000e+00, %31
>  %168 = fadd float %44, %167
>  %169 = fsub float -0.000000e+00, %33
>  %170 = fadd float %45, %169
>  %171 = bitcast float %156 to i32
>  %172 = bitcast float %158 to i32
>  %173 = insertelement <2 x i32> undef, i32 %171, i32 0
>  %174 = insertelement <2 x i32> %173, i32 %172, i32 1
>  %175 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %174, <32 x i8> %41, <16 x i8> %43, i32 2)
>  %176 = extractelement <4 x float> %175, i32 0
>  %177 = extractelement <4 x float> %175, i32 1
>  %178 = extractelement <4 x float> %175, i32 2
>  %179 = extractelement <4 x float> %175, i32 3
>  %180 = bitcast float %162 to i32
>  %181 = bitcast float %164 to i32
>  %182 = insertelement <2 x i32> undef, i32 %180, i32 0
>  %183 = insertelement <2 x i32> %182, i32 %181, i32 1
>  %184 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %183, <32 x i8> %41, <16 x i8> %43, i32 2)
>  %185 = extractelement <4 x float> %184, i32 0
>  %186 = extractelement <4 x float> %184, i32 1
>  %187 = extractelement <4 x float> %184, i32 2
>  %188 = extractelement <4 x float> %184, i32 3
>  %189 = bitcast float %168 to i32
>  %190 = bitcast float %170 to i32
>  %191 = insertelement <2 x i32> undef, i32 %189, i32 0
>  %192 = insertelement <2 x i32> %191, i32 %190, i32 1
>  %193 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %192, <32 x i8> %41, <16 x i8> %43, i32 2)
>  %194 = extractelement <4 x float> %193, i32 0
>  %195 = extractelement <4 x float> %193, i32 1
>  %196 = extractelement <4 x float> %193, i32 2
>  %197 = extractelement <4 x float> %193, i32 3
>  %198 = bitcast float %153 to i32
>  %199 = bitcast float %154 to i32
>  %200 = insertelement <2 x i32> undef, i32 %198, i32 0
>  %201 = insertelement <2 x i32> %200, i32 %199, i32 1
>  %202 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %201, <32 x i8> %41, <16 x i8> %43, i32 2)
>  %203 = extractelement <4 x float> %202, i32 0
>  %204 = extractelement <4 x float> %202, i32 1
>  %205 = extractelement <4 x float> %202, i32 2
>  %206 = extractelement <4 x float> %202, i32 3
>  %207 = fadd float %203, %176
>  %208 = fadd float %204, %177
>  %209 = fadd float %205, %178
>  %210 = fadd float %206, %179
>  %211 = fmul float %149, 0x3FA79A6B60000000
>  %212 = fadd float %211, %133
>  %213 = fmul float %150, 0x3FA79A6B60000000
>  %214 = fadd float %213, %135
>  %215 = fmul float %151, 0x3FA79A6B60000000
>  %216 = fadd float %215, %137
>  %217 = fmul float %152, 0x3FA79A6B60000000
>  %218 = fadd float %217, %139
>  %219 = fmul float %207, 0x3F9AD42C40000000
>  %220 = fadd float %219, %212
>  %221 = fmul float %208, 0x3F9AD42C40000000
>  %222 = fadd float %221, %214
>  %223 = fmul float %209, 0x3F9AD42C40000000
>  %224 = fadd float %223, %216
>  %225 = fmul float %210, 0x3F9AD42C40000000
>  %226 = fadd float %225, %218
>  %227 = bitcast float %159 to i32
>  %228 = bitcast float %160 to i32
>  %229 = insertelement <2 x i32> undef, i32 %227, i32 0
>  %230 = insertelement <2 x i32> %229, i32 %228, i32 1
>  %231 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %230, <32 x i8> %41, <16 x i8> %43, i32 2)
>  %232 = extractelement <4 x float> %231, i32 0
>  %233 = extractelement <4 x float> %231, i32 1
>  %234 = extractelement <4 x float> %231, i32 2
>  %235 = extractelement <4 x float> %231, i32 3
>  %236 = fadd float %232, %185
>  %237 = fadd float %233, %186
>  %238 = fadd float %234, %187
>  %239 = fadd float %235, %188
>  %240 = fmul float %236, 0x3F9096BBA0000000
>  %241 = fadd float %240, %220
>  %242 = fmul float %237, 0x3F9096BBA0000000
>  %243 = fadd float %242, %222
>  %244 = fmul float %238, 0x3F9096BBA0000000
>  %245 = fadd float %244, %224
>  %246 = fmul float %239, 0x3F9096BBA0000000
>  %247 = fadd float %246, %226
>  %248 = bitcast float %165 to i32
>  %249 = bitcast float %166 to i32
>  %250 = insertelement <2 x i32> undef, i32 %248, i32 0
>  %251 = insertelement <2 x i32> %250, i32 %249, i32 1
>  %252 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %251, <32 x i8> %41, <16 x i8> %43, i32 2)
>  %253 = extractelement <4 x float> %252, i32 0
>  %254 = extractelement <4 x float> %252, i32 1
>  %255 = extractelement <4 x float> %252, i32 2
>  %256 = extractelement <4 x float> %252, i32 3
>  %257 = fadd float %253, %194
>  %258 = fadd float %254, %195
>  %259 = fadd float %255, %196
>  %260 = fadd float %256, %197
>  %261 = fmul float %257, 0x3F84E3BCE0000000
>  %262 = fadd float %261, %241
>  %263 = fmul float %258, 0x3F84E3BCE0000000
>  %264 = fadd float %263, %243
>  %265 = fmul float %259, 0x3F84E3BCE0000000
>  %266 = fadd float %265, %245
>  %267 = fmul float %260, 0x3F84E3BCE0000000
>  %268 = fadd float %267, %247
>  %269 = fmul float %262, %35
>  %270 = fmul float %264, %37
>  %271 = fmul float %266, %39
>  %272 = call i32 @llvm.SI.packf16(float %269, float %270)
>  %273 = bitcast i32 %272 to float
>  %274 = call i32 @llvm.SI.packf16(float %271, float %268)
>  %275 = bitcast i32 %274 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %273, float %275, float %273, float %275)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c1100
>c80d1101
>c8081000
>c8091001
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430202
>c81c0500
>c81d0501
>c8180400
>c8190401
>f0800f00
>00430606
>bf8c0770
>061e0b09
>c8740100
>c8750101
>c8700000
>c8710001
>f0800f00
>00430a1c
>bf8c0770
>10201aff
>3e4e2196
>7e1c02ff
>3e5fbe77
>d2820018
>04421d0f
>c8401500
>c8411501
>c83c1400
>c83d1401
>f0800f00
>00430f0f
>c8500900
>c8510901
>c84c0800
>c84d0801
>f0800f00
>00431313
>bf8c0770
>06322516
>7e2e02ff
>3da8240b
>d2820022
>04622f19
>c8641900
>c8651901
>c8601800
>c8611801
>f0800f00
>00431818
>c87c0d00
>c87d0d01
>c8780c00
>c8790c01
>f0800f00
>00431e1e
>bf8c0770
>06023721
>7e0002ff
>3d3cd35b
>d282002a
>048a0101
>c0400100
>bf8c007f
>c0010101
>bf8c007f
>0a463a02
>c0018100
>bf8c007f
>0a443803
>f0800f00
>00432222
>064e3a02
>064c3803
>f0800f00
>00432626
>bf8c0770
>06564b29
>7e0202ff
>3cd6a162
>d2820033
>04aa032b
>c0010105
>bf8c007f
>0a563a02
>c0018104
>bf8c007f
>0a543803
>f0800f00
>00432a2a
>065e3a02
>065c3803
>f0800f00
>00432e2e
>bf8c0770
>06685b31
>7e6402ff
>3c84b5dd
>d282003b
>04ce6534
>c0010109
>bf8c007f
>0a683a02
>c0018108
>bf8c007f
>0a663803
>f0800f00
>00433333
>06703a02
>066e3803
>f0800f00
>00433737
>bf8c0770
>063a6d3a
>7e3802ff
>3c271de7
>d282001d
>04ee391d
>06760908
>107818ff
>3e4e2196
>d282003b
>04f21d3b
>06782315
>d282003b
>04ee2f3c
>06783520
>d282003b
>04ee013c
>06784928
>d282003b
>04ee033c
>06785930
>d282003b
>04ee653c
>06786b39
>d282003b
>04ee393c
>c001010e
>bf8c007f
>10767602
>5e3a3b3b
>06760707
>107816ff
>3e4e2196
>d282003b
>04f21d3b
>06782114
>d282003b
>04ee2f3c
>0678331f
>d282003b
>04ee013c
>06784727
>d282003b
>04ee033c
>0678572f
>d282003b
>04ee653c
>06786938
>d282003b
>04ee393c
>c001010d
>bf8c007f
>10767602
>06040506
>100614ff
>3e4e2196
>d2820002
>040e1d02
>06061f13
>d2820002
>040a2f03
>0606311e
>d2820000
>040a0103
>06044526
>d2820000
>04020302
>0602552e
>d2820000
>04026501
>06026737
>d2820000
>04023901
>c000010c
>bf8c007f
>10000000
>5e007700
>f8001c0f
>1d001d00
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL OUT[3], GENERIC[20]
>DCL OUT[4], GENERIC[21]
>DCL OUT[5], GENERIC[22]
>DCL OUT[6], GENERIC[23]
>DCL OUT[7], GENERIC[24]
>DCL OUT[8], GENERIC[25]
>DCL CONST[0..51]
>DCL TEMP[0..9], LOCAL
>  0: ADD TEMP[0].xy, IN[1].xyyy, CONST[48].xyyy
>  1: ADD TEMP[1].xy, IN[1].xyyy, CONST[49].xyyy
>  2: ADD TEMP[2].xy, IN[1].xyyy, CONST[50].xyyy
>  3: ADD TEMP[3].xy, IN[1].xyyy, -CONST[48].xyyy
>  4: ADD TEMP[4].xy, IN[1].xyyy, -CONST[49].xyyy
>  5: ADD TEMP[5].xy, IN[1].xyyy, -CONST[50].xyyy
>  6: MAD TEMP[6], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  7: MOV TEMP[7].xw, TEMP[6].xxxw
>  8: MOV TEMP[8].xy, IN[1].xyxx
>  9: MAD TEMP[9].x, TEMP[6].zzzz, CONST[0].zzzz, -TEMP[6].wwww
> 10: MOV TEMP[7].z, TEMP[9].xxxx
> 11: MOV TEMP[7].y, -TEMP[6].yyyy
> 12: MAD TEMP[7].xy, CONST[51].xyyy, TEMP[6].wwww, TEMP[7].xyyy
> 13: MOV OUT[2], TEMP[8]
> 14: MOV OUT[3], TEMP[0]
> 15: MOV OUT[4], TEMP[1]
> 16: MOV OUT[5], TEMP[2]
> 17: MOV OUT[0], TEMP[7]
> 18: MOV OUT[6], TEMP[3]
> 19: MOV OUT[1], TEMP[6]
> 20: MOV OUT[7], TEMP[4]
> 21: MOV OUT[8], TEMP[5]
> 22: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 192
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 193
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 196
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 197
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 200
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 201
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 204
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 205
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %34 = load <16 x i8> addrspace(2)* %33, !tbaa !0
>  %35 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %34, i32 0, i32 %5)
>  %36 = extractelement <4 x float> %35, i32 0
>  %37 = extractelement <4 x float> %35, i32 1
>  %38 = extractelement <4 x float> %35, i32 2
>  %39 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %40 = load <16 x i8> addrspace(2)* %39, !tbaa !0
>  %41 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %40, i32 0, i32 %5)
>  %42 = extractelement <4 x float> %41, i32 0
>  %43 = extractelement <4 x float> %41, i32 1
>  %44 = fadd float %42, %18
>  %45 = fadd float %43, %20
>  %46 = fadd float %42, %22
>  %47 = fadd float %43, %24
>  %48 = fadd float %42, %26
>  %49 = fadd float %43, %28
>  %50 = fsub float -0.000000e+00, %18
>  %51 = fadd float %42, %50
>  %52 = fsub float -0.000000e+00, %20
>  %53 = fadd float %43, %52
>  %54 = fsub float -0.000000e+00, %22
>  %55 = fadd float %42, %54
>  %56 = fsub float -0.000000e+00, %24
>  %57 = fadd float %43, %56
>  %58 = fsub float -0.000000e+00, %26
>  %59 = fadd float %42, %58
>  %60 = fsub float -0.000000e+00, %28
>  %61 = fadd float %43, %60
>  %62 = fmul float %36, %14
>  %63 = fadd float %62, %12
>  %64 = fmul float %37, %14
>  %65 = fadd float %64, %12
>  %66 = fmul float %38, %14
>  %67 = fadd float %66, %12
>  %68 = fmul float %36, %12
>  %69 = fadd float %68, %14
>  %70 = fsub float -0.000000e+00, %69
>  %71 = fmul float %67, %16
>  %72 = fadd float %71, %70
>  %73 = fsub float -0.000000e+00, %65
>  %74 = fmul float %30, %69
>  %75 = fadd float %74, %63
>  %76 = fmul float %32, %69
>  %77 = fadd float %76, %73
>  %78 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %79 = load float addrspace(2)* addrspace(2)* %78, !tbaa !0
>  %80 = getelementptr float addrspace(2)* %79, i32 0
>  %81 = load float addrspace(2)* %80, !tbaa !0
>  %82 = fmul float %81, %63
>  %83 = getelementptr float addrspace(2)* %79, i32 1
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = fmul float %84, %65
>  %86 = fadd float %82, %85
>  %87 = getelementptr float addrspace(2)* %79, i32 2
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = fmul float %88, %67
>  %90 = fadd float %86, %89
>  %91 = getelementptr float addrspace(2)* %79, i32 3
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = fmul float %92, %69
>  %94 = fadd float %90, %93
>  %95 = getelementptr float addrspace(2)* %79, i32 4
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = fmul float %96, %63
>  %98 = getelementptr float addrspace(2)* %79, i32 5
>  %99 = load float addrspace(2)* %98, !tbaa !0
>  %100 = fmul float %99, %65
>  %101 = fadd float %97, %100
>  %102 = getelementptr float addrspace(2)* %79, i32 6
>  %103 = load float addrspace(2)* %102, !tbaa !0
>  %104 = fmul float %103, %67
>  %105 = fadd float %101, %104
>  %106 = getelementptr float addrspace(2)* %79, i32 7
>  %107 = load float addrspace(2)* %106, !tbaa !0
>  %108 = fmul float %107, %69
>  %109 = fadd float %105, %108
>  %110 = getelementptr float addrspace(2)* %79, i32 8
>  %111 = load float addrspace(2)* %110, !tbaa !0
>  %112 = fmul float %111, %63
>  %113 = getelementptr float addrspace(2)* %79, i32 9
>  %114 = load float addrspace(2)* %113, !tbaa !0
>  %115 = fmul float %114, %65
>  %116 = fadd float %112, %115
>  %117 = getelementptr float addrspace(2)* %79, i32 10
>  %118 = load float addrspace(2)* %117, !tbaa !0
>  %119 = fmul float %118, %67
>  %120 = fadd float %116, %119
>  %121 = getelementptr float addrspace(2)* %79, i32 11
>  %122 = load float addrspace(2)* %121, !tbaa !0
>  %123 = fmul float %122, %69
>  %124 = fadd float %120, %123
>  %125 = getelementptr float addrspace(2)* %79, i32 12
>  %126 = load float addrspace(2)* %125, !tbaa !0
>  %127 = fmul float %126, %63
>  %128 = getelementptr float addrspace(2)* %79, i32 13
>  %129 = load float addrspace(2)* %128, !tbaa !0
>  %130 = fmul float %129, %65
>  %131 = fadd float %127, %130
>  %132 = getelementptr float addrspace(2)* %79, i32 14
>  %133 = load float addrspace(2)* %132, !tbaa !0
>  %134 = fmul float %133, %67
>  %135 = fadd float %131, %134
>  %136 = getelementptr float addrspace(2)* %79, i32 15
>  %137 = load float addrspace(2)* %136, !tbaa !0
>  %138 = fmul float %137, %69
>  %139 = fadd float %135, %138
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %94, float %109, float %124, float %139)
>  %140 = getelementptr float addrspace(2)* %79, i32 16
>  %141 = load float addrspace(2)* %140, !tbaa !0
>  %142 = fmul float %141, %63
>  %143 = getelementptr float addrspace(2)* %79, i32 17
>  %144 = load float addrspace(2)* %143, !tbaa !0
>  %145 = fmul float %144, %65
>  %146 = fadd float %142, %145
>  %147 = getelementptr float addrspace(2)* %79, i32 18
>  %148 = load float addrspace(2)* %147, !tbaa !0
>  %149 = fmul float %148, %67
>  %150 = fadd float %146, %149
>  %151 = getelementptr float addrspace(2)* %79, i32 19
>  %152 = load float addrspace(2)* %151, !tbaa !0
>  %153 = fmul float %152, %69
>  %154 = fadd float %150, %153
>  %155 = getelementptr float addrspace(2)* %79, i32 20
>  %156 = load float addrspace(2)* %155, !tbaa !0
>  %157 = fmul float %156, %63
>  %158 = getelementptr float addrspace(2)* %79, i32 21
>  %159 = load float addrspace(2)* %158, !tbaa !0
>  %160 = fmul float %159, %65
>  %161 = fadd float %157, %160
>  %162 = getelementptr float addrspace(2)* %79, i32 22
>  %163 = load float addrspace(2)* %162, !tbaa !0
>  %164 = fmul float %163, %67
>  %165 = fadd float %161, %164
>  %166 = getelementptr float addrspace(2)* %79, i32 23
>  %167 = load float addrspace(2)* %166, !tbaa !0
>  %168 = fmul float %167, %69
>  %169 = fadd float %165, %168
>  %170 = getelementptr float addrspace(2)* %79, i32 24
>  %171 = load float addrspace(2)* %170, !tbaa !0
>  %172 = fmul float %171, %63
>  %173 = getelementptr float addrspace(2)* %79, i32 25
>  %174 = load float addrspace(2)* %173, !tbaa !0
>  %175 = fmul float %174, %65
>  %176 = fadd float %172, %175
>  %177 = getelementptr float addrspace(2)* %79, i32 26
>  %178 = load float addrspace(2)* %177, !tbaa !0
>  %179 = fmul float %178, %67
>  %180 = fadd float %176, %179
>  %181 = getelementptr float addrspace(2)* %79, i32 27
>  %182 = load float addrspace(2)* %181, !tbaa !0
>  %183 = fmul float %182, %69
>  %184 = fadd float %180, %183
>  %185 = getelementptr float addrspace(2)* %79, i32 28
>  %186 = load float addrspace(2)* %185, !tbaa !0
>  %187 = fmul float %186, %63
>  %188 = getelementptr float addrspace(2)* %79, i32 29
>  %189 = load float addrspace(2)* %188, !tbaa !0
>  %190 = fmul float %189, %65
>  %191 = fadd float %187, %190
>  %192 = getelementptr float addrspace(2)* %79, i32 30
>  %193 = load float addrspace(2)* %192, !tbaa !0
>  %194 = fmul float %193, %67
>  %195 = fadd float %191, %194
>  %196 = getelementptr float addrspace(2)* %79, i32 31
>  %197 = load float addrspace(2)* %196, !tbaa !0
>  %198 = fmul float %197, %69
>  %199 = fadd float %195, %198
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %154, float %169, float %184, float %199)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %42, float %43, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %44, float %45, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %46, float %47, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %48, float %49, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %51, float %53, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 37, i32 0, float %55, float %57, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 38, i32 0, float %59, float %61, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %75, float %77, float %72, float %69)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840700
>bf8c007f
>e00c2000
>80020500
>c0410100
>bf8c0070
>c0020301
>c0028300
>bf8c007f
>7e060205
>d2820002
>040c0905
>d2820001
>040c0906
>c0400102
>bf8c007f
>c004010d
>bf8c007f
>10080208
>c004010c
>bf8c007f
>d2820009
>04120408
>d2820004
>040c0907
>c004010e
>bf8c007f
>d2820009
>04260808
>7e060204
>d2820003
>040c0b05
>c002010f
>bf8c007f
>d2820005
>04260604
>c0020109
>bf8c007f
>100c0204
>c0020108
>bf8c007f
>d2820006
>041a0404
>c002010a
>bf8c007f
>d2820006
>041a0804
>c002010b
>bf8c007f
>d2820006
>041a0604
>c0020105
>bf8c007f
>100e0204
>c0020104
>bf8c007f
>d2820007
>041e0404
>c0020106
>bf8c007f
>d2820007
>041e0804
>c0020107
>bf8c007f
>d2820007
>041e0604
>c0020101
>bf8c007f
>10100204
>c0020100
>bf8c007f
>d2820008
>04220404
>c0020102
>bf8c007f
>d2820008
>04220804
>c0020103
>bf8c007f
>d2820008
>04220604
>f80000ef
>05060708
>c002011d
>bf8c000f
>100a0204
>c002011c
>bf8c007f
>d2820005
>04160404
>c002011e
>bf8c007f
>d2820005
>04160804
>c002011f
>bf8c007f
>d2820005
>04160604
>c0020119
>bf8c007f
>100c0204
>c0020118
>bf8c007f
>d2820006
>041a0404
>c002011a
>bf8c007f
>d2820006
>041a0804
>c002011b
>bf8c007f
>d2820006
>041a0604
>c0020115
>bf8c007f
>100e0204
>c0020114
>bf8c007f
>d2820007
>041e0404
>c0020116
>bf8c007f
>d2820007
>041e0804
>c0020117
>bf8c007f
>d2820007
>041e0604
>c0020111
>bf8c007f
>10100204
>c0020110
>bf8c007f
>d2820008
>04220404
>c0020112
>bf8c007f
>d2820008
>04220804
>c0000113
>bf8c007f
>d2820008
>04220600
>f80000ff
>05060708
>c0820704
>bf8c000f
>e00c2000
>80010500
>7e000280
>bf8c0770
>f800020f
>00000605
>c00003c1
>bf8c000f
>06120c00
>c00083c0
>bf8c007f
>06140a01
>f800021f
>0000090a
>c00203c5
>bf8c000f
>06120c04
>c00283c4
>bf8c007f
>06140a05
>f800022f
>0000090a
>c00303c9
>bf8c000f
>06120c06
>c00383c8
>bf8c007f
>06140a07
>f800023f
>0000090a
>bf8c070f
>0a120c00
>0a140a01
>f800024f
>0000090a
>bf8c070f
>0a120c04
>0a140a05
>f800025f
>0000090a
>bf8c070f
>0a120c06
>0a0a0a07
>f800026f
>00000905
>c00003cc
>bf8c000f
>d2820000
>040a0600
>c0000302
>bf8c007f
>10040800
>08040702
>c00003cd
>bf8c007f
>10080600
>08020304
>f80008cf
>03020100
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL TEMP[0], LOCAL
>DCL TEMP[1], ARRAY(1), LOCAL
>IMM[0] FLT32 {    1.0000,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0].xyz, TEMP[0], SAMP[0], 2D
>  2: MOV TEMP[0].xyz, TEMP[0].xyzx
>  3: MOV TEMP[0].w, IMM[0].xxxx
>  4: MOV TEMP[1], TEMP[0]
>  5: MOV OUT[0], TEMP[1]
>  6: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %21 = load <32 x i8> addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %23 = load <16 x i8> addrspace(2)* %22, !tbaa !0
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %26 = bitcast float %24 to i32
>  %27 = bitcast float %25 to i32
>  %28 = insertelement <2 x i32> undef, i32 %26, i32 0
>  %29 = insertelement <2 x i32> %28, i32 %27, i32 1
>  %30 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %29, <32 x i8> %21, <16 x i8> %23, i32 2)
>  %31 = extractelement <4 x float> %30, i32 0
>  %32 = extractelement <4 x float> %30, i32 1
>  %33 = extractelement <4 x float> %30, i32 2
>  %34 = fcmp ugt float 1.000000e+00, 0.000000e+00
>  %35 = sext i1 %34 to i32
>  %36 = trunc i32 %35 to i1
>  %37 = select i1 %36, float 1.000000e+00, float -1.000000e+00
>  call void @llvm.AMDGPU.kill(float %37)
>  %38 = call i32 @llvm.SI.packf16(float %31, float %32)
>  %39 = bitcast i32 %38 to float
>  %40 = call i32 @llvm.SI.packf16(float %33, float 1.000000e+00)
>  %41 = bitcast i32 %40 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %39, float %41, float %39, float %41)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>declare void @llvm.AMDGPU.kill(float)
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>7e0402f2
>7c260480
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0800300
>c0c20500
>bf8c007f
>f0800700
>00010002
>bf8c0770
>5e060300
>d25e0000
>0201e502
>f8001c0f
>00030003
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL CONST[0..49]
>DCL TEMP[0..3], LOCAL
>  0: MAD TEMP[0], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  1: MOV TEMP[1].xw, TEMP[0].xxxw
>  2: MOV TEMP[2].xy, IN[1].xyxx
>  3: MAD TEMP[3].x, TEMP[0].zzzz, CONST[0].zzzz, -TEMP[0].wwww
>  4: MOV TEMP[1].z, TEMP[3].xxxx
>  5: MOV TEMP[1].y, -TEMP[0].yyyy
>  6: MAD TEMP[1].xy, CONST[49].xyyy, TEMP[0].wwww, TEMP[1].xyyy
>  7: MOV OUT[2], TEMP[2]
>  8: MOV OUT[0], TEMP[1]
>  9: MOV OUT[1], TEMP[0]
> 10: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 196
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 197
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %22 = load <16 x i8> addrspace(2)* %21, !tbaa !0
>  %23 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %22, i32 0, i32 %5)
>  %24 = extractelement <4 x float> %23, i32 0
>  %25 = extractelement <4 x float> %23, i32 1
>  %26 = extractelement <4 x float> %23, i32 2
>  %27 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %28 = load <16 x i8> addrspace(2)* %27, !tbaa !0
>  %29 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %28, i32 0, i32 %5)
>  %30 = extractelement <4 x float> %29, i32 0
>  %31 = extractelement <4 x float> %29, i32 1
>  %32 = fmul float %24, %14
>  %33 = fadd float %32, %12
>  %34 = fmul float %25, %14
>  %35 = fadd float %34, %12
>  %36 = fmul float %26, %14
>  %37 = fadd float %36, %12
>  %38 = fmul float %24, %12
>  %39 = fadd float %38, %14
>  %40 = fsub float -0.000000e+00, %39
>  %41 = fmul float %37, %16
>  %42 = fadd float %41, %40
>  %43 = fsub float -0.000000e+00, %35
>  %44 = fmul float %18, %39
>  %45 = fadd float %44, %33
>  %46 = fmul float %20, %39
>  %47 = fadd float %46, %43
>  %48 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %49 = load float addrspace(2)* addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr float addrspace(2)* %49, i32 0
>  %51 = load float addrspace(2)* %50, !tbaa !0
>  %52 = fmul float %51, %33
>  %53 = getelementptr float addrspace(2)* %49, i32 1
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = fmul float %54, %35
>  %56 = fadd float %52, %55
>  %57 = getelementptr float addrspace(2)* %49, i32 2
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = fmul float %58, %37
>  %60 = fadd float %56, %59
>  %61 = getelementptr float addrspace(2)* %49, i32 3
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = fmul float %62, %39
>  %64 = fadd float %60, %63
>  %65 = getelementptr float addrspace(2)* %49, i32 4
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = fmul float %66, %33
>  %68 = getelementptr float addrspace(2)* %49, i32 5
>  %69 = load float addrspace(2)* %68, !tbaa !0
>  %70 = fmul float %69, %35
>  %71 = fadd float %67, %70
>  %72 = getelementptr float addrspace(2)* %49, i32 6
>  %73 = load float addrspace(2)* %72, !tbaa !0
>  %74 = fmul float %73, %37
>  %75 = fadd float %71, %74
>  %76 = getelementptr float addrspace(2)* %49, i32 7
>  %77 = load float addrspace(2)* %76, !tbaa !0
>  %78 = fmul float %77, %39
>  %79 = fadd float %75, %78
>  %80 = getelementptr float addrspace(2)* %49, i32 8
>  %81 = load float addrspace(2)* %80, !tbaa !0
>  %82 = fmul float %81, %33
>  %83 = getelementptr float addrspace(2)* %49, i32 9
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = fmul float %84, %35
>  %86 = fadd float %82, %85
>  %87 = getelementptr float addrspace(2)* %49, i32 10
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = fmul float %88, %37
>  %90 = fadd float %86, %89
>  %91 = getelementptr float addrspace(2)* %49, i32 11
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = fmul float %92, %39
>  %94 = fadd float %90, %93
>  %95 = getelementptr float addrspace(2)* %49, i32 12
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = fmul float %96, %33
>  %98 = getelementptr float addrspace(2)* %49, i32 13
>  %99 = load float addrspace(2)* %98, !tbaa !0
>  %100 = fmul float %99, %35
>  %101 = fadd float %97, %100
>  %102 = getelementptr float addrspace(2)* %49, i32 14
>  %103 = load float addrspace(2)* %102, !tbaa !0
>  %104 = fmul float %103, %37
>  %105 = fadd float %101, %104
>  %106 = getelementptr float addrspace(2)* %49, i32 15
>  %107 = load float addrspace(2)* %106, !tbaa !0
>  %108 = fmul float %107, %39
>  %109 = fadd float %105, %108
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %64, float %79, float %94, float %109)
>  %110 = getelementptr float addrspace(2)* %49, i32 16
>  %111 = load float addrspace(2)* %110, !tbaa !0
>  %112 = fmul float %111, %33
>  %113 = getelementptr float addrspace(2)* %49, i32 17
>  %114 = load float addrspace(2)* %113, !tbaa !0
>  %115 = fmul float %114, %35
>  %116 = fadd float %112, %115
>  %117 = getelementptr float addrspace(2)* %49, i32 18
>  %118 = load float addrspace(2)* %117, !tbaa !0
>  %119 = fmul float %118, %37
>  %120 = fadd float %116, %119
>  %121 = getelementptr float addrspace(2)* %49, i32 19
>  %122 = load float addrspace(2)* %121, !tbaa !0
>  %123 = fmul float %122, %39
>  %124 = fadd float %120, %123
>  %125 = getelementptr float addrspace(2)* %49, i32 20
>  %126 = load float addrspace(2)* %125, !tbaa !0
>  %127 = fmul float %126, %33
>  %128 = getelementptr float addrspace(2)* %49, i32 21
>  %129 = load float addrspace(2)* %128, !tbaa !0
>  %130 = fmul float %129, %35
>  %131 = fadd float %127, %130
>  %132 = getelementptr float addrspace(2)* %49, i32 22
>  %133 = load float addrspace(2)* %132, !tbaa !0
>  %134 = fmul float %133, %37
>  %135 = fadd float %131, %134
>  %136 = getelementptr float addrspace(2)* %49, i32 23
>  %137 = load float addrspace(2)* %136, !tbaa !0
>  %138 = fmul float %137, %39
>  %139 = fadd float %135, %138
>  %140 = getelementptr float addrspace(2)* %49, i32 24
>  %141 = load float addrspace(2)* %140, !tbaa !0
>  %142 = fmul float %141, %33
>  %143 = getelementptr float addrspace(2)* %49, i32 25
>  %144 = load float addrspace(2)* %143, !tbaa !0
>  %145 = fmul float %144, %35
>  %146 = fadd float %142, %145
>  %147 = getelementptr float addrspace(2)* %49, i32 26
>  %148 = load float addrspace(2)* %147, !tbaa !0
>  %149 = fmul float %148, %37
>  %150 = fadd float %146, %149
>  %151 = getelementptr float addrspace(2)* %49, i32 27
>  %152 = load float addrspace(2)* %151, !tbaa !0
>  %153 = fmul float %152, %39
>  %154 = fadd float %150, %153
>  %155 = getelementptr float addrspace(2)* %49, i32 28
>  %156 = load float addrspace(2)* %155, !tbaa !0
>  %157 = fmul float %156, %33
>  %158 = getelementptr float addrspace(2)* %49, i32 29
>  %159 = load float addrspace(2)* %158, !tbaa !0
>  %160 = fmul float %159, %35
>  %161 = fadd float %157, %160
>  %162 = getelementptr float addrspace(2)* %49, i32 30
>  %163 = load float addrspace(2)* %162, !tbaa !0
>  %164 = fmul float %163, %37
>  %165 = fadd float %161, %164
>  %166 = getelementptr float addrspace(2)* %49, i32 31
>  %167 = load float addrspace(2)* %166, !tbaa !0
>  %168 = fmul float %167, %39
>  %169 = fadd float %165, %168
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %124, float %139, float %154, float %169)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %30, float %31, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %45, float %47, float %42, float %39)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840700
>bf8c007f
>e00c2000
>80020500
>c0410100
>bf8c0070
>c0020301
>c0028300
>bf8c007f
>7e060205
>d2820002
>040c0905
>d2820001
>040c0906
>c0400102
>bf8c007f
>c004010d
>bf8c007f
>10080208
>c004010c
>bf8c007f
>d2820009
>04120408
>d2820004
>040c0907
>c004010e
>bf8c007f
>d2820009
>04260808
>7e060204
>d2820003
>040c0b05
>c002010f
>bf8c007f
>d2820005
>04260604
>c0020109
>bf8c007f
>100c0204
>c0020108
>bf8c007f
>d2820006
>041a0404
>c002010a
>bf8c007f
>d2820006
>041a0804
>c002010b
>bf8c007f
>d2820006
>041a0604
>c0020105
>bf8c007f
>100e0204
>c0020104
>bf8c007f
>d2820007
>041e0404
>c0020106
>bf8c007f
>d2820007
>041e0804
>c0020107
>bf8c007f
>d2820007
>041e0604
>c0020101
>bf8c007f
>10100204
>c0020100
>bf8c007f
>d2820008
>04220404
>c0020102
>bf8c007f
>d2820008
>04220804
>c0020103
>bf8c007f
>d2820008
>04220604
>f80000ef
>05060708
>c002011d
>bf8c000f
>100a0204
>c002011c
>bf8c007f
>d2820005
>04160404
>c002011e
>bf8c007f
>d2820005
>04160804
>c002011f
>bf8c007f
>d2820005
>04160604
>c0020119
>bf8c007f
>100c0204
>c0020118
>bf8c007f
>d2820006
>041a0404
>c002011a
>bf8c007f
>d2820006
>041a0804
>c002011b
>bf8c007f
>d2820006
>041a0604
>c0020115
>bf8c007f
>100e0204
>c0020114
>bf8c007f
>d2820007
>041e0404
>c0020116
>bf8c007f
>d2820007
>041e0804
>c0020117
>bf8c007f
>d2820007
>041e0604
>c0020111
>bf8c007f
>10100204
>c0020110
>bf8c007f
>d2820008
>04220404
>c0020112
>bf8c007f
>d2820008
>04220804
>c0000113
>bf8c007f
>d2820008
>04220600
>f80000ff
>05060708
>c0820704
>bf8c000f
>e00c2000
>80010500
>7e000280
>bf8c0770
>f800020f
>00000605
>c00003c4
>bf8c000f
>d2820000
>040a0600
>c0000302
>bf8c007f
>10040800
>08040702
>c00003c5
>bf8c007f
>10080600
>08020304
>f80008cf
>03020100
>bf810000
>m_face->glyph->bitmap.width is 0 for ch:32 DejaVu Sans
>m_face->glyph->bitmap.width is 0 for ch:32 HL2EP2
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL IN[2], GENERIC[21], PERSPECTIVE
>DCL IN[3], GENERIC[22], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL CONST[0..30]
>DCL TEMP[0..5], LOCAL
>DCL TEMP[6], ARRAY(1), LOCAL
>IMM[0] FLT32 {    0.0000,     1.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MAD TEMP[1].x, CONST[12].xxxx, CONST[21].yyyy, -IN[3].zzzz
>  3: MAD TEMP[2].x, CONST[12].xxxx, CONST[20].zzzz, -IN[3].zzzz
>  4: RCP TEMP[3].x, TEMP[2].xxxx
>  5: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
>  6: MUL TEMP[3].x, TEMP[1].xxxx, TEMP[3].xxxx
>  7: MOV_SAT TEMP[3].x, TEMP[3].xxxx
>  8: SGE TEMP[2].x, -TEMP[2].xxxx, IMM[0].xxxx
>  9: F2I TEMP[2].x, -TEMP[2]
> 10: UIF TEMP[2].xxxx :0
> 11:   MOV TEMP[2].x, IMM[0].yyyy
> 12: ELSE :0
> 13:   MOV TEMP[2].x, TEMP[3].xxxx
> 14: ENDIF
> 15: MUL TEMP[3].x, IN[2].zzzz, CONST[21].wwww
> 16: MAD TEMP[2].x, TEMP[3].xxxx, TEMP[2].xxxx, -CONST[21].xxxx
> 17: MIN TEMP[2].x, TEMP[2].xxxx, CONST[21].zzzz
> 18: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 19: MAD TEMP[3].x, TEMP[2].xxxx, -TEMP[2].xxxx, TEMP[2].xxxx
> 20: MUL TEMP[3].x, TEMP[3].xxxx, CONST[12].xxxx
> 21: MAD TEMP[3].x, TEMP[2].xxxx, TEMP[2].xxxx, TEMP[3].xxxx
> 22: MUL TEMP[4].x, TEMP[0].wwww, CONST[1].wwww
> 23: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[1].xyzz
> 24: MAD TEMP[5].x, TEMP[4].xxxx, IN[1].wwww, -TEMP[4].xxxx
> 25: MUL TEMP[0].xyz, TEMP[0].xyzz, IN[1].xyzz
> 26: MAD TEMP[4].x, CONST[12].wwww, TEMP[5].xxxx, TEMP[4].xxxx
> 27: MAD TEMP[1].xyz, TEMP[0].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 28: ADD TEMP[2].x, TEMP[2].xxxx, -TEMP[4].xxxx
> 29: MAD TEMP[2].x, CONST[12].zzzz, TEMP[2].xxxx, TEMP[4].xxxx
> 30: MUL TEMP[1].xyz, TEMP[3].xxxx, TEMP[1].xyzz
> 31: MAD TEMP[3].x, IN[2].zzzz, CONST[29].wwww, -TEMP[2].xxxx
> 32: MAD TEMP[0].xyz, TEMP[0].xyzz, CONST[30].xxxx, TEMP[1].xyzz
> 33: MAD TEMP[1].x, CONST[12].yyyy, TEMP[3].xxxx, TEMP[2].xxxx
> 34: MOV TEMP[0].w, TEMP[1].xxxx
> 35: MOV TEMP[6], TEMP[0]
> 36: MOV OUT[0], TEMP[6]
> 37: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 4
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 5
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 6
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 7
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 48
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 49
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 50
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 51
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 82
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 84
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 85
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr float addrspace(2)* %21, i32 86
>  %45 = load float addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr float addrspace(2)* %21, i32 87
>  %47 = load float addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr float addrspace(2)* %21, i32 116
>  %49 = load float addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr float addrspace(2)* %21, i32 117
>  %51 = load float addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr float addrspace(2)* %21, i32 118
>  %53 = load float addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr float addrspace(2)* %21, i32 119
>  %55 = load float addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr float addrspace(2)* %21, i32 120
>  %57 = load float addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %59 = load <32 x i8> addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %61 = load <16 x i8> addrspace(2)* %60, !tbaa !0
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %64 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %65 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %66 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %3, <2 x i32> %5)
>  %67 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %3, <2 x i32> %5)
>  %68 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %3, <2 x i32> %5)
>  %69 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %3, <2 x i32> %5)
>  %70 = bitcast float %62 to i32
>  %71 = bitcast float %63 to i32
>  %72 = insertelement <2 x i32> undef, i32 %70, i32 0
>  %73 = insertelement <2 x i32> %72, i32 %71, i32 1
>  %74 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %73, <32 x i8> %59, <16 x i8> %61, i32 2)
>  %75 = extractelement <4 x float> %74, i32 0
>  %76 = extractelement <4 x float> %74, i32 1
>  %77 = extractelement <4 x float> %74, i32 2
>  %78 = extractelement <4 x float> %74, i32 3
>  %79 = fsub float -0.000000e+00, %69
>  %80 = fmul float %31, %43
>  %81 = fadd float %80, %79
>  %82 = fsub float -0.000000e+00, %69
>  %83 = fmul float %31, %39
>  %84 = fadd float %83, %82
>  %85 = fdiv float 1.000000e+00, %84
>  %86 = fmul float %84, %84
>  %87 = fmul float %81, %85
>  %88 = call float @llvm.AMDIL.clamp.(float %87, float 0.000000e+00, float 1.000000e+00)
>  %89 = fsub float -0.000000e+00, %86
>  %90 = fcmp uge float %89, 0.000000e+00
>  %91 = select i1 %90, float 1.000000e+00, float 0.000000e+00
>  %92 = fsub float -0.000000e+00, %91
>  %93 = fptosi float %92 to i32
>  %94 = bitcast i32 %93 to float
>  %95 = bitcast float %94 to i32
>  %96 = icmp ne i32 %95, 0
>  %. = select i1 %96, float 1.000000e+00, float %88
>  %97 = fmul float %68, %47
>  %98 = fsub float -0.000000e+00, %41
>  %99 = fmul float %97, %.
>  %100 = fadd float %99, %98
>  %101 = fcmp uge float %100, %45
>  %102 = select i1 %101, float %45, float %100
>  %103 = call float @llvm.AMDIL.clamp.(float %102, float 0.000000e+00, float 1.000000e+00)
>  %104 = fsub float -0.000000e+00, %103
>  %105 = fmul float %103, %104
>  %106 = fadd float %105, %103
>  %107 = fmul float %106, %31
>  %108 = fmul float %103, %103
>  %109 = fadd float %108, %107
>  %110 = fmul float %78, %29
>  %111 = fmul float %75, %23
>  %112 = fmul float %76, %25
>  %113 = fmul float %77, %27
>  %114 = fsub float -0.000000e+00, %110
>  %115 = fmul float %110, %67
>  %116 = fadd float %115, %114
>  %117 = fmul float %111, %64
>  %118 = fmul float %112, %65
>  %119 = fmul float %113, %66
>  %120 = fmul float %37, %116
>  %121 = fadd float %120, %110
>  %122 = fsub float -0.000000e+00, %57
>  %123 = fmul float %117, %122
>  %124 = fadd float %123, %49
>  %125 = fsub float -0.000000e+00, %57
>  %126 = fmul float %118, %125
>  %127 = fadd float %126, %51
>  %128 = fsub float -0.000000e+00, %57
>  %129 = fmul float %119, %128
>  %130 = fadd float %129, %53
>  %131 = fsub float -0.000000e+00, %121
>  %132 = fadd float %103, %131
>  %133 = fmul float %35, %132
>  %134 = fadd float %133, %121
>  %135 = fmul float %109, %124
>  %136 = fmul float %109, %127
>  %137 = fmul float %109, %130
>  %138 = fsub float -0.000000e+00, %134
>  %139 = fmul float %68, %55
>  %140 = fadd float %139, %138
>  %141 = fmul float %117, %57
>  %142 = fadd float %141, %135
>  %143 = fmul float %118, %57
>  %144 = fadd float %143, %136
>  %145 = fmul float %119, %57
>  %146 = fadd float %145, %137
>  %147 = fmul float %33, %140
>  %148 = fadd float %147, %134
>  %149 = fcmp uge float %148, 0x3FB9191940000000
>  %150 = sext i1 %149 to i32
>  %151 = trunc i32 %150 to i1
>  %152 = select i1 %151, float 1.000000e+00, float -1.000000e+00
>  call void @llvm.AMDGPU.kill(float %152)
>  %153 = call i32 @llvm.SI.packf16(float %142, float %144)
>  %154 = bitcast i32 %153 to float
>  %155 = call i32 @llvm.SI.packf16(float %146, float %148)
>  %156 = bitcast i32 %155 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %154, float %156, float %154, float %156)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.AMDGPU.kill(float)
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430202
>c0400100
>bf8c0070
>c0010107
>bf8c007f
>100c0a02
>c81c0700
>c81d0701
>100e0f06
>080e0d07
>c0010133
>bf8c007f
>d2820006
>041a0e02
>c81c0e00
>c81d0e01
>c0010130
>c0018155
>bf8c007f
>7e100203
>d2100008
>02021002
>08100f08
>c0018152
>bf8c007f
>7e120203
>d2100009
>02021202
>08120f09
>7e0e5509
>100e0f08
>d2060807
>02010107
>10101309
>d2060008
>22010108
>d00c0004
>02010108
>d2000008
>0011e480
>d2060008
>22010108
>7e101108
>d10a0004
>02010108
>d2000008
>0011e507
>c81c0a00
>c81d0a01
>c0018157
>bf8c007f
>10120e03
>10101109
>c0018154
>bf8c007f
>0a101003
>c0018156
>bf8c007f
>d00c0004
>02000708
>7e120203
>d2000008
>00121308
>d2060808
>02010108
>08120d08
>c0018132
>bf8c007f
>d2820006
>041a1203
>c0018177
>bf8c007f
>100e0e03
>080e0d07
>c0018131
>bf8c007f
>d2820007
>041a0e03
>7e0c02ff
>3dc8c8ca
>d00c0004
>02020d07
>d2000006
>0011e4f3
>7c260c80
>100c1108
>080c0d08
>100c0c02
>d2820006
>041a1108
>c0010106
>bf8c007f
>10100802
>c8240600
>c8250601
>10101308
>c0010178
>bf8c007f
>10121002
>c0018176
>bf8c007f
>08121203
>10121306
>d2820008
>04240508
>5e0e0f08
>c0018105
>bf8c007f
>10100603
>c8240500
>c8250501
>10101308
>10121002
>c0018175
>bf8c007f
>08121203
>10121306
>d2820008
>04240508
>c0018104
>bf8c007f
>10040403
>c80c0400
>c80d0401
>10000702
>10020002
>c0000174
>bf8c007f
>08020200
>10020306
>d2820000
>04040500
>5e001100
>f8001c0f
>07000700
>bf810000
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL TEMP[0], LOCAL
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MOV OUT[0], TEMP[0]
>  3: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %21 = load <32 x i8> addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %23 = load <16 x i8> addrspace(2)* %22, !tbaa !0
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %26 = bitcast float %24 to i32
>  %27 = bitcast float %25 to i32
>  %28 = insertelement <2 x i32> undef, i32 %26, i32 0
>  %29 = insertelement <2 x i32> %28, i32 %27, i32 1
>  %30 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %29, <32 x i8> %21, <16 x i8> %23, i32 2)
>  %31 = extractelement <4 x float> %30, i32 0
>  %32 = extractelement <4 x float> %30, i32 1
>  %33 = extractelement <4 x float> %30, i32 2
>  %34 = extractelement <4 x float> %30, i32 3
>  %35 = fcmp uge float %34, 0x3FB9191940000000
>  %36 = sext i1 %35 to i32
>  %37 = trunc i32 %36 to i1
>  %38 = select i1 %37, float 1.000000e+00, float -1.000000e+00
>  call void @llvm.AMDGPU.kill(float %38)
>  %39 = call i32 @llvm.SI.packf16(float %31, float %32)
>  %40 = bitcast i32 %39 to float
>  %41 = call i32 @llvm.SI.packf16(float %33, float %34)
>  %42 = bitcast i32 %41 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %40, float %42, float %40, float %42)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>declare void @llvm.AMDGPU.kill(float)
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0800300
>c0c20500
>bf8c007f
>f0800f00
>00010002
>7e0802ff
>3dc8c8ca
>bf8c0770
>d00c0000
>02020903
>d2000004
>0001e4f3
>7c260880
>5e080702
>5e000300
>f8001c0f
>04000400
>bf810000
>m_face->glyph->bitmap.width is 0 for ch:32 Verdana
>m_face->glyph->bitmap.width is 0 for ch:32 Verdana
>m_face->glyph->bitmap.width is 0 for ch:32 Verdana
>Dropped Behem0th from server (Disconnect by user.)
>Loading game from save/quick.sav...
>env_cubemap used on world geometry without rebuilding map. . ignoring: maps/ep2_outland_01/concrete/blendconcretedebris001a_wvt_patch
>env_cubemap used on world geometry without rebuilding map. . ignoring: overlays/bloodpool3
>Loading game from //MOD/save/ep2_outland_01.HL1...
>Precache called on a point_template that has no templates: template.debris.01
>Precache called on a point_template that has no templates: 
>Precache called on a point_template that has no templates: ptemplate.antlion.player
>Precache called on a point_template that has no templates: template.trains
>Precache called on a point_template that has no templates: template_door_blocker
>'cfg/motd.txt' not found; not loaded
>'cfg/motd_text.txt' not found; not loaded
>Redownloading all lightmaps
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], GENERIC[19], PERSPECTIVE
>DCL IN[2], GENERIC[20], PERSPECTIVE
>DCL IN[3], GENERIC[21], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL CONST[0..30]
>DCL TEMP[0..3], LOCAL
>DCL TEMP[4], ARRAY(1), LOCAL
>  0: MOV TEMP[0].xy, IN[1].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MOV TEMP[1].xy, IN[3].xyyy
>  3: TEX TEMP[2].xyz, TEMP[1], SAMP[1], 2D
>  4: MUL TEMP[2].xyz, TEMP[2].xyzz, CONST[12].xyzz
>  5: MAD TEMP[3].x, IN[2].wwww, CONST[11].wwww, -CONST[11].xxxx
>  6: MUL TEMP[1].xyz, TEMP[0].xyzz, IN[0].xyzz
>  7: MIN TEMP[3].x, TEMP[3].xxxx, CONST[11].zzzz
>  8: MOV_SAT TEMP[3].x, TEMP[3].xxxx
>  9: MUL TEMP[1].xyz, TEMP[2].xyzz, TEMP[1].xyzz
> 10: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[3].xxxx
> 11: MAD TEMP[2].xyz, TEMP[1].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 12: MUL TEMP[2].xyz, TEMP[3].xxxx, TEMP[2].xyzz
> 13: MUL TEMP[3].x, IN[0].wwww, CONST[12].wwww
> 14: MAD TEMP[1].xyz, TEMP[1].xyzz, CONST[30].xxxx, TEMP[2].xyzz
> 15: MUL TEMP[0].x, TEMP[0].wwww, TEMP[3].xxxx
> 16: MOV TEMP[1].w, TEMP[0].xxxx
> 17: MOV TEMP[4], TEMP[1]
> 18: MOV OUT[0], TEMP[4]
> 19: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 44
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 46
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 47
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 48
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 49
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 50
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 51
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 116
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 117
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 118
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 120
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %45 = load <32 x i8> addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %47 = load <16 x i8> addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %49 = load <32 x i8> addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %51 = load <16 x i8> addrspace(2)* %50, !tbaa !0
>  %52 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %53 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %54 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %55 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %3, <2 x i32> %5)
>  %56 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %57 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %58 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %3, <2 x i32> %5)
>  %59 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %3, <2 x i32> %6)
>  %60 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %3, <2 x i32> %6)
>  %61 = bitcast float %56 to i32
>  %62 = bitcast float %57 to i32
>  %63 = insertelement <2 x i32> undef, i32 %61, i32 0
>  %64 = insertelement <2 x i32> %63, i32 %62, i32 1
>  %65 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %64, <32 x i8> %45, <16 x i8> %47, i32 2)
>  %66 = extractelement <4 x float> %65, i32 0
>  %67 = extractelement <4 x float> %65, i32 1
>  %68 = extractelement <4 x float> %65, i32 2
>  %69 = extractelement <4 x float> %65, i32 3
>  %70 = bitcast float %59 to i32
>  %71 = bitcast float %60 to i32
>  %72 = insertelement <2 x i32> undef, i32 %70, i32 0
>  %73 = insertelement <2 x i32> %72, i32 %71, i32 1
>  %74 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %73, <32 x i8> %49, <16 x i8> %51, i32 2)
>  %75 = extractelement <4 x float> %74, i32 0
>  %76 = extractelement <4 x float> %74, i32 1
>  %77 = extractelement <4 x float> %74, i32 2
>  %78 = fmul float %75, %29
>  %79 = fmul float %76, %31
>  %80 = fmul float %77, %33
>  %81 = fsub float -0.000000e+00, %23
>  %82 = fmul float %58, %27
>  %83 = fadd float %82, %81
>  %84 = fmul float %66, %52
>  %85 = fmul float %67, %53
>  %86 = fmul float %68, %54
>  %87 = fcmp uge float %83, %25
>  %88 = select i1 %87, float %25, float %83
>  %89 = call float @llvm.AMDIL.clamp.(float %88, float 0.000000e+00, float 1.000000e+00)
>  %90 = fmul float %78, %84
>  %91 = fmul float %79, %85
>  %92 = fmul float %80, %86
>  %93 = fmul float %89, %89
>  %94 = fsub float -0.000000e+00, %43
>  %95 = fmul float %90, %94
>  %96 = fadd float %95, %37
>  %97 = fsub float -0.000000e+00, %43
>  %98 = fmul float %91, %97
>  %99 = fadd float %98, %39
>  %100 = fsub float -0.000000e+00, %43
>  %101 = fmul float %92, %100
>  %102 = fadd float %101, %41
>  %103 = fmul float %93, %96
>  %104 = fmul float %93, %99
>  %105 = fmul float %93, %102
>  %106 = fmul float %55, %35
>  %107 = fmul float %90, %43
>  %108 = fadd float %107, %103
>  %109 = fmul float %91, %43
>  %110 = fadd float %109, %104
>  %111 = fmul float %92, %43
>  %112 = fadd float %111, %105
>  %113 = fmul float %69, %106
>  %114 = call i32 @llvm.SI.packf16(float %108, float %110)
>  %115 = bitcast i32 %114 to float
>  %116 = call i32 @llvm.SI.packf16(float %112, float %113)
>  %117 = bitcast i32 %116 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %115, float %117, float %115, float %117)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8140500
>c8150501
>c8100400
>c8110401
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430404
>c8200100
>c8210101
>bf8c0770
>10161105
>c8240d02
>c8250d03
>c8200c02
>c8210c03
>c0840304
>c0c60508
>bf8c007f
>f0800700
>00430808
>c0400100
>bf8c0070
>c0010131
>bf8c007f
>10041202
>10061702
>c0010178
>bf8c007f
>10040602
>c0018175
>bf8c007f
>08160403
>c8080b00
>c8090b01
>c001812f
>bf8c007f
>10040403
>c001812c
>bf8c007f
>0a040403
>c001812e
>bf8c007f
>d00c0004
>02000702
>7e180203
>d2000002
>00121902
>d2060802
>02010102
>10040502
>10161702
>d2820003
>042c0503
>c82c0000
>c82d0001
>10161704
>c0018130
>bf8c007f
>10181003
>1016170c
>10181602
>c0018174
>bf8c007f
>08181803
>10181902
>d282000b
>0430050b
>5e06070b
>c82c0200
>c82d0201
>10161706
>c0018132
>bf8c007f
>10101403
>10101708
>10121002
>c0018176
>bf8c007f
>08121203
>10041302
>d2820002
>04080508
>c8200300
>c8210301
>c0000133
>bf8c007f
>10001000
>10000107
>5e000102
>f8001c0f
>00030003
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], CLIPVERTEX
>DCL OUT[3], GENERIC[19]
>DCL OUT[4], GENERIC[20]
>DCL OUT[5], GENERIC[21]
>DCL CONST[0..20]
>DCL TEMP[0..7], LOCAL
>  0: MAD TEMP[0], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  1: DP4 TEMP[1].x, TEMP[0], CONST[17]
>  2: DP4 TEMP[2].x, TEMP[0], CONST[18]
>  3: MOV TEMP[1].y, TEMP[2].xxxx
>  4: DP4 TEMP[2].x, TEMP[0], CONST[19]
>  5: MOV TEMP[1].z, TEMP[2].xxxx
>  6: DP4 TEMP[2].x, TEMP[0], CONST[4]
>  7: DP4 TEMP[3].x, TEMP[0], CONST[5]
>  8: MOV TEMP[2].y, TEMP[3].xxxx
>  9: DP4 TEMP[4].x, TEMP[0], CONST[12]
> 10: DP4 TEMP[5].x, TEMP[0], CONST[6]
> 11: MOV TEMP[2].z, TEMP[5].xxxx
> 12: DP4 TEMP[0].x, TEMP[0], CONST[7]
> 13: MOV TEMP[2].w, TEMP[0].xxxx
> 14: MOV TEMP[1].w, TEMP[4].xxxx
> 15: MOV TEMP[4].xy, IN[1].xyxx
> 16: MUL TEMP[6], IN[2].xyxx, CONST[0].yyxx
> 17: MOV TEMP[7], TEMP[2]
> 18: MAD TEMP[5].x, TEMP[5].xxxx, CONST[0].zzzz, -TEMP[0].xxxx
> 19: MOV TEMP[2].z, TEMP[5].xxxx
> 20: MOV TEMP[2].y, -TEMP[3].xxxx
> 21: MAD TEMP[2].xy, CONST[20].xyyy, TEMP[0].xxxx, TEMP[2].xyyy
> 22: MOV OUT[3], TEMP[4]
> 23: MOV OUT[5], TEMP[6]
> 24: MOV OUT[0], TEMP[2]
> 25: MOV OUT[4], TEMP[1]
> 26: MOV OUT[2], TEMP[7]
> 27: MOV_SAT OUT[1], IN[3]
> 28: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 16
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 17
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 18
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 19
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 20
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 21
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 22
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 23
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 24
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 25
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 26
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 27
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 28
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 29
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 30
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 31
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 48
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 49
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 50
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 51
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 68
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 69
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 70
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 71
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 72
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 73
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 74
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 75
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 76
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 77
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 78
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 79
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 80
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 81
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %86 = load <16 x i8> addrspace(2)* %85, !tbaa !0
>  %87 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %86, i32 0, i32 %5)
>  %88 = extractelement <4 x float> %87, i32 0
>  %89 = extractelement <4 x float> %87, i32 1
>  %90 = extractelement <4 x float> %87, i32 2
>  %91 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %92 = load <16 x i8> addrspace(2)* %91, !tbaa !0
>  %93 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %92, i32 0, i32 %5)
>  %94 = extractelement <4 x float> %93, i32 0
>  %95 = extractelement <4 x float> %93, i32 1
>  %96 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %97 = load <16 x i8> addrspace(2)* %96, !tbaa !0
>  %98 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %97, i32 0, i32 %5)
>  %99 = extractelement <4 x float> %98, i32 0
>  %100 = extractelement <4 x float> %98, i32 1
>  %101 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %102 = load <16 x i8> addrspace(2)* %101, !tbaa !0
>  %103 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %102, i32 0, i32 %5)
>  %104 = extractelement <4 x float> %103, i32 0
>  %105 = extractelement <4 x float> %103, i32 1
>  %106 = extractelement <4 x float> %103, i32 2
>  %107 = extractelement <4 x float> %103, i32 3
>  %108 = fmul float %88, %14
>  %109 = fadd float %108, %12
>  %110 = fmul float %89, %14
>  %111 = fadd float %110, %12
>  %112 = fmul float %90, %14
>  %113 = fadd float %112, %12
>  %114 = fmul float %88, %12
>  %115 = fadd float %114, %14
>  %116 = fmul float %109, %58
>  %117 = fmul float %111, %60
>  %118 = fadd float %116, %117
>  %119 = fmul float %113, %62
>  %120 = fadd float %118, %119
>  %121 = fmul float %115, %64
>  %122 = fadd float %120, %121
>  %123 = fmul float %109, %66
>  %124 = fmul float %111, %68
>  %125 = fadd float %123, %124
>  %126 = fmul float %113, %70
>  %127 = fadd float %125, %126
>  %128 = fmul float %115, %72
>  %129 = fadd float %127, %128
>  %130 = fmul float %109, %74
>  %131 = fmul float %111, %76
>  %132 = fadd float %130, %131
>  %133 = fmul float %113, %78
>  %134 = fadd float %132, %133
>  %135 = fmul float %115, %80
>  %136 = fadd float %134, %135
>  %137 = fmul float %109, %18
>  %138 = fmul float %111, %20
>  %139 = fadd float %137, %138
>  %140 = fmul float %113, %22
>  %141 = fadd float %139, %140
>  %142 = fmul float %115, %24
>  %143 = fadd float %141, %142
>  %144 = fmul float %109, %26
>  %145 = fmul float %111, %28
>  %146 = fadd float %144, %145
>  %147 = fmul float %113, %30
>  %148 = fadd float %146, %147
>  %149 = fmul float %115, %32
>  %150 = fadd float %148, %149
>  %151 = fmul float %109, %50
>  %152 = fmul float %111, %52
>  %153 = fadd float %151, %152
>  %154 = fmul float %113, %54
>  %155 = fadd float %153, %154
>  %156 = fmul float %115, %56
>  %157 = fadd float %155, %156
>  %158 = fmul float %109, %34
>  %159 = fmul float %111, %36
>  %160 = fadd float %158, %159
>  %161 = fmul float %113, %38
>  %162 = fadd float %160, %161
>  %163 = fmul float %115, %40
>  %164 = fadd float %162, %163
>  %165 = fmul float %109, %42
>  %166 = fmul float %111, %44
>  %167 = fadd float %165, %166
>  %168 = fmul float %113, %46
>  %169 = fadd float %167, %168
>  %170 = fmul float %115, %48
>  %171 = fadd float %169, %170
>  %172 = fmul float %99, %14
>  %173 = fmul float %100, %14
>  %174 = fmul float %99, %12
>  %175 = fmul float %99, %12
>  %176 = fsub float -0.000000e+00, %171
>  %177 = fmul float %164, %16
>  %178 = fadd float %177, %176
>  %179 = fsub float -0.000000e+00, %150
>  %180 = fmul float %82, %171
>  %181 = fadd float %180, %143
>  %182 = fmul float %84, %171
>  %183 = fadd float %182, %179
>  %184 = call float @llvm.AMDIL.clamp.(float %104, float 0.000000e+00, float 1.000000e+00)
>  %185 = call float @llvm.AMDIL.clamp.(float %105, float 0.000000e+00, float 1.000000e+00)
>  %186 = call float @llvm.AMDIL.clamp.(float %106, float 0.000000e+00, float 1.000000e+00)
>  %187 = call float @llvm.AMDIL.clamp.(float %107, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %184, float %185, float %186, float %187)
>  %188 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %189 = load float addrspace(2)* addrspace(2)* %188, !tbaa !0
>  %190 = getelementptr float addrspace(2)* %189, i32 0
>  %191 = load float addrspace(2)* %190, !tbaa !0
>  %192 = fmul float %191, %143
>  %193 = getelementptr float addrspace(2)* %189, i32 1
>  %194 = load float addrspace(2)* %193, !tbaa !0
>  %195 = fmul float %194, %150
>  %196 = fadd float %192, %195
>  %197 = getelementptr float addrspace(2)* %189, i32 2
>  %198 = load float addrspace(2)* %197, !tbaa !0
>  %199 = fmul float %198, %164
>  %200 = fadd float %196, %199
>  %201 = getelementptr float addrspace(2)* %189, i32 3
>  %202 = load float addrspace(2)* %201, !tbaa !0
>  %203 = fmul float %202, %171
>  %204 = fadd float %200, %203
>  %205 = getelementptr float addrspace(2)* %189, i32 4
>  %206 = load float addrspace(2)* %205, !tbaa !0
>  %207 = fmul float %206, %143
>  %208 = getelementptr float addrspace(2)* %189, i32 5
>  %209 = load float addrspace(2)* %208, !tbaa !0
>  %210 = fmul float %209, %150
>  %211 = fadd float %207, %210
>  %212 = getelementptr float addrspace(2)* %189, i32 6
>  %213 = load float addrspace(2)* %212, !tbaa !0
>  %214 = fmul float %213, %164
>  %215 = fadd float %211, %214
>  %216 = getelementptr float addrspace(2)* %189, i32 7
>  %217 = load float addrspace(2)* %216, !tbaa !0
>  %218 = fmul float %217, %171
>  %219 = fadd float %215, %218
>  %220 = getelementptr float addrspace(2)* %189, i32 8
>  %221 = load float addrspace(2)* %220, !tbaa !0
>  %222 = fmul float %221, %143
>  %223 = getelementptr float addrspace(2)* %189, i32 9
>  %224 = load float addrspace(2)* %223, !tbaa !0
>  %225 = fmul float %224, %150
>  %226 = fadd float %222, %225
>  %227 = getelementptr float addrspace(2)* %189, i32 10
>  %228 = load float addrspace(2)* %227, !tbaa !0
>  %229 = fmul float %228, %164
>  %230 = fadd float %226, %229
>  %231 = getelementptr float addrspace(2)* %189, i32 11
>  %232 = load float addrspace(2)* %231, !tbaa !0
>  %233 = fmul float %232, %171
>  %234 = fadd float %230, %233
>  %235 = getelementptr float addrspace(2)* %189, i32 12
>  %236 = load float addrspace(2)* %235, !tbaa !0
>  %237 = fmul float %236, %143
>  %238 = getelementptr float addrspace(2)* %189, i32 13
>  %239 = load float addrspace(2)* %238, !tbaa !0
>  %240 = fmul float %239, %150
>  %241 = fadd float %237, %240
>  %242 = getelementptr float addrspace(2)* %189, i32 14
>  %243 = load float addrspace(2)* %242, !tbaa !0
>  %244 = fmul float %243, %164
>  %245 = fadd float %241, %244
>  %246 = getelementptr float addrspace(2)* %189, i32 15
>  %247 = load float addrspace(2)* %246, !tbaa !0
>  %248 = fmul float %247, %171
>  %249 = fadd float %245, %248
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %204, float %219, float %234, float %249)
>  %250 = getelementptr float addrspace(2)* %189, i32 16
>  %251 = load float addrspace(2)* %250, !tbaa !0
>  %252 = fmul float %251, %143
>  %253 = getelementptr float addrspace(2)* %189, i32 17
>  %254 = load float addrspace(2)* %253, !tbaa !0
>  %255 = fmul float %254, %150
>  %256 = fadd float %252, %255
>  %257 = getelementptr float addrspace(2)* %189, i32 18
>  %258 = load float addrspace(2)* %257, !tbaa !0
>  %259 = fmul float %258, %164
>  %260 = fadd float %256, %259
>  %261 = getelementptr float addrspace(2)* %189, i32 19
>  %262 = load float addrspace(2)* %261, !tbaa !0
>  %263 = fmul float %262, %171
>  %264 = fadd float %260, %263
>  %265 = getelementptr float addrspace(2)* %189, i32 20
>  %266 = load float addrspace(2)* %265, !tbaa !0
>  %267 = fmul float %266, %143
>  %268 = getelementptr float addrspace(2)* %189, i32 21
>  %269 = load float addrspace(2)* %268, !tbaa !0
>  %270 = fmul float %269, %150
>  %271 = fadd float %267, %270
>  %272 = getelementptr float addrspace(2)* %189, i32 22
>  %273 = load float addrspace(2)* %272, !tbaa !0
>  %274 = fmul float %273, %164
>  %275 = fadd float %271, %274
>  %276 = getelementptr float addrspace(2)* %189, i32 23
>  %277 = load float addrspace(2)* %276, !tbaa !0
>  %278 = fmul float %277, %171
>  %279 = fadd float %275, %278
>  %280 = getelementptr float addrspace(2)* %189, i32 24
>  %281 = load float addrspace(2)* %280, !tbaa !0
>  %282 = fmul float %281, %143
>  %283 = getelementptr float addrspace(2)* %189, i32 25
>  %284 = load float addrspace(2)* %283, !tbaa !0
>  %285 = fmul float %284, %150
>  %286 = fadd float %282, %285
>  %287 = getelementptr float addrspace(2)* %189, i32 26
>  %288 = load float addrspace(2)* %287, !tbaa !0
>  %289 = fmul float %288, %164
>  %290 = fadd float %286, %289
>  %291 = getelementptr float addrspace(2)* %189, i32 27
>  %292 = load float addrspace(2)* %291, !tbaa !0
>  %293 = fmul float %292, %171
>  %294 = fadd float %290, %293
>  %295 = getelementptr float addrspace(2)* %189, i32 28
>  %296 = load float addrspace(2)* %295, !tbaa !0
>  %297 = fmul float %296, %143
>  %298 = getelementptr float addrspace(2)* %189, i32 29
>  %299 = load float addrspace(2)* %298, !tbaa !0
>  %300 = fmul float %299, %150
>  %301 = fadd float %297, %300
>  %302 = getelementptr float addrspace(2)* %189, i32 30
>  %303 = load float addrspace(2)* %302, !tbaa !0
>  %304 = fmul float %303, %164
>  %305 = fadd float %301, %304
>  %306 = getelementptr float addrspace(2)* %189, i32 31
>  %307 = load float addrspace(2)* %306, !tbaa !0
>  %308 = fmul float %307, %171
>  %309 = fadd float %305, %308
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %264, float %279, float %294, float %309)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %94, float %95, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %122, float %129, float %136, float %157)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %172, float %173, float %174, float %175)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %181, float %183, float %178, float %171)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c084070c
>bf8c007f
>e00c2000
>80020100
>bf8c0770
>d2060805
>02010104
>d2060806
>02010103
>d2060807
>02010102
>d2060801
>02010101
>f800020f
>05060701
>c0840700
>bf8c000f
>e00c2000
>80020600
>c0410100
>bf8c0070
>c0020301
>c0028300
>bf8c007f
>7e020205
>d2820002
>04040906
>d2820004
>04040907
>c0040311
>bf8c007f
>10060808
>c0040310
>bf8c007f
>d2820003
>040c1102
>d2820005
>04040908
>c0040312
>bf8c007f
>d2820001
>040c1105
>7e060204
>d2820006
>040c0b06
>c0040313
>bf8c007f
>d2820001
>04041106
>c0040315
>bf8c007f
>10060808
>c0040314
>bf8c007f
>d2820003
>040c1102
>c0040316
>bf8c007f
>d2820003
>040c1105
>c0040317
>bf8c007f
>d2820003
>040c1106
>c0400102
>bf8c007f
>c004010d
>bf8c007f
>100e0608
>c004010c
>bf8c007f
>d2820008
>041e0208
>c0040319
>bf8c007f
>100e0808
>c0040318
>bf8c007f
>d2820007
>041c1102
>c004031a
>bf8c007f
>d2820007
>041c1105
>c004031b
>bf8c007f
>d2820007
>041c1106
>c004010e
>bf8c007f
>d2820009
>04220e08
>c004031d
>bf8c007f
>10100808
>c004031c
>bf8c007f
>d2820008
>04201102
>c004031e
>bf8c007f
>d2820008
>04201105
>c004031f
>bf8c007f
>d2820008
>04201106
>c004010f
>bf8c007f
>d2820009
>04261008
>c0040109
>bf8c007f
>10140608
>c0040108
>bf8c007f
>d282000a
>042a0208
>c004010a
>bf8c007f
>d282000a
>042a0e08
>c004010b
>bf8c007f
>d282000a
>042a1008
>c0040105
>bf8c007f
>10160608
>c0040104
>bf8c007f
>d282000b
>042e0208
>c0040106
>bf8c007f
>d282000b
>042e0e08
>c0040107
>bf8c007f
>d282000b
>042e1008
>c0040101
>bf8c007f
>10180608
>c0040100
>bf8c007f
>d282000c
>04320208
>c0040102
>bf8c007f
>d282000c
>04320e08
>c0040103
>bf8c007f
>d282000c
>04321008
>f80000ef
>090a0b0c
>c004011d
>bf8c000f
>10120608
>c004011c
>bf8c007f
>d2820009
>04260208
>c004011e
>bf8c007f
>d2820009
>04260e08
>c004011f
>bf8c007f
>d2820009
>04261008
>c0040119
>bf8c007f
>10140608
>c0040118
>bf8c007f
>d282000a
>042a0208
>c004011a
>bf8c007f
>d282000a
>042a0e08
>c004011b
>bf8c007f
>d282000a
>042a1008
>c0040115
>bf8c007f
>10160608
>c0040114
>bf8c007f
>d282000b
>042e0208
>c0040116
>bf8c007f
>d282000b
>042e0e08
>c0040117
>bf8c007f
>d282000b
>042e1008
>c0040111
>bf8c007f
>10180608
>c0040110
>bf8c007f
>d282000c
>04320208
>c0040112
>bf8c007f
>d282000c
>04320e08
>c0000113
>bf8c007f
>d282000c
>04321000
>f80000ff
>090a0b0c
>c0840704
>bf8c000f
>e00c2000
>80020900
>7e1a0280
>bf8c0770
>f800021f
>0d0d0a09
>c0000331
>bf8c000f
>10120800
>c0000330
>bf8c007f
>d2820009
>04240102
>c0000332
>bf8c007f
>d2820009
>04240105
>c0000333
>bf8c007f
>d2820009
>04240106
>c000034d
>bf8c007f
>10140800
>c000034c
>bf8c007f
>d282000a
>04280102
>c000034e
>bf8c007f
>d282000a
>04280105
>c000034f
>bf8c007f
>d282000a
>04280106
>c0000349
>bf8c007f
>10160800
>c0000348
>bf8c007f
>d282000b
>042c0102
>c000034a
>bf8c007f
>d282000b
>042c0105
>c000034b
>bf8c007f
>d282000b
>042c0106
>c0000345
>bf8c007f
>10080800
>c0000344
>bf8c007f
>d2820002
>04100102
>c0000346
>bf8c007f
>d2820002
>04080105
>c0000347
>bf8c007f
>d2820002
>04080106
>f800022f
>090a0b02
>c0840708
>bf8c000f
>e00c2000
>80020900
>bf8c0770
>10001205
>10041404
>10081204
>f800023f
>00000204
>c0000350
>bf8c000f
>d2820000
>04061000
>c0000302
>bf8c007f
>10020e00
>08021101
>c0000351
>bf8c007f
>10041000
>08040702
>f80008cf
>08010200
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL CONST[0..29]
>DCL TEMP[0..3], LOCAL
>DCL TEMP[4], ARRAY(1), LOCAL
>IMM[0] FLT32 {    0.4000,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MAD TEMP[1].x, IN[1].wwww, CONST[12].wwww, -CONST[12].xxxx
>  3: MIN TEMP[2].x, TEMP[1].xxxx, CONST[12].zzzz
>  4: MOV_SAT TEMP[2].x, TEMP[2].xxxx
>  5: POW TEMP[2].x, TEMP[2].xxxx, IMM[0].xxxx
>  6: MOV_SAT TEMP[2].x, TEMP[2].xxxx
>  7: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
>  8: ADD TEMP[3].xyz, CONST[29].xyzz, -TEMP[0].xyzz
>  9: MAD TEMP[1].xyz, TEMP[2].xxxx, TEMP[3].xyzz, TEMP[0].xyzz
> 10: MOV TEMP[1].w, TEMP[0].wwww
> 11: MOV TEMP[4], TEMP[1]
> 12: MOV OUT[0], TEMP[4]
> 13: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 48
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 50
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 51
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 116
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 117
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 118
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %35 = load <32 x i8> addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %37 = load <16 x i8> addrspace(2)* %36, !tbaa !0
>  %38 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %39 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %40 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %3, <2 x i32> %5)
>  %41 = bitcast float %38 to i32
>  %42 = bitcast float %39 to i32
>  %43 = insertelement <2 x i32> undef, i32 %41, i32 0
>  %44 = insertelement <2 x i32> %43, i32 %42, i32 1
>  %45 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %44, <32 x i8> %35, <16 x i8> %37, i32 2)
>  %46 = extractelement <4 x float> %45, i32 0
>  %47 = extractelement <4 x float> %45, i32 1
>  %48 = extractelement <4 x float> %45, i32 2
>  %49 = extractelement <4 x float> %45, i32 3
>  %50 = fsub float -0.000000e+00, %23
>  %51 = fmul float %40, %27
>  %52 = fadd float %51, %50
>  %53 = fcmp uge float %52, %25
>  %54 = select i1 %53, float %25, float %52
>  %55 = call float @llvm.AMDIL.clamp.(float %54, float 0.000000e+00, float 1.000000e+00)
>  %56 = call float @llvm.pow.f32(float %55, float 0x3FD99999A0000000)
>  %57 = call float @llvm.AMDIL.clamp.(float %56, float 0.000000e+00, float 1.000000e+00)
>  %58 = fmul float %57, %57
>  %59 = fsub float -0.000000e+00, %46
>  %60 = fadd float %29, %59
>  %61 = fsub float -0.000000e+00, %47
>  %62 = fadd float %31, %61
>  %63 = fsub float -0.000000e+00, %48
>  %64 = fadd float %33, %63
>  %65 = fmul float %58, %60
>  %66 = fadd float %65, %46
>  %67 = fmul float %58, %62
>  %68 = fadd float %67, %47
>  %69 = fmul float %58, %64
>  %70 = fadd float %69, %48
>  %71 = fcmp ugt float %49, 0.000000e+00
>  %72 = sext i1 %71 to i32
>  %73 = trunc i32 %72 to i1
>  %74 = select i1 %73, float 1.000000e+00, float -1.000000e+00
>  call void @llvm.AMDGPU.kill(float %74)
>  %75 = call i32 @llvm.SI.packf16(float %66, float %68)
>  %76 = bitcast i32 %75 to float
>  %77 = call i32 @llvm.SI.packf16(float %70, float %49)
>  %78 = bitcast i32 %77 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %76, float %78, float %76, float %78)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readonly
>declare float @llvm.pow.f32(float, float) #3
>
>declare void @llvm.AMDGPU.kill(float)
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>attributes #3 = { nounwind readonly }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0100
>c80d0101
>c8080000
>c8090001
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430202
>bf8c0770
>d0080002
>02010105
>d2000006
>0009e4f3
>7c260c80
>c0400100
>bf8c007f
>c0010175
>bf8c007f
>080c0602
>c81c0700
>c81d0701
>c0010133
>bf8c007f
>10000e02
>c0010130
>bf8c007f
>0a000002
>c0010132
>bf8c007f
>d00c0004
>02000500
>7e020202
>d2000000
>00120300
>d2060800
>02010100
>7e004f00
>0e0000ff
>3ecccccd
>7e004b00
>d2060800
>02010100
>10000100
>d2820001
>040e0d00
>c0010174
>bf8c007f
>080c0402
>d2820006
>040a0d00
>5e020306
>c0000176
>bf8c007f
>080c0800
>d2820000
>04120d00
>5e000b00
>f8001c0f
>00010001
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL OUT[3], GENERIC[20]
>DCL CONST[0..57]
>DCL TEMP[0..5], LOCAL
>  0: DP4 TEMP[0].x, IN[1], CONST[48]
>  1: DP4 TEMP[1].x, IN[1], CONST[49]
>  2: MOV TEMP[0].y, TEMP[1].xxxx
>  3: MAD TEMP[2].xyz, IN[2].xyzz, CONST[3].xxxx, IN[0].xyzz
>  4: MOV TEMP[2].w, IN[0].wwww
>  5: DP4 TEMP[1].x, TEMP[2], CONST[54]
>  6: DP4 TEMP[3].x, TEMP[2], CONST[55]
>  7: MOV TEMP[1].y, TEMP[3].xxxx
>  8: DP4 TEMP[3].x, TEMP[2], CONST[56]
>  9: MOV TEMP[1].z, TEMP[3].xxxx
> 10: MOV TEMP[1].w, CONST[0].yyyy
> 11: DP4 TEMP[3].x, TEMP[1], CONST[10]
> 12: MOV TEMP[2].z, TEMP[3].xxxx
> 13: DP4 TEMP[2].x, TEMP[1], CONST[8]
> 14: DP4 TEMP[3].x, TEMP[1], CONST[9]
> 15: MOV TEMP[2].y, TEMP[3].xxxx
> 16: DP4 TEMP[3].x, TEMP[1], CONST[11]
> 17: MOV TEMP[2].w, TEMP[3].xxxx
> 18: DP4 TEMP[3].x, TEMP[1], CONST[13]
> 19: MOV TEMP[1].xyz, TEMP[1].xyzx
> 20: MOV TEMP[4], TEMP[2]
> 21: MOV TEMP[1].w, TEMP[3].xxxx
> 22: MOV TEMP[3], TEMP[4]
> 23: MAD TEMP[5].x, TEMP[2].zzzz, CONST[0].zzzz, -TEMP[2].wwww
> 24: MOV TEMP[4].z, TEMP[5].xxxx
> 25: MOV TEMP[4].y, -TEMP[2].yyyy
> 26: MAD TEMP[4].xy, CONST[57].xyyy, TEMP[2].wwww, TEMP[4].xyyy
> 27: MOV OUT[2], TEMP[0]
> 28: MOV OUT[0], TEMP[4]
> 29: MOV OUT[1], TEMP[3]
> 30: MOV OUT[3], TEMP[1]
> 31: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 1
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 2
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 12
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 32
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 33
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 34
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 35
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 36
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 37
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 38
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 39
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 40
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 41
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 42
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 43
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 44
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 45
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 46
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 47
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 52
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 53
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 54
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 55
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 192
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 193
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 194
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 195
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 196
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 197
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 198
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 199
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 216
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 217
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 218
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 219
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 220
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 221
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 222
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 223
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 224
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 225
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 226
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr float addrspace(2)* %10, i32 227
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = getelementptr float addrspace(2)* %10, i32 228
>  %98 = load float addrspace(2)* %97, !tbaa !0
>  %99 = getelementptr float addrspace(2)* %10, i32 229
>  %100 = load float addrspace(2)* %99, !tbaa !0
>  %101 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %102 = load <16 x i8> addrspace(2)* %101, !tbaa !0
>  %103 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %102, i32 0, i32 %5)
>  %104 = extractelement <4 x float> %103, i32 0
>  %105 = extractelement <4 x float> %103, i32 1
>  %106 = extractelement <4 x float> %103, i32 2
>  %107 = extractelement <4 x float> %103, i32 3
>  %108 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %109 = load <16 x i8> addrspace(2)* %108, !tbaa !0
>  %110 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %109, i32 0, i32 %5)
>  %111 = extractelement <4 x float> %110, i32 0
>  %112 = extractelement <4 x float> %110, i32 1
>  %113 = extractelement <4 x float> %110, i32 2
>  %114 = extractelement <4 x float> %110, i32 3
>  %115 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %116 = load <16 x i8> addrspace(2)* %115, !tbaa !0
>  %117 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %116, i32 0, i32 %5)
>  %118 = extractelement <4 x float> %117, i32 0
>  %119 = extractelement <4 x float> %117, i32 1
>  %120 = extractelement <4 x float> %117, i32 2
>  %121 = fmul float %111, %58
>  %122 = fmul float %112, %60
>  %123 = fadd float %121, %122
>  %124 = fmul float %113, %62
>  %125 = fadd float %123, %124
>  %126 = fmul float %114, %64
>  %127 = fadd float %125, %126
>  %128 = fmul float %111, %66
>  %129 = fmul float %112, %68
>  %130 = fadd float %128, %129
>  %131 = fmul float %113, %70
>  %132 = fadd float %130, %131
>  %133 = fmul float %114, %72
>  %134 = fadd float %132, %133
>  %135 = fmul float %118, %16
>  %136 = fadd float %135, %104
>  %137 = fmul float %119, %16
>  %138 = fadd float %137, %105
>  %139 = fmul float %120, %16
>  %140 = fadd float %139, %106
>  %141 = fmul float %136, %74
>  %142 = fmul float %138, %76
>  %143 = fadd float %141, %142
>  %144 = fmul float %140, %78
>  %145 = fadd float %143, %144
>  %146 = fmul float %107, %80
>  %147 = fadd float %145, %146
>  %148 = fmul float %136, %82
>  %149 = fmul float %138, %84
>  %150 = fadd float %148, %149
>  %151 = fmul float %140, %86
>  %152 = fadd float %150, %151
>  %153 = fmul float %107, %88
>  %154 = fadd float %152, %153
>  %155 = fmul float %136, %90
>  %156 = fmul float %138, %92
>  %157 = fadd float %155, %156
>  %158 = fmul float %140, %94
>  %159 = fadd float %157, %158
>  %160 = fmul float %107, %96
>  %161 = fadd float %159, %160
>  %162 = fmul float %147, %34
>  %163 = fmul float %154, %36
>  %164 = fadd float %162, %163
>  %165 = fmul float %161, %38
>  %166 = fadd float %164, %165
>  %167 = fmul float %12, %40
>  %168 = fadd float %166, %167
>  %169 = fmul float %147, %18
>  %170 = fmul float %154, %20
>  %171 = fadd float %169, %170
>  %172 = fmul float %161, %22
>  %173 = fadd float %171, %172
>  %174 = fmul float %12, %24
>  %175 = fadd float %173, %174
>  %176 = fmul float %147, %26
>  %177 = fmul float %154, %28
>  %178 = fadd float %176, %177
>  %179 = fmul float %161, %30
>  %180 = fadd float %178, %179
>  %181 = fmul float %12, %32
>  %182 = fadd float %180, %181
>  %183 = fmul float %147, %42
>  %184 = fmul float %154, %44
>  %185 = fadd float %183, %184
>  %186 = fmul float %161, %46
>  %187 = fadd float %185, %186
>  %188 = fmul float %12, %48
>  %189 = fadd float %187, %188
>  %190 = fmul float %147, %50
>  %191 = fmul float %154, %52
>  %192 = fadd float %190, %191
>  %193 = fmul float %161, %54
>  %194 = fadd float %192, %193
>  %195 = fmul float %12, %56
>  %196 = fadd float %194, %195
>  %197 = fsub float -0.000000e+00, %189
>  %198 = fmul float %168, %14
>  %199 = fadd float %198, %197
>  %200 = fsub float -0.000000e+00, %182
>  %201 = fmul float %98, %189
>  %202 = fadd float %201, %175
>  %203 = fmul float %100, %189
>  %204 = fadd float %203, %200
>  %205 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %206 = load float addrspace(2)* addrspace(2)* %205, !tbaa !0
>  %207 = getelementptr float addrspace(2)* %206, i32 0
>  %208 = load float addrspace(2)* %207, !tbaa !0
>  %209 = fmul float %208, %175
>  %210 = getelementptr float addrspace(2)* %206, i32 1
>  %211 = load float addrspace(2)* %210, !tbaa !0
>  %212 = fmul float %211, %182
>  %213 = fadd float %209, %212
>  %214 = getelementptr float addrspace(2)* %206, i32 2
>  %215 = load float addrspace(2)* %214, !tbaa !0
>  %216 = fmul float %215, %168
>  %217 = fadd float %213, %216
>  %218 = getelementptr float addrspace(2)* %206, i32 3
>  %219 = load float addrspace(2)* %218, !tbaa !0
>  %220 = fmul float %219, %189
>  %221 = fadd float %217, %220
>  %222 = getelementptr float addrspace(2)* %206, i32 4
>  %223 = load float addrspace(2)* %222, !tbaa !0
>  %224 = fmul float %223, %175
>  %225 = getelementptr float addrspace(2)* %206, i32 5
>  %226 = load float addrspace(2)* %225, !tbaa !0
>  %227 = fmul float %226, %182
>  %228 = fadd float %224, %227
>  %229 = getelementptr float addrspace(2)* %206, i32 6
>  %230 = load float addrspace(2)* %229, !tbaa !0
>  %231 = fmul float %230, %168
>  %232 = fadd float %228, %231
>  %233 = getelementptr float addrspace(2)* %206, i32 7
>  %234 = load float addrspace(2)* %233, !tbaa !0
>  %235 = fmul float %234, %189
>  %236 = fadd float %232, %235
>  %237 = getelementptr float addrspace(2)* %206, i32 8
>  %238 = load float addrspace(2)* %237, !tbaa !0
>  %239 = fmul float %238, %175
>  %240 = getelementptr float addrspace(2)* %206, i32 9
>  %241 = load float addrspace(2)* %240, !tbaa !0
>  %242 = fmul float %241, %182
>  %243 = fadd float %239, %242
>  %244 = getelementptr float addrspace(2)* %206, i32 10
>  %245 = load float addrspace(2)* %244, !tbaa !0
>  %246 = fmul float %245, %168
>  %247 = fadd float %243, %246
>  %248 = getelementptr float addrspace(2)* %206, i32 11
>  %249 = load float addrspace(2)* %248, !tbaa !0
>  %250 = fmul float %249, %189
>  %251 = fadd float %247, %250
>  %252 = getelementptr float addrspace(2)* %206, i32 12
>  %253 = load float addrspace(2)* %252, !tbaa !0
>  %254 = fmul float %253, %175
>  %255 = getelementptr float addrspace(2)* %206, i32 13
>  %256 = load float addrspace(2)* %255, !tbaa !0
>  %257 = fmul float %256, %182
>  %258 = fadd float %254, %257
>  %259 = getelementptr float addrspace(2)* %206, i32 14
>  %260 = load float addrspace(2)* %259, !tbaa !0
>  %261 = fmul float %260, %168
>  %262 = fadd float %258, %261
>  %263 = getelementptr float addrspace(2)* %206, i32 15
>  %264 = load float addrspace(2)* %263, !tbaa !0
>  %265 = fmul float %264, %189
>  %266 = fadd float %262, %265
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %221, float %236, float %251, float %266)
>  %267 = getelementptr float addrspace(2)* %206, i32 16
>  %268 = load float addrspace(2)* %267, !tbaa !0
>  %269 = fmul float %268, %175
>  %270 = getelementptr float addrspace(2)* %206, i32 17
>  %271 = load float addrspace(2)* %270, !tbaa !0
>  %272 = fmul float %271, %182
>  %273 = fadd float %269, %272
>  %274 = getelementptr float addrspace(2)* %206, i32 18
>  %275 = load float addrspace(2)* %274, !tbaa !0
>  %276 = fmul float %275, %168
>  %277 = fadd float %273, %276
>  %278 = getelementptr float addrspace(2)* %206, i32 19
>  %279 = load float addrspace(2)* %278, !tbaa !0
>  %280 = fmul float %279, %189
>  %281 = fadd float %277, %280
>  %282 = getelementptr float addrspace(2)* %206, i32 20
>  %283 = load float addrspace(2)* %282, !tbaa !0
>  %284 = fmul float %283, %175
>  %285 = getelementptr float addrspace(2)* %206, i32 21
>  %286 = load float addrspace(2)* %285, !tbaa !0
>  %287 = fmul float %286, %182
>  %288 = fadd float %284, %287
>  %289 = getelementptr float addrspace(2)* %206, i32 22
>  %290 = load float addrspace(2)* %289, !tbaa !0
>  %291 = fmul float %290, %168
>  %292 = fadd float %288, %291
>  %293 = getelementptr float addrspace(2)* %206, i32 23
>  %294 = load float addrspace(2)* %293, !tbaa !0
>  %295 = fmul float %294, %189
>  %296 = fadd float %292, %295
>  %297 = getelementptr float addrspace(2)* %206, i32 24
>  %298 = load float addrspace(2)* %297, !tbaa !0
>  %299 = fmul float %298, %175
>  %300 = getelementptr float addrspace(2)* %206, i32 25
>  %301 = load float addrspace(2)* %300, !tbaa !0
>  %302 = fmul float %301, %182
>  %303 = fadd float %299, %302
>  %304 = getelementptr float addrspace(2)* %206, i32 26
>  %305 = load float addrspace(2)* %304, !tbaa !0
>  %306 = fmul float %305, %168
>  %307 = fadd float %303, %306
>  %308 = getelementptr float addrspace(2)* %206, i32 27
>  %309 = load float addrspace(2)* %308, !tbaa !0
>  %310 = fmul float %309, %189
>  %311 = fadd float %307, %310
>  %312 = getelementptr float addrspace(2)* %206, i32 28
>  %313 = load float addrspace(2)* %312, !tbaa !0
>  %314 = fmul float %313, %175
>  %315 = getelementptr float addrspace(2)* %206, i32 29
>  %316 = load float addrspace(2)* %315, !tbaa !0
>  %317 = fmul float %316, %182
>  %318 = fadd float %314, %317
>  %319 = getelementptr float addrspace(2)* %206, i32 30
>  %320 = load float addrspace(2)* %319, !tbaa !0
>  %321 = fmul float %320, %168
>  %322 = fadd float %318, %321
>  %323 = getelementptr float addrspace(2)* %206, i32 31
>  %324 = load float addrspace(2)* %323, !tbaa !0
>  %325 = fmul float %324, %189
>  %326 = fadd float %322, %325
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %281, float %296, float %311, float %326)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %127, float %134, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %147, float %154, float %161, float %196)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %202, float %204, float %199, float %189)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840700
>bf8c007f
>e00c2000
>80020300
>c0840708
>bf8c0070
>e00c2000
>80020900
>c0410100
>bf8c0070
>c002030c
>bf8c007f
>d2820007
>040c0909
>d2820008
>0410090a
>c00283d9
>bf8c007f
>10021005
>c00283d8
>bf8c007f
>d2820001
>04040b07
>d2820009
>0414090b
>c00203da
>bf8c007f
>d2820001
>04040909
>c00203db
>bf8c007f
>d2820001
>04040906
>c00203dd
>bf8c007f
>10041004
>c00203dc
>bf8c007f
>d2820002
>04080907
>c00203de
>bf8c007f
>d2820002
>04080909
>c00203df
>bf8c007f
>d2820002
>04080906
>c0020321
>bf8c007f
>10140404
>c0020320
>bf8c007f
>d282000a
>04280901
>c00203e1
>bf8c007f
>10101004
>c00203e0
>bf8c007f
>d2820007
>04200907
>c00203e2
>bf8c007f
>d2820007
>041c0909
>c00203e3
>bf8c007f
>d2820003
>041c0906
>c0020322
>bf8c007f
>d2820004
>04280903
>c0020301
>c0028323
>bf8c007f
>7e0a0205
>d2820004
>04120a04
>c0028325
>bf8c007f
>100a0405
>c0028324
>bf8c007f
>d2820005
>04140b01
>c0028326
>bf8c007f
>d2820005
>04140b03
>c0028327
>bf8c007f
>7e0c0205
>d2820005
>04160c04
>c0400102
>bf8c007f
>c002810d
>bf8c007f
>100c0a05
>c002810c
>bf8c007f
>d2820007
>041a0805
>c0028329
>bf8c007f
>100c0405
>c0028328
>bf8c007f
>d2820006
>04180b01
>c002832a
>bf8c007f
>d2820006
>04180b03
>c002832b
>bf8c007f
>7e100205
>d2820006
>041a1004
>c002810e
>bf8c007f
>d2820008
>041e0c05
>c002832d
>bf8c007f
>100e0405
>c002832c
>bf8c007f
>d2820007
>041c0b01
>c002832e
>bf8c007f
>d2820007
>041c0b03
>c002832f
>bf8c007f
>7e120205
>d2820007
>041e1204
>c002810f
>bf8c007f
>d2820008
>04220e05
>c0028109
>bf8c007f
>10120a05
>c0028108
>bf8c007f
>d2820009
>04260805
>c002810a
>bf8c007f
>d2820009
>04260c05
>c002810b
>bf8c007f
>d2820009
>04260e05
>c0028105
>bf8c007f
>10140a05
>c0028104
>bf8c007f
>d282000a
>042a0805
>c0028106
>bf8c007f
>d282000a
>042a0c05
>c0028107
>bf8c007f
>d282000a
>042a0e05
>c0028101
>bf8c007f
>10160a05
>c0028100
>bf8c007f
>d282000b
>042e0805
>c0028102
>bf8c007f
>d282000b
>042e0c05
>c0028103
>bf8c007f
>d282000b
>042e0e05
>f80000ef
>08090a0b
>c002811d
>bf8c000f
>10100a05
>c002811c
>bf8c007f
>d2820008
>04220805
>c002811e
>bf8c007f
>d2820008
>04220c05
>c002811f
>bf8c007f
>d2820008
>04220e05
>c0028119
>bf8c007f
>10120a05
>c0028118
>bf8c007f
>d2820009
>04260805
>c002811a
>bf8c007f
>d2820009
>04260c05
>c002811b
>bf8c007f
>d2820009
>04260e05
>c0028115
>bf8c007f
>10140a05
>c0028114
>bf8c007f
>d282000a
>042a0805
>c0028116
>bf8c007f
>d282000a
>042a0c05
>c0028117
>bf8c007f
>d282000a
>042a0e05
>c0028111
>bf8c007f
>10160a05
>c0028110
>bf8c007f
>d282000b
>042e0805
>c0028112
>bf8c007f
>d282000b
>042e0c05
>c0000113
>bf8c007f
>d282000b
>042e0e00
>f80000ff
>08090a0b
>c0840704
>bf8c000f
>e00c2000
>80020800
>c00003c5
>bf8c0070
>10001200
>c00003c4
>bf8c007f
>d2820000
>04000108
>c00003c6
>bf8c007f
>d2820000
>0400010a
>c00003c7
>bf8c007f
>d2820000
>0400010b
>c00003c1
>bf8c007f
>10181200
>c00003c0
>bf8c007f
>d282000c
>04300108
>c00003c2
>bf8c007f
>d282000c
>0430010a
>c00003c3
>bf8c007f
>d2820008
>0430010b
>7e120280
>f800020f
>09090008
>c0000335
>bf8c000f
>10000400
>c0000334
>bf8c007f
>d2820000
>04000101
>c0000336
>bf8c007f
>d2820000
>04000103
>c0000337
>bf8c007f
>7e100200
>d2820000
>04021004
>f800021f
>00030201
>c00003e4
>bf8c000f
>d2820000
>04120e00
>c0000302
>bf8c007f
>10020c00
>08020f01
>c00003e5
>bf8c007f
>10040e00
>08040b02
>f80008cf
>07010200
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], GENERIC[19], PERSPECTIVE
>DCL IN[2], GENERIC[20], PERSPECTIVE
>DCL IN[3], GENERIC[21], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL CONST[0..30]
>DCL TEMP[0..3], LOCAL
>DCL TEMP[4], ARRAY(1), LOCAL
>  0: MOV TEMP[0].xy, IN[1].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MOV TEMP[1].xy, IN[3].xyyy
>  3: TEX TEMP[2].xyz, TEMP[1], SAMP[1], 2D
>  4: MUL TEMP[2].xyz, TEMP[2].xyzz, CONST[12].xyzz
>  5: MAD TEMP[3].x, IN[2].wwww, CONST[11].wwww, -CONST[11].xxxx
>  6: MUL TEMP[1].xyz, TEMP[0].xyzz, IN[0].xyzz
>  7: MIN TEMP[3].x, TEMP[3].xxxx, CONST[11].zzzz
>  8: MOV_SAT TEMP[3].x, TEMP[3].xxxx
>  9: MUL TEMP[1].xyz, TEMP[2].xyzz, TEMP[1].xyzz
> 10: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[3].xxxx
> 11: MAD TEMP[2].xyz, TEMP[1].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 12: MUL TEMP[2].xyz, TEMP[3].xxxx, TEMP[2].xyzz
> 13: MUL TEMP[3].x, IN[0].wwww, CONST[12].wwww
> 14: MAD TEMP[1].xyz, TEMP[1].xyzz, CONST[30].xxxx, TEMP[2].xyzz
> 15: MUL TEMP[0].x, TEMP[0].wwww, TEMP[3].xxxx
> 16: MOV TEMP[1].w, TEMP[0].xxxx
> 17: MOV TEMP[4], TEMP[1]
> 18: MOV OUT[0], TEMP[4]
> 19: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 44
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 46
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 47
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 48
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 49
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 50
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 51
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 116
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 117
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 118
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 120
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %45 = load <32 x i8> addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %47 = load <16 x i8> addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %49 = load <32 x i8> addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %51 = load <16 x i8> addrspace(2)* %50, !tbaa !0
>  %52 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %53 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %54 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %55 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %3, <2 x i32> %5)
>  %56 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %57 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %58 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %3, <2 x i32> %5)
>  %59 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %3, <2 x i32> %6)
>  %60 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %3, <2 x i32> %6)
>  %61 = bitcast float %56 to i32
>  %62 = bitcast float %57 to i32
>  %63 = insertelement <2 x i32> undef, i32 %61, i32 0
>  %64 = insertelement <2 x i32> %63, i32 %62, i32 1
>  %65 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %64, <32 x i8> %45, <16 x i8> %47, i32 2)
>  %66 = extractelement <4 x float> %65, i32 0
>  %67 = extractelement <4 x float> %65, i32 1
>  %68 = extractelement <4 x float> %65, i32 2
>  %69 = extractelement <4 x float> %65, i32 3
>  %70 = bitcast float %59 to i32
>  %71 = bitcast float %60 to i32
>  %72 = insertelement <2 x i32> undef, i32 %70, i32 0
>  %73 = insertelement <2 x i32> %72, i32 %71, i32 1
>  %74 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %73, <32 x i8> %49, <16 x i8> %51, i32 2)
>  %75 = extractelement <4 x float> %74, i32 0
>  %76 = extractelement <4 x float> %74, i32 1
>  %77 = extractelement <4 x float> %74, i32 2
>  %78 = fmul float %75, %29
>  %79 = fmul float %76, %31
>  %80 = fmul float %77, %33
>  %81 = fsub float -0.000000e+00, %23
>  %82 = fmul float %58, %27
>  %83 = fadd float %82, %81
>  %84 = fmul float %66, %52
>  %85 = fmul float %67, %53
>  %86 = fmul float %68, %54
>  %87 = fcmp uge float %83, %25
>  %88 = select i1 %87, float %25, float %83
>  %89 = call float @llvm.AMDIL.clamp.(float %88, float 0.000000e+00, float 1.000000e+00)
>  %90 = fmul float %78, %84
>  %91 = fmul float %79, %85
>  %92 = fmul float %80, %86
>  %93 = fmul float %89, %89
>  %94 = fsub float -0.000000e+00, %43
>  %95 = fmul float %90, %94
>  %96 = fadd float %95, %37
>  %97 = fsub float -0.000000e+00, %43
>  %98 = fmul float %91, %97
>  %99 = fadd float %98, %39
>  %100 = fsub float -0.000000e+00, %43
>  %101 = fmul float %92, %100
>  %102 = fadd float %101, %41
>  %103 = fmul float %93, %96
>  %104 = fmul float %93, %99
>  %105 = fmul float %93, %102
>  %106 = fmul float %55, %35
>  %107 = fmul float %90, %43
>  %108 = fadd float %107, %103
>  %109 = fmul float %91, %43
>  %110 = fadd float %109, %104
>  %111 = fmul float %92, %43
>  %112 = fadd float %111, %105
>  %113 = fmul float %69, %106
>  %114 = fcmp uge float %113, 0x3FE6565660000000
>  %115 = sext i1 %114 to i32
>  %116 = trunc i32 %115 to i1
>  %117 = select i1 %116, float 1.000000e+00, float -1.000000e+00
>  call void @llvm.AMDGPU.kill(float %117)
>  %118 = call i32 @llvm.SI.packf16(float %108, float %110)
>  %119 = bitcast i32 %118 to float
>  %120 = call i32 @llvm.SI.packf16(float %112, float %113)
>  %121 = bitcast i32 %120 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %119, float %121, float %119, float %121)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.AMDGPU.kill(float)
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8140500
>c8150501
>c8100400
>c8110401
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430404
>c8200300
>c8210301
>c0400100
>bf8c0070
>c0038133
>bf8c007f
>10101007
>10101107
>7e1202ff
>3f32b2b3
>d00c0008
>02021308
>d2000009
>0021e4f3
>7c261280
>c8240100
>c8250101
>10181305
>c8280d02
>c8290d03
>c8240c02
>c8250c03
>c0840304
>c0c60508
>bf8c007f
>f0800700
>00430909
>c0010131
>bf8c0070
>10041402
>10061902
>c0010178
>bf8c007f
>10040602
>c0018175
>bf8c007f
>08180403
>c8080b00
>c8090b01
>c001812f
>bf8c007f
>10040403
>c001812c
>bf8c007f
>0a040403
>c001812e
>bf8c007f
>d00c0004
>02000702
>7e1a0203
>d2000002
>00121b02
>d2060802
>02010102
>10040502
>10181902
>d2820003
>04300503
>c8300000
>c8310001
>10181904
>c0018130
>bf8c007f
>101a1203
>1018190d
>101a1802
>c0018174
>bf8c007f
>081a1a03
>101a1b02
>d282000c
>0434050c
>5e06070c
>c8300200
>c8310201
>10001906
>c0018132
>bf8c007f
>10021603
>10000101
>10020002
>c0000176
>bf8c007f
>08020200
>10020302
>d2820000
>04040500
>5e001100
>f8001c0f
>00030003
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], GENERIC[19], PERSPECTIVE
>DCL IN[2], GENERIC[20], PERSPECTIVE
>DCL IN[3], GENERIC[21], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL CONST[0..30]
>DCL TEMP[0..2], LOCAL
>DCL TEMP[3], ARRAY(1), LOCAL
>  0: MOV TEMP[0].xy, IN[1].xyyy
>  1: TEX TEMP[0].xyz, TEMP[0], SAMP[0], 2D
>  2: MUL TEMP[0].xyz, TEMP[0].xyzz, IN[0].xyzz
>  3: MAD TEMP[1].x, IN[2].wwww, CONST[11].wwww, -CONST[11].xxxx
>  4: MOV TEMP[2].xy, IN[3].xyyy
>  5: TEX TEMP[2].xyz, TEMP[2], SAMP[1], 2D
>  6: MUL TEMP[2].xyz, TEMP[2].xyzz, CONST[12].xyzz
>  7: MIN TEMP[1].x, TEMP[1].xxxx, CONST[11].zzzz
>  8: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>  9: MUL TEMP[2].xyz, TEMP[0].xyzz, TEMP[2].xyzz
> 10: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 11: MAD TEMP[0].xyz, TEMP[2].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 12: MUL TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz
> 13: MAD TEMP[2].xyz, TEMP[2].xyzz, CONST[30].xxxx, TEMP[0].xyzz
> 14: MUL TEMP[0].x, IN[2].wwww, CONST[29].wwww
> 15: MOV TEMP[2].w, TEMP[0].xxxx
> 16: MOV TEMP[3], TEMP[2]
> 17: MOV OUT[0], TEMP[3]
> 18: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 44
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 46
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 47
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 48
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 49
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 50
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 116
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 117
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 118
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 119
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 120
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %45 = load <32 x i8> addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %47 = load <16 x i8> addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %49 = load <32 x i8> addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %51 = load <16 x i8> addrspace(2)* %50, !tbaa !0
>  %52 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %53 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %54 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %55 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %56 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %57 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %3, <2 x i32> %5)
>  %58 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %3, <2 x i32> %6)
>  %59 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %3, <2 x i32> %6)
>  %60 = bitcast float %55 to i32
>  %61 = bitcast float %56 to i32
>  %62 = insertelement <2 x i32> undef, i32 %60, i32 0
>  %63 = insertelement <2 x i32> %62, i32 %61, i32 1
>  %64 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %63, <32 x i8> %45, <16 x i8> %47, i32 2)
>  %65 = extractelement <4 x float> %64, i32 0
>  %66 = extractelement <4 x float> %64, i32 1
>  %67 = extractelement <4 x float> %64, i32 2
>  %68 = fmul float %65, %52
>  %69 = fmul float %66, %53
>  %70 = fmul float %67, %54
>  %71 = fsub float -0.000000e+00, %23
>  %72 = fmul float %57, %27
>  %73 = fadd float %72, %71
>  %74 = bitcast float %58 to i32
>  %75 = bitcast float %59 to i32
>  %76 = insertelement <2 x i32> undef, i32 %74, i32 0
>  %77 = insertelement <2 x i32> %76, i32 %75, i32 1
>  %78 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %77, <32 x i8> %49, <16 x i8> %51, i32 2)
>  %79 = extractelement <4 x float> %78, i32 0
>  %80 = extractelement <4 x float> %78, i32 1
>  %81 = extractelement <4 x float> %78, i32 2
>  %82 = fmul float %79, %29
>  %83 = fmul float %80, %31
>  %84 = fmul float %81, %33
>  %85 = fcmp uge float %73, %25
>  %86 = select i1 %85, float %25, float %73
>  %87 = call float @llvm.AMDIL.clamp.(float %86, float 0.000000e+00, float 1.000000e+00)
>  %88 = fmul float %68, %82
>  %89 = fmul float %69, %83
>  %90 = fmul float %70, %84
>  %91 = fmul float %87, %87
>  %92 = fsub float -0.000000e+00, %43
>  %93 = fmul float %88, %92
>  %94 = fadd float %93, %35
>  %95 = fsub float -0.000000e+00, %43
>  %96 = fmul float %89, %95
>  %97 = fadd float %96, %37
>  %98 = fsub float -0.000000e+00, %43
>  %99 = fmul float %90, %98
>  %100 = fadd float %99, %39
>  %101 = fmul float %91, %94
>  %102 = fmul float %91, %97
>  %103 = fmul float %91, %100
>  %104 = fmul float %88, %43
>  %105 = fadd float %104, %101
>  %106 = fmul float %89, %43
>  %107 = fadd float %106, %102
>  %108 = fmul float %90, %43
>  %109 = fadd float %108, %103
>  %110 = fmul float %57, %41
>  %111 = call i32 @llvm.SI.packf16(float %105, float %107)
>  %112 = bitcast i32 %111 to float
>  %113 = call i32 @llvm.SI.packf16(float %109, float %110)
>  %114 = bitcast i32 %113 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %112, float %114, float %112, float %114)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8140d02
>c8150d03
>c8100c02
>c8110c03
>c0840304
>c0c60508
>bf8c007f
>f0800700
>00430204
>c0400100
>bf8c0070
>c0038131
>bf8c007f
>10100607
>c8180500
>c8190501
>c8140400
>c8150401
>c0840300
>c0c60500
>bf8c007f
>f0800700
>00430505
>c8240100
>c8250101
>bf8c0770
>10121306
>10141109
>c0010178
>bf8c007f
>10101402
>c0018175
>bf8c007f
>08161003
>c8200b00
>c8210b01
>c001812f
>bf8c007f
>10121003
>c001812c
>bf8c007f
>0a121203
>c001812e
>bf8c007f
>d00c0004
>02000709
>7e180203
>d2000009
>00121909
>d2060809
>02010109
>10121309
>10161709
>d282000a
>042c050a
>c0018130
>bf8c007f
>10160403
>c8300000
>c8310001
>10181905
>1016170c
>10181602
>c0018174
>bf8c007f
>08181803
>10181909
>d282000b
>0430050b
>5e14150b
>c0018132
>bf8c007f
>10040803
>c80c0200
>c80d0201
>10000707
>10000500
>10020002
>c0018176
>bf8c007f
>08020203
>10020309
>d2820000
>04040500
>c0000177
>bf8c007f
>10021000
>5e000300
>f8001c0f
>000a000a
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], CLIPVERTEX
>DCL OUT[3], GENERIC[19]
>DCL OUT[4], GENERIC[20]
>DCL OUT[5], GENERIC[21]
>DCL CONST[0..51]
>DCL TEMP[0..8], LOCAL
>  0: MAD TEMP[0], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  1: DP4 TEMP[1].x, TEMP[0], CONST[48]
>  2: DP4 TEMP[2].x, TEMP[0], CONST[49]
>  3: MOV TEMP[1].y, TEMP[2].xxxx
>  4: DP4 TEMP[2].x, TEMP[0], CONST[50]
>  5: MOV TEMP[1].z, TEMP[2].xxxx
>  6: DP4 TEMP[2].x, TEMP[0], CONST[4]
>  7: DP4 TEMP[3].x, TEMP[0], CONST[5]
>  8: MOV TEMP[2].y, TEMP[3].xxxx
>  9: DP4 TEMP[4].x, TEMP[0], CONST[12]
> 10: DP4 TEMP[5].x, TEMP[0], CONST[6]
> 11: MOV TEMP[2].z, TEMP[5].xxxx
> 12: DP4 TEMP[0].x, TEMP[0], CONST[7]
> 13: MOV TEMP[2].w, TEMP[0].xxxx
> 14: MOV TEMP[1].w, TEMP[4].xxxx
> 15: MOV TEMP[4].xy, IN[1].xyxx
> 16: MUL TEMP[6], IN[2].xyxx, CONST[0].yyxx
> 17: MAD TEMP[7], CONST[47].wwww, CONST[0].xxxy, CONST[0].yyyx
> 18: MOV TEMP[8], TEMP[2]
> 19: MAD TEMP[5].x, TEMP[5].xxxx, CONST[0].zzzz, -TEMP[0].xxxx
> 20: MOV TEMP[2].z, TEMP[5].xxxx
> 21: MOV TEMP[2].y, -TEMP[3].xxxx
> 22: MAD TEMP[2].xy, CONST[51].xyyy, TEMP[0].xxxx, TEMP[2].xyyy
> 23: MOV OUT[3], TEMP[4]
> 24: MOV OUT[5], TEMP[6]
> 25: MOV OUT[0], TEMP[2]
> 26: MOV OUT[4], TEMP[1]
> 27: MOV OUT[2], TEMP[8]
> 28: MOV_SAT OUT[1], TEMP[7]
> 29: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 16
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 17
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 18
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 19
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 20
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 21
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 22
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 23
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 24
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 25
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 26
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 27
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 28
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 29
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 30
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 31
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 48
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 49
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 50
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 51
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 191
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 192
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 193
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 194
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 195
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 196
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 197
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 198
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 199
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 200
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 201
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 202
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 203
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 204
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 205
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %88 = load <16 x i8> addrspace(2)* %87, !tbaa !0
>  %89 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %88, i32 0, i32 %5)
>  %90 = extractelement <4 x float> %89, i32 0
>  %91 = extractelement <4 x float> %89, i32 1
>  %92 = extractelement <4 x float> %89, i32 2
>  %93 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %94 = load <16 x i8> addrspace(2)* %93, !tbaa !0
>  %95 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %94, i32 0, i32 %5)
>  %96 = extractelement <4 x float> %95, i32 0
>  %97 = extractelement <4 x float> %95, i32 1
>  %98 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %99 = load <16 x i8> addrspace(2)* %98, !tbaa !0
>  %100 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %99, i32 0, i32 %5)
>  %101 = extractelement <4 x float> %100, i32 0
>  %102 = extractelement <4 x float> %100, i32 1
>  %103 = fmul float %90, %14
>  %104 = fadd float %103, %12
>  %105 = fmul float %91, %14
>  %106 = fadd float %105, %12
>  %107 = fmul float %92, %14
>  %108 = fadd float %107, %12
>  %109 = fmul float %90, %12
>  %110 = fadd float %109, %14
>  %111 = fmul float %104, %60
>  %112 = fmul float %106, %62
>  %113 = fadd float %111, %112
>  %114 = fmul float %108, %64
>  %115 = fadd float %113, %114
>  %116 = fmul float %110, %66
>  %117 = fadd float %115, %116
>  %118 = fmul float %104, %68
>  %119 = fmul float %106, %70
>  %120 = fadd float %118, %119
>  %121 = fmul float %108, %72
>  %122 = fadd float %120, %121
>  %123 = fmul float %110, %74
>  %124 = fadd float %122, %123
>  %125 = fmul float %104, %76
>  %126 = fmul float %106, %78
>  %127 = fadd float %125, %126
>  %128 = fmul float %108, %80
>  %129 = fadd float %127, %128
>  %130 = fmul float %110, %82
>  %131 = fadd float %129, %130
>  %132 = fmul float %104, %18
>  %133 = fmul float %106, %20
>  %134 = fadd float %132, %133
>  %135 = fmul float %108, %22
>  %136 = fadd float %134, %135
>  %137 = fmul float %110, %24
>  %138 = fadd float %136, %137
>  %139 = fmul float %104, %26
>  %140 = fmul float %106, %28
>  %141 = fadd float %139, %140
>  %142 = fmul float %108, %30
>  %143 = fadd float %141, %142
>  %144 = fmul float %110, %32
>  %145 = fadd float %143, %144
>  %146 = fmul float %104, %50
>  %147 = fmul float %106, %52
>  %148 = fadd float %146, %147
>  %149 = fmul float %108, %54
>  %150 = fadd float %148, %149
>  %151 = fmul float %110, %56
>  %152 = fadd float %150, %151
>  %153 = fmul float %104, %34
>  %154 = fmul float %106, %36
>  %155 = fadd float %153, %154
>  %156 = fmul float %108, %38
>  %157 = fadd float %155, %156
>  %158 = fmul float %110, %40
>  %159 = fadd float %157, %158
>  %160 = fmul float %104, %42
>  %161 = fmul float %106, %44
>  %162 = fadd float %160, %161
>  %163 = fmul float %108, %46
>  %164 = fadd float %162, %163
>  %165 = fmul float %110, %48
>  %166 = fadd float %164, %165
>  %167 = fmul float %101, %14
>  %168 = fmul float %102, %14
>  %169 = fmul float %101, %12
>  %170 = fmul float %101, %12
>  %171 = fmul float %58, %12
>  %172 = fadd float %171, %14
>  %173 = fmul float %58, %12
>  %174 = fadd float %173, %14
>  %175 = fmul float %58, %12
>  %176 = fadd float %175, %14
>  %177 = fmul float %58, %14
>  %178 = fadd float %177, %12
>  %179 = fsub float -0.000000e+00, %166
>  %180 = fmul float %159, %16
>  %181 = fadd float %180, %179
>  %182 = fsub float -0.000000e+00, %145
>  %183 = fmul float %84, %166
>  %184 = fadd float %183, %138
>  %185 = fmul float %86, %166
>  %186 = fadd float %185, %182
>  %187 = call float @llvm.AMDIL.clamp.(float %172, float 0.000000e+00, float 1.000000e+00)
>  %188 = call float @llvm.AMDIL.clamp.(float %174, float 0.000000e+00, float 1.000000e+00)
>  %189 = call float @llvm.AMDIL.clamp.(float %176, float 0.000000e+00, float 1.000000e+00)
>  %190 = call float @llvm.AMDIL.clamp.(float %178, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %187, float %188, float %189, float %190)
>  %191 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %192 = load float addrspace(2)* addrspace(2)* %191, !tbaa !0
>  %193 = getelementptr float addrspace(2)* %192, i32 0
>  %194 = load float addrspace(2)* %193, !tbaa !0
>  %195 = fmul float %194, %138
>  %196 = getelementptr float addrspace(2)* %192, i32 1
>  %197 = load float addrspace(2)* %196, !tbaa !0
>  %198 = fmul float %197, %145
>  %199 = fadd float %195, %198
>  %200 = getelementptr float addrspace(2)* %192, i32 2
>  %201 = load float addrspace(2)* %200, !tbaa !0
>  %202 = fmul float %201, %159
>  %203 = fadd float %199, %202
>  %204 = getelementptr float addrspace(2)* %192, i32 3
>  %205 = load float addrspace(2)* %204, !tbaa !0
>  %206 = fmul float %205, %166
>  %207 = fadd float %203, %206
>  %208 = getelementptr float addrspace(2)* %192, i32 4
>  %209 = load float addrspace(2)* %208, !tbaa !0
>  %210 = fmul float %209, %138
>  %211 = getelementptr float addrspace(2)* %192, i32 5
>  %212 = load float addrspace(2)* %211, !tbaa !0
>  %213 = fmul float %212, %145
>  %214 = fadd float %210, %213
>  %215 = getelementptr float addrspace(2)* %192, i32 6
>  %216 = load float addrspace(2)* %215, !tbaa !0
>  %217 = fmul float %216, %159
>  %218 = fadd float %214, %217
>  %219 = getelementptr float addrspace(2)* %192, i32 7
>  %220 = load float addrspace(2)* %219, !tbaa !0
>  %221 = fmul float %220, %166
>  %222 = fadd float %218, %221
>  %223 = getelementptr float addrspace(2)* %192, i32 8
>  %224 = load float addrspace(2)* %223, !tbaa !0
>  %225 = fmul float %224, %138
>  %226 = getelementptr float addrspace(2)* %192, i32 9
>  %227 = load float addrspace(2)* %226, !tbaa !0
>  %228 = fmul float %227, %145
>  %229 = fadd float %225, %228
>  %230 = getelementptr float addrspace(2)* %192, i32 10
>  %231 = load float addrspace(2)* %230, !tbaa !0
>  %232 = fmul float %231, %159
>  %233 = fadd float %229, %232
>  %234 = getelementptr float addrspace(2)* %192, i32 11
>  %235 = load float addrspace(2)* %234, !tbaa !0
>  %236 = fmul float %235, %166
>  %237 = fadd float %233, %236
>  %238 = getelementptr float addrspace(2)* %192, i32 12
>  %239 = load float addrspace(2)* %238, !tbaa !0
>  %240 = fmul float %239, %138
>  %241 = getelementptr float addrspace(2)* %192, i32 13
>  %242 = load float addrspace(2)* %241, !tbaa !0
>  %243 = fmul float %242, %145
>  %244 = fadd float %240, %243
>  %245 = getelementptr float addrspace(2)* %192, i32 14
>  %246 = load float addrspace(2)* %245, !tbaa !0
>  %247 = fmul float %246, %159
>  %248 = fadd float %244, %247
>  %249 = getelementptr float addrspace(2)* %192, i32 15
>  %250 = load float addrspace(2)* %249, !tbaa !0
>  %251 = fmul float %250, %166
>  %252 = fadd float %248, %251
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %207, float %222, float %237, float %252)
>  %253 = getelementptr float addrspace(2)* %192, i32 16
>  %254 = load float addrspace(2)* %253, !tbaa !0
>  %255 = fmul float %254, %138
>  %256 = getelementptr float addrspace(2)* %192, i32 17
>  %257 = load float addrspace(2)* %256, !tbaa !0
>  %258 = fmul float %257, %145
>  %259 = fadd float %255, %258
>  %260 = getelementptr float addrspace(2)* %192, i32 18
>  %261 = load float addrspace(2)* %260, !tbaa !0
>  %262 = fmul float %261, %159
>  %263 = fadd float %259, %262
>  %264 = getelementptr float addrspace(2)* %192, i32 19
>  %265 = load float addrspace(2)* %264, !tbaa !0
>  %266 = fmul float %265, %166
>  %267 = fadd float %263, %266
>  %268 = getelementptr float addrspace(2)* %192, i32 20
>  %269 = load float addrspace(2)* %268, !tbaa !0
>  %270 = fmul float %269, %138
>  %271 = getelementptr float addrspace(2)* %192, i32 21
>  %272 = load float addrspace(2)* %271, !tbaa !0
>  %273 = fmul float %272, %145
>  %274 = fadd float %270, %273
>  %275 = getelementptr float addrspace(2)* %192, i32 22
>  %276 = load float addrspace(2)* %275, !tbaa !0
>  %277 = fmul float %276, %159
>  %278 = fadd float %274, %277
>  %279 = getelementptr float addrspace(2)* %192, i32 23
>  %280 = load float addrspace(2)* %279, !tbaa !0
>  %281 = fmul float %280, %166
>  %282 = fadd float %278, %281
>  %283 = getelementptr float addrspace(2)* %192, i32 24
>  %284 = load float addrspace(2)* %283, !tbaa !0
>  %285 = fmul float %284, %138
>  %286 = getelementptr float addrspace(2)* %192, i32 25
>  %287 = load float addrspace(2)* %286, !tbaa !0
>  %288 = fmul float %287, %145
>  %289 = fadd float %285, %288
>  %290 = getelementptr float addrspace(2)* %192, i32 26
>  %291 = load float addrspace(2)* %290, !tbaa !0
>  %292 = fmul float %291, %159
>  %293 = fadd float %289, %292
>  %294 = getelementptr float addrspace(2)* %192, i32 27
>  %295 = load float addrspace(2)* %294, !tbaa !0
>  %296 = fmul float %295, %166
>  %297 = fadd float %293, %296
>  %298 = getelementptr float addrspace(2)* %192, i32 28
>  %299 = load float addrspace(2)* %298, !tbaa !0
>  %300 = fmul float %299, %138
>  %301 = getelementptr float addrspace(2)* %192, i32 29
>  %302 = load float addrspace(2)* %301, !tbaa !0
>  %303 = fmul float %302, %145
>  %304 = fadd float %300, %303
>  %305 = getelementptr float addrspace(2)* %192, i32 30
>  %306 = load float addrspace(2)* %305, !tbaa !0
>  %307 = fmul float %306, %159
>  %308 = fadd float %304, %307
>  %309 = getelementptr float addrspace(2)* %192, i32 31
>  %310 = load float addrspace(2)* %309, !tbaa !0
>  %311 = fmul float %310, %166
>  %312 = fadd float %308, %311
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %267, float %282, float %297, float %312)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %96, float %97, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %117, float %124, float %131, float %152)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %167, float %168, float %169, float %170)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %184, float %186, float %181, float %166)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0410100
>bf8c007f
>c00403bf
>c0028300
>bf8c007f
>7e060205
>c0020301
>bf8c007f
>7e020204
>d2820002
>040e0208
>d2060802
>02010102
>d2820004
>04060608
>d2060804
>02010104
>f800020f
>02040404
>c0840700
>bf8c000f
>e00c2000
>80020600
>bf8c0770
>d2820002
>040c0906
>d2820004
>040c0907
>c0040311
>bf8c007f
>100a0808
>c0040310
>bf8c007f
>d282000a
>04141102
>d2820005
>040c0908
>c0040312
>bf8c007f
>d2820003
>04281105
>d2820006
>04040b06
>c0040313
>bf8c007f
>d2820001
>040c1106
>c0040315
>bf8c007f
>10060808
>c0040314
>bf8c007f
>d2820003
>040c1102
>c0040316
>bf8c007f
>d2820003
>040c1105
>c0040317
>bf8c007f
>d2820003
>040c1106
>c0400102
>bf8c007f
>c004010d
>bf8c007f
>100e0608
>c004010c
>bf8c007f
>d2820008
>041e0208
>c0040319
>bf8c007f
>100e0808
>c0040318
>bf8c007f
>d2820007
>041c1102
>c004031a
>bf8c007f
>d2820007
>041c1105
>c004031b
>bf8c007f
>d2820007
>041c1106
>c004010e
>bf8c007f
>d2820009
>04220e08
>c004031d
>bf8c007f
>10100808
>c004031c
>bf8c007f
>d2820008
>04201102
>c004031e
>bf8c007f
>d2820008
>04201105
>c004031f
>bf8c007f
>d2820008
>04201106
>c004010f
>bf8c007f
>d2820009
>04261008
>c0040109
>bf8c007f
>10140608
>c0040108
>bf8c007f
>d282000a
>042a0208
>c004010a
>bf8c007f
>d282000a
>042a0e08
>c004010b
>bf8c007f
>d282000a
>042a1008
>c0040105
>bf8c007f
>10160608
>c0040104
>bf8c007f
>d282000b
>042e0208
>c0040106
>bf8c007f
>d282000b
>042e0e08
>c0040107
>bf8c007f
>d282000b
>042e1008
>c0040101
>bf8c007f
>10180608
>c0040100
>bf8c007f
>d282000c
>04320208
>c0040102
>bf8c007f
>d282000c
>04320e08
>c0040103
>bf8c007f
>d282000c
>04321008
>f80000ef
>090a0b0c
>c004011d
>bf8c000f
>10120608
>c004011c
>bf8c007f
>d2820009
>04260208
>c004011e
>bf8c007f
>d2820009
>04260e08
>c004011f
>bf8c007f
>d2820009
>04261008
>c0040119
>bf8c007f
>10140608
>c0040118
>bf8c007f
>d282000a
>042a0208
>c004011a
>bf8c007f
>d282000a
>042a0e08
>c004011b
>bf8c007f
>d282000a
>042a1008
>c0040115
>bf8c007f
>10160608
>c0040114
>bf8c007f
>d282000b
>042e0208
>c0040116
>bf8c007f
>d282000b
>042e0e08
>c0040117
>bf8c007f
>d282000b
>042e1008
>c0040111
>bf8c007f
>10180608
>c0040110
>bf8c007f
>d282000c
>04320208
>c0040112
>bf8c007f
>d282000c
>04320e08
>c0000113
>bf8c007f
>d282000c
>04321000
>f80000ff
>090a0b0c
>c0840704
>bf8c000f
>e00c2000
>80020900
>7e1a0280
>bf8c0770
>f800021f
>0d0d0a09
>c0000331
>bf8c000f
>10120800
>c0000330
>bf8c007f
>d2820009
>04240102
>c0000332
>bf8c007f
>d2820009
>04240105
>c0000333
>bf8c007f
>d2820009
>04240106
>c00003c9
>bf8c007f
>10140800
>c00003c8
>bf8c007f
>d282000a
>04280102
>c00003ca
>bf8c007f
>d282000a
>04280105
>c00003cb
>bf8c007f
>d282000a
>04280106
>c00003c5
>bf8c007f
>10160800
>c00003c4
>bf8c007f
>d282000b
>042c0102
>c00003c6
>bf8c007f
>d282000b
>042c0105
>c00003c7
>bf8c007f
>d282000b
>042c0106
>c00003c1
>bf8c007f
>10080800
>c00003c0
>bf8c007f
>d2820002
>04100102
>c00003c2
>bf8c007f
>d2820002
>04080105
>c00003c3
>bf8c007f
>d2820002
>04080106
>f800022f
>090a0b02
>c0840708
>bf8c000f
>e00c2000
>80020900
>bf8c0770
>10001205
>10041404
>10081204
>f800023f
>00000204
>c00003cc
>bf8c000f
>d2820000
>04061000
>c0000302
>bf8c007f
>10020e00
>08021101
>c00003cd
>bf8c007f
>10041000
>08040702
>f80008cf
>08010200
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], GENERIC[19], PERSPECTIVE
>DCL IN[2], GENERIC[20], PERSPECTIVE
>DCL IN[3], GENERIC[21], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL CONST[0..30]
>DCL TEMP[0..3], LOCAL
>DCL TEMP[4], ARRAY(1), LOCAL
>  0: MOV TEMP[0].xy, IN[3].xyyy
>  1: TEX TEMP[0].xyz, TEMP[0], SAMP[1], 2D
>  2: MOV TEMP[1].xy, IN[1].xyyy
>  3: TEX TEMP[1], TEMP[1], SAMP[0], 2D
>  4: MUL TEMP[2].xyz, TEMP[0].xyzz, CONST[12].xyzz
>  5: MUL TEMP[0].xyz, TEMP[1].xyzz, IN[0].xyzz
>  6: MUL TEMP[0].xyz, TEMP[2].xyzz, TEMP[0].xyzz
>  7: MAD TEMP[2].xyz, TEMP[1].xyzz, IN[0].xyzz, -TEMP[0].xyzz
>  8: MAD TEMP[3].x, IN[2].wwww, CONST[11].wwww, -CONST[11].xxxx
>  9: MAD TEMP[2].xyz, TEMP[1].wwww, TEMP[2].xyzz, TEMP[0].xyzz
> 10: MIN TEMP[1].x, TEMP[3].xxxx, CONST[11].zzzz
> 11: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 12: MAD TEMP[0].xyz, TEMP[2].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 13: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 14: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xxxx
> 15: MAD TEMP[2].xyz, TEMP[2].xyzz, CONST[30].xxxx, TEMP[0].xyzz
> 16: MUL TEMP[0].x, IN[2].wwww, CONST[29].wwww
> 17: MOV TEMP[2].w, TEMP[0].xxxx
> 18: MOV TEMP[4], TEMP[2]
> 19: MOV OUT[0], TEMP[4]
> 20: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 44
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 46
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 47
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 48
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 49
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 50
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 116
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 117
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 118
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 119
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 120
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %45 = load <32 x i8> addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %47 = load <16 x i8> addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %49 = load <32 x i8> addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %51 = load <16 x i8> addrspace(2)* %50, !tbaa !0
>  %52 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %53 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %54 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %55 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %56 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %57 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %3, <2 x i32> %5)
>  %58 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %3, <2 x i32> %6)
>  %59 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %3, <2 x i32> %6)
>  %60 = bitcast float %58 to i32
>  %61 = bitcast float %59 to i32
>  %62 = insertelement <2 x i32> undef, i32 %60, i32 0
>  %63 = insertelement <2 x i32> %62, i32 %61, i32 1
>  %64 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %63, <32 x i8> %49, <16 x i8> %51, i32 2)
>  %65 = extractelement <4 x float> %64, i32 0
>  %66 = extractelement <4 x float> %64, i32 1
>  %67 = extractelement <4 x float> %64, i32 2
>  %68 = bitcast float %55 to i32
>  %69 = bitcast float %56 to i32
>  %70 = insertelement <2 x i32> undef, i32 %68, i32 0
>  %71 = insertelement <2 x i32> %70, i32 %69, i32 1
>  %72 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %71, <32 x i8> %45, <16 x i8> %47, i32 2)
>  %73 = extractelement <4 x float> %72, i32 0
>  %74 = extractelement <4 x float> %72, i32 1
>  %75 = extractelement <4 x float> %72, i32 2
>  %76 = extractelement <4 x float> %72, i32 3
>  %77 = fmul float %65, %29
>  %78 = fmul float %66, %31
>  %79 = fmul float %67, %33
>  %80 = fmul float %73, %52
>  %81 = fmul float %74, %53
>  %82 = fmul float %75, %54
>  %83 = fmul float %77, %80
>  %84 = fmul float %78, %81
>  %85 = fmul float %79, %82
>  %86 = fsub float -0.000000e+00, %83
>  %87 = fmul float %73, %52
>  %88 = fadd float %87, %86
>  %89 = fsub float -0.000000e+00, %84
>  %90 = fmul float %74, %53
>  %91 = fadd float %90, %89
>  %92 = fsub float -0.000000e+00, %85
>  %93 = fmul float %75, %54
>  %94 = fadd float %93, %92
>  %95 = fsub float -0.000000e+00, %23
>  %96 = fmul float %57, %27
>  %97 = fadd float %96, %95
>  %98 = fmul float %76, %88
>  %99 = fadd float %98, %83
>  %100 = fmul float %76, %91
>  %101 = fadd float %100, %84
>  %102 = fmul float %76, %94
>  %103 = fadd float %102, %85
>  %104 = fcmp uge float %97, %25
>  %105 = select i1 %104, float %25, float %97
>  %106 = call float @llvm.AMDIL.clamp.(float %105, float 0.000000e+00, float 1.000000e+00)
>  %107 = fsub float -0.000000e+00, %43
>  %108 = fmul float %99, %107
>  %109 = fadd float %108, %35
>  %110 = fsub float -0.000000e+00, %43
>  %111 = fmul float %101, %110
>  %112 = fadd float %111, %37
>  %113 = fsub float -0.000000e+00, %43
>  %114 = fmul float %103, %113
>  %115 = fadd float %114, %39
>  %116 = fmul float %106, %106
>  %117 = fmul float %109, %116
>  %118 = fmul float %112, %116
>  %119 = fmul float %115, %116
>  %120 = fmul float %99, %43
>  %121 = fadd float %120, %117
>  %122 = fmul float %101, %43
>  %123 = fadd float %122, %118
>  %124 = fmul float %103, %43
>  %125 = fadd float %124, %119
>  %126 = fmul float %57, %41
>  %127 = call i32 @llvm.SI.packf16(float %121, float %123)
>  %128 = bitcast i32 %127 to float
>  %129 = call i32 @llvm.SI.packf16(float %125, float %126)
>  %130 = bitcast i32 %129 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %128, float %130, float %128, float %130)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8140500
>c8150501
>c8100400
>c8110401
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430404
>c8200100
>c8210101
>bf8c0770
>10161105
>c8240d02
>c8250d03
>c8200c02
>c8210c03
>c0840304
>c0c60508
>bf8c007f
>f0800700
>00430808
>c0400100
>bf8c0070
>c0010131
>bf8c007f
>10041202
>10041702
>0806050b
>d282000b
>040a0707
>c0010178
>bf8c007f
>10041602
>c0018175
>bf8c007f
>08180403
>c8080b00
>c8090b01
>c001812f
>bf8c007f
>10060403
>c001812c
>bf8c007f
>0a060603
>c001812e
>bf8c007f
>d00c0004
>02000703
>7e1a0203
>d2000003
>00121b03
>d2060803
>02010103
>10060703
>1018070c
>d282000b
>0430050b
>c8300000
>c8310001
>10181904
>c0018130
>bf8c007f
>101a1003
>101a190d
>08181b0c
>d282000c
>04361907
>101a1802
>c0018174
>bf8c007f
>081a1a03
>101a070d
>d282000c
>0434050c
>5e16170c
>c8300200
>c8310201
>10001906
>c0018132
>bf8c007f
>10021403
>10020101
>08000300
>d2820000
>04060107
>10020002
>c0018176
>bf8c007f
>08020203
>10020701
>d2820000
>04040500
>c0000177
>bf8c007f
>10020400
>5e000300
>f8001c0f
>000b000b
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], CLIPVERTEX
>DCL OUT[3], GENERIC[19]
>DCL OUT[4], GENERIC[20]
>DCL OUT[5], GENERIC[21]
>DCL CONST[0..51]
>DCL TEMP[0..8], LOCAL
>  0: MAD TEMP[0], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  1: DP4 TEMP[1].x, TEMP[0], CONST[48]
>  2: DP4 TEMP[2].x, TEMP[0], CONST[49]
>  3: MOV TEMP[1].y, TEMP[2].xxxx
>  4: DP4 TEMP[2].x, TEMP[0], CONST[50]
>  5: MOV TEMP[1].z, TEMP[2].xxxx
>  6: DP4 TEMP[2].x, TEMP[0], CONST[4]
>  7: DP4 TEMP[3].x, TEMP[0], CONST[5]
>  8: MOV TEMP[2].y, TEMP[3].xxxx
>  9: DP4 TEMP[4].x, TEMP[0], CONST[12]
> 10: DP4 TEMP[5].x, TEMP[0], CONST[6]
> 11: MOV TEMP[2].z, TEMP[5].xxxx
> 12: DP4 TEMP[0].x, TEMP[0], CONST[7]
> 13: MOV TEMP[2].w, TEMP[0].xxxx
> 14: MOV TEMP[1].w, TEMP[4].xxxx
> 15: MOV TEMP[4].xy, IN[1].xyxx
> 16: MUL TEMP[6], IN[2].xyxx, CONST[0].yyxx
> 17: MAD TEMP[7], CONST[47].wwww, CONST[0].xxxy, CONST[0].yyyx
> 18: MOV TEMP[8], TEMP[2]
> 19: MAD TEMP[5].x, TEMP[5].xxxx, CONST[0].zzzz, -TEMP[0].xxxx
> 20: MOV TEMP[2].z, TEMP[5].xxxx
> 21: MOV TEMP[2].y, -TEMP[3].xxxx
> 22: MAD TEMP[2].xy, CONST[51].xyyy, TEMP[0].xxxx, TEMP[2].xyyy
> 23: MOV OUT[3], TEMP[4]
> 24: MOV OUT[5], TEMP[6]
> 25: MOV OUT[0], TEMP[2]
> 26: MOV OUT[4], TEMP[1]
> 27: MOV OUT[2], TEMP[8]
> 28: MOV_SAT OUT[1], TEMP[7]
> 29: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 16
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 17
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 18
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 19
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 20
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 21
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 22
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 23
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 24
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 25
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 26
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 27
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 28
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 29
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 30
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 31
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 48
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 49
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 50
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 51
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 191
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 192
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 193
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 194
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 195
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 196
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 197
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 198
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 199
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 200
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 201
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 202
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 203
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 204
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 205
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %88 = load <16 x i8> addrspace(2)* %87, !tbaa !0
>  %89 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %88, i32 0, i32 %5)
>  %90 = extractelement <4 x float> %89, i32 0
>  %91 = extractelement <4 x float> %89, i32 1
>  %92 = extractelement <4 x float> %89, i32 2
>  %93 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %94 = load <16 x i8> addrspace(2)* %93, !tbaa !0
>  %95 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %94, i32 0, i32 %5)
>  %96 = extractelement <4 x float> %95, i32 0
>  %97 = extractelement <4 x float> %95, i32 1
>  %98 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %99 = load <16 x i8> addrspace(2)* %98, !tbaa !0
>  %100 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %99, i32 0, i32 %5)
>  %101 = extractelement <4 x float> %100, i32 0
>  %102 = extractelement <4 x float> %100, i32 1
>  %103 = fmul float %90, %14
>  %104 = fadd float %103, %12
>  %105 = fmul float %91, %14
>  %106 = fadd float %105, %12
>  %107 = fmul float %92, %14
>  %108 = fadd float %107, %12
>  %109 = fmul float %90, %12
>  %110 = fadd float %109, %14
>  %111 = fmul float %104, %60
>  %112 = fmul float %106, %62
>  %113 = fadd float %111, %112
>  %114 = fmul float %108, %64
>  %115 = fadd float %113, %114
>  %116 = fmul float %110, %66
>  %117 = fadd float %115, %116
>  %118 = fmul float %104, %68
>  %119 = fmul float %106, %70
>  %120 = fadd float %118, %119
>  %121 = fmul float %108, %72
>  %122 = fadd float %120, %121
>  %123 = fmul float %110, %74
>  %124 = fadd float %122, %123
>  %125 = fmul float %104, %76
>  %126 = fmul float %106, %78
>  %127 = fadd float %125, %126
>  %128 = fmul float %108, %80
>  %129 = fadd float %127, %128
>  %130 = fmul float %110, %82
>  %131 = fadd float %129, %130
>  %132 = fmul float %104, %18
>  %133 = fmul float %106, %20
>  %134 = fadd float %132, %133
>  %135 = fmul float %108, %22
>  %136 = fadd float %134, %135
>  %137 = fmul float %110, %24
>  %138 = fadd float %136, %137
>  %139 = fmul float %104, %26
>  %140 = fmul float %106, %28
>  %141 = fadd float %139, %140
>  %142 = fmul float %108, %30
>  %143 = fadd float %141, %142
>  %144 = fmul float %110, %32
>  %145 = fadd float %143, %144
>  %146 = fmul float %104, %50
>  %147 = fmul float %106, %52
>  %148 = fadd float %146, %147
>  %149 = fmul float %108, %54
>  %150 = fadd float %148, %149
>  %151 = fmul float %110, %56
>  %152 = fadd float %150, %151
>  %153 = fmul float %104, %34
>  %154 = fmul float %106, %36
>  %155 = fadd float %153, %154
>  %156 = fmul float %108, %38
>  %157 = fadd float %155, %156
>  %158 = fmul float %110, %40
>  %159 = fadd float %157, %158
>  %160 = fmul float %104, %42
>  %161 = fmul float %106, %44
>  %162 = fadd float %160, %161
>  %163 = fmul float %108, %46
>  %164 = fadd float %162, %163
>  %165 = fmul float %110, %48
>  %166 = fadd float %164, %165
>  %167 = fmul float %101, %14
>  %168 = fmul float %102, %14
>  %169 = fmul float %101, %12
>  %170 = fmul float %101, %12
>  %171 = fmul float %58, %12
>  %172 = fadd float %171, %14
>  %173 = fmul float %58, %12
>  %174 = fadd float %173, %14
>  %175 = fmul float %58, %12
>  %176 = fadd float %175, %14
>  %177 = fmul float %58, %14
>  %178 = fadd float %177, %12
>  %179 = fsub float -0.000000e+00, %166
>  %180 = fmul float %159, %16
>  %181 = fadd float %180, %179
>  %182 = fsub float -0.000000e+00, %145
>  %183 = fmul float %84, %166
>  %184 = fadd float %183, %138
>  %185 = fmul float %86, %166
>  %186 = fadd float %185, %182
>  %187 = call float @llvm.AMDIL.clamp.(float %172, float 0.000000e+00, float 1.000000e+00)
>  %188 = call float @llvm.AMDIL.clamp.(float %174, float 0.000000e+00, float 1.000000e+00)
>  %189 = call float @llvm.AMDIL.clamp.(float %176, float 0.000000e+00, float 1.000000e+00)
>  %190 = call float @llvm.AMDIL.clamp.(float %178, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %187, float %188, float %189, float %190)
>  %191 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %192 = load float addrspace(2)* addrspace(2)* %191, !tbaa !0
>  %193 = getelementptr float addrspace(2)* %192, i32 0
>  %194 = load float addrspace(2)* %193, !tbaa !0
>  %195 = fmul float %194, %138
>  %196 = getelementptr float addrspace(2)* %192, i32 1
>  %197 = load float addrspace(2)* %196, !tbaa !0
>  %198 = fmul float %197, %145
>  %199 = fadd float %195, %198
>  %200 = getelementptr float addrspace(2)* %192, i32 2
>  %201 = load float addrspace(2)* %200, !tbaa !0
>  %202 = fmul float %201, %159
>  %203 = fadd float %199, %202
>  %204 = getelementptr float addrspace(2)* %192, i32 3
>  %205 = load float addrspace(2)* %204, !tbaa !0
>  %206 = fmul float %205, %166
>  %207 = fadd float %203, %206
>  %208 = getelementptr float addrspace(2)* %192, i32 4
>  %209 = load float addrspace(2)* %208, !tbaa !0
>  %210 = fmul float %209, %138
>  %211 = getelementptr float addrspace(2)* %192, i32 5
>  %212 = load float addrspace(2)* %211, !tbaa !0
>  %213 = fmul float %212, %145
>  %214 = fadd float %210, %213
>  %215 = getelementptr float addrspace(2)* %192, i32 6
>  %216 = load float addrspace(2)* %215, !tbaa !0
>  %217 = fmul float %216, %159
>  %218 = fadd float %214, %217
>  %219 = getelementptr float addrspace(2)* %192, i32 7
>  %220 = load float addrspace(2)* %219, !tbaa !0
>  %221 = fmul float %220, %166
>  %222 = fadd float %218, %221
>  %223 = getelementptr float addrspace(2)* %192, i32 8
>  %224 = load float addrspace(2)* %223, !tbaa !0
>  %225 = fmul float %224, %138
>  %226 = getelementptr float addrspace(2)* %192, i32 9
>  %227 = load float addrspace(2)* %226, !tbaa !0
>  %228 = fmul float %227, %145
>  %229 = fadd float %225, %228
>  %230 = getelementptr float addrspace(2)* %192, i32 10
>  %231 = load float addrspace(2)* %230, !tbaa !0
>  %232 = fmul float %231, %159
>  %233 = fadd float %229, %232
>  %234 = getelementptr float addrspace(2)* %192, i32 11
>  %235 = load float addrspace(2)* %234, !tbaa !0
>  %236 = fmul float %235, %166
>  %237 = fadd float %233, %236
>  %238 = getelementptr float addrspace(2)* %192, i32 12
>  %239 = load float addrspace(2)* %238, !tbaa !0
>  %240 = fmul float %239, %138
>  %241 = getelementptr float addrspace(2)* %192, i32 13
>  %242 = load float addrspace(2)* %241, !tbaa !0
>  %243 = fmul float %242, %145
>  %244 = fadd float %240, %243
>  %245 = getelementptr float addrspace(2)* %192, i32 14
>  %246 = load float addrspace(2)* %245, !tbaa !0
>  %247 = fmul float %246, %159
>  %248 = fadd float %244, %247
>  %249 = getelementptr float addrspace(2)* %192, i32 15
>  %250 = load float addrspace(2)* %249, !tbaa !0
>  %251 = fmul float %250, %166
>  %252 = fadd float %248, %251
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %207, float %222, float %237, float %252)
>  %253 = getelementptr float addrspace(2)* %192, i32 16
>  %254 = load float addrspace(2)* %253, !tbaa !0
>  %255 = fmul float %254, %138
>  %256 = getelementptr float addrspace(2)* %192, i32 17
>  %257 = load float addrspace(2)* %256, !tbaa !0
>  %258 = fmul float %257, %145
>  %259 = fadd float %255, %258
>  %260 = getelementptr float addrspace(2)* %192, i32 18
>  %261 = load float addrspace(2)* %260, !tbaa !0
>  %262 = fmul float %261, %159
>  %263 = fadd float %259, %262
>  %264 = getelementptr float addrspace(2)* %192, i32 19
>  %265 = load float addrspace(2)* %264, !tbaa !0
>  %266 = fmul float %265, %166
>  %267 = fadd float %263, %266
>  %268 = getelementptr float addrspace(2)* %192, i32 20
>  %269 = load float addrspace(2)* %268, !tbaa !0
>  %270 = fmul float %269, %138
>  %271 = getelementptr float addrspace(2)* %192, i32 21
>  %272 = load float addrspace(2)* %271, !tbaa !0
>  %273 = fmul float %272, %145
>  %274 = fadd float %270, %273
>  %275 = getelementptr float addrspace(2)* %192, i32 22
>  %276 = load float addrspace(2)* %275, !tbaa !0
>  %277 = fmul float %276, %159
>  %278 = fadd float %274, %277
>  %279 = getelementptr float addrspace(2)* %192, i32 23
>  %280 = load float addrspace(2)* %279, !tbaa !0
>  %281 = fmul float %280, %166
>  %282 = fadd float %278, %281
>  %283 = getelementptr float addrspace(2)* %192, i32 24
>  %284 = load float addrspace(2)* %283, !tbaa !0
>  %285 = fmul float %284, %138
>  %286 = getelementptr float addrspace(2)* %192, i32 25
>  %287 = load float addrspace(2)* %286, !tbaa !0
>  %288 = fmul float %287, %145
>  %289 = fadd float %285, %288
>  %290 = getelementptr float addrspace(2)* %192, i32 26
>  %291 = load float addrspace(2)* %290, !tbaa !0
>  %292 = fmul float %291, %159
>  %293 = fadd float %289, %292
>  %294 = getelementptr float addrspace(2)* %192, i32 27
>  %295 = load float addrspace(2)* %294, !tbaa !0
>  %296 = fmul float %295, %166
>  %297 = fadd float %293, %296
>  %298 = getelementptr float addrspace(2)* %192, i32 28
>  %299 = load float addrspace(2)* %298, !tbaa !0
>  %300 = fmul float %299, %138
>  %301 = getelementptr float addrspace(2)* %192, i32 29
>  %302 = load float addrspace(2)* %301, !tbaa !0
>  %303 = fmul float %302, %145
>  %304 = fadd float %300, %303
>  %305 = getelementptr float addrspace(2)* %192, i32 30
>  %306 = load float addrspace(2)* %305, !tbaa !0
>  %307 = fmul float %306, %159
>  %308 = fadd float %304, %307
>  %309 = getelementptr float addrspace(2)* %192, i32 31
>  %310 = load float addrspace(2)* %309, !tbaa !0
>  %311 = fmul float %310, %166
>  %312 = fadd float %308, %311
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %267, float %282, float %297, float %312)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %96, float %97, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %117, float %124, float %131, float %152)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %167, float %168, float %169, float %170)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %184, float %186, float %181, float %166)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0410100
>bf8c007f
>c00403bf
>c0028300
>bf8c007f
>7e060205
>c0020301
>bf8c007f
>7e020204
>d2820002
>040e0208
>d2060802
>02010102
>d2820004
>04060608
>d2060804
>02010104
>f800020f
>02040404
>c0840700
>bf8c000f
>e00c2000
>80020600
>bf8c0770
>d2820002
>040c0906
>d2820004
>040c0907
>c0040311
>bf8c007f
>100a0808
>c0040310
>bf8c007f
>d282000a
>04141102
>d2820005
>040c0908
>c0040312
>bf8c007f
>d2820003
>04281105
>d2820006
>04040b06
>c0040313
>bf8c007f
>d2820001
>040c1106
>c0040315
>bf8c007f
>10060808
>c0040314
>bf8c007f
>d2820003
>040c1102
>c0040316
>bf8c007f
>d2820003
>040c1105
>c0040317
>bf8c007f
>d2820003
>040c1106
>c0400102
>bf8c007f
>c004010d
>bf8c007f
>100e0608
>c004010c
>bf8c007f
>d2820008
>041e0208
>c0040319
>bf8c007f
>100e0808
>c0040318
>bf8c007f
>d2820007
>041c1102
>c004031a
>bf8c007f
>d2820007
>041c1105
>c004031b
>bf8c007f
>d2820007
>041c1106
>c004010e
>bf8c007f
>d2820009
>04220e08
>c004031d
>bf8c007f
>10100808
>c004031c
>bf8c007f
>d2820008
>04201102
>c004031e
>bf8c007f
>d2820008
>04201105
>c004031f
>bf8c007f
>d2820008
>04201106
>c004010f
>bf8c007f
>d2820009
>04261008
>c0040109
>bf8c007f
>10140608
>c0040108
>bf8c007f
>d282000a
>042a0208
>c004010a
>bf8c007f
>d282000a
>042a0e08
>c004010b
>bf8c007f
>d282000a
>042a1008
>c0040105
>bf8c007f
>10160608
>c0040104
>bf8c007f
>d282000b
>042e0208
>c0040106
>bf8c007f
>d282000b
>042e0e08
>c0040107
>bf8c007f
>d282000b
>042e1008
>c0040101
>bf8c007f
>10180608
>c0040100
>bf8c007f
>d282000c
>04320208
>c0040102
>bf8c007f
>d282000c
>04320e08
>c0040103
>bf8c007f
>d282000c
>04321008
>f80000ef
>090a0b0c
>c004011d
>bf8c000f
>10120608
>c004011c
>bf8c007f
>d2820009
>04260208
>c004011e
>bf8c007f
>d2820009
>04260e08
>c004011f
>bf8c007f
>d2820009
>04261008
>c0040119
>bf8c007f
>10140608
>c0040118
>bf8c007f
>d282000a
>042a0208
>c004011a
>bf8c007f
>d282000a
>042a0e08
>c004011b
>bf8c007f
>d282000a
>042a1008
>c0040115
>bf8c007f
>10160608
>c0040114
>bf8c007f
>d282000b
>042e0208
>c0040116
>bf8c007f
>d282000b
>042e0e08
>c0040117
>bf8c007f
>d282000b
>042e1008
>c0040111
>bf8c007f
>10180608
>c0040110
>bf8c007f
>d282000c
>04320208
>c0040112
>bf8c007f
>d282000c
>04320e08
>c0000113
>bf8c007f
>d282000c
>04321000
>f80000ff
>090a0b0c
>c0840704
>bf8c000f
>e00c2000
>80020900
>7e1a0280
>bf8c0770
>f800021f
>0d0d0a09
>c0000331
>bf8c000f
>10120800
>c0000330
>bf8c007f
>d2820009
>04240102
>c0000332
>bf8c007f
>d2820009
>04240105
>c0000333
>bf8c007f
>d2820009
>04240106
>c00003c9
>bf8c007f
>10140800
>c00003c8
>bf8c007f
>d282000a
>04280102
>c00003ca
>bf8c007f
>d282000a
>04280105
>c00003cb
>bf8c007f
>d282000a
>04280106
>c00003c5
>bf8c007f
>10160800
>c00003c4
>bf8c007f
>d282000b
>042c0102
>c00003c6
>bf8c007f
>d282000b
>042c0105
>c00003c7
>bf8c007f
>d282000b
>042c0106
>c00003c1
>bf8c007f
>10080800
>c00003c0
>bf8c007f
>d2820002
>04100102
>c00003c2
>bf8c007f
>d2820002
>04080105
>c00003c3
>bf8c007f
>d2820002
>04080106
>f800022f
>090a0b02
>c0840708
>bf8c000f
>e00c2000
>80020900
>bf8c0770
>10001205
>10041404
>10081204
>f800023f
>00000204
>c00003cc
>bf8c000f
>d2820000
>04061000
>c0000302
>bf8c007f
>10020e00
>08021101
>c00003cd
>bf8c007f
>10041000
>08040702
>f80008cf
>08010200
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL IN[2], GENERIC[21], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL CONST[0..30]
>DCL TEMP[0..2], LOCAL
>DCL TEMP[3], ARRAY(1), LOCAL
>  0: MOV TEMP[0].xy, IN[1].xyyy
>  1: TEX TEMP[0].xyz, TEMP[0], SAMP[1], 2D
>  2: MAD TEMP[1].x, IN[2].wwww, CONST[12].wwww, -CONST[12].xxxx
>  3: MOV TEMP[2].xy, IN[0].xyyy
>  4: TEX TEMP[2].xyz, TEMP[2], SAMP[0], 2D
>  5: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[0].xyzz
>  6: MIN TEMP[1].x, TEMP[1].xxxx, CONST[12].zzzz
>  7: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>  8: MUL TEMP[2].xyz, TEMP[2].xyzz, CONST[1].xyzz
>  9: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 10: MAD TEMP[0].xyz, TEMP[2].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 11: MUL TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz
> 12: MAD TEMP[2].xyz, TEMP[2].xyzz, CONST[30].xxxx, TEMP[0].xyzz
> 13: MUL TEMP[0].x, IN[2].wwww, CONST[29].wwww
> 14: MOV TEMP[2].w, TEMP[0].xxxx
> 15: MOV TEMP[3], TEMP[2]
> 16: MOV OUT[0], TEMP[3]
> 17: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 4
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 5
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 6
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 48
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 50
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 51
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 116
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 117
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 118
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 119
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 120
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %45 = load <32 x i8> addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %47 = load <16 x i8> addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %49 = load <32 x i8> addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %51 = load <16 x i8> addrspace(2)* %50, !tbaa !0
>  %52 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %53 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %54 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %55 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %56 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %3, <2 x i32> %5)
>  %57 = bitcast float %54 to i32
>  %58 = bitcast float %55 to i32
>  %59 = insertelement <2 x i32> undef, i32 %57, i32 0
>  %60 = insertelement <2 x i32> %59, i32 %58, i32 1
>  %61 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %60, <32 x i8> %49, <16 x i8> %51, i32 2)
>  %62 = extractelement <4 x float> %61, i32 0
>  %63 = extractelement <4 x float> %61, i32 1
>  %64 = extractelement <4 x float> %61, i32 2
>  %65 = fsub float -0.000000e+00, %29
>  %66 = fmul float %56, %33
>  %67 = fadd float %66, %65
>  %68 = bitcast float %52 to i32
>  %69 = bitcast float %53 to i32
>  %70 = insertelement <2 x i32> undef, i32 %68, i32 0
>  %71 = insertelement <2 x i32> %70, i32 %69, i32 1
>  %72 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %71, <32 x i8> %45, <16 x i8> %47, i32 2)
>  %73 = extractelement <4 x float> %72, i32 0
>  %74 = extractelement <4 x float> %72, i32 1
>  %75 = extractelement <4 x float> %72, i32 2
>  %76 = fmul float %73, %62
>  %77 = fmul float %74, %63
>  %78 = fmul float %75, %64
>  %79 = fcmp uge float %67, %31
>  %80 = select i1 %79, float %31, float %67
>  %81 = call float @llvm.AMDIL.clamp.(float %80, float 0.000000e+00, float 1.000000e+00)
>  %82 = fmul float %76, %23
>  %83 = fmul float %77, %25
>  %84 = fmul float %78, %27
>  %85 = fmul float %81, %81
>  %86 = fsub float -0.000000e+00, %43
>  %87 = fmul float %82, %86
>  %88 = fadd float %87, %35
>  %89 = fsub float -0.000000e+00, %43
>  %90 = fmul float %83, %89
>  %91 = fadd float %90, %37
>  %92 = fsub float -0.000000e+00, %43
>  %93 = fmul float %84, %92
>  %94 = fadd float %93, %39
>  %95 = fmul float %85, %88
>  %96 = fmul float %85, %91
>  %97 = fmul float %85, %94
>  %98 = fmul float %82, %43
>  %99 = fadd float %98, %95
>  %100 = fmul float %83, %43
>  %101 = fadd float %100, %96
>  %102 = fmul float %84, %43
>  %103 = fadd float %102, %97
>  %104 = fmul float %56, %41
>  %105 = call i32 @llvm.SI.packf16(float %99, float %101)
>  %106 = bitcast i32 %105 to float
>  %107 = call i32 @llvm.SI.packf16(float %103, float %104)
>  %108 = bitcast i32 %107 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %106, float %108, float %106, float %108)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c80c0500
>c80d0501
>c8080400
>c8090401
>c0840304
>c0c60508
>bf8c007f
>f0800700
>00430202
>c8180100
>c8190101
>c8140000
>c8150001
>c0840300
>c0c60500
>bf8c0070
>f0800700
>00430505
>bf8c0770
>10100706
>c0400100
>bf8c007f
>c0010105
>bf8c007f
>10121002
>c0010178
>bf8c007f
>10101202
>c0018175
>bf8c007f
>08141003
>c8200b00
>c8210b01
>c0018133
>bf8c007f
>10001003
>c0018130
>bf8c007f
>0a000003
>c0018132
>bf8c007f
>d00c0004
>02000700
>7e020203
>d2000000
>00120300
>d2060800
>02010100
>10000100
>10021500
>d2820001
>04040509
>10120505
>c0018104
>bf8c007f
>10121203
>10141202
>c0018174
>bf8c007f
>08141403
>10141500
>d2820009
>04280509
>5e020309
>10040907
>c0018106
>bf8c007f
>10040403
>10060402
>c0018176
>bf8c007f
>08060603
>10000700
>d2820000
>04000502
>c0000177
>bf8c007f
>10041000
>5e000500
>f8001c0f
>00010001
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL OUT[3], GENERIC[20]
>DCL OUT[4], GENERIC[21]
>DCL CONST[0..55]
>DCL TEMP[0..8], LOCAL
>  0: MOV TEMP[0].w, CONST[0].yyyy
>  1: DP4 TEMP[0].x, IN[0], CONST[52]
>  2: DP4 TEMP[1].x, IN[0], CONST[53]
>  3: MOV TEMP[0].y, TEMP[1].xxxx
>  4: DP4 TEMP[1].x, IN[0], CONST[54]
>  5: MOV TEMP[0].z, TEMP[1].xxxx
>  6: DP4 TEMP[1].x, TEMP[0], CONST[8]
>  7: DP4 TEMP[2].x, TEMP[0], CONST[9]
>  8: MOV TEMP[1].y, TEMP[2].xxxx
>  9: DP4 TEMP[3].x, TEMP[0], CONST[10]
> 10: MOV TEMP[1].z, TEMP[3].xxxx
> 11: DP4 TEMP[4].x, TEMP[0], CONST[11]
> 12: MOV TEMP[1].w, TEMP[4].xxxx
> 13: DP4 TEMP[5].x, TEMP[0], CONST[13]
> 14: MOV TEMP[0].xyz, TEMP[0].xyzx
> 15: DP4 TEMP[6].x, IN[1], CONST[48]
> 16: DP4 TEMP[7].x, IN[1], CONST[49]
> 17: MOV TEMP[6].y, TEMP[7].xxxx
> 18: DP4 TEMP[7].x, IN[1], CONST[50]
> 19: DP4 TEMP[8].x, IN[1], CONST[51]
> 20: MOV TEMP[7].y, TEMP[8].xxxx
> 21: MOV TEMP[0].w, TEMP[5].xxxx
> 22: MOV TEMP[5], TEMP[1]
> 23: MAD TEMP[3].x, TEMP[3].xxxx, CONST[0].zzzz, -TEMP[4].xxxx
> 24: MOV TEMP[1].z, TEMP[3].xxxx
> 25: MOV TEMP[1].y, -TEMP[2].xxxx
> 26: MAD TEMP[1].xy, CONST[55].xyyy, TEMP[4].xxxx, TEMP[1].xyyy
> 27: MOV OUT[2], TEMP[6]
> 28: MOV OUT[3], TEMP[7]
> 29: MOV OUT[0], TEMP[1]
> 30: MOV OUT[1], TEMP[5]
> 31: MOV OUT[4], TEMP[0]
> 32: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 1
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 2
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 32
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 33
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 34
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 35
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 36
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 37
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 38
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 39
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 40
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 41
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 42
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 43
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 44
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 45
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 46
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 47
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 52
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 53
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 54
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 55
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 192
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 193
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 194
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 195
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 196
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 197
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 198
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 199
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 200
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 201
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 202
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 203
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 204
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 205
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 206
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 207
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 208
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 209
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 210
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 211
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr float addrspace(2)* %10, i32 212
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = getelementptr float addrspace(2)* %10, i32 213
>  %98 = load float addrspace(2)* %97, !tbaa !0
>  %99 = getelementptr float addrspace(2)* %10, i32 214
>  %100 = load float addrspace(2)* %99, !tbaa !0
>  %101 = getelementptr float addrspace(2)* %10, i32 215
>  %102 = load float addrspace(2)* %101, !tbaa !0
>  %103 = getelementptr float addrspace(2)* %10, i32 216
>  %104 = load float addrspace(2)* %103, !tbaa !0
>  %105 = getelementptr float addrspace(2)* %10, i32 217
>  %106 = load float addrspace(2)* %105, !tbaa !0
>  %107 = getelementptr float addrspace(2)* %10, i32 218
>  %108 = load float addrspace(2)* %107, !tbaa !0
>  %109 = getelementptr float addrspace(2)* %10, i32 219
>  %110 = load float addrspace(2)* %109, !tbaa !0
>  %111 = getelementptr float addrspace(2)* %10, i32 220
>  %112 = load float addrspace(2)* %111, !tbaa !0
>  %113 = getelementptr float addrspace(2)* %10, i32 221
>  %114 = load float addrspace(2)* %113, !tbaa !0
>  %115 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %116 = load <16 x i8> addrspace(2)* %115, !tbaa !0
>  %117 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %116, i32 0, i32 %5)
>  %118 = extractelement <4 x float> %117, i32 0
>  %119 = extractelement <4 x float> %117, i32 1
>  %120 = extractelement <4 x float> %117, i32 2
>  %121 = extractelement <4 x float> %117, i32 3
>  %122 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %123 = load <16 x i8> addrspace(2)* %122, !tbaa !0
>  %124 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %123, i32 0, i32 %5)
>  %125 = extractelement <4 x float> %124, i32 0
>  %126 = extractelement <4 x float> %124, i32 1
>  %127 = extractelement <4 x float> %124, i32 2
>  %128 = extractelement <4 x float> %124, i32 3
>  %129 = fmul float %118, %88
>  %130 = fmul float %119, %90
>  %131 = fadd float %129, %130
>  %132 = fmul float %120, %92
>  %133 = fadd float %131, %132
>  %134 = fmul float %121, %94
>  %135 = fadd float %133, %134
>  %136 = fmul float %118, %96
>  %137 = fmul float %119, %98
>  %138 = fadd float %136, %137
>  %139 = fmul float %120, %100
>  %140 = fadd float %138, %139
>  %141 = fmul float %121, %102
>  %142 = fadd float %140, %141
>  %143 = fmul float %118, %104
>  %144 = fmul float %119, %106
>  %145 = fadd float %143, %144
>  %146 = fmul float %120, %108
>  %147 = fadd float %145, %146
>  %148 = fmul float %121, %110
>  %149 = fadd float %147, %148
>  %150 = fmul float %135, %16
>  %151 = fmul float %142, %18
>  %152 = fadd float %150, %151
>  %153 = fmul float %149, %20
>  %154 = fadd float %152, %153
>  %155 = fmul float %12, %22
>  %156 = fadd float %154, %155
>  %157 = fmul float %135, %24
>  %158 = fmul float %142, %26
>  %159 = fadd float %157, %158
>  %160 = fmul float %149, %28
>  %161 = fadd float %159, %160
>  %162 = fmul float %12, %30
>  %163 = fadd float %161, %162
>  %164 = fmul float %135, %32
>  %165 = fmul float %142, %34
>  %166 = fadd float %164, %165
>  %167 = fmul float %149, %36
>  %168 = fadd float %166, %167
>  %169 = fmul float %12, %38
>  %170 = fadd float %168, %169
>  %171 = fmul float %135, %40
>  %172 = fmul float %142, %42
>  %173 = fadd float %171, %172
>  %174 = fmul float %149, %44
>  %175 = fadd float %173, %174
>  %176 = fmul float %12, %46
>  %177 = fadd float %175, %176
>  %178 = fmul float %135, %48
>  %179 = fmul float %142, %50
>  %180 = fadd float %178, %179
>  %181 = fmul float %149, %52
>  %182 = fadd float %180, %181
>  %183 = fmul float %12, %54
>  %184 = fadd float %182, %183
>  %185 = fmul float %125, %56
>  %186 = fmul float %126, %58
>  %187 = fadd float %185, %186
>  %188 = fmul float %127, %60
>  %189 = fadd float %187, %188
>  %190 = fmul float %128, %62
>  %191 = fadd float %189, %190
>  %192 = fmul float %125, %64
>  %193 = fmul float %126, %66
>  %194 = fadd float %192, %193
>  %195 = fmul float %127, %68
>  %196 = fadd float %194, %195
>  %197 = fmul float %128, %70
>  %198 = fadd float %196, %197
>  %199 = fmul float %125, %72
>  %200 = fmul float %126, %74
>  %201 = fadd float %199, %200
>  %202 = fmul float %127, %76
>  %203 = fadd float %201, %202
>  %204 = fmul float %128, %78
>  %205 = fadd float %203, %204
>  %206 = fmul float %125, %80
>  %207 = fmul float %126, %82
>  %208 = fadd float %206, %207
>  %209 = fmul float %127, %84
>  %210 = fadd float %208, %209
>  %211 = fmul float %128, %86
>  %212 = fadd float %210, %211
>  %213 = fsub float -0.000000e+00, %177
>  %214 = fmul float %170, %14
>  %215 = fadd float %214, %213
>  %216 = fsub float -0.000000e+00, %163
>  %217 = fmul float %112, %177
>  %218 = fadd float %217, %156
>  %219 = fmul float %114, %177
>  %220 = fadd float %219, %216
>  %221 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %222 = load float addrspace(2)* addrspace(2)* %221, !tbaa !0
>  %223 = getelementptr float addrspace(2)* %222, i32 0
>  %224 = load float addrspace(2)* %223, !tbaa !0
>  %225 = fmul float %224, %156
>  %226 = getelementptr float addrspace(2)* %222, i32 1
>  %227 = load float addrspace(2)* %226, !tbaa !0
>  %228 = fmul float %227, %163
>  %229 = fadd float %225, %228
>  %230 = getelementptr float addrspace(2)* %222, i32 2
>  %231 = load float addrspace(2)* %230, !tbaa !0
>  %232 = fmul float %231, %170
>  %233 = fadd float %229, %232
>  %234 = getelementptr float addrspace(2)* %222, i32 3
>  %235 = load float addrspace(2)* %234, !tbaa !0
>  %236 = fmul float %235, %177
>  %237 = fadd float %233, %236
>  %238 = getelementptr float addrspace(2)* %222, i32 4
>  %239 = load float addrspace(2)* %238, !tbaa !0
>  %240 = fmul float %239, %156
>  %241 = getelementptr float addrspace(2)* %222, i32 5
>  %242 = load float addrspace(2)* %241, !tbaa !0
>  %243 = fmul float %242, %163
>  %244 = fadd float %240, %243
>  %245 = getelementptr float addrspace(2)* %222, i32 6
>  %246 = load float addrspace(2)* %245, !tbaa !0
>  %247 = fmul float %246, %170
>  %248 = fadd float %244, %247
>  %249 = getelementptr float addrspace(2)* %222, i32 7
>  %250 = load float addrspace(2)* %249, !tbaa !0
>  %251 = fmul float %250, %177
>  %252 = fadd float %248, %251
>  %253 = getelementptr float addrspace(2)* %222, i32 8
>  %254 = load float addrspace(2)* %253, !tbaa !0
>  %255 = fmul float %254, %156
>  %256 = getelementptr float addrspace(2)* %222, i32 9
>  %257 = load float addrspace(2)* %256, !tbaa !0
>  %258 = fmul float %257, %163
>  %259 = fadd float %255, %258
>  %260 = getelementptr float addrspace(2)* %222, i32 10
>  %261 = load float addrspace(2)* %260, !tbaa !0
>  %262 = fmul float %261, %170
>  %263 = fadd float %259, %262
>  %264 = getelementptr float addrspace(2)* %222, i32 11
>  %265 = load float addrspace(2)* %264, !tbaa !0
>  %266 = fmul float %265, %177
>  %267 = fadd float %263, %266
>  %268 = getelementptr float addrspace(2)* %222, i32 12
>  %269 = load float addrspace(2)* %268, !tbaa !0
>  %270 = fmul float %269, %156
>  %271 = getelementptr float addrspace(2)* %222, i32 13
>  %272 = load float addrspace(2)* %271, !tbaa !0
>  %273 = fmul float %272, %163
>  %274 = fadd float %270, %273
>  %275 = getelementptr float addrspace(2)* %222, i32 14
>  %276 = load float addrspace(2)* %275, !tbaa !0
>  %277 = fmul float %276, %170
>  %278 = fadd float %274, %277
>  %279 = getelementptr float addrspace(2)* %222, i32 15
>  %280 = load float addrspace(2)* %279, !tbaa !0
>  %281 = fmul float %280, %177
>  %282 = fadd float %278, %281
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %237, float %252, float %267, float %282)
>  %283 = getelementptr float addrspace(2)* %222, i32 16
>  %284 = load float addrspace(2)* %283, !tbaa !0
>  %285 = fmul float %284, %156
>  %286 = getelementptr float addrspace(2)* %222, i32 17
>  %287 = load float addrspace(2)* %286, !tbaa !0
>  %288 = fmul float %287, %163
>  %289 = fadd float %285, %288
>  %290 = getelementptr float addrspace(2)* %222, i32 18
>  %291 = load float addrspace(2)* %290, !tbaa !0
>  %292 = fmul float %291, %170
>  %293 = fadd float %289, %292
>  %294 = getelementptr float addrspace(2)* %222, i32 19
>  %295 = load float addrspace(2)* %294, !tbaa !0
>  %296 = fmul float %295, %177
>  %297 = fadd float %293, %296
>  %298 = getelementptr float addrspace(2)* %222, i32 20
>  %299 = load float addrspace(2)* %298, !tbaa !0
>  %300 = fmul float %299, %156
>  %301 = getelementptr float addrspace(2)* %222, i32 21
>  %302 = load float addrspace(2)* %301, !tbaa !0
>  %303 = fmul float %302, %163
>  %304 = fadd float %300, %303
>  %305 = getelementptr float addrspace(2)* %222, i32 22
>  %306 = load float addrspace(2)* %305, !tbaa !0
>  %307 = fmul float %306, %170
>  %308 = fadd float %304, %307
>  %309 = getelementptr float addrspace(2)* %222, i32 23
>  %310 = load float addrspace(2)* %309, !tbaa !0
>  %311 = fmul float %310, %177
>  %312 = fadd float %308, %311
>  %313 = getelementptr float addrspace(2)* %222, i32 24
>  %314 = load float addrspace(2)* %313, !tbaa !0
>  %315 = fmul float %314, %156
>  %316 = getelementptr float addrspace(2)* %222, i32 25
>  %317 = load float addrspace(2)* %316, !tbaa !0
>  %318 = fmul float %317, %163
>  %319 = fadd float %315, %318
>  %320 = getelementptr float addrspace(2)* %222, i32 26
>  %321 = load float addrspace(2)* %320, !tbaa !0
>  %322 = fmul float %321, %170
>  %323 = fadd float %319, %322
>  %324 = getelementptr float addrspace(2)* %222, i32 27
>  %325 = load float addrspace(2)* %324, !tbaa !0
>  %326 = fmul float %325, %177
>  %327 = fadd float %323, %326
>  %328 = getelementptr float addrspace(2)* %222, i32 28
>  %329 = load float addrspace(2)* %328, !tbaa !0
>  %330 = fmul float %329, %156
>  %331 = getelementptr float addrspace(2)* %222, i32 29
>  %332 = load float addrspace(2)* %331, !tbaa !0
>  %333 = fmul float %332, %163
>  %334 = fadd float %330, %333
>  %335 = getelementptr float addrspace(2)* %222, i32 30
>  %336 = load float addrspace(2)* %335, !tbaa !0
>  %337 = fmul float %336, %170
>  %338 = fadd float %334, %337
>  %339 = getelementptr float addrspace(2)* %222, i32 31
>  %340 = load float addrspace(2)* %339, !tbaa !0
>  %341 = fmul float %340, %177
>  %342 = fadd float %338, %341
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %297, float %312, float %327, float %342)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %191, float %198, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %205, float %212, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %135, float %142, float %149, float %184)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %218, float %220, float %215, float %177)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0840700
>bf8c007f
>e00c2000
>80020300
>c0410100
>bf8c0070
>c00203d1
>bf8c007f
>10020804
>c00203d0
>bf8c007f
>d2820001
>04040903
>c00203d2
>bf8c007f
>d2820001
>04040905
>c00203d3
>bf8c007f
>d2820001
>04040906
>c00203d5
>bf8c007f
>10040804
>c00203d4
>bf8c007f
>d2820002
>04080903
>c00203d6
>bf8c007f
>d2820002
>04080905
>c00203d7
>bf8c007f
>d2820002
>04080906
>c0020321
>bf8c007f
>100e0404
>c0020320
>bf8c007f
>d2820007
>041c0901
>c00203d9
>bf8c007f
>10100804
>c00203d8
>bf8c007f
>d2820008
>04200903
>c00203da
>bf8c007f
>d2820008
>04200905
>c00203db
>bf8c007f
>d2820003
>04200906
>c0020322
>bf8c007f
>d2820004
>041c0903
>c0020301
>c0028323
>bf8c007f
>7e0a0205
>d2820004
>04120a04
>c0028325
>bf8c007f
>100a0405
>c0028324
>bf8c007f
>d2820005
>04140b01
>c0028326
>bf8c007f
>d2820005
>04140b03
>c0028327
>bf8c007f
>7e0c0205
>d2820005
>04160c04
>c0400102
>bf8c007f
>c002810d
>bf8c007f
>100c0a05
>c002810c
>bf8c007f
>d2820007
>041a0805
>c0028329
>bf8c007f
>100c0405
>c0028328
>bf8c007f
>d2820006
>04180b01
>c002832a
>bf8c007f
>d2820006
>04180b03
>c002832b
>bf8c007f
>7e100205
>d2820006
>041a1004
>c002810e
>bf8c007f
>d2820008
>041e0c05
>c002832d
>bf8c007f
>100e0405
>c002832c
>bf8c007f
>d2820007
>041c0b01
>c002832e
>bf8c007f
>d2820007
>041c0b03
>c002832f
>bf8c007f
>7e120205
>d2820007
>041e1204
>c002810f
>bf8c007f
>d2820008
>04220e05
>c0028109
>bf8c007f
>10120a05
>c0028108
>bf8c007f
>d2820009
>04260805
>c002810a
>bf8c007f
>d2820009
>04260c05
>c002810b
>bf8c007f
>d2820009
>04260e05
>c0028105
>bf8c007f
>10140a05
>c0028104
>bf8c007f
>d282000a
>042a0805
>c0028106
>bf8c007f
>d282000a
>042a0c05
>c0028107
>bf8c007f
>d282000a
>042a0e05
>c0028101
>bf8c007f
>10160a05
>c0028100
>bf8c007f
>d282000b
>042e0805
>c0028102
>bf8c007f
>d282000b
>042e0c05
>c0028103
>bf8c007f
>d282000b
>042e0e05
>f80000ef
>08090a0b
>c002811d
>bf8c000f
>10100a05
>c002811c
>bf8c007f
>d2820008
>04220805
>c002811e
>bf8c007f
>d2820008
>04220c05
>c002811f
>bf8c007f
>d2820008
>04220e05
>c0028119
>bf8c007f
>10120a05
>c0028118
>bf8c007f
>d2820009
>04260805
>c002811a
>bf8c007f
>d2820009
>04260c05
>c002811b
>bf8c007f
>d2820009
>04260e05
>c0028115
>bf8c007f
>10140a05
>c0028114
>bf8c007f
>d282000a
>042a0805
>c0028116
>bf8c007f
>d282000a
>042a0c05
>c0028117
>bf8c007f
>d282000a
>042a0e05
>c0028111
>bf8c007f
>10160a05
>c0028110
>bf8c007f
>d282000b
>042e0805
>c0028112
>bf8c007f
>d282000b
>042e0c05
>c0000113
>bf8c007f
>d282000b
>042e0e00
>f80000ff
>08090a0b
>c0840704
>bf8c000f
>e00c2000
>80020800
>c00003c5
>bf8c0070
>10001200
>c00003c4
>bf8c007f
>d2820000
>04000108
>c00003c6
>bf8c007f
>d2820000
>0400010a
>c00003c7
>bf8c007f
>d282000c
>0400010b
>c00003c1
>bf8c007f
>10001200
>c00003c0
>bf8c007f
>d2820000
>04000108
>c00003c2
>bf8c007f
>d2820000
>0400010a
>c00003c3
>bf8c007f
>d282000d
>0400010b
>7e000280
>f800020f
>00000c0d
>c00003cd
>bf8c000f
>10181200
>c00003cc
>bf8c007f
>d282000c
>04300108
>c00003ce
>bf8c007f
>d282000c
>0430010a
>c00003cf
>bf8c007f
>d282000c
>0430010b
>c00003c9
>bf8c007f
>101a1200
>c00003c8
>bf8c007f
>d282000d
>04340108
>c00003ca
>bf8c007f
>d282000d
>0434010a
>c00003cb
>bf8c007f
>d2820008
>0434010b
>f800021f
>00000c08
>c0000335
>bf8c000f
>10000400
>c0000334
>bf8c007f
>d2820000
>04000101
>c0000336
>bf8c007f
>d2820000
>04000103
>c0000337
>bf8c007f
>7e100200
>d2820000
>04021004
>f800022f
>00030201
>c00003dc
>bf8c000f
>d2820000
>04120e00
>c0000302
>bf8c007f
>10020c00
>08020f01
>c00003dd
>bf8c007f
>10040e00
>08040b02
>f80008cf
>07010200
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], GENERIC[19], PERSPECTIVE
>DCL IN[2], GENERIC[20], PERSPECTIVE
>DCL IN[3], GENERIC[21], PERSPECTIVE, CENTROID
>DCL IN[4], GENERIC[22], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL CONST[0..30]
>DCL TEMP[0..6], LOCAL
>DCL TEMP[7], ARRAY(1), LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0000,    -0.7071}
>IMM[1] FLT32 {    0.8165,     0.0000,     0.5774,    -0.4082}
>IMM[2] FLT32 {   -0.4082,     0.7071,     0.5774,    -0.4082}
>IMM[3] FLT32 {   -0.4082,    -0.7071,     0.5774,     0.0000}
>  0: MOV TEMP[0].xy, IN[3].wzzz
>  1: TEX TEMP[0].xyz, TEMP[0], SAMP[1], 2D
>  2: MOV TEMP[1].xy, IN[1].xyyy
>  3: TEX TEMP[1].xyz, TEMP[1], SAMP[2], 2D
>  4: MOV TEMP[2].xy, IN[3].xyyy
>  5: TEX TEMP[2].xyz, TEMP[2], SAMP[1], 2D
>  6: MOV TEMP[3].xy, IN[4].xyyy
>  7: TEX TEMP[3].xyz, TEMP[3], SAMP[1], 2D
>  8: MOV TEMP[4].xy, IN[1].xyyy
>  9: TEX TEMP[4].xyz, TEMP[4], SAMP[0], 2D
> 10: MAD TEMP[5].xyz, IMM[0].xxxx, TEMP[1].xyzz, IMM[0].yyyy
> 11: DP3 TEMP[1].x, TEMP[5].xyzz, IMM[1].xyzz
> 12: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 13: DP3 TEMP[6].x, TEMP[5].xyzz, IMM[2].xyzz
> 14: MOV_SAT TEMP[6].x, TEMP[6].xxxx
> 15: MOV TEMP[1].y, TEMP[6].xxxx
> 16: DP3 TEMP[5].x, TEMP[5].xyzz, IMM[3].xyzz
> 17: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 18: MOV TEMP[1].z, TEMP[5].xxxx
> 19: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[1].xyzz
> 20: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].yyyy
> 21: MAD TEMP[0].xyz, TEMP[1].xxxx, TEMP[2].xyzz, TEMP[0].xyzz
> 22: DP3 TEMP[2].x, TEMP[1].xyzz, IMM[0].zzzz
> 23: MAD TEMP[1].xyz, TEMP[1].zzzz, TEMP[3].xyzz, TEMP[0].xyzz
> 24: RCP TEMP[2].x, TEMP[2].xxxx
> 25: MUL TEMP[0].xyz, TEMP[2].xxxx, CONST[12].xyzz
> 26: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[0].xyzz
> 27: MUL TEMP[0].xyz, TEMP[4].xyzz, IN[0].xyzz
> 28: MAD TEMP[2].x, IN[2].wwww, CONST[11].wwww, -CONST[11].xxxx
> 29: MUL TEMP[0].xyz, TEMP[1].xyzz, TEMP[0].xyzz
> 30: MIN TEMP[2].x, TEMP[2].xxxx, CONST[11].zzzz
> 31: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 32: MAD TEMP[1].xyz, TEMP[0].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 33: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
> 34: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[2].xxxx
> 35: MAD TEMP[0].xyz, TEMP[0].xyzz, CONST[30].xxxx, TEMP[1].xyzz
> 36: MUL TEMP[1].x, IN[2].wwww, CONST[29].wwww
> 37: MOV TEMP[0].w, TEMP[1].xxxx
> 38: MOV TEMP[7], TEMP[0]
> 39: MOV OUT[0], TEMP[7]
> 40: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 44
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 46
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 47
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 48
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 49
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 50
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 116
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 117
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 118
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 119
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 120
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %45 = load <32 x i8> addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %47 = load <16 x i8> addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %49 = load <32 x i8> addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %51 = load <16 x i8> addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr <32 x i8> addrspace(2)* %2, i32 2
>  %53 = load <32 x i8> addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr <16 x i8> addrspace(2)* %1, i32 2
>  %55 = load <16 x i8> addrspace(2)* %54, !tbaa !0
>  %56 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %57 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %58 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %59 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %60 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %61 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %3, <2 x i32> %5)
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %3, <2 x i32> %6)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %3, <2 x i32> %6)
>  %64 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %3, <2 x i32> %6)
>  %65 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %3, <2 x i32> %6)
>  %66 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %3, <2 x i32> %6)
>  %67 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %3, <2 x i32> %6)
>  %68 = bitcast float %65 to i32
>  %69 = bitcast float %64 to i32
>  %70 = insertelement <2 x i32> undef, i32 %68, i32 0
>  %71 = insertelement <2 x i32> %70, i32 %69, i32 1
>  %72 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %71, <32 x i8> %49, <16 x i8> %51, i32 2)
>  %73 = extractelement <4 x float> %72, i32 0
>  %74 = extractelement <4 x float> %72, i32 1
>  %75 = extractelement <4 x float> %72, i32 2
>  %76 = bitcast float %59 to i32
>  %77 = bitcast float %60 to i32
>  %78 = insertelement <2 x i32> undef, i32 %76, i32 0
>  %79 = insertelement <2 x i32> %78, i32 %77, i32 1
>  %80 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %79, <32 x i8> %53, <16 x i8> %55, i32 2)
>  %81 = extractelement <4 x float> %80, i32 0
>  %82 = extractelement <4 x float> %80, i32 1
>  %83 = extractelement <4 x float> %80, i32 2
>  %84 = bitcast float %62 to i32
>  %85 = bitcast float %63 to i32
>  %86 = insertelement <2 x i32> undef, i32 %84, i32 0
>  %87 = insertelement <2 x i32> %86, i32 %85, i32 1
>  %88 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %87, <32 x i8> %49, <16 x i8> %51, i32 2)
>  %89 = extractelement <4 x float> %88, i32 0
>  %90 = extractelement <4 x float> %88, i32 1
>  %91 = extractelement <4 x float> %88, i32 2
>  %92 = bitcast float %66 to i32
>  %93 = bitcast float %67 to i32
>  %94 = insertelement <2 x i32> undef, i32 %92, i32 0
>  %95 = insertelement <2 x i32> %94, i32 %93, i32 1
>  %96 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %95, <32 x i8> %49, <16 x i8> %51, i32 2)
>  %97 = extractelement <4 x float> %96, i32 0
>  %98 = extractelement <4 x float> %96, i32 1
>  %99 = extractelement <4 x float> %96, i32 2
>  %100 = bitcast float %59 to i32
>  %101 = bitcast float %60 to i32
>  %102 = insertelement <2 x i32> undef, i32 %100, i32 0
>  %103 = insertelement <2 x i32> %102, i32 %101, i32 1
>  %104 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %103, <32 x i8> %45, <16 x i8> %47, i32 2)
>  %105 = extractelement <4 x float> %104, i32 0
>  %106 = extractelement <4 x float> %104, i32 1
>  %107 = extractelement <4 x float> %104, i32 2
>  %108 = fmul float 2.000000e+00, %81
>  %109 = fadd float %108, -1.000000e+00
>  %110 = fmul float 2.000000e+00, %82
>  %111 = fadd float %110, -1.000000e+00
>  %112 = fmul float 2.000000e+00, %83
>  %113 = fadd float %112, -1.000000e+00
>  %114 = fmul float %109, 0x3FEA20BD80000000
>  %115 = fmul float %111, 0.000000e+00
>  %116 = fadd float %115, %114
>  %117 = fmul float %113, 0x3FE279A740000000
>  %118 = fadd float %116, %117
>  %119 = call float @llvm.AMDIL.clamp.(float %118, float 0.000000e+00, float 1.000000e+00)
>  %120 = fmul float %109, 0xBFDA20BDA0000000
>  %121 = fmul float %111, 0x3FE6A09E60000000
>  %122 = fadd float %121, %120
>  %123 = fmul float %113, 0x3FE279A740000000
>  %124 = fadd float %122, %123
>  %125 = call float @llvm.AMDIL.clamp.(float %124, float 0.000000e+00, float 1.000000e+00)
>  %126 = fmul float %109, 0xBFDA20BD20000000
>  %127 = fmul float %111, 0xBFE6A09E80000000
>  %128 = fadd float %127, %126
>  %129 = fmul float %113, 0x3FE279A740000000
>  %130 = fadd float %128, %129
>  %131 = call float @llvm.AMDIL.clamp.(float %130, float 0.000000e+00, float 1.000000e+00)
>  %132 = fmul float %119, %119
>  %133 = fmul float %125, %125
>  %134 = fmul float %131, %131
>  %135 = fmul float %73, %133
>  %136 = fmul float %74, %133
>  %137 = fmul float %75, %133
>  %138 = fmul float %132, %89
>  %139 = fadd float %138, %135
>  %140 = fmul float %132, %90
>  %141 = fadd float %140, %136
>  %142 = fmul float %132, %91
>  %143 = fadd float %142, %137
>  %144 = fmul float %132, 1.000000e+00
>  %145 = fmul float %133, 1.000000e+00
>  %146 = fadd float %145, %144
>  %147 = fmul float %134, 1.000000e+00
>  %148 = fadd float %146, %147
>  %149 = fmul float %134, %97
>  %150 = fadd float %149, %139
>  %151 = fmul float %134, %98
>  %152 = fadd float %151, %141
>  %153 = fmul float %134, %99
>  %154 = fadd float %153, %143
>  %155 = fdiv float 1.000000e+00, %148
>  %156 = fmul float %155, %29
>  %157 = fmul float %155, %31
>  %158 = fmul float %155, %33
>  %159 = fmul float %150, %156
>  %160 = fmul float %152, %157
>  %161 = fmul float %154, %158
>  %162 = fmul float %105, %56
>  %163 = fmul float %106, %57
>  %164 = fmul float %107, %58
>  %165 = fsub float -0.000000e+00, %23
>  %166 = fmul float %61, %27
>  %167 = fadd float %166, %165
>  %168 = fmul float %159, %162
>  %169 = fmul float %160, %163
>  %170 = fmul float %161, %164
>  %171 = fcmp uge float %167, %25
>  %172 = select i1 %171, float %25, float %167
>  %173 = call float @llvm.AMDIL.clamp.(float %172, float 0.000000e+00, float 1.000000e+00)
>  %174 = fsub float -0.000000e+00, %43
>  %175 = fmul float %168, %174
>  %176 = fadd float %175, %35
>  %177 = fsub float -0.000000e+00, %43
>  %178 = fmul float %169, %177
>  %179 = fadd float %178, %37
>  %180 = fsub float -0.000000e+00, %43
>  %181 = fmul float %170, %180
>  %182 = fadd float %181, %39
>  %183 = fmul float %173, %173
>  %184 = fmul float %176, %183
>  %185 = fmul float %179, %183
>  %186 = fmul float %182, %183
>  %187 = fmul float %168, %43
>  %188 = fadd float %187, %184
>  %189 = fmul float %169, %43
>  %190 = fadd float %189, %185
>  %191 = fmul float %170, %43
>  %192 = fadd float %191, %186
>  %193 = fmul float %61, %41
>  %194 = call i32 @llvm.SI.packf16(float %188, float %190)
>  %195 = bitcast i32 %194 to float
>  %196 = call i32 @llvm.SI.packf16(float %192, float %193)
>  %197 = bitcast i32 %196 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %195, float %197, float %195, float %197)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8240500
>c8250501
>c8200400
>c8210401
>c0840308
>c0c60510
>bf8c007f
>f0800700
>00430408
>bf8c0770
>060e0b05
>061c0ef3
>060e0904
>061e0ef3
>100e1eff
>bed105ed
>7e1402ff
>3f3504f3
>d2820007
>041e150e
>06080d06
>062008f3
>7e2202ff
>3f13cd3a
>d2820004
>041e2310
>d2060812
>02010104
>10082512
>c8180e02
>c8190e03
>c8140f02
>c8150f03
>c0840304
>c0c60508
>bf8c007f
>f0800700
>00430505
>bf8c0770
>10260906
>10141eff
>3f5105ec
>d282000a
>0429010e
>d282000a
>042a2310
>d206080a
>0201010a
>1014150a
>c8300d02
>c8310d03
>c82c0c02
>c82d0c03
>f0800700
>00430b0b
>bf8c0770
>d2820013
>044e190a
>101e1eff
>bed105e9
>7e2802ff
>bf3504f4
>d282000e
>043e290e
>d282000e
>043a2310
>d2060814
>0201010e
>101c2914
>c8401102
>c8411103
>c83c1002
>c83d1003
>f0800700
>00430f0f
>bf8c0770
>d2820003
>044e210e
>d2820002
>042a2512
>d2820002
>040a2914
>7e045502
>c0400100
>bf8c007f
>c0038131
>bf8c007f
>10240407
>10062503
>c0840300
>c0c60500
>bf8c007f
>f0800700
>00431208
>c8200100
>c8210101
>bf8c0770
>10101113
>10121103
>c0010178
>bf8c007f
>10061202
>c0018175
>bf8c007f
>082a0603
>c80c0b00
>c80d0b01
>c001812f
>bf8c007f
>10100603
>c001812c
>bf8c007f
>0a101003
>c001812e
>bf8c007f
>d00c0004
>02000708
>7e2c0203
>d2000008
>00122d08
>d2060808
>02010108
>10101108
>102a1115
>d2820009
>04540509
>102a0905
>d2820015
>0456170a
>d2820015
>04561f0e
>c0018130
>bf8c007f
>102c0403
>102a2d15
>c8580000
>c8590001
>102c2d12
>102a2d15
>102c2a02
>c0018174
>bf8c007f
>082c2c03
>102c1116
>d2820015
>04580515
>5e121315
>10080907
>d2820004
>04121b0a
>d2820004
>0412230e
>c0018132
>bf8c007f
>10040403
>10040504
>c8100200
>c8110201
>10000914
>10000102
>10020002
>c0018176
>bf8c007f
>08020203
>10021101
>d2820000
>04040500
>c0000177
>bf8c007f
>10020600
>5e000300
>f8001c0f
>00090009
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], CLIPVERTEX
>DCL OUT[3], GENERIC[19]
>DCL OUT[4], GENERIC[20]
>DCL OUT[5], GENERIC[21]
>DCL OUT[6], GENERIC[22]
>DCL CONST[0..51]
>DCL TEMP[0..9], LOCAL
>  0: MAD TEMP[0], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  1: DP4 TEMP[1].x, TEMP[0], CONST[48]
>  2: DP4 TEMP[2].x, TEMP[0], CONST[49]
>  3: MOV TEMP[1].y, TEMP[2].xxxx
>  4: DP4 TEMP[2].x, TEMP[0], CONST[50]
>  5: MOV TEMP[1].z, TEMP[2].xxxx
>  6: DP4 TEMP[2].x, TEMP[0], CONST[4]
>  7: DP4 TEMP[3].x, TEMP[0], CONST[5]
>  8: MOV TEMP[2].y, TEMP[3].xxxx
>  9: DP4 TEMP[4].x, TEMP[0], CONST[6]
> 10: MOV TEMP[2].z, TEMP[4].xxxx
> 11: ADD TEMP[5].xy, IN[3].xyyy, IN[2].xyyy
> 12: DP4 TEMP[6].x, TEMP[0], CONST[7]
> 13: MOV TEMP[2].w, TEMP[6].xxxx
> 14: ADD TEMP[7].xy, TEMP[5].yxxx, IN[3].yxxx
> 15: MOV TEMP[5].zw, TEMP[7].yyxy
> 16: DP4 TEMP[0].x, TEMP[0], CONST[12]
> 17: MOV TEMP[5], TEMP[5]
> 18: ADD TEMP[7].xy, TEMP[7].yxxx, IN[3].xyyy
> 19: MOV TEMP[1].w, TEMP[0].xxxx
> 20: MOV TEMP[0].xy, IN[1].xyxx
> 21: MOV TEMP[7].zw, IN[1].yyxy
> 22: MAD TEMP[8], CONST[47].wwww, CONST[0].xxxy, CONST[0].yyyx
> 23: MOV TEMP[9], TEMP[2]
> 24: MAD TEMP[4].x, TEMP[4].xxxx, CONST[0].zzzz, -TEMP[6].xxxx
> 25: MOV TEMP[2].z, TEMP[4].xxxx
> 26: MOV TEMP[2].y, -TEMP[3].xxxx
> 27: MAD TEMP[2].xy, CONST[51].xyyy, TEMP[6].xxxx, TEMP[2].xyyy
> 28: MOV OUT[3], TEMP[0]
> 29: MOV OUT[5], TEMP[5]
> 30: MOV OUT[6], TEMP[7]
> 31: MOV OUT[0], TEMP[2]
> 32: MOV OUT[4], TEMP[1]
> 33: MOV OUT[2], TEMP[9]
> 34: MOV_SAT OUT[1], TEMP[8]
> 35: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 16
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 17
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 18
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 19
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 20
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 21
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 22
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 23
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 24
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 25
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 26
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 27
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 28
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 29
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 30
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 31
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 48
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 49
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 50
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 51
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 191
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 192
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 193
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 194
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 195
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 196
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 197
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 198
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 199
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 200
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 201
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 202
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 203
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 204
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 205
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %88 = load <16 x i8> addrspace(2)* %87, !tbaa !0
>  %89 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %88, i32 0, i32 %5)
>  %90 = extractelement <4 x float> %89, i32 0
>  %91 = extractelement <4 x float> %89, i32 1
>  %92 = extractelement <4 x float> %89, i32 2
>  %93 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %94 = load <16 x i8> addrspace(2)* %93, !tbaa !0
>  %95 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %94, i32 0, i32 %5)
>  %96 = extractelement <4 x float> %95, i32 0
>  %97 = extractelement <4 x float> %95, i32 1
>  %98 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %99 = load <16 x i8> addrspace(2)* %98, !tbaa !0
>  %100 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %99, i32 0, i32 %5)
>  %101 = extractelement <4 x float> %100, i32 0
>  %102 = extractelement <4 x float> %100, i32 1
>  %103 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %104 = load <16 x i8> addrspace(2)* %103, !tbaa !0
>  %105 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %104, i32 0, i32 %5)
>  %106 = extractelement <4 x float> %105, i32 0
>  %107 = extractelement <4 x float> %105, i32 1
>  %108 = fmul float %90, %14
>  %109 = fadd float %108, %12
>  %110 = fmul float %91, %14
>  %111 = fadd float %110, %12
>  %112 = fmul float %92, %14
>  %113 = fadd float %112, %12
>  %114 = fmul float %90, %12
>  %115 = fadd float %114, %14
>  %116 = fmul float %109, %60
>  %117 = fmul float %111, %62
>  %118 = fadd float %116, %117
>  %119 = fmul float %113, %64
>  %120 = fadd float %118, %119
>  %121 = fmul float %115, %66
>  %122 = fadd float %120, %121
>  %123 = fmul float %109, %68
>  %124 = fmul float %111, %70
>  %125 = fadd float %123, %124
>  %126 = fmul float %113, %72
>  %127 = fadd float %125, %126
>  %128 = fmul float %115, %74
>  %129 = fadd float %127, %128
>  %130 = fmul float %109, %76
>  %131 = fmul float %111, %78
>  %132 = fadd float %130, %131
>  %133 = fmul float %113, %80
>  %134 = fadd float %132, %133
>  %135 = fmul float %115, %82
>  %136 = fadd float %134, %135
>  %137 = fmul float %109, %18
>  %138 = fmul float %111, %20
>  %139 = fadd float %137, %138
>  %140 = fmul float %113, %22
>  %141 = fadd float %139, %140
>  %142 = fmul float %115, %24
>  %143 = fadd float %141, %142
>  %144 = fmul float %109, %26
>  %145 = fmul float %111, %28
>  %146 = fadd float %144, %145
>  %147 = fmul float %113, %30
>  %148 = fadd float %146, %147
>  %149 = fmul float %115, %32
>  %150 = fadd float %148, %149
>  %151 = fmul float %109, %34
>  %152 = fmul float %111, %36
>  %153 = fadd float %151, %152
>  %154 = fmul float %113, %38
>  %155 = fadd float %153, %154
>  %156 = fmul float %115, %40
>  %157 = fadd float %155, %156
>  %158 = fadd float %106, %101
>  %159 = fadd float %107, %102
>  %160 = fmul float %109, %42
>  %161 = fmul float %111, %44
>  %162 = fadd float %160, %161
>  %163 = fmul float %113, %46
>  %164 = fadd float %162, %163
>  %165 = fmul float %115, %48
>  %166 = fadd float %164, %165
>  %167 = fadd float %159, %107
>  %168 = fadd float %158, %106
>  %169 = fmul float %109, %50
>  %170 = fmul float %111, %52
>  %171 = fadd float %169, %170
>  %172 = fmul float %113, %54
>  %173 = fadd float %171, %172
>  %174 = fmul float %115, %56
>  %175 = fadd float %173, %174
>  %176 = fadd float %168, %106
>  %177 = fadd float %167, %107
>  %178 = fmul float %58, %12
>  %179 = fadd float %178, %14
>  %180 = fmul float %58, %12
>  %181 = fadd float %180, %14
>  %182 = fmul float %58, %12
>  %183 = fadd float %182, %14
>  %184 = fmul float %58, %14
>  %185 = fadd float %184, %12
>  %186 = fsub float -0.000000e+00, %166
>  %187 = fmul float %157, %16
>  %188 = fadd float %187, %186
>  %189 = fsub float -0.000000e+00, %150
>  %190 = fmul float %84, %166
>  %191 = fadd float %190, %143
>  %192 = fmul float %86, %166
>  %193 = fadd float %192, %189
>  %194 = call float @llvm.AMDIL.clamp.(float %179, float 0.000000e+00, float 1.000000e+00)
>  %195 = call float @llvm.AMDIL.clamp.(float %181, float 0.000000e+00, float 1.000000e+00)
>  %196 = call float @llvm.AMDIL.clamp.(float %183, float 0.000000e+00, float 1.000000e+00)
>  %197 = call float @llvm.AMDIL.clamp.(float %185, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %194, float %195, float %196, float %197)
>  %198 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %199 = load float addrspace(2)* addrspace(2)* %198, !tbaa !0
>  %200 = getelementptr float addrspace(2)* %199, i32 0
>  %201 = load float addrspace(2)* %200, !tbaa !0
>  %202 = fmul float %201, %143
>  %203 = getelementptr float addrspace(2)* %199, i32 1
>  %204 = load float addrspace(2)* %203, !tbaa !0
>  %205 = fmul float %204, %150
>  %206 = fadd float %202, %205
>  %207 = getelementptr float addrspace(2)* %199, i32 2
>  %208 = load float addrspace(2)* %207, !tbaa !0
>  %209 = fmul float %208, %157
>  %210 = fadd float %206, %209
>  %211 = getelementptr float addrspace(2)* %199, i32 3
>  %212 = load float addrspace(2)* %211, !tbaa !0
>  %213 = fmul float %212, %166
>  %214 = fadd float %210, %213
>  %215 = getelementptr float addrspace(2)* %199, i32 4
>  %216 = load float addrspace(2)* %215, !tbaa !0
>  %217 = fmul float %216, %143
>  %218 = getelementptr float addrspace(2)* %199, i32 5
>  %219 = load float addrspace(2)* %218, !tbaa !0
>  %220 = fmul float %219, %150
>  %221 = fadd float %217, %220
>  %222 = getelementptr float addrspace(2)* %199, i32 6
>  %223 = load float addrspace(2)* %222, !tbaa !0
>  %224 = fmul float %223, %157
>  %225 = fadd float %221, %224
>  %226 = getelementptr float addrspace(2)* %199, i32 7
>  %227 = load float addrspace(2)* %226, !tbaa !0
>  %228 = fmul float %227, %166
>  %229 = fadd float %225, %228
>  %230 = getelementptr float addrspace(2)* %199, i32 8
>  %231 = load float addrspace(2)* %230, !tbaa !0
>  %232 = fmul float %231, %143
>  %233 = getelementptr float addrspace(2)* %199, i32 9
>  %234 = load float addrspace(2)* %233, !tbaa !0
>  %235 = fmul float %234, %150
>  %236 = fadd float %232, %235
>  %237 = getelementptr float addrspace(2)* %199, i32 10
>  %238 = load float addrspace(2)* %237, !tbaa !0
>  %239 = fmul float %238, %157
>  %240 = fadd float %236, %239
>  %241 = getelementptr float addrspace(2)* %199, i32 11
>  %242 = load float addrspace(2)* %241, !tbaa !0
>  %243 = fmul float %242, %166
>  %244 = fadd float %240, %243
>  %245 = getelementptr float addrspace(2)* %199, i32 12
>  %246 = load float addrspace(2)* %245, !tbaa !0
>  %247 = fmul float %246, %143
>  %248 = getelementptr float addrspace(2)* %199, i32 13
>  %249 = load float addrspace(2)* %248, !tbaa !0
>  %250 = fmul float %249, %150
>  %251 = fadd float %247, %250
>  %252 = getelementptr float addrspace(2)* %199, i32 14
>  %253 = load float addrspace(2)* %252, !tbaa !0
>  %254 = fmul float %253, %157
>  %255 = fadd float %251, %254
>  %256 = getelementptr float addrspace(2)* %199, i32 15
>  %257 = load float addrspace(2)* %256, !tbaa !0
>  %258 = fmul float %257, %166
>  %259 = fadd float %255, %258
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %214, float %229, float %244, float %259)
>  %260 = getelementptr float addrspace(2)* %199, i32 16
>  %261 = load float addrspace(2)* %260, !tbaa !0
>  %262 = fmul float %261, %143
>  %263 = getelementptr float addrspace(2)* %199, i32 17
>  %264 = load float addrspace(2)* %263, !tbaa !0
>  %265 = fmul float %264, %150
>  %266 = fadd float %262, %265
>  %267 = getelementptr float addrspace(2)* %199, i32 18
>  %268 = load float addrspace(2)* %267, !tbaa !0
>  %269 = fmul float %268, %157
>  %270 = fadd float %266, %269
>  %271 = getelementptr float addrspace(2)* %199, i32 19
>  %272 = load float addrspace(2)* %271, !tbaa !0
>  %273 = fmul float %272, %166
>  %274 = fadd float %270, %273
>  %275 = getelementptr float addrspace(2)* %199, i32 20
>  %276 = load float addrspace(2)* %275, !tbaa !0
>  %277 = fmul float %276, %143
>  %278 = getelementptr float addrspace(2)* %199, i32 21
>  %279 = load float addrspace(2)* %278, !tbaa !0
>  %280 = fmul float %279, %150
>  %281 = fadd float %277, %280
>  %282 = getelementptr float addrspace(2)* %199, i32 22
>  %283 = load float addrspace(2)* %282, !tbaa !0
>  %284 = fmul float %283, %157
>  %285 = fadd float %281, %284
>  %286 = getelementptr float addrspace(2)* %199, i32 23
>  %287 = load float addrspace(2)* %286, !tbaa !0
>  %288 = fmul float %287, %166
>  %289 = fadd float %285, %288
>  %290 = getelementptr float addrspace(2)* %199, i32 24
>  %291 = load float addrspace(2)* %290, !tbaa !0
>  %292 = fmul float %291, %143
>  %293 = getelementptr float addrspace(2)* %199, i32 25
>  %294 = load float addrspace(2)* %293, !tbaa !0
>  %295 = fmul float %294, %150
>  %296 = fadd float %292, %295
>  %297 = getelementptr float addrspace(2)* %199, i32 26
>  %298 = load float addrspace(2)* %297, !tbaa !0
>  %299 = fmul float %298, %157
>  %300 = fadd float %296, %299
>  %301 = getelementptr float addrspace(2)* %199, i32 27
>  %302 = load float addrspace(2)* %301, !tbaa !0
>  %303 = fmul float %302, %166
>  %304 = fadd float %300, %303
>  %305 = getelementptr float addrspace(2)* %199, i32 28
>  %306 = load float addrspace(2)* %305, !tbaa !0
>  %307 = fmul float %306, %143
>  %308 = getelementptr float addrspace(2)* %199, i32 29
>  %309 = load float addrspace(2)* %308, !tbaa !0
>  %310 = fmul float %309, %150
>  %311 = fadd float %307, %310
>  %312 = getelementptr float addrspace(2)* %199, i32 30
>  %313 = load float addrspace(2)* %312, !tbaa !0
>  %314 = fmul float %313, %157
>  %315 = fadd float %311, %314
>  %316 = getelementptr float addrspace(2)* %199, i32 31
>  %317 = load float addrspace(2)* %316, !tbaa !0
>  %318 = fmul float %317, %166
>  %319 = fadd float %315, %318
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %274, float %289, float %304, float %319)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %96, float %97, float %113, float %115)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %122, float %129, float %136, float %175)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %158, float %159, float %167, float %168)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %176, float %177, float %96, float %97)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %191, float %193, float %188, float %166)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0410100
>bf8c007f
>c00403bf
>c0020300
>bf8c007f
>7e040204
>c0028301
>bf8c007f
>7e020205
>d2820003
>040a0208
>d2060803
>02010103
>d2820004
>04060408
>d2060804
>02010104
>f800020f
>03040404
>c0840700
>bf8c000f
>e00c2000
>80020600
>bf8c0770
>d2820003
>04080b06
>d2820004
>04080b07
>c0040311
>bf8c007f
>100a0808
>c0040310
>bf8c007f
>d282000a
>04141103
>d2820005
>04080b08
>c0028312
>bf8c007f
>d2820002
>04280b05
>d2820006
>04040906
>c0020313
>bf8c007f
>d2820001
>04080906
>c0020315
>bf8c007f
>10040804
>c0020314
>bf8c007f
>d2820002
>04080903
>c0020316
>bf8c007f
>d2820002
>04080905
>c0020317
>bf8c007f
>d2820002
>04080906
>c0400102
>bf8c007f
>c002010d
>bf8c007f
>100e0404
>c002010c
>bf8c007f
>d2820008
>041e0204
>c0020319
>bf8c007f
>100e0804
>c0020318
>bf8c007f
>d2820007
>041c0903
>c002031a
>bf8c007f
>d2820007
>041c0905
>c002031b
>bf8c007f
>d2820007
>041c0906
>c002010e
>bf8c007f
>d2820009
>04220e04
>c002031d
>bf8c007f
>10100804
>c002031c
>bf8c007f
>d2820008
>04200903
>c002031e
>bf8c007f
>d2820008
>04200905
>c002031f
>bf8c007f
>d2820008
>04200906
>c002010f
>bf8c007f
>d2820009
>04261004
>c0020109
>bf8c007f
>10140404
>c0020108
>bf8c007f
>d282000a
>042a0204
>c002010a
>bf8c007f
>d282000a
>042a0e04
>c002010b
>bf8c007f
>d282000a
>042a1004
>c0020105
>bf8c007f
>10160404
>c0020104
>bf8c007f
>d282000b
>042e0204
>c0020106
>bf8c007f
>d282000b
>042e0e04
>c0020107
>bf8c007f
>d282000b
>042e1004
>c0020101
>bf8c007f
>10180404
>c0020100
>bf8c007f
>d282000c
>04320204
>c0020102
>bf8c007f
>d282000c
>04320e04
>c0020103
>bf8c007f
>d282000c
>04321004
>f80000ef
>090a0b0c
>c002011d
>bf8c000f
>10120404
>c002011c
>bf8c007f
>d2820009
>04260204
>c002011e
>bf8c007f
>d2820009
>04260e04
>c002011f
>bf8c007f
>d2820009
>04261004
>c0020119
>bf8c007f
>10140404
>c0020118
>bf8c007f
>d282000a
>042a0204
>c002011a
>bf8c007f
>d282000a
>042a0e04
>c002011b
>bf8c007f
>d282000a
>042a1004
>c0020115
>bf8c007f
>10160404
>c0020114
>bf8c007f
>d282000b
>042e0204
>c0020116
>bf8c007f
>d282000b
>042e0e04
>c0020117
>bf8c007f
>d282000b
>042e1004
>c0020111
>bf8c007f
>10180404
>c0020110
>bf8c007f
>d282000c
>04320204
>c0020112
>bf8c007f
>d282000c
>04320e04
>c0000113
>bf8c007f
>d282000c
>04321000
>f80000ff
>090a0b0c
>c0840704
>bf8c000f
>e00c2000
>80020900
>bf8c0770
>f800021f
>06050a09
>c0000331
>bf8c000f
>101a0800
>c0000330
>bf8c007f
>d282000d
>04340103
>c0000332
>bf8c007f
>d282000d
>04340105
>c0000333
>bf8c007f
>d282000d
>04340106
>c00003c9
>bf8c007f
>101c0800
>c00003c8
>bf8c007f
>d282000e
>04380103
>c00003ca
>bf8c007f
>d282000e
>04380105
>c00003cb
>bf8c007f
>d282000e
>04380106
>c00003c5
>bf8c007f
>101e0800
>c00003c4
>bf8c007f
>d282000f
>043c0103
>c00003c6
>bf8c007f
>d282000f
>043c0105
>c00003c7
>bf8c007f
>d282000f
>043c0106
>c00003c1
>bf8c007f
>10080800
>c00003c0
>bf8c007f
>d2820003
>04100103
>c00003c2
>bf8c007f
>d2820003
>040c0105
>c00003c3
>bf8c007f
>d2820003
>040c0106
>f800022f
>0d0e0f03
>c0840708
>bf8c000f
>e00c2000
>80020d00
>c082070c
>bf8c0070
>e00c2000
>80010300
>bf8c0770
>06221b03
>06000711
>061a1d04
>061c090d
>f800023f
>000e0d11
>bf8c070f
>061a090e
>06000700
>f800024f
>0a090d00
>c00003cc
>bf8c000f
>d2820000
>04061000
>c0000302
>bf8c007f
>10020e00
>08021101
>c00003cd
>bf8c007f
>10061000
>08040503
>f80008cf
>08010200
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], GENERIC[19], PERSPECTIVE
>DCL IN[2], GENERIC[20], PERSPECTIVE
>DCL IN[3], GENERIC[21], PERSPECTIVE
>DCL IN[4], GENERIC[22], PERSPECTIVE
>DCL IN[5], GENERIC[23], PERSPECTIVE
>DCL IN[6], GENERIC[24], PERSPECTIVE
>DCL IN[7], GENERIC[25], PERSPECTIVE, CENTROID
>DCL IN[8], GENERIC[26], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL CONST[0..30]
>DCL TEMP[0..9], LOCAL
>DCL TEMP[10], ARRAY(1), LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0000,    -0.4082}
>IMM[1] FLT32 {   -0.4082,     0.7071,     0.5774,    -0.4082}
>IMM[2] FLT32 {    0.8165,     0.0000,     0.5774,    -0.4082}
>IMM[3] FLT32 {   -0.4082,    -0.7071,     0.5774,     0.0000}
>  0: MOV TEMP[0].xy, IN[2].xyyy
>  1: TEX TEMP[0].xyz, TEMP[0], SAMP[4], 2D
>  2: MOV TEMP[1].xy, IN[1].xyyy
>  3: TEX TEMP[1].xyz, TEMP[1], SAMP[0], 2D
>  4: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[8].xyzz
>  5: MAD TEMP[0].xyz, IMM[0].xxxx, TEMP[0].xyzz, IMM[0].yyyy
>  6: MAD TEMP[0].xyz, CONST[8].wwww, TEMP[0].xyzz, IMM[0].zzzz
>  7: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[0].xyzz
>  8: MUL TEMP[2].xyz, TEMP[1].xyzz, IN[0].xyzz
>  9: ADD TEMP[3].xyz, -IN[3].xyzz, CONST[10].xyzz
> 10: MOV TEMP[4].xy, IN[1].xyyy
> 11: TEX TEMP[4], TEMP[4], SAMP[3], 2D
> 12: MUL TEMP[0].xyz, TEMP[4].yyyy, IMM[1].xyzz
> 13: MAD TEMP[0].xyz, TEMP[4].xxxx, IMM[2].xyzz, TEMP[0].xyzz
> 14: MAD TEMP[0].xyz, TEMP[4].zzzz, IMM[3].xyzz, TEMP[0].xyzz
> 15: DP3 TEMP[5].x, TEMP[0].xyzz, TEMP[0].xyzz
> 16: RSQ TEMP[5].x, TEMP[5].xxxx
> 17: MUL TEMP[5].xyz, TEMP[0].xyzz, TEMP[5].xxxx
> 18: DP3 TEMP[0].x, TEMP[5].xyzz, IN[4].xyzz
> 19: DP3 TEMP[6].x, TEMP[5].xyzz, IN[5].xyzz
> 20: MOV TEMP[0].y, TEMP[6].xxxx
> 21: DP3 TEMP[6].x, TEMP[5].xyzz, IN[6].xyzz
> 22: MOV TEMP[0].z, TEMP[6].xxxx
> 23: DP3 TEMP[6].x, TEMP[0].xyzz, TEMP[3].xyzz
> 24: DP3 TEMP[7].x, TEMP[0].xyzz, TEMP[0].xyzz
> 25: ADD TEMP[6].x, TEMP[6].xxxx, TEMP[6].xxxx
> 26: MUL TEMP[3].xyz, TEMP[3].xyzz, TEMP[7].xxxx
> 27: MAD TEMP[0].xyz, TEMP[6].xxxx, TEMP[0].xyzz, -TEMP[3].xyzz
> 28: MOV TEMP[6].xyz, TEMP[0].xyzz
> 29: TEX TEMP[6].xyz, TEMP[6], SAMP[2], CUBE
> 30: MOV TEMP[7].xy, IN[7].wzzz
> 31: TEX TEMP[7].xyz, TEMP[7], SAMP[1], 2D
> 32: MOV TEMP[8].xy, IN[7].xyyy
> 33: TEX TEMP[8].xyz, TEMP[8], SAMP[1], 2D
> 34: MOV TEMP[9].xy, IN[8].xyyy
> 35: TEX TEMP[9].xyz, TEMP[9], SAMP[1], 2D
> 36: MUL TEMP[6].xyz, TEMP[6].xyzz, CONST[30].zzzz
> 37: MUL TEMP[6].xyz, TEMP[4].wwww, TEMP[6].xyzz
> 38: MUL TEMP[6].xyz, TEMP[6].xyzz, CONST[0].xyzz
> 39: MUL TEMP[5].xyz, TEMP[4].yyyy, TEMP[7].xyzz
> 40: MAD TEMP[3].xyz, TEMP[4].xxxx, TEMP[8].xyzz, TEMP[5].xyzz
> 41: MAD TEMP[1].xyz, TEMP[4].zzzz, TEMP[9].xyzz, TEMP[3].xyzz
> 42: MUL TEMP[1].xyz, TEMP[1].xyzz, CONST[12].xyzz
> 43: MAD TEMP[3].x, IN[3].wwww, CONST[11].wwww, -CONST[11].xxxx
> 44: MAD TEMP[1].xyz, TEMP[2].xyzz, TEMP[1].xyzz, TEMP[6].xyzz
> 45: MIN TEMP[3].x, TEMP[3].xxxx, CONST[11].zzzz
> 46: MOV_SAT TEMP[3].x, TEMP[3].xxxx
> 47: MAD TEMP[0].xyz, TEMP[1].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 48: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[3].xxxx
> 49: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[3].xxxx
> 50: MAD TEMP[1].xyz, TEMP[1].xyzz, CONST[30].xxxx, TEMP[0].xyzz
> 51: MUL TEMP[0].x, IN[3].wwww, CONST[29].wwww
> 52: MOV TEMP[1].w, TEMP[0].xxxx
> 53: MOV TEMP[10], TEMP[1]
> 54: MOV OUT[0], TEMP[10]
> 55: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 0
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 1
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 2
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 32
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 33
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 34
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 35
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 40
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 41
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 42
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 44
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr float addrspace(2)* %21, i32 46
>  %45 = load float addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr float addrspace(2)* %21, i32 47
>  %47 = load float addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr float addrspace(2)* %21, i32 48
>  %49 = load float addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr float addrspace(2)* %21, i32 49
>  %51 = load float addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr float addrspace(2)* %21, i32 50
>  %53 = load float addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr float addrspace(2)* %21, i32 116
>  %55 = load float addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr float addrspace(2)* %21, i32 117
>  %57 = load float addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr float addrspace(2)* %21, i32 118
>  %59 = load float addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr float addrspace(2)* %21, i32 119
>  %61 = load float addrspace(2)* %60, !tbaa !0
>  %62 = getelementptr float addrspace(2)* %21, i32 120
>  %63 = load float addrspace(2)* %62, !tbaa !0
>  %64 = getelementptr float addrspace(2)* %21, i32 122
>  %65 = load float addrspace(2)* %64, !tbaa !0
>  %66 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %67 = load <32 x i8> addrspace(2)* %66, !tbaa !0
>  %68 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %69 = load <16 x i8> addrspace(2)* %68, !tbaa !0
>  %70 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %71 = load <32 x i8> addrspace(2)* %70, !tbaa !0
>  %72 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %73 = load <16 x i8> addrspace(2)* %72, !tbaa !0
>  %74 = getelementptr <32 x i8> addrspace(2)* %2, i32 2
>  %75 = load <32 x i8> addrspace(2)* %74, !tbaa !0
>  %76 = getelementptr <16 x i8> addrspace(2)* %1, i32 2
>  %77 = load <16 x i8> addrspace(2)* %76, !tbaa !0
>  %78 = getelementptr <32 x i8> addrspace(2)* %2, i32 3
>  %79 = load <32 x i8> addrspace(2)* %78, !tbaa !0
>  %80 = getelementptr <16 x i8> addrspace(2)* %1, i32 3
>  %81 = load <16 x i8> addrspace(2)* %80, !tbaa !0
>  %82 = getelementptr <32 x i8> addrspace(2)* %2, i32 4
>  %83 = load <32 x i8> addrspace(2)* %82, !tbaa !0
>  %84 = getelementptr <16 x i8> addrspace(2)* %1, i32 4
>  %85 = load <16 x i8> addrspace(2)* %84, !tbaa !0
>  %86 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %87 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %88 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %89 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %90 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %91 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %92 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %93 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %3, <2 x i32> %5)
>  %94 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %3, <2 x i32> %5)
>  %95 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %3, <2 x i32> %5)
>  %96 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %3, <2 x i32> %5)
>  %97 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %3, <2 x i32> %5)
>  %98 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %3, <2 x i32> %5)
>  %99 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %3, <2 x i32> %5)
>  %100 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %3, <2 x i32> %5)
>  %101 = call float @llvm.SI.fs.interp(i32 1, i32 5, i32 %3, <2 x i32> %5)
>  %102 = call float @llvm.SI.fs.interp(i32 2, i32 5, i32 %3, <2 x i32> %5)
>  %103 = call float @llvm.SI.fs.interp(i32 0, i32 6, i32 %3, <2 x i32> %5)
>  %104 = call float @llvm.SI.fs.interp(i32 1, i32 6, i32 %3, <2 x i32> %5)
>  %105 = call float @llvm.SI.fs.interp(i32 2, i32 6, i32 %3, <2 x i32> %5)
>  %106 = call float @llvm.SI.fs.interp(i32 0, i32 7, i32 %3, <2 x i32> %6)
>  %107 = call float @llvm.SI.fs.interp(i32 1, i32 7, i32 %3, <2 x i32> %6)
>  %108 = call float @llvm.SI.fs.interp(i32 2, i32 7, i32 %3, <2 x i32> %6)
>  %109 = call float @llvm.SI.fs.interp(i32 3, i32 7, i32 %3, <2 x i32> %6)
>  %110 = call float @llvm.SI.fs.interp(i32 0, i32 8, i32 %3, <2 x i32> %6)
>  %111 = call float @llvm.SI.fs.interp(i32 1, i32 8, i32 %3, <2 x i32> %6)
>  %112 = bitcast float %91 to i32
>  %113 = bitcast float %92 to i32
>  %114 = insertelement <2 x i32> undef, i32 %112, i32 0
>  %115 = insertelement <2 x i32> %114, i32 %113, i32 1
>  %116 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %115, <32 x i8> %83, <16 x i8> %85, i32 2)
>  %117 = extractelement <4 x float> %116, i32 0
>  %118 = extractelement <4 x float> %116, i32 1
>  %119 = extractelement <4 x float> %116, i32 2
>  %120 = bitcast float %89 to i32
>  %121 = bitcast float %90 to i32
>  %122 = insertelement <2 x i32> undef, i32 %120, i32 0
>  %123 = insertelement <2 x i32> %122, i32 %121, i32 1
>  %124 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %123, <32 x i8> %67, <16 x i8> %69, i32 2)
>  %125 = extractelement <4 x float> %124, i32 0
>  %126 = extractelement <4 x float> %124, i32 1
>  %127 = extractelement <4 x float> %124, i32 2
>  %128 = fmul float %117, %29
>  %129 = fmul float %118, %31
>  %130 = fmul float %119, %33
>  %131 = fmul float 2.000000e+00, %128
>  %132 = fadd float %131, -1.000000e+00
>  %133 = fmul float 2.000000e+00, %129
>  %134 = fadd float %133, -1.000000e+00
>  %135 = fmul float 2.000000e+00, %130
>  %136 = fadd float %135, -1.000000e+00
>  %137 = fmul float %35, %132
>  %138 = fadd float %137, 1.000000e+00
>  %139 = fmul float %35, %134
>  %140 = fadd float %139, 1.000000e+00
>  %141 = fmul float %35, %136
>  %142 = fadd float %141, 1.000000e+00
>  %143 = fmul float %125, %138
>  %144 = fmul float %126, %140
>  %145 = fmul float %127, %142
>  %146 = fmul float %143, %86
>  %147 = fmul float %144, %87
>  %148 = fmul float %145, %88
>  %149 = fsub float -0.000000e+00, %93
>  %150 = fadd float %149, %37
>  %151 = fsub float -0.000000e+00, %94
>  %152 = fadd float %151, %39
>  %153 = fsub float -0.000000e+00, %95
>  %154 = fadd float %153, %41
>  %155 = bitcast float %89 to i32
>  %156 = bitcast float %90 to i32
>  %157 = insertelement <2 x i32> undef, i32 %155, i32 0
>  %158 = insertelement <2 x i32> %157, i32 %156, i32 1
>  %159 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %158, <32 x i8> %79, <16 x i8> %81, i32 2)
>  %160 = extractelement <4 x float> %159, i32 0
>  %161 = extractelement <4 x float> %159, i32 1
>  %162 = extractelement <4 x float> %159, i32 2
>  %163 = extractelement <4 x float> %159, i32 3
>  %164 = fmul float %161, 0xBFDA20BDA0000000
>  %165 = fmul float %161, 0x3FE6A09E60000000
>  %166 = fmul float %161, 0x3FE279A740000000
>  %167 = fmul float %160, 0x3FEA20BD80000000
>  %168 = fadd float %167, %164
>  %169 = fmul float %160, 0.000000e+00
>  %170 = fadd float %169, %165
>  %171 = fmul float %160, 0x3FE279A740000000
>  %172 = fadd float %171, %166
>  %173 = fmul float %162, 0xBFDA20BD20000000
>  %174 = fadd float %173, %168
>  %175 = fmul float %162, 0xBFE6A09E80000000
>  %176 = fadd float %175, %170
>  %177 = fmul float %162, 0x3FE279A740000000
>  %178 = fadd float %177, %172
>  %179 = fmul float %174, %174
>  %180 = fmul float %176, %176
>  %181 = fadd float %180, %179
>  %182 = fmul float %178, %178
>  %183 = fadd float %181, %182
>  %184 = call float @llvm.AMDGPU.rsq(float %183)
>  %185 = fmul float %174, %184
>  %186 = fmul float %176, %184
>  %187 = fmul float %178, %184
>  %188 = fmul float %185, %97
>  %189 = fmul float %186, %98
>  %190 = fadd float %189, %188
>  %191 = fmul float %187, %99
>  %192 = fadd float %190, %191
>  %193 = fmul float %185, %100
>  %194 = fmul float %186, %101
>  %195 = fadd float %194, %193
>  %196 = fmul float %187, %102
>  %197 = fadd float %195, %196
>  %198 = fmul float %185, %103
>  %199 = fmul float %186, %104
>  %200 = fadd float %199, %198
>  %201 = fmul float %187, %105
>  %202 = fadd float %200, %201
>  %203 = fmul float %192, %150
>  %204 = fmul float %197, %152
>  %205 = fadd float %204, %203
>  %206 = fmul float %202, %154
>  %207 = fadd float %205, %206
>  %208 = fmul float %192, %192
>  %209 = fmul float %197, %197
>  %210 = fadd float %209, %208
>  %211 = fmul float %202, %202
>  %212 = fadd float %210, %211
>  %213 = fadd float %207, %207
>  %214 = fmul float %150, %212
>  %215 = fmul float %152, %212
>  %216 = fmul float %154, %212
>  %217 = fsub float -0.000000e+00, %214
>  %218 = fmul float %213, %192
>  %219 = fadd float %218, %217
>  %220 = fsub float -0.000000e+00, %215
>  %221 = fmul float %213, %197
>  %222 = fadd float %221, %220
>  %223 = fsub float -0.000000e+00, %216
>  %224 = fmul float %213, %202
>  %225 = fadd float %224, %223
>  %226 = insertelement <4 x float> undef, float %219, i32 0
>  %227 = insertelement <4 x float> %226, float %222, i32 1
>  %228 = insertelement <4 x float> %227, float %225, i32 2
>  %229 = insertelement <4 x float> %228, float 0.000000e+00, i32 3
>  %230 = call <4 x float> @llvm.AMDGPU.cube(<4 x float> %229)
>  %231 = extractelement <4 x float> %230, i32 0
>  %232 = extractelement <4 x float> %230, i32 1
>  %233 = extractelement <4 x float> %230, i32 2
>  %234 = extractelement <4 x float> %230, i32 3
>  %235 = call float @fabs(float %233)
>  %236 = fdiv float 1.000000e+00, %235
>  %237 = fmul float %231, %236
>  %238 = fadd float %237, 1.500000e+00
>  %239 = fmul float %232, %236
>  %240 = fadd float %239, 1.500000e+00
>  %241 = bitcast float %240 to i32
>  %242 = bitcast float %238 to i32
>  %243 = bitcast float %234 to i32
>  %244 = insertelement <4 x i32> undef, i32 %241, i32 0
>  %245 = insertelement <4 x i32> %244, i32 %242, i32 1
>  %246 = insertelement <4 x i32> %245, i32 %243, i32 2
>  %247 = insertelement <4 x i32> %246, i32 undef, i32 3
>  %248 = call <4 x float> @llvm.SI.sample.v4i32(<4 x i32> %247, <32 x i8> %75, <16 x i8> %77, i32 4)
>  %249 = extractelement <4 x float> %248, i32 0
>  %250 = extractelement <4 x float> %248, i32 1
>  %251 = extractelement <4 x float> %248, i32 2
>  %252 = bitcast float %109 to i32
>  %253 = bitcast float %108 to i32
>  %254 = insertelement <2 x i32> undef, i32 %252, i32 0
>  %255 = insertelement <2 x i32> %254, i32 %253, i32 1
>  %256 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %255, <32 x i8> %71, <16 x i8> %73, i32 2)
>  %257 = extractelement <4 x float> %256, i32 0
>  %258 = extractelement <4 x float> %256, i32 1
>  %259 = extractelement <4 x float> %256, i32 2
>  %260 = bitcast float %106 to i32
>  %261 = bitcast float %107 to i32
>  %262 = insertelement <2 x i32> undef, i32 %260, i32 0
>  %263 = insertelement <2 x i32> %262, i32 %261, i32 1
>  %264 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %263, <32 x i8> %71, <16 x i8> %73, i32 2)
>  %265 = extractelement <4 x float> %264, i32 0
>  %266 = extractelement <4 x float> %264, i32 1
>  %267 = extractelement <4 x float> %264, i32 2
>  %268 = bitcast float %110 to i32
>  %269 = bitcast float %111 to i32
>  %270 = insertelement <2 x i32> undef, i32 %268, i32 0
>  %271 = insertelement <2 x i32> %270, i32 %269, i32 1
>  %272 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %271, <32 x i8> %71, <16 x i8> %73, i32 2)
>  %273 = extractelement <4 x float> %272, i32 0
>  %274 = extractelement <4 x float> %272, i32 1
>  %275 = extractelement <4 x float> %272, i32 2
>  %276 = fmul float %249, %65
>  %277 = fmul float %250, %65
>  %278 = fmul float %251, %65
>  %279 = fmul float %163, %276
>  %280 = fmul float %163, %277
>  %281 = fmul float %163, %278
>  %282 = fmul float %279, %23
>  %283 = fmul float %280, %25
>  %284 = fmul float %281, %27
>  %285 = fmul float %161, %257
>  %286 = fmul float %161, %258
>  %287 = fmul float %161, %259
>  %288 = fmul float %160, %265
>  %289 = fadd float %288, %285
>  %290 = fmul float %160, %266
>  %291 = fadd float %290, %286
>  %292 = fmul float %160, %267
>  %293 = fadd float %292, %287
>  %294 = fmul float %162, %273
>  %295 = fadd float %294, %289
>  %296 = fmul float %162, %274
>  %297 = fadd float %296, %291
>  %298 = fmul float %162, %275
>  %299 = fadd float %298, %293
>  %300 = fmul float %295, %49
>  %301 = fmul float %297, %51
>  %302 = fmul float %299, %53
>  %303 = fsub float -0.000000e+00, %43
>  %304 = fmul float %96, %47
>  %305 = fadd float %304, %303
>  %306 = fmul float %146, %300
>  %307 = fadd float %306, %282
>  %308 = fmul float %147, %301
>  %309 = fadd float %308, %283
>  %310 = fmul float %148, %302
>  %311 = fadd float %310, %284
>  %312 = fcmp uge float %305, %45
>  %313 = select i1 %312, float %45, float %305
>  %314 = call float @llvm.AMDIL.clamp.(float %313, float 0.000000e+00, float 1.000000e+00)
>  %315 = fsub float -0.000000e+00, %63
>  %316 = fmul float %307, %315
>  %317 = fadd float %316, %55
>  %318 = fsub float -0.000000e+00, %63
>  %319 = fmul float %309, %318
>  %320 = fadd float %319, %57
>  %321 = fsub float -0.000000e+00, %63
>  %322 = fmul float %311, %321
>  %323 = fadd float %322, %59
>  %324 = fmul float %314, %314
>  %325 = fmul float %317, %324
>  %326 = fmul float %320, %324
>  %327 = fmul float %323, %324
>  %328 = fmul float %307, %63
>  %329 = fadd float %328, %325
>  %330 = fmul float %309, %63
>  %331 = fadd float %330, %326
>  %332 = fmul float %311, %63
>  %333 = fadd float %332, %327
>  %334 = fmul float %96, %61
>  %335 = call i32 @llvm.SI.packf16(float %329, float %331)
>  %336 = bitcast i32 %335 to float
>  %337 = call i32 @llvm.SI.packf16(float %333, float %334)
>  %338 = bitcast i32 %337 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %336, float %338, float %336, float %338)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDGPU.rsq(float) #2
>
>; Function Attrs: readnone
>declare <4 x float> @llvm.AMDGPU.cube(<4 x float>) #2
>
>; Function Attrs: readnone
>declare float @fabs(float) #2
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8240500
>c8250501
>c8200400
>c8210401
>c084030c
>c0c60518
>bf8c007f
>f0800f00
>00430408
>bf8c0770
>10140aff
>3f3504f3
>d282000a
>04290104
>7e1602ff
>bf3504f4
>d282000b
>042a1706
>10140aff
>bed105ed
>7e1802ff
>3f5105ec
>d282000a
>042a1904
>7e1802ff
>bed105e9
>d282000d
>042a1906
>10141b0d
>d282000c
>042a170b
>10140aff
>3f13cd3a
>7e1c02ff
>3f13cd3a
>d282000a
>042a1d04
>d282000a
>042a1d06
>d282000c
>0432150a
>7e185b0c
>1016190b
>101a190d
>c8381400
>c8391401
>101c1d0d
>c83c1500
>c83d1501
>d282000f
>043a1f0b
>101c190a
>c8281600
>c8291601
>d282000a
>043e150e
>c8301000
>c8311001
>1018190d
>c83c1100
>c83d1101
>d282000c
>04321f0b
>c83c1200
>c83d1201
>d282000c
>04321f0e
>101e190c
>d282000f
>043e150a
>c8401800
>c8411801
>101a210d
>c8401900
>c8411901
>d282000b
>0436210b
>c8341a00
>c8351a01
>d282000b
>042e1b0e
>d282000d
>043e170b
>c8380d00
>c8390d01
>c0400100
>bf8c007f
>c0038129
>bf8c007f
>08201c07
>101c1b10
>c83c0c00
>c83d0c01
>c0038128
>bf8c007f
>081e1e07
>10221f0c
>d2820011
>0446210a
>c8400e00
>c8410e01
>c003812a
>bf8c007f
>08202007
>d2820011
>0446210b
>06222311
>10141511
>08261d0a
>10141b0f
>10181911
>0824150c
>10141b10
>10161711
>0828150b
>7e2a0280
>d28a000b
>04522712
>d28c000a
>04522712
>d28e000c
>04522712
>d288000d
>04522712
>d2060112
>0201010c
>7e245512
>7e2602ff
>3fc00000
>d282000c
>044e250a
>d282000b
>044e250b
>c0840308
>c0c60510
>bf8c007f
>f0800700
>00430a0b
>c003817a
>bf8c0070
>101a1607
>101a1b07
>c0040101
>bf8c007f
>102c1a08
>c8381e02
>c8391e03
>c8341f02
>c8351f03
>c0840304
>c0c60508
>bf8c007f
>f0800700
>00430d0d
>bf8c0770
>10261d05
>c8441d02
>c8451d03
>c8401c02
>c8411c03
>f0800700
>00431010
>bf8c0770
>d2820017
>044e2304
>c8502102
>c8512103
>c84c2002
>c84d2003
>f0800700
>00431313
>bf8c0770
>d2820002
>045e2906
>c0040131
>bf8c007f
>10040408
>c8600900
>c8610901
>c85c0800
>c85d0801
>c0840310
>c0c60520
>bf8c007f
>f0800700
>00431717
>c0040121
>bf8c0070
>10063008
>d2820003
>040c1118
>060606f3
>c0040123
>bf8c007f
>d2820003
>03ca0608
>c0860300
>c0c80500
>bf8c007f
>f0800700
>00641a08
>bf8c0770
>1006071b
>c8200100
>c8210101
>10061103
>d2820008
>045a0503
>c0010178
>bf8c007f
>10041002
>c0018175
>bf8c007f
>08120403
>c8080f00
>c8090f01
>c001812f
>bf8c007f
>10060403
>c001812c
>bf8c007f
>0a060603
>c001812e
>bf8c007f
>d00c0004
>02000703
>7e2c0203
>d2000003
>00122d03
>d2060803
>02010103
>10060703
>10120709
>d2820008
>04240508
>10121407
>10121307
>c0018100
>bf8c007f
>10121203
>102c1b05
>d2820016
>045a2104
>d2820016
>045a2706
>c0018130
>bf8c007f
>102c2c03
>c0018120
>bf8c007f
>103a2e03
>d282001d
>04740717
>063a3af3
>d282001d
>03ca3a08
>103a3b1a
>c8780000
>c8790001
>103a3d1d
>d2820009
>04262d1d
>102c1202
>c0018174
>bf8c007f
>082c2c03
>102c0716
>d2820009
>04580509
>5e101109
>10121807
>10121307
>c0018102
>bf8c007f
>10121203
>10141f05
>d282000a
>042a2504
>d2820004
>042a2b06
>c0018132
>bf8c007f
>10080803
>c0018122
>bf8c007f
>100a3203
>d2820005
>04140719
>060a0af3
>d2820005
>03ca0a08
>100a0b1c
>c8180200
>c8190201
>10000d05
>d2820000
>04260900
>10020002
>c0018176
>bf8c007f
>08020203
>10020701
>d2820000
>04040500
>c0000177
>bf8c007f
>10020400
>5e000300
>f8001c0f
>00080008
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL IN[4]
>DCL IN[5]
>DCL IN[6]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], CLIPVERTEX
>DCL OUT[3], GENERIC[19]
>DCL OUT[4], GENERIC[20]
>DCL OUT[5], GENERIC[21]
>DCL OUT[6], GENERIC[22]
>DCL OUT[7], GENERIC[23]
>DCL OUT[8], GENERIC[24]
>DCL OUT[9], GENERIC[25]
>DCL OUT[10], GENERIC[26]
>DCL CONST[0..55]
>DCL TEMP[0..14], LOCAL
>  0: MAD TEMP[0], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  1: DP4 TEMP[1].x, TEMP[0], CONST[52]
>  2: DP4 TEMP[2].x, TEMP[0], CONST[53]
>  3: MOV TEMP[1].y, TEMP[2].xxxx
>  4: DP4 TEMP[2].x, TEMP[0], CONST[54]
>  5: MOV TEMP[1].z, TEMP[2].xxxx
>  6: DP4 TEMP[2].x, TEMP[0], CONST[4]
>  7: DP4 TEMP[3].x, TEMP[0], CONST[5]
>  8: MOV TEMP[2].y, TEMP[3].xxxx
>  9: DP4 TEMP[4].x, TEMP[0], CONST[6]
> 10: MOV TEMP[2].z, TEMP[4].xxxx
> 11: DP4 TEMP[5].x, TEMP[0], CONST[7]
> 12: MOV TEMP[2].w, TEMP[5].xxxx
> 13: DP4 TEMP[6].x, TEMP[0], CONST[12]
> 14: DP3 TEMP[7].x, IN[1].xyzz, CONST[52].xyzz
> 15: MOV TEMP[7].z, TEMP[7].xxxx
> 16: DP3 TEMP[8].x, IN[1].xyzz, CONST[53].xyzz
> 17: MOV TEMP[8].z, TEMP[8].xxxx
> 18: DP3 TEMP[9].x, IN[1].xyzz, CONST[54].xyzz
> 19: MOV TEMP[9].z, TEMP[9].xxxx
> 20: DP3 TEMP[7].x, IN[5].xyzz, CONST[52].xyzz
> 21: DP3 TEMP[8].x, IN[5].xyzz, CONST[53].xyzz
> 22: DP3 TEMP[9].x, IN[5].xyzz, CONST[54].xyzz
> 23: DP3 TEMP[10].x, IN[6].xyzz, CONST[52].xyzz
> 24: MOV TEMP[7].y, TEMP[10].xxxx
> 25: MUL TEMP[0].xy, IN[2].xyyy, CONST[48].xyyy
> 26: DP3 TEMP[10].x, IN[6].xyzz, CONST[53].xyzz
> 27: MOV TEMP[8].y, TEMP[10].xxxx
> 28: ADD TEMP[10].x, TEMP[0].yyyy, TEMP[0].xxxx
> 29: DP3 TEMP[11].x, IN[6].xyzz, CONST[54].xyzz
> 30: MOV TEMP[9].y, TEMP[11].xxxx
> 31: ADD TEMP[10].x, TEMP[10].xxxx, CONST[48].wwww
> 32: MUL TEMP[11].xy, IN[2].xyyy, CONST[49].xyyy
> 33: MUL TEMP[0].xy, IN[2].xyyy, CONST[50].xyyy
> 34: ADD TEMP[12].x, TEMP[11].yyyy, TEMP[11].xxxx
> 35: ADD TEMP[13].x, TEMP[0].yyyy, TEMP[0].xxxx
> 36: ADD TEMP[12].x, TEMP[12].xxxx, CONST[49].wwww
> 37: MOV TEMP[10].y, TEMP[12].xxxx
> 38: ADD TEMP[12].x, TEMP[13].xxxx, CONST[50].wwww
> 39: MUL TEMP[11].xy, IN[2].xyyy, CONST[51].xyyy
> 40: MUL TEMP[0].xy, IN[2].xyyy, CONST[14].xyyy
> 41: ADD TEMP[13].x, TEMP[11].yyyy, TEMP[11].xxxx
> 42: ADD TEMP[14].x, TEMP[0].yyyy, TEMP[0].xxxx
> 43: ADD TEMP[13].x, TEMP[13].xxxx, CONST[51].wwww
> 44: MOV TEMP[12].y, TEMP[13].xxxx
> 45: ADD TEMP[13].x, TEMP[14].xxxx, CONST[14].wwww
> 46: MOV TEMP[13].z, TEMP[13].xxxx
> 47: MUL TEMP[11].xy, IN[2].xyyy, CONST[15].xyyy
> 48: ADD TEMP[0].xy, IN[4].xyyy, IN[3].xyyy
> 49: ADD TEMP[11].x, TEMP[11].yyyy, TEMP[11].xxxx
> 50: ADD TEMP[14].xy, TEMP[0].yxxx, IN[4].yxxx
> 51: MOV TEMP[0].zw, TEMP[14].yyxy
> 52: ADD TEMP[11].x, TEMP[11].xxxx, CONST[15].wwww
> 53: MOV TEMP[13].w, TEMP[11].xxxx
> 54: MOV TEMP[0], TEMP[0]
> 55: ADD TEMP[13].xy, TEMP[14].yxxx, IN[4].xyyy
> 56: MOV TEMP[1].w, TEMP[6].xxxx
> 57: MOV TEMP[12].zw, CONST[0].xxxx
> 58: MAD TEMP[6], CONST[47].wwww, CONST[0].xxxy, CONST[0].yyyx
> 59: MOV TEMP[11], TEMP[2]
> 60: MAD TEMP[4].x, TEMP[4].xxxx, CONST[0].zzzz, -TEMP[5].xxxx
> 61: MOV TEMP[2].z, TEMP[4].xxxx
> 62: MOV TEMP[2].y, -TEMP[3].xxxx
> 63: MAD TEMP[2].xy, CONST[55].xyyy, TEMP[5].xxxx, TEMP[2].xyyy
> 64: MOV OUT[3], TEMP[10]
> 65: MOV OUT[4], TEMP[12]
> 66: MOV OUT[9], TEMP[0]
> 67: MOV OUT[10], TEMP[13]
> 68: MOV OUT[0], TEMP[2]
> 69: MOV OUT[5], TEMP[1]
> 70: MOV OUT[2], TEMP[11]
> 71: MOV OUT[6], TEMP[7]
> 72: MOV OUT[7], TEMP[8]
> 73: MOV_SAT OUT[1], TEMP[6]
> 74: MOV OUT[8], TEMP[9]
> 75: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 16
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 17
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 18
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 19
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 20
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 21
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 22
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 23
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 24
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 25
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 26
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 27
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 28
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 29
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 30
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 31
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 48
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 49
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 50
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 51
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 56
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 57
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 59
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 60
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 61
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 63
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 191
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 192
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 193
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 195
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 196
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 197
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 199
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 200
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 201
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 203
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 204
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 205
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 207
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr float addrspace(2)* %10, i32 208
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = getelementptr float addrspace(2)* %10, i32 209
>  %98 = load float addrspace(2)* %97, !tbaa !0
>  %99 = getelementptr float addrspace(2)* %10, i32 210
>  %100 = load float addrspace(2)* %99, !tbaa !0
>  %101 = getelementptr float addrspace(2)* %10, i32 211
>  %102 = load float addrspace(2)* %101, !tbaa !0
>  %103 = getelementptr float addrspace(2)* %10, i32 212
>  %104 = load float addrspace(2)* %103, !tbaa !0
>  %105 = getelementptr float addrspace(2)* %10, i32 213
>  %106 = load float addrspace(2)* %105, !tbaa !0
>  %107 = getelementptr float addrspace(2)* %10, i32 214
>  %108 = load float addrspace(2)* %107, !tbaa !0
>  %109 = getelementptr float addrspace(2)* %10, i32 215
>  %110 = load float addrspace(2)* %109, !tbaa !0
>  %111 = getelementptr float addrspace(2)* %10, i32 216
>  %112 = load float addrspace(2)* %111, !tbaa !0
>  %113 = getelementptr float addrspace(2)* %10, i32 217
>  %114 = load float addrspace(2)* %113, !tbaa !0
>  %115 = getelementptr float addrspace(2)* %10, i32 218
>  %116 = load float addrspace(2)* %115, !tbaa !0
>  %117 = getelementptr float addrspace(2)* %10, i32 219
>  %118 = load float addrspace(2)* %117, !tbaa !0
>  %119 = getelementptr float addrspace(2)* %10, i32 220
>  %120 = load float addrspace(2)* %119, !tbaa !0
>  %121 = getelementptr float addrspace(2)* %10, i32 221
>  %122 = load float addrspace(2)* %121, !tbaa !0
>  %123 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %124 = load <16 x i8> addrspace(2)* %123, !tbaa !0
>  %125 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %124, i32 0, i32 %5)
>  %126 = extractelement <4 x float> %125, i32 0
>  %127 = extractelement <4 x float> %125, i32 1
>  %128 = extractelement <4 x float> %125, i32 2
>  %129 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %130 = load <16 x i8> addrspace(2)* %129, !tbaa !0
>  %131 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %130, i32 0, i32 %5)
>  %132 = extractelement <4 x float> %131, i32 0
>  %133 = extractelement <4 x float> %131, i32 1
>  %134 = extractelement <4 x float> %131, i32 2
>  %135 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %136 = load <16 x i8> addrspace(2)* %135, !tbaa !0
>  %137 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %136, i32 0, i32 %5)
>  %138 = extractelement <4 x float> %137, i32 0
>  %139 = extractelement <4 x float> %137, i32 1
>  %140 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %141 = load <16 x i8> addrspace(2)* %140, !tbaa !0
>  %142 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %141, i32 0, i32 %5)
>  %143 = extractelement <4 x float> %142, i32 0
>  %144 = extractelement <4 x float> %142, i32 1
>  %145 = getelementptr <16 x i8> addrspace(2)* %3, i32 4
>  %146 = load <16 x i8> addrspace(2)* %145, !tbaa !0
>  %147 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %146, i32 0, i32 %5)
>  %148 = extractelement <4 x float> %147, i32 0
>  %149 = extractelement <4 x float> %147, i32 1
>  %150 = getelementptr <16 x i8> addrspace(2)* %3, i32 5
>  %151 = load <16 x i8> addrspace(2)* %150, !tbaa !0
>  %152 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %151, i32 0, i32 %5)
>  %153 = extractelement <4 x float> %152, i32 0
>  %154 = extractelement <4 x float> %152, i32 1
>  %155 = extractelement <4 x float> %152, i32 2
>  %156 = getelementptr <16 x i8> addrspace(2)* %3, i32 6
>  %157 = load <16 x i8> addrspace(2)* %156, !tbaa !0
>  %158 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %157, i32 0, i32 %5)
>  %159 = extractelement <4 x float> %158, i32 0
>  %160 = extractelement <4 x float> %158, i32 1
>  %161 = extractelement <4 x float> %158, i32 2
>  %162 = fmul float %126, %14
>  %163 = fadd float %162, %12
>  %164 = fmul float %127, %14
>  %165 = fadd float %164, %12
>  %166 = fmul float %128, %14
>  %167 = fadd float %166, %12
>  %168 = fmul float %126, %12
>  %169 = fadd float %168, %14
>  %170 = fmul float %163, %96
>  %171 = fmul float %165, %98
>  %172 = fadd float %170, %171
>  %173 = fmul float %167, %100
>  %174 = fadd float %172, %173
>  %175 = fmul float %169, %102
>  %176 = fadd float %174, %175
>  %177 = fmul float %163, %104
>  %178 = fmul float %165, %106
>  %179 = fadd float %177, %178
>  %180 = fmul float %167, %108
>  %181 = fadd float %179, %180
>  %182 = fmul float %169, %110
>  %183 = fadd float %181, %182
>  %184 = fmul float %163, %112
>  %185 = fmul float %165, %114
>  %186 = fadd float %184, %185
>  %187 = fmul float %167, %116
>  %188 = fadd float %186, %187
>  %189 = fmul float %169, %118
>  %190 = fadd float %188, %189
>  %191 = fmul float %163, %18
>  %192 = fmul float %165, %20
>  %193 = fadd float %191, %192
>  %194 = fmul float %167, %22
>  %195 = fadd float %193, %194
>  %196 = fmul float %169, %24
>  %197 = fadd float %195, %196
>  %198 = fmul float %163, %26
>  %199 = fmul float %165, %28
>  %200 = fadd float %198, %199
>  %201 = fmul float %167, %30
>  %202 = fadd float %200, %201
>  %203 = fmul float %169, %32
>  %204 = fadd float %202, %203
>  %205 = fmul float %163, %34
>  %206 = fmul float %165, %36
>  %207 = fadd float %205, %206
>  %208 = fmul float %167, %38
>  %209 = fadd float %207, %208
>  %210 = fmul float %169, %40
>  %211 = fadd float %209, %210
>  %212 = fmul float %163, %42
>  %213 = fmul float %165, %44
>  %214 = fadd float %212, %213
>  %215 = fmul float %167, %46
>  %216 = fadd float %214, %215
>  %217 = fmul float %169, %48
>  %218 = fadd float %216, %217
>  %219 = fmul float %163, %50
>  %220 = fmul float %165, %52
>  %221 = fadd float %219, %220
>  %222 = fmul float %167, %54
>  %223 = fadd float %221, %222
>  %224 = fmul float %169, %56
>  %225 = fadd float %223, %224
>  %226 = fmul float %132, %96
>  %227 = fmul float %133, %98
>  %228 = fadd float %227, %226
>  %229 = fmul float %134, %100
>  %230 = fadd float %228, %229
>  %231 = fmul float %132, %104
>  %232 = fmul float %133, %106
>  %233 = fadd float %232, %231
>  %234 = fmul float %134, %108
>  %235 = fadd float %233, %234
>  %236 = fmul float %132, %112
>  %237 = fmul float %133, %114
>  %238 = fadd float %237, %236
>  %239 = fmul float %134, %116
>  %240 = fadd float %238, %239
>  %241 = fmul float %153, %96
>  %242 = fmul float %154, %98
>  %243 = fadd float %242, %241
>  %244 = fmul float %155, %100
>  %245 = fadd float %243, %244
>  %246 = fmul float %153, %104
>  %247 = fmul float %154, %106
>  %248 = fadd float %247, %246
>  %249 = fmul float %155, %108
>  %250 = fadd float %248, %249
>  %251 = fmul float %153, %112
>  %252 = fmul float %154, %114
>  %253 = fadd float %252, %251
>  %254 = fmul float %155, %116
>  %255 = fadd float %253, %254
>  %256 = fmul float %159, %96
>  %257 = fmul float %160, %98
>  %258 = fadd float %257, %256
>  %259 = fmul float %161, %100
>  %260 = fadd float %258, %259
>  %261 = fmul float %138, %72
>  %262 = fmul float %139, %74
>  %263 = fmul float %159, %104
>  %264 = fmul float %160, %106
>  %265 = fadd float %264, %263
>  %266 = fmul float %161, %108
>  %267 = fadd float %265, %266
>  %268 = fadd float %262, %261
>  %269 = fmul float %159, %112
>  %270 = fmul float %160, %114
>  %271 = fadd float %270, %269
>  %272 = fmul float %161, %116
>  %273 = fadd float %271, %272
>  %274 = fadd float %268, %76
>  %275 = fmul float %138, %78
>  %276 = fmul float %139, %80
>  %277 = fmul float %138, %84
>  %278 = fmul float %139, %86
>  %279 = fadd float %276, %275
>  %280 = fadd float %278, %277
>  %281 = fadd float %279, %82
>  %282 = fadd float %280, %88
>  %283 = fmul float %138, %90
>  %284 = fmul float %139, %92
>  %285 = fmul float %138, %58
>  %286 = fmul float %139, %60
>  %287 = fadd float %284, %283
>  %288 = fadd float %286, %285
>  %289 = fadd float %287, %94
>  %290 = fadd float %288, %62
>  %291 = fmul float %138, %64
>  %292 = fmul float %139, %66
>  %293 = fadd float %148, %143
>  %294 = fadd float %149, %144
>  %295 = fadd float %292, %291
>  %296 = fadd float %294, %149
>  %297 = fadd float %293, %148
>  %298 = fadd float %295, %68
>  %299 = fadd float %297, %148
>  %300 = fadd float %296, %149
>  %301 = fmul float %70, %12
>  %302 = fadd float %301, %14
>  %303 = fmul float %70, %12
>  %304 = fadd float %303, %14
>  %305 = fmul float %70, %12
>  %306 = fadd float %305, %14
>  %307 = fmul float %70, %14
>  %308 = fadd float %307, %12
>  %309 = fsub float -0.000000e+00, %218
>  %310 = fmul float %211, %16
>  %311 = fadd float %310, %309
>  %312 = fsub float -0.000000e+00, %204
>  %313 = fmul float %120, %218
>  %314 = fadd float %313, %197
>  %315 = fmul float %122, %218
>  %316 = fadd float %315, %312
>  %317 = call float @llvm.AMDIL.clamp.(float %302, float 0.000000e+00, float 1.000000e+00)
>  %318 = call float @llvm.AMDIL.clamp.(float %304, float 0.000000e+00, float 1.000000e+00)
>  %319 = call float @llvm.AMDIL.clamp.(float %306, float 0.000000e+00, float 1.000000e+00)
>  %320 = call float @llvm.AMDIL.clamp.(float %308, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %317, float %318, float %319, float %320)
>  %321 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %322 = load float addrspace(2)* addrspace(2)* %321, !tbaa !0
>  %323 = getelementptr float addrspace(2)* %322, i32 0
>  %324 = load float addrspace(2)* %323, !tbaa !0
>  %325 = fmul float %324, %197
>  %326 = getelementptr float addrspace(2)* %322, i32 1
>  %327 = load float addrspace(2)* %326, !tbaa !0
>  %328 = fmul float %327, %204
>  %329 = fadd float %325, %328
>  %330 = getelementptr float addrspace(2)* %322, i32 2
>  %331 = load float addrspace(2)* %330, !tbaa !0
>  %332 = fmul float %331, %211
>  %333 = fadd float %329, %332
>  %334 = getelementptr float addrspace(2)* %322, i32 3
>  %335 = load float addrspace(2)* %334, !tbaa !0
>  %336 = fmul float %335, %218
>  %337 = fadd float %333, %336
>  %338 = getelementptr float addrspace(2)* %322, i32 4
>  %339 = load float addrspace(2)* %338, !tbaa !0
>  %340 = fmul float %339, %197
>  %341 = getelementptr float addrspace(2)* %322, i32 5
>  %342 = load float addrspace(2)* %341, !tbaa !0
>  %343 = fmul float %342, %204
>  %344 = fadd float %340, %343
>  %345 = getelementptr float addrspace(2)* %322, i32 6
>  %346 = load float addrspace(2)* %345, !tbaa !0
>  %347 = fmul float %346, %211
>  %348 = fadd float %344, %347
>  %349 = getelementptr float addrspace(2)* %322, i32 7
>  %350 = load float addrspace(2)* %349, !tbaa !0
>  %351 = fmul float %350, %218
>  %352 = fadd float %348, %351
>  %353 = getelementptr float addrspace(2)* %322, i32 8
>  %354 = load float addrspace(2)* %353, !tbaa !0
>  %355 = fmul float %354, %197
>  %356 = getelementptr float addrspace(2)* %322, i32 9
>  %357 = load float addrspace(2)* %356, !tbaa !0
>  %358 = fmul float %357, %204
>  %359 = fadd float %355, %358
>  %360 = getelementptr float addrspace(2)* %322, i32 10
>  %361 = load float addrspace(2)* %360, !tbaa !0
>  %362 = fmul float %361, %211
>  %363 = fadd float %359, %362
>  %364 = getelementptr float addrspace(2)* %322, i32 11
>  %365 = load float addrspace(2)* %364, !tbaa !0
>  %366 = fmul float %365, %218
>  %367 = fadd float %363, %366
>  %368 = getelementptr float addrspace(2)* %322, i32 12
>  %369 = load float addrspace(2)* %368, !tbaa !0
>  %370 = fmul float %369, %197
>  %371 = getelementptr float addrspace(2)* %322, i32 13
>  %372 = load float addrspace(2)* %371, !tbaa !0
>  %373 = fmul float %372, %204
>  %374 = fadd float %370, %373
>  %375 = getelementptr float addrspace(2)* %322, i32 14
>  %376 = load float addrspace(2)* %375, !tbaa !0
>  %377 = fmul float %376, %211
>  %378 = fadd float %374, %377
>  %379 = getelementptr float addrspace(2)* %322, i32 15
>  %380 = load float addrspace(2)* %379, !tbaa !0
>  %381 = fmul float %380, %218
>  %382 = fadd float %378, %381
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %337, float %352, float %367, float %382)
>  %383 = getelementptr float addrspace(2)* %322, i32 16
>  %384 = load float addrspace(2)* %383, !tbaa !0
>  %385 = fmul float %384, %197
>  %386 = getelementptr float addrspace(2)* %322, i32 17
>  %387 = load float addrspace(2)* %386, !tbaa !0
>  %388 = fmul float %387, %204
>  %389 = fadd float %385, %388
>  %390 = getelementptr float addrspace(2)* %322, i32 18
>  %391 = load float addrspace(2)* %390, !tbaa !0
>  %392 = fmul float %391, %211
>  %393 = fadd float %389, %392
>  %394 = getelementptr float addrspace(2)* %322, i32 19
>  %395 = load float addrspace(2)* %394, !tbaa !0
>  %396 = fmul float %395, %218
>  %397 = fadd float %393, %396
>  %398 = getelementptr float addrspace(2)* %322, i32 20
>  %399 = load float addrspace(2)* %398, !tbaa !0
>  %400 = fmul float %399, %197
>  %401 = getelementptr float addrspace(2)* %322, i32 21
>  %402 = load float addrspace(2)* %401, !tbaa !0
>  %403 = fmul float %402, %204
>  %404 = fadd float %400, %403
>  %405 = getelementptr float addrspace(2)* %322, i32 22
>  %406 = load float addrspace(2)* %405, !tbaa !0
>  %407 = fmul float %406, %211
>  %408 = fadd float %404, %407
>  %409 = getelementptr float addrspace(2)* %322, i32 23
>  %410 = load float addrspace(2)* %409, !tbaa !0
>  %411 = fmul float %410, %218
>  %412 = fadd float %408, %411
>  %413 = getelementptr float addrspace(2)* %322, i32 24
>  %414 = load float addrspace(2)* %413, !tbaa !0
>  %415 = fmul float %414, %197
>  %416 = getelementptr float addrspace(2)* %322, i32 25
>  %417 = load float addrspace(2)* %416, !tbaa !0
>  %418 = fmul float %417, %204
>  %419 = fadd float %415, %418
>  %420 = getelementptr float addrspace(2)* %322, i32 26
>  %421 = load float addrspace(2)* %420, !tbaa !0
>  %422 = fmul float %421, %211
>  %423 = fadd float %419, %422
>  %424 = getelementptr float addrspace(2)* %322, i32 27
>  %425 = load float addrspace(2)* %424, !tbaa !0
>  %426 = fmul float %425, %218
>  %427 = fadd float %423, %426
>  %428 = getelementptr float addrspace(2)* %322, i32 28
>  %429 = load float addrspace(2)* %428, !tbaa !0
>  %430 = fmul float %429, %197
>  %431 = getelementptr float addrspace(2)* %322, i32 29
>  %432 = load float addrspace(2)* %431, !tbaa !0
>  %433 = fmul float %432, %204
>  %434 = fadd float %430, %433
>  %435 = getelementptr float addrspace(2)* %322, i32 30
>  %436 = load float addrspace(2)* %435, !tbaa !0
>  %437 = fmul float %436, %211
>  %438 = fadd float %434, %437
>  %439 = getelementptr float addrspace(2)* %322, i32 31
>  %440 = load float addrspace(2)* %439, !tbaa !0
>  %441 = fmul float %440, %218
>  %442 = fadd float %438, %441
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %397, float %412, float %427, float %442)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %274, float %281, float 0.000000e+00, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %282, float %289, float %12, float %12)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %176, float %183, float %190, float %225)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %245, float %260, float %230, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 37, i32 0, float %250, float %267, float %235, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 38, i32 0, float %255, float %273, float %240, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 39, i32 0, float %293, float %294, float %296, float %297)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 40, i32 0, float %299, float %300, float %290, float %298)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %314, float %316, float %311, float %218)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0410100
>bf8c007f
>c00403bf
>c0020300
>bf8c007f
>7e040204
>c0028301
>bf8c007f
>7e020205
>d2820003
>040a0208
>d2060803
>02010103
>d2820004
>04060408
>d2060804
>02010104
>f800020f
>03040404
>c0840700
>bf8c000f
>e00c2000
>80020800
>bf8c0770
>d2820005
>04080b08
>d2820006
>04080b09
>c0040311
>bf8c007f
>10060c08
>c0040310
>bf8c007f
>d2820003
>040c1105
>d2820007
>04080b0a
>c0028312
>bf8c007f
>d2820002
>040c0b07
>d2820008
>04040908
>c0028313
>bf8c007f
>d2820001
>04080b08
>c0028315
>bf8c007f
>10040c05
>c0028314
>bf8c007f
>d2820002
>04080b05
>c0028316
>bf8c007f
>d2820002
>04080b07
>c0028317
>bf8c007f
>d2820002
>04080b08
>c0400102
>bf8c007f
>c002810d
>bf8c007f
>10060405
>c002810c
>bf8c007f
>d2820004
>040e0205
>c0028319
>bf8c007f
>10060c05
>c0028318
>bf8c007f
>d2820003
>040c0b05
>c002831a
>bf8c007f
>d2820003
>040c0b07
>c002831b
>bf8c007f
>d2820003
>040c0b08
>c002810e
>bf8c007f
>d2820009
>04120605
>c002831d
>bf8c007f
>10080c05
>c002831c
>bf8c007f
>d2820004
>04100b05
>c002831e
>bf8c007f
>d2820004
>04100b07
>c002831f
>bf8c007f
>d2820004
>04100b08
>c002810f
>bf8c007f
>d2820009
>04260805
>c0028109
>bf8c007f
>10140405
>c0028108
>bf8c007f
>d282000a
>042a0205
>c002810a
>bf8c007f
>d282000a
>042a0605
>c002810b
>bf8c007f
>d282000a
>042a0805
>c0028105
>bf8c007f
>10160405
>c0028104
>bf8c007f
>d282000b
>042e0205
>c0028106
>bf8c007f
>d282000b
>042e0605
>c0028107
>bf8c007f
>d282000b
>042e0805
>c0028101
>bf8c007f
>10180405
>c0028100
>bf8c007f
>d282000c
>04320205
>c0028102
>bf8c007f
>d282000c
>04320605
>c0028103
>bf8c007f
>d282000c
>04320805
>f80000ef
>090a0b0c
>c002811d
>bf8c000f
>10120405
>c002811c
>bf8c007f
>d2820009
>04260205
>c002811e
>bf8c007f
>d2820009
>04260605
>c002811f
>bf8c007f
>d2820009
>04260805
>c0028119
>bf8c007f
>10140405
>c0028118
>bf8c007f
>d282000a
>042a0205
>c002811a
>bf8c007f
>d282000a
>042a0605
>c002811b
>bf8c007f
>d282000a
>042a0805
>c0028115
>bf8c007f
>10160405
>c0028114
>bf8c007f
>d282000b
>042e0205
>c0028116
>bf8c007f
>d282000b
>042e0605
>c0028117
>bf8c007f
>d282000b
>042e0805
>c0028111
>bf8c007f
>10180405
>c0028110
>bf8c007f
>d282000c
>04320205
>c0028112
>bf8c007f
>d282000c
>04320605
>c0000113
>bf8c007f
>d282000c
>04320800
>f80000ff
>090a0b0c
>c0840708
>bf8c000f
>e00c2000
>80020900
>c00003c4
>bf8c0070
>101a1200
>c00003c5
>bf8c007f
>d282000d
>0434010a
>c00003c7
>bf8c007f
>061c1a00
>c00003c0
>bf8c007f
>101a1200
>c00003c1
>bf8c007f
>d282000d
>0434010a
>c00003c3
>bf8c007f
>061e1a00
>7e1a0280
>f800021f
>0d0d0e0f
>c00003cc
>bf8c000f
>101c1200
>c00003cd
>bf8c007f
>d282000e
>0438010a
>c00003cf
>bf8c007f
>061c1c00
>c00003c8
>bf8c007f
>101e1200
>c00003c9
>bf8c007f
>d282000f
>043c010a
>c00003cb
>bf8c007f
>061e1e00
>7e200204
>7e220204
>f800022f
>11100e0f
>c0000331
>bf8c000f
>101c0c00
>c0000330
>bf8c007f
>d282000e
>04380105
>c0000332
>bf8c007f
>d282000e
>04380107
>c0000333
>bf8c007f
>d282000e
>04380108
>c00003d9
>bf8c007f
>101e0c00
>c00083d8
>bf8c007f
>d282000f
>043c0305
>c00203da
>bf8c007f
>d282000f
>043c0907
>c00283db
>bf8c007f
>d282000f
>043c0b08
>c00283d5
>bf8c007f
>10200c05
>c00403d4
>bf8c007f
>d2820010
>04401105
>c00483d6
>bf8c007f
>d2820010
>04401307
>c00503d7
>bf8c007f
>d2820010
>04401508
>c00503d1
>bf8c007f
>100c0c0a
>c00603d0
>bf8c007f
>d2820005
>04181905
>c00583d2
>bf8c007f
>d2820005
>04141707
>c00683d3
>bf8c007f
>d2820005
>04141b08
>f800023f
>0e0f1005
>c0880704
>bf8c000f
>e00c2000
>80040500
>bf8c0770
>101c0a0c
>d282000e
>04381506
>d2820016
>04381707
>c0880718
>bf8c007f
>e00c2000
>80040e00
>bf8c0770
>10241c0c
>d2820012
>0448150f
>d2820017
>04481710
>c0880714
>bf8c007f
>e00c2000
>80041200
>bf8c0770
>1030240c
>d2820018
>04601513
>d2820018
>04601714
>f800024f
>0d161718
>bf8c070f
>102c0a08
>d2820016
>04580b06
>d2820016
>04581307
>102e1c08
>d2820017
>045c0b0f
>d2820017
>045c1310
>10302408
>d2820018
>04600b13
>d2820018
>04601314
>f800025f
>0d161718
>bf8c070f
>102c0a01
>d2820016
>04580106
>d2820005
>04580907
>100c1c01
>d2820006
>0418010f
>d2820006
>04180910
>100e2401
>d2820007
>041c0113
>d2820007
>041c0914
>f800026f
>0d050607
>c084070c
>bf8c000f
>e00c2000
>80020d00
>c0820710
>bf8c0070
>e00c2000
>80010500
>bf8c0770
>06221b05
>06000b11
>061c1d06
>061a0d0e
>f800027f
>000d0e11
>c000033c
>bf8c000f
>101c1200
>c000033d
>bf8c007f
>d282000e
>0438010a
>c000033f
>bf8c007f
>061c1c00
>c0000338
>bf8c007f
>101e1200
>c0000339
>bf8c007f
>d2820009
>043c010a
>c000033b
>bf8c007f
>06121200
>06140d0d
>06000b00
>f800028f
>0e090a00
>c00003dc
>bf8c000f
>d2820000
>04060800
>c0000302
>bf8c007f
>10020600
>08020901
>c00003dd
>bf8c007f
>10060800
>08040503
>f80008cf
>04010200
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], GENERIC[19], PERSPECTIVE
>DCL IN[2], GENERIC[20], PERSPECTIVE
>DCL IN[3], GENERIC[21], PERSPECTIVE, CENTROID
>DCL IN[4], GENERIC[22], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL CONST[0..30]
>DCL TEMP[0..4], LOCAL
>DCL TEMP[5], ARRAY(1), LOCAL
>  0: MOV TEMP[0].xy, IN[3].xyyy
>  1: TEX TEMP[0].xyz, TEMP[0], SAMP[1], 2D
>  2: MOV TEMP[1].xy, IN[3].wzzz
>  3: TEX TEMP[1].xyz, TEMP[1], SAMP[1], 2D
>  4: MOV TEMP[2].xy, IN[1].xyyy
>  5: TEX TEMP[2].xyz, TEMP[2], SAMP[2], 2D
>  6: MOV TEMP[3].xy, IN[1].xyyy
>  7: TEX TEMP[3].xyz, TEMP[3], SAMP[0], 2D
>  8: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[2].yyyy
>  9: MAD TEMP[0].xyz, TEMP[2].xxxx, TEMP[0].xyzz, TEMP[1].xyzz
> 10: MOV TEMP[4].xy, IN[4].xyyy
> 11: TEX TEMP[4].xyz, TEMP[4], SAMP[1], 2D
> 12: MAD TEMP[0].xyz, TEMP[2].zzzz, TEMP[4].xyzz, TEMP[0].xyzz
> 13: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[12].xyzz
> 14: MUL TEMP[1].xyz, TEMP[3].xyzz, IN[0].xyzz
> 15: MAD TEMP[2].x, IN[2].wwww, CONST[11].wwww, -CONST[11].xxxx
> 16: MUL TEMP[1].xyz, TEMP[0].xyzz, TEMP[1].xyzz
> 17: MIN TEMP[2].x, TEMP[2].xxxx, CONST[11].zzzz
> 18: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 19: MAD TEMP[0].xyz, TEMP[1].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 20: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
> 21: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[2].xxxx
> 22: MAD TEMP[1].xyz, TEMP[1].xyzz, CONST[30].xxxx, TEMP[0].xyzz
> 23: MUL TEMP[0].x, IN[2].wwww, CONST[29].wwww
> 24: MOV TEMP[1].w, TEMP[0].xxxx
> 25: MOV TEMP[5], TEMP[1]
> 26: MOV OUT[0], TEMP[5]
> 27: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 44
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 46
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 47
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 48
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 49
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 50
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 116
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 117
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 118
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 119
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 120
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %45 = load <32 x i8> addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %47 = load <16 x i8> addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %49 = load <32 x i8> addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %51 = load <16 x i8> addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr <32 x i8> addrspace(2)* %2, i32 2
>  %53 = load <32 x i8> addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr <16 x i8> addrspace(2)* %1, i32 2
>  %55 = load <16 x i8> addrspace(2)* %54, !tbaa !0
>  %56 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %57 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %58 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %59 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %60 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %61 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %3, <2 x i32> %5)
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %3, <2 x i32> %6)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %3, <2 x i32> %6)
>  %64 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %3, <2 x i32> %6)
>  %65 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %3, <2 x i32> %6)
>  %66 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %3, <2 x i32> %6)
>  %67 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %3, <2 x i32> %6)
>  %68 = bitcast float %62 to i32
>  %69 = bitcast float %63 to i32
>  %70 = insertelement <2 x i32> undef, i32 %68, i32 0
>  %71 = insertelement <2 x i32> %70, i32 %69, i32 1
>  %72 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %71, <32 x i8> %49, <16 x i8> %51, i32 2)
>  %73 = extractelement <4 x float> %72, i32 0
>  %74 = extractelement <4 x float> %72, i32 1
>  %75 = extractelement <4 x float> %72, i32 2
>  %76 = bitcast float %65 to i32
>  %77 = bitcast float %64 to i32
>  %78 = insertelement <2 x i32> undef, i32 %76, i32 0
>  %79 = insertelement <2 x i32> %78, i32 %77, i32 1
>  %80 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %79, <32 x i8> %49, <16 x i8> %51, i32 2)
>  %81 = extractelement <4 x float> %80, i32 0
>  %82 = extractelement <4 x float> %80, i32 1
>  %83 = extractelement <4 x float> %80, i32 2
>  %84 = bitcast float %59 to i32
>  %85 = bitcast float %60 to i32
>  %86 = insertelement <2 x i32> undef, i32 %84, i32 0
>  %87 = insertelement <2 x i32> %86, i32 %85, i32 1
>  %88 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %87, <32 x i8> %53, <16 x i8> %55, i32 2)
>  %89 = extractelement <4 x float> %88, i32 0
>  %90 = extractelement <4 x float> %88, i32 1
>  %91 = extractelement <4 x float> %88, i32 2
>  %92 = bitcast float %59 to i32
>  %93 = bitcast float %60 to i32
>  %94 = insertelement <2 x i32> undef, i32 %92, i32 0
>  %95 = insertelement <2 x i32> %94, i32 %93, i32 1
>  %96 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %95, <32 x i8> %45, <16 x i8> %47, i32 2)
>  %97 = extractelement <4 x float> %96, i32 0
>  %98 = extractelement <4 x float> %96, i32 1
>  %99 = extractelement <4 x float> %96, i32 2
>  %100 = fmul float %81, %90
>  %101 = fmul float %82, %90
>  %102 = fmul float %83, %90
>  %103 = fmul float %89, %73
>  %104 = fadd float %103, %100
>  %105 = fmul float %89, %74
>  %106 = fadd float %105, %101
>  %107 = fmul float %89, %75
>  %108 = fadd float %107, %102
>  %109 = bitcast float %66 to i32
>  %110 = bitcast float %67 to i32
>  %111 = insertelement <2 x i32> undef, i32 %109, i32 0
>  %112 = insertelement <2 x i32> %111, i32 %110, i32 1
>  %113 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %112, <32 x i8> %49, <16 x i8> %51, i32 2)
>  %114 = extractelement <4 x float> %113, i32 0
>  %115 = extractelement <4 x float> %113, i32 1
>  %116 = extractelement <4 x float> %113, i32 2
>  %117 = fmul float %91, %114
>  %118 = fadd float %117, %104
>  %119 = fmul float %91, %115
>  %120 = fadd float %119, %106
>  %121 = fmul float %91, %116
>  %122 = fadd float %121, %108
>  %123 = fmul float %118, %29
>  %124 = fmul float %120, %31
>  %125 = fmul float %122, %33
>  %126 = fmul float %97, %56
>  %127 = fmul float %98, %57
>  %128 = fmul float %99, %58
>  %129 = fsub float -0.000000e+00, %23
>  %130 = fmul float %61, %27
>  %131 = fadd float %130, %129
>  %132 = fmul float %123, %126
>  %133 = fmul float %124, %127
>  %134 = fmul float %125, %128
>  %135 = fcmp uge float %131, %25
>  %136 = select i1 %135, float %25, float %131
>  %137 = call float @llvm.AMDIL.clamp.(float %136, float 0.000000e+00, float 1.000000e+00)
>  %138 = fsub float -0.000000e+00, %43
>  %139 = fmul float %132, %138
>  %140 = fadd float %139, %35
>  %141 = fsub float -0.000000e+00, %43
>  %142 = fmul float %133, %141
>  %143 = fadd float %142, %37
>  %144 = fsub float -0.000000e+00, %43
>  %145 = fmul float %134, %144
>  %146 = fadd float %145, %39
>  %147 = fmul float %137, %137
>  %148 = fmul float %140, %147
>  %149 = fmul float %143, %147
>  %150 = fmul float %146, %147
>  %151 = fmul float %132, %43
>  %152 = fadd float %151, %148
>  %153 = fmul float %133, %43
>  %154 = fadd float %153, %149
>  %155 = fmul float %134, %43
>  %156 = fadd float %155, %150
>  %157 = fmul float %61, %41
>  %158 = call i32 @llvm.SI.packf16(float %152, float %154)
>  %159 = bitcast i32 %158 to float
>  %160 = call i32 @llvm.SI.packf16(float %156, float %157)
>  %161 = bitcast i32 %160 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %159, float %161, float %159, float %161)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8380500
>c8390501
>c8340400
>c8350401
>c0840308
>c0c60510
>bf8c007f
>f0800700
>0043040d
>c8200e02
>c8210e03
>c81c0f02
>c81d0f03
>c0840304
>c0c60508
>bf8c0070
>f0800700
>00430707
>bf8c0770
>101e0b08
>c82c0d02
>c82d0d03
>c8280c02
>c8290c03
>f0800700
>00430a0a
>bf8c0770
>d2820012
>043e1704
>c8401102
>c8411103
>c83c1002
>c83d1003
>f0800700
>00430f0f
>bf8c0770
>d2820002
>044a2106
>c0400100
>bf8c007f
>c0038131
>bf8c007f
>10040407
>c0840300
>c0c60500
>bf8c007f
>f0800700
>0043120d
>c80c0100
>c80d0101
>bf8c0770
>10060713
>101a0702
>c0010178
>bf8c007f
>10041a02
>c0018175
>bf8c007f
>081c0403
>c8080b00
>c8090b01
>c001812f
>bf8c007f
>10060403
>c001812c
>bf8c007f
>0a060603
>c001812e
>bf8c007f
>d00c0004
>02000703
>7e2a0203
>d2000003
>00122b03
>d2060803
>02010103
>10060703
>101c070e
>d282000d
>0438050d
>101c0b07
>d282000e
>043a1504
>d282000e
>043a1f06
>c0018130
>bf8c007f
>101c1c03
>c8540000
>c8550001
>102a2b12
>101c2b0e
>102a1c02
>c0018174
>bf8c007f
>082a2a03
>102a0715
>d282000e
>0454050e
>5e1a1b0e
>100e0b09
>d2820007
>041e1904
>d2820004
>041e2306
>c0018132
>bf8c007f
>10080803
>c8140200
>c8150201
>10000b14
>10000104
>10020002
>c0018176
>bf8c007f
>08020203
>10020701
>d2820000
>04040500
>c0000177
>bf8c007f
>10020400
>5e000300
>f8001c0f
>000d000d
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL OUT[2], CLIPVERTEX
>DCL OUT[3], GENERIC[19]
>DCL OUT[4], GENERIC[20]
>DCL OUT[5], GENERIC[21]
>DCL OUT[6], GENERIC[22]
>DCL CONST[0..51]
>DCL TEMP[0..9], LOCAL
>  0: MAD TEMP[0], IN[0].xyzx, CONST[0].yyyx, CONST[0].xxxy
>  1: DP4 TEMP[1].x, TEMP[0], CONST[48]
>  2: DP4 TEMP[2].x, TEMP[0], CONST[49]
>  3: MOV TEMP[1].y, TEMP[2].xxxx
>  4: DP4 TEMP[2].x, TEMP[0], CONST[50]
>  5: MOV TEMP[1].z, TEMP[2].xxxx
>  6: DP4 TEMP[2].x, TEMP[0], CONST[4]
>  7: DP4 TEMP[3].x, TEMP[0], CONST[5]
>  8: MOV TEMP[2].y, TEMP[3].xxxx
>  9: DP4 TEMP[4].x, TEMP[0], CONST[6]
> 10: MOV TEMP[2].z, TEMP[4].xxxx
> 11: ADD TEMP[5].xy, IN[3].xyyy, IN[2].xyyy
> 12: DP4 TEMP[6].x, TEMP[0], CONST[7]
> 13: MOV TEMP[2].w, TEMP[6].xxxx
> 14: ADD TEMP[7].xy, TEMP[5].yxxx, IN[3].yxxx
> 15: MOV TEMP[5].zw, TEMP[7].yyxy
> 16: DP4 TEMP[0].x, TEMP[0], CONST[12]
> 17: MOV TEMP[5], TEMP[5]
> 18: ADD TEMP[7].xy, TEMP[7].yxxx, IN[3].xyyy
> 19: MOV TEMP[1].w, TEMP[0].xxxx
> 20: MOV TEMP[0].xy, IN[1].xyxx
> 21: MOV TEMP[7].zw, IN[1].yyxy
> 22: MAD TEMP[8], CONST[47].wwww, CONST[0].xxxy, CONST[0].yyyx
> 23: MOV TEMP[9], TEMP[2]
> 24: MAD TEMP[4].x, TEMP[4].xxxx, CONST[0].zzzz, -TEMP[6].xxxx
> 25: MOV TEMP[2].z, TEMP[4].xxxx
> 26: MOV TEMP[2].y, -TEMP[3].xxxx
> 27: MAD TEMP[2].xy, CONST[51].xyyy, TEMP[6].xxxx, TEMP[2].xyyy
> 28: MOV OUT[3], TEMP[0]
> 29: MOV OUT[5], TEMP[5]
> 30: MOV OUT[6], TEMP[7]
> 31: MOV OUT[0], TEMP[2]
> 32: MOV OUT[4], TEMP[1]
> 33: MOV OUT[2], TEMP[9]
> 34: MOV_SAT OUT[1], TEMP[8]
> 35: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 16
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 17
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 18
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 19
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 20
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 21
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 22
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 23
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 24
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 25
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 26
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 27
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 28
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 29
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 30
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 31
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 48
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 49
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 50
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 51
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 191
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 192
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 193
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 194
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 195
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 196
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 197
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 198
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 199
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 200
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 201
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 202
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 203
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 204
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 205
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %88 = load <16 x i8> addrspace(2)* %87, !tbaa !0
>  %89 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %88, i32 0, i32 %5)
>  %90 = extractelement <4 x float> %89, i32 0
>  %91 = extractelement <4 x float> %89, i32 1
>  %92 = extractelement <4 x float> %89, i32 2
>  %93 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %94 = load <16 x i8> addrspace(2)* %93, !tbaa !0
>  %95 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %94, i32 0, i32 %5)
>  %96 = extractelement <4 x float> %95, i32 0
>  %97 = extractelement <4 x float> %95, i32 1
>  %98 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %99 = load <16 x i8> addrspace(2)* %98, !tbaa !0
>  %100 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %99, i32 0, i32 %5)
>  %101 = extractelement <4 x float> %100, i32 0
>  %102 = extractelement <4 x float> %100, i32 1
>  %103 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %104 = load <16 x i8> addrspace(2)* %103, !tbaa !0
>  %105 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %104, i32 0, i32 %5)
>  %106 = extractelement <4 x float> %105, i32 0
>  %107 = extractelement <4 x float> %105, i32 1
>  %108 = fmul float %90, %14
>  %109 = fadd float %108, %12
>  %110 = fmul float %91, %14
>  %111 = fadd float %110, %12
>  %112 = fmul float %92, %14
>  %113 = fadd float %112, %12
>  %114 = fmul float %90, %12
>  %115 = fadd float %114, %14
>  %116 = fmul float %109, %60
>  %117 = fmul float %111, %62
>  %118 = fadd float %116, %117
>  %119 = fmul float %113, %64
>  %120 = fadd float %118, %119
>  %121 = fmul float %115, %66
>  %122 = fadd float %120, %121
>  %123 = fmul float %109, %68
>  %124 = fmul float %111, %70
>  %125 = fadd float %123, %124
>  %126 = fmul float %113, %72
>  %127 = fadd float %125, %126
>  %128 = fmul float %115, %74
>  %129 = fadd float %127, %128
>  %130 = fmul float %109, %76
>  %131 = fmul float %111, %78
>  %132 = fadd float %130, %131
>  %133 = fmul float %113, %80
>  %134 = fadd float %132, %133
>  %135 = fmul float %115, %82
>  %136 = fadd float %134, %135
>  %137 = fmul float %109, %18
>  %138 = fmul float %111, %20
>  %139 = fadd float %137, %138
>  %140 = fmul float %113, %22
>  %141 = fadd float %139, %140
>  %142 = fmul float %115, %24
>  %143 = fadd float %141, %142
>  %144 = fmul float %109, %26
>  %145 = fmul float %111, %28
>  %146 = fadd float %144, %145
>  %147 = fmul float %113, %30
>  %148 = fadd float %146, %147
>  %149 = fmul float %115, %32
>  %150 = fadd float %148, %149
>  %151 = fmul float %109, %34
>  %152 = fmul float %111, %36
>  %153 = fadd float %151, %152
>  %154 = fmul float %113, %38
>  %155 = fadd float %153, %154
>  %156 = fmul float %115, %40
>  %157 = fadd float %155, %156
>  %158 = fadd float %106, %101
>  %159 = fadd float %107, %102
>  %160 = fmul float %109, %42
>  %161 = fmul float %111, %44
>  %162 = fadd float %160, %161
>  %163 = fmul float %113, %46
>  %164 = fadd float %162, %163
>  %165 = fmul float %115, %48
>  %166 = fadd float %164, %165
>  %167 = fadd float %159, %107
>  %168 = fadd float %158, %106
>  %169 = fmul float %109, %50
>  %170 = fmul float %111, %52
>  %171 = fadd float %169, %170
>  %172 = fmul float %113, %54
>  %173 = fadd float %171, %172
>  %174 = fmul float %115, %56
>  %175 = fadd float %173, %174
>  %176 = fadd float %168, %106
>  %177 = fadd float %167, %107
>  %178 = fmul float %58, %12
>  %179 = fadd float %178, %14
>  %180 = fmul float %58, %12
>  %181 = fadd float %180, %14
>  %182 = fmul float %58, %12
>  %183 = fadd float %182, %14
>  %184 = fmul float %58, %14
>  %185 = fadd float %184, %12
>  %186 = fsub float -0.000000e+00, %166
>  %187 = fmul float %157, %16
>  %188 = fadd float %187, %186
>  %189 = fsub float -0.000000e+00, %150
>  %190 = fmul float %84, %166
>  %191 = fadd float %190, %143
>  %192 = fmul float %86, %166
>  %193 = fadd float %192, %189
>  %194 = call float @llvm.AMDIL.clamp.(float %179, float 0.000000e+00, float 1.000000e+00)
>  %195 = call float @llvm.AMDIL.clamp.(float %181, float 0.000000e+00, float 1.000000e+00)
>  %196 = call float @llvm.AMDIL.clamp.(float %183, float 0.000000e+00, float 1.000000e+00)
>  %197 = call float @llvm.AMDIL.clamp.(float %185, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %194, float %195, float %196, float %197)
>  %198 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %199 = load float addrspace(2)* addrspace(2)* %198, !tbaa !0
>  %200 = getelementptr float addrspace(2)* %199, i32 0
>  %201 = load float addrspace(2)* %200, !tbaa !0
>  %202 = fmul float %201, %143
>  %203 = getelementptr float addrspace(2)* %199, i32 1
>  %204 = load float addrspace(2)* %203, !tbaa !0
>  %205 = fmul float %204, %150
>  %206 = fadd float %202, %205
>  %207 = getelementptr float addrspace(2)* %199, i32 2
>  %208 = load float addrspace(2)* %207, !tbaa !0
>  %209 = fmul float %208, %157
>  %210 = fadd float %206, %209
>  %211 = getelementptr float addrspace(2)* %199, i32 3
>  %212 = load float addrspace(2)* %211, !tbaa !0
>  %213 = fmul float %212, %166
>  %214 = fadd float %210, %213
>  %215 = getelementptr float addrspace(2)* %199, i32 4
>  %216 = load float addrspace(2)* %215, !tbaa !0
>  %217 = fmul float %216, %143
>  %218 = getelementptr float addrspace(2)* %199, i32 5
>  %219 = load float addrspace(2)* %218, !tbaa !0
>  %220 = fmul float %219, %150
>  %221 = fadd float %217, %220
>  %222 = getelementptr float addrspace(2)* %199, i32 6
>  %223 = load float addrspace(2)* %222, !tbaa !0
>  %224 = fmul float %223, %157
>  %225 = fadd float %221, %224
>  %226 = getelementptr float addrspace(2)* %199, i32 7
>  %227 = load float addrspace(2)* %226, !tbaa !0
>  %228 = fmul float %227, %166
>  %229 = fadd float %225, %228
>  %230 = getelementptr float addrspace(2)* %199, i32 8
>  %231 = load float addrspace(2)* %230, !tbaa !0
>  %232 = fmul float %231, %143
>  %233 = getelementptr float addrspace(2)* %199, i32 9
>  %234 = load float addrspace(2)* %233, !tbaa !0
>  %235 = fmul float %234, %150
>  %236 = fadd float %232, %235
>  %237 = getelementptr float addrspace(2)* %199, i32 10
>  %238 = load float addrspace(2)* %237, !tbaa !0
>  %239 = fmul float %238, %157
>  %240 = fadd float %236, %239
>  %241 = getelementptr float addrspace(2)* %199, i32 11
>  %242 = load float addrspace(2)* %241, !tbaa !0
>  %243 = fmul float %242, %166
>  %244 = fadd float %240, %243
>  %245 = getelementptr float addrspace(2)* %199, i32 12
>  %246 = load float addrspace(2)* %245, !tbaa !0
>  %247 = fmul float %246, %143
>  %248 = getelementptr float addrspace(2)* %199, i32 13
>  %249 = load float addrspace(2)* %248, !tbaa !0
>  %250 = fmul float %249, %150
>  %251 = fadd float %247, %250
>  %252 = getelementptr float addrspace(2)* %199, i32 14
>  %253 = load float addrspace(2)* %252, !tbaa !0
>  %254 = fmul float %253, %157
>  %255 = fadd float %251, %254
>  %256 = getelementptr float addrspace(2)* %199, i32 15
>  %257 = load float addrspace(2)* %256, !tbaa !0
>  %258 = fmul float %257, %166
>  %259 = fadd float %255, %258
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %214, float %229, float %244, float %259)
>  %260 = getelementptr float addrspace(2)* %199, i32 16
>  %261 = load float addrspace(2)* %260, !tbaa !0
>  %262 = fmul float %261, %143
>  %263 = getelementptr float addrspace(2)* %199, i32 17
>  %264 = load float addrspace(2)* %263, !tbaa !0
>  %265 = fmul float %264, %150
>  %266 = fadd float %262, %265
>  %267 = getelementptr float addrspace(2)* %199, i32 18
>  %268 = load float addrspace(2)* %267, !tbaa !0
>  %269 = fmul float %268, %157
>  %270 = fadd float %266, %269
>  %271 = getelementptr float addrspace(2)* %199, i32 19
>  %272 = load float addrspace(2)* %271, !tbaa !0
>  %273 = fmul float %272, %166
>  %274 = fadd float %270, %273
>  %275 = getelementptr float addrspace(2)* %199, i32 20
>  %276 = load float addrspace(2)* %275, !tbaa !0
>  %277 = fmul float %276, %143
>  %278 = getelementptr float addrspace(2)* %199, i32 21
>  %279 = load float addrspace(2)* %278, !tbaa !0
>  %280 = fmul float %279, %150
>  %281 = fadd float %277, %280
>  %282 = getelementptr float addrspace(2)* %199, i32 22
>  %283 = load float addrspace(2)* %282, !tbaa !0
>  %284 = fmul float %283, %157
>  %285 = fadd float %281, %284
>  %286 = getelementptr float addrspace(2)* %199, i32 23
>  %287 = load float addrspace(2)* %286, !tbaa !0
>  %288 = fmul float %287, %166
>  %289 = fadd float %285, %288
>  %290 = getelementptr float addrspace(2)* %199, i32 24
>  %291 = load float addrspace(2)* %290, !tbaa !0
>  %292 = fmul float %291, %143
>  %293 = getelementptr float addrspace(2)* %199, i32 25
>  %294 = load float addrspace(2)* %293, !tbaa !0
>  %295 = fmul float %294, %150
>  %296 = fadd float %292, %295
>  %297 = getelementptr float addrspace(2)* %199, i32 26
>  %298 = load float addrspace(2)* %297, !tbaa !0
>  %299 = fmul float %298, %157
>  %300 = fadd float %296, %299
>  %301 = getelementptr float addrspace(2)* %199, i32 27
>  %302 = load float addrspace(2)* %301, !tbaa !0
>  %303 = fmul float %302, %166
>  %304 = fadd float %300, %303
>  %305 = getelementptr float addrspace(2)* %199, i32 28
>  %306 = load float addrspace(2)* %305, !tbaa !0
>  %307 = fmul float %306, %143
>  %308 = getelementptr float addrspace(2)* %199, i32 29
>  %309 = load float addrspace(2)* %308, !tbaa !0
>  %310 = fmul float %309, %150
>  %311 = fadd float %307, %310
>  %312 = getelementptr float addrspace(2)* %199, i32 30
>  %313 = load float addrspace(2)* %312, !tbaa !0
>  %314 = fmul float %313, %157
>  %315 = fadd float %311, %314
>  %316 = getelementptr float addrspace(2)* %199, i32 31
>  %317 = load float addrspace(2)* %316, !tbaa !0
>  %318 = fmul float %317, %166
>  %319 = fadd float %315, %318
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %274, float %289, float %304, float %319)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %96, float %97, float %113, float %115)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %122, float %129, float %136, float %175)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %158, float %159, float %167, float %168)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %176, float %177, float %96, float %97)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %191, float %193, float %188, float %166)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>c0410100
>bf8c007f
>c00403bf
>c0020300
>bf8c007f
>7e040204
>c0028301
>bf8c007f
>7e020205
>d2820003
>040a0208
>d2060803
>02010103
>d2820004
>04060408
>d2060804
>02010104
>f800020f
>03040404
>c0840700
>bf8c000f
>e00c2000
>80020600
>bf8c0770
>d2820003
>04080b06
>d2820004
>04080b07
>c0040311
>bf8c007f
>100a0808
>c0040310
>bf8c007f
>d282000a
>04141103
>d2820005
>04080b08
>c0028312
>bf8c007f
>d2820002
>04280b05
>d2820006
>04040906
>c0020313
>bf8c007f
>d2820001
>04080906
>c0020315
>bf8c007f
>10040804
>c0020314
>bf8c007f
>d2820002
>04080903
>c0020316
>bf8c007f
>d2820002
>04080905
>c0020317
>bf8c007f
>d2820002
>04080906
>c0400102
>bf8c007f
>c002010d
>bf8c007f
>100e0404
>c002010c
>bf8c007f
>d2820008
>041e0204
>c0020319
>bf8c007f
>100e0804
>c0020318
>bf8c007f
>d2820007
>041c0903
>c002031a
>bf8c007f
>d2820007
>041c0905
>c002031b
>bf8c007f
>d2820007
>041c0906
>c002010e
>bf8c007f
>d2820009
>04220e04
>c002031d
>bf8c007f
>10100804
>c002031c
>bf8c007f
>d2820008
>04200903
>c002031e
>bf8c007f
>d2820008
>04200905
>c002031f
>bf8c007f
>d2820008
>04200906
>c002010f
>bf8c007f
>d2820009
>04261004
>c0020109
>bf8c007f
>10140404
>c0020108
>bf8c007f
>d282000a
>042a0204
>c002010a
>bf8c007f
>d282000a
>042a0e04
>c002010b
>bf8c007f
>d282000a
>042a1004
>c0020105
>bf8c007f
>10160404
>c0020104
>bf8c007f
>d282000b
>042e0204
>c0020106
>bf8c007f
>d282000b
>042e0e04
>c0020107
>bf8c007f
>d282000b
>042e1004
>c0020101
>bf8c007f
>10180404
>c0020100
>bf8c007f
>d282000c
>04320204
>c0020102
>bf8c007f
>d282000c
>04320e04
>c0020103
>bf8c007f
>d282000c
>04321004
>f80000ef
>090a0b0c
>c002011d
>bf8c000f
>10120404
>c002011c
>bf8c007f
>d2820009
>04260204
>c002011e
>bf8c007f
>d2820009
>04260e04
>c002011f
>bf8c007f
>d2820009
>04261004
>c0020119
>bf8c007f
>10140404
>c0020118
>bf8c007f
>d282000a
>042a0204
>c002011a
>bf8c007f
>d282000a
>042a0e04
>c002011b
>bf8c007f
>d282000a
>042a1004
>c0020115
>bf8c007f
>10160404
>c0020114
>bf8c007f
>d282000b
>042e0204
>c0020116
>bf8c007f
>d282000b
>042e0e04
>c0020117
>bf8c007f
>d282000b
>042e1004
>c0020111
>bf8c007f
>10180404
>c0020110
>bf8c007f
>d282000c
>04320204
>c0020112
>bf8c007f
>d282000c
>04320e04
>c0000113
>bf8c007f
>d282000c
>04321000
>f80000ff
>090a0b0c
>c0840704
>bf8c000f
>e00c2000
>80020900
>bf8c0770
>f800021f
>06050a09
>c0000331
>bf8c000f
>101a0800
>c0000330
>bf8c007f
>d282000d
>04340103
>c0000332
>bf8c007f
>d282000d
>04340105
>c0000333
>bf8c007f
>d282000d
>04340106
>c00003c9
>bf8c007f
>101c0800
>c00003c8
>bf8c007f
>d282000e
>04380103
>c00003ca
>bf8c007f
>d282000e
>04380105
>c00003cb
>bf8c007f
>d282000e
>04380106
>c00003c5
>bf8c007f
>101e0800
>c00003c4
>bf8c007f
>d282000f
>043c0103
>c00003c6
>bf8c007f
>d282000f
>043c0105
>c00003c7
>bf8c007f
>d282000f
>043c0106
>c00003c1
>bf8c007f
>10080800
>c00003c0
>bf8c007f
>d2820003
>04100103
>c00003c2
>bf8c007f
>d2820003
>040c0105
>c00003c3
>bf8c007f
>d2820003
>040c0106
>f800022f
>0d0e0f03
>c0840708
>bf8c000f
>e00c2000
>80020d00
>c082070c
>bf8c0070
>e00c2000
>80010300
>bf8c0770
>06221b03
>06000711
>061a1d04
>061c090d
>f800023f
>000e0d11
>bf8c070f
>061a090e
>06000700
>f800024f
>0a090d00
>c00003cc
>bf8c000f
>d2820000
>04061000
>c0000302
>bf8c007f
>10020e00
>08021101
>c00003cd
>bf8c007f
>10061000
>08040503
>f80008cf
>08010200
>bf810000
>FRAG
>DCL IN[0], COLOR, COLOR
>DCL IN[1], GENERIC[19], PERSPECTIVE
>DCL IN[2], GENERIC[20], PERSPECTIVE
>DCL IN[3], GENERIC[21], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL CONST[0..30]
>DCL TEMP[0..3], LOCAL
>DCL TEMP[4], ARRAY(1), LOCAL
>  0: MOV TEMP[0].xy, IN[1].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MOV TEMP[1].xy, IN[3].xyyy
>  3: TEX TEMP[2].xyz, TEMP[1], SAMP[1], 2D
>  4: MUL TEMP[2].xyz, TEMP[2].xyzz, CONST[12].xyzz
>  5: MAD TEMP[3].x, IN[2].wwww, CONST[11].wwww, -CONST[11].xxxx
>  6: MUL TEMP[1].xyz, TEMP[0].xyzz, IN[0].xyzz
>  7: MIN TEMP[3].x, TEMP[3].xxxx, CONST[11].zzzz
>  8: MOV_SAT TEMP[3].x, TEMP[3].xxxx
>  9: MUL TEMP[1].xyz, TEMP[2].xyzz, TEMP[1].xyzz
> 10: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[3].xxxx
> 11: MAD TEMP[2].xyz, TEMP[1].xyzz, -CONST[30].xxxx, CONST[29].xyzz
> 12: MUL TEMP[2].xyz, TEMP[3].xxxx, TEMP[2].xyzz
> 13: MUL TEMP[3].x, IN[0].wwww, CONST[12].wwww
> 14: MAD TEMP[1].xyz, TEMP[1].xyzz, CONST[30].xxxx, TEMP[2].xyzz
> 15: MUL TEMP[0].x, TEMP[0].wwww, TEMP[3].xxxx
> 16: MOV TEMP[1].w, TEMP[0].xxxx
> 17: MOV TEMP[4], TEMP[1]
> 18: MOV OUT[0], TEMP[4]
> 19: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 44
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 46
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 47
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 48
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 49
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 50
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 51
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 116
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 117
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 118
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 120
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %45 = load <32 x i8> addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %47 = load <16 x i8> addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr <32 x i8> addrspace(2)* %2, i32 1
>  %49 = load <32 x i8> addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr <16 x i8> addrspace(2)* %1, i32 1
>  %51 = load <16 x i8> addrspace(2)* %50, !tbaa !0
>  %52 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %53 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %54 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %3, <2 x i32> %5)
>  %55 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %3, <2 x i32> %5)
>  %56 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %57 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %58 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %3, <2 x i32> %5)
>  %59 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %3, <2 x i32> %6)
>  %60 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %3, <2 x i32> %6)
>  %61 = bitcast float %56 to i32
>  %62 = bitcast float %57 to i32
>  %63 = insertelement <2 x i32> undef, i32 %61, i32 0
>  %64 = insertelement <2 x i32> %63, i32 %62, i32 1
>  %65 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %64, <32 x i8> %45, <16 x i8> %47, i32 2)
>  %66 = extractelement <4 x float> %65, i32 0
>  %67 = extractelement <4 x float> %65, i32 1
>  %68 = extractelement <4 x float> %65, i32 2
>  %69 = extractelement <4 x float> %65, i32 3
>  %70 = bitcast float %59 to i32
>  %71 = bitcast float %60 to i32
>  %72 = insertelement <2 x i32> undef, i32 %70, i32 0
>  %73 = insertelement <2 x i32> %72, i32 %71, i32 1
>  %74 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %73, <32 x i8> %49, <16 x i8> %51, i32 2)
>  %75 = extractelement <4 x float> %74, i32 0
>  %76 = extractelement <4 x float> %74, i32 1
>  %77 = extractelement <4 x float> %74, i32 2
>  %78 = fmul float %75, %29
>  %79 = fmul float %76, %31
>  %80 = fmul float %77, %33
>  %81 = fsub float -0.000000e+00, %23
>  %82 = fmul float %58, %27
>  %83 = fadd float %82, %81
>  %84 = fmul float %66, %52
>  %85 = fmul float %67, %53
>  %86 = fmul float %68, %54
>  %87 = fcmp uge float %83, %25
>  %88 = select i1 %87, float %25, float %83
>  %89 = call float @llvm.AMDIL.clamp.(float %88, float 0.000000e+00, float 1.000000e+00)
>  %90 = fmul float %78, %84
>  %91 = fmul float %79, %85
>  %92 = fmul float %80, %86
>  %93 = fmul float %89, %89
>  %94 = fsub float -0.000000e+00, %43
>  %95 = fmul float %90, %94
>  %96 = fadd float %95, %37
>  %97 = fsub float -0.000000e+00, %43
>  %98 = fmul float %91, %97
>  %99 = fadd float %98, %39
>  %100 = fsub float -0.000000e+00, %43
>  %101 = fmul float %92, %100
>  %102 = fadd float %101, %41
>  %103 = fmul float %93, %96
>  %104 = fmul float %93, %99
>  %105 = fmul float %93, %102
>  %106 = fmul float %55, %35
>  %107 = fmul float %90, %43
>  %108 = fadd float %107, %103
>  %109 = fmul float %91, %43
>  %110 = fadd float %109, %104
>  %111 = fmul float %92, %43
>  %112 = fadd float %111, %105
>  %113 = fmul float %69, %106
>  %114 = fcmp uge float %113, 0x3FD6565660000000
>  %115 = sext i1 %114 to i32
>  %116 = trunc i32 %115 to i1
>  %117 = select i1 %116, float 1.000000e+00, float -1.000000e+00
>  call void @llvm.AMDGPU.kill(float %117)
>  %118 = call i32 @llvm.SI.packf16(float %108, float %110)
>  %119 = bitcast i32 %118 to float
>  %120 = call i32 @llvm.SI.packf16(float %112, float %113)
>  %121 = bitcast i32 %120 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %119, float %121, float %119, float %121)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.AMDGPU.kill(float)
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8140500
>c8150501
>c8100400
>c8110401
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430404
>c8200300
>c8210301
>c0400100
>bf8c0070
>c0038133
>bf8c007f
>10101007
>10101107
>7e1202ff
>3eb2b2b3
>d00c0008
>02021308
>d2000009
>0021e4f3
>7c261280
>c8240100
>c8250101
>10181305
>c8280d02
>c8290d03
>c8240c02
>c8250c03
>c0840304
>c0c60508
>bf8c007f
>f0800700
>00430909
>c0010131
>bf8c0070
>10041402
>10061902
>c0010178
>bf8c007f
>10040602
>c0018175
>bf8c007f
>08180403
>c8080b00
>c8090b01
>c001812f
>bf8c007f
>10040403
>c001812c
>bf8c007f
>0a040403
>c001812e
>bf8c007f
>d00c0004
>02000702
>7e1a0203
>d2000002
>00121b02
>d2060802
>02010102
>10040502
>10181902
>d2820003
>04300503
>c8300000
>c8310001
>10181904
>c0018130
>bf8c007f
>101a1203
>1018190d
>101a1802
>c0018174
>bf8c007f
>081a1a03
>101a1b02
>d282000c
>0434050c
>5e06070c
>c8300200
>c8310201
>10001906
>c0018132
>bf8c007f
>10021603
>10000101
>10020002
>c0000176
>bf8c007f
>08020200
>10020302
>d2820000
>04040500
>5e001100
>f8001c0f
>00030003
>bf810000
>FRAG
>DCL IN[0], GENERIC[19], PERSPECTIVE
>DCL IN[1], GENERIC[20], PERSPECTIVE
>DCL IN[2], GENERIC[21], PERSPECTIVE
>DCL IN[3], GENERIC[22], PERSPECTIVE
>DCL IN[4], GENERIC[23], PERSPECTIVE
>DCL IN[5], GENERIC[24], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL CONST[0..30]
>DCL TEMP[0..17], LOCAL
>DCL TEMP[18], ARRAY(1), LOCAL
>IMM[0] FLT32 {    0.0000,     1.0000,     0.5000,    -0.5000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: ADD TEMP[1].xyz, -IN[4].xyzz, CONST[23].xyzz
>  3: DP3 TEMP[2].x, IN[2].xyzz, IN[2].xyzz
>  4: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[1].xyzz
>  5: RSQ TEMP[3].x, TEMP[3].xxxx
>  6: MUL TEMP[3].xyz, TEMP[1].xyzz, TEMP[3].xxxx
>  7: RSQ TEMP[4].x, TEMP[2].xxxx
>  8: MUL TEMP[1].xyz, TEMP[4].xxxx, IN[2].xyzz
>  9: DP3 TEMP[5].x, IN[3].xyzz, IN[3].xyzz
> 10: RSQ TEMP[5].x, TEMP[5].xxxx
> 11: MUL TEMP[5].xyz, IN[3].xyzz, TEMP[5].xxxx
> 12: DP3 TEMP[6].x, TEMP[5].xyzz, TEMP[1].xyzz
> 13: MUL TEMP[1].xyz, TEMP[5].xyzz, TEMP[6].xxxx
> 14: ADD TEMP[1].xyz, TEMP[1].xyzz, TEMP[1].xyzz
> 15: MAD TEMP[7].xyz, IN[2].xyzz, -TEMP[4].xxxx, TEMP[1].xyzz
> 16: DP3 TEMP[1].x, TEMP[7].xyzz, TEMP[3].xyzz
> 17: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 18: MAX TEMP[8].x, CONST[11].wwww, IMM[0].xxxx
> 19: DP3 TEMP[9].x, TEMP[5].xyzz, TEMP[3].xyzz
> 20: POW TEMP[10].x, TEMP[1].xxxx, TEMP[8].xxxx
> 21: MOV_SAT TEMP[11].x, TEMP[9].xxxx
> 22: MUL TEMP[10].x, TEMP[10].xxxx, TEMP[11].xxxx
> 23: MUL TEMP[2].xyz, IN[1].yyyy, CONST[22].xyzz
> 24: MUL TEMP[3].xyz, TEMP[10].xxxx, TEMP[2].xyzz
> 25: ADD TEMP[10].xyz, -IN[4].xyzz, CONST[21].xyzz
> 26: DP3 TEMP[11].x, TEMP[10].xyzz, TEMP[10].xyzz
> 27: RSQ TEMP[11].x, TEMP[11].xxxx
> 28: MUL TEMP[1].xyz, TEMP[10].xyzz, TEMP[11].xxxx
> 29: DP3 TEMP[11].x, TEMP[7].xyzz, TEMP[1].xyzz
> 30: MOV_SAT TEMP[11].x, TEMP[11].xxxx
> 31: DP3 TEMP[12].x, TEMP[5].xyzz, TEMP[1].xyzz
> 32: MUL TEMP[10].xyz, IN[1].xxxx, CONST[20].xyzz
> 33: POW TEMP[13].x, TEMP[11].xxxx, TEMP[8].xxxx
> 34: ADD TEMP[11].xyz, -IN[4].xyzz, CONST[25].xyzz
> 35: DP3 TEMP[14].x, TEMP[11].xyzz, TEMP[11].xyzz
> 36: RSQ TEMP[14].x, TEMP[14].xxxx
> 37: MUL TEMP[1].xyz, TEMP[11].xyzz, TEMP[14].xxxx
> 38: MOV_SAT TEMP[14].x, TEMP[12].xxxx
> 39: MUL TEMP[13].x, TEMP[13].xxxx, TEMP[14].xxxx
> 40: DP3 TEMP[7].x, TEMP[7].xyzz, TEMP[1].xyzz
> 41: MOV_SAT TEMP[7].x, TEMP[7].xxxx
> 42: DP3 TEMP[14].x, TEMP[5].xyzz, TEMP[1].xyzz
> 43: POW TEMP[8].x, TEMP[7].xxxx, TEMP[8].xxxx
> 44: MAD TEMP[3].xyz, TEMP[13].xxxx, TEMP[10].xyzz, TEMP[3].xyzz
> 45: MOV_SAT TEMP[13].x, TEMP[14].xxxx
> 46: MUL TEMP[8].x, TEMP[8].xxxx, TEMP[13].xxxx
> 47: MUL TEMP[1].xyz, IN[1].zzzz, CONST[24].xyzz
> 48: MAD TEMP[3].xyz, TEMP[8].xxxx, TEMP[1].xyzz, TEMP[3].xyzz
> 49: MUL TEMP[11].xyz, TEMP[5].xyzz, TEMP[5].xyzz
> 50: ADD TEMP[6].x, -TEMP[6].xxxx, IMM[0].yyyy
> 51: MOV_SAT TEMP[6].x, TEMP[6].xxxx
> 52: SGE TEMP[8].x, TEMP[5].xxxx, IMM[0].xxxx
> 53: F2I TEMP[8].x, -TEMP[8]
> 54: UIF TEMP[8].xxxx :0
> 55:   MOV TEMP[8].x, IMM[0].xxxx
> 56: ELSE :0
> 57:   MOV TEMP[8].x, TEMP[11].xxxx
> 58: ENDIF
> 59: SGE TEMP[13].x, TEMP[5].yyyy, IMM[0].xxxx
> 60: F2I TEMP[13].x, -TEMP[13]
> 61: UIF TEMP[13].xxxx :0
> 62:   MOV TEMP[13].x, IMM[0].xxxx
> 63: ELSE :0
> 64:   MOV TEMP[13].x, TEMP[11].yyyy
> 65: ENDIF
> 66: SGE TEMP[15].x, TEMP[5].zzzz, IMM[0].xxxx
> 67: F2I TEMP[15].x, -TEMP[15]
> 68: UIF TEMP[15].xxxx :0
> 69:   MOV TEMP[15].x, IMM[0].xxxx
> 70: ELSE :0
> 71:   MOV TEMP[15].x, TEMP[11].zzzz
> 72: ENDIF
> 73: MAD TEMP[9].x, TEMP[9].xxxx, IMM[0].zzzz, IMM[0].zzzz
> 74: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 75: SGE TEMP[16].x, TEMP[5].xxxx, IMM[0].xxxx
> 76: F2I TEMP[16].x, -TEMP[16]
> 77: UIF TEMP[16].xxxx :0
> 78:   MOV TEMP[16].x, TEMP[11].xxxx
> 79: ELSE :0
> 80:   MOV TEMP[16].x, IMM[0].xxxx
> 81: ENDIF
> 82: SGE TEMP[17].x, TEMP[5].yyyy, IMM[0].xxxx
> 83: F2I TEMP[17].x, -TEMP[17]
> 84: UIF TEMP[17].xxxx :0
> 85:   MOV TEMP[17].x, TEMP[11].yyyy
> 86: ELSE :0
> 87:   MOV TEMP[17].x, IMM[0].xxxx
> 88: ENDIF
> 89: SGE TEMP[5].x, TEMP[5].zzzz, IMM[0].xxxx
> 90: F2I TEMP[5].x, -TEMP[5]
> 91: UIF TEMP[5].xxxx :0
> 92:   MOV TEMP[5].x, TEMP[11].zzzz
> 93: ELSE :0
> 94:   MOV TEMP[5].x, IMM[0].xxxx
> 95: ENDIF
> 96: MAD TEMP[12].x, TEMP[12].xxxx, IMM[0].zzzz, IMM[0].zzzz
> 97: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 98: MUL TEMP[11].xyz, TEMP[8].xxxx, CONST[5].xyzz
> 99: MAD TEMP[8].x, TEMP[14].xxxx, IMM[0].zzzz, IMM[0].zzzz
>100: MOV_SAT TEMP[8].x, TEMP[8].xxxx
>101: MAD TEMP[11].xyz, TEMP[16].xxxx, CONST[4].xyzz, TEMP[11].xyzz
>102: MAD TEMP[11].xyz, TEMP[17].xxxx, CONST[6].xyzz, TEMP[11].xyzz
>103: MUL TEMP[12].x, TEMP[12].xxxx, TEMP[12].xxxx
>104: MAD TEMP[11].xyz, TEMP[13].xxxx, CONST[7].xyzz, TEMP[11].xyzz
>105: MUL TEMP[9].x, TEMP[9].xxxx, TEMP[9].xxxx
>106: MAD TEMP[4].xyz, TEMP[5].xxxx, CONST[8].xyzz, TEMP[11].xyzz
>107: MUL TEMP[5].x, TEMP[8].xxxx, TEMP[8].xxxx
>108: MAD TEMP[7].xyz, TEMP[15].xxxx, CONST[9].xyzz, TEMP[4].xyzz
>109: MAD TEMP[4].x, TEMP[6].xxxx, TEMP[6].xxxx, IMM[0].wwww
>110: MAD TEMP[10].xyz, TEMP[10].xyzz, TEMP[12].xxxx, TEMP[7].xyzz
>111: SGE TEMP[6].x, TEMP[4].xxxx, IMM[0].xxxx
>112: F2I TEMP[6].x, -TEMP[6]
>113: UIF TEMP[6].xxxx :0
>114:   MOV TEMP[6].x, CONST[19].zzzz
>115: ELSE :0
>116:   MOV TEMP[6].x, CONST[19].xxxx
>117: ENDIF
>118: MAD TEMP[2].xyz, TEMP[2].xyzz, TEMP[9].xxxx, TEMP[10].xyzz
>119: MAD TEMP[4].x, TEMP[6].xxxx, TEMP[4].xxxx, CONST[19].yyyy
>120: MAD TEMP[1].xyz, TEMP[1].xyzz, TEMP[5].xxxx, TEMP[2].xyzz
>121: MUL TEMP[2].x, TEMP[0].wwww, TEMP[4].xxxx
>122: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[1].xyzz
>123: MUL TEMP[2].x, TEMP[2].xxxx, CONST[19].wwww
>124: MUL TEMP[0].xyz, TEMP[1].xyzz, TEMP[0].xyzz
>125: MAD TEMP[1].x, IN[5].zzzz, CONST[12].wwww, -CONST[12].xxxx
>126: MAD TEMP[0].xyz, TEMP[3].xyzz, TEMP[2].xxxx, TEMP[0].xyzz
>127: MIN TEMP[1].x, TEMP[1].xxxx, CONST[12].zzzz
>128: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>129: MAD TEMP[3].xyz, TEMP[0].xyzz, -CONST[30].xxxx, CONST[29].xyzz
>130: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
>131: MUL TEMP[3].xyz, TEMP[3].xyzz, TEMP[1].xxxx
>132: MAD TEMP[0].xyz, TEMP[0].xyzz, CONST[30].xxxx, TEMP[3].xyzz
>133: MUL TEMP[1].x, IN[5].zzzz, CONST[29].wwww
>134: MOV TEMP[0].w, TEMP[1].xxxx
>135: MOV TEMP[18], TEMP[0]
>136: MOV OUT[0], TEMP[18]
>137: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %21 = load float addrspace(2)* addrspace(2)* %20, !tbaa !0
>  %22 = getelementptr float addrspace(2)* %21, i32 4
>  %23 = load float addrspace(2)* %22, !tbaa !0
>  %24 = getelementptr float addrspace(2)* %21, i32 5
>  %25 = load float addrspace(2)* %24, !tbaa !0
>  %26 = getelementptr float addrspace(2)* %21, i32 6
>  %27 = load float addrspace(2)* %26, !tbaa !0
>  %28 = getelementptr float addrspace(2)* %21, i32 16
>  %29 = load float addrspace(2)* %28, !tbaa !0
>  %30 = getelementptr float addrspace(2)* %21, i32 17
>  %31 = load float addrspace(2)* %30, !tbaa !0
>  %32 = getelementptr float addrspace(2)* %21, i32 18
>  %33 = load float addrspace(2)* %32, !tbaa !0
>  %34 = getelementptr float addrspace(2)* %21, i32 20
>  %35 = load float addrspace(2)* %34, !tbaa !0
>  %36 = getelementptr float addrspace(2)* %21, i32 21
>  %37 = load float addrspace(2)* %36, !tbaa !0
>  %38 = getelementptr float addrspace(2)* %21, i32 22
>  %39 = load float addrspace(2)* %38, !tbaa !0
>  %40 = getelementptr float addrspace(2)* %21, i32 24
>  %41 = load float addrspace(2)* %40, !tbaa !0
>  %42 = getelementptr float addrspace(2)* %21, i32 25
>  %43 = load float addrspace(2)* %42, !tbaa !0
>  %44 = getelementptr float addrspace(2)* %21, i32 26
>  %45 = load float addrspace(2)* %44, !tbaa !0
>  %46 = getelementptr float addrspace(2)* %21, i32 28
>  %47 = load float addrspace(2)* %46, !tbaa !0
>  %48 = getelementptr float addrspace(2)* %21, i32 29
>  %49 = load float addrspace(2)* %48, !tbaa !0
>  %50 = getelementptr float addrspace(2)* %21, i32 30
>  %51 = load float addrspace(2)* %50, !tbaa !0
>  %52 = getelementptr float addrspace(2)* %21, i32 32
>  %53 = load float addrspace(2)* %52, !tbaa !0
>  %54 = getelementptr float addrspace(2)* %21, i32 33
>  %55 = load float addrspace(2)* %54, !tbaa !0
>  %56 = getelementptr float addrspace(2)* %21, i32 34
>  %57 = load float addrspace(2)* %56, !tbaa !0
>  %58 = getelementptr float addrspace(2)* %21, i32 36
>  %59 = load float addrspace(2)* %58, !tbaa !0
>  %60 = getelementptr float addrspace(2)* %21, i32 37
>  %61 = load float addrspace(2)* %60, !tbaa !0
>  %62 = getelementptr float addrspace(2)* %21, i32 38
>  %63 = load float addrspace(2)* %62, !tbaa !0
>  %64 = getelementptr float addrspace(2)* %21, i32 47
>  %65 = load float addrspace(2)* %64, !tbaa !0
>  %66 = getelementptr float addrspace(2)* %21, i32 48
>  %67 = load float addrspace(2)* %66, !tbaa !0
>  %68 = getelementptr float addrspace(2)* %21, i32 50
>  %69 = load float addrspace(2)* %68, !tbaa !0
>  %70 = getelementptr float addrspace(2)* %21, i32 51
>  %71 = load float addrspace(2)* %70, !tbaa !0
>  %72 = getelementptr float addrspace(2)* %21, i32 76
>  %73 = load float addrspace(2)* %72, !tbaa !0
>  %74 = getelementptr float addrspace(2)* %21, i32 77
>  %75 = load float addrspace(2)* %74, !tbaa !0
>  %76 = getelementptr float addrspace(2)* %21, i32 78
>  %77 = load float addrspace(2)* %76, !tbaa !0
>  %78 = getelementptr float addrspace(2)* %21, i32 79
>  %79 = load float addrspace(2)* %78, !tbaa !0
>  %80 = getelementptr float addrspace(2)* %21, i32 80
>  %81 = load float addrspace(2)* %80, !tbaa !0
>  %82 = getelementptr float addrspace(2)* %21, i32 81
>  %83 = load float addrspace(2)* %82, !tbaa !0
>  %84 = getelementptr float addrspace(2)* %21, i32 82
>  %85 = load float addrspace(2)* %84, !tbaa !0
>  %86 = getelementptr float addrspace(2)* %21, i32 84
>  %87 = load float addrspace(2)* %86, !tbaa !0
>  %88 = getelementptr float addrspace(2)* %21, i32 85
>  %89 = load float addrspace(2)* %88, !tbaa !0
>  %90 = getelementptr float addrspace(2)* %21, i32 86
>  %91 = load float addrspace(2)* %90, !tbaa !0
>  %92 = getelementptr float addrspace(2)* %21, i32 88
>  %93 = load float addrspace(2)* %92, !tbaa !0
>  %94 = getelementptr float addrspace(2)* %21, i32 89
>  %95 = load float addrspace(2)* %94, !tbaa !0
>  %96 = getelementptr float addrspace(2)* %21, i32 90
>  %97 = load float addrspace(2)* %96, !tbaa !0
>  %98 = getelementptr float addrspace(2)* %21, i32 92
>  %99 = load float addrspace(2)* %98, !tbaa !0
>  %100 = getelementptr float addrspace(2)* %21, i32 93
>  %101 = load float addrspace(2)* %100, !tbaa !0
>  %102 = getelementptr float addrspace(2)* %21, i32 94
>  %103 = load float addrspace(2)* %102, !tbaa !0
>  %104 = getelementptr float addrspace(2)* %21, i32 96
>  %105 = load float addrspace(2)* %104, !tbaa !0
>  %106 = getelementptr float addrspace(2)* %21, i32 97
>  %107 = load float addrspace(2)* %106, !tbaa !0
>  %108 = getelementptr float addrspace(2)* %21, i32 98
>  %109 = load float addrspace(2)* %108, !tbaa !0
>  %110 = getelementptr float addrspace(2)* %21, i32 100
>  %111 = load float addrspace(2)* %110, !tbaa !0
>  %112 = getelementptr float addrspace(2)* %21, i32 101
>  %113 = load float addrspace(2)* %112, !tbaa !0
>  %114 = getelementptr float addrspace(2)* %21, i32 102
>  %115 = load float addrspace(2)* %114, !tbaa !0
>  %116 = getelementptr float addrspace(2)* %21, i32 116
>  %117 = load float addrspace(2)* %116, !tbaa !0
>  %118 = getelementptr float addrspace(2)* %21, i32 117
>  %119 = load float addrspace(2)* %118, !tbaa !0
>  %120 = getelementptr float addrspace(2)* %21, i32 118
>  %121 = load float addrspace(2)* %120, !tbaa !0
>  %122 = getelementptr float addrspace(2)* %21, i32 119
>  %123 = load float addrspace(2)* %122, !tbaa !0
>  %124 = getelementptr float addrspace(2)* %21, i32 120
>  %125 = load float addrspace(2)* %124, !tbaa !0
>  %126 = getelementptr <32 x i8> addrspace(2)* %2, i32 0
>  %127 = load <32 x i8> addrspace(2)* %126, !tbaa !0
>  %128 = getelementptr <16 x i8> addrspace(2)* %1, i32 0
>  %129 = load <16 x i8> addrspace(2)* %128, !tbaa !0
>  %130 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5)
>  %131 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5)
>  %132 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %3, <2 x i32> %5)
>  %133 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %3, <2 x i32> %5)
>  %134 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %3, <2 x i32> %5)
>  %135 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %3, <2 x i32> %5)
>  %136 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %3, <2 x i32> %5)
>  %137 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %3, <2 x i32> %5)
>  %138 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %3, <2 x i32> %5)
>  %139 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %3, <2 x i32> %5)
>  %140 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %3, <2 x i32> %5)
>  %141 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %3, <2 x i32> %5)
>  %142 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %3, <2 x i32> %5)
>  %143 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %3, <2 x i32> %5)
>  %144 = call float @llvm.SI.fs.interp(i32 2, i32 5, i32 %3, <2 x i32> %5)
>  %145 = bitcast float %130 to i32
>  %146 = bitcast float %131 to i32
>  %147 = insertelement <2 x i32> undef, i32 %145, i32 0
>  %148 = insertelement <2 x i32> %147, i32 %146, i32 1
>  %149 = call <4 x float> @llvm.SI.sample.v2i32(<2 x i32> %148, <32 x i8> %127, <16 x i8> %129, i32 2)
>  %150 = extractelement <4 x float> %149, i32 0
>  %151 = extractelement <4 x float> %149, i32 1
>  %152 = extractelement <4 x float> %149, i32 2
>  %153 = extractelement <4 x float> %149, i32 3
>  %154 = fsub float -0.000000e+00, %141
>  %155 = fadd float %154, %99
>  %156 = fsub float -0.000000e+00, %142
>  %157 = fadd float %156, %101
>  %158 = fsub float -0.000000e+00, %143
>  %159 = fadd float %158, %103
>  %160 = fmul float %135, %135
>  %161 = fmul float %136, %136
>  %162 = fadd float %161, %160
>  %163 = fmul float %137, %137
>  %164 = fadd float %162, %163
>  %165 = fmul float %155, %155
>  %166 = fmul float %157, %157
>  %167 = fadd float %166, %165
>  %168 = fmul float %159, %159
>  %169 = fadd float %167, %168
>  %170 = call float @llvm.AMDGPU.rsq(float %169)
>  %171 = fmul float %155, %170
>  %172 = fmul float %157, %170
>  %173 = fmul float %159, %170
>  %174 = call float @llvm.AMDGPU.rsq(float %164)
>  %175 = fmul float %174, %135
>  %176 = fmul float %174, %136
>  %177 = fmul float %174, %137
>  %178 = fmul float %138, %138
>  %179 = fmul float %139, %139
>  %180 = fadd float %179, %178
>  %181 = fmul float %140, %140
>  %182 = fadd float %180, %181
>  %183 = call float @llvm.AMDGPU.rsq(float %182)
>  %184 = fmul float %138, %183
>  %185 = fmul float %139, %183
>  %186 = fmul float %140, %183
>  %187 = fmul float %184, %175
>  %188 = fmul float %185, %176
>  %189 = fadd float %188, %187
>  %190 = fmul float %186, %177
>  %191 = fadd float %189, %190
>  %192 = fmul float %184, %191
>  %193 = fmul float %185, %191
>  %194 = fmul float %186, %191
>  %195 = fadd float %192, %192
>  %196 = fadd float %193, %193
>  %197 = fadd float %194, %194
>  %198 = fsub float -0.000000e+00, %174
>  %199 = fmul float %135, %198
>  %200 = fadd float %199, %195
>  %201 = fsub float -0.000000e+00, %174
>  %202 = fmul float %136, %201
>  %203 = fadd float %202, %196
>  %204 = fsub float -0.000000e+00, %174
>  %205 = fmul float %137, %204
>  %206 = fadd float %205, %197
>  %207 = fmul float %200, %171
>  %208 = fmul float %203, %172
>  %209 = fadd float %208, %207
>  %210 = fmul float %206, %173
>  %211 = fadd float %209, %210
>  %212 = call float @llvm.AMDIL.clamp.(float %211, float 0.000000e+00, float 1.000000e+00)
>  %213 = fcmp uge float %65, 0.000000e+00
>  %214 = select i1 %213, float %65, float 0.000000e+00
>  %215 = fmul float %184, %171
>  %216 = fmul float %185, %172
>  %217 = fadd float %216, %215
>  %218 = fmul float %186, %173
>  %219 = fadd float %217, %218
>  %220 = call float @llvm.pow.f32(float %212, float %214)
>  %221 = call float @llvm.AMDIL.clamp.(float %219, float 0.000000e+00, float 1.000000e+00)
>  %222 = fmul float %220, %221
>  %223 = fmul float %133, %93
>  %224 = fmul float %133, %95
>  %225 = fmul float %133, %97
>  %226 = fmul float %222, %223
>  %227 = fmul float %222, %224
>  %228 = fmul float %222, %225
>  %229 = fsub float -0.000000e+00, %141
>  %230 = fadd float %229, %87
>  %231 = fsub float -0.000000e+00, %142
>  %232 = fadd float %231, %89
>  %233 = fsub float -0.000000e+00, %143
>  %234 = fadd float %233, %91
>  %235 = fmul float %230, %230
>  %236 = fmul float %232, %232
>  %237 = fadd float %236, %235
>  %238 = fmul float %234, %234
>  %239 = fadd float %237, %238
>  %240 = call float @llvm.AMDGPU.rsq(float %239)
>  %241 = fmul float %230, %240
>  %242 = fmul float %232, %240
>  %243 = fmul float %234, %240
>  %244 = fmul float %200, %241
>  %245 = fmul float %203, %242
>  %246 = fadd float %245, %244
>  %247 = fmul float %206, %243
>  %248 = fadd float %246, %247
>  %249 = call float @llvm.AMDIL.clamp.(float %248, float 0.000000e+00, float 1.000000e+00)
>  %250 = fmul float %184, %241
>  %251 = fmul float %185, %242
>  %252 = fadd float %251, %250
>  %253 = fmul float %186, %243
>  %254 = fadd float %252, %253
>  %255 = fmul float %132, %81
>  %256 = fmul float %132, %83
>  %257 = fmul float %132, %85
>  %258 = call float @llvm.pow.f32(float %249, float %214)
>  %259 = fsub float -0.000000e+00, %141
>  %260 = fadd float %259, %111
>  %261 = fsub float -0.000000e+00, %142
>  %262 = fadd float %261, %113
>  %263 = fsub float -0.000000e+00, %143
>  %264 = fadd float %263, %115
>  %265 = fmul float %260, %260
>  %266 = fmul float %262, %262
>  %267 = fadd float %266, %265
>  %268 = fmul float %264, %264
>  %269 = fadd float %267, %268
>  %270 = call float @llvm.AMDGPU.rsq(float %269)
>  %271 = fmul float %260, %270
>  %272 = fmul float %262, %270
>  %273 = fmul float %264, %270
>  %274 = call float @llvm.AMDIL.clamp.(float %254, float 0.000000e+00, float 1.000000e+00)
>  %275 = fmul float %258, %274
>  %276 = fmul float %200, %271
>  %277 = fmul float %203, %272
>  %278 = fadd float %277, %276
>  %279 = fmul float %206, %273
>  %280 = fadd float %278, %279
>  %281 = call float @llvm.AMDIL.clamp.(float %280, float 0.000000e+00, float 1.000000e+00)
>  %282 = fmul float %184, %271
>  %283 = fmul float %185, %272
>  %284 = fadd float %283, %282
>  %285 = fmul float %186, %273
>  %286 = fadd float %284, %285
>  %287 = call float @llvm.pow.f32(float %281, float %214)
>  %288 = fmul float %275, %255
>  %289 = fadd float %288, %226
>  %290 = fmul float %275, %256
>  %291 = fadd float %290, %227
>  %292 = fmul float %275, %257
>  %293 = fadd float %292, %228
>  %294 = call float @llvm.AMDIL.clamp.(float %286, float 0.000000e+00, float 1.000000e+00)
>  %295 = fmul float %287, %294
>  %296 = fmul float %134, %105
>  %297 = fmul float %134, %107
>  %298 = fmul float %134, %109
>  %299 = fmul float %295, %296
>  %300 = fadd float %299, %289
>  %301 = fmul float %295, %297
>  %302 = fadd float %301, %291
>  %303 = fmul float %295, %298
>  %304 = fadd float %303, %293
>  %305 = fmul float %184, %184
>  %306 = fmul float %185, %185
>  %307 = fmul float %186, %186
>  %308 = fsub float -0.000000e+00, %191
>  %309 = fadd float %308, 1.000000e+00
>  %310 = call float @llvm.AMDIL.clamp.(float %309, float 0.000000e+00, float 1.000000e+00)
>  %311 = fcmp uge float %184, 0.000000e+00
>  %312 = select i1 %311, float 1.000000e+00, float 0.000000e+00
>  %313 = fsub float -0.000000e+00, %312
>  %314 = fptosi float %313 to i32
>  %315 = bitcast i32 %314 to float
>  %316 = bitcast float %315 to i32
>  %317 = icmp ne i32 %316, 0
>  %. = select i1 %317, float 0.000000e+00, float %305
>  %318 = fcmp uge float %185, 0.000000e+00
>  %319 = select i1 %318, float 1.000000e+00, float 0.000000e+00
>  %320 = fsub float -0.000000e+00, %319
>  %321 = fptosi float %320 to i32
>  %322 = bitcast i32 %321 to float
>  %323 = bitcast float %322 to i32
>  %324 = icmp ne i32 %323, 0
>  %temp52.0 = select i1 %324, float 0.000000e+00, float %306
>  %325 = fcmp uge float %186, 0.000000e+00
>  %326 = select i1 %325, float 1.000000e+00, float 0.000000e+00
>  %327 = fsub float -0.000000e+00, %326
>  %328 = fptosi float %327 to i32
>  %329 = bitcast i32 %328 to float
>  %330 = bitcast float %329 to i32
>  %331 = icmp ne i32 %330, 0
>  %.94 = select i1 %331, float 0.000000e+00, float %307
>  %332 = fmul float %219, 5.000000e-01
>  %333 = fadd float %332, 5.000000e-01
>  %334 = call float @llvm.AMDIL.clamp.(float %333, float 0.000000e+00, float 1.000000e+00)
>  %335 = fcmp uge float %184, 0.000000e+00
>  %336 = select i1 %335, float 1.000000e+00, float 0.000000e+00
>  %337 = fsub float -0.000000e+00, %336
>  %338 = fptosi float %337 to i32
>  %339 = bitcast i32 %338 to float
>  %340 = bitcast float %339 to i32
>  %341 = icmp ne i32 %340, 0
>  %temp64.0 = select i1 %341, float %305, float 0.000000e+00
>  %342 = fcmp uge float %185, 0.000000e+00
>  %343 = select i1 %342, float 1.000000e+00, float 0.000000e+00
>  %344 = fsub float -0.000000e+00, %343
>  %345 = fptosi float %344 to i32
>  %346 = bitcast i32 %345 to float
>  %347 = bitcast float %346 to i32
>  %348 = icmp ne i32 %347, 0
>  %.95 = select i1 %348, float %306, float 0.000000e+00
>  %349 = fcmp uge float %186, 0.000000e+00
>  %350 = select i1 %349, float 1.000000e+00, float 0.000000e+00
>  %351 = fsub float -0.000000e+00, %350
>  %352 = fptosi float %351 to i32
>  %353 = bitcast i32 %352 to float
>  %354 = bitcast float %353 to i32
>  %355 = icmp ne i32 %354, 0
>  %temp20.0 = select i1 %355, float %307, float 0.000000e+00
>  %356 = fmul float %254, 5.000000e-01
>  %357 = fadd float %356, 5.000000e-01
>  %358 = call float @llvm.AMDIL.clamp.(float %357, float 0.000000e+00, float 1.000000e+00)
>  %359 = fmul float %., %35
>  %360 = fmul float %., %37
>  %361 = fmul float %., %39
>  %362 = fmul float %286, 5.000000e-01
>  %363 = fadd float %362, 5.000000e-01
>  %364 = call float @llvm.AMDIL.clamp.(float %363, float 0.000000e+00, float 1.000000e+00)
>  %365 = fmul float %temp64.0, %29
>  %366 = fadd float %365, %359
>  %367 = fmul float %temp64.0, %31
>  %368 = fadd float %367, %360
>  %369 = fmul float %temp64.0, %33
>  %370 = fadd float %369, %361
>  %371 = fmul float %.95, %41
>  %372 = fadd float %371, %366
>  %373 = fmul float %.95, %43
>  %374 = fadd float %373, %368
>  %375 = fmul float %.95, %45
>  %376 = fadd float %375, %370
>  %377 = fmul float %358, %358
>  %378 = fmul float %temp52.0, %47
>  %379 = fadd float %378, %372
>  %380 = fmul float %temp52.0, %49
>  %381 = fadd float %380, %374
>  %382 = fmul float %temp52.0, %51
>  %383 = fadd float %382, %376
>  %384 = fmul float %334, %334
>  %385 = fmul float %temp20.0, %53
>  %386 = fadd float %385, %379
>  %387 = fmul float %temp20.0, %55
>  %388 = fadd float %387, %381
>  %389 = fmul float %temp20.0, %57
>  %390 = fadd float %389, %383
>  %391 = fmul float %364, %364
>  %392 = fmul float %.94, %59
>  %393 = fadd float %392, %386
>  %394 = fmul float %.94, %61
>  %395 = fadd float %394, %388
>  %396 = fmul float %.94, %63
>  %397 = fadd float %396, %390
>  %398 = fmul float %310, %310
>  %399 = fadd float %398, -5.000000e-01
>  %400 = fmul float %255, %377
>  %401 = fadd float %400, %393
>  %402 = fmul float %256, %377
>  %403 = fadd float %402, %395
>  %404 = fmul float %257, %377
>  %405 = fadd float %404, %397
>  %406 = fcmp uge float %399, 0.000000e+00
>  %407 = select i1 %406, float 1.000000e+00, float 0.000000e+00
>  %408 = fsub float -0.000000e+00, %407
>  %409 = fptosi float %408 to i32
>  %410 = bitcast i32 %409 to float
>  %411 = bitcast float %410 to i32
>  %412 = icmp ne i32 %411, 0
>  %.96 = select i1 %412, float %77, float %73
>  %413 = fmul float %223, %384
>  %414 = fadd float %413, %401
>  %415 = fmul float %224, %384
>  %416 = fadd float %415, %403
>  %417 = fmul float %225, %384
>  %418 = fadd float %417, %405
>  %419 = fmul float %.96, %399
>  %420 = fadd float %419, %75
>  %421 = fmul float %296, %391
>  %422 = fadd float %421, %414
>  %423 = fmul float %297, %391
>  %424 = fadd float %423, %416
>  %425 = fmul float %298, %391
>  %426 = fadd float %425, %418
>  %427 = fmul float %153, %420
>  %428 = fmul float %150, %23
>  %429 = fmul float %151, %25
>  %430 = fmul float %152, %27
>  %431 = fmul float %427, %79
>  %432 = fmul float %422, %428
>  %433 = fmul float %424, %429
>  %434 = fmul float %426, %430
>  %435 = fsub float -0.000000e+00, %67
>  %436 = fmul float %144, %71
>  %437 = fadd float %436, %435
>  %438 = fmul float %300, %431
>  %439 = fadd float %438, %432
>  %440 = fmul float %302, %431
>  %441 = fadd float %440, %433
>  %442 = fmul float %304, %431
>  %443 = fadd float %442, %434
>  %444 = fcmp uge float %437, %69
>  %445 = select i1 %444, float %69, float %437
>  %446 = call float @llvm.AMDIL.clamp.(float %445, float 0.000000e+00, float 1.000000e+00)
>  %447 = fsub float -0.000000e+00, %125
>  %448 = fmul float %439, %447
>  %449 = fadd float %448, %117
>  %450 = fsub float -0.000000e+00, %125
>  %451 = fmul float %441, %450
>  %452 = fadd float %451, %119
>  %453 = fsub float -0.000000e+00, %125
>  %454 = fmul float %443, %453
>  %455 = fadd float %454, %121
>  %456 = fmul float %446, %446
>  %457 = fmul float %449, %456
>  %458 = fmul float %452, %456
>  %459 = fmul float %455, %456
>  %460 = fmul float %439, %125
>  %461 = fadd float %460, %457
>  %462 = fmul float %441, %125
>  %463 = fadd float %462, %458
>  %464 = fmul float %443, %125
>  %465 = fadd float %464, %459
>  %466 = fmul float %144, %123
>  %467 = call i32 @llvm.SI.packf16(float %461, float %463)
>  %468 = bitcast i32 %467 to float
>  %469 = call i32 @llvm.SI.packf16(float %465, float %466)
>  %470 = bitcast i32 %469 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %468, float %470, float %468, float %470)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.sample.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDGPU.rsq(float) #2
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>; Function Attrs: nounwind readonly
>declare float @llvm.pow.f32(float, float) #3
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="0" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>attributes #3 = { nounwind readonly }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>SI CODE:
>befe0a7e
>befc0306
>c8080900
>c8090901
>c80c0800
>c80d0801
>10080703
>d2820005
>04120502
>c8100a00
>c8110a01
>d2820005
>04160904
>7e0a5b05
>10060b03
>c8180d00
>c8190d01
>c81c0c00
>c81d0c01
>10100f07
>d2820008
>04220d06
>c8240e00
>c8250e01
>d2820008
>04221309
>7e165b08
>10101707
>10180708
>10140b02
>100e1706
>d2820006
>04321507
>10040b04
>100a1709
>d282000c
>041a0505
>10081907
>d2820004
>04121907
>08121504
>10081908
>d2820004
>04121908
>08140704
>c8341100
>c8351101
>c0400100
>bf8c007f
>c0038155
>bf8c007f
>08061a07
>c8381000
>c8391001
>c0038154
>bf8c007f
>08081c07
>100c0904
>d282000b
>041a0703
>c83c1200
>c83d1201
>c0038156
>bf8c007f
>080c1e07
>d282000b
>042e0d06
>7e165b0b
>10081704
>1020090a
>10061703
>d2820011
>04420709
>10201905
>d2820010
>04421905
>08200510
>10041706
>d2820006
>04460510
>d2060806
>02010106
>7e0c4f06
>c003812f
>bf8c007f
>d00c0008
>02010007
>7e160207
>d2000013
>00221680
>0e0c0d13
>7e0c4b06
>10080908
>d2820003
>04120707
>d282000b
>040e0505
>d2060802
>0201010b
>10040506
>c003815d
>bf8c007f
>08061a07
>c003815c
>bf8c007f
>08081c07
>100c0904
>d2820011
>041a0703
>c003815e
>bf8c007f
>080c1e07
>d2820011
>04460d06
>7e225b11
>10082304
>1024090a
>10062303
>d2820012
>044a0709
>100c2306
>d2820011
>044a0d10
>d2060811
>02010111
>7e224f11
>0e222313
>7e244b11
>10080908
>d2820003
>04120707
>d2820011
>040e0d05
>d2060803
>02010111
>10060712
>c8100500
>c8110501
>c0038159
>bf8c007f
>10240807
>102a2503
>c8180400
>c8190401
>c0038151
>bf8c007f
>10280c07
>d2820015
>04562902
>c0038165
>bf8c007f
>081a1a07
>c0038164
>bf8c007f
>081c1c07
>102c1d0e
>d2820016
>045a1b0d
>c0038166
>bf8c007f
>081e1e07
>d2820016
>045a1f0f
>7e2c5b16
>101c2d0e
>102e1d0a
>10142d0d
>d282000d
>045e1509
>10122d0f
>d282000d
>04361310
>d206080d
>0201010d
>7e1a4f0d
>0e1a1b13
>7e1a4b0d
>101c1d08
>d282000a
>043a1507
>d2820017
>042a1305
>d2060809
>02010117
>1012130d
>c8280600
>c8290601
>c0038161
>bf8c007f
>10321407
>d2820018
>04563309
>081818f2
>d206080c
>0201010c
>d282000c
>03c6190c
>d00c0008
>0201010c
>d200000d
>0021e480
>d206000d
>2201010d
>7e1a110d
>d10a0008
>0201010d
>c003814e
>bf8c007f
>7e1a0207
>c003814c
>bf8c007f
>7e1c0207
>d200000d
>00221b0e
>c003814d
>bf8c007f
>d2820010
>001e190d
>c8340100
>c8350101
>c8300000
>c8310001
>c0840300
>c0c60500
>bf8c007f
>f0800f00
>00430c0c
>bf8c0770
>1020210f
>c001014f
>bf8c007f
>10202002
>10261108
>d00c0002
>02010108
>d2000008
>0009e480
>d2060008
>22010108
>7e101108
>d10a0002
>02010108
>d2000008
>000a2680
>d2000013
>00090113
>c0010115
>bf8c007f
>102a2602
>c0010111
>bf8c007f
>d2820015
>04540508
>102c0f07
>d00c0002
>02010107
>d2000007
>0009e480
>d2060007
>22010107
>7e0e1107
>d10a0002
>02010107
>d2000007
>000a2c80
>c0020119
>bf8c007f
>d282001a
>04540907
>d2000015
>00090116
>c001011d
>bf8c007f
>d2820016
>04680515
>10340b05
>d00c0002
>02010105
>d2000005
>0009e480
>d2060005
>22010105
>7e0a1105
>d10a0002
>02010105
>d2000005
>000a3480
>c0020121
>bf8c007f
>d282001b
>04580905
>d2000016
>0009011a
>c0010125
>bf8c007f
>d282001a
>046c0516
>d282000b
>03c1e10b
>d206080b
>0201010b
>1016170b
>d2820014
>046a1714
>d2820011
>03c1e111
>d2060811
>02010111
>10222311
>d2820014
>04522312
>d2820012
>03c1e117
>d2060812
>02010112
>10242512
>d2820014
>04522519
>c0010105
>bf8c007f
>102e1a02
>10282f14
>d2820017
>04522118
>c0010178
>bf8c007f
>10282e02
>c0018175
>bf8c007f
>08302803
>c8501600
>c8511601
>c0018133
>bf8c007f
>10002803
>c0018130
>bf8c007f
>0a000003
>c0018132
>bf8c007f
>d00c0004
>02000700
>7e020203
>d2000000
>00120300
>d2060800
>02010100
>10000100
>10020118
>d2820001
>04040517
>c0018158
>bf8c007f
>102e0803
>10302f03
>c0018150
>bf8c007f
>10320c03
>d2820018
>04623302
>c0018160
>bf8c007f
>10341403
>d2820018
>04623509
>c0018114
>bf8c007f
>10362603
>c0018110
>bf8c007f
>d282001b
>046c0708
>c0018118
>bf8c007f
>d282001b
>046c0707
>c001811c
>bf8c007f
>d282001b
>046c0715
>c0018120
>bf8c007f
>d282001b
>046c0705
>c0018124
>bf8c007f
>d282001b
>046c0716
>d2820019
>046e1719
>d2820017
>04662317
>d2820017
>045e251a
>c0018104
>bf8c007f
>10321803
>102e3317
>d2820017
>045e2118
>10302e02
>c0018174
>bf8c007f
>08303003
>10300118
>d2820017
>04600517
>5e020317
>c001815a
>bf8c007f
>10080803
>102e0903
>c0018152
>bf8c007f
>10060c03
>d2820002
>045e0702
>c0018162
>bf8c007f
>100c1403
>d2820002
>040a0d09
>c0018116
>bf8c007f
>10122603
>c0018112
>bf8c007f
>d2820008
>04240708
>c001811a
>bf8c007f
>d2820007
>04200707
>c001811e
>bf8c007f
>d2820007
>041c0715
>c0018122
>bf8c007f
>d2820005
>041c0705
>c0018126
>bf8c007f
>d2820005
>04140716
>d2820003
>04161703
>d2820003
>040e2304
>d2820003
>040e2506
>c0018106
>bf8c007f
>10081c03
>10060903
>d2820002
>040e2102
>10060402
>c0018176
>bf8c007f
>08060603
>10000103
>d2820000
>04000502
>c0000177
>bf8c007f
>10042800
>5e000500
>f8001c0f
>00010001
>bf810000
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL IN[4]
>DCL IN[5]
>DCL IN[6]
>DCL OUT[0], POSITION
>DCL OUT[1], CLIPVERTEX
>DCL OUT[2], GENERIC[19]
>DCL OUT[3], GENERIC[20]
>DCL OUT[4], GENERIC[21]
>DCL OUT[5], GENERIC[22]
>DCL OUT[6], GENERIC[23]
>DCL OUT[7], GENERIC[24]
>DCL CONST[0..219]
>DCL TEMP[0..11], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 { -128.0000,     1.0000,   -64.0000,    -0.0159}
>IMM[1] FLT32 {    0.0159,   765.0059,     0.0000,     0.0001}
>IMM[2] INT32 {2, 1, 0, 0}
>  0: ADD TEMP[0], IN[3], IMM[0].xxxx
>  1: SLT TEMP[1], TEMP[0], CONST[0].xxxx
>  2: F2I TEMP[1], -TEMP[1]
>  3: AND TEMP[1], TEMP[1], IMM[0].yyyy
>  4: ABS TEMP[2], TEMP[0]
>  5: ADD TEMP[2], TEMP[2], -TEMP[1]
>  6: ADD TEMP[2], TEMP[2], IMM[0].zzzz
>  7: SLT TEMP[3], TEMP[2], CONST[0].xxxx
>  8: F2I TEMP[3], -TEMP[3]
>  9: AND TEMP[3], TEMP[3], IMM[0].yyyy
> 10: ABS TEMP[2], TEMP[2]
> 11: ADD TEMP[2], TEMP[2], -TEMP[3]
> 12: MAD TEMP[4].x, TEMP[2].xzzz, IMM[0].wwww, IMM[0].yyyy
> 13: MAD TEMP[1].x, CONST[0].zzzz, -TEMP[1].xzww, CONST[0].yyyy
> 14: MAD TEMP[5].x, TEMP[2].yyyy, IMM[0].wwww, TEMP[4].xxxx
> 15: MOV TEMP[4].z, TEMP[5].xxxx
> 16: MUL TEMP[2].xy, TEMP[2], IMM[1].xxxx
> 17: MAD TEMP[3].xy, CONST[0].zzzz, -TEMP[3], CONST[0].yyyy
> 18: MOV TEMP[4].xy, TEMP[2].xyxx
> 19: DP3 TEMP[5].x, TEMP[4].xyzz, TEMP[4].xyzz
> 20: RSQ TEMP[5].x, TEMP[5].xxxx
> 21: MUL TEMP[5].xyz, TEMP[4].xyzz, TEMP[5].xxxx
> 22: MUL TEMP[4].xy, TEMP[3].xyyy, TEMP[5].xyyy
> 23: ADD TEMP[2].xy, IN[1].xyyy, CONST[0].yyyy
> 24: MUL TEMP[3].xyz, IN[2].zyxx, IMM[1].yyyy
> 25: MUL TEMP[6].xy, TEMP[2].xyyy, IMM[1].zzzz
> 26: MOV TEMP[7].xyz, TEMP[3].xyzx
> 27: ADD TEMP[8].x, TEMP[6].yyyy, TEMP[6].xxxx
> 28: ADD TEMP[8].x, -TEMP[8].xxxx, CONST[0].yyyy
> 29: F2I TEMP[9].x, TEMP[3].zzzz
> 30: UADD TEMP[9].x, TEMP[9].xxxx, IMM[2].xxxx
> 31: F2I TEMP[10].x, TEMP[3].yyyy
> 32: UADD TEMP[10].x, TEMP[10].xxxx, IMM[2].xxxx
> 33: F2I TEMP[11].x, TEMP[3].xxxx
> 34: UADD TEMP[11].x, TEMP[11].xxxx, IMM[2].xxxx
> 35: UARL ADDR[0].x, TEMP[11].xxxx
> 36: MUL TEMP[11], CONST[ADDR[0].x+54], TEMP[6].xxxx
> 37: UARL ADDR[0].x, TEMP[10].xxxx
> 38: MAD TEMP[10], TEMP[6].yyyy, CONST[ADDR[0].x+54], TEMP[11]
> 39: UARL ADDR[0].x, TEMP[9].xxxx
> 40: UARL ADDR[0].x, TEMP[9].xxxx
> 41: MAD TEMP[9], CONST[ADDR[0].x+54], TEMP[8].xxxx, TEMP[10]
> 42: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[5].zzzz
> 43: MOV TEMP[4].z, TEMP[1].xxxx
> 44: MOV TEMP[3].w, IN[0].wwww
> 45: MAD TEMP[3].xyz, IN[5].xyzz, CONST[3].xxxx, IN[0].xyzz
> 46: DP4 TEMP[1].x, TEMP[3], TEMP[9]
> 47: MOV TEMP[0].z, TEMP[1].xxxx
> 48: MAD TEMP[1].xyz, IN[6].xyzz, CONST[3].xxxx, TEMP[4].xyzz
> 49: DP3 TEMP[5].x, TEMP[1].xyzz, TEMP[9].xyzz
> 50: MOV TEMP[6].z, TEMP[5].xxxx
> 51: F2I TEMP[5].x, TEMP[7].zzzz
> 52: F2I TEMP[9].x, TEMP[7].yyyy
> 53: F2I TEMP[10].x, TEMP[7].xxxx
> 54: UARL ADDR[0].x, TEMP[10].xxxx
> 55: MUL TEMP[10], CONST[ADDR[0].x+54], TEMP[6].xxxx
> 56: UARL ADDR[0].x, TEMP[9].xxxx
> 57: MAD TEMP[9], TEMP[6].yyyy, CONST[ADDR[0].x+54], TEMP[10]
> 58: UARL ADDR[0].x, TEMP[5].xxxx
> 59: UARL ADDR[0].x, TEMP[5].xxxx
> 60: MAD TEMP[5], CONST[ADDR[0].x+54], TEMP[8].xxxx, TEMP[9]
> 61: MOV TEMP[4].xy, TEMP[5]
> 62: F2I TEMP[9].x, TEMP[7].yyyy
> 63: UADD TEMP[9].x, TEMP[9].xxxx, IMM[2].yyyy
> 64: F2I TEMP[10].x, TEMP[7].xxxx
> 65: UADD TEMP[10].x, TEMP[10].xxxx, IMM[2].yyyy
> 66: UARL ADDR[0].x, TEMP[10].xxxx
> 67: MUL TEMP[10], CONST[ADDR[0].x+54], TEMP[6].xxxx
> 68: UARL ADDR[0].x, TEMP[9].xxxx
> 69: UARL ADDR[0].x, TEMP[9].xxxx
> 70: MAD TEMP[2], TEMP[6].yyyy, CONST[ADDR[0].x+54], TEMP[10]
> 71: F2I TEMP[7].x, TEMP[7].zzzz
> 72: UADD TEMP[7].x, TEMP[7].xxxx, IMM[2].yyyy
> 73: UARL ADDR[0].x, TEMP[7].xxxx
> 74: UARL ADDR[0].x, TEMP[7].xxxx
> 75: MAD TEMP[2], CONST[ADDR[0].x+54], TEMP[8].xxxx, TEMP[2]
> 76: DP3 TEMP[6].x, TEMP[1].xyzz, TEMP[5].xyzz
> 77: DP3 TEMP[7].x, TEMP[1].xyzz, TEMP[2].xyzz
> 78: MOV TEMP[6].y, TEMP[7].xxxx
> 79: DP3 TEMP[7].x, TEMP[6].xyzz, TEMP[6].xyzz
> 80: RSQ TEMP[7].x, TEMP[7].xxxx
> 81: MUL TEMP[1].xyz, TEMP[6].xyzz, TEMP[7].xxxx
> 82: MOV TEMP[1].xyz, TEMP[1].xyzx
> 83: DP4 TEMP[0].x, TEMP[3], TEMP[5]
> 84: DP4 TEMP[5].x, TEMP[3], TEMP[2]
> 85: MOV TEMP[0].y, TEMP[5].xxxx
> 86: ADD TEMP[5].xyz, -TEMP[0].xyzz, CONST[2].xyzz
> 87: UIF CONST[216].xxxx :0
> 88:   ADD TEMP[2].xyz, -TEMP[0].xyzz, CONST[29].xyzz
> 89:   DP3 TEMP[4].x, TEMP[2].xyzz, TEMP[2].xyzz
> 90:   RSQ TEMP[6].x, TEMP[4].xxxx
> 91:   MOV TEMP[3].y, TEMP[6].xxxx
> 92:   MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[6].xxxx
> 93:   MOV TEMP[4].y, CONST[0].yyyy
> 94:   DP3 TEMP[6].x, CONST[28].xyzz, -TEMP[2].xyzz
> 95:   ADD TEMP[6].x, TEMP[6].xxxx, -CONST[30].zzzz
> 96:   MOV TEMP[3].xz, CONST[0].yyyy
> 97:   MUL TEMP[6].x, TEMP[6].xxxx, CONST[30].wwww
> 98:   MUL TEMP[3].xyz, TEMP[4].yxxx, TEMP[3].xyzz
> 99:   MAX TEMP[6].x, TEMP[6].xxxx, IMM[1].wwww
>100:   DP3 TEMP[7].x, CONST[31].xyzz, TEMP[3].xyzz
>101:   MOV TEMP[3].x, TEMP[7].xxxx
>102:   POW TEMP[6].x, TEMP[6].xxxx, CONST[30].xxxx
>103:   RCP TEMP[7].x, TEMP[7].xxxx
>104:   MIN TEMP[6].x, TEMP[6].xxxx, CONST[0].yyyy
>105:   MAD TEMP[6].x, TEMP[7].xxxx, TEMP[6].xxxx, -TEMP[7].xxxx
>106:   MAD TEMP[6].x, CONST[28].wwww, TEMP[6].xxxx, TEMP[7].xxxx
>107:   ADD TEMP[7].x, -TEMP[6].xxxx, CONST[0].yyyy
>108:   MAD TEMP[6].x, CONST[27].wwww, TEMP[7].xxxx, TEMP[6].xxxx
>109: ELSE :0
>110:   MOV TEMP[6].x, CONST[0].xxxx
>111: ENDIF
>112: UIF CONST[217].xxxx :0
>113:   ADD TEMP[2].xyz, -TEMP[0].xyzz, CONST[34].xyzz
>114:   DP3 TEMP[4].x, TEMP[2].xyzz, TEMP[2].xyzz
>115:   RSQ TEMP[7].x, TEMP[4].xxxx
>116:   MOV TEMP[3].y, TEMP[7].xxxx
>117:   MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[7].xxxx
>118:   MOV TEMP[4].y, CONST[0].yyyy
>119:   DP3 TEMP[7].x, CONST[33].xyzz, -TEMP[2].xyzz
>120:   ADD TEMP[7].x, TEMP[7].xxxx, -CONST[35].zzzz
>121:   MOV TEMP[3].xz, CONST[0].yyyy
>122:   MUL TEMP[7].x, TEMP[7].xxxx, CONST[35].wwww
>123:   MUL TEMP[3].xyz, TEMP[4].yxxx, TEMP[3].xyzz
>124:   MAX TEMP[7].x, TEMP[7].xxxx, IMM[1].wwww
>125:   DP3 TEMP[8].x, CONST[36].xyzz, TEMP[3].xyzz
>126:   MOV TEMP[3].x, TEMP[8].xxxx
>127:   POW TEMP[7].x, TEMP[7].xxxx, CONST[35].xxxx
>128:   RCP TEMP[8].x, TEMP[8].xxxx
>129:   MIN TEMP[7].x, TEMP[7].xxxx, CONST[0].yyyy
>130:   MAD TEMP[7].x, TEMP[8].xxxx, TEMP[7].xxxx, -TEMP[8].xxxx
>131:   MAD TEMP[7].x, CONST[33].wwww, TEMP[7].xxxx, TEMP[8].xxxx
>132:   ADD TEMP[8].x, -TEMP[7].xxxx, CONST[0].yyyy
>133:   MAD TEMP[7].x, CONST[32].wwww, TEMP[8].xxxx, TEMP[7].xxxx
>134:   MOV TEMP[6].y, TEMP[7].xxxx
>135: ELSE :0
>136:   MOV TEMP[6].y, CONST[0].xxxx
>137: ENDIF
>138: UIF CONST[218].xxxx :0
>139:   ADD TEMP[2].xyz, -TEMP[0].xyzz, CONST[39].xyzz
>140:   DP3 TEMP[4].x, TEMP[2].xyzz, TEMP[2].xyzz
>141:   RSQ TEMP[7].x, TEMP[4].xxxx
>142:   MOV TEMP[3].y, TEMP[7].xxxx
>143:   MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[7].xxxx
>144:   MOV TEMP[4].y, CONST[0].yyyy
>145:   DP3 TEMP[7].x, CONST[38].xyzz, -TEMP[2].xyzz
>146:   ADD TEMP[7].x, TEMP[7].xxxx, -CONST[40].zzzz
>147:   MOV TEMP[3].xz, CONST[0].yyyy
>148:   MUL TEMP[7].x, TEMP[7].xxxx, CONST[40].wwww
>149:   MUL TEMP[3].xyz, TEMP[4].yxxx, TEMP[3].xyzz
>150:   MAX TEMP[7].x, TEMP[7].xxxx, IMM[1].wwww
>151:   DP3 TEMP[8].x, CONST[41].xyzz, TEMP[3].xyzz
>152:   MOV TEMP[3].x, TEMP[8].xxxx
>153:   POW TEMP[7].x, TEMP[7].xxxx, CONST[40].xxxx
>154:   RCP TEMP[8].x, TEMP[8].xxxx
>155:   MIN TEMP[7].x, TEMP[7].xxxx, CONST[0].yyyy
>156:   MAD TEMP[7].x, TEMP[8].xxxx, TEMP[7].xxxx, -TEMP[8].xxxx
>157:   MAD TEMP[7].x, CONST[38].wwww, TEMP[7].xxxx, TEMP[8].xxxx
>158:   ADD TEMP[8].x, -TEMP[7].xxxx, CONST[0].yyyy
>159:   MAD TEMP[7].x, CONST[37].wwww, TEMP[8].xxxx, TEMP[7].xxxx
>160:   MOV TEMP[6].z, TEMP[7].xxxx
>161: ELSE :0
>162:   MOV TEMP[6].z, CONST[0].xxxx
>163: ENDIF
>164: UIF CONST[219].xxxx :0
>165:   ADD TEMP[2].xyz, -TEMP[0].xyzz, CONST[44].xyzz
>166:   DP3 TEMP[4].x, TEMP[2].xyzz, TEMP[2].xyzz
>167:   RSQ TEMP[7].x, TEMP[4].xxxx
>168:   MOV TEMP[3].y, TEMP[7].xxxx
>169:   MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[7].xxxx
>170:   MOV TEMP[4].y, CONST[0].yyyy
>171:   DP3 TEMP[7].x, CONST[43].xyzz, -TEMP[2].xyzz
>172:   ADD TEMP[7].x, TEMP[7].xxxx, -CONST[45].zzzz
>173:   MOV TEMP[3].xz, CONST[0].yyyy
>174:   MUL TEMP[7].x, TEMP[7].xxxx, CONST[45].wwww
>175:   MUL TEMP[3].xyz, TEMP[4].yxxx, TEMP[3].xyzz
>176:   MAX TEMP[4].x, TEMP[7].xxxx, IMM[1].wwww
>177:   DP3 TEMP[7].x, CONST[46].xyzz, TEMP[3].xyzz
>178:   POW TEMP[4].x, TEMP[4].xxxx, CONST[45].xxxx
>179:   RCP TEMP[7].x, TEMP[7].xxxx
>180:   MIN TEMP[4].x, TEMP[4].xxxx, CONST[0].yyyy
>181:   MAD TEMP[4].x, TEMP[7].xxxx, TEMP[4].xxxx, -TEMP[7].xxxx
>182:   MAD TEMP[4].x, CONST[43].wwww, TEMP[4].xxxx, TEMP[7].xxxx
>183:   ADD TEMP[7].x, -TEMP[4].xxxx, CONST[0].yyyy
>184:   MAD TEMP[3].x, CONST[42].wwww, TEMP[7].xxxx, TEMP[4].xxxx
>185: ELSE :0
>186:   MOV TEMP[3].x, CONST[0].xxxx
>187: ENDIF
>188: MOV TEMP[3].yzw, TEMP[0].yxyz
>189: MOV TEMP[0].w, CONST[0].yyyy
>190: DP4 TEMP[4].x, TEMP[0], CONST[13]
>191: MOV TEMP[2].z, TEMP[4].xxxx
>192: MUL TEMP[4].x, IN[5].wwww, CONST[3].yyyy
>193: MOV TEMP[2].w, TEMP[4].xxxx
>194: MOV TEMP[4], TEMP[3].yzwx
>195: MOV TEMP[2].zw, TEMP[2].wwzw
>196: DP4 TEMP[3].x, TEMP[0], CONST[8]
>197: DP4 TEMP[7].x, TEMP[0], CONST[9]
>198: MOV TEMP[3].y, TEMP[7].xxxx
>199: MOV TEMP[2].xy, TEMP[3].xyxx
>200: DP4 TEMP[8].x, TEMP[0], CONST[10]
>201: MOV TEMP[3].z, TEMP[8].xxxx
>202: DP4 TEMP[0].x, TEMP[0], CONST[11]
>203: MOV TEMP[3].w, TEMP[0].xxxx
>204: MOV TEMP[9].xw, TEMP[3].xxxw
>205: DP4 TEMP[10].x, IN[4], CONST[48]
>206: DP4 TEMP[11].x, IN[4], CONST[49]
>207: MOV TEMP[10].y, TEMP[11].xxxx
>208: DP4 TEMP[11].x, IN[4], CONST[52]
>209: MOV TEMP[10].z, TEMP[11].xxxx
>210: DP4 TEMP[11].x, IN[4], CONST[53]
>211: MOV TEMP[10].w, TEMP[11].xxxx
>212: MAD TEMP[8].x, TEMP[8].xxxx, CONST[0].zzzz, -TEMP[0].xxxx
>213: MOV TEMP[9].z, TEMP[8].xxxx
>214: MOV TEMP[9].y, -TEMP[7].xxxx
>215: MAD TEMP[9].xy, CONST[215].xyyy, TEMP[0].xxxx, TEMP[9].xyyy
>216: MOV OUT[2], TEMP[10]
>217: MOV OUT[3], TEMP[6]
>218: MOV OUT[4], TEMP[5]
>219: MOV OUT[0], TEMP[9]
>220: MOV OUT[1], TEMP[3]
>221: MOV OUT[5], TEMP[1]
>222: MOV OUT[6], TEMP[4]
>223: MOV OUT[7], TEMP[2]
>224: END
>; ModuleID = 'tgsi'
>
>define void @main(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %9 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 0
>  %10 = load float addrspace(2)* addrspace(2)* %9, !tbaa !0
>  %11 = getelementptr float addrspace(2)* %10, i32 0
>  %12 = load float addrspace(2)* %11, !tbaa !0
>  %13 = getelementptr float addrspace(2)* %10, i32 1
>  %14 = load float addrspace(2)* %13, !tbaa !0
>  %15 = getelementptr float addrspace(2)* %10, i32 2
>  %16 = load float addrspace(2)* %15, !tbaa !0
>  %17 = getelementptr float addrspace(2)* %10, i32 8
>  %18 = load float addrspace(2)* %17, !tbaa !0
>  %19 = getelementptr float addrspace(2)* %10, i32 9
>  %20 = load float addrspace(2)* %19, !tbaa !0
>  %21 = getelementptr float addrspace(2)* %10, i32 10
>  %22 = load float addrspace(2)* %21, !tbaa !0
>  %23 = getelementptr float addrspace(2)* %10, i32 12
>  %24 = load float addrspace(2)* %23, !tbaa !0
>  %25 = getelementptr float addrspace(2)* %10, i32 13
>  %26 = load float addrspace(2)* %25, !tbaa !0
>  %27 = getelementptr float addrspace(2)* %10, i32 32
>  %28 = load float addrspace(2)* %27, !tbaa !0
>  %29 = getelementptr float addrspace(2)* %10, i32 33
>  %30 = load float addrspace(2)* %29, !tbaa !0
>  %31 = getelementptr float addrspace(2)* %10, i32 34
>  %32 = load float addrspace(2)* %31, !tbaa !0
>  %33 = getelementptr float addrspace(2)* %10, i32 35
>  %34 = load float addrspace(2)* %33, !tbaa !0
>  %35 = getelementptr float addrspace(2)* %10, i32 36
>  %36 = load float addrspace(2)* %35, !tbaa !0
>  %37 = getelementptr float addrspace(2)* %10, i32 37
>  %38 = load float addrspace(2)* %37, !tbaa !0
>  %39 = getelementptr float addrspace(2)* %10, i32 38
>  %40 = load float addrspace(2)* %39, !tbaa !0
>  %41 = getelementptr float addrspace(2)* %10, i32 39
>  %42 = load float addrspace(2)* %41, !tbaa !0
>  %43 = getelementptr float addrspace(2)* %10, i32 40
>  %44 = load float addrspace(2)* %43, !tbaa !0
>  %45 = getelementptr float addrspace(2)* %10, i32 41
>  %46 = load float addrspace(2)* %45, !tbaa !0
>  %47 = getelementptr float addrspace(2)* %10, i32 42
>  %48 = load float addrspace(2)* %47, !tbaa !0
>  %49 = getelementptr float addrspace(2)* %10, i32 43
>  %50 = load float addrspace(2)* %49, !tbaa !0
>  %51 = getelementptr float addrspace(2)* %10, i32 44
>  %52 = load float addrspace(2)* %51, !tbaa !0
>  %53 = getelementptr float addrspace(2)* %10, i32 45
>  %54 = load float addrspace(2)* %53, !tbaa !0
>  %55 = getelementptr float addrspace(2)* %10, i32 46
>  %56 = load float addrspace(2)* %55, !tbaa !0
>  %57 = getelementptr float addrspace(2)* %10, i32 47
>  %58 = load float addrspace(2)* %57, !tbaa !0
>  %59 = getelementptr float addrspace(2)* %10, i32 52
>  %60 = load float addrspace(2)* %59, !tbaa !0
>  %61 = getelementptr float addrspace(2)* %10, i32 53
>  %62 = load float addrspace(2)* %61, !tbaa !0
>  %63 = getelementptr float addrspace(2)* %10, i32 54
>  %64 = load float addrspace(2)* %63, !tbaa !0
>  %65 = getelementptr float addrspace(2)* %10, i32 55
>  %66 = load float addrspace(2)* %65, !tbaa !0
>  %67 = getelementptr float addrspace(2)* %10, i32 111
>  %68 = load float addrspace(2)* %67, !tbaa !0
>  %69 = getelementptr float addrspace(2)* %10, i32 112
>  %70 = load float addrspace(2)* %69, !tbaa !0
>  %71 = getelementptr float addrspace(2)* %10, i32 113
>  %72 = load float addrspace(2)* %71, !tbaa !0
>  %73 = getelementptr float addrspace(2)* %10, i32 114
>  %74 = load float addrspace(2)* %73, !tbaa !0
>  %75 = getelementptr float addrspace(2)* %10, i32 115
>  %76 = load float addrspace(2)* %75, !tbaa !0
>  %77 = getelementptr float addrspace(2)* %10, i32 116
>  %78 = load float addrspace(2)* %77, !tbaa !0
>  %79 = getelementptr float addrspace(2)* %10, i32 117
>  %80 = load float addrspace(2)* %79, !tbaa !0
>  %81 = getelementptr float addrspace(2)* %10, i32 118
>  %82 = load float addrspace(2)* %81, !tbaa !0
>  %83 = getelementptr float addrspace(2)* %10, i32 120
>  %84 = load float addrspace(2)* %83, !tbaa !0
>  %85 = getelementptr float addrspace(2)* %10, i32 122
>  %86 = load float addrspace(2)* %85, !tbaa !0
>  %87 = getelementptr float addrspace(2)* %10, i32 123
>  %88 = load float addrspace(2)* %87, !tbaa !0
>  %89 = getelementptr float addrspace(2)* %10, i32 124
>  %90 = load float addrspace(2)* %89, !tbaa !0
>  %91 = getelementptr float addrspace(2)* %10, i32 125
>  %92 = load float addrspace(2)* %91, !tbaa !0
>  %93 = getelementptr float addrspace(2)* %10, i32 126
>  %94 = load float addrspace(2)* %93, !tbaa !0
>  %95 = getelementptr float addrspace(2)* %10, i32 131
>  %96 = load float addrspace(2)* %95, !tbaa !0
>  %97 = getelementptr float addrspace(2)* %10, i32 132
>  %98 = load float addrspace(2)* %97, !tbaa !0
>  %99 = getelementptr float addrspace(2)* %10, i32 133
>  %100 = load float addrspace(2)* %99, !tbaa !0
>  %101 = getelementptr float addrspace(2)* %10, i32 134
>  %102 = load float addrspace(2)* %101, !tbaa !0
>  %103 = getelementptr float addrspace(2)* %10, i32 135
>  %104 = load float addrspace(2)* %103, !tbaa !0
>  %105 = getelementptr float addrspace(2)* %10, i32 136
>  %106 = load float addrspace(2)* %105, !tbaa !0
>  %107 = getelementptr float addrspace(2)* %10, i32 137
>  %108 = load float addrspace(2)* %107, !tbaa !0
>  %109 = getelementptr float addrspace(2)* %10, i32 138
>  %110 = load float addrspace(2)* %109, !tbaa !0
>  %111 = getelementptr float addrspace(2)* %10, i32 140
>  %112 = load float addrspace(2)* %111, !tbaa !0
>  %113 = getelementptr float addrspace(2)* %10, i32 142
>  %114 = load float addrspace(2)* %113, !tbaa !0
>  %115 = getelementptr float addrspace(2)* %10, i32 143
>  %116 = load float addrspace(2)* %115, !tbaa !0
>  %117 = getelementptr float addrspace(2)* %10, i32 144
>  %118 = load float addrspace(2)* %117, !tbaa !0
>  %119 = getelementptr float addrspace(2)* %10, i32 145
>  %120 = load float addrspace(2)* %119, !tbaa !0
>  %121 = getelementptr float addrspace(2)* %10, i32 146
>  %122 = load float addrspace(2)* %121, !tbaa !0
>  %123 = getelementptr float addrspace(2)* %10, i32 151
>  %124 = load float addrspace(2)* %123, !tbaa !0
>  %125 = getelementptr float addrspace(2)* %10, i32 152
>  %126 = load float addrspace(2)* %125, !tbaa !0
>  %127 = getelementptr float addrspace(2)* %10, i32 153
>  %128 = load float addrspace(2)* %127, !tbaa !0
>  %129 = getelementptr float addrspace(2)* %10, i32 154
>  %130 = load float addrspace(2)* %129, !tbaa !0
>  %131 = getelementptr float addrspace(2)* %10, i32 155
>  %132 = load float addrspace(2)* %131, !tbaa !0
>  %133 = getelementptr float addrspace(2)* %10, i32 156
>  %134 = load float addrspace(2)* %133, !tbaa !0
>  %135 = getelementptr float addrspace(2)* %10, i32 157
>  %136 = load float addrspace(2)* %135, !tbaa !0
>  %137 = getelementptr float addrspace(2)* %10, i32 158
>  %138 = load float addrspace(2)* %137, !tbaa !0
>  %139 = getelementptr float addrspace(2)* %10, i32 160
>  %140 = load float addrspace(2)* %139, !tbaa !0
>  %141 = getelementptr float addrspace(2)* %10, i32 162
>  %142 = load float addrspace(2)* %141, !tbaa !0
>  %143 = getelementptr float addrspace(2)* %10, i32 163
>  %144 = load float addrspace(2)* %143, !tbaa !0
>  %145 = getelementptr float addrspace(2)* %10, i32 164
>  %146 = load float addrspace(2)* %145, !tbaa !0
>  %147 = getelementptr float addrspace(2)* %10, i32 165
>  %148 = load float addrspace(2)* %147, !tbaa !0
>  %149 = getelementptr float addrspace(2)* %10, i32 166
>  %150 = load float addrspace(2)* %149, !tbaa !0
>  %151 = getelementptr float addrspace(2)* %10, i32 171
>  %152 = load float addrspace(2)* %151, !tbaa !0
>  %153 = getelementptr float addrspace(2)* %10, i32 172
>  %154 = load float addrspace(2)* %153, !tbaa !0
>  %155 = getelementptr float addrspace(2)* %10, i32 173
>  %156 = load float addrspace(2)* %155, !tbaa !0
>  %157 = getelementptr float addrspace(2)* %10, i32 174
>  %158 = load float addrspace(2)* %157, !tbaa !0
>  %159 = getelementptr float addrspace(2)* %10, i32 175
>  %160 = load float addrspace(2)* %159, !tbaa !0
>  %161 = getelementptr float addrspace(2)* %10, i32 176
>  %162 = load float addrspace(2)* %161, !tbaa !0
>  %163 = getelementptr float addrspace(2)* %10, i32 177
>  %164 = load float addrspace(2)* %163, !tbaa !0
>  %165 = getelementptr float addrspace(2)* %10, i32 178
>  %166 = load float addrspace(2)* %165, !tbaa !0
>  %167 = getelementptr float addrspace(2)* %10, i32 180
>  %168 = load float addrspace(2)* %167, !tbaa !0
>  %169 = getelementptr float addrspace(2)* %10, i32 182
>  %170 = load float addrspace(2)* %169, !tbaa !0
>  %171 = getelementptr float addrspace(2)* %10, i32 183
>  %172 = load float addrspace(2)* %171, !tbaa !0
>  %173 = getelementptr float addrspace(2)* %10, i32 184
>  %174 = load float addrspace(2)* %173, !tbaa !0
>  %175 = getelementptr float addrspace(2)* %10, i32 185
>  %176 = load float addrspace(2)* %175, !tbaa !0
>  %177 = getelementptr float addrspace(2)* %10, i32 186
>  %178 = load float addrspace(2)* %177, !tbaa !0
>  %179 = getelementptr float addrspace(2)* %10, i32 192
>  %180 = load float addrspace(2)* %179, !tbaa !0
>  %181 = getelementptr float addrspace(2)* %10, i32 193
>  %182 = load float addrspace(2)* %181, !tbaa !0
>  %183 = getelementptr float addrspace(2)* %10, i32 194
>  %184 = load float addrspace(2)* %183, !tbaa !0
>  %185 = getelementptr float addrspace(2)* %10, i32 195
>  %186 = load float addrspace(2)* %185, !tbaa !0
>  %187 = getelementptr float addrspace(2)* %10, i32 196
>  %188 = load float addrspace(2)* %187, !tbaa !0
>  %189 = getelementptr float addrspace(2)* %10, i32 197
>  %190 = load float addrspace(2)* %189, !tbaa !0
>  %191 = getelementptr float addrspace(2)* %10, i32 198
>  %192 = load float addrspace(2)* %191, !tbaa !0
>  %193 = getelementptr float addrspace(2)* %10, i32 199
>  %194 = load float addrspace(2)* %193, !tbaa !0
>  %195 = getelementptr float addrspace(2)* %10, i32 208
>  %196 = load float addrspace(2)* %195, !tbaa !0
>  %197 = getelementptr float addrspace(2)* %10, i32 209
>  %198 = load float addrspace(2)* %197, !tbaa !0
>  %199 = getelementptr float addrspace(2)* %10, i32 210
>  %200 = load float addrspace(2)* %199, !tbaa !0
>  %201 = getelementptr float addrspace(2)* %10, i32 211
>  %202 = load float addrspace(2)* %201, !tbaa !0
>  %203 = getelementptr float addrspace(2)* %10, i32 212
>  %204 = load float addrspace(2)* %203, !tbaa !0
>  %205 = getelementptr float addrspace(2)* %10, i32 213
>  %206 = load float addrspace(2)* %205, !tbaa !0
>  %207 = getelementptr float addrspace(2)* %10, i32 214
>  %208 = load float addrspace(2)* %207, !tbaa !0
>  %209 = getelementptr float addrspace(2)* %10, i32 215
>  %210 = load float addrspace(2)* %209, !tbaa !0
>  %211 = getelementptr float addrspace(2)* %10, i32 860
>  %212 = load float addrspace(2)* %211, !tbaa !0
>  %213 = getelementptr float addrspace(2)* %10, i32 861
>  %214 = load float addrspace(2)* %213, !tbaa !0
>  %215 = getelementptr float addrspace(2)* %10, i32 864
>  %216 = load float addrspace(2)* %215, !tbaa !0
>  %217 = getelementptr float addrspace(2)* %10, i32 868
>  %218 = load float addrspace(2)* %217, !tbaa !0
>  %219 = getelementptr float addrspace(2)* %10, i32 872
>  %220 = load float addrspace(2)* %219, !tbaa !0
>  %221 = getelementptr float addrspace(2)* %10, i32 876
>  %222 = load float addrspace(2)* %221, !tbaa !0
>  %223 = getelementptr <16 x i8> addrspace(2)* %3, i32 0
>  %224 = load <16 x i8> addrspace(2)* %223, !tbaa !0
>  %225 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %224, i32 0, i32 %5)
>  %226 = extractelement <4 x float> %225, i32 0
>  %227 = extractelement <4 x float> %225, i32 1
>  %228 = extractelement <4 x float> %225, i32 2
>  %229 = extractelement <4 x float> %225, i32 3
>  %230 = getelementptr <16 x i8> addrspace(2)* %3, i32 1
>  %231 = load <16 x i8> addrspace(2)* %230, !tbaa !0
>  %232 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %231, i32 0, i32 %5)
>  %233 = extractelement <4 x float> %232, i32 0
>  %234 = extractelement <4 x float> %232, i32 1
>  %235 = getelementptr <16 x i8> addrspace(2)* %3, i32 2
>  %236 = load <16 x i8> addrspace(2)* %235, !tbaa !0
>  %237 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %236, i32 0, i32 %5)
>  %238 = extractelement <4 x float> %237, i32 0
>  %239 = extractelement <4 x float> %237, i32 1
>  %240 = extractelement <4 x float> %237, i32 2
>  %241 = getelementptr <16 x i8> addrspace(2)* %3, i32 3
>  %242 = load <16 x i8> addrspace(2)* %241, !tbaa !0
>  %243 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %242, i32 0, i32 %5)
>  %244 = extractelement <4 x float> %243, i32 0
>  %245 = extractelement <4 x float> %243, i32 1
>  %246 = extractelement <4 x float> %243, i32 2
>  %247 = extractelement <4 x float> %243, i32 3
>  %248 = getelementptr <16 x i8> addrspace(2)* %3, i32 4
>  %249 = load <16 x i8> addrspace(2)* %248, !tbaa !0
>  %250 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %249, i32 0, i32 %5)
>  %251 = extractelement <4 x float> %250, i32 0
>  %252 = extractelement <4 x float> %250, i32 1
>  %253 = extractelement <4 x float> %250, i32 2
>  %254 = extractelement <4 x float> %250, i32 3
>  %255 = getelementptr <16 x i8> addrspace(2)* %3, i32 5
>  %256 = load <16 x i8> addrspace(2)* %255, !tbaa !0
>  %257 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %256, i32 0, i32 %5)
>  %258 = extractelement <4 x float> %257, i32 0
>  %259 = extractelement <4 x float> %257, i32 1
>  %260 = extractelement <4 x float> %257, i32 2
>  %261 = extractelement <4 x float> %257, i32 3
>  %262 = getelementptr <16 x i8> addrspace(2)* %3, i32 6
>  %263 = load <16 x i8> addrspace(2)* %262, !tbaa !0
>  %264 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %263, i32 0, i32 %5)
>  %265 = extractelement <4 x float> %264, i32 0
>  %266 = extractelement <4 x float> %264, i32 1
>  %267 = extractelement <4 x float> %264, i32 2
>  %268 = fadd float %244, -1.280000e+02
>  %269 = fadd float %245, -1.280000e+02
>  %270 = fadd float %246, -1.280000e+02
>  %271 = fadd float %247, -1.280000e+02
>  %272 = fcmp ult float %268, %12
>  %273 = select i1 %272, float 1.000000e+00, float 0.000000e+00
>  %274 = fcmp ult float %269, %12
>  %275 = select i1 %274, float 1.000000e+00, float 0.000000e+00
>  %276 = fcmp ult float %270, %12
>  %277 = select i1 %276, float 1.000000e+00, float 0.000000e+00
>  %278 = fcmp ult float %271, %12
>  %279 = select i1 %278, float 1.000000e+00, float 0.000000e+00
>  %280 = fsub float -0.000000e+00, %273
>  %281 = fptosi float %280 to i32
>  %282 = fsub float -0.000000e+00, %275
>  %283 = fptosi float %282 to i32
>  %284 = fsub float -0.000000e+00, %277
>  %285 = fptosi float %284 to i32
>  %286 = fsub float -0.000000e+00, %279
>  %287 = fptosi float %286 to i32
>  %288 = bitcast i32 %281 to float
>  %289 = bitcast i32 %283 to float
>  %290 = bitcast i32 %285 to float
>  %291 = bitcast i32 %287 to float
>  %292 = bitcast float %288 to i32
>  %293 = and i32 %292, 1065353216
>  %294 = bitcast float %289 to i32
>  %295 = and i32 %294, 1065353216
>  %296 = bitcast float %290 to i32
>  %297 = and i32 %296, 1065353216
>  %298 = bitcast float %291 to i32
>  %299 = and i32 %298, 1065353216
>  %300 = bitcast i32 %293 to float
>  %301 = bitcast i32 %295 to float
>  %302 = bitcast i32 %297 to float
>  %303 = bitcast i32 %299 to float
>  %304 = call float @fabs(float %268)
>  %305 = call float @fabs(float %269)
>  %306 = call float @fabs(float %270)
>  %307 = call float @fabs(float %271)
>  %308 = fsub float -0.000000e+00, %300
>  %309 = fadd float %304, %308
>  %310 = fsub float -0.000000e+00, %301
>  %311 = fadd float %305, %310
>  %312 = fsub float -0.000000e+00, %302
>  %313 = fadd float %306, %312
>  %314 = fsub float -0.000000e+00, %303
>  %315 = fadd float %307, %314
>  %316 = fadd float %309, -6.400000e+01
>  %317 = fadd float %311, -6.400000e+01
>  %318 = fadd float %313, -6.400000e+01
>  %319 = fadd float %315, -6.400000e+01
>  %320 = fcmp ult float %316, %12
>  %321 = select i1 %320, float 1.000000e+00, float 0.000000e+00
>  %322 = fcmp ult float %317, %12
>  %323 = select i1 %322, float 1.000000e+00, float 0.000000e+00
>  %324 = fsub float -0.000000e+00, %321
>  %325 = fptosi float %324 to i32
>  %326 = fsub float -0.000000e+00, %323
>  %327 = fptosi float %326 to i32
>  %328 = bitcast i32 %325 to float
>  %329 = bitcast i32 %327 to float
>  %330 = bitcast float %328 to i32
>  %331 = and i32 %330, 1065353216
>  %332 = bitcast float %329 to i32
>  %333 = and i32 %332, 1065353216
>  %334 = bitcast i32 %331 to float
>  %335 = bitcast i32 %333 to float
>  %336 = call float @fabs(float %316)
>  %337 = call float @fabs(float %317)
>  %338 = call float @fabs(float %318)
>  %339 = call float @fabs(float %319)
>  %340 = fsub float -0.000000e+00, %334
>  %341 = fadd float %336, %340
>  %342 = fsub float -0.000000e+00, %335
>  %343 = fadd float %337, %342
>  %344 = fmul float %341, 0xBF90410420000000
>  %345 = fadd float %344, 1.000000e+00
>  %346 = fsub float -0.000000e+00, %300
>  %347 = fmul float %16, %346
>  %348 = fadd float %347, %14
>  %349 = fmul float %343, 0xBF90410420000000
>  %350 = fadd float %349, %345
>  %351 = fmul float %341, 0x3F90410420000000
>  %352 = fmul float %343, 0x3F90410420000000
>  %353 = fsub float -0.000000e+00, %334
>  %354 = fmul float %16, %353
>  %355 = fadd float %354, %14
>  %356 = fsub float -0.000000e+00, %335
>  %357 = fmul float %16, %356
>  %358 = fadd float %357, %14
>  %359 = fmul float %351, %351
>  %360 = fmul float %352, %352
>  %361 = fadd float %360, %359
>  %362 = fmul float %350, %350
>  %363 = fadd float %361, %362
>  %364 = call float @llvm.AMDGPU.rsq(float %363)
>  %365 = fmul float %351, %364
>  %366 = fmul float %352, %364
>  %367 = fmul float %350, %364
>  %368 = fmul float %355, %365
>  %369 = fmul float %358, %366
>  %370 = fadd float %233, %14
>  %371 = fadd float %234, %14
>  %372 = fmul float %240, 0x4087E80C00000000
>  %373 = fmul float %239, 0x4087E80C00000000
>  %374 = fmul float %238, 0x4087E80C00000000
>  %375 = fmul float %370, 0x3F00000000000000
>  %376 = fmul float %371, 0x3F00000000000000
>  %377 = fadd float %376, %375
>  %378 = fsub float -0.000000e+00, %377
>  %379 = fadd float %378, %14
>  %380 = fptosi float %374 to i32
>  %381 = bitcast i32 %380 to float
>  %382 = bitcast float %381 to i32
>  %383 = add i32 %382, 2
>  %384 = bitcast i32 %383 to float
>  %385 = fptosi float %373 to i32
>  %386 = bitcast i32 %385 to float
>  %387 = bitcast float %386 to i32
>  %388 = add i32 %387, 2
>  %389 = bitcast i32 %388 to float
>  %390 = fptosi float %372 to i32
>  %391 = bitcast i32 %390 to float
>  %392 = bitcast float %391 to i32
>  %393 = add i32 %392, 2
>  %394 = bitcast i32 %393 to float
>  %395 = bitcast float %394 to i32
>  %396 = shl i32 %395, 4
>  %397 = add i32 %396, 864
>  %398 = udiv i32 %397, 4
>  %399 = getelementptr float addrspace(2)* %10, i32 %398
>  %400 = load float addrspace(2)* %399, !tbaa !0
>  %401 = fmul float %400, %375
>  %402 = shl i32 %395, 4
>  %403 = add i32 %402, 868
>  %404 = udiv i32 %403, 4
>  %405 = getelementptr float addrspace(2)* %10, i32 %404
>  %406 = load float addrspace(2)* %405, !tbaa !0
>  %407 = fmul float %406, %375
>  %408 = shl i32 %395, 4
>  %409 = add i32 %408, 872
>  %410 = udiv i32 %409, 4
>  %411 = getelementptr float addrspace(2)* %10, i32 %410
>  %412 = load float addrspace(2)* %411, !tbaa !0
>  %413 = fmul float %412, %375
>  %414 = shl i32 %395, 4
>  %415 = add i32 %414, 876
>  %416 = udiv i32 %415, 4
>  %417 = getelementptr float addrspace(2)* %10, i32 %416
>  %418 = load float addrspace(2)* %417, !tbaa !0
>  %419 = fmul float %418, %375
>  %420 = bitcast float %389 to i32
>  %421 = shl i32 %420, 4
>  %422 = add i32 %421, 864
>  %423 = udiv i32 %422, 4
>  %424 = getelementptr float addrspace(2)* %10, i32 %423
>  %425 = load float addrspace(2)* %424, !tbaa !0
>  %426 = fmul float %376, %425
>  %427 = fadd float %426, %401
>  %428 = shl i32 %420, 4
>  %429 = add i32 %428, 868
>  %430 = udiv i32 %429, 4
>  %431 = getelementptr float addrspace(2)* %10, i32 %430
>  %432 = load float addrspace(2)* %431, !tbaa !0
>  %433 = fmul float %376, %432
>  %434 = fadd float %433, %407
>  %435 = shl i32 %420, 4
>  %436 = add i32 %435, 872
>  %437 = udiv i32 %436, 4
>  %438 = getelementptr float addrspace(2)* %10, i32 %437
>  %439 = load float addrspace(2)* %438, !tbaa !0
>  %440 = fmul float %376, %439
>  %441 = fadd float %440, %413
>  %442 = shl i32 %420, 4
>  %443 = add i32 %442, 876
>  %444 = udiv i32 %443, 4
>  %445 = getelementptr float addrspace(2)* %10, i32 %444
>  %446 = load float addrspace(2)* %445, !tbaa !0
>  %447 = fmul float %376, %446
>  %448 = fadd float %447, %419
>  %449 = bitcast float %384 to i32
>  %450 = shl i32 %449, 4
>  %451 = add i32 %450, 864
>  %452 = udiv i32 %451, 4
>  %453 = getelementptr float addrspace(2)* %10, i32 %452
>  %454 = load float addrspace(2)* %453, !tbaa !0
>  %455 = fmul float %454, %379
>  %456 = fadd float %455, %427
>  %457 = shl i32 %449, 4
>  %458 = add i32 %457, 868
>  %459 = udiv i32 %458, 4
>  %460 = getelementptr float addrspace(2)* %10, i32 %459
>  %461 = load float addrspace(2)* %460, !tbaa !0
>  %462 = fmul float %461, %379
>  %463 = fadd float %462, %434
>  %464 = shl i32 %449, 4
>  %465 = add i32 %464, 872
>  %466 = udiv i32 %465, 4
>  %467 = getelementptr float addrspace(2)* %10, i32 %466
>  %468 = load float addrspace(2)* %467, !tbaa !0
>  %469 = fmul float %468, %379
>  %470 = fadd float %469, %441
>  %471 = shl i32 %449, 4
>  %472 = add i32 %471, 876
>  %473 = udiv i32 %472, 4
>  %474 = getelementptr float addrspace(2)* %10, i32 %473
>  %475 = load float addrspace(2)* %474, !tbaa !0
>  %476 = fmul float %475, %379
>  %477 = fadd float %476, %448
>  %478 = fmul float %348, %367
>  %479 = fmul float %258, %24
>  %480 = fadd float %479, %226
>  %481 = fmul float %259, %24
>  %482 = fadd float %481, %227
>  %483 = fmul float %260, %24
>  %484 = fadd float %483, %228
>  %485 = fmul float %480, %456
>  %486 = fmul float %482, %463
>  %487 = fadd float %485, %486
>  %488 = fmul float %484, %470
>  %489 = fadd float %487, %488
>  %490 = fmul float %229, %477
>  %491 = fadd float %489, %490
>  %492 = fmul float %265, %24
>  %493 = fadd float %492, %368
>  %494 = fmul float %266, %24
>  %495 = fadd float %494, %369
>  %496 = fmul float %267, %24
>  %497 = fadd float %496, %478
>  %498 = fmul float %493, %456
>  %499 = fmul float %495, %463
>  %500 = fadd float %499, %498
>  %501 = fmul float %497, %470
>  %502 = fadd float %500, %501
>  %503 = fptosi float %374 to i32
>  %504 = bitcast i32 %503 to float
>  %505 = fptosi float %373 to i32
>  %506 = bitcast i32 %505 to float
>  %507 = fptosi float %372 to i32
>  %508 = bitcast i32 %507 to float
>  %509 = bitcast float %508 to i32
>  %510 = shl i32 %509, 4
>  %511 = add i32 %510, 864
>  %512 = udiv i32 %511, 4
>  %513 = getelementptr float addrspace(2)* %10, i32 %512
>  %514 = load float addrspace(2)* %513, !tbaa !0
>  %515 = fmul float %514, %375
>  %516 = shl i32 %509, 4
>  %517 = add i32 %516, 868
>  %518 = udiv i32 %517, 4
>  %519 = getelementptr float addrspace(2)* %10, i32 %518
>  %520 = load float addrspace(2)* %519, !tbaa !0
>  %521 = fmul float %520, %375
>  %522 = shl i32 %509, 4
>  %523 = add i32 %522, 872
>  %524 = udiv i32 %523, 4
>  %525 = getelementptr float addrspace(2)* %10, i32 %524
>  %526 = load float addrspace(2)* %525, !tbaa !0
>  %527 = fmul float %526, %375
>  %528 = shl i32 %509, 4
>  %529 = add i32 %528, 876
>  %530 = udiv i32 %529, 4
>  %531 = getelementptr float addrspace(2)* %10, i32 %530
>  %532 = load float addrspace(2)* %531, !tbaa !0
>  %533 = fmul float %532, %375
>  %534 = bitcast float %506 to i32
>  %535 = shl i32 %534, 4
>  %536 = add i32 %535, 864
>  %537 = udiv i32 %536, 4
>  %538 = getelementptr float addrspace(2)* %10, i32 %537
>  %539 = load float addrspace(2)* %538, !tbaa !0
>  %540 = fmul float %376, %539
>  %541 = fadd float %540, %515
>  %542 = shl i32 %534, 4
>  %543 = add i32 %542, 868
>  %544 = udiv i32 %543, 4
>  %545 = getelementptr float addrspace(2)* %10, i32 %544
>  %546 = load float addrspace(2)* %545, !tbaa !0
>  %547 = fmul float %376, %546
>  %548 = fadd float %547, %521
>  %549 = shl i32 %534, 4
>  %550 = add i32 %549, 872
>  %551 = udiv i32 %550, 4
>  %552 = getelementptr float addrspace(2)* %10, i32 %551
>  %553 = load float addrspace(2)* %552, !tbaa !0
>  %554 = fmul float %376, %553
>  %555 = fadd float %554, %527
>  %556 = shl i32 %534, 4
>  %557 = add i32 %556, 876
>  %558 = udiv i32 %557, 4
>  %559 = getelementptr float addrspace(2)* %10, i32 %558
>  %560 = load float addrspace(2)* %559, !tbaa !0
>  %561 = fmul float %376, %560
>  %562 = fadd float %561, %533
>  %563 = bitcast float %504 to i32
>  %564 = shl i32 %563, 4
>  %565 = add i32 %564, 864
>  %566 = udiv i32 %565, 4
>  %567 = getelementptr float addrspace(2)* %10, i32 %566
>  %568 = load float addrspace(2)* %567, !tbaa !0
>  %569 = fmul float %568, %379
>  %570 = fadd float %569, %541
>  %571 = shl i32 %563, 4
>  %572 = add i32 %571, 868
>  %573 = udiv i32 %572, 4
>  %574 = getelementptr float addrspace(2)* %10, i32 %573
>  %575 = load float addrspace(2)* %574, !tbaa !0
>  %576 = fmul float %575, %379
>  %577 = fadd float %576, %548
>  %578 = shl i32 %563, 4
>  %579 = add i32 %578, 872
>  %580 = udiv i32 %579, 4
>  %581 = getelementptr float addrspace(2)* %10, i32 %580
>  %582 = load float addrspace(2)* %581, !tbaa !0
>  %583 = fmul float %582, %379
>  %584 = fadd float %583, %555
>  %585 = shl i32 %563, 4
>  %586 = add i32 %585, 876
>  %587 = udiv i32 %586, 4
>  %588 = getelementptr float addrspace(2)* %10, i32 %587
>  %589 = load float addrspace(2)* %588, !tbaa !0
>  %590 = fmul float %589, %379
>  %591 = fadd float %590, %562
>  %592 = fptosi float %373 to i32
>  %593 = bitcast i32 %592 to float
>  %594 = bitcast float %593 to i32
>  %595 = add i32 %594, 1
>  %596 = bitcast i32 %595 to float
>  %597 = fptosi float %372 to i32
>  %598 = bitcast i32 %597 to float
>  %599 = bitcast float %598 to i32
>  %600 = add i32 %599, 1
>  %601 = bitcast i32 %600 to float
>  %602 = bitcast float %601 to i32
>  %603 = shl i32 %602, 4
>  %604 = add i32 %603, 864
>  %605 = udiv i32 %604, 4
>  %606 = getelementptr float addrspace(2)* %10, i32 %605
>  %607 = load float addrspace(2)* %606, !tbaa !0
>  %608 = fmul float %607, %375
>  %609 = shl i32 %602, 4
>  %610 = add i32 %609, 868
>  %611 = udiv i32 %610, 4
>  %612 = getelementptr float addrspace(2)* %10, i32 %611
>  %613 = load float addrspace(2)* %612, !tbaa !0
>  %614 = fmul float %613, %375
>  %615 = shl i32 %602, 4
>  %616 = add i32 %615, 872
>  %617 = udiv i32 %616, 4
>  %618 = getelementptr float addrspace(2)* %10, i32 %617
>  %619 = load float addrspace(2)* %618, !tbaa !0
>  %620 = fmul float %619, %375
>  %621 = shl i32 %602, 4
>  %622 = add i32 %621, 876
>  %623 = udiv i32 %622, 4
>  %624 = getelementptr float addrspace(2)* %10, i32 %623
>  %625 = load float addrspace(2)* %624, !tbaa !0
>  %626 = fmul float %625, %375
>  %627 = bitcast float %596 to i32
>  %628 = shl i32 %627, 4
>  %629 = add i32 %628, 864
>  %630 = udiv i32 %629, 4
>  %631 = getelementptr float addrspace(2)* %10, i32 %630
>  %632 = load float addrspace(2)* %631, !tbaa !0
>  %633 = fmul float %376, %632
>  %634 = fadd float %633, %608
>  %635 = shl i32 %627, 4
>  %636 = add i32 %635, 868
>  %637 = udiv i32 %636, 4
>  %638 = getelementptr float addrspace(2)* %10, i32 %637
>  %639 = load float addrspace(2)* %638, !tbaa !0
>  %640 = fmul float %376, %639
>  %641 = fadd float %640, %614
>  %642 = shl i32 %627, 4
>  %643 = add i32 %642, 872
>  %644 = udiv i32 %643, 4
>  %645 = getelementptr float addrspace(2)* %10, i32 %644
>  %646 = load float addrspace(2)* %645, !tbaa !0
>  %647 = fmul float %376, %646
>  %648 = fadd float %647, %620
>  %649 = shl i32 %627, 4
>  %650 = add i32 %649, 876
>  %651 = udiv i32 %650, 4
>  %652 = getelementptr float addrspace(2)* %10, i32 %651
>  %653 = load float addrspace(2)* %652, !tbaa !0
>  %654 = fmul float %376, %653
>  %655 = fadd float %654, %626
>  %656 = fptosi float %374 to i32
>  %657 = bitcast i32 %656 to float
>  %658 = bitcast float %657 to i32
>  %659 = add i32 %658, 1
>  %660 = bitcast i32 %659 to float
>  %661 = bitcast float %660 to i32
>  %662 = shl i32 %661, 4
>  %663 = add i32 %662, 864
>  %664 = udiv i32 %663, 4
>  %665 = getelementptr float addrspace(2)* %10, i32 %664
>  %666 = load float addrspace(2)* %665, !tbaa !0
>  %667 = fmul float %666, %379
>  %668 = fadd float %667, %634
>  %669 = shl i32 %661, 4
>  %670 = add i32 %669, 868
>  %671 = udiv i32 %670, 4
>  %672 = getelementptr float addrspace(2)* %10, i32 %671
>  %673 = load float addrspace(2)* %672, !tbaa !0
>  %674 = fmul float %673, %379
>  %675 = fadd float %674, %641
>  %676 = shl i32 %661, 4
>  %677 = add i32 %676, 872
>  %678 = udiv i32 %677, 4
>  %679 = getelementptr float addrspace(2)* %10, i32 %678
>  %680 = load float addrspace(2)* %679, !tbaa !0
>  %681 = fmul float %680, %379
>  %682 = fadd float %681, %648
>  %683 = shl i32 %661, 4
>  %684 = add i32 %683, 876
>  %685 = udiv i32 %684, 4
>  %686 = getelementptr float addrspace(2)* %10, i32 %685
>  %687 = load float addrspace(2)* %686, !tbaa !0
>  %688 = fmul float %687, %379
>  %689 = fadd float %688, %655
>  %690 = fmul float %493, %570
>  %691 = fmul float %495, %577
>  %692 = fadd float %691, %690
>  %693 = fmul float %497, %584
>  %694 = fadd float %692, %693
>  %695 = fmul float %493, %668
>  %696 = fmul float %495, %675
>  %697 = fadd float %696, %695
>  %698 = fmul float %497, %682
>  %699 = fadd float %697, %698
>  %700 = fmul float %694, %694
>  %701 = fmul float %699, %699
>  %702 = fadd float %701, %700
>  %703 = fmul float %502, %502
>  %704 = fadd float %702, %703
>  %705 = call float @llvm.AMDGPU.rsq(float %704)
>  %706 = fmul float %694, %705
>  %707 = fmul float %699, %705
>  %708 = fmul float %502, %705
>  %709 = fmul float %480, %570
>  %710 = fmul float %482, %577
>  %711 = fadd float %709, %710
>  %712 = fmul float %484, %584
>  %713 = fadd float %711, %712
>  %714 = fmul float %229, %591
>  %715 = fadd float %713, %714
>  %716 = fmul float %480, %668
>  %717 = fmul float %482, %675
>  %718 = fadd float %716, %717
>  %719 = fmul float %484, %682
>  %720 = fadd float %718, %719
>  %721 = fmul float %229, %689
>  %722 = fadd float %720, %721
>  %723 = fsub float -0.000000e+00, %715
>  %724 = fadd float %723, %18
>  %725 = fsub float -0.000000e+00, %722
>  %726 = fadd float %725, %20
>  %727 = fsub float -0.000000e+00, %491
>  %728 = fadd float %727, %22
>  %729 = bitcast float %216 to i32
>  %730 = icmp ne i32 %729, 0
>  br i1 %730, label %IF, label %ENDIF
>
>IF:                                               ; preds = %main_body
>  %731 = fadd float %723, %78
>  %732 = fsub float -0.000000e+00, %722
>  %733 = fadd float %732, %80
>  %734 = fsub float -0.000000e+00, %491
>  %735 = fadd float %734, %82
>  %736 = fmul float %731, %731
>  %737 = fmul float %733, %733
>  %738 = fadd float %737, %736
>  %739 = fmul float %735, %735
>  %740 = fadd float %738, %739
>  %741 = call float @llvm.AMDGPU.rsq(float %740)
>  %742 = fmul float %731, %741
>  %743 = fmul float %733, %741
>  %744 = fmul float %735, %741
>  %745 = fsub float -0.000000e+00, %742
>  %746 = fsub float -0.000000e+00, %743
>  %747 = fsub float -0.000000e+00, %744
>  %748 = fmul float %70, %745
>  %749 = fmul float %72, %746
>  %750 = fadd float %749, %748
>  %751 = fmul float %74, %747
>  %752 = fadd float %750, %751
>  %753 = fsub float -0.000000e+00, %86
>  %754 = fadd float %752, %753
>  %755 = fmul float %754, %88
>  %756 = fmul float %14, %14
>  %757 = fmul float %740, %741
>  %758 = fmul float %740, %14
>  %759 = fcmp uge float %755, 0x3F1A36E2E0000000
>  %760 = select i1 %759, float %755, float 0x3F1A36E2E0000000
>  %761 = fmul float %90, %756
>  %762 = fmul float %92, %757
>  %763 = fadd float %762, %761
>  %764 = fmul float %94, %758
>  %765 = fadd float %763, %764
>  %766 = call float @llvm.pow.f32(float %760, float %84)
>  %767 = fdiv float 1.000000e+00, %765
>  %768 = fcmp uge float %766, %14
>  %769 = select i1 %768, float %14, float %766
>  %770 = fsub float -0.000000e+00, %767
>  %771 = fmul float %767, %769
>  %772 = fadd float %771, %770
>  %773 = fmul float %76, %772
>  %774 = fadd float %773, %767
>  %775 = fsub float -0.000000e+00, %774
>  %776 = fadd float %775, %14
>  %777 = fmul float %68, %776
>  %778 = fadd float %777, %774
>  br label %ENDIF
>
>ENDIF:                                            ; preds = %main_body, %IF
>  %temp24.0 = phi float [ %778, %IF ], [ %12, %main_body ]
>  %779 = bitcast float %218 to i32
>  %780 = icmp ne i32 %779, 0
>  br i1 %780, label %IF84, label %ENDIF83
>
>IF84:                                             ; preds = %ENDIF
>  %781 = fsub float -0.000000e+00, %715
>  %782 = fadd float %781, %106
>  %783 = fsub float -0.000000e+00, %722
>  %784 = fadd float %783, %108
>  %785 = fsub float -0.000000e+00, %491
>  %786 = fadd float %785, %110
>  %787 = fmul float %782, %782
>  %788 = fmul float %784, %784
>  %789 = fadd float %788, %787
>  %790 = fmul float %786, %786
>  %791 = fadd float %789, %790
>  %792 = call float @llvm.AMDGPU.rsq(float %791)
>  %793 = fmul float %782, %792
>  %794 = fmul float %784, %792
>  %795 = fmul float %786, %792
>  %796 = fsub float -0.000000e+00, %793
>  %797 = fsub float -0.000000e+00, %794
>  %798 = fsub float -0.000000e+00, %795
>  %799 = fmul float %98, %796
>  %800 = fmul float %100, %797
>  %801 = fadd float %800, %799
>  %802 = fmul float %102, %798
>  %803 = fadd float %801, %802
>  %804 = fsub float -0.000000e+00, %114
>  %805 = fadd float %803, %804
>  %806 = fmul float %805, %116
>  %807 = fmul float %14, %14
>  %808 = fmul float %791, %792
>  %809 = fmul float %791, %14
>  %810 = fcmp uge float %806, 0x3F1A36E2E0000000
>  %811 = select i1 %810, float %806, float 0x3F1A36E2E0000000
>  %812 = fmul float %118, %807
>  %813 = fmul float %120, %808
>  %814 = fadd float %813, %812
>  %815 = fmul float %122, %809
>  %816 = fadd float %814, %815
>  %817 = call float @llvm.pow.f32(float %811, float %112)
>  %818 = fdiv float 1.000000e+00, %816
>  %819 = fcmp uge float %817, %14
>  %820 = select i1 %819, float %14, float %817
>  %821 = fsub float -0.000000e+00, %818
>  %822 = fmul float %818, %820
>  %823 = fadd float %822, %821
>  %824 = fmul float %104, %823
>  %825 = fadd float %824, %818
>  %826 = fsub float -0.000000e+00, %825
>  %827 = fadd float %826, %14
>  %828 = fmul float %96, %827
>  %829 = fadd float %828, %825
>  br label %ENDIF83
>
>ENDIF83:                                          ; preds = %ENDIF, %IF84
>  %temp25.0 = phi float [ %829, %IF84 ], [ %12, %ENDIF ]
>  %830 = bitcast float %220 to i32
>  %831 = icmp ne i32 %830, 0
>  br i1 %831, label %IF87, label %ENDIF86
>
>IF87:                                             ; preds = %ENDIF83
>  %832 = fsub float -0.000000e+00, %715
>  %833 = fadd float %832, %134
>  %834 = fsub float -0.000000e+00, %722
>  %835 = fadd float %834, %136
>  %836 = fsub float -0.000000e+00, %491
>  %837 = fadd float %836, %138
>  %838 = fmul float %833, %833
>  %839 = fmul float %835, %835
>  %840 = fadd float %839, %838
>  %841 = fmul float %837, %837
>  %842 = fadd float %840, %841
>  %843 = call float @llvm.AMDGPU.rsq(float %842)
>  %844 = fmul float %833, %843
>  %845 = fmul float %835, %843
>  %846 = fmul float %837, %843
>  %847 = fsub float -0.000000e+00, %844
>  %848 = fsub float -0.000000e+00, %845
>  %849 = fsub float -0.000000e+00, %846
>  %850 = fmul float %126, %847
>  %851 = fmul float %128, %848
>  %852 = fadd float %851, %850
>  %853 = fmul float %130, %849
>  %854 = fadd float %852, %853
>  %855 = fsub float -0.000000e+00, %142
>  %856 = fadd float %854, %855
>  %857 = fmul float %856, %144
>  %858 = fmul float %14, %14
>  %859 = fmul float %842, %843
>  %860 = fmul float %842, %14
>  %861 = fcmp uge float %857, 0x3F1A36E2E0000000
>  %862 = select i1 %861, float %857, float 0x3F1A36E2E0000000
>  %863 = fmul float %146, %858
>  %864 = fmul float %148, %859
>  %865 = fadd float %864, %863
>  %866 = fmul float %150, %860
>  %867 = fadd float %865, %866
>  %868 = call float @llvm.pow.f32(float %862, float %140)
>  %869 = fdiv float 1.000000e+00, %867
>  %870 = fcmp uge float %868, %14
>  %871 = select i1 %870, float %14, float %868
>  %872 = fsub float -0.000000e+00, %869
>  %873 = fmul float %869, %871
>  %874 = fadd float %873, %872
>  %875 = fmul float %132, %874
>  %876 = fadd float %875, %869
>  %877 = fsub float -0.000000e+00, %876
>  %878 = fadd float %877, %14
>  %879 = fmul float %124, %878
>  %880 = fadd float %879, %876
>  br label %ENDIF86
>
>ENDIF86:                                          ; preds = %ENDIF83, %IF87
>  %temp26.0 = phi float [ %880, %IF87 ], [ %12, %ENDIF83 ]
>  %881 = bitcast float %222 to i32
>  %882 = icmp ne i32 %881, 0
>  br i1 %882, label %IF90, label %ENDIF89
>
>IF90:                                             ; preds = %ENDIF86
>  %883 = fsub float -0.000000e+00, %715
>  %884 = fadd float %883, %162
>  %885 = fsub float -0.000000e+00, %722
>  %886 = fadd float %885, %164
>  %887 = fsub float -0.000000e+00, %491
>  %888 = fadd float %887, %166
>  %889 = fmul float %884, %884
>  %890 = fmul float %886, %886
>  %891 = fadd float %890, %889
>  %892 = fmul float %888, %888
>  %893 = fadd float %891, %892
>  %894 = call float @llvm.AMDGPU.rsq(float %893)
>  %895 = fmul float %884, %894
>  %896 = fmul float %886, %894
>  %897 = fmul float %888, %894
>  %898 = fsub float -0.000000e+00, %895
>  %899 = fsub float -0.000000e+00, %896
>  %900 = fsub float -0.000000e+00, %897
>  %901 = fmul float %154, %898
>  %902 = fmul float %156, %899
>  %903 = fadd float %902, %901
>  %904 = fmul float %158, %900
>  %905 = fadd float %903, %904
>  %906 = fsub float -0.000000e+00, %170
>  %907 = fadd float %905, %906
>  %908 = fmul float %907, %172
>  %909 = fmul float %14, %14
>  %910 = fmul float %893, %894
>  %911 = fmul float %893, %14
>  %912 = fcmp uge float %908, 0x3F1A36E2E0000000
>  %913 = select i1 %912, float %908, float 0x3F1A36E2E0000000
>  %914 = fmul float %174, %909
>  %915 = fmul float %176, %910
>  %916 = fadd float %915, %914
>  %917 = fmul float %178, %911
>  %918 = fadd float %916, %917
>  %919 = call float @llvm.pow.f32(float %913, float %168)
>  %920 = fdiv float 1.000000e+00, %918
>  %921 = fcmp uge float %919, %14
>  %922 = select i1 %921, float %14, float %919
>  %923 = fsub float -0.000000e+00, %920
>  %924 = fmul float %920, %922
>  %925 = fadd float %924, %923
>  %926 = fmul float %160, %925
>  %927 = fadd float %926, %920
>  %928 = fsub float -0.000000e+00, %927
>  %929 = fadd float %928, %14
>  %930 = fmul float %152, %929
>  %931 = fadd float %930, %927
>  br label %ENDIF89
>
>ENDIF89:                                          ; preds = %ENDIF86, %IF90
>  %temp12.0 = phi float [ %931, %IF90 ], [ %12, %ENDIF86 ]
>  %932 = fmul float %715, %60
>  %933 = fmul float %722, %62
>  %934 = fadd float %932, %933
>  %935 = fmul float %491, %64
>  %936 = fadd float %934, %935
>  %937 = fmul float %14, %66
>  %938 = fadd float %936, %937
>  %939 = fmul float %261, %26
>  %940 = fmul float %715, %28
>  %941 = fmul float %722, %30
>  %942 = fadd float %940, %941
>  %943 = fmul float %491, %32
>  %944 = fadd float %942, %943
>  %945 = fmul float %14, %34
>  %946 = fadd float %944, %945
>  %947 = fmul float %715, %36
>  %948 = fmul float %722, %38
>  %949 = fadd float %947, %948
>  %950 = fmul float %491, %40
>  %951 = fadd float %949, %950
>  %952 = fmul float %14, %42
>  %953 = fadd float %951, %952
>  %954 = fmul float %715, %44
>  %955 = fmul float %722, %46
>  %956 = fadd float %954, %955
>  %957 = fmul float %491, %48
>  %958 = fadd float %956, %957
>  %959 = fmul float %14, %50
>  %960 = fadd float %958, %959
>  %961 = fmul float %715, %52
>  %962 = fmul float %722, %54
>  %963 = fadd float %961, %962
>  %964 = fmul float %491, %56
>  %965 = fadd float %963, %964
>  %966 = fmul float %14, %58
>  %967 = fadd float %965, %966
>  %968 = fmul float %251, %180
>  %969 = fmul float %252, %182
>  %970 = fadd float %968, %969
>  %971 = fmul float %253, %184
>  %972 = fadd float %970, %971
>  %973 = fmul float %254, %186
>  %974 = fadd float %972, %973
>  %975 = fmul float %251, %188
>  %976 = fmul float %252, %190
>  %977 = fadd float %975, %976
>  %978 = fmul float %253, %192
>  %979 = fadd float %977, %978
>  %980 = fmul float %254, %194
>  %981 = fadd float %979, %980
>  %982 = fmul float %251, %196
>  %983 = fmul float %252, %198
>  %984 = fadd float %982, %983
>  %985 = fmul float %253, %200
>  %986 = fadd float %984, %985
>  %987 = fmul float %254, %202
>  %988 = fadd float %986, %987
>  %989 = fmul float %251, %204
>  %990 = fmul float %252, %206
>  %991 = fadd float %989, %990
>  %992 = fmul float %253, %208
>  %993 = fadd float %991, %992
>  %994 = fmul float %254, %210
>  %995 = fadd float %993, %994
>  %996 = fsub float -0.000000e+00, %967
>  %997 = fmul float %960, %16
>  %998 = fadd float %997, %996
>  %999 = fsub float -0.000000e+00, %953
>  %1000 = fmul float %212, %967
>  %1001 = fadd float %1000, %946
>  %1002 = fmul float %214, %967
>  %1003 = fadd float %1002, %999
>  %1004 = getelementptr float addrspace(2)* addrspace(2)* %0, i32 1
>  %1005 = load float addrspace(2)* addrspace(2)* %1004, !tbaa !0
>  %1006 = getelementptr float addrspace(2)* %1005, i32 0
>  %1007 = load float addrspace(2)* %1006, !tbaa !0
>  %1008 = fmul float %1007, %946
>  %1009 = getelementptr float addrspace(2)* %1005, i32 1
>  %1010 = load float addrspace(2)* %1009, !tbaa !0
>  %1011 = fmul float %1010, %953
>  %1012 = fadd float %1008, %1011
>  %1013 = getelementptr float addrspace(2)* %1005, i32 2
>  %1014 = load float addrspace(2)* %1013, !tbaa !0
>  %1015 = fmul float %1014, %960
>  %1016 = fadd float %1012, %1015
>  %1017 = getelementptr float addrspace(2)* %1005, i32 3
>  %1018 = load float addrspace(2)* %1017, !tbaa !0
>  %1019 = fmul float %1018, %967
>  %1020 = fadd float %1016, %1019
>  %1021 = getelementptr float addrspace(2)* %1005, i32 4
>  %1022 = load float addrspace(2)* %1021, !tbaa !0
>  %1023 = fmul float %1022, %946
>  %1024 = getelementptr float addrspace(2)* %1005, i32 5
>  %1025 = load float addrspace(2)* %1024, !tbaa !0
>  %1026 = fmul float %1025, %953
>  %1027 = fadd float %1023, %1026
>  %1028 = getelementptr float addrspace(2)* %1005, i32 6
>  %1029 = load float addrspace(2)* %1028, !tbaa !0
>  %1030 = fmul float %1029, %960
>  %1031 = fadd float %1027, %1030
>  %1032 = getelementptr float addrspace(2)* %1005, i32 7
>  %1033 = load float addrspace(2)* %1032, !tbaa !0
>  %1034 = fmul float %1033, %967
>  %1035 = fadd float %1031, %1034
>  %1036 = getelementptr float addrspace(2)* %1005, i32 8
>  %1037 = load float addrspace(2)* %1036, !tbaa !0
>  %1038 = fmul float %1037, %946
>  %1039 = getelementptr float addrspace(2)* %1005, i32 9
>  %1040 = load float addrspace(2)* %1039, !tbaa !0
>  %1041 = fmul float %1040, %953
>  %1042 = fadd float %1038, %1041
>  %1043 = getelementptr float addrspace(2)* %1005, i32 10
>  %1044 = load float addrspace(2)* %1043, !tbaa !0
>  %1045 = fmul float %1044, %960
>  %1046 = fadd float %1042, %1045
>  %1047 = getelementptr float addrspace(2)* %1005, i32 11
>  %1048 = load float addrspace(2)* %1047, !tbaa !0
>  %1049 = fmul float %1048, %967
>  %1050 = fadd float %1046, %1049
>  %1051 = getelementptr float addrspace(2)* %1005, i32 12
>  %1052 = load float addrspace(2)* %1051, !tbaa !0
>  %1053 = fmul float %1052, %946
>  %1054 = getelementptr float addrspace(2)* %1005, i32 13
>  %1055 = load float addrspace(2)* %1054, !tbaa !0
>  %1056 = fmul float %1055, %953
>  %1057 = fadd float %1053, %1056
>  %1058 = getelementptr float addrspace(2)* %1005, i32 14
>  %1059 = load float addrspace(2)* %1058, !tbaa !0
>  %1060 = fmul float %1059, %960
>  %1061 = fadd float %1057, %1060
>  %1062 = getelementptr float addrspace(2)* %1005, i32 15
>  %1063 = load float addrspace(2)* %1062, !tbaa !0
>  %1064 = fmul float %1063, %967
>  %1065 = fadd float %1061, %1064
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 14, i32 0, float %1020, float %1035, float %1050, float %1065)
>  %1066 = getelementptr float addrspace(2)* %1005, i32 16
>  %1067 = load float addrspace(2)* %1066, !tbaa !0
>  %1068 = fmul float %1067, %946
>  %1069 = getelementptr float addrspace(2)* %1005, i32 17
>  %1070 = load float addrspace(2)* %1069, !tbaa !0
>  %1071 = fmul float %1070, %953
>  %1072 = fadd float %1068, %1071
>  %1073 = getelementptr float addrspace(2)* %1005, i32 18
>  %1074 = load float addrspace(2)* %1073, !tbaa !0
>  %1075 = fmul float %1074, %960
>  %1076 = fadd float %1072, %1075
>  %1077 = getelementptr float addrspace(2)* %1005, i32 19
>  %1078 = load float addrspace(2)* %1077, !tbaa !0
>  %1079 = fmul float %1078, %967
>  %1080 = fadd float %1076, %1079
>  %1081 = getelementptr float addrspace(2)* %1005, i32 20
>  %1082 = load float addrspace(2)* %1081, !tbaa !0
>  %1083 = fmul float %1082, %946
>  %1084 = getelementptr float addrspace(2)* %1005, i32 21
>  %1085 = load float addrspace(2)* %1084, !tbaa !0
>  %1086 = fmul float %1085, %953
>  %1087 = fadd float %1083, %1086
>  %1088 = getelementptr float addrspace(2)* %1005, i32 22
>  %1089 = load float addrspace(2)* %1088, !tbaa !0
>  %1090 = fmul float %1089, %960
>  %1091 = fadd float %1087, %1090
>  %1092 = getelementptr float addrspace(2)* %1005, i32 23
>  %1093 = load float addrspace(2)* %1092, !tbaa !0
>  %1094 = fmul float %1093, %967
>  %1095 = fadd float %1091, %1094
>  %1096 = getelementptr float addrspace(2)* %1005, i32 24
>  %1097 = load float addrspace(2)* %1096, !tbaa !0
>  %1098 = fmul float %1097, %946
>  %1099 = getelementptr float addrspace(2)* %1005, i32 25
>  %1100 = load float addrspace(2)* %1099, !tbaa !0
>  %1101 = fmul float %1100, %953
>  %1102 = fadd float %1098, %1101
>  %1103 = getelementptr float addrspace(2)* %1005, i32 26
>  %1104 = load float addrspace(2)* %1103, !tbaa !0
>  %1105 = fmul float %1104, %960
>  %1106 = fadd float %1102, %1105
>  %1107 = getelementptr float addrspace(2)* %1005, i32 27
>  %1108 = load float addrspace(2)* %1107, !tbaa !0
>  %1109 = fmul float %1108, %967
>  %1110 = fadd float %1106, %1109
>  %1111 = getelementptr float addrspace(2)* %1005, i32 28
>  %1112 = load float addrspace(2)* %1111, !tbaa !0
>  %1113 = fmul float %1112, %946
>  %1114 = getelementptr float addrspace(2)* %1005, i32 29
>  %1115 = load float addrspace(2)* %1114, !tbaa !0
>  %1116 = fmul float %1115, %953
>  %1117 = fadd float %1113, %1116
>  %1118 = getelementptr float addrspace(2)* %1005, i32 30
>  %1119 = load float addrspace(2)* %1118, !tbaa !0
>  %1120 = fmul float %1119, %960
>  %1121 = fadd float %1117, %1120
>  %1122 = getelementptr float addrspace(2)* %1005, i32 31
>  %1123 = load float addrspace(2)* %1122, !tbaa !0
>  %1124 = fmul float %1123, %967
>  %1125 = fadd float %1121, %1124
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 15, i32 0, float %1080, float %1095, float %1110, float %1125)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %974, float %981, float %988, float %995)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %temp24.0, float %temp25.0, float %temp26.0, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %724, float %726, float %728, float %591)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %706, float %707, float %708, float %303)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %715, float %722, float %491, float %temp12.0)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 37, i32 0, float %946, float %953, float %938, float %939)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %1001, float %1003, float %998, float %967)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readonly
>declare float @fabs(float) #2
>
>; Function Attrs: readnone
>declare float @llvm.AMDGPU.rsq(float) #3
>
>; Function Attrs: nounwind readonly
>declare float @llvm.pow.f32(float, float) #4
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readonly }
>attributes #3 = { readnone }
>attributes #4 = { nounwind readonly }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>ALSA lib pcm.c:7339:(snd_pcm_recover) underrun occurred
>Uploading dump (out-of-process) [proxy '']
>/tmp/dumps/crash_20130720113131_1.dmp
>/home/behem0th/Steam/SteamApps/common/Half-Life 2/hl2.sh: line 67: 25915 ÐÑÐ¸Ð±ÐºÐ° ÑÐµÐ³Ð¼ÐµÐ½ÑÐ¸ÑÐ¾Ð²Ð°Ð½Ð¸Ñ                   (core dumped) ${GAME_DEBUGGER} "${GAMEROOT}"/${GAMEEXE} "$@"
>Game removed: AppID 420 "Half-Life 2: Episode Two", ProcID 25915 
>Generating new string page texture 129: 384x256, total string texture memory is 909,31 KB
>unlinked 2 orphaned pipes
>CAsyncIOManager: 0 threads terminating.  0 reads, 0 writes, 0 deferrals.
>CAsyncIOManager: 13733 single object sleeps, 0 multi object sleeps
>CAsyncIOManager: 0 single object alertable sleeps, 2 multi object alertable sleeps
>Shutting down. . .
>[2013-07-20 11:33:03] Shutdown

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Attachments on bug 66805: 82327 | 82639 | 82707 | 82708 | 82709 | 82710 | 82711 | 82716 | 82717 | 82852 | 82858 | 82866 | 82875

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