Attachment 86503 Details for Bug 69790 – dmesg: 720x576 mode dislocated

dmesg: 720x576 mode dislocated

test.txt (text/plain), 126.11 KB, created by Qingshuai Tian on 2013-09-25 06:20:18 UTC

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Creator: Qingshuai Tian

Created: 2013-09-25 06:20:18 UTC

Size: 126.11 KB

patch

obsolete

>[  376.039768] [drm:drm_mode_debug_printmodeline], Modeline 49:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  376.039772] [drm:drm_mode_debug_printmodeline], Modeline 45:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  376.039774] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  376.039775] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  376.039778] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [NOCRTC]
>[  376.039779] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  376.039782] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  376.039783] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  376.039814] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  376.039825] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  376.039828] [drm:connected_sink_compute_bpp], [CONNECTOR:10:eDP-1] checking for sink bpp constrains
>[  376.039833] [drm:intel_dp_compute_config], DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  376.039835] [drm:intel_dp_compute_config], clamping bpp for eDP panel to BIOS-provided 18
>[  376.039838] [drm:intel_dp_compute_config], DP link bw 06 lane count 2 clock 162000 bpp 18
>[  376.039839] [drm:intel_dp_compute_config], DP link bw required 249804 available 259200
>[  376.039843] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 18, dithering: 1
>[  376.039845] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  376.039846] [drm:intel_dump_pipe_config], cpu_transcoder: P
>[  376.039847] [drm:intel_dump_pipe_config], pipe bpp: 18, dithering: 1
>[  376.039850] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  376.039852] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 4042260, gmch_n: 4194304, link_m: 224570, link_n: 262144, tu: 64
>[  376.039854] [drm:intel_dump_pipe_config], requested mode:
>[  376.039857] [drm:drm_mode_debug_printmodeline], Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  376.039858] [drm:intel_dump_pipe_config], adjusted mode:
>[  376.039861] [drm:drm_mode_debug_printmodeline], Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  376.039864] [drm:intel_dump_crtc_timings], crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  376.039865] [drm:intel_dump_pipe_config], port clock: 162000
>[  376.039867] [drm:intel_dump_pipe_config], pipe src size: 1920x1080
>[  376.039869] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  376.039871] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000
>[  376.039872] [drm:intel_dump_pipe_config], ips: 1
>[  376.039873] [drm:intel_dump_pipe_config], double wide: 0
>[  376.089871] [drm:ilk_check_wm], WM1: enabled
>[  376.089872] [drm:ilk_check_wm], WM2: enabled
>[  376.089874] [drm:ilk_check_wm], WM3: enabled
>[  376.089875] [drm:ilk_check_wm], WM4: enabled
>[  376.089886] [drm:intel_update_fbc], no output, disabling
>[  376.089892] [drm:__intel_set_power_well], Requesting to disable the power well
>[  376.089896] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
>[  376.089920] [drm:ironlake_update_plane], Writing base 000A1000 00000000 0 0 7680
>[  376.089925] [drm:intel_edp_psr_match_conditions], PSR disable by flag
>[  376.089929] [drm:intel_crtc_mode_set], [ENCODER:9:TMDS-9] set [MODE:0:1920x1080]
>[  376.089931] [drm:intel_ddi_mode_set], Preparing DDI mode on port A, pipe A
>[  376.089935] [drm:ironlake_edp_panel_vdd_on], Turn eDP VDD on
>[  376.089940] [drm:ironlake_wait_panel_power_cycle], Wait for panel power cycle
>[  376.089944] [drm:ironlake_wait_panel_status], mask b800000f value 00000000 status 00000000 control abcd0000
>[  376.089951] [drm:ironlake_edp_panel_vdd_on], PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  376.089953] [drm:ironlake_edp_panel_vdd_on], eDP was not running
>[  376.210819] [drm:ironlake_edp_panel_on], Turn eDP power on
>[  376.210824] [drm:ironlake_wait_panel_power_cycle], Wait for panel power cycle
>[  376.210830] [drm:ironlake_wait_panel_status], mask b800000f value 00000000 status 00000000 control abcd0008
>[  376.210835] [drm:ironlake_wait_panel_on], Wait for panel power on
>[  376.210839] [drm:ironlake_wait_panel_status], mask b000000f value 80000008 status 0000000a control abcd000b
>[  376.342772] [drm:ironlake_edp_panel_vdd_off], Turn eDP VDD off 1
>[  376.342783] [drm:ironlake_panel_vdd_off_sync], PP_STATUS: 0xabcd000b PP_CONTROL: 0x80000008
>[  376.394788] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  376.395396] [drm:intel_dp_start_link_train], clock recovery OK
>[  376.395399] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  376.396304] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  376.396467] [drm:ilk_check_wm], WM1: enabled
>[  376.396469] [drm:ilk_check_wm], WM2: enabled
>[  376.396471] [drm:ilk_check_wm], WM3: enabled
>[  376.396473] [drm:ilk_check_wm], WM4: enabled
>[  376.396475] [drm:ilk_check_wm], WM0: enabled
>[  376.447646] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  376.499657] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  376.499662] [drm:intel_update_fbc], framebuffer not tiled or fenced, disabling compression
>[  376.499828] [drm:ironlake_edp_backlight_on], 
>[  376.501636] [drm:intel_panel_actually_set_backlight], set backlight PWM = 765
>[  376.501640] [drm:intel_edp_psr_match_conditions], PSR disable by flag
>[  376.517627] [drm:intel_connector_check_state], [CONNECTOR:10:eDP-1]
>[  376.517632] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  376.517635] [drm:check_encoder_state], [ENCODER:17:TMDS-17]
>[  376.517638] [drm:check_crtc_state], [CRTC:3]
>[  376.517646] [drm:check_crtc_state], [CRTC:5]
>[  376.517649] [drm:check_crtc_state], [CRTC:7]
>[  376.517656] [drm:intel_crtc_set_config], [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  376.517659] [drm:intel_set_config_compute_mode_changes], inactive crtc, full mode set
>[  376.517662] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=1, fb_changed=0
>[  376.517664] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  376.517667] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  376.517670] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  376.517672] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  376.517676] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  376.517680] [drm:connected_sink_compute_bpp], [CONNECTOR:18:HDMI-A-1] checking for sink bpp constrains
>[  376.517690] [drm:intel_hdmi_compute_config], picking bpc to 8 for HDMI output
>[  376.517692] [drm:intel_hdmi_compute_config], forcing pipe bpc to 24 for HDMI
>[  376.517695] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  376.517698] [drm:intel_dump_pipe_config], [CRTC:5][modeset] config for pipe B
>[  376.517700] [drm:intel_dump_pipe_config], cpu_transcoder: B
>[  376.517702] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  376.517705] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  376.517708] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  376.517710] [drm:intel_dump_pipe_config], requested mode:
>[  376.517716] [drm:drm_mode_debug_printmodeline], Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5
>[  376.517717] [drm:intel_dump_pipe_config], adjusted mode:
>[  376.517723] [drm:drm_mode_debug_printmodeline], Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5
>[  376.517727] [drm:intel_dump_crtc_timings], crtc timings: 148500 1920 2008 2052 2200 1080 1082 1087 1125, type: 0x48 flags: 0x5
>[  376.517729] [drm:intel_dump_pipe_config], port clock: 148500
>[  376.517732] [drm:intel_dump_pipe_config], pipe src size: 1920x1080
>[  376.517735] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  376.517737] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000
>[  376.517739] [drm:intel_dump_pipe_config], ips: 0
>[  376.517741] [drm:intel_dump_pipe_config], double wide: 0
>[  376.517745] [drm:__intel_set_power_well], Enabling power well
>[  376.517750] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe B
>[  376.521328] [drm:intel_ddi_calculate_wrpll], WRPLL: 148500000Hz refresh rate with p=6, n2=33 r2=20
>[  376.521370] [drm:ironlake_update_plane], Writing base 000A1000 00000000 0 0 7680
>[  376.521375] [drm:intel_edp_psr_match_conditions], PSR disable by flag
>[  376.521379] [drm:intel_crtc_mode_set], [ENCODER:17:TMDS-17] set [MODE:0:1920x1080]
>[  376.521381] [drm:intel_ddi_mode_set], Preparing DDI mode on port C, pipe B
>[  376.521383] [drm:intel_ddi_mode_set], HDMI audio on pipe B on DDI
>[  376.521385] [drm:intel_ddi_mode_set], HDMI audio: write eld information
>[  376.521389] [drm:intel_write_eld], ELD on [CONNECTOR:18:HDMI-A-1], [ENCODER:17:TMDS-17]
>[  376.521391] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
>[  376.521393] [drm:haswell_write_eld], HDMI audio: enable codec
>[  376.572599] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  376.572602] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x      40
>[  376.572604] [drm:haswell_write_eld], HDMI audio: eld vld status=0x      50
>[  376.572607] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
>[  376.572609] [drm:haswell_write_eld], ELD on pipe B
>[  376.572615] [drm:haswell_write_eld], port num:0
>[  376.572616] [drm:haswell_write_eld], ELD size 9
>[  376.572794] [drm:ilk_check_wm], WM1: enabled
>[  376.572796] [drm:ilk_check_wm], WM2: enabled
>[  376.572799] [drm:ilk_check_wm], WM3: disabled
>[  376.572801] [drm:ilk_check_wm], WM0: enabled
>[  376.572803] [drm:ilk_check_wm], WM0: enabled
>[  376.624581] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  376.676563] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  376.676565] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  376.694561] [drm:intel_connector_check_state], [CONNECTOR:10:eDP-1]
>[  376.694565] [drm:intel_connector_check_state], [CONNECTOR:18:HDMI-A-1]
>[  376.694569] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  376.694572] [drm:check_encoder_state], [ENCODER:17:TMDS-17]
>[  376.694575] [drm:check_crtc_state], [CRTC:3]
>[  376.694582] [drm:check_crtc_state], [CRTC:5]
>[  376.694589] [drm:check_crtc_state], [CRTC:7]
>[  376.694593] [drm:intel_crtc_set_config], [CRTC:7] [NOFB]
>[  376.694596] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=0
>[  376.694599] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  376.694602] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  376.694607] [drm:intel_crtc_set_config], [CRTC:3] [FB:47] #connectors=1 (x y) (0 0)
>[  376.694611] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  376.694613] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  376.694616] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  376.694619] [drm:intel_crtc_set_config], [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  376.694622] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  376.694625] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  376.694628] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  376.694643] [drm:intel_crtc_set_config], [CRTC:3] [FB:47] #connectors=1 (x y) (0 0)
>[  376.694646] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  376.694649] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  376.694651] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  376.694654] [drm:intel_crtc_set_config], [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  376.694657] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  376.694660] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  376.694662] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  376.712469] [drm:i915_driver_open], 
>[  376.712488] [drm:i915_driver_open], 
>[  376.713322] [drm:intel_crtc_cursor_set], cursor off
>[  376.713328] [drm:intel_crtc_set_config], [CRTC:3] [FB:47] #connectors=1 (x y) (0 0)
>[  376.713334] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  376.713340] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  376.713345] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  376.713350] [drm:intel_crtc_cursor_set], cursor off
>[  376.713353] [drm:intel_crtc_set_config], [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  376.713358] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  376.713363] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  376.713367] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  376.713372] [drm:intel_crtc_cursor_set], cursor off
>[  376.713375] [drm:intel_crtc_set_config], [CRTC:7] [NOFB]
>[  376.713380] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=0
>[  376.713385] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  376.713389] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  393.768606] [drm:i915_driver_open], 
>[  393.768631] [drm:intel_crtc_cursor_set], cursor off
>[  393.768634] [drm:intel_crtc_set_config], [CRTC:3] [FB:47] #connectors=1 (x y) (0 0)
>[  393.768639] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  393.768643] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  393.768646] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  393.768649] [drm:intel_crtc_cursor_set], cursor off
>[  393.768652] [drm:intel_crtc_set_config], [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  393.768655] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  393.768658] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  393.768661] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  393.768663] [drm:intel_crtc_cursor_set], cursor off
>[  393.768665] [drm:intel_crtc_set_config], [CRTC:7] [NOFB]
>[  393.768668] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=0
>[  393.768671] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  393.768673] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  393.768680] [drm:i915_driver_open], 
>[  393.769212] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[2] ENCODERS[2]
>[  393.769225] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[2] ENCODERS[2]
>[  393.769240] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[2] ENCODERS[2]
>[  393.769243] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[2] ENCODERS[2]
>[  393.769250] [drm:drm_mode_getconnector], [CONNECTOR:18:?]
>[  393.769254] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:HDMI-A-1]
>[  393.769261] [drm:intel_hdmi_detect], [CONNECTOR:18:HDMI-A-1]
>[  393.794424] [drm:drm_detect_monitor_audio], Monitor has basic audio support
>[  393.819780] [drm:drm_edid_to_eld], ELD monitor VP2770 SERIES
>[  393.819786] [drm:parse_hdmi_vsdb], HDMI: DVI dual 1, max TMDS clock 270, latency present 0 0, video latency 0 0, audio latency 0 0
>[  393.819790] [drm:drm_edid_to_eld], ELD size 9, SAD count 1
>[  393.819873] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:HDMI-A-1] probed modes :
>[  393.819876] [drm:drm_mode_debug_printmodeline], Modeline 20:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5
>[  393.819881] [drm:drm_mode_debug_printmodeline], Modeline 21:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  393.819885] [drm:drm_mode_debug_printmodeline], Modeline 66:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  393.819888] [drm:drm_mode_debug_printmodeline], Modeline 22:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  393.819892] [drm:drm_mode_debug_printmodeline], Modeline 67:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  393.819896] [drm:drm_mode_debug_printmodeline], Modeline 56:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  393.819900] [drm:drm_mode_debug_printmodeline], Modeline 57:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  393.819904] [drm:drm_mode_debug_printmodeline], Modeline 26:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
>[  393.819907] [drm:drm_mode_debug_printmodeline], Modeline 25:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[  393.819911] [drm:drm_mode_debug_printmodeline], Modeline 27:"1600x900" 60 118963 1600 1696 1864 2128 900 901 904 932 0x0 0x6
>[  393.819915] [drm:drm_mode_debug_printmodeline], Modeline 37:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  393.819918] [drm:drm_mode_debug_printmodeline], Modeline 29:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  393.819922] [drm:drm_mode_debug_printmodeline], Modeline 28:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[  393.819925] [drm:drm_mode_debug_printmodeline], Modeline 44:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  393.819929] [drm:drm_mode_debug_printmodeline], Modeline 23:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  393.819933] [drm:drm_mode_debug_printmodeline], Modeline 68:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  393.819936] [drm:drm_mode_debug_printmodeline], Modeline 58:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  393.819940] [drm:drm_mode_debug_printmodeline], Modeline 63:"1440x576" 50 54000 1440 1464 1592 1728 576 581 586 625 0x40 0xa
>[  393.819943] [drm:drm_mode_debug_printmodeline], Modeline 61:"1440x576i" 50 27000 1440 1464 1590 1728 576 580 586 625 0x40 0x101a
>[  393.819947] [drm:drm_mode_debug_printmodeline], Modeline 38:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  393.819951] [drm:drm_mode_debug_printmodeline], Modeline 39:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[  393.819954] [drm:drm_mode_debug_printmodeline], Modeline 40:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  393.819958] [drm:drm_mode_debug_printmodeline], Modeline 80:"1440x480" 60 54054 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[  393.819961] [drm:drm_mode_debug_printmodeline], Modeline 54:"1440x480" 60 54000 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[  393.819965] [drm:drm_mode_debug_printmodeline], Modeline 76:"1440x480i" 60 27027 1440 1478 1602 1716 480 488 494 525 0x40 0x101a
>[  393.819969] [drm:drm_mode_debug_printmodeline], Modeline 50:"1440x480i" 60 27000 1440 1478 1602 1716 480 488 494 525 0x40 0x101a
>[  393.819972] [drm:drm_mode_debug_printmodeline], Modeline 41:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[  393.819976] [drm:drm_mode_debug_printmodeline], Modeline 42:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  393.819980] [drm:drm_mode_debug_printmodeline], Modeline 43:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  393.819983] [drm:drm_mode_debug_printmodeline], Modeline 30:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  393.819987] [drm:drm_mode_debug_printmodeline], Modeline 31:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  393.819991] [drm:drm_mode_debug_printmodeline], Modeline 59:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  393.819994] [drm:drm_mode_debug_printmodeline], Modeline 69:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  393.819998] [drm:drm_mode_debug_printmodeline], Modeline 78:"1440x240" 60 27027 1440 1478 1602 1716 240 244 247 262 0x40 0x100a
>[  393.820002] [drm:drm_mode_debug_printmodeline], Modeline 24:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  393.820005] [drm:drm_mode_debug_printmodeline], Modeline 52:"1440x240" 60 27000 1440 1478 1602 1716 240 244 247 262 0x40 0x100a
>[  393.820009] [drm:drm_mode_debug_printmodeline], Modeline 32:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  393.820012] [drm:drm_mode_debug_printmodeline], Modeline 33:"640x480" 73 31500 640 664 704 832 480 489 491 520 0x40 0xa
>[  393.820016] [drm:drm_mode_debug_printmodeline], Modeline 34:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[  393.820020] [drm:drm_mode_debug_printmodeline], Modeline 35:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  393.820023] [drm:drm_mode_debug_printmodeline], Modeline 65:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  393.820027] [drm:drm_mode_debug_printmodeline], Modeline 36:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  393.820052] [drm:drm_mode_getconnector], [CONNECTOR:18:?]
>[  393.820081] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[2] ENCODERS[2]
>[  393.820085] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[2] ENCODERS[2]
>[  393.820109] [drm:drm_mode_addfb], [FB:48]
>[  393.958298] [drm:drm_mode_setcrtc], [CRTC:3]
>[  393.958321] [drm:drm_mode_setcrtc], [CONNECTOR:18:HDMI-A-1]
>[  393.958334] [drm:intel_crtc_set_config], [CRTC:3] [FB:48] #connectors=1 (x y) (0 0)
>[  393.958343] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  393.958346] [drm:drm_mode_debug_printmodeline], Modeline 45:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  393.958353] [drm:drm_mode_debug_printmodeline], Modeline 49:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  393.958359] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=0
>[  393.958363] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [NOCRTC]
>[  393.958380] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  393.958384] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:3]
>[  393.958388] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  393.958397] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  393.958401] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 2
>[  393.958411] [drm:connected_sink_compute_bpp], [CONNECTOR:18:HDMI-A-1] checking for sink bpp constrains
>[  393.958414] [drm:connected_sink_compute_bpp], clamping display bpp (was 30) to default limit of 24
>[  393.958422] [drm:intel_hdmi_compute_config], picking bpc to 8 for HDMI output
>[  393.958436] [drm:intel_hdmi_compute_config], forcing pipe bpc to 24 for HDMI
>[  393.958441] [drm:intel_modeset_pipe_config], plane bpp: 30, pipe bpp: 24, dithering: 1
>[  393.958445] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  393.958449] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  393.958452] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 1
>[  393.958455] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  393.958460] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  393.958464] [drm:intel_dump_pipe_config], requested mode:
>[  393.958467] [drm:drm_mode_debug_printmodeline], Modeline 0:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  393.958473] [drm:intel_dump_pipe_config], adjusted mode:
>[  393.958476] [drm:drm_mode_debug_printmodeline], Modeline 0:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  393.958482] [drm:intel_dump_crtc_timings], crtc timings: 27000 720 732 796 864 576 581 586 625, type: 0x40 flags: 0xa
>[  393.958488] [drm:intel_dump_pipe_config], port clock: 27000
>[  393.958491] [drm:intel_dump_pipe_config], pipe src size: 720x576
>[  393.958495] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  393.958499] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000
>[  393.958503] [drm:intel_dump_pipe_config], ips: 1
>[  393.958506] [drm:intel_dump_pipe_config], double wide: 0
>[  393.988398] [drm:ilk_check_wm], WM1: enabled
>[  393.988405] [drm:ilk_check_wm], WM2: enabled
>[  393.988407] [drm:ilk_check_wm], WM3: enabled
>[  393.988410] [drm:ilk_check_wm], WM4: enabled
>[  393.988412] [drm:ilk_check_wm], WM0: enabled
>[  393.988423] [drm:intel_update_fbc], framebuffer not tiled or fenced, disabling compression
>[  393.988428] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
>[  393.990389] [drm:intel_panel_actually_set_backlight], set backlight PWM = 0
>[  393.990400] [drm:ironlake_edp_backlight_off], 
>[  394.227308] [drm:ironlake_edp_panel_vdd_on], Turn eDP VDD on
>[  394.227316] [drm:ironlake_edp_panel_vdd_on], eDP VDD already on
>[  394.227319] [drm:ironlake_edp_panel_off], Turn eDP power off
>[  394.227325] [drm:ironlake_wait_panel_off], Wait for panel power off time
>[  394.227330] [drm:ironlake_wait_panel_status], mask b000000f value 00000000 status 80000008 control abcd0000
>[  395.063007] [drm:ilk_check_wm], WM1: enabled
>[  395.063014] [drm:ilk_check_wm], WM2: enabled
>[  395.063017] [drm:ilk_check_wm], WM3: enabled
>[  395.063019] [drm:ilk_check_wm], WM4: enabled
>[  395.063030] [drm:intel_update_fbc], no output, disabling
>[  395.063038] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
>[  395.065406] [drm:intel_ddi_calculate_wrpll], WRPLL: 27000000Hz refresh rate with p=30, n2=21 r2=14
>[  395.066492] [drm:ironlake_update_plane], Writing base 0088B000 00000000 0 0 2880
>[  395.066500] [drm:intel_edp_psr_match_conditions], PSR disable by flag
>[  395.066505] [drm:intel_crtc_mode_set], [ENCODER:17:TMDS-17] set [MODE:0:720x576]
>[  395.066508] [drm:intel_ddi_mode_set], Preparing DDI mode on port C, pipe A
>[  395.066510] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
>[  395.066512] [drm:intel_ddi_mode_set], HDMI audio: write eld information
>[  395.066516] [drm:intel_write_eld], ELD on [CONNECTOR:18:HDMI-A-1], [ENCODER:17:TMDS-17]
>[  395.066520] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
>[  395.066522] [drm:haswell_write_eld], HDMI audio: enable codec
>[  395.117975] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  395.117981] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       4
>[  395.117985] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
>[  395.117988] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
>[  395.117991] [drm:haswell_write_eld], ELD on pipe A
>[  395.117997] [drm:haswell_write_eld], port num:0
>[  395.117999] [drm:haswell_write_eld], ELD size 9
>[  395.118174] [drm:ilk_check_wm], WM1: enabled
>[  395.118177] [drm:ilk_check_wm], WM2: enabled
>[  395.118179] [drm:ilk_check_wm], WM3: enabled
>[  395.118181] [drm:ilk_check_wm], WM4: enabled
>[  395.118184] [drm:ilk_check_wm], WM0: enabled
>[  395.169957] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  395.221943] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  395.221954] [drm:intel_update_fbc], framebuffer not tiled or fenced, disabling compression
>[  395.243942] [drm:intel_connector_check_state], [CONNECTOR:18:HDMI-A-1]
>[  395.243950] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  395.243954] [drm:check_encoder_state], [ENCODER:17:TMDS-17]
>[  395.243957] [drm:check_crtc_state], [CRTC:3]
>[  395.243966] [drm:check_crtc_state], [CRTC:5]
>[  395.243969] [drm:check_crtc_state], [CRTC:7]
>[  395.263627] [drm:ivb_err_int_handler], Pipe A FIFO underrun
>[  409.739409] [drm:intel_crtc_set_config], [CRTC:3] [FB:47] #connectors=1 (x y) (0 0)
>[  409.739413] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  409.739417] [drm:drm_mode_debug_printmodeline], Modeline 49:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  409.739421] [drm:drm_mode_debug_printmodeline], Modeline 45:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  409.739423] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=0
>[  409.739425] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  409.739427] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [NOCRTC]
>[  409.739428] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  409.739431] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  409.739432] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  409.739434] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  409.739437] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  409.739440] [drm:connected_sink_compute_bpp], [CONNECTOR:10:eDP-1] checking for sink bpp constrains
>[  409.739445] [drm:intel_dp_compute_config], DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  409.739446] [drm:intel_dp_compute_config], clamping bpp for eDP panel to BIOS-provided 18
>[  409.739449] [drm:intel_dp_compute_config], DP link bw 06 lane count 2 clock 162000 bpp 18
>[  409.739450] [drm:intel_dp_compute_config], DP link bw required 249804 available 259200
>[  409.739454] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 18, dithering: 1
>[  409.739456] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  409.739457] [drm:intel_dump_pipe_config], cpu_transcoder: P
>[  409.739458] [drm:intel_dump_pipe_config], pipe bpp: 18, dithering: 1
>[  409.739461] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  409.739463] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 4042260, gmch_n: 4194304, link_m: 224570, link_n: 262144, tu: 64
>[  409.739465] [drm:intel_dump_pipe_config], requested mode:
>[  409.739468] [drm:drm_mode_debug_printmodeline], Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  409.739469] [drm:intel_dump_pipe_config], adjusted mode:
>[  409.739472] [drm:drm_mode_debug_printmodeline], Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  409.739475] [drm:intel_dump_crtc_timings], crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  409.739476] [drm:intel_dump_pipe_config], port clock: 162000
>[  409.739478] [drm:intel_dump_pipe_config], pipe src size: 1920x1080
>[  409.739480] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  409.739481] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000
>[  409.739483] [drm:intel_dump_pipe_config], ips: 1
>[  409.739484] [drm:intel_dump_pipe_config], double wide: 0
>[  409.798687] [drm:ilk_check_wm], WM1: enabled
>[  409.798688] [drm:ilk_check_wm], WM2: enabled
>[  409.798690] [drm:ilk_check_wm], WM3: enabled
>[  409.798691] [drm:ilk_check_wm], WM4: enabled
>[  409.798701] [drm:intel_update_fbc], no output, disabling
>[  409.798707] [drm:__intel_set_power_well], Requesting to disable the power well
>[  409.798711] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
>[  409.798736] [drm:ironlake_update_plane], Writing base 000A1000 00000000 0 0 7680
>[  409.798741] [drm:intel_edp_psr_match_conditions], PSR disable by flag
>[  409.798745] [drm:intel_crtc_mode_set], [ENCODER:9:TMDS-9] set [MODE:0:1920x1080]
>[  409.798747] [drm:intel_ddi_mode_set], Preparing DDI mode on port A, pipe A
>[  409.798751] [drm:ironlake_edp_panel_vdd_on], Turn eDP VDD on
>[  409.798756] [drm:ironlake_wait_panel_power_cycle], Wait for panel power cycle
>[  409.798761] [drm:ironlake_wait_panel_status], mask b800000f value 00000000 status 00000000 control abcd0000
>[  409.798767] [drm:ironlake_edp_panel_vdd_on], PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  409.798770] [drm:ironlake_edp_panel_vdd_on], eDP was not running
>[  409.919635] [drm:ironlake_edp_panel_on], Turn eDP power on
>[  409.919641] [drm:ironlake_wait_panel_power_cycle], Wait for panel power cycle
>[  409.919646] [drm:ironlake_wait_panel_status], mask b800000f value 00000000 status 00000000 control abcd0008
>[  409.919652] [drm:ironlake_wait_panel_on], Wait for panel power on
>[  409.919655] [drm:ironlake_wait_panel_status], mask b000000f value 80000008 status 0000000a control abcd000b
>[  410.051587] [drm:ironlake_edp_panel_vdd_off], Turn eDP VDD off 1
>[  410.051598] [drm:ironlake_panel_vdd_off_sync], PP_STATUS: 0xabcd000b PP_CONTROL: 0x80000008
>[  410.103592] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  410.104201] [drm:intel_dp_start_link_train], clock recovery OK
>[  410.104204] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  410.105108] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  410.105271] [drm:ilk_check_wm], WM1: enabled
>[  410.105273] [drm:ilk_check_wm], WM2: enabled
>[  410.105275] [drm:ilk_check_wm], WM3: enabled
>[  410.105277] [drm:ilk_check_wm], WM4: enabled
>[  410.105279] [drm:ilk_check_wm], WM0: enabled
>[  410.156461] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  410.208443] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  410.208448] [drm:intel_update_fbc], framebuffer not tiled or fenced, disabling compression
>[  410.208605] [drm:ironlake_edp_backlight_on], 
>[  410.210451] [drm:intel_panel_actually_set_backlight], set backlight PWM = 765
>[  410.210454] [drm:intel_edp_psr_match_conditions], PSR disable by flag
>[  410.226443] [drm:intel_connector_check_state], [CONNECTOR:10:eDP-1]
>[  410.226448] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  410.226451] [drm:check_encoder_state], [ENCODER:17:TMDS-17]
>[  410.226454] [drm:check_crtc_state], [CRTC:3]
>[  410.226463] [drm:check_crtc_state], [CRTC:5]
>[  410.226465] [drm:check_crtc_state], [CRTC:7]
>[  410.226472] [drm:intel_crtc_set_config], [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  410.226474] [drm:intel_set_config_compute_mode_changes], inactive crtc, full mode set
>[  410.226478] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=1, fb_changed=0
>[  410.226480] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  410.226483] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  410.226486] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  410.226488] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  410.226492] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  410.226496] [drm:connected_sink_compute_bpp], [CONNECTOR:18:HDMI-A-1] checking for sink bpp constrains
>[  410.226506] [drm:intel_hdmi_compute_config], picking bpc to 8 for HDMI output
>[  410.226508] [drm:intel_hdmi_compute_config], forcing pipe bpc to 24 for HDMI
>[  410.226511] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  410.226514] [drm:intel_dump_pipe_config], [CRTC:5][modeset] config for pipe B
>[  410.226515] [drm:intel_dump_pipe_config], cpu_transcoder: B
>[  410.226518] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  410.226521] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  410.226524] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  410.226526] [drm:intel_dump_pipe_config], requested mode:
>[  410.226532] [drm:drm_mode_debug_printmodeline], Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5
>[  410.226533] [drm:intel_dump_pipe_config], adjusted mode:
>[  410.226539] [drm:drm_mode_debug_printmodeline], Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5
>[  410.226543] [drm:intel_dump_crtc_timings], crtc timings: 148500 1920 2008 2052 2200 1080 1082 1087 1125, type: 0x48 flags: 0x5
>[  410.226545] [drm:intel_dump_pipe_config], port clock: 148500
>[  410.226547] [drm:intel_dump_pipe_config], pipe src size: 1920x1080
>[  410.226551] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  410.226553] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000
>[  410.226555] [drm:intel_dump_pipe_config], ips: 0
>[  410.226557] [drm:intel_dump_pipe_config], double wide: 0
>[  410.226561] [drm:__intel_set_power_well], Enabling power well
>[  410.226566] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe B
>[  410.230143] [drm:intel_ddi_calculate_wrpll], WRPLL: 148500000Hz refresh rate with p=6, n2=33 r2=20
>[  410.230185] [drm:ironlake_update_plane], Writing base 000A1000 00000000 0 0 7680
>[  410.230190] [drm:intel_edp_psr_match_conditions], PSR disable by flag
>[  410.230195] [drm:intel_crtc_mode_set], [ENCODER:17:TMDS-17] set [MODE:0:1920x1080]
>[  410.230197] [drm:intel_ddi_mode_set], Preparing DDI mode on port C, pipe B
>[  410.230199] [drm:intel_ddi_mode_set], HDMI audio on pipe B on DDI
>[  410.230201] [drm:intel_ddi_mode_set], HDMI audio: write eld information
>[  410.230205] [drm:intel_write_eld], ELD on [CONNECTOR:18:HDMI-A-1], [ENCODER:17:TMDS-17]
>[  410.230207] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
>[  410.230208] [drm:haswell_write_eld], HDMI audio: enable codec
>[  410.281415] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  410.281418] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x      40
>[  410.281420] [drm:haswell_write_eld], HDMI audio: eld vld status=0x      50
>[  410.281423] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
>[  410.281425] [drm:haswell_write_eld], ELD on pipe B
>[  410.281430] [drm:haswell_write_eld], port num:0
>[  410.281432] [drm:haswell_write_eld], ELD size 9
>[  410.281610] [drm:ilk_check_wm], WM1: enabled
>[  410.281612] [drm:ilk_check_wm], WM2: enabled
>[  410.281614] [drm:ilk_check_wm], WM3: disabled
>[  410.281617] [drm:ilk_check_wm], WM0: enabled
>[  410.281618] [drm:ilk_check_wm], WM0: enabled
>[  410.333397] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  410.385378] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  410.385381] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  410.403376] [drm:intel_connector_check_state], [CONNECTOR:10:eDP-1]
>[  410.403381] [drm:intel_connector_check_state], [CONNECTOR:18:HDMI-A-1]
>[  410.403385] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  410.403388] [drm:check_encoder_state], [ENCODER:17:TMDS-17]
>[  410.403390] [drm:check_crtc_state], [CRTC:3]
>[  410.403398] [drm:check_crtc_state], [CRTC:5]
>[  410.403404] [drm:check_crtc_state], [CRTC:7]
>[  410.403408] [drm:intel_crtc_set_config], [CRTC:7] [NOFB]
>[  410.403412] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=0
>[  410.403415] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  410.403418] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  410.403423] [drm:intel_crtc_set_config], [CRTC:3] [FB:47] #connectors=1 (x y) (0 0)
>[  410.403426] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  410.403429] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  410.403432] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  410.403435] [drm:intel_crtc_set_config], [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  410.403438] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  410.403441] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  410.403444] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  410.403459] [drm:intel_crtc_set_config], [CRTC:3] [FB:47] #connectors=1 (x y) (0 0)
>[  410.403462] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  410.403464] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  410.403467] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  410.403470] [drm:intel_crtc_set_config], [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  410.403473] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  410.403476] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  410.403478] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  410.421427] [drm:i915_driver_open], 
>[  410.421445] [drm:i915_driver_open], 
>[  410.422213] [drm:intel_crtc_cursor_set], cursor off
>[  410.422218] [drm:intel_crtc_set_config], [CRTC:3] [FB:47] #connectors=1 (x y) (0 0)
>[  410.422223] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  410.422228] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  410.422232] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  410.422237] [drm:intel_crtc_cursor_set], cursor off
>[  410.422239] [drm:intel_crtc_set_config], [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  410.422244] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  410.422248] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  410.422252] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  410.422256] [drm:intel_crtc_cursor_set], cursor off
>[  410.422258] [drm:intel_crtc_set_config], [CRTC:7] [NOFB]
>[  410.422262] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=0
>[  410.422266] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  410.422270] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  432.245523] [drm:i915_driver_open], 
>[  432.245548] [drm:intel_crtc_cursor_set], cursor off
>[  432.245551] [drm:intel_crtc_set_config], [CRTC:3] [FB:47] #connectors=1 (x y) (0 0)
>[  432.245557] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  432.245561] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  432.245564] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  432.245567] [drm:intel_crtc_cursor_set], cursor off
>[  432.245569] [drm:intel_crtc_set_config], [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  432.245573] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  432.245576] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  432.245579] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  432.245581] [drm:intel_crtc_cursor_set], cursor off
>[  432.245583] [drm:intel_crtc_set_config], [CRTC:7] [NOFB]
>[  432.245586] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=0
>[  432.245589] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  432.245591] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  432.245599] [drm:i915_driver_open], 
>[  432.246139] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[2] ENCODERS[2]
>[  432.246151] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[2] ENCODERS[2]
>[  432.246166] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[2] ENCODERS[2]
>[  432.246169] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[2] ENCODERS[2]
>[  432.246176] [drm:drm_mode_getconnector], [CONNECTOR:18:?]
>[  432.246180] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:HDMI-A-1]
>[  432.246187] [drm:intel_hdmi_detect], [CONNECTOR:18:HDMI-A-1]
>[  432.271313] [drm:drm_detect_monitor_audio], Monitor has basic audio support
>[  432.296622] [drm:drm_edid_to_eld], ELD monitor VP2770 SERIES
>[  432.296627] [drm:parse_hdmi_vsdb], HDMI: DVI dual 1, max TMDS clock 270, latency present 0 0, video latency 0 0, audio latency 0 0
>[  432.296632] [drm:drm_edid_to_eld], ELD size 9, SAD count 1
>[  432.296714] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:HDMI-A-1] probed modes :
>[  432.296717] [drm:drm_mode_debug_printmodeline], Modeline 20:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5
>[  432.296722] [drm:drm_mode_debug_printmodeline], Modeline 21:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  432.296726] [drm:drm_mode_debug_printmodeline], Modeline 66:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  432.296729] [drm:drm_mode_debug_printmodeline], Modeline 22:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  432.296733] [drm:drm_mode_debug_printmodeline], Modeline 67:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  432.296737] [drm:drm_mode_debug_printmodeline], Modeline 56:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  432.296740] [drm:drm_mode_debug_printmodeline], Modeline 57:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  432.296744] [drm:drm_mode_debug_printmodeline], Modeline 26:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
>[  432.296748] [drm:drm_mode_debug_printmodeline], Modeline 25:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[  432.296751] [drm:drm_mode_debug_printmodeline], Modeline 27:"1600x900" 60 118963 1600 1696 1864 2128 900 901 904 932 0x0 0x6
>[  432.296755] [drm:drm_mode_debug_printmodeline], Modeline 37:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  432.296759] [drm:drm_mode_debug_printmodeline], Modeline 29:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  432.296762] [drm:drm_mode_debug_printmodeline], Modeline 28:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[  432.296766] [drm:drm_mode_debug_printmodeline], Modeline 44:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  432.296770] [drm:drm_mode_debug_printmodeline], Modeline 23:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  432.296773] [drm:drm_mode_debug_printmodeline], Modeline 68:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  432.296777] [drm:drm_mode_debug_printmodeline], Modeline 58:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  432.296780] [drm:drm_mode_debug_printmodeline], Modeline 63:"1440x576" 50 54000 1440 1464 1592 1728 576 581 586 625 0x40 0xa
>[  432.296784] [drm:drm_mode_debug_printmodeline], Modeline 61:"1440x576i" 50 27000 1440 1464 1590 1728 576 580 586 625 0x40 0x101a
>[  432.296788] [drm:drm_mode_debug_printmodeline], Modeline 38:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  432.296791] [drm:drm_mode_debug_printmodeline], Modeline 39:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[  432.296795] [drm:drm_mode_debug_printmodeline], Modeline 40:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  432.296798] [drm:drm_mode_debug_printmodeline], Modeline 80:"1440x480" 60 54054 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[  432.296802] [drm:drm_mode_debug_printmodeline], Modeline 54:"1440x480" 60 54000 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[  432.296805] [drm:drm_mode_debug_printmodeline], Modeline 76:"1440x480i" 60 27027 1440 1478 1602 1716 480 488 494 525 0x40 0x101a
>[  432.296809] [drm:drm_mode_debug_printmodeline], Modeline 50:"1440x480i" 60 27000 1440 1478 1602 1716 480 488 494 525 0x40 0x101a
>[  432.296812] [drm:drm_mode_debug_printmodeline], Modeline 41:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[  432.296816] [drm:drm_mode_debug_printmodeline], Modeline 42:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  432.296820] [drm:drm_mode_debug_printmodeline], Modeline 43:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  432.296823] [drm:drm_mode_debug_printmodeline], Modeline 30:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  432.296827] [drm:drm_mode_debug_printmodeline], Modeline 31:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  432.296830] [drm:drm_mode_debug_printmodeline], Modeline 59:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  432.296834] [drm:drm_mode_debug_printmodeline], Modeline 69:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  432.296837] [drm:drm_mode_debug_printmodeline], Modeline 78:"1440x240" 60 27027 1440 1478 1602 1716 240 244 247 262 0x40 0x100a
>[  432.296841] [drm:drm_mode_debug_printmodeline], Modeline 24:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  432.296845] [drm:drm_mode_debug_printmodeline], Modeline 52:"1440x240" 60 27000 1440 1478 1602 1716 240 244 247 262 0x40 0x100a
>[  432.296848] [drm:drm_mode_debug_printmodeline], Modeline 32:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  432.296852] [drm:drm_mode_debug_printmodeline], Modeline 33:"640x480" 73 31500 640 664 704 832 480 489 491 520 0x40 0xa
>[  432.296855] [drm:drm_mode_debug_printmodeline], Modeline 34:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[  432.296859] [drm:drm_mode_debug_printmodeline], Modeline 35:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  432.296862] [drm:drm_mode_debug_printmodeline], Modeline 65:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  432.296866] [drm:drm_mode_debug_printmodeline], Modeline 36:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  432.296891] [drm:drm_mode_getconnector], [CONNECTOR:18:?]
>[  432.296921] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[2] ENCODERS[2]
>[  432.296925] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[2] ENCODERS[2]
>[  432.296951] [drm:drm_mode_addfb], [FB:48]
>[  432.380630] [drm:drm_mode_setcrtc], [CRTC:3]
>[  432.380639] [drm:drm_mode_setcrtc], [CONNECTOR:18:HDMI-A-1]
>[  432.380643] [drm:intel_crtc_set_config], [CRTC:3] [FB:48] #connectors=1 (x y) (0 0)
>[  432.380647] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  432.380650] [drm:drm_mode_debug_printmodeline], Modeline 45:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  432.380655] [drm:drm_mode_debug_printmodeline], Modeline 49:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  432.380659] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  432.380663] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [NOCRTC]
>[  432.380665] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  432.380668] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:3]
>[  432.380670] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  432.380672] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  432.380675] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 2
>[  432.380680] [drm:connected_sink_compute_bpp], [CONNECTOR:18:HDMI-A-1] checking for sink bpp constrains
>[  432.380686] [drm:intel_hdmi_compute_config], picking bpc to 8 for HDMI output
>[  432.380688] [drm:intel_hdmi_compute_config], forcing pipe bpc to 24 for HDMI
>[  432.380691] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  432.380694] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  432.380696] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  432.380698] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  432.380700] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  432.380704] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  432.380707] [drm:intel_dump_pipe_config], requested mode:
>[  432.380709] [drm:drm_mode_debug_printmodeline], Modeline 0:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  432.380713] [drm:intel_dump_pipe_config], adjusted mode:
>[  432.380715] [drm:drm_mode_debug_printmodeline], Modeline 0:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  432.380719] [drm:intel_dump_crtc_timings], crtc timings: 27000 720 732 796 864 576 581 586 625, type: 0x40 flags: 0xa
>[  432.380722] [drm:intel_dump_pipe_config], port clock: 27000
>[  432.380724] [drm:intel_dump_pipe_config], pipe src size: 720x576
>[  432.380727] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  432.380741] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000
>[  432.380743] [drm:intel_dump_pipe_config], ips: 1
>[  432.380745] [drm:intel_dump_pipe_config], double wide: 0
>[  432.412505] [drm:ilk_check_wm], WM1: enabled
>[  432.412512] [drm:ilk_check_wm], WM2: enabled
>[  432.412514] [drm:ilk_check_wm], WM3: enabled
>[  432.412517] [drm:ilk_check_wm], WM4: enabled
>[  432.412519] [drm:ilk_check_wm], WM0: enabled
>[  432.412531] [drm:intel_update_fbc], framebuffer not tiled or fenced, disabling compression
>[  432.412535] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
>[  432.414493] [drm:intel_panel_actually_set_backlight], set backlight PWM = 0
>[  432.414504] [drm:ironlake_edp_backlight_off], 
>[  432.651419] [drm:ironlake_edp_panel_vdd_on], Turn eDP VDD on
>[  432.651427] [drm:ironlake_edp_panel_vdd_on], eDP VDD already on
>[  432.651430] [drm:ironlake_edp_panel_off], Turn eDP power off
>[  432.651436] [drm:ironlake_wait_panel_off], Wait for panel power off time
>[  432.651440] [drm:ironlake_wait_panel_status], mask b000000f value 00000000 status 80000008 control abcd0000
>[  433.454130] [drm:ilk_check_wm], WM1: enabled
>[  433.454137] [drm:ilk_check_wm], WM2: enabled
>[  433.454139] [drm:ilk_check_wm], WM3: enabled
>[  433.454142] [drm:ilk_check_wm], WM4: enabled
>[  433.454152] [drm:intel_update_fbc], no output, disabling
>[  433.454161] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
>[  433.456570] [drm:intel_ddi_calculate_wrpll], WRPLL: 27000000Hz refresh rate with p=30, n2=21 r2=14
>[  433.459217] [drm:ironlake_update_plane], Writing base 0088B000 00000000 0 0 4096
>[  433.459226] [drm:intel_edp_psr_match_conditions], PSR disable by flag
>[  433.459230] [drm:intel_crtc_mode_set], [ENCODER:17:TMDS-17] set [MODE:0:720x576]
>[  433.459234] [drm:intel_ddi_mode_set], Preparing DDI mode on port C, pipe A
>[  433.459236] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
>[  433.459238] [drm:intel_ddi_mode_set], HDMI audio: write eld information
>[  433.459242] [drm:intel_write_eld], ELD on [CONNECTOR:18:HDMI-A-1], [ENCODER:17:TMDS-17]
>[  433.459245] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
>[  433.459247] [drm:haswell_write_eld], HDMI audio: enable codec
>[  433.511097] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  433.511103] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       4
>[  433.511107] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
>[  433.511110] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
>[  433.511113] [drm:haswell_write_eld], ELD on pipe A
>[  433.511119] [drm:haswell_write_eld], port num:0
>[  433.511121] [drm:haswell_write_eld], ELD size 9
>[  433.511296] [drm:ilk_check_wm], WM1: enabled
>[  433.511299] [drm:ilk_check_wm], WM2: enabled
>[  433.511301] [drm:ilk_check_wm], WM3: enabled
>[  433.511303] [drm:ilk_check_wm], WM4: enabled
>[  433.511306] [drm:ilk_check_wm], WM0: enabled
>[  433.563080] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  433.615067] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  433.615080] [drm:i915_setup_compression], reserved 8388608 bytes of contiguous stolen space for FBC
>[  433.637064] [drm:intel_connector_check_state], [CONNECTOR:18:HDMI-A-1]
>[  433.637072] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  433.637076] [drm:check_encoder_state], [ENCODER:17:TMDS-17]
>[  433.637080] [drm:check_crtc_state], [CRTC:3]
>[  433.637088] [drm:check_crtc_state], [CRTC:5]
>[  433.637091] [drm:check_crtc_state], [CRTC:7]
>[  433.656753] [drm:ivb_err_int_handler], Pipe A FIFO underrun
>[  433.665142] [drm:gen7_enable_fbc], enabled fbc on plane 0
>[  453.423868] [drm:intel_crtc_set_config], [CRTC:3] [FB:47] #connectors=1 (x y) (0 0)
>[  453.423871] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  453.423876] [drm:drm_mode_debug_printmodeline], Modeline 49:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  453.423880] [drm:drm_mode_debug_printmodeline], Modeline 45:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  453.423882] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  453.423883] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  453.423886] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [NOCRTC]
>[  453.423887] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  453.423889] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  453.423891] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  453.423892] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  453.423895] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  453.423898] [drm:connected_sink_compute_bpp], [CONNECTOR:10:eDP-1] checking for sink bpp constrains
>[  453.423903] [drm:intel_dp_compute_config], DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  453.423904] [drm:intel_dp_compute_config], clamping bpp for eDP panel to BIOS-provided 18
>[  453.423907] [drm:intel_dp_compute_config], DP link bw 06 lane count 2 clock 162000 bpp 18
>[  453.423908] [drm:intel_dp_compute_config], DP link bw required 249804 available 259200
>[  453.423911] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 18, dithering: 1
>[  453.423913] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  453.423915] [drm:intel_dump_pipe_config], cpu_transcoder: P
>[  453.423916] [drm:intel_dump_pipe_config], pipe bpp: 18, dithering: 1
>[  453.423918] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  453.423921] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 4042260, gmch_n: 4194304, link_m: 224570, link_n: 262144, tu: 64
>[  453.423922] [drm:intel_dump_pipe_config], requested mode:
>[  453.423926] [drm:drm_mode_debug_printmodeline], Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  453.423927] [drm:intel_dump_pipe_config], adjusted mode:
>[  453.423929] [drm:drm_mode_debug_printmodeline], Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  453.423933] [drm:intel_dump_crtc_timings], crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  453.423934] [drm:intel_dump_pipe_config], port clock: 162000
>[  453.423935] [drm:intel_dump_pipe_config], pipe src size: 1920x1080
>[  453.423937] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  453.423939] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000
>[  453.423940] [drm:intel_dump_pipe_config], ips: 1
>[  453.423941] [drm:intel_dump_pipe_config], double wide: 0
>[  453.425911] [drm:ironlake_disable_fbc], disabled FBC
>[  453.469903] [drm:ilk_check_wm], WM1: enabled
>[  453.469904] [drm:ilk_check_wm], WM2: enabled
>[  453.469906] [drm:ilk_check_wm], WM3: enabled
>[  453.469907] [drm:ilk_check_wm], WM4: enabled
>[  453.469918] [drm:intel_update_fbc], no output, disabling
>[  453.469926] [drm:__intel_set_power_well], Requesting to disable the power well
>[  453.469930] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
>[  453.469955] [drm:ironlake_update_plane], Writing base 000A1000 00000000 0 0 7680
>[  453.469960] [drm:intel_edp_psr_match_conditions], PSR disable by flag
>[  453.469964] [drm:intel_crtc_mode_set], [ENCODER:9:TMDS-9] set [MODE:0:1920x1080]
>[  453.469966] [drm:intel_ddi_mode_set], Preparing DDI mode on port A, pipe A
>[  453.469970] [drm:ironlake_edp_panel_vdd_on], Turn eDP VDD on
>[  453.469975] [drm:ironlake_wait_panel_power_cycle], Wait for panel power cycle
>[  453.469980] [drm:ironlake_wait_panel_status], mask b800000f value 00000000 status 00000000 control abcd0000
>[  453.469987] [drm:ironlake_edp_panel_vdd_on], PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  453.469989] [drm:ironlake_edp_panel_vdd_on], eDP was not running
>[  453.590851] [drm:ironlake_edp_panel_on], Turn eDP power on
>[  453.590856] [drm:ironlake_wait_panel_power_cycle], Wait for panel power cycle
>[  453.590862] [drm:ironlake_wait_panel_status], mask b800000f value 00000000 status 00000000 control abcd0008
>[  453.590867] [drm:ironlake_wait_panel_on], Wait for panel power on
>[  453.590871] [drm:ironlake_wait_panel_status], mask b000000f value 80000008 status 0000000a control abcd000b
>[  453.722803] [drm:ironlake_edp_panel_vdd_off], Turn eDP VDD off 1
>[  453.722813] [drm:ironlake_panel_vdd_off_sync], PP_STATUS: 0xabcd000b PP_CONTROL: 0x80000008
>[  453.774819] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  453.775428] [drm:intel_dp_start_link_train], clock recovery OK
>[  453.775430] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  453.776335] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  453.776497] [drm:ilk_check_wm], WM1: enabled
>[  453.776499] [drm:ilk_check_wm], WM2: enabled
>[  453.776501] [drm:ilk_check_wm], WM3: enabled
>[  453.776503] [drm:ilk_check_wm], WM4: enabled
>[  453.776506] [drm:ilk_check_wm], WM0: enabled
>[  453.827679] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  453.879659] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  453.879664] [drm:intel_update_fbc], framebuffer not tiled or fenced, disabling compression
>[  453.879843] [drm:ironlake_edp_backlight_on], 
>[  453.881666] [drm:intel_panel_actually_set_backlight], set backlight PWM = 765
>[  453.881669] [drm:intel_edp_psr_match_conditions], PSR disable by flag
>[  453.897657] [drm:intel_connector_check_state], [CONNECTOR:10:eDP-1]
>[  453.897662] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  453.897665] [drm:check_encoder_state], [ENCODER:17:TMDS-17]
>[  453.897668] [drm:check_crtc_state], [CRTC:3]
>[  453.897677] [drm:check_crtc_state], [CRTC:5]
>[  453.897679] [drm:check_crtc_state], [CRTC:7]
>[  453.897686] [drm:intel_crtc_set_config], [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  453.897689] [drm:intel_set_config_compute_mode_changes], inactive crtc, full mode set
>[  453.897692] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=1, fb_changed=0
>[  453.897694] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  453.897697] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  453.897701] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  453.897703] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  453.897706] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  453.897710] [drm:connected_sink_compute_bpp], [CONNECTOR:18:HDMI-A-1] checking for sink bpp constrains
>[  453.897720] [drm:intel_hdmi_compute_config], picking bpc to 8 for HDMI output
>[  453.897722] [drm:intel_hdmi_compute_config], forcing pipe bpc to 24 for HDMI
>[  453.897725] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  453.897728] [drm:intel_dump_pipe_config], [CRTC:5][modeset] config for pipe B
>[  453.897730] [drm:intel_dump_pipe_config], cpu_transcoder: B
>[  453.897732] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  453.897735] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  453.897738] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  453.897740] [drm:intel_dump_pipe_config], requested mode:
>[  453.897746] [drm:drm_mode_debug_printmodeline], Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5
>[  453.897748] [drm:intel_dump_pipe_config], adjusted mode:
>[  453.897753] [drm:drm_mode_debug_printmodeline], Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5
>[  453.897758] [drm:intel_dump_crtc_timings], crtc timings: 148500 1920 2008 2052 2200 1080 1082 1087 1125, type: 0x48 flags: 0x5
>[  453.897760] [drm:intel_dump_pipe_config], port clock: 148500
>[  453.897762] [drm:intel_dump_pipe_config], pipe src size: 1920x1080
>[  453.897765] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  453.897767] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000
>[  453.897769] [drm:intel_dump_pipe_config], ips: 0
>[  453.897771] [drm:intel_dump_pipe_config], double wide: 0
>[  453.897775] [drm:__intel_set_power_well], Enabling power well
>[  453.897780] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe B
>[  453.901355] [drm:intel_ddi_calculate_wrpll], WRPLL: 148500000Hz refresh rate with p=6, n2=33 r2=20
>[  453.901396] [drm:ironlake_update_plane], Writing base 000A1000 00000000 0 0 7680
>[  453.901401] [drm:intel_edp_psr_match_conditions], PSR disable by flag
>[  453.901406] [drm:intel_crtc_mode_set], [ENCODER:17:TMDS-17] set [MODE:0:1920x1080]
>[  453.901408] [drm:intel_ddi_mode_set], Preparing DDI mode on port C, pipe B
>[  453.901410] [drm:intel_ddi_mode_set], HDMI audio on pipe B on DDI
>[  453.901412] [drm:intel_ddi_mode_set], HDMI audio: write eld information
>[  453.901416] [drm:intel_write_eld], ELD on [CONNECTOR:18:HDMI-A-1], [ENCODER:17:TMDS-17]
>[  453.901418] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
>[  453.901419] [drm:haswell_write_eld], HDMI audio: enable codec
>[  453.952631] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  453.952633] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x      40
>[  453.952636] [drm:haswell_write_eld], HDMI audio: eld vld status=0x      50
>[  453.952638] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
>[  453.952640] [drm:haswell_write_eld], ELD on pipe B
>[  453.952646] [drm:haswell_write_eld], port num:0
>[  453.952648] [drm:haswell_write_eld], ELD size 9
>[  453.952825] [drm:ilk_check_wm], WM1: enabled
>[  453.952827] [drm:ilk_check_wm], WM2: enabled
>[  453.952830] [drm:ilk_check_wm], WM3: disabled
>[  453.952832] [drm:ilk_check_wm], WM0: enabled
>[  453.952834] [drm:ilk_check_wm], WM0: enabled
>[  454.004612] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  454.056594] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  454.056596] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  454.074592] [drm:intel_connector_check_state], [CONNECTOR:10:eDP-1]
>[  454.074596] [drm:intel_connector_check_state], [CONNECTOR:18:HDMI-A-1]
>[  454.074600] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  454.074603] [drm:check_encoder_state], [ENCODER:17:TMDS-17]
>[  454.074606] [drm:check_crtc_state], [CRTC:3]
>[  454.074614] [drm:check_crtc_state], [CRTC:5]
>[  454.074620] [drm:check_crtc_state], [CRTC:7]
>[  454.074624] [drm:intel_crtc_set_config], [CRTC:7] [NOFB]
>[  454.074627] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=0
>[  454.074630] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  454.074633] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  454.074639] [drm:intel_crtc_set_config], [CRTC:3] [FB:47] #connectors=1 (x y) (0 0)
>[  454.074642] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  454.074645] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  454.074648] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  454.074651] [drm:intel_crtc_set_config], [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  454.074654] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  454.074657] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  454.074660] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  454.074676] [drm:intel_crtc_set_config], [CRTC:3] [FB:47] #connectors=1 (x y) (0 0)
>[  454.074678] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  454.074681] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  454.074684] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  454.074687] [drm:intel_crtc_set_config], [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  454.074690] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  454.074693] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  454.074695] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  454.092228] [drm:i915_driver_open], 
>[  454.092244] [drm:i915_driver_open], 
>[  454.093179] [drm:intel_crtc_cursor_set], cursor off
>[  454.093185] [drm:intel_crtc_set_config], [CRTC:3] [FB:47] #connectors=1 (x y) (0 0)
>[  454.093192] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  454.093197] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  454.093202] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  454.093207] [drm:intel_crtc_cursor_set], cursor off
>[  454.093211] [drm:intel_crtc_set_config], [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  454.093216] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  454.093221] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  454.093226] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  454.093230] [drm:intel_crtc_cursor_set], cursor off
>[  454.093233] [drm:intel_crtc_set_config], [CRTC:7] [NOFB]
>[  454.093237] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=0
>[  454.093242] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  454.093247] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  470.241720] [drm:i915_driver_open], 
>[  470.241765] [drm:intel_crtc_cursor_set], cursor off
>[  470.241769] [drm:intel_crtc_set_config], [CRTC:3] [FB:47] #connectors=1 (x y) (0 0)
>[  470.241776] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  470.241785] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  470.241798] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  470.241804] [drm:intel_crtc_cursor_set], cursor off
>[  470.241811] [drm:intel_crtc_set_config], [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  470.241818] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  470.241823] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  470.241827] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  470.241831] [drm:intel_crtc_cursor_set], cursor off
>[  470.241833] [drm:intel_crtc_set_config], [CRTC:7] [NOFB]
>[  470.241837] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=0
>[  470.241841] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  470.241845] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  470.241858] [drm:i915_driver_open], 
>[  470.242483] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[2] ENCODERS[2]
>[  470.242501] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[2] ENCODERS[2]
>[  470.242523] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[2] ENCODERS[2]
>[  470.242530] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[2] ENCODERS[2]
>[  470.242540] [drm:drm_mode_getconnector], [CONNECTOR:18:?]
>[  470.242546] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:HDMI-A-1]
>[  470.242555] [drm:intel_hdmi_detect], [CONNECTOR:18:HDMI-A-1]
>[  470.267777] [drm:drm_detect_monitor_audio], Monitor has basic audio support
>[  470.293168] [drm:drm_edid_to_eld], ELD monitor VP2770 SERIES
>[  470.293174] [drm:parse_hdmi_vsdb], HDMI: DVI dual 1, max TMDS clock 270, latency present 0 0, video latency 0 0, audio latency 0 0
>[  470.293178] [drm:drm_edid_to_eld], ELD size 9, SAD count 1
>[  470.293261] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:HDMI-A-1] probed modes :
>[  470.293264] [drm:drm_mode_debug_printmodeline], Modeline 20:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5
>[  470.293269] [drm:drm_mode_debug_printmodeline], Modeline 21:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  470.293273] [drm:drm_mode_debug_printmodeline], Modeline 66:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  470.293276] [drm:drm_mode_debug_printmodeline], Modeline 22:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  470.293280] [drm:drm_mode_debug_printmodeline], Modeline 67:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  470.293284] [drm:drm_mode_debug_printmodeline], Modeline 56:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  470.293287] [drm:drm_mode_debug_printmodeline], Modeline 57:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  470.293291] [drm:drm_mode_debug_printmodeline], Modeline 26:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
>[  470.293295] [drm:drm_mode_debug_printmodeline], Modeline 25:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[  470.293298] [drm:drm_mode_debug_printmodeline], Modeline 27:"1600x900" 60 118963 1600 1696 1864 2128 900 901 904 932 0x0 0x6
>[  470.293302] [drm:drm_mode_debug_printmodeline], Modeline 37:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  470.293306] [drm:drm_mode_debug_printmodeline], Modeline 29:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  470.293309] [drm:drm_mode_debug_printmodeline], Modeline 28:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[  470.293313] [drm:drm_mode_debug_printmodeline], Modeline 44:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  470.293317] [drm:drm_mode_debug_printmodeline], Modeline 23:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  470.293320] [drm:drm_mode_debug_printmodeline], Modeline 68:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  470.293324] [drm:drm_mode_debug_printmodeline], Modeline 58:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  470.293327] [drm:drm_mode_debug_printmodeline], Modeline 63:"1440x576" 50 54000 1440 1464 1592 1728 576 581 586 625 0x40 0xa
>[  470.293331] [drm:drm_mode_debug_printmodeline], Modeline 61:"1440x576i" 50 27000 1440 1464 1590 1728 576 580 586 625 0x40 0x101a
>[  470.293335] [drm:drm_mode_debug_printmodeline], Modeline 38:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  470.293338] [drm:drm_mode_debug_printmodeline], Modeline 39:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[  470.293342] [drm:drm_mode_debug_printmodeline], Modeline 40:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  470.293346] [drm:drm_mode_debug_printmodeline], Modeline 80:"1440x480" 60 54054 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[  470.293349] [drm:drm_mode_debug_printmodeline], Modeline 54:"1440x480" 60 54000 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[  470.293353] [drm:drm_mode_debug_printmodeline], Modeline 76:"1440x480i" 60 27027 1440 1478 1602 1716 480 488 494 525 0x40 0x101a
>[  470.293357] [drm:drm_mode_debug_printmodeline], Modeline 50:"1440x480i" 60 27000 1440 1478 1602 1716 480 488 494 525 0x40 0x101a
>[  470.293360] [drm:drm_mode_debug_printmodeline], Modeline 41:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[  470.293364] [drm:drm_mode_debug_printmodeline], Modeline 42:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  470.293367] [drm:drm_mode_debug_printmodeline], Modeline 43:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  470.293371] [drm:drm_mode_debug_printmodeline], Modeline 30:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  470.293375] [drm:drm_mode_debug_printmodeline], Modeline 31:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  470.293378] [drm:drm_mode_debug_printmodeline], Modeline 59:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  470.293382] [drm:drm_mode_debug_printmodeline], Modeline 69:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  470.293385] [drm:drm_mode_debug_printmodeline], Modeline 78:"1440x240" 60 27027 1440 1478 1602 1716 240 244 247 262 0x40 0x100a
>[  470.293389] [drm:drm_mode_debug_printmodeline], Modeline 24:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  470.293393] [drm:drm_mode_debug_printmodeline], Modeline 52:"1440x240" 60 27000 1440 1478 1602 1716 240 244 247 262 0x40 0x100a
>[  470.293396] [drm:drm_mode_debug_printmodeline], Modeline 32:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  470.293400] [drm:drm_mode_debug_printmodeline], Modeline 33:"640x480" 73 31500 640 664 704 832 480 489 491 520 0x40 0xa
>[  470.293403] [drm:drm_mode_debug_printmodeline], Modeline 34:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[  470.293407] [drm:drm_mode_debug_printmodeline], Modeline 35:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  470.293410] [drm:drm_mode_debug_printmodeline], Modeline 65:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  470.293414] [drm:drm_mode_debug_printmodeline], Modeline 36:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  470.293440] [drm:drm_mode_getconnector], [CONNECTOR:18:?]
>[  470.293470] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[2] ENCODERS[2]
>[  470.293474] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[2] ENCODERS[2]
>[  470.293499] [drm:drm_mode_addfb], [FB:48]
>[  470.376197] [drm:drm_mode_setcrtc], [CRTC:3]
>[  470.376208] [drm:drm_mode_setcrtc], [CONNECTOR:18:HDMI-A-1]
>[  470.376212] [drm:intel_crtc_set_config], [CRTC:3] [FB:48] #connectors=1 (x y) (0 0)
>[  470.376216] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  470.376219] [drm:drm_mode_debug_printmodeline], Modeline 45:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  470.376223] [drm:drm_mode_debug_printmodeline], Modeline 49:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  470.376228] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  470.376231] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [NOCRTC]
>[  470.376233] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  470.376236] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:3]
>[  470.376239] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  470.376241] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  470.376244] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 2
>[  470.376248] [drm:connected_sink_compute_bpp], [CONNECTOR:18:HDMI-A-1] checking for sink bpp constrains
>[  470.376254] [drm:intel_hdmi_compute_config], picking bpc to 8 for HDMI output
>[  470.376256] [drm:intel_hdmi_compute_config], forcing pipe bpc to 24 for HDMI
>[  470.376259] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  470.376262] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  470.376264] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  470.376266] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  470.376269] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  470.376272] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  470.376275] [drm:intel_dump_pipe_config], requested mode:
>[  470.376277] [drm:drm_mode_debug_printmodeline], Modeline 0:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  470.376281] [drm:intel_dump_pipe_config], adjusted mode:
>[  470.376283] [drm:drm_mode_debug_printmodeline], Modeline 0:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  470.376287] [drm:intel_dump_crtc_timings], crtc timings: 27000 720 732 796 864 576 581 586 625, type: 0x40 flags: 0xa
>[  470.376291] [drm:intel_dump_pipe_config], port clock: 27000
>[  470.376293] [drm:intel_dump_pipe_config], pipe src size: 720x576
>[  470.376295] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  470.376298] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000
>[  470.376315] [drm:intel_dump_pipe_config], ips: 1
>[  470.376317] [drm:intel_dump_pipe_config], double wide: 0
>[  470.401773] [drm:ilk_check_wm], WM1: enabled
>[  470.401780] [drm:ilk_check_wm], WM2: enabled
>[  470.401783] [drm:ilk_check_wm], WM3: enabled
>[  470.401785] [drm:ilk_check_wm], WM4: enabled
>[  470.401788] [drm:ilk_check_wm], WM0: enabled
>[  470.401799] [drm:intel_update_fbc], framebuffer not tiled or fenced, disabling compression
>[  470.401804] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
>[  470.403762] [drm:intel_panel_actually_set_backlight], set backlight PWM = 0
>[  470.403774] [drm:ironlake_edp_backlight_off], 
>[  470.640687] [drm:ironlake_edp_panel_vdd_on], Turn eDP VDD on
>[  470.640696] [drm:ironlake_edp_panel_vdd_on], eDP VDD already on
>[  470.640698] [drm:ironlake_edp_panel_off], Turn eDP power off
>[  470.640705] [drm:ironlake_wait_panel_off], Wait for panel power off time
>[  470.640709] [drm:ironlake_wait_panel_status], mask b000000f value 00000000 status 80000008 control abcd0000
>[  471.443399] [drm:ilk_check_wm], WM1: enabled
>[  471.443406] [drm:ilk_check_wm], WM2: enabled
>[  471.443409] [drm:ilk_check_wm], WM3: enabled
>[  471.443411] [drm:ilk_check_wm], WM4: enabled
>[  471.443422] [drm:intel_update_fbc], no output, disabling
>[  471.443430] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
>[  471.445643] [drm:intel_ddi_calculate_wrpll], WRPLL: 27000000Hz refresh rate with p=30, n2=21 r2=14
>[  471.446729] [drm:ironlake_update_plane], Writing base 0088B000 00000000 0 0 2880
>[  471.446736] [drm:intel_edp_psr_match_conditions], PSR disable by flag
>[  471.446741] [drm:intel_crtc_mode_set], [ENCODER:17:TMDS-17] set [MODE:0:720x576]
>[  471.446744] [drm:intel_ddi_mode_set], Preparing DDI mode on port C, pipe A
>[  471.446747] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
>[  471.446749] [drm:intel_ddi_mode_set], HDMI audio: write eld information
>[  471.446753] [drm:intel_write_eld], ELD on [CONNECTOR:18:HDMI-A-1], [ENCODER:17:TMDS-17]
>[  471.446756] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
>[  471.446758] [drm:haswell_write_eld], HDMI audio: enable codec
>[  471.498367] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  471.498374] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       4
>[  471.498378] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
>[  471.498381] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
>[  471.498384] [drm:haswell_write_eld], ELD on pipe A
>[  471.498390] [drm:haswell_write_eld], port num:0
>[  471.498392] [drm:haswell_write_eld], ELD size 9
>[  471.498569] [drm:ilk_check_wm], WM1: enabled
>[  471.498573] [drm:ilk_check_wm], WM2: enabled
>[  471.498575] [drm:ilk_check_wm], WM3: enabled
>[  471.498577] [drm:ilk_check_wm], WM4: enabled
>[  471.498580] [drm:ilk_check_wm], WM0: enabled
>[  471.550351] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  471.602338] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  471.602349] [drm:intel_update_fbc], framebuffer not tiled or fenced, disabling compression
>[  471.624335] [drm:intel_connector_check_state], [CONNECTOR:18:HDMI-A-1]
>[  471.624343] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  471.624347] [drm:check_encoder_state], [ENCODER:17:TMDS-17]
>[  471.624351] [drm:check_crtc_state], [CRTC:3]
>[  471.624359] [drm:check_crtc_state], [CRTC:5]
>[  471.624362] [drm:check_crtc_state], [CRTC:7]
>[  471.644021] [drm:ivb_err_int_handler], Pipe A FIFO underrun
>[  475.785292] [drm:intel_crtc_set_config], [CRTC:3] [FB:47] #connectors=1 (x y) (0 0)
>[  475.785295] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  475.785300] [drm:drm_mode_debug_printmodeline], Modeline 49:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  475.785303] [drm:drm_mode_debug_printmodeline], Modeline 45:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  475.785305] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  475.785307] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  475.785310] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [NOCRTC]
>[  475.785311] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  475.785313] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  475.785315] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  475.785316] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  475.785319] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  475.785322] [drm:connected_sink_compute_bpp], [CONNECTOR:10:eDP-1] checking for sink bpp constrains
>[  475.785327] [drm:intel_dp_compute_config], DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  475.785329] [drm:intel_dp_compute_config], clamping bpp for eDP panel to BIOS-provided 18
>[  475.785331] [drm:intel_dp_compute_config], DP link bw 06 lane count 2 clock 162000 bpp 18
>[  475.785333] [drm:intel_dp_compute_config], DP link bw required 249804 available 259200
>[  475.785336] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 18, dithering: 1
>[  475.785338] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  475.785339] [drm:intel_dump_pipe_config], cpu_transcoder: P
>[  475.785341] [drm:intel_dump_pipe_config], pipe bpp: 18, dithering: 1
>[  475.785343] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  475.785346] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 4042260, gmch_n: 4194304, link_m: 224570, link_n: 262144, tu: 64
>[  475.785347] [drm:intel_dump_pipe_config], requested mode:
>[  475.785350] [drm:drm_mode_debug_printmodeline], Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  475.785351] [drm:intel_dump_pipe_config], adjusted mode:
>[  475.785354] [drm:drm_mode_debug_printmodeline], Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  475.785357] [drm:intel_dump_crtc_timings], crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  475.785358] [drm:intel_dump_pipe_config], port clock: 162000
>[  475.785360] [drm:intel_dump_pipe_config], pipe src size: 1920x1080
>[  475.785362] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  475.785364] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000
>[  475.785365] [drm:intel_dump_pipe_config], ips: 1
>[  475.785366] [drm:intel_dump_pipe_config], double wide: 0
>[  475.842820] [drm:ilk_check_wm], WM1: enabled
>[  475.842822] [drm:ilk_check_wm], WM2: enabled
>[  475.842823] [drm:ilk_check_wm], WM3: enabled
>[  475.842825] [drm:ilk_check_wm], WM4: enabled
>[  475.842835] [drm:intel_update_fbc], no output, disabling
>[  475.842841] [drm:__intel_set_power_well], Requesting to disable the power well
>[  475.842845] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
>[  475.842869] [drm:ironlake_update_plane], Writing base 000A1000 00000000 0 0 7680
>[  475.842874] [drm:intel_edp_psr_match_conditions], PSR disable by flag
>[  475.842878] [drm:intel_crtc_mode_set], [ENCODER:9:TMDS-9] set [MODE:0:1920x1080]
>[  475.842880] [drm:intel_ddi_mode_set], Preparing DDI mode on port A, pipe A
>[  475.842884] [drm:ironlake_edp_panel_vdd_on], Turn eDP VDD on
>[  475.842889] [drm:ironlake_wait_panel_power_cycle], Wait for panel power cycle
>[  475.842894] [drm:ironlake_wait_panel_status], mask b800000f value 00000000 status 00000000 control abcd0000
>[  475.842900] [drm:ironlake_edp_panel_vdd_on], PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  475.842903] [drm:ironlake_edp_panel_vdd_on], eDP was not running
>[  475.963763] [drm:ironlake_edp_panel_on], Turn eDP power on
>[  475.963768] [drm:ironlake_wait_panel_power_cycle], Wait for panel power cycle
>[  475.963774] [drm:ironlake_wait_panel_status], mask b800000f value 00000000 status 00000000 control abcd0008
>[  475.963779] [drm:ironlake_wait_panel_on], Wait for panel power on
>[  475.963783] [drm:ironlake_wait_panel_status], mask b000000f value 80000008 status 0000000a control abcd000b
>[  476.095716] [drm:ironlake_edp_panel_vdd_off], Turn eDP VDD off 1
>[  476.095726] [drm:ironlake_panel_vdd_off_sync], PP_STATUS: 0xabcd000b PP_CONTROL: 0x80000008
>[  476.147716] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  476.148325] [drm:intel_dp_start_link_train], clock recovery OK
>[  476.148327] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  476.149232] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  476.149394] [drm:ilk_check_wm], WM1: enabled
>[  476.149396] [drm:ilk_check_wm], WM2: enabled
>[  476.149399] [drm:ilk_check_wm], WM3: enabled
>[  476.149400] [drm:ilk_check_wm], WM4: enabled
>[  476.149403] [drm:ilk_check_wm], WM0: enabled
>[  476.200591] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  476.252571] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  476.252576] [drm:intel_update_fbc], framebuffer not tiled or fenced, disabling compression
>[  476.252735] [drm:ironlake_edp_backlight_on], 
>[  476.254580] [drm:intel_panel_actually_set_backlight], set backlight PWM = 765
>[  476.254583] [drm:intel_edp_psr_match_conditions], PSR disable by flag
>[  476.270571] [drm:intel_connector_check_state], [CONNECTOR:10:eDP-1]
>[  476.270576] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  476.270579] [drm:check_encoder_state], [ENCODER:17:TMDS-17]
>[  476.270582] [drm:check_crtc_state], [CRTC:3]
>[  476.270590] [drm:check_crtc_state], [CRTC:5]
>[  476.270593] [drm:check_crtc_state], [CRTC:7]
>[  476.270600] [drm:intel_crtc_set_config], [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  476.270602] [drm:intel_set_config_compute_mode_changes], inactive crtc, full mode set
>[  476.270605] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=1, fb_changed=0
>[  476.270608] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  476.270611] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  476.270614] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  476.270616] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  476.270619] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  476.270623] [drm:connected_sink_compute_bpp], [CONNECTOR:18:HDMI-A-1] checking for sink bpp constrains
>[  476.270633] [drm:intel_hdmi_compute_config], picking bpc to 8 for HDMI output
>[  476.270635] [drm:intel_hdmi_compute_config], forcing pipe bpc to 24 for HDMI
>[  476.270638] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  476.270641] [drm:intel_dump_pipe_config], [CRTC:5][modeset] config for pipe B
>[  476.270643] [drm:intel_dump_pipe_config], cpu_transcoder: B
>[  476.270645] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  476.270648] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  476.270651] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  476.270653] [drm:intel_dump_pipe_config], requested mode:
>[  476.270659] [drm:drm_mode_debug_printmodeline], Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5
>[  476.270661] [drm:intel_dump_pipe_config], adjusted mode:
>[  476.270666] [drm:drm_mode_debug_printmodeline], Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5
>[  476.270671] [drm:intel_dump_crtc_timings], crtc timings: 148500 1920 2008 2052 2200 1080 1082 1087 1125, type: 0x48 flags: 0x5
>[  476.270673] [drm:intel_dump_pipe_config], port clock: 148500
>[  476.270675] [drm:intel_dump_pipe_config], pipe src size: 1920x1080
>[  476.270678] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  476.270680] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000
>[  476.270682] [drm:intel_dump_pipe_config], ips: 0
>[  476.270684] [drm:intel_dump_pipe_config], double wide: 0
>[  476.270689] [drm:__intel_set_power_well], Enabling power well
>[  476.270694] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe B
>[  476.274270] [drm:intel_ddi_calculate_wrpll], WRPLL: 148500000Hz refresh rate with p=6, n2=33 r2=20
>[  476.274312] [drm:ironlake_update_plane], Writing base 000A1000 00000000 0 0 7680
>[  476.274317] [drm:intel_edp_psr_match_conditions], PSR disable by flag
>[  476.274321] [drm:intel_crtc_mode_set], [ENCODER:17:TMDS-17] set [MODE:0:1920x1080]
>[  476.274323] [drm:intel_ddi_mode_set], Preparing DDI mode on port C, pipe B
>[  476.274325] [drm:intel_ddi_mode_set], HDMI audio on pipe B on DDI
>[  476.274327] [drm:intel_ddi_mode_set], HDMI audio: write eld information
>[  476.274331] [drm:intel_write_eld], ELD on [CONNECTOR:18:HDMI-A-1], [ENCODER:17:TMDS-17]
>[  476.274333] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
>[  476.274334] [drm:haswell_write_eld], HDMI audio: enable codec
>[  476.325543] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  476.325546] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x      40
>[  476.325549] [drm:haswell_write_eld], HDMI audio: eld vld status=0x      50
>[  476.325551] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
>[  476.325553] [drm:haswell_write_eld], ELD on pipe B
>[  476.325558] [drm:haswell_write_eld], port num:0
>[  476.325560] [drm:haswell_write_eld], ELD size 9
>[  476.325737] [drm:ilk_check_wm], WM1: enabled
>[  476.325740] [drm:ilk_check_wm], WM2: enabled
>[  476.325742] [drm:ilk_check_wm], WM3: disabled
>[  476.325744] [drm:ilk_check_wm], WM0: enabled
>[  476.325746] [drm:ilk_check_wm], WM0: enabled
>[  476.377525] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  476.429507] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  476.429510] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  476.447535] [drm:intel_connector_check_state], [CONNECTOR:10:eDP-1]
>[  476.447539] [drm:intel_connector_check_state], [CONNECTOR:18:HDMI-A-1]
>[  476.447542] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  476.447544] [drm:check_encoder_state], [ENCODER:17:TMDS-17]
>[  476.447546] [drm:check_crtc_state], [CRTC:3]
>[  476.447554] [drm:check_crtc_state], [CRTC:5]
>[  476.447559] [drm:check_crtc_state], [CRTC:7]
>[  476.447563] [drm:intel_crtc_set_config], [CRTC:7] [NOFB]
>[  476.447566] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=0
>[  476.447568] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  476.447570] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  476.447575] [drm:intel_crtc_set_config], [CRTC:3] [FB:47] #connectors=1 (x y) (0 0)
>[  476.447577] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  476.447579] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  476.447581] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  476.447583] [drm:intel_crtc_set_config], [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  476.447585] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  476.447587] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  476.447589] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  476.447601] [drm:intel_crtc_set_config], [CRTC:3] [FB:47] #connectors=1 (x y) (0 0)
>[  476.447603] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  476.447605] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  476.447607] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  476.447609] [drm:intel_crtc_set_config], [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  476.447611] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  476.447612] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  476.447614] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  476.457999] [drm:i915_driver_open], 
>[  476.458012] [drm:i915_driver_open], 
>[  476.458776] [drm:intel_crtc_cursor_set], cursor off
>[  476.458782] [drm:intel_crtc_set_config], [CRTC:3] [FB:47] #connectors=1 (x y) (0 0)
>[  476.458789] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  476.458794] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  476.458798] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  476.458803] [drm:intel_crtc_cursor_set], cursor off
>[  476.458806] [drm:intel_crtc_set_config], [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  476.458812] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  476.458816] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  476.458821] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  476.458825] [drm:intel_crtc_cursor_set], cursor off
>[  476.458828] [drm:intel_crtc_set_config], [CRTC:7] [NOFB]
>[  476.458832] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=0
>[  476.458838] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  476.458843] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  492.052581] [drm:i915_driver_open], 
>[  492.052606] [drm:intel_crtc_cursor_set], cursor off
>[  492.052610] [drm:intel_crtc_set_config], [CRTC:3] [FB:47] #connectors=1 (x y) (0 0)
>[  492.052615] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  492.052619] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  492.052622] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  492.052626] [drm:intel_crtc_cursor_set], cursor off
>[  492.052628] [drm:intel_crtc_set_config], [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  492.052631] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  492.052634] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  492.052637] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  492.052640] [drm:intel_crtc_cursor_set], cursor off
>[  492.052642] [drm:intel_crtc_set_config], [CRTC:7] [NOFB]
>[  492.052644] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=0
>[  492.052647] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  492.052650] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  492.052657] [drm:i915_driver_open], 
>[  492.053265] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[2] ENCODERS[2]
>[  492.053282] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[2] ENCODERS[2]
>[  492.053302] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[2] ENCODERS[2]
>[  492.053308] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[2] ENCODERS[2]
>[  492.053317] [drm:drm_mode_getconnector], [CONNECTOR:18:?]
>[  492.053323] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:HDMI-A-1]
>[  492.053332] [drm:intel_hdmi_detect], [CONNECTOR:18:HDMI-A-1]
>[  492.078519] [drm:drm_detect_monitor_audio], Monitor has basic audio support
>[  492.103825] [drm:drm_edid_to_eld], ELD monitor VP2770 SERIES
>[  492.103830] [drm:parse_hdmi_vsdb], HDMI: DVI dual 1, max TMDS clock 270, latency present 0 0, video latency 0 0, audio latency 0 0
>[  492.103854] [drm:drm_edid_to_eld], ELD size 9, SAD count 1
>[  492.103960] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:HDMI-A-1] probed modes :
>[  492.103964] [drm:drm_mode_debug_printmodeline], Modeline 20:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5
>[  492.103972] [drm:drm_mode_debug_printmodeline], Modeline 21:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  492.103977] [drm:drm_mode_debug_printmodeline], Modeline 66:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  492.103984] [drm:drm_mode_debug_printmodeline], Modeline 22:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  492.103990] [drm:drm_mode_debug_printmodeline], Modeline 67:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  492.103996] [drm:drm_mode_debug_printmodeline], Modeline 56:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  492.104005] [drm:drm_mode_debug_printmodeline], Modeline 57:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  492.104012] [drm:drm_mode_debug_printmodeline], Modeline 26:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
>[  492.104018] [drm:drm_mode_debug_printmodeline], Modeline 25:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[  492.104025] [drm:drm_mode_debug_printmodeline], Modeline 27:"1600x900" 60 118963 1600 1696 1864 2128 900 901 904 932 0x0 0x6
>[  492.104033] [drm:drm_mode_debug_printmodeline], Modeline 37:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  492.104039] [drm:drm_mode_debug_printmodeline], Modeline 29:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  492.104046] [drm:drm_mode_debug_printmodeline], Modeline 28:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[  492.104054] [drm:drm_mode_debug_printmodeline], Modeline 44:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  492.104061] [drm:drm_mode_debug_printmodeline], Modeline 23:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  492.104068] [drm:drm_mode_debug_printmodeline], Modeline 68:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  492.104075] [drm:drm_mode_debug_printmodeline], Modeline 58:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  492.104082] [drm:drm_mode_debug_printmodeline], Modeline 63:"1440x576" 50 54000 1440 1464 1592 1728 576 581 586 625 0x40 0xa
>[  492.104089] [drm:drm_mode_debug_printmodeline], Modeline 61:"1440x576i" 50 27000 1440 1464 1590 1728 576 580 586 625 0x40 0x101a
>[  492.104095] [drm:drm_mode_debug_printmodeline], Modeline 38:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  492.104104] [drm:drm_mode_debug_printmodeline], Modeline 39:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[  492.104110] [drm:drm_mode_debug_printmodeline], Modeline 40:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  492.104117] [drm:drm_mode_debug_printmodeline], Modeline 80:"1440x480" 60 54054 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[  492.104124] [drm:drm_mode_debug_printmodeline], Modeline 54:"1440x480" 60 54000 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[  492.104131] [drm:drm_mode_debug_printmodeline], Modeline 76:"1440x480i" 60 27027 1440 1478 1602 1716 480 488 494 525 0x40 0x101a
>[  492.104138] [drm:drm_mode_debug_printmodeline], Modeline 50:"1440x480i" 60 27000 1440 1478 1602 1716 480 488 494 525 0x40 0x101a
>[  492.104146] [drm:drm_mode_debug_printmodeline], Modeline 41:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[  492.104153] [drm:drm_mode_debug_printmodeline], Modeline 42:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  492.104160] [drm:drm_mode_debug_printmodeline], Modeline 43:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  492.104167] [drm:drm_mode_debug_printmodeline], Modeline 30:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  492.104173] [drm:drm_mode_debug_printmodeline], Modeline 31:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  492.104180] [drm:drm_mode_debug_printmodeline], Modeline 59:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  492.104186] [drm:drm_mode_debug_printmodeline], Modeline 69:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  492.104194] [drm:drm_mode_debug_printmodeline], Modeline 78:"1440x240" 60 27027 1440 1478 1602 1716 240 244 247 262 0x40 0x100a
>[  492.104201] [drm:drm_mode_debug_printmodeline], Modeline 24:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  492.104207] [drm:drm_mode_debug_printmodeline], Modeline 52:"1440x240" 60 27000 1440 1478 1602 1716 240 244 247 262 0x40 0x100a
>[  492.104214] [drm:drm_mode_debug_printmodeline], Modeline 32:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  492.104221] [drm:drm_mode_debug_printmodeline], Modeline 33:"640x480" 73 31500 640 664 704 832 480 489 491 520 0x40 0xa
>[  492.104228] [drm:drm_mode_debug_printmodeline], Modeline 34:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[  492.104234] [drm:drm_mode_debug_printmodeline], Modeline 35:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  492.104243] [drm:drm_mode_debug_printmodeline], Modeline 65:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  492.104249] [drm:drm_mode_debug_printmodeline], Modeline 36:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  492.104277] [drm:drm_mode_getconnector], [CONNECTOR:18:?]
>[  492.104314] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[2] ENCODERS[2]
>[  492.104322] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[2] ENCODERS[2]
>[  492.104353] [drm:drm_mode_addfb], [FB:48]
>[  492.187974] [drm:drm_mode_setcrtc], [CRTC:3]
>[  492.187983] [drm:drm_mode_setcrtc], [CONNECTOR:18:HDMI-A-1]
>[  492.187987] [drm:intel_crtc_set_config], [CRTC:3] [FB:48] #connectors=1 (x y) (0 0)
>[  492.187992] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  492.187994] [drm:drm_mode_debug_printmodeline], Modeline 45:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  492.187999] [drm:drm_mode_debug_printmodeline], Modeline 49:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  492.188004] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  492.188007] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [NOCRTC]
>[  492.188010] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  492.188012] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:3]
>[  492.188015] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  492.188017] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  492.188020] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 2
>[  492.188024] [drm:connected_sink_compute_bpp], [CONNECTOR:18:HDMI-A-1] checking for sink bpp constrains
>[  492.188030] [drm:intel_hdmi_compute_config], picking bpc to 8 for HDMI output
>[  492.188032] [drm:intel_hdmi_compute_config], forcing pipe bpc to 24 for HDMI
>[  492.188035] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  492.188038] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  492.188041] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  492.188043] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  492.188045] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  492.188049] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  492.188051] [drm:intel_dump_pipe_config], requested mode:
>[  492.188053] [drm:drm_mode_debug_printmodeline], Modeline 0:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  492.188058] [drm:intel_dump_pipe_config], adjusted mode:
>[  492.188059] [drm:drm_mode_debug_printmodeline], Modeline 0:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  492.188063] [drm:intel_dump_crtc_timings], crtc timings: 27000 720 732 796 864 576 581 586 625, type: 0x40 flags: 0xa
>[  492.188067] [drm:intel_dump_pipe_config], port clock: 27000
>[  492.188069] [drm:intel_dump_pipe_config], pipe src size: 720x576
>[  492.188071] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  492.188084] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000
>[  492.188086] [drm:intel_dump_pipe_config], ips: 1
>[  492.188088] [drm:intel_dump_pipe_config], double wide: 0
>[  492.207893] [drm:ilk_check_wm], WM1: enabled
>[  492.207900] [drm:ilk_check_wm], WM2: enabled
>[  492.207903] [drm:ilk_check_wm], WM3: enabled
>[  492.207905] [drm:ilk_check_wm], WM4: enabled
>[  492.207907] [drm:ilk_check_wm], WM0: enabled
>[  492.207919] [drm:intel_update_fbc], framebuffer not tiled or fenced, disabling compression
>[  492.207923] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
>[  492.209881] [drm:intel_panel_actually_set_backlight], set backlight PWM = 0
>[  492.209892] [drm:ironlake_edp_backlight_off], 
>[  492.446807] [drm:ironlake_edp_panel_vdd_on], Turn eDP VDD on
>[  492.446816] [drm:ironlake_edp_panel_vdd_on], eDP VDD already on
>[  492.446818] [drm:ironlake_edp_panel_off], Turn eDP power off
>[  492.446825] [drm:ironlake_wait_panel_off], Wait for panel power off time
>[  492.446829] [drm:ironlake_wait_panel_status], mask b000000f value 00000000 status 80000008 control abcd0000
>[  493.227526] [drm:ilk_check_wm], WM1: enabled
>[  493.227532] [drm:ilk_check_wm], WM2: enabled
>[  493.227535] [drm:ilk_check_wm], WM3: enabled
>[  493.227537] [drm:ilk_check_wm], WM4: enabled
>[  493.227548] [drm:intel_update_fbc], no output, disabling
>[  493.227556] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
>[  493.229935] [drm:intel_ddi_calculate_wrpll], WRPLL: 27000000Hz refresh rate with p=30, n2=21 r2=14
>[  493.232609] [drm:ironlake_update_plane], Writing base 0088B000 00000000 0 0 4096
>[  493.232617] [drm:intel_edp_psr_match_conditions], PSR disable by flag
>[  493.232622] [drm:intel_crtc_mode_set], [ENCODER:17:TMDS-17] set [MODE:0:720x576]
>[  493.232625] [drm:intel_ddi_mode_set], Preparing DDI mode on port C, pipe A
>[  493.232627] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
>[  493.232629] [drm:intel_ddi_mode_set], HDMI audio: write eld information
>[  493.232633] [drm:intel_write_eld], ELD on [CONNECTOR:18:HDMI-A-1], [ENCODER:17:TMDS-17]
>[  493.232636] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
>[  493.232638] [drm:haswell_write_eld], HDMI audio: enable codec
>[  493.284493] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  493.284500] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       4
>[  493.284505] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
>[  493.284507] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
>[  493.284510] [drm:haswell_write_eld], ELD on pipe A
>[  493.284517] [drm:haswell_write_eld], port num:0
>[  493.284519] [drm:haswell_write_eld], ELD size 9
>[  493.284693] [drm:ilk_check_wm], WM1: enabled
>[  493.284696] [drm:ilk_check_wm], WM2: enabled
>[  493.284699] [drm:ilk_check_wm], WM3: enabled
>[  493.284701] [drm:ilk_check_wm], WM4: enabled
>[  493.284703] [drm:ilk_check_wm], WM0: enabled
>[  493.336475] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  493.388461] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  493.388475] [drm:i915_setup_compression], reserved 8388608 bytes of contiguous stolen space for FBC
>[  493.410459] [drm:intel_connector_check_state], [CONNECTOR:18:HDMI-A-1]
>[  493.410467] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  493.410471] [drm:check_encoder_state], [ENCODER:17:TMDS-17]
>[  493.410475] [drm:check_crtc_state], [CRTC:3]
>[  493.410483] [drm:check_crtc_state], [CRTC:5]
>[  493.410486] [drm:check_crtc_state], [CRTC:7]
>[  493.430149] [drm:ivb_err_int_handler], Pipe A FIFO underrun
>[  493.438538] [drm:gen7_enable_fbc], enabled fbc on plane 0
>[  497.356739] [drm:intel_crtc_set_config], [CRTC:3] [FB:47] #connectors=1 (x y) (0 0)
>[  497.356743] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  497.356747] [drm:drm_mode_debug_printmodeline], Modeline 49:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  497.356751] [drm:drm_mode_debug_printmodeline], Modeline 45:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  497.356753] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  497.356755] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  497.356757] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [NOCRTC]
>[  497.356759] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  497.356761] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  497.356762] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  497.356763] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  497.356766] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  497.356770] [drm:connected_sink_compute_bpp], [CONNECTOR:10:eDP-1] checking for sink bpp constrains
>[  497.356774] [drm:intel_dp_compute_config], DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  497.356776] [drm:intel_dp_compute_config], clamping bpp for eDP panel to BIOS-provided 18
>[  497.356778] [drm:intel_dp_compute_config], DP link bw 06 lane count 2 clock 162000 bpp 18
>[  497.356780] [drm:intel_dp_compute_config], DP link bw required 249804 available 259200
>[  497.356783] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 18, dithering: 1
>[  497.356785] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  497.356786] [drm:intel_dump_pipe_config], cpu_transcoder: P
>[  497.356788] [drm:intel_dump_pipe_config], pipe bpp: 18, dithering: 1
>[  497.356790] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  497.356793] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 4042260, gmch_n: 4194304, link_m: 224570, link_n: 262144, tu: 64
>[  497.356794] [drm:intel_dump_pipe_config], requested mode:
>[  497.356797] [drm:drm_mode_debug_printmodeline], Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  497.356798] [drm:intel_dump_pipe_config], adjusted mode:
>[  497.356801] [drm:drm_mode_debug_printmodeline], Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  497.356804] [drm:intel_dump_crtc_timings], crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  497.356806] [drm:intel_dump_pipe_config], port clock: 162000
>[  497.356807] [drm:intel_dump_pipe_config], pipe src size: 1920x1080
>[  497.356810] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  497.356811] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000
>[  497.356812] [drm:intel_dump_pipe_config], ips: 1
>[  497.356814] [drm:intel_dump_pipe_config], double wide: 0
>[  497.358043] [drm:ironlake_disable_fbc], disabled FBC
>[  497.408024] [drm:ilk_check_wm], WM1: enabled
>[  497.408026] [drm:ilk_check_wm], WM2: enabled
>[  497.408028] [drm:ilk_check_wm], WM3: enabled
>[  497.408029] [drm:ilk_check_wm], WM4: enabled
>[  497.408039] [drm:intel_update_fbc], no output, disabling
>[  497.408048] [drm:__intel_set_power_well], Requesting to disable the power well
>[  497.408052] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
>[  497.408077] [drm:ironlake_update_plane], Writing base 000A1000 00000000 0 0 7680
>[  497.408082] [drm:intel_edp_psr_match_conditions], PSR disable by flag
>[  497.408086] [drm:intel_crtc_mode_set], [ENCODER:9:TMDS-9] set [MODE:0:1920x1080]
>[  497.408089] [drm:intel_ddi_mode_set], Preparing DDI mode on port A, pipe A
>[  497.408092] [drm:ironlake_edp_panel_vdd_on], Turn eDP VDD on
>[  497.408097] [drm:ironlake_wait_panel_power_cycle], Wait for panel power cycle
>[  497.408102] [drm:ironlake_wait_panel_status], mask b800000f value 00000000 status 00000000 control abcd0000
>[  497.408109] [drm:ironlake_edp_panel_vdd_on], PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  497.408111] [drm:ironlake_edp_panel_vdd_on], eDP was not running
>[  497.528970] [drm:ironlake_edp_panel_on], Turn eDP power on
>[  497.528976] [drm:ironlake_wait_panel_power_cycle], Wait for panel power cycle
>[  497.528981] [drm:ironlake_wait_panel_status], mask b800000f value 00000000 status 00000000 control abcd0008
>[  497.528987] [drm:ironlake_wait_panel_on], Wait for panel power on
>[  497.528990] [drm:ironlake_wait_panel_status], mask b000000f value 80000008 status 0000000a control abcd000b
>[  497.660922] [drm:ironlake_edp_panel_vdd_off], Turn eDP VDD off 1
>[  497.660932] [drm:ironlake_panel_vdd_off_sync], PP_STATUS: 0xabcd000b PP_CONTROL: 0x80000008
>[  497.712918] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  497.713527] [drm:intel_dp_start_link_train], clock recovery OK
>[  497.713529] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  497.714434] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  497.714596] [drm:ilk_check_wm], WM1: enabled
>[  497.714598] [drm:ilk_check_wm], WM2: enabled
>[  497.714600] [drm:ilk_check_wm], WM3: enabled
>[  497.714602] [drm:ilk_check_wm], WM4: enabled
>[  497.714604] [drm:ilk_check_wm], WM0: enabled
>[  497.765826] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  497.817807] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  497.817813] [drm:intel_update_fbc], framebuffer not tiled or fenced, disabling compression
>[  497.817979] [drm:ironlake_edp_backlight_on], 
>[  497.819786] [drm:intel_panel_actually_set_backlight], set backlight PWM = 765
>[  497.819789] [drm:intel_edp_psr_match_conditions], PSR disable by flag
>[  497.835776] [drm:intel_connector_check_state], [CONNECTOR:10:eDP-1]
>[  497.835780] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  497.835784] [drm:check_encoder_state], [ENCODER:17:TMDS-17]
>[  497.835786] [drm:check_crtc_state], [CRTC:3]
>[  497.835795] [drm:check_crtc_state], [CRTC:5]
>[  497.835797] [drm:check_crtc_state], [CRTC:7]
>[  497.835804] [drm:intel_crtc_set_config], [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  497.835807] [drm:intel_set_config_compute_mode_changes], inactive crtc, full mode set
>[  497.835810] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=1, fb_changed=0
>[  497.835812] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  497.835816] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  497.835819] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  497.835821] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  497.835825] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  497.835829] [drm:connected_sink_compute_bpp], [CONNECTOR:18:HDMI-A-1] checking for sink bpp constrains
>[  497.835838] [drm:intel_hdmi_compute_config], picking bpc to 8 for HDMI output
>[  497.835840] [drm:intel_hdmi_compute_config], forcing pipe bpc to 24 for HDMI
>[  497.835844] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  497.835846] [drm:intel_dump_pipe_config], [CRTC:5][modeset] config for pipe B
>[  497.835848] [drm:intel_dump_pipe_config], cpu_transcoder: B
>[  497.835850] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  497.835854] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  497.835857] [drm:intel_dump_pipe_config], dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  497.835859] [drm:intel_dump_pipe_config], requested mode:
>[  497.835864] [drm:drm_mode_debug_printmodeline], Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5
>[  497.835866] [drm:intel_dump_pipe_config], adjusted mode:
>[  497.835871] [drm:drm_mode_debug_printmodeline], Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5
>[  497.835876] [drm:intel_dump_crtc_timings], crtc timings: 148500 1920 2008 2052 2200 1080 1082 1087 1125, type: 0x48 flags: 0x5
>[  497.835878] [drm:intel_dump_pipe_config], port clock: 148500
>[  497.835880] [drm:intel_dump_pipe_config], pipe src size: 1920x1080
>[  497.835883] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  497.835885] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000
>[  497.835887] [drm:intel_dump_pipe_config], ips: 0
>[  497.835889] [drm:intel_dump_pipe_config], double wide: 0
>[  497.835893] [drm:__intel_set_power_well], Enabling power well
>[  497.835898] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe B
>[  497.839497] [drm:intel_ddi_calculate_wrpll], WRPLL: 148500000Hz refresh rate with p=6, n2=33 r2=20
>[  497.839540] [drm:ironlake_update_plane], Writing base 000A1000 00000000 0 0 7680
>[  497.839545] [drm:intel_edp_psr_match_conditions], PSR disable by flag
>[  497.839549] [drm:intel_crtc_mode_set], [ENCODER:17:TMDS-17] set [MODE:0:1920x1080]
>[  497.839551] [drm:intel_ddi_mode_set], Preparing DDI mode on port C, pipe B
>[  497.839553] [drm:intel_ddi_mode_set], HDMI audio on pipe B on DDI
>[  497.839555] [drm:intel_ddi_mode_set], HDMI audio: write eld information
>[  497.839559] [drm:intel_write_eld], ELD on [CONNECTOR:18:HDMI-A-1], [ENCODER:17:TMDS-17]
>[  497.839561] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
>[  497.839562] [drm:haswell_write_eld], HDMI audio: enable codec
>[  497.890749] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  497.890751] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x      40
>[  497.890754] [drm:haswell_write_eld], HDMI audio: eld vld status=0x      50
>[  497.890756] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
>[  497.890759] [drm:haswell_write_eld], ELD on pipe B
>[  497.890764] [drm:haswell_write_eld], port num:0
>[  497.890766] [drm:haswell_write_eld], ELD size 9
>[  497.890944] [drm:ilk_check_wm], WM1: enabled
>[  497.890946] [drm:ilk_check_wm], WM2: enabled
>[  497.890948] [drm:ilk_check_wm], WM3: disabled
>[  497.890950] [drm:ilk_check_wm], WM0: enabled
>[  497.890952] [drm:ilk_check_wm], WM0: enabled
>[  497.942730] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  497.994712] [drm:ironlake_wait_for_vblank], vblank wait timed out
>[  497.994715] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  498.012710] [drm:intel_connector_check_state], [CONNECTOR:10:eDP-1]
>[  498.012715] [drm:intel_connector_check_state], [CONNECTOR:18:HDMI-A-1]
>[  498.012718] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  498.012721] [drm:check_encoder_state], [ENCODER:17:TMDS-17]
>[  498.012724] [drm:check_crtc_state], [CRTC:3]
>[  498.012732] [drm:check_crtc_state], [CRTC:5]
>[  498.012738] [drm:check_crtc_state], [CRTC:7]
>[  498.012742] [drm:intel_crtc_set_config], [CRTC:7] [NOFB]
>[  498.012745] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=0
>[  498.012749] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  498.012752] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  498.012757] [drm:intel_crtc_set_config], [CRTC:3] [FB:47] #connectors=1 (x y) (0 0)
>[  498.012760] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  498.012763] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  498.012766] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  498.012769] [drm:intel_crtc_set_config], [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  498.012772] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  498.012775] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  498.012777] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  498.012793] [drm:intel_crtc_set_config], [CRTC:3] [FB:47] #connectors=1 (x y) (0 0)
>[  498.012796] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  498.012799] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  498.012801] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  498.012804] [drm:intel_crtc_set_config], [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  498.012807] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  498.012809] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  498.012812] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  498.030339] [drm:i915_driver_open], 
>[  498.030357] [drm:i915_driver_open], 
>[  498.031282] [drm:intel_crtc_cursor_set], cursor off
>[  498.031287] [drm:intel_crtc_set_config], [CRTC:3] [FB:47] #connectors=1 (x y) (0 0)
>[  498.031293] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  498.031298] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  498.031302] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  498.031307] [drm:intel_crtc_cursor_set], cursor off
>[  498.031310] [drm:intel_crtc_set_config], [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  498.031314] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  498.031319] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  498.031323] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]
>[  498.031326] [drm:intel_crtc_cursor_set], cursor off
>[  498.031329] [drm:intel_crtc_set_config], [CRTC:7] [NOFB]
>[  498.031333] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=0
>[  498.031337] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  498.031342] [drm:intel_modeset_stage_output_state], [CONNECTOR:18:HDMI-A-1] to [CRTC:5]

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Attachments on bug 69790: 86503 | 86504

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