Attachment 88483 Details for Bug 69747 – Fix

[patch] Fix

0001-drm-i915-avoid-unclaimed-registers-when-capturing-th.patch (text/plain), 2.71 KB, created by Paulo Zanoni on 2013-11-01 15:31:00 UTC

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Creator: Paulo Zanoni

Created: 2013-11-01 15:31:00 UTC

Size: 2.71 KB

patch

obsolete

>From b1de375af5f86d419933b78caaf9541cbd64013f Mon Sep 17 00:00:00 2001
>From: Paulo Zanoni <paulo.r.zanoni@intel.com>
>Date: Fri, 1 Nov 2013 13:19:12 -0200
>Subject: [PATCH] drm/i915: avoid unclaimed registers when capturing the error
> state
>
>Even though we only check for unclaimed registers while we're writing
>registers, if we read a bad register we'll still trigger a CPU error
>interrupt, and we'll print an "Unclaimed register" DRM_ERROR due to
>that. To avoid this error, just avoid touching power domains that are
>not enabled.
>
>Use kzalloc so we're sure all the disabled domains will be zeroed on
>the error state file. We already print the information that is enough
>to discover if the power well is enabled on the error state file, so
>this should not be a problem.
>
>Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69747
>Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
>---
> drivers/gpu/drm/i915/intel_display.c | 15 ++++++++-------
> 1 file changed, 8 insertions(+), 7 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>index e841cd7..fba7d9b 100644
>--- a/drivers/gpu/drm/i915/intel_display.c
>+++ b/drivers/gpu/drm/i915/intel_display.c
>@@ -11138,7 +11138,7 @@ intel_display_capture_error_state(struct drm_device *dev)
> 	if (INTEL_INFO(dev)->num_pipes == 0)
> 		return NULL;
> 
>-	error = kmalloc(sizeof(*error), GFP_ATOMIC);
>+	error = kzalloc(sizeof(*error), GFP_ATOMIC);
> 	if (error == NULL)
> 		return NULL;
> 
>@@ -11146,6 +11146,9 @@ intel_display_capture_error_state(struct drm_device *dev)
> 		error->power_well_driver = I915_READ(HSW_PWR_WELL_DRIVER);
> 
> 	for_each_pipe(i) {
>+		if (!intel_display_power_enabled(dev, POWER_DOMAIN_PIPE(i)))
>+			continue;
>+
> 		if (INTEL_INFO(dev)->gen <= 6 || IS_VALLEYVIEW(dev)) {
> 			error->cursor[i].control = I915_READ(CURCNTR(i));
> 			error->cursor[i].position = I915_READ(CURPOS(i));
>@@ -11179,6 +11182,10 @@ intel_display_capture_error_state(struct drm_device *dev)
> 	for (i = 0; i < error->num_transcoders; i++) {
> 		enum transcoder cpu_transcoder = transcoders[i];
> 
>+		if (!intel_display_power_enabled(dev,
>+				POWER_DOMAIN_TRANSCODER(cpu_transcoder)))
>+			continue;
>+
> 		error->transcoder[i].cpu_transcoder = cpu_transcoder;
> 
> 		error->transcoder[i].conf = I915_READ(PIPECONF(cpu_transcoder));
>@@ -11190,12 +11197,6 @@ intel_display_capture_error_state(struct drm_device *dev)
> 		error->transcoder[i].vsync = I915_READ(VSYNC(cpu_transcoder));
> 	}
> 
>-	/* In the code above we read the registers without checking if the power
>-	 * well was on, so here we have to clear the FPGA_DBG_RM_NOCLAIM bit to
>-	 * prevent the next I915_WRITE from detecting it and printing an error
>-	 * message. */
>-	intel_uncore_clear_errors(dev);
>-
> 	return error;
> }
> 
>-- 
>1.8.3.1
>

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