Attachment 90786 Details for Bug 72717 – Kernel log with monitor attached to display port

Kernel log with monitor attached to display port

fail-dmesg.log (text/plain), 429.30 KB, created by Matthias Nagel on 2013-12-14 22:02:29 UTC

(hide)

Description:

Filename:

MIME Type:

Creator: Matthias Nagel

Created: 2013-12-14 22:02:29 UTC

Size: 429.30 KB

patch

obsolete

>[    0.000000] Initializing cgroup subsys cpuset
>[    0.000000] Initializing cgroup subsys cpu
>[    0.000000] Initializing cgroup subsys cpuacct
>[    0.000000] Linux version 3.12.5-gentoo (root@matthias-pc) (gcc version 4.7.3 (Gentoo 4.7.3-r1 p1.3, pie-0.5.5) ) #1 SMP Sat Dec 14 17:59:31 CET 2013
>[    0.000000] Command line: \EFI\gentoo\bzImage-3.12.5.efi 
>[    0.000000] e820: BIOS-provided physical RAM map:
>[    0.000000] BIOS-e820: [mem 0x0000000000000000-0x0000000000057fff] usable
>[    0.000000] BIOS-e820: [mem 0x0000000000058000-0x0000000000058fff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000000059000-0x000000000009efff] usable
>[    0.000000] BIOS-e820: [mem 0x000000000009f000-0x000000000009ffff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000000100000-0x00000000cb662fff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000cb663000-0x00000000cb669fff] ACPI NVS
>[    0.000000] BIOS-e820: [mem 0x00000000cb66a000-0x00000000cbab3fff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000cbab4000-0x00000000cbef1fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000cbef2000-0x00000000dd7a5fff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000dd7a6000-0x00000000dd9adfff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000dd9ae000-0x00000000dd9c3fff] ACPI data
>[    0.000000] BIOS-e820: [mem 0x00000000dd9c4000-0x00000000ddf07fff] ACPI NVS
>[    0.000000] BIOS-e820: [mem 0x00000000ddf08000-0x00000000deffefff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000defff000-0x00000000deffffff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000f8000000-0x00000000fbffffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fec00000-0x00000000fec00fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fed00000-0x00000000fed03fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fed1c000-0x00000000fed1ffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fee00000-0x00000000fee00fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000ff000000-0x00000000ffffffff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000100000000-0x000000041effffff] usable
>[    0.000000] e820: update [mem 0xcb0ff018-0xcb11ec57] usable ==> usable
>[    0.000000] e820: update [mem 0xcb0ee018-0xcb0fe057] usable ==> usable
>[    0.000000] e820: update [mem 0xcb0dd018-0xcb0ed057] usable ==> usable
>[    0.000000] extended physical RAM map:
>[    0.000000] reserve setup_data: [mem 0x0000000000000000-0x0000000000057fff] usable
>[    0.000000] reserve setup_data: [mem 0x0000000000058000-0x0000000000058fff] reserved
>[    0.000000] reserve setup_data: [mem 0x0000000000059000-0x000000000009efff] usable
>[    0.000000] reserve setup_data: [mem 0x000000000009f000-0x000000000009ffff] reserved
>[    0.000000] reserve setup_data: [mem 0x0000000000100000-0x00000000cb0dd017] usable
>[    0.000000] reserve setup_data: [mem 0x00000000cb0dd018-0x00000000cb0ed057] usable
>[    0.000000] reserve setup_data: [mem 0x00000000cb0ed058-0x00000000cb0ee017] usable
>[    0.000000] reserve setup_data: [mem 0x00000000cb0ee018-0x00000000cb0fe057] usable
>[    0.000000] reserve setup_data: [mem 0x00000000cb0fe058-0x00000000cb0ff017] usable
>[    0.000000] reserve setup_data: [mem 0x00000000cb0ff018-0x00000000cb11ec57] usable
>[    0.000000] reserve setup_data: [mem 0x00000000cb11ec58-0x00000000cb662fff] usable
>[    0.000000] reserve setup_data: [mem 0x00000000cb663000-0x00000000cb669fff] ACPI NVS
>[    0.000000] reserve setup_data: [mem 0x00000000cb66a000-0x00000000cbab3fff] usable
>[    0.000000] reserve setup_data: [mem 0x00000000cbab4000-0x00000000cbef1fff] reserved
>[    0.000000] reserve setup_data: [mem 0x00000000cbef2000-0x00000000dd7a5fff] usable
>[    0.000000] reserve setup_data: [mem 0x00000000dd7a6000-0x00000000dd9adfff] reserved
>[    0.000000] reserve setup_data: [mem 0x00000000dd9ae000-0x00000000dd9c3fff] ACPI data
>[    0.000000] reserve setup_data: [mem 0x00000000dd9c4000-0x00000000ddf07fff] ACPI NVS
>[    0.000000] reserve setup_data: [mem 0x00000000ddf08000-0x00000000deffefff] reserved
>[    0.000000] reserve setup_data: [mem 0x00000000defff000-0x00000000deffffff] usable
>[    0.000000] reserve setup_data: [mem 0x00000000f8000000-0x00000000fbffffff] reserved
>[    0.000000] reserve setup_data: [mem 0x00000000fec00000-0x00000000fec00fff] reserved
>[    0.000000] reserve setup_data: [mem 0x00000000fed00000-0x00000000fed03fff] reserved
>[    0.000000] reserve setup_data: [mem 0x00000000fed1c000-0x00000000fed1ffff] reserved
>[    0.000000] reserve setup_data: [mem 0x00000000fee00000-0x00000000fee00fff] reserved
>[    0.000000] reserve setup_data: [mem 0x00000000ff000000-0x00000000ffffffff] reserved
>[    0.000000] reserve setup_data: [mem 0x0000000100000000-0x000000041effffff] usable
>[    0.000000] NX (Execute Disable) protection: active
>[    0.000000] efi: EFI v2.31 by American Megatrends
>[    0.000000] efi:  ACPI=0xdd9b2000  ACPI 2.0=0xdd9b2000  SMBIOS=0xf04c0  MPS=0xfd530 
>[    0.000000] efi: mem00: type=3, attr=0xf, range=[0x0000000000000000-0x0000000000008000) (0MB)
>[    0.000000] efi: mem01: type=2, attr=0xf, range=[0x0000000000008000-0x0000000000010000) (0MB)
>[    0.000000] efi: mem02: type=7, attr=0xf, range=[0x0000000000010000-0x0000000000058000) (0MB)
>[    0.000000] efi: mem03: type=0, attr=0xf, range=[0x0000000000058000-0x0000000000059000) (0MB)
>[    0.000000] efi: mem04: type=7, attr=0xf, range=[0x0000000000059000-0x000000000005f000) (0MB)
>[    0.000000] efi: mem05: type=4, attr=0xf, range=[0x000000000005f000-0x0000000000060000) (0MB)
>[    0.000000] efi: mem06: type=3, attr=0xf, range=[0x0000000000060000-0x000000000009f000) (0MB)
>[    0.000000] efi: mem07: type=6, attr=0x800000000000000f, range=[0x000000000009f000-0x00000000000a0000) (0MB)
>[    0.000000] efi: mem08: type=7, attr=0xf, range=[0x0000000000100000-0x0000000001000000) (15MB)
>[    0.000000] efi: mem09: type=2, attr=0xf, range=[0x0000000001000000-0x0000000001f63000) (15MB)
>[    0.000000] efi: mem10: type=7, attr=0xf, range=[0x0000000001f63000-0x00000000c7f10000) (3167MB)
>[    0.000000] efi: mem11: type=2, attr=0xf, range=[0x00000000c7f10000-0x00000000c8010000) (1MB)
>[    0.000000] efi: mem12: type=7, attr=0xf, range=[0x00000000c8010000-0x00000000cb0dd000) (48MB)
>[    0.000000] efi: mem13: type=2, attr=0xf, range=[0x00000000cb0dd000-0x00000000cb11f000) (0MB)
>[    0.000000] efi: mem14: type=1, attr=0xf, range=[0x00000000cb11f000-0x00000000cb663000) (5MB)
>[    0.000000] efi: mem15: type=10, attr=0xf, range=[0x00000000cb663000-0x00000000cb66a000) (0MB)
>[    0.000000] efi: mem16: type=4, attr=0xf, range=[0x00000000cb66a000-0x00000000cb7c3000) (1MB)
>[    0.000000] efi: mem17: type=3, attr=0xf, range=[0x00000000cb7c3000-0x00000000cba75000) (2MB)
>[    0.000000] efi: mem18: type=4, attr=0xf, range=[0x00000000cba75000-0x00000000cba90000) (0MB)
>[    0.000000] efi: mem19: type=3, attr=0xf, range=[0x00000000cba90000-0x00000000cbaaa000) (0MB)
>[    0.000000] efi: mem20: type=4, attr=0xf, range=[0x00000000cbaaa000-0x00000000cbab4000) (0MB)
>[    0.000000] efi: mem21: type=6, attr=0x800000000000000f, range=[0x00000000cbab4000-0x00000000cbef2000) (4MB)
>[    0.000000] efi: mem22: type=4, attr=0xf, range=[0x00000000cbef2000-0x00000000cbf00000) (0MB)
>[    0.000000] efi: mem23: type=7, attr=0xf, range=[0x00000000cbf00000-0x00000000cbf0e000) (0MB)
>[    0.000000] efi: mem24: type=2, attr=0xf, range=[0x00000000cbf0e000-0x00000000cbf0f000) (0MB)
>[    0.000000] efi: mem25: type=7, attr=0xf, range=[0x00000000cbf0f000-0x00000000cf984000) (58MB)
>[    0.000000] efi: mem26: type=4, attr=0xf, range=[0x00000000cf984000-0x00000000cfe10000) (4MB)
>[    0.000000] efi: mem27: type=7, attr=0xf, range=[0x00000000cfe10000-0x00000000cfe1a000) (0MB)
>[    0.000000] efi: mem28: type=4, attr=0xf, range=[0x00000000cfe1a000-0x00000000cfe30000) (0MB)
>[    0.000000] efi: mem29: type=7, attr=0xf, range=[0x00000000cfe30000-0x00000000cfe39000) (0MB)
>[    0.000000] efi: mem30: type=4, attr=0xf, range=[0x00000000cfe39000-0x00000000cfe77000) (0MB)
>[    0.000000] efi: mem31: type=7, attr=0xf, range=[0x00000000cfe77000-0x00000000cfe84000) (0MB)
>[    0.000000] efi: mem32: type=4, attr=0xf, range=[0x00000000cfe84000-0x00000000cfee6000) (0MB)
>[    0.000000] efi: mem33: type=7, attr=0xf, range=[0x00000000cfee6000-0x00000000cff06000) (0MB)
>[    0.000000] efi: mem34: type=4, attr=0xf, range=[0x00000000cff06000-0x00000000cff2d000) (0MB)
>[    0.000000] efi: mem35: type=7, attr=0xf, range=[0x00000000cff2d000-0x00000000cff41000) (0MB)
>[    0.000000] efi: mem36: type=4, attr=0xf, range=[0x00000000cff41000-0x00000000cff6c000) (0MB)
>[    0.000000] efi: mem37: type=7, attr=0xf, range=[0x00000000cff6c000-0x00000000cff83000) (0MB)
>[    0.000000] efi: mem38: type=4, attr=0xf, range=[0x00000000cff83000-0x00000000cffb9000) (0MB)
>[    0.000000] efi: mem39: type=7, attr=0xf, range=[0x00000000cffb9000-0x00000000cffd1000) (0MB)
>[    0.000000] efi: mem40: type=4, attr=0xf, range=[0x00000000cffd1000-0x00000000cfffe000) (0MB)
>[    0.000000] efi: mem41: type=7, attr=0xf, range=[0x00000000cfffe000-0x00000000d0016000) (0MB)
>[    0.000000] efi: mem42: type=4, attr=0xf, range=[0x00000000d0016000-0x00000000d001f000) (0MB)
>[    0.000000] efi: mem43: type=7, attr=0xf, range=[0x00000000d001f000-0x00000000d0035000) (0MB)
>[    0.000000] efi: mem44: type=4, attr=0xf, range=[0x00000000d0035000-0x00000000d0114000) (0MB)
>[    0.000000] efi: mem45: type=7, attr=0xf, range=[0x00000000d0114000-0x00000000d011e000) (0MB)
>[    0.000000] efi: mem46: type=4, attr=0xf, range=[0x00000000d011e000-0x00000000d0136000) (0MB)
>[    0.000000] efi: mem47: type=7, attr=0xf, range=[0x00000000d0136000-0x00000000d013f000) (0MB)
>[    0.000000] efi: mem48: type=4, attr=0xf, range=[0x00000000d013f000-0x00000000d017d000) (0MB)
>[    0.000000] efi: mem49: type=7, attr=0xf, range=[0x00000000d017d000-0x00000000d018a000) (0MB)
>[    0.000000] efi: mem50: type=4, attr=0xf, range=[0x00000000d018a000-0x00000000d0232000) (0MB)
>[    0.000000] efi: mem51: type=7, attr=0xf, range=[0x00000000d0232000-0x00000000d0246000) (0MB)
>[    0.000000] efi: mem52: type=4, attr=0xf, range=[0x00000000d0246000-0x00000000d0270000) (0MB)
>[    0.000000] efi: mem53: type=7, attr=0xf, range=[0x00000000d0270000-0x00000000d0287000) (0MB)
>[    0.000000] efi: mem54: type=4, attr=0xf, range=[0x00000000d0287000-0x00000000d02bd000) (0MB)
>[    0.000000] efi: mem55: type=7, attr=0xf, range=[0x00000000d02bd000-0x00000000d02d5000) (0MB)
>[    0.000000] efi: mem56: type=4, attr=0xf, range=[0x00000000d02d5000-0x00000000d0302000) (0MB)
>[    0.000000] efi: mem57: type=7, attr=0xf, range=[0x00000000d0302000-0x00000000d031a000) (0MB)
>[    0.000000] efi: mem58: type=4, attr=0xf, range=[0x00000000d031a000-0x00000000d03b8000) (0MB)
>[    0.000000] efi: mem59: type=7, attr=0xf, range=[0x00000000d03b8000-0x00000000d03c4000) (0MB)
>[    0.000000] efi: mem60: type=4, attr=0xf, range=[0x00000000d03c4000-0x00000000d03e6000) (0MB)
>[    0.000000] efi: mem61: type=7, attr=0xf, range=[0x00000000d03e6000-0x00000000d03f4000) (0MB)
>[    0.000000] efi: mem62: type=4, attr=0xf, range=[0x00000000d03f4000-0x00000000d0419000) (0MB)
>[    0.000000] efi: mem63: type=7, attr=0xf, range=[0x00000000d0419000-0x00000000d0423000) (0MB)
>[    0.000000] efi: mem64: type=4, attr=0xf, range=[0x00000000d0423000-0x00000000d0439000) (0MB)
>[    0.000000] efi: mem65: type=7, attr=0xf, range=[0x00000000d0439000-0x00000000d0442000) (0MB)
>[    0.000000] efi: mem66: type=4, attr=0xf, range=[0x00000000d0442000-0x00000000d0480000) (0MB)
>[    0.000000] efi: mem67: type=7, attr=0xf, range=[0x00000000d0480000-0x00000000d048d000) (0MB)
>[    0.000000] efi: mem68: type=4, attr=0xf, range=[0x00000000d048d000-0x00000000d0537000) (0MB)
>[    0.000000] efi: mem69: type=7, attr=0xf, range=[0x00000000d0537000-0x00000000d054b000) (0MB)
>[    0.000000] efi: mem70: type=4, attr=0xf, range=[0x00000000d054b000-0x00000000d0573000) (0MB)
>[    0.000000] efi: mem71: type=7, attr=0xf, range=[0x00000000d0573000-0x00000000d0575000) (0MB)
>[    0.000000] efi: mem72: type=4, attr=0xf, range=[0x00000000d0575000-0x00000000d05c3000) (0MB)
>[    0.000000] efi: mem73: type=7, attr=0xf, range=[0x00000000d05c3000-0x00000000d05ca000) (0MB)
>[    0.000000] efi: mem74: type=4, attr=0xf, range=[0x00000000d05ca000-0x00000000d0607000) (0MB)
>[    0.000000] efi: mem75: type=7, attr=0xf, range=[0x00000000d0607000-0x00000000d060e000) (0MB)
>[    0.000000] efi: mem76: type=4, attr=0xf, range=[0x00000000d060e000-0x00000000d071d000) (1MB)
>[    0.000000] efi: mem77: type=7, attr=0xf, range=[0x00000000d071d000-0x00000000d0727000) (0MB)
>[    0.000000] efi: mem78: type=4, attr=0xf, range=[0x00000000d0727000-0x00000000d073e000) (0MB)
>[    0.000000] efi: mem79: type=7, attr=0xf, range=[0x00000000d073e000-0x00000000d0747000) (0MB)
>[    0.000000] efi: mem80: type=4, attr=0xf, range=[0x00000000d0747000-0x00000000d07f4000) (0MB)
>[    0.000000] efi: mem81: type=7, attr=0xf, range=[0x00000000d07f4000-0x00000000d07fc000) (0MB)
>[    0.000000] efi: mem82: type=4, attr=0xf, range=[0x00000000d07fc000-0x00000000d083a000) (0MB)
>[    0.000000] efi: mem83: type=7, attr=0xf, range=[0x00000000d083a000-0x00000000d0840000) (0MB)
>[    0.000000] efi: mem84: type=4, attr=0xf, range=[0x00000000d0840000-0x00000000d09c4000) (1MB)
>[    0.000000] efi: mem85: type=7, attr=0xf, range=[0x00000000d09c4000-0x00000000d09c6000) (0MB)
>[    0.000000] efi: mem86: type=4, attr=0xf, range=[0x00000000d09c6000-0x00000000d0a26000) (0MB)
>[    0.000000] efi: mem87: type=7, attr=0xf, range=[0x00000000d0a26000-0x00000000d0a30000) (0MB)
>[    0.000000] efi: mem88: type=4, attr=0xf, range=[0x00000000d0a30000-0x00000000d0a48000) (0MB)
>[    0.000000] efi: mem89: type=7, attr=0xf, range=[0x00000000d0a48000-0x00000000d0a51000) (0MB)
>[    0.000000] efi: mem90: type=4, attr=0xf, range=[0x00000000d0a51000-0x00000000d0bd2000) (1MB)
>[    0.000000] efi: mem91: type=7, attr=0xf, range=[0x00000000d0bd2000-0x00000000d0bdc000) (0MB)
>[    0.000000] efi: mem92: type=4, attr=0xf, range=[0x00000000d0bdc000-0x00000000d0d38000) (1MB)
>[    0.000000] efi: mem93: type=7, attr=0xf, range=[0x00000000d0d38000-0x00000000d0d42000) (0MB)
>[    0.000000] efi: mem94: type=4, attr=0xf, range=[0x00000000d0d42000-0x00000000d0d59000) (0MB)
>[    0.000000] efi: mem95: type=7, attr=0xf, range=[0x00000000d0d59000-0x00000000d0d62000) (0MB)
>[    0.000000] efi: mem96: type=4, attr=0xf, range=[0x00000000d0d62000-0x00000000d0ee2000) (1MB)
>[    0.000000] efi: mem97: type=7, attr=0xf, range=[0x00000000d0ee2000-0x00000000d0ee7000) (0MB)
>[    0.000000] efi: mem98: type=4, attr=0xf, range=[0x00000000d0ee7000-0x00000000d11c8000) (2MB)
>[    0.000000] efi: mem99: type=7, attr=0xf, range=[0x00000000d11c8000-0x00000000d11c9000) (0MB)
>[    0.000000] efi: mem100: type=4, attr=0xf, range=[0x00000000d11c9000-0x00000000d126c000) (0MB)
>[    0.000000] efi: mem101: type=7, attr=0xf, range=[0x00000000d126c000-0x00000000d126f000) (0MB)
>[    0.000000] efi: mem102: type=4, attr=0xf, range=[0x00000000d126f000-0x00000000d1309000) (0MB)
>[    0.000000] efi: mem103: type=7, attr=0xf, range=[0x00000000d1309000-0x00000000d130b000) (0MB)
>[    0.000000] efi: mem104: type=4, attr=0xf, range=[0x00000000d130b000-0x00000000d1390000) (0MB)
>[    0.000000] efi: mem105: type=7, attr=0xf, range=[0x00000000d1390000-0x00000000d1392000) (0MB)
>[    0.000000] efi: mem106: type=4, attr=0xf, range=[0x00000000d1392000-0x00000000d13d1000) (0MB)
>[    0.000000] efi: mem107: type=7, attr=0xf, range=[0x00000000d13d1000-0x00000000d13d2000) (0MB)
>[    0.000000] efi: mem108: type=4, attr=0xf, range=[0x00000000d13d2000-0x00000000d1451000) (0MB)
>[    0.000000] efi: mem109: type=7, attr=0xf, range=[0x00000000d1451000-0x00000000d1452000) (0MB)
>[    0.000000] efi: mem110: type=4, attr=0xf, range=[0x00000000d1452000-0x00000000d14b9000) (0MB)
>[    0.000000] efi: mem111: type=7, attr=0xf, range=[0x00000000d14b9000-0x00000000d14ba000) (0MB)
>[    0.000000] efi: mem112: type=4, attr=0xf, range=[0x00000000d14ba000-0x00000000d1529000) (0MB)
>[    0.000000] efi: mem113: type=7, attr=0xf, range=[0x00000000d1529000-0x00000000d152b000) (0MB)
>[    0.000000] efi: mem114: type=4, attr=0xf, range=[0x00000000d152b000-0x00000000dcadf000) (181MB)
>[    0.000000] efi: mem115: type=7, attr=0xf, range=[0x00000000dcadf000-0x00000000dd093000) (5MB)
>[    0.000000] efi: mem116: type=3, attr=0xf, range=[0x00000000dd093000-0x00000000dd7a6000) (7MB)
>[    0.000000] efi: mem117: type=0, attr=0xf, range=[0x00000000dd7a6000-0x00000000dd810000) (0MB)
>[    0.000000] efi: mem118: type=0, attr=0xf, range=[0x00000000dd810000-0x00000000dd9ae000) (1MB)
>[    0.000000] efi: mem119: type=9, attr=0xf, range=[0x00000000dd9ae000-0x00000000dd9b2000) (0MB)
>[    0.000000] efi: mem120: type=9, attr=0xf, range=[0x00000000dd9b2000-0x00000000dd9c4000) (0MB)
>[    0.000000] efi: mem121: type=10, attr=0xf, range=[0x00000000dd9c4000-0x00000000ddadc000) (1MB)
>[    0.000000] efi: mem122: type=10, attr=0xf, range=[0x00000000ddadc000-0x00000000ddf08000) (4MB)
>[    0.000000] efi: mem123: type=6, attr=0x800000000000000f, range=[0x00000000ddf08000-0x00000000de688000) (7MB)
>[    0.000000] efi: mem124: type=6, attr=0x800000000000000f, range=[0x00000000de688000-0x00000000dee89000) (8MB)
>[    0.000000] efi: mem125: type=6, attr=0x800000000000000f, range=[0x00000000dee89000-0x00000000dee8b000) (0MB)
>[    0.000000] efi: mem126: type=6, attr=0x800000000000000f, range=[0x00000000dee8b000-0x00000000deebb000) (0MB)
>[    0.000000] efi: mem127: type=6, attr=0x800000000000000f, range=[0x00000000deebb000-0x00000000deebe000) (0MB)
>[    0.000000] efi: mem128: type=6, attr=0x800000000000000f, range=[0x00000000deebe000-0x00000000def5c000) (0MB)
>[    0.000000] efi: mem129: type=5, attr=0x800000000000000f, range=[0x00000000def5c000-0x00000000def7d000) (0MB)
>[    0.000000] efi: mem130: type=5, attr=0x800000000000000f, range=[0x00000000def7d000-0x00000000defff000) (0MB)
>[    0.000000] efi: mem131: type=4, attr=0xf, range=[0x00000000defff000-0x00000000df000000) (0MB)
>[    0.000000] efi: mem132: type=7, attr=0xf, range=[0x0000000100000000-0x000000041f000000) (12784MB)
>[    0.000000] efi: mem133: type=11, attr=0x8000000000000001, range=[0x00000000f8000000-0x00000000fc000000) (64MB)
>[    0.000000] efi: mem134: type=11, attr=0x8000000000000001, range=[0x00000000fec00000-0x00000000fec01000) (0MB)
>[    0.000000] efi: mem135: type=11, attr=0x8000000000000001, range=[0x00000000fed00000-0x00000000fed04000) (0MB)
>[    0.000000] efi: mem136: type=11, attr=0x8000000000000001, range=[0x00000000fed1c000-0x00000000fed20000) (0MB)
>[    0.000000] efi: mem137: type=11, attr=0x8000000000000001, range=[0x00000000fee00000-0x00000000fee01000) (0MB)
>[    0.000000] efi: mem138: type=11, attr=0x8000000000000001, range=[0x00000000ff000000-0x0000000100000000) (16MB)
>[    0.000000] SMBIOS 2.7 present.
>[    0.000000] DMI: ASUS All Series/P9D WS, BIOS 1103 06/14/2013
>[    0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved
>[    0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable
>[    0.000000] No AGP bridge found
>[    0.000000] e820: last_pfn = 0x41f000 max_arch_pfn = 0x400000000
>[    0.000000] MTRR default type: uncachable
>[    0.000000] MTRR fixed ranges enabled:
>[    0.000000]   00000-9FFFF write-back
>[    0.000000]   A0000-BFFFF uncachable
>[    0.000000]   C0000-CFFFF write-protect
>[    0.000000]   D0000-DFFFF uncachable
>[    0.000000]   E0000-FFFFF write-protect
>[    0.000000] MTRR variable ranges enabled:
>[    0.000000]   0 base 0000000000 mask 7C00000000 write-back
>[    0.000000]   1 base 0400000000 mask 7FF0000000 write-back
>[    0.000000]   2 base 0410000000 mask 7FF8000000 write-back
>[    0.000000]   3 base 0418000000 mask 7FFC000000 write-back
>[    0.000000]   4 base 041C000000 mask 7FFE000000 write-back
>[    0.000000]   5 base 041E000000 mask 7FFF000000 write-back
>[    0.000000]   6 base 00E0000000 mask 7FE0000000 uncachable
>[    0.000000]   7 disabled
>[    0.000000]   8 disabled
>[    0.000000]   9 disabled
>[    0.000000] x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106
>[    0.000000] e820: update [mem 0xe0000000-0xffffffff] usable ==> reserved
>[    0.000000] e820: last_pfn = 0xdf000 max_arch_pfn = 0x400000000
>[    0.000000] found SMP MP-table at [mem 0x000fd880-0x000fd88f] mapped at [ffff8800000fd880]
>[    0.000000] Scanning 1 areas for low memory corruption
>[    0.000000] Base memory trampoline at [ffff880000097000] 97000 size 24576
>[    0.000000] Using GB pages for direct mapping
>[    0.000000] init_memory_mapping: [mem 0x00000000-0x000fffff]
>[    0.000000]  [mem 0x00000000-0x000fffff] page 4k
>[    0.000000] BRK [0x02ca5000, 0x02ca5fff] PGTABLE
>[    0.000000] BRK [0x02ca6000, 0x02ca6fff] PGTABLE
>[    0.000000] BRK [0x02ca7000, 0x02ca7fff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0x41ee00000-0x41effffff]
>[    0.000000]  [mem 0x41ee00000-0x41effffff] page 2M
>[    0.000000] BRK [0x02ca8000, 0x02ca8fff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0x41c000000-0x41edfffff]
>[    0.000000]  [mem 0x41c000000-0x41edfffff] page 2M
>[    0.000000] init_memory_mapping: [mem 0x400000000-0x41bffffff]
>[    0.000000]  [mem 0x400000000-0x41bffffff] page 2M
>[    0.000000] init_memory_mapping: [mem 0x00100000-0xcb662fff]
>[    0.000000]  [mem 0x00100000-0x001fffff] page 4k
>[    0.000000]  [mem 0x00200000-0x3fffffff] page 2M
>[    0.000000]  [mem 0x40000000-0xbfffffff] page 1G
>[    0.000000]  [mem 0xc0000000-0xcb5fffff] page 2M
>[    0.000000]  [mem 0xcb600000-0xcb662fff] page 4k
>[    0.000000] init_memory_mapping: [mem 0xcb66a000-0xcbab3fff]
>[    0.000000]  [mem 0xcb66a000-0xcb7fffff] page 4k
>[    0.000000]  [mem 0xcb800000-0xcb9fffff] page 2M
>[    0.000000]  [mem 0xcba00000-0xcbab3fff] page 4k
>[    0.000000] BRK [0x02ca9000, 0x02ca9fff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0xcbef2000-0xdd7a5fff]
>[    0.000000]  [mem 0xcbef2000-0xcbffffff] page 4k
>[    0.000000]  [mem 0xcc000000-0xdd5fffff] page 2M
>[    0.000000]  [mem 0xdd600000-0xdd7a5fff] page 4k
>[    0.000000] BRK [0x02caa000, 0x02caafff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0xdefff000-0xdeffffff]
>[    0.000000]  [mem 0xdefff000-0xdeffffff] page 4k
>[    0.000000] init_memory_mapping: [mem 0x100000000-0x3ffffffff]
>[    0.000000]  [mem 0x100000000-0x3ffffffff] page 1G
>[    0.000000] ACPI: RSDP 00000000dd9b2000 00024 (v02 ALASKA)
>[    0.000000] ACPI: XSDT 00000000dd9b2080 0007C (v01 ALASKA    A M I 01072009 AMI  00010013)
>[    0.000000] ACPI: FACP 00000000dd9bef18 0010C (v05 ALASKA    A M I 01072009 AMI  00010013)
>[    0.000000] ACPI: DSDT 00000000dd9b2198 0CD7B (v02 ALASKA    A M I 00000024 INTL 20091112)
>[    0.000000] ACPI: FACS 00000000ddf06080 00040
>[    0.000000] ACPI: APIC 00000000dd9bf028 00092 (v03 ALASKA    A M I 01072009 AMI  00010013)
>[    0.000000] ACPI: FPDT 00000000dd9bf0c0 00044 (v01 ALASKA    A M I 01072009 AMI  00010013)
>[    0.000000] ACPI: SSDT 00000000dd9bf108 00539 (v01  PmRef  Cpu0Ist 00003000 INTL 20051117)
>[    0.000000] ACPI: SSDT 00000000dd9bf648 00AD8 (v01  PmRef    CpuPm 00003000 INTL 20051117)
>[    0.000000] ACPI: SSDT 00000000dd9c0120 001C7 (v01  PmRef LakeTiny 00003000 INTL 20051117)
>[    0.000000] ACPI: MCFG 00000000dd9c02e8 0003C (v01 ALASKA    A M I 01072009 MSFT 00000097)
>[    0.000000] ACPI: HPET 00000000dd9c0328 00038 (v01 ALASKA    A M I 01072009 AMI. 00000005)
>[    0.000000] ACPI: SSDT 00000000dd9c0360 0036D (v01 SataRe SataTabl 00001000 INTL 20091112)
>[    0.000000] ACPI: SSDT 00000000dd9c06d0 0329E (v01 SaSsdt  SaSsdt  00003000 INTL 20091112)
>[    0.000000] ACPI: DMAR 00000000dd9c39c8 00078 (v01 INTEL      HSW  00000001 INTL 00000001)
>[    0.000000] ACPI: Local APIC address 0xfee00000
>[    0.000000] No NUMA configuration found
>[    0.000000] Faking a node at [mem 0x0000000000000000-0x000000041effffff]
>[    0.000000] Initmem setup node 0 [mem 0x00000000-0x41effffff]
>[    0.000000]   NODE_DATA [mem 0x41eff8000-0x41effbfff]
>[    0.000000]  [ffffea0000000000-ffffea00107fffff] PMD -> [ffff88040e600000-ffff88041e5fffff] on node 0
>[    0.000000] Zone ranges:
>[    0.000000]   DMA      [mem 0x00001000-0x00ffffff]
>[    0.000000]   DMA32    [mem 0x01000000-0xffffffff]
>[    0.000000]   Normal   [mem 0x100000000-0x41effffff]
>[    0.000000] Movable zone start for each node
>[    0.000000] Early memory node ranges
>[    0.000000]   node   0: [mem 0x00001000-0x00057fff]
>[    0.000000]   node   0: [mem 0x00059000-0x0009efff]
>[    0.000000]   node   0: [mem 0x00100000-0xcb662fff]
>[    0.000000]   node   0: [mem 0xcb66a000-0xcbab3fff]
>[    0.000000]   node   0: [mem 0xcbef2000-0xdd7a5fff]
>[    0.000000]   node   0: [mem 0xdefff000-0xdeffffff]
>[    0.000000]   node   0: [mem 0x100000000-0x41effffff]
>[    0.000000] On node 0 totalpages: 4178687
>[    0.000000]   DMA zone: 64 pages used for memmap
>[    0.000000]   DMA zone: 24 pages reserved
>[    0.000000]   DMA zone: 3997 pages, LIFO batch:0
>[    0.000000]   DMA32 zone: 14094 pages used for memmap
>[    0.000000]   DMA32 zone: 901986 pages, LIFO batch:31
>[    0.000000]   Normal zone: 51136 pages used for memmap
>[    0.000000]   Normal zone: 3272704 pages, LIFO batch:31
>[    0.000000] ACPI: PM-Timer IO Port: 0x1808
>[    0.000000] ACPI: Local APIC address 0xfee00000
>[    0.000000] ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x02] lapic_id[0x02] enabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x03] lapic_id[0x04] enabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x04] lapic_id[0x06] enabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x05] lapic_id[0x01] enabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x06] lapic_id[0x03] enabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x07] lapic_id[0x05] enabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x08] lapic_id[0x07] enabled)
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0xff] high edge lint[0x1])
>[    0.000000] ACPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0])
>[    0.000000] IOAPIC[0]: apic_id 2, version 32, address 0xfec00000, GSI 0-23
>[    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
>[    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level)
>[    0.000000] ACPI: IRQ0 used by override.
>[    0.000000] ACPI: IRQ2 used by override.
>[    0.000000] ACPI: IRQ9 used by override.
>[    0.000000] Using ACPI (MADT) for SMP configuration information
>[    0.000000] ACPI: HPET id: 0x8086a701 base: 0xfed00000
>[    0.000000] smpboot: Allowing 8 CPUs, 0 hotplug CPUs
>[    0.000000] nr_irqs_gsi: 40
>[    0.000000] PM: Registered nosave memory: [mem 0x00058000-0x00058fff]
>[    0.000000] PM: Registered nosave memory: [mem 0x0009f000-0x0009ffff]
>[    0.000000] PM: Registered nosave memory: [mem 0x000a0000-0x000fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xcb0dd000-0xcb0ddfff]
>[    0.000000] PM: Registered nosave memory: [mem 0xcb0ed000-0xcb0edfff]
>[    0.000000] PM: Registered nosave memory: [mem 0xcb0ee000-0xcb0eefff]
>[    0.000000] PM: Registered nosave memory: [mem 0xcb0fe000-0xcb0fefff]
>[    0.000000] PM: Registered nosave memory: [mem 0xcb0ff000-0xcb0fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xcb11e000-0xcb11efff]
>[    0.000000] PM: Registered nosave memory: [mem 0xcb663000-0xcb669fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xcbab4000-0xcbef1fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdd7a6000-0xdd9adfff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdd9ae000-0xdd9c3fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdd9c4000-0xddf07fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xddf08000-0xdeffefff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdf000000-0xf7ffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xf8000000-0xfbffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfc000000-0xfebfffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfec00000-0xfec00fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfec01000-0xfecfffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed00000-0xfed03fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed04000-0xfed1bfff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed1c000-0xfed1ffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed20000-0xfedfffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfee00000-0xfee00fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfee01000-0xfeffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xff000000-0xffffffff]
>[    0.000000] e820: [mem 0xdf000000-0xf7ffffff] available for PCI devices
>[    0.000000] setup_percpu: NR_CPUS:8 nr_cpumask_bits:8 nr_cpu_ids:8 nr_node_ids:1
>[    0.000000] PERCPU: Embedded 26 pages/cpu @ffff88041ec00000 s74304 r8192 d24000 u262144
>[    0.000000] pcpu-alloc: s74304 r8192 d24000 u262144 alloc=1*2097152
>[    0.000000] pcpu-alloc: [0] 0 1 2 3 4 5 6 7 
>[    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 4113369
>[    0.000000] Policy zone: Normal
>[    0.000000] Kernel command line: root=/dev/sda5 resume=/dev/sda4 nouveau.debug="PVP=debug,PBSP=debug,PPPP=debug"
>[    0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes)
>[    0.000000] xsave: enabled xstate_bv 0x7, cntxt size 0x340
>[    0.000000] Checking aperture...
>[    0.000000] No AGP bridge found
>[    0.000000] Memory: 16148100K/16714748K available (7222K kernel code, 739K rwdata, 2588K rodata, 884K init, 1460K bss, 566648K reserved)
>[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
>[    0.000000] Hierarchical RCU implementation.
>[    0.000000] NR_IRQS:4352 nr_irqs:744 16
>[    0.000000] Console: colour dummy device 80x25
>[    0.000000] console [tty0] enabled
>[    0.000000] hpet clockevent registered
>[    0.000000] tsc: Fast TSC calibration using PIT
>[    0.001000] tsc: Detected 3292.521 MHz processor
>[    0.000001] Calibrating delay loop (skipped), value calculated using timer frequency.. 6585.04 BogoMIPS (lpj=3292521)
>[    0.000004] pid_max: default: 32768 minimum: 301
>[    0.000014] init_memory_mapping: [mem 0xcbab4000-0xcbef1fff]
>[    0.000016]  [mem 0xcbab4000-0xcbbfffff] page 4k
>[    0.000017]  [mem 0xcbc00000-0xcbdfffff] page 2M
>[    0.000017]  [mem 0xcbe00000-0xcbef1fff] page 4k
>[    0.000035] init_memory_mapping: [mem 0xddf08000-0xdef5bfff]
>[    0.000036]  [mem 0xddf08000-0xddffffff] page 4k
>[    0.000037]  [mem 0xde000000-0xdedfffff] page 2M
>[    0.000038]  [mem 0xdee00000-0xdef5bfff] page 4k
>[    0.000049] init_memory_mapping: [mem 0xdef5c000-0xdeffefff]
>[    0.000050]  [mem 0xdef5c000-0xdeffefff] page 4k
>[    0.004898] Dentry cache hash table entries: 2097152 (order: 12, 16777216 bytes)
>[    0.006930] Inode-cache hash table entries: 1048576 (order: 11, 8388608 bytes)
>[    0.007794] Mount-cache hash table entries: 256
>[    0.007916] Initializing cgroup subsys freezer
>[    0.007933] CPU: Physical Processor ID: 0
>[    0.007934] CPU: Processor Core ID: 0
>[    0.007938] ENERGY_PERF_BIAS: Set to 'normal', was 'performance'
>ENERGY_PERF_BIAS: View and update with x86_energy_perf_policy(8)
>[    0.008668] mce: CPU supports 9 MCE banks
>[    0.008679] CPU0: Thermal monitoring enabled (TM1)
>[    0.008688] Last level iTLB entries: 4KB 0, 2MB 0, 4MB 0
>Last level dTLB entries: 4KB 64, 2MB 0, 4MB 0
>tlb_flushall_shift: 6
>[    0.008781] Freeing SMP alternatives memory: 28K (ffffffff81b2f000 - ffffffff81b36000)
>[    0.008784] ACPI: Core revision 20130725
>[    0.013535] ACPI: All ACPI Tables successfully acquired
>[    0.027982] dmar: Host address width 39
>[    0.027984] dmar: DRHD base: 0x000000fed90000 flags: 0x1
>[    0.027989] dmar: IOMMU 0: reg_base_addr fed90000 ver 1:0 cap d2008c20660462 ecap f010da
>[    0.027992] dmar: RMRR base: 0x000000dd935000 end: 0x000000dd941fff
>[    0.028058] IOAPIC id 2 under DRHD base  0xfed90000 IOMMU 0
>[    0.028059] HPET id 0 under DRHD base 0xfed90000
>[    0.028133] Enabled IRQ remapping in xapic mode
>[    0.028524] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
>[    0.038528] smpboot: CPU0: Intel(R) Xeon(R) CPU E3-1230 v3 @ 3.30GHz (fam: 06, model: 3c, stepping: 03)
>[    0.038534] TSC deadline timer enabled
>[    0.038539] Performance Events: PEBS fmt2+, 16-deep LBR, Haswell events, full-width counters, Intel PMU driver.
>[    0.038545] ... version:                3
>[    0.038547] ... bit width:              48
>[    0.038548] ... generic registers:      4
>[    0.038549] ... value mask:             0000ffffffffffff
>[    0.038550] ... max period:             0000ffffffffffff
>[    0.038551] ... fixed-purpose events:   3
>[    0.038552] ... event mask:             000000070000000f
>[    0.038673] smpboot: Booting Node   0, Processors  #   1 #   2 #   3 #   4 #   5 #   6 #   7 OK
>[    0.136382] Brought up 8 CPUs
>[    0.136386] smpboot: Total of 8 processors activated (52680.33 BogoMIPS)
>[    0.142248] devtmpfs: initialized
>[    0.142392] PM: Registering ACPI NVS region [mem 0xcb663000-0xcb669fff] (28672 bytes)
>[    0.142395] PM: Registering ACPI NVS region [mem 0xdd9c4000-0xddf07fff] (5521408 bytes)
>[    0.142545] pinctrl core: initialized pinctrl subsystem
>[    0.142613] regulator-dummy: no parameters
>[    0.142660] NET: Registered protocol family 16
>[    0.142878] cpuidle: using governor ladder
>[    0.142880] cpuidle: using governor menu
>[    0.142908] ACPI: bus type PCI registered
>[    0.142909] acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
>[    0.142970] dca service started, version 1.12.1
>[    0.142999] PCI: MMCONFIG for domain 0000 [bus 00-3f] at [mem 0xf8000000-0xfbffffff] (base 0xf8000000)
>[    0.143001] PCI: MMCONFIG at [mem 0xf8000000-0xfbffffff] reserved in E820
>[    0.146233] PCI: Using configuration type 1 for base access
>[    0.151242] bio: create slab <bio-0> at 0
>[    0.151394] ACPI: Added _OSI(Module Device)
>[    0.151395] ACPI: Added _OSI(Processor Device)
>[    0.151396] ACPI: Added _OSI(3.0 _SCP Extensions)
>[    0.151398] ACPI: Added _OSI(Processor Aggregator Device)
>[    0.152497] ACPI: EC: Look up EC in DSDT
>[    0.153785] ACPI: Executed 1 blocks of module-level executable AML code
>[    0.155311] [Firmware Bug]: ACPI: BIOS _OSI(Linux) query ignored
>[    0.160190] ACPI: SSDT 00000000dd9a3c18 003D3 (v01  PmRef  Cpu0Cst 00003001 INTL 20051117)
>[    0.160464] ACPI: Dynamic OEM Table Load:
>[    0.160466] ACPI: SSDT           (null) 003D3 (v01  PmRef  Cpu0Cst 00003001 INTL 20051117)
>[    0.167282] ACPI: SSDT 00000000dd9a3618 005AA (v01  PmRef    ApIst 00003000 INTL 20051117)
>[    0.167596] ACPI: Dynamic OEM Table Load:
>[    0.167598] ACPI: SSDT           (null) 005AA (v01  PmRef    ApIst 00003000 INTL 20051117)
>[    0.172202] ACPI: SSDT 00000000dd9a2d98 00119 (v01  PmRef    ApCst 00003000 INTL 20051117)
>[    0.172472] ACPI: Dynamic OEM Table Load:
>[    0.172474] ACPI: SSDT           (null) 00119 (v01  PmRef    ApCst 00003000 INTL 20051117)
>[    0.177921] ACPI: Interpreter enabled
>[    0.177927] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S1_] (20130725/hwxface-571)
>[    0.177932] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S2_] (20130725/hwxface-571)
>[    0.177944] ACPI: (supports S0 S3 S4 S5)
>[    0.177946] ACPI: Using IOAPIC for interrupt routing
>[    0.177978] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
>[    0.178095] ACPI: No dock devices found.
>[    0.184674] ACPI: Power Resource [FN00] (off)
>[    0.184741] ACPI: Power Resource [FN01] (off)
>[    0.184805] ACPI: Power Resource [FN02] (off)
>[    0.184869] ACPI: Power Resource [FN03] (off)
>[    0.184934] ACPI: Power Resource [FN04] (off)
>[    0.185490] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-3e])
>[    0.185592] acpi PNP0A08:00: Requesting ACPI _OSC control (0x1d)
>[    0.185818] acpi PNP0A08:00: ACPI _OSC control (0x1d) granted
>[    0.186083] ACPI: \_SB_.PCI0.TPMX: can't evaluate _ADR (0x5)
>[    0.186091] ACPI: \_SB_.PCI0.WMI1: can't evaluate _ADR (0x5)
>[    0.186141] ACPI: \_SB_.PCI0.PDRC: can't evaluate _ADR (0x5)
>[    0.186142] ACPI: \_SB_.PCI0.DOCK: can't evaluate _ADR (0x5)
>[    0.186156] PCI host bridge to bus 0000:00
>[    0.186158] pci_bus 0000:00: root bus resource [bus 00-3e]
>[    0.186161] pci_bus 0000:00: root bus resource [io  0x0000-0x0cf7]
>[    0.186162] pci_bus 0000:00: root bus resource [io  0x0d00-0xffff]
>[    0.186164] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff]
>[    0.186166] pci_bus 0000:00: root bus resource [mem 0x000d0000-0x000d3fff]
>[    0.186168] pci_bus 0000:00: root bus resource [mem 0x000d4000-0x000d7fff]
>[    0.186169] pci_bus 0000:00: root bus resource [mem 0x000d8000-0x000dbfff]
>[    0.186171] pci_bus 0000:00: root bus resource [mem 0x000dc000-0x000dffff]
>[    0.186173] pci_bus 0000:00: root bus resource [mem 0xe0000000-0xfeafffff]
>[    0.186182] pci 0000:00:00.0: [8086:0c08] type 00 class 0x060000
>[    0.186254] pci 0000:00:01.0: [8086:0c01] type 01 class 0x060400
>[    0.186277] pci 0000:00:01.0: PME# supported from D0 D3hot D3cold
>[    0.186317] pci 0000:00:01.0: System wakeup disabled by ACPI
>[    0.186367] pci 0000:00:14.0: [8086:8c31] type 00 class 0x0c0330
>[    0.186383] pci 0000:00:14.0: reg 0x10: [mem 0xf7400000-0xf740ffff 64bit]
>[    0.186434] pci 0000:00:14.0: PME# supported from D3hot D3cold
>[    0.186465] pci 0000:00:14.0: System wakeup disabled by ACPI
>[    0.186498] pci 0000:00:16.0: [8086:8c3a] type 00 class 0x078000
>[    0.186514] pci 0000:00:16.0: reg 0x10: [mem 0xf7419000-0xf741900f 64bit]
>[    0.186567] pci 0000:00:16.0: PME# supported from D0 D3hot D3cold
>[    0.186636] pci 0000:00:1b.0: [8086:8c20] type 00 class 0x040300
>[    0.186647] pci 0000:00:1b.0: reg 0x10: [mem 0xf7410000-0xf7413fff 64bit]
>[    0.186693] pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold
>[    0.186727] pci 0000:00:1b.0: System wakeup disabled by ACPI
>[    0.186756] pci 0000:00:1c.0: [8086:8c10] type 01 class 0x060400
>[    0.186810] pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold
>[    0.186848] pci 0000:00:1c.0: System wakeup disabled by ACPI
>[    0.186878] pci 0000:00:1c.1: [8086:244e] type 01 class 0x060401
>[    0.186932] pci 0000:00:1c.1: PME# supported from D0 D3hot D3cold
>[    0.186966] pci 0000:00:1c.1: System wakeup disabled by ACPI
>[    0.186996] pci 0000:00:1c.2: [8086:8c14] type 01 class 0x060400
>[    0.187050] pci 0000:00:1c.2: PME# supported from D0 D3hot D3cold
>[    0.187085] pci 0000:00:1c.2: System wakeup disabled by ACPI
>[    0.187113] pci 0000:00:1c.3: [8086:8c16] type 01 class 0x060400
>[    0.187167] pci 0000:00:1c.3: PME# supported from D0 D3hot D3cold
>[    0.187207] pci 0000:00:1c.3: System wakeup disabled by ACPI
>[    0.187245] pci 0000:00:1d.0: [8086:8c26] type 00 class 0x0c0320
>[    0.187262] pci 0000:00:1d.0: reg 0x10: [mem 0xf7417000-0xf74173ff]
>[    0.187338] pci 0000:00:1d.0: PME# supported from D0 D3hot D3cold
>[    0.187382] pci 0000:00:1d.0: System wakeup disabled by ACPI
>[    0.187416] pci 0000:00:1f.0: [8086:8c56] type 00 class 0x060100
>[    0.187561] pci 0000:00:1f.2: [8086:8c02] type 00 class 0x010601
>[    0.187574] pci 0000:00:1f.2: reg 0x10: [io  0xf070-0xf077]
>[    0.187579] pci 0000:00:1f.2: reg 0x14: [io  0xf060-0xf063]
>[    0.187585] pci 0000:00:1f.2: reg 0x18: [io  0xf050-0xf057]
>[    0.187591] pci 0000:00:1f.2: reg 0x1c: [io  0xf040-0xf043]
>[    0.187597] pci 0000:00:1f.2: reg 0x20: [io  0xf020-0xf03f]
>[    0.187602] pci 0000:00:1f.2: reg 0x24: [mem 0xf7416000-0xf74167ff]
>[    0.187633] pci 0000:00:1f.2: PME# supported from D3hot
>[    0.187687] pci 0000:00:1f.3: [8086:8c22] type 00 class 0x0c0500
>[    0.187699] pci 0000:00:1f.3: reg 0x10: [mem 0xf7415000-0xf74150ff 64bit]
>[    0.187715] pci 0000:00:1f.3: reg 0x20: [io  0xf000-0xf01f]
>[    0.187825] pci 0000:01:00.0: [10de:11c0] type 00 class 0x030000
>[    0.187834] pci 0000:01:00.0: reg 0x10: [mem 0xf6000000-0xf6ffffff]
>[    0.187843] pci 0000:01:00.0: reg 0x14: [mem 0xe8000000-0xefffffff 64bit pref]
>[    0.187853] pci 0000:01:00.0: reg 0x1c: [mem 0xf0000000-0xf1ffffff 64bit pref]
>[    0.187859] pci 0000:01:00.0: reg 0x24: [io  0xe000-0xe07f]
>[    0.187866] pci 0000:01:00.0: reg 0x30: [mem 0xf7000000-0xf707ffff pref]
>[    0.187913] pci 0000:01:00.0: System wakeup disabled by ACPI
>[    0.187949] pci 0000:01:00.1: [10de:0e0b] type 00 class 0x040300
>[    0.187957] pci 0000:01:00.1: reg 0x10: [mem 0xf7080000-0xf7083fff]
>[    0.189192] pci 0000:00:01.0: PCI bridge to [bus 01]
>[    0.189194] pci 0000:00:01.0:   bridge window [io  0xe000-0xefff]
>[    0.189196] pci 0000:00:01.0:   bridge window [mem 0xf6000000-0xf70fffff]
>[    0.189199] pci 0000:00:01.0:   bridge window [mem 0xe8000000-0xf1ffffff 64bit pref]
>[    0.189248] pci 0000:00:1c.0: PCI bridge to [bus 02]
>[    0.189347] pci 0000:03:00.0: [1b21:1080] type 01 class 0x060401
>[    0.189459] pci 0000:03:00.0: System wakeup disabled by ACPI
>[    0.189488] pci 0000:00:1c.1: PCI bridge to [bus 03-04] (subtractive decode)
>[    0.189491] pci 0000:00:1c.1:   bridge window [io  0xd000-0xdfff]
>[    0.189493] pci 0000:00:1c.1:   bridge window [mem 0xf7300000-0xf73fffff]
>[    0.189497] pci 0000:00:1c.1:   bridge window [io  0x0000-0x0cf7] (subtractive decode)
>[    0.189499] pci 0000:00:1c.1:   bridge window [io  0x0d00-0xffff] (subtractive decode)
>[    0.189500] pci 0000:00:1c.1:   bridge window [mem 0x000a0000-0x000bffff] (subtractive decode)
>[    0.189501] pci 0000:00:1c.1:   bridge window [mem 0x000d0000-0x000d3fff] (subtractive decode)
>[    0.189502] pci 0000:00:1c.1:   bridge window [mem 0x000d4000-0x000d7fff] (subtractive decode)
>[    0.189503] pci 0000:00:1c.1:   bridge window [mem 0x000d8000-0x000dbfff] (subtractive decode)
>[    0.189504] pci 0000:00:1c.1:   bridge window [mem 0x000dc000-0x000dffff] (subtractive decode)
>[    0.189505] pci 0000:00:1c.1:   bridge window [mem 0xe0000000-0xfeafffff] (subtractive decode)
>[    0.189570] pci 0000:04:02.0: [1106:3044] type 00 class 0x0c0010
>[    0.189595] pci 0000:04:02.0: reg 0x10: [mem 0xf7300000-0xf73007ff]
>[    0.189609] pci 0000:04:02.0: reg 0x14: [io  0xd000-0xd07f]
>[    0.189717] pci 0000:04:02.0: supports D2
>[    0.189718] pci 0000:04:02.0: PME# supported from D2 D3hot D3cold
>[    0.189810] pci 0000:03:00.0: PCI bridge to [bus 04] (subtractive decode)
>[    0.189818] pci 0000:03:00.0:   bridge window [io  0xd000-0xdfff]
>[    0.189822] pci 0000:03:00.0:   bridge window [mem 0xf7300000-0xf73fffff]
>[    0.189830] pci 0000:03:00.0:   bridge window [io  0xd000-0xdfff] (subtractive decode)
>[    0.189831] pci 0000:03:00.0:   bridge window [mem 0xf7300000-0xf73fffff] (subtractive decode)
>[    0.189832] pci 0000:03:00.0:   bridge window [??? 0x00000000 flags 0x0] (subtractive decode)
>[    0.189833] pci 0000:03:00.0:   bridge window [??? 0x00000000 flags 0x0] (subtractive decode)
>[    0.189834] pci 0000:03:00.0:   bridge window [io  0x0000-0x0cf7] (subtractive decode)
>[    0.189836] pci 0000:03:00.0:   bridge window [io  0x0d00-0xffff] (subtractive decode)
>[    0.189837] pci 0000:03:00.0:   bridge window [mem 0x000a0000-0x000bffff] (subtractive decode)
>[    0.189838] pci 0000:03:00.0:   bridge window [mem 0x000d0000-0x000d3fff] (subtractive decode)
>[    0.189839] pci 0000:03:00.0:   bridge window [mem 0x000d4000-0x000d7fff] (subtractive decode)
>[    0.189840] pci 0000:03:00.0:   bridge window [mem 0x000d8000-0x000dbfff] (subtractive decode)
>[    0.189841] pci 0000:03:00.0:   bridge window [mem 0x000dc000-0x000dffff] (subtractive decode)
>[    0.189842] pci 0000:03:00.0:   bridge window [mem 0xe0000000-0xfeafffff] (subtractive decode)
>[    0.189942] pci 0000:05:00.0: [8086:1533] type 00 class 0x020000
>[    0.189957] pci 0000:05:00.0: reg 0x10: [mem 0xf7200000-0xf727ffff]
>[    0.189976] pci 0000:05:00.0: reg 0x18: [io  0xc000-0xc01f]
>[    0.189986] pci 0000:05:00.0: reg 0x1c: [mem 0xf7280000-0xf7283fff]
>[    0.190086] pci 0000:05:00.0: PME# supported from D0 D3hot D3cold
>[    0.190122] pci 0000:05:00.0: System wakeup disabled by ACPI
>[    0.191203] pci 0000:00:1c.2: PCI bridge to [bus 05]
>[    0.191206] pci 0000:00:1c.2:   bridge window [io  0xc000-0xcfff]
>[    0.191209] pci 0000:00:1c.2:   bridge window [mem 0xf7200000-0xf72fffff]
>[    0.191302] pci 0000:06:00.0: [8086:1533] type 00 class 0x020000
>[    0.191317] pci 0000:06:00.0: reg 0x10: [mem 0xf7100000-0xf717ffff]
>[    0.191336] pci 0000:06:00.0: reg 0x18: [io  0xb000-0xb01f]
>[    0.191346] pci 0000:06:00.0: reg 0x1c: [mem 0xf7180000-0xf7183fff]
>[    0.191446] pci 0000:06:00.0: PME# supported from D0 D3hot D3cold
>[    0.191483] pci 0000:06:00.0: System wakeup disabled by ACPI
>[    0.193205] pci 0000:00:1c.3: PCI bridge to [bus 06]
>[    0.193208] pci 0000:00:1c.3:   bridge window [io  0xb000-0xbfff]
>[    0.193211] pci 0000:00:1c.3:   bridge window [mem 0xf7100000-0xf71fffff]
>[    0.193778] ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 7 10 *11 12 14 15)
>[    0.193809] ACPI: PCI Interrupt Link [LNKB] (IRQs 3 4 5 6 7 *10 11 12 14 15)
>[    0.193839] ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 5 6 7 10 11 12 *14 15)
>[    0.193867] ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 *5 6 7 10 11 12 14 15)
>[    0.193896] ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 7 10 11 12 14 15) *0, disabled.
>[    0.193925] ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 7 10 11 12 14 *15)
>[    0.193953] ACPI: PCI Interrupt Link [LNKG] (IRQs *3 4 5 6 7 10 11 12 14 15)
>[    0.193982] ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 *6 7 10 11 12 14 15)
>[    0.194251] ACPI: Enabled 5 GPEs in block 00 to 3F
>[    0.194256] ACPI: \_SB_.PCI0: notify handler is installed
>[    0.194295] Found 1 acpi root devices
>[    0.194379] vgaarb: device added: PCI:0000:01:00.0,decodes=io+mem,owns=io+mem,locks=none
>[    0.194381] vgaarb: loaded
>[    0.194382] vgaarb: bridge control possible 0000:01:00.0
>[    0.194454] SCSI subsystem initialized
>[    0.194489] libata version 3.00 loaded.
>[    0.194538] ACPI: bus type USB registered
>[    0.194568] usbcore: registered new interface driver usbfs
>[    0.194583] usbcore: registered new interface driver hub
>[    0.194604] usbcore: registered new device driver usb
>[    0.194655] pps_core: LinuxPPS API ver. 1 registered
>[    0.194657] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
>[    0.194670] PTP clock support registered
>[    0.194708] EDAC MC: Ver: 3.0.0
>[    0.194969] wmi: Mapper loaded
>[    0.194986] Advanced Linux Sound Architecture Driver Initialized.
>[    0.194988] PCI: Using ACPI for IRQ routing
>[    0.196138] PCI: pci_cache_line_size set to 64 bytes
>[    0.196212] e820: reserve RAM buffer [mem 0x00058000-0x0005ffff]
>[    0.196213] e820: reserve RAM buffer [mem 0x0009f000-0x0009ffff]
>[    0.196214] e820: reserve RAM buffer [mem 0xcb0dd018-0xcbffffff]
>[    0.196215] e820: reserve RAM buffer [mem 0xcb0ee018-0xcbffffff]
>[    0.196216] e820: reserve RAM buffer [mem 0xcb0ff018-0xcbffffff]
>[    0.196218] e820: reserve RAM buffer [mem 0xcb663000-0xcbffffff]
>[    0.196218] e820: reserve RAM buffer [mem 0xcbab4000-0xcbffffff]
>[    0.196219] e820: reserve RAM buffer [mem 0xdd7a6000-0xdfffffff]
>[    0.196220] e820: reserve RAM buffer [mem 0xdf000000-0xdfffffff]
>[    0.196221] e820: reserve RAM buffer [mem 0x41f000000-0x41fffffff]
>[    0.196342] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0, 0, 0, 0, 0
>[    0.196346] hpet0: 8 comparators, 64-bit 14.318180 MHz counter
>[    0.198363] Switched to clocksource hpet
>[    0.200510] pnp: PnP ACPI init
>[    0.200515] ACPI: bus type PNP registered
>[    0.200565] system 00:00: [mem 0xfed40000-0xfed44fff] has been reserved
>[    0.200568] system 00:00: Plug and Play ACPI device, IDs PNP0c01 (active)
>[    0.200575] pnp 00:01: [dma 4]
>[    0.200600] pnp 00:01: Plug and Play ACPI device, IDs PNP0200 (active)
>[    0.200626] pnp 00:02: Plug and Play ACPI device, IDs INT0800 (active)
>[    0.200699] pnp 00:03: Plug and Play ACPI device, IDs PNP0103 (active)
>[    0.200744] pnp 00:04: Plug and Play ACPI device, IDs PNP0c04 (active)
>[    0.200828] system 00:05: [io  0x0680-0x069f] has been reserved
>[    0.200831] system 00:05: [io  0xffff] has been reserved
>[    0.200832] system 00:05: [io  0xffff] has been reserved
>[    0.200834] system 00:05: [io  0xffff] has been reserved
>[    0.200836] system 00:05: [io  0x1c00-0x1cfe] has been reserved
>[    0.200838] system 00:05: [io  0x1d00-0x1dfe] has been reserved
>[    0.200840] system 00:05: [io  0x1e00-0x1efe] has been reserved
>[    0.200841] system 00:05: [io  0x1f00-0x1ffe] has been reserved
>[    0.200843] system 00:05: [io  0x1800-0x18fe] could not be reserved
>[    0.200845] system 00:05: [io  0x164e-0x164f] has been reserved
>[    0.200847] system 00:05: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.200882] pnp 00:06: Plug and Play ACPI device, IDs PNP0b00 (active)
>[    0.200928] system 00:07: [io  0x1854-0x1857] has been reserved
>[    0.200930] system 00:07: Plug and Play ACPI device, IDs INT3f0d PNP0c02 (active)
>[    0.200994] system 00:08: [io  0x0290-0x029f] has been reserved
>[    0.200997] system 00:08: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.201109] system 00:09: [io  0x04d0-0x04d1] has been reserved
>[    0.201111] system 00:09: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.201237] pnp 00:0a: [dma 0 disabled]
>[    0.201281] pnp 00:0a: Plug and Play ACPI device, IDs PNP0501 (active)
>[    0.201559] system 00:0b: [mem 0xfed1c000-0xfed1ffff] has been reserved
>[    0.201562] system 00:0b: [mem 0xfed10000-0xfed17fff] has been reserved
>[    0.201564] system 00:0b: [mem 0xfed18000-0xfed18fff] has been reserved
>[    0.201566] system 00:0b: [mem 0xfed19000-0xfed19fff] has been reserved
>[    0.201568] system 00:0b: [mem 0xf8000000-0xfbffffff] has been reserved
>[    0.201570] system 00:0b: [mem 0xfed20000-0xfed3ffff] has been reserved
>[    0.201572] system 00:0b: [mem 0xfed90000-0xfed93fff] could not be reserved
>[    0.201574] system 00:0b: [mem 0xfed45000-0xfed8ffff] has been reserved
>[    0.201576] system 00:0b: [mem 0xff000000-0xffffffff] has been reserved
>[    0.201578] system 00:0b: [mem 0xfee00000-0xfeefffff] could not be reserved
>[    0.201580] system 00:0b: [mem 0xf7fef000-0xf7feffff] has been reserved
>[    0.201582] system 00:0b: [mem 0xf7ff0000-0xf7ff0fff] has been reserved
>[    0.201584] system 00:0b: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.201730] pnp: PnP ACPI: found 12 devices
>[    0.201731] ACPI: bus type PNP unregistered
>[    0.206337] pci 0000:00:1c.0: bridge window [io  0x1000-0x0fff] to [bus 02] add_size 1000
>[    0.206339] pci 0000:00:1c.0: bridge window [mem 0x00100000-0x000fffff 64bit pref] to [bus 02] add_size 200000
>[    0.206341] pci 0000:00:1c.0: bridge window [mem 0x00100000-0x000fffff] to [bus 02] add_size 200000
>[    0.206374] pci 0000:00:1c.0: res[8]=[mem 0x00100000-0x000fffff] get_res_add_size add_size 200000
>[    0.206375] pci 0000:00:1c.0: res[9]=[mem 0x00100000-0x000fffff 64bit pref] get_res_add_size add_size 200000
>[    0.206376] pci 0000:00:1c.0: res[7]=[io  0x1000-0x0fff] get_res_add_size add_size 1000
>[    0.206379] pci 0000:00:1c.0: BAR 8: assigned [mem 0xe0000000-0xe01fffff]
>[    0.206383] pci 0000:00:1c.0: BAR 9: assigned [mem 0xe0200000-0xe03fffff 64bit pref]
>[    0.206385] pci 0000:00:1c.0: BAR 7: assigned [io  0x2000-0x2fff]
>[    0.206388] pci 0000:00:01.0: PCI bridge to [bus 01]
>[    0.206390] pci 0000:00:01.0:   bridge window [io  0xe000-0xefff]
>[    0.206392] pci 0000:00:01.0:   bridge window [mem 0xf6000000-0xf70fffff]
>[    0.206395] pci 0000:00:01.0:   bridge window [mem 0xe8000000-0xf1ffffff 64bit pref]
>[    0.206398] pci 0000:00:1c.0: PCI bridge to [bus 02]
>[    0.206401] pci 0000:00:1c.0:   bridge window [io  0x2000-0x2fff]
>[    0.206405] pci 0000:00:1c.0:   bridge window [mem 0xe0000000-0xe01fffff]
>[    0.206408] pci 0000:00:1c.0:   bridge window [mem 0xe0200000-0xe03fffff 64bit pref]
>[    0.206413] pci 0000:03:00.0: PCI bridge to [bus 04]
>[    0.206416] pci 0000:03:00.0:   bridge window [io  0xd000-0xdfff]
>[    0.206423] pci 0000:03:00.0:   bridge window [mem 0xf7300000-0xf73fffff]
>[    0.206434] pci 0000:00:1c.1: PCI bridge to [bus 03-04]
>[    0.206436] pci 0000:00:1c.1:   bridge window [io  0xd000-0xdfff]
>[    0.206440] pci 0000:00:1c.1:   bridge window [mem 0xf7300000-0xf73fffff]
>[    0.206447] pci 0000:00:1c.2: PCI bridge to [bus 05]
>[    0.206449] pci 0000:00:1c.2:   bridge window [io  0xc000-0xcfff]
>[    0.206453] pci 0000:00:1c.2:   bridge window [mem 0xf7200000-0xf72fffff]
>[    0.206459] pci 0000:00:1c.3: PCI bridge to [bus 06]
>[    0.206461] pci 0000:00:1c.3:   bridge window [io  0xb000-0xbfff]
>[    0.206465] pci 0000:00:1c.3:   bridge window [mem 0xf7100000-0xf71fffff]
>[    0.206472] pci_bus 0000:00: resource 4 [io  0x0000-0x0cf7]
>[    0.206473] pci_bus 0000:00: resource 5 [io  0x0d00-0xffff]
>[    0.206474] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff]
>[    0.206475] pci_bus 0000:00: resource 7 [mem 0x000d0000-0x000d3fff]
>[    0.206476] pci_bus 0000:00: resource 8 [mem 0x000d4000-0x000d7fff]
>[    0.206477] pci_bus 0000:00: resource 9 [mem 0x000d8000-0x000dbfff]
>[    0.206479] pci_bus 0000:00: resource 10 [mem 0x000dc000-0x000dffff]
>[    0.206480] pci_bus 0000:00: resource 11 [mem 0xe0000000-0xfeafffff]
>[    0.206481] pci_bus 0000:01: resource 0 [io  0xe000-0xefff]
>[    0.206482] pci_bus 0000:01: resource 1 [mem 0xf6000000-0xf70fffff]
>[    0.206483] pci_bus 0000:01: resource 2 [mem 0xe8000000-0xf1ffffff 64bit pref]
>[    0.206484] pci_bus 0000:02: resource 0 [io  0x2000-0x2fff]
>[    0.206485] pci_bus 0000:02: resource 1 [mem 0xe0000000-0xe01fffff]
>[    0.206486] pci_bus 0000:02: resource 2 [mem 0xe0200000-0xe03fffff 64bit pref]
>[    0.206487] pci_bus 0000:03: resource 0 [io  0xd000-0xdfff]
>[    0.206488] pci_bus 0000:03: resource 1 [mem 0xf7300000-0xf73fffff]
>[    0.206489] pci_bus 0000:03: resource 4 [io  0x0000-0x0cf7]
>[    0.206490] pci_bus 0000:03: resource 5 [io  0x0d00-0xffff]
>[    0.206492] pci_bus 0000:03: resource 6 [mem 0x000a0000-0x000bffff]
>[    0.206493] pci_bus 0000:03: resource 7 [mem 0x000d0000-0x000d3fff]
>[    0.206494] pci_bus 0000:03: resource 8 [mem 0x000d4000-0x000d7fff]
>[    0.206495] pci_bus 0000:03: resource 9 [mem 0x000d8000-0x000dbfff]
>[    0.206496] pci_bus 0000:03: resource 10 [mem 0x000dc000-0x000dffff]
>[    0.206497] pci_bus 0000:03: resource 11 [mem 0xe0000000-0xfeafffff]
>[    0.206498] pci_bus 0000:04: resource 0 [io  0xd000-0xdfff]
>[    0.206499] pci_bus 0000:04: resource 1 [mem 0xf7300000-0xf73fffff]
>[    0.206500] pci_bus 0000:04: resource 4 [io  0xd000-0xdfff]
>[    0.206501] pci_bus 0000:04: resource 5 [mem 0xf7300000-0xf73fffff]
>[    0.206502] pci_bus 0000:04: resource 8 [io  0x0000-0x0cf7]
>[    0.206503] pci_bus 0000:04: resource 9 [io  0x0d00-0xffff]
>[    0.206504] pci_bus 0000:04: resource 10 [mem 0x000a0000-0x000bffff]
>[    0.206505] pci_bus 0000:04: resource 11 [mem 0x000d0000-0x000d3fff]
>[    0.206507] pci_bus 0000:04: resource 12 [mem 0x000d4000-0x000d7fff]
>[    0.206508] pci_bus 0000:04: resource 13 [mem 0x000d8000-0x000dbfff]
>[    0.206509] pci_bus 0000:04: resource 14 [mem 0x000dc000-0x000dffff]
>[    0.206510] pci_bus 0000:04: resource 15 [mem 0xe0000000-0xfeafffff]
>[    0.206511] pci_bus 0000:05: resource 0 [io  0xc000-0xcfff]
>[    0.206512] pci_bus 0000:05: resource 1 [mem 0xf7200000-0xf72fffff]
>[    0.206513] pci_bus 0000:06: resource 0 [io  0xb000-0xbfff]
>[    0.206514] pci_bus 0000:06: resource 1 [mem 0xf7100000-0xf71fffff]
>[    0.206530] NET: Registered protocol family 2
>[    0.206682] TCP established hash table entries: 131072 (order: 9, 2097152 bytes)
>[    0.206875] TCP bind hash table entries: 65536 (order: 8, 1048576 bytes)
>[    0.206973] TCP: Hash tables configured (established 131072 bind 65536)
>[    0.206986] TCP: reno registered
>[    0.206999] UDP hash table entries: 8192 (order: 6, 262144 bytes)
>[    0.207037] UDP-Lite hash table entries: 8192 (order: 6, 262144 bytes)
>[    0.207097] NET: Registered protocol family 1
>[    0.207145] RPC: Registered named UNIX socket transport module.
>[    0.207146] RPC: Registered udp transport module.
>[    0.207148] RPC: Registered tcp transport module.
>[    0.207149] RPC: Registered tcp NFSv4.1 backchannel transport module.
>[    0.207217] pci 0000:00:14.0: Configurable ports to enable SuperSpeed: 0x3f
>[    0.207220] pci 0000:00:14.0: USB 3.0 ports that are now enabled under xHCI: 0x3f
>[    0.207222] pci 0000:00:14.0: Configurable USB 2.0 ports to hand over to xCHI: 0x7fff
>[    0.207225] pci 0000:00:14.0: USB 2.0 ports that are now switched over to xHCI: 0x7fff
>[    0.207308] pci 0000:00:1d.0: EHCI: BIOS handoff
>[    0.222458] pci 0000:01:00.0: Boot video device
>[    0.222493] PCI: CLS 64 bytes, default 64
>[    0.222525] DMAR: No ATSR found
>[    0.222538] IOMMU 0 0xfed90000: using Queued invalidation
>[    0.222539] IOMMU: Setting RMRR:
>[    0.222547] IOMMU: Setting identity map for device 0000:00:1d.0 [0xdd935000 - 0xdd941fff]
>[    0.222569] IOMMU: Setting identity map for device 0000:00:14.0 [0xdd935000 - 0xdd941fff]
>[    0.222582] IOMMU: Prepare 0-16MiB unity mapping for LPC
>[    0.222588] IOMMU: Setting identity map for device 0000:00:1f.0 [0x0 - 0xffffff]
>[    0.222600] PCI-DMA: Intel(R) Virtualization Technology for Directed I/O
>[    0.222652] ------------[ cut here ]------------
>[    0.222656] WARNING: CPU: 1 PID: 1 at drivers/pci/search.c:46 pci_find_upstream_pcie_bridge+0x4e/0x65()
>[    0.222658] Modules linked in:
>[    0.222660] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 3.12.5-gentoo #1
>[    0.222662] Hardware name: ASUS All Series/P9D WS, BIOS 1103 06/14/2013
>[    0.222664]  0000000000000000 0000000000000009 ffffffff81703004 0000000000000000
>[    0.222666]  ffffffff8107fdd6 ffff88040c00b240 ffffffff8129b649 ffffc90006980000
>[    0.222669]  0000000000000000 ffff88040c7bf000 ffff88040c7bf098 ffffffff815c25f5
>[    0.222671] Call Trace:
>[    0.222675]  [<ffffffff81703004>] ? dump_stack+0x41/0x51
>[    0.222679]  [<ffffffff8107fdd6>] ? warn_slowpath_common+0x73/0x8b
>[    0.222681]  [<ffffffff8129b649>] ? pci_find_upstream_pcie_bridge+0x4e/0x65
>[    0.222685]  [<ffffffff815c25f5>] ? bus_set_iommu+0x46/0x46
>[    0.222687]  [<ffffffff8129b649>] ? pci_find_upstream_pcie_bridge+0x4e/0x65
>[    0.222689]  [<ffffffff815c9642>] ? intel_iommu_add_device+0x47/0x1bb
>[    0.222691]  [<ffffffff815c25f5>] ? bus_set_iommu+0x46/0x46
>[    0.222694]  [<ffffffff815c2627>] ? add_iommu_group+0x32/0x40
>[    0.222697]  [<ffffffff81426914>] ? bus_for_each_dev+0x4e/0x7f
>[    0.222699]  [<ffffffff815c25ef>] ? bus_set_iommu+0x40/0x46
>[    0.222703]  [<ffffffff81a99dc4>] ? intel_iommu_init+0xa36/0xb42
>[    0.222706]  [<ffffffff81a66943>] ? unpack_to_rootfs+0x241/0x251
>[    0.222709]  [<ffffffff81a6a6f9>] ? pci_iommu_init+0xe/0x37
>[    0.222711]  [<ffffffff81a6a6eb>] ? memblock_find_dma_reserve+0x140/0x140
>[    0.222714]  [<ffffffff8100025a>] ? do_one_initcall+0x78/0xf6
>[    0.222717]  [<ffffffff81094eaa>] ? parse_args+0x117/0x24c
>[    0.222719]  [<ffffffff81a65d9e>] ? kernel_init_freeable+0x133/0x1c4
>[    0.222722]  [<ffffffff81a656b1>] ? do_early_param+0x83/0x83
>[    0.222725]  [<ffffffff816fcd6c>] ? rest_init+0x70/0x70
>[    0.222727]  [<ffffffff816fcd72>] ? kernel_init+0x6/0xce
>[    0.222729]  [<ffffffff81709d7c>] ? ret_from_fork+0x7c/0xb0
>[    0.222732]  [<ffffffff816fcd6c>] ? rest_init+0x70/0x70
>[    0.222735] ---[ end trace 4a5607d4daee3420 ]---
>[    0.224655] microcode: CPU0 sig=0x306c3, pf=0x2, revision=0x9
>[    0.224659] microcode: CPU1 sig=0x306c3, pf=0x2, revision=0x9
>[    0.224664] microcode: CPU2 sig=0x306c3, pf=0x2, revision=0x9
>[    0.224670] microcode: CPU3 sig=0x306c3, pf=0x2, revision=0x9
>[    0.224676] microcode: CPU4 sig=0x306c3, pf=0x2, revision=0x9
>[    0.224682] microcode: CPU5 sig=0x306c3, pf=0x2, revision=0x9
>[    0.224688] microcode: CPU6 sig=0x306c3, pf=0x2, revision=0x9
>[    0.224693] microcode: CPU7 sig=0x306c3, pf=0x2, revision=0x9
>[    0.224728] microcode: Microcode Update Driver: v2.00 <tigran@aivazian.fsnet.co.uk>, Peter Oruba
>[    0.224731] Scanning for low memory corruption every 60 seconds
>[    0.225149] sha1_ssse3: Using AVX optimized SHA-1 implementation
>[    0.225165] sha256_ssse3: Using AVX2 optimized SHA-256 implementation
>[    0.225197] sha512_ssse3: Using AVX2 optimized SHA-512 implementation
>[    0.226279] audit: initializing netlink socket (disabled)
>[    0.226290] type=2000 audit(1387057947.199:1): initialized
>[    0.228990] NFS: Registering the id_resolver key type
>[    0.228997] Key type id_resolver registered
>[    0.228998] Key type id_legacy registered
>[    0.229107] Key type cifs.idmap registered
>[    0.229140] fuse init (API version 7.22)
>[    0.229264] msgmni has been set to 32105
>[    0.229715] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 250)
>[    0.229718] io scheduler noop registered
>[    0.229719] io scheduler deadline registered
>[    0.229750] io scheduler cfq registered (default)
>[    0.229874] pcieport 0000:00:01.0: irq 41 for MSI/MSI-X
>[    0.229989] pcieport 0000:00:1c.0: irq 42 for MSI/MSI-X
>[    0.230114] pcieport 0000:00:1c.2: irq 43 for MSI/MSI-X
>[    0.230213] pcieport 0000:00:1c.3: irq 44 for MSI/MSI-X
>[    0.230314] pcieport 0000:00:01.0: Signaling PME through PCIe PME interrupt
>[    0.230317] pci 0000:01:00.0: Signaling PME through PCIe PME interrupt
>[    0.230318] pci 0000:01:00.1: Signaling PME through PCIe PME interrupt
>[    0.230321] pcie_pme 0000:00:01.0:pcie01: service driver pcie_pme loaded
>[    0.230331] pcieport 0000:00:1c.0: Signaling PME through PCIe PME interrupt
>[    0.230334] pcie_pme 0000:00:1c.0:pcie01: service driver pcie_pme loaded
>[    0.230343] pcieport 0000:00:1c.2: Signaling PME through PCIe PME interrupt
>[    0.230345] pci 0000:05:00.0: Signaling PME through PCIe PME interrupt
>[    0.230348] pcie_pme 0000:00:1c.2:pcie01: service driver pcie_pme loaded
>[    0.230356] pcieport 0000:00:1c.3: Signaling PME through PCIe PME interrupt
>[    0.230358] pci 0000:06:00.0: Signaling PME through PCIe PME interrupt
>[    0.230367] pcie_pme 0000:00:1c.3:pcie01: service driver pcie_pme loaded
>[    0.230407] pci_hotplug: PCI Hot Plug PCI Core version: 0.5
>[    0.230444] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
>[    0.250997] 00:0a: ttyS0 at I/O 0x3f8 (irq = 4, base_baud = 115200) is a 16550A
>[    0.251432] Non-volatile memory driver v1.3
>[    0.251434] Linux agpgart interface v0.103
>[    0.291589] Console: switching to colour frame buffer device 128x48
>[    0.330294] simple-framebuffer simple-framebuffer.0: fb0: simplefb registered!
>[    0.330854] intel_idle: MWAIT substates: 0x42120
>[    0.330855] intel_idle: v0.4 model 0x3C
>[    0.330855] intel_idle: lapic_timer_reliable_states 0xffffffff
>[    0.331051] input: Power Button as /devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input0
>[    0.331665] ACPI: Power Button [PWRB]
>[    0.331977] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input1
>[    0.332530] ACPI: Power Button [PWRF]
>[    0.332874] ACPI: Fan [FAN0] (off)
>[    0.333159] ACPI: Fan [FAN1] (off)
>[    0.333448] ACPI: Fan [FAN2] (off)
>[    0.333733] ACPI: Fan [FAN3] (off)
>[    0.334018] ACPI: Fan [FAN4] (off)
>[    0.334369] ACPI: Requesting acpi_cpufreq
>[    0.335138] thermal LNXTHERM:00: registered as thermal_zone0
>[    0.335563] ACPI: Thermal Zone [TZ00] (28 C)
>[    0.336025] thermal LNXTHERM:01: registered as thermal_zone1
>[    0.336450] ACPI: Thermal Zone [TZ01] (30 C)
>[    0.336850] ioatdma: Intel(R) QuickData Technology Driver 4.00
>[    0.337409] [drm] Initialized drm 1.1.0 20060810
>[    0.337777] drm/i810 does not support SMP
>[    0.350057] MXM: GUID detected in BIOS
>[    0.362392] checking generic (f1000000 300000) vs hw (e8000000 8000000)
>[    0.362393] checking generic (f1000000 300000) vs hw (f0000000 2000000)
>[    0.362394] fb: conflicting fb hw usage nouveaufb vs simple - removing generic driver
>[    0.375312] Console: switching to colour dummy device 80x25
>[    0.375590] nouveau  [  DEVICE][0000:01:00.0] BOOT0  : 0x0e6000a1
>[    0.375592] nouveau  [  DEVICE][0000:01:00.0] Chipset: GK106 (NVE6)
>[    0.375594] nouveau  [  DEVICE][0000:01:00.0] Family : NVE0
>[    0.376508] nouveau  [   VBIOS][0000:01:00.0] checking PRAMIN for image...
>[    0.376514] nouveau  [   VBIOS][0000:01:00.0] ... signature not found
>[    0.376516] nouveau  [   VBIOS][0000:01:00.0] checking PROM for image...
>[    0.480156] nouveau  [   VBIOS][0000:01:00.0] ... appears to be valid
>[    0.480158] nouveau  [   VBIOS][0000:01:00.0] using image from PROM
>[    0.480242] nouveau  [   VBIOS][0000:01:00.0] BIT signature found
>[    0.480245] nouveau  [   VBIOS][0000:01:00.0] version 80.06.58.00.3a
>[    0.480621] nouveau  [     PFB][0000:01:00.0] RAM type: GDDR5
>[    0.480623] nouveau  [     PFB][0000:01:00.0] RAM size: 2048 MiB
>[    0.480625] nouveau  [     PFB][0000:01:00.0]    ZCOMP: 0 tags
>[    0.504184] nouveau  [  PTHERM][0000:01:00.0] FAN control: none / external
>[    0.504188] nouveau  [  PTHERM][0000:01:00.0] fan management: disabled
>[    0.504192] nouveau  [  PTHERM][0000:01:00.0] internal sensor: yes
>[    0.534438] nouveau D[     PVP][0000:01:00.0] created
>[    0.534443] nouveau D[     PVP][0000:01:00.0] reset
>[    0.534445] nouveau D[    PBSP][0000:01:00.0] created
>[    0.534448] nouveau D[    PBSP][0000:01:00.0] reset
>[    0.534450] nouveau D[    PPPP][0000:01:00.0] created
>[    0.534454] nouveau D[    PPPP][0000:01:00.0] reset
>[    0.534516] [TTM] Zone  kernel: Available graphics memory: 8219090 kiB
>[    0.534518] [TTM] Zone   dma32: Available graphics memory: 2097152 kiB
>[    0.534520] [TTM] Initializing pool allocator
>[    0.534523] [TTM] Initializing DMA pool allocator
>[    0.534528] nouveau  [     DRM] VRAM: 2048 MiB
>[    0.534529] nouveau  [     DRM] GART: 1048576 MiB
>[    0.534532] nouveau  [     DRM] TMDS table version 2.0
>[    0.534534] nouveau  [     DRM] DCB version 4.0
>[    0.534536] nouveau  [     DRM] DCB outp 00: 02000f00 00000000
>[    0.534538] nouveau  [     DRM] DCB outp 01: 01000f02 00020030
>[    0.534539] nouveau  [     DRM] DCB outp 03: 02011f62 00020010
>[    0.534541] nouveau  [     DRM] DCB outp 04: 04822fb6 0f420010
>[    0.534543] nouveau  [     DRM] DCB outp 05: 04022f72 00020010
>[    0.534544] nouveau  [     DRM] DCB outp 06: 08033f82 00020030
>[    0.534546] nouveau  [     DRM] DCB conn 00: 00001030
>[    0.534548] nouveau  [     DRM] DCB conn 01: 00010161
>[    0.534549] nouveau  [     DRM] DCB conn 02: 00020246
>[    0.534551] nouveau  [     DRM] DCB conn 03: 01000331
>[    0.535594] [drm] Supports vblank timestamp caching Rev 1 (10.10.2010).
>[    0.535596] [drm] No driver support for vblank timestamp query.
>[    0.535659] nouveau W[     DRM] voltage table 0x50 unknown
>[    0.535663] nouveau  [     DRM] 4 available performance level(s)
>[    0.535666] nouveau  [     DRM] 0: core 162MHz shader 324MHz memory 648MHz voltage 100mV
>[    0.535668] nouveau  [     DRM] 1: core 405MHz shader 810MHz memory 1080MHz voltage 80mV
>[    0.535671] nouveau  [     DRM] 2: core 1502MHz shader 3004MHz memory 1080MHz voltage 60mV
>[    0.535673] nouveau  [     DRM] 3: core 1502MHz shader 3004MHz memory 1080MHz voltage 40mV
>[    0.535675] nouveau  [     DRM] c:
>[    0.546716] nouveau  [     DRM] MM: using COPY for buffer copies
>[    0.622506] nouveau  [     DRM] allocated 1920x1200 fb: 0x80000, bo ffff88040b97c000
>[    0.622552] fbcon: nouveaufb (fb0) is primary device
>[    0.692336] Console: switching to colour frame buffer device 240x75
>[    0.693818] nouveau 0000:01:00.0: fb0: nouveaufb frame buffer device
>[    0.693823] nouveau 0000:01:00.0: registered panic notifier
>[    0.693827] [drm] Initialized nouveau 1.1.1 20120801 for 0000:01:00.0 on minor 0
>[    0.694594] loop: module loaded
>[    0.694679] mei_me 0000:00:16.0: setting latency timer to 64
>[    0.694704] mei_me 0000:00:16.0: irq 45 for MSI/MSI-X
>[    0.696399] ACPI Warning: 0x0000000000001828-0x000000000000182f SystemIO conflicts with Region \PMIO 1 (20130725/utaddress-251)
>[    0.696409] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
>[    0.696415] ACPI Warning: 0x0000000000001c30-0x0000000000001c3f SystemIO conflicts with Region \GPIO 1 (20130725/utaddress-251)
>[    0.696423] ACPI Warning: 0x0000000000001c30-0x0000000000001c3f SystemIO conflicts with Region \GPRL 2 (20130725/utaddress-251)
>[    0.696431] ACPI Warning: 0x0000000000001c30-0x0000000000001c3f SystemIO conflicts with Region \GPR_ 3 (20130725/utaddress-251)
>[    0.696439] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
>[    0.696443] ACPI Warning: 0x0000000000001c00-0x0000000000001c2f SystemIO conflicts with Region \GPIO 1 (20130725/utaddress-251)
>[    0.696451] ACPI Warning: 0x0000000000001c00-0x0000000000001c2f SystemIO conflicts with Region \GPRL 2 (20130725/utaddress-251)
>[    0.696459] ACPI Warning: 0x0000000000001c00-0x0000000000001c2f SystemIO conflicts with Region \GPR_ 3 (20130725/utaddress-251)
>[    0.696466] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
>[    0.696470] lpc_ich: Resource conflict(s) found affecting gpio_ich
>[    0.696959] ahci 0000:00:1f.2: version 3.0
>[    0.697019] ahci 0000:00:1f.2: irq 46 for MSI/MSI-X
>[    0.697056] ahci 0000:00:1f.2: AHCI 0001.0300 32 slots 6 ports 6 Gbps 0xb impl SATA mode
>[    0.697062] ahci 0000:00:1f.2: flags: 64bit ncq led clo pio slum part ems apst 
>[    0.697067] ahci 0000:00:1f.2: setting latency timer to 64
>[    0.700967] scsi0 : ahci
>[    0.701063] scsi1 : ahci
>[    0.701150] scsi2 : ahci
>[    0.701252] scsi3 : ahci
>[    0.701360] scsi4 : ahci
>[    0.701459] scsi5 : ahci
>[    0.701519] ata1: SATA max UDMA/133 abar m2048@0xf7416000 port 0xf7416100 irq 46
>[    0.701523] ata2: SATA max UDMA/133 abar m2048@0xf7416000 port 0xf7416180 irq 46
>[    0.701527] ata3: DUMMY
>[    0.701531] ata4: SATA max UDMA/133 abar m2048@0xf7416000 port 0xf7416280 irq 46
>[    0.701534] ata5: DUMMY
>[    0.701537] ata6: DUMMY
>[    0.701857] e100: Intel(R) PRO/100 Network Driver, 3.5.24-k2-NAPI
>[    0.701863] e100: Copyright(c) 1999-2006 Intel Corporation
>[    0.701901] e1000: Intel(R) PRO/1000 Network Driver - version 7.3.21-k8-NAPI
>[    0.701905] e1000: Copyright (c) 1999-2006 Intel Corporation.
>[    0.701933] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k
>[    0.701936] e1000e: Copyright(c) 1999 - 2013 Intel Corporation.
>[    0.701968] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.0.5-k
>[    0.701972] igb: Copyright (c) 2007-2013 Intel Corporation.
>[    0.701998] igb 0000:05:00.0: enabling device (0000 -> 0002)
>[    0.702471] igb 0000:05:00.0: irq 47 for MSI/MSI-X
>[    0.702476] igb 0000:05:00.0: irq 48 for MSI/MSI-X
>[    0.702480] igb 0000:05:00.0: irq 49 for MSI/MSI-X
>[    0.702484] igb 0000:05:00.0: irq 50 for MSI/MSI-X
>[    0.702491] igb 0000:05:00.0: irq 51 for MSI/MSI-X
>[    0.732251] igb 0000:05:00.0: added PHC on eth0
>[    0.732257] igb 0000:05:00.0: Intel(R) Gigabit Ethernet Network Connection
>[    0.732261] igb 0000:05:00.0: eth0: (PCIe:2.5Gb/s:Width x1) ac:22:0b:8c:19:66
>[    0.732315] igb 0000:05:00.0: eth0: PBA No: 001300-000
>[    0.732319] igb 0000:05:00.0: Using MSI-X interrupts. 4 rx queue(s), 4 tx queue(s)
>[    0.732360] igb 0000:06:00.0: enabling device (0000 -> 0002)
>[    0.733034] igb 0000:06:00.0: irq 52 for MSI/MSI-X
>[    0.733038] igb 0000:06:00.0: irq 53 for MSI/MSI-X
>[    0.733042] igb 0000:06:00.0: irq 54 for MSI/MSI-X
>[    0.733046] igb 0000:06:00.0: irq 55 for MSI/MSI-X
>[    0.733050] igb 0000:06:00.0: irq 56 for MSI/MSI-X
>[    0.762222] igb 0000:06:00.0: added PHC on eth1
>[    0.762422] igb 0000:06:00.0: Intel(R) Gigabit Ethernet Network Connection
>[    0.762616] igb 0000:06:00.0: eth1: (PCIe:2.5Gb/s:Width x1) ac:22:0b:8c:19:67
>[    0.762886] igb 0000:06:00.0: eth1: PBA No: 001300-000
>[    0.763117] igb 0000:06:00.0: Using MSI-X interrupts. 4 rx queue(s), 4 tx queue(s)
>[    0.763443] igbvf: Intel(R) Gigabit Virtual Function Network Driver - version 2.0.2-k
>[    0.763687] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
>[    0.764007] ixgbe: Intel(R) 10 Gigabit PCI Express Network Driver - version 3.15.1-k
>[    0.764268] ixgbe: Copyright (c) 1999-2013 Intel Corporation.
>[    0.764614] ixgbevf: Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver - version 2.7.12-k
>[    0.764857] ixgbevf: Copyright (c) 2009 - 2012 Intel Corporation.
>[    0.765208] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 0.3.9-k
>[    0.765458] i40e: Copyright (c) 2013 Intel Corporation.
>[    0.765815] ixgb: Intel(R) PRO/10GbE Network Driver - version 1.0.135-k2-NAPI
>[    0.766061] ixgb: Copyright (c) 1999-2008 Intel Corporation.
>[    0.766419] PPP generic driver version 2.4.2
>[    0.766777] PPP BSD Compression module registered
>[    0.766974] PPP Deflate Compression module registered
>[    0.767262] PPP MPPE Compression module registered
>[    0.767559] NET: Registered protocol family 24
>[    0.768020] pci 0000:03:00.0: setting latency timer to 64
>[    0.822358] firewire_ohci 0000:04:02.0: added OHCI v1.10 device as card 0, 4 IR + 8 IT contexts, quirks 0x11
>[    0.822366] firewire_ohci 0000:04:02.0: DMA context ARReq has stopped, error code: evt_unknown
>[    0.822369] dmar: DRHD: handling fault status reg 3
>[    0.822378] dmar: DMAR:[DMA Read] Request device [04:00.0] fault addr fffff000 
>DMAR:[fault reason 02] Present bit in context entry is clear
>[    0.822472] dmar: DRHD: handling fault status reg 3
>[    0.822478] dmar: DMAR:[DMA Read] Request device [04:00.0] fault addr fffff000 
>DMAR:[fault reason 02] Present bit in context entry is clear
>[    0.822479] firewire_ohci 0000:04:02.0: DMA context ARReq has stopped, error code: evt_unknown
>[    0.822482] firewire_ohci 0000:04:02.0: DMA context ARRsp has stopped, error code: evt_unknown
>[    0.825305] dmar: DRHD: handling fault status reg 3
>[    0.825355] firewire_ohci 0000:04:02.0: bad self ID 0/1 (00000000 != ~00000000)
>[    0.825564] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
>[    0.825565] ehci_hcd: block sizes: qh 112 qtd 96 itd 192 sitd 96
>[    0.825566] ehci-pci: EHCI PCI platform driver
>[    0.825633] ehci-pci 0000:00:1d.0: setting latency timer to 64
>[    0.825637] ehci-pci 0000:00:1d.0: EHCI Host Controller
>[    0.825680] ehci-pci 0000:00:1d.0: new USB bus registered, assigned bus number 1
>[    0.825689] ehci-pci 0000:00:1d.0: debug port 2
>[    0.825692] ehci-pci 0000:00:1d.0: reset hcs_params 0x200002 dbg=2 cc=0 pcc=0 ordered !ppc ports=2
>[    0.825694] ehci-pci 0000:00:1d.0: reset hcc_params 36881 caching frame 1024 64 bit addr
>[    0.825710] ehci-pci 0000:00:1d.0: reset command 0080002 (park)=0 ithresh=8 period=1024 Reset HALT
>[    0.829590] ehci-pci 0000:00:1d.0: cache line size of 64 is not supported
>[    0.829591] ehci-pci 0000:00:1d.0: supports USB remote wakeup
>[    0.829599] ehci-pci 0000:00:1d.0: irq 23, io mem 0xf7417000
>[    0.829602] ehci-pci 0000:00:1d.0: init command 0010001 (park)=0 ithresh=1 period=1024 RUN
>[    0.834694] dmar: DMAR:[DMA Write] Request device [04:00.0] fault addr fffff000 
>DMAR:[fault reason 02] Present bit in context entry is clear
>[    0.835335] ehci-pci 0000:00:1d.0: USB 2.0 started, EHCI 1.00
>[    0.835353] usb usb1: default language 0x0409
>[    0.835358] usb usb1: udev 1, busnum 1, minor = 0
>[    0.835360] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
>[    0.835360] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
>[    0.835361] usb usb1: Product: EHCI Host Controller
>[    0.835362] usb usb1: Manufacturer: Linux 3.12.5-gentoo ehci_hcd
>[    0.835362] usb usb1: SerialNumber: 0000:00:1d.0
>[    0.835371] firewire_ohci 0000:04:02.0: bad self ID 0/1 (00000000 != ~00000000)
>[    0.845163] usb usb1: usb_probe_device
>[    0.845165] usb usb1: configuration #1 chosen from 1 choice
>[    0.845171] usb usb1: adding 1-0:1.0 (config #1, interface 0)
>[    0.845259] hub 1-0:1.0: usb_probe_interface
>[    0.845261] hub 1-0:1.0: usb_probe_interface - got id
>[    0.845263] hub 1-0:1.0: USB hub found
>[    0.845467] hub 1-0:1.0: 2 ports detected
>[    0.845660] hub 1-0:1.0: standalone hub
>[    0.845661] hub 1-0:1.0: no power switching (usb 1.0)
>[    0.845662] hub 1-0:1.0: individual port over-current protection
>[    0.845663] hub 1-0:1.0: power on to power good time: 20ms
>[    0.845666] hub 1-0:1.0: local power source is good
>[    0.845705] usb usb1: usb port1's DeviceRemovable is changed to 1 according to platform information.
>[    0.845706] hub 1-0:1.0: trying to enable port power on non-switchable hub
>[    0.845797] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
>[    0.845996] ohci_hcd: block sizes: ed 80 td 96
>[    0.845999] ohci-pci: OHCI PCI platform driver
>[    0.846308] uhci_hcd: USB Universal Host Controller Interface driver
>[    0.846692] xhci_hcd 0000:00:14.0: setting latency timer to 64
>[    0.846695] xhci_hcd 0000:00:14.0: xHCI Host Controller
>[    0.846990] xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 2
>[    0.847189] xhci_hcd 0000:00:14.0: xHCI capability registers at ffffc9000b060000:
>[    0.847191] xhci_hcd 0000:00:14.0: CAPLENGTH AND HCIVERSION 0x1000080:
>[    0.847192] xhci_hcd 0000:00:14.0: CAPLENGTH: 0x80
>[    0.847193] xhci_hcd 0000:00:14.0: HCIVERSION: 0x100
>[    0.847195] xhci_hcd 0000:00:14.0: HCSPARAMS 1: 0x15000820
>[    0.847195] xhci_hcd 0000:00:14.0:   Max device slots: 32
>[    0.847196] xhci_hcd 0000:00:14.0:   Max interrupters: 8
>[    0.847197] xhci_hcd 0000:00:14.0:   Max ports: 21
>[    0.847199] xhci_hcd 0000:00:14.0: HCSPARAMS 2: 0x84000054
>[    0.847200] xhci_hcd 0000:00:14.0:   Isoc scheduling threshold: 4
>[    0.847201] xhci_hcd 0000:00:14.0:   Maximum allowed segments in event ring: 5
>[    0.847202] xhci_hcd 0000:00:14.0: HCSPARAMS 3 0x200000a:
>[    0.847203] xhci_hcd 0000:00:14.0:   Worst case U1 device exit latency: 10
>[    0.847204] xhci_hcd 0000:00:14.0:   Worst case U2 device exit latency: 512
>[    0.847206] xhci_hcd 0000:00:14.0: HCC PARAMS 0x200077c1:
>[    0.847207] xhci_hcd 0000:00:14.0:   HC generates 64 bit addresses
>[    0.847208] xhci_hcd 0000:00:14.0:   FIXME: more HCCPARAMS debugging
>[    0.847209] xhci_hcd 0000:00:14.0: RTSOFF 0x2000:
>[    0.847210] xhci_hcd 0000:00:14.0: xHCI operational registers at ffffc9000b060080:
>[    0.847211] xhci_hcd 0000:00:14.0: USBCMD 0x0:
>[    0.847212] xhci_hcd 0000:00:14.0:   HC is being stopped
>[    0.847213] xhci_hcd 0000:00:14.0:   HC has finished hard reset
>[    0.847214] xhci_hcd 0000:00:14.0:   Event Interrupts disabled
>[    0.847215] xhci_hcd 0000:00:14.0:   Host System Error Interrupts disabled
>[    0.847216] xhci_hcd 0000:00:14.0:   HC has finished light reset
>[    0.847218] xhci_hcd 0000:00:14.0: USBSTS 0x11:
>[    0.847219] xhci_hcd 0000:00:14.0:   Event ring is empty
>[    0.847219] xhci_hcd 0000:00:14.0:   No Host System Error
>[    0.847220] xhci_hcd 0000:00:14.0:   HC is halted
>[    0.847222] xhci_hcd 0000:00:14.0: ffffc9000b060480 port status reg = 0x2a0
>[    0.847224] xhci_hcd 0000:00:14.0: ffffc9000b060484 port power reg = 0x0
>[    0.847226] xhci_hcd 0000:00:14.0: ffffc9000b060488 port link reg = 0x0
>[    0.847229] xhci_hcd 0000:00:14.0: ffffc9000b06048c port reserved reg = 0x0
>[    0.847231] xhci_hcd 0000:00:14.0: ffffc9000b060490 port status reg = 0x2a0
>[    0.847232] xhci_hcd 0000:00:14.0: ffffc9000b060494 port power reg = 0x0
>[    0.847235] xhci_hcd 0000:00:14.0: ffffc9000b060498 port link reg = 0x0
>[    0.847237] xhci_hcd 0000:00:14.0: ffffc9000b06049c port reserved reg = 0x0
>[    0.847239] xhci_hcd 0000:00:14.0: ffffc9000b0604a0 port status reg = 0x2a0
>[    0.847240] xhci_hcd 0000:00:14.0: ffffc9000b0604a4 port power reg = 0x0
>[    0.847243] xhci_hcd 0000:00:14.0: ffffc9000b0604a8 port link reg = 0x0
>[    0.847245] xhci_hcd 0000:00:14.0: ffffc9000b0604ac port reserved reg = 0x0
>[    0.847247] xhci_hcd 0000:00:14.0: ffffc9000b0604b0 port status reg = 0x2a0
>[    0.847248] xhci_hcd 0000:00:14.0: ffffc9000b0604b4 port power reg = 0x0
>[    0.847251] xhci_hcd 0000:00:14.0: ffffc9000b0604b8 port link reg = 0x0
>[    0.847253] xhci_hcd 0000:00:14.0: ffffc9000b0604bc port reserved reg = 0x0
>[    0.847255] xhci_hcd 0000:00:14.0: ffffc9000b0604c0 port status reg = 0x2a0
>[    0.847256] xhci_hcd 0000:00:14.0: ffffc9000b0604c4 port power reg = 0x0
>[    0.847259] xhci_hcd 0000:00:14.0: ffffc9000b0604c8 port link reg = 0x0
>[    0.847262] xhci_hcd 0000:00:14.0: ffffc9000b0604cc port reserved reg = 0x0
>[    0.847263] xhci_hcd 0000:00:14.0: ffffc9000b0604d0 port status reg = 0x2a0
>[    0.847265] xhci_hcd 0000:00:14.0: ffffc9000b0604d4 port power reg = 0x0
>[    0.847267] xhci_hcd 0000:00:14.0: ffffc9000b0604d8 port link reg = 0x0
>[    0.847270] xhci_hcd 0000:00:14.0: ffffc9000b0604dc port reserved reg = 0x0
>[    0.847271] xhci_hcd 0000:00:14.0: ffffc9000b0604e0 port status reg = 0x2a0
>[    0.847273] xhci_hcd 0000:00:14.0: ffffc9000b0604e4 port power reg = 0x0
>[    0.847275] xhci_hcd 0000:00:14.0: ffffc9000b0604e8 port link reg = 0x0
>[    0.847278] xhci_hcd 0000:00:14.0: ffffc9000b0604ec port reserved reg = 0x0
>[    0.847279] xhci_hcd 0000:00:14.0: ffffc9000b0604f0 port status reg = 0x2a0
>[    0.847281] xhci_hcd 0000:00:14.0: ffffc9000b0604f4 port power reg = 0x0
>[    0.847283] xhci_hcd 0000:00:14.0: ffffc9000b0604f8 port link reg = 0x0
>[    0.847286] xhci_hcd 0000:00:14.0: ffffc9000b0604fc port reserved reg = 0x0
>[    0.847287] xhci_hcd 0000:00:14.0: ffffc9000b060500 port status reg = 0x2a0
>[    0.847289] xhci_hcd 0000:00:14.0: ffffc9000b060504 port power reg = 0x0
>[    0.847291] xhci_hcd 0000:00:14.0: ffffc9000b060508 port link reg = 0x0
>[    0.847294] xhci_hcd 0000:00:14.0: ffffc9000b06050c port reserved reg = 0x0
>[    0.847296] xhci_hcd 0000:00:14.0: ffffc9000b060510 port status reg = 0x2a0
>[    0.847297] xhci_hcd 0000:00:14.0: ffffc9000b060514 port power reg = 0x0
>[    0.847300] xhci_hcd 0000:00:14.0: ffffc9000b060518 port link reg = 0x0
>[    0.847302] xhci_hcd 0000:00:14.0: ffffc9000b06051c port reserved reg = 0x0
>[    0.847304] xhci_hcd 0000:00:14.0: ffffc9000b060520 port status reg = 0x2a0
>[    0.847305] xhci_hcd 0000:00:14.0: ffffc9000b060524 port power reg = 0x0
>[    0.847308] xhci_hcd 0000:00:14.0: ffffc9000b060528 port link reg = 0x0
>[    0.847310] xhci_hcd 0000:00:14.0: ffffc9000b06052c port reserved reg = 0x0
>[    0.847312] xhci_hcd 0000:00:14.0: ffffc9000b060530 port status reg = 0x2a0
>[    0.847313] xhci_hcd 0000:00:14.0: ffffc9000b060534 port power reg = 0x0
>[    0.847316] xhci_hcd 0000:00:14.0: ffffc9000b060538 port link reg = 0x0
>[    0.847324] xhci_hcd 0000:00:14.0: ffffc9000b06053c port reserved reg = 0x0
>[    0.847326] xhci_hcd 0000:00:14.0: ffffc9000b060540 port status reg = 0x2a0
>[    0.847328] xhci_hcd 0000:00:14.0: ffffc9000b060544 port power reg = 0x0
>[    0.847331] xhci_hcd 0000:00:14.0: ffffc9000b060548 port link reg = 0x0
>[    0.847334] xhci_hcd 0000:00:14.0: ffffc9000b06054c port reserved reg = 0x0
>[    0.847335] xhci_hcd 0000:00:14.0: ffffc9000b060550 port status reg = 0x6e1
>[    0.847337] xhci_hcd 0000:00:14.0: ffffc9000b060554 port power reg = 0x0
>[    0.847340] xhci_hcd 0000:00:14.0: ffffc9000b060558 port link reg = 0x0
>[    0.847343] xhci_hcd 0000:00:14.0: ffffc9000b06055c port reserved reg = 0x0
>[    0.847344] xhci_hcd 0000:00:14.0: ffffc9000b060560 port status reg = 0x2a0
>[    0.847346] xhci_hcd 0000:00:14.0: ffffc9000b060564 port power reg = 0x0
>[    0.847348] xhci_hcd 0000:00:14.0: ffffc9000b060568 port link reg = 0x0
>[    0.847351] xhci_hcd 0000:00:14.0: ffffc9000b06056c port reserved reg = 0x0
>[    0.847352] xhci_hcd 0000:00:14.0: ffffc9000b060570 port status reg = 0x1203
>[    0.847354] xhci_hcd 0000:00:14.0: ffffc9000b060574 port power reg = 0x0
>[    0.847355] xhci_hcd 0000:00:14.0: ffffc9000b060578 port link reg = 0xe1
>[    0.847358] xhci_hcd 0000:00:14.0: ffffc9000b06057c port reserved reg = 0x0
>[    0.847360] xhci_hcd 0000:00:14.0: ffffc9000b060580 port status reg = 0x2a0
>[    0.847362] xhci_hcd 0000:00:14.0: ffffc9000b060584 port power reg = 0x0
>[    0.847364] xhci_hcd 0000:00:14.0: ffffc9000b060588 port link reg = 0x0
>[    0.847367] xhci_hcd 0000:00:14.0: ffffc9000b06058c port reserved reg = 0x0
>[    0.847368] xhci_hcd 0000:00:14.0: ffffc9000b060590 port status reg = 0x2a0
>[    0.847370] xhci_hcd 0000:00:14.0: ffffc9000b060594 port power reg = 0x0
>[    0.847373] xhci_hcd 0000:00:14.0: ffffc9000b060598 port link reg = 0x0
>[    0.847375] xhci_hcd 0000:00:14.0: ffffc9000b06059c port reserved reg = 0x0
>[    0.847377] xhci_hcd 0000:00:14.0: ffffc9000b0605a0 port status reg = 0x2a0
>[    0.847378] xhci_hcd 0000:00:14.0: ffffc9000b0605a4 port power reg = 0x0
>[    0.847381] xhci_hcd 0000:00:14.0: ffffc9000b0605a8 port link reg = 0x0
>[    0.847383] xhci_hcd 0000:00:14.0: ffffc9000b0605ac port reserved reg = 0x0
>[    0.847385] xhci_hcd 0000:00:14.0: ffffc9000b0605b0 port status reg = 0x2a0
>[    0.847387] xhci_hcd 0000:00:14.0: ffffc9000b0605b4 port power reg = 0x0
>[    0.847389] xhci_hcd 0000:00:14.0: ffffc9000b0605b8 port link reg = 0x0
>[    0.847392] xhci_hcd 0000:00:14.0: ffffc9000b0605bc port reserved reg = 0x0
>[    0.847393] xhci_hcd 0000:00:14.0: ffffc9000b0605c0 port status reg = 0x2a0
>[    0.847395] xhci_hcd 0000:00:14.0: ffffc9000b0605c4 port power reg = 0x0
>[    0.847398] xhci_hcd 0000:00:14.0: ffffc9000b0605c8 port link reg = 0x0
>[    0.847400] xhci_hcd 0000:00:14.0: ffffc9000b0605cc port reserved reg = 0x0
>[    0.847402] xhci_hcd 0000:00:14.0: // Halt the HC
>[    0.847405] xhci_hcd 0000:00:14.0: Resetting HCD
>[    0.847406] xhci_hcd 0000:00:14.0: // Reset the HC
>[    0.847412] xhci_hcd 0000:00:14.0: Wait for controller to be ready for doorbell rings
>[    0.847413] xhci_hcd 0000:00:14.0: Reset complete
>[    0.847414] xhci_hcd 0000:00:14.0: Enabling 64-bit DMA addresses.
>[    0.847415] xhci_hcd 0000:00:14.0: Calling HCD init
>[    0.847416] xhci_hcd 0000:00:14.0: xhci_init
>[    0.847417] xhci_hcd 0000:00:14.0: xHCI doesn't need link TRB QUIRK
>[    0.847419] xhci_hcd 0000:00:14.0: Supported page size register = 0x1
>[    0.847420] xhci_hcd 0000:00:14.0: Supported page size of 4K
>[    0.847421] xhci_hcd 0000:00:14.0: HCD page size set to 4K
>[    0.847423] xhci_hcd 0000:00:14.0: // xHC can handle at most 32 device slots.
>[    0.847424] xhci_hcd 0000:00:14.0: // Setting Max device slots reg = 0x20.
>[    0.847431] xhci_hcd 0000:00:14.0: // Device context base array address = 0xfffff000 (DMA), ffff88040ba94000 (virt)
>[    0.847434] xhci_hcd 0000:00:14.0: Allocated command ring at ffff88040bf1e900
>[    0.847435] xhci_hcd 0000:00:14.0: First segment DMA is 0xffffe000
>[    0.847438] xhci_hcd 0000:00:14.0: // Setting command ring address to 0x20
>[    0.847441] xhci_hcd 0000:00:14.0: // xHC command ring deq ptr low bits + flags = @00000000
>[    0.847442] xhci_hcd 0000:00:14.0: // xHC command ring deq ptr high bits = @00000000
>[    0.847444] xhci_hcd 0000:00:14.0: // Doorbell array is located at offset 0x3000 from cap regs base addr
>[    0.847446] xhci_hcd 0000:00:14.0: // xHCI capability registers at ffffc9000b060000:
>[    0.847447] xhci_hcd 0000:00:14.0: // @ffffc9000b060000 = 0x1000080 (CAPLENGTH AND HCIVERSION)
>[    0.847448] xhci_hcd 0000:00:14.0: //   CAPLENGTH: 0x80
>[    0.847449] xhci_hcd 0000:00:14.0: // xHCI operational registers at ffffc9000b060080:
>[    0.847451] xhci_hcd 0000:00:14.0: // @ffffc9000b060018 = 0x2000 RTSOFF
>[    0.847452] xhci_hcd 0000:00:14.0: // xHCI runtime registers at ffffc9000b062000:
>[    0.847453] xhci_hcd 0000:00:14.0: // @ffffc9000b060014 = 0x3000 DBOFF
>[    0.847454] xhci_hcd 0000:00:14.0: // Doorbell array at ffffc9000b063000:
>[    0.847455] xhci_hcd 0000:00:14.0: xHCI runtime registers at ffffc9000b062000:
>[    0.847457] xhci_hcd 0000:00:14.0:   ffffc9000b062000: Microframe index = 0x0
>[    0.847469] xhci_hcd 0000:00:14.0: // Allocating event ring
>[    0.847471] xhci_hcd 0000:00:14.0: TRB math tests passed.
>[    0.847472] xhci_hcd 0000:00:14.0: // Allocated event ring segment table at 0xffffc000
>[    0.847474] xhci_hcd 0000:00:14.0: Set ERST to 0; private num segs = 1, virt addr = ffff88040ba98000, dma addr = 0xffffc000
>[    0.847475] xhci_hcd 0000:00:14.0: // Write ERST size = 1 to ir_set 0 (some bits preserved)
>[    0.847476] xhci_hcd 0000:00:14.0: // Set ERST entries to point to event ring.
>[    0.847477] xhci_hcd 0000:00:14.0: // Set ERST base address for ir_set 0 = 0xffffc000
>[    0.847481] xhci_hcd 0000:00:14.0: // Write event ring dequeue pointer, preserving EHB bit
>[    0.847482] xhci_hcd 0000:00:14.0: Wrote ERST address to ir_set 0.
>[    0.847484] xhci_hcd 0000:00:14.0: Allocating 16 scratchpad buffers
>[    0.847505] xhci_hcd 0000:00:14.0: Ext Cap ffffc9000b068000, port offset = 1, count = 15, revision = 0x2
>[    0.847506] xhci_hcd 0000:00:14.0: xHCI 1.0: support USB2 software lpm
>[    0.847508] xhci_hcd 0000:00:14.0: Ext Cap ffffc9000b068020, port offset = 16, count = 6, revision = 0x3
>[    0.847509] xhci_hcd 0000:00:14.0: Found 15 USB 2.0 ports and 6 USB 3.0 ports.
>[    0.847511] xhci_hcd 0000:00:14.0: USB 2.0 port at index 0, addr = ffffc9000b060480
>[    0.847512] xhci_hcd 0000:00:14.0: USB 2.0 port at index 1, addr = ffffc9000b060490
>[    0.847513] xhci_hcd 0000:00:14.0: USB 2.0 port at index 2, addr = ffffc9000b0604a0
>[    0.847514] xhci_hcd 0000:00:14.0: USB 2.0 port at index 3, addr = ffffc9000b0604b0
>[    0.847515] xhci_hcd 0000:00:14.0: USB 2.0 port at index 4, addr = ffffc9000b0604c0
>[    0.847516] xhci_hcd 0000:00:14.0: USB 2.0 port at index 5, addr = ffffc9000b0604d0
>[    0.847517] xhci_hcd 0000:00:14.0: USB 2.0 port at index 6, addr = ffffc9000b0604e0
>[    0.847518] xhci_hcd 0000:00:14.0: USB 2.0 port at index 7, addr = ffffc9000b0604f0
>[    0.847519] xhci_hcd 0000:00:14.0: USB 2.0 port at index 8, addr = ffffc9000b060500
>[    0.847520] xhci_hcd 0000:00:14.0: USB 2.0 port at index 9, addr = ffffc9000b060510
>[    0.847521] xhci_hcd 0000:00:14.0: USB 2.0 port at index 10, addr = ffffc9000b060520
>[    0.847522] xhci_hcd 0000:00:14.0: USB 2.0 port at index 11, addr = ffffc9000b060530
>[    0.847523] xhci_hcd 0000:00:14.0: USB 2.0 port at index 12, addr = ffffc9000b060540
>[    0.847524] xhci_hcd 0000:00:14.0: USB 2.0 port at index 13, addr = ffffc9000b060550
>[    0.847525] xhci_hcd 0000:00:14.0: USB 2.0 port at index 14, addr = ffffc9000b060560
>[    0.847526] xhci_hcd 0000:00:14.0: USB 3.0 port at index 15, addr = ffffc9000b060570
>[    0.847527] xhci_hcd 0000:00:14.0: USB 3.0 port at index 16, addr = ffffc9000b060580
>[    0.847528] xhci_hcd 0000:00:14.0: USB 3.0 port at index 17, addr = ffffc9000b060590
>[    0.847530] xhci_hcd 0000:00:14.0: USB 3.0 port at index 18, addr = ffffc9000b0605a0
>[    0.847531] xhci_hcd 0000:00:14.0: USB 3.0 port at index 19, addr = ffffc9000b0605b0
>[    0.847532] xhci_hcd 0000:00:14.0: USB 3.0 port at index 20, addr = ffffc9000b0605c0
>[    0.847533] xhci_hcd 0000:00:14.0: Finished xhci_init
>[    0.847534] xhci_hcd 0000:00:14.0: Called HCD init
>[    0.847536] xhci_hcd 0000:00:14.0: Got SBRN 48
>[    0.847539] xhci_hcd 0000:00:14.0: cache line size of 64 is not supported
>[    0.847540] xhci_hcd 0000:00:14.0: Finished xhci_pci_reinit
>[    0.847541] xhci_hcd 0000:00:14.0: supports USB remote wakeup
>[    0.847542] xhci_hcd 0000:00:14.0: xhci_run
>[    0.847543] xhci_hcd 0000:00:14.0: Failed to enable MSI-X
>[    0.847556] xhci_hcd 0000:00:14.0: irq 57 for MSI/MSI-X
>[    0.847569] xhci_hcd 0000:00:14.0: Command ring memory map follows:
>[    0.847570] xhci_hcd 0000:00:14.0: @00000000ffffe000 00000000 00000000 00000000 00000000
>[    0.847571] xhci_hcd 0000:00:14.0: @00000000ffffe010 00000000 00000000 00000000 00000000
>[    0.847573] xhci_hcd 0000:00:14.0: @00000000ffffe020 00000000 00000000 00000000 00000000
>[    0.847574] xhci_hcd 0000:00:14.0: @00000000ffffe030 00000000 00000000 00000000 00000000
>[    0.847575] xhci_hcd 0000:00:14.0: @00000000ffffe040 00000000 00000000 00000000 00000000
>[    0.847576] xhci_hcd 0000:00:14.0: @00000000ffffe050 00000000 00000000 00000000 00000000
>[    0.847577] xhci_hcd 0000:00:14.0: @00000000ffffe060 00000000 00000000 00000000 00000000
>[    0.847578] xhci_hcd 0000:00:14.0: @00000000ffffe070 00000000 00000000 00000000 00000000
>[    0.847580] xhci_hcd 0000:00:14.0: @00000000ffffe080 00000000 00000000 00000000 00000000
>[    0.847581] xhci_hcd 0000:00:14.0: @00000000ffffe090 00000000 00000000 00000000 00000000
>[    0.847582] xhci_hcd 0000:00:14.0: @00000000ffffe0a0 00000000 00000000 00000000 00000000
>[    0.847583] xhci_hcd 0000:00:14.0: @00000000ffffe0b0 00000000 00000000 00000000 00000000
>[    0.847584] xhci_hcd 0000:00:14.0: @00000000ffffe0c0 00000000 00000000 00000000 00000000
>[    0.847585] xhci_hcd 0000:00:14.0: @00000000ffffe0d0 00000000 00000000 00000000 00000000
>[    0.847586] xhci_hcd 0000:00:14.0: @00000000ffffe0e0 00000000 00000000 00000000 00000000
>[    0.847587] xhci_hcd 0000:00:14.0: @00000000ffffe0f0 00000000 00000000 00000000 00000000
>[    0.847588] xhci_hcd 0000:00:14.0: @00000000ffffe100 00000000 00000000 00000000 00000000
>[    0.847589] xhci_hcd 0000:00:14.0: @00000000ffffe110 00000000 00000000 00000000 00000000
>[    0.847591] xhci_hcd 0000:00:14.0: @00000000ffffe120 00000000 00000000 00000000 00000000
>[    0.847592] xhci_hcd 0000:00:14.0: @00000000ffffe130 00000000 00000000 00000000 00000000
>[    0.847593] xhci_hcd 0000:00:14.0: @00000000ffffe140 00000000 00000000 00000000 00000000
>[    0.847594] xhci_hcd 0000:00:14.0: @00000000ffffe150 00000000 00000000 00000000 00000000
>[    0.847595] xhci_hcd 0000:00:14.0: @00000000ffffe160 00000000 00000000 00000000 00000000
>[    0.847596] xhci_hcd 0000:00:14.0: @00000000ffffe170 00000000 00000000 00000000 00000000
>[    0.847597] xhci_hcd 0000:00:14.0: @00000000ffffe180 00000000 00000000 00000000 00000000
>[    0.847598] xhci_hcd 0000:00:14.0: @00000000ffffe190 00000000 00000000 00000000 00000000
>[    0.847599] xhci_hcd 0000:00:14.0: @00000000ffffe1a0 00000000 00000000 00000000 00000000
>[    0.847600] xhci_hcd 0000:00:14.0: @00000000ffffe1b0 00000000 00000000 00000000 00000000
>[    0.847602] xhci_hcd 0000:00:14.0: @00000000ffffe1c0 00000000 00000000 00000000 00000000
>[    0.847603] xhci_hcd 0000:00:14.0: @00000000ffffe1d0 00000000 00000000 00000000 00000000
>[    0.847604] xhci_hcd 0000:00:14.0: @00000000ffffe1e0 00000000 00000000 00000000 00000000
>[    0.847605] xhci_hcd 0000:00:14.0: @00000000ffffe1f0 00000000 00000000 00000000 00000000
>[    0.847606] xhci_hcd 0000:00:14.0: @00000000ffffe200 00000000 00000000 00000000 00000000
>[    0.847607] xhci_hcd 0000:00:14.0: @00000000ffffe210 00000000 00000000 00000000 00000000
>[    0.847608] xhci_hcd 0000:00:14.0: @00000000ffffe220 00000000 00000000 00000000 00000000
>[    0.847609] xhci_hcd 0000:00:14.0: @00000000ffffe230 00000000 00000000 00000000 00000000
>[    0.847610] xhci_hcd 0000:00:14.0: @00000000ffffe240 00000000 00000000 00000000 00000000
>[    0.847611] xhci_hcd 0000:00:14.0: @00000000ffffe250 00000000 00000000 00000000 00000000
>[    0.847613] xhci_hcd 0000:00:14.0: @00000000ffffe260 00000000 00000000 00000000 00000000
>[    0.847614] xhci_hcd 0000:00:14.0: @00000000ffffe270 00000000 00000000 00000000 00000000
>[    0.847615] xhci_hcd 0000:00:14.0: @00000000ffffe280 00000000 00000000 00000000 00000000
>[    0.847616] xhci_hcd 0000:00:14.0: @00000000ffffe290 00000000 00000000 00000000 00000000
>[    0.847617] xhci_hcd 0000:00:14.0: @00000000ffffe2a0 00000000 00000000 00000000 00000000
>[    0.847618] xhci_hcd 0000:00:14.0: @00000000ffffe2b0 00000000 00000000 00000000 00000000
>[    0.847619] xhci_hcd 0000:00:14.0: @00000000ffffe2c0 00000000 00000000 00000000 00000000
>[    0.847620] xhci_hcd 0000:00:14.0: @00000000ffffe2d0 00000000 00000000 00000000 00000000
>[    0.847622] xhci_hcd 0000:00:14.0: @00000000ffffe2e0 00000000 00000000 00000000 00000000
>[    0.847623] xhci_hcd 0000:00:14.0: @00000000ffffe2f0 00000000 00000000 00000000 00000000
>[    0.847624] xhci_hcd 0000:00:14.0: @00000000ffffe300 00000000 00000000 00000000 00000000
>[    0.847625] xhci_hcd 0000:00:14.0: @00000000ffffe310 00000000 00000000 00000000 00000000
>[    0.847626] xhci_hcd 0000:00:14.0: @00000000ffffe320 00000000 00000000 00000000 00000000
>[    0.847627] xhci_hcd 0000:00:14.0: @00000000ffffe330 00000000 00000000 00000000 00000000
>[    0.847628] xhci_hcd 0000:00:14.0: @00000000ffffe340 00000000 00000000 00000000 00000000
>[    0.847629] xhci_hcd 0000:00:14.0: @00000000ffffe350 00000000 00000000 00000000 00000000
>[    0.847630] xhci_hcd 0000:00:14.0: @00000000ffffe360 00000000 00000000 00000000 00000000
>[    0.847631] xhci_hcd 0000:00:14.0: @00000000ffffe370 00000000 00000000 00000000 00000000
>[    0.847633] xhci_hcd 0000:00:14.0: @00000000ffffe380 00000000 00000000 00000000 00000000
>[    0.847634] xhci_hcd 0000:00:14.0: @00000000ffffe390 00000000 00000000 00000000 00000000
>[    0.847635] xhci_hcd 0000:00:14.0: @00000000ffffe3a0 00000000 00000000 00000000 00000000
>[    0.847636] xhci_hcd 0000:00:14.0: @00000000ffffe3b0 00000000 00000000 00000000 00000000
>[    0.847637] xhci_hcd 0000:00:14.0: @00000000ffffe3c0 00000000 00000000 00000000 00000000
>[    0.847638] xhci_hcd 0000:00:14.0: @00000000ffffe3d0 00000000 00000000 00000000 00000000
>[    0.847639] xhci_hcd 0000:00:14.0: @00000000ffffe3e0 00000000 00000000 00000000 00000000
>[    0.847640] xhci_hcd 0000:00:14.0: @00000000ffffe3f0 ffffe000 00000000 00000000 00001802
>[    0.847641] xhci_hcd 0000:00:14.0:   Ring has not been updated
>[    0.847642] xhci_hcd 0000:00:14.0: Ring deq = ffff88040ba96000 (virt), 0xffffe000 (dma)
>[    0.847643] xhci_hcd 0000:00:14.0: Ring deq updated 0 times
>[    0.847644] xhci_hcd 0000:00:14.0: Ring enq = ffff88040ba96000 (virt), 0xffffe000 (dma)
>[    0.847645] xhci_hcd 0000:00:14.0: Ring enq updated 0 times
>[    0.847647] xhci_hcd 0000:00:14.0: // xHC command ring deq ptr low bits + flags = @00000000
>[    0.847648] xhci_hcd 0000:00:14.0: // xHC command ring deq ptr high bits = @00000000
>[    0.847649] xhci_hcd 0000:00:14.0: ERST memory map follows:
>[    0.847651] xhci_hcd 0000:00:14.0: @00000000ffffc000 ffffe400 00000000 00000040 00000000
>[    0.847651] xhci_hcd 0000:00:14.0: Event ring:
>[    0.847653] xhci_hcd 0000:00:14.0: @00000000ffffe400 00000000 00000000 00000000 00000000
>[    0.847654] xhci_hcd 0000:00:14.0: @00000000ffffe410 00000000 00000000 00000000 00000000
>[    0.847655] xhci_hcd 0000:00:14.0: @00000000ffffe420 00000000 00000000 00000000 00000000
>[    0.847656] xhci_hcd 0000:00:14.0: @00000000ffffe430 00000000 00000000 00000000 00000000
>[    0.847657] xhci_hcd 0000:00:14.0: @00000000ffffe440 00000000 00000000 00000000 00000000
>[    0.847658] xhci_hcd 0000:00:14.0: @00000000ffffe450 00000000 00000000 00000000 00000000
>[    0.847659] xhci_hcd 0000:00:14.0: @00000000ffffe460 00000000 00000000 00000000 00000000
>[    0.847660] xhci_hcd 0000:00:14.0: @00000000ffffe470 00000000 00000000 00000000 00000000
>[    0.847661] xhci_hcd 0000:00:14.0: @00000000ffffe480 00000000 00000000 00000000 00000000
>[    0.847662] xhci_hcd 0000:00:14.0: @00000000ffffe490 00000000 00000000 00000000 00000000
>[    0.847664] xhci_hcd 0000:00:14.0: @00000000ffffe4a0 00000000 00000000 00000000 00000000
>[    0.847665] xhci_hcd 0000:00:14.0: @00000000ffffe4b0 00000000 00000000 00000000 00000000
>[    0.847666] xhci_hcd 0000:00:14.0: @00000000ffffe4c0 00000000 00000000 00000000 00000000
>[    0.847667] xhci_hcd 0000:00:14.0: @00000000ffffe4d0 00000000 00000000 00000000 00000000
>[    0.847668] xhci_hcd 0000:00:14.0: @00000000ffffe4e0 00000000 00000000 00000000 00000000
>[    0.847669] xhci_hcd 0000:00:14.0: @00000000ffffe4f0 00000000 00000000 00000000 00000000
>[    0.847670] xhci_hcd 0000:00:14.0: @00000000ffffe500 00000000 00000000 00000000 00000000
>[    0.847671] xhci_hcd 0000:00:14.0: @00000000ffffe510 00000000 00000000 00000000 00000000
>[    0.847672] xhci_hcd 0000:00:14.0: @00000000ffffe520 00000000 00000000 00000000 00000000
>[    0.847673] xhci_hcd 0000:00:14.0: @00000000ffffe530 00000000 00000000 00000000 00000000
>[    0.847674] xhci_hcd 0000:00:14.0: @00000000ffffe540 00000000 00000000 00000000 00000000
>[    0.847676] xhci_hcd 0000:00:14.0: @00000000ffffe550 00000000 00000000 00000000 00000000
>[    0.847677] xhci_hcd 0000:00:14.0: @00000000ffffe560 00000000 00000000 00000000 00000000
>[    0.847678] xhci_hcd 0000:00:14.0: @00000000ffffe570 00000000 00000000 00000000 00000000
>[    0.847679] xhci_hcd 0000:00:14.0: @00000000ffffe580 00000000 00000000 00000000 00000000
>[    0.847680] xhci_hcd 0000:00:14.0: @00000000ffffe590 00000000 00000000 00000000 00000000
>[    0.847681] xhci_hcd 0000:00:14.0: @00000000ffffe5a0 00000000 00000000 00000000 00000000
>[    0.847682] xhci_hcd 0000:00:14.0: @00000000ffffe5b0 00000000 00000000 00000000 00000000
>[    0.847683] xhci_hcd 0000:00:14.0: @00000000ffffe5c0 00000000 00000000 00000000 00000000
>[    0.847684] xhci_hcd 0000:00:14.0: @00000000ffffe5d0 00000000 00000000 00000000 00000000
>[    0.847685] xhci_hcd 0000:00:14.0: @00000000ffffe5e0 00000000 00000000 00000000 00000000
>[    0.847687] xhci_hcd 0000:00:14.0: @00000000ffffe5f0 00000000 00000000 00000000 00000000
>[    0.847688] xhci_hcd 0000:00:14.0: @00000000ffffe600 00000000 00000000 00000000 00000000
>[    0.847689] xhci_hcd 0000:00:14.0: @00000000ffffe610 00000000 00000000 00000000 00000000
>[    0.847690] xhci_hcd 0000:00:14.0: @00000000ffffe620 00000000 00000000 00000000 00000000
>[    0.847691] xhci_hcd 0000:00:14.0: @00000000ffffe630 00000000 00000000 00000000 00000000
>[    0.847692] xhci_hcd 0000:00:14.0: @00000000ffffe640 00000000 00000000 00000000 00000000
>[    0.847693] xhci_hcd 0000:00:14.0: @00000000ffffe650 00000000 00000000 00000000 00000000
>[    0.847694] xhci_hcd 0000:00:14.0: @00000000ffffe660 00000000 00000000 00000000 00000000
>[    0.847695] xhci_hcd 0000:00:14.0: @00000000ffffe670 00000000 00000000 00000000 00000000
>[    0.847696] xhci_hcd 0000:00:14.0: @00000000ffffe680 00000000 00000000 00000000 00000000
>[    0.847697] xhci_hcd 0000:00:14.0: @00000000ffffe690 00000000 00000000 00000000 00000000
>[    0.847698] xhci_hcd 0000:00:14.0: @00000000ffffe6a0 00000000 00000000 00000000 00000000
>[    0.847700] xhci_hcd 0000:00:14.0: @00000000ffffe6b0 00000000 00000000 00000000 00000000
>[    0.847701] xhci_hcd 0000:00:14.0: @00000000ffffe6c0 00000000 00000000 00000000 00000000
>[    0.847702] xhci_hcd 0000:00:14.0: @00000000ffffe6d0 00000000 00000000 00000000 00000000
>[    0.847703] xhci_hcd 0000:00:14.0: @00000000ffffe6e0 00000000 00000000 00000000 00000000
>[    0.847704] xhci_hcd 0000:00:14.0: @00000000ffffe6f0 00000000 00000000 00000000 00000000
>[    0.847705] xhci_hcd 0000:00:14.0: @00000000ffffe700 00000000 00000000 00000000 00000000
>[    0.847706] xhci_hcd 0000:00:14.0: @00000000ffffe710 00000000 00000000 00000000 00000000
>[    0.847707] xhci_hcd 0000:00:14.0: @00000000ffffe720 00000000 00000000 00000000 00000000
>[    0.847708] xhci_hcd 0000:00:14.0: @00000000ffffe730 00000000 00000000 00000000 00000000
>[    0.847709] xhci_hcd 0000:00:14.0: @00000000ffffe740 00000000 00000000 00000000 00000000
>[    0.847710] xhci_hcd 0000:00:14.0: @00000000ffffe750 00000000 00000000 00000000 00000000
>[    0.847711] xhci_hcd 0000:00:14.0: @00000000ffffe760 00000000 00000000 00000000 00000000
>[    0.847713] xhci_hcd 0000:00:14.0: @00000000ffffe770 00000000 00000000 00000000 00000000
>[    0.847714] xhci_hcd 0000:00:14.0: @00000000ffffe780 00000000 00000000 00000000 00000000
>[    0.847715] xhci_hcd 0000:00:14.0: @00000000ffffe790 00000000 00000000 00000000 00000000
>[    0.847716] xhci_hcd 0000:00:14.0: @00000000ffffe7a0 00000000 00000000 00000000 00000000
>[    0.847717] xhci_hcd 0000:00:14.0: @00000000ffffe7b0 00000000 00000000 00000000 00000000
>[    0.847718] xhci_hcd 0000:00:14.0: @00000000ffffe7c0 00000000 00000000 00000000 00000000
>[    0.847719] xhci_hcd 0000:00:14.0: @00000000ffffe7d0 00000000 00000000 00000000 00000000
>[    0.847720] xhci_hcd 0000:00:14.0: @00000000ffffe7e0 00000000 00000000 00000000 00000000
>[    0.847721] xhci_hcd 0000:00:14.0: @00000000ffffe7f0 00000000 00000000 00000000 00000000
>[    0.847722] xhci_hcd 0000:00:14.0:   Ring has not been updated
>[    0.847723] xhci_hcd 0000:00:14.0: Ring deq = ffff88040ba96400 (virt), 0xffffe400 (dma)
>[    0.847724] xhci_hcd 0000:00:14.0: Ring deq updated 0 times
>[    0.847725] xhci_hcd 0000:00:14.0: Ring enq = ffff88040ba96400 (virt), 0xffffe400 (dma)
>[    0.847726] xhci_hcd 0000:00:14.0: Ring enq updated 0 times
>[    0.847728] xhci_hcd 0000:00:14.0: ERST deq = 64'hffffe400
>[    0.847729] xhci_hcd 0000:00:14.0: // Set the interrupt modulation register
>[    0.847732] xhci_hcd 0000:00:14.0: // Enable interrupts, cmd = 0x4.
>[    0.847734] xhci_hcd 0000:00:14.0: // Enabling event ring interrupter ffffc9000b062020 by writing 0x2 to irq_pending
>[    0.847736] xhci_hcd 0000:00:14.0:   ffffc9000b062020: ir_set[0]
>[    0.847737] xhci_hcd 0000:00:14.0:   ffffc9000b062020: ir_set.pending = 0x2
>[    0.847739] xhci_hcd 0000:00:14.0:   ffffc9000b062024: ir_set.control = 0xa0
>[    0.847741] xhci_hcd 0000:00:14.0:   ffffc9000b062028: ir_set.erst_size = 0x1
>[    0.847744] xhci_hcd 0000:00:14.0:   ffffc9000b062030: ir_set.erst_base = @ffffc000
>[    0.847746] xhci_hcd 0000:00:14.0:   ffffc9000b062038: ir_set.erst_dequeue = @ffffe400
>[    0.847747] xhci_hcd 0000:00:14.0: Finished xhci_run for USB2 roothub
>[    0.847757] usb usb2: default language 0x0409
>[    0.847762] usb usb2: udev 1, busnum 2, minor = 128
>[    0.847763] usb usb2: New USB device found, idVendor=1d6b, idProduct=0002
>[    0.847964] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
>[    0.848160] usb usb2: Product: xHCI Host Controller
>[    0.848468] usb usb2: Manufacturer: Linux 3.12.5-gentoo xhci_hcd
>[    0.848771] usb usb2: SerialNumber: 0000:00:14.0
>[    0.849190] usb usb2: usb_probe_device
>[    0.849191] usb usb2: configuration #1 chosen from 1 choice
>[    0.849193] xHCI xhci_add_endpoint called for root hub
>[    0.849194] xHCI xhci_check_bandwidth called for root hub
>[    0.849201] usb usb2: adding 2-0:1.0 (config #1, interface 0)
>[    0.849271] hub 2-0:1.0: usb_probe_interface
>[    0.849272] hub 2-0:1.0: usb_probe_interface - got id
>[    0.849273] hub 2-0:1.0: USB hub found
>[    0.849476] hub 2-0:1.0: 15 ports detected
>[    0.849681] hub 2-0:1.0: standalone hub
>[    0.849682] hub 2-0:1.0: no power switching (usb 1.0)
>[    0.849683] hub 2-0:1.0: individual port over-current protection
>[    0.849684] hub 2-0:1.0: Single TT
>[    0.849685] hub 2-0:1.0: TT requires at most 8 FS bit times (666 ns)
>[    0.849686] hub 2-0:1.0: power on to power good time: 20ms
>[    0.849690] hub 2-0:1.0: local power source is good
>[    0.851049] hub 2-0:1.0: trying to enable port power on non-switchable hub
>[    0.851053] xhci_hcd 0000:00:14.0: set port power, actual port 0 status  = 0x2a0
>[    0.851059] xhci_hcd 0000:00:14.0: set port power, actual port 1 status  = 0x2a0
>[    0.851064] xhci_hcd 0000:00:14.0: set port power, actual port 2 status  = 0x2a0
>[    0.851068] xhci_hcd 0000:00:14.0: set port power, actual port 3 status  = 0x2a0
>[    0.851072] xhci_hcd 0000:00:14.0: set port power, actual port 4 status  = 0x2a0
>[    0.851076] xhci_hcd 0000:00:14.0: set port power, actual port 5 status  = 0x2a0
>[    0.851081] xhci_hcd 0000:00:14.0: set port power, actual port 6 status  = 0x2a0
>[    0.851085] xhci_hcd 0000:00:14.0: set port power, actual port 7 status  = 0x2a0
>[    0.851089] xhci_hcd 0000:00:14.0: set port power, actual port 8 status  = 0x2a0
>[    0.851094] xhci_hcd 0000:00:14.0: set port power, actual port 9 status  = 0x2a0
>[    0.851098] xhci_hcd 0000:00:14.0: set port power, actual port 10 status  = 0x2a0
>[    0.851102] xhci_hcd 0000:00:14.0: set port power, actual port 11 status  = 0x2a0
>[    0.851107] xhci_hcd 0000:00:14.0: set port power, actual port 12 status  = 0x2a0
>[    0.851111] xhci_hcd 0000:00:14.0: set port power, actual port 13 status  = 0x2a0
>[    0.851115] xhci_hcd 0000:00:14.0: set port power, actual port 14 status  = 0x2a0
>[    0.851133] xhci_hcd 0000:00:14.0: xHCI Host Controller
>[    0.851434] xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 3
>[    0.851635] xhci_hcd 0000:00:14.0: supports USB remote wakeup
>[    0.851637] xhci_hcd 0000:00:14.0: // Turn on HC, cmd = 0x5.
>[    0.851639] xhci_hcd 0000:00:14.0: Finished xhci_run for USB3 roothub
>[    0.851654] usb usb3: skipped 1 descriptor after endpoint
>[    0.851657] usb usb3: default language 0x0409
>[    0.851662] usb usb3: udev 1, busnum 3, minor = 256
>[    0.851663] usb usb3: New USB device found, idVendor=1d6b, idProduct=0003
>[    0.851859] usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1
>[    0.852127] usb usb3: Product: xHCI Host Controller
>[    0.852435] usb usb3: Manufacturer: Linux 3.12.5-gentoo xhci_hcd
>[    0.852736] usb usb3: SerialNumber: 0000:00:14.0
>[    0.853148] usb usb3: usb_probe_device
>[    0.853149] usb usb3: configuration #1 chosen from 1 choice
>[    0.853151] xHCI xhci_add_endpoint called for root hub
>[    0.853151] xHCI xhci_check_bandwidth called for root hub
>[    0.853157] usb usb3: adding 3-0:1.0 (config #1, interface 0)
>[    0.853218] hub 3-0:1.0: usb_probe_interface
>[    0.853219] hub 3-0:1.0: usb_probe_interface - got id
>[    0.853221] hub 3-0:1.0: USB hub found
>[    0.853427] hub 3-0:1.0: 6 ports detected
>[    0.853652] hub 3-0:1.0: standalone hub
>[    0.853652] hub 3-0:1.0: no power switching (usb 1.0)
>[    0.853653] hub 3-0:1.0: individual port over-current protection
>[    0.853654] hub 3-0:1.0: TT requires at most 8 FS bit times (666 ns)
>[    0.853655] hub 3-0:1.0: power on to power good time: 20ms
>[    0.853659] hub 3-0:1.0: local power source is good
>[    0.854207] hub 3-0:1.0: trying to enable port power on non-switchable hub
>[    0.854211] xhci_hcd 0000:00:14.0: set port power, actual port 0 status  = 0x12b1
>[    0.854217] xhci_hcd 0000:00:14.0: set port power, actual port 1 status  = 0x802a0
>[    0.854222] xhci_hcd 0000:00:14.0: set port power, actual port 2 status  = 0x802a0
>[    0.854226] xhci_hcd 0000:00:14.0: set port power, actual port 3 status  = 0x802a0
>[    0.854231] xhci_hcd 0000:00:14.0: set port power, actual port 4 status  = 0x802a0
>[    0.854235] xhci_hcd 0000:00:14.0: set port power, actual port 5 status  = 0x802a0
>[    0.859487] usbcore: registered new interface driver usblp
>[    0.859739] usbcore: registered new interface driver usb-storage
>[    0.860135] i8042: PNP: No PS/2 controller found. Probing ports directly.
>[    0.862808] serio: i8042 KBD port at 0x60,0x64 irq 1
>[    0.863005] serio: i8042 AUX port at 0x60,0x64 irq 12
>[    0.863332] mousedev: PS/2 mouse device common for all mice
>[    0.863711] input: PC Speaker as /devices/platform/pcspkr/input/input3
>[    0.863968] rtc_cmos 00:06: RTC can wake from S4
>[    0.864277] rtc_cmos 00:06: rtc core: registered rtc_cmos as rtc0
>[    0.864492] rtc_cmos 00:06: alarms up to one month, y3k, 242 bytes nvram, hpet irqs
>[    0.864716] i2c /dev entries driver
>[    0.865536] sdhci: Secure Digital Host Controller Interface driver
>[    0.865728] sdhci: Copyright(c) Pierre Ossman
>[    0.865956] VUB300 Driver rom wait states = 1C irqpoll timeout = 0400
>[    0.866040] usbcore: registered new interface driver vub300
>[    0.866514] usbcore: registered new interface driver ushc
>[    0.866766] sdhci-pltfm: SDHCI platform and OF driver helper
>[    0.867055] EFI Variables Facility v0.08 2004-May-17
>[    0.868513] xhci_hcd 0000:00:14.0: Port Status Change Event for port 14
>[    0.868519] xhci_hcd 0000:00:14.0: handle_port_status: starting port polling.
>[    0.872493] hidraw: raw HID events driver (C) Jiri Kosina
>[    0.873025] usbcore: registered new interface driver usbhid
>[    0.873209] usbhid: USB HID core driver
>[    0.873656] snd_hda_intel 0000:00:1b.0: enabling device (0000 -> 0002)
>[    0.873919] snd_hda_intel 0000:00:1b.0: irq 58 for MSI/MSI-X
>[    0.893933] input: HDA Intel PCH Front Headphone as /devices/pci0000:00/0000:00:1b.0/sound/card0/input11
>[    0.894261] input: HDA Intel PCH Line Out Side as /devices/pci0000:00/0000:00:1b.0/sound/card0/input10
>[    0.894564] input: HDA Intel PCH Line Out CLFE as /devices/pci0000:00/0000:00:1b.0/sound/card0/input9
>[    0.894848] input: HDA Intel PCH Line Out Surround as /devices/pci0000:00/0000:00:1b.0/sound/card0/input8
>[    0.895121] input: HDA Intel PCH Line Out Front as /devices/pci0000:00/0000:00:1b.0/sound/card0/input7
>[    0.895411] input: HDA Intel PCH Line as /devices/pci0000:00/0000:00:1b.0/sound/card0/input6
>[    0.895695] input: HDA Intel PCH Rear Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input5
>[    0.895979] input: HDA Intel PCH Front Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input4
>[    0.896727] hda_intel: Disabling MSI
>[    0.945380] ehci-pci 0000:00:1d.0: GetStatus port:1 status 001803 0  ACK POWER sig=j CSC CONNECT
>[    0.945385] hub 1-0:1.0: port 1: status 0501 change 0001
>[    0.946230] xhci_hcd 0000:00:14.0: Port Status Change Event for port 16
>[    0.946233] xhci_hcd 0000:00:14.0: handle_port_status: starting port polling.
>[    0.950337] xhci_hcd 0000:00:14.0: get port status, actual port 0 status  = 0x2a0
>[    0.950339] xhci_hcd 0000:00:14.0: Get port status returned 0x100
>[    0.950344] xhci_hcd 0000:00:14.0: get port status, actual port 1 status  = 0x2a0
>[    0.950345] xhci_hcd 0000:00:14.0: Get port status returned 0x100
>[    0.950348] xhci_hcd 0000:00:14.0: get port status, actual port 2 status  = 0x2a0
>[    0.950349] xhci_hcd 0000:00:14.0: Get port status returned 0x100
>[    0.950351] xhci_hcd 0000:00:14.0: get port status, actual port 3 status  = 0x2a0
>[    0.950352] xhci_hcd 0000:00:14.0: Get port status returned 0x100
>[    0.950355] xhci_hcd 0000:00:14.0: get port status, actual port 4 status  = 0x2a0
>[    0.950356] xhci_hcd 0000:00:14.0: Get port status returned 0x100
>[    0.950358] xhci_hcd 0000:00:14.0: get port status, actual port 5 status  = 0x2a0
>[    0.950359] xhci_hcd 0000:00:14.0: Get port status returned 0x100
>[    0.950362] xhci_hcd 0000:00:14.0: get port status, actual port 6 status  = 0x2a0
>[    0.950363] xhci_hcd 0000:00:14.0: Get port status returned 0x100
>[    0.950365] xhci_hcd 0000:00:14.0: get port status, actual port 7 status  = 0x2a0
>[    0.950366] xhci_hcd 0000:00:14.0: Get port status returned 0x100
>[    0.950369] xhci_hcd 0000:00:14.0: get port status, actual port 8 status  = 0x2a0
>[    0.950370] xhci_hcd 0000:00:14.0: Get port status returned 0x100
>[    0.950372] xhci_hcd 0000:00:14.0: get port status, actual port 9 status  = 0x2a0
>[    0.950373] xhci_hcd 0000:00:14.0: Get port status returned 0x100
>[    0.950376] xhci_hcd 0000:00:14.0: get port status, actual port 10 status  = 0x2a0
>[    0.950377] xhci_hcd 0000:00:14.0: Get port status returned 0x100
>[    0.950379] xhci_hcd 0000:00:14.0: get port status, actual port 11 status  = 0x2a0
>[    0.950380] xhci_hcd 0000:00:14.0: Get port status returned 0x100
>[    0.950383] xhci_hcd 0000:00:14.0: get port status, actual port 12 status  = 0x2a0
>[    0.950384] xhci_hcd 0000:00:14.0: Get port status returned 0x100
>[    0.950386] xhci_hcd 0000:00:14.0: get port status, actual port 13 status  = 0x206e1
>[    0.950388] xhci_hcd 0000:00:14.0: Get port status returned 0x10101
>[    0.950391] hub 2-0:1.0: port 14: status 0101 change 0001
>[    0.950394] xhci_hcd 0000:00:14.0: clear port connect change, actual port 13 status  = 0x6e1
>[    0.950399] xhci_hcd 0000:00:14.0: get port status, actual port 14 status  = 0x2a0
>[    0.950400] xhci_hcd 0000:00:14.0: Get port status returned 0x100
>[    0.953332] xhci_hcd 0000:00:14.0: get port status, actual port 0 status  = 0x2202a0
>[    0.953334] xhci_hcd 0000:00:14.0: Get port status returned 0x1102a0
>[    0.953340] xhci_hcd 0000:00:14.0: clear port connect change, actual port 0 status  = 0x2002a0
>[    0.953345] xhci_hcd 0000:00:14.0: clear port reset change, actual port 0 status  = 0x2a0
>[    0.953348] xhci_hcd 0000:00:14.0: get port status, actual port 1 status  = 0x802a0
>[    0.953349] xhci_hcd 0000:00:14.0: Get port status returned 0x2002a0
>[    0.953354] xhci_hcd 0000:00:14.0: clear port warm(BH) reset change, actual port 1 status  = 0x2a0
>[    0.953356] xhci_hcd 0000:00:14.0: get port status, actual port 2 status  = 0x802a0
>[    0.953357] xhci_hcd 0000:00:14.0: Get port status returned 0x2002a0
>[    0.953362] xhci_hcd 0000:00:14.0: clear port warm(BH) reset change, actual port 2 status  = 0x2a0
>[    0.953364] xhci_hcd 0000:00:14.0: get port status, actual port 3 status  = 0x802a0
>[    0.953365] xhci_hcd 0000:00:14.0: Get port status returned 0x2002a0
>[    0.953369] xhci_hcd 0000:00:14.0: clear port warm(BH) reset change, actual port 3 status  = 0x2a0
>[    0.953372] xhci_hcd 0000:00:14.0: get port status, actual port 4 status  = 0x802a0
>[    0.953373] xhci_hcd 0000:00:14.0: Get port status returned 0x2002a0
>[    0.953377] xhci_hcd 0000:00:14.0: clear port warm(BH) reset change, actual port 4 status  = 0x2a0
>[    0.953379] xhci_hcd 0000:00:14.0: get port status, actual port 5 status  = 0x802a0
>[    0.953380] xhci_hcd 0000:00:14.0: Get port status returned 0x2002a0
>[    0.953384] xhci_hcd 0000:00:14.0: clear port warm(BH) reset change, actual port 5 status  = 0x2a0
>[    0.962445] xhci_hcd 0000:00:14.0: Port Status Change Event for port 16
>[    0.962448] xhci_hcd 0000:00:14.0: handle_port_status: starting port polling.
>[    0.978346] xhci_hcd 0000:00:14.0: xhci_hub_status_data: stopping port polling.
>[    1.006341] ata2: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
>[    1.006541] ata4: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
>[    1.006746] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
>[    1.007742] ata2.00: ATA-9: ST1000DM003-1CH162, CC47, max UDMA/133
>[    1.007929] ata2.00: 1953525168 sectors, multi 16: LBA48 NCQ (depth 31/32), AA
>[    1.008743] ata2.00: configured for UDMA/133
>[    1.020392] ata4.00: ATAPI: PIONEER DVD-RW  DVR-221, 1.00, max UDMA/100
>[    1.021784] ata1.00: ATA-8: KINGSTON SV300S37A240G, 520ABBF0, max UDMA/133
>[    1.021972] ata1.00: 468862128 sectors, multi 16: LBA48 NCQ (depth 31/32), AA
>[    1.031782] ata1.00: configured for UDMA/133
>[    1.032077] scsi 0:0:0:0: Direct-Access     ATA      KINGSTON SV300S3 520A PQ: 0 ANSI: 5
>[    1.032573] sd 0:0:0:0: [sda] 468862128 512-byte logical blocks: (240 GB/223 GiB)
>[    1.032779] sd 0:0:0:0: [sda] Write Protect is off
>[    1.032811] sd 0:0:0:0: Attached scsi generic sg0 type 0
>[    1.032963] scsi 1:0:0:0: Direct-Access     ATA      ST1000DM003-1CH1 CC47 PQ: 0 ANSI: 5
>[    1.033115] sd 1:0:0:0: [sdb] 1953525168 512-byte logical blocks: (1.00 TB/931 GiB)
>[    1.033116] sd 1:0:0:0: [sdb] 4096-byte physical blocks
>[    1.033183] sd 1:0:0:0: [sdb] Write Protect is off
>[    1.033184] sd 1:0:0:0: Attached scsi generic sg1 type 0
>[    1.033185] sd 1:0:0:0: [sdb] Mode Sense: 00 3a 00 00
>[    1.033222] sd 1:0:0:0: [sdb] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
>[    1.034969] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
>[    1.034976] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
>[    1.035931]  sda: sda1 sda2 sda3 sda4 sda5
>[    1.035991] ata4.00: configured for UDMA/100
>[    1.036641] sd 0:0:0:0: [sda] Attached SCSI disk
>[    1.037036] scsi 3:0:0:0: CD-ROM            PIONEER  DVD-RW  DVR-221  1.00 PQ: 0 ANSI: 5
>[    1.042657] sr0: scsi3-mmc drive: 40x/40x writer dvd-ram cd/rw xa/form2 cdda tray
>[    1.042846] cdrom: Uniform CD-ROM driver Revision: 3.20
>[    1.043180] sr 3:0:0:0: Attached scsi CD-ROM sr0
>[    1.043245] sr 3:0:0:0: Attached scsi generic sg2 type 5
>[    1.045332] hub 1-0:1.0: state 7 ports 2 chg 0002 evt 0000
>[    1.045353] hub 1-0:1.0: port 1, status 0501, change 0000, 480 Mb/s
>[    1.051332] xhci_hcd 0000:00:14.0: xhci_hub_status_data: stopping port polling.
>[    1.073510] input: HDA NVidia HDMI/DP,pcm=9 as /devices/pci0000:00/0000:00:01.0/0000:01:00.1/sound/card1/input16
>[    1.073904] input: HDA NVidia HDMI/DP,pcm=8 as /devices/pci0000:00/0000:00:01.0/0000:01:00.1/sound/card1/input15
>[    1.074217] input: HDA NVidia HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:01.0/0000:01:00.1/sound/card1/input14
>[    1.074518] input: HDA NVidia HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:01.0/0000:01:00.1/sound/card1/input13
>[    1.075338] ip_tables: (C) 2000-2006 Netfilter Core Team
>[    1.075565] TCP: cubic registered
>[    1.075767] Initializing XFRM netlink socket
>[    1.076127] NET: Registered protocol family 10
>[    1.076497] ip6_tables: (C) 2000-2006 Netfilter Core Team
>[    1.076704] sit: IPv6 over IPv4 tunneling driver
>[    1.077037] NET: Registered protocol family 17
>[    1.077237] l2tp_core: L2TP core driver, V2.0
>[    1.077442] l2tp_ppp: PPPoL2TP kernel driver, V2.0
>[    1.077726] l2tp_ip: L2TP IP encapsulation support (L2TPv3)
>[    1.078016] l2tp_netlink: L2TP netlink interface
>[    1.078309] l2tp_eth: L2TP ethernet pseudowire support (L2TPv3)
>[    1.078596] l2tp_ip6: L2TP IP encapsulation support for IPv6 (L2TPv3)
>[    1.078891] 8021q: 802.1Q VLAN Support v1.8
>[    1.079183] Key type dns_resolver registered
>[    1.080008]  sdb: sdb1 sdb2 sdb3
>[    1.080041] registered taskstats version 1
>[    1.080401] console [netcon0] enabled
>[    1.080645] netconsole: network logging started
>[    1.080713] sd 1:0:0:0: [sdb] Attached SCSI disk
>[    1.082227] ALSA device list:
>[    1.082440]   #0: HDA Intel PCH at 0xf7410000 irq 58
>[    1.082628]   #1: HDA NVidia at 0xf7080000 irq 17
>[    1.096486] ehci-pci 0000:00:1d.0: port 1 reset complete, port enabled
>[    1.096489] ehci-pci 0000:00:1d.0: GetStatus port:1 status 001005 0  ACK POWER sig=se0 PE CONNECT
>[    1.147343] usb 1-1: new high-speed USB device number 2 using ehci-pci
>[    1.198603] ehci-pci 0000:00:1d.0: port 1 reset complete, port enabled
>[    1.198607] ehci-pci 0000:00:1d.0: GetStatus port:1 status 001005 0  ACK POWER sig=se0 PE CONNECT
>[    1.224308] tsc: Refined TSC clocksource calibration: 3292.375 MHz
>[    1.261622] usb 1-1: udev 2, busnum 1, minor = 1
>[    1.261625] usb 1-1: New USB device found, idVendor=8087, idProduct=8000
>[    1.261820] usb 1-1: New USB device strings: Mfr=0, Product=0, SerialNumber=0
>[    1.262131] usb 1-1: usb_probe_device
>[    1.262134] usb 1-1: configuration #1 chosen from 1 choice
>[    1.262245] usb 1-1: adding 1-1:1.0 (config #1, interface 0)
>[    1.262308] hub 1-1:1.0: usb_probe_interface
>[    1.262311] hub 1-1:1.0: usb_probe_interface - got id
>[    1.262312] hub 1-1:1.0: USB hub found
>[    1.262621] hub 1-1:1.0: 8 ports detected
>[    1.262806] hub 1-1:1.0: standalone hub
>[    1.262807] hub 1-1:1.0: individual port power switching
>[    1.262808] hub 1-1:1.0: individual port over-current protection
>[    1.262809] hub 1-1:1.0: Single TT
>[    1.262810] hub 1-1:1.0: TT requires at most 8 FS bit times (666 ns)
>[    1.262811] hub 1-1:1.0: power on to power good time: 0ms
>[    1.262996] hub 1-1:1.0: local power source is good
>[    1.263187] hub 1-1:1.0: enabling power on all ports
>[    1.264134] hub 2-0:1.0: state 7 ports 15 chg 4000 evt 0000
>[    1.264137] xhci_hcd 0000:00:14.0: get port status, actual port 13 status  = 0x6e1
>[    1.264139] xhci_hcd 0000:00:14.0: Get port status returned 0x101
>[    1.264151] hub 2-0:1.0: port 14, status 0101, change 0000, 12 Mb/s
>[    1.264154] xhci_hcd 0000:00:14.0: // Ding dong!
>[    1.264185] xhci_hcd 0000:00:14.0: Slot 1 output ctx = 0xfffea000 (dma)
>[    1.264188] xhci_hcd 0000:00:14.0: Slot 1 input ctx = 0xfffe9000 (dma)
>[    1.264192] xhci_hcd 0000:00:14.0: Set slot id 1 dcbaa entry ffff88040ba94008 to 0xfffea000
>[    1.264196] xhci_hcd 0000:00:14.0: set port reset, actual port 13 status  = 0x791
>[    1.314325] xhci_hcd 0000:00:14.0: get port status, actual port 13 status  = 0xf91
>[    1.314327] xhci_hcd 0000:00:14.0: Get port status returned 0x511
>[    1.314349] hub 2-0:1.0: port 14 not reset yet, waiting 50ms
>[    1.319341] xhci_hcd 0000:00:14.0: Port Status Change Event for port 14
>[    1.319344] xhci_hcd 0000:00:14.0: handle_port_status: starting port polling.
>[    1.361978] EXT3-fs (sda5): error: couldn't mount because of unsupported optional features (240)
>[    1.362360] EXT4-fs (sda5): couldn't mount as ext2 due to feature incompatibilities
>[    1.364242] usb 1-1: link qh256-0001/ffff88040b43be00 start 1 [1/0 us]
>[    1.364859] EXT4-fs (sda5): mounted filesystem with ordered data mode. Opts: (null)
>[    1.365052] VFS: Mounted root (ext4 filesystem) readonly on device 8:5.
>[    1.365318] xhci_hcd 0000:00:14.0: get port status, actual port 13 status  = 0x200e03
>[    1.365320] xhci_hcd 0000:00:14.0: Get port status returned 0x100503
>[    1.365609] devtmpfs: mounted
>[    1.366104] Freeing unused kernel memory: 884K (ffffffff81a52000 - ffffffff81b2f000)
>[    1.416300] xhci_hcd 0000:00:14.0: clear port reset change, actual port 13 status  = 0xe03
>[    1.416322] usb 2-14: new high-speed USB device number 2 using xhci_hcd
>[    1.416524] xhci_hcd 0000:00:14.0: Set root hub portnum to 14
>[    1.416525] xhci_hcd 0000:00:14.0: Set fake root hub portnum to 14
>[    1.416526] xhci_hcd 0000:00:14.0: udev->tt =           (null)
>[    1.416527] xhci_hcd 0000:00:14.0: udev->ttport = 0x0
>[    1.416528] xhci_hcd 0000:00:14.0: Slot ID 1 Input Context:
>[    1.416530] xhci_hcd 0000:00:14.0: @ffff88040bbf0000 (virt) @fffe9000 (dma) 0x000000 - drop flags
>[    1.416531] xhci_hcd 0000:00:14.0: @ffff88040bbf0004 (virt) @fffe9004 (dma) 0x000003 - add flags
>[    1.416532] xhci_hcd 0000:00:14.0: @ffff88040bbf0008 (virt) @fffe9008 (dma) 0x000000 - rsvd2[0]
>[    1.416534] xhci_hcd 0000:00:14.0: @ffff88040bbf000c (virt) @fffe900c (dma) 0x000000 - rsvd2[1]
>[    1.416535] xhci_hcd 0000:00:14.0: @ffff88040bbf0010 (virt) @fffe9010 (dma) 0x000000 - rsvd2[2]
>[    1.416536] xhci_hcd 0000:00:14.0: @ffff88040bbf0014 (virt) @fffe9014 (dma) 0x000000 - rsvd2[3]
>[    1.416537] xhci_hcd 0000:00:14.0: @ffff88040bbf0018 (virt) @fffe9018 (dma) 0x000000 - rsvd2[4]
>[    1.416538] xhci_hcd 0000:00:14.0: @ffff88040bbf001c (virt) @fffe901c (dma) 0x000000 - rsvd2[5]
>[    1.416539] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.416540] xhci_hcd 0000:00:14.0: @ffff88040bbf0020 (virt) @fffe9020 (dma) 0x8300000 - dev_info
>[    1.416541] xhci_hcd 0000:00:14.0: @ffff88040bbf0024 (virt) @fffe9024 (dma) 0x0e0000 - dev_info2
>[    1.416542] xhci_hcd 0000:00:14.0: @ffff88040bbf0028 (virt) @fffe9028 (dma) 0x000000 - tt_info
>[    1.416543] xhci_hcd 0000:00:14.0: @ffff88040bbf002c (virt) @fffe902c (dma) 0x000000 - dev_state
>[    1.416544] xhci_hcd 0000:00:14.0: @ffff88040bbf0030 (virt) @fffe9030 (dma) 0x000000 - rsvd[0]
>[    1.416546] xhci_hcd 0000:00:14.0: @ffff88040bbf0034 (virt) @fffe9034 (dma) 0x000000 - rsvd[1]
>[    1.416547] xhci_hcd 0000:00:14.0: @ffff88040bbf0038 (virt) @fffe9038 (dma) 0x000000 - rsvd[2]
>[    1.416548] xhci_hcd 0000:00:14.0: @ffff88040bbf003c (virt) @fffe903c (dma) 0x000000 - rsvd[3]
>[    1.416549] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.416550] xhci_hcd 0000:00:14.0: @ffff88040bbf0040 (virt) @fffe9040 (dma) 0x000000 - ep_info
>[    1.416551] xhci_hcd 0000:00:14.0: @ffff88040bbf0044 (virt) @fffe9044 (dma) 0x400026 - ep_info2
>[    1.416553] xhci_hcd 0000:00:14.0: @ffff88040bbf0048 (virt) @fffe9048 (dma) 0xffffe801 - deq
>[    1.416554] xhci_hcd 0000:00:14.0: @ffff88040bbf0050 (virt) @fffe9050 (dma) 0x000000 - tx_info
>[    1.416555] xhci_hcd 0000:00:14.0: @ffff88040bbf0054 (virt) @fffe9054 (dma) 0x000000 - rsvd[0]
>[    1.416556] xhci_hcd 0000:00:14.0: @ffff88040bbf0058 (virt) @fffe9058 (dma) 0x000000 - rsvd[1]
>[    1.416557] xhci_hcd 0000:00:14.0: @ffff88040bbf005c (virt) @fffe905c (dma) 0x000000 - rsvd[2]
>[    1.416558] xhci_hcd 0000:00:14.0: OUT Endpoint 01 Context (ep_index 01):
>[    1.416559] xhci_hcd 0000:00:14.0: @ffff88040bbf0060 (virt) @fffe9060 (dma) 0x000000 - ep_info
>[    1.416560] xhci_hcd 0000:00:14.0: @ffff88040bbf0064 (virt) @fffe9064 (dma) 0x000000 - ep_info2
>[    1.416561] xhci_hcd 0000:00:14.0: @ffff88040bbf0068 (virt) @fffe9068 (dma) 0x000000 - deq
>[    1.416562] xhci_hcd 0000:00:14.0: @ffff88040bbf0070 (virt) @fffe9070 (dma) 0x000000 - tx_info
>[    1.416564] xhci_hcd 0000:00:14.0: @ffff88040bbf0074 (virt) @fffe9074 (dma) 0x000000 - rsvd[0]
>[    1.416565] xhci_hcd 0000:00:14.0: @ffff88040bbf0078 (virt) @fffe9078 (dma) 0x000000 - rsvd[1]
>[    1.416566] xhci_hcd 0000:00:14.0: @ffff88040bbf007c (virt) @fffe907c (dma) 0x000000 - rsvd[2]
>[    1.416567] xhci_hcd 0000:00:14.0: IN Endpoint 01 Context (ep_index 02):
>[    1.416568] xhci_hcd 0000:00:14.0: @ffff88040bbf0080 (virt) @fffe9080 (dma) 0x000000 - ep_info
>[    1.416569] xhci_hcd 0000:00:14.0: @ffff88040bbf0084 (virt) @fffe9084 (dma) 0x000000 - ep_info2
>[    1.416570] xhci_hcd 0000:00:14.0: @ffff88040bbf0088 (virt) @fffe9088 (dma) 0x000000 - deq
>[    1.416571] xhci_hcd 0000:00:14.0: @ffff88040bbf0090 (virt) @fffe9090 (dma) 0x000000 - tx_info
>[    1.416572] xhci_hcd 0000:00:14.0: @ffff88040bbf0094 (virt) @fffe9094 (dma) 0x000000 - rsvd[0]
>[    1.416573] xhci_hcd 0000:00:14.0: @ffff88040bbf0098 (virt) @fffe9098 (dma) 0x000000 - rsvd[1]
>[    1.416574] xhci_hcd 0000:00:14.0: @ffff88040bbf009c (virt) @fffe909c (dma) 0x000000 - rsvd[2]
>[    1.416576] xhci_hcd 0000:00:14.0: // Ding dong!
>[    1.416788] xhci_hcd 0000:00:14.0: Successful Address Device command
>[    1.416792] xhci_hcd 0000:00:14.0: Op regs DCBAA ptr = 0x000000fffff000
>[    1.416795] xhci_hcd 0000:00:14.0: Slot ID 1 dcbaa entry @ffff88040ba94008 = 0x000000fffea000
>[    1.416796] xhci_hcd 0000:00:14.0: Output Context DMA address = 0xfffea000
>[    1.416798] xhci_hcd 0000:00:14.0: Slot ID 1 Input Context:
>[    1.416801] xhci_hcd 0000:00:14.0: @ffff88040bbf0000 (virt) @fffe9000 (dma) 0x000000 - drop flags
>[    1.416803] xhci_hcd 0000:00:14.0: @ffff88040bbf0004 (virt) @fffe9004 (dma) 0x000003 - add flags
>[    1.416805] xhci_hcd 0000:00:14.0: @ffff88040bbf0008 (virt) @fffe9008 (dma) 0x000000 - rsvd2[0]
>[    1.416807] xhci_hcd 0000:00:14.0: @ffff88040bbf000c (virt) @fffe900c (dma) 0x000000 - rsvd2[1]
>[    1.416808] xhci_hcd 0000:00:14.0: @ffff88040bbf0010 (virt) @fffe9010 (dma) 0x000000 - rsvd2[2]
>[    1.416810] xhci_hcd 0000:00:14.0: @ffff88040bbf0014 (virt) @fffe9014 (dma) 0x000000 - rsvd2[3]
>[    1.416812] xhci_hcd 0000:00:14.0: @ffff88040bbf0018 (virt) @fffe9018 (dma) 0x000000 - rsvd2[4]
>[    1.416814] xhci_hcd 0000:00:14.0: @ffff88040bbf001c (virt) @fffe901c (dma) 0x000000 - rsvd2[5]
>[    1.416816] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.416817] xhci_hcd 0000:00:14.0: @ffff88040bbf0020 (virt) @fffe9020 (dma) 0x8300000 - dev_info
>[    1.416819] xhci_hcd 0000:00:14.0: @ffff88040bbf0024 (virt) @fffe9024 (dma) 0x0e0000 - dev_info2
>[    1.416821] xhci_hcd 0000:00:14.0: @ffff88040bbf0028 (virt) @fffe9028 (dma) 0x000000 - tt_info
>[    1.416823] xhci_hcd 0000:00:14.0: @ffff88040bbf002c (virt) @fffe902c (dma) 0x000000 - dev_state
>[    1.416825] xhci_hcd 0000:00:14.0: @ffff88040bbf0030 (virt) @fffe9030 (dma) 0x000000 - rsvd[0]
>[    1.416827] xhci_hcd 0000:00:14.0: @ffff88040bbf0034 (virt) @fffe9034 (dma) 0x000000 - rsvd[1]
>[    1.416829] xhci_hcd 0000:00:14.0: @ffff88040bbf0038 (virt) @fffe9038 (dma) 0x000000 - rsvd[2]
>[    1.416831] xhci_hcd 0000:00:14.0: @ffff88040bbf003c (virt) @fffe903c (dma) 0x000000 - rsvd[3]
>[    1.416833] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.416835] xhci_hcd 0000:00:14.0: @ffff88040bbf0040 (virt) @fffe9040 (dma) 0x000000 - ep_info
>[    1.416837] xhci_hcd 0000:00:14.0: @ffff88040bbf0044 (virt) @fffe9044 (dma) 0x400026 - ep_info2
>[    1.416839] xhci_hcd 0000:00:14.0: @ffff88040bbf0048 (virt) @fffe9048 (dma) 0xffffe801 - deq
>[    1.416841] xhci_hcd 0000:00:14.0: @ffff88040bbf0050 (virt) @fffe9050 (dma) 0x000000 - tx_info
>[    1.416843] xhci_hcd 0000:00:14.0: @ffff88040bbf0054 (virt) @fffe9054 (dma) 0x000000 - rsvd[0]
>[    1.416845] xhci_hcd 0000:00:14.0: @ffff88040bbf0058 (virt) @fffe9058 (dma) 0x000000 - rsvd[1]
>[    1.416847] xhci_hcd 0000:00:14.0: @ffff88040bbf005c (virt) @fffe905c (dma) 0x000000 - rsvd[2]
>[    1.416849] xhci_hcd 0000:00:14.0: OUT Endpoint 01 Context (ep_index 01):
>[    1.416851] xhci_hcd 0000:00:14.0: @ffff88040bbf0060 (virt) @fffe9060 (dma) 0x000000 - ep_info
>[    1.416853] xhci_hcd 0000:00:14.0: @ffff88040bbf0064 (virt) @fffe9064 (dma) 0x000000 - ep_info2
>[    1.416855] xhci_hcd 0000:00:14.0: @ffff88040bbf0068 (virt) @fffe9068 (dma) 0x000000 - deq
>[    1.416857] xhci_hcd 0000:00:14.0: @ffff88040bbf0070 (virt) @fffe9070 (dma) 0x000000 - tx_info
>[    1.416859] xhci_hcd 0000:00:14.0: @ffff88040bbf0074 (virt) @fffe9074 (dma) 0x000000 - rsvd[0]
>[    1.416861] xhci_hcd 0000:00:14.0: @ffff88040bbf0078 (virt) @fffe9078 (dma) 0x000000 - rsvd[1]
>[    1.416863] xhci_hcd 0000:00:14.0: @ffff88040bbf007c (virt) @fffe907c (dma) 0x000000 - rsvd[2]
>[    1.416864] xhci_hcd 0000:00:14.0: IN Endpoint 01 Context (ep_index 02):
>[    1.416866] xhci_hcd 0000:00:14.0: @ffff88040bbf0080 (virt) @fffe9080 (dma) 0x000000 - ep_info
>[    1.416868] xhci_hcd 0000:00:14.0: @ffff88040bbf0084 (virt) @fffe9084 (dma) 0x000000 - ep_info2
>[    1.416870] xhci_hcd 0000:00:14.0: @ffff88040bbf0088 (virt) @fffe9088 (dma) 0x000000 - deq
>[    1.416872] xhci_hcd 0000:00:14.0: @ffff88040bbf0090 (virt) @fffe9090 (dma) 0x000000 - tx_info
>[    1.416874] xhci_hcd 0000:00:14.0: @ffff88040bbf0094 (virt) @fffe9094 (dma) 0x000000 - rsvd[0]
>[    1.416876] xhci_hcd 0000:00:14.0: @ffff88040bbf0098 (virt) @fffe9098 (dma) 0x000000 - rsvd[1]
>[    1.416878] xhci_hcd 0000:00:14.0: @ffff88040bbf009c (virt) @fffe909c (dma) 0x000000 - rsvd[2]
>[    1.416879] xhci_hcd 0000:00:14.0: Slot ID 1 Output Context:
>[    1.416881] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.416883] xhci_hcd 0000:00:14.0: @ffff88040b866000 (virt) @fffea000 (dma) 0x8300000 - dev_info
>[    1.416885] xhci_hcd 0000:00:14.0: @ffff88040b866004 (virt) @fffea004 (dma) 0x0e0000 - dev_info2
>[    1.416887] xhci_hcd 0000:00:14.0: @ffff88040b866008 (virt) @fffea008 (dma) 0x000000 - tt_info
>[    1.416889] xhci_hcd 0000:00:14.0: @ffff88040b86600c (virt) @fffea00c (dma) 0x10000001 - dev_state
>[    1.416890] xhci_hcd 0000:00:14.0: @ffff88040b866010 (virt) @fffea010 (dma) 0x000000 - rsvd[0]
>[    1.416892] xhci_hcd 0000:00:14.0: @ffff88040b866014 (virt) @fffea014 (dma) 0x000000 - rsvd[1]
>[    1.416894] xhci_hcd 0000:00:14.0: @ffff88040b866018 (virt) @fffea018 (dma) 0x000000 - rsvd[2]
>[    1.416896] xhci_hcd 0000:00:14.0: @ffff88040b86601c (virt) @fffea01c (dma) 0x000000 - rsvd[3]
>[    1.416898] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.416900] xhci_hcd 0000:00:14.0: @ffff88040b866020 (virt) @fffea020 (dma) 0x000001 - ep_info
>[    1.416902] xhci_hcd 0000:00:14.0: @ffff88040b866024 (virt) @fffea024 (dma) 0x400026 - ep_info2
>[    1.416904] xhci_hcd 0000:00:14.0: @ffff88040b866028 (virt) @fffea028 (dma) 0xffffe801 - deq
>[    1.416906] xhci_hcd 0000:00:14.0: @ffff88040b866030 (virt) @fffea030 (dma) 0x000000 - tx_info
>[    1.416908] xhci_hcd 0000:00:14.0: @ffff88040b866034 (virt) @fffea034 (dma) 0x000000 - rsvd[0]
>[    1.416910] xhci_hcd 0000:00:14.0: @ffff88040b866038 (virt) @fffea038 (dma) 0x000000 - rsvd[1]
>[    1.416911] xhci_hcd 0000:00:14.0: @ffff88040b86603c (virt) @fffea03c (dma) 0x000000 - rsvd[2]
>[    1.416913] xhci_hcd 0000:00:14.0: OUT Endpoint 01 Context (ep_index 01):
>[    1.416915] xhci_hcd 0000:00:14.0: @ffff88040b866040 (virt) @fffea040 (dma) 0x000000 - ep_info
>[    1.416917] xhci_hcd 0000:00:14.0: @ffff88040b866044 (virt) @fffea044 (dma) 0x000000 - ep_info2
>[    1.416919] xhci_hcd 0000:00:14.0: @ffff88040b866048 (virt) @fffea048 (dma) 0x000000 - deq
>[    1.416921] xhci_hcd 0000:00:14.0: @ffff88040b866050 (virt) @fffea050 (dma) 0x000000 - tx_info
>[    1.416923] xhci_hcd 0000:00:14.0: @ffff88040b866054 (virt) @fffea054 (dma) 0x000000 - rsvd[0]
>[    1.416925] xhci_hcd 0000:00:14.0: @ffff88040b866058 (virt) @fffea058 (dma) 0x000000 - rsvd[1]
>[    1.416927] xhci_hcd 0000:00:14.0: @ffff88040b86605c (virt) @fffea05c (dma) 0x000000 - rsvd[2]
>[    1.416929] xhci_hcd 0000:00:14.0: IN Endpoint 01 Context (ep_index 02):
>[    1.416931] xhci_hcd 0000:00:14.0: @ffff88040b866060 (virt) @fffea060 (dma) 0x000000 - ep_info
>[    1.416933] xhci_hcd 0000:00:14.0: @ffff88040b866064 (virt) @fffea064 (dma) 0x000000 - ep_info2
>[    1.416934] xhci_hcd 0000:00:14.0: @ffff88040b866068 (virt) @fffea068 (dma) 0x000000 - deq
>[    1.416936] xhci_hcd 0000:00:14.0: @ffff88040b866070 (virt) @fffea070 (dma) 0x000000 - tx_info
>[    1.416938] xhci_hcd 0000:00:14.0: @ffff88040b866074 (virt) @fffea074 (dma) 0x000000 - rsvd[0]
>[    1.416940] xhci_hcd 0000:00:14.0: @ffff88040b866078 (virt) @fffea078 (dma) 0x000000 - rsvd[1]
>[    1.416942] xhci_hcd 0000:00:14.0: @ffff88040b86607c (virt) @fffea07c (dma) 0x000000 - rsvd[2]
>[    1.416944] xhci_hcd 0000:00:14.0: Internal device address = 2
>[    1.428411] xhci_hcd 0000:00:14.0: Waiting for status stage event
>[    1.428420] usb 2-14: default language 0x0409
>[    1.428685] xhci_hcd 0000:00:14.0: Waiting for status stage event
>[    1.428692] usb 2-14: udev 2, busnum 2, minor = 129
>[    1.428693] usb 2-14: New USB device found, idVendor=05e3, idProduct=0610
>[    1.428897] usb 2-14: New USB device strings: Mfr=0, Product=1, SerialNumber=0
>[    1.429092] usb 2-14: Product: USB2.0 Hub
>[    1.429507] usb 2-14: usb_probe_device
>[    1.429509] usb 2-14: configuration #1 chosen from 1 choice
>[    1.429512] xhci_hcd 0000:00:14.0: add ep 0x81, slot id 1, new drop flags = 0x0, new add flags = 0x8, new slot info = 0x18300000
>[    1.429514] xhci_hcd 0000:00:14.0: xhci_check_bandwidth called for udev ffff8800cac94800
>[    1.429514] xhci_hcd 0000:00:14.0: New Input Control Context:
>[    1.429515] xhci_hcd 0000:00:14.0: @ffff88040bbf0000 (virt) @fffe9000 (dma) 0x000000 - drop flags
>[    1.429516] xhci_hcd 0000:00:14.0: @ffff88040bbf0004 (virt) @fffe9004 (dma) 0x000009 - add flags
>[    1.429517] xhci_hcd 0000:00:14.0: @ffff88040bbf0008 (virt) @fffe9008 (dma) 0x000000 - rsvd2[0]
>[    1.429518] xhci_hcd 0000:00:14.0: @ffff88040bbf000c (virt) @fffe900c (dma) 0x000000 - rsvd2[1]
>[    1.429519] xhci_hcd 0000:00:14.0: @ffff88040bbf0010 (virt) @fffe9010 (dma) 0x000000 - rsvd2[2]
>[    1.429519] xhci_hcd 0000:00:14.0: @ffff88040bbf0014 (virt) @fffe9014 (dma) 0x000000 - rsvd2[3]
>[    1.429520] xhci_hcd 0000:00:14.0: @ffff88040bbf0018 (virt) @fffe9018 (dma) 0x000000 - rsvd2[4]
>[    1.429521] xhci_hcd 0000:00:14.0: @ffff88040bbf001c (virt) @fffe901c (dma) 0x000000 - rsvd2[5]
>[    1.429521] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.429522] xhci_hcd 0000:00:14.0: @ffff88040bbf0020 (virt) @fffe9020 (dma) 0x18300000 - dev_info
>[    1.429523] xhci_hcd 0000:00:14.0: @ffff88040bbf0024 (virt) @fffe9024 (dma) 0x0e0000 - dev_info2
>[    1.429524] xhci_hcd 0000:00:14.0: @ffff88040bbf0028 (virt) @fffe9028 (dma) 0x000000 - tt_info
>[    1.429524] xhci_hcd 0000:00:14.0: @ffff88040bbf002c (virt) @fffe902c (dma) 0x000000 - dev_state
>[    1.429525] xhci_hcd 0000:00:14.0: @ffff88040bbf0030 (virt) @fffe9030 (dma) 0x000000 - rsvd[0]
>[    1.429526] xhci_hcd 0000:00:14.0: @ffff88040bbf0034 (virt) @fffe9034 (dma) 0x000000 - rsvd[1]
>[    1.429527] xhci_hcd 0000:00:14.0: @ffff88040bbf0038 (virt) @fffe9038 (dma) 0x000000 - rsvd[2]
>[    1.429527] xhci_hcd 0000:00:14.0: @ffff88040bbf003c (virt) @fffe903c (dma) 0x000000 - rsvd[3]
>[    1.429528] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.429529] xhci_hcd 0000:00:14.0: @ffff88040bbf0040 (virt) @fffe9040 (dma) 0x000000 - ep_info
>[    1.429530] xhci_hcd 0000:00:14.0: @ffff88040bbf0044 (virt) @fffe9044 (dma) 0x400026 - ep_info2
>[    1.429530] xhci_hcd 0000:00:14.0: @ffff88040bbf0048 (virt) @fffe9048 (dma) 0xffffe801 - deq
>[    1.429531] xhci_hcd 0000:00:14.0: @ffff88040bbf0050 (virt) @fffe9050 (dma) 0x000000 - tx_info
>[    1.429532] xhci_hcd 0000:00:14.0: @ffff88040bbf0054 (virt) @fffe9054 (dma) 0x000000 - rsvd[0]
>[    1.429533] xhci_hcd 0000:00:14.0: @ffff88040bbf0058 (virt) @fffe9058 (dma) 0x000000 - rsvd[1]
>[    1.429533] xhci_hcd 0000:00:14.0: @ffff88040bbf005c (virt) @fffe905c (dma) 0x000000 - rsvd[2]
>[    1.429534] xhci_hcd 0000:00:14.0: OUT Endpoint 01 Context (ep_index 01):
>[    1.429535] xhci_hcd 0000:00:14.0: @ffff88040bbf0060 (virt) @fffe9060 (dma) 0x000000 - ep_info
>[    1.429535] xhci_hcd 0000:00:14.0: @ffff88040bbf0064 (virt) @fffe9064 (dma) 0x000000 - ep_info2
>[    1.429536] xhci_hcd 0000:00:14.0: @ffff88040bbf0068 (virt) @fffe9068 (dma) 0x000000 - deq
>[    1.429537] xhci_hcd 0000:00:14.0: @ffff88040bbf0070 (virt) @fffe9070 (dma) 0x000000 - tx_info
>[    1.429537] xhci_hcd 0000:00:14.0: @ffff88040bbf0074 (virt) @fffe9074 (dma) 0x000000 - rsvd[0]
>[    1.429538] xhci_hcd 0000:00:14.0: @ffff88040bbf0078 (virt) @fffe9078 (dma) 0x000000 - rsvd[1]
>[    1.429539] xhci_hcd 0000:00:14.0: @ffff88040bbf007c (virt) @fffe907c (dma) 0x000000 - rsvd[2]
>[    1.429540] xhci_hcd 0000:00:14.0: IN Endpoint 01 Context (ep_index 02):
>[    1.429540] xhci_hcd 0000:00:14.0: @ffff88040bbf0080 (virt) @fffe9080 (dma) 0x0b0000 - ep_info
>[    1.429541] xhci_hcd 0000:00:14.0: @ffff88040bbf0084 (virt) @fffe9084 (dma) 0x01003e - ep_info2
>[    1.429542] xhci_hcd 0000:00:14.0: @ffff88040bbf0088 (virt) @fffe9088 (dma) 0xfffe8401 - deq
>[    1.429542] xhci_hcd 0000:00:14.0: @ffff88040bbf0090 (virt) @fffe9090 (dma) 0x010001 - tx_info
>[    1.429543] xhci_hcd 0000:00:14.0: @ffff88040bbf0094 (virt) @fffe9094 (dma) 0x000000 - rsvd[0]
>[    1.429544] xhci_hcd 0000:00:14.0: @ffff88040bbf0098 (virt) @fffe9098 (dma) 0x000000 - rsvd[1]
>[    1.429545] xhci_hcd 0000:00:14.0: @ffff88040bbf009c (virt) @fffe909c (dma) 0x000000 - rsvd[2]
>[    1.429546] xhci_hcd 0000:00:14.0: // Ding dong!
>[    1.429691] xhci_hcd 0000:00:14.0: Completed config ep cmd
>[    1.429704] xhci_hcd 0000:00:14.0: Successful Endpoint Configure command
>[    1.429705] xhci_hcd 0000:00:14.0: Output context after successful config ep cmd:
>[    1.429706] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.429707] xhci_hcd 0000:00:14.0: @ffff88040b866000 (virt) @fffea000 (dma) 0x18300000 - dev_info
>[    1.429707] xhci_hcd 0000:00:14.0: @ffff88040b866004 (virt) @fffea004 (dma) 0x0e0000 - dev_info2
>[    1.429708] xhci_hcd 0000:00:14.0: @ffff88040b866008 (virt) @fffea008 (dma) 0x000000 - tt_info
>[    1.429709] xhci_hcd 0000:00:14.0: @ffff88040b86600c (virt) @fffea00c (dma) 0x18000001 - dev_state
>[    1.429709] xhci_hcd 0000:00:14.0: @ffff88040b866010 (virt) @fffea010 (dma) 0x000000 - rsvd[0]
>[    1.429710] xhci_hcd 0000:00:14.0: @ffff88040b866014 (virt) @fffea014 (dma) 0x000000 - rsvd[1]
>[    1.429711] xhci_hcd 0000:00:14.0: @ffff88040b866018 (virt) @fffea018 (dma) 0x000000 - rsvd[2]
>[    1.429712] xhci_hcd 0000:00:14.0: @ffff88040b86601c (virt) @fffea01c (dma) 0x000000 - rsvd[3]
>[    1.429712] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.429713] xhci_hcd 0000:00:14.0: @ffff88040b866020 (virt) @fffea020 (dma) 0x000001 - ep_info
>[    1.429714] xhci_hcd 0000:00:14.0: @ffff88040b866024 (virt) @fffea024 (dma) 0x400026 - ep_info2
>[    1.429714] xhci_hcd 0000:00:14.0: @ffff88040b866028 (virt) @fffea028 (dma) 0xffffe801 - deq
>[    1.429715] xhci_hcd 0000:00:14.0: @ffff88040b866030 (virt) @fffea030 (dma) 0x000000 - tx_info
>[    1.429717] xhci_hcd 0000:00:14.0: @ffff88040b866034 (virt) @fffea034 (dma) 0x000000 - rsvd[0]
>[    1.429718] xhci_hcd 0000:00:14.0: @ffff88040b866038 (virt) @fffea038 (dma) 0x000000 - rsvd[1]
>[    1.429719] xhci_hcd 0000:00:14.0: @ffff88040b86603c (virt) @fffea03c (dma) 0x000000 - rsvd[2]
>[    1.429720] xhci_hcd 0000:00:14.0: OUT Endpoint 01 Context (ep_index 01):
>[    1.429721] xhci_hcd 0000:00:14.0: @ffff88040b866040 (virt) @fffea040 (dma) 0x000000 - ep_info
>[    1.429722] xhci_hcd 0000:00:14.0: @ffff88040b866044 (virt) @fffea044 (dma) 0x000000 - ep_info2
>[    1.429723] xhci_hcd 0000:00:14.0: @ffff88040b866048 (virt) @fffea048 (dma) 0x000000 - deq
>[    1.429724] xhci_hcd 0000:00:14.0: @ffff88040b866050 (virt) @fffea050 (dma) 0x000000 - tx_info
>[    1.429725] xhci_hcd 0000:00:14.0: @ffff88040b866054 (virt) @fffea054 (dma) 0x000000 - rsvd[0]
>[    1.429726] xhci_hcd 0000:00:14.0: @ffff88040b866058 (virt) @fffea058 (dma) 0x000000 - rsvd[1]
>[    1.429727] xhci_hcd 0000:00:14.0: @ffff88040b86605c (virt) @fffea05c (dma) 0x000000 - rsvd[2]
>[    1.429728] xhci_hcd 0000:00:14.0: IN Endpoint 01 Context (ep_index 02):
>[    1.429729] xhci_hcd 0000:00:14.0: @ffff88040b866060 (virt) @fffea060 (dma) 0x0b0001 - ep_info
>[    1.429730] xhci_hcd 0000:00:14.0: @ffff88040b866064 (virt) @fffea064 (dma) 0x01003e - ep_info2
>[    1.429731] xhci_hcd 0000:00:14.0: @ffff88040b866068 (virt) @fffea068 (dma) 0xfffe8401 - deq
>[    1.429732] xhci_hcd 0000:00:14.0: @ffff88040b866070 (virt) @fffea070 (dma) 0x010001 - tx_info
>[    1.429733] xhci_hcd 0000:00:14.0: @ffff88040b866074 (virt) @fffea074 (dma) 0x000000 - rsvd[0]
>[    1.429734] xhci_hcd 0000:00:14.0: @ffff88040b866078 (virt) @fffea078 (dma) 0x000000 - rsvd[1]
>[    1.429735] xhci_hcd 0000:00:14.0: @ffff88040b86607c (virt) @fffea07c (dma) 0x000000 - rsvd[2]
>[    1.429737] xhci_hcd 0000:00:14.0: Endpoint 0x81 not halted, refusing to reset.
>[    1.429960] usb 2-14: adding 2-14:1.0 (config #1, interface 0)
>[    1.430015] hub 2-14:1.0: usb_probe_interface
>[    1.430016] hub 2-14:1.0: usb_probe_interface - got id
>[    1.430018] hub 2-14:1.0: USB hub found
>[    1.430486] xhci_hcd 0000:00:14.0: Waiting for status stage event
>[    1.430493] hub 2-14:1.0: 2 ports detected
>[    1.430722] hub 2-14:1.0: standalone hub
>[    1.430723] hub 2-14:1.0: ganged power switching
>[    1.430725] hub 2-14:1.0: global over-current protection
>[    1.430727] xhci_hcd 0000:00:14.0: xhci_drop_endpoint called for udev ffff8800cac94800
>[    1.430730] xhci_hcd 0000:00:14.0: drop ep 0x81, slot id 1, new drop flags = 0x8, new add flags = 0x0, new slot info = 0x8300000
>[    1.430735] xhci_hcd 0000:00:14.0: add ep 0x81, slot id 1, new drop flags = 0x8, new add flags = 0x8, new slot info = 0x18300000
>[    1.430737] xhci_hcd 0000:00:14.0: xhci_check_bandwidth called for udev ffff8800cac94800
>[    1.430739] xhci_hcd 0000:00:14.0: New Input Control Context:
>[    1.430740] xhci_hcd 0000:00:14.0: @ffff88040bbf0000 (virt) @fffe9000 (dma) 0x000008 - drop flags
>[    1.430742] xhci_hcd 0000:00:14.0: @ffff88040bbf0004 (virt) @fffe9004 (dma) 0x000009 - add flags
>[    1.430743] xhci_hcd 0000:00:14.0: @ffff88040bbf0008 (virt) @fffe9008 (dma) 0x000000 - rsvd2[0]
>[    1.430744] xhci_hcd 0000:00:14.0: @ffff88040bbf000c (virt) @fffe900c (dma) 0x000000 - rsvd2[1]
>[    1.430745] xhci_hcd 0000:00:14.0: @ffff88040bbf0010 (virt) @fffe9010 (dma) 0x000000 - rsvd2[2]
>[    1.430746] xhci_hcd 0000:00:14.0: @ffff88040bbf0014 (virt) @fffe9014 (dma) 0x000000 - rsvd2[3]
>[    1.430748] xhci_hcd 0000:00:14.0: @ffff88040bbf0018 (virt) @fffe9018 (dma) 0x000000 - rsvd2[4]
>[    1.430749] xhci_hcd 0000:00:14.0: @ffff88040bbf001c (virt) @fffe901c (dma) 0x000000 - rsvd2[5]
>[    1.430750] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.430751] xhci_hcd 0000:00:14.0: @ffff88040bbf0020 (virt) @fffe9020 (dma) 0x18300000 - dev_info
>[    1.430752] xhci_hcd 0000:00:14.0: @ffff88040bbf0024 (virt) @fffe9024 (dma) 0x0e0000 - dev_info2
>[    1.430753] xhci_hcd 0000:00:14.0: @ffff88040bbf0028 (virt) @fffe9028 (dma) 0x000000 - tt_info
>[    1.430754] xhci_hcd 0000:00:14.0: @ffff88040bbf002c (virt) @fffe902c (dma) 0x000000 - dev_state
>[    1.430755] xhci_hcd 0000:00:14.0: @ffff88040bbf0030 (virt) @fffe9030 (dma) 0x000000 - rsvd[0]
>[    1.430756] xhci_hcd 0000:00:14.0: @ffff88040bbf0034 (virt) @fffe9034 (dma) 0x000000 - rsvd[1]
>[    1.430757] xhci_hcd 0000:00:14.0: @ffff88040bbf0038 (virt) @fffe9038 (dma) 0x000000 - rsvd[2]
>[    1.430759] xhci_hcd 0000:00:14.0: @ffff88040bbf003c (virt) @fffe903c (dma) 0x000000 - rsvd[3]
>[    1.430760] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.430761] xhci_hcd 0000:00:14.0: @ffff88040bbf0040 (virt) @fffe9040 (dma) 0x000000 - ep_info
>[    1.430762] xhci_hcd 0000:00:14.0: @ffff88040bbf0044 (virt) @fffe9044 (dma) 0x400026 - ep_info2
>[    1.430763] xhci_hcd 0000:00:14.0: @ffff88040bbf0048 (virt) @fffe9048 (dma) 0xffffe801 - deq
>[    1.430765] xhci_hcd 0000:00:14.0: @ffff88040bbf0050 (virt) @fffe9050 (dma) 0x000000 - tx_info
>[    1.430766] xhci_hcd 0000:00:14.0: @ffff88040bbf0054 (virt) @fffe9054 (dma) 0x000000 - rsvd[0]
>[    1.430767] xhci_hcd 0000:00:14.0: @ffff88040bbf0058 (virt) @fffe9058 (dma) 0x000000 - rsvd[1]
>[    1.430768] xhci_hcd 0000:00:14.0: @ffff88040bbf005c (virt) @fffe905c (dma) 0x000000 - rsvd[2]
>[    1.430769] xhci_hcd 0000:00:14.0: OUT Endpoint 01 Context (ep_index 01):
>[    1.430770] xhci_hcd 0000:00:14.0: @ffff88040bbf0060 (virt) @fffe9060 (dma) 0x000000 - ep_info
>[    1.430771] xhci_hcd 0000:00:14.0: @ffff88040bbf0064 (virt) @fffe9064 (dma) 0x000000 - ep_info2
>[    1.430772] xhci_hcd 0000:00:14.0: @ffff88040bbf0068 (virt) @fffe9068 (dma) 0x000000 - deq
>[    1.430773] xhci_hcd 0000:00:14.0: @ffff88040bbf0070 (virt) @fffe9070 (dma) 0x000000 - tx_info
>[    1.430774] xhci_hcd 0000:00:14.0: @ffff88040bbf0074 (virt) @fffe9074 (dma) 0x000000 - rsvd[0]
>[    1.430775] xhci_hcd 0000:00:14.0: @ffff88040bbf0078 (virt) @fffe9078 (dma) 0x000000 - rsvd[1]
>[    1.430777] xhci_hcd 0000:00:14.0: @ffff88040bbf007c (virt) @fffe907c (dma) 0x000000 - rsvd[2]
>[    1.430778] xhci_hcd 0000:00:14.0: IN Endpoint 01 Context (ep_index 02):
>[    1.430779] xhci_hcd 0000:00:14.0: @ffff88040bbf0080 (virt) @fffe9080 (dma) 0x0b0000 - ep_info
>[    1.430780] xhci_hcd 0000:00:14.0: @ffff88040bbf0084 (virt) @fffe9084 (dma) 0x01003e - ep_info2
>[    1.430781] xhci_hcd 0000:00:14.0: @ffff88040bbf0088 (virt) @fffe9088 (dma) 0xfffd8001 - deq
>[    1.430782] xhci_hcd 0000:00:14.0: @ffff88040bbf0090 (virt) @fffe9090 (dma) 0x010001 - tx_info
>[    1.430783] xhci_hcd 0000:00:14.0: @ffff88040bbf0094 (virt) @fffe9094 (dma) 0x000000 - rsvd[0]
>[    1.430784] xhci_hcd 0000:00:14.0: @ffff88040bbf0098 (virt) @fffe9098 (dma) 0x000000 - rsvd[1]
>[    1.430785] xhci_hcd 0000:00:14.0: @ffff88040bbf009c (virt) @fffe909c (dma) 0x000000 - rsvd[2]
>[    1.430786] xhci_hcd 0000:00:14.0: // Ding dong!
>[    1.430925] xhci_hcd 0000:00:14.0: Completed config ep cmd
>[    1.430929] xhci_hcd 0000:00:14.0: Successful Endpoint Configure command
>[    1.430931] xhci_hcd 0000:00:14.0: Output context after successful config ep cmd:
>[    1.430931] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.430933] xhci_hcd 0000:00:14.0: @ffff88040b866000 (virt) @fffea000 (dma) 0x18300000 - dev_info
>[    1.430934] xhci_hcd 0000:00:14.0: @ffff88040b866004 (virt) @fffea004 (dma) 0x0e0000 - dev_info2
>[    1.430935] xhci_hcd 0000:00:14.0: @ffff88040b866008 (virt) @fffea008 (dma) 0x000000 - tt_info
>[    1.430936] xhci_hcd 0000:00:14.0: @ffff88040b86600c (virt) @fffea00c (dma) 0x18000001 - dev_state
>[    1.430937] xhci_hcd 0000:00:14.0: @ffff88040b866010 (virt) @fffea010 (dma) 0x000000 - rsvd[0]
>[    1.430938] xhci_hcd 0000:00:14.0: @ffff88040b866014 (virt) @fffea014 (dma) 0x000000 - rsvd[1]
>[    1.430939] xhci_hcd 0000:00:14.0: @ffff88040b866018 (virt) @fffea018 (dma) 0x000000 - rsvd[2]
>[    1.430941] xhci_hcd 0000:00:14.0: @ffff88040b86601c (virt) @fffea01c (dma) 0x000000 - rsvd[3]
>[    1.430942] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.430943] xhci_hcd 0000:00:14.0: @ffff88040b866020 (virt) @fffea020 (dma) 0x000001 - ep_info
>[    1.430944] xhci_hcd 0000:00:14.0: @ffff88040b866024 (virt) @fffea024 (dma) 0x400026 - ep_info2
>[    1.430945] xhci_hcd 0000:00:14.0: @ffff88040b866028 (virt) @fffea028 (dma) 0xffffe801 - deq
>[    1.430946] xhci_hcd 0000:00:14.0: @ffff88040b866030 (virt) @fffea030 (dma) 0x000000 - tx_info
>[    1.430947] xhci_hcd 0000:00:14.0: @ffff88040b866034 (virt) @fffea034 (dma) 0x000000 - rsvd[0]
>[    1.430948] xhci_hcd 0000:00:14.0: @ffff88040b866038 (virt) @fffea038 (dma) 0x000000 - rsvd[1]
>[    1.430949] xhci_hcd 0000:00:14.0: @ffff88040b86603c (virt) @fffea03c (dma) 0x000000 - rsvd[2]
>[    1.430950] xhci_hcd 0000:00:14.0: OUT Endpoint 01 Context (ep_index 01):
>[    1.430951] xhci_hcd 0000:00:14.0: @ffff88040b866040 (virt) @fffea040 (dma) 0x000000 - ep_info
>[    1.430952] xhci_hcd 0000:00:14.0: @ffff88040b866044 (virt) @fffea044 (dma) 0x000000 - ep_info2
>[    1.430954] xhci_hcd 0000:00:14.0: @ffff88040b866048 (virt) @fffea048 (dma) 0x000000 - deq
>[    1.430955] xhci_hcd 0000:00:14.0: @ffff88040b866050 (virt) @fffea050 (dma) 0x000000 - tx_info
>[    1.430956] xhci_hcd 0000:00:14.0: @ffff88040b866054 (virt) @fffea054 (dma) 0x000000 - rsvd[0]
>[    1.430957] xhci_hcd 0000:00:14.0: @ffff88040b866058 (virt) @fffea058 (dma) 0x000000 - rsvd[1]
>[    1.430958] xhci_hcd 0000:00:14.0: @ffff88040b86605c (virt) @fffea05c (dma) 0x000000 - rsvd[2]
>[    1.430959] xhci_hcd 0000:00:14.0: IN Endpoint 01 Context (ep_index 02):
>[    1.430960] xhci_hcd 0000:00:14.0: @ffff88040b866060 (virt) @fffea060 (dma) 0x0b0001 - ep_info
>[    1.430961] xhci_hcd 0000:00:14.0: @ffff88040b866064 (virt) @fffea064 (dma) 0x01003e - ep_info2
>[    1.430962] xhci_hcd 0000:00:14.0: @ffff88040b866068 (virt) @fffea068 (dma) 0xfffd8001 - deq
>[    1.430963] xhci_hcd 0000:00:14.0: @ffff88040b866070 (virt) @fffea070 (dma) 0x010001 - tx_info
>[    1.430964] xhci_hcd 0000:00:14.0: @ffff88040b866074 (virt) @fffea074 (dma) 0x000000 - rsvd[0]
>[    1.430966] xhci_hcd 0000:00:14.0: @ffff88040b866078 (virt) @fffea078 (dma) 0x000000 - rsvd[1]
>[    1.430967] xhci_hcd 0000:00:14.0: @ffff88040b86607c (virt) @fffea07c (dma) 0x000000 - rsvd[2]
>[    1.430968] xhci_hcd 0000:00:14.0: Cached old ring, 1 ring cached
>[    1.431176] xhci_hcd 0000:00:14.0: Endpoint 0x81 not halted, refusing to reset.
>[    1.431185] hub 2-14:1.0: TT per port
>[    1.431186] hub 2-14:1.0: TT requires at most 32 FS bit times (2664 ns)
>[    1.431187] hub 2-14:1.0: Port indicators are supported
>[    1.431188] hub 2-14:1.0: power on to power good time: 100ms
>[    1.431272] xhci_hcd 0000:00:14.0: xHCI version 100 needs hub TT think time and number of ports
>[    1.431274] xhci_hcd 0000:00:14.0: Set up configure endpoint for hub device.
>[    1.431276] xhci_hcd 0000:00:14.0: Slot 1 Input Context:
>[    1.431283] xhci_hcd 0000:00:14.0: @ffff88040bfbf000 (virt) @fffd4000 (dma) 0x000000 - drop flags
>[    1.431285] xhci_hcd 0000:00:14.0: @ffff88040bfbf004 (virt) @fffd4004 (dma) 0x000001 - add flags
>[    1.431287] xhci_hcd 0000:00:14.0: @ffff88040bfbf008 (virt) @fffd4008 (dma) 0x000000 - rsvd2[0]
>[    1.431288] xhci_hcd 0000:00:14.0: @ffff88040bfbf00c (virt) @fffd400c (dma) 0x000000 - rsvd2[1]
>[    1.431290] xhci_hcd 0000:00:14.0: @ffff88040bfbf010 (virt) @fffd4010 (dma) 0x000000 - rsvd2[2]
>[    1.431293] xhci_hcd 0000:00:14.0: @ffff88040bfbf014 (virt) @fffd4014 (dma) 0x000000 - rsvd2[3]
>[    1.431295] xhci_hcd 0000:00:14.0: @ffff88040bfbf018 (virt) @fffd4018 (dma) 0x000000 - rsvd2[4]
>[    1.431296] xhci_hcd 0000:00:14.0: @ffff88040bfbf01c (virt) @fffd401c (dma) 0x000000 - rsvd2[5]
>[    1.431298] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.431300] xhci_hcd 0000:00:14.0: @ffff88040bfbf020 (virt) @fffd4020 (dma) 0x1e300000 - dev_info
>[    1.431302] xhci_hcd 0000:00:14.0: @ffff88040bfbf024 (virt) @fffd4024 (dma) 0x20e0000 - dev_info2
>[    1.431303] xhci_hcd 0000:00:14.0: @ffff88040bfbf028 (virt) @fffd4028 (dma) 0x030000 - tt_info
>[    1.431305] xhci_hcd 0000:00:14.0: @ffff88040bfbf02c (virt) @fffd402c (dma) 0x000000 - dev_state
>[    1.431307] xhci_hcd 0000:00:14.0: @ffff88040bfbf030 (virt) @fffd4030 (dma) 0x000000 - rsvd[0]
>[    1.431309] xhci_hcd 0000:00:14.0: @ffff88040bfbf034 (virt) @fffd4034 (dma) 0x000000 - rsvd[1]
>[    1.431311] xhci_hcd 0000:00:14.0: @ffff88040bfbf038 (virt) @fffd4038 (dma) 0x000000 - rsvd[2]
>[    1.431312] xhci_hcd 0000:00:14.0: @ffff88040bfbf03c (virt) @fffd403c (dma) 0x000000 - rsvd[3]
>[    1.431314] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.431316] xhci_hcd 0000:00:14.0: @ffff88040bfbf040 (virt) @fffd4040 (dma) 0x000000 - ep_info
>[    1.431318] xhci_hcd 0000:00:14.0: @ffff88040bfbf044 (virt) @fffd4044 (dma) 0x000000 - ep_info2
>[    1.431319] xhci_hcd 0000:00:14.0: @ffff88040bfbf048 (virt) @fffd4048 (dma) 0x000000 - deq
>[    1.431321] xhci_hcd 0000:00:14.0: @ffff88040bfbf050 (virt) @fffd4050 (dma) 0x000000 - tx_info
>[    1.431323] xhci_hcd 0000:00:14.0: @ffff88040bfbf054 (virt) @fffd4054 (dma) 0x000000 - rsvd[0]
>[    1.431325] xhci_hcd 0000:00:14.0: @ffff88040bfbf058 (virt) @fffd4058 (dma) 0x000000 - rsvd[1]
>[    1.431327] xhci_hcd 0000:00:14.0: @ffff88040bfbf05c (virt) @fffd405c (dma) 0x000000 - rsvd[2]
>[    1.431329] xhci_hcd 0000:00:14.0: // Ding dong!
>[    1.431470] xhci_hcd 0000:00:14.0: Successful Endpoint Configure command
>[    1.431472] xhci_hcd 0000:00:14.0: Slot 1 Output Context:
>[    1.431473] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.431474] xhci_hcd 0000:00:14.0: @ffff88040b866000 (virt) @fffea000 (dma) 0x1e300000 - dev_info
>[    1.431475] xhci_hcd 0000:00:14.0: @ffff88040b866004 (virt) @fffea004 (dma) 0x20e0000 - dev_info2
>[    1.431476] xhci_hcd 0000:00:14.0: @ffff88040b866008 (virt) @fffea008 (dma) 0x030000 - tt_info
>[    1.431477] xhci_hcd 0000:00:14.0: @ffff88040b86600c (virt) @fffea00c (dma) 0x18000001 - dev_state
>[    1.431478] xhci_hcd 0000:00:14.0: @ffff88040b866010 (virt) @fffea010 (dma) 0x000000 - rsvd[0]
>[    1.431479] xhci_hcd 0000:00:14.0: @ffff88040b866014 (virt) @fffea014 (dma) 0x000000 - rsvd[1]
>[    1.431480] xhci_hcd 0000:00:14.0: @ffff88040b866018 (virt) @fffea018 (dma) 0x000000 - rsvd[2]
>[    1.431481] xhci_hcd 0000:00:14.0: @ffff88040b86601c (virt) @fffea01c (dma) 0x000000 - rsvd[3]
>[    1.431482] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.431484] xhci_hcd 0000:00:14.0: @ffff88040b866020 (virt) @fffea020 (dma) 0x000001 - ep_info
>[    1.431485] xhci_hcd 0000:00:14.0: @ffff88040b866024 (virt) @fffea024 (dma) 0x400026 - ep_info2
>[    1.431486] xhci_hcd 0000:00:14.0: @ffff88040b866028 (virt) @fffea028 (dma) 0xffffe801 - deq
>[    1.431487] xhci_hcd 0000:00:14.0: @ffff88040b866030 (virt) @fffea030 (dma) 0x000000 - tx_info
>[    1.431488] xhci_hcd 0000:00:14.0: @ffff88040b866034 (virt) @fffea034 (dma) 0x000000 - rsvd[0]
>[    1.431489] xhci_hcd 0000:00:14.0: @ffff88040b866038 (virt) @fffea038 (dma) 0x000000 - rsvd[1]
>[    1.431490] xhci_hcd 0000:00:14.0: @ffff88040b86603c (virt) @fffea03c (dma) 0x000000 - rsvd[2]
>[    1.431745] hub 2-14:1.0: local power source is good
>[    1.431747] hub 2-14:1.0: no over-current condition exists
>[    1.431761] hub 2-14:1.0: enabling power on all ports
>[    1.432319] hub 3-0:1.0: state 7 ports 6 chg 0000 evt 0002
>[    1.432322] xhci_hcd 0000:00:14.0: get port status, actual port 0 status  = 0x21203
>[    1.432323] xhci_hcd 0000:00:14.0: Get port status returned 0x10203
>[    1.432350] xhci_hcd 0000:00:14.0: clear port connect change, actual port 0 status  = 0x1203
>[    1.432373] hub 3-0:1.0: port 1, status 0203, change 0001, 5.0 Gb/s
>[    1.432377] xhci_hcd 0000:00:14.0: get port status, actual port 0 status  = 0x1203
>[    1.432378] xhci_hcd 0000:00:14.0: Get port status returned 0x203
>[    1.458305] xhci_hcd 0000:00:14.0: get port status, actual port 0 status  = 0x1203
>[    1.458308] xhci_hcd 0000:00:14.0: Get port status returned 0x203
>[    1.478312] xhci_hcd 0000:00:14.0: xhci_hub_status_data: stopping port polling.
>[    1.478323] xhci_hcd 0000:00:14.0: xhci_hub_status_data: stopping port polling.
>[    1.484297] xhci_hcd 0000:00:14.0: get port status, actual port 0 status  = 0x1203
>[    1.484300] xhci_hcd 0000:00:14.0: Get port status returned 0x203
>[    1.510305] xhci_hcd 0000:00:14.0: get port status, actual port 0 status  = 0x1203
>[    1.510307] xhci_hcd 0000:00:14.0: Get port status returned 0x203
>[    1.532578] hub 2-14:1.0: port 1: status 0301 change 0001
>[    1.533089] hub 2-14:1.0: port 2: status 0301 change 0001
>[    1.536288] xhci_hcd 0000:00:14.0: get port status, actual port 0 status  = 0x1203
>[    1.536291] xhci_hcd 0000:00:14.0: Get port status returned 0x203
>[    1.536316] hub 3-0:1.0: debounce: port 1: total 100ms stable 100ms status 0x203
>[    1.536319] xhci_hcd 0000:00:14.0: // Ding dong!
>[    1.536338] xhci_hcd 0000:00:14.0: Slot 2 output ctx = 0xfffd4000 (dma)
>[    1.536344] xhci_hcd 0000:00:14.0: Slot 2 input ctx = 0xfffe1000 (dma)
>[    1.536349] xhci_hcd 0000:00:14.0: Set slot id 2 dcbaa entry ffff88040ba94010 to 0xfffd4000
>[    1.536355] xhci_hcd 0000:00:14.0: get port status, actual port 0 status  = 0x1203
>[    1.536357] xhci_hcd 0000:00:14.0: Get port status returned 0x203
>[    1.536382] xhci_hcd 0000:00:14.0: set port reset, actual port 0 status  = 0x1311
>[    1.536404] xhci_hcd 0000:00:14.0: Port Status Change Event for port 16
>[    1.536407] xhci_hcd 0000:00:14.0: handle_port_status: starting port polling.
>[    1.544868] systemd-udevd[1705]: starting version 208
>[    1.587292] xhci_hcd 0000:00:14.0: get port status, actual port 0 status  = 0x201203
>[    1.587296] xhci_hcd 0000:00:14.0: Get port status returned 0x100203
>[    1.594008] iTCO_vendor_support: vendor-support=0
>[    1.594663] iTCO_wdt: Intel TCO WatchDog Timer Driver v1.10
>[    1.594698] iTCO_wdt: Found a Lynx Point TCO device (Version=2, TCOBASE=0x1860)
>[    1.595053] iTCO_wdt: initialized. heartbeat=30 sec (nowayout=0)
>[    1.601822] ACPI Warning: 0x000000000000f000-0x000000000000f01f SystemIO conflicts with Region \_SB_.PCI0.SBUS.SMBI 1 (20130725/utaddress-251)
>[    1.601829] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
>[    1.605363] systemd-udevd[1725]: renamed network interface eth0 to enp5s0
>[    1.611352] systemd-udevd[1729]: renamed network interface eth1 to enp6s0
>[    1.638300] xhci_hcd 0000:00:14.0: clear port reset change, actual port 0 status  = 0x1203
>[    1.638313] xhci_hcd 0000:00:14.0: clear port warm(BH) reset change, actual port 0 status  = 0x1203
>[    1.638340] xhci_hcd 0000:00:14.0: clear port link state change, actual port 0 status  = 0x1203
>[    1.638367] xhci_hcd 0000:00:14.0: clear port connect change, actual port 0 status  = 0x1203
>[    1.638395] xhci_hcd 0000:00:14.0: get port status, actual port 0 status  = 0x1203
>[    1.638397] xhci_hcd 0000:00:14.0: Get port status returned 0x203
>[    1.638415] xhci_hcd 0000:00:14.0: Set root hub portnum to 16
>[    1.638417] xhci_hcd 0000:00:14.0: Set fake root hub portnum to 1
>[    1.638418] xhci_hcd 0000:00:14.0: udev->tt =           (null)
>[    1.638419] xhci_hcd 0000:00:14.0: udev->ttport = 0x0
>[    1.638421] xhci_hcd 0000:00:14.0: Slot ID 2 Input Context:
>[    1.638423] xhci_hcd 0000:00:14.0: @ffff8800ca42e000 (virt) @fffe1000 (dma) 0x000000 - drop flags
>[    1.638425] xhci_hcd 0000:00:14.0: @ffff8800ca42e004 (virt) @fffe1004 (dma) 0x000003 - add flags
>[    1.638426] xhci_hcd 0000:00:14.0: @ffff8800ca42e008 (virt) @fffe1008 (dma) 0x000000 - rsvd2[0]
>[    1.638427] xhci_hcd 0000:00:14.0: @ffff8800ca42e00c (virt) @fffe100c (dma) 0x000000 - rsvd2[1]
>[    1.638429] xhci_hcd 0000:00:14.0: @ffff8800ca42e010 (virt) @fffe1010 (dma) 0x000000 - rsvd2[2]
>[    1.638430] xhci_hcd 0000:00:14.0: @ffff8800ca42e014 (virt) @fffe1014 (dma) 0x000000 - rsvd2[3]
>[    1.638432] xhci_hcd 0000:00:14.0: @ffff8800ca42e018 (virt) @fffe1018 (dma) 0x000000 - rsvd2[4]
>[    1.638433] xhci_hcd 0000:00:14.0: @ffff8800ca42e01c (virt) @fffe101c (dma) 0x000000 - rsvd2[5]
>[    1.638434] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.638435] xhci_hcd 0000:00:14.0: @ffff8800ca42e020 (virt) @fffe1020 (dma) 0x8400000 - dev_info
>[    1.638437] xhci_hcd 0000:00:14.0: @ffff8800ca42e024 (virt) @fffe1024 (dma) 0x100000 - dev_info2
>[    1.638438] xhci_hcd 0000:00:14.0: @ffff8800ca42e028 (virt) @fffe1028 (dma) 0x000000 - tt_info
>[    1.638440] xhci_hcd 0000:00:14.0: @ffff8800ca42e02c (virt) @fffe102c (dma) 0x000000 - dev_state
>[    1.638441] xhci_hcd 0000:00:14.0: @ffff8800ca42e030 (virt) @fffe1030 (dma) 0x000000 - rsvd[0]
>[    1.638442] xhci_hcd 0000:00:14.0: @ffff8800ca42e034 (virt) @fffe1034 (dma) 0x000000 - rsvd[1]
>[    1.638444] xhci_hcd 0000:00:14.0: @ffff8800ca42e038 (virt) @fffe1038 (dma) 0x000000 - rsvd[2]
>[    1.638445] xhci_hcd 0000:00:14.0: @ffff8800ca42e03c (virt) @fffe103c (dma) 0x000000 - rsvd[3]
>[    1.638447] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.638448] xhci_hcd 0000:00:14.0: @ffff8800ca42e040 (virt) @fffe1040 (dma) 0x000000 - ep_info
>[    1.638450] xhci_hcd 0000:00:14.0: @ffff8800ca42e044 (virt) @fffe1044 (dma) 0x2000026 - ep_info2
>[    1.638451] xhci_hcd 0000:00:14.0: @ffff8800ca42e048 (virt) @fffe1048 (dma) 0xfffd8801 - deq
>[    1.638452] xhci_hcd 0000:00:14.0: @ffff8800ca42e050 (virt) @fffe1050 (dma) 0x000000 - tx_info
>[    1.638454] xhci_hcd 0000:00:14.0: @ffff8800ca42e054 (virt) @fffe1054 (dma) 0x000000 - rsvd[0]
>[    1.638455] xhci_hcd 0000:00:14.0: @ffff8800ca42e058 (virt) @fffe1058 (dma) 0x000000 - rsvd[1]
>[    1.638457] xhci_hcd 0000:00:14.0: @ffff8800ca42e05c (virt) @fffe105c (dma) 0x000000 - rsvd[2]
>[    1.638458] xhci_hcd 0000:00:14.0: OUT Endpoint 01 Context (ep_index 01):
>[    1.638459] xhci_hcd 0000:00:14.0: @ffff8800ca42e060 (virt) @fffe1060 (dma) 0x000000 - ep_info
>[    1.638461] xhci_hcd 0000:00:14.0: @ffff8800ca42e064 (virt) @fffe1064 (dma) 0x000000 - ep_info2
>[    1.638462] xhci_hcd 0000:00:14.0: @ffff8800ca42e068 (virt) @fffe1068 (dma) 0x000000 - deq
>[    1.638464] xhci_hcd 0000:00:14.0: @ffff8800ca42e070 (virt) @fffe1070 (dma) 0x000000 - tx_info
>[    1.638465] xhci_hcd 0000:00:14.0: @ffff8800ca42e074 (virt) @fffe1074 (dma) 0x000000 - rsvd[0]
>[    1.638466] xhci_hcd 0000:00:14.0: @ffff8800ca42e078 (virt) @fffe1078 (dma) 0x000000 - rsvd[1]
>[    1.638468] xhci_hcd 0000:00:14.0: @ffff8800ca42e07c (virt) @fffe107c (dma) 0x000000 - rsvd[2]
>[    1.638469] xhci_hcd 0000:00:14.0: IN Endpoint 01 Context (ep_index 02):
>[    1.638471] xhci_hcd 0000:00:14.0: @ffff8800ca42e080 (virt) @fffe1080 (dma) 0x000000 - ep_info
>[    1.638472] xhci_hcd 0000:00:14.0: @ffff8800ca42e084 (virt) @fffe1084 (dma) 0x000000 - ep_info2
>[    1.638473] xhci_hcd 0000:00:14.0: @ffff8800ca42e088 (virt) @fffe1088 (dma) 0x000000 - deq
>[    1.638475] xhci_hcd 0000:00:14.0: @ffff8800ca42e090 (virt) @fffe1090 (dma) 0x000000 - tx_info
>[    1.638476] xhci_hcd 0000:00:14.0: @ffff8800ca42e094 (virt) @fffe1094 (dma) 0x000000 - rsvd[0]
>[    1.638477] xhci_hcd 0000:00:14.0: @ffff8800ca42e098 (virt) @fffe1098 (dma) 0x000000 - rsvd[1]
>[    1.638479] xhci_hcd 0000:00:14.0: @ffff8800ca42e09c (virt) @fffe109c (dma) 0x000000 - rsvd[2]
>[    1.638480] xhci_hcd 0000:00:14.0: // Ding dong!
>[    1.638690] xhci_hcd 0000:00:14.0: Successful Address Device command
>[    1.638693] xhci_hcd 0000:00:14.0: Op regs DCBAA ptr = 0x000000fffff000
>[    1.638695] xhci_hcd 0000:00:14.0: Slot ID 2 dcbaa entry @ffff88040ba94010 = 0x000000fffd4000
>[    1.638696] xhci_hcd 0000:00:14.0: Output Context DMA address = 0xfffd4000
>[    1.638697] xhci_hcd 0000:00:14.0: Slot ID 2 Input Context:
>[    1.638699] xhci_hcd 0000:00:14.0: @ffff8800ca42e000 (virt) @fffe1000 (dma) 0x000000 - drop flags
>[    1.638700] xhci_hcd 0000:00:14.0: @ffff8800ca42e004 (virt) @fffe1004 (dma) 0x000003 - add flags
>[    1.638702] xhci_hcd 0000:00:14.0: @ffff8800ca42e008 (virt) @fffe1008 (dma) 0x000000 - rsvd2[0]
>[    1.638703] xhci_hcd 0000:00:14.0: @ffff8800ca42e00c (virt) @fffe100c (dma) 0x000000 - rsvd2[1]
>[    1.638704] xhci_hcd 0000:00:14.0: @ffff8800ca42e010 (virt) @fffe1010 (dma) 0x000000 - rsvd2[2]
>[    1.638706] xhci_hcd 0000:00:14.0: @ffff8800ca42e014 (virt) @fffe1014 (dma) 0x000000 - rsvd2[3]
>[    1.638707] xhci_hcd 0000:00:14.0: @ffff8800ca42e018 (virt) @fffe1018 (dma) 0x000000 - rsvd2[4]
>[    1.638709] xhci_hcd 0000:00:14.0: @ffff8800ca42e01c (virt) @fffe101c (dma) 0x000000 - rsvd2[5]
>[    1.638710] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.638711] xhci_hcd 0000:00:14.0: @ffff8800ca42e020 (virt) @fffe1020 (dma) 0x8400000 - dev_info
>[    1.638713] xhci_hcd 0000:00:14.0: @ffff8800ca42e024 (virt) @fffe1024 (dma) 0x100000 - dev_info2
>[    1.638714] xhci_hcd 0000:00:14.0: @ffff8800ca42e028 (virt) @fffe1028 (dma) 0x000000 - tt_info
>[    1.638716] xhci_hcd 0000:00:14.0: @ffff8800ca42e02c (virt) @fffe102c (dma) 0x000000 - dev_state
>[    1.638717] xhci_hcd 0000:00:14.0: @ffff8800ca42e030 (virt) @fffe1030 (dma) 0x000000 - rsvd[0]
>[    1.638718] xhci_hcd 0000:00:14.0: @ffff8800ca42e034 (virt) @fffe1034 (dma) 0x000000 - rsvd[1]
>[    1.638720] xhci_hcd 0000:00:14.0: @ffff8800ca42e038 (virt) @fffe1038 (dma) 0x000000 - rsvd[2]
>[    1.638721] xhci_hcd 0000:00:14.0: @ffff8800ca42e03c (virt) @fffe103c (dma) 0x000000 - rsvd[3]
>[    1.638722] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.638724] xhci_hcd 0000:00:14.0: @ffff8800ca42e040 (virt) @fffe1040 (dma) 0x000000 - ep_info
>[    1.638725] xhci_hcd 0000:00:14.0: @ffff8800ca42e044 (virt) @fffe1044 (dma) 0x2000026 - ep_info2
>[    1.638726] xhci_hcd 0000:00:14.0: @ffff8800ca42e048 (virt) @fffe1048 (dma) 0xfffd8801 - deq
>[    1.638728] xhci_hcd 0000:00:14.0: @ffff8800ca42e050 (virt) @fffe1050 (dma) 0x000000 - tx_info
>[    1.638729] xhci_hcd 0000:00:14.0: @ffff8800ca42e054 (virt) @fffe1054 (dma) 0x000000 - rsvd[0]
>[    1.638731] xhci_hcd 0000:00:14.0: @ffff8800ca42e058 (virt) @fffe1058 (dma) 0x000000 - rsvd[1]
>[    1.638732] xhci_hcd 0000:00:14.0: @ffff8800ca42e05c (virt) @fffe105c (dma) 0x000000 - rsvd[2]
>[    1.638733] xhci_hcd 0000:00:14.0: OUT Endpoint 01 Context (ep_index 01):
>[    1.638735] xhci_hcd 0000:00:14.0: @ffff8800ca42e060 (virt) @fffe1060 (dma) 0x000000 - ep_info
>[    1.638736] xhci_hcd 0000:00:14.0: @ffff8800ca42e064 (virt) @fffe1064 (dma) 0x000000 - ep_info2
>[    1.638737] xhci_hcd 0000:00:14.0: @ffff8800ca42e068 (virt) @fffe1068 (dma) 0x000000 - deq
>[    1.638739] xhci_hcd 0000:00:14.0: @ffff8800ca42e070 (virt) @fffe1070 (dma) 0x000000 - tx_info
>[    1.638740] xhci_hcd 0000:00:14.0: @ffff8800ca42e074 (virt) @fffe1074 (dma) 0x000000 - rsvd[0]
>[    1.638741] xhci_hcd 0000:00:14.0: @ffff8800ca42e078 (virt) @fffe1078 (dma) 0x000000 - rsvd[1]
>[    1.638743] xhci_hcd 0000:00:14.0: @ffff8800ca42e07c (virt) @fffe107c (dma) 0x000000 - rsvd[2]
>[    1.638744] xhci_hcd 0000:00:14.0: IN Endpoint 01 Context (ep_index 02):
>[    1.638745] xhci_hcd 0000:00:14.0: @ffff8800ca42e080 (virt) @fffe1080 (dma) 0x000000 - ep_info
>[    1.638747] xhci_hcd 0000:00:14.0: @ffff8800ca42e084 (virt) @fffe1084 (dma) 0x000000 - ep_info2
>[    1.638748] xhci_hcd 0000:00:14.0: @ffff8800ca42e088 (virt) @fffe1088 (dma) 0x000000 - deq
>[    1.638750] xhci_hcd 0000:00:14.0: @ffff8800ca42e090 (virt) @fffe1090 (dma) 0x000000 - tx_info
>[    1.638751] xhci_hcd 0000:00:14.0: @ffff8800ca42e094 (virt) @fffe1094 (dma) 0x000000 - rsvd[0]
>[    1.638752] xhci_hcd 0000:00:14.0: @ffff8800ca42e098 (virt) @fffe1098 (dma) 0x000000 - rsvd[1]
>[    1.638754] xhci_hcd 0000:00:14.0: @ffff8800ca42e09c (virt) @fffe109c (dma) 0x000000 - rsvd[2]
>[    1.638755] xhci_hcd 0000:00:14.0: Slot ID 2 Output Context:
>[    1.638756] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.638758] xhci_hcd 0000:00:14.0: @ffff88040bfbf000 (virt) @fffd4000 (dma) 0x8400000 - dev_info
>[    1.638759] xhci_hcd 0000:00:14.0: @ffff88040bfbf004 (virt) @fffd4004 (dma) 0x100000 - dev_info2
>[    1.638760] xhci_hcd 0000:00:14.0: @ffff88040bfbf008 (virt) @fffd4008 (dma) 0x000000 - tt_info
>[    1.638762] xhci_hcd 0000:00:14.0: @ffff88040bfbf00c (virt) @fffd400c (dma) 0x10000002 - dev_state
>[    1.638763] xhci_hcd 0000:00:14.0: @ffff88040bfbf010 (virt) @fffd4010 (dma) 0x000000 - rsvd[0]
>[    1.638765] xhci_hcd 0000:00:14.0: @ffff88040bfbf014 (virt) @fffd4014 (dma) 0x000000 - rsvd[1]
>[    1.638766] xhci_hcd 0000:00:14.0: @ffff88040bfbf018 (virt) @fffd4018 (dma) 0x000000 - rsvd[2]
>[    1.638767] xhci_hcd 0000:00:14.0: @ffff88040bfbf01c (virt) @fffd401c (dma) 0x000000 - rsvd[3]
>[    1.638769] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.638770] xhci_hcd 0000:00:14.0: @ffff88040bfbf020 (virt) @fffd4020 (dma) 0x000001 - ep_info
>[    1.638771] xhci_hcd 0000:00:14.0: @ffff88040bfbf024 (virt) @fffd4024 (dma) 0x2000026 - ep_info2
>[    1.638773] xhci_hcd 0000:00:14.0: @ffff88040bfbf028 (virt) @fffd4028 (dma) 0xfffd8801 - deq
>[    1.638774] xhci_hcd 0000:00:14.0: @ffff88040bfbf030 (virt) @fffd4030 (dma) 0x000000 - tx_info
>[    1.638775] xhci_hcd 0000:00:14.0: @ffff88040bfbf034 (virt) @fffd4034 (dma) 0x000000 - rsvd[0]
>[    1.638777] xhci_hcd 0000:00:14.0: @ffff88040bfbf038 (virt) @fffd4038 (dma) 0x000000 - rsvd[1]
>[    1.638778] xhci_hcd 0000:00:14.0: @ffff88040bfbf03c (virt) @fffd403c (dma) 0x000000 - rsvd[2]
>[    1.638779] xhci_hcd 0000:00:14.0: OUT Endpoint 01 Context (ep_index 01):
>[    1.638781] xhci_hcd 0000:00:14.0: @ffff88040bfbf040 (virt) @fffd4040 (dma) 0x000000 - ep_info
>[    1.638782] xhci_hcd 0000:00:14.0: @ffff88040bfbf044 (virt) @fffd4044 (dma) 0x000000 - ep_info2
>[    1.638784] xhci_hcd 0000:00:14.0: @ffff88040bfbf048 (virt) @fffd4048 (dma) 0x000000 - deq
>[    1.638785] xhci_hcd 0000:00:14.0: @ffff88040bfbf050 (virt) @fffd4050 (dma) 0x000000 - tx_info
>[    1.638786] xhci_hcd 0000:00:14.0: @ffff88040bfbf054 (virt) @fffd4054 (dma) 0x000000 - rsvd[0]
>[    1.638788] xhci_hcd 0000:00:14.0: @ffff88040bfbf058 (virt) @fffd4058 (dma) 0x000000 - rsvd[1]
>[    1.638789] xhci_hcd 0000:00:14.0: @ffff88040bfbf05c (virt) @fffd405c (dma) 0x000000 - rsvd[2]
>[    1.638790] xhci_hcd 0000:00:14.0: IN Endpoint 01 Context (ep_index 02):
>[    1.638792] xhci_hcd 0000:00:14.0: @ffff88040bfbf060 (virt) @fffd4060 (dma) 0x000000 - ep_info
>[    1.638793] xhci_hcd 0000:00:14.0: @ffff88040bfbf064 (virt) @fffd4064 (dma) 0x000000 - ep_info2
>[    1.638794] xhci_hcd 0000:00:14.0: @ffff88040bfbf068 (virt) @fffd4068 (dma) 0x000000 - deq
>[    1.638796] xhci_hcd 0000:00:14.0: @ffff88040bfbf070 (virt) @fffd4070 (dma) 0x000000 - tx_info
>[    1.638797] xhci_hcd 0000:00:14.0: @ffff88040bfbf074 (virt) @fffd4074 (dma) 0x000000 - rsvd[0]
>[    1.638799] xhci_hcd 0000:00:14.0: @ffff88040bfbf078 (virt) @fffd4078 (dma) 0x000000 - rsvd[1]
>[    1.638800] xhci_hcd 0000:00:14.0: @ffff88040bfbf07c (virt) @fffd407c (dma) 0x000000 - rsvd[2]
>[    1.638802] xhci_hcd 0000:00:14.0: Internal device address = 3
>[    1.638805] usb 3-1: new SuperSpeed USB device number 2 using xhci_hcd
>[    1.650920] usb 3-1: skipped 1 descriptor after endpoint
>[    1.650923] usb 3-1: skipped 1 descriptor after endpoint
>[    1.651106] xhci_hcd 0000:00:14.0: Waiting for status stage event
>[    1.651114] usb 3-1: default language 0x0409
>[    1.651380] xhci_hcd 0000:00:14.0: Waiting for status stage event
>[    1.651663] xhci_hcd 0000:00:14.0: Waiting for status stage event
>[    1.651671] usb 3-1: udev 2, busnum 3, minor = 257
>[    1.651673] usb 3-1: New USB device found, idVendor=05e3, idProduct=0738
>[    1.651674] usb 3-1: New USB device strings: Mfr=0, Product=1, SerialNumber=2
>[    1.651676] usb 3-1: Product: USB Storage
>[    1.651677] usb 3-1: SerialNumber: 000000000556
>[    1.651754] usb 3-1: usb_probe_device
>[    1.651756] usb 3-1: configuration #1 chosen from 1 choice
>[    1.651761] xhci_hcd 0000:00:14.0: add ep 0x81, slot id 2, new drop flags = 0x0, new add flags = 0x8, new slot info = 0x18400000
>[    1.651765] xhci_hcd 0000:00:14.0: add ep 0x2, slot id 2, new drop flags = 0x0, new add flags = 0x18, new slot info = 0x20400000
>[    1.651767] xhci_hcd 0000:00:14.0: xhci_check_bandwidth called for udev ffff88040b525800
>[    1.651768] xhci_hcd 0000:00:14.0: New Input Control Context:
>[    1.651770] xhci_hcd 0000:00:14.0: @ffff8800ca42e000 (virt) @fffe1000 (dma) 0x000000 - drop flags
>[    1.651772] xhci_hcd 0000:00:14.0: @ffff8800ca42e004 (virt) @fffe1004 (dma) 0x000019 - add flags
>[    1.651773] xhci_hcd 0000:00:14.0: @ffff8800ca42e008 (virt) @fffe1008 (dma) 0x000000 - rsvd2[0]
>[    1.651775] xhci_hcd 0000:00:14.0: @ffff8800ca42e00c (virt) @fffe100c (dma) 0x000000 - rsvd2[1]
>[    1.651776] xhci_hcd 0000:00:14.0: @ffff8800ca42e010 (virt) @fffe1010 (dma) 0x000000 - rsvd2[2]
>[    1.651777] xhci_hcd 0000:00:14.0: @ffff8800ca42e014 (virt) @fffe1014 (dma) 0x000000 - rsvd2[3]
>[    1.651779] xhci_hcd 0000:00:14.0: @ffff8800ca42e018 (virt) @fffe1018 (dma) 0x000000 - rsvd2[4]
>[    1.651780] xhci_hcd 0000:00:14.0: @ffff8800ca42e01c (virt) @fffe101c (dma) 0x000000 - rsvd2[5]
>[    1.651781] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.651783] xhci_hcd 0000:00:14.0: @ffff8800ca42e020 (virt) @fffe1020 (dma) 0x20400000 - dev_info
>[    1.651784] xhci_hcd 0000:00:14.0: @ffff8800ca42e024 (virt) @fffe1024 (dma) 0x100000 - dev_info2
>[    1.651786] xhci_hcd 0000:00:14.0: @ffff8800ca42e028 (virt) @fffe1028 (dma) 0x000000 - tt_info
>[    1.651787] xhci_hcd 0000:00:14.0: @ffff8800ca42e02c (virt) @fffe102c (dma) 0x000000 - dev_state
>[    1.651789] xhci_hcd 0000:00:14.0: @ffff8800ca42e030 (virt) @fffe1030 (dma) 0x000000 - rsvd[0]
>[    1.651790] xhci_hcd 0000:00:14.0: @ffff8800ca42e034 (virt) @fffe1034 (dma) 0x000000 - rsvd[1]
>[    1.651792] xhci_hcd 0000:00:14.0: @ffff8800ca42e038 (virt) @fffe1038 (dma) 0x000000 - rsvd[2]
>[    1.651793] xhci_hcd 0000:00:14.0: @ffff8800ca42e03c (virt) @fffe103c (dma) 0x000000 - rsvd[3]
>[    1.651794] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.651796] xhci_hcd 0000:00:14.0: @ffff8800ca42e040 (virt) @fffe1040 (dma) 0x000000 - ep_info
>[    1.651797] xhci_hcd 0000:00:14.0: @ffff8800ca42e044 (virt) @fffe1044 (dma) 0x2000026 - ep_info2
>[    1.651799] xhci_hcd 0000:00:14.0: @ffff8800ca42e048 (virt) @fffe1048 (dma) 0xfffd8801 - deq
>[    1.651800] xhci_hcd 0000:00:14.0: @ffff8800ca42e050 (virt) @fffe1050 (dma) 0x000000 - tx_info
>[    1.651801] xhci_hcd 0000:00:14.0: @ffff8800ca42e054 (virt) @fffe1054 (dma) 0x000000 - rsvd[0]
>[    1.651803] xhci_hcd 0000:00:14.0: @ffff8800ca42e058 (virt) @fffe1058 (dma) 0x000000 - rsvd[1]
>[    1.651804] xhci_hcd 0000:00:14.0: @ffff8800ca42e05c (virt) @fffe105c (dma) 0x000000 - rsvd[2]
>[    1.651806] xhci_hcd 0000:00:14.0: OUT Endpoint 01 Context (ep_index 01):
>[    1.651807] xhci_hcd 0000:00:14.0: @ffff8800ca42e060 (virt) @fffe1060 (dma) 0x000000 - ep_info
>[    1.651808] xhci_hcd 0000:00:14.0: @ffff8800ca42e064 (virt) @fffe1064 (dma) 0x000000 - ep_info2
>[    1.651810] xhci_hcd 0000:00:14.0: @ffff8800ca42e068 (virt) @fffe1068 (dma) 0x000000 - deq
>[    1.651811] xhci_hcd 0000:00:14.0: @ffff8800ca42e070 (virt) @fffe1070 (dma) 0x000000 - tx_info
>[    1.651812] xhci_hcd 0000:00:14.0: @ffff8800ca42e074 (virt) @fffe1074 (dma) 0x000000 - rsvd[0]
>[    1.651814] xhci_hcd 0000:00:14.0: @ffff8800ca42e078 (virt) @fffe1078 (dma) 0x000000 - rsvd[1]
>[    1.651815] xhci_hcd 0000:00:14.0: @ffff8800ca42e07c (virt) @fffe107c (dma) 0x000000 - rsvd[2]
>[    1.651817] xhci_hcd 0000:00:14.0: IN Endpoint 01 Context (ep_index 02):
>[    1.651818] xhci_hcd 0000:00:14.0: @ffff8800ca42e080 (virt) @fffe1080 (dma) 0x000000 - ep_info
>[    1.651819] xhci_hcd 0000:00:14.0: @ffff8800ca42e084 (virt) @fffe1084 (dma) 0x4000436 - ep_info2
>[    1.651821] xhci_hcd 0000:00:14.0: @ffff8800ca42e088 (virt) @fffe1088 (dma) 0xfffe0401 - deq
>[    1.651822] xhci_hcd 0000:00:14.0: @ffff8800ca42e090 (virt) @fffe1090 (dma) 0x000000 - tx_info
>[    1.651823] xhci_hcd 0000:00:14.0: @ffff8800ca42e094 (virt) @fffe1094 (dma) 0x000000 - rsvd[0]
>[    1.651825] xhci_hcd 0000:00:14.0: @ffff8800ca42e098 (virt) @fffe1098 (dma) 0x000000 - rsvd[1]
>[    1.651826] xhci_hcd 0000:00:14.0: @ffff8800ca42e09c (virt) @fffe109c (dma) 0x000000 - rsvd[2]
>[    1.651828] xhci_hcd 0000:00:14.0: OUT Endpoint 02 Context (ep_index 03):
>[    1.651829] xhci_hcd 0000:00:14.0: @ffff8800ca42e0a0 (virt) @fffe10a0 (dma) 0x000000 - ep_info
>[    1.651830] xhci_hcd 0000:00:14.0: @ffff8800ca42e0a4 (virt) @fffe10a4 (dma) 0x4000416 - ep_info2
>[    1.651832] xhci_hcd 0000:00:14.0: @ffff8800ca42e0a8 (virt) @fffe10a8 (dma) 0xfffd0001 - deq
>[    1.651833] xhci_hcd 0000:00:14.0: @ffff8800ca42e0b0 (virt) @fffe10b0 (dma) 0x000000 - tx_info
>[    1.651835] xhci_hcd 0000:00:14.0: @ffff8800ca42e0b4 (virt) @fffe10b4 (dma) 0x000000 - rsvd[0]
>[    1.651836] xhci_hcd 0000:00:14.0: @ffff8800ca42e0b8 (virt) @fffe10b8 (dma) 0x000000 - rsvd[1]
>[    1.651837] xhci_hcd 0000:00:14.0: @ffff8800ca42e0bc (virt) @fffe10bc (dma) 0x000000 - rsvd[2]
>[    1.651839] xhci_hcd 0000:00:14.0: // Ding dong!
>[    1.651998] xhci_hcd 0000:00:14.0: Completed config ep cmd
>[    1.652004] xhci_hcd 0000:00:14.0: Successful Endpoint Configure command
>[    1.652005] xhci_hcd 0000:00:14.0: Output context after successful config ep cmd:
>[    1.652006] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.652008] xhci_hcd 0000:00:14.0: @ffff88040bfbf000 (virt) @fffd4000 (dma) 0x20400000 - dev_info
>[    1.652009] xhci_hcd 0000:00:14.0: @ffff88040bfbf004 (virt) @fffd4004 (dma) 0x100000 - dev_info2
>[    1.652011] xhci_hcd 0000:00:14.0: @ffff88040bfbf008 (virt) @fffd4008 (dma) 0x000000 - tt_info
>[    1.652012] xhci_hcd 0000:00:14.0: @ffff88040bfbf00c (virt) @fffd400c (dma) 0x18000002 - dev_state
>[    1.652013] xhci_hcd 0000:00:14.0: @ffff88040bfbf010 (virt) @fffd4010 (dma) 0x000000 - rsvd[0]
>[    1.652015] xhci_hcd 0000:00:14.0: @ffff88040bfbf014 (virt) @fffd4014 (dma) 0x000000 - rsvd[1]
>[    1.652016] xhci_hcd 0000:00:14.0: @ffff88040bfbf018 (virt) @fffd4018 (dma) 0x000000 - rsvd[2]
>[    1.652018] xhci_hcd 0000:00:14.0: @ffff88040bfbf01c (virt) @fffd401c (dma) 0x000000 - rsvd[3]
>[    1.652019] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.652020] xhci_hcd 0000:00:14.0: @ffff88040bfbf020 (virt) @fffd4020 (dma) 0x000001 - ep_info
>[    1.652022] xhci_hcd 0000:00:14.0: @ffff88040bfbf024 (virt) @fffd4024 (dma) 0x2000026 - ep_info2
>[    1.652023] xhci_hcd 0000:00:14.0: @ffff88040bfbf028 (virt) @fffd4028 (dma) 0xfffd8801 - deq
>[    1.652024] xhci_hcd 0000:00:14.0: @ffff88040bfbf030 (virt) @fffd4030 (dma) 0x000000 - tx_info
>[    1.652026] xhci_hcd 0000:00:14.0: @ffff88040bfbf034 (virt) @fffd4034 (dma) 0x000000 - rsvd[0]
>[    1.652027] xhci_hcd 0000:00:14.0: @ffff88040bfbf038 (virt) @fffd4038 (dma) 0x000000 - rsvd[1]
>[    1.652029] xhci_hcd 0000:00:14.0: @ffff88040bfbf03c (virt) @fffd403c (dma) 0x000000 - rsvd[2]
>[    1.652030] xhci_hcd 0000:00:14.0: OUT Endpoint 01 Context (ep_index 01):
>[    1.652031] xhci_hcd 0000:00:14.0: @ffff88040bfbf040 (virt) @fffd4040 (dma) 0x000000 - ep_info
>[    1.652033] xhci_hcd 0000:00:14.0: @ffff88040bfbf044 (virt) @fffd4044 (dma) 0x000000 - ep_info2
>[    1.652034] xhci_hcd 0000:00:14.0: @ffff88040bfbf048 (virt) @fffd4048 (dma) 0x000000 - deq
>[    1.652036] xhci_hcd 0000:00:14.0: @ffff88040bfbf050 (virt) @fffd4050 (dma) 0x000000 - tx_info
>[    1.652037] xhci_hcd 0000:00:14.0: @ffff88040bfbf054 (virt) @fffd4054 (dma) 0x000000 - rsvd[0]
>[    1.652039] xhci_hcd 0000:00:14.0: @ffff88040bfbf058 (virt) @fffd4058 (dma) 0x000000 - rsvd[1]
>[    1.652040] xhci_hcd 0000:00:14.0: @ffff88040bfbf05c (virt) @fffd405c (dma) 0x000000 - rsvd[2]
>[    1.652041] xhci_hcd 0000:00:14.0: IN Endpoint 01 Context (ep_index 02):
>[    1.652043] xhci_hcd 0000:00:14.0: @ffff88040bfbf060 (virt) @fffd4060 (dma) 0x000001 - ep_info
>[    1.652044] xhci_hcd 0000:00:14.0: @ffff88040bfbf064 (virt) @fffd4064 (dma) 0x4000436 - ep_info2
>[    1.652045] xhci_hcd 0000:00:14.0: @ffff88040bfbf068 (virt) @fffd4068 (dma) 0xfffe0401 - deq
>[    1.652047] xhci_hcd 0000:00:14.0: @ffff88040bfbf070 (virt) @fffd4070 (dma) 0x000000 - tx_info
>[    1.652048] xhci_hcd 0000:00:14.0: @ffff88040bfbf074 (virt) @fffd4074 (dma) 0x000000 - rsvd[0]
>[    1.652049] xhci_hcd 0000:00:14.0: @ffff88040bfbf078 (virt) @fffd4078 (dma) 0x000000 - rsvd[1]
>[    1.652051] xhci_hcd 0000:00:14.0: @ffff88040bfbf07c (virt) @fffd407c (dma) 0x000000 - rsvd[2]
>[    1.652052] xhci_hcd 0000:00:14.0: OUT Endpoint 02 Context (ep_index 03):
>[    1.652053] xhci_hcd 0000:00:14.0: @ffff88040bfbf080 (virt) @fffd4080 (dma) 0x000001 - ep_info
>[    1.652055] xhci_hcd 0000:00:14.0: @ffff88040bfbf084 (virt) @fffd4084 (dma) 0x4000416 - ep_info2
>[    1.652056] xhci_hcd 0000:00:14.0: @ffff88040bfbf088 (virt) @fffd4088 (dma) 0xfffd0001 - deq
>[    1.652057] xhci_hcd 0000:00:14.0: @ffff88040bfbf090 (virt) @fffd4090 (dma) 0x000000 - tx_info
>[    1.652059] xhci_hcd 0000:00:14.0: @ffff88040bfbf094 (virt) @fffd4094 (dma) 0x000000 - rsvd[0]
>[    1.652060] xhci_hcd 0000:00:14.0: @ffff88040bfbf098 (virt) @fffd4098 (dma) 0x000000 - rsvd[1]
>[    1.652062] xhci_hcd 0000:00:14.0: @ffff88040bfbf09c (virt) @fffd409c (dma) 0x000000 - rsvd[2]
>[    1.652065] xhci_hcd 0000:00:14.0: Endpoint 0x81 not halted, refusing to reset.
>[    1.652067] xhci_hcd 0000:00:14.0: Endpoint 0x2 not halted, refusing to reset.
>[    1.652559] xhci_hcd 0000:00:14.0: Set up evaluate context for LPM MEL change.
>[    1.652561] xhci_hcd 0000:00:14.0: Slot 2 Input Context:
>[    1.652562] xhci_hcd 0000:00:14.0: @ffff88040ba97000 (virt) @ffffd000 (dma) 0x000000 - drop flags
>[    1.652564] xhci_hcd 0000:00:14.0: @ffff88040ba97004 (virt) @ffffd004 (dma) 0x000001 - add flags
>[    1.652565] xhci_hcd 0000:00:14.0: @ffff88040ba97008 (virt) @ffffd008 (dma) 0x000000 - rsvd2[0]
>[    1.652566] xhci_hcd 0000:00:14.0: @ffff88040ba9700c (virt) @ffffd00c (dma) 0x000000 - rsvd2[1]
>[    1.652568] xhci_hcd 0000:00:14.0: @ffff88040ba97010 (virt) @ffffd010 (dma) 0x000000 - rsvd2[2]
>[    1.652569] xhci_hcd 0000:00:14.0: @ffff88040ba97014 (virt) @ffffd014 (dma) 0x000000 - rsvd2[3]
>[    1.652571] xhci_hcd 0000:00:14.0: @ffff88040ba97018 (virt) @ffffd018 (dma) 0x000000 - rsvd2[4]
>[    1.652572] xhci_hcd 0000:00:14.0: @ffff88040ba9701c (virt) @ffffd01c (dma) 0x000000 - rsvd2[5]
>[    1.652573] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.652575] xhci_hcd 0000:00:14.0: @ffff88040ba97020 (virt) @ffffd020 (dma) 0x20400000 - dev_info
>[    1.652576] xhci_hcd 0000:00:14.0: @ffff88040ba97024 (virt) @ffffd024 (dma) 0x10000a - dev_info2
>[    1.652578] xhci_hcd 0000:00:14.0: @ffff88040ba97028 (virt) @ffffd028 (dma) 0x000000 - tt_info
>[    1.652579] xhci_hcd 0000:00:14.0: @ffff88040ba9702c (virt) @ffffd02c (dma) 0x18000002 - dev_state
>[    1.652580] xhci_hcd 0000:00:14.0: @ffff88040ba97030 (virt) @ffffd030 (dma) 0x000000 - rsvd[0]
>[    1.652582] xhci_hcd 0000:00:14.0: @ffff88040ba97034 (virt) @ffffd034 (dma) 0x000000 - rsvd[1]
>[    1.652583] xhci_hcd 0000:00:14.0: @ffff88040ba97038 (virt) @ffffd038 (dma) 0x000000 - rsvd[2]
>[    1.652584] xhci_hcd 0000:00:14.0: @ffff88040ba9703c (virt) @ffffd03c (dma) 0x000000 - rsvd[3]
>[    1.652586] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.652587] xhci_hcd 0000:00:14.0: @ffff88040ba97040 (virt) @ffffd040 (dma) 0x000000 - ep_info
>[    1.652589] xhci_hcd 0000:00:14.0: @ffff88040ba97044 (virt) @ffffd044 (dma) 0x000000 - ep_info2
>[    1.652590] xhci_hcd 0000:00:14.0: @ffff88040ba97048 (virt) @ffffd048 (dma) 0x000000 - deq
>[    1.652591] xhci_hcd 0000:00:14.0: @ffff88040ba97050 (virt) @ffffd050 (dma) 0x000000 - tx_info
>[    1.652593] xhci_hcd 0000:00:14.0: @ffff88040ba97054 (virt) @ffffd054 (dma) 0x000000 - rsvd[0]
>[    1.652594] xhci_hcd 0000:00:14.0: @ffff88040ba97058 (virt) @ffffd058 (dma) 0x000000 - rsvd[1]
>[    1.652595] xhci_hcd 0000:00:14.0: @ffff88040ba9705c (virt) @ffffd05c (dma) 0x000000 - rsvd[2]
>[    1.652597] xhci_hcd 0000:00:14.0: // Ding dong!
>[    1.652612] xhci_hcd 0000:00:14.0: Successful evaluate context command
>[    1.652614] xhci_hcd 0000:00:14.0: Slot 2 Output Context:
>[    1.652615] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.652616] xhci_hcd 0000:00:14.0: @ffff88040bfbf000 (virt) @fffd4000 (dma) 0x20400000 - dev_info
>[    1.652618] xhci_hcd 0000:00:14.0: @ffff88040bfbf004 (virt) @fffd4004 (dma) 0x10000a - dev_info2
>[    1.652619] xhci_hcd 0000:00:14.0: @ffff88040bfbf008 (virt) @fffd4008 (dma) 0x000000 - tt_info
>[    1.652620] xhci_hcd 0000:00:14.0: @ffff88040bfbf00c (virt) @fffd400c (dma) 0x18000002 - dev_state
>[    1.652622] xhci_hcd 0000:00:14.0: @ffff88040bfbf010 (virt) @fffd4010 (dma) 0x000000 - rsvd[0]
>[    1.652623] xhci_hcd 0000:00:14.0: @ffff88040bfbf014 (virt) @fffd4014 (dma) 0x000000 - rsvd[1]
>[    1.652625] xhci_hcd 0000:00:14.0: @ffff88040bfbf018 (virt) @fffd4018 (dma) 0x000000 - rsvd[2]
>[    1.652626] xhci_hcd 0000:00:14.0: @ffff88040bfbf01c (virt) @fffd401c (dma) 0x000000 - rsvd[3]
>[    1.652627] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.652629] xhci_hcd 0000:00:14.0: @ffff88040bfbf020 (virt) @fffd4020 (dma) 0x000001 - ep_info
>[    1.652630] xhci_hcd 0000:00:14.0: @ffff88040bfbf024 (virt) @fffd4024 (dma) 0x2000026 - ep_info2
>[    1.652631] xhci_hcd 0000:00:14.0: @ffff88040bfbf028 (virt) @fffd4028 (dma) 0xfffd8801 - deq
>[    1.652633] xhci_hcd 0000:00:14.0: @ffff88040bfbf030 (virt) @fffd4030 (dma) 0x000000 - tx_info
>[    1.652634] xhci_hcd 0000:00:14.0: @ffff88040bfbf034 (virt) @fffd4034 (dma) 0x000000 - rsvd[0]
>[    1.652636] xhci_hcd 0000:00:14.0: @ffff88040bfbf038 (virt) @fffd4038 (dma) 0x000000 - rsvd[1]
>[    1.652637] xhci_hcd 0000:00:14.0: @ffff88040bfbf03c (virt) @fffd403c (dma) 0x000000 - rsvd[2]
>[    1.653152] xhci_hcd 0000:00:14.0: Set up evaluate context for LPM MEL change.
>[    1.653153] xhci_hcd 0000:00:14.0: Slot 2 Input Context:
>[    1.653155] xhci_hcd 0000:00:14.0: @ffff88040ba97000 (virt) @ffffd000 (dma) 0x000000 - drop flags
>[    1.653156] xhci_hcd 0000:00:14.0: @ffff88040ba97004 (virt) @ffffd004 (dma) 0x000001 - add flags
>[    1.653158] xhci_hcd 0000:00:14.0: @ffff88040ba97008 (virt) @ffffd008 (dma) 0x000000 - rsvd2[0]
>[    1.653159] xhci_hcd 0000:00:14.0: @ffff88040ba9700c (virt) @ffffd00c (dma) 0x000000 - rsvd2[1]
>[    1.653160] xhci_hcd 0000:00:14.0: @ffff88040ba97010 (virt) @ffffd010 (dma) 0x000000 - rsvd2[2]
>[    1.653162] xhci_hcd 0000:00:14.0: @ffff88040ba97014 (virt) @ffffd014 (dma) 0x000000 - rsvd2[3]
>[    1.653163] xhci_hcd 0000:00:14.0: @ffff88040ba97018 (virt) @ffffd018 (dma) 0x000000 - rsvd2[4]
>[    1.653164] xhci_hcd 0000:00:14.0: @ffff88040ba9701c (virt) @ffffd01c (dma) 0x000000 - rsvd2[5]
>[    1.653166] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.653167] xhci_hcd 0000:00:14.0: @ffff88040ba97020 (virt) @ffffd020 (dma) 0x20400000 - dev_info
>[    1.653168] xhci_hcd 0000:00:14.0: @ffff88040ba97024 (virt) @ffffd024 (dma) 0x1007ff - dev_info2
>[    1.653170] xhci_hcd 0000:00:14.0: @ffff88040ba97028 (virt) @ffffd028 (dma) 0x000000 - tt_info
>[    1.653171] xhci_hcd 0000:00:14.0: @ffff88040ba9702c (virt) @ffffd02c (dma) 0x18000002 - dev_state
>[    1.653172] xhci_hcd 0000:00:14.0: @ffff88040ba97030 (virt) @ffffd030 (dma) 0x000000 - rsvd[0]
>[    1.653174] xhci_hcd 0000:00:14.0: @ffff88040ba97034 (virt) @ffffd034 (dma) 0x000000 - rsvd[1]
>[    1.653175] xhci_hcd 0000:00:14.0: @ffff88040ba97038 (virt) @ffffd038 (dma) 0x000000 - rsvd[2]
>[    1.653177] xhci_hcd 0000:00:14.0: @ffff88040ba9703c (virt) @ffffd03c (dma) 0x000000 - rsvd[3]
>[    1.653178] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.653179] xhci_hcd 0000:00:14.0: @ffff88040ba97040 (virt) @ffffd040 (dma) 0x000000 - ep_info
>[    1.653181] xhci_hcd 0000:00:14.0: @ffff88040ba97044 (virt) @ffffd044 (dma) 0x000000 - ep_info2
>[    1.653182] xhci_hcd 0000:00:14.0: @ffff88040ba97048 (virt) @ffffd048 (dma) 0x000000 - deq
>[    1.653183] xhci_hcd 0000:00:14.0: @ffff88040ba97050 (virt) @ffffd050 (dma) 0x000000 - tx_info
>[    1.653185] xhci_hcd 0000:00:14.0: @ffff88040ba97054 (virt) @ffffd054 (dma) 0x000000 - rsvd[0]
>[    1.653186] xhci_hcd 0000:00:14.0: @ffff88040ba97058 (virt) @ffffd058 (dma) 0x000000 - rsvd[1]
>[    1.653188] xhci_hcd 0000:00:14.0: @ffff88040ba9705c (virt) @ffffd05c (dma) 0x000000 - rsvd[2]
>[    1.653189] xhci_hcd 0000:00:14.0: // Ding dong!
>[    1.653202] xhci_hcd 0000:00:14.0: Successful evaluate context command
>[    1.653204] xhci_hcd 0000:00:14.0: Slot 2 Output Context:
>[    1.653205] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.653207] xhci_hcd 0000:00:14.0: @ffff88040bfbf000 (virt) @fffd4000 (dma) 0x20400000 - dev_info
>[    1.653208] xhci_hcd 0000:00:14.0: @ffff88040bfbf004 (virt) @fffd4004 (dma) 0x1007ff - dev_info2
>[    1.653209] xhci_hcd 0000:00:14.0: @ffff88040bfbf008 (virt) @fffd4008 (dma) 0x000000 - tt_info
>[    1.653211] xhci_hcd 0000:00:14.0: @ffff88040bfbf00c (virt) @fffd400c (dma) 0x18000002 - dev_state
>[    1.653212] xhci_hcd 0000:00:14.0: @ffff88040bfbf010 (virt) @fffd4010 (dma) 0x000000 - rsvd[0]
>[    1.653214] xhci_hcd 0000:00:14.0: @ffff88040bfbf014 (virt) @fffd4014 (dma) 0x000000 - rsvd[1]
>[    1.653215] xhci_hcd 0000:00:14.0: @ffff88040bfbf018 (virt) @fffd4018 (dma) 0x000000 - rsvd[2]
>[    1.653217] xhci_hcd 0000:00:14.0: @ffff88040bfbf01c (virt) @fffd401c (dma) 0x000000 - rsvd[3]
>[    1.653218] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.653219] xhci_hcd 0000:00:14.0: @ffff88040bfbf020 (virt) @fffd4020 (dma) 0x000001 - ep_info
>[    1.653221] xhci_hcd 0000:00:14.0: @ffff88040bfbf024 (virt) @fffd4024 (dma) 0x2000026 - ep_info2
>[    1.653222] xhci_hcd 0000:00:14.0: @ffff88040bfbf028 (virt) @fffd4028 (dma) 0xfffd8801 - deq
>[    1.653223] xhci_hcd 0000:00:14.0: @ffff88040bfbf030 (virt) @fffd4030 (dma) 0x000000 - tx_info
>[    1.653225] xhci_hcd 0000:00:14.0: @ffff88040bfbf034 (virt) @fffd4034 (dma) 0x000000 - rsvd[0]
>[    1.653226] xhci_hcd 0000:00:14.0: @ffff88040bfbf038 (virt) @fffd4038 (dma) 0x000000 - rsvd[1]
>[    1.653228] xhci_hcd 0000:00:14.0: @ffff88040bfbf03c (virt) @fffd403c (dma) 0x000000 - rsvd[2]
>[    1.653525] usb 3-1: adding 3-1:1.0 (config #1, interface 0)
>[    1.653548] usb-storage 3-1:1.0: usb_probe_interface
>[    1.653551] usb-storage 3-1:1.0: usb_probe_interface - got id
>[    1.654177] xhci_hcd 0000:00:14.0: Set up evaluate context for LPM MEL change.
>[    1.654178] xhci_hcd 0000:00:14.0: Slot 2 Input Context:
>[    1.654180] xhci_hcd 0000:00:14.0: @ffff88040ba97000 (virt) @ffffd000 (dma) 0x000000 - drop flags
>[    1.654181] xhci_hcd 0000:00:14.0: @ffff88040ba97004 (virt) @ffffd004 (dma) 0x000001 - add flags
>[    1.654183] xhci_hcd 0000:00:14.0: @ffff88040ba97008 (virt) @ffffd008 (dma) 0x000000 - rsvd2[0]
>[    1.654184] xhci_hcd 0000:00:14.0: @ffff88040ba9700c (virt) @ffffd00c (dma) 0x000000 - rsvd2[1]
>[    1.654185] xhci_hcd 0000:00:14.0: @ffff88040ba97010 (virt) @ffffd010 (dma) 0x000000 - rsvd2[2]
>[    1.654187] xhci_hcd 0000:00:14.0: @ffff88040ba97014 (virt) @ffffd014 (dma) 0x000000 - rsvd2[3]
>[    1.654188] xhci_hcd 0000:00:14.0: @ffff88040ba97018 (virt) @ffffd018 (dma) 0x000000 - rsvd2[4]
>[    1.654190] xhci_hcd 0000:00:14.0: @ffff88040ba9701c (virt) @ffffd01c (dma) 0x000000 - rsvd2[5]
>[    1.654191] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.654192] xhci_hcd 0000:00:14.0: @ffff88040ba97020 (virt) @ffffd020 (dma) 0x20400000 - dev_info
>[    1.654194] xhci_hcd 0000:00:14.0: @ffff88040ba97024 (virt) @ffffd024 (dma) 0x100000 - dev_info2
>[    1.654195] xhci_hcd 0000:00:14.0: @ffff88040ba97028 (virt) @ffffd028 (dma) 0x000000 - tt_info
>[    1.654196] xhci_hcd 0000:00:14.0: @ffff88040ba9702c (virt) @ffffd02c (dma) 0x18000002 - dev_state
>[    1.654198] xhci_hcd 0000:00:14.0: @ffff88040ba97030 (virt) @ffffd030 (dma) 0x000000 - rsvd[0]
>[    1.654199] xhci_hcd 0000:00:14.0: @ffff88040ba97034 (virt) @ffffd034 (dma) 0x000000 - rsvd[1]
>[    1.654200] xhci_hcd 0000:00:14.0: @ffff88040ba97038 (virt) @ffffd038 (dma) 0x000000 - rsvd[2]
>[    1.654202] xhci_hcd 0000:00:14.0: @ffff88040ba9703c (virt) @ffffd03c (dma) 0x000000 - rsvd[3]
>[    1.654203] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.654205] xhci_hcd 0000:00:14.0: @ffff88040ba97040 (virt) @ffffd040 (dma) 0x000000 - ep_info
>[    1.654206] xhci_hcd 0000:00:14.0: @ffff88040ba97044 (virt) @ffffd044 (dma) 0x000000 - ep_info2
>[    1.654207] xhci_hcd 0000:00:14.0: @ffff88040ba97048 (virt) @ffffd048 (dma) 0x000000 - deq
>[    1.654209] xhci_hcd 0000:00:14.0: @ffff88040ba97050 (virt) @ffffd050 (dma) 0x000000 - tx_info
>[    1.654210] xhci_hcd 0000:00:14.0: @ffff88040ba97054 (virt) @ffffd054 (dma) 0x000000 - rsvd[0]
>[    1.654211] xhci_hcd 0000:00:14.0: @ffff88040ba97058 (virt) @ffffd058 (dma) 0x000000 - rsvd[1]
>[    1.654213] xhci_hcd 0000:00:14.0: @ffff88040ba9705c (virt) @ffffd05c (dma) 0x000000 - rsvd[2]
>[    1.654214] xhci_hcd 0000:00:14.0: // Ding dong!
>[    1.654228] xhci_hcd 0000:00:14.0: Successful evaluate context command
>[    1.654230] xhci_hcd 0000:00:14.0: Slot 2 Output Context:
>[    1.654231] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.654232] xhci_hcd 0000:00:14.0: @ffff88040bfbf000 (virt) @fffd4000 (dma) 0x20400000 - dev_info
>[    1.654234] xhci_hcd 0000:00:14.0: @ffff88040bfbf004 (virt) @fffd4004 (dma) 0x100000 - dev_info2
>[    1.654235] xhci_hcd 0000:00:14.0: @ffff88040bfbf008 (virt) @fffd4008 (dma) 0x000000 - tt_info
>[    1.654236] xhci_hcd 0000:00:14.0: @ffff88040bfbf00c (virt) @fffd400c (dma) 0x18000002 - dev_state
>[    1.654238] xhci_hcd 0000:00:14.0: @ffff88040bfbf010 (virt) @fffd4010 (dma) 0x000000 - rsvd[0]
>[    1.654239] xhci_hcd 0000:00:14.0: @ffff88040bfbf014 (virt) @fffd4014 (dma) 0x000000 - rsvd[1]
>[    1.654241] xhci_hcd 0000:00:14.0: @ffff88040bfbf018 (virt) @fffd4018 (dma) 0x000000 - rsvd[2]
>[    1.654242] xhci_hcd 0000:00:14.0: @ffff88040bfbf01c (virt) @fffd401c (dma) 0x000000 - rsvd[3]
>[    1.654244] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.654245] xhci_hcd 0000:00:14.0: @ffff88040bfbf020 (virt) @fffd4020 (dma) 0x000001 - ep_info
>[    1.654246] xhci_hcd 0000:00:14.0: @ffff88040bfbf024 (virt) @fffd4024 (dma) 0x2000026 - ep_info2
>[    1.654248] xhci_hcd 0000:00:14.0: @ffff88040bfbf028 (virt) @fffd4028 (dma) 0xfffd8801 - deq
>[    1.654249] xhci_hcd 0000:00:14.0: @ffff88040bfbf030 (virt) @fffd4030 (dma) 0x000000 - tx_info
>[    1.654250] xhci_hcd 0000:00:14.0: @ffff88040bfbf034 (virt) @fffd4034 (dma) 0x000000 - rsvd[0]
>[    1.654252] xhci_hcd 0000:00:14.0: @ffff88040bfbf038 (virt) @fffd4038 (dma) 0x000000 - rsvd[1]
>[    1.654253] xhci_hcd 0000:00:14.0: @ffff88040bfbf03c (virt) @fffd403c (dma) 0x000000 - rsvd[2]
>[    1.654255] usb-storage 3-1:1.0: USB Mass Storage device detected
>[    1.654355] scsi6 : usb-storage 3-1:1.0
>[    1.654625] xhci_hcd 0000:00:14.0: Set up evaluate context for LPM MEL change.
>[    1.654627] xhci_hcd 0000:00:14.0: Slot 2 Input Context:
>[    1.654628] xhci_hcd 0000:00:14.0: @ffff88040ba97000 (virt) @ffffd000 (dma) 0x000000 - drop flags
>[    1.654630] xhci_hcd 0000:00:14.0: @ffff88040ba97004 (virt) @ffffd004 (dma) 0x000001 - add flags
>[    1.654631] xhci_hcd 0000:00:14.0: @ffff88040ba97008 (virt) @ffffd008 (dma) 0x000000 - rsvd2[0]
>[    1.654633] xhci_hcd 0000:00:14.0: @ffff88040ba9700c (virt) @ffffd00c (dma) 0x000000 - rsvd2[1]
>[    1.654634] xhci_hcd 0000:00:14.0: @ffff88040ba97010 (virt) @ffffd010 (dma) 0x000000 - rsvd2[2]
>[    1.654635] xhci_hcd 0000:00:14.0: @ffff88040ba97014 (virt) @ffffd014 (dma) 0x000000 - rsvd2[3]
>[    1.654637] xhci_hcd 0000:00:14.0: @ffff88040ba97018 (virt) @ffffd018 (dma) 0x000000 - rsvd2[4]
>[    1.654638] xhci_hcd 0000:00:14.0: @ffff88040ba9701c (virt) @ffffd01c (dma) 0x000000 - rsvd2[5]
>[    1.654639] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.654641] xhci_hcd 0000:00:14.0: @ffff88040ba97020 (virt) @ffffd020 (dma) 0x20400000 - dev_info
>[    1.654642] xhci_hcd 0000:00:14.0: @ffff88040ba97024 (virt) @ffffd024 (dma) 0x10000a - dev_info2
>[    1.654643] xhci_hcd 0000:00:14.0: @ffff88040ba97028 (virt) @ffffd028 (dma) 0x000000 - tt_info
>[    1.654645] xhci_hcd 0000:00:14.0: @ffff88040ba9702c (virt) @ffffd02c (dma) 0x18000002 - dev_state
>[    1.654646] xhci_hcd 0000:00:14.0: @ffff88040ba97030 (virt) @ffffd030 (dma) 0x000000 - rsvd[0]
>[    1.654648] xhci_hcd 0000:00:14.0: @ffff88040ba97034 (virt) @ffffd034 (dma) 0x000000 - rsvd[1]
>[    1.654649] xhci_hcd 0000:00:14.0: @ffff88040ba97038 (virt) @ffffd038 (dma) 0x000000 - rsvd[2]
>[    1.654650] xhci_hcd 0000:00:14.0: @ffff88040ba9703c (virt) @ffffd03c (dma) 0x000000 - rsvd[3]
>[    1.654652] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.654653] xhci_hcd 0000:00:14.0: @ffff88040ba97040 (virt) @ffffd040 (dma) 0x000000 - ep_info
>[    1.654655] xhci_hcd 0000:00:14.0: @ffff88040ba97044 (virt) @ffffd044 (dma) 0x000000 - ep_info2
>[    1.654656] xhci_hcd 0000:00:14.0: @ffff88040ba97048 (virt) @ffffd048 (dma) 0x000000 - deq
>[    1.654657] xhci_hcd 0000:00:14.0: @ffff88040ba97050 (virt) @ffffd050 (dma) 0x000000 - tx_info
>[    1.654659] xhci_hcd 0000:00:14.0: @ffff88040ba97054 (virt) @ffffd054 (dma) 0x000000 - rsvd[0]
>[    1.654660] xhci_hcd 0000:00:14.0: @ffff88040ba97058 (virt) @ffffd058 (dma) 0x000000 - rsvd[1]
>[    1.654662] xhci_hcd 0000:00:14.0: @ffff88040ba9705c (virt) @ffffd05c (dma) 0x000000 - rsvd[2]
>[    1.654663] xhci_hcd 0000:00:14.0: // Ding dong!
>[    1.654676] xhci_hcd 0000:00:14.0: Successful evaluate context command
>[    1.654677] xhci_hcd 0000:00:14.0: Slot 2 Output Context:
>[    1.654678] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.654680] xhci_hcd 0000:00:14.0: @ffff88040bfbf000 (virt) @fffd4000 (dma) 0x20400000 - dev_info
>[    1.654681] xhci_hcd 0000:00:14.0: @ffff88040bfbf004 (virt) @fffd4004 (dma) 0x10000a - dev_info2
>[    1.654682] xhci_hcd 0000:00:14.0: @ffff88040bfbf008 (virt) @fffd4008 (dma) 0x000000 - tt_info
>[    1.654684] xhci_hcd 0000:00:14.0: @ffff88040bfbf00c (virt) @fffd400c (dma) 0x18000002 - dev_state
>[    1.654685] xhci_hcd 0000:00:14.0: @ffff88040bfbf010 (virt) @fffd4010 (dma) 0x000000 - rsvd[0]
>[    1.654686] xhci_hcd 0000:00:14.0: @ffff88040bfbf014 (virt) @fffd4014 (dma) 0x000000 - rsvd[1]
>[    1.654688] xhci_hcd 0000:00:14.0: @ffff88040bfbf018 (virt) @fffd4018 (dma) 0x000000 - rsvd[2]
>[    1.654689] xhci_hcd 0000:00:14.0: @ffff88040bfbf01c (virt) @fffd401c (dma) 0x000000 - rsvd[3]
>[    1.654691] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.654692] xhci_hcd 0000:00:14.0: @ffff88040bfbf020 (virt) @fffd4020 (dma) 0x000001 - ep_info
>[    1.654694] xhci_hcd 0000:00:14.0: @ffff88040bfbf024 (virt) @fffd4024 (dma) 0x2000026 - ep_info2
>[    1.654695] xhci_hcd 0000:00:14.0: @ffff88040bfbf028 (virt) @fffd4028 (dma) 0xfffd8801 - deq
>[    1.654696] xhci_hcd 0000:00:14.0: @ffff88040bfbf030 (virt) @fffd4030 (dma) 0x000000 - tx_info
>[    1.654698] xhci_hcd 0000:00:14.0: @ffff88040bfbf034 (virt) @fffd4034 (dma) 0x000000 - rsvd[0]
>[    1.654699] xhci_hcd 0000:00:14.0: @ffff88040bfbf038 (virt) @fffd4038 (dma) 0x000000 - rsvd[1]
>[    1.654700] xhci_hcd 0000:00:14.0: @ffff88040bfbf03c (virt) @fffd403c (dma) 0x000000 - rsvd[2]
>[    1.655217] xhci_hcd 0000:00:14.0: Set up evaluate context for LPM MEL change.
>[    1.655218] xhci_hcd 0000:00:14.0: Slot 2 Input Context:
>[    1.655220] xhci_hcd 0000:00:14.0: @ffff88040ba97000 (virt) @ffffd000 (dma) 0x000000 - drop flags
>[    1.655221] xhci_hcd 0000:00:14.0: @ffff88040ba97004 (virt) @ffffd004 (dma) 0x000001 - add flags
>[    1.655222] xhci_hcd 0000:00:14.0: @ffff88040ba97008 (virt) @ffffd008 (dma) 0x000000 - rsvd2[0]
>[    1.655224] xhci_hcd 0000:00:14.0: @ffff88040ba9700c (virt) @ffffd00c (dma) 0x000000 - rsvd2[1]
>[    1.655225] xhci_hcd 0000:00:14.0: @ffff88040ba97010 (virt) @ffffd010 (dma) 0x000000 - rsvd2[2]
>[    1.655227] xhci_hcd 0000:00:14.0: @ffff88040ba97014 (virt) @ffffd014 (dma) 0x000000 - rsvd2[3]
>[    1.655228] xhci_hcd 0000:00:14.0: @ffff88040ba97018 (virt) @ffffd018 (dma) 0x000000 - rsvd2[4]
>[    1.655229] xhci_hcd 0000:00:14.0: @ffff88040ba9701c (virt) @ffffd01c (dma) 0x000000 - rsvd2[5]
>[    1.655231] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.655232] xhci_hcd 0000:00:14.0: @ffff88040ba97020 (virt) @ffffd020 (dma) 0x20400000 - dev_info
>[    1.655233] xhci_hcd 0000:00:14.0: @ffff88040ba97024 (virt) @ffffd024 (dma) 0x1007ff - dev_info2
>[    1.655235] xhci_hcd 0000:00:14.0: @ffff88040ba97028 (virt) @ffffd028 (dma) 0x000000 - tt_info
>[    1.655236] xhci_hcd 0000:00:14.0: @ffff88040ba9702c (virt) @ffffd02c (dma) 0x18000002 - dev_state
>[    1.655237] xhci_hcd 0000:00:14.0: @ffff88040ba97030 (virt) @ffffd030 (dma) 0x000000 - rsvd[0]
>[    1.655239] xhci_hcd 0000:00:14.0: @ffff88040ba97034 (virt) @ffffd034 (dma) 0x000000 - rsvd[1]
>[    1.655240] xhci_hcd 0000:00:14.0: @ffff88040ba97038 (virt) @ffffd038 (dma) 0x000000 - rsvd[2]
>[    1.655241] xhci_hcd 0000:00:14.0: @ffff88040ba9703c (virt) @ffffd03c (dma) 0x000000 - rsvd[3]
>[    1.655243] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.655244] xhci_hcd 0000:00:14.0: @ffff88040ba97040 (virt) @ffffd040 (dma) 0x000000 - ep_info
>[    1.655245] xhci_hcd 0000:00:14.0: @ffff88040ba97044 (virt) @ffffd044 (dma) 0x000000 - ep_info2
>[    1.655247] xhci_hcd 0000:00:14.0: @ffff88040ba97048 (virt) @ffffd048 (dma) 0x000000 - deq
>[    1.655248] xhci_hcd 0000:00:14.0: @ffff88040ba97050 (virt) @ffffd050 (dma) 0x000000 - tx_info
>[    1.655250] xhci_hcd 0000:00:14.0: @ffff88040ba97054 (virt) @ffffd054 (dma) 0x000000 - rsvd[0]
>[    1.655251] xhci_hcd 0000:00:14.0: @ffff88040ba97058 (virt) @ffffd058 (dma) 0x000000 - rsvd[1]
>[    1.655252] xhci_hcd 0000:00:14.0: @ffff88040ba9705c (virt) @ffffd05c (dma) 0x000000 - rsvd[2]
>[    1.655254] xhci_hcd 0000:00:14.0: // Ding dong!
>[    1.655267] xhci_hcd 0000:00:14.0: Successful evaluate context command
>[    1.655268] xhci_hcd 0000:00:14.0: Slot 2 Output Context:
>[    1.655269] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.655271] xhci_hcd 0000:00:14.0: @ffff88040bfbf000 (virt) @fffd4000 (dma) 0x20400000 - dev_info
>[    1.655272] xhci_hcd 0000:00:14.0: @ffff88040bfbf004 (virt) @fffd4004 (dma) 0x1007ff - dev_info2
>[    1.655273] xhci_hcd 0000:00:14.0: @ffff88040bfbf008 (virt) @fffd4008 (dma) 0x000000 - tt_info
>[    1.655275] xhci_hcd 0000:00:14.0: @ffff88040bfbf00c (virt) @fffd400c (dma) 0x18000002 - dev_state
>[    1.655276] xhci_hcd 0000:00:14.0: @ffff88040bfbf010 (virt) @fffd4010 (dma) 0x000000 - rsvd[0]
>[    1.655278] xhci_hcd 0000:00:14.0: @ffff88040bfbf014 (virt) @fffd4014 (dma) 0x000000 - rsvd[1]
>[    1.655279] xhci_hcd 0000:00:14.0: @ffff88040bfbf018 (virt) @fffd4018 (dma) 0x000000 - rsvd[2]
>[    1.655281] xhci_hcd 0000:00:14.0: @ffff88040bfbf01c (virt) @fffd401c (dma) 0x000000 - rsvd[3]
>[    1.655282] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.655283] xhci_hcd 0000:00:14.0: @ffff88040bfbf020 (virt) @fffd4020 (dma) 0x000001 - ep_info
>[    1.655285] xhci_hcd 0000:00:14.0: @ffff88040bfbf024 (virt) @fffd4024 (dma) 0x2000026 - ep_info2
>[    1.655286] xhci_hcd 0000:00:14.0: @ffff88040bfbf028 (virt) @fffd4028 (dma) 0xfffd8801 - deq
>[    1.655287] xhci_hcd 0000:00:14.0: @ffff88040bfbf030 (virt) @fffd4030 (dma) 0x000000 - tx_info
>[    1.655289] xhci_hcd 0000:00:14.0: @ffff88040bfbf034 (virt) @fffd4034 (dma) 0x000000 - rsvd[0]
>[    1.655290] xhci_hcd 0000:00:14.0: @ffff88040bfbf038 (virt) @fffd4038 (dma) 0x000000 - rsvd[1]
>[    1.655291] xhci_hcd 0000:00:14.0: @ffff88040bfbf03c (virt) @fffd403c (dma) 0x000000 - rsvd[2]
>[    1.655609] hub 1-1:1.0: state 7 ports 8 chg 0000 evt 0000
>[    1.655613] hub 2-14:1.0: state 7 ports 2 chg 0006 evt 0000
>[    1.655619] hub 1-1:1.0: hub_suspend
>[    1.655623] usb 1-1: unlink qh256-0001/ffff88040b43be00 start 1 [1/0 us]
>[    1.655869] hub 2-14:1.0: port 1, status 0301, change 0000, 1.5 Mb/s
>[    1.656140] xhci_hcd 0000:00:14.0: // Ding dong!
>[    1.656184] xhci_hcd 0000:00:14.0: Slot 3 output ctx = 0xfffbc000 (dma)
>[    1.656188] xhci_hcd 0000:00:14.0: Slot 3 input ctx = 0xfffbb000 (dma)
>[    1.656192] xhci_hcd 0000:00:14.0: Set slot id 3 dcbaa entry ffff88040ba94018 to 0xfffbc000
>[    1.657336] usb 1-1: usb auto-suspend, wakeup 1
>[    1.668283] hub 1-0:1.0: hub_suspend
>[    1.668289] usb usb1: bus auto-suspend, wakeup 1
>[    1.668290] ehci-pci 0000:00:1d.0: suspend root hub
>[    1.718493] usb 2-14.1: new low-speed USB device number 3 using xhci_hcd
>[    1.718497] xhci_hcd 0000:00:14.0: Set root hub portnum to 14
>[    1.718498] xhci_hcd 0000:00:14.0: Set fake root hub portnum to 14
>[    1.718500] xhci_hcd 0000:00:14.0: udev->tt = ffff88040b63c0a0
>[    1.718502] xhci_hcd 0000:00:14.0: udev->ttport = 0x1
>[    1.718503] xhci_hcd 0000:00:14.0: Slot ID 3 Input Context:
>[    1.718505] xhci_hcd 0000:00:14.0: @ffff88040b7dc000 (virt) @fffbb000 (dma) 0x000000 - drop flags
>[    1.718507] xhci_hcd 0000:00:14.0: @ffff88040b7dc004 (virt) @fffbb004 (dma) 0x000003 - add flags
>[    1.718509] xhci_hcd 0000:00:14.0: @ffff88040b7dc008 (virt) @fffbb008 (dma) 0x000000 - rsvd2[0]
>[    1.718510] xhci_hcd 0000:00:14.0: @ffff88040b7dc00c (virt) @fffbb00c (dma) 0x000000 - rsvd2[1]
>[    1.718512] xhci_hcd 0000:00:14.0: @ffff88040b7dc010 (virt) @fffbb010 (dma) 0x000000 - rsvd2[2]
>[    1.718513] xhci_hcd 0000:00:14.0: @ffff88040b7dc014 (virt) @fffbb014 (dma) 0x000000 - rsvd2[3]
>[    1.718515] xhci_hcd 0000:00:14.0: @ffff88040b7dc018 (virt) @fffbb018 (dma) 0x000000 - rsvd2[4]
>[    1.718517] xhci_hcd 0000:00:14.0: @ffff88040b7dc01c (virt) @fffbb01c (dma) 0x000000 - rsvd2[5]
>[    1.718518] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.718519] xhci_hcd 0000:00:14.0: @ffff88040b7dc020 (virt) @fffbb020 (dma) 0xa200001 - dev_info
>[    1.718521] xhci_hcd 0000:00:14.0: @ffff88040b7dc024 (virt) @fffbb024 (dma) 0x0e0000 - dev_info2
>[    1.718523] xhci_hcd 0000:00:14.0: @ffff88040b7dc028 (virt) @fffbb028 (dma) 0x000101 - tt_info
>[    1.718524] xhci_hcd 0000:00:14.0: @ffff88040b7dc02c (virt) @fffbb02c (dma) 0x000000 - dev_state
>[    1.718526] xhci_hcd 0000:00:14.0: @ffff88040b7dc030 (virt) @fffbb030 (dma) 0x000000 - rsvd[0]
>[    1.718527] xhci_hcd 0000:00:14.0: @ffff88040b7dc034 (virt) @fffbb034 (dma) 0x000000 - rsvd[1]
>[    1.718529] xhci_hcd 0000:00:14.0: @ffff88040b7dc038 (virt) @fffbb038 (dma) 0x000000 - rsvd[2]
>[    1.718530] xhci_hcd 0000:00:14.0: @ffff88040b7dc03c (virt) @fffbb03c (dma) 0x000000 - rsvd[3]
>[    1.718532] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.718533] xhci_hcd 0000:00:14.0: @ffff88040b7dc040 (virt) @fffbb040 (dma) 0x000000 - ep_info
>[    1.718535] xhci_hcd 0000:00:14.0: @ffff88040b7dc044 (virt) @fffbb044 (dma) 0x080026 - ep_info2
>[    1.718536] xhci_hcd 0000:00:14.0: @ffff88040b7dc048 (virt) @fffbb048 (dma) 0xfffd0801 - deq
>[    1.718538] xhci_hcd 0000:00:14.0: @ffff88040b7dc050 (virt) @fffbb050 (dma) 0x000000 - tx_info
>[    1.718540] xhci_hcd 0000:00:14.0: @ffff88040b7dc054 (virt) @fffbb054 (dma) 0x000000 - rsvd[0]
>[    1.718541] xhci_hcd 0000:00:14.0: @ffff88040b7dc058 (virt) @fffbb058 (dma) 0x000000 - rsvd[1]
>[    1.718543] xhci_hcd 0000:00:14.0: @ffff88040b7dc05c (virt) @fffbb05c (dma) 0x000000 - rsvd[2]
>[    1.718544] xhci_hcd 0000:00:14.0: OUT Endpoint 01 Context (ep_index 01):
>[    1.718546] xhci_hcd 0000:00:14.0: @ffff88040b7dc060 (virt) @fffbb060 (dma) 0x000000 - ep_info
>[    1.718547] xhci_hcd 0000:00:14.0: @ffff88040b7dc064 (virt) @fffbb064 (dma) 0x000000 - ep_info2
>[    1.718549] xhci_hcd 0000:00:14.0: @ffff88040b7dc068 (virt) @fffbb068 (dma) 0x000000 - deq
>[    1.718550] xhci_hcd 0000:00:14.0: @ffff88040b7dc070 (virt) @fffbb070 (dma) 0x000000 - tx_info
>[    1.718552] xhci_hcd 0000:00:14.0: @ffff88040b7dc074 (virt) @fffbb074 (dma) 0x000000 - rsvd[0]
>[    1.718553] xhci_hcd 0000:00:14.0: @ffff88040b7dc078 (virt) @fffbb078 (dma) 0x000000 - rsvd[1]
>[    1.718555] xhci_hcd 0000:00:14.0: @ffff88040b7dc07c (virt) @fffbb07c (dma) 0x000000 - rsvd[2]
>[    1.718556] xhci_hcd 0000:00:14.0: IN Endpoint 01 Context (ep_index 02):
>[    1.718558] xhci_hcd 0000:00:14.0: @ffff88040b7dc080 (virt) @fffbb080 (dma) 0x000000 - ep_info
>[    1.718559] xhci_hcd 0000:00:14.0: @ffff88040b7dc084 (virt) @fffbb084 (dma) 0x000000 - ep_info2
>[    1.718561] xhci_hcd 0000:00:14.0: @ffff88040b7dc088 (virt) @fffbb088 (dma) 0x000000 - deq
>[    1.718562] xhci_hcd 0000:00:14.0: @ffff88040b7dc090 (virt) @fffbb090 (dma) 0x000000 - tx_info
>[    1.718564] xhci_hcd 0000:00:14.0: @ffff88040b7dc094 (virt) @fffbb094 (dma) 0x000000 - rsvd[0]
>[    1.718565] xhci_hcd 0000:00:14.0: @ffff88040b7dc098 (virt) @fffbb098 (dma) 0x000000 - rsvd[1]
>[    1.718567] xhci_hcd 0000:00:14.0: @ffff88040b7dc09c (virt) @fffbb09c (dma) 0x000000 - rsvd[2]
>[    1.718568] xhci_hcd 0000:00:14.0: // Ding dong!
>[    1.718785] xhci_hcd 0000:00:14.0: Successful Address Device command
>[    1.718788] xhci_hcd 0000:00:14.0: Op regs DCBAA ptr = 0x000000fffff000
>[    1.718789] xhci_hcd 0000:00:14.0: Slot ID 3 dcbaa entry @ffff88040ba94018 = 0x000000fffbc000
>[    1.718791] xhci_hcd 0000:00:14.0: Output Context DMA address = 0xfffbc000
>[    1.718792] xhci_hcd 0000:00:14.0: Slot ID 3 Input Context:
>[    1.718794] xhci_hcd 0000:00:14.0: @ffff88040b7dc000 (virt) @fffbb000 (dma) 0x000000 - drop flags
>[    1.718795] xhci_hcd 0000:00:14.0: @ffff88040b7dc004 (virt) @fffbb004 (dma) 0x000003 - add flags
>[    1.718797] xhci_hcd 0000:00:14.0: @ffff88040b7dc008 (virt) @fffbb008 (dma) 0x000000 - rsvd2[0]
>[    1.718798] xhci_hcd 0000:00:14.0: @ffff88040b7dc00c (virt) @fffbb00c (dma) 0x000000 - rsvd2[1]
>[    1.718800] xhci_hcd 0000:00:14.0: @ffff88040b7dc010 (virt) @fffbb010 (dma) 0x000000 - rsvd2[2]
>[    1.718801] xhci_hcd 0000:00:14.0: @ffff88040b7dc014 (virt) @fffbb014 (dma) 0x000000 - rsvd2[3]
>[    1.718803] xhci_hcd 0000:00:14.0: @ffff88040b7dc018 (virt) @fffbb018 (dma) 0x000000 - rsvd2[4]
>[    1.718804] xhci_hcd 0000:00:14.0: @ffff88040b7dc01c (virt) @fffbb01c (dma) 0x000000 - rsvd2[5]
>[    1.718805] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.718807] xhci_hcd 0000:00:14.0: @ffff88040b7dc020 (virt) @fffbb020 (dma) 0xa200001 - dev_info
>[    1.718808] xhci_hcd 0000:00:14.0: @ffff88040b7dc024 (virt) @fffbb024 (dma) 0x0e0000 - dev_info2
>[    1.718810] xhci_hcd 0000:00:14.0: @ffff88040b7dc028 (virt) @fffbb028 (dma) 0x000101 - tt_info
>[    1.718811] xhci_hcd 0000:00:14.0: @ffff88040b7dc02c (virt) @fffbb02c (dma) 0x000000 - dev_state
>[    1.718813] xhci_hcd 0000:00:14.0: @ffff88040b7dc030 (virt) @fffbb030 (dma) 0x000000 - rsvd[0]
>[    1.718814] xhci_hcd 0000:00:14.0: @ffff88040b7dc034 (virt) @fffbb034 (dma) 0x000000 - rsvd[1]
>[    1.718816] xhci_hcd 0000:00:14.0: @ffff88040b7dc038 (virt) @fffbb038 (dma) 0x000000 - rsvd[2]
>[    1.718817] xhci_hcd 0000:00:14.0: @ffff88040b7dc03c (virt) @fffbb03c (dma) 0x000000 - rsvd[3]
>[    1.718819] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.718820] xhci_hcd 0000:00:14.0: @ffff88040b7dc040 (virt) @fffbb040 (dma) 0x000000 - ep_info
>[    1.718822] xhci_hcd 0000:00:14.0: @ffff88040b7dc044 (virt) @fffbb044 (dma) 0x080026 - ep_info2
>[    1.718823] xhci_hcd 0000:00:14.0: @ffff88040b7dc048 (virt) @fffbb048 (dma) 0xfffd0801 - deq
>[    1.718825] xhci_hcd 0000:00:14.0: @ffff88040b7dc050 (virt) @fffbb050 (dma) 0x000000 - tx_info
>[    1.718826] xhci_hcd 0000:00:14.0: @ffff88040b7dc054 (virt) @fffbb054 (dma) 0x000000 - rsvd[0]
>[    1.718828] xhci_hcd 0000:00:14.0: @ffff88040b7dc058 (virt) @fffbb058 (dma) 0x000000 - rsvd[1]
>[    1.718829] xhci_hcd 0000:00:14.0: @ffff88040b7dc05c (virt) @fffbb05c (dma) 0x000000 - rsvd[2]
>[    1.718831] xhci_hcd 0000:00:14.0: OUT Endpoint 01 Context (ep_index 01):
>[    1.718832] xhci_hcd 0000:00:14.0: @ffff88040b7dc060 (virt) @fffbb060 (dma) 0x000000 - ep_info
>[    1.718834] xhci_hcd 0000:00:14.0: @ffff88040b7dc064 (virt) @fffbb064 (dma) 0x000000 - ep_info2
>[    1.718835] xhci_hcd 0000:00:14.0: @ffff88040b7dc068 (virt) @fffbb068 (dma) 0x000000 - deq
>[    1.718837] xhci_hcd 0000:00:14.0: @ffff88040b7dc070 (virt) @fffbb070 (dma) 0x000000 - tx_info
>[    1.718838] xhci_hcd 0000:00:14.0: @ffff88040b7dc074 (virt) @fffbb074 (dma) 0x000000 - rsvd[0]
>[    1.718840] xhci_hcd 0000:00:14.0: @ffff88040b7dc078 (virt) @fffbb078 (dma) 0x000000 - rsvd[1]
>[    1.718841] xhci_hcd 0000:00:14.0: @ffff88040b7dc07c (virt) @fffbb07c (dma) 0x000000 - rsvd[2]
>[    1.718843] xhci_hcd 0000:00:14.0: IN Endpoint 01 Context (ep_index 02):
>[    1.718844] xhci_hcd 0000:00:14.0: @ffff88040b7dc080 (virt) @fffbb080 (dma) 0x000000 - ep_info
>[    1.718846] xhci_hcd 0000:00:14.0: @ffff88040b7dc084 (virt) @fffbb084 (dma) 0x000000 - ep_info2
>[    1.718847] xhci_hcd 0000:00:14.0: @ffff88040b7dc088 (virt) @fffbb088 (dma) 0x000000 - deq
>[    1.718848] xhci_hcd 0000:00:14.0: @ffff88040b7dc090 (virt) @fffbb090 (dma) 0x000000 - tx_info
>[    1.718850] xhci_hcd 0000:00:14.0: @ffff88040b7dc094 (virt) @fffbb094 (dma) 0x000000 - rsvd[0]
>[    1.718852] xhci_hcd 0000:00:14.0: @ffff88040b7dc098 (virt) @fffbb098 (dma) 0x000000 - rsvd[1]
>[    1.718853] xhci_hcd 0000:00:14.0: @ffff88040b7dc09c (virt) @fffbb09c (dma) 0x000000 - rsvd[2]
>[    1.718854] xhci_hcd 0000:00:14.0: Slot ID 3 Output Context:
>[    1.718856] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.718857] xhci_hcd 0000:00:14.0: @ffff88040aa87000 (virt) @fffbc000 (dma) 0xa200001 - dev_info
>[    1.718859] xhci_hcd 0000:00:14.0: @ffff88040aa87004 (virt) @fffbc004 (dma) 0x0e0000 - dev_info2
>[    1.718860] xhci_hcd 0000:00:14.0: @ffff88040aa87008 (virt) @fffbc008 (dma) 0x000101 - tt_info
>[    1.718861] xhci_hcd 0000:00:14.0: @ffff88040aa8700c (virt) @fffbc00c (dma) 0x10000003 - dev_state
>[    1.718863] xhci_hcd 0000:00:14.0: @ffff88040aa87010 (virt) @fffbc010 (dma) 0x000000 - rsvd[0]
>[    1.718865] xhci_hcd 0000:00:14.0: @ffff88040aa87014 (virt) @fffbc014 (dma) 0x000000 - rsvd[1]
>[    1.718866] xhci_hcd 0000:00:14.0: @ffff88040aa87018 (virt) @fffbc018 (dma) 0x000000 - rsvd[2]
>[    1.718868] xhci_hcd 0000:00:14.0: @ffff88040aa8701c (virt) @fffbc01c (dma) 0x000000 - rsvd[3]
>[    1.718869] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.718871] xhci_hcd 0000:00:14.0: @ffff88040aa87020 (virt) @fffbc020 (dma) 0x000001 - ep_info
>[    1.718872] xhci_hcd 0000:00:14.0: @ffff88040aa87024 (virt) @fffbc024 (dma) 0x080026 - ep_info2
>[    1.718874] xhci_hcd 0000:00:14.0: @ffff88040aa87028 (virt) @fffbc028 (dma) 0xfffd0801 - deq
>[    1.718875] xhci_hcd 0000:00:14.0: @ffff88040aa87030 (virt) @fffbc030 (dma) 0x000000 - tx_info
>[    1.718877] xhci_hcd 0000:00:14.0: @ffff88040aa87034 (virt) @fffbc034 (dma) 0x000000 - rsvd[0]
>[    1.718878] xhci_hcd 0000:00:14.0: @ffff88040aa87038 (virt) @fffbc038 (dma) 0x000000 - rsvd[1]
>[    1.718880] xhci_hcd 0000:00:14.0: @ffff88040aa8703c (virt) @fffbc03c (dma) 0x000000 - rsvd[2]
>[    1.718881] xhci_hcd 0000:00:14.0: OUT Endpoint 01 Context (ep_index 01):
>[    1.718883] xhci_hcd 0000:00:14.0: @ffff88040aa87040 (virt) @fffbc040 (dma) 0x000000 - ep_info
>[    1.718884] xhci_hcd 0000:00:14.0: @ffff88040aa87044 (virt) @fffbc044 (dma) 0x000000 - ep_info2
>[    1.718886] xhci_hcd 0000:00:14.0: @ffff88040aa87048 (virt) @fffbc048 (dma) 0x000000 - deq
>[    1.718887] xhci_hcd 0000:00:14.0: @ffff88040aa87050 (virt) @fffbc050 (dma) 0x000000 - tx_info
>[    1.718889] xhci_hcd 0000:00:14.0: @ffff88040aa87054 (virt) @fffbc054 (dma) 0x000000 - rsvd[0]
>[    1.718890] xhci_hcd 0000:00:14.0: @ffff88040aa87058 (virt) @fffbc058 (dma) 0x000000 - rsvd[1]
>[    1.718892] xhci_hcd 0000:00:14.0: @ffff88040aa8705c (virt) @fffbc05c (dma) 0x000000 - rsvd[2]
>[    1.718893] xhci_hcd 0000:00:14.0: IN Endpoint 01 Context (ep_index 02):
>[    1.718894] xhci_hcd 0000:00:14.0: @ffff88040aa87060 (virt) @fffbc060 (dma) 0x000000 - ep_info
>[    1.718896] xhci_hcd 0000:00:14.0: @ffff88040aa87064 (virt) @fffbc064 (dma) 0x000000 - ep_info2
>[    1.718897] xhci_hcd 0000:00:14.0: @ffff88040aa87068 (virt) @fffbc068 (dma) 0x000000 - deq
>[    1.718899] xhci_hcd 0000:00:14.0: @ffff88040aa87070 (virt) @fffbc070 (dma) 0x000000 - tx_info
>[    1.718900] xhci_hcd 0000:00:14.0: @ffff88040aa87074 (virt) @fffbc074 (dma) 0x000000 - rsvd[0]
>[    1.718902] xhci_hcd 0000:00:14.0: @ffff88040aa87078 (virt) @fffbc078 (dma) 0x000000 - rsvd[1]
>[    1.718903] xhci_hcd 0000:00:14.0: @ffff88040aa8707c (virt) @fffbc07c (dma) 0x000000 - rsvd[2]
>[    1.718905] xhci_hcd 0000:00:14.0: Internal device address = 4
>[    1.728287] xhci_hcd 0000:00:14.0: xhci_hub_status_data: stopping port polling.
>[    1.731719] usb 2-14.1: skipped 1 descriptor after interface
>[    1.731977] xhci_hcd 0000:00:14.0: Waiting for status stage event
>[    1.732221] usb 2-14.1: default language 0x0409
>[    1.733003] xhci_hcd 0000:00:14.0: Waiting for status stage event
>[    1.733732] xhci_hcd 0000:00:14.0: Waiting for status stage event
>[    1.733831] usb 2-14.1: udev 3, busnum 2, minor = 130
>[    1.733834] usb 2-14.1: New USB device found, idVendor=046d, idProduct=c05a
>[    1.733836] usb 2-14.1: New USB device strings: Mfr=1, Product=2, SerialNumber=0
>[    1.733838] usb 2-14.1: Product: USB Optical Mouse
>[    1.733840] usb 2-14.1: Manufacturer: Logitech
>[    1.733923] usb 2-14.1: usb_probe_device
>[    1.733926] usb 2-14.1: configuration #1 chosen from 1 choice
>[    1.733930] usb 2-14.1: ep 0x81 - rounding interval to 64 microframes, ep desc says 80 microframes
>[    1.733933] xhci_hcd 0000:00:14.0: add ep 0x81, slot id 3, new drop flags = 0x0, new add flags = 0x8, new slot info = 0x1a200001
>[    1.733935] xhci_hcd 0000:00:14.0: xhci_check_bandwidth called for udev ffff88040ba6d000
>[    1.733936] xhci_hcd 0000:00:14.0: New Input Control Context:
>[    1.733938] xhci_hcd 0000:00:14.0: @ffff88040b7dc000 (virt) @fffbb000 (dma) 0x000000 - drop flags
>[    1.733940] xhci_hcd 0000:00:14.0: @ffff88040b7dc004 (virt) @fffbb004 (dma) 0x000009 - add flags
>[    1.733942] xhci_hcd 0000:00:14.0: @ffff88040b7dc008 (virt) @fffbb008 (dma) 0x000000 - rsvd2[0]
>[    1.733943] xhci_hcd 0000:00:14.0: @ffff88040b7dc00c (virt) @fffbb00c (dma) 0x000000 - rsvd2[1]
>[    1.733945] xhci_hcd 0000:00:14.0: @ffff88040b7dc010 (virt) @fffbb010 (dma) 0x000000 - rsvd2[2]
>[    1.733946] xhci_hcd 0000:00:14.0: @ffff88040b7dc014 (virt) @fffbb014 (dma) 0x000000 - rsvd2[3]
>[    1.733948] xhci_hcd 0000:00:14.0: @ffff88040b7dc018 (virt) @fffbb018 (dma) 0x000000 - rsvd2[4]
>[    1.733949] xhci_hcd 0000:00:14.0: @ffff88040b7dc01c (virt) @fffbb01c (dma) 0x000000 - rsvd2[5]
>[    1.733950] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.733952] xhci_hcd 0000:00:14.0: @ffff88040b7dc020 (virt) @fffbb020 (dma) 0x1a200001 - dev_info
>[    1.733953] xhci_hcd 0000:00:14.0: @ffff88040b7dc024 (virt) @fffbb024 (dma) 0x0e0000 - dev_info2
>[    1.733955] xhci_hcd 0000:00:14.0: @ffff88040b7dc028 (virt) @fffbb028 (dma) 0x000101 - tt_info
>[    1.733956] xhci_hcd 0000:00:14.0: @ffff88040b7dc02c (virt) @fffbb02c (dma) 0x000000 - dev_state
>[    1.733958] xhci_hcd 0000:00:14.0: @ffff88040b7dc030 (virt) @fffbb030 (dma) 0x000000 - rsvd[0]
>[    1.733959] xhci_hcd 0000:00:14.0: @ffff88040b7dc034 (virt) @fffbb034 (dma) 0x000000 - rsvd[1]
>[    1.733961] xhci_hcd 0000:00:14.0: @ffff88040b7dc038 (virt) @fffbb038 (dma) 0x000000 - rsvd[2]
>[    1.733962] xhci_hcd 0000:00:14.0: @ffff88040b7dc03c (virt) @fffbb03c (dma) 0x000000 - rsvd[3]
>[    1.733964] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.733966] xhci_hcd 0000:00:14.0: @ffff88040b7dc040 (virt) @fffbb040 (dma) 0x000000 - ep_info
>[    1.733967] xhci_hcd 0000:00:14.0: @ffff88040b7dc044 (virt) @fffbb044 (dma) 0x080026 - ep_info2
>[    1.733969] xhci_hcd 0000:00:14.0: @ffff88040b7dc048 (virt) @fffbb048 (dma) 0xfffd0801 - deq
>[    1.733970] xhci_hcd 0000:00:14.0: @ffff88040b7dc050 (virt) @fffbb050 (dma) 0x000000 - tx_info
>[    1.733972] xhci_hcd 0000:00:14.0: @ffff88040b7dc054 (virt) @fffbb054 (dma) 0x000000 - rsvd[0]
>[    1.733974] xhci_hcd 0000:00:14.0: @ffff88040b7dc058 (virt) @fffbb058 (dma) 0x000000 - rsvd[1]
>[    1.733975] xhci_hcd 0000:00:14.0: @ffff88040b7dc05c (virt) @fffbb05c (dma) 0x000000 - rsvd[2]
>[    1.733977] xhci_hcd 0000:00:14.0: OUT Endpoint 01 Context (ep_index 01):
>[    1.733978] xhci_hcd 0000:00:14.0: @ffff88040b7dc060 (virt) @fffbb060 (dma) 0x000000 - ep_info
>[    1.733980] xhci_hcd 0000:00:14.0: @ffff88040b7dc064 (virt) @fffbb064 (dma) 0x000000 - ep_info2
>[    1.733981] xhci_hcd 0000:00:14.0: @ffff88040b7dc068 (virt) @fffbb068 (dma) 0x000000 - deq
>[    1.733983] xhci_hcd 0000:00:14.0: @ffff88040b7dc070 (virt) @fffbb070 (dma) 0x000000 - tx_info
>[    1.733984] xhci_hcd 0000:00:14.0: @ffff88040b7dc074 (virt) @fffbb074 (dma) 0x000000 - rsvd[0]
>[    1.733986] xhci_hcd 0000:00:14.0: @ffff88040b7dc078 (virt) @fffbb078 (dma) 0x000000 - rsvd[1]
>[    1.733987] xhci_hcd 0000:00:14.0: @ffff88040b7dc07c (virt) @fffbb07c (dma) 0x000000 - rsvd[2]
>[    1.733989] xhci_hcd 0000:00:14.0: IN Endpoint 01 Context (ep_index 02):
>[    1.733990] xhci_hcd 0000:00:14.0: @ffff88040b7dc080 (virt) @fffbb080 (dma) 0x060000 - ep_info
>[    1.733992] xhci_hcd 0000:00:14.0: @ffff88040b7dc084 (virt) @fffbb084 (dma) 0x04003e - ep_info2
>[    1.733993] xhci_hcd 0000:00:14.0: @ffff88040b7dc088 (virt) @fffbb088 (dma) 0xfffba401 - deq
>[    1.733995] xhci_hcd 0000:00:14.0: @ffff88040b7dc090 (virt) @fffbb090 (dma) 0x040004 - tx_info
>[    1.733996] xhci_hcd 0000:00:14.0: @ffff88040b7dc094 (virt) @fffbb094 (dma) 0x000000 - rsvd[0]
>[    1.733998] xhci_hcd 0000:00:14.0: @ffff88040b7dc098 (virt) @fffbb098 (dma) 0x000000 - rsvd[1]
>[    1.733999] xhci_hcd 0000:00:14.0: @ffff88040b7dc09c (virt) @fffbb09c (dma) 0x000000 - rsvd[2]
>[    1.734001] xhci_hcd 0000:00:14.0: // Ding dong!
>[    1.734182] xhci_hcd 0000:00:14.0: Completed config ep cmd
>[    1.734204] xhci_hcd 0000:00:14.0: Successful Endpoint Configure command
>[    1.734207] xhci_hcd 0000:00:14.0: Output context after successful config ep cmd:
>[    1.734209] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.734211] xhci_hcd 0000:00:14.0: @ffff88040aa87000 (virt) @fffbc000 (dma) 0x1a200001 - dev_info
>[    1.734213] xhci_hcd 0000:00:14.0: @ffff88040aa87004 (virt) @fffbc004 (dma) 0x0e0000 - dev_info2
>[    1.734214] xhci_hcd 0000:00:14.0: @ffff88040aa87008 (virt) @fffbc008 (dma) 0x000101 - tt_info
>[    1.734216] xhci_hcd 0000:00:14.0: @ffff88040aa8700c (virt) @fffbc00c (dma) 0x18000003 - dev_state
>[    1.734217] xhci_hcd 0000:00:14.0: @ffff88040aa87010 (virt) @fffbc010 (dma) 0x000000 - rsvd[0]
>[    1.734219] xhci_hcd 0000:00:14.0: @ffff88040aa87014 (virt) @fffbc014 (dma) 0x000000 - rsvd[1]
>[    1.734221] xhci_hcd 0000:00:14.0: @ffff88040aa87018 (virt) @fffbc018 (dma) 0x000000 - rsvd[2]
>[    1.734222] xhci_hcd 0000:00:14.0: @ffff88040aa8701c (virt) @fffbc01c (dma) 0x000000 - rsvd[3]
>[    1.734224] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.734226] xhci_hcd 0000:00:14.0: @ffff88040aa87020 (virt) @fffbc020 (dma) 0x000001 - ep_info
>[    1.734227] xhci_hcd 0000:00:14.0: @ffff88040aa87024 (virt) @fffbc024 (dma) 0x080026 - ep_info2
>[    1.734229] xhci_hcd 0000:00:14.0: @ffff88040aa87028 (virt) @fffbc028 (dma) 0xfffd0801 - deq
>[    1.734230] xhci_hcd 0000:00:14.0: @ffff88040aa87030 (virt) @fffbc030 (dma) 0x000000 - tx_info
>[    1.734232] xhci_hcd 0000:00:14.0: @ffff88040aa87034 (virt) @fffbc034 (dma) 0x000000 - rsvd[0]
>[    1.734233] xhci_hcd 0000:00:14.0: @ffff88040aa87038 (virt) @fffbc038 (dma) 0x000000 - rsvd[1]
>[    1.734235] xhci_hcd 0000:00:14.0: @ffff88040aa8703c (virt) @fffbc03c (dma) 0x000000 - rsvd[2]
>[    1.734237] xhci_hcd 0000:00:14.0: OUT Endpoint 01 Context (ep_index 01):
>[    1.734238] xhci_hcd 0000:00:14.0: @ffff88040aa87040 (virt) @fffbc040 (dma) 0x000000 - ep_info
>[    1.734240] xhci_hcd 0000:00:14.0: @ffff88040aa87044 (virt) @fffbc044 (dma) 0x000000 - ep_info2
>[    1.734241] xhci_hcd 0000:00:14.0: @ffff88040aa87048 (virt) @fffbc048 (dma) 0x000000 - deq
>[    1.734243] xhci_hcd 0000:00:14.0: @ffff88040aa87050 (virt) @fffbc050 (dma) 0x000000 - tx_info
>[    1.734244] xhci_hcd 0000:00:14.0: @ffff88040aa87054 (virt) @fffbc054 (dma) 0x000000 - rsvd[0]
>[    1.734246] xhci_hcd 0000:00:14.0: @ffff88040aa87058 (virt) @fffbc058 (dma) 0x000000 - rsvd[1]
>[    1.734247] xhci_hcd 0000:00:14.0: @ffff88040aa8705c (virt) @fffbc05c (dma) 0x000000 - rsvd[2]
>[    1.734249] xhci_hcd 0000:00:14.0: IN Endpoint 01 Context (ep_index 02):
>[    1.734250] xhci_hcd 0000:00:14.0: @ffff88040aa87060 (virt) @fffbc060 (dma) 0x060001 - ep_info
>[    1.734251] xhci_hcd 0000:00:14.0: @ffff88040aa87064 (virt) @fffbc064 (dma) 0x04003e - ep_info2
>[    1.734253] xhci_hcd 0000:00:14.0: @ffff88040aa87068 (virt) @fffbc068 (dma) 0xfffba401 - deq
>[    1.734254] xhci_hcd 0000:00:14.0: @ffff88040aa87070 (virt) @fffbc070 (dma) 0x040004 - tx_info
>[    1.734264] xhci_hcd 0000:00:14.0: @ffff88040aa87074 (virt) @fffbc074 (dma) 0x000000 - rsvd[0]
>[    1.734266] xhci_hcd 0000:00:14.0: @ffff88040aa87078 (virt) @fffbc078 (dma) 0x000000 - rsvd[1]
>[    1.734267] xhci_hcd 0000:00:14.0: @ffff88040aa8707c (virt) @fffbc07c (dma) 0x000000 - rsvd[2]
>[    1.734270] xhci_hcd 0000:00:14.0: Endpoint 0x81 not halted, refusing to reset.
>[    1.734534] usb 2-14.1: adding 2-14.1:1.0 (config #1, interface 0)
>[    1.734565] usbhid 2-14.1:1.0: usb_probe_interface
>[    1.734567] usbhid 2-14.1:1.0: usb_probe_interface - got id
>[    1.734766] xhci_hcd 0000:00:14.0: Stalled endpoint
>[    1.734768] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[    1.734770] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[    1.734771] xhci_hcd 0000:00:14.0: Finding endpoint context
>[    1.734773] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[    1.734774] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[    1.734776] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040bc16220 (virtual)
>[    1.734778] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffd0990 (DMA)
>[    1.734779] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[    1.734781] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040bc16220 (0xfffd0800 dma), new deq ptr = ffff88040b775990 (0xfffd0990 dma), new cycle = 1
>[    1.734783] xhci_hcd 0000:00:14.0: // Ding dong!
>[    1.734786] xhci_hcd 0000:00:14.0: Giveback URB ffff88040b6c5840, len = 0, expected = 0, status = -32
>[    1.734789] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[    1.734791] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffd0991
>[    1.736159] input: Logitech USB Optical Mouse as /devices/pci0000:00/0000:00:14.0/usb2/2-14/2-14.1/2-14.1:1.0/input/input19
>[    1.736372] hid-generic 0003:046D:C05A.0001: input,hidraw0: USB HID v1.11 Mouse [Logitech USB Optical Mouse] on usb-0000:00:14.0-14.1/input0
>[    1.736680] hub 2-14:1.0: port 2, status 0301, change 0000, 1.5 Mb/s
>[    1.736972] xhci_hcd 0000:00:14.0: // Ding dong!
>[    1.736999] xhci_hcd 0000:00:14.0: Slot 4 output ctx = 0xfffe3000 (dma)
>[    1.737002] xhci_hcd 0000:00:14.0: Slot 4 input ctx = 0xfffe2000 (dma)
>[    1.737006] xhci_hcd 0000:00:14.0: Set slot id 4 dcbaa entry ffff88040ba94020 to 0xfffe3000
>[    1.799560] usb 2-14.2: new low-speed USB device number 4 using xhci_hcd
>[    1.799564] xhci_hcd 0000:00:14.0: Set root hub portnum to 14
>[    1.799565] xhci_hcd 0000:00:14.0: Set fake root hub portnum to 14
>[    1.799567] xhci_hcd 0000:00:14.0: udev->tt = ffff88040b63c0a0
>[    1.799569] xhci_hcd 0000:00:14.0: udev->ttport = 0x2
>[    1.799570] xhci_hcd 0000:00:14.0: Slot ID 4 Input Context:
>[    1.799572] xhci_hcd 0000:00:14.0: @ffff8800cacb9000 (virt) @fffe2000 (dma) 0x000000 - drop flags
>[    1.799574] xhci_hcd 0000:00:14.0: @ffff8800cacb9004 (virt) @fffe2004 (dma) 0x000003 - add flags
>[    1.799576] xhci_hcd 0000:00:14.0: @ffff8800cacb9008 (virt) @fffe2008 (dma) 0x000000 - rsvd2[0]
>[    1.799578] xhci_hcd 0000:00:14.0: @ffff8800cacb900c (virt) @fffe200c (dma) 0x000000 - rsvd2[1]
>[    1.799580] xhci_hcd 0000:00:14.0: @ffff8800cacb9010 (virt) @fffe2010 (dma) 0x000000 - rsvd2[2]
>[    1.799582] xhci_hcd 0000:00:14.0: @ffff8800cacb9014 (virt) @fffe2014 (dma) 0x000000 - rsvd2[3]
>[    1.799583] xhci_hcd 0000:00:14.0: @ffff8800cacb9018 (virt) @fffe2018 (dma) 0x000000 - rsvd2[4]
>[    1.799585] xhci_hcd 0000:00:14.0: @ffff8800cacb901c (virt) @fffe201c (dma) 0x000000 - rsvd2[5]
>[    1.799586] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.799588] xhci_hcd 0000:00:14.0: @ffff8800cacb9020 (virt) @fffe2020 (dma) 0xa200002 - dev_info
>[    1.799590] xhci_hcd 0000:00:14.0: @ffff8800cacb9024 (virt) @fffe2024 (dma) 0x0e0000 - dev_info2
>[    1.799592] xhci_hcd 0000:00:14.0: @ffff8800cacb9028 (virt) @fffe2028 (dma) 0x000201 - tt_info
>[    1.799593] xhci_hcd 0000:00:14.0: @ffff8800cacb902c (virt) @fffe202c (dma) 0x000000 - dev_state
>[    1.799595] xhci_hcd 0000:00:14.0: @ffff8800cacb9030 (virt) @fffe2030 (dma) 0x000000 - rsvd[0]
>[    1.799597] xhci_hcd 0000:00:14.0: @ffff8800cacb9034 (virt) @fffe2034 (dma) 0x000000 - rsvd[1]
>[    1.799598] xhci_hcd 0000:00:14.0: @ffff8800cacb9038 (virt) @fffe2038 (dma) 0x000000 - rsvd[2]
>[    1.799600] xhci_hcd 0000:00:14.0: @ffff8800cacb903c (virt) @fffe203c (dma) 0x000000 - rsvd[3]
>[    1.799602] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.799603] xhci_hcd 0000:00:14.0: @ffff8800cacb9040 (virt) @fffe2040 (dma) 0x000000 - ep_info
>[    1.799605] xhci_hcd 0000:00:14.0: @ffff8800cacb9044 (virt) @fffe2044 (dma) 0x080026 - ep_info2
>[    1.799607] xhci_hcd 0000:00:14.0: @ffff8800cacb9048 (virt) @fffe2048 (dma) 0xfffdf001 - deq
>[    1.799608] xhci_hcd 0000:00:14.0: @ffff8800cacb9050 (virt) @fffe2050 (dma) 0x000000 - tx_info
>[    1.799610] xhci_hcd 0000:00:14.0: @ffff8800cacb9054 (virt) @fffe2054 (dma) 0x000000 - rsvd[0]
>[    1.799612] xhci_hcd 0000:00:14.0: @ffff8800cacb9058 (virt) @fffe2058 (dma) 0x000000 - rsvd[1]
>[    1.799613] xhci_hcd 0000:00:14.0: @ffff8800cacb905c (virt) @fffe205c (dma) 0x000000 - rsvd[2]
>[    1.799615] xhci_hcd 0000:00:14.0: OUT Endpoint 01 Context (ep_index 01):
>[    1.799617] xhci_hcd 0000:00:14.0: @ffff8800cacb9060 (virt) @fffe2060 (dma) 0x000000 - ep_info
>[    1.799618] xhci_hcd 0000:00:14.0: @ffff8800cacb9064 (virt) @fffe2064 (dma) 0x000000 - ep_info2
>[    1.799620] xhci_hcd 0000:00:14.0: @ffff8800cacb9068 (virt) @fffe2068 (dma) 0x000000 - deq
>[    1.799621] xhci_hcd 0000:00:14.0: @ffff8800cacb9070 (virt) @fffe2070 (dma) 0x000000 - tx_info
>[    1.799623] xhci_hcd 0000:00:14.0: @ffff8800cacb9074 (virt) @fffe2074 (dma) 0x000000 - rsvd[0]
>[    1.799625] xhci_hcd 0000:00:14.0: @ffff8800cacb9078 (virt) @fffe2078 (dma) 0x000000 - rsvd[1]
>[    1.799626] xhci_hcd 0000:00:14.0: @ffff8800cacb907c (virt) @fffe207c (dma) 0x000000 - rsvd[2]
>[    1.799628] xhci_hcd 0000:00:14.0: IN Endpoint 01 Context (ep_index 02):
>[    1.799630] xhci_hcd 0000:00:14.0: @ffff8800cacb9080 (virt) @fffe2080 (dma) 0x000000 - ep_info
>[    1.799631] xhci_hcd 0000:00:14.0: @ffff8800cacb9084 (virt) @fffe2084 (dma) 0x000000 - ep_info2
>[    1.799633] xhci_hcd 0000:00:14.0: @ffff8800cacb9088 (virt) @fffe2088 (dma) 0x000000 - deq
>[    1.799634] xhci_hcd 0000:00:14.0: @ffff8800cacb9090 (virt) @fffe2090 (dma) 0x000000 - tx_info
>[    1.799636] xhci_hcd 0000:00:14.0: @ffff8800cacb9094 (virt) @fffe2094 (dma) 0x000000 - rsvd[0]
>[    1.799638] xhci_hcd 0000:00:14.0: @ffff8800cacb9098 (virt) @fffe2098 (dma) 0x000000 - rsvd[1]
>[    1.799639] xhci_hcd 0000:00:14.0: @ffff8800cacb909c (virt) @fffe209c (dma) 0x000000 - rsvd[2]
>[    1.799641] xhci_hcd 0000:00:14.0: // Ding dong!
>[    1.799905] xhci_hcd 0000:00:14.0: Successful Address Device command
>[    1.799910] xhci_hcd 0000:00:14.0: Op regs DCBAA ptr = 0x000000fffff000
>[    1.799912] xhci_hcd 0000:00:14.0: Slot ID 4 dcbaa entry @ffff88040ba94020 = 0x000000fffe3000
>[    1.799914] xhci_hcd 0000:00:14.0: Output Context DMA address = 0xfffe3000
>[    1.799916] xhci_hcd 0000:00:14.0: Slot ID 4 Input Context:
>[    1.799918] xhci_hcd 0000:00:14.0: @ffff8800cacb9000 (virt) @fffe2000 (dma) 0x000000 - drop flags
>[    1.799920] xhci_hcd 0000:00:14.0: @ffff8800cacb9004 (virt) @fffe2004 (dma) 0x000003 - add flags
>[    1.799922] xhci_hcd 0000:00:14.0: @ffff8800cacb9008 (virt) @fffe2008 (dma) 0x000000 - rsvd2[0]
>[    1.799923] xhci_hcd 0000:00:14.0: @ffff8800cacb900c (virt) @fffe200c (dma) 0x000000 - rsvd2[1]
>[    1.799925] xhci_hcd 0000:00:14.0: @ffff8800cacb9010 (virt) @fffe2010 (dma) 0x000000 - rsvd2[2]
>[    1.799926] xhci_hcd 0000:00:14.0: @ffff8800cacb9014 (virt) @fffe2014 (dma) 0x000000 - rsvd2[3]
>[    1.799928] xhci_hcd 0000:00:14.0: @ffff8800cacb9018 (virt) @fffe2018 (dma) 0x000000 - rsvd2[4]
>[    1.799930] xhci_hcd 0000:00:14.0: @ffff8800cacb901c (virt) @fffe201c (dma) 0x000000 - rsvd2[5]
>[    1.799931] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.799933] xhci_hcd 0000:00:14.0: @ffff8800cacb9020 (virt) @fffe2020 (dma) 0xa200002 - dev_info
>[    1.799934] xhci_hcd 0000:00:14.0: @ffff8800cacb9024 (virt) @fffe2024 (dma) 0x0e0000 - dev_info2
>[    1.799936] xhci_hcd 0000:00:14.0: @ffff8800cacb9028 (virt) @fffe2028 (dma) 0x000201 - tt_info
>[    1.799938] xhci_hcd 0000:00:14.0: @ffff8800cacb902c (virt) @fffe202c (dma) 0x000000 - dev_state
>[    1.799939] xhci_hcd 0000:00:14.0: @ffff8800cacb9030 (virt) @fffe2030 (dma) 0x000000 - rsvd[0]
>[    1.799941] xhci_hcd 0000:00:14.0: @ffff8800cacb9034 (virt) @fffe2034 (dma) 0x000000 - rsvd[1]
>[    1.799943] xhci_hcd 0000:00:14.0: @ffff8800cacb9038 (virt) @fffe2038 (dma) 0x000000 - rsvd[2]
>[    1.799944] xhci_hcd 0000:00:14.0: @ffff8800cacb903c (virt) @fffe203c (dma) 0x000000 - rsvd[3]
>[    1.799946] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.799948] xhci_hcd 0000:00:14.0: @ffff8800cacb9040 (virt) @fffe2040 (dma) 0x000000 - ep_info
>[    1.799949] xhci_hcd 0000:00:14.0: @ffff8800cacb9044 (virt) @fffe2044 (dma) 0x080026 - ep_info2
>[    1.799951] xhci_hcd 0000:00:14.0: @ffff8800cacb9048 (virt) @fffe2048 (dma) 0xfffdf001 - deq
>[    1.799953] xhci_hcd 0000:00:14.0: @ffff8800cacb9050 (virt) @fffe2050 (dma) 0x000000 - tx_info
>[    1.799954] xhci_hcd 0000:00:14.0: @ffff8800cacb9054 (virt) @fffe2054 (dma) 0x000000 - rsvd[0]
>[    1.799956] xhci_hcd 0000:00:14.0: @ffff8800cacb9058 (virt) @fffe2058 (dma) 0x000000 - rsvd[1]
>[    1.799958] xhci_hcd 0000:00:14.0: @ffff8800cacb905c (virt) @fffe205c (dma) 0x000000 - rsvd[2]
>[    1.799960] xhci_hcd 0000:00:14.0: OUT Endpoint 01 Context (ep_index 01):
>[    1.799961] xhci_hcd 0000:00:14.0: @ffff8800cacb9060 (virt) @fffe2060 (dma) 0x000000 - ep_info
>[    1.799963] xhci_hcd 0000:00:14.0: @ffff8800cacb9064 (virt) @fffe2064 (dma) 0x000000 - ep_info2
>[    1.799965] xhci_hcd 0000:00:14.0: @ffff8800cacb9068 (virt) @fffe2068 (dma) 0x000000 - deq
>[    1.799966] xhci_hcd 0000:00:14.0: @ffff8800cacb9070 (virt) @fffe2070 (dma) 0x000000 - tx_info
>[    1.799968] xhci_hcd 0000:00:14.0: @ffff8800cacb9074 (virt) @fffe2074 (dma) 0x000000 - rsvd[0]
>[    1.799970] xhci_hcd 0000:00:14.0: @ffff8800cacb9078 (virt) @fffe2078 (dma) 0x000000 - rsvd[1]
>[    1.799971] xhci_hcd 0000:00:14.0: @ffff8800cacb907c (virt) @fffe207c (dma) 0x000000 - rsvd[2]
>[    1.799973] xhci_hcd 0000:00:14.0: IN Endpoint 01 Context (ep_index 02):
>[    1.799974] xhci_hcd 0000:00:14.0: @ffff8800cacb9080 (virt) @fffe2080 (dma) 0x000000 - ep_info
>[    1.799976] xhci_hcd 0000:00:14.0: @ffff8800cacb9084 (virt) @fffe2084 (dma) 0x000000 - ep_info2
>[    1.799978] xhci_hcd 0000:00:14.0: @ffff8800cacb9088 (virt) @fffe2088 (dma) 0x000000 - deq
>[    1.799979] xhci_hcd 0000:00:14.0: @ffff8800cacb9090 (virt) @fffe2090 (dma) 0x000000 - tx_info
>[    1.799981] xhci_hcd 0000:00:14.0: @ffff8800cacb9094 (virt) @fffe2094 (dma) 0x000000 - rsvd[0]
>[    1.799983] xhci_hcd 0000:00:14.0: @ffff8800cacb9098 (virt) @fffe2098 (dma) 0x000000 - rsvd[1]
>[    1.799984] xhci_hcd 0000:00:14.0: @ffff8800cacb909c (virt) @fffe209c (dma) 0x000000 - rsvd[2]
>[    1.799986] xhci_hcd 0000:00:14.0: Slot ID 4 Output Context:
>[    1.799987] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.799989] xhci_hcd 0000:00:14.0: @ffff8800caf4e000 (virt) @fffe3000 (dma) 0xa200002 - dev_info
>[    1.799990] xhci_hcd 0000:00:14.0: @ffff8800caf4e004 (virt) @fffe3004 (dma) 0x0e0000 - dev_info2
>[    1.799992] xhci_hcd 0000:00:14.0: @ffff8800caf4e008 (virt) @fffe3008 (dma) 0x000201 - tt_info
>[    1.799993] xhci_hcd 0000:00:14.0: @ffff8800caf4e00c (virt) @fffe300c (dma) 0x10000004 - dev_state
>[    1.799995] xhci_hcd 0000:00:14.0: @ffff8800caf4e010 (virt) @fffe3010 (dma) 0x000000 - rsvd[0]
>[    1.799997] xhci_hcd 0000:00:14.0: @ffff8800caf4e014 (virt) @fffe3014 (dma) 0x000000 - rsvd[1]
>[    1.799998] xhci_hcd 0000:00:14.0: @ffff8800caf4e018 (virt) @fffe3018 (dma) 0x000000 - rsvd[2]
>[    1.800000] xhci_hcd 0000:00:14.0: @ffff8800caf4e01c (virt) @fffe301c (dma) 0x000000 - rsvd[3]
>[    1.800002] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.800003] xhci_hcd 0000:00:14.0: @ffff8800caf4e020 (virt) @fffe3020 (dma) 0x000001 - ep_info
>[    1.800005] xhci_hcd 0000:00:14.0: @ffff8800caf4e024 (virt) @fffe3024 (dma) 0x080026 - ep_info2
>[    1.800007] xhci_hcd 0000:00:14.0: @ffff8800caf4e028 (virt) @fffe3028 (dma) 0xfffdf001 - deq
>[    1.800008] xhci_hcd 0000:00:14.0: @ffff8800caf4e030 (virt) @fffe3030 (dma) 0x000000 - tx_info
>[    1.800010] xhci_hcd 0000:00:14.0: @ffff8800caf4e034 (virt) @fffe3034 (dma) 0x000000 - rsvd[0]
>[    1.800012] xhci_hcd 0000:00:14.0: @ffff8800caf4e038 (virt) @fffe3038 (dma) 0x000000 - rsvd[1]
>[    1.800013] xhci_hcd 0000:00:14.0: @ffff8800caf4e03c (virt) @fffe303c (dma) 0x000000 - rsvd[2]
>[    1.800015] xhci_hcd 0000:00:14.0: OUT Endpoint 01 Context (ep_index 01):
>[    1.800017] xhci_hcd 0000:00:14.0: @ffff8800caf4e040 (virt) @fffe3040 (dma) 0x000000 - ep_info
>[    1.800018] xhci_hcd 0000:00:14.0: @ffff8800caf4e044 (virt) @fffe3044 (dma) 0x000000 - ep_info2
>[    1.800020] xhci_hcd 0000:00:14.0: @ffff8800caf4e048 (virt) @fffe3048 (dma) 0x000000 - deq
>[    1.800021] xhci_hcd 0000:00:14.0: @ffff8800caf4e050 (virt) @fffe3050 (dma) 0x000000 - tx_info
>[    1.800023] xhci_hcd 0000:00:14.0: @ffff8800caf4e054 (virt) @fffe3054 (dma) 0x000000 - rsvd[0]
>[    1.800025] xhci_hcd 0000:00:14.0: @ffff8800caf4e058 (virt) @fffe3058 (dma) 0x000000 - rsvd[1]
>[    1.800026] xhci_hcd 0000:00:14.0: @ffff8800caf4e05c (virt) @fffe305c (dma) 0x000000 - rsvd[2]
>[    1.800028] xhci_hcd 0000:00:14.0: IN Endpoint 01 Context (ep_index 02):
>[    1.800029] xhci_hcd 0000:00:14.0: @ffff8800caf4e060 (virt) @fffe3060 (dma) 0x000000 - ep_info
>[    1.800031] xhci_hcd 0000:00:14.0: @ffff8800caf4e064 (virt) @fffe3064 (dma) 0x000000 - ep_info2
>[    1.800033] xhci_hcd 0000:00:14.0: @ffff8800caf4e068 (virt) @fffe3068 (dma) 0x000000 - deq
>[    1.800034] xhci_hcd 0000:00:14.0: @ffff8800caf4e070 (virt) @fffe3070 (dma) 0x000000 - tx_info
>[    1.800036] xhci_hcd 0000:00:14.0: @ffff8800caf4e074 (virt) @fffe3074 (dma) 0x000000 - rsvd[0]
>[    1.800037] xhci_hcd 0000:00:14.0: @ffff8800caf4e078 (virt) @fffe3078 (dma) 0x000000 - rsvd[1]
>[    1.800039] xhci_hcd 0000:00:14.0: @ffff8800caf4e07c (virt) @fffe307c (dma) 0x000000 - rsvd[2]
>[    1.800041] xhci_hcd 0000:00:14.0: Internal device address = 5
>[    1.814014] usb 2-14.2: skipped 1 descriptor after interface
>[    1.814018] usb 2-14.2: skipped 1 descriptor after interface
>[    1.814422] xhci_hcd 0000:00:14.0: Waiting for status stage event
>[    1.814503] usb 2-14.2: default language 0x0409
>[    1.815334] xhci_hcd 0000:00:14.0: Waiting for status stage event
>[    1.816218] xhci_hcd 0000:00:14.0: Waiting for status stage event
>[    1.816320] usb 2-14.2: udev 4, busnum 2, minor = 131
>[    1.816324] usb 2-14.2: New USB device found, idVendor=046d, idProduct=c31c
>[    1.816326] usb 2-14.2: New USB device strings: Mfr=1, Product=2, SerialNumber=0
>[    1.816328] usb 2-14.2: Product: USB Keyboard
>[    1.816329] usb 2-14.2: Manufacturer: Logitech
>[    1.816414] usb 2-14.2: usb_probe_device
>[    1.816418] usb 2-14.2: configuration #1 chosen from 1 choice
>[    1.816424] usb 2-14.2: ep 0x81 - rounding interval to 64 microframes, ep desc says 80 microframes
>[    1.816427] xhci_hcd 0000:00:14.0: add ep 0x81, slot id 4, new drop flags = 0x0, new add flags = 0x8, new slot info = 0x1a200002
>[    1.816430] usb 2-14.2: ep 0x82 - rounding interval to 1024 microframes, ep desc says 2040 microframes
>[    1.816432] xhci_hcd 0000:00:14.0: add ep 0x82, slot id 4, new drop flags = 0x0, new add flags = 0x28, new slot info = 0x2a200002
>[    1.816434] xhci_hcd 0000:00:14.0: xhci_check_bandwidth called for udev ffff88040b525000
>[    1.816436] xhci_hcd 0000:00:14.0: New Input Control Context:
>[    1.816438] xhci_hcd 0000:00:14.0: @ffff8800cacb9000 (virt) @fffe2000 (dma) 0x000000 - drop flags
>[    1.816440] xhci_hcd 0000:00:14.0: @ffff8800cacb9004 (virt) @fffe2004 (dma) 0x000029 - add flags
>[    1.816442] xhci_hcd 0000:00:14.0: @ffff8800cacb9008 (virt) @fffe2008 (dma) 0x000000 - rsvd2[0]
>[    1.816443] xhci_hcd 0000:00:14.0: @ffff8800cacb900c (virt) @fffe200c (dma) 0x000000 - rsvd2[1]
>[    1.816445] xhci_hcd 0000:00:14.0: @ffff8800cacb9010 (virt) @fffe2010 (dma) 0x000000 - rsvd2[2]
>[    1.816447] xhci_hcd 0000:00:14.0: @ffff8800cacb9014 (virt) @fffe2014 (dma) 0x000000 - rsvd2[3]
>[    1.816448] xhci_hcd 0000:00:14.0: @ffff8800cacb9018 (virt) @fffe2018 (dma) 0x000000 - rsvd2[4]
>[    1.816450] xhci_hcd 0000:00:14.0: @ffff8800cacb901c (virt) @fffe201c (dma) 0x000000 - rsvd2[5]
>[    1.816451] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.816453] xhci_hcd 0000:00:14.0: @ffff8800cacb9020 (virt) @fffe2020 (dma) 0x2a200002 - dev_info
>[    1.816454] xhci_hcd 0000:00:14.0: @ffff8800cacb9024 (virt) @fffe2024 (dma) 0x0e0000 - dev_info2
>[    1.816456] xhci_hcd 0000:00:14.0: @ffff8800cacb9028 (virt) @fffe2028 (dma) 0x000201 - tt_info
>[    1.816458] xhci_hcd 0000:00:14.0: @ffff8800cacb902c (virt) @fffe202c (dma) 0x000000 - dev_state
>[    1.816459] xhci_hcd 0000:00:14.0: @ffff8800cacb9030 (virt) @fffe2030 (dma) 0x000000 - rsvd[0]
>[    1.816461] xhci_hcd 0000:00:14.0: @ffff8800cacb9034 (virt) @fffe2034 (dma) 0x000000 - rsvd[1]
>[    1.816463] xhci_hcd 0000:00:14.0: @ffff8800cacb9038 (virt) @fffe2038 (dma) 0x000000 - rsvd[2]
>[    1.816464] xhci_hcd 0000:00:14.0: @ffff8800cacb903c (virt) @fffe203c (dma) 0x000000 - rsvd[3]
>[    1.816466] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.816468] xhci_hcd 0000:00:14.0: @ffff8800cacb9040 (virt) @fffe2040 (dma) 0x000000 - ep_info
>[    1.816469] xhci_hcd 0000:00:14.0: @ffff8800cacb9044 (virt) @fffe2044 (dma) 0x080026 - ep_info2
>[    1.816471] xhci_hcd 0000:00:14.0: @ffff8800cacb9048 (virt) @fffe2048 (dma) 0xfffdf001 - deq
>[    1.816473] xhci_hcd 0000:00:14.0: @ffff8800cacb9050 (virt) @fffe2050 (dma) 0x000000 - tx_info
>[    1.816474] xhci_hcd 0000:00:14.0: @ffff8800cacb9054 (virt) @fffe2054 (dma) 0x000000 - rsvd[0]
>[    1.816476] xhci_hcd 0000:00:14.0: @ffff8800cacb9058 (virt) @fffe2058 (dma) 0x000000 - rsvd[1]
>[    1.816478] xhci_hcd 0000:00:14.0: @ffff8800cacb905c (virt) @fffe205c (dma) 0x000000 - rsvd[2]
>[    1.816480] xhci_hcd 0000:00:14.0: OUT Endpoint 01 Context (ep_index 01):
>[    1.816481] xhci_hcd 0000:00:14.0: @ffff8800cacb9060 (virt) @fffe2060 (dma) 0x000000 - ep_info
>[    1.816483] xhci_hcd 0000:00:14.0: @ffff8800cacb9064 (virt) @fffe2064 (dma) 0x000000 - ep_info2
>[    1.816485] xhci_hcd 0000:00:14.0: @ffff8800cacb9068 (virt) @fffe2068 (dma) 0x000000 - deq
>[    1.816486] xhci_hcd 0000:00:14.0: @ffff8800cacb9070 (virt) @fffe2070 (dma) 0x000000 - tx_info
>[    1.816488] xhci_hcd 0000:00:14.0: @ffff8800cacb9074 (virt) @fffe2074 (dma) 0x000000 - rsvd[0]
>[    1.816490] xhci_hcd 0000:00:14.0: @ffff8800cacb9078 (virt) @fffe2078 (dma) 0x000000 - rsvd[1]
>[    1.816491] xhci_hcd 0000:00:14.0: @ffff8800cacb907c (virt) @fffe207c (dma) 0x000000 - rsvd[2]
>[    1.816493] xhci_hcd 0000:00:14.0: IN Endpoint 01 Context (ep_index 02):
>[    1.816494] xhci_hcd 0000:00:14.0: @ffff8800cacb9080 (virt) @fffe2080 (dma) 0x060000 - ep_info
>[    1.816496] xhci_hcd 0000:00:14.0: @ffff8800cacb9084 (virt) @fffe2084 (dma) 0x08003e - ep_info2
>[    1.816498] xhci_hcd 0000:00:14.0: @ffff8800cacb9088 (virt) @fffe2088 (dma) 0xfffdf801 - deq
>[    1.816499] xhci_hcd 0000:00:14.0: @ffff8800cacb9090 (virt) @fffe2090 (dma) 0x080008 - tx_info
>[    1.816501] xhci_hcd 0000:00:14.0: @ffff8800cacb9094 (virt) @fffe2094 (dma) 0x000000 - rsvd[0]
>[    1.816503] xhci_hcd 0000:00:14.0: @ffff8800cacb9098 (virt) @fffe2098 (dma) 0x000000 - rsvd[1]
>[    1.816504] xhci_hcd 0000:00:14.0: @ffff8800cacb909c (virt) @fffe209c (dma) 0x000000 - rsvd[2]
>[    1.816506] xhci_hcd 0000:00:14.0: OUT Endpoint 02 Context (ep_index 03):
>[    1.816507] xhci_hcd 0000:00:14.0: @ffff8800cacb90a0 (virt) @fffe20a0 (dma) 0x000000 - ep_info
>[    1.816509] xhci_hcd 0000:00:14.0: @ffff8800cacb90a4 (virt) @fffe20a4 (dma) 0x000000 - ep_info2
>[    1.816511] xhci_hcd 0000:00:14.0: @ffff8800cacb90a8 (virt) @fffe20a8 (dma) 0x000000 - deq
>[    1.816512] xhci_hcd 0000:00:14.0: @ffff8800cacb90b0 (virt) @fffe20b0 (dma) 0x000000 - tx_info
>[    1.816514] xhci_hcd 0000:00:14.0: @ffff8800cacb90b4 (virt) @fffe20b4 (dma) 0x000000 - rsvd[0]
>[    1.816515] xhci_hcd 0000:00:14.0: @ffff8800cacb90b8 (virt) @fffe20b8 (dma) 0x000000 - rsvd[1]
>[    1.816517] xhci_hcd 0000:00:14.0: @ffff8800cacb90bc (virt) @fffe20bc (dma) 0x000000 - rsvd[2]
>[    1.816519] xhci_hcd 0000:00:14.0: IN Endpoint 02 Context (ep_index 04):
>[    1.816520] xhci_hcd 0000:00:14.0: @ffff8800cacb90c0 (virt) @fffe20c0 (dma) 0x0a0000 - ep_info
>[    1.816522] xhci_hcd 0000:00:14.0: @ffff8800cacb90c4 (virt) @fffe20c4 (dma) 0x04003e - ep_info2
>[    1.816523] xhci_hcd 0000:00:14.0: @ffff8800cacb90c8 (virt) @fffe20c8 (dma) 0xfffd1401 - deq
>[    1.816525] xhci_hcd 0000:00:14.0: @ffff8800cacb90d0 (virt) @fffe20d0 (dma) 0x040004 - tx_info
>[    1.816527] xhci_hcd 0000:00:14.0: @ffff8800cacb90d4 (virt) @fffe20d4 (dma) 0x000000 - rsvd[0]
>[    1.816528] xhci_hcd 0000:00:14.0: @ffff8800cacb90d8 (virt) @fffe20d8 (dma) 0x000000 - rsvd[1]
>[    1.816530] xhci_hcd 0000:00:14.0: @ffff8800cacb90dc (virt) @fffe20dc (dma) 0x000000 - rsvd[2]
>[    1.816532] xhci_hcd 0000:00:14.0: // Ding dong!
>[    1.816750] xhci_hcd 0000:00:14.0: Completed config ep cmd
>[    1.816760] xhci_hcd 0000:00:14.0: Successful Endpoint Configure command
>[    1.816762] xhci_hcd 0000:00:14.0: Output context after successful config ep cmd:
>[    1.816763] xhci_hcd 0000:00:14.0: Slot Context:
>[    1.816766] xhci_hcd 0000:00:14.0: @ffff8800caf4e000 (virt) @fffe3000 (dma) 0x2a200002 - dev_info
>[    1.816768] xhci_hcd 0000:00:14.0: @ffff8800caf4e004 (virt) @fffe3004 (dma) 0x0e0000 - dev_info2
>[    1.816769] xhci_hcd 0000:00:14.0: @ffff8800caf4e008 (virt) @fffe3008 (dma) 0x000201 - tt_info
>[    1.816771] xhci_hcd 0000:00:14.0: @ffff8800caf4e00c (virt) @fffe300c (dma) 0x18000004 - dev_state
>[    1.816773] xhci_hcd 0000:00:14.0: @ffff8800caf4e010 (virt) @fffe3010 (dma) 0x000000 - rsvd[0]
>[    1.816775] xhci_hcd 0000:00:14.0: @ffff8800caf4e014 (virt) @fffe3014 (dma) 0x000000 - rsvd[1]
>[    1.816777] xhci_hcd 0000:00:14.0: @ffff8800caf4e018 (virt) @fffe3018 (dma) 0x000000 - rsvd[2]
>[    1.816778] xhci_hcd 0000:00:14.0: @ffff8800caf4e01c (virt) @fffe301c (dma) 0x000000 - rsvd[3]
>[    1.816780] xhci_hcd 0000:00:14.0: IN Endpoint 00 Context (ep_index 00):
>[    1.816782] xhci_hcd 0000:00:14.0: @ffff8800caf4e020 (virt) @fffe3020 (dma) 0x000001 - ep_info
>[    1.816783] xhci_hcd 0000:00:14.0: @ffff8800caf4e024 (virt) @fffe3024 (dma) 0x080026 - ep_info2
>[    1.816785] xhci_hcd 0000:00:14.0: @ffff8800caf4e028 (virt) @fffe3028 (dma) 0xfffdf001 - deq
>[    1.816787] xhci_hcd 0000:00:14.0: @ffff8800caf4e030 (virt) @fffe3030 (dma) 0x000000 - tx_info
>[    1.816788] xhci_hcd 0000:00:14.0: @ffff8800caf4e034 (virt) @fffe3034 (dma) 0x000000 - rsvd[0]
>[    1.816790] xhci_hcd 0000:00:14.0: @ffff8800caf4e038 (virt) @fffe3038 (dma) 0x000000 - rsvd[1]
>[    1.816792] xhci_hcd 0000:00:14.0: @ffff8800caf4e03c (virt) @fffe303c (dma) 0x000000 - rsvd[2]
>[    1.816793] xhci_hcd 0000:00:14.0: OUT Endpoint 01 Context (ep_index 01):
>[    1.816795] xhci_hcd 0000:00:14.0: @ffff8800caf4e040 (virt) @fffe3040 (dma) 0x000000 - ep_info
>[    1.816797] xhci_hcd 0000:00:14.0: @ffff8800caf4e044 (virt) @fffe3044 (dma) 0x000000 - ep_info2
>[    1.816798] xhci_hcd 0000:00:14.0: @ffff8800caf4e048 (virt) @fffe3048 (dma) 0x000000 - deq
>[    1.816800] xhci_hcd 0000:00:14.0: @ffff8800caf4e050 (virt) @fffe3050 (dma) 0x000000 - tx_info
>[    1.816802] xhci_hcd 0000:00:14.0: @ffff8800caf4e054 (virt) @fffe3054 (dma) 0x000000 - rsvd[0]
>[    1.816803] xhci_hcd 0000:00:14.0: @ffff8800caf4e058 (virt) @fffe3058 (dma) 0x000000 - rsvd[1]
>[    1.816805] xhci_hcd 0000:00:14.0: @ffff8800caf4e05c (virt) @fffe305c (dma) 0x000000 - rsvd[2]
>[    1.816807] xhci_hcd 0000:00:14.0: IN Endpoint 01 Context (ep_index 02):
>[    1.816808] xhci_hcd 0000:00:14.0: @ffff8800caf4e060 (virt) @fffe3060 (dma) 0x060001 - ep_info
>[    1.816810] xhci_hcd 0000:00:14.0: @ffff8800caf4e064 (virt) @fffe3064 (dma) 0x08003e - ep_info2
>[    1.816812] xhci_hcd 0000:00:14.0: @ffff8800caf4e068 (virt) @fffe3068 (dma) 0xfffdf801 - deq
>[    1.816813] xhci_hcd 0000:00:14.0: @ffff8800caf4e070 (virt) @fffe3070 (dma) 0x080008 - tx_info
>[    1.816815] xhci_hcd 0000:00:14.0: @ffff8800caf4e074 (virt) @fffe3074 (dma) 0x000000 - rsvd[0]
>[    1.816817] xhci_hcd 0000:00:14.0: @ffff8800caf4e078 (virt) @fffe3078 (dma) 0x000000 - rsvd[1]
>[    1.816818] xhci_hcd 0000:00:14.0: @ffff8800caf4e07c (virt) @fffe307c (dma) 0x000000 - rsvd[2]
>[    1.816820] xhci_hcd 0000:00:14.0: OUT Endpoint 02 Context (ep_index 03):
>[    1.816821] xhci_hcd 0000:00:14.0: @ffff8800caf4e080 (virt) @fffe3080 (dma) 0x000000 - ep_info
>[    1.816823] xhci_hcd 0000:00:14.0: @ffff8800caf4e084 (virt) @fffe3084 (dma) 0x000000 - ep_info2
>[    1.816825] xhci_hcd 0000:00:14.0: @ffff8800caf4e088 (virt) @fffe3088 (dma) 0x000000 - deq
>[    1.816826] xhci_hcd 0000:00:14.0: @ffff8800caf4e090 (virt) @fffe3090 (dma) 0x000000 - tx_info
>[    1.816828] xhci_hcd 0000:00:14.0: @ffff8800caf4e094 (virt) @fffe3094 (dma) 0x000000 - rsvd[0]
>[    1.816829] xhci_hcd 0000:00:14.0: @ffff8800caf4e098 (virt) @fffe3098 (dma) 0x000000 - rsvd[1]
>[    1.816831] xhci_hcd 0000:00:14.0: @ffff8800caf4e09c (virt) @fffe309c (dma) 0x000000 - rsvd[2]
>[    1.816833] xhci_hcd 0000:00:14.0: IN Endpoint 02 Context (ep_index 04):
>[    1.816834] xhci_hcd 0000:00:14.0: @ffff8800caf4e0a0 (virt) @fffe30a0 (dma) 0x0a0001 - ep_info
>[    1.816836] xhci_hcd 0000:00:14.0: @ffff8800caf4e0a4 (virt) @fffe30a4 (dma) 0x04003e - ep_info2
>[    1.816837] xhci_hcd 0000:00:14.0: @ffff8800caf4e0a8 (virt) @fffe30a8 (dma) 0xfffd1401 - deq
>[    1.816839] xhci_hcd 0000:00:14.0: @ffff8800caf4e0b0 (virt) @fffe30b0 (dma) 0x040004 - tx_info
>[    1.816841] xhci_hcd 0000:00:14.0: @ffff8800caf4e0b4 (virt) @fffe30b4 (dma) 0x000000 - rsvd[0]
>[    1.816842] xhci_hcd 0000:00:14.0: @ffff8800caf4e0b8 (virt) @fffe30b8 (dma) 0x000000 - rsvd[1]
>[    1.816844] xhci_hcd 0000:00:14.0: @ffff8800caf4e0bc (virt) @fffe30bc (dma) 0x000000 - rsvd[2]
>[    1.816847] xhci_hcd 0000:00:14.0: Endpoint 0x81 not halted, refusing to reset.
>[    1.816850] xhci_hcd 0000:00:14.0: Endpoint 0x82 not halted, refusing to reset.
>[    1.818058] xhci_hcd 0000:00:14.0: Waiting for status stage event
>[    1.818196] usb 2-14.2: adding 2-14.2:1.0 (config #1, interface 0)
>[    1.819204] xhci_hcd 0000:00:14.0: Waiting for status stage event
>[    1.819316] usbhid 2-14.2:1.0: usb_probe_interface
>[    1.819318] usbhid 2-14.2:1.0: usb_probe_interface - got id
>[    1.821612] input: Logitech USB Keyboard as /devices/pci0000:00/0000:00:14.0/usb2/2-14/2-14.2/2-14.2:1.0/input/input20
>[    1.821748] hid-generic 0003:046D:C31C.0002: input,hidraw1: USB HID v1.10 Keyboard [Logitech USB Keyboard] on usb-0000:00:14.0-14.2/input0
>[    1.821765] usb 2-14.2: adding 2-14.2:1.1 (config #1, interface 1)
>[    1.822735] xhci_hcd 0000:00:14.0: Waiting for status stage event
>[    1.822857] usbhid 2-14.2:1.1: usb_probe_interface
>[    1.822860] usbhid 2-14.2:1.1: usb_probe_interface - got id
>[    1.827985] xhci_hcd 0000:00:14.0: Waiting for status stage event
>[    1.828495] xhci_hcd 0000:00:14.0: Waiting for status stage event
>[    1.828913] xhci_hcd 0000:00:14.0: Waiting for status stage event
>[    1.829039] input: Logitech USB Keyboard as /devices/pci0000:00/0000:00:14.0/usb2/2-14/2-14.2/2-14.2:1.1/input/input21
>[    1.829148] hid-generic 0003:046D:C31C.0003: input,hidraw2: USB HID v1.10 Device [Logitech USB Keyboard] on usb-0000:00:14.0-14.2/input1
>[    2.224408] Switched to clocksource tsc
>[    2.363975] Adding 33554428k swap on /dev/sda4.  Priority:-1 extents:1 across:33554428k SS
>[    2.599522] EXT4-fs (sda5): re-mounted. Opts: acl,user_xattr
>[    2.657410] scsi 6:0:0:0: Direct-Access     Generic  STORAGE DEVICE   0556 PQ: 0 ANSI: 5
>[    2.657742] sd 6:0:0:0: Attached scsi generic sg3 type 0
>[    2.657857] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[    2.657869] xhci_hcd 0000:00:14.0: Giveback URB ffff88040a88c180, len = 18, expected = 96, status = -121
>[    2.657892] xhci_hcd 0000:00:14.0: Stalled endpoint
>[    2.657899] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[    2.658085] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[    2.658092] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[    2.658097] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[    2.658101] xhci_hcd 0000:00:14.0: Finding endpoint context
>[    2.658105] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[    2.658109] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[    2.658114] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[    2.658118] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0450 (DMA)
>[    2.658122] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[    2.658129] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f450 (0xfffe0450 dma), new cycle = 1
>[    2.658133] xhci_hcd 0000:00:14.0: // Ding dong!
>[    2.658139] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[    2.658152] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[    2.658167] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0451
>[    2.658643] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[    2.658655] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c718780, len = 18, expected = 96, status = -121
>[    2.658691] xhci_hcd 0000:00:14.0: Stalled endpoint
>[    2.658708] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[    2.658914] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[    2.658923] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[    2.658929] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[    2.658936] xhci_hcd 0000:00:14.0: Finding endpoint context
>[    2.658942] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[    2.658948] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[    2.658955] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[    2.658962] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0490 (DMA)
>[    2.658968] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[    2.658977] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f490 (0xfffe0490 dma), new cycle = 1
>[    2.658984] xhci_hcd 0000:00:14.0: // Ding dong!
>[    2.659003] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[    2.659016] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0491
>[    2.659079] sd 6:0:0:0: [sdc] Attached SCSI removable disk
>[    2.659228] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[    2.659237] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c718780, len = 18, expected = 96, status = -121
>[    2.659268] xhci_hcd 0000:00:14.0: Stalled endpoint
>[    2.659280] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[    2.659475] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[    2.659484] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[    2.659490] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[    2.659497] xhci_hcd 0000:00:14.0: Finding endpoint context
>[    2.659503] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[    2.659510] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[    2.659516] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[    2.659523] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe04d0 (DMA)
>[    2.659530] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[    2.659539] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f4d0 (0xfffe04d0 dma), new cycle = 1
>[    2.659546] xhci_hcd 0000:00:14.0: // Ding dong!
>[    2.659561] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[    2.659570] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe04d1
>[    2.662098] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[    2.662107] xhci_hcd 0000:00:14.0: Giveback URB ffff88040926d3c0, len = 18, expected = 96, status = -121
>[    2.662133] xhci_hcd 0000:00:14.0: Stalled endpoint
>[    2.662139] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[    2.662317] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[    2.662322] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[    2.662326] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[    2.662330] xhci_hcd 0000:00:14.0: Finding endpoint context
>[    2.662334] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[    2.662338] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[    2.662342] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[    2.662347] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0510 (DMA)
>[    2.662351] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[    2.662357] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f510 (0xfffe0510 dma), new cycle = 1
>[    2.662361] xhci_hcd 0000:00:14.0: // Ding dong!
>[    2.662368] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[    2.662379] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[    2.662386] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0511
>[    2.662617] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[    2.662623] xhci_hcd 0000:00:14.0: Giveback URB ffff88040926d3c0, len = 18, expected = 96, status = -121
>[    2.662654] xhci_hcd 0000:00:14.0: Stalled endpoint
>[    2.662662] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[    2.662846] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[    2.662850] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[    2.662854] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[    2.662858] xhci_hcd 0000:00:14.0: Finding endpoint context
>[    2.662862] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[    2.662866] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[    2.662870] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[    2.662874] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0550 (DMA)
>[    2.662878] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[    2.662884] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f550 (0xfffe0550 dma), new cycle = 1
>[    2.662888] xhci_hcd 0000:00:14.0: // Ding dong!
>[    2.662895] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[    2.662904] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[    2.662911] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0551
>[    2.664917] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[    2.664925] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c7183c0, len = 18, expected = 96, status = -121
>[    2.664952] xhci_hcd 0000:00:14.0: Stalled endpoint
>[    2.664958] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[    2.665136] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[    2.665140] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[    2.665144] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[    2.665148] xhci_hcd 0000:00:14.0: Finding endpoint context
>[    2.665152] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[    2.665156] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[    2.665160] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[    2.665165] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0590 (DMA)
>[    2.665168] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[    2.665174] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f590 (0xfffe0590 dma), new cycle = 1
>[    2.665179] xhci_hcd 0000:00:14.0: // Ding dong!
>[    2.665185] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[    2.665196] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[    2.665211] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0591
>[    2.667075] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[    2.667085] xhci_hcd 0000:00:14.0: Giveback URB ffff8800caee2cc0, len = 18, expected = 96, status = -121
>[    2.667111] xhci_hcd 0000:00:14.0: Stalled endpoint
>[    2.667117] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[    2.667295] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[    2.667300] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[    2.667304] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[    2.667308] xhci_hcd 0000:00:14.0: Finding endpoint context
>[    2.667312] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[    2.667316] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[    2.667321] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[    2.667325] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe05d0 (DMA)
>[    2.667329] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[    2.667335] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f5d0 (0xfffe05d0 dma), new cycle = 1
>[    2.667340] xhci_hcd 0000:00:14.0: // Ding dong!
>[    2.667346] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[    2.667359] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[    2.667372] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe05d1
>[    2.760906] EXT4-fs (sdb3): mounted filesystem with ordered data mode. Opts: acl,user_xattr
>[    3.603585] IPv6: ADDRCONF(NETDEV_UP): enp5s0: link is not ready
>[    3.603592] 8021q: adding VLAN 0 to HW filter on device enp5s0
>[    3.855003] IPv6: ADDRCONF(NETDEV_UP): enp6s0: link is not ready
>[    3.855012] 8021q: adding VLAN 0 to HW filter on device enp6s0
>[    5.112775] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[    5.112791] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c17b6c0, len = 18, expected = 96, status = -121
>[    5.112827] xhci_hcd 0000:00:14.0: Stalled endpoint
>[    5.112844] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[    5.113063] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[    5.113071] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[    5.113075] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[    5.113079] xhci_hcd 0000:00:14.0: Finding endpoint context
>[    5.113083] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[    5.113088] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[    5.113099] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[    5.113112] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0610 (DMA)
>[    5.113124] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[    5.113137] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f610 (0xfffe0610 dma), new cycle = 1
>[    5.113141] xhci_hcd 0000:00:14.0: // Ding dong!
>[    5.113157] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[    5.113167] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0611
>[    6.735923] igb: enp6s0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: RX/TX
>[    6.736329] IPv6: ADDRCONF(NETDEV_CHANGE): enp6s0: link becomes ready
>[    7.160610] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[    7.160615] xhci_hcd 0000:00:14.0: Giveback URB ffff8804063959c0, len = 18, expected = 96, status = -121
>[    7.160636] xhci_hcd 0000:00:14.0: Stalled endpoint
>[    7.160639] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[    7.160817] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[    7.160820] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[    7.160822] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[    7.160823] xhci_hcd 0000:00:14.0: Finding endpoint context
>[    7.160825] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[    7.160826] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[    7.160828] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[    7.160830] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0650 (DMA)
>[    7.160831] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[    7.160833] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f650 (0xfffe0650 dma), new cycle = 1
>[    7.160835] xhci_hcd 0000:00:14.0: // Ding dong!
>[    7.160839] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[    7.160846] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[    7.160849] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0651
>[    9.208586] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[    9.208599] xhci_hcd 0000:00:14.0: Giveback URB ffff880406395240, len = 18, expected = 96, status = -121
>[    9.208647] xhci_hcd 0000:00:14.0: Stalled endpoint
>[    9.208661] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[    9.208885] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[    9.208897] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[    9.208902] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[    9.208906] xhci_hcd 0000:00:14.0: Finding endpoint context
>[    9.208911] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[    9.208915] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[    9.208920] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[    9.208924] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0690 (DMA)
>[    9.208928] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[    9.208935] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f690 (0xfffe0690 dma), new cycle = 1
>[    9.208940] xhci_hcd 0000:00:14.0: // Ding dong!
>[    9.208962] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[    9.208986] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0691
>[   11.256274] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   11.256279] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c2096c0, len = 18, expected = 96, status = -121
>[   11.256314] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   11.256319] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   11.256492] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   11.256495] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   11.256497] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   11.256498] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   11.256500] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   11.256502] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   11.256504] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[   11.256506] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe06d0 (DMA)
>[   11.256507] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   11.256510] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f6d0 (0xfffe06d0 dma), new cycle = 1
>[   11.256512] xhci_hcd 0000:00:14.0: // Ding dong!
>[   11.256515] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[   11.256527] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   11.256530] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe06d1
>[   12.545378] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   12.545382] xhci_hcd 0000:00:14.0: Giveback URB ffff8800c8104540, len = 18, expected = 96, status = -121
>[   12.545416] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   12.545418] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   12.545594] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   12.545599] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   12.545600] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   12.545602] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   12.545603] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   12.545604] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   12.545606] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[   12.545607] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0710 (DMA)
>[   12.545610] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   12.545614] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f710 (0xfffe0710 dma), new cycle = 1
>[   12.545615] xhci_hcd 0000:00:14.0: // Ding dong!
>[   12.545620] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[   12.545623] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   12.545625] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0711
>[   12.546144] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   12.546147] xhci_hcd 0000:00:14.0: Giveback URB ffff8800c8104d80, len = 18, expected = 96, status = -121
>[   12.546182] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   12.546184] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   12.546351] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   12.546352] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   12.546354] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   12.546355] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   12.546356] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   12.546357] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   12.546359] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[   12.546360] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0750 (DMA)
>[   12.546361] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   12.546364] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f750 (0xfffe0750 dma), new cycle = 1
>[   12.546365] xhci_hcd 0000:00:14.0: // Ding dong!
>[   12.546367] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[   12.546387] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   12.546389] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0751
>[   12.552053] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   12.552057] xhci_hcd 0000:00:14.0: Giveback URB ffff8804048b5a80, len = 18, expected = 96, status = -121
>[   12.552091] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   12.552093] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   12.552259] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   12.552261] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   12.552262] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   12.552263] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   12.552265] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   12.552266] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   12.552267] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[   12.552269] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0790 (DMA)
>[   12.552270] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   12.552272] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f790 (0xfffe0790 dma), new cycle = 1
>[   12.552274] xhci_hcd 0000:00:14.0: // Ding dong!
>[   12.552276] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[   12.552296] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   12.552298] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0791
>[   12.552691] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   12.552694] xhci_hcd 0000:00:14.0: Giveback URB ffff88040b609e40, len = 18, expected = 96, status = -121
>[   12.552728] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   12.552729] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   12.552898] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   12.552900] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   12.552901] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   12.552903] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   12.552904] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   12.552905] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   12.552906] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[   12.552908] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe07d0 (DMA)
>[   12.552909] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   12.552911] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f7d0 (0xfffe07d0 dma), new cycle = 1
>[   12.552912] xhci_hcd 0000:00:14.0: // Ding dong!
>[   12.552915] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[   12.552932] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   12.552934] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe07d1
>[   12.621330] ata1.00: configured for UDMA/133
>[   12.621335] ata1: EH complete
>[   12.646912] ata2.00: configured for UDMA/133
>[   12.646917] ata2: EH complete
>[   12.648763] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   12.648768] xhci_hcd 0000:00:14.0: Giveback URB ffff880408a1c000, len = 18, expected = 96, status = -121
>[   12.648800] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   12.648803] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   12.648980] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   12.648986] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   12.648990] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   12.648993] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   12.648996] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   12.649000] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   12.649003] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   12.649007] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0820 (DMA)
>[   12.649009] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   12.649014] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f820 (0xfffe0820 dma), new cycle = 1
>[   12.649017] xhci_hcd 0000:00:14.0: // Ding dong!
>[   12.649028] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   12.649034] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0821
>[   12.649247] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   12.649252] xhci_hcd 0000:00:14.0: Giveback URB ffff880406148780, len = 18, expected = 96, status = -121
>[   12.649285] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   12.649287] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   12.649453] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   12.649455] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   12.649457] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   12.649459] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   12.649461] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   12.649462] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   12.649464] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   12.649466] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0860 (DMA)
>[   12.649468] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   12.649471] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f860 (0xfffe0860 dma), new cycle = 1
>[   12.649473] xhci_hcd 0000:00:14.0: // Ding dong!
>[   12.649476] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[   12.649489] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   12.649492] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0861
>[   12.649753] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   12.649757] xhci_hcd 0000:00:14.0: Giveback URB ffff880404907780, len = 18, expected = 96, status = -121
>[   12.649788] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   12.649791] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   12.649958] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   12.649960] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   12.649962] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   12.649963] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   12.649965] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   12.649966] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   12.649968] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   12.649969] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe08a0 (DMA)
>[   12.649971] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   12.649973] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f8a0 (0xfffe08a0 dma), new cycle = 1
>[   12.649974] xhci_hcd 0000:00:14.0: // Ding dong!
>[   12.649977] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[   12.649993] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   12.649995] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe08a1
>[   12.650257] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   12.650263] xhci_hcd 0000:00:14.0: Giveback URB ffff880406148780, len = 18, expected = 96, status = -121
>[   12.650295] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   12.650303] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   12.650478] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   12.650482] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   12.650485] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   12.650486] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   12.650488] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   12.650494] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   12.650496] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   12.650498] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe08e0 (DMA)
>[   12.650500] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   12.650503] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f8e0 (0xfffe08e0 dma), new cycle = 1
>[   12.650505] xhci_hcd 0000:00:14.0: // Ding dong!
>[   12.650515] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   12.650523] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe08e1
>[   12.650758] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   12.650762] xhci_hcd 0000:00:14.0: Giveback URB ffff8803ff1983c0, len = 18, expected = 96, status = -121
>[   12.650794] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   12.650797] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   12.650968] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   12.650974] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   12.650975] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   12.650976] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   12.650977] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   12.650979] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   12.650980] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   12.650981] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0920 (DMA)
>[   12.650982] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   12.650984] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f920 (0xfffe0920 dma), new cycle = 1
>[   12.650987] xhci_hcd 0000:00:14.0: // Ding dong!
>[   12.650991] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[   12.651000] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   12.651004] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0921
>[   12.651711] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   12.651720] xhci_hcd 0000:00:14.0: Giveback URB ffff880404907b40, len = 18, expected = 96, status = -121
>[   12.651749] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   12.651752] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   12.651920] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   12.651922] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   12.651924] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   12.651926] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   12.651929] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   12.651931] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   12.651934] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   12.651936] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0960 (DMA)
>[   12.651939] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   12.651942] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f960 (0xfffe0960 dma), new cycle = 1
>[   12.651945] xhci_hcd 0000:00:14.0: // Ding dong!
>[   12.651949] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[   12.651957] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   12.651964] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0961
>[   12.652148] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   12.652151] xhci_hcd 0000:00:14.0: Giveback URB ffff880404907b40, len = 0, expected = 512, status = -32
>[   12.652324] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   12.652326] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   12.652329] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   12.652331] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   12.652333] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   12.652339] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   12.652341] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   12.652343] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0980 (DMA)
>[   12.652345] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   12.652351] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f980 (0xfffe0980 dma), new cycle = 1
>[   12.652352] xhci_hcd 0000:00:14.0: // Ding dong!
>[   12.652358] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[   12.652366] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   12.652368] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0981
>[   12.652491] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   12.652495] xhci_hcd 0000:00:14.0: Giveback URB ffff880404907b40, len = 18, expected = 96, status = -121
>[   12.652531] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   12.652536] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   12.652708] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   12.652710] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   12.652712] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   12.652717] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   12.652719] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   12.652721] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   12.652725] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   12.652727] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe09b0 (DMA)
>[   12.652729] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   12.652734] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f9b0 (0xfffe09b0 dma), new cycle = 1
>[   12.652736] xhci_hcd 0000:00:14.0: // Ding dong!
>[   12.652740] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[   12.652744] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   12.652747] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe09b1
>[   12.652996] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   12.653000] xhci_hcd 0000:00:14.0: Giveback URB ffff88040b6663c0, len = 18, expected = 96, status = -121
>[   12.653035] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   12.653040] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   12.653212] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   12.653215] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   12.653218] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   12.653221] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   12.653224] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   12.653227] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   12.653230] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   12.653233] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe09f0 (DMA)
>[   12.653236] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   12.653240] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f9f0 (0xfffe09f0 dma), new cycle = 1
>[   12.653243] xhci_hcd 0000:00:14.0: // Ding dong!
>[   12.653248] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[   12.653252] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   12.653255] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe09f1
>[   12.653458] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   12.653460] xhci_hcd 0000:00:14.0: Giveback URB ffff88040b6660c0, len = 18, expected = 96, status = -121
>[   12.653504] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   12.653510] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   12.653684] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   12.653688] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   12.653689] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   12.653690] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   12.653691] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   12.653692] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   12.653694] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   12.653695] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0a30 (DMA)
>[   12.653696] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   12.653698] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fa30 (0xfffe0a30 dma), new cycle = 1
>[   12.653701] xhci_hcd 0000:00:14.0: // Ding dong!
>[   12.653705] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[   12.653719] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   12.653722] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0a31
>[   12.675400] EXT4-fs (sda5): re-mounted. Opts: acl,user_xattr,commit=0
>[   12.795650] EXT4-fs (sdb3): re-mounted. Opts: acl,user_xattr,commit=0
>[   14.840061] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   14.840067] xhci_hcd 0000:00:14.0: Giveback URB ffff8803ff69c840, len = 18, expected = 96, status = -121
>[   14.840101] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   14.840106] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   14.840274] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   14.840278] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   14.840280] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   14.840282] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   14.840285] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   14.840287] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   14.840290] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   14.840292] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0a70 (DMA)
>[   14.840294] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   14.840298] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fa70 (0xfffe0a70 dma), new cycle = 1
>[   14.840300] xhci_hcd 0000:00:14.0: // Ding dong!
>[   14.840305] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[   14.840309] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   14.840312] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0a71
>[   16.887881] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   16.887888] xhci_hcd 0000:00:14.0: Giveback URB ffff88040bc98480, len = 18, expected = 96, status = -121
>[   16.887917] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   16.887921] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   16.888101] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   16.888105] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   16.888107] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   16.888108] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   16.888110] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   16.888112] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   16.888113] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   16.888115] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0ab0 (DMA)
>[   16.888117] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   16.888119] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fab0 (0xfffe0ab0 dma), new cycle = 1
>[   16.888121] xhci_hcd 0000:00:14.0: // Ding dong!
>[   16.888125] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[   16.888130] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   16.888134] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0ab1
>[   18.935765] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   18.935769] xhci_hcd 0000:00:14.0: Giveback URB ffff8803edfff6c0, len = 18, expected = 96, status = -121
>[   18.935793] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   18.935797] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   18.935981] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   18.935984] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   18.935985] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   18.935986] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   18.935987] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   18.935989] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   18.935990] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   18.935991] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0af0 (DMA)
>[   18.935992] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   18.935994] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42faf0 (0xfffe0af0 dma), new cycle = 1
>[   18.935995] xhci_hcd 0000:00:14.0: // Ding dong!
>[   18.935998] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[   18.936003] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   18.936005] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0af1
>[   20.983664] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   20.983676] xhci_hcd 0000:00:14.0: Giveback URB ffff8803edc04e40, len = 18, expected = 96, status = -121
>[   20.983706] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   20.983713] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   20.983902] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   20.983909] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   20.983914] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   20.983918] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   20.983922] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   20.983927] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   20.983932] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   20.983937] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0b30 (DMA)
>[   20.983942] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   20.983949] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fb30 (0xfffe0b30 dma), new cycle = 1
>[   20.983955] xhci_hcd 0000:00:14.0: // Ding dong!
>[   20.983972] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   20.983982] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0b31
>[   23.031465] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   23.031471] xhci_hcd 0000:00:14.0: Giveback URB ffff8803f0eafb40, len = 18, expected = 96, status = -121
>[   23.031501] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   23.031505] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   23.031680] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   23.031682] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   23.031684] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   23.031687] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   23.031688] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   23.031691] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   23.031693] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   23.031695] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0b70 (DMA)
>[   23.031701] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   23.031704] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fb70 (0xfffe0b70 dma), new cycle = 1
>[   23.031705] xhci_hcd 0000:00:14.0: // Ding dong!
>[   23.031709] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[   23.031714] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   23.031719] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0b71
>[   25.079314] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   25.079324] xhci_hcd 0000:00:14.0: Giveback URB ffff8803edf029c0, len = 18, expected = 96, status = -121
>[   25.079348] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   25.079353] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   25.079525] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   25.079529] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   25.079532] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   25.079536] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   25.079539] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   25.079543] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   25.079546] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   25.079550] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0bb0 (DMA)
>[   25.079553] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   25.079559] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fbb0 (0xfffe0bb0 dma), new cycle = 1
>[   25.079562] xhci_hcd 0000:00:14.0: // Ding dong!
>[   25.079568] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[   25.079578] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   25.079587] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0bb1
>[   27.127283] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   27.127294] xhci_hcd 0000:00:14.0: Giveback URB ffff8803edcd8e40, len = 18, expected = 96, status = -121
>[   27.127334] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   27.127343] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   27.127552] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   27.127562] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   27.127568] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   27.127572] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   27.127574] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   27.127576] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   27.127579] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   27.127582] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0bf0 (DMA)
>[   27.127584] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   27.127588] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fbf0 (0xfffe0bf0 dma), new cycle = 1
>[   27.127590] xhci_hcd 0000:00:14.0: // Ding dong!
>[   27.127604] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   27.127611] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0bf1
>[   29.175104] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   29.175114] xhci_hcd 0000:00:14.0: Giveback URB ffff8803fe4ee780, len = 18, expected = 96, status = -121
>[   29.175146] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   29.175153] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   29.175361] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   29.175369] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   29.175373] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   29.175377] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   29.175380] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   29.175384] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   29.175388] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[   29.175391] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0440 (DMA)
>[   29.175395] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   29.175400] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f440 (0xfffe0440 dma), new cycle = 0
>[   29.175404] xhci_hcd 0000:00:14.0: // Ding dong!
>[   29.175423] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   29.175444] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0440
>[   31.222997] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   31.223010] xhci_hcd 0000:00:14.0: Giveback URB ffff8803f21f0780, len = 18, expected = 96, status = -121
>[   31.223058] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   31.223071] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   31.223286] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   31.223297] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   31.223304] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   31.223311] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   31.223318] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   31.223325] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   31.223332] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[   31.223340] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0480 (DMA)
>[   31.223346] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   31.223357] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f480 (0xfffe0480 dma), new cycle = 0
>[   31.223364] xhci_hcd 0000:00:14.0: // Ding dong!
>[   31.223388] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   31.223399] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0480
>[   33.270877] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   33.270891] xhci_hcd 0000:00:14.0: Giveback URB ffff8803fe4eaf00, len = 18, expected = 96, status = -121
>[   33.270939] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   33.270952] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   33.271186] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   33.271196] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   33.271201] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   33.271205] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   33.271208] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   33.271211] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   33.271214] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[   33.271218] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe04c0 (DMA)
>[   33.271225] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   33.271231] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f4c0 (0xfffe04c0 dma), new cycle = 0
>[   33.271236] xhci_hcd 0000:00:14.0: // Ding dong!
>[   33.271255] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   33.271262] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe04c0
>[   35.318632] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   35.318642] xhci_hcd 0000:00:14.0: Giveback URB ffff88040bba0f00, len = 18, expected = 96, status = -121
>[   35.318666] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   35.318671] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   35.318848] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   35.318853] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   35.318856] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   35.318859] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   35.318862] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   35.318866] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   35.318870] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[   35.318874] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0500 (DMA)
>[   35.318877] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   35.318882] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f500 (0xfffe0500 dma), new cycle = 0
>[   35.318886] xhci_hcd 0000:00:14.0: // Ding dong!
>[   35.318891] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[   35.318901] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   35.318908] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0500
>[   37.366514] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   37.366526] xhci_hcd 0000:00:14.0: Giveback URB ffff88040b76e600, len = 18, expected = 96, status = -121
>[   37.366562] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   37.366573] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   37.366802] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   37.366812] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   37.366818] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   37.366838] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   37.366841] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   37.366844] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   37.366848] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[   37.366851] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0540 (DMA)
>[   37.366853] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   37.366864] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f540 (0xfffe0540 dma), new cycle = 0
>[   37.366867] xhci_hcd 0000:00:14.0: // Ding dong!
>[   37.366885] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   37.366893] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0540
>[   39.414367] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   39.414381] xhci_hcd 0000:00:14.0: Giveback URB ffff8800ca1fad80, len = 18, expected = 96, status = -121
>[   39.414415] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   39.414424] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   39.414627] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   39.414656] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   39.414663] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   39.414668] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   39.414672] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   39.414675] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   39.414678] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[   39.414681] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0580 (DMA)
>[   39.414682] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   39.414688] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f580 (0xfffe0580 dma), new cycle = 0
>[   39.414698] xhci_hcd 0000:00:14.0: // Ding dong!
>[   39.414714] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   39.414723] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0580
>[   41.462280] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   41.462292] xhci_hcd 0000:00:14.0: Giveback URB ffff8804091c5480, len = 18, expected = 96, status = -121
>[   41.462341] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   41.462355] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   41.462560] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   41.462570] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   41.462577] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   41.462583] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   41.462590] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   41.462598] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   41.462603] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[   41.462608] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe05c0 (DMA)
>[   41.462616] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   41.462625] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f5c0 (0xfffe05c0 dma), new cycle = 0
>[   41.462630] xhci_hcd 0000:00:14.0: // Ding dong!
>[   41.462651] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   41.462664] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe05c0
>[   43.510060] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   43.510075] xhci_hcd 0000:00:14.0: Giveback URB ffff8804063fdf00, len = 18, expected = 96, status = -121
>[   43.510115] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   43.510133] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   43.510338] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   43.510347] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   43.510353] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   43.510360] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   43.510366] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   43.510374] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   43.510382] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[   43.510390] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0600 (DMA)
>[   43.510396] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   43.510406] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f600 (0xfffe0600 dma), new cycle = 0
>[   43.510413] xhci_hcd 0000:00:14.0: // Ding dong!
>[   43.510434] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   43.510448] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0600
>[   45.557983] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   45.557995] xhci_hcd 0000:00:14.0: Giveback URB ffff8803e03d3000, len = 18, expected = 96, status = -121
>[   45.558035] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   45.558046] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   45.558238] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   45.558244] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   45.558248] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   45.558252] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   45.558256] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   45.558261] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   45.558265] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[   45.558270] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0640 (DMA)
>[   45.558274] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   45.558281] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f640 (0xfffe0640 dma), new cycle = 0
>[   45.558285] xhci_hcd 0000:00:14.0: // Ding dong!
>[   45.558299] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   45.558305] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0640
>[   47.605797] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   47.605809] xhci_hcd 0000:00:14.0: Giveback URB ffff8800da416d80, len = 18, expected = 96, status = -121
>[   47.605853] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   47.605866] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   47.606090] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   47.606100] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   47.606105] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   47.606109] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   47.606113] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   47.606118] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   47.606122] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[   47.606126] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0680 (DMA)
>[   47.606128] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   47.606134] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f680 (0xfffe0680 dma), new cycle = 0
>[   47.606144] xhci_hcd 0000:00:14.0: // Ding dong!
>[   47.606164] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   47.606172] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0680
>[   49.653641] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   49.653653] xhci_hcd 0000:00:14.0: Giveback URB ffff8803e03d3840, len = 18, expected = 96, status = -121
>[   49.653678] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   49.653688] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   49.653886] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   49.653892] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   49.653897] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   49.653901] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   49.653905] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   49.653910] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   49.653914] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[   49.653919] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe06c0 (DMA)
>[   49.653923] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   49.653930] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f6c0 (0xfffe06c0 dma), new cycle = 0
>[   49.653934] xhci_hcd 0000:00:14.0: // Ding dong!
>[   49.653949] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   49.653960] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe06c0
>[   51.701523] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   51.701536] xhci_hcd 0000:00:14.0: Giveback URB ffff8803fe25bb40, len = 18, expected = 96, status = -121
>[   51.701571] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   51.701580] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   51.701790] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   51.701796] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   51.701800] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   51.701804] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   51.701808] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   51.701813] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   51.701818] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[   51.701822] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0700 (DMA)
>[   51.701826] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   51.701833] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f700 (0xfffe0700 dma), new cycle = 0
>[   51.701839] xhci_hcd 0000:00:14.0: // Ding dong!
>[   51.701854] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   51.701863] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0700
>[   53.749327] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   53.749338] xhci_hcd 0000:00:14.0: Giveback URB ffff8800da41b480, len = 18, expected = 96, status = -121
>[   53.749368] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   53.749380] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   53.749573] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   53.749580] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   53.749584] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   53.749588] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   53.749592] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   53.749597] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   53.749601] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[   53.749606] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0740 (DMA)
>[   53.749610] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   53.749616] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f740 (0xfffe0740 dma), new cycle = 0
>[   53.749621] xhci_hcd 0000:00:14.0: // Ding dong!
>[   53.749634] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   53.749642] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0740
>[   55.797247] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   55.797261] xhci_hcd 0000:00:14.0: Giveback URB ffff8800da41b3c0, len = 18, expected = 96, status = -121
>[   55.797299] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   55.797317] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   55.797539] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   55.797549] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   55.797556] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   55.797563] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   55.797570] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   55.797578] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   55.797585] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[   55.797593] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0780 (DMA)
>[   55.797600] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   55.797610] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f780 (0xfffe0780 dma), new cycle = 0
>[   55.797618] xhci_hcd 0000:00:14.0: // Ding dong!
>[   55.797635] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   55.797642] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0780
>[   57.845098] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   57.845110] xhci_hcd 0000:00:14.0: Giveback URB ffff8803fe2cccc0, len = 18, expected = 96, status = -121
>[   57.845143] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   57.845152] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   57.845340] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   57.845346] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   57.845350] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   57.845354] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   57.845358] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   57.845362] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   57.845367] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[   57.845371] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe07c0 (DMA)
>[   57.845375] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   57.845382] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f7c0 (0xfffe07c0 dma), new cycle = 0
>[   57.845386] xhci_hcd 0000:00:14.0: // Ding dong!
>[   57.845401] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   57.845410] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe07c0
>[   59.892959] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   59.892974] xhci_hcd 0000:00:14.0: Giveback URB ffff8803f0ff6300, len = 18, expected = 96, status = -121
>[   59.893015] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   59.893028] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   59.893229] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   59.893237] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   59.893243] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   59.893250] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   59.893256] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   59.893263] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   59.893271] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   59.893279] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0810 (DMA)
>[   59.893295] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   59.893315] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f810 (0xfffe0810 dma), new cycle = 0
>[   59.893331] xhci_hcd 0000:00:14.0: // Ding dong!
>[   59.893350] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   59.893363] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0810
>[   61.940762] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   61.940771] xhci_hcd 0000:00:14.0: Giveback URB ffff8803e03b3900, len = 18, expected = 96, status = -121
>[   61.940797] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   61.940802] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   61.940981] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   61.940986] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   61.940988] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   61.940996] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   61.940998] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   61.941001] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   61.941003] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   61.941005] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0850 (DMA)
>[   61.941008] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   61.941013] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f850 (0xfffe0850 dma), new cycle = 0
>[   61.941015] xhci_hcd 0000:00:14.0: // Ding dong!
>[   61.941023] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[   61.941031] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   61.941035] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0850
>[   63.988609] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   63.988614] xhci_hcd 0000:00:14.0: Giveback URB ffff8803ff392b40, len = 18, expected = 96, status = -121
>[   63.988645] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   63.988648] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   63.988814] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   63.988816] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   63.988819] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   63.988821] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   63.988823] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   63.988825] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   63.988827] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   63.988829] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0890 (DMA)
>[   63.988831] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   63.988835] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f890 (0xfffe0890 dma), new cycle = 0
>[   63.988837] xhci_hcd 0000:00:14.0: // Ding dong!
>[   63.988840] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[   63.988850] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   63.988853] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0890
>[   66.036532] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   66.036549] xhci_hcd 0000:00:14.0: Giveback URB ffff8803e03b3d80, len = 18, expected = 96, status = -121
>[   66.036588] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   66.036599] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   66.036813] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   66.036824] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   66.036831] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   66.036838] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   66.036844] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   66.036851] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   66.036859] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   66.036867] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe08d0 (DMA)
>[   66.036873] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   66.036884] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f8d0 (0xfffe08d0 dma), new cycle = 0
>[   66.036889] xhci_hcd 0000:00:14.0: // Ding dong!
>[   66.036907] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   66.036915] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe08d0
>[   68.084414] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   68.084427] xhci_hcd 0000:00:14.0: Giveback URB ffff8803f0eaf000, len = 18, expected = 96, status = -121
>[   68.084460] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   68.084473] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   68.084701] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   68.084707] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   68.084710] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   68.084712] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   68.084715] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   68.084718] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   68.084721] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   68.084724] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0910 (DMA)
>[   68.084732] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   68.084739] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f910 (0xfffe0910 dma), new cycle = 0
>[   68.084743] xhci_hcd 0000:00:14.0: // Ding dong!
>[   68.084759] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   68.084767] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0910
>[   70.132265] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   70.132282] xhci_hcd 0000:00:14.0: Giveback URB ffff88040b7a7900, len = 18, expected = 96, status = -121
>[   70.132345] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   70.132362] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   70.132592] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   70.132605] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   70.132613] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   70.132619] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   70.132626] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   70.132633] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   70.132640] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   70.132645] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0950 (DMA)
>[   70.132649] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   70.132656] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f950 (0xfffe0950 dma), new cycle = 0
>[   70.132661] xhci_hcd 0000:00:14.0: // Ding dong!
>[   70.132684] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   70.132699] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0950
>[   72.180142] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   72.180160] xhci_hcd 0000:00:14.0: Giveback URB ffff88040bc21000, len = 18, expected = 96, status = -121
>[   72.180219] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   72.180237] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   72.180467] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   72.180480] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   72.180488] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   72.180495] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   72.180502] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   72.180509] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   72.180516] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   72.180521] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0990 (DMA)
>[   72.180525] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   72.180531] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f990 (0xfffe0990 dma), new cycle = 0
>[   72.180536] xhci_hcd 0000:00:14.0: // Ding dong!
>[   72.180553] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   72.180564] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0990
>[   74.228045] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   74.228062] xhci_hcd 0000:00:14.0: Giveback URB ffff8803ede3df00, len = 18, expected = 96, status = -121
>[   74.228101] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   74.228112] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   74.228322] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   74.228330] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   74.228335] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   74.228341] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   74.228348] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   74.228356] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   74.228363] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   74.228370] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe09d0 (DMA)
>[   74.228377] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   74.228387] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f9d0 (0xfffe09d0 dma), new cycle = 0
>[   74.228394] xhci_hcd 0000:00:14.0: // Ding dong!
>[   74.228418] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   74.228449] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe09d0
>[   76.275882] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   76.275896] xhci_hcd 0000:00:14.0: Giveback URB ffff8803df76f480, len = 18, expected = 96, status = -121
>[   76.275946] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   76.275956] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   76.276169] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   76.276182] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   76.276190] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   76.276197] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   76.276204] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   76.276212] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   76.276219] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   76.276227] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0a10 (DMA)
>[   76.276233] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   76.276241] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fa10 (0xfffe0a10 dma), new cycle = 0
>[   76.276245] xhci_hcd 0000:00:14.0: // Ding dong!
>[   76.276263] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   76.276273] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0a10
>[   78.323644] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   78.323651] xhci_hcd 0000:00:14.0: Giveback URB ffff8803fe35c0c0, len = 18, expected = 96, status = -121
>[   78.323680] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   78.323684] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   78.323856] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   78.323860] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   78.323862] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   78.323865] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   78.323867] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   78.323870] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   78.323873] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   78.323876] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0a50 (DMA)
>[   78.323878] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   78.323882] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fa50 (0xfffe0a50 dma), new cycle = 0
>[   78.323885] xhci_hcd 0000:00:14.0: // Ding dong!
>[   78.323890] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[   78.323897] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   78.323903] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0a50
>[   80.371523] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   80.371530] xhci_hcd 0000:00:14.0: Giveback URB ffff8803df76ecc0, len = 18, expected = 96, status = -121
>[   80.371563] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   80.371568] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   80.371737] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   80.371740] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   80.371743] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   80.371745] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   80.371748] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   80.371751] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   80.371754] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   80.371757] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0a90 (DMA)
>[   80.371759] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   80.371763] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fa90 (0xfffe0a90 dma), new cycle = 0
>[   80.371766] xhci_hcd 0000:00:14.0: // Ding dong!
>[   80.371771] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[   80.371778] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   80.371786] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0a90
>[   82.419418] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   82.419426] xhci_hcd 0000:00:14.0: Giveback URB ffff8803e80eae40, len = 18, expected = 96, status = -121
>[   82.419456] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   82.419462] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   82.419653] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   82.419660] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   82.419664] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   82.419668] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   82.419672] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   82.419676] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   82.419681] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   82.419685] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0ad0 (DMA)
>[   82.419688] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   82.419694] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fad0 (0xfffe0ad0 dma), new cycle = 0
>[   82.419697] xhci_hcd 0000:00:14.0: // Ding dong!
>[   82.419712] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   82.419717] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0ad0
>[   84.467296] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   84.467309] xhci_hcd 0000:00:14.0: Giveback URB ffff8803ede6aa80, len = 18, expected = 96, status = -121
>[   84.467358] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   84.467371] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   84.467600] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   84.467610] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   84.467615] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   84.467620] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   84.467624] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   84.467629] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   84.467634] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   84.467638] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0b10 (DMA)
>[   84.467642] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   84.467649] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fb10 (0xfffe0b10 dma), new cycle = 0
>[   84.467654] xhci_hcd 0000:00:14.0: // Ding dong!
>[   84.467674] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   84.467681] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0b10
>[   86.515176] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   86.515192] xhci_hcd 0000:00:14.0: Giveback URB ffff8800da41cb40, len = 18, expected = 96, status = -121
>[   86.515231] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   86.515241] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   86.515451] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   86.515463] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   86.515470] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   86.515476] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   86.515481] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   86.515486] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   86.515493] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   86.515501] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0b50 (DMA)
>[   86.515508] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   86.515518] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fb50 (0xfffe0b50 dma), new cycle = 0
>[   86.515524] xhci_hcd 0000:00:14.0: // Ding dong!
>[   86.515544] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   86.515555] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0b50
>[   88.563019] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   88.563032] xhci_hcd 0000:00:14.0: Giveback URB ffff8803df76da80, len = 18, expected = 96, status = -121
>[   88.563083] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   88.563093] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   88.563307] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   88.563320] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   88.563328] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   88.563335] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   88.563342] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   88.563349] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   88.563357] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   88.563363] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0b90 (DMA)
>[   88.563367] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   88.563374] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fb90 (0xfffe0b90 dma), new cycle = 0
>[   88.563378] xhci_hcd 0000:00:14.0: // Ding dong!
>[   88.563396] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   88.563407] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0b90
>[   90.610799] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   90.610808] xhci_hcd 0000:00:14.0: Giveback URB ffff8803df76a0c0, len = 18, expected = 96, status = -121
>[   90.610844] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   90.610852] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   90.611049] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   90.611058] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   90.611063] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   90.611068] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   90.611072] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   90.611078] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[   90.611083] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[   90.611088] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0bd0 (DMA)
>[   90.611092] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   90.611099] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fbd0 (0xfffe0bd0 dma), new cycle = 0
>[   90.611111] xhci_hcd 0000:00:14.0: // Ding dong!
>[   90.611126] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   90.611132] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0bd0
>[   92.658679] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   92.658696] xhci_hcd 0000:00:14.0: Giveback URB ffff88040a9a3a80, len = 18, expected = 96, status = -121
>[   92.658746] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   92.658764] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   92.658976] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   92.658985] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   92.658992] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   92.658998] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   92.659017] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   92.659022] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   92.659027] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[   92.659031] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0420 (DMA)
>[   92.659035] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   92.659042] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f420 (0xfffe0420 dma), new cycle = 1
>[   92.659047] xhci_hcd 0000:00:14.0: // Ding dong!
>[   92.659065] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   92.659075] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0421
>[   94.706606] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   94.706619] xhci_hcd 0000:00:14.0: Giveback URB ffff8803e0331600, len = 18, expected = 96, status = -121
>[   94.706668] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   94.706680] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   94.706899] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   94.706908] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   94.706915] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   94.706922] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   94.706929] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   94.706936] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   94.706943] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[   94.706951] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0460 (DMA)
>[   94.706957] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   94.706967] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f460 (0xfffe0460 dma), new cycle = 1
>[   94.706975] xhci_hcd 0000:00:14.0: // Ding dong!
>[   94.706991] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   94.706998] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0461
>[   96.754382] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   96.754396] xhci_hcd 0000:00:14.0: Giveback URB ffff8803fe25de40, len = 18, expected = 96, status = -121
>[   96.754438] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   96.754449] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   96.754672] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   96.754684] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   96.754692] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   96.754698] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   96.754703] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   96.754708] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   96.754713] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[   96.754718] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe04a0 (DMA)
>[   96.754722] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   96.754730] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f4a0 (0xfffe04a0 dma), new cycle = 1
>[   96.754736] xhci_hcd 0000:00:14.0: // Ding dong!
>[   96.754750] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   96.754758] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe04a1
>[   98.802268] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[   98.802281] xhci_hcd 0000:00:14.0: Giveback URB ffff8803df76aa80, len = 18, expected = 96, status = -121
>[   98.802320] xhci_hcd 0000:00:14.0: Stalled endpoint
>[   98.802331] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[   98.802567] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[   98.802578] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[   98.802596] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[   98.802598] xhci_hcd 0000:00:14.0: Finding endpoint context
>[   98.802601] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[   98.802604] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[   98.802607] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[   98.802610] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe04e0 (DMA)
>[   98.802613] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[   98.802623] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f4e0 (0xfffe04e0 dma), new cycle = 1
>[   98.802626] xhci_hcd 0000:00:14.0: // Ding dong!
>[   98.802641] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[   98.802650] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe04e1
>[  100.850181] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  100.850190] xhci_hcd 0000:00:14.0: Giveback URB ffff8803fe7f6c00, len = 18, expected = 96, status = -121
>[  100.850225] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  100.850234] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  100.850429] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  100.850435] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  100.850439] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  100.850442] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  100.850445] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  100.850448] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  100.850451] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  100.850454] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0520 (DMA)
>[  100.850459] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  100.850465] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f520 (0xfffe0520 dma), new cycle = 1
>[  100.850469] xhci_hcd 0000:00:14.0: // Ding dong!
>[  100.850484] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  100.850489] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0521
>[  102.897918] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  102.897927] xhci_hcd 0000:00:14.0: Giveback URB ffff8803fe7f6900, len = 18, expected = 96, status = -121
>[  102.897953] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  102.897958] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  102.898130] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  102.898134] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  102.898137] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  102.898141] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  102.898144] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  102.898148] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  102.898151] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  102.898155] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0560 (DMA)
>[  102.898158] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  102.898163] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f560 (0xfffe0560 dma), new cycle = 1
>[  102.898167] xhci_hcd 0000:00:14.0: // Ding dong!
>[  102.898173] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[  102.898181] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  102.898188] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0561
>[  104.945794] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  104.945804] xhci_hcd 0000:00:14.0: Giveback URB ffff8803e03b3f00, len = 18, expected = 96, status = -121
>[  104.945832] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  104.945839] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  104.946022] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  104.946027] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  104.946031] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  104.946033] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  104.946046] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  104.946054] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  104.946058] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  104.946061] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe05a0 (DMA)
>[  104.946066] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  104.946072] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f5a0 (0xfffe05a0 dma), new cycle = 1
>[  104.946077] xhci_hcd 0000:00:14.0: // Ding dong!
>[  104.946093] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  104.946098] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe05a1
>[  106.993671] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  106.993680] xhci_hcd 0000:00:14.0: Giveback URB ffff8803e0360d80, len = 18, expected = 96, status = -121
>[  106.993706] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  106.993711] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  106.993883] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  106.993887] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  106.993890] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  106.993893] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  106.993896] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  106.993899] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  106.993902] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  106.993905] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe05e0 (DMA)
>[  106.993908] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  106.993912] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f5e0 (0xfffe05e0 dma), new cycle = 1
>[  106.993915] xhci_hcd 0000:00:14.0: // Ding dong!
>[  106.993920] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[  106.993933] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  106.993938] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe05e1
>[  109.041521] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  109.041528] xhci_hcd 0000:00:14.0: Giveback URB ffff8803df769f00, len = 18, expected = 96, status = -121
>[  109.041571] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  109.041576] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  109.041747] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  109.041751] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  109.041754] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  109.041756] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  109.041759] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  109.041762] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  109.041765] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  109.041768] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0620 (DMA)
>[  109.041771] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  109.041775] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f620 (0xfffe0620 dma), new cycle = 1
>[  109.041778] xhci_hcd 0000:00:14.0: // Ding dong!
>[  109.041795] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  109.041805] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0621
>[  111.089427] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  111.089439] xhci_hcd 0000:00:14.0: Giveback URB ffff8800da41e840, len = 18, expected = 96, status = -121
>[  111.089473] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  111.089482] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  111.089685] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  111.089696] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  111.089702] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  111.089708] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  111.089713] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  111.089718] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  111.089722] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  111.089725] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0660 (DMA)
>[  111.089727] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  111.089731] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f660 (0xfffe0660 dma), new cycle = 1
>[  111.089734] xhci_hcd 0000:00:14.0: // Ding dong!
>[  111.089747] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  111.089753] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0661
>[  113.137268] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  113.137282] xhci_hcd 0000:00:14.0: Giveback URB ffff8803fe3c76c0, len = 18, expected = 96, status = -121
>[  113.137316] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  113.137325] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  113.137518] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  113.137526] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  113.137533] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  113.137538] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  113.137543] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  113.137549] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  113.137555] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  113.137560] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe06a0 (DMA)
>[  113.137566] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  113.137574] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f6a0 (0xfffe06a0 dma), new cycle = 1
>[  113.137580] xhci_hcd 0000:00:14.0: // Ding dong!
>[  113.137601] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  113.137612] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe06a1
>[  115.185083] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  115.185090] xhci_hcd 0000:00:14.0: Giveback URB ffff8803df76b600, len = 18, expected = 96, status = -121
>[  115.185118] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  115.185123] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  115.185313] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  115.185320] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  115.185324] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  115.185326] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  115.185328] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  115.185331] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  115.185334] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  115.185336] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe06e0 (DMA)
>[  115.185341] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  115.185346] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f6e0 (0xfffe06e0 dma), new cycle = 1
>[  115.185348] xhci_hcd 0000:00:14.0: // Ding dong!
>[  115.185361] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  115.185366] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe06e1
>[  117.233031] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  117.233043] xhci_hcd 0000:00:14.0: Giveback URB ffff8803ff3d3600, len = 18, expected = 96, status = -121
>[  117.233094] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  117.233104] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  117.233316] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  117.233329] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  117.233338] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  117.233345] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  117.233352] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  117.233359] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  117.233367] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  117.233373] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0720 (DMA)
>[  117.233378] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  117.233384] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f720 (0xfffe0720 dma), new cycle = 1
>[  117.233389] xhci_hcd 0000:00:14.0: // Ding dong!
>[  117.233406] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  117.233417] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0721
>[  119.280766] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  119.280774] xhci_hcd 0000:00:14.0: Giveback URB ffff88040baf2f00, len = 18, expected = 96, status = -121
>[  119.280802] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  119.280809] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  119.281019] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  119.281023] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  119.281026] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  119.281029] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  119.281031] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  119.281034] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  119.281037] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  119.281040] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0760 (DMA)
>[  119.281043] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  119.281048] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f760 (0xfffe0760 dma), new cycle = 1
>[  119.281050] xhci_hcd 0000:00:14.0: // Ding dong!
>[  119.281060] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  119.281065] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0761
>[  121.328629] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  121.328637] xhci_hcd 0000:00:14.0: Giveback URB ffff8803fe3c7a80, len = 18, expected = 96, status = -121
>[  121.328664] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  121.328668] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  121.328840] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  121.328844] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  121.328847] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  121.328850] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  121.328853] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  121.328856] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  121.328859] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  121.328862] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe07a0 (DMA)
>[  121.328864] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  121.328869] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f7a0 (0xfffe07a0 dma), new cycle = 1
>[  121.328872] xhci_hcd 0000:00:14.0: // Ding dong!
>[  121.328877] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[  121.328884] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  121.328891] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe07a1
>[  123.376549] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  123.376563] xhci_hcd 0000:00:14.0: Giveback URB ffff8803e00f3780, len = 18, expected = 96, status = -121
>[  123.376602] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  123.376616] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  123.376827] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  123.376834] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  123.376838] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  123.376841] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  123.376843] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  123.376847] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  123.376850] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  123.376853] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe07e0 (DMA)
>[  123.376856] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  123.376861] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f7e0 (0xfffe07e0 dma), new cycle = 1
>[  123.376863] xhci_hcd 0000:00:14.0: // Ding dong!
>[  123.376877] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  123.376886] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe07e1
>[  125.424418] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  125.424432] xhci_hcd 0000:00:14.0: Giveback URB ffff8803df76b180, len = 18, expected = 96, status = -121
>[  125.424476] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  125.424485] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  125.424685] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  125.424696] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  125.424702] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  125.424707] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  125.424713] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  125.424717] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  125.424721] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  125.424725] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0830 (DMA)
>[  125.424728] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  125.424733] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f830 (0xfffe0830 dma), new cycle = 1
>[  125.424737] xhci_hcd 0000:00:14.0: // Ding dong!
>[  125.424751] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  125.424760] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0831
>[  127.472310] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  127.472322] xhci_hcd 0000:00:14.0: Giveback URB ffff88040bf45600, len = 18, expected = 96, status = -121
>[  127.472357] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  127.472367] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  127.472585] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  127.472597] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  127.472603] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  127.472607] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  127.472611] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  127.472619] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  127.472627] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  127.472634] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0870 (DMA)
>[  127.472640] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  127.472650] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f870 (0xfffe0870 dma), new cycle = 1
>[  127.472658] xhci_hcd 0000:00:14.0: // Ding dong!
>[  127.472681] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  127.472695] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0871
>[  129.520182] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  129.520195] xhci_hcd 0000:00:14.0: Giveback URB ffff8803e0360180, len = 18, expected = 96, status = -121
>[  129.520244] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  129.520258] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  129.520476] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  129.520486] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  129.520493] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  129.520500] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  129.520507] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  129.520513] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  129.520521] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  129.520528] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe08b0 (DMA)
>[  129.520535] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  129.520546] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f8b0 (0xfffe08b0 dma), new cycle = 1
>[  129.520550] xhci_hcd 0000:00:14.0: // Ding dong!
>[  129.520571] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  129.520581] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe08b1
>[  131.567927] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  131.567935] xhci_hcd 0000:00:14.0: Giveback URB ffff8803fe7f6480, len = 18, expected = 96, status = -121
>[  131.567963] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  131.567967] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  131.568139] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  131.568142] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  131.568145] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  131.568148] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  131.568151] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  131.568154] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  131.568157] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  131.568160] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe08f0 (DMA)
>[  131.568163] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  131.568167] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f8f0 (0xfffe08f0 dma), new cycle = 1
>[  131.568170] xhci_hcd 0000:00:14.0: // Ding dong!
>[  131.568175] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[  131.568183] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  131.568189] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe08f1
>[  133.615866] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  133.615878] xhci_hcd 0000:00:14.0: Giveback URB ffff8803fe7f6900, len = 18, expected = 96, status = -121
>[  133.615915] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  133.615926] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  133.616121] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  133.616130] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  133.616136] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  133.616143] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  133.616149] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  133.616157] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  133.616164] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  133.616172] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0930 (DMA)
>[  133.616179] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  133.616189] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f930 (0xfffe0930 dma), new cycle = 1
>[  133.616194] xhci_hcd 0000:00:14.0: // Ding dong!
>[  133.616210] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  133.616219] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0931
>[  135.663684] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  135.663695] xhci_hcd 0000:00:14.0: Giveback URB ffff8803fe35c300, len = 18, expected = 96, status = -121
>[  135.663725] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  135.663732] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  135.663913] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  135.663918] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  135.663920] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  135.663923] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  135.663926] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  135.663929] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  135.663932] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  135.663936] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0970 (DMA)
>[  135.663939] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  135.663943] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f970 (0xfffe0970 dma), new cycle = 1
>[  135.663946] xhci_hcd 0000:00:14.0: // Ding dong!
>[  135.663960] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  135.663970] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0971
>[  137.711524] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  137.711531] xhci_hcd 0000:00:14.0: Giveback URB ffff8803ff41eb40, len = 18, expected = 96, status = -121
>[  137.711555] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  137.711560] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  137.711753] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  137.711760] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  137.711765] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  137.711769] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  137.711773] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  137.711776] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  137.711780] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  137.711784] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe09b0 (DMA)
>[  137.711788] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  137.711793] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f9b0 (0xfffe09b0 dma), new cycle = 1
>[  137.711798] xhci_hcd 0000:00:14.0: // Ding dong!
>[  137.711816] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  137.711820] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe09b1
>[  139.759430] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  139.759442] xhci_hcd 0000:00:14.0: Giveback URB ffff8800cacf2240, len = 18, expected = 96, status = -121
>[  139.759481] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  139.759491] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  139.759705] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  139.759717] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  139.759724] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  139.759728] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  139.759734] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  139.759741] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  139.759749] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  139.759756] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe09f0 (DMA)
>[  139.759763] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  139.759773] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f9f0 (0xfffe09f0 dma), new cycle = 1
>[  139.759780] xhci_hcd 0000:00:14.0: // Ding dong!
>[  139.759798] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  139.759816] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe09f1
>[  141.807304] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  141.807312] xhci_hcd 0000:00:14.0: Giveback URB ffff8800cacf2600, len = 18, expected = 96, status = -121
>[  141.807345] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  141.807353] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  141.807548] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  141.807552] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  141.807554] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  141.807556] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  141.807557] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  141.807559] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  141.807561] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  141.807563] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0a30 (DMA)
>[  141.807569] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  141.807574] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fa30 (0xfffe0a30 dma), new cycle = 1
>[  141.807576] xhci_hcd 0000:00:14.0: // Ding dong!
>[  141.807587] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  141.807592] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0a31
>[  143.855109] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  143.855120] xhci_hcd 0000:00:14.0: Giveback URB ffff88040a8d3cc0, len = 18, expected = 96, status = -121
>[  143.855159] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  143.855171] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  143.855364] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  143.855370] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  143.855373] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  143.855375] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  143.855378] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  143.855381] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  143.855385] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  143.855388] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0a70 (DMA)
>[  143.855391] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  143.855395] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fa70 (0xfffe0a70 dma), new cycle = 1
>[  143.855398] xhci_hcd 0000:00:14.0: // Ding dong!
>[  143.855403] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[  143.855411] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  143.855419] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0a71
>[  145.903023] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  145.903034] xhci_hcd 0000:00:14.0: Giveback URB ffff8800da59d240, len = 18, expected = 96, status = -121
>[  145.903064] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  145.903072] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  145.903275] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  145.903285] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  145.903290] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  145.903296] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  145.903301] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  145.903308] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  145.903314] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  145.903320] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0ab0 (DMA)
>[  145.903326] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  145.903332] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fab0 (0xfffe0ab0 dma), new cycle = 1
>[  145.903336] xhci_hcd 0000:00:14.0: // Ding dong!
>[  145.903354] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  145.903360] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0ab1
>[  147.950813] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  147.950819] xhci_hcd 0000:00:14.0: Giveback URB ffff8800ca5e6180, len = 18, expected = 96, status = -121
>[  147.950847] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  147.950852] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  147.951033] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  147.951037] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  147.951039] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  147.951041] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  147.951044] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  147.951046] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  147.951049] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  147.951052] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0af0 (DMA)
>[  147.951054] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  147.951058] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42faf0 (0xfffe0af0 dma), new cycle = 1
>[  147.951060] xhci_hcd 0000:00:14.0: // Ding dong!
>[  147.951064] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[  147.951068] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  147.951072] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0af1
>[  149.998859] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  149.998872] xhci_hcd 0000:00:14.0: Giveback URB ffff8800ca5e6d80, len = 18, expected = 96, status = -121
>[  149.998920] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  149.998934] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  149.999148] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  149.999158] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  149.999165] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  149.999172] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  149.999179] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  149.999186] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  149.999193] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  149.999201] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0b30 (DMA)
>[  149.999208] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  149.999218] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fb30 (0xfffe0b30 dma), new cycle = 1
>[  149.999225] xhci_hcd 0000:00:14.0: // Ding dong!
>[  149.999240] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  149.999250] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0b31
>[  152.046559] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  152.046568] xhci_hcd 0000:00:14.0: Giveback URB ffff8803e0360000, len = 18, expected = 96, status = -121
>[  152.046603] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  152.046611] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  152.046803] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  152.046810] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  152.046815] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  152.046820] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  152.046824] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  152.046830] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  152.046835] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  152.046840] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0b70 (DMA)
>[  152.046843] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  152.046849] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fb70 (0xfffe0b70 dma), new cycle = 1
>[  152.046852] xhci_hcd 0000:00:14.0: // Ding dong!
>[  152.046869] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  152.046875] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0b71
>[  154.094413] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  154.094423] xhci_hcd 0000:00:14.0: Giveback URB ffff88040b76ef00, len = 18, expected = 96, status = -121
>[  154.094452] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  154.094460] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  154.094653] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  154.094662] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  154.094667] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  154.094673] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  154.094678] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  154.094684] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  154.094690] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  154.094696] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0bb0 (DMA)
>[  154.094702] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  154.094711] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fbb0 (0xfffe0bb0 dma), new cycle = 1
>[  154.094717] xhci_hcd 0000:00:14.0: // Ding dong!
>[  154.094730] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  154.094739] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0bb1
>[  156.142257] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  156.142273] xhci_hcd 0000:00:14.0: Giveback URB ffff8803ff3d36c0, len = 18, expected = 96, status = -121
>[  156.142311] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  156.142321] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  156.142524] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  156.142532] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  156.142539] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  156.142546] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  156.142553] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  156.142562] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  156.142569] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  156.142577] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0bf0 (DMA)
>[  156.142584] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  156.142595] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fbf0 (0xfffe0bf0 dma), new cycle = 1
>[  156.142602] xhci_hcd 0000:00:14.0: // Ding dong!
>[  156.142625] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  156.142639] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0bf1
>[  158.190101] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  158.190110] xhci_hcd 0000:00:14.0: Giveback URB ffff8803e0360a80, len = 18, expected = 96, status = -121
>[  158.190146] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  158.190154] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  158.190350] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  158.190357] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  158.190360] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  158.190363] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  158.190366] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  158.190369] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  158.190372] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  158.190375] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0440 (DMA)
>[  158.190378] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  158.190382] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f440 (0xfffe0440 dma), new cycle = 0
>[  158.190386] xhci_hcd 0000:00:14.0: // Ding dong!
>[  158.190398] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  158.190406] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0440
>[  160.237959] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  160.237964] xhci_hcd 0000:00:14.0: Giveback URB ffff8803e03603c0, len = 18, expected = 96, status = -121
>[  160.237987] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  160.237991] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  160.238172] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  160.238176] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  160.238178] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  160.238180] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  160.238182] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  160.238184] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  160.238186] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  160.238188] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0480 (DMA)
>[  160.238190] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  160.238193] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f480 (0xfffe0480 dma), new cycle = 0
>[  160.238195] xhci_hcd 0000:00:14.0: // Ding dong!
>[  160.238201] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  160.238204] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0480
>[  162.285833] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  162.285845] xhci_hcd 0000:00:14.0: Giveback URB ffff88040b76e9c0, len = 18, expected = 96, status = -121
>[  162.285878] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  162.285888] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  162.286112] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  162.286127] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  162.286135] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  162.286142] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  162.286149] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  162.286156] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  162.286163] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  162.286171] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe04c0 (DMA)
>[  162.286178] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  162.286188] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f4c0 (0xfffe04c0 dma), new cycle = 0
>[  162.286196] xhci_hcd 0000:00:14.0: // Ding dong!
>[  162.286220] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  162.286234] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe04c0
>[  164.333672] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  164.333680] xhci_hcd 0000:00:14.0: Giveback URB ffff8803ff3d3f00, len = 18, expected = 96, status = -121
>[  164.333709] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  164.333715] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  164.333901] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  164.333905] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  164.333908] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  164.333910] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  164.333913] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  164.333916] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  164.333919] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  164.333922] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0500 (DMA)
>[  164.333925] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  164.333929] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f500 (0xfffe0500 dma), new cycle = 0
>[  164.333933] xhci_hcd 0000:00:14.0: // Ding dong!
>[  164.333943] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  164.333950] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0500
>[  166.381561] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  166.381578] xhci_hcd 0000:00:14.0: Giveback URB ffff8800da69c6c0, len = 18, expected = 96, status = -121
>[  166.381617] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  166.381628] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  166.381824] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  166.381835] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  166.381842] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  166.381849] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  166.381856] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  166.381864] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  166.381872] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  166.381880] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0540 (DMA)
>[  166.381887] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  166.381898] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f540 (0xfffe0540 dma), new cycle = 0
>[  166.381906] xhci_hcd 0000:00:14.0: // Ding dong!
>[  166.381930] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  166.381939] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0540
>[  168.429439] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  168.429452] xhci_hcd 0000:00:14.0: Giveback URB ffff8804063fdb40, len = 18, expected = 96, status = -121
>[  168.429488] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  168.429497] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  168.429716] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  168.429728] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  168.429736] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  168.429742] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  168.429746] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  168.429751] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  168.429757] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  168.429764] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0580 (DMA)
>[  168.429771] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  168.429781] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f580 (0xfffe0580 dma), new cycle = 0
>[  168.429789] xhci_hcd 0000:00:14.0: // Ding dong!
>[  168.429812] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  168.429822] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0580
>[  170.477253] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  170.477260] xhci_hcd 0000:00:14.0: Giveback URB ffff8803df76b000, len = 18, expected = 96, status = -121
>[  170.477298] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  170.477302] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  170.477490] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  170.477498] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  170.477502] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  170.477506] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  170.477509] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  170.477513] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  170.477517] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  170.477521] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe05c0 (DMA)
>[  170.477523] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  170.477527] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f5c0 (0xfffe05c0 dma), new cycle = 0
>[  170.477530] xhci_hcd 0000:00:14.0: // Ding dong!
>[  170.477544] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  170.477549] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe05c0
>[  172.525110] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  172.525117] xhci_hcd 0000:00:14.0: Giveback URB ffff8804048b5180, len = 18, expected = 96, status = -121
>[  172.525148] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  172.525154] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  172.525345] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  172.525353] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  172.525357] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  172.525360] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  172.525364] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  172.525368] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  172.525371] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  172.525375] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0600 (DMA)
>[  172.525379] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  172.525384] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f600 (0xfffe0600 dma), new cycle = 0
>[  172.525388] xhci_hcd 0000:00:14.0: // Ding dong!
>[  172.525398] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  172.525402] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0600
>[  174.572997] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  174.573004] xhci_hcd 0000:00:14.0: Giveback URB ffff8804063fd000, len = 18, expected = 96, status = -121
>[  174.573030] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  174.573036] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  174.573226] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  174.573232] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  174.573235] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  174.573238] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  174.573240] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  174.573243] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  174.573246] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  174.573249] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0640 (DMA)
>[  174.573252] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  174.573256] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f640 (0xfffe0640 dma), new cycle = 0
>[  174.573259] xhci_hcd 0000:00:14.0: // Ding dong!
>[  174.573271] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  174.573278] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0640
>[  176.620837] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  176.620846] xhci_hcd 0000:00:14.0: Giveback URB ffff8804063fd000, len = 18, expected = 96, status = -121
>[  176.620876] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  176.620884] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  176.621089] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  176.621099] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  176.621105] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  176.621111] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  176.621117] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  176.621123] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  176.621129] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  176.621136] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0680 (DMA)
>[  176.621141] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  176.621150] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f680 (0xfffe0680 dma), new cycle = 0
>[  176.621155] xhci_hcd 0000:00:14.0: // Ding dong!
>[  176.621176] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  176.621182] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0680
>[  178.668694] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  178.668706] xhci_hcd 0000:00:14.0: Giveback URB ffff8804063fd900, len = 18, expected = 96, status = -121
>[  178.668740] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  178.668750] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  178.668947] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  178.668953] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  178.668957] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  178.668961] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  178.668965] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  178.668969] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  178.668974] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  178.668979] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe06c0 (DMA)
>[  178.668984] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  178.668991] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f6c0 (0xfffe06c0 dma), new cycle = 0
>[  178.668995] xhci_hcd 0000:00:14.0: // Ding dong!
>[  178.669009] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  178.669017] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe06c0
>[  180.716639] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  180.716652] xhci_hcd 0000:00:14.0: Giveback URB ffff8804063fd0c0, len = 18, expected = 96, status = -121
>[  180.716704] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  180.716713] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  180.716927] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  180.716940] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  180.716948] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  180.716955] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  180.716962] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  180.716969] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  180.716976] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  180.716981] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0700 (DMA)
>[  180.716985] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  180.716991] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f700 (0xfffe0700 dma), new cycle = 0
>[  180.716996] xhci_hcd 0000:00:14.0: // Ding dong!
>[  180.717013] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  180.717024] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0700
>[  182.764389] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  182.764403] xhci_hcd 0000:00:14.0: Giveback URB ffff8803f0f98d80, len = 18, expected = 96, status = -121
>[  182.764438] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  182.764447] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  182.764659] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  182.764669] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  182.764675] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  182.764681] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  182.764686] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  182.764692] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  182.764699] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  182.764705] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0740 (DMA)
>[  182.764710] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  182.764717] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f740 (0xfffe0740 dma), new cycle = 0
>[  182.764721] xhci_hcd 0000:00:14.0: // Ding dong!
>[  182.764740] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  182.764744] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0740
>[  184.812252] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  184.812263] xhci_hcd 0000:00:14.0: Giveback URB ffff8803dda77600, len = 18, expected = 96, status = -121
>[  184.812298] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  184.812308] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  184.812499] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  184.812512] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  184.812517] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  184.812521] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  184.812525] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  184.812529] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  184.812534] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  184.812538] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0780 (DMA)
>[  184.812542] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  184.812549] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f780 (0xfffe0780 dma), new cycle = 0
>[  184.812554] xhci_hcd 0000:00:14.0: // Ding dong!
>[  184.812569] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  184.812578] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0780
>[  186.860173] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  186.860185] xhci_hcd 0000:00:14.0: Giveback URB ffff8800ca5e6600, len = 18, expected = 96, status = -121
>[  186.860226] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  186.860235] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  186.860431] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  186.860437] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  186.860441] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  186.860445] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  186.860449] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  186.860453] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  186.860458] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  186.860463] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe07c0 (DMA)
>[  186.860466] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  186.860473] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f7c0 (0xfffe07c0 dma), new cycle = 0
>[  186.860478] xhci_hcd 0000:00:14.0: // Ding dong!
>[  186.860493] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  186.860501] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe07c0
>[  188.907923] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  188.907929] xhci_hcd 0000:00:14.0: Giveback URB ffff8803dda779c0, len = 18, expected = 96, status = -121
>[  188.907960] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  188.907963] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  188.908135] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  188.908138] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  188.908140] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  188.908142] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  188.908144] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  188.908146] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  188.908149] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  188.908150] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0810 (DMA)
>[  188.908151] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  188.908154] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f810 (0xfffe0810 dma), new cycle = 0
>[  188.908155] xhci_hcd 0000:00:14.0: // Ding dong!
>[  188.908159] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[  188.908171] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  188.908174] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0810
>[  190.955814] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  190.955824] xhci_hcd 0000:00:14.0: Giveback URB ffff8803dda77b40, len = 18, expected = 96, status = -121
>[  190.955859] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  190.955867] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  190.956092] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  190.956097] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  190.956101] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  190.956118] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  190.956123] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  190.956129] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  190.956134] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  190.956140] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0850 (DMA)
>[  190.956145] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  190.956164] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f850 (0xfffe0850 dma), new cycle = 0
>[  190.956168] xhci_hcd 0000:00:14.0: // Ding dong!
>[  190.956194] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  190.956203] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0850
>[  193.003730] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  193.003742] xhci_hcd 0000:00:14.0: Giveback URB ffff8803ff561240, len = 18, expected = 96, status = -121
>[  193.003781] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  193.003791] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  193.003983] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  193.003989] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  193.003993] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  193.003997] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  193.004001] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  193.004006] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  193.004010] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  193.004015] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0890 (DMA)
>[  193.004019] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  193.004026] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f890 (0xfffe0890 dma), new cycle = 0
>[  193.004030] xhci_hcd 0000:00:14.0: // Ding dong!
>[  193.004045] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  193.004053] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0890
>[  195.051471] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  195.051478] xhci_hcd 0000:00:14.0: Giveback URB ffff8800ca5e6840, len = 18, expected = 96, status = -121
>[  195.051507] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  195.051511] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  195.051681] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  195.051683] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  195.051685] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  195.051687] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  195.051689] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  195.051690] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  195.051692] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  195.051694] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe08d0 (DMA)
>[  195.051696] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  195.051698] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f8d0 (0xfffe08d0 dma), new cycle = 0
>[  195.051700] xhci_hcd 0000:00:14.0: // Ding dong!
>[  195.051704] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[  195.051717] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  195.051719] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe08d0
>[  197.099392] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  197.099404] xhci_hcd 0000:00:14.0: Giveback URB ffff8800c80aab40, len = 18, expected = 96, status = -121
>[  197.099441] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  197.099455] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  197.099661] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  197.099671] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  197.099678] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  197.099685] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  197.099692] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  197.099699] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  197.099704] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  197.099709] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0910 (DMA)
>[  197.099717] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  197.099726] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f910 (0xfffe0910 dma), new cycle = 0
>[  197.099731] xhci_hcd 0000:00:14.0: // Ding dong!
>[  197.099743] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  197.099748] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0910
>[  199.147325] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  199.147342] xhci_hcd 0000:00:14.0: Giveback URB ffff88040b666000, len = 18, expected = 96, status = -121
>[  199.147402] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  199.147420] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  199.147646] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  199.147659] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  199.147667] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  199.147673] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  199.147679] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  199.147687] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  199.147694] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  199.147702] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0950 (DMA)
>[  199.147708] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  199.147719] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f950 (0xfffe0950 dma), new cycle = 0
>[  199.147727] xhci_hcd 0000:00:14.0: // Ding dong!
>[  199.147749] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  199.147758] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0950
>[  201.195128] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  201.195146] xhci_hcd 0000:00:14.0: Giveback URB ffff8803fe6da180, len = 18, expected = 96, status = -121
>[  201.195188] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  201.195199] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  201.195413] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  201.195425] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  201.195433] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  201.195440] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  201.195446] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  201.195454] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  201.195461] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  201.195468] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0990 (DMA)
>[  201.195474] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  201.195485] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f990 (0xfffe0990 dma), new cycle = 0
>[  201.195493] xhci_hcd 0000:00:14.0: // Ding dong!
>[  201.195516] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  201.195527] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0990
>[  203.242983] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  203.242995] xhci_hcd 0000:00:14.0: Giveback URB ffff8803df54b0c0, len = 18, expected = 96, status = -121
>[  203.243030] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  203.243040] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  203.243236] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  203.243242] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  203.243246] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  203.243250] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  203.243254] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  203.243258] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  203.243263] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  203.243268] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe09d0 (DMA)
>[  203.243273] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  203.243280] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42f9d0 (0xfffe09d0 dma), new cycle = 0
>[  203.243285] xhci_hcd 0000:00:14.0: // Ding dong!
>[  203.243299] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  203.243308] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe09d0
>[  205.290836] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  205.290846] xhci_hcd 0000:00:14.0: Giveback URB ffff8803df54bd80, len = 18, expected = 96, status = -121
>[  205.290875] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  205.290883] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  205.291070] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  205.291082] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  205.291085] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  205.291089] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  205.291092] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  205.291096] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  205.291099] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  205.291103] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0a10 (DMA)
>[  205.291106] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  205.291112] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fa10 (0xfffe0a10 dma), new cycle = 0
>[  205.291115] xhci_hcd 0000:00:14.0: // Ding dong!
>[  205.291122] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[  205.291130] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  205.291138] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0a10
>[  207.338646] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  207.338653] xhci_hcd 0000:00:14.0: Giveback URB ffff8803df54bd80, len = 18, expected = 96, status = -121
>[  207.338683] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  207.338687] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  207.338859] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  207.338862] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  207.338864] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  207.338867] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  207.338869] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  207.338871] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  207.338874] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  207.338877] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0a50 (DMA)
>[  207.338879] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  207.338882] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fa50 (0xfffe0a50 dma), new cycle = 0
>[  207.338885] xhci_hcd 0000:00:14.0: // Ding dong!
>[  207.338895] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[  207.338902] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  207.338907] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0a50
>[  209.386588] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  209.386601] xhci_hcd 0000:00:14.0: Giveback URB ffff8800cacf2600, len = 18, expected = 96, status = -121
>[  209.386645] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  209.386655] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  209.386864] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  209.386878] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  209.386886] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  209.386893] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  209.386899] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  209.386905] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  209.386909] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  209.386914] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0a90 (DMA)
>[  209.386918] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  209.386925] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fa90 (0xfffe0a90 dma), new cycle = 0
>[  209.386930] xhci_hcd 0000:00:14.0: // Ding dong!
>[  209.386947] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  209.386962] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0a90
>[  211.434351] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  211.434361] xhci_hcd 0000:00:14.0: Giveback URB ffff88040b689840, len = 18, expected = 96, status = -121
>[  211.434396] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  211.434408] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  211.434605] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  211.434610] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  211.434614] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  211.434617] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  211.434620] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  211.434624] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  211.434628] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  211.434632] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0ad0 (DMA)
>[  211.434635] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  211.434640] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fad0 (0xfffe0ad0 dma), new cycle = 0
>[  211.434644] xhci_hcd 0000:00:14.0: // Ding dong!
>[  211.434656] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  211.434667] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0ad0
>[  213.482313] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  213.482323] xhci_hcd 0000:00:14.0: Giveback URB ffff8803fe7dc480, len = 18, expected = 96, status = -121
>[  213.482354] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  213.482362] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  213.482552] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  213.482557] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  213.482561] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  213.482565] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  213.482568] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  213.482571] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  213.482575] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  213.482579] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0b10 (DMA)
>[  213.482582] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  213.482587] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fb10 (0xfffe0b10 dma), new cycle = 0
>[  213.482591] xhci_hcd 0000:00:14.0: // Ding dong!
>[  213.482596] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[  213.482609] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  213.482621] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0b10
>[  215.530133] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  215.530143] xhci_hcd 0000:00:14.0: Giveback URB ffff8803e03a1f00, len = 18, expected = 96, status = -121
>[  215.530173] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  215.530181] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  215.530393] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  215.530404] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  215.530410] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  215.530415] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  215.530421] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  215.530427] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  215.530433] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  215.530439] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0b50 (DMA)
>[  215.530444] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  215.530449] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fb50 (0xfffe0b50 dma), new cycle = 0
>[  215.530452] xhci_hcd 0000:00:14.0: // Ding dong!
>[  215.530465] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  215.530474] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0b50
>[  217.577928] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  217.577935] xhci_hcd 0000:00:14.0: Giveback URB ffff88040b7a7600, len = 18, expected = 96, status = -121
>[  217.577969] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  217.577978] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  217.578163] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  217.578168] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  217.578171] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  217.578173] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  217.578175] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  217.578178] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  217.578180] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  217.578185] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0b90 (DMA)
>[  217.578188] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  217.578192] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fb90 (0xfffe0b90 dma), new cycle = 0
>[  217.578195] xhci_hcd 0000:00:14.0: // Ding dong!
>[  217.578200] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[  217.578208] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  217.578212] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0b90
>[  219.625890] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  219.625903] xhci_hcd 0000:00:14.0: Giveback URB ffff8803ff3d3480, len = 18, expected = 96, status = -121
>[  219.625954] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  219.625963] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  219.626175] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  219.626186] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  219.626194] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  219.626201] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  219.626207] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  219.626214] xhci_hcd 0000:00:14.0: Cycle state = 0x0
>[  219.626221] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd60 (virtual)
>[  219.626229] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0bd0 (DMA)
>[  219.626236] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  219.626257] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd60 (0xfffe0800 dma), new deq ptr = ffff8800ca42fbd0 (0xfffe0bd0 dma), new cycle = 0
>[  219.626261] xhci_hcd 0000:00:14.0: // Ding dong!
>[  219.626281] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  219.626289] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0bd0
>[  221.673708] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  221.673720] xhci_hcd 0000:00:14.0: Giveback URB ffff88040b7a7cc0, len = 18, expected = 96, status = -121
>[  221.673756] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  221.673766] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  221.673966] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  221.673972] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  221.673976] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  221.673980] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  221.673984] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  221.673989] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  221.673993] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  221.673999] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0420 (DMA)
>[  221.674004] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  221.674010] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f420 (0xfffe0420 dma), new cycle = 1
>[  221.674015] xhci_hcd 0000:00:14.0: // Ding dong!
>[  221.674030] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  221.674038] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0421
>[  223.721475] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  223.721479] xhci_hcd 0000:00:14.0: Giveback URB ffff88040b7a7c00, len = 18, expected = 96, status = -121
>[  223.721512] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  223.721514] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  223.721681] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  223.721683] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  223.721684] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  223.721686] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  223.721687] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  223.721688] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  223.721689] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  223.721691] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe0460 (DMA)
>[  223.721692] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  223.721694] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f460 (0xfffe0460 dma), new cycle = 1
>[  223.721695] xhci_hcd 0000:00:14.0: // Ding dong!
>[  223.721698] xhci_hcd 0000:00:14.0: WARN halted endpoint, queueing URB anyway.
>[  223.721718] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  223.721719] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe0461
>[  225.769483] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  225.769496] xhci_hcd 0000:00:14.0: Giveback URB ffff8800cacf2600, len = 18, expected = 96, status = -121
>[  225.769546] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  225.769556] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  225.769769] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  225.769783] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  225.769791] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  225.769798] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  225.769805] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  225.769812] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  225.769820] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  225.769826] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe04a0 (DMA)
>[  225.769830] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  225.769837] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f4a0 (0xfffe04a0 dma), new cycle = 1
>[  225.769842] xhci_hcd 0000:00:14.0: // Ding dong!
>[  225.769859] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  225.769869] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe04a1
>[  227.817321] xhci_hcd 0000:00:14.0: ep 0x81 - asked for 96 bytes, 78 bytes untransferred
>[  227.817334] xhci_hcd 0000:00:14.0: Giveback URB ffff8803df764180, len = 18, expected = 96, status = -121
>[  227.817384] xhci_hcd 0000:00:14.0: Stalled endpoint
>[  227.817397] xhci_hcd 0000:00:14.0: Giveback URB ffff88040c347240, len = 0, expected = 13, status = -32
>[  227.817613] xhci_hcd 0000:00:14.0: Queueing reset endpoint command
>[  227.817622] xhci_hcd 0000:00:14.0: Cleaning up stalled endpoint ring
>[  227.817628] xhci_hcd 0000:00:14.0: Finding segment containing stopped TRB.
>[  227.817634] xhci_hcd 0000:00:14.0: Finding endpoint context
>[  227.817641] xhci_hcd 0000:00:14.0: Finding segment containing last TRB in TD.
>[  227.817648] xhci_hcd 0000:00:14.0: Cycle state = 0x1
>[  227.817655] xhci_hcd 0000:00:14.0: New dequeue segment = ffff88040b80fd40 (virtual)
>[  227.817662] xhci_hcd 0000:00:14.0: New dequeue pointer = 0xfffe04e0 (DMA)
>[  227.817669] xhci_hcd 0000:00:14.0: Queueing new dequeue state
>[  227.817679] xhci_hcd 0000:00:14.0: Set TR Deq Ptr cmd, new deq seg = ffff88040b80fd40 (0xfffe0400 dma), new deq ptr = ffff8800ca42f4e0 (0xfffe04e0 dma), new cycle = 1
>[  227.817687] xhci_hcd 0000:00:14.0: // Ding dong!
>[  227.817710] xhci_hcd 0000:00:14.0: Ignoring reset ep completion code of 1
>[  227.817740] xhci_hcd 0000:00:14.0: Successful Set TR Deq Ptr cmd, deq = @fffe04e1

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